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-rw-r--r--.gitignore7
-rw-r--r--README.md2
-rwxr-xr-xbuild177
-rw-r--r--config/coreboot/build.list1
-rw-r--r--config/coreboot/d510mo/config/libgfxinit_txtmode34
-rw-r--r--config/coreboot/d510mo/target.cfg3
-rw-r--r--config/coreboot/d510mo_16mb/config/libgfxinit_txtmode34
-rw-r--r--config/coreboot/d510mo_16mb/target.cfg2
-rw-r--r--config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode34
-rw-r--r--config/coreboot/d945gclf_512kb/target.cfg4
-rw-r--r--config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode34
-rw-r--r--config/coreboot/d945gclf_8mb/target.cfg5
-rw-r--r--config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch10
-rw-r--r--config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch10
-rw-r--r--config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch10
-rw-r--r--config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch10
-rw-r--r--config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch10
-rw-r--r--config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch10
-rw-r--r--config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch10
-rw-r--r--config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch10
-rw-r--r--config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch6
-rw-r--r--config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch10
-rw-r--r--config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch10
-rw-r--r--config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch48
-rw-r--r--config/coreboot/default/patches/0013-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch (renamed from config/coreboot/haswell/patches/0020-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch)43
-rw-r--r--config/coreboot/default/patches/0014-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch (renamed from config/coreboot/dell/patches/0002-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch)8
-rw-r--r--config/coreboot/default/patches/0015-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch (renamed from config/coreboot/default/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch)8
-rw-r--r--config/coreboot/default/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch47
-rw-r--r--config/coreboot/default/patches/0016-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch (renamed from config/coreboot/default/patches/0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch)6
-rw-r--r--config/coreboot/default/patches/0017-Remove-warning-for-coreboot-images-built-without-a-p.patch (renamed from config/coreboot/haswell/patches/0018-Remove-warning-for-coreboot-images-built-without-a-p.patch)10
-rw-r--r--config/coreboot/default/patches/0018-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch430
-rw-r--r--config/coreboot/default/patches/0019-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch430
-rw-r--r--config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch435
-rw-r--r--config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch826
-rw-r--r--config/coreboot/default/patches/0021-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch449
-rw-r--r--config/coreboot/default/patches/0022-don-t-use-github-for-the-acpica-download.patch39
-rw-r--r--config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch442
-rw-r--r--config/coreboot/default/patches/0023-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch442
-rw-r--r--config/coreboot/default/patches/0024-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch435
-rw-r--r--config/coreboot/default/patches/0025-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch438
-rw-r--r--config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch436
-rw-r--r--config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch792
-rw-r--r--config/coreboot/default/patches/0027-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch440
-rw-r--r--config/coreboot/default/patches/0027-rebase-dell-e6530-to-newer-coreboot-code.patch145
-rw-r--r--config/coreboot/default/patches/0028-HACK-Disable-coreboot-related-BL31-features.patch (renamed from config/coreboot/default/patches/0021-HACK-Disable-coreboot-related-BL31-features.patch)10
-rw-r--r--config/coreboot/default/patches/0028-dell-e6-30-disable-the-ME-device-in-devicetree.patch54
-rw-r--r--config/coreboot/default/patches/0029-use-own-mirror-for-acpica-files.patch29
-rw-r--r--config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch (renamed from config/coreboot/default/patches/0023-crank-up-vram-allocation-on-more-intel-boards.patch)54
-rw-r--r--config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch (renamed from config/coreboot/default/patches/0024-dell-e6430-use-ME-Soft-Temporary-Disable.patch)14
-rw-r--r--config/coreboot/default/patches/0031-mb-dell-Add-OptiPlex-7020-9020-port_cb55232_31.patch923
-rw-r--r--config/coreboot/default/patches/0032-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch774
-rw-r--r--config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch (renamed from config/coreboot/default/patches/0025-use-mirrorservice.org-for-gcc-downloads.patch)10
-rw-r--r--config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch773
-rw-r--r--config/coreboot/default/patches/0033-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch (renamed from config/coreboot/default/patches/0030-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch)63
-rw-r--r--config/coreboot/default/patches/0034-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch780
-rw-r--r--config/coreboot/default/patches/0034-mb-hp-Add-Elitebook-8560w-as-an-HP-Sandy-Ivy-Bridge-.patch1556
-rw-r--r--config/coreboot/default/patches/0034-nb-intel-haswell-make-IOMMU-a-runtime-option.patch (renamed from config/coreboot/haswell/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch)22
-rw-r--r--config/coreboot/default/patches/0035-dell-optiplex_9020-Disable-IOMMU-by-default.patch (renamed from config/coreboot/haswell/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch)12
-rw-r--r--config/coreboot/default/patches/0035-hp8560w-Add-MXM-System-Infomation-Structure.patch41
-rw-r--r--config/coreboot/default/patches/0035-mb-dell-Add-Latitude-E5520-Sandybridge.patch775
-rw-r--r--config/coreboot/default/patches/0036-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch (renamed from config/coreboot/default/patches/0041-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch)10
-rw-r--r--config/coreboot/default/patches/0036-nb-intel-haswell-make-IOMMU-a-runtime-option.patch292
-rw-r--r--config/coreboot/default/patches/0037-dell-optiplex_9020-Disable-IOMMU-by-default.patch29
-rw-r--r--config/coreboot/default/patches/0037-ec-dell-mec5035-Replace-defines-with-enums.patch91
-rw-r--r--config/coreboot/default/patches/0038-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch (renamed from config/coreboot/default/patches/0045-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch)74
-rw-r--r--config/coreboot/default/patches/0038-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch774
-rw-r--r--config/coreboot/default/patches/0039-fix-sata-ports-on-dell-9020-sff-and-mt.patch66
-rw-r--r--config/coreboot/default/patches/0039-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch (renamed from config/coreboot/haswell/patches/0027-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch)6
-rw-r--r--config/coreboot/default/patches/0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch54
-rw-r--r--config/coreboot/default/patches/0040-nb-intel-gm45-Make-DDR2-raminit-work.patch (renamed from config/coreboot/dell/patches/0008-nb-intel-gm45-Make-DDR2-raminit-work.patch)10
-rw-r--r--config/coreboot/default/patches/0041-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch240
-rw-r--r--config/coreboot/default/patches/0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch52
-rw-r--r--config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch602
-rw-r--r--config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch (renamed from config/coreboot/haswell/patches/0001-haswell-NRI-Initialise-MPLL.patch)12
-rw-r--r--config/coreboot/default/patches/0043-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch49
-rw-r--r--config/coreboot/default/patches/0044-haswell-NRI-Post-process-selected-timings.patch (renamed from config/coreboot/haswell/patches/0002-haswell-NRI-Post-process-selected-timings.patch)14
-rw-r--r--config/coreboot/default/patches/0044-hp-8560w-turn-on-wifi.patch47
-rw-r--r--config/coreboot/default/patches/0045-haswell-NRI-Configure-initial-MC-settings.patch (renamed from config/coreboot/haswell/patches/0003-haswell-NRI-Configure-initial-MC-settings.patch)17
-rw-r--r--config/coreboot/default/patches/0046-haswell-NRI-Add-timings-refresh-programming.patch (renamed from config/coreboot/haswell/patches/0004-haswell-NRI-Add-timings-refresh-programming.patch)12
-rw-r--r--config/coreboot/default/patches/0046-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch133
-rw-r--r--config/coreboot/default/patches/0047-haswell-NRI-Program-memory-map.patch (renamed from config/coreboot/haswell/patches/0005-haswell-NRI-Program-memory-map.patch)10
-rw-r--r--config/coreboot/default/patches/0047-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch55
-rw-r--r--config/coreboot/default/patches/0048-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch (renamed from config/coreboot/haswell/patches/0006-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch)22
-rw-r--r--config/coreboot/default/patches/0049-haswell-NRI-Add-pre-training-steps.patch (renamed from config/coreboot/haswell/patches/0007-haswell-NRI-Add-pre-training-steps.patch)12
-rw-r--r--config/coreboot/default/patches/0050-haswell-NRI-Add-REUT-I-O-test-library.patch (renamed from config/coreboot/haswell/patches/0008-haswell-NRI-Add-REUT-I-O-test-library.patch)14
-rw-r--r--config/coreboot/default/patches/0051-haswell-NRI-Add-range-tracking-library.patch (renamed from config/coreboot/haswell/patches/0009-haswell-NRI-Add-range-tracking-library.patch)6
-rw-r--r--config/coreboot/default/patches/0052-haswell-NRI-Add-library-to-change-margins.patch (renamed from config/coreboot/haswell/patches/0010-haswell-NRI-Add-library-to-change-margins.patch)12
-rw-r--r--config/coreboot/default/patches/0053-haswell-NRI-Add-RcvEn-training.patch (renamed from config/coreboot/haswell/patches/0011-haswell-NRI-Add-RcvEn-training.patch)18
-rw-r--r--config/coreboot/default/patches/0054-haswell-NRI-Add-function-to-change-margins.patch (renamed from config/coreboot/haswell/patches/0012-haswell-NRI-Add-function-to-change-margins.patch)14
-rw-r--r--config/coreboot/default/patches/0055-haswell-NRI-Add-read-MPR-training.patch (renamed from config/coreboot/haswell/patches/0013-haswell-NRI-Add-read-MPR-training.patch)14
-rw-r--r--config/coreboot/default/patches/0056-haswell-NRI-Add-write-leveling.patch (renamed from config/coreboot/haswell/patches/0014-haswell-NRI-Add-write-leveling.patch)16
-rw-r--r--config/coreboot/default/patches/0057-haswell-NRI-Add-final-raminit-steps.patch (renamed from config/coreboot/haswell/patches/0015-haswell-NRI-Add-final-raminit-steps.patch)10
-rw-r--r--config/coreboot/default/patches/0058-Haswell-NRI-Implement-fast-boot-path.patch (renamed from config/coreboot/haswell/patches/0016-Haswell-NRI-Implement-fast-boot-path.patch)18
-rw-r--r--config/coreboot/default/patches/0059-haswell-NRI-Do-sense-amplifier-offset-training.patch (renamed from config/coreboot/haswell/patches/0017-haswell-NRI-Do-sense-amplifier-offset-training.patch)18
-rw-r--r--config/coreboot/default/patches/0060-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch52
-rw-r--r--config/coreboot/default/patches/0062-mb-dell-Convert-E6400-into-a-variant.patch243
-rw-r--r--config/coreboot/default/patches/0063-mb-dell-gm45_latitudes-Add-E4300-variant.patch332
-rw-r--r--config/coreboot/default/patches/0066-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch70
-rw-r--r--config/coreboot/default/patches/0067-ec-dell-mec5035-Route-power-button-event-to-host.patch92
-rw-r--r--config/coreboot/default/target.cfg2
-rw-r--r--config/coreboot/dell/patches/0003-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch173
-rw-r--r--config/coreboot/dell/patches/0004-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch28
-rw-r--r--config/coreboot/dell/patches/0006-don-t-use-github-for-the-acpica-download.patch39
-rw-r--r--config/coreboot/dell/patches/0007-use-mirrorservice.org-for-gcc-downloads.patch36
-rw-r--r--config/coreboot/dell/patches/0009-dell-e6400-crank-up-vram-to-256MB-max.patch23
-rw-r--r--config/coreboot/dell/target.cfg4
-rw-r--r--config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb809
-rw-r--r--config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode802
-rw-r--r--config/coreboot/dell3050micro_fsp_16mb/target.cfg10
-rw-r--r--config/coreboot/dell7/patches/0001-WIP-OptiPlex-3050-Micro-port.patch1421
-rw-r--r--config/coreboot/dell7/patches/0002-dell-optiplex_3050-add-hda_verb.c.patch140
-rw-r--r--config/coreboot/dell7/patches/0003-dell-optiplex_3050-Add-data.vbt.patch74
-rw-r--r--config/coreboot/dell7/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch (renamed from config/coreboot/dell/patches/0005-Remove-warning-for-coreboot-images-built-without-a-p.patch)10
-rw-r--r--config/coreboot/dell7/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch (renamed from config/coreboot/dell/patches/0001-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch)54
-rw-r--r--config/coreboot/dell7/target.cfg2
-rw-r--r--config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode671
-rw-r--r--config/coreboot/dell7010sff_12mb/target.cfg9
-rw-r--r--config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb653
-rw-r--r--config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode649
-rw-r--r--config/coreboot/dell780mt_8mb/target.cfg8
-rw-r--r--config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb653
-rw-r--r--config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode649
-rw-r--r--config/coreboot/dell780mt_truncate_8mb/target.cfg8
-rw-r--r--config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb653
-rw-r--r--config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode649
-rw-r--r--config/coreboot/dell780usff_8mb/target.cfg8
-rw-r--r--config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb653
-rw-r--r--config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode649
-rw-r--r--config/coreboot/dell780usff_truncate_8mb/target.cfg8
-rw-r--r--config/coreboot/dell9020mt-nri_12mb/target.cfg7
-rw-r--r--config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb (renamed from config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb)34
-rw-r--r--config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode (renamed from config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode)34
-rw-r--r--config/coreboot/dell9020mt_nri_12mb/target.cfg9
-rw-r--r--config/coreboot/dell9020sff-nri_12mb/target.cfg7
-rw-r--r--config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb (renamed from config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb)34
-rw-r--r--config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode (renamed from config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode)34
-rw-r--r--config/coreboot/dell9020sff_nri_12mb/target.cfg9
-rw-r--r--config/coreboot/e4300_4mb/config/libgfxinit_corebootfb622
-rw-r--r--config/coreboot/e4300_4mb/config/libgfxinit_txtmode618
-rw-r--r--config/coreboot/e4300_4mb/target.cfg (renamed from config/coreboot/g43t-am3/target.cfg)3
-rw-r--r--config/coreboot/e5420_6mb/config/libgfxinit_corebootfb61
-rw-r--r--config/coreboot/e5420_6mb/config/libgfxinit_txtmode61
-rw-r--r--config/coreboot/e5420_6mb/target.cfg6
-rw-r--r--config/coreboot/e5520_6mb/config/libgfxinit_corebootfb61
-rw-r--r--config/coreboot/e5520_6mb/config/libgfxinit_txtmode61
-rw-r--r--config/coreboot/e5520_6mb/target.cfg6
-rw-r--r--config/coreboot/e5530_12mb/config/libgfxinit_corebootfb61
-rw-r--r--config/coreboot/e5530_12mb/config/libgfxinit_txtmode61
-rw-r--r--config/coreboot/e5530_12mb/target.cfg6
-rw-r--r--config/coreboot/e6220_10mb/config/libgfxinit_corebootfb640
-rw-r--r--config/coreboot/e6220_10mb/config/libgfxinit_txtmode637
-rw-r--r--config/coreboot/e6220_10mb/target.cfg (renamed from config/coreboot/kcma-d8-rdimm_2mb/target.cfg)8
-rw-r--r--config/coreboot/e6230_12mb/config/libgfxinit_corebootfb640
-rw-r--r--config/coreboot/e6230_12mb/config/libgfxinit_txtmode637
-rw-r--r--config/coreboot/e6230_12mb/target.cfg (renamed from config/coreboot/ga-g41m-es2l/target.cfg)5
-rw-r--r--config/coreboot/e6320_10mb/config/libgfxinit_corebootfb640
-rw-r--r--config/coreboot/e6320_10mb/config/libgfxinit_txtmode637
-rw-r--r--config/coreboot/e6320_10mb/target.cfg (renamed from config/coreboot/kcma-d8-rdimm_16mb/target.cfg)8
-rw-r--r--config/coreboot/e6330_12mb/config/libgfxinit_corebootfb640
-rw-r--r--config/coreboot/e6330_12mb/config/libgfxinit_txtmode637
-rw-r--r--config/coreboot/e6330_12mb/target.cfg (renamed from config/coreboot/g43t-am3_16mb/target.cfg)5
-rw-r--r--config/coreboot/e6400_4mb/config/libgfxinit_corebootfb58
-rw-r--r--config/coreboot/e6400_4mb/config/libgfxinit_txtmode58
-rw-r--r--config/coreboot/e6400_4mb/target.cfg8
-rw-r--r--config/coreboot/e6400nvidia_4mb/config/normal56
-rw-r--r--config/coreboot/e6400nvidia_4mb/target.cfg8
-rw-r--r--config/coreboot/e6420_10mb/config/libgfxinit_corebootfb61
-rw-r--r--config/coreboot/e6420_10mb/config/libgfxinit_txtmode61
-rw-r--r--config/coreboot/e6420_10mb/target.cfg6
-rw-r--r--config/coreboot/e6430_12mb/config/libgfxinit_corebootfb61
-rw-r--r--config/coreboot/e6430_12mb/config/libgfxinit_txtmode61
-rw-r--r--config/coreboot/e6430_12mb/target.cfg6
-rw-r--r--config/coreboot/e6520_10mb/config/libgfxinit_corebootfb61
-rw-r--r--config/coreboot/e6520_10mb/config/libgfxinit_txtmode61
-rw-r--r--config/coreboot/e6520_10mb/target.cfg6
-rw-r--r--config/coreboot/e6530_12mb/config/libgfxinit_corebootfb61
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-rw-r--r--config/submodule/pcsx-redux/uC-sdk/module.cfg3
-rw-r--r--config/submodule/pico-sdk/module.list1
-rw-r--r--config/submodule/pico-sdk/tinyusb/module.cfg3
-rw-r--r--config/submodule/stm32-vserprog/libopencm3/module.cfg3
-rw-r--r--config/submodule/stm32-vserprog/module.list1
-rw-r--r--config/u-boot/default/nuke.list1
-rw-r--r--config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch8
-rw-r--r--config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch333
-rw-r--r--config/u-boot/default/patches/0003-Add-video-damage-tracking.patch439
-rw-r--r--config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch34
-rw-r--r--config/u-boot/default/patches/0004-HACK-regulator-Don-t-error-on-reentrant-regulator-ac.patch42
-rw-r--r--config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch36
-rw-r--r--config/u-boot/default/patches/0005-HACK-rockchip-Remove-binman-image-descriptions.patch307
-rw-r--r--config/u-boot/default/patches/0006-arm-qemu-Enable-Bochs-console-buffering-USB-keyboard.patch348
-rw-r--r--config/u-boot/default/target.cfg2
-rw-r--r--config/u-boot/gru_bob/config/default216
-rw-r--r--config/u-boot/gru_kevin/config/default216
-rw-r--r--config/u-boot/qemu_arm64_12mb/config/default144
-rw-r--r--config/u-boot/qemu_x86_12mb/config/default1712
-rw-r--r--config/u-boot/qemu_x86_12mb/target.cfg3
-rw-r--r--config/uefitool/patches/0001-common-filesystem-define-ACCESSPERMS-if-undefined.patch56
-rw-r--r--config/uefitool/target.cfg1
-rw-r--r--config/vendor/3050micro/pkg.cfg4
-rw-r--r--config/vendor/e6400/pkg.cfg5
-rw-r--r--config/vendor/haswell/pkg.cfg3
-rw-r--r--config/vendor/hp2170p/pkg.cfg6
-rw-r--r--config/vendor/hp2560p/pkg.cfg6
-rw-r--r--config/vendor/hp2570p/pkg.cfg6
-rw-r--r--config/vendor/hp8200sff/pkg.cfg3
-rw-r--r--config/vendor/hp820g2/pkg.cfg9
-rw-r--r--config/vendor/hp8460pintel/pkg.cfg6
-rw-r--r--config/vendor/hp8470pintel/pkg.cfg6
-rw-r--r--config/vendor/hp8560w/pkg.cfg6
-rw-r--r--config/vendor/hp9470m/pkg.cfg6
-rw-r--r--config/vendor/ivybridge/pkg.cfg3
-rw-r--r--config/vendor/sandybridge/pkg.cfg3
-rw-r--r--config/vendor/sources166
-rw-r--r--config/vendor/t1650/pkg.cfg6
-rw-r--r--[-rwxr-xr-x]include/git.sh212
-rw-r--r--include/lib.sh223
-rw-r--r--[-rwxr-xr-x]include/mrc.sh36
-rwxr-xr-xinclude/option.sh188
-rw-r--r--include/rom.sh188
-rw-r--r--[-rwxr-xr-x]include/vendor.sh583
l---------mk1
-rw-r--r--projectsite1
-rwxr-xr-xscript/roms475
-rwxr-xr-xscript/trees341
-rw-r--r--util/autoport/azalia.go67
-rw-r--r--util/autoport/bd82x6x.go337
-rw-r--r--util/autoport/description.md1
-rw-r--r--util/autoport/ec_fixme.go91
-rw-r--r--util/autoport/ec_lenovo.go245
-rw-r--r--util/autoport/ec_none.go24
-rw-r--r--util/autoport/go.mod1
-rw-r--r--util/autoport/gpio_common.go113
-rw-r--r--util/autoport/haswell.go139
-rw-r--r--util/autoport/log_maker.go190
-rw-r--r--util/autoport/log_reader.go417
-rw-r--r--util/autoport/lynxpoint.go490
-rw-r--r--util/autoport/lynxpoint_lp_gpio.go252
-rw-r--r--util/autoport/main.go915
-rw-r--r--util/autoport/rce823.go39
-rw-r--r--util/autoport/readme.md457
-rw-r--r--util/autoport/root.go47
-rw-r--r--util/autoport/sandybridge.go93
704 files changed, 40624 insertions, 26714 deletions
diff --git a/.gitignore b/.gitignore
index 36ac930c..03bb21cc 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1,8 +1,9 @@
*~
*.o
+/cache/
/lbmk.err.log
+/repo/
/docs/
-/cbutils/
/pciroms/
/util/dell-flash-unlock/dell_flash_unlock
/TODO
@@ -29,3 +30,7 @@
/mrc/
/util/nvmutil/nvm
/src/
+/CHANGELOG
+/todo.txt
+/lock
+/hash/
diff --git a/README.md b/README.md
index 7f73a3e2..7f29bc14 100644
--- a/README.md
+++ b/README.md
@@ -94,7 +94,7 @@ easy to do so.
Not a coreboot fork!
--------------------
-Libreboot is not a fork of coreboot. Every so often, the project
+Libreboot is *not a fork of coreboot*. Every so often, the project
re-bases on the latest version of coreboot, with the number of custom
patches in use minimized. Tested, *stable* (static) releases are then provided
in Libreboot, based on specific coreboot revisions.
diff --git a/build b/build
index 61836eb5..985bbe9e 100755
--- a/build
+++ b/build
@@ -1,195 +1,132 @@
#!/usr/bin/env sh
# SPDX-License-Identifier: GPL-3.0-or-later
-# SPDX-FileCopyrightText: 2014,2015,2020-2024 Leah Rowe <leah@libreboot.org>
-# SPDX-FileCopyrightText: 2015 Patrick "P. J." McDermott <pj@pehjota.net>
-# SPDX-FileCopyrightText: 2015, 2016 Klemens Nanni <contact@autoboot.org>
-# SPDX-FileCopyrightText: 2022, Caleb La Grange <thonkpeasant@protonmail.com>
+# Copyright (c) 2014-2015,2020-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2015 Patrick "P. J." McDermott <pj@pehjota.net>
+# Copyright (c) 2015-2016 Klemens Nanni <contact@autoboot.org>
+# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
set -u -e
if [ "./${0##*/}" != "${0}" ] || [ ! -f "build" ] || [ -L "build" ]; then
- printf "You must run this in the lbmk work directory.\n" 1>&2
+ printf "You must run this in the proper work directory.\n" 1>&2
exit 1
fi
-. "include/option.sh"
+. "include/lib.sh"
. "include/vendor.sh"
. "include/mrc.sh"
-eval "$(setvars "" script_path aur_notice vdir src_dirname srcdir _xm mode xp)"
+eval `setvars "" vdir src_dirname srcdir mode xp ser`
err="fail"
-linkpath="${0}"
-linkname="${linkpath##*/}"
-
main()
{
- x_ id -u 1>/dev/null 2>/dev/null
- [ $# -lt 1 ] && $err "Check $projectname documentation for help."
-
- [ "$1" = "dependencies" ] && x_ install_packages $@ && lbmk_exit 0
-
- which git 1>/dev/null 2>/dev/null || \
- git_err "git not installed. please install git-scm."
- git config --global user.name 1>/dev/null 2>/dev/null || \
- git_err "git config --global user.name \"John Doe\""
- git config --global user.email 1>/dev/null 2>/dev/null || \
- git_err "git config --global user.email \"john.doe@example.com\""
+ [ $# -lt 1 ] && $err "bad command"
+ spath="script/$1"; shcmd="shift 1"
+ [ "${1#-*}" != "$1" ] && spath="script/trees" && shcmd=":"
- for cmd in initcmd git_init excmd; do
- eval "${cmd} \$@"
+ for g in "which git" "git config --global user.name" \
+ "git config --global user.email" "git_init"; do
+ eval "$g 1>/dev/null 2>/dev/null || $err \"Unconfigured: $g\""
done
- lbmk_exit 0
-}
-
-initcmd()
-{
- [ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
- case "${1}" in
- version) printf "%s\n" "$relname" ;;
+ case "${spath#script/}" in
+ version) printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;;
release) shift 1; mkrelease $@ ;;
inject) shift 1; vendor_inject $@ ;;
download) shift 1; vendor_download $@ ;;
+ roms)
+ [ $# -gt 1 ] && [ "$2" = "serprog" ] && \
+ mk -b stm32-vserprog pico-serprog && return 0
+ shift 1; x_ ./mk -b coreboot $@ ;;
*)
- script_path="script/${1}"
- return 0 ;;
+ [ -f "$spath" ] || $err "bad command"
+ $shcmd; "$spath" $@ || $err "excmd: $spath $(echo "$@")" ;;
esac
set -u -e # some commands disable them. turn them on!
- lbmk_exit 0
-}
-
-install_packages()
-{
- if [ $# -lt 2 ]; then
- printf "You must specify a distro, namely:\n" 1>&2
- printf "Look at files under config/dependencies/\n" 1>&2
- printf "Example: ./build dependencies debian\n" 1>&2
- $err "install_packages: target not specified"
- fi
-
- [ -f "config/dependencies/${2}" ] || $err "Unsupported target"
-
- . "config/dependencies/${2}"
-
- x_ ${pkg_add} ${pkglist}
- [ -z "${aur_notice}" ] && return 0
- printf "You must install AUR packages: %s\n" "$aur_notice" 1>&2
}
-# release archives contain .gitignore, but not .git.
-# lbmk can be run from lbmk.git, or an archive.
git_init()
{
- [ -L ".git" ] && $err "Reference .git is a symlink"
+ [ -L ".git" ] && return 1
[ -e ".git" ] && return 0
- eval "$(setvars "$(date -Rud @${versiondate})" cdate _nogit)"
-
- git init || $err "${PWD}: cannot initialise Git repository"
- git add -A . || $err "${PWD}: cannot add files to Git repository"
- git commit -m "${projectname} ${version}" --date "${cdate}" \
- --author="lbmk <lbmk@libreboot.org>" || \
- $err "$PWD: can't commit ${projectname}/${version}, date $cdate"
- git tag -a "${version}" -m "${projectname} ${version}" || \
- $err "${PWD}: cannot git-tag ${projectname}/${version}"
-}
+ eval `setvars "$(date -Rud @$versiondate)" cdate _nogit`
-excmd()
-{
- [ -f "${script_path}" ] || $err "Bad command. Check $projectname docs."
- shift 1; "$script_path" $@ || $err "excmd: ${script_path} ${@}"
+ git init || return 1
+ git add -A . || return 1
+ git commit -m "$projectname $version" --date "$cdate" \
+ --author="xbmk <xbmk@example.com>" || return 1
+ git tag -a "$version" -m "$projectname $version" || return 1
}
mkrelease()
{
- export LBMK_RELEASE="y"
+ export XBMK_RELEASE="y"
vdir="release"
while getopts d:m: option; do
- [ -z "${OPTARG}" ] && $err "Empty argument not allowed"
- case "${option}" in
- d) vdir="${OPTARG}" ;;
- m) mode="${OPTARG}" ;;
- *) $err "Invalid option" ;;
+ [ -z "$OPTARG" ] && $err "empty argument not allowed"
+ case "$option" in
+ d) vdir="$OPTARG" ;;
+ m) mode="$OPTARG" ;;
+ *) $err "invalid option '-$option'" ;;
esac
done
- vdir="${vdir}/${version}"
+ vdir="$vdir/$version"
src_dirname="${relname}_src"
- srcdir="${vdir}/${src_dirname}"
+ srcdir="$vdir/$src_dirname"
- [ -e "${vdir}" ] && $err "already exists: \"${vdir}\""
- mkdir -p "${vdir}" || $err "mkvdir: !mkdir -p \"${vdir}\""
- git clone . "${srcdir}" || $err "mkdir: !gitclone \"${srcdir}\""
+ [ -e "$vdir" ] && $err "already exists: \"$vdir\""
+ mkdir -p "$vdir" || $err "mkvdir: !mkdir -p \"$vdir\""
+ git clone . "$srcdir" || $err "mkdir: !gitclone \"$srcdir\""
+ touch "$srcdir/lock" || $err "can't make lock file in $srcdir/"
build_release
- printf "\n\nDONE! Check release files under %s\n" "${vdir}"
+ printf "\n\nDONE! Check release files under %s\n" "$vdir"
}
build_release()
{
- _xm="build_release ${vdir}"
(
- cd "${srcdir}" || $err "${_xm}: !cd \"${srcdir}\""
- fetch_trees
+ cd "$srcdir" || $err "$vdir: !cd \"$srcdir\""
+ ./mk -f; x_ rm -Rf tmp; rmgit .
x_ mv src/docs docs
) || $err "can't create release files"
git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \
- --abbrev-commit > "${srcdir}/CHANGELOG" || \
- $err "build_release $srcdir: couldn't generate changelog"
+ --abbrev-commit > "$srcdir/CHANGELOG" || $err "!gitlog $srcdir"
+ rm -f "$srcdir/lock" || $err "can't remove lock file in $srcdir"
(
- cd "${srcdir%/*}" || $err "${_xm}: mktarball \"${srcdir}\""
- mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || \
- $err "$_xm: mksrc"
+ cd "${srcdir%/*}" || $err "$vdir: mktarball \"$srcdir\""
+ mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || $err "$vdir: mksrc"
) || $err "can't create src tarball"
- [ "${mode}" = "src" ] && return 0
+ [ "$mode" = "src" ] && return 0
+ touch "$srcdir/lock" || $err "can't make lock file in $srcdir/"
(
- cd "${srcdir}" || $err "${_xm}: 2 !cd \"${srcdir}\""
- ./build roms all || $err "${_xm}: roms-all"
- ./build roms serprog rp2040 || $err "${_xm}: rp2040"
- ./build roms serprog stm32 || $err "${_xm}: stm32"
+ cd "$srcdir" || $err "$vdir: 2 !cd \"$srcdir\""
+ mk -b coreboot pico-serprog stm32-vserprog pcsx-redux
x_ mv bin ../roms
) || $err "can't build rom images"
- rm -Rf "${srcdir}" || $err "!rm -Rf ${srcdir}"
-}
-
-fetch_trees()
-{
- for x in $(items config/git); do
- ./update trees -f "$x" || $err "$_xm: fetch $x"
- done
-
- for x in config/*/build.list; do
- [ -f "$x" ] && xp="${x#*/}" && xp="${xp%/*}"
- [ ! -f "$x" ] || [ -L "$xp" ] || x_ rm -Rf "src/$xp/$xp"
- done
-
- find . -name ".git" -exec rm -Rf {} + || $err "$_xm: rm .git"
- find . -name ".gitmodules" -exec rm -Rf {} + || $err "$_xm: rm .gitmod"
- rm -Rf tmp .git src/u-boot/*/test/lib/strlcat.c || $err "$_xm !rm"
-}
-
-lbmk_exit()
-{
- tmp_cleanup || err_ "lbmk_exit: can't rm tmpdir upon exit $1: $tmpdir"
- exit $1
+ rm -Rf "$srcdir" || $err "!rm -Rf $srcdir"
}
fail()
{
- tmp_cleanup || printf "WARNING: can't rm tmpdir: %s\n" "$tmpdir" 1>&2
+ tmp_cleanup || printf "WARNING: can't rm tmpfiles: %s\n" "$TMPDIR" 1>&2
err_ "${1}"
}
tmp_cleanup()
{
- [ "${tmpdir_was_set}" = "n" ] || return 0
- rm -Rf "${tmpdir}" || return 1
+ [ "$xbmk_parent" = "y" ] || return 0
+ [ "$TMPDIR" = "/tmp" ] || rm -Rf "$TMPDIR" || return 1
+ rm -f lock || return 1
}
main $@
+tmp_cleanup || err_ "can't rm TMPDIR upon non-zero exit: $TMPDIR"
diff --git a/config/coreboot/build.list b/config/coreboot/build.list
deleted file mode 100644
index f6535149..00000000
--- a/config/coreboot/build.list
+++ /dev/null
@@ -1 +0,0 @@
-build/coreboot.rom
diff --git a/config/coreboot/d510mo/config/libgfxinit_txtmode b/config/coreboot/d510mo/config/libgfxinit_txtmode
index 3ae29835..34c747c2 100644
--- a/config/coreboot/d510mo/config/libgfxinit_txtmode
+++ b/config/coreboot/d510mo/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_INTEL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -123,15 +124,17 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -144,14 +147,13 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_INTEL_ADLRVP_P is not set
# CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_N is not set
# CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_RPL is not set
@@ -159,7 +161,9 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
# CONFIG_BOARD_INTEL_ARCHERCITY_CRB is not set
+# CONFIG_BOARD_INTEL_AVENUECITY_CRB is not set
# CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
+# CONFIG_BOARD_INTEL_BEECHNUTCITY_CRB is not set
# CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
#
@@ -204,13 +208,16 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
CONFIG_PCIEXP_HOTPLUG_BUSES=32
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_1024=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,6 +257,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x80000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -258,7 +266,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +300,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,6 +378,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -457,6 +466,8 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -509,7 +520,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/d510mo/target.cfg b/config/coreboot/d510mo/target.cfg
index 65330b75..bb79aee5 100644
--- a/config/coreboot/d510mo/target.cfg
+++ b/config/coreboot/d510mo/target.cfg
@@ -1,7 +1,6 @@
tree="default"
xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
payload_seabios="y"
payload_memtest="y"
release="n"
+build_depend="seabios/default memtest86plus"
diff --git a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
index d2ec2b67..85f39cd7 100644
--- a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_INTEL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -123,15 +124,17 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -144,14 +147,13 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_INTEL_ADLRVP_P is not set
# CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_N is not set
# CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_RPL is not set
@@ -159,7 +161,9 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
# CONFIG_BOARD_INTEL_ARCHERCITY_CRB is not set
+# CONFIG_BOARD_INTEL_AVENUECITY_CRB is not set
# CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
+# CONFIG_BOARD_INTEL_BEECHNUTCITY_CRB is not set
# CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
#
@@ -204,13 +208,16 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
CONFIG_PCIEXP_HOTPLUG_BUSES=32
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_1024=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,6 +257,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x80000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -258,7 +266,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +300,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,6 +378,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -457,6 +466,8 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -509,7 +520,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/d510mo_16mb/target.cfg b/config/coreboot/d510mo_16mb/target.cfg
index ef75af4a..62768ec7 100644
--- a/config/coreboot/d510mo_16mb/target.cfg
+++ b/config/coreboot/d510mo_16mb/target.cfg
@@ -1,6 +1,6 @@
tree="default"
xarch="i386-elf"
payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
payload_memtest="y"
release="n"
diff --git a/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode b/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode
index 6d2bcb8f..d019ca59 100644
--- a/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode
+++ b/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_INTEL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -124,15 +125,17 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_IRQ_SLOT_COUNT=18
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -145,14 +148,13 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_INTEL_ADLRVP_P is not set
# CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_N is not set
# CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_RPL is not set
@@ -160,7 +162,9 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
# CONFIG_BOARD_INTEL_ARCHERCITY_CRB is not set
+# CONFIG_BOARD_INTEL_AVENUECITY_CRB is not set
# CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
+# CONFIG_BOARD_INTEL_BEECHNUTCITY_CRB is not set
# CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
#
@@ -202,14 +206,17 @@ CONFIG_BOARD_INTEL_D945GCLF=y
# CONFIG_BOARD_INTEL_WTM2 is not set
# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_512=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
CONFIG_COREBOOT_ROMSIZE_KB_512=y
@@ -249,6 +256,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -257,7 +265,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -292,6 +299,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -369,6 +377,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -451,6 +460,8 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -503,7 +514,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/d945gclf_512kb/target.cfg b/config/coreboot/d945gclf_512kb/target.cfg
index 5843b4e7..d2d78f7a 100644
--- a/config/coreboot/d945gclf_512kb/target.cfg
+++ b/config/coreboot/d945gclf_512kb/target.cfg
@@ -1,7 +1,5 @@
tree="default"
xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
payload_seabios="y"
-payload_memtest="n"
release="n"
+build_depend="seabios/default"
diff --git a/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode b/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
index 1c7566ec..e3aa695c 100644
--- a/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_INTEL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -124,15 +125,17 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_IRQ_SLOT_COUNT=18
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -145,14 +148,13 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_INTEL_ADLRVP_P is not set
# CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M is not set
-# CONFIG_BOARD_INTEL_ADLRVP_M_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_N is not set
# CONFIG_BOARD_INTEL_ADLRVP_N_EXT_EC is not set
# CONFIG_BOARD_INTEL_ADLRVP_RPL is not set
@@ -160,7 +162,9 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP1 is not set
# CONFIG_BOARD_INTEL_APOLLOLAKE_RVP2 is not set
# CONFIG_BOARD_INTEL_ARCHERCITY_CRB is not set
+# CONFIG_BOARD_INTEL_AVENUECITY_CRB is not set
# CONFIG_BOARD_INTEL_BASKING_RIDGE is not set
+# CONFIG_BOARD_INTEL_BEECHNUTCITY_CRB is not set
# CONFIG_BOARD_INTEL_CEDARISLAND_CRB is not set
#
@@ -202,14 +206,17 @@ CONFIG_BOARD_INTEL_D945GCLF=y
# CONFIG_BOARD_INTEL_WTM2 is not set
# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF"
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_512=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -249,6 +256,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -257,7 +265,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -292,6 +299,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -369,6 +377,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -451,6 +460,8 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -503,7 +514,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/d945gclf_8mb/target.cfg b/config/coreboot/d945gclf_8mb/target.cfg
index 5843b4e7..0d97499e 100644
--- a/config/coreboot/d945gclf_8mb/target.cfg
+++ b/config/coreboot/d945gclf_8mb/target.cfg
@@ -1,7 +1,6 @@
tree="default"
xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
payload_seabios="y"
-payload_memtest="n"
+payload_grub="y"
release="n"
+build_depend="seabios/default grub/default"
diff --git a/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch b/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
index d2bae2e4..1876db23 100644
--- a/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
+++ b/config/coreboot/default/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
@@ -1,7 +1,7 @@
-From 1195c954a3b6822e5e843067251c0c80c9520eab Mon Sep 17 00:00:00 2001
+From e8eb37e87abfdf6d2bcf60cb15d35650fcfa6665 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@retroboot.org>
Date: Fri, 19 Mar 2021 05:54:58 +0000
-Subject: [PATCH 01/30] apple/macbook21: Set default VRAM to 64MiB instead of
+Subject: [PATCH 01/65] apple/macbook21: Set default VRAM to 64MiB instead of
8MiB
---
@@ -9,15 +9,15 @@ Subject: [PATCH 01/30] apple/macbook21: Set default VRAM to 64MiB instead of
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/apple/macbook21/cmos.default b/src/mainboard/apple/macbook21/cmos.default
-index cf1bc4566e..dc0df3b6d6 100644
+index b744b11cda..9749e26547 100644
--- a/src/mainboard/apple/macbook21/cmos.default
+++ b/src/mainboard/apple/macbook21/cmos.default
-@@ -5,4 +5,4 @@ boot_devices=''
+@@ -7,4 +7,4 @@ boot_devices=''
boot_default=0x40
cmos_defaults_loaded=Yes
lpt=Enable
-gfx_uma_size=8M
+gfx_uma_size=64M
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch b/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
index 8cd272ec..b4ffe7fc 100644
--- a/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
+++ b/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
@@ -1,7 +1,7 @@
-From 50a52cea2b43e6e407b456c082e908c7d29e090b Mon Sep 17 00:00:00 2001
+From 2533ed49003c470a8dbfbf17f6c6a5ef0672c2e2 Mon Sep 17 00:00:00 2001
From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
Date: Wed, 27 Oct 2021 13:36:01 +0200
-Subject: [PATCH 02/30] add c3 and clockgen to apple/macbook21
+Subject: [PATCH 02/65] add c3 and clockgen to apple/macbook21
---
src/mainboard/apple/macbook21/Kconfig | 1 +
@@ -10,10 +10,10 @@ Subject: [PATCH 02/30] add c3 and clockgen to apple/macbook21
3 files changed, 20 insertions(+)
diff --git a/src/mainboard/apple/macbook21/Kconfig b/src/mainboard/apple/macbook21/Kconfig
-index 5f5ffde588..27377b737c 100644
+index 330d8efae2..cf10343554 100644
--- a/src/mainboard/apple/macbook21/Kconfig
+++ b/src/mainboard/apple/macbook21/Kconfig
-@@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
+@@ -18,6 +18,7 @@ config BOARD_SPECIFIC_OPTIONS
select HAVE_ACPI_TABLES
select HAVE_ACPI_RESUME
select I945_LVDS
@@ -64,5 +64,5 @@ index fd86e939b9..263fbabcd1 100644
end
end
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch b/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
index 34e12a6b..db064a9d 100644
--- a/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
+++ b/config/coreboot/default/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
@@ -1,7 +1,7 @@
-From ca4cd66f411247395a323e5ea1abf09e83057827 Mon Sep 17 00:00:00 2001
+From 14920409e51a9a0997d488b166d90bfad56f61f1 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@osboot.org>
Date: Sun, 3 Jan 2021 03:34:01 +0000
-Subject: [PATCH 03/30] lenovo/x60: 64MiB Video RAM changed to default
+Subject: [PATCH 03/65] lenovo/x60: 64MiB Video RAM changed to default
(previously it was 8MiB)
---
@@ -9,15 +9,15 @@ Subject: [PATCH 03/30] lenovo/x60: 64MiB Video RAM changed to default
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/lenovo/x60/cmos.default b/src/mainboard/lenovo/x60/cmos.default
-index 5c3576d1f3..88170a1aab 100644
+index 58825c8a36..8e0aaf427d 100644
--- a/src/mainboard/lenovo/x60/cmos.default
+++ b/src/mainboard/lenovo/x60/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
+@@ -17,4 +17,4 @@ trackpoint=Enable
sticky_fn=Disable
power_management_beeps=Enable
low_battery_beep=Enable
-gfx_uma_size=8M
+gfx_uma_size=64M
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch b/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
index ee90dd63..738d486e 100644
--- a/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
+++ b/config/coreboot/default/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
@@ -1,22 +1,22 @@
-From eca0f4a3a4d6907e92b948547a362ca0ac3fc382 Mon Sep 17 00:00:00 2001
+From 92b009babd1e4a63dd34638924b9559727713369 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@osboot.org>
Date: Mon, 22 Feb 2021 22:16:59 +0000
-Subject: [PATCH 04/30] lenovo/t60: make 64MiB VRAM the default in cmos.default
+Subject: [PATCH 04/65] lenovo/t60: make 64MiB VRAM the default in cmos.default
---
src/mainboard/lenovo/t60/cmos.default | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/lenovo/t60/cmos.default b/src/mainboard/lenovo/t60/cmos.default
-index af865f16da..7f03157df7 100644
+index 283a5747ee..91f6c0e6e2 100644
--- a/src/mainboard/lenovo/t60/cmos.default
+++ b/src/mainboard/lenovo/t60/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
+@@ -17,4 +17,4 @@ trackpoint=Enable
sticky_fn=Disable
power_management_beeps=Enable
low_battery_beep=Enable
-gfx_uma_size=8M
+gfx_uma_size=64M
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch b/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch
index 35d74c75..439679e2 100644
--- a/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch
+++ b/config/coreboot/default/patches/0005-lenovo-t400-set-VRAM-to-256MiB-VRAM-by-default.patch
@@ -1,7 +1,7 @@
-From 2eae87815675aebd472b6042777fe51279be4550 Mon Sep 17 00:00:00 2001
+From c7ad2407a7f515d487332382bb55025873c3d987 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 May 2021 13:10:33 +0100
-Subject: [PATCH 05/30] lenovo/t400: set VRAM to 256MiB VRAM by default
+Subject: [PATCH 05/65] lenovo/t400: set VRAM to 256MiB VRAM by default
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
@@ -9,15 +9,15 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/lenovo/t400/cmos.default b/src/mainboard/lenovo/t400/cmos.default
-index a326e315b1..b907a3e2df 100644
+index a16d386dd1..e7bb32306c 100644
--- a/src/mainboard/lenovo/t400/cmos.default
+++ b/src/mainboard/lenovo/t400/cmos.default
-@@ -13,4 +13,4 @@ power_management_beeps=Enable
+@@ -15,4 +15,4 @@ power_management_beeps=Enable
low_battery_beep=Enable
sata_mode=AHCI
hybrid_graphics_mode=Integrated Only
-gfx_uma_size=32M
+gfx_uma_size=256M
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch b/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch
index cc6abb00..477c1724 100644
--- a/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch
+++ b/config/coreboot/default/patches/0006-lenovo-x200-set-VRAM-to-256MiB-by-default.patch
@@ -1,7 +1,7 @@
-From f6b4913a5eca619b745d5ccea9af022a54fb185b Mon Sep 17 00:00:00 2001
+From 79f686dae47d2ef934b5c95979195f9d3c1978e6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 May 2021 13:11:59 +0100
-Subject: [PATCH 06/30] lenovo/x200: set VRAM to 256MiB by default
+Subject: [PATCH 06/65] lenovo/x200: set VRAM to 256MiB by default
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
@@ -9,15 +9,15 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/lenovo/x200/cmos.default b/src/mainboard/lenovo/x200/cmos.default
-index bb4323836e..458b3f19c5 100644
+index 434af5d227..443ef54e41 100644
--- a/src/mainboard/lenovo/x200/cmos.default
+++ b/src/mainboard/lenovo/x200/cmos.default
-@@ -12,4 +12,4 @@ sticky_fn=Disable
+@@ -14,4 +14,4 @@ sticky_fn=Disable
power_management_beeps=Enable
low_battery_beep=Enable
sata_mode=AHCI
-gfx_uma_size=32M
+gfx_uma_size=256M
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch b/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch
index c4840ecc..e435726d 100644
--- a/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch
+++ b/config/coreboot/default/patches/0007-gigabyte-ga-g41m-es2l-set-VRAM-to-256MiB-by-default.patch
@@ -1,7 +1,7 @@
-From a3a0969075163be413f968b03671aa5d8662672a Mon Sep 17 00:00:00 2001
+From a79498ab8a7eac809d99db2fad5b0f8c63870e43 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 May 2021 13:18:26 +0100
-Subject: [PATCH 07/30] gigabyte/ga-g41m-es2l: set VRAM to 256MiB by default
+Subject: [PATCH 07/65] gigabyte/ga-g41m-es2l: set VRAM to 256MiB by default
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
@@ -9,15 +9,15 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default b/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
-index 8372032119..bedad54d2a 100644
+index fe79c83570..4a1f97a9d8 100644
--- a/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
+++ b/src/mainboard/gigabyte/ga-g41m-es2l/cmos.default
-@@ -2,4 +2,4 @@ boot_option=Fallback
+@@ -4,4 +4,4 @@ boot_option=Fallback
debug_level=Debug
power_on_after_fail=Enable
nmi=Enable
-gfx_uma_size=64M
+gfx_uma_size=256M
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch b/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch
index 19977870..9aa1b1cb 100644
--- a/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch
+++ b/config/coreboot/default/patches/0008-acer-g43t-am3-set-VRAM-to-256MiB-by-default.patch
@@ -1,7 +1,7 @@
-From 223ac17617b3a0c08925abbbe42d0d003e144a28 Mon Sep 17 00:00:00 2001
+From 5fbdbb11b215e3aa4256dfaa468224fd0c2a1fb0 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Fri, 14 May 2021 13:21:39 +0100
-Subject: [PATCH 08/30] acer/g43t-am3: set VRAM to 256MiB by default
+Subject: [PATCH 08/65] acer/g43t-am3: set VRAM to 256MiB by default
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
@@ -9,15 +9,15 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/acer/g43t-am3/cmos.default b/src/mainboard/acer/g43t-am3/cmos.default
-index 706f5dd551..e8b45ea22c 100644
+index 23f0e55f3e..8d6c4db1ce 100644
--- a/src/mainboard/acer/g43t-am3/cmos.default
+++ b/src/mainboard/acer/g43t-am3/cmos.default
-@@ -3,4 +3,4 @@ debug_level=Debug
+@@ -5,4 +5,4 @@ debug_level=Debug
power_on_after_fail=Disable
nmi=Enable
sata_mode=AHCI
-gfx_uma_size=64M
+gfx_uma_size=256M
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch b/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch
index 332b870e..7dead180 100644
--- a/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch
+++ b/config/coreboot/default/patches/0009-lenovo-t400-Enable-all-SATA-ports.patch
@@ -1,7 +1,7 @@
-From 80ebbfef42454ea0911e5fc3858103d905987ed8 Mon Sep 17 00:00:00 2001
+From 15003992f57b62ce59dc282cd089987306126cc9 Mon Sep 17 00:00:00 2001
From: persmule <persmule@gmail.com>
Date: Sun, 31 Oct 2021 23:33:26 +0000
-Subject: [PATCH 09/30] lenovo/t400: Enable all SATA ports
+Subject: [PATCH 09/65] lenovo/t400: Enable all SATA ports
There are 2 SATA ports on the chassis of t400(s), but at least one dock for
t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its
@@ -30,5 +30,5 @@ index 259c3e1b21..3d007533a4 100644
register "sata_traffic_monitor" = "0"
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch b/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch
index 12917ed8..e5cac363 100644
--- a/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch
+++ b/config/coreboot/default/patches/0010-coreboot-Add-Lenovo-X230-patch-gfx_uma_size-224M-by-.patch
@@ -1,7 +1,7 @@
-From 318a97c284f8d5030100476a32516ddc9e51603d Mon Sep 17 00:00:00 2001
+From f8ea06883762c906a7f3ad7d286b628bca3443ab Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 20 Dec 2021 01:29:31 +0000
-Subject: [PATCH 10/30] coreboot: Add Lenovo X230 patch: gfx_uma_size 224M by
+Subject: [PATCH 10/65] coreboot: Add Lenovo X230 patch: gfx_uma_size 224M by
default
---
@@ -9,14 +9,14 @@ Subject: [PATCH 10/30] coreboot: Add Lenovo X230 patch: gfx_uma_size 224M by
1 file changed, 1 insertion(+)
diff --git a/src/mainboard/lenovo/x230/cmos.default b/src/mainboard/lenovo/x230/cmos.default
-index 7314066c2b..2e315d4521 100644
+index 732e214b32..3bb78960b9 100644
--- a/src/mainboard/lenovo/x230/cmos.default
+++ b/src/mainboard/lenovo/x230/cmos.default
-@@ -16,3 +16,4 @@ backlight=Both
+@@ -18,3 +18,4 @@ backlight=Both
usb_always_on=Disable
f1_to_f12_as_primary=Enable
me_state=Normal
+gfx_uma_size=224M
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch b/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
index dc3a33ca..375c14fc 100644
--- a/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
+++ b/config/coreboot/default/patches/0011-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch
@@ -1,7 +1,7 @@
-From 47afbe8b94edd1ff58c1daf0bda020e6afac35f4 Mon Sep 17 00:00:00 2001
+From 47483865af46a3d1f8732d1bd97f4a7155cc24d6 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 3 Jan 2022 19:06:22 +0000
-Subject: [PATCH 11/30] lenovo/x230: set me_state=Disabled in cmos.default
+Subject: [PATCH 11/65] lenovo/x230: set me_state=Disabled in cmos.default
I only recently found out about this. It's possible to use me_cleaner to
do the same thing, but some people might just flash coreboot and not do
@@ -23,10 +23,10 @@ Date: Thu Nov 21 21:47:31 2019 +0300
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/lenovo/x230/cmos.default b/src/mainboard/lenovo/x230/cmos.default
-index 2e315d4521..3585cbd58b 100644
+index 3bb78960b9..ae47202aac 100644
--- a/src/mainboard/lenovo/x230/cmos.default
+++ b/src/mainboard/lenovo/x230/cmos.default
-@@ -15,5 +15,5 @@ trackpoint=Enable
+@@ -17,5 +17,5 @@ trackpoint=Enable
backlight=Both
usb_always_on=Disable
f1_to_f12_as_primary=Enable
@@ -34,5 +34,5 @@ index 2e315d4521..3585cbd58b 100644
+me_state=Disabled
gfx_uma_size=224M
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch b/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch
index 49f4db9b..28a4a6a4 100644
--- a/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch
+++ b/config/coreboot/default/patches/0012-set-me_state-Disabled-on-all-cmos.default-files.patch
@@ -1,7 +1,7 @@
-From 531ef34ece796f38cb8a13a54856e46e79842e29 Mon Sep 17 00:00:00 2001
+From 84f7622ea0c3a78742f129d2ec9f437e6c424839 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 2 Mar 2022 21:50:01 +0000
-Subject: [PATCH 12/30] set me_state=Disabled on all cmos.default files!
+Subject: [PATCH 12/65] set me_state=Disabled on all cmos.default files!
yeah. why the hell isn't this the default
@@ -20,103 +20,105 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
10 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/src/mainboard/lenovo/l520/cmos.default b/src/mainboard/lenovo/l520/cmos.default
-index 681c40e78b..57cdcf9162 100644
+index be08e0a342..b8970efa46 100644
--- a/src/mainboard/lenovo/l520/cmos.default
+++ b/src/mainboard/lenovo/l520/cmos.default
-@@ -14,4 +14,4 @@ sticky_fn=Disable
+@@ -16,4 +16,4 @@ sticky_fn=Disable
trackpoint=Enable
backlight=Both
usb_always_on=Disable
-me_state=Normal
+me_state=Disabled
diff --git a/src/mainboard/lenovo/t420/cmos.default b/src/mainboard/lenovo/t420/cmos.default
-index 8244071b8a..c011867916 100644
+index 6fd26c5fe3..27a62d07b3 100644
--- a/src/mainboard/lenovo/t420/cmos.default
+++ b/src/mainboard/lenovo/t420/cmos.default
-@@ -14,4 +14,4 @@ sticky_fn=Disable
+@@ -16,4 +16,4 @@ sticky_fn=Disable
trackpoint=Enable
hybrid_graphics_mode=Integrated Only
usb_always_on=Disable
-me_state=Normal
+me_state=Disabled
diff --git a/src/mainboard/lenovo/t420s/cmos.default b/src/mainboard/lenovo/t420s/cmos.default
-index 8244071b8a..c011867916 100644
+index 6fd26c5fe3..27a62d07b3 100644
--- a/src/mainboard/lenovo/t420s/cmos.default
+++ b/src/mainboard/lenovo/t420s/cmos.default
-@@ -14,4 +14,4 @@ sticky_fn=Disable
+@@ -16,4 +16,4 @@ sticky_fn=Disable
trackpoint=Enable
hybrid_graphics_mode=Integrated Only
usb_always_on=Disable
-me_state=Normal
+me_state=Disabled
diff --git a/src/mainboard/lenovo/t430/cmos.default b/src/mainboard/lenovo/t430/cmos.default
-index 26795fe5cf..55e1e6c04e 100644
+index c896eadec1..6d1e172056 100644
--- a/src/mainboard/lenovo/t430/cmos.default
+++ b/src/mainboard/lenovo/t430/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
+@@ -17,4 +17,4 @@ trackpoint=Enable
backlight=Both
usb_always_on=Disable
hybrid_graphics_mode=Integrated Only
-me_state=Normal
+me_state=Disabled
diff --git a/src/mainboard/lenovo/t430s/cmos.default b/src/mainboard/lenovo/t430s/cmos.default
-index 52dbf70377..b16800ca9e 100644
+index 286fb0ae8c..5a05c73721 100644
--- a/src/mainboard/lenovo/t430s/cmos.default
+++ b/src/mainboard/lenovo/t430s/cmos.default
-@@ -16,4 +16,4 @@ backlight=Both
+@@ -18,4 +18,4 @@ backlight=Both
enable_dual_graphics=Disable
usb_always_on=Disable
f1_to_f12_as_primary=Enable
-me_state=Normal
+me_state=Disabled
diff --git a/src/mainboard/lenovo/t520/cmos.default b/src/mainboard/lenovo/t520/cmos.default
-index cf79b391e2..b66f7034dc 100644
+index 4857f92f67..ab1be1a678 100644
--- a/src/mainboard/lenovo/t520/cmos.default
+++ b/src/mainboard/lenovo/t520/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
+@@ -17,4 +17,4 @@ trackpoint=Enable
backlight=Both
hybrid_graphics_mode=Integrated Only
usb_always_on=Disable
-me_state=Normal
+me_state=Disabled
diff --git a/src/mainboard/lenovo/t530/cmos.default b/src/mainboard/lenovo/t530/cmos.default
-index cf79b391e2..b66f7034dc 100644
+index 4857f92f67..ab1be1a678 100644
--- a/src/mainboard/lenovo/t530/cmos.default
+++ b/src/mainboard/lenovo/t530/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
+@@ -17,4 +17,4 @@ trackpoint=Enable
backlight=Both
hybrid_graphics_mode=Integrated Only
usb_always_on=Disable
-me_state=Normal
+me_state=Disabled
diff --git a/src/mainboard/lenovo/x220/cmos.default b/src/mainboard/lenovo/x220/cmos.default
-index 6d1d57a795..52f303dfdb 100644
+index ef706c1303..b318ab9772 100644
--- a/src/mainboard/lenovo/x220/cmos.default
+++ b/src/mainboard/lenovo/x220/cmos.default
-@@ -13,4 +13,4 @@ usb_always_on=Disable
+@@ -15,4 +15,4 @@ usb_always_on=Disable
fn_ctrl_swap=Disable
sticky_fn=Disable
trackpoint=Enable
-me_state=Normal
+me_state=Disabled
diff --git a/src/mainboard/protectli/vault_cml/cmos.default b/src/mainboard/protectli/vault_cml/cmos.default
-index 62715bc6ba..129b5fd121 100644
+index d61046df6b..8c793fd1c3 100644
--- a/src/mainboard/protectli/vault_cml/cmos.default
+++ b/src/mainboard/protectli/vault_cml/cmos.default
-@@ -1,3 +1,3 @@
+@@ -2,4 +2,4 @@
+
boot_option=Fallback
debug_level=Debug
-me_state=Enable
+me_state=Disabled
diff --git a/src/mainboard/system76/tgl-u/cmos.default b/src/mainboard/system76/tgl-u/cmos.default
-index 62715bc6ba..129b5fd121 100644
+index d61046df6b..8c793fd1c3 100644
--- a/src/mainboard/system76/tgl-u/cmos.default
+++ b/src/mainboard/system76/tgl-u/cmos.default
-@@ -1,3 +1,3 @@
+@@ -2,4 +2,4 @@
+
boot_option=Fallback
debug_level=Debug
-me_state=Enable
+me_state=Disabled
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/haswell/patches/0020-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/default/patches/0013-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
index 60490608..a39d14bd 100644
--- a/config/coreboot/haswell/patches/0020-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ b/config/coreboot/default/patches/0013-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -1,7 +1,7 @@
-From 1a4f454e05b613cb080cdd063dd3efb1fdbb748b Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
+From 851aa297808a4776634df5817cae54c226b4d750 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 20/20] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 13/65] util/ifdtool: add --nuke flag (all 0xFF on region)
When this option is used, the region's contents are overwritten
with all ones (0xFF).
@@ -16,14 +16,14 @@ Rebased since the last revision update in lbmk.
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
- util/ifdtool/ifdtool.c | 113 ++++++++++++++++++++++++++++++-----------
- 1 file changed, 82 insertions(+), 31 deletions(-)
+ util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
+ 1 file changed, 83 insertions(+), 31 deletions(-)
diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index 516570e0a3..1638e1710e 100644
+index 32b2081d93..1473cf058b 100644
--- a/util/ifdtool/ifdtool.c
+++ b/util/ifdtool/ifdtool.c
-@@ -2143,6 +2143,7 @@ static void print_usage(const char *name)
+@@ -2204,6 +2204,7 @@ static void print_usage(const char *name)
" tgl - Tiger Lake\n"
" wbg - Wellsburg\n"
" -S | --setpchstrap Write a PCH strap\n"
@@ -31,7 +31,7 @@ index 516570e0a3..1638e1710e 100644
" -V | --newvalue The new value to write into PCH strap specified by -S\n"
" -v | --version: print the version\n"
" -h | --help: print this help\n\n"
-@@ -2151,6 +2152,60 @@ static void print_usage(const char *name)
+@@ -2212,6 +2213,60 @@ static void print_usage(const char *name)
"\n");
}
@@ -92,15 +92,15 @@ index 516570e0a3..1638e1710e 100644
int main(int argc, char *argv[])
{
int opt, option_index = 0;
-@@ -2158,6 +2213,7 @@ int main(int argc, char *argv[])
+@@ -2219,6 +2274,7 @@ int main(int argc, char *argv[])
int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
+ int mode_nuke = 0;
- int mode_gpr0_disable = 0, mode_gpr0_enable = 0;
+ int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
char *region_type_string = NULL, *region_fname = NULL;
const char *layout_fname = NULL;
-@@ -2192,6 +2248,7 @@ int main(int argc, char *argv[])
+@@ -2254,6 +2310,7 @@ int main(int argc, char *argv[])
{"validate", 0, NULL, 't'},
{"setpchstrap", 1, NULL, 'S'},
{"newvalue", 1, NULL, 'V'},
@@ -108,7 +108,7 @@ index 516570e0a3..1638e1710e 100644
{0, 0, 0, 0}
};
-@@ -2241,35 +2298,8 @@ int main(int argc, char *argv[])
+@@ -2303,35 +2360,8 @@ int main(int argc, char *argv[])
region_fname++;
// Descriptor, BIOS, ME, GbE, Platform
// valid type?
@@ -146,7 +146,7 @@ index 516570e0a3..1638e1710e 100644
fprintf(stderr, "No such region type: '%s'\n\n",
region_type_string);
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
-@@ -2441,6 +2471,22 @@ int main(int argc, char *argv[])
+@@ -2508,6 +2538,22 @@ int main(int argc, char *argv[])
case 't':
mode_validate = 1;
break;
@@ -169,26 +169,27 @@ index 516570e0a3..1638e1710e 100644
case 'v':
print_version();
exit(EXIT_SUCCESS);
-@@ -2457,7 +2503,7 @@ int main(int argc, char *argv[])
+@@ -2524,7 +2570,8 @@ int main(int argc, char *argv[])
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
-- (mode_gpr0_disable | mode_gpr0_enable)) > 1) {
-+ (mode_gpr0_disable | mode_gpr0_enable) + mode_nuke) > 1) {
+- (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) > 1) {
++ (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
++ mode_nuke) > 1) {
fprintf(stderr, "You may not specify more than one mode.\n\n");
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
exit(EXIT_FAILURE);
-@@ -2466,7 +2512,8 @@ int main(int argc, char *argv[])
+@@ -2533,7 +2580,8 @@ int main(int argc, char *argv[])
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
mode_locked + mode_unlocked + mode_density + mode_altmedisable +
-- mode_validate + (mode_gpr0_disable | mode_gpr0_enable)) == 0) {
-+ mode_validate + (mode_gpr0_disable | mode_gpr0_enable) +
+- mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) == 0) {
++ mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
+ mode_nuke) == 0) {
fprintf(stderr, "You need to specify a mode.\n\n");
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
exit(EXIT_FAILURE);
-@@ -2576,6 +2623,10 @@ int main(int argc, char *argv[])
+@@ -2646,6 +2694,10 @@ int main(int argc, char *argv[])
write_image(new_filename, image, size);
}
@@ -200,5 +201,5 @@ index 516570e0a3..1638e1710e 100644
struct fpsba *fpsba = find_fpsba(image, size);
struct fmsba *fmsba = find_fmsba(image, size);
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/dell/patches/0002-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch b/config/coreboot/default/patches/0014-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
index b0ac4e67..23677556 100644
--- a/config/coreboot/dell/patches/0002-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
+++ b/config/coreboot/default/patches/0014-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
@@ -1,7 +1,7 @@
-From 362e86f89b3980699e7e794df9b98018397fe2d8 Mon Sep 17 00:00:00 2001
+From a1a4312c9bea5b7fb5170174dbd14f914c11637c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Wed, 1 Dec 2021 02:53:00 +0000
-Subject: [PATCH 2/9] fix speedstep on x200/t400: Revert
+Subject: [PATCH 14/65] fix speedstep on x200/t400: Revert
"cpu/intel/model_1067x: enable PECI"
This reverts commit 70fea013c7ebd6d85a7806748233fcfd76802f5f.
@@ -16,7 +16,7 @@ maintain this revert patch in Libreboot, from now on.
1 file changed, 9 deletions(-)
diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
-index 315e7c36fc..1423fd72bc 100644
+index d051e8915b..30ba2bf0c6 100644
--- a/src/cpu/intel/model_1067x/model_1067x_init.c
+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
@@ -141,8 +141,6 @@ static void configure_emttm_tables(void)
@@ -43,5 +43,5 @@ index 315e7c36fc..1423fd72bc 100644
#define PIC_SENS_CFG 0x1aa
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch b/config/coreboot/default/patches/0015-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
index 4e5f5089..731742d3 100644
--- a/config/coreboot/default/patches/0017-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
+++ b/config/coreboot/default/patches/0015-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
@@ -1,7 +1,7 @@
-From 8a94f38398b8fa554fa4ae53ecb88a372df634fd Mon Sep 17 00:00:00 2001
+From 7e366e5d4d56aade1cb8de8433eb2b02cc9aceef Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 17 Apr 2023 15:49:57 +0100
-Subject: [PATCH 17/30] GM45-type CPUs: don't enable alternative SMRR
+Subject: [PATCH 15/65] GM45-type CPUs: don't enable alternative SMRR
This reverts the changes in coreboot revision:
df7aecd92643d207feaf7fd840f8835097346644
@@ -42,7 +42,7 @@ Pragmatism is a good thing. I recommend it.
5 files changed, 16 insertions(+), 26 deletions(-)
diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
-index 1423fd72bc..d1f98ca43a 100644
+index 30ba2bf0c6..312046901a 100644
--- a/src/cpu/intel/model_1067x/model_1067x_init.c
+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
@@ -8,6 +8,7 @@
@@ -169,5 +169,5 @@ index 535fb8fae7..f7b05facd2 100644
configure_c_states();
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch b/config/coreboot/default/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
deleted file mode 100644
index 279fdad1..00000000
--- a/config/coreboot/default/patches/0016-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From bb83e857a2e7b6ecb7cb476ba65019b14e68dc34 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Wed, 1 Dec 2021 02:53:00 +0000
-Subject: [PATCH 16/30] fix speedstep on x200/t400: Revert
- "cpu/intel/model_1067x: enable PECI"
-
-This reverts commit 70fea013c7ebd6d85a7806748233fcfd76802f5f.
-
-Enabling PECI without microcode updates loaded causes the CPUID feature set
-to become corrupted. And one consequence is broken SpeedStep. At least, that's
-my understanding looking at Intel Errata. This revert is not a fix, because
-upstream is correct (upstream assumes microcode updates). We will simply
-maintain this revert patch in Libreboot, from now on.
----
- src/cpu/intel/model_1067x/model_1067x_init.c | 9 ---------
- 1 file changed, 9 deletions(-)
-
-diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
-index 315e7c36fc..1423fd72bc 100644
---- a/src/cpu/intel/model_1067x/model_1067x_init.c
-+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
-@@ -141,8 +141,6 @@ static void configure_emttm_tables(void)
- wrmsr(MSR_EMTTM_CR_TABLE(5), msr);
- }
-
--#define IA32_PECI_CTL 0x5a0
--
- static void configure_misc(const int eist, const int tm2, const int emttm)
- {
- msr_t msr;
-@@ -185,13 +183,6 @@ static void configure_misc(const int eist, const int tm2, const int emttm)
- msr.lo |= (1 << 20); /* Lock Enhanced SpeedStep Enable */
- wrmsr(IA32_MISC_ENABLE, msr);
- }
--
-- /* Enable PECI
-- WARNING: due to Erratum AW67 described in Intel document #318733
-- the microcode must be updated before this MSR is written to. */
-- msr = rdmsr(IA32_PECI_CTL);
-- msr.lo |= 1;
-- wrmsr(IA32_PECI_CTL, msr);
- }
-
- #define PIC_SENS_CFG 0x1aa
---
-2.39.2
-
diff --git a/config/coreboot/default/patches/0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch b/config/coreboot/default/patches/0016-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
index bfc9231a..040834db 100644
--- a/config/coreboot/default/patches/0018-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
+++ b/config/coreboot/default/patches/0016-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
@@ -1,7 +1,7 @@
-From 2b899f40ce5d728faa7c1da23c3348435b7ac9cb Mon Sep 17 00:00:00 2001
+From b925e95cc9d750c56fdbfbd1838b77339c124139 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Sat, 6 May 2023 15:53:41 -0600
-Subject: [PATCH 18/30] mb/dell/e6400: Enable 01.0 device in devicetree for
+Subject: [PATCH 16/65] mb/dell/e6400: Enable 01.0 device in devicetree for
dGPU models
Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
@@ -24,5 +24,5 @@ index bb954cbd7b..e9f3915d17 100644
device pci 02.1 on end # Display
device pci 03.0 on end # ME
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/haswell/patches/0018-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/default/patches/0017-Remove-warning-for-coreboot-images-built-without-a-p.patch
index 34309242..eb76118f 100644
--- a/config/coreboot/haswell/patches/0018-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ b/config/coreboot/default/patches/0017-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -1,7 +1,7 @@
-From c25dcd8ac80598939edffd011df0fd9ba3d8a1a8 Mon Sep 17 00:00:00 2001
+From f440b426378314bfbc0f397fdd9bd5bd68d81483 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 18/20] Remove warning for coreboot images built without a
+Subject: [PATCH 17/65] Remove warning for coreboot images built without a
payload
I added this in upstream to prevent people from accidentally flashing
@@ -13,10 +13,10 @@ up. This has caused confusion and concern so just patch it out.
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk
-index a2336aa876..4f1692a873 100644
+index 5f988dac1b..516133880f 100644
--- a/payloads/Makefile.mk
+++ b/payloads/Makefile.mk
-@@ -49,16 +49,5 @@ distclean-payloads:
+@@ -50,16 +50,5 @@ distclean-payloads:
print-repo-info-payloads:
-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
@@ -35,5 +35,5 @@ index a2336aa876..4f1692a873 100644
-.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
+.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0018-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch b/config/coreboot/default/patches/0018-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
new file mode 100644
index 00000000..4d8f0c21
--- /dev/null
+++ b/config/coreboot/default/patches/0018-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
@@ -0,0 +1,430 @@
+From e4509a2d3204d8798cc48be37f33e43d07ff5e3b Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Sat, 19 Aug 2023 16:19:10 -0600
+Subject: [PATCH 18/65] mb/dell: Add Latitude E6530 (Ivy Bridge)
+
+Mainboard is QALA0/LA-7761P (UMA). The version with a Nvidia dGPU was
+not tested. I do not physically have this system; someone with physical
+access to one sent me the output of autoport which I then modified to
+produce this port.
+
+I was also sent the vbios obtained using intel_bios_dumper while running
+version A22 of the vendor firmware, which I then processed using
+`intelvbttool --inoprom vbios.bin --outvbt data.vbt` to obtain data.vbt.
+
+This was originally tested and found to be working as a standalone board
+port in Libreboot, though this variant based port in upstream coreboot
+has not been tested.
+
+This can be internally flashed by sending a command to the EC, which
+causes the EC to pull the FDO pin low and the firmware to skip setting
+up any chipset based write protections [1]. The EC is the SMSC MEC5055,
+which seems to be compatible with the existing MEC5035 code.
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Change-Id: I9fcd73416018574f8934962f92c8222d0101cb71
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig | 8 +
+ .../dell/snb_ivb_latitude/Kconfig.name | 3 +
+ .../snb_ivb_latitude/variants/e6530/data.vbt | Bin 0 -> 4280 bytes
+ .../variants/e6530/early_init.c | 14 ++
+ .../snb_ivb_latitude/variants/e6530/gpio.c | 192 ++++++++++++++++++
+ .../variants/e6530/hda_verb.c | 32 +++
+ .../variants/e6530/overridetree.cb | 37 ++++
+ 7 files changed, 286 insertions(+)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index be9ac37845..03377275f0 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -23,6 +23,12 @@ config BOARD_DELL_LATITUDE_E6430
+ select MAINBOARD_USES_IFD_GBE_REGION
+ select SOUTHBRIDGE_INTEL_C216
+
++config BOARD_DELL_LATITUDE_E6530
++ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++ select BOARD_ROMSIZE_KB_12288
++ select MAINBOARD_USES_IFD_GBE_REGION
++ select SOUTHBRIDGE_INTEL_C216
++
+ if BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+
+ config DRAM_RESET_GATE_GPIO
+@@ -33,6 +39,7 @@ config MAINBOARD_DIR
+
+ config MAINBOARD_PART_NUMBER
+ default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
++ default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
+
+ config OVERRIDE_DEVICETREE
+ default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
+@@ -42,6 +49,7 @@ config USBDEBUG_HCD_INDEX
+
+ config VARIANT_DIR
+ default "e6430" if BOARD_DELL_LATITUDE_E6430
++ default "e6530" if BOARD_DELL_LATITUDE_E6530
+
+ config VGA_BIOS_ID
+ default "8086,0166"
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index 183252630a..d89185d670 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -2,3 +2,6 @@
+
+ config BOARD_DELL_LATITUDE_E6430
+ bool "Latitude E6430"
++
++config BOARD_DELL_LATITUDE_E6530
++ bool "Latitude E6530"
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..af64a913d521fe240ce30e114e90fe75d3841bbc
+GIT binary patch
+literal 4280
+zcmdT{U2GiH75-*te`aTAcGqJQY$rA+e`ZbWcy_TDH@NC}cbl$*NjAn^RtPm->J7GV
+zY_m3jN`RN*h9FvG3Do9+qP$c^s1;PLB3@br9>Ag%La5?TLP`-2DDaR65U2_)=g!QU
+zIJ+cPr4+cc-@WIad+wQY&YW{+c1J!nPPgn&^^N3Hy*D37jg0=7CSl@*=mXr>x75gi
+zTMlK0$A=H4Mh~QKqCa92jz_;d3rtFqp(o-4gCnzxrJ2}Rw@^!haWp<ahv&+aDb5_3
+zE0-vq=pkms7Ves!pD#^PA#PF^_wjBTO=oC(ayR{asyKURiBdh3?x76Ll#Z5WXklvl
+z@M5XFK#OxUXqrdzedca+l4WK~_tG8Hv&HgsX`$Za3pnYy`CpW$@0?nsSh|}MrfK#j
+z%y^t^lPNt{p5INwGcz<MWEN<wv`{J^Eluv$Rb2&6%ZgV5Bp(6~Lz2Eoz~@C!!B)bs
+z1x-OrK~}*8L07Po(5+xZL6I<}phTEf5QRsVJYHa{f^AXPFaoSsnJ0feXUdB=CJ>Fv
+zr&_=Q6YubieL}zoiJ0a+c+(bGwFN5g1pz;^rGP1sM+lHB@UAPM2&F=RB&yv@$caXF
+ze~Io&3CQe=cMHr!e{yiokd?~p&F&k`jg99Ex7}WO=$8*Kx8wXv4eSa_CJqKVkyRr&
+zCdcqs*@M5!gD84e@fW{|5B#mDGTH;JFw`h^stQcTjf@V3pNe8&f$=NG?-+klRGea*
+zX1vOHi}4@EM~qJyfuM>e#%9J&Mjzt`j5OnB#;uGZ<1WTMj3vgSj3*esXZY{I`KqUa
+zfbB~~a>piTMAVDNyHR<{<v-=}gXhE(15|emxueb8Kv%5>0{F7}8pool{7_h6u?7yg
+zlyNm>-Eq_&WjW{0$9ZHq6x?~W8l2#1g0CyrtN#R-nbWG(?>iNG1zRiZgj;Lm_%rVe
+zwZ6i{g#sR5xudpbj~5H9TNIQ3gMikIG@l(Z4IR@^2|Vu|LZteLF5@$KH5`Pr&3_vn
+z^!Fn27&z6hSPR+*;D*&lm-)OE=ZgjK*(X&XdBq7RDUd7>|Lou?UMNg6lVCB;TPz{Z
+zN4-~p*Rr=uq8OYdlAy38{}dt5%2}aUax{}zWzDRgmsn2|!)=Bp)U35;Ld3H+Ye=*_
+z4S&0{5*TVI!OU-SWz$XUwrrnb%9?NHau^uhn>&;%&X#8O7mt)SIJr8D$u?NS=rUW6
+zCmnxV&FgUDAWX}gZ+1AH&-C4Q=3sl5RX9=OWPfCtcRZi4tkX44YYfRH*@?H7T=Kz=
+zG*i-wU2jbJMK%ChTMTXZFJEm~k;KCj*D60g=j!2ns8Q`g%jSRK^?=IwL^|I5-K2zH
+z8*A0-mL%Q`R#xatM^u^E=IrX+2&bc;3rv!NipS^G*6zlIRAV(JJDU($OBHuptd&1(
+zoNu>t*Q}|siS8#MYavR6j7&(~AEL#OaV(^+gy>YrSPiLfgy{2-p=xT2Mtd}4R8#XB
+z-LDysYw8J&{-GJKYwEiif07x7u5QsOr5oeA`ZJxDb>p|XdQzvCb>nSaeP1UfY_x~f
+z9bwuRHf|5Ahr{&iu<>+QeI`t=g^e>|^=z1;5o23K?TP5uo%2>aXQWCKr#dH;Qr0*j
+z3LecKKarw5`Xblzd$&H4oP%y&l3egyUc<=<Azs)*u}X^*n$F~s2O<-paSF?q*HB+n
+zqBfj5;J|x@hM`M(QD20jrkwi8`y3l;8qO;#l8A#CMI8Kg9E{ERsT>TGXaGC^5Cz)J
+z4?eb?Kub*nWYdmhV-4?j<o}k#pt-{wK;b3U(B^+`s7-`HYOZOxv<+RG^LulAxKL|9
+z3NH#9{Lg*7U1&gy<zHSG$;LMHby+V=ENlGFVLKjt%kkph7kP1M8|vebT=K5)*E>JW
+zjd{Tu*o*CE*QO)}{_J>haU5zn+1QJ^eBg|d5n5-%|DwS@1+<Mtvat=iZ3BF??pZXh
+zth4PnnWL*s%}k43fbe34>yaZ_2@Kj<UGt)`2G5>K>)nIBR-xB@+1PQ2*c$lV?Z13o
+zbX%CHpm`!1Z4$d28~9k{rfu-0w@xg6{q!u2{)Dm_))4RK$?#7P*t7V+g_9d<V!MD`
+zaj`t-?uy6zsjzp<-IdM6g(XhQX2iF<+p?Kmw6?a+f^VMex*PuetNfqf+4_FpD%8TW
+eZvUbDHC^NLu5~gtzg|!EqSkX2ep9pg!tpEeo1jDh
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c
+new file mode 100644
+index 0000000000..ff83db095b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c
+@@ -0,0 +1,14 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++void bootblock_mainboard_early_init(void)
++{
++ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++ | COMB_LPC_EN | COMA_LPC_EN);
++ mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/gpio.c
+new file mode 100644
+index 0000000000..777570765a
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/gpio.c
+@@ -0,0 +1,192 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++ .gpio0 = GPIO_MODE_GPIO,
++ .gpio1 = GPIO_MODE_GPIO,
++ .gpio2 = GPIO_MODE_GPIO,
++ .gpio3 = GPIO_MODE_GPIO,
++ .gpio4 = GPIO_MODE_GPIO,
++ .gpio5 = GPIO_MODE_NATIVE,
++ .gpio6 = GPIO_MODE_GPIO,
++ .gpio7 = GPIO_MODE_GPIO,
++ .gpio8 = GPIO_MODE_GPIO,
++ .gpio9 = GPIO_MODE_NATIVE,
++ .gpio10 = GPIO_MODE_NATIVE,
++ .gpio11 = GPIO_MODE_NATIVE,
++ .gpio12 = GPIO_MODE_NATIVE,
++ .gpio13 = GPIO_MODE_GPIO,
++ .gpio14 = GPIO_MODE_GPIO,
++ .gpio15 = GPIO_MODE_GPIO,
++ .gpio16 = GPIO_MODE_GPIO,
++ .gpio17 = GPIO_MODE_GPIO,
++ .gpio18 = GPIO_MODE_NATIVE,
++ .gpio19 = GPIO_MODE_GPIO,
++ .gpio20 = GPIO_MODE_NATIVE,
++ .gpio21 = GPIO_MODE_GPIO,
++ .gpio22 = GPIO_MODE_GPIO,
++ .gpio23 = GPIO_MODE_NATIVE,
++ .gpio24 = GPIO_MODE_GPIO,
++ .gpio25 = GPIO_MODE_NATIVE,
++ .gpio26 = GPIO_MODE_NATIVE,
++ .gpio27 = GPIO_MODE_GPIO,
++ .gpio28 = GPIO_MODE_GPIO,
++ .gpio29 = GPIO_MODE_GPIO,
++ .gpio30 = GPIO_MODE_NATIVE,
++ .gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++ .gpio0 = GPIO_DIR_INPUT,
++ .gpio1 = GPIO_DIR_INPUT,
++ .gpio2 = GPIO_DIR_INPUT,
++ .gpio3 = GPIO_DIR_INPUT,
++ .gpio4 = GPIO_DIR_INPUT,
++ .gpio6 = GPIO_DIR_INPUT,
++ .gpio7 = GPIO_DIR_INPUT,
++ .gpio8 = GPIO_DIR_INPUT,
++ .gpio13 = GPIO_DIR_INPUT,
++ .gpio14 = GPIO_DIR_INPUT,
++ .gpio15 = GPIO_DIR_INPUT,
++ .gpio16 = GPIO_DIR_INPUT,
++ .gpio17 = GPIO_DIR_INPUT,
++ .gpio19 = GPIO_DIR_INPUT,
++ .gpio21 = GPIO_DIR_INPUT,
++ .gpio22 = GPIO_DIR_INPUT,
++ .gpio24 = GPIO_DIR_INPUT,
++ .gpio27 = GPIO_DIR_INPUT,
++ .gpio28 = GPIO_DIR_OUTPUT,
++ .gpio29 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++ .gpio28 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++ .gpio30 = GPIO_RESET_RSMRST,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++ .gpio0 = GPIO_INVERT,
++ .gpio8 = GPIO_INVERT,
++ .gpio13 = GPIO_INVERT,
++ .gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++ .gpio32 = GPIO_MODE_NATIVE,
++ .gpio33 = GPIO_MODE_GPIO,
++ .gpio34 = GPIO_MODE_GPIO,
++ .gpio35 = GPIO_MODE_GPIO,
++ .gpio36 = GPIO_MODE_GPIO,
++ .gpio37 = GPIO_MODE_GPIO,
++ .gpio38 = GPIO_MODE_GPIO,
++ .gpio39 = GPIO_MODE_GPIO,
++ .gpio40 = GPIO_MODE_NATIVE,
++ .gpio41 = GPIO_MODE_NATIVE,
++ .gpio42 = GPIO_MODE_NATIVE,
++ .gpio43 = GPIO_MODE_NATIVE,
++ .gpio44 = GPIO_MODE_NATIVE,
++ .gpio45 = GPIO_MODE_GPIO,
++ .gpio46 = GPIO_MODE_NATIVE,
++ .gpio47 = GPIO_MODE_NATIVE,
++ .gpio48 = GPIO_MODE_GPIO,
++ .gpio49 = GPIO_MODE_GPIO,
++ .gpio50 = GPIO_MODE_NATIVE,
++ .gpio51 = GPIO_MODE_GPIO,
++ .gpio52 = GPIO_MODE_GPIO,
++ .gpio53 = GPIO_MODE_NATIVE,
++ .gpio54 = GPIO_MODE_GPIO,
++ .gpio55 = GPIO_MODE_NATIVE,
++ .gpio56 = GPIO_MODE_NATIVE,
++ .gpio57 = GPIO_MODE_GPIO,
++ .gpio58 = GPIO_MODE_NATIVE,
++ .gpio59 = GPIO_MODE_NATIVE,
++ .gpio60 = GPIO_MODE_GPIO,
++ .gpio61 = GPIO_MODE_NATIVE,
++ .gpio62 = GPIO_MODE_NATIVE,
++ .gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++ .gpio33 = GPIO_DIR_INPUT,
++ .gpio34 = GPIO_DIR_OUTPUT,
++ .gpio35 = GPIO_DIR_INPUT,
++ .gpio36 = GPIO_DIR_INPUT,
++ .gpio37 = GPIO_DIR_INPUT,
++ .gpio38 = GPIO_DIR_INPUT,
++ .gpio39 = GPIO_DIR_INPUT,
++ .gpio45 = GPIO_DIR_OUTPUT,
++ .gpio48 = GPIO_DIR_INPUT,
++ .gpio49 = GPIO_DIR_INPUT,
++ .gpio51 = GPIO_DIR_INPUT,
++ .gpio52 = GPIO_DIR_INPUT,
++ .gpio54 = GPIO_DIR_INPUT,
++ .gpio57 = GPIO_DIR_INPUT,
++ .gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++ .gpio34 = GPIO_LEVEL_HIGH,
++ .gpio45 = GPIO_LEVEL_LOW,
++ .gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++ .gpio64 = GPIO_MODE_NATIVE,
++ .gpio65 = GPIO_MODE_NATIVE,
++ .gpio66 = GPIO_MODE_NATIVE,
++ .gpio67 = GPIO_MODE_NATIVE,
++ .gpio68 = GPIO_MODE_GPIO,
++ .gpio69 = GPIO_MODE_GPIO,
++ .gpio70 = GPIO_MODE_GPIO,
++ .gpio71 = GPIO_MODE_GPIO,
++ .gpio72 = GPIO_MODE_NATIVE,
++ .gpio73 = GPIO_MODE_NATIVE,
++ .gpio74 = GPIO_MODE_NATIVE,
++ .gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++ .gpio68 = GPIO_DIR_INPUT,
++ .gpio69 = GPIO_DIR_INPUT,
++ .gpio70 = GPIO_DIR_INPUT,
++ .gpio71 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++ .set1 = {
++ .mode = &pch_gpio_set1_mode,
++ .direction = &pch_gpio_set1_direction,
++ .level = &pch_gpio_set1_level,
++ .blink = &pch_gpio_set1_blink,
++ .invert = &pch_gpio_set1_invert,
++ .reset = &pch_gpio_set1_reset,
++ },
++ .set2 = {
++ .mode = &pch_gpio_set2_mode,
++ .direction = &pch_gpio_set2_direction,
++ .level = &pch_gpio_set2_level,
++ .reset = &pch_gpio_set2_reset,
++ },
++ .set3 = {
++ .mode = &pch_gpio_set3_mode,
++ .direction = &pch_gpio_set3_direction,
++ .level = &pch_gpio_set3_level,
++ .reset = &pch_gpio_set3_reset,
++ },
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c
+new file mode 100644
+index 0000000000..3ebccff81d
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++ 0x111d76df, /* Codec Vendor / Device ID: IDT */
++ 0x10280535, /* Subsystem ID */
++ 11, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(0, 0x10280535),
++ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
++ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
++ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++ AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
++ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++ 0x80862806, /* Codec Vendor / Device ID: Intel */
++ 0x80860101, /* Subsystem ID */
++ 4, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(3, 0x80860101),
++ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/overridetree.cb
+new file mode 100644
+index 0000000000..8b9c82fba4
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/overridetree.cb
+@@ -0,0 +1,37 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++ device domain 0 on
++ subsystemid 0x1028 0x0535 inherit
++
++ device ref igd on
++ register "gpu_cpu_backlight" = "0x00000251"
++ register "gpu_pch_backlight" = "0x13121312"
++ end
++
++ chip southbridge/intel/bd82x6x
++ register "usb_port_config" = "{
++ { 1, 1, 0 },
++ { 1, 1, 0 },
++ { 1, 1, 1 },
++ { 1, 1, 1 },
++ { 1, 1, 2 },
++ { 1, 1, 2 },
++ { 1, 0, 3 },
++ { 1, 1, 3 },
++ { 1, 1, 4 },
++ { 1, 1, 4 },
++ { 1, 1, 5 },
++ { 1, 1, 5 },
++ { 1, 2, 6 },
++ { 1, 2, 6 },
++ }"
++
++ device ref xhci on
++ register "superspeed_capable_ports" = "0x0000000f"
++ register "xhci_overcurrent_mapping" = "0x00000c03"
++ register "xhci_switchable_ports" = "0x0000000f"
++ end
++ end
++ end
++end
+--
+2.39.5
+
diff --git a/config/coreboot/default/patches/0019-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch b/config/coreboot/default/patches/0019-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
new file mode 100644
index 00000000..23eef96f
--- /dev/null
+++ b/config/coreboot/default/patches/0019-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
@@ -0,0 +1,430 @@
+From cfac9aa347e13065c2e24d62091636cc4d0e56be Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Wed, 31 Jan 2024 22:57:07 -0700
+Subject: [PATCH 19/65] mb/dell: Add Latitude E5530 (Ivy Bridge)
+
+Mainboard is QXW10/LA-7902P (UMA). I do not physically have this board;
+someone with physical access to one sent me the output of autoport which
+I then modified to produce this port. I was also sent the VBT binary,
+which was obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running
+version A21 of the vendor firmware.
+
+This was originally tested and found to be working as a standalone board
+port in Libreboot, but this variant based port in upstream coreboot has
+not been tested.
+
+This can be internally flashed by sending a command to the EC, which
+causes the EC to pull the FDO pin low and the firmware to skip setting
+up any chipset based write protections [1]. The EC is the SMSC MEC5055,
+which seems to be compatible with the existing MEC5035 code.
+
+Change-Id: Idaf6618df70aa19d8e60b2263088737712dec5f0
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig | 7 +
+ .../dell/snb_ivb_latitude/Kconfig.name | 3 +
+ .../snb_ivb_latitude/variants/e5530/data.vbt | Bin 0 -> 6144 bytes
+ .../variants/e5530/early_init.c | 14 ++
+ .../snb_ivb_latitude/variants/e5530/gpio.c | 194 ++++++++++++++++++
+ .../variants/e5530/hda_verb.c | 32 +++
+ .../variants/e5530/overridetree.cb | 39 ++++
+ 7 files changed, 289 insertions(+)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index 03377275f0..183a67bec3 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -17,6 +17,11 @@ config BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ select SYSTEM_TYPE_LAPTOP
+ select USE_NATIVE_RAMINIT
+
++config BOARD_DELL_LATITUDE_E5530
++ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++ select BOARD_ROMSIZE_KB_12288
++ select SOUTHBRIDGE_INTEL_C216
++
+ config BOARD_DELL_LATITUDE_E6430
+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ select BOARD_ROMSIZE_KB_12288
+@@ -38,6 +43,7 @@ config MAINBOARD_DIR
+ default "dell/snb_ivb_latitude"
+
+ config MAINBOARD_PART_NUMBER
++ default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
+ default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
+ default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
+
+@@ -48,6 +54,7 @@ config USBDEBUG_HCD_INDEX
+ default 2
+
+ config VARIANT_DIR
++ default "e5530" if BOARD_DELL_LATITUDE_E5530
+ default "e6430" if BOARD_DELL_LATITUDE_E6430
+ default "e6530" if BOARD_DELL_LATITUDE_E6530
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index d89185d670..c15ef4028f 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -1,5 +1,8 @@
+ ## SPDX-License-Identifier: GPL-2.0-only
+
++config BOARD_DELL_LATITUDE_E5530
++ bool "Latitude E5530"
++
+ config BOARD_DELL_LATITUDE_E6430
+ bool "Latitude E6430"
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..3c54b70be7856a6420d001112d7f17f8bab46ed3
+GIT binary patch
+literal 6144
+zcmeHKU2Gdg5dO}0w$JA~+qs02q)iz56C9e5vuQ#oL0l3O+%|395Q2peO{y4(2uX0t
+zuMja1N)bPb1cE+5)fYsCK!89MFQAGChyWpk5PuR<K|G+sLmxmOR4}u5=Rg`mj70g7
+zvgdDic6N4dW^QKhynd)>kS^cR)3#-(r*-?zo-O^C(kLvv8XM<+Y3tdt^YY!P?!oTe
+zJ^ed-x6w0Lh5fN#jsv5TWE#mtd*_yky}9xDK(kOwLt+C7_AQAd#iwr=o0`gvQZ`{x
+z6ZeT`x^^;8+a~jSa^o~PF@8J6N5;o#dhCwebaM;!_oisw1#O9K={qQM<@Oeu$lXeN
+z#wJGcW4Y<2)-A{Bot(NoKX%>qdnw-AOi9bKT9Z~HL5|7PJDHz4kGlEx143q+26EH6
+z{4KfB^9;?<fTOaiNPy%=@LovL&q<^d1Qdi+Xex9SvIM^ZLq%9cP{A1rE>#dw(WfA;
+zBCR3@pCS1a;A|CZW1h7H*l#mW{%y{bf)9ofiz!EHzyiac@{RpMzz>O-<~{hx5tw%b
+z3ZJWD4_g-`iF`tUJb}+Vfe;XI1T2Y4_Y!iVk<<T4ce(^PWKh<?N^a`t+}vgNr25iZ
+z`!fTBL)ojYF5G?3y|eW=`9>MLB9et&!A7LDDE7&5ye#|hn%s#IWgagDEPNHHMUhb-
+ztc9t?uz{bD#kh#kpsE;AO-wWHV?4olPStRPag^~k<737bjBgm<GlC%vRgBe)4U9I%
+zg^XUtcE**A5ylOSn;A2V2N;hso?--U#>t|ufS}_`LGs2bcSKCVBh4s0>G7ZR_@NWx
+zkph}GhP}~YR?roT!61GqzQ?gBsuv3jY}UXbmr|alv^VxUqbz5<`5=!hhpaa*7DK~4
+zP4ad6dhH!>nYpc4{J&G-w{UiWo$zXnTz{tAq0|?c_`QJ7pKmCwIpe7Uix$P?9}v*1
+z(aVR6OkMkQ6oM}*UC@j78!~>7=OZCVYXeu|u0SiI4}w$uw6&0P09LF%Hp}O&IA3gl
+z4@ap0NfAe+q(ZVm{Bwe*Do~kbCc$Q!x7b3Sk9tLgVmsR<Q4H=9Nl;mmf2xpY<*d*-
+z`yI_BR#`La=Oxxt#qgS`3pER^nh^CZ%*qlq2N9@uSAtz-C7AhduB_U|{>#oOrY`tq
+z%|?L!zRd2-$V6^@$H<Mj3MXf#F<J+^8%<X2{tnmQTI*aK*ageBrm9^|<Ked3j_s;%
+zva<(Dob)BOwdcj8Z67UhYUAjbk==Of9W#D7k!DJobLx$$fXD_wuZyD&Kk-$EIY~S`
+zan1ANbFUW8hZ0pUw5)y??*}!;chdgq|0X5;s;m`@YdY{zs4z#z8e;13T6b4tC7gy$
+zTwszEQhk0!U$`3=Qi)ZbY^*|bAyvF>@ml^iaX;uzoVB3JA(|h9tcNKXHdA43N0|18
+z&3$2QE=)(l=6qQDAWT1oO-<KoblR+&{kk@!)1A8ch^`&b>2=+FU)Mg<35IDJ+8Tp;
+z40F)Xt}$rVFdsLxLk7KRn4cKhmj<a3vp%A&kI>eLd38j)HbM_Y%!3i_aD?8An8za8
+z@d(AD=Gv&%5;e{}p%i?_q(T*^IwzEx*Eu1wKHV9=lVUvjqv!B@cWER!2fe%`IqO?q
+z!=Wf4kzGUaLX8`m#*P^uL?%M#6qc9Qu(YT|ZMb#7UzCc_(DkQYEG<G&Q*QkX`CS`I
+z8cwQnl8A#CMH~W79L&{2*Jof_MD5t{bPTAszWUa20yPzD=*wW8)wHSu?avDhffu^!
+zL>Q#%k_O0@^DN5S@MXi$D;acJ>#cTV-(U@Offv4ACp4hO4$Ll!WO)s3P4=t9vpWBC
+zSckhlcD?xUuX=Gx96Dx{IsQ23r&;o1*+^Cp2RA3nd$A-RIHP2Q7uitC>c67FIR*5}
+zB3a%B!?6K=TJ$W+SJv@*9Lms{mTvWmU4Zanj_Z*lSqOGISzYp?yawOqLhVhRt#-E6
+zd)YW~h&meh-5prIE}Cr&7f?MMi&cqTt_^%Fa?>k(=`9jVoIf@}{g+WX#TpWuc+!2v
+zPG^>A|NZ2GlGsKdGqN{7>Fr7+Hc_^3z}uBhC4?nzOQ*!QyVugGjkK_~$bvtfY`h79
+z9rOI3;Mt}9)_G{zXTAPw`8T@6=Ut0r9R5;0#Zy|#8F;v4^UAmqft3iXL|`QXD-l?U
+Jz~2*rUjdP?m;3+#
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c
+new file mode 100644
+index 0000000000..ff83db095b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c
+@@ -0,0 +1,14 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++void bootblock_mainboard_early_init(void)
++{
++ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++ | COMB_LPC_EN | COMA_LPC_EN);
++ mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/gpio.c
+new file mode 100644
+index 0000000000..0599f13921
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/gpio.c
+@@ -0,0 +1,194 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++ .gpio0 = GPIO_MODE_GPIO,
++ .gpio1 = GPIO_MODE_GPIO,
++ .gpio2 = GPIO_MODE_GPIO,
++ .gpio3 = GPIO_MODE_GPIO,
++ .gpio4 = GPIO_MODE_GPIO,
++ .gpio5 = GPIO_MODE_NATIVE,
++ .gpio6 = GPIO_MODE_GPIO,
++ .gpio7 = GPIO_MODE_GPIO,
++ .gpio8 = GPIO_MODE_GPIO,
++ .gpio9 = GPIO_MODE_NATIVE,
++ .gpio10 = GPIO_MODE_NATIVE,
++ .gpio11 = GPIO_MODE_NATIVE,
++ .gpio12 = GPIO_MODE_GPIO,
++ .gpio13 = GPIO_MODE_GPIO,
++ .gpio14 = GPIO_MODE_GPIO,
++ .gpio15 = GPIO_MODE_GPIO,
++ .gpio16 = GPIO_MODE_GPIO,
++ .gpio17 = GPIO_MODE_GPIO,
++ .gpio18 = GPIO_MODE_NATIVE,
++ .gpio19 = GPIO_MODE_GPIO,
++ .gpio20 = GPIO_MODE_NATIVE,
++ .gpio21 = GPIO_MODE_GPIO,
++ .gpio22 = GPIO_MODE_GPIO,
++ .gpio23 = GPIO_MODE_NATIVE,
++ .gpio24 = GPIO_MODE_GPIO,
++ .gpio25 = GPIO_MODE_NATIVE,
++ .gpio26 = GPIO_MODE_NATIVE,
++ .gpio27 = GPIO_MODE_GPIO,
++ .gpio28 = GPIO_MODE_GPIO,
++ .gpio29 = GPIO_MODE_GPIO,
++ .gpio30 = GPIO_MODE_NATIVE,
++ .gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++ .gpio0 = GPIO_DIR_INPUT,
++ .gpio1 = GPIO_DIR_INPUT,
++ .gpio2 = GPIO_DIR_INPUT,
++ .gpio3 = GPIO_DIR_INPUT,
++ .gpio4 = GPIO_DIR_INPUT,
++ .gpio6 = GPIO_DIR_INPUT,
++ .gpio7 = GPIO_DIR_INPUT,
++ .gpio8 = GPIO_DIR_INPUT,
++ .gpio12 = GPIO_DIR_OUTPUT,
++ .gpio13 = GPIO_DIR_INPUT,
++ .gpio14 = GPIO_DIR_INPUT,
++ .gpio15 = GPIO_DIR_INPUT,
++ .gpio16 = GPIO_DIR_INPUT,
++ .gpio17 = GPIO_DIR_INPUT,
++ .gpio19 = GPIO_DIR_INPUT,
++ .gpio21 = GPIO_DIR_INPUT,
++ .gpio22 = GPIO_DIR_INPUT,
++ .gpio24 = GPIO_DIR_INPUT,
++ .gpio27 = GPIO_DIR_INPUT,
++ .gpio28 = GPIO_DIR_OUTPUT,
++ .gpio29 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++ .gpio12 = GPIO_LEVEL_HIGH,
++ .gpio28 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++ .gpio30 = GPIO_RESET_RSMRST,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++ .gpio0 = GPIO_INVERT,
++ .gpio8 = GPIO_INVERT,
++ .gpio13 = GPIO_INVERT,
++ .gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++ .gpio32 = GPIO_MODE_NATIVE,
++ .gpio33 = GPIO_MODE_GPIO,
++ .gpio34 = GPIO_MODE_GPIO,
++ .gpio35 = GPIO_MODE_GPIO,
++ .gpio36 = GPIO_MODE_GPIO,
++ .gpio37 = GPIO_MODE_GPIO,
++ .gpio38 = GPIO_MODE_GPIO,
++ .gpio39 = GPIO_MODE_GPIO,
++ .gpio40 = GPIO_MODE_NATIVE,
++ .gpio41 = GPIO_MODE_NATIVE,
++ .gpio42 = GPIO_MODE_NATIVE,
++ .gpio43 = GPIO_MODE_NATIVE,
++ .gpio44 = GPIO_MODE_NATIVE,
++ .gpio45 = GPIO_MODE_GPIO,
++ .gpio46 = GPIO_MODE_NATIVE,
++ .gpio47 = GPIO_MODE_NATIVE,
++ .gpio48 = GPIO_MODE_GPIO,
++ .gpio49 = GPIO_MODE_GPIO,
++ .gpio50 = GPIO_MODE_NATIVE,
++ .gpio51 = GPIO_MODE_GPIO,
++ .gpio52 = GPIO_MODE_GPIO,
++ .gpio53 = GPIO_MODE_GPIO,
++ .gpio54 = GPIO_MODE_GPIO,
++ .gpio55 = GPIO_MODE_NATIVE,
++ .gpio56 = GPIO_MODE_NATIVE,
++ .gpio57 = GPIO_MODE_GPIO,
++ .gpio58 = GPIO_MODE_NATIVE,
++ .gpio59 = GPIO_MODE_NATIVE,
++ .gpio60 = GPIO_MODE_GPIO,
++ .gpio61 = GPIO_MODE_NATIVE,
++ .gpio62 = GPIO_MODE_NATIVE,
++ .gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++ .gpio33 = GPIO_DIR_INPUT,
++ .gpio34 = GPIO_DIR_INPUT,
++ .gpio35 = GPIO_DIR_INPUT,
++ .gpio36 = GPIO_DIR_INPUT,
++ .gpio37 = GPIO_DIR_INPUT,
++ .gpio38 = GPIO_DIR_INPUT,
++ .gpio39 = GPIO_DIR_INPUT,
++ .gpio45 = GPIO_DIR_INPUT,
++ .gpio48 = GPIO_DIR_INPUT,
++ .gpio49 = GPIO_DIR_INPUT,
++ .gpio51 = GPIO_DIR_INPUT,
++ .gpio52 = GPIO_DIR_INPUT,
++ .gpio53 = GPIO_DIR_INPUT,
++ .gpio54 = GPIO_DIR_INPUT,
++ .gpio57 = GPIO_DIR_INPUT,
++ .gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++ .gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++ .gpio64 = GPIO_MODE_NATIVE,
++ .gpio65 = GPIO_MODE_NATIVE,
++ .gpio66 = GPIO_MODE_NATIVE,
++ .gpio67 = GPIO_MODE_NATIVE,
++ .gpio68 = GPIO_MODE_GPIO,
++ .gpio69 = GPIO_MODE_GPIO,
++ .gpio70 = GPIO_MODE_GPIO,
++ .gpio71 = GPIO_MODE_GPIO,
++ .gpio72 = GPIO_MODE_NATIVE,
++ .gpio73 = GPIO_MODE_NATIVE,
++ .gpio74 = GPIO_MODE_GPIO,
++ .gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++ .gpio68 = GPIO_DIR_INPUT,
++ .gpio69 = GPIO_DIR_INPUT,
++ .gpio70 = GPIO_DIR_INPUT,
++ .gpio71 = GPIO_DIR_INPUT,
++ .gpio74 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++ .set1 = {
++ .mode = &pch_gpio_set1_mode,
++ .direction = &pch_gpio_set1_direction,
++ .level = &pch_gpio_set1_level,
++ .blink = &pch_gpio_set1_blink,
++ .invert = &pch_gpio_set1_invert,
++ .reset = &pch_gpio_set1_reset,
++ },
++ .set2 = {
++ .mode = &pch_gpio_set2_mode,
++ .direction = &pch_gpio_set2_direction,
++ .level = &pch_gpio_set2_level,
++ .reset = &pch_gpio_set2_reset,
++ },
++ .set3 = {
++ .mode = &pch_gpio_set3_mode,
++ .direction = &pch_gpio_set3_direction,
++ .level = &pch_gpio_set3_level,
++ .reset = &pch_gpio_set3_reset,
++ },
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c
+new file mode 100644
+index 0000000000..3e89a6d75f
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++ 0x111d76df, /* Codec Vendor / Device ID: IDT */
++ 0x1028053d, /* Subsystem ID */
++ 11, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(0, 0x1028053d),
++ AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
++ AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
++ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++ AZALIA_PIN_CFG(0, 0x11, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x20, 0xd5a301a0),
++
++ 0x80862806, /* Codec Vendor / Device ID: Intel */
++ 0x80860101, /* Subsystem ID */
++ 4, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(3, 0x80860101),
++ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/overridetree.cb
+new file mode 100644
+index 0000000000..85c448d010
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/overridetree.cb
+@@ -0,0 +1,39 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++ device domain 0 on
++ subsystemid 0x1028 0x053d inherit
++
++ device ref igd on
++ register "gpu_cpu_backlight" = "0x00000000"
++ register "gpu_pch_backlight" = "0x03d003d0"
++ end
++
++ chip southbridge/intel/bd82x6x
++ register "usb_port_config" = "{
++ { 1, 1, 0 },
++ { 1, 1, 0 },
++ { 1, 1, 1 },
++ { 1, 1, 1 },
++ { 1, 1, 2 },
++ { 1, 1, 2 },
++ { 1, 1, 3 },
++ { 1, 0, 3 },
++ { 1, 2, 4 },
++ { 1, 1, 4 },
++ { 1, 1, 5 },
++ { 1, 1, 5 },
++ { 1, 0, 6 },
++ { 1, 1, 6 },
++ }"
++
++ device ref xhci on
++ register "superspeed_capable_ports" = "0x0000000f"
++ register "xhci_overcurrent_mapping" = "0x00000c03"
++ register "xhci_switchable_ports" = "0x0000000f"
++ end
++ device ref gbe off end
++ device ref pcie_rp7 on end # BCM5761 Ethernet
++ end
++ end
++end
+--
+2.39.5
+
diff --git a/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch b/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
new file mode 100644
index 00000000..e42b7c9a
--- /dev/null
+++ b/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
@@ -0,0 +1,435 @@
+From e5ed7361d41b89ee38b572beb921924b33cc174d Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Sun, 26 Nov 2023 17:08:52 -0700
+Subject: [PATCH 20/65] mb/dell: Add Latitude E6420 (Sandy Bridge)
+
+Mainboard is PAL50/LA-6591P (UMA). The version with an Nvidia dGPU was
+not tested. I do not physically have this system; someone with physical
+access to one sent me the output of autoport which I then modified to
+produce this port. I was also sent the VBT binary, which was obtained
+from `/sys/kernel/debug/dri/0/i915_vbt` while running version A25 of the
+vendor firmware.
+
+This was originally tested and found to be working as a standalone board
+port in Libreboot, but this variant based port in upstream coreboot has
+not been tested.
+
+This can be internally flashed by sending a command to the EC, which
+causes the EC to pull the FDO pin low and the firmware to skip setting
+up any chipset based write protections [1]. The EC is the SMSC MEC5055,
+which seems to be compatible with the existing MEC5035 code.
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Change-Id: Ic48d9ea58172a5b13958c8afebcb19c8929c4394
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig | 13 +-
+ .../dell/snb_ivb_latitude/Kconfig.name | 3 +
+ .../snb_ivb_latitude/variants/e6420/data.vbt | Bin 0 -> 6144 bytes
+ .../variants/e6420/early_init.c | 14 ++
+ .../snb_ivb_latitude/variants/e6420/gpio.c | 191 ++++++++++++++++++
+ .../variants/e6420/hda_verb.c | 32 +++
+ .../variants/e6420/overridetree.cb | 35 ++++
+ 7 files changed, 287 insertions(+), 1 deletion(-)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index 183a67bec3..d2786970ee 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -17,6 +17,12 @@ config BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ select SYSTEM_TYPE_LAPTOP
+ select USE_NATIVE_RAMINIT
+
++config BOARD_DELL_LATITUDE_E6420
++ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++ select BOARD_ROMSIZE_KB_10240
++ select MAINBOARD_USES_IFD_GBE_REGION
++ select SOUTHBRIDGE_INTEL_BD82X6X
++
+ config BOARD_DELL_LATITUDE_E5530
+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ select BOARD_ROMSIZE_KB_12288
+@@ -43,6 +49,7 @@ config MAINBOARD_DIR
+ default "dell/snb_ivb_latitude"
+
+ config MAINBOARD_PART_NUMBER
++ default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
+ default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
+ default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
+ default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
+@@ -54,11 +61,15 @@ config USBDEBUG_HCD_INDEX
+ default 2
+
+ config VARIANT_DIR
++ default "e6420" if BOARD_DELL_LATITUDE_E6420
+ default "e5530" if BOARD_DELL_LATITUDE_E5530
+ default "e6430" if BOARD_DELL_LATITUDE_E6430
+ default "e6530" if BOARD_DELL_LATITUDE_E6530
+
+ config VGA_BIOS_ID
+- default "8086,0166"
++ default "8086,0166" if BOARD_DELL_LATITUDE_E5530
++ default "8086,0126" if BOARD_DELL_LATITUDE_E6420
++ default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
++ || BOARD_DELL_LATITUDE_E6530
+
+ endif
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index c15ef4028f..257d428a70 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -1,5 +1,8 @@
+ ## SPDX-License-Identifier: GPL-2.0-only
+
++config BOARD_DELL_LATITUDE_E6420
++ bool "Latitude E6420"
++
+ config BOARD_DELL_LATITUDE_E5530
+ bool "Latitude E5530"
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..d3662eea1bc78b60be6d0bd2cc38bb46b654afbd
+GIT binary patch
+literal 6144
+zcmeHKeQZ-z6hE);wSBvNZ|mO1=*HLC2BQN8uVX6{N9eY)75ORymb$R8!YYuAZEgeE
+zKk|S@Fen*n41W-viAF;r%)~^EkpLz-B{2q##)LmGAtoY;7*Qhv_1yPbw$TC$2}G0K
+z=6Ao&x#ym9?z!i_&TOh(kLzky2cN8MTpny#R<;VU4Rkn?rBIz(YL~BBw<%b&zGhSH
+z$~AQ>@D0d=Xx6RE0BwSxspWdrW9y<FZGD@&x3_JL;p$p!;!BVdcKLkht0=-%(Jj&T
+z_GkyztZ%>#t7^)^(T-R<7W?O6ZTI%A+j=`<Jw3Q%dk6N!da<_?7oyiU3)^<~_TiSk
+zE$y+=RK3PGQ`gzmXYPRBx>C|f*UP9{h|4>ANrAe~?ymV*)83AaT#FuTjP=C2cg5P~
+zt4w78r$t#300cWY_k)mevmAmFI3&oBfytoAAPQiYK$XEIgHwV@5-gJ-Q-*p8yfTDj
+zaDz=1Y!X1B3`OpQ&Ik}bM|0xHn0gYNZw0rT=7AXS2in-q8K^?)0|el+Z6geW7i7MM
+zv~!|>HqL-|Fk}EYOa@)R<X)VQ7c}d8R1b@RTn5rq(90|QRg0?wwZZz(6Dz}w>zg9Y
+z8;!mD_V*XSjT33~$`o`s>zEGBq8AQ`HaH?y!Fh2QiX1v@aCo4LaENf&DZ_cE2A2qb
+z5@cC}X)=S^1RvpXLWs~v*hqMau$!=t@B-mg!XV)|;eEm>!Z6`H;R4|&!d1d`f|S7^
+zli+B98*!TfPE&6~NVM5j3v{N3OTjpnm_L@BPh(}esd(J!gj?~iJP?n|OZZOiTqlql
+zg<NWR@g&-*W-E%A7|*1Z_`sVO$K&iAP+VIj9{<1hT%SXsK}IBk8!daftR`6-)EUiS
+zvv*HR(#-ZwhA~7wcmxbe4%E?Y7P0y{1q|nqR1L29UR8v@#No^g5MH)7!>{%-$T|cR
+zZx5|xm>Fl>;@$m};P{0WC>O~<Nl1`*PLgPN_hP2a^h+L$ls&SYrkDYr+&l*%%S?^Q
+ziPSdtHE<LNEnr7cs=ihL-C>-p>*$9CpHRLgN|POkqD^UP4nw|4nf0bc8MOBk<;%js
+zfpCAWNzqSPlz@X%j9CGrwZDKUl@K{g6pzqiIIARDQ)#@^RW&0pmNG;XZ?!SlHB?L#
+zKRAMgq(R;aQd%@Gy38-LS@ix)fR**(P3B9wI=Uk^&cWmmwB<vf21<0#LBA!;qtAh(
+zYe5g_T{+gw^mi8QzPPraBoH~8oCz%r=$nVi1A)`Y8IKqIdqm6MihqxtpFaTggaPxu
+zQP07nf#&kPkPp}Cmk$F1g7q7QK;kz~80i&oDN}~wYbPUI6AtG5H+$T!@f5FzUhp21
+z^XiPT3rb%B@sA9g!n88R7BOsLS|?+D3}0v3dyIX|@JFWo&e%<c#V)PV#g@7-=F*;V
+zvAr&Q+ogTvVxPM3XP5Smi`f;Nt7uCU)}Y`HMcbpW=M_AuXlE35PQl+4O{7m66&I@7
+zGL@}Sai^*sP}va`KTx$VRQ8REf2*1+lTFH0=UkNx+eN|1rVyipl)Du=h=@%w+iQZG
+zT6@-PdW^oyFb44AG`HMZWEnP{&OQ+jC`N4emoS)x;EPN}uaSFOf-Mn8JRRO&LTWJc
+zn6%=L94~PR)%Ua_HTZcfTXD<p{%8p|<N<;Efw$Zb4$}{m8@7c((~<7^thaau&@Wx#
+zVGNL)lmH@{o=h*{muXGc!;nXrVgpp3;1V1stMj=4AtxyzX+?SoB~zN}!*r?9Qvs1P
+zmV_(CTmt0sY&6=F=_M>E34GYvuh1uQF+BUdWyQC5SaEM1QvKlHBMs13C}n{0SwRxW
+ziekMa&kvRFruRcKCevGy5)TxUBDlur@E{TtQ^NQ>nO+Cgl)&Ga(PxqVW?e3TLH-UY
+zdL3T{z^xdd`$(STFUb8R*cKa}r>n{Wk+MXRH~o-hN}#9OF*>T#>rfhiRs(Wc-R^9@
+z%F=<}dn(E}ADc03zJ>JvZe;_8f+WFLL4%qNYs`_aa`a$Pl5H;iO^Wt*cP3W(d=(g}
+zZ%nKT1$|r-tAv8($u2-BI2Uiz#%OT&!Q3b~Ru2P2j;Gem!@wfPsTR%J>W{8z)oq^J
+k^Qm&?O@bFkw4CTocwoW<6CRlGz=Q`TJTT#bN9KWl0rH4|j{pDw
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/early_init.c
+new file mode 100644
+index 0000000000..ff83db095b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/early_init.c
+@@ -0,0 +1,14 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++void bootblock_mainboard_early_init(void)
++{
++ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++ | COMB_LPC_EN | COMA_LPC_EN);
++ mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/gpio.c
+new file mode 100644
+index 0000000000..943c743f48
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/gpio.c
+@@ -0,0 +1,191 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++ .gpio0 = GPIO_MODE_GPIO,
++ .gpio1 = GPIO_MODE_NATIVE,
++ .gpio2 = GPIO_MODE_GPIO,
++ .gpio3 = GPIO_MODE_NATIVE,
++ .gpio4 = GPIO_MODE_GPIO,
++ .gpio5 = GPIO_MODE_NATIVE,
++ .gpio6 = GPIO_MODE_GPIO,
++ .gpio7 = GPIO_MODE_GPIO,
++ .gpio8 = GPIO_MODE_GPIO,
++ .gpio9 = GPIO_MODE_NATIVE,
++ .gpio10 = GPIO_MODE_NATIVE,
++ .gpio11 = GPIO_MODE_NATIVE,
++ .gpio12 = GPIO_MODE_NATIVE,
++ .gpio13 = GPIO_MODE_GPIO,
++ .gpio14 = GPIO_MODE_GPIO,
++ .gpio15 = GPIO_MODE_GPIO,
++ .gpio16 = GPIO_MODE_GPIO,
++ .gpio17 = GPIO_MODE_GPIO,
++ .gpio18 = GPIO_MODE_NATIVE,
++ .gpio19 = GPIO_MODE_GPIO,
++ .gpio20 = GPIO_MODE_NATIVE,
++ .gpio21 = GPIO_MODE_GPIO,
++ .gpio22 = GPIO_MODE_GPIO,
++ .gpio23 = GPIO_MODE_NATIVE,
++ .gpio24 = GPIO_MODE_GPIO,
++ .gpio25 = GPIO_MODE_NATIVE,
++ .gpio26 = GPIO_MODE_NATIVE,
++ .gpio27 = GPIO_MODE_GPIO,
++ .gpio28 = GPIO_MODE_GPIO,
++ .gpio29 = GPIO_MODE_GPIO,
++ .gpio30 = GPIO_MODE_GPIO,
++ .gpio31 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++ .gpio0 = GPIO_DIR_INPUT,
++ .gpio2 = GPIO_DIR_INPUT,
++ .gpio4 = GPIO_DIR_INPUT,
++ .gpio6 = GPIO_DIR_INPUT,
++ .gpio7 = GPIO_DIR_INPUT,
++ .gpio8 = GPIO_DIR_INPUT,
++ .gpio13 = GPIO_DIR_INPUT,
++ .gpio14 = GPIO_DIR_INPUT,
++ .gpio15 = GPIO_DIR_INPUT,
++ .gpio16 = GPIO_DIR_INPUT,
++ .gpio17 = GPIO_DIR_INPUT,
++ .gpio19 = GPIO_DIR_INPUT,
++ .gpio21 = GPIO_DIR_INPUT,
++ .gpio22 = GPIO_DIR_INPUT,
++ .gpio24 = GPIO_DIR_INPUT,
++ .gpio27 = GPIO_DIR_INPUT,
++ .gpio28 = GPIO_DIR_INPUT,
++ .gpio29 = GPIO_DIR_INPUT,
++ .gpio30 = GPIO_DIR_OUTPUT,
++ .gpio31 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++ .gpio30 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++ .gpio0 = GPIO_INVERT,
++ .gpio8 = GPIO_INVERT,
++ .gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++ .gpio32 = GPIO_MODE_NATIVE,
++ .gpio33 = GPIO_MODE_GPIO,
++ .gpio34 = GPIO_MODE_GPIO,
++ .gpio35 = GPIO_MODE_GPIO,
++ .gpio36 = GPIO_MODE_GPIO,
++ .gpio37 = GPIO_MODE_GPIO,
++ .gpio38 = GPIO_MODE_GPIO,
++ .gpio39 = GPIO_MODE_GPIO,
++ .gpio40 = GPIO_MODE_NATIVE,
++ .gpio41 = GPIO_MODE_NATIVE,
++ .gpio42 = GPIO_MODE_NATIVE,
++ .gpio43 = GPIO_MODE_NATIVE,
++ .gpio44 = GPIO_MODE_NATIVE,
++ .gpio45 = GPIO_MODE_GPIO,
++ .gpio46 = GPIO_MODE_NATIVE,
++ .gpio47 = GPIO_MODE_NATIVE,
++ .gpio48 = GPIO_MODE_GPIO,
++ .gpio49 = GPIO_MODE_GPIO,
++ .gpio50 = GPIO_MODE_NATIVE,
++ .gpio51 = GPIO_MODE_GPIO,
++ .gpio52 = GPIO_MODE_GPIO,
++ .gpio53 = GPIO_MODE_NATIVE,
++ .gpio54 = GPIO_MODE_GPIO,
++ .gpio55 = GPIO_MODE_NATIVE,
++ .gpio56 = GPIO_MODE_NATIVE,
++ .gpio57 = GPIO_MODE_GPIO,
++ .gpio58 = GPIO_MODE_NATIVE,
++ .gpio59 = GPIO_MODE_NATIVE,
++ .gpio60 = GPIO_MODE_GPIO,
++ .gpio61 = GPIO_MODE_NATIVE,
++ .gpio62 = GPIO_MODE_NATIVE,
++ .gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++ .gpio33 = GPIO_DIR_INPUT,
++ .gpio34 = GPIO_DIR_OUTPUT,
++ .gpio35 = GPIO_DIR_INPUT,
++ .gpio36 = GPIO_DIR_INPUT,
++ .gpio37 = GPIO_DIR_INPUT,
++ .gpio38 = GPIO_DIR_INPUT,
++ .gpio39 = GPIO_DIR_INPUT,
++ .gpio45 = GPIO_DIR_OUTPUT,
++ .gpio48 = GPIO_DIR_INPUT,
++ .gpio49 = GPIO_DIR_OUTPUT,
++ .gpio51 = GPIO_DIR_INPUT,
++ .gpio52 = GPIO_DIR_INPUT,
++ .gpio54 = GPIO_DIR_INPUT,
++ .gpio57 = GPIO_DIR_INPUT,
++ .gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++ .gpio34 = GPIO_LEVEL_HIGH,
++ .gpio45 = GPIO_LEVEL_LOW,
++ .gpio49 = GPIO_LEVEL_LOW,
++ .gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++ .gpio64 = GPIO_MODE_NATIVE,
++ .gpio65 = GPIO_MODE_NATIVE,
++ .gpio66 = GPIO_MODE_NATIVE,
++ .gpio67 = GPIO_MODE_NATIVE,
++ .gpio68 = GPIO_MODE_GPIO,
++ .gpio69 = GPIO_MODE_GPIO,
++ .gpio70 = GPIO_MODE_GPIO,
++ .gpio71 = GPIO_MODE_GPIO,
++ .gpio72 = GPIO_MODE_NATIVE,
++ .gpio73 = GPIO_MODE_NATIVE,
++ .gpio74 = GPIO_MODE_NATIVE,
++ .gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++ .gpio68 = GPIO_DIR_INPUT,
++ .gpio69 = GPIO_DIR_INPUT,
++ .gpio70 = GPIO_DIR_INPUT,
++ .gpio71 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++ .set1 = {
++ .mode = &pch_gpio_set1_mode,
++ .direction = &pch_gpio_set1_direction,
++ .level = &pch_gpio_set1_level,
++ .blink = &pch_gpio_set1_blink,
++ .invert = &pch_gpio_set1_invert,
++ .reset = &pch_gpio_set1_reset,
++ },
++ .set2 = {
++ .mode = &pch_gpio_set2_mode,
++ .direction = &pch_gpio_set2_direction,
++ .level = &pch_gpio_set2_level,
++ .reset = &pch_gpio_set2_reset,
++ },
++ .set3 = {
++ .mode = &pch_gpio_set3_mode,
++ .direction = &pch_gpio_set3_direction,
++ .level = &pch_gpio_set3_level,
++ .reset = &pch_gpio_set3_reset,
++ },
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c
+new file mode 100644
+index 0000000000..ede8445aaf
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++ 0x111d76e7, /* Codec Vendor / Device ID: IDT */
++ 0x10280493, /* Subsystem ID */
++ 11, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(0, 0x10280493),
++ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
++ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
++ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++ AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
++ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++ 0x80862805, /* Codec Vendor / Device ID: Intel */
++ 0x80860101, /* Subsystem ID */
++ 4, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(3, 0x80860101),
++ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/overridetree.cb
+new file mode 100644
+index 0000000000..3012a3177f
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/overridetree.cb
+@@ -0,0 +1,35 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++ device domain 0 on
++ subsystemid 0x1028 0x0493 inherit
++
++ device ref igd on
++ register "gpu_cpu_backlight" = "0x0000054f"
++ register "gpu_pch_backlight" = "0x13121312"
++ end
++
++ chip southbridge/intel/bd82x6x
++ register "usb_port_config" = "{
++ { 1, 1, 0 },
++ { 1, 1, 0 },
++ { 1, 1, 1 },
++ { 1, 1, 1 },
++ { 1, 0, 2 },
++ { 1, 1, 2 },
++ { 1, 1, 3 },
++ { 1, 1, 3 },
++ { 1, 1, 5 },
++ { 1, 1, 5 },
++ { 1, 1, 7 },
++ { 1, 1, 6 },
++ { 1, 0, 6 },
++ { 1, 0, 7 },
++ }"
++
++ device ref sata1 on
++ register "sata_port_map" = "0x3b"
++ end
++ end
++ end
++end
+--
+2.39.5
+
diff --git a/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch b/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch
deleted file mode 100644
index fecaf88a..00000000
--- a/config/coreboot/default/patches/0020-mb-dell-Add-Latitude-E6430-Ivy-Bridge.patch
+++ /dev/null
@@ -1,826 +0,0 @@
-From a49df0307455d6d8b7a9efb9f4639b72be1b64d4 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Sat, 19 Aug 2023 16:19:10 -0600
-Subject: [PATCH 20/30] mb/dell: Add Latitude E6430 (Ivy Bridge)
-
-Mainboard is QAL80/LA-7781P (UMA). The dGPU model was not tested. This
-is based on the autoport output with some manual tweaks. The flash is
-8MiB + 4MiB, and is fairly easily accessed by removing the keyboard. It
-can also be internally flashed by sending a command to the EC, which
-causes the EC to pull the FDO pin low and the firmware to skip setting
-up any chipset based write protections [1]. The EC is the SMSC MEC5055,
-which seems to be compatible with the existing MEC5035 code.
-
-Working:
-- Libgfxinit
-- USB EHCI debug (left side usb port is HCD index 2, middle port on the
- right side is HCD index 1)
-- Keyboard
-- Touchpad/trackpoint
-- ExpressCard
-- Audio
-- Ethernet
-- SD card reader
-- mPCIe WiFi
-- SeaBIOS 1.16.2
-- edk2 (MrChromebox' fork, uefipayload_202306)
-- Internal flashing using dell-flash-unlock
-
-Not working:
-- S3 suspend: Possibly EC related
-- Physical wireless switch - this triggers an SMI handler in the vendor
- firmware which sends commands to the EC to enable/disable wireless
- devices
-- Battery reporting - needs ACPI code for the EC
-- Brightness hotkeys - probably EC related
-
-Unknown/untested:
-- Dock
-- eSATA
-- TPM
-- dGPU on non-UMA model
-- Bluetooth module (not included on my system)
-
-[1] https://gitlab.com/nic3-14159/dell-flash-unlock
-
-Change-Id: I93c6622fc5da1d0d61a5b2c197ac7227d9525908
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/e6430/Kconfig | 44 +++++
- src/mainboard/dell/e6430/Kconfig.name | 2 +
- src/mainboard/dell/e6430/Makefile.inc | 6 +
- src/mainboard/dell/e6430/acpi/ec.asl | 9 +
- src/mainboard/dell/e6430/acpi/platform.asl | 12 ++
- src/mainboard/dell/e6430/acpi/superio.asl | 3 +
- src/mainboard/dell/e6430/acpi_tables.c | 16 ++
- src/mainboard/dell/e6430/board_info.txt | 6 +
- src/mainboard/dell/e6430/cmos.default | 9 +
- src/mainboard/dell/e6430/cmos.layout | 88 ++++++++++
- src/mainboard/dell/e6430/data.vbt | Bin 0 -> 6144 bytes
- src/mainboard/dell/e6430/devicetree.cb | 70 ++++++++
- src/mainboard/dell/e6430/dsdt.asl | 30 ++++
- src/mainboard/dell/e6430/early_init.c | 32 ++++
- src/mainboard/dell/e6430/gma-mainboard.ads | 20 +++
- src/mainboard/dell/e6430/gpio.c | 192 +++++++++++++++++++++
- src/mainboard/dell/e6430/hda_verb.c | 33 ++++
- src/mainboard/dell/e6430/mainboard.c | 21 +++
- 18 files changed, 593 insertions(+)
- create mode 100644 src/mainboard/dell/e6430/Kconfig
- create mode 100644 src/mainboard/dell/e6430/Kconfig.name
- create mode 100644 src/mainboard/dell/e6430/Makefile.inc
- create mode 100644 src/mainboard/dell/e6430/acpi/ec.asl
- create mode 100644 src/mainboard/dell/e6430/acpi/platform.asl
- create mode 100644 src/mainboard/dell/e6430/acpi/superio.asl
- create mode 100644 src/mainboard/dell/e6430/acpi_tables.c
- create mode 100644 src/mainboard/dell/e6430/board_info.txt
- create mode 100644 src/mainboard/dell/e6430/cmos.default
- create mode 100644 src/mainboard/dell/e6430/cmos.layout
- create mode 100644 src/mainboard/dell/e6430/data.vbt
- create mode 100644 src/mainboard/dell/e6430/devicetree.cb
- create mode 100644 src/mainboard/dell/e6430/dsdt.asl
- create mode 100644 src/mainboard/dell/e6430/early_init.c
- create mode 100644 src/mainboard/dell/e6430/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/e6430/gpio.c
- create mode 100644 src/mainboard/dell/e6430/hda_verb.c
- create mode 100644 src/mainboard/dell/e6430/mainboard.c
-
-diff --git a/src/mainboard/dell/e6430/Kconfig b/src/mainboard/dell/e6430/Kconfig
-new file mode 100644
-index 0000000000..e4c799803e
---- /dev/null
-+++ b/src/mainboard/dell/e6430/Kconfig
-@@ -0,0 +1,44 @@
-+if BOARD_DELL_LATITUDE_E6430
-+
-+config BOARD_SPECIFIC_OPTIONS
-+ def_bool y
-+ select BOARD_ROMSIZE_KB_12288
-+ select EC_ACPI
-+ select EC_DELL_MEC5035
-+ select GFX_GMA_PANEL_1_ON_LVDS
-+ select HAVE_ACPI_RESUME
-+ select HAVE_ACPI_TABLES
-+ select HAVE_CMOS_DEFAULT
-+ select HAVE_OPTION_TABLE
-+ select INTEL_GMA_HAVE_VBT
-+ select INTEL_INT15
-+ select MAINBOARD_HAS_LIBGFXINIT
-+ select MAINBOARD_USES_IFD_GBE_REGION
-+ select NORTHBRIDGE_INTEL_SANDYBRIDGE
-+ select SERIRQ_CONTINUOUS_MODE
-+ select SOUTHBRIDGE_INTEL_C216
-+ select SYSTEM_TYPE_LAPTOP
-+ select USE_NATIVE_RAMINIT
-+
-+config DRAM_RESET_GATE_GPIO
-+ default 60
-+
-+config MAINBOARD_DIR
-+ default "dell/e6430"
-+
-+config MAINBOARD_PART_NUMBER
-+ default "Latitude E6430"
-+
-+config PS2K_EISAID
-+ default "PNP0303"
-+
-+config PS2M_EISAID
-+ default "PNP0F13"
-+
-+config USBDEBUG_HCD_INDEX
-+ default 2
-+
-+config VGA_BIOS_ID
-+ default "8086,0166"
-+
-+endif
-diff --git a/src/mainboard/dell/e6430/Kconfig.name b/src/mainboard/dell/e6430/Kconfig.name
-new file mode 100644
-index 0000000000..f866b03585
---- /dev/null
-+++ b/src/mainboard/dell/e6430/Kconfig.name
-@@ -0,0 +1,2 @@
-+config BOARD_DELL_LATITUDE_E6430
-+ bool "Latitude E6430"
-diff --git a/src/mainboard/dell/e6430/Makefile.inc b/src/mainboard/dell/e6430/Makefile.inc
-new file mode 100644
-index 0000000000..ba64e93eb8
---- /dev/null
-+++ b/src/mainboard/dell/e6430/Makefile.inc
-@@ -0,0 +1,6 @@
-+# SPDX-License-Identifier: GPL-2.0-only
-+bootblock-y += early_init.c
-+bootblock-y += gpio.c
-+romstage-y += early_init.c
-+romstage-y += gpio.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-diff --git a/src/mainboard/dell/e6430/acpi/ec.asl b/src/mainboard/dell/e6430/acpi/ec.asl
-new file mode 100644
-index 0000000000..0d429410a9
---- /dev/null
-+++ b/src/mainboard/dell/e6430/acpi/ec.asl
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Device(EC)
-+{
-+ Name (_HID, EISAID("PNP0C09"))
-+ Name (_UID, 0)
-+ Name (_GPE, 16)
-+/* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e6430/acpi/platform.asl b/src/mainboard/dell/e6430/acpi/platform.asl
-new file mode 100644
-index 0000000000..2d24bbd9b9
---- /dev/null
-+++ b/src/mainboard/dell/e6430/acpi/platform.asl
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Method(_WAK, 1)
-+{
-+ /* FIXME: EC support */
-+ Return(Package() {0, 0})
-+}
-+
-+Method(_PTS,1)
-+{
-+ /* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e6430/acpi/superio.asl b/src/mainboard/dell/e6430/acpi/superio.asl
-new file mode 100644
-index 0000000000..55b1db5b11
---- /dev/null
-+++ b/src/mainboard/dell/e6430/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <drivers/pc80/pc/ps2_controller.asl>
-diff --git a/src/mainboard/dell/e6430/acpi_tables.c b/src/mainboard/dell/e6430/acpi_tables.c
-new file mode 100644
-index 0000000000..e2759659bf
---- /dev/null
-+++ b/src/mainboard/dell/e6430/acpi_tables.c
-@@ -0,0 +1,16 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi_gnvs.h>
-+#include <soc/nvs.h>
-+
-+/* FIXME: check this function. */
-+void mainboard_fill_gnvs(struct global_nvs *gnvs)
-+{
-+ /* The lid is open by default. */
-+ gnvs->lids = 1;
-+
-+ /* Temperature at which OS will shutdown */
-+ gnvs->tcrt = 100;
-+ /* Temperature at which OS will throttle CPU */
-+ gnvs->tpsv = 90;
-+}
-diff --git a/src/mainboard/dell/e6430/board_info.txt b/src/mainboard/dell/e6430/board_info.txt
-new file mode 100644
-index 0000000000..4601a4aaba
---- /dev/null
-+++ b/src/mainboard/dell/e6430/board_info.txt
-@@ -0,0 +1,6 @@
-+Category: laptop
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2012
-diff --git a/src/mainboard/dell/e6430/cmos.default b/src/mainboard/dell/e6430/cmos.default
-new file mode 100644
-index 0000000000..2a5b30f2b7
---- /dev/null
-+++ b/src/mainboard/dell/e6430/cmos.default
-@@ -0,0 +1,9 @@
-+boot_option=Fallback
-+debug_level=Debug
-+power_on_after_fail=Disable
-+nmi=Enable
-+bluetooth=Enable
-+wwan=Enable
-+wlan=Enable
-+sata_mode=AHCI
-+me_state=Normal
-diff --git a/src/mainboard/dell/e6430/cmos.layout b/src/mainboard/dell/e6430/cmos.layout
-new file mode 100644
-index 0000000000..1aa7e77bce
---- /dev/null
-+++ b/src/mainboard/dell/e6430/cmos.layout
-@@ -0,0 +1,88 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+# -----------------------------------------------------------------
-+0 120 r 0 reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384 1 e 4 boot_option
-+388 4 h 0 reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395 4 e 6 debug_level
-+
-+#400 8 r 0 reserved for century byte
-+
-+# coreboot config options: southbridge
-+408 1 e 1 nmi
-+409 2 e 7 power_on_after_fail
-+411 1 e 9 sata_mode
-+
-+# coreboot config options: EC
-+412 1 e 1 bluetooth
-+413 1 e 1 wwan
-+414 1 e 1 wlan
-+
-+# coreboot config options: ME
-+424 1 e 14 me_state
-+425 2 h 0 me_state_prev
-+
-+# coreboot config options: northbridge
-+432 3 e 11 gfx_uma_size
-+435 2 e 12 hybrid_graphics_mode
-+440 8 h 0 volume
-+
-+# VBOOT
-+448 128 r 0 vbnv
-+
-+# SandyBridge MRC Scrambler Seed values
-+896 32 r 0 mrc_scrambler_seed
-+928 32 r 0 mrc_scrambler_seed_s3
-+960 16 r 0 mrc_scrambler_seed_chk
-+
-+# coreboot config options: check sums
-+984 16 h 0 check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID value text
-+1 0 Disable
-+1 1 Enable
-+2 0 Enable
-+2 1 Disable
-+4 0 Fallback
-+4 1 Normal
-+6 0 Emergency
-+6 1 Alert
-+6 2 Critical
-+6 3 Error
-+6 4 Warning
-+6 5 Notice
-+6 6 Info
-+6 7 Debug
-+6 8 Spew
-+7 0 Disable
-+7 1 Enable
-+7 2 Keep
-+9 0 AHCI
-+9 1 Compatible
-+11 0 32M
-+11 1 64M
-+11 2 96M
-+11 3 128M
-+11 4 160M
-+11 5 192M
-+11 6 224M
-+14 0 Normal
-+14 1 Disabled
-+
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 447 984
-diff --git a/src/mainboard/dell/e6430/data.vbt b/src/mainboard/dell/e6430/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..08952c26ab82933ebb5cc5b9c7e2265963a87b2d
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-
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-
-diff --git a/src/mainboard/dell/e6430/devicetree.cb b/src/mainboard/dell/e6430/devicetree.cb
-new file mode 100644
-index 0000000000..054b01c5ac
---- /dev/null
-+++ b/src/mainboard/dell/e6430/devicetree.cb
-@@ -0,0 +1,70 @@
-+chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
-+ register "gfx" = "GMA_STATIC_DISPLAYS(1)"
-+ register "gpu_cpu_backlight" = "0x00001312"
-+ register "gpu_dp_b_hotplug" = "4"
-+ register "gpu_dp_c_hotplug" = "4"
-+ register "gpu_dp_d_hotplug" = "4"
-+ register "gpu_panel_port_select" = "0"
-+ register "gpu_panel_power_backlight_off_delay" = "2300"
-+ register "gpu_panel_power_backlight_on_delay" = "2300"
-+ register "gpu_panel_power_cycle_delay" = "6"
-+ register "gpu_panel_power_down_delay" = "400"
-+ register "gpu_panel_power_up_delay" = "400"
-+ register "gpu_pch_backlight" = "0x13121312"
-+
-+ register "spd_addresses" = "{0x50, 0, 0x52, 0}"
-+
-+ device domain 0x0 on
-+ subsystemid 0x1028 0x0534 inherit
-+
-+ device ref host_bridge on end
-+ device ref peg10 off end
-+ device ref igd on end
-+
-+ chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-+ register "docking_supported" = "1"
-+ register "gen1_dec" = "0x007c0681"
-+ register "gen2_dec" = "0x005c0921"
-+ register "gen3_dec" = "0x003c07e1"
-+ register "gen4_dec" = "0x00000911" # Ports 0x910/0x911 for EC
-+ register "gpi0_routing" = "2"
-+ register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
-+ register "pcie_port_coalesce" = "1"
-+ register "sata_interface_speed_support" = "0x3"
-+ register "sata_port_map" = "0x33"
-+ register "spi_lvscc" = "0x2005"
-+ register "spi_uvscc" = "0x2005"
-+ register "superspeed_capable_ports" = "0x0000000f"
-+ register "xhci_overcurrent_mapping" = "0x00000c03"
-+ register "xhci_switchable_ports" = "0x0000000f"
-+
-+ device ref xhci on end
-+ device ref mei1 on end
-+ device ref mei2 off end
-+ device ref me_ide_r off end
-+ device ref me_kt on end
-+ device ref gbe on end
-+ device ref ehci2 on end
-+ device ref hda on end
-+ device ref pcie_rp1 on end # WWAN Slot
-+ device ref pcie_rp2 on end # SLAN Slot
-+ device ref pcie_rp3 on end # ExpressCard
-+ device ref pcie_rp4 on end # E-Module (optical bay)
-+ device ref pcie_rp5 on end # Extra Half Mini PCIe slot
-+ device ref pcie_rp6 on end # SD/MMC Card Reader
-+ device ref pcie_rp7 off end
-+ device ref pcie_rp8 off end
-+ device ref ehci1 on end
-+ device ref pci_bridge off end
-+ device ref lpc on
-+ chip ec/dell/mec5035
-+ device pnp ff.0 on end
-+ end
-+ end
-+ device ref sata1 on end
-+ device ref smbus on end
-+ device ref sata2 off end
-+ device ref thermal off end
-+ end
-+ end
-+end
-diff --git a/src/mainboard/dell/e6430/dsdt.asl b/src/mainboard/dell/e6430/dsdt.asl
-new file mode 100644
-index 0000000000..7d13c55b08
---- /dev/null
-+++ b/src/mainboard/dell/e6430/dsdt.asl
-@@ -0,0 +1,30 @@
-+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
-+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <acpi/acpi.h>
-+
-+DefinitionBlock(
-+ "dsdt.aml",
-+ "DSDT",
-+ ACPI_DSDT_REV_2,
-+ OEM_ID,
-+ ACPI_TABLE_CREATOR,
-+ 0x20141018 /* OEM revision */
-+)
-+{
-+ #include <acpi/dsdt_top.asl>
-+ #include "acpi/platform.asl"
-+ #include <cpu/intel/common/acpi/cpu.asl>
-+ #include <southbridge/intel/common/acpi/platform.asl>
-+ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-+ #include <southbridge/intel/common/acpi/sleepstates.asl>
-+
-+ Device (\_SB.PCI0)
-+ {
-+ #include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-+ #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
-+ #include <southbridge/intel/bd82x6x/acpi/pch.asl>
-+ }
-+}
-diff --git a/src/mainboard/dell/e6430/early_init.c b/src/mainboard/dell/e6430/early_init.c
-new file mode 100644
-index 0000000000..d882c3d78b
---- /dev/null
-+++ b/src/mainboard/dell/e6430/early_init.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+ { 1, 1, 0 },
-+ { 1, 1, 0 },
-+ { 1, 1, 1 },
-+ { 1, 1, 1 },
-+ { 1, 0, 2 },
-+ { 1, 1, 2 },
-+ { 1, 1, 3 },
-+ { 1, 1, 3 },
-+ { 1, 1, 4 },
-+ { 1, 1, 4 },
-+ { 1, 1, 5 },
-+ { 1, 1, 5 },
-+ { 1, 2, 6 },
-+ { 1, 2, 6 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+ | COMB_LPC_EN | COMA_LPC_EN);
-+ mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/e6430/gma-mainboard.ads b/src/mainboard/dell/e6430/gma-mainboard.ads
-new file mode 100644
-index 0000000000..1310830c8e
---- /dev/null
-+++ b/src/mainboard/dell/e6430/gma-mainboard.ads
-@@ -0,0 +1,20 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+ ports : constant Port_List :=
-+ (
-+ HDMI1, -- mainboard HDMI
-+ DP2, -- dock DP
-+ DP3, -- dock DP
-+ Analog, --mainboard VGA
-+ LVDS,
-+ others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/e6430/gpio.c b/src/mainboard/dell/e6430/gpio.c
-new file mode 100644
-index 0000000000..777570765a
---- /dev/null
-+++ b/src/mainboard/dell/e6430/gpio.c
-@@ -0,0 +1,192 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+ .gpio0 = GPIO_MODE_GPIO,
-+ .gpio1 = GPIO_MODE_GPIO,
-+ .gpio2 = GPIO_MODE_GPIO,
-+ .gpio3 = GPIO_MODE_GPIO,
-+ .gpio4 = GPIO_MODE_GPIO,
-+ .gpio5 = GPIO_MODE_NATIVE,
-+ .gpio6 = GPIO_MODE_GPIO,
-+ .gpio7 = GPIO_MODE_GPIO,
-+ .gpio8 = GPIO_MODE_GPIO,
-+ .gpio9 = GPIO_MODE_NATIVE,
-+ .gpio10 = GPIO_MODE_NATIVE,
-+ .gpio11 = GPIO_MODE_NATIVE,
-+ .gpio12 = GPIO_MODE_NATIVE,
-+ .gpio13 = GPIO_MODE_GPIO,
-+ .gpio14 = GPIO_MODE_GPIO,
-+ .gpio15 = GPIO_MODE_GPIO,
-+ .gpio16 = GPIO_MODE_GPIO,
-+ .gpio17 = GPIO_MODE_GPIO,
-+ .gpio18 = GPIO_MODE_NATIVE,
-+ .gpio19 = GPIO_MODE_GPIO,
-+ .gpio20 = GPIO_MODE_NATIVE,
-+ .gpio21 = GPIO_MODE_GPIO,
-+ .gpio22 = GPIO_MODE_GPIO,
-+ .gpio23 = GPIO_MODE_NATIVE,
-+ .gpio24 = GPIO_MODE_GPIO,
-+ .gpio25 = GPIO_MODE_NATIVE,
-+ .gpio26 = GPIO_MODE_NATIVE,
-+ .gpio27 = GPIO_MODE_GPIO,
-+ .gpio28 = GPIO_MODE_GPIO,
-+ .gpio29 = GPIO_MODE_GPIO,
-+ .gpio30 = GPIO_MODE_NATIVE,
-+ .gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+ .gpio0 = GPIO_DIR_INPUT,
-+ .gpio1 = GPIO_DIR_INPUT,
-+ .gpio2 = GPIO_DIR_INPUT,
-+ .gpio3 = GPIO_DIR_INPUT,
-+ .gpio4 = GPIO_DIR_INPUT,
-+ .gpio6 = GPIO_DIR_INPUT,
-+ .gpio7 = GPIO_DIR_INPUT,
-+ .gpio8 = GPIO_DIR_INPUT,
-+ .gpio13 = GPIO_DIR_INPUT,
-+ .gpio14 = GPIO_DIR_INPUT,
-+ .gpio15 = GPIO_DIR_INPUT,
-+ .gpio16 = GPIO_DIR_INPUT,
-+ .gpio17 = GPIO_DIR_INPUT,
-+ .gpio19 = GPIO_DIR_INPUT,
-+ .gpio21 = GPIO_DIR_INPUT,
-+ .gpio22 = GPIO_DIR_INPUT,
-+ .gpio24 = GPIO_DIR_INPUT,
-+ .gpio27 = GPIO_DIR_INPUT,
-+ .gpio28 = GPIO_DIR_OUTPUT,
-+ .gpio29 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+ .gpio28 = GPIO_LEVEL_LOW,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+ .gpio30 = GPIO_RESET_RSMRST,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+ .gpio0 = GPIO_INVERT,
-+ .gpio8 = GPIO_INVERT,
-+ .gpio13 = GPIO_INVERT,
-+ .gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+ .gpio32 = GPIO_MODE_NATIVE,
-+ .gpio33 = GPIO_MODE_GPIO,
-+ .gpio34 = GPIO_MODE_GPIO,
-+ .gpio35 = GPIO_MODE_GPIO,
-+ .gpio36 = GPIO_MODE_GPIO,
-+ .gpio37 = GPIO_MODE_GPIO,
-+ .gpio38 = GPIO_MODE_GPIO,
-+ .gpio39 = GPIO_MODE_GPIO,
-+ .gpio40 = GPIO_MODE_NATIVE,
-+ .gpio41 = GPIO_MODE_NATIVE,
-+ .gpio42 = GPIO_MODE_NATIVE,
-+ .gpio43 = GPIO_MODE_NATIVE,
-+ .gpio44 = GPIO_MODE_NATIVE,
-+ .gpio45 = GPIO_MODE_GPIO,
-+ .gpio46 = GPIO_MODE_NATIVE,
-+ .gpio47 = GPIO_MODE_NATIVE,
-+ .gpio48 = GPIO_MODE_GPIO,
-+ .gpio49 = GPIO_MODE_GPIO,
-+ .gpio50 = GPIO_MODE_NATIVE,
-+ .gpio51 = GPIO_MODE_GPIO,
-+ .gpio52 = GPIO_MODE_GPIO,
-+ .gpio53 = GPIO_MODE_NATIVE,
-+ .gpio54 = GPIO_MODE_GPIO,
-+ .gpio55 = GPIO_MODE_NATIVE,
-+ .gpio56 = GPIO_MODE_NATIVE,
-+ .gpio57 = GPIO_MODE_GPIO,
-+ .gpio58 = GPIO_MODE_NATIVE,
-+ .gpio59 = GPIO_MODE_NATIVE,
-+ .gpio60 = GPIO_MODE_GPIO,
-+ .gpio61 = GPIO_MODE_NATIVE,
-+ .gpio62 = GPIO_MODE_NATIVE,
-+ .gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+ .gpio33 = GPIO_DIR_INPUT,
-+ .gpio34 = GPIO_DIR_OUTPUT,
-+ .gpio35 = GPIO_DIR_INPUT,
-+ .gpio36 = GPIO_DIR_INPUT,
-+ .gpio37 = GPIO_DIR_INPUT,
-+ .gpio38 = GPIO_DIR_INPUT,
-+ .gpio39 = GPIO_DIR_INPUT,
-+ .gpio45 = GPIO_DIR_OUTPUT,
-+ .gpio48 = GPIO_DIR_INPUT,
-+ .gpio49 = GPIO_DIR_INPUT,
-+ .gpio51 = GPIO_DIR_INPUT,
-+ .gpio52 = GPIO_DIR_INPUT,
-+ .gpio54 = GPIO_DIR_INPUT,
-+ .gpio57 = GPIO_DIR_INPUT,
-+ .gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+ .gpio34 = GPIO_LEVEL_HIGH,
-+ .gpio45 = GPIO_LEVEL_LOW,
-+ .gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+ .gpio64 = GPIO_MODE_NATIVE,
-+ .gpio65 = GPIO_MODE_NATIVE,
-+ .gpio66 = GPIO_MODE_NATIVE,
-+ .gpio67 = GPIO_MODE_NATIVE,
-+ .gpio68 = GPIO_MODE_GPIO,
-+ .gpio69 = GPIO_MODE_GPIO,
-+ .gpio70 = GPIO_MODE_GPIO,
-+ .gpio71 = GPIO_MODE_GPIO,
-+ .gpio72 = GPIO_MODE_NATIVE,
-+ .gpio73 = GPIO_MODE_NATIVE,
-+ .gpio74 = GPIO_MODE_NATIVE,
-+ .gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+ .gpio68 = GPIO_DIR_INPUT,
-+ .gpio69 = GPIO_DIR_INPUT,
-+ .gpio70 = GPIO_DIR_INPUT,
-+ .gpio71 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+ .set1 = {
-+ .mode = &pch_gpio_set1_mode,
-+ .direction = &pch_gpio_set1_direction,
-+ .level = &pch_gpio_set1_level,
-+ .blink = &pch_gpio_set1_blink,
-+ .invert = &pch_gpio_set1_invert,
-+ .reset = &pch_gpio_set1_reset,
-+ },
-+ .set2 = {
-+ .mode = &pch_gpio_set2_mode,
-+ .direction = &pch_gpio_set2_direction,
-+ .level = &pch_gpio_set2_level,
-+ .reset = &pch_gpio_set2_reset,
-+ },
-+ .set3 = {
-+ .mode = &pch_gpio_set3_mode,
-+ .direction = &pch_gpio_set3_direction,
-+ .level = &pch_gpio_set3_level,
-+ .reset = &pch_gpio_set3_reset,
-+ },
-+};
-diff --git a/src/mainboard/dell/e6430/hda_verb.c b/src/mainboard/dell/e6430/hda_verb.c
-new file mode 100644
-index 0000000000..56ada95c58
---- /dev/null
-+++ b/src/mainboard/dell/e6430/hda_verb.c
-@@ -0,0 +1,33 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+ 0x111d76df, /* Codec Vendor / Device ID: IDT */
-+ 0x10280534, /* Subsystem ID */
-+ 11, /* Number of 4 dword sets */
-+ AZALIA_SUBVENDOR(0, 0x10280534),
-+ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
-+ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
-+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+ AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
-+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+ AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+ 0x80862806, /* Codec Vendor / Device ID: Intel */
-+ 0x80860101, /* Subsystem ID */
-+ 4, /* Number of 4 dword sets */
-+ AZALIA_SUBVENDOR(3, 0x80860101),
-+ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/e6430/mainboard.c b/src/mainboard/dell/e6430/mainboard.c
-new file mode 100644
-index 0000000000..31e49802fc
---- /dev/null
-+++ b/src/mainboard/dell/e6430/mainboard.c
-@@ -0,0 +1,21 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+#include <drivers/intel/gma/int15.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+#include <ec/acpi/ec.h>
-+#include <console/console.h>
-+#include <pc80/keyboard.h>
-+
-+static void mainboard_enable(struct device *dev)
-+{
-+
-+ /* FIXME: fix these values. */
-+ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-+ GMA_INT15_PANEL_FIT_DEFAULT,
-+ GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-+}
-+
-+struct chip_operations mainboard_ops = {
-+ .enable_dev = mainboard_enable,
-+};
---
-2.39.2
-
diff --git a/config/coreboot/default/patches/0021-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch b/config/coreboot/default/patches/0021-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
new file mode 100644
index 00000000..9c210c8c
--- /dev/null
+++ b/config/coreboot/default/patches/0021-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
@@ -0,0 +1,449 @@
+From 73313e682ba8808f8db6259ac7d93f54c11cb884 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Wed, 31 Jan 2024 22:07:25 -0700
+Subject: [PATCH 21/65] mb/dell: Add Latitude E6520 (Sandy Bridge)
+
+Mainboard is PAL60/LA-6562P (UMA). The version with an Nvidia dGPU was
+not tested. I do not physically have this system; someone with physical
+access to one sent me the output of autoport which I then modified to
+produce this port. I was also sent the VBT binary, which was obtained
+from `/sys/kernel/debug/dri/0/i915_vbt` while running version A08 of the
+vendor firmware.
+
+This was originally tested and found to be working as a standalone board
+port in Libreboot, but this variant based port in upstream coreboot has
+not been tested.
+
+This can be internally flashed by sending a command to the EC, which
+causes the EC to pull the FDO pin low and the firmware to skip setting
+up any chipset based write protections [1]. The EC is the SMSC MEC5055,
+which seems to be compatible with the existing MEC5035 code.
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Change-Id: Ibdd40cc15642b8d404159d5962670ccc4167a9ec
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig | 9 +
+ .../dell/snb_ivb_latitude/Kconfig.name | 3 +
+ .../snb_ivb_latitude/variants/e6520/data.vbt | Bin 0 -> 6144 bytes
+ .../variants/e6520/early_init.c | 31 +++
+ .../snb_ivb_latitude/variants/e6520/gpio.c | 190 ++++++++++++++++++
+ .../variants/e6520/hda_verb.c | 32 +++
+ .../variants/e6520/overridetree.cb | 35 ++++
+ 7 files changed, 300 insertions(+)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index d2786970ee..72bdc96c0a 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -23,6 +23,12 @@ config BOARD_DELL_LATITUDE_E6420
+ select MAINBOARD_USES_IFD_GBE_REGION
+ select SOUTHBRIDGE_INTEL_BD82X6X
+
++config BOARD_DELL_LATITUDE_E6520
++ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++ select BOARD_ROMSIZE_KB_10240
++ select MAINBOARD_USES_IFD_GBE_REGION
++ select SOUTHBRIDGE_INTEL_BD82X6X
++
+ config BOARD_DELL_LATITUDE_E5530
+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ select BOARD_ROMSIZE_KB_12288
+@@ -50,6 +56,7 @@ config MAINBOARD_DIR
+
+ config MAINBOARD_PART_NUMBER
+ default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
++ default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
+ default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
+ default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
+ default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
+@@ -62,11 +69,13 @@ config USBDEBUG_HCD_INDEX
+
+ config VARIANT_DIR
+ default "e6420" if BOARD_DELL_LATITUDE_E6420
++ default "e6520" if BOARD_DELL_LATITUDE_E6520
+ default "e5530" if BOARD_DELL_LATITUDE_E5530
+ default "e6430" if BOARD_DELL_LATITUDE_E6430
+ default "e6530" if BOARD_DELL_LATITUDE_E6530
+
+ config VGA_BIOS_ID
++ default "8086,0116" if BOARD_DELL_LATITUDE_E6520
+ default "8086,0166" if BOARD_DELL_LATITUDE_E5530
+ default "8086,0126" if BOARD_DELL_LATITUDE_E6420
+ default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index 257d428a70..c7665ac263 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -3,6 +3,9 @@
+ config BOARD_DELL_LATITUDE_E6420
+ bool "Latitude E6420"
+
++config BOARD_DELL_LATITUDE_E6520
++ bool "Latitude E6520"
++
+ config BOARD_DELL_LATITUDE_E5530
+ bool "Latitude E5530"
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..0ef16ee7cb482d2cb91ea80c3f419759355f7ba0
+GIT binary patch
+literal 6144
+zcmeHKZ){Ul6hE);wSB#PZ|mL$bQ^!}HW(eF@H)0JafGfbqsZ9G21{L7Sg{or$5uN)
+z_QgG55e!O(8p8*oBhhF`l$n^QF%rN;rzFNqqcPzFCd5QSB1Y7RKt1=pmTk1aFo9^Y
+z+x+gi_nvdlJ@?#m&wZWW=G#bH>ze$J`&!oe*Q|E0r!)d89LYY8b$aowZEoG-uiIF+
+z#n;$ezm6V<nGnvtc?lrGaf)1_);!W0?uqnojdw-1MQM|dwy`OcF?M@A)KgVV*N2}7
+zcXx+--0R}IwzW3-+`f2k?^Av5V7MpRO-q(9rn_R1@Xlz2Ztdy`$Gf6^w6~|bKi!!7
+z9;xq*^~bxmZQn^<^<`+2s=BdSM%VW2#FguN<FO^QuDhGIFquBu677q|cSj>jWFixQ
+z)4V8f0Gt`D`+>9Fr~tnJ76EJ`5D_F1cn-`0$RgN9unI6kfYkzIiO?W`ON4+34lv1_
+zNdPDkq1cf$p8^EW;TS*O$CdzNo#1fbIG_Oi0T(ti0jwyt0le_p_HlvX^CFvr)>$b>
+zO-z8^CSU`w=mIK7Q)@9fR;XUzrFu{T=rRyygIZBpU9+Or>+?4R9%~G?Y-|g)Z`Sti
+z+do(U*Wb-xR~DzjS<75#=Us4sH^C9U2FCbND7L7u$>M|<;t=AnRfI9C0v8c~AVg7t
+zIU<3D2oK^>L;%r(*o=4*u?Mja@dDyi#4zFn;(f#^#3*76aUSs#;tJv#La-6YLRdQB
+zdcvfERkvH?k~GJlfM<HR476j(@nfm+47<!Ult@^ua5M3h6A}q=C0ognX9aX4mxq)U
+zXOhm=DbLene?C%_16Q)2NRV@Yacz`D;{V>Ve-1?&ZXy}n)YwnVAgNlz#zX;=IX)-F
+z)9LL3lbEdY5Co)LsK?vP)7s}G(5xduE!Y!#Wgh<IN3(3ey=-oWU(9aEJ_HzV53Jbq
+zj5B5RjzLUt>_T&xi$uUA#0e}X3D~`J(bHz;DgTa@GrpW6=>eZwJeNYYo*GjF=``;(
+zuoQ3|V5YoKd$j=KK{`uSX*DeU1oJg=+RT6)rLe6%2>Ci^!5ao=*gS}wFN=nUf`fTF
+zM?Gb5ycWjM7I?MJ!2;w|LFg=UoLq-ytr2iemG)AsW}bI4X9PK}T5UKsQi7anu=tD6
+zf|={kXkNeQBD>6bQ3taC8XJOJ^e40_ydyfr&a41L^1)jNrK<B_wV}+ZE`p;QK=rDz
+zTw`SJ+e`Oc*icaF4INF51Xg*~ts@m)@9ETt(*@N7yy0)Ddce%i9{^k2kbd8=Wns~P
+zWBD$~himxDharxF@f!ti^0$~9Zxt{tg`@Dbl_0Ki2Xp_MEw-<z6qgep;XYmR%Dl-F
+z%3cBfcN;Avikpz-gmw_6mymu!Unk0YgnUfsk3{*6kQ;=S*p(_fS!JhDyYh^k?6uRk
+z?8--W@~NHvY*+ra6SG9iC1s^V)<|@Rqzp*pd5NBslrs`JC(&Oeg~v}CnJ$x+)iP<8
+z=`LA0Ad@39{XkZ}kjXbP{YzHtS!70*yy%LcnJ#cz4u%*Wq!^d*AVMZdr&l=#Qgik~
+ze2l)cX+!kF9EaFhY;0^Uo_#VNC?7K2Tf=ZR1y5);b!mCGG?<cc#M0rtHKYeKi%BE?
+z@Y6|P8fx#li}c`Uv24UGyZaM0To;Ep<_AWZA1t~bFgI)uf}&Eq=L_Cs89=>wnT0Vx
+z-jp>o1ffJNommZ4?=TIPlePIw0hgQ706f*tBC`#pg>9&zRHe>J2%RxBTrOc6Adh9E
+ziJr`?VQH!N!_GkoKaoq|+3$^Ae0#sUxXlmM1Huq~g<=Ls?ILv+nQcH%PQedGOlH=Q
+z77rMcJlH4Mkc#U2(IDv>rsm1aHpsdL_RdT^i_ACcQUMIJcSus}*(?CIiy^#^=t=g1
+z+*^Zbh30&^#_bKclSy9pL$<B~pK8m*sLpIdnHM@W$nA7Ea@Z`x27K?aNK<@lCW(2L
+zb@kB3H8kKy4W3Hu)NN|kd!DL^o#iR9a{QYV-Wl&r&hmIFX{ezkIV<4zFiVUQ@K>ao
+z00DnFy~Uek!JRwhVX!of0)$Sa*X^S~LMQH0<E(UUx}L=|;Kgw(r(4q=nD)T52c|tR
+O?SW|zOncy=dEg(6JAK&z
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c
+new file mode 100644
+index 0000000000..b6415a428b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c
+@@ -0,0 +1,31 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++const struct southbridge_usb_port mainboard_usb_ports[] = {
++ { 1, 1, 0 },
++ { 1, 1, 0 },
++ { 1, 1, 1 },
++ { 1, 1, 1 },
++ { 1, 0, 2 },
++ { 1, 1, 2 },
++ { 1, 0, 3 },
++ { 1, 0, 3 },
++ { 1, 1, 5 },
++ { 1, 1, 5 },
++ { 1, 1, 7 },
++ { 1, 1, 6 },
++ { 1, 0, 6 },
++ { 1, 0, 7 },
++};
++
++void bootblock_mainboard_early_init(void)
++{
++ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++ | COMB_LPC_EN | COMA_LPC_EN);
++ mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/gpio.c
+new file mode 100644
+index 0000000000..61f01816c4
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/gpio.c
+@@ -0,0 +1,190 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++ .gpio0 = GPIO_MODE_GPIO,
++ .gpio1 = GPIO_MODE_NATIVE,
++ .gpio2 = GPIO_MODE_GPIO,
++ .gpio3 = GPIO_MODE_NATIVE,
++ .gpio4 = GPIO_MODE_GPIO,
++ .gpio5 = GPIO_MODE_NATIVE,
++ .gpio6 = GPIO_MODE_GPIO,
++ .gpio7 = GPIO_MODE_GPIO,
++ .gpio8 = GPIO_MODE_GPIO,
++ .gpio9 = GPIO_MODE_NATIVE,
++ .gpio10 = GPIO_MODE_NATIVE,
++ .gpio11 = GPIO_MODE_NATIVE,
++ .gpio12 = GPIO_MODE_NATIVE,
++ .gpio13 = GPIO_MODE_GPIO,
++ .gpio14 = GPIO_MODE_GPIO,
++ .gpio15 = GPIO_MODE_GPIO,
++ .gpio16 = GPIO_MODE_GPIO,
++ .gpio17 = GPIO_MODE_GPIO,
++ .gpio18 = GPIO_MODE_NATIVE,
++ .gpio19 = GPIO_MODE_GPIO,
++ .gpio20 = GPIO_MODE_NATIVE,
++ .gpio21 = GPIO_MODE_GPIO,
++ .gpio22 = GPIO_MODE_GPIO,
++ .gpio23 = GPIO_MODE_NATIVE,
++ .gpio24 = GPIO_MODE_GPIO,
++ .gpio25 = GPIO_MODE_NATIVE,
++ .gpio26 = GPIO_MODE_NATIVE,
++ .gpio27 = GPIO_MODE_GPIO,
++ .gpio28 = GPIO_MODE_GPIO,
++ .gpio29 = GPIO_MODE_GPIO,
++ .gpio30 = GPIO_MODE_GPIO,
++ .gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++ .gpio0 = GPIO_DIR_INPUT,
++ .gpio2 = GPIO_DIR_INPUT,
++ .gpio4 = GPIO_DIR_INPUT,
++ .gpio6 = GPIO_DIR_INPUT,
++ .gpio7 = GPIO_DIR_INPUT,
++ .gpio8 = GPIO_DIR_INPUT,
++ .gpio13 = GPIO_DIR_INPUT,
++ .gpio14 = GPIO_DIR_INPUT,
++ .gpio15 = GPIO_DIR_INPUT,
++ .gpio16 = GPIO_DIR_INPUT,
++ .gpio17 = GPIO_DIR_INPUT,
++ .gpio19 = GPIO_DIR_INPUT,
++ .gpio21 = GPIO_DIR_INPUT,
++ .gpio22 = GPIO_DIR_INPUT,
++ .gpio24 = GPIO_DIR_INPUT,
++ .gpio27 = GPIO_DIR_INPUT,
++ .gpio28 = GPIO_DIR_INPUT,
++ .gpio29 = GPIO_DIR_INPUT,
++ .gpio30 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++ .gpio30 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++ .gpio0 = GPIO_INVERT,
++ .gpio8 = GPIO_INVERT,
++ .gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++ .gpio32 = GPIO_MODE_NATIVE,
++ .gpio33 = GPIO_MODE_GPIO,
++ .gpio34 = GPIO_MODE_GPIO,
++ .gpio35 = GPIO_MODE_GPIO,
++ .gpio36 = GPIO_MODE_GPIO,
++ .gpio37 = GPIO_MODE_GPIO,
++ .gpio38 = GPIO_MODE_GPIO,
++ .gpio39 = GPIO_MODE_GPIO,
++ .gpio40 = GPIO_MODE_NATIVE,
++ .gpio41 = GPIO_MODE_NATIVE,
++ .gpio42 = GPIO_MODE_NATIVE,
++ .gpio43 = GPIO_MODE_NATIVE,
++ .gpio44 = GPIO_MODE_NATIVE,
++ .gpio45 = GPIO_MODE_GPIO,
++ .gpio46 = GPIO_MODE_NATIVE,
++ .gpio47 = GPIO_MODE_NATIVE,
++ .gpio48 = GPIO_MODE_GPIO,
++ .gpio49 = GPIO_MODE_GPIO,
++ .gpio50 = GPIO_MODE_NATIVE,
++ .gpio51 = GPIO_MODE_GPIO,
++ .gpio52 = GPIO_MODE_GPIO,
++ .gpio53 = GPIO_MODE_NATIVE,
++ .gpio54 = GPIO_MODE_GPIO,
++ .gpio55 = GPIO_MODE_NATIVE,
++ .gpio56 = GPIO_MODE_NATIVE,
++ .gpio57 = GPIO_MODE_GPIO,
++ .gpio58 = GPIO_MODE_NATIVE,
++ .gpio59 = GPIO_MODE_NATIVE,
++ .gpio60 = GPIO_MODE_GPIO,
++ .gpio61 = GPIO_MODE_NATIVE,
++ .gpio62 = GPIO_MODE_NATIVE,
++ .gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++ .gpio33 = GPIO_DIR_INPUT,
++ .gpio34 = GPIO_DIR_OUTPUT,
++ .gpio35 = GPIO_DIR_INPUT,
++ .gpio36 = GPIO_DIR_INPUT,
++ .gpio37 = GPIO_DIR_INPUT,
++ .gpio38 = GPIO_DIR_INPUT,
++ .gpio39 = GPIO_DIR_INPUT,
++ .gpio45 = GPIO_DIR_OUTPUT,
++ .gpio48 = GPIO_DIR_INPUT,
++ .gpio49 = GPIO_DIR_OUTPUT,
++ .gpio51 = GPIO_DIR_INPUT,
++ .gpio52 = GPIO_DIR_INPUT,
++ .gpio54 = GPIO_DIR_INPUT,
++ .gpio57 = GPIO_DIR_INPUT,
++ .gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++ .gpio34 = GPIO_LEVEL_HIGH,
++ .gpio45 = GPIO_LEVEL_LOW,
++ .gpio49 = GPIO_LEVEL_LOW,
++ .gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++ .gpio64 = GPIO_MODE_NATIVE,
++ .gpio65 = GPIO_MODE_NATIVE,
++ .gpio66 = GPIO_MODE_NATIVE,
++ .gpio67 = GPIO_MODE_NATIVE,
++ .gpio68 = GPIO_MODE_GPIO,
++ .gpio69 = GPIO_MODE_GPIO,
++ .gpio70 = GPIO_MODE_GPIO,
++ .gpio71 = GPIO_MODE_GPIO,
++ .gpio72 = GPIO_MODE_NATIVE,
++ .gpio73 = GPIO_MODE_NATIVE,
++ .gpio74 = GPIO_MODE_NATIVE,
++ .gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++ .gpio68 = GPIO_DIR_INPUT,
++ .gpio69 = GPIO_DIR_INPUT,
++ .gpio70 = GPIO_DIR_INPUT,
++ .gpio71 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++ .set1 = {
++ .mode = &pch_gpio_set1_mode,
++ .direction = &pch_gpio_set1_direction,
++ .level = &pch_gpio_set1_level,
++ .blink = &pch_gpio_set1_blink,
++ .invert = &pch_gpio_set1_invert,
++ .reset = &pch_gpio_set1_reset,
++ },
++ .set2 = {
++ .mode = &pch_gpio_set2_mode,
++ .direction = &pch_gpio_set2_direction,
++ .level = &pch_gpio_set2_level,
++ .reset = &pch_gpio_set2_reset,
++ },
++ .set3 = {
++ .mode = &pch_gpio_set3_mode,
++ .direction = &pch_gpio_set3_direction,
++ .level = &pch_gpio_set3_level,
++ .reset = &pch_gpio_set3_reset,
++ },
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c
+new file mode 100644
+index 0000000000..ae376691e7
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++ 0x111d76e7, /* Codec Vendor / Device ID: IDT */
++ 0x10280494, /* Subsystem ID */
++ 11, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(0, 0x10280494),
++ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
++ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
++ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++ AZALIA_PIN_CFG(0, 0x11, 0x400000f2),
++ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++ 0x80862805, /* Codec Vendor / Device ID: Intel */
++ 0x80860101, /* Subsystem ID */
++ 4, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(3, 0x80860101),
++ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/overridetree.cb
+new file mode 100644
+index 0000000000..f90f2dee1f
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/overridetree.cb
+@@ -0,0 +1,35 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++ device domain 0 on
++ subsystemid 0x1028 0x0494 inherit
++
++ device ref igd on
++ register "gpu_cpu_backlight" = "0x00001312"
++ register "gpu_pch_backlight" = "0x13121312"
++ end
++
++ chip southbridge/intel/bd82x6x
++ register "usb_port_config" = "{
++ { 1, 1, 0 },
++ { 1, 1, 0 },
++ { 1, 1, 1 },
++ { 1, 1, 1 },
++ { 1, 0, 2 },
++ { 1, 1, 2 },
++ { 1, 1, 3 },
++ { 1, 1, 3 },
++ { 1, 1, 5 },
++ { 1, 1, 5 },
++ { 1, 1, 7 },
++ { 1, 1, 6 },
++ { 1, 0, 6 },
++ { 1, 0, 7 },
++ }"
++
++ device ref sata1 on
++ register "sata_port_map" = "0x3b"
++ end
++ end
++ end
++end
+--
+2.39.5
+
diff --git a/config/coreboot/default/patches/0022-don-t-use-github-for-the-acpica-download.patch b/config/coreboot/default/patches/0022-don-t-use-github-for-the-acpica-download.patch
deleted file mode 100644
index f66909c6..00000000
--- a/config/coreboot/default/patches/0022-don-t-use-github-for-the-acpica-download.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 536a1dd349f590cbefccac7e7364cafcdaec9600 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 22 Oct 2023 15:02:25 +0100
-Subject: [PATCH 22/30] don't use github for the acpica download
-
-i have the tarball from a previous download, and i placed
-it on libreboot rsync, which then got mirrored to princeton.
-
-today, github's ssl cert was b0rking the hell out and i really
-really wanted to finish a build, and didn't want to wait for
-github to fix their httpd.
-
-so i'm now hosting this specific acpica tarball on rsync.
-
-this patch makes that URL be used, instead of the github one.
-
-that's the 2nd time i've had to patch coreboot's acpica download!
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 23a5caf2bb..36565a906c 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -72,7 +72,7 @@ MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
- MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
- GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
- BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
--IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
-+IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
- # CLANG toolchain archive locations
- LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
- CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
---
-2.39.2
-
diff --git a/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch b/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch
new file mode 100644
index 00000000..3a580662
--- /dev/null
+++ b/config/coreboot/default/patches/0022-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch
@@ -0,0 +1,442 @@
+From a7e2fde426280a944916c341586361f3ac9fa9a8 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Wed, 7 Feb 2024 10:23:38 -0700
+Subject: [PATCH 22/65] mb/dell: Add Latitude E5520 (Sandy Bridge)
+
+Mainboard is Krug 15". I do not physically have this system; someone
+with physical access to one sent me the output of autoport which I then
+modified to produce this port. I was also sent the VBT binary, which was
+obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running version
+A14 of the vendor firmware.
+
+This was originally tested and found to be working as a standalone
+board port in Libreboot, but this variant based port in upstream
+coreboot has not been tested.
+
+This can be internally flashed by sending a command to the EC, which
+causes the EC to pull the FDO pin low and the firmware to skip setting
+up any chipset based write protections [1]. The EC is the SMSC MEC5055,
+which seems to be compatible with the existing MEC5035 code.
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Change-Id: Ic9bfc028d4b8ae01ccc019157bb53e7764671134
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig | 10 +-
+ .../dell/snb_ivb_latitude/Kconfig.name | 3 +
+ .../snb_ivb_latitude/variants/e5520/data.vbt | Bin 0 -> 6144 bytes
+ .../variants/e5520/early_init.c | 14 ++
+ .../snb_ivb_latitude/variants/e5520/gpio.c | 195 ++++++++++++++++++
+ .../variants/e5520/hda_verb.c | 32 +++
+ .../variants/e5520/overridetree.cb | 39 ++++
+ 7 files changed, 292 insertions(+), 1 deletion(-)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index 72bdc96c0a..4e94a7ef80 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -17,6 +17,11 @@ config BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ select SYSTEM_TYPE_LAPTOP
+ select USE_NATIVE_RAMINIT
+
++config BOARD_DELL_LATITUDE_E5520
++ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++ select BOARD_ROMSIZE_KB_6144
++ select SOUTHBRIDGE_INTEL_BD82X6X
++
+ config BOARD_DELL_LATITUDE_E6420
+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ select BOARD_ROMSIZE_KB_10240
+@@ -55,6 +60,7 @@ config MAINBOARD_DIR
+ default "dell/snb_ivb_latitude"
+
+ config MAINBOARD_PART_NUMBER
++ default "Latitude E5520" if BOARD_DELL_LATITUDE_E5520
+ default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
+ default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
+ default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
+@@ -68,6 +74,7 @@ config USBDEBUG_HCD_INDEX
+ default 2
+
+ config VARIANT_DIR
++ default "e5520" if BOARD_DELL_LATITUDE_E5520
+ default "e6420" if BOARD_DELL_LATITUDE_E6420
+ default "e6520" if BOARD_DELL_LATITUDE_E6520
+ default "e5530" if BOARD_DELL_LATITUDE_E5530
+@@ -77,7 +84,8 @@ config VARIANT_DIR
+ config VGA_BIOS_ID
+ default "8086,0116" if BOARD_DELL_LATITUDE_E6520
+ default "8086,0166" if BOARD_DELL_LATITUDE_E5530
+- default "8086,0126" if BOARD_DELL_LATITUDE_E6420
++ default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \
++ || BOARD_DELL_LATITUDE_E5520
+ default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
+ || BOARD_DELL_LATITUDE_E6530
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index c7665ac263..7976691f21 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -1,5 +1,8 @@
+ ## SPDX-License-Identifier: GPL-2.0-only
+
++config BOARD_DELL_LATITUDE_E5520
++ bool "Latitude E5520"
++
+ config BOARD_DELL_LATITUDE_E6420
+ bool "Latitude E6420"
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..b511e75262e37fa123d674e9a7b21a8dfe427729
+GIT binary patch
+literal 6144
+zcmeHKZ){Ul6hE);wSBvNZ|mL$bmQOM2BTvXUI!}^N9ejTij1vnu+)Wx6<c9(Y_%K6
+zzOV-@f<ehpWB5RHBpMBgG7}RuMuM2=l*E{6G$wq&gqTQ3#E2RZsOP@dvW*rP7>Fjj
+z&F`Lj?>YC}bI(2Z+}C+6zKyiGrosQXuW7A+&1%<rN+Y1ck(}dLrx)Ma#^x>lnvFGE
+zeD#gB>*#Tq4&j^|7Xcz1r^pp*)g#T}u1Me3ct>Pgls5Qi3!6e2W0%`a-Ic|3efWuR
+zXJ@#}wJyGMTXTcY<%@TBKh@(3hP$Gjv}E}rx-%9D_eLXhYe!c&-VyDg-Cdo1>Biji
+zNNsnlFW#|jdoOj?mZ43m>cVO%UE9@*E7x|%V~c4`XD4l9GCi~@+7pfMibfX8L?!^I
+zc~Rg1I5SxH1DAEZ0{jA41jrJBh#-l;b6^%g7QrThRe)&%tQH_!ggOD7A_PRRgGuI0
+z0zi=n#rCB66d-sO$M~^6wgeb$2fH1|0R`v}xUiWCU`4SF;Dyh&j|mK&6WJWJ&Pq9I
+zVgmFQfh+)vE}(KWwHA|Oh3fSkss|;2E(2i}s1?gRRV%8!K7U={vHD=s#+Fd)W^M1j
+z{R4$??VSvEWpgT=vCM&1-U$bI6CB~IV3Z$$Vv7o!EDnev4j~R(MHsazZ~^fLLKGF4
+zEfQFOa3dZ?1Q1P#&4?!vyAk^k&m&$z3?WV+-b0*1j37o4=MX<3E+eiYge(Ht2umAW
+zOPDmU>UL{flI9u|@JtVvfp#o8ek?VfVV9YP5(%pnZX~{PKq4WoWGmV8t$=Ri@{zLQ
+zNYYt4<$0Ry&qIoG;7s-t333)Nu8opN{NG!)&!I@eO(cVx8vBVEBvotJ7%yNl$7iQ_
+zI=xk30+V$ff`F6<wRoF(TK%j9nsr#H23umU%)_7jNOl%*FPU567qbg;4gtp711nj2
+z#+kHw`v4|5cA+`UMIvAl;slnH1nl0v=xH<al>1}ljxDE1dcda^&!do|r^eJkI?aC-
+zEQMSfm?<w*Unzumkj_w5>VYL6W4=aCiy4rk%xq~5LV?bi|GL2$G7li<%c7yd;6T34
+zQBN5huZ3~6`ChGkpb$Bg5ITb#2iK-qs|1`=sl6Dhn(Lj&8Agt?S{sTDmmtRj7Jm_1
+zFnt{w&FdFkWS3bl>OeL?eO+*i{)9G!cSI-InGt|U0eEYmRCOHm7|I;#LO8ksRIeJ#
+zGe+jTwPg4C4TYuN(9zULV3k+hI$YuPo=%N8oZ#u_4S!3Xelt6N0BmuC`hCNeg+&97
+z6*!>)uHvr%2004GZv?!_-y&|TRmil=9D%Q`1aXBsnD^gov3*UZI34&1_vn(B=T4kZ
+z_A>ClXVIBNaS^hd&^DrU6VgZMYeadMkdFxcktn|ra-Gl;n^I{bt86rCQ=YMry*B!$
+zP5ID9KDE)GZOY#^VwPyRq^y+48j0?ZlzxdkC()CV@`*&wO7vGr;qjA3rb}gIwM-gi
+zx>HsT$mEDj-<OpyWb%zn|B@A3Hkp<!FT5;hrt_SZiy?*wDaIu{h>%Ir=@rh7)SR;b
+zAEWQGv_X1)wq0y5Ha0c~&psIsln<Hiu3;#Lf;%*eI<@?p8cfMJV(IYi8q$NA#iS8`
+z_~|4t4b^wtMSAeFST^F8-Tm<zu8D&j^8=&I4;I}Im>aeSK~X8*^Z9SE44_`P#KIUL
+zf6^N2f>5HCPWM3N+f0MyWOV^kz~!-wVc4MRXOY>4Jsxd1RyBKEMzNf{RKhesKFdbq
+zJ(*d<l2Y#n?E?~iBA39P?~Pr2d#}5=#Sfl-VGzGUF$4U2KcqCIVlwkC(&7PQk_X!a
+z8}3Jgq-&U*Co|h1>l)ZQGyW_x->i#;FvQ*=Nv&nG0N5@D@jjv_Q}K}6MP?1A6`JGe
+zDwj9pN+x;T4>`I9e5x(uqdK#OGB31ikk@Xv=dxLb4fx(;ktX@rOb~M~?dYQQYiPia
+z8r;jUQ?sd2@3||-cb2Eb%JFYfxHsONoaJ^eqoKN{<g9?-%`7oWz+aJS0tEc!^d@hD
+z1-I{%hr!Y?0uVZpUbl__37xn@jkD6Z>3SATgBQlEoN7&ZV9Eni9+>jLln16fFy(=V
+H=7E0zE^L4Z
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c
+new file mode 100644
+index 0000000000..ff83db095b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c
+@@ -0,0 +1,14 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++void bootblock_mainboard_early_init(void)
++{
++ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++ | COMB_LPC_EN | COMA_LPC_EN);
++ mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/gpio.c
+new file mode 100644
+index 0000000000..f76b93d9f0
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/gpio.c
+@@ -0,0 +1,195 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++ .gpio0 = GPIO_MODE_GPIO,
++ .gpio1 = GPIO_MODE_NATIVE,
++ .gpio2 = GPIO_MODE_GPIO,
++ .gpio3 = GPIO_MODE_GPIO,
++ .gpio4 = GPIO_MODE_GPIO,
++ .gpio5 = GPIO_MODE_NATIVE,
++ .gpio6 = GPIO_MODE_GPIO,
++ .gpio7 = GPIO_MODE_GPIO,
++ .gpio8 = GPIO_MODE_GPIO,
++ .gpio9 = GPIO_MODE_NATIVE,
++ .gpio10 = GPIO_MODE_NATIVE,
++ .gpio11 = GPIO_MODE_NATIVE,
++ .gpio12 = GPIO_MODE_GPIO,
++ .gpio13 = GPIO_MODE_GPIO,
++ .gpio14 = GPIO_MODE_GPIO,
++ .gpio15 = GPIO_MODE_GPIO,
++ .gpio16 = GPIO_MODE_NATIVE,
++ .gpio17 = GPIO_MODE_GPIO,
++ .gpio18 = GPIO_MODE_NATIVE,
++ .gpio19 = GPIO_MODE_GPIO,
++ .gpio20 = GPIO_MODE_NATIVE,
++ .gpio21 = GPIO_MODE_GPIO,
++ .gpio22 = GPIO_MODE_GPIO,
++ .gpio23 = GPIO_MODE_NATIVE,
++ .gpio24 = GPIO_MODE_GPIO,
++ .gpio25 = GPIO_MODE_NATIVE,
++ .gpio26 = GPIO_MODE_NATIVE,
++ .gpio27 = GPIO_MODE_GPIO,
++ .gpio28 = GPIO_MODE_GPIO,
++ .gpio29 = GPIO_MODE_GPIO,
++ .gpio30 = GPIO_MODE_GPIO,
++ .gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++ .gpio0 = GPIO_DIR_INPUT,
++ .gpio2 = GPIO_DIR_INPUT,
++ .gpio3 = GPIO_DIR_INPUT,
++ .gpio4 = GPIO_DIR_INPUT,
++ .gpio6 = GPIO_DIR_INPUT,
++ .gpio7 = GPIO_DIR_INPUT,
++ .gpio8 = GPIO_DIR_INPUT,
++ .gpio12 = GPIO_DIR_OUTPUT,
++ .gpio13 = GPIO_DIR_INPUT,
++ .gpio14 = GPIO_DIR_INPUT,
++ .gpio15 = GPIO_DIR_INPUT,
++ .gpio17 = GPIO_DIR_INPUT,
++ .gpio19 = GPIO_DIR_INPUT,
++ .gpio21 = GPIO_DIR_INPUT,
++ .gpio22 = GPIO_DIR_INPUT,
++ .gpio24 = GPIO_DIR_INPUT,
++ .gpio27 = GPIO_DIR_INPUT,
++ .gpio28 = GPIO_DIR_INPUT,
++ .gpio29 = GPIO_DIR_INPUT,
++ .gpio30 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++ .gpio12 = GPIO_LEVEL_HIGH,
++ .gpio30 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++ .gpio0 = GPIO_INVERT,
++ .gpio8 = GPIO_INVERT,
++ .gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++ .gpio32 = GPIO_MODE_NATIVE,
++ .gpio33 = GPIO_MODE_GPIO,
++ .gpio34 = GPIO_MODE_GPIO,
++ .gpio35 = GPIO_MODE_GPIO,
++ .gpio36 = GPIO_MODE_GPIO,
++ .gpio37 = GPIO_MODE_GPIO,
++ .gpio38 = GPIO_MODE_GPIO,
++ .gpio39 = GPIO_MODE_GPIO,
++ .gpio40 = GPIO_MODE_NATIVE,
++ .gpio41 = GPIO_MODE_NATIVE,
++ .gpio42 = GPIO_MODE_NATIVE,
++ .gpio43 = GPIO_MODE_NATIVE,
++ .gpio44 = GPIO_MODE_NATIVE,
++ .gpio45 = GPIO_MODE_NATIVE,
++ .gpio46 = GPIO_MODE_GPIO,
++ .gpio47 = GPIO_MODE_NATIVE,
++ .gpio48 = GPIO_MODE_GPIO,
++ .gpio49 = GPIO_MODE_NATIVE,
++ .gpio50 = GPIO_MODE_GPIO,
++ .gpio51 = GPIO_MODE_GPIO,
++ .gpio52 = GPIO_MODE_GPIO,
++ .gpio53 = GPIO_MODE_GPIO,
++ .gpio54 = GPIO_MODE_GPIO,
++ .gpio55 = GPIO_MODE_GPIO,
++ .gpio56 = GPIO_MODE_GPIO,
++ .gpio57 = GPIO_MODE_GPIO,
++ .gpio58 = GPIO_MODE_NATIVE,
++ .gpio59 = GPIO_MODE_NATIVE,
++ .gpio60 = GPIO_MODE_GPIO,
++ .gpio61 = GPIO_MODE_NATIVE,
++ .gpio62 = GPIO_MODE_NATIVE,
++ .gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++ .gpio33 = GPIO_DIR_INPUT,
++ .gpio34 = GPIO_DIR_OUTPUT,
++ .gpio35 = GPIO_DIR_INPUT,
++ .gpio36 = GPIO_DIR_INPUT,
++ .gpio37 = GPIO_DIR_OUTPUT,
++ .gpio38 = GPIO_DIR_INPUT,
++ .gpio39 = GPIO_DIR_INPUT,
++ .gpio46 = GPIO_DIR_OUTPUT,
++ .gpio48 = GPIO_DIR_INPUT,
++ .gpio50 = GPIO_DIR_OUTPUT,
++ .gpio51 = GPIO_DIR_OUTPUT,
++ .gpio52 = GPIO_DIR_INPUT,
++ .gpio53 = GPIO_DIR_INPUT,
++ .gpio54 = GPIO_DIR_INPUT,
++ .gpio55 = GPIO_DIR_OUTPUT,
++ .gpio56 = GPIO_DIR_INPUT,
++ .gpio57 = GPIO_DIR_INPUT,
++ .gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++ .gpio34 = GPIO_LEVEL_LOW,
++ .gpio37 = GPIO_LEVEL_LOW,
++ .gpio46 = GPIO_LEVEL_HIGH,
++ .gpio50 = GPIO_LEVEL_HIGH,
++ .gpio51 = GPIO_LEVEL_LOW,
++ .gpio55 = GPIO_LEVEL_LOW,
++ .gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++ .gpio64 = GPIO_MODE_NATIVE,
++ .gpio65 = GPIO_MODE_NATIVE,
++ .gpio66 = GPIO_MODE_NATIVE,
++ .gpio67 = GPIO_MODE_NATIVE,
++ .gpio68 = GPIO_MODE_NATIVE,
++ .gpio69 = GPIO_MODE_NATIVE,
++ .gpio70 = GPIO_MODE_NATIVE,
++ .gpio71 = GPIO_MODE_NATIVE,
++ .gpio72 = GPIO_MODE_NATIVE,
++ .gpio73 = GPIO_MODE_NATIVE,
++ .gpio74 = GPIO_MODE_GPIO,
++ .gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++ .gpio74 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++ .set1 = {
++ .mode = &pch_gpio_set1_mode,
++ .direction = &pch_gpio_set1_direction,
++ .level = &pch_gpio_set1_level,
++ .blink = &pch_gpio_set1_blink,
++ .invert = &pch_gpio_set1_invert,
++ .reset = &pch_gpio_set1_reset,
++ },
++ .set2 = {
++ .mode = &pch_gpio_set2_mode,
++ .direction = &pch_gpio_set2_direction,
++ .level = &pch_gpio_set2_level,
++ .reset = &pch_gpio_set2_reset,
++ },
++ .set3 = {
++ .mode = &pch_gpio_set3_mode,
++ .direction = &pch_gpio_set3_direction,
++ .level = &pch_gpio_set3_level,
++ .reset = &pch_gpio_set3_reset,
++ },
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c
+new file mode 100644
+index 0000000000..1373975352
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++ 0x111d76e7, /* Codec Vendor / Device ID: IDT */
++ 0x1028049a, /* Subsystem ID */
++ 11, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(0, 0x1028049a),
++ AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
++ AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
++ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++ AZALIA_PIN_CFG(0, 0x11, 0xd5a301a0),
++ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++ 0x80862805, /* Codec Vendor / Device ID: Intel */
++ 0x80860101, /* Subsystem ID */
++ 4, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(3, 0x80860101),
++ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/overridetree.cb
+new file mode 100644
+index 0000000000..479d1b696e
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/overridetree.cb
+@@ -0,0 +1,39 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++ device domain 0 on
++ subsystemid 0x1028 0x049a inherit
++
++ device ref igd on
++ register "gpu_cpu_backlight" = "0x00000218"
++ register "gpu_pch_backlight" = "0x13121312"
++ end
++
++ chip southbridge/intel/bd82x6x
++ register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 1, 0 }"
++ register "usb_port_config" = "{
++ { 1, 1, 0 },
++ { 1, 1, 0 },
++ { 1, 1, 1 },
++ { 1, 1, 1 },
++ { 1, 1, 2 },
++ { 1, 1, 2 },
++ { 1, 1, 3 },
++ { 1, 1, 3 },
++ { 1, 1, 5 },
++ { 1, 1, 5 },
++ { 1, 1, 7 },
++ { 1, 1, 6 },
++ { 1, 1, 6 },
++ { 1, 1, 7 },
++ }"
++
++ device ref gbe off end
++ device ref pcie_rp4 off end
++ device ref pcie_rp7 on end # Broadcom BCM5761 Gigabit Ethernet
++ device ref sata1 on
++ register "sata_port_map" = "0x3b"
++ end
++ end
++ end
++end
+--
+2.39.5
+
diff --git a/config/coreboot/default/patches/0023-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch b/config/coreboot/default/patches/0023-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
new file mode 100644
index 00000000..4a7a6bf9
--- /dev/null
+++ b/config/coreboot/default/patches/0023-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
@@ -0,0 +1,442 @@
+From f781a8bac250d4902ec3e7caa0628c77836a8ae3 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Mon, 4 Mar 2024 18:05:43 -0700
+Subject: [PATCH 23/65] mb/dell: Add Latitude E5420 (Sandy Bridge)
+
+Mainboard is Krug 14". I do not physically have this system; someone
+with physical access to one sent me the output of autoport which I then
+modified to produce this port. I was also sent the VBT binary, which was
+obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running version
+A02 of the vendor firmware.
+
+This was originally tested and found to be working as a standalone board
+port in Libreboot, but this variant based port in upstream coreboot has
+not been tested.
+
+This can be internally flashed by sending a command to the EC, which
+causes the EC to pull the FDO pin low and the firmware to skip setting
+up any chipset based write protections [1]. The EC is the SMSC MEC5055,
+which seems to be compatible with the existing MEC5035 code.
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Change-Id: I0283653156083768e1fd451bcf539b4e028589f4
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig | 10 +-
+ .../dell/snb_ivb_latitude/Kconfig.name | 3 +
+ .../snb_ivb_latitude/variants/e5420/data.vbt | Bin 0 -> 6144 bytes
+ .../variants/e5420/early_init.c | 14 ++
+ .../snb_ivb_latitude/variants/e5420/gpio.c | 195 ++++++++++++++++++
+ .../variants/e5420/hda_verb.c | 32 +++
+ .../variants/e5420/overridetree.cb | 39 ++++
+ 7 files changed, 292 insertions(+), 1 deletion(-)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index 4e94a7ef80..e6a21ffb99 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -17,6 +17,11 @@ config BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ select SYSTEM_TYPE_LAPTOP
+ select USE_NATIVE_RAMINIT
+
++config BOARD_DELL_LATITUDE_E5420
++ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++ select BOARD_ROMSIZE_KB_6144
++ select SOUTHBRIDGE_INTEL_BD82X6X
++
+ config BOARD_DELL_LATITUDE_E5520
+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ select BOARD_ROMSIZE_KB_6144
+@@ -60,6 +65,7 @@ config MAINBOARD_DIR
+ default "dell/snb_ivb_latitude"
+
+ config MAINBOARD_PART_NUMBER
++ default "Latitude E5420" if BOARD_DELL_LATITUDE_E5420
+ default "Latitude E5520" if BOARD_DELL_LATITUDE_E5520
+ default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
+ default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
+@@ -74,6 +80,7 @@ config USBDEBUG_HCD_INDEX
+ default 2
+
+ config VARIANT_DIR
++ default "e5420" if BOARD_DELL_LATITUDE_E5420
+ default "e5520" if BOARD_DELL_LATITUDE_E5520
+ default "e6420" if BOARD_DELL_LATITUDE_E6420
+ default "e6520" if BOARD_DELL_LATITUDE_E6520
+@@ -82,7 +89,8 @@ config VARIANT_DIR
+ default "e6530" if BOARD_DELL_LATITUDE_E6530
+
+ config VGA_BIOS_ID
+- default "8086,0116" if BOARD_DELL_LATITUDE_E6520
++ default "8086,0116" if BOARD_DELL_LATITUDE_E6520 \
++ || BOARD_DELL_LATITUDE_E5420
+ default "8086,0166" if BOARD_DELL_LATITUDE_E5530
+ default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \
+ || BOARD_DELL_LATITUDE_E5520
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index 7976691f21..a3fa2b1837 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -1,5 +1,8 @@
+ ## SPDX-License-Identifier: GPL-2.0-only
+
++config BOARD_DELL_LATITUDE_E5420
++ bool "Latitude E5420"
++
+ config BOARD_DELL_LATITUDE_E5520
+ bool "Latitude E5520"
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..98b82fe6110fd295b5749041ec7f8c084ace5f57
+GIT binary patch
+literal 6144
+zcmeHKeQZ-z6hE);wSBvNZ!2$ObQ^;MgV6zl*Rhp}BXnCCMZU^_r7jRwT!kfLo8?3H
+zk9)u(7?cb(hChhTM57@QFfmbMB!G!dNsO6BW5OSp5EGF^jHnTTdhUBI+h`e+1ft1q
+z^SfW?+;h)4_uO+|XEfEV$91)<gOArWE)OnSTD}Ug6?8a~vz+SmQn!4~y3N7b^|hPp
+zR<5aEfv-b8M00Lk251!oO|8(YA6XaeXzkt-Z)@Ee!_{@z#Fro^?DqN4SGjRIu8KYp
+zZEufuU@5MM@7jv%h;75FS}ezKv?JDzCH}d%tE)A-GuDb*+B%}~w%88r>}c;!*XQ5O
+z)OU7u$J@4U+lk)#GSW%c%c)v`%R6?`w)LIyu6bD7-j0o&X9qUMcEsYlW3BU4rZRvt
+zqAUpjf*qXuLCCsU0YM2I5@gB1WKd)f1+Yt?%HWd0DZxYumP(K<LxTif8A39+!KMl}
+z31FHG)7?qk5g>e?=ER{f^&}W<0k@mxff(?6+Stw+s6y%k1mM$cLk#^FWWI*9bE1GY
+z&VY9?WC1u#23^3^UYw5?H0x2S2gN`x18Fko6_x(#MKyuCU_<D!mEp$qO_An}#@>DV
+zdkf*li41yW3p$*0Oo3+63kO6S91*KwP#l2i4jnc)JkUirL^$k}VbH0;CBh#BS=OLf
+zW-yE3BRon75gG{_2~QIC5cUzCC%i)FCmbidM>tIwAPf>N5Pl?FC0r*+Sq!oXj!keQ
+zVKcyK>TL+gc7oLco$28+FpeeXkEP}_Sea=mk#IWUR^m$!BogvszLPu83FJm0k6K<l
+z$#$~YiXtY*GpHp#@FvHJ1UnBD*H%d+{_j24XE4nmBa*?5mOWiold28s3}>*}<HaeO
+z+1|-8g2)FCfkDZIdb-Ub);z0#;XEbPfGe?A72!{DAUg|$m+Z~(i@h9j4gtm611ni(
+z#u>ACcP}M4exU`*MKVwl5+t6JBpTkmm}xWflKUe~7}`!#%z#gAo{NxUrpDAndYktu
+zI0}VLU`J7^xmF1AFiz5S^uzp*DPI$%$qq!(ikh0kP+(GKzF|@N?Y%_#Vp@M+xHr$F
+z=%+18z`-fT%z)9-TS$~Dh@2yeN7!UIt0h`fWxUu`JvA_ra*8P48l%7KR0&c1;0R75
+z4f0oz(xQ3MWqz5>qW5M4tZWExHs8<H(e1G@4km@5wEzOOP^x<l`YmA|eKs6j3wl8B
+z%C%;uygh%<#kGZ{fymL+OlV0!-*T!V5IB>X@p!@CBU=7e{5^Jl{s7by`po-AJqM2l
+znk(=^0bHkF0rUw7)^7j;$=_UIs8`6P6b-;vPDZ#U9L)W1_PAYRDP9k~;5$stt5ZiV
+zD0>;i-?OlYY2}P9WVnfGos4xee2r=EGWHR}ADH$VV>cO=xU?!4TjIi)OMBYI_PX#b
+zm-eBHed5BOT-x6*W>;{IqAga~G6lCQT93k>Q}CpsomJR*1%FjEkv?fuT%c-8RklXO
+zU8;6KWk*zeU)4TW+1D!mrE0EhHZfbBeN{4S7X@Pig%};A99QTdA~wZruL*8y?K!jP
+zG5R*k=);S}Zn<T;W!Mxt`(!+z7_r@3LVpf|FESauM&4}+wqzXfba-zG>A}on(uzNF
+zyu>BcjA})C@bg%<;+Eh2;Sz4heFFCbZ@C{FrXMIbYzu>?Bi-|vZ}JSFU%JA>7$7et
+z0Yo%CnOVZm#ZA}4kWZOn15};h5*#OM3b+6vHzgruMP>=5MNJK1y42{YgveP-!j%#(
+z0rGe@8t%!=66Ti%K4|Gx=o7gFp83wQ;+s3H7+r^SKlpp3KKcr!3@|n;NCH_=qL=3T
+zq3WH?en`b+W-HR-fnrhw*9aZ%M}lHX7@H?E>!6wv_&YQFEHdA$%Z1R--yub>=c@p?
+z6@7Fc$&>sAxwiz{BE$1kb$K9Co=ozlA973y^i(^BM|EZ$$^y`0KyHiMJ%O*XbfEX1
+ziZaH>W(1pWL0bo|T!x__N$^$DpmxI=bL6WUK3JGyn?rw-qC4ZA$yGjIB}N(=ldD2O
+zAJ@bxp<qR-3lIv<!P~SE8r*#_Ckl?$0|1fZ>2>n}u*mUIYFd>}O_wuwBD^r9<#=!0
+X1LGbT_rSOZ#yv3ZfpHH!G!Og(1Xg~J
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c
+new file mode 100644
+index 0000000000..ff83db095b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c
+@@ -0,0 +1,14 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++void bootblock_mainboard_early_init(void)
++{
++ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++ | COMB_LPC_EN | COMA_LPC_EN);
++ mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/gpio.c
+new file mode 100644
+index 0000000000..f76b93d9f0
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/gpio.c
+@@ -0,0 +1,195 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++ .gpio0 = GPIO_MODE_GPIO,
++ .gpio1 = GPIO_MODE_NATIVE,
++ .gpio2 = GPIO_MODE_GPIO,
++ .gpio3 = GPIO_MODE_GPIO,
++ .gpio4 = GPIO_MODE_GPIO,
++ .gpio5 = GPIO_MODE_NATIVE,
++ .gpio6 = GPIO_MODE_GPIO,
++ .gpio7 = GPIO_MODE_GPIO,
++ .gpio8 = GPIO_MODE_GPIO,
++ .gpio9 = GPIO_MODE_NATIVE,
++ .gpio10 = GPIO_MODE_NATIVE,
++ .gpio11 = GPIO_MODE_NATIVE,
++ .gpio12 = GPIO_MODE_GPIO,
++ .gpio13 = GPIO_MODE_GPIO,
++ .gpio14 = GPIO_MODE_GPIO,
++ .gpio15 = GPIO_MODE_GPIO,
++ .gpio16 = GPIO_MODE_NATIVE,
++ .gpio17 = GPIO_MODE_GPIO,
++ .gpio18 = GPIO_MODE_NATIVE,
++ .gpio19 = GPIO_MODE_GPIO,
++ .gpio20 = GPIO_MODE_NATIVE,
++ .gpio21 = GPIO_MODE_GPIO,
++ .gpio22 = GPIO_MODE_GPIO,
++ .gpio23 = GPIO_MODE_NATIVE,
++ .gpio24 = GPIO_MODE_GPIO,
++ .gpio25 = GPIO_MODE_NATIVE,
++ .gpio26 = GPIO_MODE_NATIVE,
++ .gpio27 = GPIO_MODE_GPIO,
++ .gpio28 = GPIO_MODE_GPIO,
++ .gpio29 = GPIO_MODE_GPIO,
++ .gpio30 = GPIO_MODE_GPIO,
++ .gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++ .gpio0 = GPIO_DIR_INPUT,
++ .gpio2 = GPIO_DIR_INPUT,
++ .gpio3 = GPIO_DIR_INPUT,
++ .gpio4 = GPIO_DIR_INPUT,
++ .gpio6 = GPIO_DIR_INPUT,
++ .gpio7 = GPIO_DIR_INPUT,
++ .gpio8 = GPIO_DIR_INPUT,
++ .gpio12 = GPIO_DIR_OUTPUT,
++ .gpio13 = GPIO_DIR_INPUT,
++ .gpio14 = GPIO_DIR_INPUT,
++ .gpio15 = GPIO_DIR_INPUT,
++ .gpio17 = GPIO_DIR_INPUT,
++ .gpio19 = GPIO_DIR_INPUT,
++ .gpio21 = GPIO_DIR_INPUT,
++ .gpio22 = GPIO_DIR_INPUT,
++ .gpio24 = GPIO_DIR_INPUT,
++ .gpio27 = GPIO_DIR_INPUT,
++ .gpio28 = GPIO_DIR_INPUT,
++ .gpio29 = GPIO_DIR_INPUT,
++ .gpio30 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++ .gpio12 = GPIO_LEVEL_HIGH,
++ .gpio30 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++ .gpio0 = GPIO_INVERT,
++ .gpio8 = GPIO_INVERT,
++ .gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++ .gpio32 = GPIO_MODE_NATIVE,
++ .gpio33 = GPIO_MODE_GPIO,
++ .gpio34 = GPIO_MODE_GPIO,
++ .gpio35 = GPIO_MODE_GPIO,
++ .gpio36 = GPIO_MODE_GPIO,
++ .gpio37 = GPIO_MODE_GPIO,
++ .gpio38 = GPIO_MODE_GPIO,
++ .gpio39 = GPIO_MODE_GPIO,
++ .gpio40 = GPIO_MODE_NATIVE,
++ .gpio41 = GPIO_MODE_NATIVE,
++ .gpio42 = GPIO_MODE_NATIVE,
++ .gpio43 = GPIO_MODE_NATIVE,
++ .gpio44 = GPIO_MODE_NATIVE,
++ .gpio45 = GPIO_MODE_NATIVE,
++ .gpio46 = GPIO_MODE_GPIO,
++ .gpio47 = GPIO_MODE_NATIVE,
++ .gpio48 = GPIO_MODE_GPIO,
++ .gpio49 = GPIO_MODE_NATIVE,
++ .gpio50 = GPIO_MODE_GPIO,
++ .gpio51 = GPIO_MODE_GPIO,
++ .gpio52 = GPIO_MODE_GPIO,
++ .gpio53 = GPIO_MODE_GPIO,
++ .gpio54 = GPIO_MODE_GPIO,
++ .gpio55 = GPIO_MODE_GPIO,
++ .gpio56 = GPIO_MODE_GPIO,
++ .gpio57 = GPIO_MODE_GPIO,
++ .gpio58 = GPIO_MODE_NATIVE,
++ .gpio59 = GPIO_MODE_NATIVE,
++ .gpio60 = GPIO_MODE_GPIO,
++ .gpio61 = GPIO_MODE_NATIVE,
++ .gpio62 = GPIO_MODE_NATIVE,
++ .gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++ .gpio33 = GPIO_DIR_INPUT,
++ .gpio34 = GPIO_DIR_OUTPUT,
++ .gpio35 = GPIO_DIR_INPUT,
++ .gpio36 = GPIO_DIR_INPUT,
++ .gpio37 = GPIO_DIR_OUTPUT,
++ .gpio38 = GPIO_DIR_INPUT,
++ .gpio39 = GPIO_DIR_INPUT,
++ .gpio46 = GPIO_DIR_OUTPUT,
++ .gpio48 = GPIO_DIR_INPUT,
++ .gpio50 = GPIO_DIR_OUTPUT,
++ .gpio51 = GPIO_DIR_OUTPUT,
++ .gpio52 = GPIO_DIR_INPUT,
++ .gpio53 = GPIO_DIR_INPUT,
++ .gpio54 = GPIO_DIR_INPUT,
++ .gpio55 = GPIO_DIR_OUTPUT,
++ .gpio56 = GPIO_DIR_INPUT,
++ .gpio57 = GPIO_DIR_INPUT,
++ .gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++ .gpio34 = GPIO_LEVEL_LOW,
++ .gpio37 = GPIO_LEVEL_LOW,
++ .gpio46 = GPIO_LEVEL_HIGH,
++ .gpio50 = GPIO_LEVEL_HIGH,
++ .gpio51 = GPIO_LEVEL_LOW,
++ .gpio55 = GPIO_LEVEL_LOW,
++ .gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++ .gpio64 = GPIO_MODE_NATIVE,
++ .gpio65 = GPIO_MODE_NATIVE,
++ .gpio66 = GPIO_MODE_NATIVE,
++ .gpio67 = GPIO_MODE_NATIVE,
++ .gpio68 = GPIO_MODE_NATIVE,
++ .gpio69 = GPIO_MODE_NATIVE,
++ .gpio70 = GPIO_MODE_NATIVE,
++ .gpio71 = GPIO_MODE_NATIVE,
++ .gpio72 = GPIO_MODE_NATIVE,
++ .gpio73 = GPIO_MODE_NATIVE,
++ .gpio74 = GPIO_MODE_GPIO,
++ .gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++ .gpio74 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++ .set1 = {
++ .mode = &pch_gpio_set1_mode,
++ .direction = &pch_gpio_set1_direction,
++ .level = &pch_gpio_set1_level,
++ .blink = &pch_gpio_set1_blink,
++ .invert = &pch_gpio_set1_invert,
++ .reset = &pch_gpio_set1_reset,
++ },
++ .set2 = {
++ .mode = &pch_gpio_set2_mode,
++ .direction = &pch_gpio_set2_direction,
++ .level = &pch_gpio_set2_level,
++ .reset = &pch_gpio_set2_reset,
++ },
++ .set3 = {
++ .mode = &pch_gpio_set3_mode,
++ .direction = &pch_gpio_set3_direction,
++ .level = &pch_gpio_set3_level,
++ .reset = &pch_gpio_set3_reset,
++ },
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c
+new file mode 100644
+index 0000000000..0bc6c35a63
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++ 0x111d76e7, /* Codec Vendor / Device ID: IDT */
++ 0x1028049b, /* Subsystem ID */
++ 11, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(0, 0x1028049b),
++ AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
++ AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
++ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++ AZALIA_PIN_CFG(0, 0x11, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x20, 0xd5a30130),
++
++ 0x80862805, /* Codec Vendor / Device ID: Intel */
++ 0x80860101, /* Subsystem ID */
++ 4, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(3, 0x80860101),
++ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/overridetree.cb
+new file mode 100644
+index 0000000000..3f55bfd49d
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/overridetree.cb
+@@ -0,0 +1,39 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++ device domain 0 on
++ subsystemid 0x1028 0x049b inherit
++
++ device ref igd on
++ register "gpu_cpu_backlight" = "0x00000c31"
++ register "gpu_pch_backlight" = "0x13121312"
++ end
++
++ chip southbridge/intel/bd82x6x
++ register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 1, 0 }"
++ register "usb_port_config" = "{
++ { 1, 1, 0 },
++ { 1, 1, 0 },
++ { 1, 1, 1 },
++ { 1, 1, 1 },
++ { 1, 1, 2 },
++ { 1, 1, 2 },
++ { 1, 1, 3 },
++ { 1, 1, 3 },
++ { 1, 1, 5 },
++ { 1, 1, 5 },
++ { 1, 1, 7 },
++ { 1, 1, 6 },
++ { 1, 1, 6 },
++ { 1, 1, 7 },
++ }"
++
++ device ref gbe off end
++ device ref pcie_rp4 off end
++ device ref pcie_rp7 on end # Broadcom BCM5761 Gigabit Ethernet
++ device ref sata1 on
++ register "sata_port_map" = "0x3b"
++ end
++ end
++ end
++end
+--
+2.39.5
+
diff --git a/config/coreboot/default/patches/0024-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch b/config/coreboot/default/patches/0024-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch
new file mode 100644
index 00000000..9ae5ce64
--- /dev/null
+++ b/config/coreboot/default/patches/0024-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch
@@ -0,0 +1,435 @@
+From 85a0905b600c1f532c462047941da6e7c2bb47c2 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Wed, 7 Feb 2024 15:23:46 -0700
+Subject: [PATCH 24/65] mb/dell: Add Latitude E6320 (Sandy Bridge)
+
+Mainboard is PAL70/LA-6611P. I do not physically have this system;
+someone with physical access to one sent me the output of autoport which
+I then modified to produce this port. I was also sent the VBT binary,
+which was obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running
+version A22 of the vendor firmware. This port has not been tested.
+
+The EC is the SMSC MEC5055, which seems to be compatible with the
+existing MEC5035 code. As with the other Dell systems with this EC, this
+board is assumed to be internally flashable using an EC command that
+tells it to pull the FDO pin low on the next boot, which also tells the
+vendor firmware to disable all write protections to the flash [1].
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Change-Id: I5905f8c6a8dbad56e03bdeedc2179600d0c4ba46
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig | 11 +-
+ .../dell/snb_ivb_latitude/Kconfig.name | 3 +
+ .../snb_ivb_latitude/variants/e6320/data.vbt | Bin 0 -> 6144 bytes
+ .../variants/e6320/early_init.c | 17 ++
+ .../snb_ivb_latitude/variants/e6320/gpio.c | 190 ++++++++++++++++++
+ .../variants/e6320/hda_verb.c | 32 +++
+ .../variants/e6320/overridetree.cb | 35 ++++
+ 7 files changed, 287 insertions(+), 1 deletion(-)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index e6a21ffb99..84ffe1d33a 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -27,6 +27,12 @@ config BOARD_DELL_LATITUDE_E5520
+ select BOARD_ROMSIZE_KB_6144
+ select SOUTHBRIDGE_INTEL_BD82X6X
+
++config BOARD_DELL_LATITUDE_E6320
++ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++ select BOARD_ROMSIZE_KB_10240
++ select MAINBOARD_USES_IFD_GBE_REGION
++ select SOUTHBRIDGE_INTEL_BD82X6X
++
+ config BOARD_DELL_LATITUDE_E6420
+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ select BOARD_ROMSIZE_KB_10240
+@@ -67,6 +73,7 @@ config MAINBOARD_DIR
+ config MAINBOARD_PART_NUMBER
+ default "Latitude E5420" if BOARD_DELL_LATITUDE_E5420
+ default "Latitude E5520" if BOARD_DELL_LATITUDE_E5520
++ default "Latitude E6320" if BOARD_DELL_LATITUDE_E6320
+ default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
+ default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
+ default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
+@@ -82,6 +89,7 @@ config USBDEBUG_HCD_INDEX
+ config VARIANT_DIR
+ default "e5420" if BOARD_DELL_LATITUDE_E5420
+ default "e5520" if BOARD_DELL_LATITUDE_E5520
++ default "e6320" if BOARD_DELL_LATITUDE_E6320
+ default "e6420" if BOARD_DELL_LATITUDE_E6420
+ default "e6520" if BOARD_DELL_LATITUDE_E6520
+ default "e5530" if BOARD_DELL_LATITUDE_E5530
+@@ -93,7 +101,8 @@ config VGA_BIOS_ID
+ || BOARD_DELL_LATITUDE_E5420
+ default "8086,0166" if BOARD_DELL_LATITUDE_E5530
+ default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \
+- || BOARD_DELL_LATITUDE_E5520
++ || BOARD_DELL_LATITUDE_E5520 \
++ || BOARD_DELL_LATITUDE_E6320
+ default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
+ || BOARD_DELL_LATITUDE_E6530
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index a3fa2b1837..ef6a1329a9 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -6,6 +6,9 @@ config BOARD_DELL_LATITUDE_E5420
+ config BOARD_DELL_LATITUDE_E5520
+ bool "Latitude E5520"
+
++config BOARD_DELL_LATITUDE_E6320
++ bool "Latitude E6320"
++
+ config BOARD_DELL_LATITUDE_E6420
+ bool "Latitude E6420"
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..471a9e29da639dd496f3ecebd5d0754a9045c00b
+GIT binary patch
+literal 6144
+zcmeHKeP|p-6#wn*-rZ(yH@R-odPzTgZEU>S#_pv}j2iKhT+^%8_DtJw21|4GP8*0x
+zyw;EYW49Xozz<Rt@ek1mic(N32r8oZ0U9lcR8a)~s33wLV8yCftLK~DJJWb)8w-j;
+z=J?H<nfK<+n>TOX?48xuwV5_`Zb)3w)w?dSc1`nTL|NF_SMw&<<)v%g#!cH2otrzi
+zb*<mneJMSLdC1iK_7#v-6w7R}+t1&W8P4wBo*&F!lcNn?)F-EqWZV#oQEb%`x-4^5
+zW@sogOik1`n9Wc#r82|0A!=-0LD!FFGrMwG+CDg($q(js(#Y`8?s79ubEJD@ba#I6
+znjO0++P#czvh8NBR?)iQUA%txNPhHO>Kq!PUMaJadUHE-`5SWCb4_6i;5Aj(6hQGK
+zcq^2uUt5sS5YSMiL+CJcs0#cVOdTN|K@D>?tkF=dqenwjM^Z-^K2z~&z+xRs!o^Jx
+zkUGd?>QtXw8V(I09OiMb0DZy>`=tO^#BCssw{}bkOnj=#Ic!~!6!J*{`jbEv5O4)-
+zg-UBlIa$c9Pg4C;0_-wq3t+dbZfn1wBi@zhNnWx()w{Vb-G8OC_m*478gTrX3U*a1
+zHr@y<Lcbct?Wzy^)OH+FC$S`8V@n`{QN~@2dxJU-1ucBe_>rOO78dFPXES1q3mHj9
+zFXKwa)r^}Mw=nKzJjj?}>}NdBc$G29IK=pr@de`u;}}D$5~yYbw&Hlf=OF0X?I=Y$
+z$D`mgy>}U$hl}G6m&PmXveHnY5DenC!g~=E3i?HIrEpyk>_(-IsVtEqUEoqxrDFdq
+zrYwhOv0o^NgW$OKN}=$7Z-w5*Vuv?T3~uuFGwP92?Qr8n0iQp=u*7rep9Q8dW#?ZI
+zFly1ww^^l*+YC6t16l_{g}tVVpVZ0fDk%5+`|+*688vr-<Lw_SRc^+avHI{BCpdYb
+z70yLEI0-45%t;z||GKzov+|VFW6hab&NAG9FD+h6sBu$cX`r0eJ%T`kvK4+(wT`0=
+z$fxKG+om?Ge1-EhbNc*Xjy1opKZSaiv-EL~GvOa&&bx~z##3W;F2{b=<HQ4!<1CFk
+z17i)$X+`=C=0udOPOx3$IjzopqwQzLr*jT4C)(jmj2>uYP8$M=#caX6OWA1Ez395U
+z%x<yAs)6-Ascr5<x*>CIZibyRlE~I0-ianVaz~q|EMlL7hc1U5w?}Kekws6fyy@`e
+z4NdX%L#2`A#c_N4ftGmuwbDo=incwf=WnBJk6)fYz%6Cmy>HwK$Y|iP`Y7sgjDPhQ
+zR|wv367k}1g)-G@kXq(X;{Bjt998b9{cpD9zGhOQ5%$4OSMtc2(<dx@0O}7_G+$WF
+zLYyaPtFT6d*e&Q$VLd0r%Yr@=*7rjEDyT7JwT8sSA<BiU8$)7mh@K2tFNMULA^I|8
+z{Sp#>gO(fCMTS^w(6xrO#}IcK^sHgMZis^heP>uIf6|z=%Cy#)Vxvjdo7U~7*k{rU
+zruB{~J}~KL(+X9Kxz*-5M>NNGSaIfXi19({d4mrk?K50@R0%Wn*PP9d(MMIzI2~RX
+z)(4h&8(YL@UyKJ*)4o${n5ZGd(hDf+)cv8sSBxWen|f*u<-sgt(u+U-bkd}Tj+5@9
+zJosfSdvPo8zGnluemJg=E7A{=N<Rc#KYYEg?^p`+_?~aU(kEmFus{DshA~iA(onLY
+zvIfpBJt;KWP4n8&`n1##c($WnDo|=?rlHBz&}36&HPWwp8op_i8c-**(TSd{Y{SZ?
+z_=^K$27e+q;^vRNU3~a=cd;V{%O=iuo*&xwXyg19${Ap0yO@a|N-<e^7iIClF{vUn
+z&4$y_V7MA)=E=%7n63u!J9FY$RK8hXHDE%%Lx$ZgX902-<9r|4lkx>QwFch>PUO1w
+z=6JffnB-kQ)VLb>sSZdDrI@U2!?HLA9Mlek!*k>;&jx<)xfnBiY^I6DRt*l*`n8ly
+zu!h)b?sRV1==Nf*Cw9&&i7n^9Nts>wk>adaY&E5OdW*A?iI}v+E6GGlsR<+#%jpl^
+zGz<Q^vpj>qhDjj3zr60Bgh=l{NzJp$x#fCR%*8!ZR?fC&JuvHmSr5#5VAcb(9+>sO
+IzvhA80TAzedH?_b
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c
+new file mode 100644
+index 0000000000..b0c4638858
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c
+@@ -0,0 +1,17 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++const struct southbridge_usb_port mainboard_usb_ports[] = {
++};
++
++void bootblock_mainboard_early_init(void)
++{
++ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++ | COMB_LPC_EN | COMA_LPC_EN);
++ mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/gpio.c
+new file mode 100644
+index 0000000000..61f01816c4
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/gpio.c
+@@ -0,0 +1,190 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++ .gpio0 = GPIO_MODE_GPIO,
++ .gpio1 = GPIO_MODE_NATIVE,
++ .gpio2 = GPIO_MODE_GPIO,
++ .gpio3 = GPIO_MODE_NATIVE,
++ .gpio4 = GPIO_MODE_GPIO,
++ .gpio5 = GPIO_MODE_NATIVE,
++ .gpio6 = GPIO_MODE_GPIO,
++ .gpio7 = GPIO_MODE_GPIO,
++ .gpio8 = GPIO_MODE_GPIO,
++ .gpio9 = GPIO_MODE_NATIVE,
++ .gpio10 = GPIO_MODE_NATIVE,
++ .gpio11 = GPIO_MODE_NATIVE,
++ .gpio12 = GPIO_MODE_NATIVE,
++ .gpio13 = GPIO_MODE_GPIO,
++ .gpio14 = GPIO_MODE_GPIO,
++ .gpio15 = GPIO_MODE_GPIO,
++ .gpio16 = GPIO_MODE_GPIO,
++ .gpio17 = GPIO_MODE_GPIO,
++ .gpio18 = GPIO_MODE_NATIVE,
++ .gpio19 = GPIO_MODE_GPIO,
++ .gpio20 = GPIO_MODE_NATIVE,
++ .gpio21 = GPIO_MODE_GPIO,
++ .gpio22 = GPIO_MODE_GPIO,
++ .gpio23 = GPIO_MODE_NATIVE,
++ .gpio24 = GPIO_MODE_GPIO,
++ .gpio25 = GPIO_MODE_NATIVE,
++ .gpio26 = GPIO_MODE_NATIVE,
++ .gpio27 = GPIO_MODE_GPIO,
++ .gpio28 = GPIO_MODE_GPIO,
++ .gpio29 = GPIO_MODE_GPIO,
++ .gpio30 = GPIO_MODE_GPIO,
++ .gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++ .gpio0 = GPIO_DIR_INPUT,
++ .gpio2 = GPIO_DIR_INPUT,
++ .gpio4 = GPIO_DIR_INPUT,
++ .gpio6 = GPIO_DIR_INPUT,
++ .gpio7 = GPIO_DIR_INPUT,
++ .gpio8 = GPIO_DIR_INPUT,
++ .gpio13 = GPIO_DIR_INPUT,
++ .gpio14 = GPIO_DIR_INPUT,
++ .gpio15 = GPIO_DIR_INPUT,
++ .gpio16 = GPIO_DIR_INPUT,
++ .gpio17 = GPIO_DIR_INPUT,
++ .gpio19 = GPIO_DIR_INPUT,
++ .gpio21 = GPIO_DIR_INPUT,
++ .gpio22 = GPIO_DIR_INPUT,
++ .gpio24 = GPIO_DIR_INPUT,
++ .gpio27 = GPIO_DIR_INPUT,
++ .gpio28 = GPIO_DIR_INPUT,
++ .gpio29 = GPIO_DIR_INPUT,
++ .gpio30 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++ .gpio30 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++ .gpio0 = GPIO_INVERT,
++ .gpio8 = GPIO_INVERT,
++ .gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++ .gpio32 = GPIO_MODE_NATIVE,
++ .gpio33 = GPIO_MODE_GPIO,
++ .gpio34 = GPIO_MODE_GPIO,
++ .gpio35 = GPIO_MODE_GPIO,
++ .gpio36 = GPIO_MODE_GPIO,
++ .gpio37 = GPIO_MODE_GPIO,
++ .gpio38 = GPIO_MODE_GPIO,
++ .gpio39 = GPIO_MODE_GPIO,
++ .gpio40 = GPIO_MODE_NATIVE,
++ .gpio41 = GPIO_MODE_NATIVE,
++ .gpio42 = GPIO_MODE_NATIVE,
++ .gpio43 = GPIO_MODE_NATIVE,
++ .gpio44 = GPIO_MODE_NATIVE,
++ .gpio45 = GPIO_MODE_GPIO,
++ .gpio46 = GPIO_MODE_NATIVE,
++ .gpio47 = GPIO_MODE_NATIVE,
++ .gpio48 = GPIO_MODE_GPIO,
++ .gpio49 = GPIO_MODE_GPIO,
++ .gpio50 = GPIO_MODE_NATIVE,
++ .gpio51 = GPIO_MODE_GPIO,
++ .gpio52 = GPIO_MODE_GPIO,
++ .gpio53 = GPIO_MODE_NATIVE,
++ .gpio54 = GPIO_MODE_GPIO,
++ .gpio55 = GPIO_MODE_NATIVE,
++ .gpio56 = GPIO_MODE_NATIVE,
++ .gpio57 = GPIO_MODE_GPIO,
++ .gpio58 = GPIO_MODE_NATIVE,
++ .gpio59 = GPIO_MODE_NATIVE,
++ .gpio60 = GPIO_MODE_GPIO,
++ .gpio61 = GPIO_MODE_NATIVE,
++ .gpio62 = GPIO_MODE_NATIVE,
++ .gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++ .gpio33 = GPIO_DIR_INPUT,
++ .gpio34 = GPIO_DIR_OUTPUT,
++ .gpio35 = GPIO_DIR_INPUT,
++ .gpio36 = GPIO_DIR_INPUT,
++ .gpio37 = GPIO_DIR_INPUT,
++ .gpio38 = GPIO_DIR_INPUT,
++ .gpio39 = GPIO_DIR_INPUT,
++ .gpio45 = GPIO_DIR_OUTPUT,
++ .gpio48 = GPIO_DIR_INPUT,
++ .gpio49 = GPIO_DIR_OUTPUT,
++ .gpio51 = GPIO_DIR_INPUT,
++ .gpio52 = GPIO_DIR_INPUT,
++ .gpio54 = GPIO_DIR_INPUT,
++ .gpio57 = GPIO_DIR_INPUT,
++ .gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++ .gpio34 = GPIO_LEVEL_HIGH,
++ .gpio45 = GPIO_LEVEL_LOW,
++ .gpio49 = GPIO_LEVEL_LOW,
++ .gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++ .gpio64 = GPIO_MODE_NATIVE,
++ .gpio65 = GPIO_MODE_NATIVE,
++ .gpio66 = GPIO_MODE_NATIVE,
++ .gpio67 = GPIO_MODE_NATIVE,
++ .gpio68 = GPIO_MODE_GPIO,
++ .gpio69 = GPIO_MODE_GPIO,
++ .gpio70 = GPIO_MODE_GPIO,
++ .gpio71 = GPIO_MODE_GPIO,
++ .gpio72 = GPIO_MODE_NATIVE,
++ .gpio73 = GPIO_MODE_NATIVE,
++ .gpio74 = GPIO_MODE_NATIVE,
++ .gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++ .gpio68 = GPIO_DIR_INPUT,
++ .gpio69 = GPIO_DIR_INPUT,
++ .gpio70 = GPIO_DIR_INPUT,
++ .gpio71 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++ .set1 = {
++ .mode = &pch_gpio_set1_mode,
++ .direction = &pch_gpio_set1_direction,
++ .level = &pch_gpio_set1_level,
++ .blink = &pch_gpio_set1_blink,
++ .invert = &pch_gpio_set1_invert,
++ .reset = &pch_gpio_set1_reset,
++ },
++ .set2 = {
++ .mode = &pch_gpio_set2_mode,
++ .direction = &pch_gpio_set2_direction,
++ .level = &pch_gpio_set2_level,
++ .reset = &pch_gpio_set2_reset,
++ },
++ .set3 = {
++ .mode = &pch_gpio_set3_mode,
++ .direction = &pch_gpio_set3_direction,
++ .level = &pch_gpio_set3_level,
++ .reset = &pch_gpio_set3_reset,
++ },
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c
+new file mode 100644
+index 0000000000..2e3f7fa697
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++ 0x111d76e7, /* Codec Vendor / Device ID: IDT */
++ 0x10280492, /* Subsystem ID */
++ 11, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(0, 0x10280492),
++ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
++ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
++ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++ AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
++ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++ 0x80862805, /* Codec Vendor / Device ID: Intel */
++ 0x80860101, /* Subsystem ID */
++ 4, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(3, 0x80860101),
++ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/overridetree.cb
+new file mode 100644
+index 0000000000..3bfe6b57ed
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/overridetree.cb
+@@ -0,0 +1,35 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++ device domain 0 on
++ subsystemid 0x1028 0x0492 inherit
++
++ device ref igd on
++ register "gpu_cpu_backlight" = "0x00000622"
++ register "gpu_pch_backlight" = "0x13121312"
++ end
++
++ chip southbridge/intel/bd82x6x
++ register "usb_port_config" = "{
++ { 1, 1, 0 },
++ { 1, 0, 0 },
++ { 1, 1, 1 },
++ { 1, 0, 1 },
++ { 1, 1, 2 },
++ { 1, 1, 2 },
++ { 1, 1, 3 },
++ { 1, 1, 3 },
++ { 1, 0, 5 },
++ { 1, 0, 5 },
++ { 1, 1, 7 },
++ { 1, 1, 6 },
++ { 1, 0, 6 },
++ { 1, 0, 7 },
++ }"
++
++ device ref sata1 on
++ register "sata_port_map" = "0x3b"
++ end
++ end
++ end
++end
+--
+2.39.5
+
diff --git a/config/coreboot/default/patches/0025-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch b/config/coreboot/default/patches/0025-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch
new file mode 100644
index 00000000..668c0063
--- /dev/null
+++ b/config/coreboot/default/patches/0025-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch
@@ -0,0 +1,438 @@
+From 817b0d543444e52ddfde536ded52509456dcbbf2 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Fri, 8 Mar 2024 09:27:36 -0700
+Subject: [PATCH 25/65] mb/dell: Add Latitude E6220 (Sandy Bridge)
+
+Mainboard is codenamed Vida. I do not physically have this system;
+someone with physical access to one sent me the output of autoport which
+I then modified to produce this port. The VBT was obtained using
+intelvbttool while running version A14 (latest available version) of the
+vendor firmware.
+
+Tested and found to boot as part of a libreboot build based on upstream
+coreboot commit b7341da191 with additional patches, though these do not
+appear to affect SNB/IVB. The base E6430 patch was tested against
+coreboot main.
+
+The EC is the SMSC MEC5055, which seems to be compatible with the
+existing MEC5035 code. As with the other Dell systems with this EC, this
+board is assumed to be internally flashable using an EC command that
+tells it to pull the FDO pin low on the next boot, which also tells the
+vendor firmware to disable all write protections to the flash [1].
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Change-Id: I570023b0837521b75aac6d5652c74030c06b8a4c
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig | 9 +
+ .../dell/snb_ivb_latitude/Kconfig.name | 3 +
+ .../snb_ivb_latitude/variants/e6220/data.vbt | Bin 0 -> 3985 bytes
+ .../variants/e6220/early_init.c | 14 ++
+ .../snb_ivb_latitude/variants/e6220/gpio.c | 192 ++++++++++++++++++
+ .../variants/e6220/hda_verb.c | 32 +++
+ .../variants/e6220/overridetree.cb | 37 ++++
+ 7 files changed, 287 insertions(+)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index 84ffe1d33a..baa83baa41 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -27,6 +27,12 @@ config BOARD_DELL_LATITUDE_E5520
+ select BOARD_ROMSIZE_KB_6144
+ select SOUTHBRIDGE_INTEL_BD82X6X
+
++config BOARD_DELL_LATITUDE_E6220
++ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++ select BOARD_ROMSIZE_KB_10240
++ select MAINBOARD_USES_IFD_GBE_REGION
++ select SOUTHBRIDGE_INTEL_BD82X6X
++
+ config BOARD_DELL_LATITUDE_E6320
+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ select BOARD_ROMSIZE_KB_10240
+@@ -73,6 +79,7 @@ config MAINBOARD_DIR
+ config MAINBOARD_PART_NUMBER
+ default "Latitude E5420" if BOARD_DELL_LATITUDE_E5420
+ default "Latitude E5520" if BOARD_DELL_LATITUDE_E5520
++ default "Latitude E6220" if BOARD_DELL_LATITUDE_E6220
+ default "Latitude E6320" if BOARD_DELL_LATITUDE_E6320
+ default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
+ default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
+@@ -89,6 +96,7 @@ config USBDEBUG_HCD_INDEX
+ config VARIANT_DIR
+ default "e5420" if BOARD_DELL_LATITUDE_E5420
+ default "e5520" if BOARD_DELL_LATITUDE_E5520
++ default "e6220" if BOARD_DELL_LATITUDE_E6220
+ default "e6320" if BOARD_DELL_LATITUDE_E6320
+ default "e6420" if BOARD_DELL_LATITUDE_E6420
+ default "e6520" if BOARD_DELL_LATITUDE_E6520
+@@ -102,6 +110,7 @@ config VGA_BIOS_ID
+ default "8086,0166" if BOARD_DELL_LATITUDE_E5530
+ default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \
+ || BOARD_DELL_LATITUDE_E5520 \
++ || BOARD_DELL_LATITUDE_E6220 \
+ || BOARD_DELL_LATITUDE_E6320
+ default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
+ || BOARD_DELL_LATITUDE_E6530
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index ef6a1329a9..349ee7f79e 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -6,6 +6,9 @@ config BOARD_DELL_LATITUDE_E5420
+ config BOARD_DELL_LATITUDE_E5520
+ bool "Latitude E5520"
+
++config BOARD_DELL_LATITUDE_E6220
++ bool "Latitude E6220"
++
+ config BOARD_DELL_LATITUDE_E6320
+ bool "Latitude E6320"
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..548075a74500b5d159108089ee29cff802d07db7
+GIT binary patch
+literal 3985
+zcmdT{eP|p-6#wn*-rZ(yH@R-odPzTgZQ6LXjonL|7&YQ0xu#d`$C=h}21|4GP8*0x
+zyjE@hv0Dv(P?c0g{G(_DMJZ@22r8oZ0U9lcR8a)~s33wOSg|T<^?b8?XBzL?#)6`A
+z{N~Nfd-LYan>TOv7WZ{+rcIq264!S1u1&02-MpSC3mf}u-r~BvbgkXEX=|c$bLZBs
+zbsM{{q9-s1nVR3f2C|A`nJsqvC7UwC+1=angV`H%w4sao<P?&OTVpYbtz1OwGuLN^
+zhBCv{M16zV3^h|KGn^Zu#@6L@%V;*UGnb`pgTtBpU~UJE3=i!tH{%>fx<^KL=Lc`x
+zzLTQeOW7vdZsuwwtsUOU>vxajM=zqzp&{y(GCQa@w<DLoHJ81}6s7=PS9MJR6hDG@
+zLaF+#1qlrS4OKdX4nv2kz^}p75z-OVFk8cF4b?h&G(>eIb%fzF6`uwy)UhaB+ynus
+zBRr-~^|__t=m5fD9tR81r@XLV3UEc-2I6>o`;@@MXS$rj)&)r+pA?|K2vh+9SHM=N
+zw3d{Uh1~iK)juV`E`v4?cFU@^_DehBU5TFLmFrTyoBPuJ*ExIdxO1!lC!eceSG8i}
+z&A<Zmt5Mvo`mkSZ$5C|>ivl*T2}Cf;*vEJvsN-nR!WWDm8M<y^zAkV9BgVLlk!18T
+zu4CN5*u}VmaUbIm#suRa;|0cRj7i2(#%GK#8OIsFFtjRxYDQoSP8NI)g09_;Qlzsy
+z3O>^Zmcltu96wMRudvHXLxn;xh~EqEM^Gr}m&=vHbwRKjl{%)fM2d8tOI4MM{l!dK
+z4$)%2P!LDJaqX2t;s4$Wy@Q1gZ=x97<n3qFBc<Bm#;F26e|~<6=hD9lOk>K<zaU`L
+zqML8CN*#9@aDs=m4ulGOO%*?>lhsvF9`g6&TYocZ_JQN=A1hUE#+kAD@E9jJd7%}~
+zMLIYMDVoel8h1}$+_YJF%DJ&-O)X~`ZoroouO-yDsj)OrPU{{+ph4LJKdD;Bi3a3T
+zbe?Tf8&<r^`I<R>elW+H+t;5$y~|nhq{o@?k1^-Hg%jhcu{xJyzvgk`0m*Te#GQe$
+z2IjOP{U&oF$`&WsuJN2!=fTnT^W)PwhnW-Ya3)3%H!`OUfy6?#V9r%+wCY}TU0!Cl
+z*kjeex}MZl_aWVoxhXfp&Ur~>>k;onlO4II%~KY!FT|r)!;agdwcf~rXIAVwc6CEj
+zJpE{CBzZ;L-gdYp9)G<w5{aU1kLvl`XxrnL=MQj88F%j+w*oR6c&t8(di=t_dW<Us
+z?>C8f@wZ%=YBfkLb0_gZP%us?_tgG3TXJ7BDbWb~V23Mt{QT(?mOc#ihbo#YtY#rD
+z7PLiJBSP#J^tiB|7vdE`p9|}IA$}9o7_wSJ;))RELe^~|u{T6dhpd-F;;j&U6|#N}
+z3BN(h4C``3tTE^&!`fqrdks2dSZ^5Oh(X^Omdc+rCapBB)uz~J(k-TSw<-3U^rC6K
+zYl;s|`q{KX)nazFdEs%*@f}l~SsY?~kb2(WgGl=fm!43<O#L+%@MH9Gl`~Gq=7;rx
+zMc&31@YxsRfz-6`>>4I&2(k1$iaK?FYVZ}~h~1{1T|;>=%b4`yk3XF>siEVHyC@HS
+z8OvVW%DeB`K&~H7>f?&^gQU_A0oM<l8+N5oZ4)iV>;p0b*k61j!x*S5X(-unS`9rZ
+zG}=vb+R*x})DSq-Q7;uJwKLPuG`Ej6G}#nch4dSqhHo0B2Gq%HbgCyS+pwZ3{?fph
+z!Jo*Dxcw7v7a#rIU2IRmVn4KE$x~88+a7J4zd|_!%xo9z$+P;Q6qA*AQ5FvzlPW^f
+zY&aJUhO1#_o~&$x>1qJKGpC+K<(u_&1197<WZ2zu79e*q&i9c$DPNGYYw%s_L~d?x
+zj;EW8N#6BCjjMs5>VVWxipk10ERAEpLG3^|JWI~<Y~c5vi!sB;W|~-R<=`-_TSLhN
+zYlyAlPUkfn-CnHq)Xv2vv1R->DYG*_Qk)fwt)g^KZ*f*K5tEj9C7Ea`HGyPe8U4wd
+nX2Iz@%Q6UTm;}-X%j^D0i1fiT)I6)4TdrsMY}`L(<y7krryzQ}
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c
+new file mode 100644
+index 0000000000..ff83db095b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c
+@@ -0,0 +1,14 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++void bootblock_mainboard_early_init(void)
++{
++ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++ | COMB_LPC_EN | COMA_LPC_EN);
++ mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/gpio.c
+new file mode 100644
+index 0000000000..2306e4cf0a
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/gpio.c
+@@ -0,0 +1,192 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++ .gpio0 = GPIO_MODE_GPIO,
++ .gpio1 = GPIO_MODE_GPIO,
++ .gpio2 = GPIO_MODE_GPIO,
++ .gpio3 = GPIO_MODE_NATIVE,
++ .gpio4 = GPIO_MODE_GPIO,
++ .gpio5 = GPIO_MODE_NATIVE,
++ .gpio6 = GPIO_MODE_GPIO,
++ .gpio7 = GPIO_MODE_GPIO,
++ .gpio8 = GPIO_MODE_GPIO,
++ .gpio9 = GPIO_MODE_NATIVE,
++ .gpio10 = GPIO_MODE_NATIVE,
++ .gpio11 = GPIO_MODE_NATIVE,
++ .gpio12 = GPIO_MODE_NATIVE,
++ .gpio13 = GPIO_MODE_GPIO,
++ .gpio14 = GPIO_MODE_GPIO,
++ .gpio15 = GPIO_MODE_GPIO,
++ .gpio16 = GPIO_MODE_GPIO,
++ .gpio17 = GPIO_MODE_GPIO,
++ .gpio18 = GPIO_MODE_NATIVE,
++ .gpio19 = GPIO_MODE_GPIO,
++ .gpio20 = GPIO_MODE_NATIVE,
++ .gpio21 = GPIO_MODE_GPIO,
++ .gpio22 = GPIO_MODE_GPIO,
++ .gpio23 = GPIO_MODE_NATIVE,
++ .gpio24 = GPIO_MODE_GPIO,
++ .gpio25 = GPIO_MODE_NATIVE,
++ .gpio26 = GPIO_MODE_NATIVE,
++ .gpio27 = GPIO_MODE_GPIO,
++ .gpio28 = GPIO_MODE_GPIO,
++ .gpio29 = GPIO_MODE_GPIO,
++ .gpio30 = GPIO_MODE_GPIO,
++ .gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++ .gpio0 = GPIO_DIR_INPUT,
++ .gpio1 = GPIO_DIR_INPUT,
++ .gpio2 = GPIO_DIR_INPUT,
++ .gpio4 = GPIO_DIR_INPUT,
++ .gpio6 = GPIO_DIR_INPUT,
++ .gpio7 = GPIO_DIR_INPUT,
++ .gpio8 = GPIO_DIR_INPUT,
++ .gpio13 = GPIO_DIR_INPUT,
++ .gpio14 = GPIO_DIR_INPUT,
++ .gpio15 = GPIO_DIR_INPUT,
++ .gpio16 = GPIO_DIR_INPUT,
++ .gpio17 = GPIO_DIR_INPUT,
++ .gpio19 = GPIO_DIR_INPUT,
++ .gpio21 = GPIO_DIR_INPUT,
++ .gpio22 = GPIO_DIR_INPUT,
++ .gpio24 = GPIO_DIR_INPUT,
++ .gpio27 = GPIO_DIR_INPUT,
++ .gpio28 = GPIO_DIR_INPUT,
++ .gpio29 = GPIO_DIR_INPUT,
++ .gpio30 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++ .gpio30 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++ .gpio0 = GPIO_INVERT,
++ .gpio1 = GPIO_INVERT,
++ .gpio8 = GPIO_INVERT,
++ .gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++ .gpio32 = GPIO_MODE_NATIVE,
++ .gpio33 = GPIO_MODE_GPIO,
++ .gpio34 = GPIO_MODE_GPIO,
++ .gpio35 = GPIO_MODE_GPIO,
++ .gpio36 = GPIO_MODE_GPIO,
++ .gpio37 = GPIO_MODE_GPIO,
++ .gpio38 = GPIO_MODE_GPIO,
++ .gpio39 = GPIO_MODE_GPIO,
++ .gpio40 = GPIO_MODE_NATIVE,
++ .gpio41 = GPIO_MODE_NATIVE,
++ .gpio42 = GPIO_MODE_NATIVE,
++ .gpio43 = GPIO_MODE_NATIVE,
++ .gpio44 = GPIO_MODE_NATIVE,
++ .gpio45 = GPIO_MODE_GPIO,
++ .gpio46 = GPIO_MODE_NATIVE,
++ .gpio47 = GPIO_MODE_NATIVE,
++ .gpio48 = GPIO_MODE_GPIO,
++ .gpio49 = GPIO_MODE_GPIO,
++ .gpio50 = GPIO_MODE_NATIVE,
++ .gpio51 = GPIO_MODE_GPIO,
++ .gpio52 = GPIO_MODE_GPIO,
++ .gpio53 = GPIO_MODE_NATIVE,
++ .gpio54 = GPIO_MODE_GPIO,
++ .gpio55 = GPIO_MODE_NATIVE,
++ .gpio56 = GPIO_MODE_NATIVE,
++ .gpio57 = GPIO_MODE_GPIO,
++ .gpio58 = GPIO_MODE_NATIVE,
++ .gpio59 = GPIO_MODE_NATIVE,
++ .gpio60 = GPIO_MODE_GPIO,
++ .gpio61 = GPIO_MODE_NATIVE,
++ .gpio62 = GPIO_MODE_NATIVE,
++ .gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++ .gpio33 = GPIO_DIR_INPUT,
++ .gpio34 = GPIO_DIR_OUTPUT,
++ .gpio35 = GPIO_DIR_INPUT,
++ .gpio36 = GPIO_DIR_INPUT,
++ .gpio37 = GPIO_DIR_INPUT,
++ .gpio38 = GPIO_DIR_INPUT,
++ .gpio39 = GPIO_DIR_INPUT,
++ .gpio45 = GPIO_DIR_OUTPUT,
++ .gpio48 = GPIO_DIR_INPUT,
++ .gpio49 = GPIO_DIR_OUTPUT,
++ .gpio51 = GPIO_DIR_INPUT,
++ .gpio52 = GPIO_DIR_INPUT,
++ .gpio54 = GPIO_DIR_INPUT,
++ .gpio57 = GPIO_DIR_INPUT,
++ .gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++ .gpio34 = GPIO_LEVEL_HIGH,
++ .gpio45 = GPIO_LEVEL_LOW,
++ .gpio49 = GPIO_LEVEL_LOW,
++ .gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++ .gpio64 = GPIO_MODE_NATIVE,
++ .gpio65 = GPIO_MODE_NATIVE,
++ .gpio66 = GPIO_MODE_NATIVE,
++ .gpio67 = GPIO_MODE_NATIVE,
++ .gpio68 = GPIO_MODE_GPIO,
++ .gpio69 = GPIO_MODE_GPIO,
++ .gpio70 = GPIO_MODE_GPIO,
++ .gpio71 = GPIO_MODE_GPIO,
++ .gpio72 = GPIO_MODE_NATIVE,
++ .gpio73 = GPIO_MODE_NATIVE,
++ .gpio74 = GPIO_MODE_NATIVE,
++ .gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++ .gpio68 = GPIO_DIR_INPUT,
++ .gpio69 = GPIO_DIR_INPUT,
++ .gpio70 = GPIO_DIR_INPUT,
++ .gpio71 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++ .set1 = {
++ .mode = &pch_gpio_set1_mode,
++ .direction = &pch_gpio_set1_direction,
++ .level = &pch_gpio_set1_level,
++ .blink = &pch_gpio_set1_blink,
++ .invert = &pch_gpio_set1_invert,
++ .reset = &pch_gpio_set1_reset,
++ },
++ .set2 = {
++ .mode = &pch_gpio_set2_mode,
++ .direction = &pch_gpio_set2_direction,
++ .level = &pch_gpio_set2_level,
++ .reset = &pch_gpio_set2_reset,
++ },
++ .set3 = {
++ .mode = &pch_gpio_set3_mode,
++ .direction = &pch_gpio_set3_direction,
++ .level = &pch_gpio_set3_level,
++ .reset = &pch_gpio_set3_reset,
++ },
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c
+new file mode 100644
+index 0000000000..0c69f0bd0e
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++ 0x111d76e7, /* Codec Vendor / Device ID: IDT */
++ 0x102804a9, /* Subsystem ID */
++ 11, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(0, 0x102804a9),
++ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
++ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
++ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++ AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
++ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++ 0x80862805, /* Codec Vendor / Device ID: Intel */
++ 0x80860101, /* Subsystem ID */
++ 4, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(3, 0x80860101),
++ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/overridetree.cb
+new file mode 100644
+index 0000000000..9faf27e27b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/overridetree.cb
+@@ -0,0 +1,37 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++ device domain 0 on
++ subsystemid 0x1028 0x04a9 inherit
++
++ device ref igd on
++ register "gpu_cpu_backlight" = "0x0000046a"
++ register "gpu_pch_backlight" = "0x13121312"
++ end
++
++ chip southbridge/intel/bd82x6x
++ register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
++ register "usb_port_config" = "{
++ { 1, 1, 0 },
++ { 1, 0, 0 },
++ { 1, 1, 1 },
++ { 1, 0, 1 },
++ { 1, 1, 2 },
++ { 1, 1, 2 },
++ { 1, 1, 3 },
++ { 1, 1, 3 },
++ { 1, 0, 5 },
++ { 1, 0, 5 },
++ { 1, 1, 7 },
++ { 1, 1, 6 },
++ { 1, 0, 6 },
++ { 1, 0, 7 },
++ }"
++
++ device ref pcie_rp4 off end
++ device ref sata1 on
++ register "sata_port_map" = "0x3b"
++ end
++ end
++ end
++end
+--
+2.39.5
+
diff --git a/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch b/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch
new file mode 100644
index 00000000..d88e97b3
--- /dev/null
+++ b/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch
@@ -0,0 +1,436 @@
+From 48347cf8bc52db7a454a7be8cbc6f9d9eb67b8b0 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Fri, 8 Mar 2024 09:33:03 -0700
+Subject: [PATCH 26/65] mb/dell: Add Latitude E6330 (Ivy Bridge)
+
+Mainboard is QAL70/LA-7741P. I do not physically have this system;
+someone with physical access to one sent me the output of autoport which
+I then modified to produce this port. I was also sent the VBT binary,
+which was obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running
+version A21 of the vendor firmware. This port has not been tested.
+
+The EC is the SMSC MEC5055, which seems to be compatible with the
+existing MEC5035 code. As with the other Dell systems with this EC, this
+board is assumed to be internally flashable using an EC command that
+tells it to pull the FDO pin low on the next boot, which also tells the
+vendor firmware to disable all write protections to the flash [1].
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Change-Id: I827826e9ff8a9a534c50250458b399104478e06c
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig | 11 +-
+ .../dell/snb_ivb_latitude/Kconfig.name | 3 +
+ .../snb_ivb_latitude/variants/e6330/data.vbt | Bin 0 -> 6144 bytes
+ .../variants/e6330/early_init.c | 14 ++
+ .../snb_ivb_latitude/variants/e6330/gpio.c | 192 ++++++++++++++++++
+ .../variants/e6330/hda_verb.c | 32 +++
+ .../variants/e6330/overridetree.cb | 37 ++++
+ 7 files changed, 288 insertions(+), 1 deletion(-)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index baa83baa41..49bf225fe2 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -56,6 +56,12 @@ config BOARD_DELL_LATITUDE_E5530
+ select BOARD_ROMSIZE_KB_12288
+ select SOUTHBRIDGE_INTEL_C216
+
++config BOARD_DELL_LATITUDE_E6330
++ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++ select BOARD_ROMSIZE_KB_12288
++ select MAINBOARD_USES_IFD_GBE_REGION
++ select SOUTHBRIDGE_INTEL_C216
++
+ config BOARD_DELL_LATITUDE_E6430
+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ select BOARD_ROMSIZE_KB_12288
+@@ -84,6 +90,7 @@ config MAINBOARD_PART_NUMBER
+ default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
+ default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
+ default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
++ default "Latitude E6330" if BOARD_DELL_LATITUDE_E6330
+ default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
+ default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
+
+@@ -101,13 +108,15 @@ config VARIANT_DIR
+ default "e6420" if BOARD_DELL_LATITUDE_E6420
+ default "e6520" if BOARD_DELL_LATITUDE_E6520
+ default "e5530" if BOARD_DELL_LATITUDE_E5530
++ default "e6330" if BOARD_DELL_LATITUDE_E6330
+ default "e6430" if BOARD_DELL_LATITUDE_E6430
+ default "e6530" if BOARD_DELL_LATITUDE_E6530
+
+ config VGA_BIOS_ID
+ default "8086,0116" if BOARD_DELL_LATITUDE_E6520 \
+ || BOARD_DELL_LATITUDE_E5420
+- default "8086,0166" if BOARD_DELL_LATITUDE_E5530
++ default "8086,0166" if BOARD_DELL_LATITUDE_E5530 \
++ || BOARD_DELL_LATITUDE_E6330
+ default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \
+ || BOARD_DELL_LATITUDE_E5520 \
+ || BOARD_DELL_LATITUDE_E6220 \
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index 349ee7f79e..d6fc8eb224 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -21,6 +21,9 @@ config BOARD_DELL_LATITUDE_E6520
+ config BOARD_DELL_LATITUDE_E5530
+ bool "Latitude E5530"
+
++config BOARD_DELL_LATITUDE_E6330
++ bool "Latitude E6330"
++
+ config BOARD_DELL_LATITUDE_E6430
+ bool "Latitude E6430"
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..18856746656058651c571ecbb3708e0543b19d62
+GIT binary patch
+literal 6144
+zcmeHKU2GiH75-*tc6WAmW_LYygMSkDB*E^Q*zv5f7dLg)@$NQV2a{}!yImnfyvQ4D
+z;n-$v0!RpNi<_o@ktI-@2a590stC0zRi%iRR%stvi&hAs3R<K}X~hFddB_6@s8W`5
+zXJ!q~E{TOme<a`8@BW;7?l<?GIp@yo&H2<M-FZ0GKbBAR-Ekx}HvVOrhK1*2?{QsU
+zQe#K%JeC=q96gpAKa#$keu^D99ee*0FfB=@F_0J<9-Ch-&BZ5r1T6`{$;1%Fm+qfk
+zTr5pfAz@KB*NGlFzEGx2aqh%IxkQOuX*`{wy~+KQo+-}XSE7aaxko77OBtFgoh;4K
+z(#-7f<x+WxmKSK)vQFgtt^L+?s+Z<V57E7|^TqOPX{mn0n<VLl#Yf7s_suL*Jl#VB
+zmSyz~ScwEVTc-3vd2v6D&dt$;&{?91(o(5>vNXNl&<qW@AghW5NPYw#ha~-b0Dc7_
+z6}t(eHgpwn6<HNi1Vcp^p-07-iXve~MTs!0A_ku!`4nKciajxJYXsOYuuT4N%smA!
+zPazgl&bNRSrvAz|_6r3+B;r1=!7D;RUUw8Ke+vNt7E3`(BA-woPvJFBK^3Gzfh4Nk
+zOX!J0PJNB)Mk&Z_i?S2ez+iItz=)m79LydX&rM9`3wPaJ`T92=Uv0;g-!<4*M6z%+
+z*omwb#VI+CU&%iFS{_DGS;sE}7G4juqRMCww!+k6=+abJj4v>Dsr*z_6HAP5GJeST
+znX2JD;{xLa#;c6KGychVn-L6YXkv6Qx)}Y8&ok1DI~ZSM6dCt39%QUAzRh@o@gqjy
+zL0qZ&DhN8ZR3xu$a$Cd{oasU3DNp{CCl6f~PYlq!Hte;Ia0^wn8Vut7>Wl1)s`^E-
+z1DhGx<x<9D%6jd%)5>zr8&7h}dMJ3~YBe;)!vVf-T&?{PoMvvRR{!67;Xhz^g^loX
+zja+*c-KJJoxbsm3pTE4THs`cgD{Pt+ga3en-i$P#9Wsra(oqRMr;H$4{gxr)9eF(x
+zg0v@a7aj}rA^Kf#sNb*>at^>P)5li%ycOq*4e;3~RUj$i1e8=rHi&<Y^Hc>Y_gP4=
+zxz9^%q0dLXqC&Bq<&sDScZwvatjRxB=rcJJiYb?w#4Iy2KTk1F6T>T}E@(DNGa>5R
+z7&Yv)JdHrRI};pfsKLVj=FE=U*=*T4#ncVktknoGelT||SDY`+9WI_IZE<i@7SnC8
+zN6~Gyo=&><wpzE~>`_>@wb<-RI-lu(_~Oy_Zo6={Cdq!uw(fmyz_u^cB&~5IS7g`U
+zdUC}N$J5-C)|`CfUO+?xptr@*hJW$ZhBZk%JaMh_<8!ZGj)z*WU9fcg2`>dT##_?q
+z=Ksx}uxo3jTHTq%E1}97UECE@r}nt3I=3R(HOL7jNg>teSM-g$aU#`3jk}#qh;D?6
+zw=CYuA2#mS+vU%0P&u8RCn4)$8VH-2uy#01%VG0WSX&Fz`LMYj)?N<NyJ1t)wHBQY
+z=;pYt<#l>gH_zzWS)G2Pn=k3wYdU|DnWmxbG$>`5lZJMWL92%O14BD!(C-cNFNXFH
+zgVc!G9?@=&(4mNVcSJiLq3=b^rz6@k5qdFVUW{m$A{2|7d!kxz)VSrcQt@4sDoq^f
+z98hXm=YS~qbf<kwigD|YevaR}^`7Jy^x~4_g75ka=c0r}VJF2aEv{=ilPf-mNQBNI
+zEMK3YKB+`*xOu>iR|LbzHLa*mLXlH${^b4c9%>9%)HO-?LA1gT0mlz!M}8&;(;^x|
+z*H2<VyY>2;juB|7F+k?y(_2~3@STqQ@f^sqD2c8g3x>ciM%siMq~;pKwfE57kw2K@
+z!-ZN0QTVOP@aA5@fEGKjy2+D`t?2KzpPyRQ`JcmHJoc(<#h<UT;@W$t_d{|;S>vyF
+zewtgef*II~y;k>*B!+(8*blXsY-~kcJa9zG2yfcMCt+|-0ex$pY`h1<*#rEv=~*<+
+ztV``Um!q33-Aap9fUshX^N~GS2@X3^U9+MwgYQ74^?~6&yU^#oY#cvC9R_}P2d<wN
+zJvOE)Xr7A2n#3x14}2_g(YN^0+oYDbb#|V{ze3pzGb9FiF#6Ra&L}bT(ZOvswS7RY
+zxLjWFRwWXHR5&={t;%K+Vkd6NX2iF<SF)LXv@y472OmG!_W%Ni*ZDuev-S0%b!dfW
+wz4{IL!+uT9t2XI4@_L@?Ri*bc_<n8A+wHaowmq=zfo%_LdtloGpN<DU00~N<ApigX
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c
+new file mode 100644
+index 0000000000..ff83db095b
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c
+@@ -0,0 +1,14 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++void bootblock_mainboard_early_init(void)
++{
++ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
++ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
++ | COMB_LPC_EN | COMA_LPC_EN);
++ mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/gpio.c
+new file mode 100644
+index 0000000000..777570765a
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/gpio.c
+@@ -0,0 +1,192 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++ .gpio0 = GPIO_MODE_GPIO,
++ .gpio1 = GPIO_MODE_GPIO,
++ .gpio2 = GPIO_MODE_GPIO,
++ .gpio3 = GPIO_MODE_GPIO,
++ .gpio4 = GPIO_MODE_GPIO,
++ .gpio5 = GPIO_MODE_NATIVE,
++ .gpio6 = GPIO_MODE_GPIO,
++ .gpio7 = GPIO_MODE_GPIO,
++ .gpio8 = GPIO_MODE_GPIO,
++ .gpio9 = GPIO_MODE_NATIVE,
++ .gpio10 = GPIO_MODE_NATIVE,
++ .gpio11 = GPIO_MODE_NATIVE,
++ .gpio12 = GPIO_MODE_NATIVE,
++ .gpio13 = GPIO_MODE_GPIO,
++ .gpio14 = GPIO_MODE_GPIO,
++ .gpio15 = GPIO_MODE_GPIO,
++ .gpio16 = GPIO_MODE_GPIO,
++ .gpio17 = GPIO_MODE_GPIO,
++ .gpio18 = GPIO_MODE_NATIVE,
++ .gpio19 = GPIO_MODE_GPIO,
++ .gpio20 = GPIO_MODE_NATIVE,
++ .gpio21 = GPIO_MODE_GPIO,
++ .gpio22 = GPIO_MODE_GPIO,
++ .gpio23 = GPIO_MODE_NATIVE,
++ .gpio24 = GPIO_MODE_GPIO,
++ .gpio25 = GPIO_MODE_NATIVE,
++ .gpio26 = GPIO_MODE_NATIVE,
++ .gpio27 = GPIO_MODE_GPIO,
++ .gpio28 = GPIO_MODE_GPIO,
++ .gpio29 = GPIO_MODE_GPIO,
++ .gpio30 = GPIO_MODE_NATIVE,
++ .gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++ .gpio0 = GPIO_DIR_INPUT,
++ .gpio1 = GPIO_DIR_INPUT,
++ .gpio2 = GPIO_DIR_INPUT,
++ .gpio3 = GPIO_DIR_INPUT,
++ .gpio4 = GPIO_DIR_INPUT,
++ .gpio6 = GPIO_DIR_INPUT,
++ .gpio7 = GPIO_DIR_INPUT,
++ .gpio8 = GPIO_DIR_INPUT,
++ .gpio13 = GPIO_DIR_INPUT,
++ .gpio14 = GPIO_DIR_INPUT,
++ .gpio15 = GPIO_DIR_INPUT,
++ .gpio16 = GPIO_DIR_INPUT,
++ .gpio17 = GPIO_DIR_INPUT,
++ .gpio19 = GPIO_DIR_INPUT,
++ .gpio21 = GPIO_DIR_INPUT,
++ .gpio22 = GPIO_DIR_INPUT,
++ .gpio24 = GPIO_DIR_INPUT,
++ .gpio27 = GPIO_DIR_INPUT,
++ .gpio28 = GPIO_DIR_OUTPUT,
++ .gpio29 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++ .gpio28 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++ .gpio30 = GPIO_RESET_RSMRST,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++ .gpio0 = GPIO_INVERT,
++ .gpio8 = GPIO_INVERT,
++ .gpio13 = GPIO_INVERT,
++ .gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++ .gpio32 = GPIO_MODE_NATIVE,
++ .gpio33 = GPIO_MODE_GPIO,
++ .gpio34 = GPIO_MODE_GPIO,
++ .gpio35 = GPIO_MODE_GPIO,
++ .gpio36 = GPIO_MODE_GPIO,
++ .gpio37 = GPIO_MODE_GPIO,
++ .gpio38 = GPIO_MODE_GPIO,
++ .gpio39 = GPIO_MODE_GPIO,
++ .gpio40 = GPIO_MODE_NATIVE,
++ .gpio41 = GPIO_MODE_NATIVE,
++ .gpio42 = GPIO_MODE_NATIVE,
++ .gpio43 = GPIO_MODE_NATIVE,
++ .gpio44 = GPIO_MODE_NATIVE,
++ .gpio45 = GPIO_MODE_GPIO,
++ .gpio46 = GPIO_MODE_NATIVE,
++ .gpio47 = GPIO_MODE_NATIVE,
++ .gpio48 = GPIO_MODE_GPIO,
++ .gpio49 = GPIO_MODE_GPIO,
++ .gpio50 = GPIO_MODE_NATIVE,
++ .gpio51 = GPIO_MODE_GPIO,
++ .gpio52 = GPIO_MODE_GPIO,
++ .gpio53 = GPIO_MODE_NATIVE,
++ .gpio54 = GPIO_MODE_GPIO,
++ .gpio55 = GPIO_MODE_NATIVE,
++ .gpio56 = GPIO_MODE_NATIVE,
++ .gpio57 = GPIO_MODE_GPIO,
++ .gpio58 = GPIO_MODE_NATIVE,
++ .gpio59 = GPIO_MODE_NATIVE,
++ .gpio60 = GPIO_MODE_GPIO,
++ .gpio61 = GPIO_MODE_NATIVE,
++ .gpio62 = GPIO_MODE_NATIVE,
++ .gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++ .gpio33 = GPIO_DIR_INPUT,
++ .gpio34 = GPIO_DIR_OUTPUT,
++ .gpio35 = GPIO_DIR_INPUT,
++ .gpio36 = GPIO_DIR_INPUT,
++ .gpio37 = GPIO_DIR_INPUT,
++ .gpio38 = GPIO_DIR_INPUT,
++ .gpio39 = GPIO_DIR_INPUT,
++ .gpio45 = GPIO_DIR_OUTPUT,
++ .gpio48 = GPIO_DIR_INPUT,
++ .gpio49 = GPIO_DIR_INPUT,
++ .gpio51 = GPIO_DIR_INPUT,
++ .gpio52 = GPIO_DIR_INPUT,
++ .gpio54 = GPIO_DIR_INPUT,
++ .gpio57 = GPIO_DIR_INPUT,
++ .gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++ .gpio34 = GPIO_LEVEL_HIGH,
++ .gpio45 = GPIO_LEVEL_LOW,
++ .gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++ .gpio64 = GPIO_MODE_NATIVE,
++ .gpio65 = GPIO_MODE_NATIVE,
++ .gpio66 = GPIO_MODE_NATIVE,
++ .gpio67 = GPIO_MODE_NATIVE,
++ .gpio68 = GPIO_MODE_GPIO,
++ .gpio69 = GPIO_MODE_GPIO,
++ .gpio70 = GPIO_MODE_GPIO,
++ .gpio71 = GPIO_MODE_GPIO,
++ .gpio72 = GPIO_MODE_NATIVE,
++ .gpio73 = GPIO_MODE_NATIVE,
++ .gpio74 = GPIO_MODE_NATIVE,
++ .gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++ .gpio68 = GPIO_DIR_INPUT,
++ .gpio69 = GPIO_DIR_INPUT,
++ .gpio70 = GPIO_DIR_INPUT,
++ .gpio71 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++ .set1 = {
++ .mode = &pch_gpio_set1_mode,
++ .direction = &pch_gpio_set1_direction,
++ .level = &pch_gpio_set1_level,
++ .blink = &pch_gpio_set1_blink,
++ .invert = &pch_gpio_set1_invert,
++ .reset = &pch_gpio_set1_reset,
++ },
++ .set2 = {
++ .mode = &pch_gpio_set2_mode,
++ .direction = &pch_gpio_set2_direction,
++ .level = &pch_gpio_set2_level,
++ .reset = &pch_gpio_set2_reset,
++ },
++ .set3 = {
++ .mode = &pch_gpio_set3_mode,
++ .direction = &pch_gpio_set3_direction,
++ .level = &pch_gpio_set3_level,
++ .reset = &pch_gpio_set3_reset,
++ },
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c
+new file mode 100644
+index 0000000000..804733b172
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++ 0x111d76df, /* Codec Vendor / Device ID: IDT */
++ 0x10280533, /* Subsystem ID */
++ 11, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(0, 0x10280533),
++ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
++ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
++ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++ AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
++ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++ 0x80862806, /* Codec Vendor / Device ID: Intel */
++ 0x80860101, /* Subsystem ID */
++ 4, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(3, 0x80860101),
++ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb
+new file mode 100644
+index 0000000000..4125159367
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb
+@@ -0,0 +1,37 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++ device domain 0 on
++ subsystemid 0x1028 0x0533 inherit
++
++ device ref igd on
++ register "gpu_cpu_backlight" = "0x00001312"
++ register "gpu_pch_backlight" = "0x13121312"
++ end
++
++ chip southbridge/intel/bd82x6x
++ register "usb_port_config" = "{
++ { 1, 2, 0 },
++ { 1, 0, 0 },
++ { 1, 0, 1 },
++ { 1, 1, 1 },
++ { 1, 1, 2 },
++ { 1, 1, 2 },
++ { 1, 2, 3 },
++ { 1, 2, 3 },
++ { 1, 2, 4 },
++ { 1, 1, 4 },
++ { 1, 1, 5 },
++ { 1, 1, 5 },
++ { 1, 2, 6 },
++ { 1, 0, 6 },
++ }"
++
++ device ref xhci on
++ register "superspeed_capable_ports" = "0x0000000f"
++ register "xhci_overcurrent_mapping" = "0x00000c03"
++ register "xhci_switchable_ports" = "0x0000000f"
++ end
++ end
++ end
++end
+--
+2.39.5
+
diff --git a/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch b/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
deleted file mode 100644
index 33d743f1..00000000
--- a/config/coreboot/default/patches/0026-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch
+++ /dev/null
@@ -1,792 +0,0 @@
-From 973783a989cdcb7b77029e369156c81eefe8cc67 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Sat, 19 Aug 2023 16:19:10 -0600
-Subject: [PATCH 26/30] mb/dell: Add Latitude E6530 (Ivy Bridge)
-
-Mainboard is QALA0/LA-7761P (UMA). The dGPU model was not tested. This
-is based on the autoport output with some manual tweaks. The flash is
-8MiB + 4MiB. It can be internally flashed by sending a command to the
-EC, which causes the EC to pull the FDO pin low and the firmware to skip
-setting up any chipset based write protections. [1] The EC is the SMSC
-MEC5055, which seems to be compatible with the existing MEC5035 code.
-
-[1] https://gitlab.com/nic3-14159/dell-flash-unlock
-
-Change-Id: I93c6622fc5da1d0d61a5b2c197ac7227d9525908
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/e6530/Kconfig | 37 ++++
- src/mainboard/dell/e6530/Kconfig.name | 2 +
- src/mainboard/dell/e6530/Makefile.inc | 6 +
- src/mainboard/dell/e6530/acpi/ec.asl | 9 +
- src/mainboard/dell/e6530/acpi/platform.asl | 12 ++
- src/mainboard/dell/e6530/acpi/superio.asl | 3 +
- src/mainboard/dell/e6530/acpi_tables.c | 16 ++
- src/mainboard/dell/e6530/board_info.txt | 6 +
- src/mainboard/dell/e6530/cmos.default | 9 +
- src/mainboard/dell/e6530/cmos.layout | 88 ++++++++++
- src/mainboard/dell/e6530/data.vbt | Bin 0 -> 4280 bytes
- src/mainboard/dell/e6530/devicetree.cb | 68 ++++++++
- src/mainboard/dell/e6530/dsdt.asl | 30 ++++
- src/mainboard/dell/e6530/early_init.c | 38 ++++
- src/mainboard/dell/e6530/gma-mainboard.ads | 20 +++
- src/mainboard/dell/e6530/gpio.c | 192 +++++++++++++++++++++
- src/mainboard/dell/e6530/hda_verb.c | 33 ++++
- src/mainboard/dell/e6530/mainboard.c | 21 +++
- 18 files changed, 590 insertions(+)
- create mode 100644 src/mainboard/dell/e6530/Kconfig
- create mode 100644 src/mainboard/dell/e6530/Kconfig.name
- create mode 100644 src/mainboard/dell/e6530/Makefile.inc
- create mode 100644 src/mainboard/dell/e6530/acpi/ec.asl
- create mode 100644 src/mainboard/dell/e6530/acpi/platform.asl
- create mode 100644 src/mainboard/dell/e6530/acpi/superio.asl
- create mode 100644 src/mainboard/dell/e6530/acpi_tables.c
- create mode 100644 src/mainboard/dell/e6530/board_info.txt
- create mode 100644 src/mainboard/dell/e6530/cmos.default
- create mode 100644 src/mainboard/dell/e6530/cmos.layout
- create mode 100644 src/mainboard/dell/e6530/data.vbt
- create mode 100644 src/mainboard/dell/e6530/devicetree.cb
- create mode 100644 src/mainboard/dell/e6530/dsdt.asl
- create mode 100644 src/mainboard/dell/e6530/early_init.c
- create mode 100644 src/mainboard/dell/e6530/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/e6530/gpio.c
- create mode 100644 src/mainboard/dell/e6530/hda_verb.c
- create mode 100644 src/mainboard/dell/e6530/mainboard.c
-
-diff --git a/src/mainboard/dell/e6530/Kconfig b/src/mainboard/dell/e6530/Kconfig
-new file mode 100644
-index 0000000000..582adddbd4
---- /dev/null
-+++ b/src/mainboard/dell/e6530/Kconfig
-@@ -0,0 +1,37 @@
-+if BOARD_DELL_LATITUDE_E6530
-+
-+config BOARD_SPECIFIC_OPTIONS
-+ def_bool y
-+ select BOARD_ROMSIZE_KB_12288
-+ select EC_ACPI
-+ select EC_DELL_MEC5035
-+ select GFX_GMA_PANEL_1_ON_LVDS
-+ select HAVE_ACPI_RESUME
-+ select HAVE_ACPI_TABLES
-+ select HAVE_CMOS_DEFAULT
-+ select HAVE_OPTION_TABLE
-+ select INTEL_GMA_HAVE_VBT
-+ select INTEL_INT15
-+ select MAINBOARD_HAS_LIBGFXINIT
-+ select MAINBOARD_USES_IFD_GBE_REGION
-+ select NORTHBRIDGE_INTEL_SANDYBRIDGE
-+ select SERIRQ_CONTINUOUS_MODE
-+ select SOUTHBRIDGE_INTEL_C216
-+ select SYSTEM_TYPE_LAPTOP
-+ select USE_NATIVE_RAMINIT
-+
-+config MAINBOARD_DIR
-+ default "dell/e6530"
-+
-+config MAINBOARD_PART_NUMBER
-+ default "Latitude E6530"
-+
-+config VGA_BIOS_ID
-+ default "8086,0166"
-+
-+config DRAM_RESET_GATE_GPIO
-+ default 60
-+
-+config USBDEBUG_HCD_INDEX
-+ default 2
-+endif
-diff --git a/src/mainboard/dell/e6530/Kconfig.name b/src/mainboard/dell/e6530/Kconfig.name
-new file mode 100644
-index 0000000000..01ed76d107
---- /dev/null
-+++ b/src/mainboard/dell/e6530/Kconfig.name
-@@ -0,0 +1,2 @@
-+config BOARD_DELL_LATITUDE_E6530
-+ bool "Latitude E6530"
-diff --git a/src/mainboard/dell/e6530/Makefile.inc b/src/mainboard/dell/e6530/Makefile.inc
-new file mode 100644
-index 0000000000..ba64e93eb8
---- /dev/null
-+++ b/src/mainboard/dell/e6530/Makefile.inc
-@@ -0,0 +1,6 @@
-+# SPDX-License-Identifier: GPL-2.0-only
-+bootblock-y += early_init.c
-+bootblock-y += gpio.c
-+romstage-y += early_init.c
-+romstage-y += gpio.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-diff --git a/src/mainboard/dell/e6530/acpi/ec.asl b/src/mainboard/dell/e6530/acpi/ec.asl
-new file mode 100644
-index 0000000000..0d429410a9
---- /dev/null
-+++ b/src/mainboard/dell/e6530/acpi/ec.asl
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Device(EC)
-+{
-+ Name (_HID, EISAID("PNP0C09"))
-+ Name (_UID, 0)
-+ Name (_GPE, 16)
-+/* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e6530/acpi/platform.asl b/src/mainboard/dell/e6530/acpi/platform.asl
-new file mode 100644
-index 0000000000..2d24bbd9b9
---- /dev/null
-+++ b/src/mainboard/dell/e6530/acpi/platform.asl
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Method(_WAK, 1)
-+{
-+ /* FIXME: EC support */
-+ Return(Package() {0, 0})
-+}
-+
-+Method(_PTS,1)
-+{
-+ /* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e6530/acpi/superio.asl b/src/mainboard/dell/e6530/acpi/superio.asl
-new file mode 100644
-index 0000000000..55b1db5b11
---- /dev/null
-+++ b/src/mainboard/dell/e6530/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <drivers/pc80/pc/ps2_controller.asl>
-diff --git a/src/mainboard/dell/e6530/acpi_tables.c b/src/mainboard/dell/e6530/acpi_tables.c
-new file mode 100644
-index 0000000000..e2759659bf
---- /dev/null
-+++ b/src/mainboard/dell/e6530/acpi_tables.c
-@@ -0,0 +1,16 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi_gnvs.h>
-+#include <soc/nvs.h>
-+
-+/* FIXME: check this function. */
-+void mainboard_fill_gnvs(struct global_nvs *gnvs)
-+{
-+ /* The lid is open by default. */
-+ gnvs->lids = 1;
-+
-+ /* Temperature at which OS will shutdown */
-+ gnvs->tcrt = 100;
-+ /* Temperature at which OS will throttle CPU */
-+ gnvs->tpsv = 90;
-+}
-diff --git a/src/mainboard/dell/e6530/board_info.txt b/src/mainboard/dell/e6530/board_info.txt
-new file mode 100644
-index 0000000000..4601a4aaba
---- /dev/null
-+++ b/src/mainboard/dell/e6530/board_info.txt
-@@ -0,0 +1,6 @@
-+Category: laptop
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2012
-diff --git a/src/mainboard/dell/e6530/cmos.default b/src/mainboard/dell/e6530/cmos.default
-new file mode 100644
-index 0000000000..279415dfd1
---- /dev/null
-+++ b/src/mainboard/dell/e6530/cmos.default
-@@ -0,0 +1,9 @@
-+boot_option=Fallback
-+debug_level=Debug
-+power_on_after_fail=Disable
-+nmi=Enable
-+bluetooth=Enable
-+wwan=Enable
-+wlan=Enable
-+sata_mode=AHCI
-+me_state=Disabled
-diff --git a/src/mainboard/dell/e6530/cmos.layout b/src/mainboard/dell/e6530/cmos.layout
-new file mode 100644
-index 0000000000..e85ea4c661
---- /dev/null
-+++ b/src/mainboard/dell/e6530/cmos.layout
-@@ -0,0 +1,88 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+# -----------------------------------------------------------------
-+0 120 r 0 reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384 1 e 4 boot_option
-+388 4 h 0 reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395 4 e 6 debug_level
-+
-+#400 8 r 0 reserved for century byte
-+
-+# coreboot config options: southbridge
-+408 1 e 1 nmi
-+409 2 e 7 power_on_after_fail
-+411 1 e 9 sata_mode
-+
-+# coreboot config options: EC
-+412 1 e 1 bluetooth
-+413 1 e 1 wwan
-+415 1 e 1 wlan
-+
-+# coreboot config options: ME
-+424 1 e 14 me_state
-+425 2 h 0 me_state_prev
-+
-+# coreboot config options: northbridge
-+432 3 e 11 gfx_uma_size
-+435 2 e 12 hybrid_graphics_mode
-+440 8 h 0 volume
-+
-+# VBOOT
-+448 128 r 0 vbnv
-+
-+# SandyBridge MRC Scrambler Seed values
-+896 32 r 0 mrc_scrambler_seed
-+928 32 r 0 mrc_scrambler_seed_s3
-+960 16 r 0 mrc_scrambler_seed_chk
-+
-+# coreboot config options: check sums
-+984 16 h 0 check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID value text
-+1 0 Disable
-+1 1 Enable
-+2 0 Enable
-+2 1 Disable
-+4 0 Fallback
-+4 1 Normal
-+6 0 Emergency
-+6 1 Alert
-+6 2 Critical
-+6 3 Error
-+6 4 Warning
-+6 5 Notice
-+6 6 Info
-+6 7 Debug
-+6 8 Spew
-+7 0 Disable
-+7 1 Enable
-+7 2 Keep
-+9 0 AHCI
-+9 1 Compatible
-+11 0 32M
-+11 1 64M
-+11 2 96M
-+11 3 128M
-+11 4 160M
-+11 5 192M
-+11 6 224M
-+14 0 Normal
-+14 1 Disabled
-+
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 447 984
-diff --git a/src/mainboard/dell/e6530/data.vbt b/src/mainboard/dell/e6530/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..af64a913d521fe240ce30e114e90fe75d3841bbc
-GIT binary patch
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-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/e6530/devicetree.cb b/src/mainboard/dell/e6530/devicetree.cb
-new file mode 100644
-index 0000000000..96eed178c5
---- /dev/null
-+++ b/src/mainboard/dell/e6530/devicetree.cb
-@@ -0,0 +1,68 @@
-+chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
-+ register "gfx" = "GMA_STATIC_DISPLAYS(1)"
-+ register "gpu_cpu_backlight" = "0x00000251"
-+ register "gpu_dp_b_hotplug" = "4"
-+ register "gpu_dp_c_hotplug" = "4"
-+ register "gpu_dp_d_hotplug" = "4"
-+ register "gpu_panel_port_select" = "0"
-+ register "gpu_panel_power_backlight_off_delay" = "2300"
-+ register "gpu_panel_power_backlight_on_delay" = "2300"
-+ register "gpu_panel_power_cycle_delay" = "6"
-+ register "gpu_panel_power_down_delay" = "400"
-+ register "gpu_panel_power_up_delay" = "400"
-+ register "gpu_pch_backlight" = "0x13121312"
-+
-+ device domain 0x0 on
-+ subsystemid 0x1028 0x0535 inherit
-+
-+ device ref host_bridge on end # Host bridge
-+ device ref peg10 off end # PEG
-+ device ref igd on end # iGPU
-+
-+ chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-+ register "docking_supported" = "1"
-+ register "gen1_dec" = "0x007c0681"
-+ register "gen2_dec" = "0x005c0921"
-+ register "gen3_dec" = "0x003c07e1"
-+ register "gen4_dec" = "0x007c0901"
-+ register "gpi0_routing" = "2"
-+ register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
-+ register "pcie_port_coalesce" = "1"
-+ register "sata_interface_speed_support" = "0x3"
-+ register "sata_port_map" = "0x33"
-+ register "spi_lvscc" = "0x2005"
-+ register "spi_uvscc" = "0x2005"
-+ register "superspeed_capable_ports" = "0x0000000f"
-+ register "xhci_overcurrent_mapping" = "0x00000c03"
-+ register "xhci_switchable_ports" = "0x0000000f"
-+
-+ device ref xhci on end # USB 3.0 Controller
-+ device ref mei1 off end # Management Engine Interface 1
-+ device ref mei2 off end # Management Engine Interface 2
-+ device ref me_ide_r off end # Management Engine IDE-R
-+ device ref me_kt on end # Management Engine KT
-+ device ref gbe on end # Intel Gigabit Ethernet
-+ device ref ehci2 on end # USB2 EHCI #2
-+ device ref hda on end # High Definition Audio
-+ device ref pcie_rp1 on end # PCIe Port #1
-+ device ref pcie_rp2 on end # PCIe Port #2
-+ device ref pcie_rp3 on end # PCIe Port #3
-+ device ref pcie_rp4 on end # PCIe Port #4
-+ device ref pcie_rp5 off end # PCIe Port #5
-+ device ref pcie_rp6 on end # PCIe Port #6
-+ device ref pcie_rp7 off end # PCIe Port #7
-+ device ref pcie_rp8 off end # PCIe Port #8
-+ device ref ehci1 on end # USB2 EHCI #1
-+ device ref pci_bridge off end # PCI bridge
-+ device ref lpc on # LPC bridge
-+ chip ec/dell/mec5035
-+ device pnp ff.0 on end
-+ end
-+ end
-+ device ref sata1 on end # SATA Controller 1
-+ device ref smbus on end # SMBus
-+ device ref sata2 off end # SATA Controller 2
-+ device ref thermal off end # Thermal
-+ end
-+ end
-+end
-diff --git a/src/mainboard/dell/e6530/dsdt.asl b/src/mainboard/dell/e6530/dsdt.asl
-new file mode 100644
-index 0000000000..7d13c55b08
---- /dev/null
-+++ b/src/mainboard/dell/e6530/dsdt.asl
-@@ -0,0 +1,30 @@
-+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
-+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <acpi/acpi.h>
-+
-+DefinitionBlock(
-+ "dsdt.aml",
-+ "DSDT",
-+ ACPI_DSDT_REV_2,
-+ OEM_ID,
-+ ACPI_TABLE_CREATOR,
-+ 0x20141018 /* OEM revision */
-+)
-+{
-+ #include <acpi/dsdt_top.asl>
-+ #include "acpi/platform.asl"
-+ #include <cpu/intel/common/acpi/cpu.asl>
-+ #include <southbridge/intel/common/acpi/platform.asl>
-+ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-+ #include <southbridge/intel/common/acpi/sleepstates.asl>
-+
-+ Device (\_SB.PCI0)
-+ {
-+ #include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-+ #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
-+ #include <southbridge/intel/bd82x6x/acpi/pch.asl>
-+ }
-+}
-diff --git a/src/mainboard/dell/e6530/early_init.c b/src/mainboard/dell/e6530/early_init.c
-new file mode 100644
-index 0000000000..d57f48e7f1
---- /dev/null
-+++ b/src/mainboard/dell/e6530/early_init.c
-@@ -0,0 +1,38 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <northbridge/intel/sandybridge/raminit_native.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+ { 1, 1, 0 },
-+ { 1, 1, 0 },
-+ { 1, 1, 1 },
-+ { 1, 1, 1 },
-+ { 1, 1, 2 },
-+ { 1, 1, 2 },
-+ { 1, 0, 3 },
-+ { 1, 1, 3 },
-+ { 1, 1, 4 },
-+ { 1, 1, 4 },
-+ { 1, 1, 5 },
-+ { 1, 1, 5 },
-+ { 1, 2, 6 },
-+ { 1, 2, 6 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+ pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1c0f);
-+ pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0000);
-+ mec5035_early_init();
-+}
-+
-+void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-+{
-+ read_spd(&spd[0], 0x50, id_only);
-+ read_spd(&spd[2], 0x52, id_only);
-+}
-diff --git a/src/mainboard/dell/e6530/gma-mainboard.ads b/src/mainboard/dell/e6530/gma-mainboard.ads
-new file mode 100644
-index 0000000000..1310830c8e
---- /dev/null
-+++ b/src/mainboard/dell/e6530/gma-mainboard.ads
-@@ -0,0 +1,20 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+ ports : constant Port_List :=
-+ (
-+ HDMI1, -- mainboard HDMI
-+ DP2, -- dock DP
-+ DP3, -- dock DP
-+ Analog, --mainboard VGA
-+ LVDS,
-+ others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/e6530/gpio.c b/src/mainboard/dell/e6530/gpio.c
-new file mode 100644
-index 0000000000..777570765a
---- /dev/null
-+++ b/src/mainboard/dell/e6530/gpio.c
-@@ -0,0 +1,192 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+ .gpio0 = GPIO_MODE_GPIO,
-+ .gpio1 = GPIO_MODE_GPIO,
-+ .gpio2 = GPIO_MODE_GPIO,
-+ .gpio3 = GPIO_MODE_GPIO,
-+ .gpio4 = GPIO_MODE_GPIO,
-+ .gpio5 = GPIO_MODE_NATIVE,
-+ .gpio6 = GPIO_MODE_GPIO,
-+ .gpio7 = GPIO_MODE_GPIO,
-+ .gpio8 = GPIO_MODE_GPIO,
-+ .gpio9 = GPIO_MODE_NATIVE,
-+ .gpio10 = GPIO_MODE_NATIVE,
-+ .gpio11 = GPIO_MODE_NATIVE,
-+ .gpio12 = GPIO_MODE_NATIVE,
-+ .gpio13 = GPIO_MODE_GPIO,
-+ .gpio14 = GPIO_MODE_GPIO,
-+ .gpio15 = GPIO_MODE_GPIO,
-+ .gpio16 = GPIO_MODE_GPIO,
-+ .gpio17 = GPIO_MODE_GPIO,
-+ .gpio18 = GPIO_MODE_NATIVE,
-+ .gpio19 = GPIO_MODE_GPIO,
-+ .gpio20 = GPIO_MODE_NATIVE,
-+ .gpio21 = GPIO_MODE_GPIO,
-+ .gpio22 = GPIO_MODE_GPIO,
-+ .gpio23 = GPIO_MODE_NATIVE,
-+ .gpio24 = GPIO_MODE_GPIO,
-+ .gpio25 = GPIO_MODE_NATIVE,
-+ .gpio26 = GPIO_MODE_NATIVE,
-+ .gpio27 = GPIO_MODE_GPIO,
-+ .gpio28 = GPIO_MODE_GPIO,
-+ .gpio29 = GPIO_MODE_GPIO,
-+ .gpio30 = GPIO_MODE_NATIVE,
-+ .gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+ .gpio0 = GPIO_DIR_INPUT,
-+ .gpio1 = GPIO_DIR_INPUT,
-+ .gpio2 = GPIO_DIR_INPUT,
-+ .gpio3 = GPIO_DIR_INPUT,
-+ .gpio4 = GPIO_DIR_INPUT,
-+ .gpio6 = GPIO_DIR_INPUT,
-+ .gpio7 = GPIO_DIR_INPUT,
-+ .gpio8 = GPIO_DIR_INPUT,
-+ .gpio13 = GPIO_DIR_INPUT,
-+ .gpio14 = GPIO_DIR_INPUT,
-+ .gpio15 = GPIO_DIR_INPUT,
-+ .gpio16 = GPIO_DIR_INPUT,
-+ .gpio17 = GPIO_DIR_INPUT,
-+ .gpio19 = GPIO_DIR_INPUT,
-+ .gpio21 = GPIO_DIR_INPUT,
-+ .gpio22 = GPIO_DIR_INPUT,
-+ .gpio24 = GPIO_DIR_INPUT,
-+ .gpio27 = GPIO_DIR_INPUT,
-+ .gpio28 = GPIO_DIR_OUTPUT,
-+ .gpio29 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+ .gpio28 = GPIO_LEVEL_LOW,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+ .gpio30 = GPIO_RESET_RSMRST,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+ .gpio0 = GPIO_INVERT,
-+ .gpio8 = GPIO_INVERT,
-+ .gpio13 = GPIO_INVERT,
-+ .gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+ .gpio32 = GPIO_MODE_NATIVE,
-+ .gpio33 = GPIO_MODE_GPIO,
-+ .gpio34 = GPIO_MODE_GPIO,
-+ .gpio35 = GPIO_MODE_GPIO,
-+ .gpio36 = GPIO_MODE_GPIO,
-+ .gpio37 = GPIO_MODE_GPIO,
-+ .gpio38 = GPIO_MODE_GPIO,
-+ .gpio39 = GPIO_MODE_GPIO,
-+ .gpio40 = GPIO_MODE_NATIVE,
-+ .gpio41 = GPIO_MODE_NATIVE,
-+ .gpio42 = GPIO_MODE_NATIVE,
-+ .gpio43 = GPIO_MODE_NATIVE,
-+ .gpio44 = GPIO_MODE_NATIVE,
-+ .gpio45 = GPIO_MODE_GPIO,
-+ .gpio46 = GPIO_MODE_NATIVE,
-+ .gpio47 = GPIO_MODE_NATIVE,
-+ .gpio48 = GPIO_MODE_GPIO,
-+ .gpio49 = GPIO_MODE_GPIO,
-+ .gpio50 = GPIO_MODE_NATIVE,
-+ .gpio51 = GPIO_MODE_GPIO,
-+ .gpio52 = GPIO_MODE_GPIO,
-+ .gpio53 = GPIO_MODE_NATIVE,
-+ .gpio54 = GPIO_MODE_GPIO,
-+ .gpio55 = GPIO_MODE_NATIVE,
-+ .gpio56 = GPIO_MODE_NATIVE,
-+ .gpio57 = GPIO_MODE_GPIO,
-+ .gpio58 = GPIO_MODE_NATIVE,
-+ .gpio59 = GPIO_MODE_NATIVE,
-+ .gpio60 = GPIO_MODE_GPIO,
-+ .gpio61 = GPIO_MODE_NATIVE,
-+ .gpio62 = GPIO_MODE_NATIVE,
-+ .gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+ .gpio33 = GPIO_DIR_INPUT,
-+ .gpio34 = GPIO_DIR_OUTPUT,
-+ .gpio35 = GPIO_DIR_INPUT,
-+ .gpio36 = GPIO_DIR_INPUT,
-+ .gpio37 = GPIO_DIR_INPUT,
-+ .gpio38 = GPIO_DIR_INPUT,
-+ .gpio39 = GPIO_DIR_INPUT,
-+ .gpio45 = GPIO_DIR_OUTPUT,
-+ .gpio48 = GPIO_DIR_INPUT,
-+ .gpio49 = GPIO_DIR_INPUT,
-+ .gpio51 = GPIO_DIR_INPUT,
-+ .gpio52 = GPIO_DIR_INPUT,
-+ .gpio54 = GPIO_DIR_INPUT,
-+ .gpio57 = GPIO_DIR_INPUT,
-+ .gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+ .gpio34 = GPIO_LEVEL_HIGH,
-+ .gpio45 = GPIO_LEVEL_LOW,
-+ .gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+ .gpio64 = GPIO_MODE_NATIVE,
-+ .gpio65 = GPIO_MODE_NATIVE,
-+ .gpio66 = GPIO_MODE_NATIVE,
-+ .gpio67 = GPIO_MODE_NATIVE,
-+ .gpio68 = GPIO_MODE_GPIO,
-+ .gpio69 = GPIO_MODE_GPIO,
-+ .gpio70 = GPIO_MODE_GPIO,
-+ .gpio71 = GPIO_MODE_GPIO,
-+ .gpio72 = GPIO_MODE_NATIVE,
-+ .gpio73 = GPIO_MODE_NATIVE,
-+ .gpio74 = GPIO_MODE_NATIVE,
-+ .gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+ .gpio68 = GPIO_DIR_INPUT,
-+ .gpio69 = GPIO_DIR_INPUT,
-+ .gpio70 = GPIO_DIR_INPUT,
-+ .gpio71 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+ .set1 = {
-+ .mode = &pch_gpio_set1_mode,
-+ .direction = &pch_gpio_set1_direction,
-+ .level = &pch_gpio_set1_level,
-+ .blink = &pch_gpio_set1_blink,
-+ .invert = &pch_gpio_set1_invert,
-+ .reset = &pch_gpio_set1_reset,
-+ },
-+ .set2 = {
-+ .mode = &pch_gpio_set2_mode,
-+ .direction = &pch_gpio_set2_direction,
-+ .level = &pch_gpio_set2_level,
-+ .reset = &pch_gpio_set2_reset,
-+ },
-+ .set3 = {
-+ .mode = &pch_gpio_set3_mode,
-+ .direction = &pch_gpio_set3_direction,
-+ .level = &pch_gpio_set3_level,
-+ .reset = &pch_gpio_set3_reset,
-+ },
-+};
-diff --git a/src/mainboard/dell/e6530/hda_verb.c b/src/mainboard/dell/e6530/hda_verb.c
-new file mode 100644
-index 0000000000..9de7e34311
---- /dev/null
-+++ b/src/mainboard/dell/e6530/hda_verb.c
-@@ -0,0 +1,33 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+ 0x111d76df, /* Codec Vendor / Device ID: IDT */
-+ 0x10280535, /* Subsystem ID */
-+ 11, /* Number of 4 dword sets */
-+ AZALIA_SUBVENDOR(0, 0x10280535),
-+ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
-+ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
-+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+ AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
-+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+ AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+ 0x80862806, /* Codec Vendor / Device ID: Intel */
-+ 0x80860101, /* Subsystem ID */
-+ 4, /* Number of 4 dword sets */
-+ AZALIA_SUBVENDOR(3, 0x80860101),
-+ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/e6530/mainboard.c b/src/mainboard/dell/e6530/mainboard.c
-new file mode 100644
-index 0000000000..31e49802fc
---- /dev/null
-+++ b/src/mainboard/dell/e6530/mainboard.c
-@@ -0,0 +1,21 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+#include <drivers/intel/gma/int15.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+#include <ec/acpi/ec.h>
-+#include <console/console.h>
-+#include <pc80/keyboard.h>
-+
-+static void mainboard_enable(struct device *dev)
-+{
-+
-+ /* FIXME: fix these values. */
-+ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-+ GMA_INT15_PANEL_FIT_DEFAULT,
-+ GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-+}
-+
-+struct chip_operations mainboard_ops = {
-+ .enable_dev = mainboard_enable,
-+};
---
-2.39.2
-
diff --git a/config/coreboot/default/patches/0027-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch b/config/coreboot/default/patches/0027-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch
new file mode 100644
index 00000000..bd6f6218
--- /dev/null
+++ b/config/coreboot/default/patches/0027-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch
@@ -0,0 +1,440 @@
+From 80af5303da07197a7da5262e82a59b691ffed5a2 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Thu, 26 Oct 2017 21:26:43 +0800
+Subject: [PATCH 27/65] mb/dell: Add Latitude E6230 (Ivy Bridge)
+
+This was adapted from CB:22693 from Iru Cai, which was based on
+autoport. I do not physically have this system. Someone with physical
+access to an E6230 running version A11 of the vendor firmware sent me
+the VBT after running the command `intelvbttool --inlegacy --outvbt
+data.vbt`. This new version of the port has not yet been tested.
+
+The EC is the SMSC MEC5055, which seems to be compatible with the
+existing MEC5035 code. As with the other Dell systems with this EC, this
+board is assumed to be internally flashable using an EC command that
+tells it to pull the FDO pin low on the next boot, which also tells the
+vendor firmware to disable all write protections to the flash [1].
+
+[1] https://gitlab.com/nic3-14159/dell-flash-unlock
+
+Original-Change-Id: I8cdc01e902e670310628809416290045c2102340
+Change-Id: I32927beea7c29b96a851ab77ed15b0160f16d369
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/snb_ivb_latitude/Kconfig | 11 +-
+ .../dell/snb_ivb_latitude/Kconfig.name | 3 +
+ .../snb_ivb_latitude/variants/e6230/data.vbt | Bin 0 -> 4280 bytes
+ .../variants/e6230/early_init.c | 12 ++
+ .../snb_ivb_latitude/variants/e6230/gpio.c | 193 ++++++++++++++++++
+ .../variants/e6230/hda_verb.c | 32 +++
+ .../variants/e6230/overridetree.cb | 40 ++++
+ 7 files changed, 290 insertions(+), 1 deletion(-)
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/data.vbt
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/gpio.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+index 49bf225fe2..f6e097930b 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig
+@@ -56,6 +56,12 @@ config BOARD_DELL_LATITUDE_E5530
+ select BOARD_ROMSIZE_KB_12288
+ select SOUTHBRIDGE_INTEL_C216
+
++config BOARD_DELL_LATITUDE_E6230
++ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
++ select BOARD_ROMSIZE_KB_12288
++ select MAINBOARD_USES_IFD_GBE_REGION
++ select SOUTHBRIDGE_INTEL_C216
++
+ config BOARD_DELL_LATITUDE_E6330
+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON
+ select BOARD_ROMSIZE_KB_12288
+@@ -90,6 +96,7 @@ config MAINBOARD_PART_NUMBER
+ default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420
+ default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520
+ default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530
++ default "Latitude E6230" if BOARD_DELL_LATITUDE_E6230
+ default "Latitude E6330" if BOARD_DELL_LATITUDE_E6330
+ default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430
+ default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530
+@@ -108,6 +115,7 @@ config VARIANT_DIR
+ default "e6420" if BOARD_DELL_LATITUDE_E6420
+ default "e6520" if BOARD_DELL_LATITUDE_E6520
+ default "e5530" if BOARD_DELL_LATITUDE_E5530
++ default "e6230" if BOARD_DELL_LATITUDE_E6230
+ default "e6330" if BOARD_DELL_LATITUDE_E6330
+ default "e6430" if BOARD_DELL_LATITUDE_E6430
+ default "e6530" if BOARD_DELL_LATITUDE_E6530
+@@ -121,7 +129,8 @@ config VGA_BIOS_ID
+ || BOARD_DELL_LATITUDE_E5520 \
+ || BOARD_DELL_LATITUDE_E6220 \
+ || BOARD_DELL_LATITUDE_E6320
+- default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \
++ default "8086,0166" if BOARD_DELL_LATITUDE_E6230 \
++ || BOARD_DELL_LATITUDE_E6430 \
+ || BOARD_DELL_LATITUDE_E6530
+
+ endif
+diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+index d6fc8eb224..cb7bbd5cdb 100644
+--- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
++++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name
+@@ -21,6 +21,9 @@ config BOARD_DELL_LATITUDE_E6520
+ config BOARD_DELL_LATITUDE_E5530
+ bool "Latitude E5530"
+
++config BOARD_DELL_LATITUDE_E6230
++ bool "Latitude E6230"
++
+ config BOARD_DELL_LATITUDE_E6330
+ bool "Latitude E6330"
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..45ce8f435eea647a0bddaab3fd1e9282c87afc66
+GIT binary patch
+literal 4280
+zcmdT{Yiu0V75-*tAG5PFyX&zDekA7P<*tbx&o1`j23L%CmvkLWvN7(mLa6alZ?J`9
+zo3#m4YVlG`2;w12Ajppt<qra(R;8*G@uw*8gIcsg2vxi!q_pBkmGUD$s9IGi+jD1T
+zO`Kg43n@JA>~|mMp8L%`XU@4ZyCa_(r`z|Z`bP4p-rEkOMn-R;Ntk#o`b)0sOKRl6
+z?T0eM<HLtiqX*Kr(o5Kc<Iyk90h5ws=!y8i;K=M^X(l$-Eoeyyj>ZS*@LZWP#hD{>
+z<r2jcJ;b8e!oAb;^QB2D#7*krI^IpA=?ra8?xvqj6=&}$QL2a1J(QuD($UfkElf=x
+zUM!UtXmO4PP4h^;&)jWJvd(Pj0lIs7wpgAnE!1!MB1w8~{^#ZCd!`mCmhPs6X_~zW
+zGae^<%aoog&+n$;nHd@rItw&bS}2u|mL_-Ws;&ZOWW_51k`IALAW8pAz~@C!!B)bs
+z1x-OrK~}*8L07Po(5+xZL6I<}phTEf5QRsVJYHa{f^AWEV+2@lvrPVS%snsOn?N)w
+zpKbvwOnk&Q_6Y?aB;r1=!TYwts;yA@BnbFfECo!7JVJq7g^yhYMUV;wlBjksp(hI2
+z^<}E7r698{-pw!*{mH>SLslxYH@j~%H#VLx+<8~!;a@$n+>Q%xHrQ8KGI21_iL4sI
+zF*$}m$R7Mr9z@Z*ir@Q9eClsSmC+t(g`q~VQ&nIxZenav_^Buc78s8*o@e|<QE{4a
+zhVeGz1IFJN|784&5eTYiVstQeGWr-lWTY9lG45a#8TT^oXDl%uXFS9BHN$^DE>t}g
+z1Z-O>lG`>pEuvmL-HpmgSANo!2hWQq2B>Zua$8%tfvQ>!1n@=m9ri_4`H|Rx#SH9n
+zDdRF_-FDP&WjW`L$GK%a6x?yO8l2!^g0HJrtA7TknNzCO?|U!wCv2^-5pJ%LW6!+P
+z)anX%E>`gP%3Er4c6+J9x=Atk1{Abrr1|WSY3P`SO5j!R5F*vbbQ%AaSHnR_+x&Op
+zA%8C-Pk=-Hs+FL90B)E*y3FUTIA1J)&pxRF$tzAkNr7a6_-8v$@j~G~3keqYd5I<T
+z`Kb3Q@LKkANhE_aMG_R&<ewt+nVbp5l*3G7mYJEKr<kXS;TA&^G;5`q5b>;y8g^P<
+zfWO_D2@EyVVBxnpv*}hgTeeRzWz9BoISh>M%^k`WXG=5ti$_Wu99)~lWE-qubeXNk
+zla9Tu=Jhyn5T<3$H#?Hfm-`+(d$7IBDx9cEvNv1i-LEDr>r7438bfkPcKod+mwd22
+z%{^(w&NuG)MKl0fTMTXZFJEm~k;KCj*D60g=j!2jsP)<fOUGaEZa`&xE*)?FZuW#-
+z8!Of7<|N(^R#xcjmZ&nZ%~{pC5y_T*PB2LdDjuI#Te}-4Qccvj+u4N3TBx|oVy*mP
+z<9xfFziy4n?sPv3Sqo7jWMo3>{tzvOjAJ2nB}At~#%f4?FGT+d8LFnXXtYN&Mm06B
+z(JwUPX-z$$(d(M=uBLvh@h6#K=;~&jQo1p&t3TCgSvQ{3)l)jXr5hjW>fd!z!bW>o
+z-4UjJVdJi_dN@o^hK(1(>dRqzCv2PztLMTLjTqY^YEMMJ{=B#1IV)9~IMg|yl(NPF
+zQSfMX`?(b5)))B!zjy0B$ua20CCLTPl^IS&2=T&Zid9-1*K{VAJP?rxjYC+zGDCe*
+ziQI7VfF17@3`3W-qCN>lPC5CL_c?p0F<ekqB;g0q3P1R5KNubPsT>TGXaGB3i~{ZE
+zr=QtIprytDnU7C*Wj%x0k)O{Y%nUnl%}K%F|J_iVaD&ubW4Qbtx;pZEb9}f^Yd;Ea
+zI1Ha{7Yt~z{LAY++1QG{F6*_4WsUziY{x?%I9B}i5-Tphhk8FGm%J<d_0CUoV^%N&
+zTe02j+LXk=ZyWoe7L$#wsEY@VC>f!3d-ysG_9>uk%#)4xpxb+ZkJdel#+h}l9j9`1
+zt*M!5u?i4YtZ+WECo6$LJF06|G-mMZskGiV*lQJf-ItB+hltI<?{5E<^P=0rL<P+g
+z(P)!c<?MlvMK0O~UwZ4*;x|ms(&&#Vn_-4{KM#g~a=;$N2QD7mSX0{t<cf>sId@e&
+z-cN<SWA3VKCN6g3lx#+PySpWu*+pw}>vr(fgI)K*zkikg6TDJi?^}ghc*U*%A%EGg
+Y$$8Z}9a~<{Q@y10T!W`-d%n2+Kj)*Kg#Z8m
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c
+new file mode 100644
+index 0000000000..24c1b32467
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c
+@@ -0,0 +1,12 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pci_ops.h>
++#include <ec/dell/mec5035/mec5035.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++void bootblock_mainboard_early_init(void)
++{
++ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN);
++ mec5035_early_init();
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/gpio.c
+new file mode 100644
+index 0000000000..c07e4b1c56
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/gpio.c
+@@ -0,0 +1,193 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++ .gpio0 = GPIO_MODE_GPIO,
++ .gpio1 = GPIO_MODE_GPIO,
++ .gpio2 = GPIO_MODE_GPIO,
++ .gpio3 = GPIO_MODE_GPIO,
++ .gpio4 = GPIO_MODE_GPIO,
++ .gpio5 = GPIO_MODE_NATIVE,
++ .gpio6 = GPIO_MODE_GPIO,
++ .gpio7 = GPIO_MODE_GPIO,
++ .gpio8 = GPIO_MODE_GPIO,
++ .gpio9 = GPIO_MODE_NATIVE,
++ .gpio10 = GPIO_MODE_NATIVE,
++ .gpio11 = GPIO_MODE_NATIVE,
++ .gpio12 = GPIO_MODE_NATIVE,
++ .gpio13 = GPIO_MODE_GPIO,
++ .gpio14 = GPIO_MODE_GPIO,
++ .gpio15 = GPIO_MODE_GPIO,
++ .gpio16 = GPIO_MODE_GPIO,
++ .gpio17 = GPIO_MODE_GPIO,
++ .gpio18 = GPIO_MODE_NATIVE,
++ .gpio19 = GPIO_MODE_GPIO,
++ .gpio20 = GPIO_MODE_NATIVE,
++ .gpio21 = GPIO_MODE_GPIO,
++ .gpio22 = GPIO_MODE_GPIO,
++ .gpio23 = GPIO_MODE_NATIVE,
++ .gpio24 = GPIO_MODE_GPIO,
++ .gpio25 = GPIO_MODE_NATIVE,
++ .gpio26 = GPIO_MODE_NATIVE,
++ .gpio27 = GPIO_MODE_GPIO,
++ .gpio28 = GPIO_MODE_GPIO,
++ .gpio29 = GPIO_MODE_GPIO,
++ .gpio30 = GPIO_MODE_NATIVE,
++ .gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++ .gpio0 = GPIO_DIR_INPUT,
++ .gpio1 = GPIO_DIR_INPUT,
++ .gpio2 = GPIO_DIR_INPUT,
++ .gpio3 = GPIO_DIR_INPUT,
++ .gpio4 = GPIO_DIR_INPUT,
++ .gpio6 = GPIO_DIR_INPUT,
++ .gpio7 = GPIO_DIR_INPUT,
++ .gpio8 = GPIO_DIR_INPUT,
++ .gpio13 = GPIO_DIR_INPUT,
++ .gpio14 = GPIO_DIR_INPUT,
++ .gpio15 = GPIO_DIR_INPUT,
++ .gpio16 = GPIO_DIR_INPUT,
++ .gpio17 = GPIO_DIR_OUTPUT,
++ .gpio19 = GPIO_DIR_INPUT,
++ .gpio21 = GPIO_DIR_INPUT,
++ .gpio22 = GPIO_DIR_INPUT,
++ .gpio24 = GPIO_DIR_INPUT,
++ .gpio27 = GPIO_DIR_INPUT,
++ .gpio28 = GPIO_DIR_OUTPUT,
++ .gpio29 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++ .gpio17 = GPIO_LEVEL_HIGH,
++ .gpio28 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++ .gpio30 = GPIO_RESET_RSMRST,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++ .gpio0 = GPIO_INVERT,
++ .gpio8 = GPIO_INVERT,
++ .gpio13 = GPIO_INVERT,
++ .gpio14 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++ .gpio32 = GPIO_MODE_NATIVE,
++ .gpio33 = GPIO_MODE_GPIO,
++ .gpio34 = GPIO_MODE_GPIO,
++ .gpio35 = GPIO_MODE_GPIO,
++ .gpio36 = GPIO_MODE_GPIO,
++ .gpio37 = GPIO_MODE_GPIO,
++ .gpio38 = GPIO_MODE_GPIO,
++ .gpio39 = GPIO_MODE_GPIO,
++ .gpio40 = GPIO_MODE_NATIVE,
++ .gpio41 = GPIO_MODE_NATIVE,
++ .gpio42 = GPIO_MODE_NATIVE,
++ .gpio43 = GPIO_MODE_NATIVE,
++ .gpio44 = GPIO_MODE_NATIVE,
++ .gpio45 = GPIO_MODE_GPIO,
++ .gpio46 = GPIO_MODE_NATIVE,
++ .gpio47 = GPIO_MODE_NATIVE,
++ .gpio48 = GPIO_MODE_GPIO,
++ .gpio49 = GPIO_MODE_GPIO,
++ .gpio50 = GPIO_MODE_NATIVE,
++ .gpio51 = GPIO_MODE_GPIO,
++ .gpio52 = GPIO_MODE_GPIO,
++ .gpio53 = GPIO_MODE_NATIVE,
++ .gpio54 = GPIO_MODE_GPIO,
++ .gpio55 = GPIO_MODE_NATIVE,
++ .gpio56 = GPIO_MODE_NATIVE,
++ .gpio57 = GPIO_MODE_GPIO,
++ .gpio58 = GPIO_MODE_NATIVE,
++ .gpio59 = GPIO_MODE_NATIVE,
++ .gpio60 = GPIO_MODE_GPIO,
++ .gpio61 = GPIO_MODE_NATIVE,
++ .gpio62 = GPIO_MODE_NATIVE,
++ .gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++ .gpio33 = GPIO_DIR_INPUT,
++ .gpio34 = GPIO_DIR_OUTPUT,
++ .gpio35 = GPIO_DIR_INPUT,
++ .gpio36 = GPIO_DIR_INPUT,
++ .gpio37 = GPIO_DIR_INPUT,
++ .gpio38 = GPIO_DIR_INPUT,
++ .gpio39 = GPIO_DIR_INPUT,
++ .gpio45 = GPIO_DIR_OUTPUT,
++ .gpio48 = GPIO_DIR_INPUT,
++ .gpio49 = GPIO_DIR_INPUT,
++ .gpio51 = GPIO_DIR_INPUT,
++ .gpio52 = GPIO_DIR_INPUT,
++ .gpio54 = GPIO_DIR_INPUT,
++ .gpio57 = GPIO_DIR_INPUT,
++ .gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++ .gpio34 = GPIO_LEVEL_HIGH,
++ .gpio45 = GPIO_LEVEL_LOW,
++ .gpio60 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++ .gpio64 = GPIO_MODE_NATIVE,
++ .gpio65 = GPIO_MODE_NATIVE,
++ .gpio66 = GPIO_MODE_NATIVE,
++ .gpio67 = GPIO_MODE_NATIVE,
++ .gpio68 = GPIO_MODE_GPIO,
++ .gpio69 = GPIO_MODE_GPIO,
++ .gpio70 = GPIO_MODE_GPIO,
++ .gpio71 = GPIO_MODE_GPIO,
++ .gpio72 = GPIO_MODE_NATIVE,
++ .gpio73 = GPIO_MODE_NATIVE,
++ .gpio74 = GPIO_MODE_NATIVE,
++ .gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++ .gpio68 = GPIO_DIR_INPUT,
++ .gpio69 = GPIO_DIR_INPUT,
++ .gpio70 = GPIO_DIR_INPUT,
++ .gpio71 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++ .set1 = {
++ .mode = &pch_gpio_set1_mode,
++ .direction = &pch_gpio_set1_direction,
++ .level = &pch_gpio_set1_level,
++ .blink = &pch_gpio_set1_blink,
++ .invert = &pch_gpio_set1_invert,
++ .reset = &pch_gpio_set1_reset,
++ },
++ .set2 = {
++ .mode = &pch_gpio_set2_mode,
++ .direction = &pch_gpio_set2_direction,
++ .level = &pch_gpio_set2_level,
++ .reset = &pch_gpio_set2_reset,
++ },
++ .set3 = {
++ .mode = &pch_gpio_set3_mode,
++ .direction = &pch_gpio_set3_direction,
++ .level = &pch_gpio_set3_level,
++ .reset = &pch_gpio_set3_reset,
++ },
++};
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c
+new file mode 100644
+index 0000000000..f6876f9e09
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++ 0x111d76df, /* Codec Vendor / Device ID: IDT */
++ 0x10280532, /* Subsystem ID */
++ 11, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(0, 0x10280532),
++ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
++ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
++ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
++ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
++ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
++ AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
++ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
++ AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
++
++ 0x80862806, /* Codec Vendor / Device ID: Intel */
++ 0x80860101, /* Subsystem ID */
++ 4, /* Number of 4 dword sets */
++ AZALIA_SUBVENDOR(3, 0x80860101),
++ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
++ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb
+new file mode 100644
+index 0000000000..3a0fa720da
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb
+@@ -0,0 +1,40 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/sandybridge
++ device domain 0 on
++ subsystemid 0x1028 0x0532 inherit
++
++ device ref igd on
++ register "gpu_cpu_backlight" = "0x000009e9"
++ register "gpu_pch_backlight" = "0x13121312"
++ end
++
++ chip southbridge/intel/bd82x6x
++ register "usb_port_config" = "{
++ { 1, 1, 0 },
++ { 1, 1, 0 },
++ { 1, 0, 1 },
++ { 1, 2, 1 },
++ { 1, 0, 2 },
++ { 1, 0, 2 },
++ { 1, 0, 3 },
++ { 1, 1, 3 },
++ { 1, 2, 4 },
++ { 1, 1, 4 },
++ { 1, 1, 5 },
++ { 1, 1, 5 },
++ { 1, 2, 6 },
++ { 1, 0, 6 },
++ }"
++
++ device ref xhci on
++ register "superspeed_capable_ports" = "0x0000000f"
++ register "xhci_overcurrent_mapping" = "0x00000c03"
++ register "xhci_switchable_ports" = "0x0000000f"
++ end
++ device ref sata1 on
++ register "sata_port_map" = "0x31"
++ end
++ end
++ end
++end
+--
+2.39.5
+
diff --git a/config/coreboot/default/patches/0027-rebase-dell-e6530-to-newer-coreboot-code.patch b/config/coreboot/default/patches/0027-rebase-dell-e6530-to-newer-coreboot-code.patch
deleted file mode 100644
index 130984fb..00000000
--- a/config/coreboot/default/patches/0027-rebase-dell-e6530-to-newer-coreboot-code.patch
+++ /dev/null
@@ -1,145 +0,0 @@
-From 88652afd52b0a8e0fc8bb1656e59d8ae4796d847 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Thu, 25 Jan 2024 14:30:03 +0000
-Subject: [PATCH 27/30] rebase dell/e6530 to newer coreboot code
-
-i diffed nicholas's current e6430 patch, versus the old one,
-prior to this revision update in lbmk, also cross referencing
-the original e6430 and e6530 patches, diffing them, and the
-result in this patch. most notably, spd data is now defined in
-the devicetree, instead of early_init.c as per:
-
-commit 45e4ab4a660cb7ce312f2d11a153f2d9ef4158da
-Author: Keith Hui <buurin@gmail.com>
-Date: Sat Jul 22 12:49:05 2023 -0400
- mb/*: Update SPD mapping for sandybridge boards
-
-This should work fine. Will test after this builds.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/mainboard/dell/e6530/Kconfig | 15 +++++++++++----
- src/mainboard/dell/e6530/cmos.layout | 2 +-
- src/mainboard/dell/e6530/devicetree.cb | 8 +++++---
- src/mainboard/dell/e6530/early_init.c | 12 +++---------
- 4 files changed, 20 insertions(+), 17 deletions(-)
-
-diff --git a/src/mainboard/dell/e6530/Kconfig b/src/mainboard/dell/e6530/Kconfig
-index 582adddbd4..a104566890 100644
---- a/src/mainboard/dell/e6530/Kconfig
-+++ b/src/mainboard/dell/e6530/Kconfig
-@@ -20,18 +20,25 @@ config BOARD_SPECIFIC_OPTIONS
- select SYSTEM_TYPE_LAPTOP
- select USE_NATIVE_RAMINIT
-
-+config DRAM_RESET_GATE_GPIO
-+ default 60
-+
- config MAINBOARD_DIR
- default "dell/e6530"
-
- config MAINBOARD_PART_NUMBER
- default "Latitude E6530"
-
--config VGA_BIOS_ID
-- default "8086,0166"
-+config PS2K_EISAID
-+ default "PNP0303"
-
--config DRAM_RESET_GATE_GPIO
-- default 60
-+config PS2M_EISAID
-+ default "PNP0F13"
-
- config USBDEBUG_HCD_INDEX
- default 2
-+
-+config VGA_BIOS_ID
-+ default "8086,0166"
-+
- endif
-diff --git a/src/mainboard/dell/e6530/cmos.layout b/src/mainboard/dell/e6530/cmos.layout
-index e85ea4c661..1aa7e77bce 100644
---- a/src/mainboard/dell/e6530/cmos.layout
-+++ b/src/mainboard/dell/e6530/cmos.layout
-@@ -25,7 +25,7 @@ entries
- # coreboot config options: EC
- 412 1 e 1 bluetooth
- 413 1 e 1 wwan
--415 1 e 1 wlan
-+414 1 e 1 wlan
-
- # coreboot config options: ME
- 424 1 e 14 me_state
-diff --git a/src/mainboard/dell/e6530/devicetree.cb b/src/mainboard/dell/e6530/devicetree.cb
-index 96eed178c5..37135bcf0f 100644
---- a/src/mainboard/dell/e6530/devicetree.cb
-+++ b/src/mainboard/dell/e6530/devicetree.cb
-@@ -12,6 +12,8 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
- register "gpu_panel_power_up_delay" = "400"
- register "gpu_pch_backlight" = "0x13121312"
-
-+ register "spd_addresses" = "{0x50, 0, 0x52, 0}"
-+
- device domain 0x0 on
- subsystemid 0x1028 0x0535 inherit
-
-@@ -24,7 +26,7 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
- register "gen1_dec" = "0x007c0681"
- register "gen2_dec" = "0x005c0921"
- register "gen3_dec" = "0x003c07e1"
-- register "gen4_dec" = "0x007c0901"
-+ register "gen4_dec" = "0x00000911" # Ports 0x910/0x911 for EC
- register "gpi0_routing" = "2"
- register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
- register "pcie_port_coalesce" = "1"
-@@ -37,7 +39,7 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
- register "xhci_switchable_ports" = "0x0000000f"
-
- device ref xhci on end # USB 3.0 Controller
-- device ref mei1 off end # Management Engine Interface 1
-+ device ref mei1 on end # Management Engine Interface 1
- device ref mei2 off end # Management Engine Interface 2
- device ref me_ide_r off end # Management Engine IDE-R
- device ref me_kt on end # Management Engine KT
-@@ -48,7 +50,7 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
- device ref pcie_rp2 on end # PCIe Port #2
- device ref pcie_rp3 on end # PCIe Port #3
- device ref pcie_rp4 on end # PCIe Port #4
-- device ref pcie_rp5 off end # PCIe Port #5
-+ device ref pcie_rp5 on end # PCIe Port #5
- device ref pcie_rp6 on end # PCIe Port #6
- device ref pcie_rp7 off end # PCIe Port #7
- device ref pcie_rp8 off end # PCIe Port #8
-diff --git a/src/mainboard/dell/e6530/early_init.c b/src/mainboard/dell/e6530/early_init.c
-index d57f48e7f1..2b40f6963f 100644
---- a/src/mainboard/dell/e6530/early_init.c
-+++ b/src/mainboard/dell/e6530/early_init.c
-@@ -4,7 +4,6 @@
- #include <bootblock_common.h>
- #include <device/pci_ops.h>
- #include <ec/dell/mec5035/mec5035.h>
--#include <northbridge/intel/sandybridge/raminit_native.h>
- #include <southbridge/intel/bd82x6x/pch.h>
-
- const struct southbridge_usb_port mainboard_usb_ports[] = {
-@@ -26,13 +25,8 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
-
- void bootblock_mainboard_early_init(void)
- {
-- pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1c0f);
-- pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0000);
-+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+ | COMB_LPC_EN | COMA_LPC_EN);
- mec5035_early_init();
- }
--
--void mainboard_get_spd(spd_raw_data *spd, bool id_only)
--{
-- read_spd(&spd[0], 0x50, id_only);
-- read_spd(&spd[2], 0x52, id_only);
--}
---
-2.39.2
-
diff --git a/config/coreboot/default/patches/0021-HACK-Disable-coreboot-related-BL31-features.patch b/config/coreboot/default/patches/0028-HACK-Disable-coreboot-related-BL31-features.patch
index 40e1ccee..e6ad26d1 100644
--- a/config/coreboot/default/patches/0021-HACK-Disable-coreboot-related-BL31-features.patch
+++ b/config/coreboot/default/patches/0028-HACK-Disable-coreboot-related-BL31-features.patch
@@ -1,7 +1,7 @@
-From 70262a5f4bf801814d68f8778ea89b5cd8ef8f9a Mon Sep 17 00:00:00 2001
+From 8fa72bedc6282ba581ede85d62a341917ec5d203 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Thu, 22 Jun 2023 16:44:27 +0300
-Subject: [PATCH 21/30] HACK: Disable coreboot related BL31 features
+Subject: [PATCH 28/65] HACK: Disable coreboot related BL31 features
I don't know why, but removing this BL31 make argument lets gru-kevin
power off properly when shut down from Linux. Needs investigation.
@@ -10,10 +10,10 @@ power off properly when shut down from Linux. Needs investigation.
1 file changed, 3 deletions(-)
diff --git a/src/arch/arm64/Makefile.mk b/src/arch/arm64/Makefile.mk
-index 538d254ace..18e451d63c 100644
+index cb43897efd..a9e5ff399a 100644
--- a/src/arch/arm64/Makefile.mk
+++ b/src/arch/arm64/Makefile.mk
-@@ -159,9 +159,6 @@ BL31_MAKEARGS += LOG_LEVEL=40
+@@ -173,9 +173,6 @@ BL31_MAKEARGS += LOG_LEVEL=40
# Always enable crash reporting, even on a release build
BL31_MAKEARGS += CRASH_REPORTING=1
@@ -24,5 +24,5 @@ index 538d254ace..18e451d63c 100644
BL31_MAKEARGS += BUILD_PLAT="$(BL31_BUILD)"
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0028-dell-e6-30-disable-the-ME-device-in-devicetree.patch b/config/coreboot/default/patches/0028-dell-e6-30-disable-the-ME-device-in-devicetree.patch
deleted file mode 100644
index fa7ab40d..00000000
--- a/config/coreboot/default/patches/0028-dell-e6-30-disable-the-ME-device-in-devicetree.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 8705b719573d2159adde10af9c6a4d8806b7d27b Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Thu, 25 Jan 2024 14:37:30 +0000
-Subject: [PATCH 28/30] dell/e6*30: disable the ME device in devicetree
-
-we neuter anyway. disabling it in devicetree will prevent linux
-from ever trying to use it or load a driver for it, and thus
-might prevent benign error messages from appearing in dmesg.
-
-this change was suggested by nicholas when asked on irc.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/mainboard/dell/e6430/devicetree.cb | 4 ++--
- src/mainboard/dell/e6530/devicetree.cb | 4 ++--
- 2 files changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/src/mainboard/dell/e6430/devicetree.cb b/src/mainboard/dell/e6430/devicetree.cb
-index 054b01c5ac..2b8574c984 100644
---- a/src/mainboard/dell/e6430/devicetree.cb
-+++ b/src/mainboard/dell/e6430/devicetree.cb
-@@ -39,10 +39,10 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
- register "xhci_switchable_ports" = "0x0000000f"
-
- device ref xhci on end
-- device ref mei1 on end
-+ device ref mei1 off end
- device ref mei2 off end
- device ref me_ide_r off end
-- device ref me_kt on end
-+ device ref me_kt off end
- device ref gbe on end
- device ref ehci2 on end
- device ref hda on end
-diff --git a/src/mainboard/dell/e6530/devicetree.cb b/src/mainboard/dell/e6530/devicetree.cb
-index 37135bcf0f..010200bb6d 100644
---- a/src/mainboard/dell/e6530/devicetree.cb
-+++ b/src/mainboard/dell/e6530/devicetree.cb
-@@ -39,10 +39,10 @@ chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
- register "xhci_switchable_ports" = "0x0000000f"
-
- device ref xhci on end # USB 3.0 Controller
-- device ref mei1 on end # Management Engine Interface 1
-+ device ref mei1 off end # Management Engine Interface 1
- device ref mei2 off end # Management Engine Interface 2
- device ref me_ide_r off end # Management Engine IDE-R
-- device ref me_kt on end # Management Engine KT
-+ device ref me_kt off end # Management Engine KT
- device ref gbe on end # Intel Gigabit Ethernet
- device ref ehci2 on end # USB2 EHCI #2
- device ref hda on end # High Definition Audio
---
-2.39.2
-
diff --git a/config/coreboot/default/patches/0029-use-own-mirror-for-acpica-files.patch b/config/coreboot/default/patches/0029-use-own-mirror-for-acpica-files.patch
new file mode 100644
index 00000000..97d7def5
--- /dev/null
+++ b/config/coreboot/default/patches/0029-use-own-mirror-for-acpica-files.patch
@@ -0,0 +1,29 @@
+From 5b425149a2ba0d1c044c32f5e16ba4d4e59796a8 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Wed, 31 Jul 2024 00:03:02 +0100
+Subject: [PATCH 29/65] use own mirror for acpica files
+
+intel likes to break links for no reason,
+so we host our own backups of acpica.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ util/crossgcc/buildgcc | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
+index ad756652ed..5faff337b4 100755
+--- a/util/crossgcc/buildgcc
++++ b/util/crossgcc/buildgcc
+@@ -74,7 +74,7 @@ MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
+ MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
+ GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
+ BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
+-IASL_BASE_URL="https://downloadmirror.intel.com/783534"
++IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
+ # CLANG toolchain archive locations
+ LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
+ CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
+--
+2.39.5
+
diff --git a/config/coreboot/default/patches/0023-crank-up-vram-allocation-on-more-intel-boards.patch b/config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
index 7701babf..fbf7962d 100644
--- a/config/coreboot/default/patches/0023-crank-up-vram-allocation-on-more-intel-boards.patch
+++ b/config/coreboot/default/patches/0030-crank-up-vram-allocation-on-more-intel-boards.patch
@@ -1,7 +1,7 @@
-From ad812d008d570c1655bff13a9026f39a9efdcbc9 Mon Sep 17 00:00:00 2001
+From 253f8eeb895e50b3394b58268594acf9e9596bd2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Oct 2023 18:24:39 +0000
-Subject: [PATCH 23/30] crank up vram allocation on more intel boards
+Subject: [PATCH 30/65] crank up vram allocation on more intel boards
these were added to libreboot, and it's a policy of
libreboot to max out the vram settings. this was
@@ -24,20 +24,20 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
12 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/src/mainboard/dell/e6400/cmos.default b/src/mainboard/dell/e6400/cmos.default
-index eeb6f47364..25dfa38cb5 100644
+index 744a599708..6b8d478f06 100644
--- a/src/mainboard/dell/e6400/cmos.default
+++ b/src/mainboard/dell/e6400/cmos.default
-@@ -2,4 +2,4 @@ boot_option=Fallback
+@@ -4,4 +4,4 @@ boot_option=Fallback
debug_level=Debug
power_on_after_fail=Disable
sata_mode=AHCI
-gfx_uma_size=32M
+gfx_uma_size=256M
diff --git a/src/mainboard/dell/snb_ivb_workstations/cmos.default b/src/mainboard/dell/snb_ivb_workstations/cmos.default
-index ccc7e64625..7c97b84baf 100644
+index 76c16e6a8d..19364aae6e 100644
--- a/src/mainboard/dell/snb_ivb_workstations/cmos.default
+++ b/src/mainboard/dell/snb_ivb_workstations/cmos.default
-@@ -3,5 +3,5 @@ debug_level=Debug
+@@ -5,5 +5,5 @@ debug_level=Debug
power_on_after_fail=Disable
nmi=Enable
sata_mode=AHCI
@@ -45,10 +45,10 @@ index ccc7e64625..7c97b84baf 100644
+gfx_uma_size=224M
fan_full_speed=Disable
diff --git a/src/mainboard/hp/compaq_8200_elite_sff/cmos.default b/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
-index 6d27a79c66..4517ffc7c2 100644
+index 497ae92e1f..64d43a07f7 100644
--- a/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
+++ b/src/mainboard/hp/compaq_8200_elite_sff/cmos.default
-@@ -3,5 +3,5 @@ debug_level=Debug
+@@ -5,5 +5,5 @@ debug_level=Debug
power_on_after_fail=Enable
nmi=Enable
sata_mode=AHCI
@@ -56,87 +56,87 @@ index 6d27a79c66..4517ffc7c2 100644
+gfx_uma_size=224M
psu_fan_lvl=3
diff --git a/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default b/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
-index 6f3cec735e..9fc4db2990 100644
+index f3dad88670..b60f28447b 100644
--- a/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
+++ b/src/mainboard/hp/compaq_elite_8300_usdt/cmos.default
-@@ -3,4 +3,4 @@ debug_level=Debug
+@@ -5,4 +5,4 @@ debug_level=Debug
power_on_after_fail=Enable
nmi=Enable
sata_mode=AHCI
-gfx_uma_size=32M
+gfx_uma_size=224M
diff --git a/src/mainboard/hp/snb_ivb_laptops/cmos.default b/src/mainboard/hp/snb_ivb_laptops/cmos.default
-index ad822d5043..89418a4cfc 100644
+index e6042c0c27..a04026b70c 100644
--- a/src/mainboard/hp/snb_ivb_laptops/cmos.default
+++ b/src/mainboard/hp/snb_ivb_laptops/cmos.default
-@@ -3,3 +3,4 @@ debug_level=Debug
+@@ -5,3 +5,4 @@ debug_level=Debug
power_on_after_fail=Disable
nmi=Enable
sata_mode=AHCI
+gfx_uma_size=224M
diff --git a/src/mainboard/lenovo/t420/cmos.default b/src/mainboard/lenovo/t420/cmos.default
-index c011867916..83f590d39d 100644
+index 27a62d07b3..d1c9fcaaaf 100644
--- a/src/mainboard/lenovo/t420/cmos.default
+++ b/src/mainboard/lenovo/t420/cmos.default
-@@ -15,3 +15,4 @@ trackpoint=Enable
+@@ -17,3 +17,4 @@ trackpoint=Enable
hybrid_graphics_mode=Integrated Only
usb_always_on=Disable
me_state=Disabled
+gfx_uma_size=224M
diff --git a/src/mainboard/lenovo/t420s/cmos.default b/src/mainboard/lenovo/t420s/cmos.default
-index c011867916..83f590d39d 100644
+index 27a62d07b3..d1c9fcaaaf 100644
--- a/src/mainboard/lenovo/t420s/cmos.default
+++ b/src/mainboard/lenovo/t420s/cmos.default
-@@ -15,3 +15,4 @@ trackpoint=Enable
+@@ -17,3 +17,4 @@ trackpoint=Enable
hybrid_graphics_mode=Integrated Only
usb_always_on=Disable
me_state=Disabled
+gfx_uma_size=224M
diff --git a/src/mainboard/lenovo/t430/cmos.default b/src/mainboard/lenovo/t430/cmos.default
-index 55e1e6c04e..a72108f47e 100644
+index 6d1e172056..c00b358314 100644
--- a/src/mainboard/lenovo/t430/cmos.default
+++ b/src/mainboard/lenovo/t430/cmos.default
-@@ -16,3 +16,4 @@ backlight=Both
+@@ -18,3 +18,4 @@ backlight=Both
usb_always_on=Disable
hybrid_graphics_mode=Integrated Only
me_state=Disabled
+gfx_uma_size=224M
diff --git a/src/mainboard/lenovo/t520/cmos.default b/src/mainboard/lenovo/t520/cmos.default
-index b66f7034dc..a73ea6e9ee 100644
+index ab1be1a678..c7ee9564f3 100644
--- a/src/mainboard/lenovo/t520/cmos.default
+++ b/src/mainboard/lenovo/t520/cmos.default
-@@ -16,3 +16,4 @@ backlight=Both
+@@ -18,3 +18,4 @@ backlight=Both
hybrid_graphics_mode=Integrated Only
usb_always_on=Disable
me_state=Disabled
+gfx_uma_size=224M
diff --git a/src/mainboard/lenovo/t530/cmos.default b/src/mainboard/lenovo/t530/cmos.default
-index b66f7034dc..a73ea6e9ee 100644
+index ab1be1a678..c7ee9564f3 100644
--- a/src/mainboard/lenovo/t530/cmos.default
+++ b/src/mainboard/lenovo/t530/cmos.default
-@@ -16,3 +16,4 @@ backlight=Both
+@@ -18,3 +18,4 @@ backlight=Both
hybrid_graphics_mode=Integrated Only
usb_always_on=Disable
me_state=Disabled
+gfx_uma_size=224M
diff --git a/src/mainboard/lenovo/x201/cmos.default b/src/mainboard/lenovo/x201/cmos.default
-index 2cf484fd5a..46294d91ca 100644
+index 94f8e08a75..a1f2eacf11 100644
--- a/src/mainboard/lenovo/x201/cmos.default
+++ b/src/mainboard/lenovo/x201/cmos.default
-@@ -15,3 +15,4 @@ power_management_beeps=Enable
+@@ -17,3 +17,4 @@ power_management_beeps=Enable
low_battery_beep=Enable
sata_mode=AHCI
usb_always_on=Disable
+gfx_uma_size=128M
diff --git a/src/mainboard/lenovo/x220/cmos.default b/src/mainboard/lenovo/x220/cmos.default
-index 52f303dfdb..92a2026542 100644
+index b318ab9772..82292ea5d6 100644
--- a/src/mainboard/lenovo/x220/cmos.default
+++ b/src/mainboard/lenovo/x220/cmos.default
-@@ -14,3 +14,4 @@ fn_ctrl_swap=Disable
+@@ -16,3 +16,4 @@ fn_ctrl_swap=Disable
sticky_fn=Disable
trackpoint=Enable
me_state=Disabled
+gfx_uma_size=224M
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0024-dell-e6430-use-ME-Soft-Temporary-Disable.patch b/config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch
index 79ee4b6c..ed0a7a08 100644
--- a/config/coreboot/default/patches/0024-dell-e6430-use-ME-Soft-Temporary-Disable.patch
+++ b/config/coreboot/default/patches/0031-dell-e6430-use-ME-Soft-Temporary-Disable.patch
@@ -1,7 +1,7 @@
-From a9ab864aee1be7a03926443ddc94e4c5012719ba Mon Sep 17 00:00:00 2001
+From 7b1caf7260ab468fa2f0e6d73090c5412bc0254d Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 11:41:41 +0000
-Subject: [PATCH 24/30] dell/e6430: use ME Soft Temporary Disable
+Subject: [PATCH 31/65] dell/e6430: use ME Soft Temporary Disable
i overlooked this. it's set on other boards.
@@ -12,13 +12,13 @@ disablement, to absolutely ensure Intel ME is not alive
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
- src/mainboard/dell/e6430/cmos.default | 2 +-
+ src/mainboard/dell/snb_ivb_latitude/cmos.default | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/src/mainboard/dell/e6430/cmos.default b/src/mainboard/dell/e6430/cmos.default
+diff --git a/src/mainboard/dell/snb_ivb_latitude/cmos.default b/src/mainboard/dell/snb_ivb_latitude/cmos.default
index 2a5b30f2b7..279415dfd1 100644
---- a/src/mainboard/dell/e6430/cmos.default
-+++ b/src/mainboard/dell/e6430/cmos.default
+--- a/src/mainboard/dell/snb_ivb_latitude/cmos.default
++++ b/src/mainboard/dell/snb_ivb_latitude/cmos.default
@@ -6,4 +6,4 @@ bluetooth=Enable
wwan=Enable
wlan=Enable
@@ -26,5 +26,5 @@ index 2a5b30f2b7..279415dfd1 100644
-me_state=Normal
+me_state=Disabled
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0031-mb-dell-Add-OptiPlex-7020-9020-port_cb55232_31.patch b/config/coreboot/default/patches/0031-mb-dell-Add-OptiPlex-7020-9020-port_cb55232_31.patch
deleted file mode 100644
index 3b4d8004..00000000
--- a/config/coreboot/default/patches/0031-mb-dell-Add-OptiPlex-7020-9020-port_cb55232_31.patch
+++ /dev/null
@@ -1,923 +0,0 @@
-From 38a713eb071dd9c1b7d5092ce686537e5d9266f5 Mon Sep 17 00:00:00 2001
-From: Mate Kukri <kukri.mate@gmail.com>
-Date: Mon, 4 Dec 2023 21:34:18 +0000
-Subject: [PATCH 1/1] mb/dell: Add OptiPlex 7020/9020 port
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The OptiPlex 7020 and 9020 use physically identical motherboards.
-
-Each model comes in the following form factors:
-- 7020: SFF, MT
-- 9020: USFF (not currently supported), SFF, MT
-
-(7020 SFF) Boots Linux and Windows 10:
-- Tested with an i3-4160 and i5-4460
-- DRAM init works using the MRC (4G, 4G+4G)
-- iGPU init works using libgfxinit (VGA, 2x DP)
-- PCIe 16x: tested, ok
-- PCIe 4x: tested, ok
-- All USB2 and USB3 ports work
-- SMSC SCH5555 Super I/O: serial works, PS/2 untested
-- Audio: back and front output works, internal speaker works,
- mic inputs untested
-- Ethernet: tested, works
-
-(9020 MT)
-- Tested by Michael Büchler (thanks for the overridetree)
-
-Change-Id: Ie7c7089f443aef9890711c4412209bceb1f1e96a
-Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
----
- src/mainboard/dell/optiplex_9020/Kconfig | 34 +++
- src/mainboard/dell/optiplex_9020/Kconfig.name | 11 +
- src/mainboard/dell/optiplex_9020/Makefile.inc | 5 +
- src/mainboard/dell/optiplex_9020/acpi/ec.asl | 3 +
- .../dell/optiplex_9020/acpi/platform.asl | 11 +
- .../dell/optiplex_9020/acpi/superio.asl | 3 +
- .../dell/optiplex_9020/board_info.txt | 8 +
- src/mainboard/dell/optiplex_9020/bootblock.c | 116 ++++++++++
- src/mainboard/dell/optiplex_9020/cmos.default | 4 +
- src/mainboard/dell/optiplex_9020/cmos.layout | 58 +++++
- src/mainboard/dell/optiplex_9020/data.vbt | Bin 0 -> 4409 bytes
- .../dell/optiplex_9020/devicetree.cb | 80 +++++++
- src/mainboard/dell/optiplex_9020/dsdt.asl | 25 ++
- .../dell/optiplex_9020/gma-mainboard.ads | 18 ++
- src/mainboard/dell/optiplex_9020/gpio.c | 217 ++++++++++++++++++
- src/mainboard/dell/optiplex_9020/hda_verb.c | 27 +++
- src/mainboard/dell/optiplex_9020/mainboard.c | 15 ++
- .../dell/optiplex_9020/overridetree_mt.cb | 10 +
- src/mainboard/dell/optiplex_9020/romstage.c | 53 +++++
- 19 files changed, 698 insertions(+)
- create mode 100644 src/mainboard/dell/optiplex_9020/Kconfig
- create mode 100644 src/mainboard/dell/optiplex_9020/Kconfig.name
- create mode 100644 src/mainboard/dell/optiplex_9020/Makefile.inc
- create mode 100644 src/mainboard/dell/optiplex_9020/acpi/ec.asl
- create mode 100644 src/mainboard/dell/optiplex_9020/acpi/platform.asl
- create mode 100644 src/mainboard/dell/optiplex_9020/acpi/superio.asl
- create mode 100644 src/mainboard/dell/optiplex_9020/board_info.txt
- create mode 100644 src/mainboard/dell/optiplex_9020/bootblock.c
- create mode 100644 src/mainboard/dell/optiplex_9020/cmos.default
- create mode 100644 src/mainboard/dell/optiplex_9020/cmos.layout
- create mode 100644 src/mainboard/dell/optiplex_9020/data.vbt
- create mode 100644 src/mainboard/dell/optiplex_9020/devicetree.cb
- create mode 100644 src/mainboard/dell/optiplex_9020/dsdt.asl
- create mode 100644 src/mainboard/dell/optiplex_9020/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/optiplex_9020/gpio.c
- create mode 100644 src/mainboard/dell/optiplex_9020/hda_verb.c
- create mode 100644 src/mainboard/dell/optiplex_9020/mainboard.c
- create mode 100644 src/mainboard/dell/optiplex_9020/overridetree_mt.cb
- create mode 100644 src/mainboard/dell/optiplex_9020/romstage.c
-
-diff --git a/src/mainboard/dell/optiplex_9020/Kconfig b/src/mainboard/dell/optiplex_9020/Kconfig
-new file mode 100644
-index 0000000000..774a72f161
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/Kconfig
-@@ -0,0 +1,34 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+if BOARD_DELL_OPTIPLEX_9020_SFF || BOARD_DELL_OPTIPLEX_9020_MT
-+
-+config BOARD_SPECIFIC_OPTIONS
-+ def_bool y
-+ select BOARD_ROMSIZE_KB_12288
-+ select HAVE_ACPI_RESUME
-+ select HAVE_ACPI_TABLES
-+ select HAVE_OPTION_TABLE
-+ select HAVE_CMOS_DEFAULT
-+ select INTEL_GMA_HAVE_VBT
-+ select INTEL_INT15
-+ select MAINBOARD_HAS_LIBGFXINIT
-+ select MAINBOARD_USES_IFD_GBE_REGION
-+ select NORTHBRIDGE_INTEL_HASWELL
-+ select SERIRQ_CONTINUOUS_MODE
-+ select SOUTHBRIDGE_INTEL_LYNXPOINT
-+ select SUPERIO_SMSC_SCH555x
-+
-+config CBFS_SIZE
-+ default 0x600000
-+
-+config MAINBOARD_DIR
-+ default "dell/optiplex_9020"
-+
-+config MAINBOARD_PART_NUMBER
-+ default "OptiPlex 7020/9020 SFF" if BOARD_DELL_OPTIPLEX_9020_SFF
-+ default "OptiPlex 7020/9020 MT" if BOARD_DELL_OPTIPLEX_9020_MT
-+
-+config OVERRIDE_DEVICETREE
-+ default "overridetree_mt.cb" if BOARD_DELL_OPTIPLEX_9020_MT
-+
-+endif
-diff --git a/src/mainboard/dell/optiplex_9020/Kconfig.name b/src/mainboard/dell/optiplex_9020/Kconfig.name
-new file mode 100644
-index 0000000000..c25c330a44
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/Kconfig.name
-@@ -0,0 +1,11 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+config BOARD_DELL_OPTIPLEX_9020_SFF
-+ bool "OptiPlex 7020/9020 SFF"
-+ help
-+ The 7020 SFF and 9020 SFF mainboards are physically identical.
-+
-+config BOARD_DELL_OPTIPLEX_9020_MT
-+ bool "OptiPlex 7020/9020 MT"
-+ help
-+ The 7020 MT and 9020 MT mainboards are physically identical.
-diff --git a/src/mainboard/dell/optiplex_9020/Makefile.inc b/src/mainboard/dell/optiplex_9020/Makefile.inc
-new file mode 100644
-index 0000000000..6ca2f2afaa
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/Makefile.inc
-@@ -0,0 +1,5 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+romstage-y += gpio.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-+bootblock-y += bootblock.c
-diff --git a/src/mainboard/dell/optiplex_9020/acpi/ec.asl b/src/mainboard/dell/optiplex_9020/acpi/ec.asl
-new file mode 100644
-index 0000000000..16990d45f4
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/acpi/ec.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: CC-PDDC */
-+
-+/* Please update the license if adding licensable material. */
-diff --git a/src/mainboard/dell/optiplex_9020/acpi/platform.asl b/src/mainboard/dell/optiplex_9020/acpi/platform.asl
-new file mode 100644
-index 0000000000..cda7682e3e
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/acpi/platform.asl
-@@ -0,0 +1,11 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Method(_WAK, 1)
-+{
-+ Return(Package() { 0, 0 })
-+}
-+
-+Method(_PTS, 1)
-+{
-+
-+}
-diff --git a/src/mainboard/dell/optiplex_9020/acpi/superio.asl b/src/mainboard/dell/optiplex_9020/acpi/superio.asl
-new file mode 100644
-index 0000000000..16990d45f4
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: CC-PDDC */
-+
-+/* Please update the license if adding licensable material. */
-diff --git a/src/mainboard/dell/optiplex_9020/board_info.txt b/src/mainboard/dell/optiplex_9020/board_info.txt
-new file mode 100644
-index 0000000000..e30cf9c41f
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/board_info.txt
-@@ -0,0 +1,8 @@
-+Vendor name: Dell Inc.
-+Board name: OptiPlex 7020/9020
-+Release year: 2014
-+Category: desktop
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-diff --git a/src/mainboard/dell/optiplex_9020/bootblock.c b/src/mainboard/dell/optiplex_9020/bootblock.c
-new file mode 100644
-index 0000000000..2837cf9cf1
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/bootblock.c
-@@ -0,0 +1,116 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <arch/io.h>
-+#include <device/pnp_ops.h>
-+#include <superio/smsc/sch555x/sch555x.h>
-+#include <southbridge/intel/lynxpoint/pch.h>
-+
-+static void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val)
-+{
-+ // Clear EC-to-Host mailbox
-+ uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
-+ outb(tmp, SCH555x_EMI_IOBASE + 1);
-+
-+ // Send address and value to the EC
-+ sch555x_emi_write16(0, (addr1 * 2) | 0x101);
-+ sch555x_emi_write32(4, val | (addr2 << 16));
-+
-+ // Wait for acknowledgement message from EC
-+ outb(1, SCH555x_EMI_IOBASE);
-+ size_t timeout = 0;
-+ do {} while (++timeout < 0xfff && (inb(SCH555x_EMI_IOBASE + 1) & 1) == 0);
-+}
-+
-+struct ec_init_entry {
-+ uint16_t addr;
-+ uint8_t val;
-+};
-+
-+static void ec_init(void)
-+{
-+ /*
-+ * Tables from CORE_PEI
-+ */
-+
-+ static const struct ec_init_entry init_table1[] = {
-+ {0x08cc, 0x11}, {0x08d0, 0x11}, {0x088c, 0x10}, {0x0890, 0x10},
-+ {0x0894, 0x10}, {0x0898, 0x12}, {0x089c, 0x12}, {0x08a0, 0x10},
-+ {0x08a4, 0x12}, {0x08a8, 0x10}, {0x0820, 0x12}, {0x0824, 0x12},
-+ {0x0878, 0x12}, {0x0880, 0x12}, {0x0884, 0x12}, {0x08e0, 0x12},
-+ {0x08e4, 0x12}, {0x083c, 0x10}, {0x0840, 0x10}, {0x0844, 0x10},
-+ {0x0848, 0x10}, {0x084c, 0x10}, {0x0850, 0x10}, {0x0814, 0x11},
-+ };
-+
-+ for (size_t i = 0; i < ARRAY_SIZE(init_table1); ++i)
-+ ec_write(2, init_table1[i].addr, init_table1[i].val);
-+
-+ static const struct ec_init_entry init_table2[] = {
-+ {0x0005, 0x33}, {0x0018, 0x2f}, {0x0019, 0x2f}, {0x001a, 0x2f},
-+ {0x0083, 0xbb}, {0x0085, 0xd9}, {0x0086, 0x2c}, {0x008a, 0x34},
-+ {0x008b, 0x60}, {0x0090, 0x5e}, {0x0091, 0x5e}, {0x0092, 0x86},
-+ {0x0096, 0xa4}, {0x0097, 0xa4}, {0x0098, 0xa4}, {0x009b, 0xa4},
-+ {0x00a0, 0x0a}, {0x00a1, 0x0a}, {0x00ae, 0x7c}, {0x00af, 0x7c},
-+ {0x00b0, 0x9e}, {0x00b3, 0x7c}, {0x00b6, 0x08}, {0x00b7, 0x08},
-+ {0x00ea, 0x64}, {0x00ef, 0xff}, {0x00f8, 0x15}, {0x00f9, 0x00},
-+ {0x00f0, 0x30}, {0x00fd, 0x01}, {0x01a1, 0x00}, {0x01a2, 0x00},
-+ {0x01b1, 0x08}, {0x01be, 0x90}, {0x0280, 0x24}, {0x0281, 0x13},
-+ {0x0282, 0x03}, {0x0283, 0x0a}, {0x0284, 0x80}, {0x0285, 0x03},
-+ {0x0288, 0x80}, {0x0289, 0x0c}, {0x028a, 0x03}, {0x028b, 0x0a},
-+ {0x028c, 0x80}, {0x028d, 0x03}, {0x0040, 0x01},
-+ };
-+
-+ for (size_t i = 0; i < ARRAY_SIZE(init_table2); ++i)
-+ ec_write(1, init_table2[i].addr, init_table2[i].val);
-+
-+ /*
-+ * Table from PeiHwmInit
-+ */
-+
-+ static const struct ec_init_entry hwm_init_table[] = {
-+ {0x02fc, 0xa0}, {0x02fd, 0x32}, {0x0005, 0x77}, {0x0019, 0x2f},
-+ {0x001a, 0x2f}, {0x008a, 0x33}, {0x008b, 0x33}, {0x008c, 0x33},
-+ {0x00ba, 0x10}, {0x00d1, 0xff}, {0x00d6, 0xff}, {0x00db, 0xff},
-+ {0x0048, 0x00}, {0x0049, 0x00}, {0x007a, 0x00}, {0x007b, 0x00},
-+ {0x007c, 0x00}, {0x0080, 0x00}, {0x0081, 0x00}, {0x0082, 0x00},
-+ {0x0083, 0xbb}, {0x0084, 0xb0}, {0x01a1, 0x88}, {0x01a4, 0x80},
-+ {0x0088, 0x00}, {0x0089, 0x00}, {0x00a0, 0x02}, {0x00a1, 0x02},
-+ {0x00a2, 0x02}, {0x00a4, 0x04}, {0x00a5, 0x04}, {0x00a6, 0x04},
-+ {0x00ab, 0x00}, {0x00ad, 0x3f}, {0x00b7, 0x07}, {0x0062, 0x50},
-+ {0x0000, 0x46}, {0x0000, 0x50}, {0x0000, 0x46}, {0x0000, 0x50},
-+ {0x0000, 0x46}, {0x0000, 0x98}, {0x0059, 0x98}, {0x0061, 0x7c},
-+ {0x01bc, 0x00}, {0x01bd, 0x00}, {0x01bb, 0x00}, {0x0085, 0xdd},
-+ {0x0086, 0xdd}, {0x0087, 0x07}, {0x0090, 0x82}, {0x0091, 0x5e},
-+ {0x0095, 0x5d}, {0x0096, 0xa9}, {0x0097, 0x00}, {0x009b, 0x00},
-+ {0x00ae, 0x86}, {0x00af, 0x86}, {0x00b3, 0x67}, {0x00c4, 0xff},
-+ {0x00c5, 0xff}, {0x00c9, 0xff}, {0x0040, 0x01}, {0x02fc, 0x00},
-+ {0x02b3, 0x9a}, {0x02b4, 0x05}, {0x02cc, 0x01}, {0x02d0, 0x4c},
-+ {0x02d2, 0x01}, {0x02db, 0x01}, {0x006f, 0x01}, {0x0070, 0x02},
-+ {0x0071, 0x03}, {0x018b, 0x03}, {0x018c, 0x03},
-+ };
-+
-+ for (size_t i = 0; i < ARRAY_SIZE(hwm_init_table); ++i)
-+ ec_write(1, hwm_init_table[i].addr, hwm_init_table[i].val);
-+}
-+
-+#define SCH555x_IOBASE 0x2e
-+#define GLOBAL_DEV PNP_DEV(SCH555x_IOBASE, SCH555x_LDN_GLOBAL)
-+#define SERIAL_DEV PNP_DEV(SCH555x_IOBASE, SCH555x_LDN_UART1)
-+
-+void mainboard_config_superio(void)
-+{
-+ // Super I/O early init will map Runtime and EMI registers
-+ sch555x_early_init(GLOBAL_DEV);
-+
-+ // Changes LED color among a few other things (extracted from Dell's FW)
-+ outb(0x01, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_PME_STS);
-+ outb(0x00, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_PME_EN);
-+ outb(0x18, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_PME_EN1);
-+ outb(0x01, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_UNK1);
-+ outb(0x0f, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_LED);
-+
-+ // Magic EC init
-+ ec_init();
-+
-+ // Magic EC init is needed for UART1 initialization to work
-+ sch555x_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-+}
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
-new file mode 100644
-index 0000000000..b159660aa8
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/cmos.default
-@@ -0,0 +1,4 @@
-+boot_option=Fallback
-+debug_level=Debug
-+nmi=Disable
-+power_on_after_fail=Disable
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.layout b/src/mainboard/dell/optiplex_9020/cmos.layout
-new file mode 100644
-index 0000000000..c9ba76c78f
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/cmos.layout
-@@ -0,0 +1,58 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+# -----------------------------------------------------------------
-+0 120 r 0 reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384 1 e 3 boot_option
-+388 4 h 0 reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395 4 e 4 debug_level
-+
-+#400 8 r 0 reserved for century byte
-+
-+# coreboot config options: southbridge
-+408 1 e 1 nmi
-+409 2 e 5 power_on_after_fail
-+
-+# coreboot config options: check sums
-+984 16 h 0 check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID value text
-+1 0 Disable
-+1 1 Enable
-+
-+2 0 Enable
-+2 1 Disable
-+
-+3 0 Fallback
-+3 1 Normal
-+
-+4 0 Emergency
-+4 1 Alert
-+4 2 Critical
-+4 3 Error
-+4 4 Warning
-+4 5 Notice
-+4 6 Info
-+4 7 Debug
-+4 8 Spew
-+
-+5 0 Disable
-+5 1 Enable
-+5 2 Keep
-+
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 415 984
-diff --git a/src/mainboard/dell/optiplex_9020/data.vbt b/src/mainboard/dell/optiplex_9020/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..1779f3b8d1018ba0aae480103b145bd7b6dd6187
-GIT binary patch
-literal 4409
-zcmdT{T}&KR6h8B_yR)-1!!lr9XiE<T5h_au1f&hdSy<_UtKG6lH%+yR*`>u$pi5g@
-zP3)>@YHE~+rqQIfO&U!#QHhDMkD3^5qG|e|_!FbV_|P=QG{y&G)b-q%VY>waTYnNg
-zlQZY%p84*%_nv!argpGv03)IJ_Pe7|bSMP|Y$`oQ_r=uJyEVQm92yAi>WXgdz6a04
-zD)5&6aRng7aW^T=MoU}o*#7ireSZT+;@h#UsjZ1Q4>q^r@OTD8dxst!AG;&CDL8Oo
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-zKu4H+<*IHlA(@4;q~A}wijjptb-`A1OTqCOFSJ6vTQS-lW>Em~L_u66jOlR9ZUEZ|
-zMhC-jAj9!85eeUR&5CZpNVwUt>909-|5kF?Ve@Y58TNJV5CLGmjb)HGdJ22pR+!su
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-PTo#&U0FLJAf1&;f?(g8r
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/optiplex_9020/devicetree.cb b/src/mainboard/dell/optiplex_9020/devicetree.cb
-new file mode 100644
-index 0000000000..c0b17a15ff
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/devicetree.cb
-@@ -0,0 +1,80 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+chip northbridge/intel/haswell
-+ # This mainboard has VGA
-+ register "gpu_ddi_e_connected" = "1"
-+
-+ chip cpu/intel/haswell
-+ device cpu_cluster 0 on ops haswell_cpu_bus_ops end
-+ end
-+
-+ device domain 0 on
-+ ops haswell_pci_domain_ops
-+
-+ subsystemid 0x1028 0x05a5 inherit
-+
-+ device pci 00.0 on end # Host bridge
-+ device pci 01.0 on end # PCIe graphics
-+ device pci 02.0 on end # VGA controller
-+ device pci 03.0 on end # Mini-HD audio
-+
-+ chip southbridge/intel/lynxpoint
-+ register "gen1_dec" = "0x007c0a01"
-+ register "gen2_dec" = "0x007c0901"
-+ register "gen3_dec" = "0x003c07e1"
-+ register "gen4_dec" = "0x001c0901"
-+ register "sata_port_map" = "0x33"
-+
-+ device pci 14.0 on end # xHCI controller
-+ device pci 16.0 on end # Management Engine interface 1
-+ device pci 16.1 off end # Management Engine interface 2
-+ device pci 16.2 off end # Management Engine IDE-R
-+ device pci 16.3 on end # Management Engine KT
-+ device pci 19.0 on # Intel Gigabit Ethernet
-+ subsystemid 0x1028 0x05a4
-+ end
-+ device pci 1a.0 on end # EHCI controller #2
-+ device pci 1b.0 on end # HD audio controller
-+ device pci 1c.0 off end
-+ device pci 1c.1 off end
-+ device pci 1c.2 off end
-+ device pci 1c.3 off end
-+ device pci 1c.4 on end # PCIe 4x slot
-+ device pci 1c.5 off end
-+ device pci 1c.6 off end
-+ device pci 1c.7 off end
-+ device pci 1d.0 on end # EHCI controller #1
-+ device pci 1f.0 on # LPC bridge
-+ chip superio/smsc/sch555x
-+ device pnp 2e.0 on # EMI
-+ io 0x60 = 0xa00
-+ end
-+ device pnp 2e.1 on # 8042
-+ io 0x60 = 0x60
-+ irq 0x0f = 0
-+ irq 0x70 = 1
-+ irq 0x72 = 12
-+ end
-+ device pnp 2e.7 on # UART1
-+ io 0x60 = 0x3f8
-+ irq 0x0f = 2
-+ irq 0x70 = 4
-+ end
-+ device pnp 2e.8 off end # UART2
-+ device pnp 2e.c on # LPC interface
-+ io 0x60 = 0x2e
-+ end
-+ device pnp 2e.a on # Runtime registers
-+ io 0x60 = 0xa40
-+ end
-+ device pnp 2e.b off end # Floppy Controller
-+ device pnp 2e.11 off end # Parallel Port
-+ end
-+ end
-+ device pci 1f.2 on end # SATA controller 1
-+ device pci 1f.3 on end # SMBus
-+ device pci 1f.5 off end # SATA controller 2
-+ device pci 1f.6 off end # Thermal
-+ end
-+ end
-+end
-diff --git a/src/mainboard/dell/optiplex_9020/dsdt.asl b/src/mainboard/dell/optiplex_9020/dsdt.asl
-new file mode 100644
-index 0000000000..7ec1e9775a
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/dsdt.asl
-@@ -0,0 +1,25 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi.h>
-+DefinitionBlock(
-+ "dsdt.aml",
-+ "DSDT",
-+ ACPI_DSDT_REV_2,
-+ OEM_ID,
-+ ACPI_TABLE_CREATOR,
-+ 0x20181031 /* OEM Revision */
-+)
-+{
-+ #include <acpi/dsdt_top.asl>
-+ #include "acpi/platform.asl"
-+ #include <southbridge/intel/common/acpi/platform.asl>
-+ #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl>
-+ #include <southbridge/intel/common/acpi/sleepstates.asl>
-+ #include <cpu/intel/common/acpi/cpu.asl>
-+
-+ Device (\_SB.PCI0)
-+ {
-+ #include <northbridge/intel/haswell/acpi/hostbridge.asl>
-+ #include <southbridge/intel/lynxpoint/acpi/pch.asl>
-+ }
-+}
-diff --git a/src/mainboard/dell/optiplex_9020/gma-mainboard.ads b/src/mainboard/dell/optiplex_9020/gma-mainboard.ads
-new file mode 100644
-index 0000000000..173f2f1d0d
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/gma-mainboard.ads
-@@ -0,0 +1,18 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+ ports : constant Port_List :=
-+ (DP1,
-+ DP2,
-+ DP3,
-+ Analog,
-+ others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/optiplex_9020/gpio.c b/src/mainboard/dell/optiplex_9020/gpio.c
-new file mode 100644
-index 0000000000..48b7707e2c
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/gpio.c
-@@ -0,0 +1,217 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+ .gpio0 = GPIO_MODE_GPIO,
-+ .gpio1 = GPIO_MODE_GPIO,
-+ .gpio2 = GPIO_MODE_GPIO,
-+ .gpio3 = GPIO_MODE_GPIO,
-+ .gpio4 = GPIO_MODE_GPIO,
-+ .gpio5 = GPIO_MODE_GPIO,
-+ .gpio6 = GPIO_MODE_GPIO,
-+ .gpio7 = GPIO_MODE_GPIO,
-+ .gpio8 = GPIO_MODE_GPIO,
-+ .gpio9 = GPIO_MODE_NATIVE,
-+ .gpio10 = GPIO_MODE_NATIVE,
-+ .gpio11 = GPIO_MODE_GPIO,
-+ .gpio12 = GPIO_MODE_NATIVE,
-+ .gpio13 = GPIO_MODE_GPIO,
-+ .gpio14 = GPIO_MODE_NATIVE,
-+ .gpio15 = GPIO_MODE_GPIO,
-+ .gpio16 = GPIO_MODE_NATIVE,
-+ .gpio17 = GPIO_MODE_GPIO,
-+ .gpio18 = GPIO_MODE_NATIVE,
-+ .gpio19 = GPIO_MODE_NATIVE,
-+ .gpio20 = GPIO_MODE_NATIVE,
-+ .gpio21 = GPIO_MODE_GPIO,
-+ .gpio22 = GPIO_MODE_GPIO,
-+ .gpio23 = GPIO_MODE_GPIO,
-+ .gpio24 = GPIO_MODE_GPIO,
-+ .gpio25 = GPIO_MODE_GPIO,
-+ .gpio26 = GPIO_MODE_GPIO,
-+ .gpio27 = GPIO_MODE_GPIO,
-+ .gpio28 = GPIO_MODE_GPIO,
-+ .gpio29 = GPIO_MODE_NATIVE,
-+ .gpio30 = GPIO_MODE_NATIVE,
-+ .gpio31 = GPIO_MODE_GPIO,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+ .gpio0 = GPIO_DIR_INPUT,
-+ .gpio1 = GPIO_DIR_INPUT,
-+ .gpio2 = GPIO_DIR_INPUT,
-+ .gpio3 = GPIO_DIR_INPUT,
-+ .gpio4 = GPIO_DIR_INPUT,
-+ .gpio5 = GPIO_DIR_INPUT,
-+ .gpio6 = GPIO_DIR_INPUT,
-+ .gpio7 = GPIO_DIR_INPUT,
-+ .gpio8 = GPIO_DIR_INPUT,
-+ .gpio11 = GPIO_DIR_INPUT,
-+ .gpio13 = GPIO_DIR_OUTPUT,
-+ .gpio15 = GPIO_DIR_OUTPUT,
-+ .gpio17 = GPIO_DIR_INPUT,
-+ .gpio21 = GPIO_DIR_INPUT,
-+ .gpio22 = GPIO_DIR_OUTPUT,
-+ .gpio23 = GPIO_DIR_OUTPUT,
-+ .gpio24 = GPIO_DIR_INPUT,
-+ .gpio25 = GPIO_DIR_OUTPUT,
-+ .gpio26 = GPIO_DIR_OUTPUT,
-+ .gpio27 = GPIO_DIR_INPUT,
-+ .gpio28 = GPIO_DIR_OUTPUT,
-+ .gpio31 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+ .gpio13 = GPIO_LEVEL_LOW,
-+ .gpio15 = GPIO_LEVEL_HIGH,
-+ .gpio22 = GPIO_LEVEL_HIGH,
-+ .gpio23 = GPIO_LEVEL_HIGH,
-+ .gpio25 = GPIO_LEVEL_HIGH,
-+ .gpio26 = GPIO_LEVEL_HIGH,
-+ .gpio28 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+ .gpio18 = GPIO_BLINK,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+ .gpio8 = GPIO_INVERT,
-+ .gpio9 = GPIO_INVERT,
-+ .gpio11 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+ .gpio26 = GPIO_RESET_RSMRST,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+ .gpio32 = GPIO_MODE_GPIO,
-+ .gpio33 = GPIO_MODE_GPIO,
-+ .gpio34 = GPIO_MODE_GPIO,
-+ .gpio35 = GPIO_MODE_GPIO,
-+ .gpio36 = GPIO_MODE_NATIVE,
-+ .gpio37 = GPIO_MODE_NATIVE,
-+ .gpio38 = GPIO_MODE_GPIO,
-+ .gpio39 = GPIO_MODE_GPIO,
-+ .gpio40 = GPIO_MODE_NATIVE,
-+ .gpio41 = GPIO_MODE_NATIVE,
-+ .gpio42 = GPIO_MODE_NATIVE,
-+ .gpio43 = GPIO_MODE_NATIVE,
-+ .gpio44 = GPIO_MODE_GPIO,
-+ .gpio45 = GPIO_MODE_GPIO,
-+ .gpio46 = GPIO_MODE_GPIO,
-+ .gpio47 = GPIO_MODE_NATIVE,
-+ .gpio48 = GPIO_MODE_GPIO,
-+ .gpio49 = GPIO_MODE_GPIO,
-+ .gpio50 = GPIO_MODE_GPIO,
-+ .gpio51 = GPIO_MODE_GPIO,
-+ .gpio52 = GPIO_MODE_GPIO,
-+ .gpio53 = GPIO_MODE_GPIO,
-+ .gpio54 = GPIO_MODE_GPIO,
-+ .gpio55 = GPIO_MODE_GPIO,
-+ .gpio56 = GPIO_MODE_NATIVE,
-+ .gpio57 = GPIO_MODE_GPIO,
-+ .gpio58 = GPIO_MODE_NATIVE,
-+ .gpio59 = GPIO_MODE_NATIVE,
-+ .gpio60 = GPIO_MODE_GPIO,
-+ .gpio61 = GPIO_MODE_NATIVE,
-+ .gpio62 = GPIO_MODE_NATIVE,
-+ .gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+ .gpio32 = GPIO_DIR_INPUT,
-+ .gpio33 = GPIO_DIR_OUTPUT,
-+ .gpio34 = GPIO_DIR_OUTPUT,
-+ .gpio35 = GPIO_DIR_INPUT,
-+ .gpio38 = GPIO_DIR_INPUT,
-+ .gpio39 = GPIO_DIR_INPUT,
-+ .gpio44 = GPIO_DIR_INPUT,
-+ .gpio45 = GPIO_DIR_OUTPUT,
-+ .gpio46 = GPIO_DIR_INPUT,
-+ .gpio48 = GPIO_DIR_INPUT,
-+ .gpio49 = GPIO_DIR_INPUT,
-+ .gpio50 = GPIO_DIR_OUTPUT,
-+ .gpio51 = GPIO_DIR_OUTPUT,
-+ .gpio52 = GPIO_DIR_OUTPUT,
-+ .gpio53 = GPIO_DIR_OUTPUT,
-+ .gpio54 = GPIO_DIR_OUTPUT,
-+ .gpio55 = GPIO_DIR_OUTPUT,
-+ .gpio57 = GPIO_DIR_OUTPUT,
-+ .gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+ .gpio33 = GPIO_LEVEL_HIGH,
-+ .gpio34 = GPIO_LEVEL_HIGH,
-+ .gpio45 = GPIO_LEVEL_LOW,
-+ .gpio50 = GPIO_LEVEL_HIGH,
-+ .gpio51 = GPIO_LEVEL_HIGH,
-+ .gpio52 = GPIO_LEVEL_HIGH,
-+ .gpio53 = GPIO_LEVEL_HIGH,
-+ .gpio54 = GPIO_LEVEL_HIGH,
-+ .gpio55 = GPIO_LEVEL_HIGH,
-+ .gpio57 = GPIO_LEVEL_HIGH,
-+ .gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+ .gpio64 = GPIO_MODE_GPIO,
-+ .gpio65 = GPIO_MODE_NATIVE,
-+ .gpio66 = GPIO_MODE_GPIO,
-+ .gpio67 = GPIO_MODE_NATIVE,
-+ .gpio68 = GPIO_MODE_GPIO,
-+ .gpio69 = GPIO_MODE_GPIO,
-+ .gpio70 = GPIO_MODE_NATIVE,
-+ .gpio71 = GPIO_MODE_NATIVE,
-+ .gpio72 = GPIO_MODE_GPIO,
-+ .gpio73 = GPIO_MODE_GPIO,
-+ .gpio74 = GPIO_MODE_GPIO,
-+ .gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+ .gpio64 = GPIO_DIR_OUTPUT,
-+ .gpio66 = GPIO_DIR_OUTPUT,
-+ .gpio68 = GPIO_DIR_INPUT,
-+ .gpio69 = GPIO_DIR_INPUT,
-+ .gpio72 = GPIO_DIR_OUTPUT,
-+ .gpio73 = GPIO_DIR_INPUT,
-+ .gpio74 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+ .gpio64 = GPIO_LEVEL_HIGH,
-+ .gpio66 = GPIO_LEVEL_HIGH,
-+ .gpio72 = GPIO_LEVEL_HIGH,
-+ .gpio74 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+ .set1 = {
-+ .mode = &pch_gpio_set1_mode,
-+ .direction = &pch_gpio_set1_direction,
-+ .level = &pch_gpio_set1_level,
-+ .blink = &pch_gpio_set1_blink,
-+ .invert = &pch_gpio_set1_invert,
-+ .reset = &pch_gpio_set1_reset,
-+ },
-+ .set2 = {
-+ .mode = &pch_gpio_set2_mode,
-+ .direction = &pch_gpio_set2_direction,
-+ .level = &pch_gpio_set2_level,
-+ .reset = &pch_gpio_set2_reset,
-+ },
-+ .set3 = {
-+ .mode = &pch_gpio_set3_mode,
-+ .direction = &pch_gpio_set3_direction,
-+ .level = &pch_gpio_set3_level,
-+ .reset = &pch_gpio_set3_reset,
-+ },
-+};
-diff --git a/src/mainboard/dell/optiplex_9020/hda_verb.c b/src/mainboard/dell/optiplex_9020/hda_verb.c
-new file mode 100644
-index 0000000000..df43ade3e6
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/hda_verb.c
-@@ -0,0 +1,27 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <stdint.h>
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+ 0x10ec0280, /* Realtek ALC3220 */
-+ 0x102805a5, /* Subsystem ID */
-+ 13, /* Number of entries */
-+ AZALIA_SUBVENDOR(0, 0x102805a5),
-+ AZALIA_PIN_CFG(0, 0x12, 0x4008c000),
-+ AZALIA_PIN_CFG(0, 0x13, 0x411111f0),
-+ AZALIA_PIN_CFG(0, 0x14, 0x90170110),
-+ AZALIA_PIN_CFG(0, 0x15, 0x0221401f),
-+ AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
-+ AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
-+ AZALIA_PIN_CFG(0, 0x18, 0x01a13040),
-+ AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
-+ AZALIA_PIN_CFG(0, 0x1a, 0x02a19030),
-+ AZALIA_PIN_CFG(0, 0x1b, 0x01014020),
-+ AZALIA_PIN_CFG(0, 0x1d, 0x40400001),
-+ AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
-+};
-+
-+const u32 pc_beep_verbs[] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/optiplex_9020/mainboard.c b/src/mainboard/dell/optiplex_9020/mainboard.c
-new file mode 100644
-index 0000000000..c834fea5d3
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/mainboard.c
-@@ -0,0 +1,15 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+#include <drivers/intel/gma/int15.h>
-+
-+static void mainboard_enable(struct device *dev)
-+{
-+ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE,
-+ GMA_INT15_PANEL_FIT_DEFAULT,
-+ GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-+}
-+
-+struct chip_operations mainboard_ops = {
-+ .enable_dev = mainboard_enable,
-+};
-diff --git a/src/mainboard/dell/optiplex_9020/overridetree_mt.cb b/src/mainboard/dell/optiplex_9020/overridetree_mt.cb
-new file mode 100644
-index 0000000000..90205c2d68
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/overridetree_mt.cb
-@@ -0,0 +1,10 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+chip northbridge/intel/haswell
-+ device domain 0 on
-+ chip southbridge/intel/lynxpoint
-+ device pci 1c.1 on end # PCI (via XIO2001 bridge)
-+ device pci 1c.2 on end # PCIe 1x slot
-+ end
-+ end
-+end
-diff --git a/src/mainboard/dell/optiplex_9020/romstage.c b/src/mainboard/dell/optiplex_9020/romstage.c
-new file mode 100644
-index 0000000000..2b9cdaa5fd
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/romstage.c
-@@ -0,0 +1,53 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <northbridge/intel/haswell/haswell.h>
-+#include <northbridge/intel/haswell/raminit.h>
-+#include <southbridge/intel/lynxpoint/pch.h>
-+
-+void mainboard_config_rcba(void)
-+{
-+ RCBA16(D31IR) = DIR_ROUTE(PIRQA, PIRQC, PIRQD, PIRQA);
-+ RCBA16(D29IR) = DIR_ROUTE(PIRQC, PIRQA, PIRQD, PIRQH);
-+ RCBA16(D28IR) = DIR_ROUTE(PIRQD, PIRQC, PIRQB, PIRQA);
-+ RCBA16(D27IR) = DIR_ROUTE(PIRQD, PIRQC, PIRQB, PIRQG);
-+ RCBA16(D26IR) = DIR_ROUTE(PIRQD, PIRQC, PIRQF, PIRQA);
-+ RCBA16(D25IR) = DIR_ROUTE(PIRQH, PIRQG, PIRQF, PIRQE);
-+ RCBA16(D22IR) = DIR_ROUTE(PIRQB, PIRQC, PIRQD, PIRQA);
-+ RCBA16(D20IR) = DIR_ROUTE(PIRQD, PIRQC, PIRQB, PIRQA);
-+}
-+
-+void mb_get_spd_map(struct spd_info *spdi)
-+{
-+ spdi->addresses[0] = 0x50;
-+ spdi->addresses[1] = 0x51;
-+ spdi->addresses[2] = 0x52;
-+ spdi->addresses[3] = 0x53;
-+}
-+
-+const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS] = {
-+ /* Length, Enable, OCn#, Location */
-+ {0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP},
-+ {0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP},
-+ {0x0040, 1, 1, USB_PORT_BACK_PANEL},
-+ {0x0040, 1, 2, USB_PORT_BACK_PANEL},
-+ {0x0040, 1, 3, USB_PORT_BACK_PANEL},
-+ {0x0040, 1, 3, USB_PORT_BACK_PANEL},
-+ {0x0040, 1, 0, USB_PORT_BACK_PANEL},
-+ {0x0040, 1, 0, USB_PORT_BACK_PANEL},
-+ {0x0040, 1, 4, USB_PORT_BACK_PANEL},
-+ {0x0040, 1, 4, USB_PORT_BACK_PANEL},
-+ {0x0040, 1, 5, USB_PORT_BACK_PANEL},
-+ {0x0040, 1, 5, USB_PORT_BACK_PANEL},
-+ {0x0040, 1, 6, USB_PORT_BACK_PANEL},
-+ {0x0040, 1, 7, USB_PORT_BACK_PANEL},
-+};
-+
-+const struct usb3_port_config mainboard_usb3_ports[MAX_USB3_PORTS] = {
-+ /* Enable, OCn# */
-+ {1, 6},
-+ {1, 7},
-+ {0, USB_OC_PIN_SKIP},
-+ {0, USB_OC_PIN_SKIP},
-+ {1, 1},
-+ {1, 2},
-+};
---
-2.39.2
-
diff --git a/config/coreboot/default/patches/0032-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch b/config/coreboot/default/patches/0032-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
deleted file mode 100644
index ddfc6571..00000000
--- a/config/coreboot/default/patches/0032-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch
+++ /dev/null
@@ -1,774 +0,0 @@
-From 41002e64c92e90903fa591c4a8a1cc0108833743 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Sun, 26 Nov 2023 17:08:52 -0700
-Subject: [PATCH] mb/dell: Add Latitude E6420 (Sandy Bridge)
-
-Change-Id: Ic48d9ea58172a5b13958c8afebcb19c8929c4394
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/e6420/Kconfig | 38 ++++
- src/mainboard/dell/e6420/Kconfig.name | 2 +
- src/mainboard/dell/e6420/Makefile.inc | 6 +
- src/mainboard/dell/e6420/acpi/ec.asl | 9 +
- src/mainboard/dell/e6420/acpi/platform.asl | 12 ++
- src/mainboard/dell/e6420/acpi/superio.asl | 3 +
- src/mainboard/dell/e6420/acpi_tables.c | 16 ++
- src/mainboard/dell/e6420/board_info.txt | 6 +
- src/mainboard/dell/e6420/cmos.default | 9 +
- src/mainboard/dell/e6420/cmos.layout | 88 ++++++++++
- src/mainboard/dell/e6420/data.vbt | Bin 0 -> 6144 bytes
- src/mainboard/dell/e6420/devicetree.cb | 66 +++++++
- src/mainboard/dell/e6420/dsdt.asl | 30 ++++
- src/mainboard/dell/e6420/early_init.c | 32 ++++
- src/mainboard/dell/e6420/gma-mainboard.ads | 20 +++
- src/mainboard/dell/e6420/gpio.c | 191 +++++++++++++++++++++
- src/mainboard/dell/e6420/hda_verb.c | 33 ++++
- src/mainboard/dell/e6420/mainboard.c | 21 +++
- 18 files changed, 582 insertions(+)
- create mode 100644 src/mainboard/dell/e6420/Kconfig
- create mode 100644 src/mainboard/dell/e6420/Kconfig.name
- create mode 100644 src/mainboard/dell/e6420/Makefile.inc
- create mode 100644 src/mainboard/dell/e6420/acpi/ec.asl
- create mode 100644 src/mainboard/dell/e6420/acpi/platform.asl
- create mode 100644 src/mainboard/dell/e6420/acpi/superio.asl
- create mode 100644 src/mainboard/dell/e6420/acpi_tables.c
- create mode 100644 src/mainboard/dell/e6420/board_info.txt
- create mode 100644 src/mainboard/dell/e6420/cmos.default
- create mode 100644 src/mainboard/dell/e6420/cmos.layout
- create mode 100644 src/mainboard/dell/e6420/data.vbt
- create mode 100644 src/mainboard/dell/e6420/devicetree.cb
- create mode 100644 src/mainboard/dell/e6420/dsdt.asl
- create mode 100644 src/mainboard/dell/e6420/early_init.c
- create mode 100644 src/mainboard/dell/e6420/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/e6420/gpio.c
- create mode 100644 src/mainboard/dell/e6420/hda_verb.c
- create mode 100644 src/mainboard/dell/e6420/mainboard.c
-
-diff --git a/src/mainboard/dell/e6420/Kconfig b/src/mainboard/dell/e6420/Kconfig
-new file mode 100644
-index 0000000000..cff62bf70c
---- /dev/null
-+++ b/src/mainboard/dell/e6420/Kconfig
-@@ -0,0 +1,38 @@
-+if BOARD_DELL_LATITUDE_E6420
-+
-+config BOARD_SPECIFIC_OPTIONS
-+ def_bool y
-+ select BOARD_ROMSIZE_KB_10240
-+ select EC_ACPI
-+ select EC_DELL_MEC5035
-+ select GFX_GMA_PANEL_1_ON_LVDS
-+ select HAVE_ACPI_RESUME
-+ select HAVE_ACPI_TABLES
-+ select HAVE_CMOS_DEFAULT
-+ select HAVE_OPTION_TABLE
-+ select INTEL_GMA_HAVE_VBT
-+ select INTEL_INT15
-+ select MAINBOARD_HAS_LIBGFXINIT
-+ select MAINBOARD_USES_IFD_GBE_REGION
-+ select NORTHBRIDGE_INTEL_SANDYBRIDGE
-+ select SERIRQ_CONTINUOUS_MODE
-+ select SOUTHBRIDGE_INTEL_BD82X6X
-+ select SYSTEM_TYPE_LAPTOP
-+ select USE_NATIVE_RAMINIT
-+
-+config DRAM_RESET_GATE_GPIO
-+ default 60
-+
-+config MAINBOARD_DIR
-+ default "dell/e6420"
-+
-+config MAINBOARD_PART_NUMBER
-+ default "Latitude E6420"
-+
-+config USBDEBUG_HCD_INDEX
-+ default 2
-+
-+config VGA_BIOS_ID
-+ default "8086,0126"
-+
-+endif # BOARD_DELL_LATITUDE_E6420
-diff --git a/src/mainboard/dell/e6420/Kconfig.name b/src/mainboard/dell/e6420/Kconfig.name
-new file mode 100644
-index 0000000000..1722891e7b
---- /dev/null
-+++ b/src/mainboard/dell/e6420/Kconfig.name
-@@ -0,0 +1,2 @@
-+config BOARD_DELL_LATITUDE_E6420
-+ bool "Latitude E6420"
-diff --git a/src/mainboard/dell/e6420/Makefile.inc b/src/mainboard/dell/e6420/Makefile.inc
-new file mode 100644
-index 0000000000..ba64e93eb8
---- /dev/null
-+++ b/src/mainboard/dell/e6420/Makefile.inc
-@@ -0,0 +1,6 @@
-+# SPDX-License-Identifier: GPL-2.0-only
-+bootblock-y += early_init.c
-+bootblock-y += gpio.c
-+romstage-y += early_init.c
-+romstage-y += gpio.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-diff --git a/src/mainboard/dell/e6420/acpi/ec.asl b/src/mainboard/dell/e6420/acpi/ec.asl
-new file mode 100644
-index 0000000000..0d429410a9
---- /dev/null
-+++ b/src/mainboard/dell/e6420/acpi/ec.asl
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Device(EC)
-+{
-+ Name (_HID, EISAID("PNP0C09"))
-+ Name (_UID, 0)
-+ Name (_GPE, 16)
-+/* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e6420/acpi/platform.asl b/src/mainboard/dell/e6420/acpi/platform.asl
-new file mode 100644
-index 0000000000..2d24bbd9b9
---- /dev/null
-+++ b/src/mainboard/dell/e6420/acpi/platform.asl
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Method(_WAK, 1)
-+{
-+ /* FIXME: EC support */
-+ Return(Package() {0, 0})
-+}
-+
-+Method(_PTS,1)
-+{
-+ /* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e6420/acpi/superio.asl b/src/mainboard/dell/e6420/acpi/superio.asl
-new file mode 100644
-index 0000000000..55b1db5b11
---- /dev/null
-+++ b/src/mainboard/dell/e6420/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <drivers/pc80/pc/ps2_controller.asl>
-diff --git a/src/mainboard/dell/e6420/acpi_tables.c b/src/mainboard/dell/e6420/acpi_tables.c
-new file mode 100644
-index 0000000000..e2759659bf
---- /dev/null
-+++ b/src/mainboard/dell/e6420/acpi_tables.c
-@@ -0,0 +1,16 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi_gnvs.h>
-+#include <soc/nvs.h>
-+
-+/* FIXME: check this function. */
-+void mainboard_fill_gnvs(struct global_nvs *gnvs)
-+{
-+ /* The lid is open by default. */
-+ gnvs->lids = 1;
-+
-+ /* Temperature at which OS will shutdown */
-+ gnvs->tcrt = 100;
-+ /* Temperature at which OS will throttle CPU */
-+ gnvs->tpsv = 90;
-+}
-diff --git a/src/mainboard/dell/e6420/board_info.txt b/src/mainboard/dell/e6420/board_info.txt
-new file mode 100644
-index 0000000000..34d5ad9e0b
---- /dev/null
-+++ b/src/mainboard/dell/e6420/board_info.txt
-@@ -0,0 +1,6 @@
-+Category: laptop
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2011
-diff --git a/src/mainboard/dell/e6420/cmos.default b/src/mainboard/dell/e6420/cmos.default
-new file mode 100644
-index 0000000000..279415dfd1
---- /dev/null
-+++ b/src/mainboard/dell/e6420/cmos.default
-@@ -0,0 +1,9 @@
-+boot_option=Fallback
-+debug_level=Debug
-+power_on_after_fail=Disable
-+nmi=Enable
-+bluetooth=Enable
-+wwan=Enable
-+wlan=Enable
-+sata_mode=AHCI
-+me_state=Disabled
-diff --git a/src/mainboard/dell/e6420/cmos.layout b/src/mainboard/dell/e6420/cmos.layout
-new file mode 100644
-index 0000000000..1aa7e77bce
---- /dev/null
-+++ b/src/mainboard/dell/e6420/cmos.layout
-@@ -0,0 +1,88 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+# -----------------------------------------------------------------
-+0 120 r 0 reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384 1 e 4 boot_option
-+388 4 h 0 reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395 4 e 6 debug_level
-+
-+#400 8 r 0 reserved for century byte
-+
-+# coreboot config options: southbridge
-+408 1 e 1 nmi
-+409 2 e 7 power_on_after_fail
-+411 1 e 9 sata_mode
-+
-+# coreboot config options: EC
-+412 1 e 1 bluetooth
-+413 1 e 1 wwan
-+414 1 e 1 wlan
-+
-+# coreboot config options: ME
-+424 1 e 14 me_state
-+425 2 h 0 me_state_prev
-+
-+# coreboot config options: northbridge
-+432 3 e 11 gfx_uma_size
-+435 2 e 12 hybrid_graphics_mode
-+440 8 h 0 volume
-+
-+# VBOOT
-+448 128 r 0 vbnv
-+
-+# SandyBridge MRC Scrambler Seed values
-+896 32 r 0 mrc_scrambler_seed
-+928 32 r 0 mrc_scrambler_seed_s3
-+960 16 r 0 mrc_scrambler_seed_chk
-+
-+# coreboot config options: check sums
-+984 16 h 0 check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID value text
-+1 0 Disable
-+1 1 Enable
-+2 0 Enable
-+2 1 Disable
-+4 0 Fallback
-+4 1 Normal
-+6 0 Emergency
-+6 1 Alert
-+6 2 Critical
-+6 3 Error
-+6 4 Warning
-+6 5 Notice
-+6 6 Info
-+6 7 Debug
-+6 8 Spew
-+7 0 Disable
-+7 1 Enable
-+7 2 Keep
-+9 0 AHCI
-+9 1 Compatible
-+11 0 32M
-+11 1 64M
-+11 2 96M
-+11 3 128M
-+11 4 160M
-+11 5 192M
-+11 6 224M
-+14 0 Normal
-+14 1 Disabled
-+
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 447 984
-diff --git a/src/mainboard/dell/e6420/data.vbt b/src/mainboard/dell/e6420/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..d3662eea1bc78b60be6d0bd2cc38bb46b654afbd
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-zGL@}Sai^*sP}va`KTx$VRQ8REf2*1+lTFH0=UkNx+eN|1rVyipl)Du=h=@%w+iQZG
-zT6@-PdW^oyFb44AG`HMZWEnP{&OQ+jC`N4emoS)x;EPN}uaSFOf-Mn8JRRO&LTWJc
-zn6%=L94~PR)%Ua_HTZcfTXD<p{%8p|<N<;Efw$Zb4$}{m8@7c((~<7^thaau&@Wx#
-zVGNL)lmH@{o=h*{muXGc!;nXrVgpp3;1V1stMj=4AtxyzX+?SoB~zN}!*r?9Qvs1P
-zmV_(CTmt0sY&6=F=_M>E34GYvuh1uQF+BUdWyQC5SaEM1QvKlHBMs13C}n{0SwRxW
-ziekMa&kvRFruRcKCevGy5)TxUBDlur@E{TtQ^NQ>nO+Cgl)&Ga(PxqVW?e3TLH-UY
-zdL3T{z^xdd`$(STFUb8R*cKa}r>n{Wk+MXRH~o-hN}#9OF*>T#>rfhiRs(Wc-R^9@
-z%F=<}dn(E}ADc03zJ>JvZe;_8f+WFLL4%qNYs`_aa`a$Pl5H;iO^Wt*cP3W(d=(g}
-zZ%nKT1$|r-tAv8($u2-BI2Uiz#%OT&!Q3b~Ru2P2j;Gem!@wfPsTR%J>W{8z)oq^J
-k^Qm&?O@bFkw4CTocwoW<6CRlGz=Q`TJTT#bN9KWl0rH4|j{pDw
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/e6420/devicetree.cb b/src/mainboard/dell/e6420/devicetree.cb
-new file mode 100644
-index 0000000000..f9259f7175
---- /dev/null
-+++ b/src/mainboard/dell/e6420/devicetree.cb
-@@ -0,0 +1,66 @@
-+chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
-+ register "gfx" = "GMA_STATIC_DISPLAYS(1)"
-+ register "gpu_cpu_backlight" = "0x0000054f"
-+ register "gpu_dp_b_hotplug" = "4"
-+ register "gpu_dp_c_hotplug" = "4"
-+ register "gpu_dp_d_hotplug" = "4"
-+ register "gpu_panel_port_select" = "0"
-+ register "gpu_panel_power_backlight_off_delay" = "2300"
-+ register "gpu_panel_power_backlight_on_delay" = "2300"
-+ register "gpu_panel_power_cycle_delay" = "6"
-+ register "gpu_panel_power_down_delay" = "400"
-+ register "gpu_panel_power_up_delay" = "400"
-+ register "gpu_pch_backlight" = "0x13121312"
-+
-+ register "spd_addresses" = "{0x50, 0, 0x52, 0}"
-+
-+ device domain 0x0 on
-+ subsystemid 0x1028 0x0493 inherit
-+
-+ device ref host_bridge on end # Host bridge
-+ device ref peg10 on end # PEG
-+ device ref igd on end # iGPU
-+
-+ chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-+ register "docking_supported" = "1"
-+ register "gen1_dec" = "0x007c0681"
-+ register "gen2_dec" = "0x007c0901"
-+ register "gen3_dec" = "0x003c07e1"
-+ register "gen4_dec" = "0x001c0901"
-+ register "gpi0_routing" = "2"
-+ register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
-+ register "pcie_port_coalesce" = "1"
-+ register "sata_interface_speed_support" = "0x3"
-+ register "sata_port_map" = "0x3b"
-+ register "spi_lvscc" = "0x2005"
-+ register "spi_uvscc" = "0x2005"
-+
-+ device ref mei1 off end
-+ device ref mei2 off end
-+ device ref me_ide_r off end
-+ device ref me_kt off end
-+ device ref gbe on end
-+ device ref ehci2 on end
-+ device ref hda on end
-+ device ref pcie_rp1 on end
-+ device ref pcie_rp2 on end
-+ device ref pcie_rp3 on end
-+ device ref pcie_rp4 on end
-+ device ref pcie_rp5 off end
-+ device ref pcie_rp6 on end
-+ device ref pcie_rp7 off end
-+ device ref pcie_rp8 off end
-+ device ref ehci1 on end
-+ device ref pci_bridge off end
-+ device ref lpc on
-+ chip ec/dell/mec5035
-+ device pnp ff.0 on end
-+ end
-+ end
-+ device ref sata1 on end
-+ device ref smbus on end
-+ device ref sata2 off end
-+ device ref thermal off end
-+ end
-+ end
-+end
-diff --git a/src/mainboard/dell/e6420/dsdt.asl b/src/mainboard/dell/e6420/dsdt.asl
-new file mode 100644
-index 0000000000..7d13c55b08
---- /dev/null
-+++ b/src/mainboard/dell/e6420/dsdt.asl
-@@ -0,0 +1,30 @@
-+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
-+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <acpi/acpi.h>
-+
-+DefinitionBlock(
-+ "dsdt.aml",
-+ "DSDT",
-+ ACPI_DSDT_REV_2,
-+ OEM_ID,
-+ ACPI_TABLE_CREATOR,
-+ 0x20141018 /* OEM revision */
-+)
-+{
-+ #include <acpi/dsdt_top.asl>
-+ #include "acpi/platform.asl"
-+ #include <cpu/intel/common/acpi/cpu.asl>
-+ #include <southbridge/intel/common/acpi/platform.asl>
-+ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-+ #include <southbridge/intel/common/acpi/sleepstates.asl>
-+
-+ Device (\_SB.PCI0)
-+ {
-+ #include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-+ #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
-+ #include <southbridge/intel/bd82x6x/acpi/pch.asl>
-+ }
-+}
-diff --git a/src/mainboard/dell/e6420/early_init.c b/src/mainboard/dell/e6420/early_init.c
-new file mode 100644
-index 0000000000..0682441ed6
---- /dev/null
-+++ b/src/mainboard/dell/e6420/early_init.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+ { 1, 1, 0 },
-+ { 1, 1, 0 },
-+ { 1, 1, 1 },
-+ { 1, 1, 1 },
-+ { 1, 0, 2 },
-+ { 1, 1, 2 },
-+ { 1, 1, 3 },
-+ { 1, 1, 3 },
-+ { 1, 1, 5 },
-+ { 1, 1, 5 },
-+ { 1, 1, 7 },
-+ { 1, 1, 6 },
-+ { 1, 0, 6 },
-+ { 1, 0, 7 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+ | COMB_LPC_EN | COMA_LPC_EN);
-+ mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/e6420/gma-mainboard.ads b/src/mainboard/dell/e6420/gma-mainboard.ads
-new file mode 100644
-index 0000000000..2a16f44360
---- /dev/null
-+++ b/src/mainboard/dell/e6420/gma-mainboard.ads
-@@ -0,0 +1,20 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+ ports : constant Port_List :=
-+ (
-+ HDMI1, -- mainboard HDMI
-+ DP2, -- dock DP
-+ DP3, -- dock DP
-+ Analog, -- mainboard VGA
-+ LVDS,
-+ others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/e6420/gpio.c b/src/mainboard/dell/e6420/gpio.c
-new file mode 100644
-index 0000000000..943c743f48
---- /dev/null
-+++ b/src/mainboard/dell/e6420/gpio.c
-@@ -0,0 +1,191 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+ .gpio0 = GPIO_MODE_GPIO,
-+ .gpio1 = GPIO_MODE_NATIVE,
-+ .gpio2 = GPIO_MODE_GPIO,
-+ .gpio3 = GPIO_MODE_NATIVE,
-+ .gpio4 = GPIO_MODE_GPIO,
-+ .gpio5 = GPIO_MODE_NATIVE,
-+ .gpio6 = GPIO_MODE_GPIO,
-+ .gpio7 = GPIO_MODE_GPIO,
-+ .gpio8 = GPIO_MODE_GPIO,
-+ .gpio9 = GPIO_MODE_NATIVE,
-+ .gpio10 = GPIO_MODE_NATIVE,
-+ .gpio11 = GPIO_MODE_NATIVE,
-+ .gpio12 = GPIO_MODE_NATIVE,
-+ .gpio13 = GPIO_MODE_GPIO,
-+ .gpio14 = GPIO_MODE_GPIO,
-+ .gpio15 = GPIO_MODE_GPIO,
-+ .gpio16 = GPIO_MODE_GPIO,
-+ .gpio17 = GPIO_MODE_GPIO,
-+ .gpio18 = GPIO_MODE_NATIVE,
-+ .gpio19 = GPIO_MODE_GPIO,
-+ .gpio20 = GPIO_MODE_NATIVE,
-+ .gpio21 = GPIO_MODE_GPIO,
-+ .gpio22 = GPIO_MODE_GPIO,
-+ .gpio23 = GPIO_MODE_NATIVE,
-+ .gpio24 = GPIO_MODE_GPIO,
-+ .gpio25 = GPIO_MODE_NATIVE,
-+ .gpio26 = GPIO_MODE_NATIVE,
-+ .gpio27 = GPIO_MODE_GPIO,
-+ .gpio28 = GPIO_MODE_GPIO,
-+ .gpio29 = GPIO_MODE_GPIO,
-+ .gpio30 = GPIO_MODE_GPIO,
-+ .gpio31 = GPIO_MODE_GPIO,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+ .gpio0 = GPIO_DIR_INPUT,
-+ .gpio2 = GPIO_DIR_INPUT,
-+ .gpio4 = GPIO_DIR_INPUT,
-+ .gpio6 = GPIO_DIR_INPUT,
-+ .gpio7 = GPIO_DIR_INPUT,
-+ .gpio8 = GPIO_DIR_INPUT,
-+ .gpio13 = GPIO_DIR_INPUT,
-+ .gpio14 = GPIO_DIR_INPUT,
-+ .gpio15 = GPIO_DIR_INPUT,
-+ .gpio16 = GPIO_DIR_INPUT,
-+ .gpio17 = GPIO_DIR_INPUT,
-+ .gpio19 = GPIO_DIR_INPUT,
-+ .gpio21 = GPIO_DIR_INPUT,
-+ .gpio22 = GPIO_DIR_INPUT,
-+ .gpio24 = GPIO_DIR_INPUT,
-+ .gpio27 = GPIO_DIR_INPUT,
-+ .gpio28 = GPIO_DIR_INPUT,
-+ .gpio29 = GPIO_DIR_INPUT,
-+ .gpio30 = GPIO_DIR_OUTPUT,
-+ .gpio31 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+ .gpio30 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+ .gpio0 = GPIO_INVERT,
-+ .gpio8 = GPIO_INVERT,
-+ .gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+ .gpio32 = GPIO_MODE_NATIVE,
-+ .gpio33 = GPIO_MODE_GPIO,
-+ .gpio34 = GPIO_MODE_GPIO,
-+ .gpio35 = GPIO_MODE_GPIO,
-+ .gpio36 = GPIO_MODE_GPIO,
-+ .gpio37 = GPIO_MODE_GPIO,
-+ .gpio38 = GPIO_MODE_GPIO,
-+ .gpio39 = GPIO_MODE_GPIO,
-+ .gpio40 = GPIO_MODE_NATIVE,
-+ .gpio41 = GPIO_MODE_NATIVE,
-+ .gpio42 = GPIO_MODE_NATIVE,
-+ .gpio43 = GPIO_MODE_NATIVE,
-+ .gpio44 = GPIO_MODE_NATIVE,
-+ .gpio45 = GPIO_MODE_GPIO,
-+ .gpio46 = GPIO_MODE_NATIVE,
-+ .gpio47 = GPIO_MODE_NATIVE,
-+ .gpio48 = GPIO_MODE_GPIO,
-+ .gpio49 = GPIO_MODE_GPIO,
-+ .gpio50 = GPIO_MODE_NATIVE,
-+ .gpio51 = GPIO_MODE_GPIO,
-+ .gpio52 = GPIO_MODE_GPIO,
-+ .gpio53 = GPIO_MODE_NATIVE,
-+ .gpio54 = GPIO_MODE_GPIO,
-+ .gpio55 = GPIO_MODE_NATIVE,
-+ .gpio56 = GPIO_MODE_NATIVE,
-+ .gpio57 = GPIO_MODE_GPIO,
-+ .gpio58 = GPIO_MODE_NATIVE,
-+ .gpio59 = GPIO_MODE_NATIVE,
-+ .gpio60 = GPIO_MODE_GPIO,
-+ .gpio61 = GPIO_MODE_NATIVE,
-+ .gpio62 = GPIO_MODE_NATIVE,
-+ .gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+ .gpio33 = GPIO_DIR_INPUT,
-+ .gpio34 = GPIO_DIR_OUTPUT,
-+ .gpio35 = GPIO_DIR_INPUT,
-+ .gpio36 = GPIO_DIR_INPUT,
-+ .gpio37 = GPIO_DIR_INPUT,
-+ .gpio38 = GPIO_DIR_INPUT,
-+ .gpio39 = GPIO_DIR_INPUT,
-+ .gpio45 = GPIO_DIR_OUTPUT,
-+ .gpio48 = GPIO_DIR_INPUT,
-+ .gpio49 = GPIO_DIR_OUTPUT,
-+ .gpio51 = GPIO_DIR_INPUT,
-+ .gpio52 = GPIO_DIR_INPUT,
-+ .gpio54 = GPIO_DIR_INPUT,
-+ .gpio57 = GPIO_DIR_INPUT,
-+ .gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+ .gpio34 = GPIO_LEVEL_HIGH,
-+ .gpio45 = GPIO_LEVEL_LOW,
-+ .gpio49 = GPIO_LEVEL_LOW,
-+ .gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+ .gpio64 = GPIO_MODE_NATIVE,
-+ .gpio65 = GPIO_MODE_NATIVE,
-+ .gpio66 = GPIO_MODE_NATIVE,
-+ .gpio67 = GPIO_MODE_NATIVE,
-+ .gpio68 = GPIO_MODE_GPIO,
-+ .gpio69 = GPIO_MODE_GPIO,
-+ .gpio70 = GPIO_MODE_GPIO,
-+ .gpio71 = GPIO_MODE_GPIO,
-+ .gpio72 = GPIO_MODE_NATIVE,
-+ .gpio73 = GPIO_MODE_NATIVE,
-+ .gpio74 = GPIO_MODE_NATIVE,
-+ .gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+ .gpio68 = GPIO_DIR_INPUT,
-+ .gpio69 = GPIO_DIR_INPUT,
-+ .gpio70 = GPIO_DIR_INPUT,
-+ .gpio71 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+ .set1 = {
-+ .mode = &pch_gpio_set1_mode,
-+ .direction = &pch_gpio_set1_direction,
-+ .level = &pch_gpio_set1_level,
-+ .blink = &pch_gpio_set1_blink,
-+ .invert = &pch_gpio_set1_invert,
-+ .reset = &pch_gpio_set1_reset,
-+ },
-+ .set2 = {
-+ .mode = &pch_gpio_set2_mode,
-+ .direction = &pch_gpio_set2_direction,
-+ .level = &pch_gpio_set2_level,
-+ .reset = &pch_gpio_set2_reset,
-+ },
-+ .set3 = {
-+ .mode = &pch_gpio_set3_mode,
-+ .direction = &pch_gpio_set3_direction,
-+ .level = &pch_gpio_set3_level,
-+ .reset = &pch_gpio_set3_reset,
-+ },
-+};
-diff --git a/src/mainboard/dell/e6420/hda_verb.c b/src/mainboard/dell/e6420/hda_verb.c
-new file mode 100644
-index 0000000000..b3803b7c65
---- /dev/null
-+++ b/src/mainboard/dell/e6420/hda_verb.c
-@@ -0,0 +1,33 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+ 0x111d76e7, /* Codec Vendor / Device ID: IDT */
-+ 0x10280493, /* Subsystem ID */
-+ 11, /* Number of 4 dword sets */
-+ AZALIA_SUBVENDOR(0, 0x10280493),
-+ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
-+ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
-+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+ AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
-+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+ AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+ 0x80862805, /* Codec Vendor / Device ID: Intel */
-+ 0x80860101, /* Subsystem ID */
-+ 4, /* Number of 4 dword sets */
-+ AZALIA_SUBVENDOR(3, 0x80860101),
-+ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/e6420/mainboard.c b/src/mainboard/dell/e6420/mainboard.c
-new file mode 100644
-index 0000000000..31e49802fc
---- /dev/null
-+++ b/src/mainboard/dell/e6420/mainboard.c
-@@ -0,0 +1,21 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+#include <drivers/intel/gma/int15.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+#include <ec/acpi/ec.h>
-+#include <console/console.h>
-+#include <pc80/keyboard.h>
-+
-+static void mainboard_enable(struct device *dev)
-+{
-+
-+ /* FIXME: fix these values. */
-+ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-+ GMA_INT15_PANEL_FIT_DEFAULT,
-+ GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-+}
-+
-+struct chip_operations mainboard_ops = {
-+ .enable_dev = mainboard_enable,
-+};
---
-2.43.0
-
diff --git a/config/coreboot/default/patches/0025-use-mirrorservice.org-for-gcc-downloads.patch b/config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch
index 8275d6c5..4fb0f8a0 100644
--- a/config/coreboot/default/patches/0025-use-mirrorservice.org-for-gcc-downloads.patch
+++ b/config/coreboot/default/patches/0032-use-mirrorservice.org-for-gcc-downloads.patch
@@ -1,7 +1,7 @@
-From 936a8f113772c93d7501e7133159ab4e23436222 Mon Sep 17 00:00:00 2001
+From b769a682016b7d231bb3d004698c8a2059bbf363 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 22:57:08 +0000
-Subject: [PATCH 25/30] use mirrorservice.org for gcc downloads
+Subject: [PATCH 32/65] use mirrorservice.org for gcc downloads
the gnu.org 302 redirect often fails
@@ -11,10 +11,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 36565a906c..4d4ca06113 100755
+index 5faff337b4..2743f96903 100755
--- a/util/crossgcc/buildgcc
+++ b/util/crossgcc/buildgcc
-@@ -67,11 +67,11 @@ NASM_ARCHIVE="nasm-${NASM_VERSION}.tar.bz2"
+@@ -69,11 +69,11 @@ NASM_ARCHIVE="nasm-${NASM_VERSION}.tar.bz2"
# to the jenkins build as well, or the builder won't download it.
# GCC toolchain archive locations
@@ -32,5 +32,5 @@ index 36565a906c..4d4ca06113 100755
# CLANG toolchain archive locations
LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch b/config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
deleted file mode 100644
index 39782376..00000000
--- a/config/coreboot/default/patches/0033-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch
+++ /dev/null
@@ -1,773 +0,0 @@
-From 5e8bff81220d4d0f663feed443e4594b76e442bf Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Wed, 31 Jan 2024 22:07:25 -0700
-Subject: [PATCH] mb/dell: Add Latitude E6520 (Sandy Bridge)
-
-Change-Id: Ibdd40cc15642b8d404159d5962670ccc4167a9ec
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/e6520/Kconfig | 38 +++++
- src/mainboard/dell/e6520/Kconfig.name | 2 +
- src/mainboard/dell/e6520/Makefile.inc | 6 +
- src/mainboard/dell/e6520/acpi/ec.asl | 9 +
- src/mainboard/dell/e6520/acpi/platform.asl | 12 ++
- src/mainboard/dell/e6520/acpi/superio.asl | 3 +
- src/mainboard/dell/e6520/acpi_tables.c | 16 ++
- src/mainboard/dell/e6520/board_info.txt | 6 +
- src/mainboard/dell/e6520/cmos.default | 9 +
- src/mainboard/dell/e6520/cmos.layout | 88 ++++++++++
- src/mainboard/dell/e6520/data.vbt | Bin 0 -> 6144 bytes
- src/mainboard/dell/e6520/devicetree.cb | 66 +++++++
- src/mainboard/dell/e6520/dsdt.asl | 30 ++++
- src/mainboard/dell/e6520/early_init.c | 32 ++++
- src/mainboard/dell/e6520/gma-mainboard.ads | 20 +++
- src/mainboard/dell/e6520/gpio.c | 190 +++++++++++++++++++++
- src/mainboard/dell/e6520/hda_verb.c | 33 ++++
- src/mainboard/dell/e6520/mainboard.c | 21 +++
- 18 files changed, 581 insertions(+)
- create mode 100644 src/mainboard/dell/e6520/Kconfig
- create mode 100644 src/mainboard/dell/e6520/Kconfig.name
- create mode 100644 src/mainboard/dell/e6520/Makefile.inc
- create mode 100644 src/mainboard/dell/e6520/acpi/ec.asl
- create mode 100644 src/mainboard/dell/e6520/acpi/platform.asl
- create mode 100644 src/mainboard/dell/e6520/acpi/superio.asl
- create mode 100644 src/mainboard/dell/e6520/acpi_tables.c
- create mode 100644 src/mainboard/dell/e6520/board_info.txt
- create mode 100644 src/mainboard/dell/e6520/cmos.default
- create mode 100644 src/mainboard/dell/e6520/cmos.layout
- create mode 100644 src/mainboard/dell/e6520/data.vbt
- create mode 100644 src/mainboard/dell/e6520/devicetree.cb
- create mode 100644 src/mainboard/dell/e6520/dsdt.asl
- create mode 100644 src/mainboard/dell/e6520/early_init.c
- create mode 100644 src/mainboard/dell/e6520/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/e6520/gpio.c
- create mode 100644 src/mainboard/dell/e6520/hda_verb.c
- create mode 100644 src/mainboard/dell/e6520/mainboard.c
-
-diff --git a/src/mainboard/dell/e6520/Kconfig b/src/mainboard/dell/e6520/Kconfig
-new file mode 100644
-index 0000000000..db9f25b4ac
---- /dev/null
-+++ b/src/mainboard/dell/e6520/Kconfig
-@@ -0,0 +1,38 @@
-+if BOARD_DELL_LATITUDE_E6520
-+
-+config BOARD_SPECIFIC_OPTIONS
-+ def_bool y
-+ select BOARD_ROMSIZE_KB_10240
-+ select EC_ACPI
-+ select EC_DELL_MEC5035
-+ select GFX_GMA_PANEL_1_ON_LVDS
-+ select HAVE_ACPI_RESUME
-+ select HAVE_ACPI_TABLES
-+ select HAVE_CMOS_DEFAULT
-+ select HAVE_OPTION_TABLE
-+ select INTEL_GMA_HAVE_VBT
-+ select INTEL_INT15
-+ select MAINBOARD_HAS_LIBGFXINIT
-+ select MAINBOARD_USES_IFD_GBE_REGION
-+ select NORTHBRIDGE_INTEL_SANDYBRIDGE
-+ select SERIRQ_CONTINUOUS_MODE
-+ select SOUTHBRIDGE_INTEL_BD82X6X
-+ select SYSTEM_TYPE_LAPTOP
-+ select USE_NATIVE_RAMINIT
-+
-+config DRAM_RESET_GATE_GPIO
-+ default 60
-+
-+config MAINBOARD_DIR
-+ default "dell/e6520"
-+
-+config MAINBOARD_PART_NUMBER
-+ default "Latitude E6520"
-+
-+config USBDEBUG_HCD_INDEX
-+ default 2
-+
-+config VGA_BIOS_ID
-+ default "8086,0116"
-+
-+endif # BOARD_DELL_LATITUDE_E6520
-diff --git a/src/mainboard/dell/e6520/Kconfig.name b/src/mainboard/dell/e6520/Kconfig.name
-new file mode 100644
-index 0000000000..25968e80e5
---- /dev/null
-+++ b/src/mainboard/dell/e6520/Kconfig.name
-@@ -0,0 +1,2 @@
-+config BOARD_DELL_LATITUDE_E6520
-+ bool "Latitude E6520"
-diff --git a/src/mainboard/dell/e6520/Makefile.inc b/src/mainboard/dell/e6520/Makefile.inc
-new file mode 100644
-index 0000000000..ba64e93eb8
---- /dev/null
-+++ b/src/mainboard/dell/e6520/Makefile.inc
-@@ -0,0 +1,6 @@
-+# SPDX-License-Identifier: GPL-2.0-only
-+bootblock-y += early_init.c
-+bootblock-y += gpio.c
-+romstage-y += early_init.c
-+romstage-y += gpio.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-diff --git a/src/mainboard/dell/e6520/acpi/ec.asl b/src/mainboard/dell/e6520/acpi/ec.asl
-new file mode 100644
-index 0000000000..0d429410a9
---- /dev/null
-+++ b/src/mainboard/dell/e6520/acpi/ec.asl
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Device(EC)
-+{
-+ Name (_HID, EISAID("PNP0C09"))
-+ Name (_UID, 0)
-+ Name (_GPE, 16)
-+/* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e6520/acpi/platform.asl b/src/mainboard/dell/e6520/acpi/platform.asl
-new file mode 100644
-index 0000000000..2d24bbd9b9
---- /dev/null
-+++ b/src/mainboard/dell/e6520/acpi/platform.asl
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Method(_WAK, 1)
-+{
-+ /* FIXME: EC support */
-+ Return(Package() {0, 0})
-+}
-+
-+Method(_PTS,1)
-+{
-+ /* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e6520/acpi/superio.asl b/src/mainboard/dell/e6520/acpi/superio.asl
-new file mode 100644
-index 0000000000..55b1db5b11
---- /dev/null
-+++ b/src/mainboard/dell/e6520/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <drivers/pc80/pc/ps2_controller.asl>
-diff --git a/src/mainboard/dell/e6520/acpi_tables.c b/src/mainboard/dell/e6520/acpi_tables.c
-new file mode 100644
-index 0000000000..e2759659bf
---- /dev/null
-+++ b/src/mainboard/dell/e6520/acpi_tables.c
-@@ -0,0 +1,16 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi_gnvs.h>
-+#include <soc/nvs.h>
-+
-+/* FIXME: check this function. */
-+void mainboard_fill_gnvs(struct global_nvs *gnvs)
-+{
-+ /* The lid is open by default. */
-+ gnvs->lids = 1;
-+
-+ /* Temperature at which OS will shutdown */
-+ gnvs->tcrt = 100;
-+ /* Temperature at which OS will throttle CPU */
-+ gnvs->tpsv = 90;
-+}
-diff --git a/src/mainboard/dell/e6520/board_info.txt b/src/mainboard/dell/e6520/board_info.txt
-new file mode 100644
-index 0000000000..34d5ad9e0b
---- /dev/null
-+++ b/src/mainboard/dell/e6520/board_info.txt
-@@ -0,0 +1,6 @@
-+Category: laptop
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2011
-diff --git a/src/mainboard/dell/e6520/cmos.default b/src/mainboard/dell/e6520/cmos.default
-new file mode 100644
-index 0000000000..279415dfd1
---- /dev/null
-+++ b/src/mainboard/dell/e6520/cmos.default
-@@ -0,0 +1,9 @@
-+boot_option=Fallback
-+debug_level=Debug
-+power_on_after_fail=Disable
-+nmi=Enable
-+bluetooth=Enable
-+wwan=Enable
-+wlan=Enable
-+sata_mode=AHCI
-+me_state=Disabled
-diff --git a/src/mainboard/dell/e6520/cmos.layout b/src/mainboard/dell/e6520/cmos.layout
-new file mode 100644
-index 0000000000..1aa7e77bce
---- /dev/null
-+++ b/src/mainboard/dell/e6520/cmos.layout
-@@ -0,0 +1,88 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+# -----------------------------------------------------------------
-+0 120 r 0 reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384 1 e 4 boot_option
-+388 4 h 0 reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395 4 e 6 debug_level
-+
-+#400 8 r 0 reserved for century byte
-+
-+# coreboot config options: southbridge
-+408 1 e 1 nmi
-+409 2 e 7 power_on_after_fail
-+411 1 e 9 sata_mode
-+
-+# coreboot config options: EC
-+412 1 e 1 bluetooth
-+413 1 e 1 wwan
-+414 1 e 1 wlan
-+
-+# coreboot config options: ME
-+424 1 e 14 me_state
-+425 2 h 0 me_state_prev
-+
-+# coreboot config options: northbridge
-+432 3 e 11 gfx_uma_size
-+435 2 e 12 hybrid_graphics_mode
-+440 8 h 0 volume
-+
-+# VBOOT
-+448 128 r 0 vbnv
-+
-+# SandyBridge MRC Scrambler Seed values
-+896 32 r 0 mrc_scrambler_seed
-+928 32 r 0 mrc_scrambler_seed_s3
-+960 16 r 0 mrc_scrambler_seed_chk
-+
-+# coreboot config options: check sums
-+984 16 h 0 check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID value text
-+1 0 Disable
-+1 1 Enable
-+2 0 Enable
-+2 1 Disable
-+4 0 Fallback
-+4 1 Normal
-+6 0 Emergency
-+6 1 Alert
-+6 2 Critical
-+6 3 Error
-+6 4 Warning
-+6 5 Notice
-+6 6 Info
-+6 7 Debug
-+6 8 Spew
-+7 0 Disable
-+7 1 Enable
-+7 2 Keep
-+9 0 AHCI
-+9 1 Compatible
-+11 0 32M
-+11 1 64M
-+11 2 96M
-+11 3 128M
-+11 4 160M
-+11 5 192M
-+11 6 224M
-+14 0 Normal
-+14 1 Disabled
-+
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 447 984
-diff --git a/src/mainboard/dell/e6520/data.vbt b/src/mainboard/dell/e6520/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..0ef16ee7cb482d2cb91ea80c3f419759355f7ba0
-GIT binary patch
-literal 6144
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-z_QgG55e!O(8p8*oBhhF`l$n^QF%rN;rzFNqqcPzFCd5QSB1Y7RKt1=pmTk1aFo9^Y
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-
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-HcmV?d00001
-
-diff --git a/src/mainboard/dell/e6520/devicetree.cb b/src/mainboard/dell/e6520/devicetree.cb
-new file mode 100644
-index 0000000000..cfba8ef4e7
---- /dev/null
-+++ b/src/mainboard/dell/e6520/devicetree.cb
-@@ -0,0 +1,66 @@
-+chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
-+ register "gfx" = "GMA_STATIC_DISPLAYS(1)"
-+ register "gpu_cpu_backlight" = "0x00001312"
-+ register "gpu_dp_b_hotplug" = "4"
-+ register "gpu_dp_c_hotplug" = "4"
-+ register "gpu_dp_d_hotplug" = "4"
-+ register "gpu_panel_port_select" = "0"
-+ register "gpu_panel_power_backlight_off_delay" = "2300"
-+ register "gpu_panel_power_backlight_on_delay" = "2300"
-+ register "gpu_panel_power_cycle_delay" = "6"
-+ register "gpu_panel_power_down_delay" = "400"
-+ register "gpu_panel_power_up_delay" = "400"
-+ register "gpu_pch_backlight" = "0x13121312"
-+
-+ register "spd_addresses" = "{0x50, 0, 0x52, 0}"
-+
-+ device domain 0x0 on
-+ subsystemid 0x1028 0x0494 inherit
-+
-+ device ref host_bridge on end # Host bridge
-+ device ref peg10 on end # PEG
-+ device ref igd on end # iGPU
-+
-+ chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-+ register "docking_supported" = "1"
-+ register "gen1_dec" = "0x007c0681"
-+ register "gen2_dec" = "0x007c0901"
-+ register "gen3_dec" = "0x003c07e1"
-+ register "gen4_dec" = "0x001c0901"
-+ register "gpi0_routing" = "2"
-+ register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
-+ register "pcie_port_coalesce" = "1"
-+ register "sata_interface_speed_support" = "0x3"
-+ register "sata_port_map" = "0x3b"
-+ register "spi_lvscc" = "0x2005"
-+ register "spi_uvscc" = "0x2005"
-+
-+ device ref mei1 off end
-+ device ref mei2 off end
-+ device ref me_ide_r off end
-+ device ref me_kt off end
-+ device ref gbe on end
-+ device ref ehci2 on end
-+ device ref hda on end
-+ device ref pcie_rp1 on end
-+ device ref pcie_rp2 on end
-+ device ref pcie_rp3 on end
-+ device ref pcie_rp4 on end
-+ device ref pcie_rp5 off end
-+ device ref pcie_rp6 on end
-+ device ref pcie_rp7 off end
-+ device ref pcie_rp8 off end
-+ device ref ehci1 on end
-+ device ref pci_bridge off end
-+ device ref lpc on
-+ chip ec/dell/mec5035
-+ device pnp ff.0 on end
-+ end
-+ end
-+ device ref sata1 on end
-+ device ref smbus on end
-+ device ref sata2 off end
-+ device ref thermal off end
-+ end
-+ end
-+end
-diff --git a/src/mainboard/dell/e6520/dsdt.asl b/src/mainboard/dell/e6520/dsdt.asl
-new file mode 100644
-index 0000000000..7d13c55b08
---- /dev/null
-+++ b/src/mainboard/dell/e6520/dsdt.asl
-@@ -0,0 +1,30 @@
-+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
-+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <acpi/acpi.h>
-+
-+DefinitionBlock(
-+ "dsdt.aml",
-+ "DSDT",
-+ ACPI_DSDT_REV_2,
-+ OEM_ID,
-+ ACPI_TABLE_CREATOR,
-+ 0x20141018 /* OEM revision */
-+)
-+{
-+ #include <acpi/dsdt_top.asl>
-+ #include "acpi/platform.asl"
-+ #include <cpu/intel/common/acpi/cpu.asl>
-+ #include <southbridge/intel/common/acpi/platform.asl>
-+ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-+ #include <southbridge/intel/common/acpi/sleepstates.asl>
-+
-+ Device (\_SB.PCI0)
-+ {
-+ #include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-+ #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
-+ #include <southbridge/intel/bd82x6x/acpi/pch.asl>
-+ }
-+}
-diff --git a/src/mainboard/dell/e6520/early_init.c b/src/mainboard/dell/e6520/early_init.c
-new file mode 100644
-index 0000000000..2a37091df6
---- /dev/null
-+++ b/src/mainboard/dell/e6520/early_init.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+ { 1, 1, 0 },
-+ { 1, 1, 0 },
-+ { 1, 1, 1 },
-+ { 1, 1, 1 },
-+ { 1, 0, 2 },
-+ { 1, 1, 2 },
-+ { 1, 0, 3 },
-+ { 1, 0, 3 },
-+ { 1, 1, 5 },
-+ { 1, 1, 5 },
-+ { 1, 1, 7 },
-+ { 1, 1, 6 },
-+ { 1, 0, 6 },
-+ { 1, 0, 7 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+ | COMB_LPC_EN | COMA_LPC_EN);
-+ mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/e6520/gma-mainboard.ads b/src/mainboard/dell/e6520/gma-mainboard.ads
-new file mode 100644
-index 0000000000..2a16f44360
---- /dev/null
-+++ b/src/mainboard/dell/e6520/gma-mainboard.ads
-@@ -0,0 +1,20 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+ ports : constant Port_List :=
-+ (
-+ HDMI1, -- mainboard HDMI
-+ DP2, -- dock DP
-+ DP3, -- dock DP
-+ Analog, -- mainboard VGA
-+ LVDS,
-+ others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/e6520/gpio.c b/src/mainboard/dell/e6520/gpio.c
-new file mode 100644
-index 0000000000..61f01816c4
---- /dev/null
-+++ b/src/mainboard/dell/e6520/gpio.c
-@@ -0,0 +1,190 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+ .gpio0 = GPIO_MODE_GPIO,
-+ .gpio1 = GPIO_MODE_NATIVE,
-+ .gpio2 = GPIO_MODE_GPIO,
-+ .gpio3 = GPIO_MODE_NATIVE,
-+ .gpio4 = GPIO_MODE_GPIO,
-+ .gpio5 = GPIO_MODE_NATIVE,
-+ .gpio6 = GPIO_MODE_GPIO,
-+ .gpio7 = GPIO_MODE_GPIO,
-+ .gpio8 = GPIO_MODE_GPIO,
-+ .gpio9 = GPIO_MODE_NATIVE,
-+ .gpio10 = GPIO_MODE_NATIVE,
-+ .gpio11 = GPIO_MODE_NATIVE,
-+ .gpio12 = GPIO_MODE_NATIVE,
-+ .gpio13 = GPIO_MODE_GPIO,
-+ .gpio14 = GPIO_MODE_GPIO,
-+ .gpio15 = GPIO_MODE_GPIO,
-+ .gpio16 = GPIO_MODE_GPIO,
-+ .gpio17 = GPIO_MODE_GPIO,
-+ .gpio18 = GPIO_MODE_NATIVE,
-+ .gpio19 = GPIO_MODE_GPIO,
-+ .gpio20 = GPIO_MODE_NATIVE,
-+ .gpio21 = GPIO_MODE_GPIO,
-+ .gpio22 = GPIO_MODE_GPIO,
-+ .gpio23 = GPIO_MODE_NATIVE,
-+ .gpio24 = GPIO_MODE_GPIO,
-+ .gpio25 = GPIO_MODE_NATIVE,
-+ .gpio26 = GPIO_MODE_NATIVE,
-+ .gpio27 = GPIO_MODE_GPIO,
-+ .gpio28 = GPIO_MODE_GPIO,
-+ .gpio29 = GPIO_MODE_GPIO,
-+ .gpio30 = GPIO_MODE_GPIO,
-+ .gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+ .gpio0 = GPIO_DIR_INPUT,
-+ .gpio2 = GPIO_DIR_INPUT,
-+ .gpio4 = GPIO_DIR_INPUT,
-+ .gpio6 = GPIO_DIR_INPUT,
-+ .gpio7 = GPIO_DIR_INPUT,
-+ .gpio8 = GPIO_DIR_INPUT,
-+ .gpio13 = GPIO_DIR_INPUT,
-+ .gpio14 = GPIO_DIR_INPUT,
-+ .gpio15 = GPIO_DIR_INPUT,
-+ .gpio16 = GPIO_DIR_INPUT,
-+ .gpio17 = GPIO_DIR_INPUT,
-+ .gpio19 = GPIO_DIR_INPUT,
-+ .gpio21 = GPIO_DIR_INPUT,
-+ .gpio22 = GPIO_DIR_INPUT,
-+ .gpio24 = GPIO_DIR_INPUT,
-+ .gpio27 = GPIO_DIR_INPUT,
-+ .gpio28 = GPIO_DIR_INPUT,
-+ .gpio29 = GPIO_DIR_INPUT,
-+ .gpio30 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+ .gpio30 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+ .gpio0 = GPIO_INVERT,
-+ .gpio8 = GPIO_INVERT,
-+ .gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+ .gpio32 = GPIO_MODE_NATIVE,
-+ .gpio33 = GPIO_MODE_GPIO,
-+ .gpio34 = GPIO_MODE_GPIO,
-+ .gpio35 = GPIO_MODE_GPIO,
-+ .gpio36 = GPIO_MODE_GPIO,
-+ .gpio37 = GPIO_MODE_GPIO,
-+ .gpio38 = GPIO_MODE_GPIO,
-+ .gpio39 = GPIO_MODE_GPIO,
-+ .gpio40 = GPIO_MODE_NATIVE,
-+ .gpio41 = GPIO_MODE_NATIVE,
-+ .gpio42 = GPIO_MODE_NATIVE,
-+ .gpio43 = GPIO_MODE_NATIVE,
-+ .gpio44 = GPIO_MODE_NATIVE,
-+ .gpio45 = GPIO_MODE_GPIO,
-+ .gpio46 = GPIO_MODE_NATIVE,
-+ .gpio47 = GPIO_MODE_NATIVE,
-+ .gpio48 = GPIO_MODE_GPIO,
-+ .gpio49 = GPIO_MODE_GPIO,
-+ .gpio50 = GPIO_MODE_NATIVE,
-+ .gpio51 = GPIO_MODE_GPIO,
-+ .gpio52 = GPIO_MODE_GPIO,
-+ .gpio53 = GPIO_MODE_NATIVE,
-+ .gpio54 = GPIO_MODE_GPIO,
-+ .gpio55 = GPIO_MODE_NATIVE,
-+ .gpio56 = GPIO_MODE_NATIVE,
-+ .gpio57 = GPIO_MODE_GPIO,
-+ .gpio58 = GPIO_MODE_NATIVE,
-+ .gpio59 = GPIO_MODE_NATIVE,
-+ .gpio60 = GPIO_MODE_GPIO,
-+ .gpio61 = GPIO_MODE_NATIVE,
-+ .gpio62 = GPIO_MODE_NATIVE,
-+ .gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+ .gpio33 = GPIO_DIR_INPUT,
-+ .gpio34 = GPIO_DIR_OUTPUT,
-+ .gpio35 = GPIO_DIR_INPUT,
-+ .gpio36 = GPIO_DIR_INPUT,
-+ .gpio37 = GPIO_DIR_INPUT,
-+ .gpio38 = GPIO_DIR_INPUT,
-+ .gpio39 = GPIO_DIR_INPUT,
-+ .gpio45 = GPIO_DIR_OUTPUT,
-+ .gpio48 = GPIO_DIR_INPUT,
-+ .gpio49 = GPIO_DIR_OUTPUT,
-+ .gpio51 = GPIO_DIR_INPUT,
-+ .gpio52 = GPIO_DIR_INPUT,
-+ .gpio54 = GPIO_DIR_INPUT,
-+ .gpio57 = GPIO_DIR_INPUT,
-+ .gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+ .gpio34 = GPIO_LEVEL_HIGH,
-+ .gpio45 = GPIO_LEVEL_LOW,
-+ .gpio49 = GPIO_LEVEL_LOW,
-+ .gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+ .gpio64 = GPIO_MODE_NATIVE,
-+ .gpio65 = GPIO_MODE_NATIVE,
-+ .gpio66 = GPIO_MODE_NATIVE,
-+ .gpio67 = GPIO_MODE_NATIVE,
-+ .gpio68 = GPIO_MODE_GPIO,
-+ .gpio69 = GPIO_MODE_GPIO,
-+ .gpio70 = GPIO_MODE_GPIO,
-+ .gpio71 = GPIO_MODE_GPIO,
-+ .gpio72 = GPIO_MODE_NATIVE,
-+ .gpio73 = GPIO_MODE_NATIVE,
-+ .gpio74 = GPIO_MODE_NATIVE,
-+ .gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+ .gpio68 = GPIO_DIR_INPUT,
-+ .gpio69 = GPIO_DIR_INPUT,
-+ .gpio70 = GPIO_DIR_INPUT,
-+ .gpio71 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+ .set1 = {
-+ .mode = &pch_gpio_set1_mode,
-+ .direction = &pch_gpio_set1_direction,
-+ .level = &pch_gpio_set1_level,
-+ .blink = &pch_gpio_set1_blink,
-+ .invert = &pch_gpio_set1_invert,
-+ .reset = &pch_gpio_set1_reset,
-+ },
-+ .set2 = {
-+ .mode = &pch_gpio_set2_mode,
-+ .direction = &pch_gpio_set2_direction,
-+ .level = &pch_gpio_set2_level,
-+ .reset = &pch_gpio_set2_reset,
-+ },
-+ .set3 = {
-+ .mode = &pch_gpio_set3_mode,
-+ .direction = &pch_gpio_set3_direction,
-+ .level = &pch_gpio_set3_level,
-+ .reset = &pch_gpio_set3_reset,
-+ },
-+};
-diff --git a/src/mainboard/dell/e6520/hda_verb.c b/src/mainboard/dell/e6520/hda_verb.c
-new file mode 100644
-index 0000000000..d33eb3b4c5
---- /dev/null
-+++ b/src/mainboard/dell/e6520/hda_verb.c
-@@ -0,0 +1,33 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+ 0x111d76e7, /* Codec Vendor / Device ID: IDT */
-+ 0x10280494, /* Subsystem ID */
-+ 11, /* Number of 4 dword sets */
-+ AZALIA_SUBVENDOR(0, 0x10280494),
-+ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
-+ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
-+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+ AZALIA_PIN_CFG(0, 0x11, 0x400000f2),
-+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+ AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+ 0x80862805, /* Codec Vendor / Device ID: Intel */
-+ 0x80860101, /* Subsystem ID */
-+ 4, /* Number of 4 dword sets */
-+ AZALIA_SUBVENDOR(3, 0x80860101),
-+ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/e6520/mainboard.c b/src/mainboard/dell/e6520/mainboard.c
-new file mode 100644
-index 0000000000..31e49802fc
---- /dev/null
-+++ b/src/mainboard/dell/e6520/mainboard.c
-@@ -0,0 +1,21 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+#include <drivers/intel/gma/int15.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+#include <ec/acpi/ec.h>
-+#include <console/console.h>
-+#include <pc80/keyboard.h>
-+
-+static void mainboard_enable(struct device *dev)
-+{
-+
-+ /* FIXME: fix these values. */
-+ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-+ GMA_INT15_PANEL_FIT_DEFAULT,
-+ GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-+}
-+
-+struct chip_operations mainboard_ops = {
-+ .enable_dev = mainboard_enable,
-+};
---
-2.43.0
-
diff --git a/config/coreboot/default/patches/0030-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch b/config/coreboot/default/patches/0033-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
index e0af8372..9b24c26e 100644
--- a/config/coreboot/default/patches/0030-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
+++ b/config/coreboot/default/patches/0033-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
@@ -1,7 +1,7 @@
-From 4e0b62e6f0977cf922b1947955538ddca63bb954 Mon Sep 17 00:00:00 2001
+From 3697d2e2df764bd2f1b05a6856e035b606f6a360 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Sat, 23 Dec 2023 19:02:10 +0200
-Subject: [PATCH 30/30] mb/hp: Add Compaq Elite 8300 CMT port
+Subject: [PATCH 33/65] mb/hp: Add Compaq Elite 8300 CMT port
Based on autoport and Z220 SuperIO code.
@@ -32,7 +32,7 @@ Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
---
.../hp/compaq_elite_8300_cmt/Kconfig | 39 ++++
.../hp/compaq_elite_8300_cmt/Kconfig.name | 2 +
- .../hp/compaq_elite_8300_cmt/Makefile.inc | 7 +
+ .../hp/compaq_elite_8300_cmt/Makefile.mk | 7 +
.../hp/compaq_elite_8300_cmt/acpi/ec.asl | 1 +
.../compaq_elite_8300_cmt/acpi/platform.asl | 10 +
.../hp/compaq_elite_8300_cmt/acpi/superio.asl | 29 +++
@@ -41,17 +41,17 @@ Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
.../hp/compaq_elite_8300_cmt/cmos.default | 7 +
.../hp/compaq_elite_8300_cmt/cmos.layout | 74 +++++++
.../hp/compaq_elite_8300_cmt/data.vbt | Bin 0 -> 3902 bytes
- .../hp/compaq_elite_8300_cmt/devicetree.cb | 161 +++++++++++++++
+ .../hp/compaq_elite_8300_cmt/devicetree.cb | 177 ++++++++++++++++
.../hp/compaq_elite_8300_cmt/dsdt.asl | 26 +++
- .../hp/compaq_elite_8300_cmt/early_init.c | 31 +++
+ .../hp/compaq_elite_8300_cmt/early_init.c | 14 ++
.../compaq_elite_8300_cmt/gma-mainboard.ads | 17 ++
src/mainboard/hp/compaq_elite_8300_cmt/gpio.c | 191 ++++++++++++++++++
.../hp/compaq_elite_8300_cmt/hda_verb.c | 33 +++
.../hp/compaq_elite_8300_cmt/mainboard.c | 16 ++
- 18 files changed, 661 insertions(+)
+ 18 files changed, 660 insertions(+)
create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name
- create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Makefile.inc
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk
create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl
create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl
create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl
@@ -121,11 +121,11 @@ index 0000000000..bd399b1e76
@@ -0,0 +1,2 @@
+config BOARD_HP_COMPAQ_ELITE_8300_CMT
+ bool "Compaq Elite 8300 CMT"
-diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.inc b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.inc
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk
new file mode 100644
index 0000000000..fb492d3583
--- /dev/null
-+++ b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.inc
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk
@@ -0,0 +1,7 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
@@ -353,10 +353,10 @@ HcmV?d00001
diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
new file mode 100644
-index 0000000000..f4efabd792
+index 0000000000..3d21739b72
--- /dev/null
+++ b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
-@@ -0,0 +1,161 @@
+@@ -0,0 +1,177 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+chip northbridge/intel/sandybridge
@@ -386,6 +386,22 @@ index 0000000000..f4efabd792
+ register "superspeed_capable_ports" = "0x0000000f"
+ register "xhci_overcurrent_mapping" = "0x00000c03"
+ register "xhci_switchable_ports" = "0x0000000f"
++ register "usb_port_config" = "{
++ { 1, 0, 0 },
++ { 1, 0, 0 },
++ { 1, 0, 1 },
++ { 1, 0, 1 },
++ { 1, 0, 2 },
++ { 1, 0, 2 },
++ { 1, 0, 3 },
++ { 1, 0, 3 },
++ { 1, 0, 4 },
++ { 1, 0, 4 },
++ { 1, 0, 6 },
++ { 1, 0, 5 },
++ { 1, 0, 5 },
++ { 1, 0, 6 }
++ }"
+
+ device ref xhci on end # USB 3.0 Controller
+ device ref mei1 off end # Management Engine Interface 1
@@ -405,7 +421,7 @@ index 0000000000..f4efabd792
+ device ref pcie_rp3 on end
+ device ref pcie_rp4 on end
+ device ref pcie_rp5 on end
-+ device ref pcie_rp5 on end
++ device ref pcie_rp6 on end
+ device ref pcie_rp7 on end
+ device ref pcie_rp8 on end
+
@@ -552,10 +568,10 @@ index 0000000000..e8e2b3a3e5
+}
diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c b/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
new file mode 100644
-index 0000000000..99b7891c70
+index 0000000000..8d10c6317c
--- /dev/null
+++ b/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
-@@ -0,0 +1,31 @@
+@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <bootblock_common.h>
@@ -565,23 +581,6 @@ index 0000000000..99b7891c70
+
+#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2)
+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+ { 1, 0, 0 },
-+ { 1, 0, 0 },
-+ { 1, 0, 1 },
-+ { 1, 0, 1 },
-+ { 1, 0, 2 },
-+ { 1, 0, 2 },
-+ { 1, 0, 3 },
-+ { 1, 0, 3 },
-+ { 1, 0, 4 },
-+ { 1, 0, 4 },
-+ { 1, 0, 6 },
-+ { 1, 0, 5 },
-+ { 1, 0, 5 },
-+ { 1, 0, 6 },
-+};
-+
+void bootblock_mainboard_early_init(void)
+{
+ if (CONFIG(CONSOLE_SERIAL))
@@ -869,5 +868,5 @@ index 0000000000..8dbd95ef96
+ .enable_dev = mainboard_enable,
+};
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0034-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch b/config/coreboot/default/patches/0034-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
deleted file mode 100644
index 9a1bea26..00000000
--- a/config/coreboot/default/patches/0034-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch
+++ /dev/null
@@ -1,780 +0,0 @@
-From 86911e57c556389eed386bc23d5e87dd520afec9 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Wed, 31 Jan 2024 22:57:07 -0700
-Subject: [PATCH] mb/dell: Add Latitude E5530 (Ivy Bridge)
-
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/e5530/Kconfig | 37 ++++
- src/mainboard/dell/e5530/Kconfig.name | 2 +
- src/mainboard/dell/e5530/Makefile.inc | 6 +
- src/mainboard/dell/e5530/acpi/ec.asl | 9 +
- src/mainboard/dell/e5530/acpi/platform.asl | 12 ++
- src/mainboard/dell/e5530/acpi/superio.asl | 3 +
- src/mainboard/dell/e5530/acpi_tables.c | 16 ++
- src/mainboard/dell/e5530/board_info.txt | 6 +
- src/mainboard/dell/e5530/cmos.default | 9 +
- src/mainboard/dell/e5530/cmos.layout | 88 ++++++++++
- src/mainboard/dell/e5530/data.vbt | Bin 0 -> 6144 bytes
- src/mainboard/dell/e5530/devicetree.cb | 70 ++++++++
- src/mainboard/dell/e5530/dsdt.asl | 30 ++++
- src/mainboard/dell/e5530/early_init.c | 32 ++++
- src/mainboard/dell/e5530/gma-mainboard.ads | 20 +++
- src/mainboard/dell/e5530/gpio.c | 194 +++++++++++++++++++++
- src/mainboard/dell/e5530/hda_verb.c | 33 ++++
- src/mainboard/dell/e5530/mainboard.c | 21 +++
- 18 files changed, 588 insertions(+)
- create mode 100644 src/mainboard/dell/e5530/Kconfig
- create mode 100644 src/mainboard/dell/e5530/Kconfig.name
- create mode 100644 src/mainboard/dell/e5530/Makefile.inc
- create mode 100644 src/mainboard/dell/e5530/acpi/ec.asl
- create mode 100644 src/mainboard/dell/e5530/acpi/platform.asl
- create mode 100644 src/mainboard/dell/e5530/acpi/superio.asl
- create mode 100644 src/mainboard/dell/e5530/acpi_tables.c
- create mode 100644 src/mainboard/dell/e5530/board_info.txt
- create mode 100644 src/mainboard/dell/e5530/cmos.default
- create mode 100644 src/mainboard/dell/e5530/cmos.layout
- create mode 100644 src/mainboard/dell/e5530/data.vbt
- create mode 100644 src/mainboard/dell/e5530/devicetree.cb
- create mode 100644 src/mainboard/dell/e5530/dsdt.asl
- create mode 100644 src/mainboard/dell/e5530/early_init.c
- create mode 100644 src/mainboard/dell/e5530/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/e5530/gpio.c
- create mode 100644 src/mainboard/dell/e5530/hda_verb.c
- create mode 100644 src/mainboard/dell/e5530/mainboard.c
-
-diff --git a/src/mainboard/dell/e5530/Kconfig b/src/mainboard/dell/e5530/Kconfig
-new file mode 100644
-index 0000000000..3faae4ee50
---- /dev/null
-+++ b/src/mainboard/dell/e5530/Kconfig
-@@ -0,0 +1,37 @@
-+if BOARD_DELL_LATITUDE_E5530
-+
-+config BOARD_SPECIFIC_OPTIONS
-+ def_bool y
-+ select BOARD_ROMSIZE_KB_12288
-+ select EC_ACPI
-+ select EC_DELL_MEC5035
-+ select GFX_GMA_PANEL_1_ON_LVDS
-+ select HAVE_ACPI_RESUME
-+ select HAVE_ACPI_TABLES
-+ select HAVE_CMOS_DEFAULT
-+ select HAVE_OPTION_TABLE
-+ select INTEL_GMA_HAVE_VBT
-+ select INTEL_INT15
-+ select MAINBOARD_HAS_LIBGFXINIT
-+ select NORTHBRIDGE_INTEL_SANDYBRIDGE
-+ select SERIRQ_CONTINUOUS_MODE
-+ select SOUTHBRIDGE_INTEL_C216
-+ select SYSTEM_TYPE_LAPTOP
-+ select USE_NATIVE_RAMINIT
-+
-+config DRAM_RESET_GATE_GPIO
-+ default 60
-+
-+config MAINBOARD_DIR
-+ default "dell/e5530"
-+
-+config MAINBOARD_PART_NUMBER
-+ default "Latitude E5530"
-+
-+config USBDEBUG_HCD_INDEX
-+ default 2
-+
-+config VGA_BIOS_ID
-+ default "8086,0166"
-+
-+endif # BOARD_DELL_LATITUDE_E5530
-diff --git a/src/mainboard/dell/e5530/Kconfig.name b/src/mainboard/dell/e5530/Kconfig.name
-new file mode 100644
-index 0000000000..775963204a
---- /dev/null
-+++ b/src/mainboard/dell/e5530/Kconfig.name
-@@ -0,0 +1,2 @@
-+config BOARD_DELL_LATITUDE_E5530
-+ bool "Latitude E5530"
-diff --git a/src/mainboard/dell/e5530/Makefile.inc b/src/mainboard/dell/e5530/Makefile.inc
-new file mode 100644
-index 0000000000..ba64e93eb8
---- /dev/null
-+++ b/src/mainboard/dell/e5530/Makefile.inc
-@@ -0,0 +1,6 @@
-+# SPDX-License-Identifier: GPL-2.0-only
-+bootblock-y += early_init.c
-+bootblock-y += gpio.c
-+romstage-y += early_init.c
-+romstage-y += gpio.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-diff --git a/src/mainboard/dell/e5530/acpi/ec.asl b/src/mainboard/dell/e5530/acpi/ec.asl
-new file mode 100644
-index 0000000000..0d429410a9
---- /dev/null
-+++ b/src/mainboard/dell/e5530/acpi/ec.asl
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Device(EC)
-+{
-+ Name (_HID, EISAID("PNP0C09"))
-+ Name (_UID, 0)
-+ Name (_GPE, 16)
-+/* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e5530/acpi/platform.asl b/src/mainboard/dell/e5530/acpi/platform.asl
-new file mode 100644
-index 0000000000..2d24bbd9b9
---- /dev/null
-+++ b/src/mainboard/dell/e5530/acpi/platform.asl
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Method(_WAK, 1)
-+{
-+ /* FIXME: EC support */
-+ Return(Package() {0, 0})
-+}
-+
-+Method(_PTS,1)
-+{
-+ /* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e5530/acpi/superio.asl b/src/mainboard/dell/e5530/acpi/superio.asl
-new file mode 100644
-index 0000000000..55b1db5b11
---- /dev/null
-+++ b/src/mainboard/dell/e5530/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <drivers/pc80/pc/ps2_controller.asl>
-diff --git a/src/mainboard/dell/e5530/acpi_tables.c b/src/mainboard/dell/e5530/acpi_tables.c
-new file mode 100644
-index 0000000000..e2759659bf
---- /dev/null
-+++ b/src/mainboard/dell/e5530/acpi_tables.c
-@@ -0,0 +1,16 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi_gnvs.h>
-+#include <soc/nvs.h>
-+
-+/* FIXME: check this function. */
-+void mainboard_fill_gnvs(struct global_nvs *gnvs)
-+{
-+ /* The lid is open by default. */
-+ gnvs->lids = 1;
-+
-+ /* Temperature at which OS will shutdown */
-+ gnvs->tcrt = 100;
-+ /* Temperature at which OS will throttle CPU */
-+ gnvs->tpsv = 90;
-+}
-diff --git a/src/mainboard/dell/e5530/board_info.txt b/src/mainboard/dell/e5530/board_info.txt
-new file mode 100644
-index 0000000000..4601a4aaba
---- /dev/null
-+++ b/src/mainboard/dell/e5530/board_info.txt
-@@ -0,0 +1,6 @@
-+Category: laptop
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2012
-diff --git a/src/mainboard/dell/e5530/cmos.default b/src/mainboard/dell/e5530/cmos.default
-new file mode 100644
-index 0000000000..279415dfd1
---- /dev/null
-+++ b/src/mainboard/dell/e5530/cmos.default
-@@ -0,0 +1,9 @@
-+boot_option=Fallback
-+debug_level=Debug
-+power_on_after_fail=Disable
-+nmi=Enable
-+bluetooth=Enable
-+wwan=Enable
-+wlan=Enable
-+sata_mode=AHCI
-+me_state=Disabled
-diff --git a/src/mainboard/dell/e5530/cmos.layout b/src/mainboard/dell/e5530/cmos.layout
-new file mode 100644
-index 0000000000..1aa7e77bce
---- /dev/null
-+++ b/src/mainboard/dell/e5530/cmos.layout
-@@ -0,0 +1,88 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+# -----------------------------------------------------------------
-+0 120 r 0 reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384 1 e 4 boot_option
-+388 4 h 0 reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395 4 e 6 debug_level
-+
-+#400 8 r 0 reserved for century byte
-+
-+# coreboot config options: southbridge
-+408 1 e 1 nmi
-+409 2 e 7 power_on_after_fail
-+411 1 e 9 sata_mode
-+
-+# coreboot config options: EC
-+412 1 e 1 bluetooth
-+413 1 e 1 wwan
-+414 1 e 1 wlan
-+
-+# coreboot config options: ME
-+424 1 e 14 me_state
-+425 2 h 0 me_state_prev
-+
-+# coreboot config options: northbridge
-+432 3 e 11 gfx_uma_size
-+435 2 e 12 hybrid_graphics_mode
-+440 8 h 0 volume
-+
-+# VBOOT
-+448 128 r 0 vbnv
-+
-+# SandyBridge MRC Scrambler Seed values
-+896 32 r 0 mrc_scrambler_seed
-+928 32 r 0 mrc_scrambler_seed_s3
-+960 16 r 0 mrc_scrambler_seed_chk
-+
-+# coreboot config options: check sums
-+984 16 h 0 check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID value text
-+1 0 Disable
-+1 1 Enable
-+2 0 Enable
-+2 1 Disable
-+4 0 Fallback
-+4 1 Normal
-+6 0 Emergency
-+6 1 Alert
-+6 2 Critical
-+6 3 Error
-+6 4 Warning
-+6 5 Notice
-+6 6 Info
-+6 7 Debug
-+6 8 Spew
-+7 0 Disable
-+7 1 Enable
-+7 2 Keep
-+9 0 AHCI
-+9 1 Compatible
-+11 0 32M
-+11 1 64M
-+11 2 96M
-+11 3 128M
-+11 4 160M
-+11 5 192M
-+11 6 224M
-+14 0 Normal
-+14 1 Disabled
-+
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 447 984
-diff --git a/src/mainboard/dell/e5530/data.vbt b/src/mainboard/dell/e5530/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..3c54b70be7856a6420d001112d7f17f8bab46ed3
-GIT binary patch
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-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/e5530/devicetree.cb b/src/mainboard/dell/e5530/devicetree.cb
-new file mode 100644
-index 0000000000..2af748cf27
---- /dev/null
-+++ b/src/mainboard/dell/e5530/devicetree.cb
-@@ -0,0 +1,70 @@
-+chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
-+ register "gfx" = "GMA_STATIC_DISPLAYS(1)"
-+ register "gpu_cpu_backlight" = "0x00000000"
-+ register "gpu_dp_b_hotplug" = "4"
-+ register "gpu_dp_c_hotplug" = "4"
-+ register "gpu_dp_d_hotplug" = "4"
-+ register "gpu_panel_port_select" = "0"
-+ register "gpu_panel_power_backlight_off_delay" = "2300"
-+ register "gpu_panel_power_backlight_on_delay" = "2300"
-+ register "gpu_panel_power_cycle_delay" = "6"
-+ register "gpu_panel_power_down_delay" = "400"
-+ register "gpu_panel_power_up_delay" = "400"
-+ register "gpu_pch_backlight" = "0x03d003d0"
-+
-+ register "spd_addresses" = "{0x50, 0, 0x52, 0}"
-+
-+ device domain 0x0 on
-+ subsystemid 0x1028 0x053d inherit
-+
-+ device ref host_bridge on end
-+ device ref peg10 off end
-+ device ref igd on end
-+
-+ chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-+ register "docking_supported" = "1"
-+ register "gen1_dec" = "0x007c0681"
-+ register "gen2_dec" = "0x005c0921"
-+ register "gen3_dec" = "0x003c07e1"
-+ register "gen4_dec" = "0x00000911" # Ports 0x910/0x911 for EC
-+ register "gpi0_routing" = "2"
-+ register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
-+ register "pcie_port_coalesce" = "1"
-+ register "sata_interface_speed_support" = "0x3"
-+ register "sata_port_map" = "0x33"
-+ register "spi_lvscc" = "0x2005"
-+ register "spi_uvscc" = "0x2005"
-+ register "superspeed_capable_ports" = "0x0000000f"
-+ register "xhci_overcurrent_mapping" = "0x00000c03"
-+ register "xhci_switchable_ports" = "0x0000000f"
-+
-+ device ref xhci on end
-+ device ref mei1 off end
-+ device ref mei2 off end
-+ device ref me_ide_r off end
-+ device ref me_kt off end
-+ device ref gbe off end
-+ device ref ehci2 on end
-+ device ref hda on end
-+ device ref pcie_rp1 on end # WWAN Slot
-+ device ref pcie_rp2 on end # SLAN Slot
-+ device ref pcie_rp3 on end # ExpressCard
-+ device ref pcie_rp4 off end
-+ device ref pcie_rp5 on end # Extra Half Mini PCIe slot
-+ device ref pcie_rp6 on end # SD/MMC Card Reader
-+ device ref pcie_rp7 on end # BCM5761 Ethernet
-+ device ref pcie_rp8 off end
-+ device ref ehci1 on end
-+ device ref pci_bridge off end
-+ device ref lpc on
-+ chip ec/dell/mec5035
-+ device pnp ff.0 on end
-+ end
-+ end
-+ device ref sata1 on end
-+ device ref smbus on end
-+ device ref sata2 off end
-+ device ref thermal off end
-+ end
-+ end
-+end
-diff --git a/src/mainboard/dell/e5530/dsdt.asl b/src/mainboard/dell/e5530/dsdt.asl
-new file mode 100644
-index 0000000000..7d13c55b08
---- /dev/null
-+++ b/src/mainboard/dell/e5530/dsdt.asl
-@@ -0,0 +1,30 @@
-+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
-+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <acpi/acpi.h>
-+
-+DefinitionBlock(
-+ "dsdt.aml",
-+ "DSDT",
-+ ACPI_DSDT_REV_2,
-+ OEM_ID,
-+ ACPI_TABLE_CREATOR,
-+ 0x20141018 /* OEM revision */
-+)
-+{
-+ #include <acpi/dsdt_top.asl>
-+ #include "acpi/platform.asl"
-+ #include <cpu/intel/common/acpi/cpu.asl>
-+ #include <southbridge/intel/common/acpi/platform.asl>
-+ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-+ #include <southbridge/intel/common/acpi/sleepstates.asl>
-+
-+ Device (\_SB.PCI0)
-+ {
-+ #include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-+ #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
-+ #include <southbridge/intel/bd82x6x/acpi/pch.asl>
-+ }
-+}
-diff --git a/src/mainboard/dell/e5530/early_init.c b/src/mainboard/dell/e5530/early_init.c
-new file mode 100644
-index 0000000000..00fd5f6795
---- /dev/null
-+++ b/src/mainboard/dell/e5530/early_init.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+ { 1, 1, 0 },
-+ { 1, 1, 0 },
-+ { 1, 1, 1 },
-+ { 1, 1, 1 },
-+ { 1, 1, 2 },
-+ { 1, 1, 2 },
-+ { 1, 1, 3 },
-+ { 1, 0, 3 },
-+ { 1, 2, 4 },
-+ { 1, 1, 4 },
-+ { 1, 1, 5 },
-+ { 1, 1, 5 },
-+ { 1, 0, 6 },
-+ { 1, 1, 6 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+ | COMB_LPC_EN | COMA_LPC_EN);
-+ mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/e5530/gma-mainboard.ads b/src/mainboard/dell/e5530/gma-mainboard.ads
-new file mode 100644
-index 0000000000..1310830c8e
---- /dev/null
-+++ b/src/mainboard/dell/e5530/gma-mainboard.ads
-@@ -0,0 +1,20 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+ ports : constant Port_List :=
-+ (
-+ HDMI1, -- mainboard HDMI
-+ DP2, -- dock DP
-+ DP3, -- dock DP
-+ Analog, --mainboard VGA
-+ LVDS,
-+ others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/e5530/gpio.c b/src/mainboard/dell/e5530/gpio.c
-new file mode 100644
-index 0000000000..0599f13921
---- /dev/null
-+++ b/src/mainboard/dell/e5530/gpio.c
-@@ -0,0 +1,194 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+ .gpio0 = GPIO_MODE_GPIO,
-+ .gpio1 = GPIO_MODE_GPIO,
-+ .gpio2 = GPIO_MODE_GPIO,
-+ .gpio3 = GPIO_MODE_GPIO,
-+ .gpio4 = GPIO_MODE_GPIO,
-+ .gpio5 = GPIO_MODE_NATIVE,
-+ .gpio6 = GPIO_MODE_GPIO,
-+ .gpio7 = GPIO_MODE_GPIO,
-+ .gpio8 = GPIO_MODE_GPIO,
-+ .gpio9 = GPIO_MODE_NATIVE,
-+ .gpio10 = GPIO_MODE_NATIVE,
-+ .gpio11 = GPIO_MODE_NATIVE,
-+ .gpio12 = GPIO_MODE_GPIO,
-+ .gpio13 = GPIO_MODE_GPIO,
-+ .gpio14 = GPIO_MODE_GPIO,
-+ .gpio15 = GPIO_MODE_GPIO,
-+ .gpio16 = GPIO_MODE_GPIO,
-+ .gpio17 = GPIO_MODE_GPIO,
-+ .gpio18 = GPIO_MODE_NATIVE,
-+ .gpio19 = GPIO_MODE_GPIO,
-+ .gpio20 = GPIO_MODE_NATIVE,
-+ .gpio21 = GPIO_MODE_GPIO,
-+ .gpio22 = GPIO_MODE_GPIO,
-+ .gpio23 = GPIO_MODE_NATIVE,
-+ .gpio24 = GPIO_MODE_GPIO,
-+ .gpio25 = GPIO_MODE_NATIVE,
-+ .gpio26 = GPIO_MODE_NATIVE,
-+ .gpio27 = GPIO_MODE_GPIO,
-+ .gpio28 = GPIO_MODE_GPIO,
-+ .gpio29 = GPIO_MODE_GPIO,
-+ .gpio30 = GPIO_MODE_NATIVE,
-+ .gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+ .gpio0 = GPIO_DIR_INPUT,
-+ .gpio1 = GPIO_DIR_INPUT,
-+ .gpio2 = GPIO_DIR_INPUT,
-+ .gpio3 = GPIO_DIR_INPUT,
-+ .gpio4 = GPIO_DIR_INPUT,
-+ .gpio6 = GPIO_DIR_INPUT,
-+ .gpio7 = GPIO_DIR_INPUT,
-+ .gpio8 = GPIO_DIR_INPUT,
-+ .gpio12 = GPIO_DIR_OUTPUT,
-+ .gpio13 = GPIO_DIR_INPUT,
-+ .gpio14 = GPIO_DIR_INPUT,
-+ .gpio15 = GPIO_DIR_INPUT,
-+ .gpio16 = GPIO_DIR_INPUT,
-+ .gpio17 = GPIO_DIR_INPUT,
-+ .gpio19 = GPIO_DIR_INPUT,
-+ .gpio21 = GPIO_DIR_INPUT,
-+ .gpio22 = GPIO_DIR_INPUT,
-+ .gpio24 = GPIO_DIR_INPUT,
-+ .gpio27 = GPIO_DIR_INPUT,
-+ .gpio28 = GPIO_DIR_OUTPUT,
-+ .gpio29 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+ .gpio12 = GPIO_LEVEL_HIGH,
-+ .gpio28 = GPIO_LEVEL_LOW,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+ .gpio30 = GPIO_RESET_RSMRST,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+ .gpio0 = GPIO_INVERT,
-+ .gpio8 = GPIO_INVERT,
-+ .gpio13 = GPIO_INVERT,
-+ .gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+ .gpio32 = GPIO_MODE_NATIVE,
-+ .gpio33 = GPIO_MODE_GPIO,
-+ .gpio34 = GPIO_MODE_GPIO,
-+ .gpio35 = GPIO_MODE_GPIO,
-+ .gpio36 = GPIO_MODE_GPIO,
-+ .gpio37 = GPIO_MODE_GPIO,
-+ .gpio38 = GPIO_MODE_GPIO,
-+ .gpio39 = GPIO_MODE_GPIO,
-+ .gpio40 = GPIO_MODE_NATIVE,
-+ .gpio41 = GPIO_MODE_NATIVE,
-+ .gpio42 = GPIO_MODE_NATIVE,
-+ .gpio43 = GPIO_MODE_NATIVE,
-+ .gpio44 = GPIO_MODE_NATIVE,
-+ .gpio45 = GPIO_MODE_GPIO,
-+ .gpio46 = GPIO_MODE_NATIVE,
-+ .gpio47 = GPIO_MODE_NATIVE,
-+ .gpio48 = GPIO_MODE_GPIO,
-+ .gpio49 = GPIO_MODE_GPIO,
-+ .gpio50 = GPIO_MODE_NATIVE,
-+ .gpio51 = GPIO_MODE_GPIO,
-+ .gpio52 = GPIO_MODE_GPIO,
-+ .gpio53 = GPIO_MODE_GPIO,
-+ .gpio54 = GPIO_MODE_GPIO,
-+ .gpio55 = GPIO_MODE_NATIVE,
-+ .gpio56 = GPIO_MODE_NATIVE,
-+ .gpio57 = GPIO_MODE_GPIO,
-+ .gpio58 = GPIO_MODE_NATIVE,
-+ .gpio59 = GPIO_MODE_NATIVE,
-+ .gpio60 = GPIO_MODE_GPIO,
-+ .gpio61 = GPIO_MODE_NATIVE,
-+ .gpio62 = GPIO_MODE_NATIVE,
-+ .gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+ .gpio33 = GPIO_DIR_INPUT,
-+ .gpio34 = GPIO_DIR_INPUT,
-+ .gpio35 = GPIO_DIR_INPUT,
-+ .gpio36 = GPIO_DIR_INPUT,
-+ .gpio37 = GPIO_DIR_INPUT,
-+ .gpio38 = GPIO_DIR_INPUT,
-+ .gpio39 = GPIO_DIR_INPUT,
-+ .gpio45 = GPIO_DIR_INPUT,
-+ .gpio48 = GPIO_DIR_INPUT,
-+ .gpio49 = GPIO_DIR_INPUT,
-+ .gpio51 = GPIO_DIR_INPUT,
-+ .gpio52 = GPIO_DIR_INPUT,
-+ .gpio53 = GPIO_DIR_INPUT,
-+ .gpio54 = GPIO_DIR_INPUT,
-+ .gpio57 = GPIO_DIR_INPUT,
-+ .gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+ .gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+ .gpio64 = GPIO_MODE_NATIVE,
-+ .gpio65 = GPIO_MODE_NATIVE,
-+ .gpio66 = GPIO_MODE_NATIVE,
-+ .gpio67 = GPIO_MODE_NATIVE,
-+ .gpio68 = GPIO_MODE_GPIO,
-+ .gpio69 = GPIO_MODE_GPIO,
-+ .gpio70 = GPIO_MODE_GPIO,
-+ .gpio71 = GPIO_MODE_GPIO,
-+ .gpio72 = GPIO_MODE_NATIVE,
-+ .gpio73 = GPIO_MODE_NATIVE,
-+ .gpio74 = GPIO_MODE_GPIO,
-+ .gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+ .gpio68 = GPIO_DIR_INPUT,
-+ .gpio69 = GPIO_DIR_INPUT,
-+ .gpio70 = GPIO_DIR_INPUT,
-+ .gpio71 = GPIO_DIR_INPUT,
-+ .gpio74 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+ .set1 = {
-+ .mode = &pch_gpio_set1_mode,
-+ .direction = &pch_gpio_set1_direction,
-+ .level = &pch_gpio_set1_level,
-+ .blink = &pch_gpio_set1_blink,
-+ .invert = &pch_gpio_set1_invert,
-+ .reset = &pch_gpio_set1_reset,
-+ },
-+ .set2 = {
-+ .mode = &pch_gpio_set2_mode,
-+ .direction = &pch_gpio_set2_direction,
-+ .level = &pch_gpio_set2_level,
-+ .reset = &pch_gpio_set2_reset,
-+ },
-+ .set3 = {
-+ .mode = &pch_gpio_set3_mode,
-+ .direction = &pch_gpio_set3_direction,
-+ .level = &pch_gpio_set3_level,
-+ .reset = &pch_gpio_set3_reset,
-+ },
-+};
-diff --git a/src/mainboard/dell/e5530/hda_verb.c b/src/mainboard/dell/e5530/hda_verb.c
-new file mode 100644
-index 0000000000..4c7c36ee05
---- /dev/null
-+++ b/src/mainboard/dell/e5530/hda_verb.c
-@@ -0,0 +1,33 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+ 0x111d76df, /* Codec Vendor / Device ID: IDT */
-+ 0x1028053d, /* Subsystem ID */
-+ 11, /* Number of 4 dword sets */
-+ AZALIA_SUBVENDOR(0, 0x1028053d),
-+ AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
-+ AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
-+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+ AZALIA_PIN_CFG(0, 0x11, 0x400000f0),
-+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+ AZALIA_PIN_CFG(0, 0x20, 0xd5a301a0),
-+
-+ 0x80862806, /* Codec Vendor / Device ID: Intel */
-+ 0x80860101, /* Subsystem ID */
-+ 4, /* Number of 4 dword sets */
-+ AZALIA_SUBVENDOR(3, 0x80860101),
-+ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/e5530/mainboard.c b/src/mainboard/dell/e5530/mainboard.c
-new file mode 100644
-index 0000000000..31e49802fc
---- /dev/null
-+++ b/src/mainboard/dell/e5530/mainboard.c
-@@ -0,0 +1,21 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+#include <drivers/intel/gma/int15.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+#include <ec/acpi/ec.h>
-+#include <console/console.h>
-+#include <pc80/keyboard.h>
-+
-+static void mainboard_enable(struct device *dev)
-+{
-+
-+ /* FIXME: fix these values. */
-+ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-+ GMA_INT15_PANEL_FIT_DEFAULT,
-+ GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-+}
-+
-+struct chip_operations mainboard_ops = {
-+ .enable_dev = mainboard_enable,
-+};
---
-2.43.0
-
diff --git a/config/coreboot/default/patches/0034-mb-hp-Add-Elitebook-8560w-as-an-HP-Sandy-Ivy-Bridge-.patch b/config/coreboot/default/patches/0034-mb-hp-Add-Elitebook-8560w-as-an-HP-Sandy-Ivy-Bridge-.patch
deleted file mode 100644
index 458c3723..00000000
--- a/config/coreboot/default/patches/0034-mb-hp-Add-Elitebook-8560w-as-an-HP-Sandy-Ivy-Bridge-.patch
+++ /dev/null
@@ -1,1556 +0,0 @@
-From dac71d8ed89f1f1d295157aa62c678e35a320222 Mon Sep 17 00:00:00 2001
-From: Iru Cai <mytbk920423@gmail.com>
-Date: Tue, 5 Mar 2019 16:27:36 +0800
-Subject: [PATCH] mb/hp: Add Elitebook 8560w as an HP Sandy/Ivy Bridge laptop
- variant
-
-Change-Id: I15181792b1efa45a2a94d78e43c6257da1acf950
-Signed-off-by: Iru Cai <mytbk920423@gmail.com>
----
- Documentation/mainboard/hp/8560w.md | 82 +++++++
- Documentation/mainboard/hp/8560w_flash.webp | Bin 0 -> 51432 bytes
- Documentation/mainboard/index.md | 1 +
- src/mainboard/hp/snb_ivb_laptops/Kconfig | 10 +-
- src/mainboard/hp/snb_ivb_laptops/Kconfig.name | 3 +
- .../variants/8560w/board_info.txt | 7 +
- .../variants/8560w/early_init.c | 36 +++
- .../hp/snb_ivb_laptops/variants/8560w/gpio.c | 224 ++++++++++++++++++
- .../snb_ivb_laptops/variants/8560w/hda_verb.c | 25 ++
- .../variants/8560w/overridetree.cb | 51 ++++
- 10 files changed, 438 insertions(+), 1 deletion(-)
- create mode 100644 Documentation/mainboard/hp/8560w.md
- create mode 100644 Documentation/mainboard/hp/8560w_flash.webp
- create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt
- create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c
- create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
- create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c
- create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb
-
-diff --git a/Documentation/mainboard/hp/8560w.md b/Documentation/mainboard/hp/8560w.md
-new file mode 100644
-index 0000000000..cc35a0be1f
---- /dev/null
-+++ b/Documentation/mainboard/hp/8560w.md
-@@ -0,0 +1,82 @@
-+# HP EliteBook 8560w
-+
-+This page describes how to run coreboot on the [HP EliteBook 8560w].
-+
-+## Required proprietary blobs
-+
-+- Intel Firmware Descriptor, ME and GbE firmware
-+- EC: please read [HP Laptops with KBC1126 Embedded Controller](hp_kbc1126_laptops)
-+
-+## Flashing instructions
-+
-+HP EliteBook 8560w has an 8MiB SOIC-8 flash chip on the bottom of the
-+mainboard. You just need to remove the service cover, and use an SOIC-8
-+clip to read and flash the chip.
-+
-+![8560w_chip_location](8560w_flash.webp)
-+
-+```eval_rst
-++---------------------+------------+
-+| Type | Value |
-++=====================+============+
-+| Socketed flash | no |
-++---------------------+------------+
-+| Model | MX25L6406E |
-++---------------------+------------+
-+| Size | 8 MiB |
-++---------------------+------------+
-+| Package | SOIC-8 |
-++---------------------+------------+
-+| Write protection | no |
-++---------------------+------------+
-+| Dual BIOS feature | no |
-++---------------------+------------+
-+| In circuit flashing | yes |
-++---------------------+------------+
-+| Internal flashing | yes |
-++---------------------+------------+
-+```
-+
-+## Untested
-+
-+- mainboards with 4 memory slots
-+
-+## Working
-+
-+- i7-2720QM, 8G+8G
-+- Arch Linux boot from SeaBIOS payload
-+- EHCI debug: the port is beside the eSATA port
-+- SATA
-+- eSATA
-+- USB2 and USB3
-+- keyboard
-+- Gigabit Ethernet
-+- WLAN
-+- WWAN
-+- VGA and DisplayPort
-+- audio
-+- EC ACPI
-+- Using `me_cleaner`
-+- dock: PS/2 keyboard, USB, DisplayPort
-+- TPM
-+- S3 suspend/resume
-+
-+## Technology
-+
-+```eval_rst
-++------------------+--------------------------------------------------+
-+| Northbridge | :doc:`../../northbridge/intel/sandybridge/index` |
-++------------------+--------------------------------------------------+
-+| Southbridge | bd82x6x |
-++------------------+--------------------------------------------------+
-+| CPU | model_206ax |
-++------------------+--------------------------------------------------+
-+| Super I/O | SMSC LPC47n217 |
-++------------------+--------------------------------------------------+
-+| EC | SMSC KBC1126 |
-++------------------+--------------------------------------------------+
-+| Coprocessor | Intel Management Engine |
-++------------------+--------------------------------------------------+
-+```
-+
-+[HP EliteBook 8560w]: https://support.hp.com/us-en/product/hp-elitebook-8560w-mobile-workstation/5071171
-diff --git a/Documentation/mainboard/hp/8560w_flash.webp b/Documentation/mainboard/hp/8560w_flash.webp
-new file mode 100644
-index 0000000000000000000000000000000000000000..b8295bc6e920a4c59c4282e419200569672e8267
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-HcmV?d00001
-
-diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md
-index 519d88873c..a6be27ae09 100644
---- a/Documentation/mainboard/index.md
-+++ b/Documentation/mainboard/index.md
-@@ -84,6 +84,7 @@ The boards in this section are not real mainboards, but emulators.
- - [HP Sure Start](hp/hp_sure_start.md)
- - [EliteBook 2170p](hp/2170p.md)
- - [EliteBook 2560p](hp/2560p.md)
-+- [EliteBook 8560w](hp/8560w.md)
- - [EliteBook 8760w](hp/8760w.md)
- - [EliteBook Folio 9480m](hp/folio_9480m.md)
- - [EliteBook 820 G2](hp/elitebook_820_g2.md)
-diff --git a/src/mainboard/hp/snb_ivb_laptops/Kconfig b/src/mainboard/hp/snb_ivb_laptops/Kconfig
-index f0bd55f64f..f180bca87f 100644
---- a/src/mainboard/hp/snb_ivb_laptops/Kconfig
-+++ b/src/mainboard/hp/snb_ivb_laptops/Kconfig
-@@ -69,6 +69,12 @@ config BOARD_HP_8470P
- select SOUTHBRIDGE_INTEL_C216
- select SUPERIO_SMSC_LPC47N217
-
-+config BOARD_HP_8560W
-+ select BOARD_HP_SNB_IVB_LAPTOPS_COMMON
-+ select BOARD_ROMSIZE_KB_8192
-+ select SOUTHBRIDGE_INTEL_BD82X6X
-+ select SUPERIO_SMSC_LPC47N217
-+
- config BOARD_HP_8770W
- select BOARD_HP_SNB_IVB_LAPTOPS_COMMON
- select BOARD_ROMSIZE_KB_16384
-@@ -118,6 +124,7 @@ config VARIANT_DIR
- default "2760p" if BOARD_HP_2760P
- default "8460p" if BOARD_HP_8460P
- default "8470p" if BOARD_HP_8470P
-+ default "8560w" if BOARD_HP_8560W
- default "8770w" if BOARD_HP_8770W
- default "folio_9470m" if BOARD_HP_FOLIO_9470M
- default "probook_6360b" if BOARD_HP_PROBOOK_6360B
-@@ -130,6 +137,7 @@ config MAINBOARD_PART_NUMBER
- default "EliteBook 2760p" if BOARD_HP_2760P
- default "EliteBook 8460p" if BOARD_HP_8460P
- default "EliteBook 8470p" if BOARD_HP_8470P
-+ default "EliteBook 8560w" if BOARD_HP_8560W
- default "EliteBook 8770w" if BOARD_HP_8770W
- default "EliteBook Folio 9470m" if BOARD_HP_FOLIO_9470M
- default "ProBook 6360b" if BOARD_HP_PROBOOK_6360B
-@@ -146,7 +154,7 @@ config VGA_BIOS_ID
- config USBDEBUG_HCD_INDEX
- int
- default 0 if BOARD_HP_2170P || BOARD_HP_FOLIO_9470M
-- default 1 if BOARD_HP_2560P || BOARD_HP_2760P || BOARD_HP_8460P
-+ default 1 if BOARD_HP_2560P || BOARD_HP_2760P || BOARD_HP_8460P || BOARD_HP_8560W
- default 2 if BOARD_HP_2570P || BOARD_HP_8470P || BOARD_HP_8770W
- default 1 if BOARD_HP_PROBOOK_6360B # FIXME: check this
- default 2 if BOARD_HP_REVOLVE_810_G1 # FIXME: check this
-diff --git a/src/mainboard/hp/snb_ivb_laptops/Kconfig.name b/src/mainboard/hp/snb_ivb_laptops/Kconfig.name
-index f72e0f622a..fdd1b93bd7 100644
---- a/src/mainboard/hp/snb_ivb_laptops/Kconfig.name
-+++ b/src/mainboard/hp/snb_ivb_laptops/Kconfig.name
-@@ -18,6 +18,9 @@ config BOARD_HP_8460P
- config BOARD_HP_8470P
- bool "EliteBook 8470p"
-
-+config BOARD_HP_8560W
-+ bool "EliteBook 8560w"
-+
- config BOARD_HP_8770W
- bool "EliteBook 8770w"
-
-diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt
-new file mode 100644
-index 0000000000..558e904a94
---- /dev/null
-+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt
-@@ -0,0 +1,7 @@
-+Category: laptop
-+Board URL: https://support.hp.com/us-en/product/hp-elitebook-8560w-mobile-workstation/5071171
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2011
-diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c
-new file mode 100644
-index 0000000000..20c4b68911
---- /dev/null
-+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c
-@@ -0,0 +1,36 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <bootblock_common.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+#include <superio/smsc/lpc47n217/lpc47n217.h>
-+#include <ec/hp/kbc1126/ec.h>
-+
-+#define SERIAL_DEV PNP_DEV(0x4e, LPC47N217_SP1)
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+ { 1, 1, 0 }, /* USB0 */
-+ { 1, 1, 0 }, /* USB1 */
-+ { 1, 1, 1 }, /* eSATA */
-+ { 1, 1, 1 }, /* camera */
-+ { 0, 0, 2 },
-+ { 1, 0, 2 }, /* bluetooth */
-+ { 0, 0, 3 },
-+ { 1, 0, 3 },
-+ { 0, 1, 4 },
-+ { 1, 1, 4 }, /* WWAN */
-+ { 1, 0, 5 },
-+ { 1, 0, 5 }, /* dock */
-+ { 1, 0, 6 },
-+ { 1, 0, 6 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+ lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-+ kbc1126_enter_conf();
-+ kbc1126_mailbox_init();
-+ kbc1126_kbc_init();
-+ kbc1126_ec_init();
-+ kbc1126_pm1_init();
-+ kbc1126_exit_conf();
-+}
-diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
-new file mode 100644
-index 0000000000..560d668d6f
---- /dev/null
-+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
-@@ -0,0 +1,224 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+ .gpio0 = GPIO_MODE_GPIO,
-+ .gpio1 = GPIO_MODE_GPIO,
-+ .gpio2 = GPIO_MODE_GPIO,
-+ .gpio3 = GPIO_MODE_GPIO,
-+ .gpio4 = GPIO_MODE_GPIO,
-+ .gpio5 = GPIO_MODE_NATIVE,
-+ .gpio6 = GPIO_MODE_GPIO,
-+ .gpio7 = GPIO_MODE_GPIO,
-+ .gpio8 = GPIO_MODE_GPIO,
-+ .gpio9 = GPIO_MODE_NATIVE,
-+ .gpio10 = GPIO_MODE_GPIO,
-+ .gpio11 = GPIO_MODE_GPIO,
-+ .gpio12 = GPIO_MODE_NATIVE,
-+ .gpio13 = GPIO_MODE_GPIO,
-+ .gpio14 = GPIO_MODE_GPIO,
-+ .gpio15 = GPIO_MODE_GPIO,
-+ .gpio16 = GPIO_MODE_GPIO,
-+ .gpio17 = GPIO_MODE_GPIO,
-+ .gpio18 = GPIO_MODE_NATIVE,
-+ .gpio19 = GPIO_MODE_GPIO,
-+ .gpio20 = GPIO_MODE_NATIVE,
-+ .gpio21 = GPIO_MODE_GPIO,
-+ .gpio22 = GPIO_MODE_GPIO,
-+ .gpio23 = GPIO_MODE_GPIO,
-+ .gpio24 = GPIO_MODE_GPIO,
-+ .gpio25 = GPIO_MODE_NATIVE,
-+ .gpio26 = GPIO_MODE_NATIVE,
-+ .gpio27 = GPIO_MODE_GPIO,
-+ .gpio28 = GPIO_MODE_GPIO,
-+ .gpio29 = GPIO_MODE_GPIO,
-+ .gpio30 = GPIO_MODE_NATIVE,
-+ .gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+ .gpio0 = GPIO_DIR_OUTPUT,
-+ .gpio1 = GPIO_DIR_INPUT,
-+ .gpio2 = GPIO_DIR_INPUT,
-+ .gpio3 = GPIO_DIR_INPUT,
-+ .gpio4 = GPIO_DIR_INPUT,
-+ .gpio6 = GPIO_DIR_INPUT,
-+ .gpio7 = GPIO_DIR_INPUT,
-+ .gpio8 = GPIO_DIR_INPUT,
-+ .gpio10 = GPIO_DIR_INPUT,
-+ .gpio11 = GPIO_DIR_OUTPUT,
-+ .gpio13 = GPIO_DIR_INPUT,
-+ .gpio14 = GPIO_DIR_INPUT,
-+ .gpio15 = GPIO_DIR_INPUT,
-+ .gpio16 = GPIO_DIR_INPUT,
-+ .gpio17 = GPIO_DIR_OUTPUT,
-+ .gpio19 = GPIO_DIR_INPUT,
-+ .gpio21 = GPIO_DIR_INPUT,
-+ .gpio22 = GPIO_DIR_OUTPUT,
-+ .gpio23 = GPIO_DIR_INPUT,
-+ .gpio24 = GPIO_DIR_OUTPUT,
-+ .gpio27 = GPIO_DIR_OUTPUT,
-+ .gpio28 = GPIO_DIR_OUTPUT,
-+ .gpio29 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+ .gpio0 = GPIO_LEVEL_LOW,
-+ .gpio11 = GPIO_LEVEL_LOW,
-+ .gpio17 = GPIO_LEVEL_HIGH,
-+ .gpio22 = GPIO_LEVEL_HIGH,
-+ .gpio24 = GPIO_LEVEL_HIGH,
-+ .gpio27 = GPIO_LEVEL_LOW,
-+ .gpio28 = GPIO_LEVEL_LOW,
-+ .gpio29 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+ .gpio24 = GPIO_RESET_RSMRST,
-+ .gpio30 = GPIO_RESET_RSMRST,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+ .gpio1 = GPIO_INVERT,
-+ .gpio3 = GPIO_INVERT,
-+ .gpio6 = GPIO_INVERT,
-+ .gpio7 = GPIO_INVERT,
-+ .gpio10 = GPIO_INVERT,
-+ .gpio13 = GPIO_INVERT,
-+ .gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+ .gpio32 = GPIO_MODE_NATIVE,
-+ .gpio33 = GPIO_MODE_GPIO,
-+ .gpio34 = GPIO_MODE_GPIO,
-+ .gpio35 = GPIO_MODE_GPIO,
-+ .gpio36 = GPIO_MODE_NATIVE,
-+ .gpio37 = GPIO_MODE_GPIO,
-+ .gpio38 = GPIO_MODE_GPIO,
-+ .gpio39 = GPIO_MODE_GPIO,
-+ .gpio40 = GPIO_MODE_NATIVE,
-+ .gpio41 = GPIO_MODE_NATIVE,
-+ .gpio42 = GPIO_MODE_NATIVE,
-+ .gpio43 = GPIO_MODE_NATIVE,
-+ .gpio44 = GPIO_MODE_GPIO,
-+ .gpio45 = GPIO_MODE_NATIVE,
-+ .gpio46 = GPIO_MODE_GPIO,
-+ .gpio47 = GPIO_MODE_NATIVE,
-+ .gpio48 = GPIO_MODE_GPIO,
-+ .gpio49 = GPIO_MODE_GPIO,
-+ .gpio50 = GPIO_MODE_GPIO,
-+ .gpio51 = GPIO_MODE_GPIO,
-+ .gpio52 = GPIO_MODE_GPIO,
-+ .gpio53 = GPIO_MODE_GPIO,
-+ .gpio54 = GPIO_MODE_GPIO,
-+ .gpio55 = GPIO_MODE_GPIO,
-+ .gpio56 = GPIO_MODE_NATIVE,
-+ .gpio57 = GPIO_MODE_GPIO,
-+ .gpio58 = GPIO_MODE_NATIVE,
-+ .gpio59 = GPIO_MODE_NATIVE,
-+ .gpio60 = GPIO_MODE_GPIO,
-+ .gpio61 = GPIO_MODE_GPIO,
-+ .gpio62 = GPIO_MODE_NATIVE,
-+ .gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+ .gpio33 = GPIO_DIR_OUTPUT,
-+ .gpio34 = GPIO_DIR_INPUT,
-+ .gpio35 = GPIO_DIR_OUTPUT,
-+ .gpio37 = GPIO_DIR_OUTPUT,
-+ .gpio38 = GPIO_DIR_INPUT,
-+ .gpio39 = GPIO_DIR_INPUT,
-+ .gpio44 = GPIO_DIR_INPUT,
-+ .gpio46 = GPIO_DIR_INPUT,
-+ .gpio48 = GPIO_DIR_INPUT,
-+ .gpio49 = GPIO_DIR_OUTPUT,
-+ .gpio50 = GPIO_DIR_INPUT,
-+ .gpio51 = GPIO_DIR_INPUT,
-+ .gpio52 = GPIO_DIR_INPUT,
-+ .gpio53 = GPIO_DIR_OUTPUT,
-+ .gpio54 = GPIO_DIR_INPUT,
-+ .gpio55 = GPIO_DIR_INPUT,
-+ .gpio57 = GPIO_DIR_OUTPUT,
-+ .gpio60 = GPIO_DIR_OUTPUT,
-+ .gpio61 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+ .gpio33 = GPIO_LEVEL_LOW,
-+ .gpio35 = GPIO_LEVEL_LOW,
-+ .gpio37 = GPIO_LEVEL_LOW,
-+ .gpio49 = GPIO_LEVEL_LOW,
-+ .gpio53 = GPIO_LEVEL_HIGH,
-+ .gpio57 = GPIO_LEVEL_LOW,
-+ .gpio60 = GPIO_LEVEL_HIGH,
-+ .gpio61 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+ .gpio64 = GPIO_MODE_NATIVE,
-+ .gpio65 = GPIO_MODE_NATIVE,
-+ .gpio66 = GPIO_MODE_NATIVE,
-+ .gpio67 = GPIO_MODE_NATIVE,
-+ .gpio68 = GPIO_MODE_GPIO,
-+ .gpio69 = GPIO_MODE_GPIO,
-+ .gpio70 = GPIO_MODE_GPIO,
-+ .gpio71 = GPIO_MODE_GPIO,
-+ .gpio72 = GPIO_MODE_GPIO,
-+ .gpio73 = GPIO_MODE_GPIO,
-+ .gpio74 = GPIO_MODE_GPIO,
-+ .gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+ .gpio68 = GPIO_DIR_OUTPUT,
-+ .gpio69 = GPIO_DIR_INPUT,
-+ .gpio70 = GPIO_DIR_OUTPUT,
-+ .gpio71 = GPIO_DIR_OUTPUT,
-+ .gpio72 = GPIO_DIR_OUTPUT,
-+ .gpio73 = GPIO_DIR_OUTPUT,
-+ .gpio74 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+ .gpio68 = GPIO_LEVEL_HIGH,
-+ .gpio70 = GPIO_LEVEL_HIGH,
-+ .gpio71 = GPIO_LEVEL_HIGH,
-+ .gpio72 = GPIO_LEVEL_LOW,
-+ .gpio73 = GPIO_LEVEL_HIGH,
-+ .gpio74 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+ .set1 = {
-+ .mode = &pch_gpio_set1_mode,
-+ .direction = &pch_gpio_set1_direction,
-+ .level = &pch_gpio_set1_level,
-+ .blink = &pch_gpio_set1_blink,
-+ .invert = &pch_gpio_set1_invert,
-+ .reset = &pch_gpio_set1_reset,
-+ },
-+ .set2 = {
-+ .mode = &pch_gpio_set2_mode,
-+ .direction = &pch_gpio_set2_direction,
-+ .level = &pch_gpio_set2_level,
-+ .reset = &pch_gpio_set2_reset,
-+ },
-+ .set3 = {
-+ .mode = &pch_gpio_set3_mode,
-+ .direction = &pch_gpio_set3_direction,
-+ .level = &pch_gpio_set3_level,
-+ .reset = &pch_gpio_set3_reset,
-+ },
-+};
-diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c
-new file mode 100644
-index 0000000000..2f5469fc84
---- /dev/null
-+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c
-@@ -0,0 +1,25 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+ 0x111d7605, /* Codec Vendor / Device ID: IDT */
-+ 0x103c1631, /* Subsystem ID */
-+
-+ 11, /* Number of 4 dword sets */
-+ AZALIA_SUBVENDOR(0, 0x103c1631),
-+ AZALIA_PIN_CFG(0, 0x0a, 0x40f000f0),
-+ AZALIA_PIN_CFG(0, 0x0b, 0x0421401f),
-+ AZALIA_PIN_CFG(0, 0x0c, 0x04a11020),
-+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+ AZALIA_PIN_CFG(0, 0x0e, 0x40f000f0),
-+ AZALIA_PIN_CFG(0, 0x0f, 0x40f000f0),
-+ AZALIA_PIN_CFG(0, 0x10, 0x40f000f0),
-+ AZALIA_PIN_CFG(0, 0x11, 0x90a60130),
-+ AZALIA_PIN_CFG(0, 0x1f, 0x40f000f0),
-+ AZALIA_PIN_CFG(0, 0x20, 0x40f000f0),
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb
-new file mode 100644
-index 0000000000..4264270ad0
---- /dev/null
-+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb
-@@ -0,0 +1,51 @@
-+# SPDX-License-Identifier: GPL-2.0-or-later
-+
-+chip northbridge/intel/sandybridge
-+ register "spd_addresses" = "{0x50, 0x51, 0x52, 0x53}"
-+ device domain 0 on
-+ subsystemid 0x103c 0x1631 inherit
-+ device pci 01.0 on end # PCIe Bridge for discrete graphics
-+ device pci 02.0 off end # Internal graphics
-+
-+ chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-+ register "docking_supported" = "0"
-+ register "gen1_dec" = "0x007c0201"
-+ register "gen2_dec" = "0x000c0101"
-+ register "gen3_dec" = "0x00fcfe01"
-+ register "gen4_dec" = "0x000402e9"
-+ register "gpi6_routing" = "2"
-+ register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
-+ # HDD(0), ODD(1), eSATA(4)
-+ register "sata_port_map" = "0x3b"
-+
-+ device pci 1c.0 on end # PCIe Port #1, WWAN
-+ device pci 1c.1 on end # PCIe Port #2, ExpressCard
-+ device pci 1c.2 on end # PCIe Port #3, SD/MMC
-+ device pci 1c.3 on end # PCIe Port #4, WLAN
-+ device pci 1c.4 off end # PCIe Port #5
-+ device pci 1c.5 off end # PCIe Port #6
-+ device pci 1c.6 off end # PCIe Port #7
-+ device pci 1c.7 on end # PCIe Port #8, NEC USB 3.0 Host Controller
-+ device pci 1f.0 on # LPC bridge
-+ chip ec/hp/kbc1126
-+ register "ec_data_port" = "0x60"
-+ register "ec_cmd_port" = "0x64"
-+ register "ec_ctrl_reg" = "0xca"
-+ register "ec_fan_ctrl_value" = "0x6b"
-+ device pnp ff.1 off end
-+ end
-+ chip superio/smsc/lpc47n217
-+ device pnp 4e.3 on # Parallel
-+ io 0x60 = 0x378
-+ irq 0x70 = 7
-+ end
-+ device pnp 4e.4 on # COM1
-+ io 0x60 = 0x3f8
-+ irq 0x70 = 4
-+ end
-+ device pnp 4e.5 off end # COM2
-+ end
-+ end
-+ end
-+ end
-+end
---
-2.43.0
-
diff --git a/config/coreboot/haswell/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch b/config/coreboot/default/patches/0034-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
index 81b8e839..35d0046f 100644
--- a/config/coreboot/haswell/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
+++ b/config/coreboot/default/patches/0034-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
@@ -1,7 +1,7 @@
-From d97b865a2210e70583e8bf5ee3a73d3c131b29c1 Mon Sep 17 00:00:00 2001
+From 0ad294f2da8085d5612f7940ec8601d979cb2421 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sat, 2 Mar 2024 22:51:09 +0000
-Subject: [PATCH 1/4] nb/intel/haswell: make IOMMU a runtime option
+Subject: [PATCH 34/65] nb/intel/haswell: make IOMMU a runtime option
When I tested graphics cards on a coreboot port for Dell
OptiPlex 9020 SFF, I could not use a graphics card unless
@@ -101,16 +101,16 @@ index c9ba76c78f..95ee3d36fb 100644
checksums
diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
-index cd4046f1ab..c974022472 100644
+index 6c4a2a1be7..8000eea8c0 100644
--- a/src/mainboard/dell/optiplex_9020/cmos.default
+++ b/src/mainboard/dell/optiplex_9020/cmos.default
-@@ -3,3 +3,4 @@ boot_option=Fallback
- debug_level=Debug
+@@ -4,3 +4,4 @@ debug_level=Debug
nmi=Disable
power_on_after_fail=Disable
+ fan_full_speed=Disable
+iommu=Enable
diff --git a/src/mainboard/dell/optiplex_9020/cmos.layout b/src/mainboard/dell/optiplex_9020/cmos.layout
-index c9ba76c78f..72ff9c4bee 100644
+index d10ad95b23..4a1496a878 100644
--- a/src/mainboard/dell/optiplex_9020/cmos.layout
+++ b/src/mainboard/dell/optiplex_9020/cmos.layout
@@ -21,6 +21,9 @@ entries
@@ -118,12 +118,12 @@ index c9ba76c78f..72ff9c4bee 100644
409 2 e 5 power_on_after_fail
+# turn iommu on or off
-+412 1 e 6 iommu
++411 1 e 6 iommu
+
- # coreboot config options: check sums
- 984 16 h 0 check_sum
+ # coreboot config options: EC
+ 412 1 e 1 fan_full_speed
-@@ -52,6 +55,9 @@ enumerations
+@@ -55,6 +58,9 @@ enumerations
5 1 Enable
5 2 Keep
@@ -288,5 +288,5 @@ index e47deb5da6..1a7e0b1076 100644
if (capid0_a & VTD_DISABLE)
return;
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/haswell/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch b/config/coreboot/default/patches/0035-dell-optiplex_9020-Disable-IOMMU-by-default.patch
index fbb40293..9596d6f3 100644
--- a/config/coreboot/haswell/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch
+++ b/config/coreboot/default/patches/0035-dell-optiplex_9020-Disable-IOMMU-by-default.patch
@@ -1,7 +1,7 @@
-From 153ca1a43c2c978fa2b2b82d988b0f838953cfb9 Mon Sep 17 00:00:00 2001
+From 80d728b91ec793f584bcf045f00e5fe4bba5e4ae Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sat, 2 Mar 2024 23:00:09 +0000
-Subject: [PATCH 2/4] dell/optiplex_9020: Disable IOMMU by default
+Subject: [PATCH 35/65] dell/optiplex_9020: Disable IOMMU by default
Needed to make graphics cards work. Turning it on is
recommended if only using iGPU, otherwise leave it off
@@ -15,15 +15,15 @@ Signed-off-by: Leah Rowe <info@minifree.org>
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
-index c974022472..a0acd7b6bb 100644
+index 8000eea8c0..0700f971ee 100644
--- a/src/mainboard/dell/optiplex_9020/cmos.default
+++ b/src/mainboard/dell/optiplex_9020/cmos.default
-@@ -3,4 +3,4 @@ boot_option=Fallback
- debug_level=Debug
+@@ -4,4 +4,4 @@ debug_level=Debug
nmi=Disable
power_on_after_fail=Disable
+ fan_full_speed=Disable
-iommu=Enable
+iommu=Disable
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0035-hp8560w-Add-MXM-System-Infomation-Structure.patch b/config/coreboot/default/patches/0035-hp8560w-Add-MXM-System-Infomation-Structure.patch
deleted file mode 100644
index 68ccb801..00000000
--- a/config/coreboot/default/patches/0035-hp8560w-Add-MXM-System-Infomation-Structure.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From b2cf0657a2058118baf6f4ec96e356de3c9e493e Mon Sep 17 00:00:00 2001
-From: Riku Viitanen <riku.viitanen@protonmail.com>
-Date: Sun, 11 Feb 2024 19:02:20 +0200
-Subject: [PATCH] hp8560w: Add MXM System Infomation Structure
-
-Change-Id: I45b421f2d7baf8ca8dedbd3b1ab1e38392b6219b
-Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
----
- src/mainboard/hp/snb_ivb_laptops/Makefile.mk | 6 ++++++
- .../hp/snb_ivb_laptops/variants/8560w/mxm-30-sis | Bin 0 -> 129 bytes
- 2 files changed, 6 insertions(+)
- create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/mxm-30-sis
-
-diff --git a/src/mainboard/hp/snb_ivb_laptops/Makefile.mk b/src/mainboard/hp/snb_ivb_laptops/Makefile.mk
-index c007bb68cd..7950abbc4e 100644
---- a/src/mainboard/hp/snb_ivb_laptops/Makefile.mk
-+++ b/src/mainboard/hp/snb_ivb_laptops/Makefile.mk
-@@ -9,3 +9,9 @@ ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainb
-
- # FIXME: Other variants with same size onboard RAM may exist.
- SPD_SOURCES = hynix_4g
-+
-+ifeq ($(CONFIG_BOARD_HP_8560W),y)
-+cbfs-files-y += mxm-30-sis
-+mxm-30-sis-file := variants/$(VARIANT_DIR)/mxm-30-sis
-+mxm-30-sis-type := raw
-+endif
-diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/mxm-30-sis b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/mxm-30-sis
-new file mode 100644
-index 0000000000000000000000000000000000000000..7e4e245a50d8d5d36ddb22e3b1aed3fa87a2f57d
-GIT binary patch
-literal 129
-zcmeZ`@Qr6?sAMn@-0}aX9Rou`%?mKiz;Fq|&xF!hw;=rNM_^h3Dy{$(SAdE$zF=lx
-o@?l{RW{6;7W}LwIl$Vj2apDSgHUS2PJFE;0Kxqas5d=FN0HAs+0RR91
-
-literal 0
-HcmV?d00001
-
---
-2.43.1
-
diff --git a/config/coreboot/default/patches/0035-mb-dell-Add-Latitude-E5520-Sandybridge.patch b/config/coreboot/default/patches/0035-mb-dell-Add-Latitude-E5520-Sandybridge.patch
deleted file mode 100644
index 1ca4b950..00000000
--- a/config/coreboot/default/patches/0035-mb-dell-Add-Latitude-E5520-Sandybridge.patch
+++ /dev/null
@@ -1,775 +0,0 @@
-From 7c7ce2087e1ff5f0eedb65793254163d01be3056 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Wed, 7 Feb 2024 10:23:38 -0700
-Subject: [PATCH] mb/dell: Add Latitude E5520 (Sandybridge)
-
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/e5520/Kconfig | 37 ++++
- src/mainboard/dell/e5520/Kconfig.name | 2 +
- src/mainboard/dell/e5520/Makefile.inc | 5 +
- src/mainboard/dell/e5520/acpi/ec.asl | 9 +
- src/mainboard/dell/e5520/acpi/platform.asl | 12 ++
- src/mainboard/dell/e5520/acpi/superio.asl | 3 +
- src/mainboard/dell/e5520/acpi_tables.c | 16 ++
- src/mainboard/dell/e5520/board_info.txt | 6 +
- src/mainboard/dell/e5520/cmos.default | 9 +
- src/mainboard/dell/e5520/cmos.layout | 88 ++++++++++
- src/mainboard/dell/e5520/data.vbt | Bin 0 -> 6144 bytes
- src/mainboard/dell/e5520/devicetree.cb | 66 +++++++
- src/mainboard/dell/e5520/dsdt.asl | 30 ++++
- src/mainboard/dell/e5520/early_init.c | 32 ++++
- src/mainboard/dell/e5520/gma-mainboard.ads | 20 +++
- src/mainboard/dell/e5520/gpio.c | 195 +++++++++++++++++++++
- src/mainboard/dell/e5520/hda_verb.c | 33 ++++
- src/mainboard/dell/e5520/mainboard.c | 21 +++
- 18 files changed, 584 insertions(+)
- create mode 100644 src/mainboard/dell/e5520/Kconfig
- create mode 100644 src/mainboard/dell/e5520/Kconfig.name
- create mode 100644 src/mainboard/dell/e5520/Makefile.inc
- create mode 100644 src/mainboard/dell/e5520/acpi/ec.asl
- create mode 100644 src/mainboard/dell/e5520/acpi/platform.asl
- create mode 100644 src/mainboard/dell/e5520/acpi/superio.asl
- create mode 100644 src/mainboard/dell/e5520/acpi_tables.c
- create mode 100644 src/mainboard/dell/e5520/board_info.txt
- create mode 100644 src/mainboard/dell/e5520/cmos.default
- create mode 100644 src/mainboard/dell/e5520/cmos.layout
- create mode 100644 src/mainboard/dell/e5520/data.vbt
- create mode 100644 src/mainboard/dell/e5520/devicetree.cb
- create mode 100644 src/mainboard/dell/e5520/dsdt.asl
- create mode 100644 src/mainboard/dell/e5520/early_init.c
- create mode 100644 src/mainboard/dell/e5520/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/e5520/gpio.c
- create mode 100644 src/mainboard/dell/e5520/hda_verb.c
- create mode 100644 src/mainboard/dell/e5520/mainboard.c
-
-diff --git a/src/mainboard/dell/e5520/Kconfig b/src/mainboard/dell/e5520/Kconfig
-new file mode 100644
-index 0000000000..213c54cf5c
---- /dev/null
-+++ b/src/mainboard/dell/e5520/Kconfig
-@@ -0,0 +1,37 @@
-+if BOARD_DELL_LATITUDE_E5520
-+
-+config BOARD_SPECIFIC_OPTIONS
-+ def_bool y
-+ select BOARD_ROMSIZE_KB_6144
-+ select EC_ACPI
-+ select EC_DELL_MEC5035
-+ select GFX_GMA_PANEL_1_ON_LVDS
-+ select HAVE_ACPI_RESUME
-+ select HAVE_ACPI_TABLES
-+ select HAVE_CMOS_DEFAULT
-+ select HAVE_OPTION_TABLE
-+ select INTEL_GMA_HAVE_VBT
-+ select INTEL_INT15
-+ select MAINBOARD_HAS_LIBGFXINIT
-+ select NORTHBRIDGE_INTEL_SANDYBRIDGE
-+ select SERIRQ_CONTINUOUS_MODE
-+ select SOUTHBRIDGE_INTEL_BD82X6X
-+ select SYSTEM_TYPE_LAPTOP
-+ select USE_NATIVE_RAMINIT
-+
-+config DRAM_RESET_GATE_GPIO
-+ default 60
-+
-+config MAINBOARD_DIR
-+ default "dell/e5520"
-+
-+config MAINBOARD_PART_NUMBER
-+ default "Latitude E5520"
-+
-+config USBDEBUG_HCD_INDEX
-+ default 2
-+
-+config VGA_BIOS_ID
-+ default "8086,0126"
-+
-+endif # BOARD_DELL_LATITUDE_E5520
-diff --git a/src/mainboard/dell/e5520/Kconfig.name b/src/mainboard/dell/e5520/Kconfig.name
-new file mode 100644
-index 0000000000..c88913e8b3
---- /dev/null
-+++ b/src/mainboard/dell/e5520/Kconfig.name
-@@ -0,0 +1,2 @@
-+config BOARD_DELL_LATITUDE_E5520
-+ bool "Latitude E5520"
-diff --git a/src/mainboard/dell/e5520/Makefile.inc b/src/mainboard/dell/e5520/Makefile.inc
-new file mode 100644
-index 0000000000..18391d8b18
---- /dev/null
-+++ b/src/mainboard/dell/e5520/Makefile.inc
-@@ -0,0 +1,5 @@
-+bootblock-y += early_init.c
-+bootblock-y += gpio.c
-+romstage-y += early_init.c
-+romstage-y += gpio.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-diff --git a/src/mainboard/dell/e5520/acpi/ec.asl b/src/mainboard/dell/e5520/acpi/ec.asl
-new file mode 100644
-index 0000000000..0d429410a9
---- /dev/null
-+++ b/src/mainboard/dell/e5520/acpi/ec.asl
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Device(EC)
-+{
-+ Name (_HID, EISAID("PNP0C09"))
-+ Name (_UID, 0)
-+ Name (_GPE, 16)
-+/* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e5520/acpi/platform.asl b/src/mainboard/dell/e5520/acpi/platform.asl
-new file mode 100644
-index 0000000000..2d24bbd9b9
---- /dev/null
-+++ b/src/mainboard/dell/e5520/acpi/platform.asl
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Method(_WAK, 1)
-+{
-+ /* FIXME: EC support */
-+ Return(Package() {0, 0})
-+}
-+
-+Method(_PTS,1)
-+{
-+ /* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e5520/acpi/superio.asl b/src/mainboard/dell/e5520/acpi/superio.asl
-new file mode 100644
-index 0000000000..55b1db5b11
---- /dev/null
-+++ b/src/mainboard/dell/e5520/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <drivers/pc80/pc/ps2_controller.asl>
-diff --git a/src/mainboard/dell/e5520/acpi_tables.c b/src/mainboard/dell/e5520/acpi_tables.c
-new file mode 100644
-index 0000000000..e2759659bf
---- /dev/null
-+++ b/src/mainboard/dell/e5520/acpi_tables.c
-@@ -0,0 +1,16 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi_gnvs.h>
-+#include <soc/nvs.h>
-+
-+/* FIXME: check this function. */
-+void mainboard_fill_gnvs(struct global_nvs *gnvs)
-+{
-+ /* The lid is open by default. */
-+ gnvs->lids = 1;
-+
-+ /* Temperature at which OS will shutdown */
-+ gnvs->tcrt = 100;
-+ /* Temperature at which OS will throttle CPU */
-+ gnvs->tpsv = 90;
-+}
-diff --git a/src/mainboard/dell/e5520/board_info.txt b/src/mainboard/dell/e5520/board_info.txt
-new file mode 100644
-index 0000000000..34d5ad9e0b
---- /dev/null
-+++ b/src/mainboard/dell/e5520/board_info.txt
-@@ -0,0 +1,6 @@
-+Category: laptop
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2011
-diff --git a/src/mainboard/dell/e5520/cmos.default b/src/mainboard/dell/e5520/cmos.default
-new file mode 100644
-index 0000000000..279415dfd1
---- /dev/null
-+++ b/src/mainboard/dell/e5520/cmos.default
-@@ -0,0 +1,9 @@
-+boot_option=Fallback
-+debug_level=Debug
-+power_on_after_fail=Disable
-+nmi=Enable
-+bluetooth=Enable
-+wwan=Enable
-+wlan=Enable
-+sata_mode=AHCI
-+me_state=Disabled
-diff --git a/src/mainboard/dell/e5520/cmos.layout b/src/mainboard/dell/e5520/cmos.layout
-new file mode 100644
-index 0000000000..1aa7e77bce
---- /dev/null
-+++ b/src/mainboard/dell/e5520/cmos.layout
-@@ -0,0 +1,88 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+# -----------------------------------------------------------------
-+0 120 r 0 reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384 1 e 4 boot_option
-+388 4 h 0 reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395 4 e 6 debug_level
-+
-+#400 8 r 0 reserved for century byte
-+
-+# coreboot config options: southbridge
-+408 1 e 1 nmi
-+409 2 e 7 power_on_after_fail
-+411 1 e 9 sata_mode
-+
-+# coreboot config options: EC
-+412 1 e 1 bluetooth
-+413 1 e 1 wwan
-+414 1 e 1 wlan
-+
-+# coreboot config options: ME
-+424 1 e 14 me_state
-+425 2 h 0 me_state_prev
-+
-+# coreboot config options: northbridge
-+432 3 e 11 gfx_uma_size
-+435 2 e 12 hybrid_graphics_mode
-+440 8 h 0 volume
-+
-+# VBOOT
-+448 128 r 0 vbnv
-+
-+# SandyBridge MRC Scrambler Seed values
-+896 32 r 0 mrc_scrambler_seed
-+928 32 r 0 mrc_scrambler_seed_s3
-+960 16 r 0 mrc_scrambler_seed_chk
-+
-+# coreboot config options: check sums
-+984 16 h 0 check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID value text
-+1 0 Disable
-+1 1 Enable
-+2 0 Enable
-+2 1 Disable
-+4 0 Fallback
-+4 1 Normal
-+6 0 Emergency
-+6 1 Alert
-+6 2 Critical
-+6 3 Error
-+6 4 Warning
-+6 5 Notice
-+6 6 Info
-+6 7 Debug
-+6 8 Spew
-+7 0 Disable
-+7 1 Enable
-+7 2 Keep
-+9 0 AHCI
-+9 1 Compatible
-+11 0 32M
-+11 1 64M
-+11 2 96M
-+11 3 128M
-+11 4 160M
-+11 5 192M
-+11 6 224M
-+14 0 Normal
-+14 1 Disabled
-+
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 447 984
-diff --git a/src/mainboard/dell/e5520/data.vbt b/src/mainboard/dell/e5520/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..b511e75262e37fa123d674e9a7b21a8dfe427729
-GIT binary patch
-literal 6144
-zcmeHKZ){Ul6hE);wSBvNZ|mL$bmQOM2BTvXUI!}^N9ejTij1vnu+)Wx6<c9(Y_%K6
-zzOV-@f<ehpWB5RHBpMBgG7}RuMuM2=l*E{6G$wq&gqTQ3#E2RZsOP@dvW*rP7>Fjj
-z&F`Lj?>YC}bI(2Z+}C+6zKyiGrosQXuW7A+&1%<rN+Y1ck(}dLrx)Ma#^x>lnvFGE
-zeD#gB>*#Tq4&j^|7Xcz1r^pp*)g#T}u1Me3ct>Pgls5Qi3!6e2W0%`a-Ic|3efWuR
-zXJ@#}wJyGMTXTcY<%@TBKh@(3hP$Gjv}E}rx-%9D_eLXhYe!c&-VyDg-Cdo1>Biji
-zNNsnlFW#|jdoOj?mZ43m>cVO%UE9@*E7x|%V~c4`XD4l9GCi~@+7pfMibfX8L?!^I
-zc~Rg1I5SxH1DAEZ0{jA41jrJBh#-l;b6^%g7QrThRe)&%tQH_!ggOD7A_PRRgGuI0
-z0zi=n#rCB66d-sO$M~^6wgeb$2fH1|0R`v}xUiWCU`4SF;Dyh&j|mK&6WJWJ&Pq9I
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-z{R4$??VSvEWpgT=vCM&1-U$bI6CB~IV3Z$$Vv7o!EDnev4j~R(MHsazZ~^fLLKGF4
-zEfQFOa3dZ?1Q1P#&4?!vyAk^k&m&$z3?WV+-b0*1j37o4=MX<3E+eiYge(Ht2umAW
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-zEQMSfm?<w*Unzumkj_w5>VYL6W4=aCiy4rk%xq~5LV?bi|GL2$G7li<%c7yd;6T34
-zQBN5huZ3~6`ChGkpb$Bg5ITb#2iK-qs|1`=sl6Dhn(Lj&8Agt?S{sTDmmtRj7Jm_1
-zFnt{w&FdFkWS3bl>OeL?eO+*i{)9G!cSI-InGt|U0eEYmRCOHm7|I;#LO8ksRIeJ#
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-zP5ID9KDE)GZOY#^VwPyRq^y+48j0?ZlzxdkC()CV@`*&wO7vGr;qjA3rb}gIwM-gi
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-zAEWQGv_X1)wq0y5Ha0c~&psIsln<Hiu3;#Lf;%*eI<@?p8cfMJV(IYi8q$NA#iS8`
-z_~|4t4b^wtMSAeFST^F8-Tm<zu8D&j^8=&I4;I}Im>aeSK~X8*^Z9SE44_`P#KIUL
-zf6^N2f>5HCPWM3N+f0MyWOV^kz~!-wVc4MRXOY>4Jsxd1RyBKEMzNf{RKhesKFdbq
-zJ(*d<l2Y#n?E?~iBA39P?~Pr2d#}5=#Sfl-VGzGUF$4U2KcqCIVlwkC(&7PQk_X!a
-z8}3Jgq-&U*Co|h1>l)ZQGyW_x->i#;FvQ*=Nv&nG0N5@D@jjv_Q}K}6MP?1A6`JGe
-zDwj9pN+x;T4>`I9e5x(uqdK#OGB31ikk@Xv=dxLb4fx(;ktX@rOb~M~?dYQQYiPia
-z8r;jUQ?sd2@3||-cb2Eb%JFYfxHsONoaJ^eqoKN{<g9?-%`7oWz+aJS0tEc!^d@hD
-z1-I{%hr!Y?0uVZpUbl__37xn@jkD6Z>3SATgBQlEoN7&ZV9Eni9+>jLln16fFy(=V
-H=7E0zE^L4Z
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/e5520/devicetree.cb b/src/mainboard/dell/e5520/devicetree.cb
-new file mode 100644
-index 0000000000..bef96ac14c
---- /dev/null
-+++ b/src/mainboard/dell/e5520/devicetree.cb
-@@ -0,0 +1,66 @@
-+chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
-+ register "gfx" = "GMA_STATIC_DISPLAYS(1)"
-+ register "gpu_cpu_backlight" = "0x00000218"
-+ register "gpu_dp_b_hotplug" = "4"
-+ register "gpu_dp_c_hotplug" = "4"
-+ register "gpu_dp_d_hotplug" = "4"
-+ register "gpu_panel_port_select" = "0"
-+ register "gpu_panel_power_backlight_off_delay" = "2300"
-+ register "gpu_panel_power_backlight_on_delay" = "2300"
-+ register "gpu_panel_power_cycle_delay" = "6"
-+ register "gpu_panel_power_down_delay" = "400"
-+ register "gpu_panel_power_up_delay" = "400"
-+ register "gpu_pch_backlight" = "0x13121312"
-+
-+ register "spd_addresses" = "{0x50, 0, 0x52, 0}"
-+
-+ device domain 0x0 on
-+ subsystemid 0x1028 0x049a inherit
-+
-+ device ref host_bridge on end # Host bridge
-+ device ref peg10 on end # PEG
-+ device ref igd on end # iGPU
-+
-+ chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-+ register "docking_supported" = "1"
-+ register "gen1_dec" = "0x007c0681"
-+ register "gen2_dec" = "0x007c0901"
-+ register "gen3_dec" = "0x003c07e1"
-+ register "gen4_dec" = "0x001c0901"
-+ register "gpi0_routing" = "2"
-+ register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 1, 0 }"
-+ register "pcie_port_coalesce" = "1"
-+ register "sata_interface_speed_support" = "0x3"
-+ register "sata_port_map" = "0x3b"
-+ register "spi_lvscc" = "0x2005"
-+ register "spi_uvscc" = "0x2005"
-+
-+ device ref mei1 off end
-+ device ref mei2 off end
-+ device ref me_ide_r off end
-+ device ref me_kt off end
-+ device ref gbe off end
-+ device ref ehci2 on end
-+ device ref hda on end
-+ device ref pcie_rp1 on end
-+ device ref pcie_rp2 on end
-+ device ref pcie_rp3 on end
-+ device ref pcie_rp4 off end
-+ device ref pcie_rp5 on end
-+ device ref pcie_rp6 on end
-+ device ref pcie_rp7 on end
-+ device ref pcie_rp8 off end
-+ device ref ehci1 on end
-+ device ref pci_bridge off end
-+ device ref lpc on
-+ chip ec/dell/mec5035
-+ device pnp ff.0 on end
-+ end
-+ end
-+ device ref sata1 on end
-+ device ref smbus on end
-+ device ref sata2 off end
-+ device ref thermal off end
-+ end
-+ end
-+end
-diff --git a/src/mainboard/dell/e5520/dsdt.asl b/src/mainboard/dell/e5520/dsdt.asl
-new file mode 100644
-index 0000000000..7d13c55b08
---- /dev/null
-+++ b/src/mainboard/dell/e5520/dsdt.asl
-@@ -0,0 +1,30 @@
-+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
-+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <acpi/acpi.h>
-+
-+DefinitionBlock(
-+ "dsdt.aml",
-+ "DSDT",
-+ ACPI_DSDT_REV_2,
-+ OEM_ID,
-+ ACPI_TABLE_CREATOR,
-+ 0x20141018 /* OEM revision */
-+)
-+{
-+ #include <acpi/dsdt_top.asl>
-+ #include "acpi/platform.asl"
-+ #include <cpu/intel/common/acpi/cpu.asl>
-+ #include <southbridge/intel/common/acpi/platform.asl>
-+ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-+ #include <southbridge/intel/common/acpi/sleepstates.asl>
-+
-+ Device (\_SB.PCI0)
-+ {
-+ #include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-+ #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
-+ #include <southbridge/intel/bd82x6x/acpi/pch.asl>
-+ }
-+}
-diff --git a/src/mainboard/dell/e5520/early_init.c b/src/mainboard/dell/e5520/early_init.c
-new file mode 100644
-index 0000000000..7297921546
---- /dev/null
-+++ b/src/mainboard/dell/e5520/early_init.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+ { 1, 1, 0 },
-+ { 1, 1, 0 },
-+ { 1, 1, 1 },
-+ { 1, 1, 1 },
-+ { 1, 1, 2 },
-+ { 1, 1, 2 },
-+ { 1, 1, 3 },
-+ { 1, 1, 3 },
-+ { 1, 1, 5 },
-+ { 1, 1, 5 },
-+ { 1, 1, 7 },
-+ { 1, 1, 6 },
-+ { 1, 1, 6 },
-+ { 1, 1, 7 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+ | COMB_LPC_EN | COMA_LPC_EN);
-+ mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/e5520/gma-mainboard.ads b/src/mainboard/dell/e5520/gma-mainboard.ads
-new file mode 100644
-index 0000000000..2a16f44360
---- /dev/null
-+++ b/src/mainboard/dell/e5520/gma-mainboard.ads
-@@ -0,0 +1,20 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+ ports : constant Port_List :=
-+ (
-+ HDMI1, -- mainboard HDMI
-+ DP2, -- dock DP
-+ DP3, -- dock DP
-+ Analog, -- mainboard VGA
-+ LVDS,
-+ others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/e5520/gpio.c b/src/mainboard/dell/e5520/gpio.c
-new file mode 100644
-index 0000000000..f76b93d9f0
---- /dev/null
-+++ b/src/mainboard/dell/e5520/gpio.c
-@@ -0,0 +1,195 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+ .gpio0 = GPIO_MODE_GPIO,
-+ .gpio1 = GPIO_MODE_NATIVE,
-+ .gpio2 = GPIO_MODE_GPIO,
-+ .gpio3 = GPIO_MODE_GPIO,
-+ .gpio4 = GPIO_MODE_GPIO,
-+ .gpio5 = GPIO_MODE_NATIVE,
-+ .gpio6 = GPIO_MODE_GPIO,
-+ .gpio7 = GPIO_MODE_GPIO,
-+ .gpio8 = GPIO_MODE_GPIO,
-+ .gpio9 = GPIO_MODE_NATIVE,
-+ .gpio10 = GPIO_MODE_NATIVE,
-+ .gpio11 = GPIO_MODE_NATIVE,
-+ .gpio12 = GPIO_MODE_GPIO,
-+ .gpio13 = GPIO_MODE_GPIO,
-+ .gpio14 = GPIO_MODE_GPIO,
-+ .gpio15 = GPIO_MODE_GPIO,
-+ .gpio16 = GPIO_MODE_NATIVE,
-+ .gpio17 = GPIO_MODE_GPIO,
-+ .gpio18 = GPIO_MODE_NATIVE,
-+ .gpio19 = GPIO_MODE_GPIO,
-+ .gpio20 = GPIO_MODE_NATIVE,
-+ .gpio21 = GPIO_MODE_GPIO,
-+ .gpio22 = GPIO_MODE_GPIO,
-+ .gpio23 = GPIO_MODE_NATIVE,
-+ .gpio24 = GPIO_MODE_GPIO,
-+ .gpio25 = GPIO_MODE_NATIVE,
-+ .gpio26 = GPIO_MODE_NATIVE,
-+ .gpio27 = GPIO_MODE_GPIO,
-+ .gpio28 = GPIO_MODE_GPIO,
-+ .gpio29 = GPIO_MODE_GPIO,
-+ .gpio30 = GPIO_MODE_GPIO,
-+ .gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+ .gpio0 = GPIO_DIR_INPUT,
-+ .gpio2 = GPIO_DIR_INPUT,
-+ .gpio3 = GPIO_DIR_INPUT,
-+ .gpio4 = GPIO_DIR_INPUT,
-+ .gpio6 = GPIO_DIR_INPUT,
-+ .gpio7 = GPIO_DIR_INPUT,
-+ .gpio8 = GPIO_DIR_INPUT,
-+ .gpio12 = GPIO_DIR_OUTPUT,
-+ .gpio13 = GPIO_DIR_INPUT,
-+ .gpio14 = GPIO_DIR_INPUT,
-+ .gpio15 = GPIO_DIR_INPUT,
-+ .gpio17 = GPIO_DIR_INPUT,
-+ .gpio19 = GPIO_DIR_INPUT,
-+ .gpio21 = GPIO_DIR_INPUT,
-+ .gpio22 = GPIO_DIR_INPUT,
-+ .gpio24 = GPIO_DIR_INPUT,
-+ .gpio27 = GPIO_DIR_INPUT,
-+ .gpio28 = GPIO_DIR_INPUT,
-+ .gpio29 = GPIO_DIR_INPUT,
-+ .gpio30 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+ .gpio12 = GPIO_LEVEL_HIGH,
-+ .gpio30 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+ .gpio0 = GPIO_INVERT,
-+ .gpio8 = GPIO_INVERT,
-+ .gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+ .gpio32 = GPIO_MODE_NATIVE,
-+ .gpio33 = GPIO_MODE_GPIO,
-+ .gpio34 = GPIO_MODE_GPIO,
-+ .gpio35 = GPIO_MODE_GPIO,
-+ .gpio36 = GPIO_MODE_GPIO,
-+ .gpio37 = GPIO_MODE_GPIO,
-+ .gpio38 = GPIO_MODE_GPIO,
-+ .gpio39 = GPIO_MODE_GPIO,
-+ .gpio40 = GPIO_MODE_NATIVE,
-+ .gpio41 = GPIO_MODE_NATIVE,
-+ .gpio42 = GPIO_MODE_NATIVE,
-+ .gpio43 = GPIO_MODE_NATIVE,
-+ .gpio44 = GPIO_MODE_NATIVE,
-+ .gpio45 = GPIO_MODE_NATIVE,
-+ .gpio46 = GPIO_MODE_GPIO,
-+ .gpio47 = GPIO_MODE_NATIVE,
-+ .gpio48 = GPIO_MODE_GPIO,
-+ .gpio49 = GPIO_MODE_NATIVE,
-+ .gpio50 = GPIO_MODE_GPIO,
-+ .gpio51 = GPIO_MODE_GPIO,
-+ .gpio52 = GPIO_MODE_GPIO,
-+ .gpio53 = GPIO_MODE_GPIO,
-+ .gpio54 = GPIO_MODE_GPIO,
-+ .gpio55 = GPIO_MODE_GPIO,
-+ .gpio56 = GPIO_MODE_GPIO,
-+ .gpio57 = GPIO_MODE_GPIO,
-+ .gpio58 = GPIO_MODE_NATIVE,
-+ .gpio59 = GPIO_MODE_NATIVE,
-+ .gpio60 = GPIO_MODE_GPIO,
-+ .gpio61 = GPIO_MODE_NATIVE,
-+ .gpio62 = GPIO_MODE_NATIVE,
-+ .gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+ .gpio33 = GPIO_DIR_INPUT,
-+ .gpio34 = GPIO_DIR_OUTPUT,
-+ .gpio35 = GPIO_DIR_INPUT,
-+ .gpio36 = GPIO_DIR_INPUT,
-+ .gpio37 = GPIO_DIR_OUTPUT,
-+ .gpio38 = GPIO_DIR_INPUT,
-+ .gpio39 = GPIO_DIR_INPUT,
-+ .gpio46 = GPIO_DIR_OUTPUT,
-+ .gpio48 = GPIO_DIR_INPUT,
-+ .gpio50 = GPIO_DIR_OUTPUT,
-+ .gpio51 = GPIO_DIR_OUTPUT,
-+ .gpio52 = GPIO_DIR_INPUT,
-+ .gpio53 = GPIO_DIR_INPUT,
-+ .gpio54 = GPIO_DIR_INPUT,
-+ .gpio55 = GPIO_DIR_OUTPUT,
-+ .gpio56 = GPIO_DIR_INPUT,
-+ .gpio57 = GPIO_DIR_INPUT,
-+ .gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+ .gpio34 = GPIO_LEVEL_LOW,
-+ .gpio37 = GPIO_LEVEL_LOW,
-+ .gpio46 = GPIO_LEVEL_HIGH,
-+ .gpio50 = GPIO_LEVEL_HIGH,
-+ .gpio51 = GPIO_LEVEL_LOW,
-+ .gpio55 = GPIO_LEVEL_LOW,
-+ .gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+ .gpio64 = GPIO_MODE_NATIVE,
-+ .gpio65 = GPIO_MODE_NATIVE,
-+ .gpio66 = GPIO_MODE_NATIVE,
-+ .gpio67 = GPIO_MODE_NATIVE,
-+ .gpio68 = GPIO_MODE_NATIVE,
-+ .gpio69 = GPIO_MODE_NATIVE,
-+ .gpio70 = GPIO_MODE_NATIVE,
-+ .gpio71 = GPIO_MODE_NATIVE,
-+ .gpio72 = GPIO_MODE_NATIVE,
-+ .gpio73 = GPIO_MODE_NATIVE,
-+ .gpio74 = GPIO_MODE_GPIO,
-+ .gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+ .gpio74 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+ .set1 = {
-+ .mode = &pch_gpio_set1_mode,
-+ .direction = &pch_gpio_set1_direction,
-+ .level = &pch_gpio_set1_level,
-+ .blink = &pch_gpio_set1_blink,
-+ .invert = &pch_gpio_set1_invert,
-+ .reset = &pch_gpio_set1_reset,
-+ },
-+ .set2 = {
-+ .mode = &pch_gpio_set2_mode,
-+ .direction = &pch_gpio_set2_direction,
-+ .level = &pch_gpio_set2_level,
-+ .reset = &pch_gpio_set2_reset,
-+ },
-+ .set3 = {
-+ .mode = &pch_gpio_set3_mode,
-+ .direction = &pch_gpio_set3_direction,
-+ .level = &pch_gpio_set3_level,
-+ .reset = &pch_gpio_set3_reset,
-+ },
-+};
-diff --git a/src/mainboard/dell/e5520/hda_verb.c b/src/mainboard/dell/e5520/hda_verb.c
-new file mode 100644
-index 0000000000..e2efee3646
---- /dev/null
-+++ b/src/mainboard/dell/e5520/hda_verb.c
-@@ -0,0 +1,33 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+ 0x111d76e7, /* Codec Vendor / Device ID: IDT */
-+ 0x1028049a, /* Subsystem ID */
-+ 11, /* Number of 4 dword sets */
-+ AZALIA_SUBVENDOR(0, 0x1028049a),
-+ AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
-+ AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
-+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+ AZALIA_PIN_CFG(0, 0x11, 0xd5a301a0),
-+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+ AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
-+
-+ 0x80862805, /* Codec Vendor / Device ID: Intel */
-+ 0x80860101, /* Subsystem ID */
-+ 4, /* Number of 4 dword sets */
-+ AZALIA_SUBVENDOR(3, 0x80860101),
-+ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/e5520/mainboard.c b/src/mainboard/dell/e5520/mainboard.c
-new file mode 100644
-index 0000000000..31e49802fc
---- /dev/null
-+++ b/src/mainboard/dell/e5520/mainboard.c
-@@ -0,0 +1,21 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+#include <drivers/intel/gma/int15.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+#include <ec/acpi/ec.h>
-+#include <console/console.h>
-+#include <pc80/keyboard.h>
-+
-+static void mainboard_enable(struct device *dev)
-+{
-+
-+ /* FIXME: fix these values. */
-+ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-+ GMA_INT15_PANEL_FIT_DEFAULT,
-+ GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-+}
-+
-+struct chip_operations mainboard_ops = {
-+ .enable_dev = mainboard_enable,
-+};
---
-2.43.0
-
diff --git a/config/coreboot/default/patches/0041-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch b/config/coreboot/default/patches/0036-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
index bc8fd55c..cf6f20bb 100644
--- a/config/coreboot/default/patches/0041-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
+++ b/config/coreboot/default/patches/0036-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
@@ -1,7 +1,7 @@
-From 0801b3ba8a0ce0109e30d27f405c912d5d705e9c Mon Sep 17 00:00:00 2001
+From dba9c3776f90bf345070a90c048ff2bae7180f73 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sat, 6 Apr 2024 01:22:47 +0100
-Subject: [PATCH 1/1] nb/haswell: Fully disable iGPU when dGPU is used
+Subject: [PATCH 36/65] nb/haswell: Fully disable iGPU when dGPU is used
My earlier patch disabled decode *and* disabled the iGPU itself, but
a subsequent revision disabled only VGA decode. Upon revisiting, I
@@ -33,10 +33,10 @@ Signed-off-by: Leah Rowe <info@minifree.org>
1 file changed, 3 insertions(+)
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
-index 48a0ba54c7..f0b848852d 100644
+index f7fad3183d..1b188e92e1 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
-@@ -465,6 +465,9 @@ static void gma_func0_disable(struct device *dev)
+@@ -466,6 +466,9 @@ static void gma_func0_disable(struct device *dev)
{
/* Disable VGA decode */
pci_or_config16(pcidev_on_root(0, 0), GGC, 1 << 1);
@@ -47,5 +47,5 @@ index 48a0ba54c7..f0b848852d 100644
static struct device_operations gma_func0_ops = {
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0036-nb-intel-haswell-make-IOMMU-a-runtime-option.patch b/config/coreboot/default/patches/0036-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
deleted file mode 100644
index 8401e8b8..00000000
--- a/config/coreboot/default/patches/0036-nb-intel-haswell-make-IOMMU-a-runtime-option.patch
+++ /dev/null
@@ -1,292 +0,0 @@
-From 7c755b4502ea007f2216ea76f2ed734452def883 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sat, 2 Mar 2024 22:51:09 +0000
-Subject: [PATCH 1/2] nb/intel/haswell: make IOMMU a runtime option
-
-When I tested graphics cards on a coreboot port for Dell
-OptiPlex 9020 SFF, I could not use a graphics card unless
-I set iommu=off on the Linux cmdline.
-
-Coreboot's current behaviour is to check whether the CPU
-has vt-d support and, if it does, initialise the IOMMU.
-
-This patch maintains the current behaviour by default, but
-allows the user to turn *off* the IOMMU, even if vt-d is
-supported by the host CPU.
-
-If iommu=Disable is specified, the check will not be
-performed, and the IOMMU will be left disabled. This option
-has been added to all current Haswell boards, though it is
-recommended to leave the IOMMU turned on in most setups.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/mainboard/asrock/b85m_pro4/cmos.default | 1 +
- src/mainboard/asrock/b85m_pro4/cmos.layout | 3 +++
- src/mainboard/asrock/h81m-hds/cmos.default | 1 +
- src/mainboard/asrock/h81m-hds/cmos.layout | 6 ++++++
- src/mainboard/dell/optiplex_9020/cmos.default | 1 +
- src/mainboard/dell/optiplex_9020/cmos.layout | 6 ++++++
- src/mainboard/google/beltino/cmos.layout | 5 +++++
- src/mainboard/google/slippy/cmos.layout | 5 +++++
- src/mainboard/intel/baskingridge/cmos.layout | 4 ++++
- src/mainboard/lenovo/haswell/cmos.default | 1 +
- src/mainboard/lenovo/haswell/cmos.layout | 3 +++
- src/mainboard/supermicro/x10slm-f/cmos.default | 1 +
- src/mainboard/supermicro/x10slm-f/cmos.layout | 6 ++++++
- src/northbridge/intel/haswell/early_init.c | 5 +++++
- 14 files changed, 48 insertions(+)
-
-diff --git a/src/mainboard/asrock/b85m_pro4/cmos.default b/src/mainboard/asrock/b85m_pro4/cmos.default
-index c51001c03c..1c5c17f841 100644
---- a/src/mainboard/asrock/b85m_pro4/cmos.default
-+++ b/src/mainboard/asrock/b85m_pro4/cmos.default
-@@ -2,3 +2,4 @@ boot_option=Fallback
- debug_level=Debug
- nmi=Enable
- power_on_after_fail=Disable
-+iommu=Enable
-diff --git a/src/mainboard/asrock/b85m_pro4/cmos.layout b/src/mainboard/asrock/b85m_pro4/cmos.layout
-index efdc333fc2..c9883ea71d 100644
---- a/src/mainboard/asrock/b85m_pro4/cmos.layout
-+++ b/src/mainboard/asrock/b85m_pro4/cmos.layout
-@@ -11,6 +11,7 @@
- 395 4 e 4 debug_level
- 408 1 e 1 nmi
- 409 2 e 5 power_on_after_fail
-+ 412 1 e 6 iommu
- 984 16 h 0 check_sum
- # -----------------------------------------------------------------
-
-@@ -38,6 +39,8 @@
- 5 0 Disable
- 5 1 Enable
- 5 2 Keep
-+ 6 0 Disable
-+ 6 1 Enable
- # -----------------------------------------------------------------
-
- # -----------------------------------------------------------------
-diff --git a/src/mainboard/asrock/h81m-hds/cmos.default b/src/mainboard/asrock/h81m-hds/cmos.default
-index c51001c03c..1c5c17f841 100644
---- a/src/mainboard/asrock/h81m-hds/cmos.default
-+++ b/src/mainboard/asrock/h81m-hds/cmos.default
-@@ -2,3 +2,4 @@ boot_option=Fallback
- debug_level=Debug
- nmi=Enable
- power_on_after_fail=Disable
-+iommu=Enable
-diff --git a/src/mainboard/asrock/h81m-hds/cmos.layout b/src/mainboard/asrock/h81m-hds/cmos.layout
-index c9ba76c78f..95ee3d36fb 100644
---- a/src/mainboard/asrock/h81m-hds/cmos.layout
-+++ b/src/mainboard/asrock/h81m-hds/cmos.layout
-@@ -21,6 +21,9 @@ entries
- 408 1 e 1 nmi
- 409 2 e 5 power_on_after_fail
-
-+# enable or disable iommu
-+412 1 e 6 iommu
-+
- # coreboot config options: check sums
- 984 16 h 0 check_sum
-
-@@ -52,6 +55,9 @@ enumerations
- 5 1 Enable
- 5 2 Keep
-
-+6 0 Disable
-+6 1 Enable
-+
- # -----------------------------------------------------------------
- checksums
-
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
-index b159660aa8..8253570f19 100644
---- a/src/mainboard/dell/optiplex_9020/cmos.default
-+++ b/src/mainboard/dell/optiplex_9020/cmos.default
-@@ -2,3 +2,4 @@ boot_option=Fallback
- debug_level=Debug
- nmi=Disable
- power_on_after_fail=Disable
-+iommu=Enable
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.layout b/src/mainboard/dell/optiplex_9020/cmos.layout
-index c9ba76c78f..72ff9c4bee 100644
---- a/src/mainboard/dell/optiplex_9020/cmos.layout
-+++ b/src/mainboard/dell/optiplex_9020/cmos.layout
-@@ -21,6 +21,9 @@ entries
- 408 1 e 1 nmi
- 409 2 e 5 power_on_after_fail
-
-+# turn iommu on or off
-+412 1 e 6 iommu
-+
- # coreboot config options: check sums
- 984 16 h 0 check_sum
-
-@@ -52,6 +55,9 @@ enumerations
- 5 1 Enable
- 5 2 Keep
-
-+6 0 Disable
-+6 1 Enable
-+
- # -----------------------------------------------------------------
- checksums
-
-diff --git a/src/mainboard/google/beltino/cmos.layout b/src/mainboard/google/beltino/cmos.layout
-index 78d44c1415..c143979ae1 100644
---- a/src/mainboard/google/beltino/cmos.layout
-+++ b/src/mainboard/google/beltino/cmos.layout
-@@ -19,6 +19,9 @@ entries
- 408 1 e 1 nmi
- 409 2 e 7 power_on_after_fail
-
-+# enable or disable iommu
-+412 1 e 8 iommu
-+
- # coreboot config options: bootloader
- #Used by ChromeOS:
- 416 128 r 0 vbnv
-@@ -47,6 +50,8 @@ enumerations
- 7 0 Disable
- 7 1 Enable
- 7 2 Keep
-+8 0 Disable
-+8 1 Enable
- # -----------------------------------------------------------------
- checksums
-
-diff --git a/src/mainboard/google/slippy/cmos.layout b/src/mainboard/google/slippy/cmos.layout
-index 78d44c1415..c143979ae1 100644
---- a/src/mainboard/google/slippy/cmos.layout
-+++ b/src/mainboard/google/slippy/cmos.layout
-@@ -19,6 +19,9 @@ entries
- 408 1 e 1 nmi
- 409 2 e 7 power_on_after_fail
-
-+# enable or disable iommu
-+412 1 e 8 iommu
-+
- # coreboot config options: bootloader
- #Used by ChromeOS:
- 416 128 r 0 vbnv
-@@ -47,6 +50,8 @@ enumerations
- 7 0 Disable
- 7 1 Enable
- 7 2 Keep
-+8 0 Disable
-+8 1 Enable
- # -----------------------------------------------------------------
- checksums
-
-diff --git a/src/mainboard/intel/baskingridge/cmos.layout b/src/mainboard/intel/baskingridge/cmos.layout
-index 78d44c1415..f2c602f541 100644
---- a/src/mainboard/intel/baskingridge/cmos.layout
-+++ b/src/mainboard/intel/baskingridge/cmos.layout
-@@ -19,6 +19,8 @@ entries
- 408 1 e 1 nmi
- 409 2 e 7 power_on_after_fail
-
-+412 1 e 8 iommu
-+
- # coreboot config options: bootloader
- #Used by ChromeOS:
- 416 128 r 0 vbnv
-@@ -47,6 +49,8 @@ enumerations
- 7 0 Disable
- 7 1 Enable
- 7 2 Keep
-+8 0 Disable
-+8 1 Enable
- # -----------------------------------------------------------------
- checksums
-
-diff --git a/src/mainboard/lenovo/haswell/cmos.default b/src/mainboard/lenovo/haswell/cmos.default
-index bb8626d48b..051658d757 100644
---- a/src/mainboard/lenovo/haswell/cmos.default
-+++ b/src/mainboard/lenovo/haswell/cmos.default
-@@ -12,3 +12,4 @@ trackpoint=Enable
- backlight=Keyboard
- enable_dual_graphics=Disable
- usb_always_on=Disable
-+iommu=Enable
-diff --git a/src/mainboard/lenovo/haswell/cmos.layout b/src/mainboard/lenovo/haswell/cmos.layout
-index 27915d3ab7..59df76b64c 100644
---- a/src/mainboard/lenovo/haswell/cmos.layout
-+++ b/src/mainboard/lenovo/haswell/cmos.layout
-@@ -23,6 +23,7 @@ entries
-
- # coreboot config options: EC
- 411 1 e 8 first_battery
-+413 1 e 14 iommu
- 415 1 e 1 wlan
- 416 1 e 1 trackpoint
- 417 1 e 1 fn_ctrl_swap
-@@ -72,6 +73,8 @@ enumerations
- 13 0 Disable
- 13 1 AC and battery
- 13 2 AC only
-+14 0 Disable
-+14 1 Enable
-
- # -----------------------------------------------------------------
- checksums
-diff --git a/src/mainboard/supermicro/x10slm-f/cmos.default b/src/mainboard/supermicro/x10slm-f/cmos.default
-index f4047147f7..eea2c36b88 100644
---- a/src/mainboard/supermicro/x10slm-f/cmos.default
-+++ b/src/mainboard/supermicro/x10slm-f/cmos.default
-@@ -3,3 +3,4 @@ debug_level=Debug
- nmi=Enable
- power_on_after_fail=Keep
- hide_ast2400=Disable
-+iommu=Enable
-diff --git a/src/mainboard/supermicro/x10slm-f/cmos.layout b/src/mainboard/supermicro/x10slm-f/cmos.layout
-index 38ba87aa45..24d39e97ee 100644
---- a/src/mainboard/supermicro/x10slm-f/cmos.layout
-+++ b/src/mainboard/supermicro/x10slm-f/cmos.layout
-@@ -21,6 +21,9 @@ entries
- 408 1 e 1 nmi
- 409 2 e 5 power_on_after_fail
-
-+# enable or disable iommu
-+412 1 e 6 iommu
-+
- # coreboot config options: mainboard
- 416 1 e 1 hide_ast2400
-
-@@ -55,6 +58,9 @@ enumerations
- 5 1 Enable
- 5 2 Keep
-
-+6 0 Disable
-+6 1 Enable
-+
- # -----------------------------------------------------------------
- checksums
-
-diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c
-index e47deb5da6..1a7e0b1076 100644
---- a/src/northbridge/intel/haswell/early_init.c
-+++ b/src/northbridge/intel/haswell/early_init.c
-@@ -5,6 +5,7 @@
- #include <device/mmio.h>
- #include <device/pci_def.h>
- #include <device/pci_ops.h>
-+#include <option.h>
-
- #include "haswell.h"
-
-@@ -157,6 +158,10 @@ static void haswell_setup_misc(void)
- static void haswell_setup_iommu(void)
- {
- const u32 capid0_a = pci_read_config32(HOST_BRIDGE, CAPID0_A);
-+ u8 enable_iommu = get_uint_option("iommu", 1);
-+
-+ if (!enable_iommu)
-+ return;
-
- if (capid0_a & VTD_DISABLE)
- return;
---
-2.39.2
-
diff --git a/config/coreboot/default/patches/0037-dell-optiplex_9020-Disable-IOMMU-by-default.patch b/config/coreboot/default/patches/0037-dell-optiplex_9020-Disable-IOMMU-by-default.patch
deleted file mode 100644
index c8cde72e..00000000
--- a/config/coreboot/default/patches/0037-dell-optiplex_9020-Disable-IOMMU-by-default.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 61041d49b94236400e836b8ea518d3a064b95c4e Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sat, 2 Mar 2024 23:00:09 +0000
-Subject: [PATCH 2/2] dell/optiplex_9020: Disable IOMMU by default
-
-Needed to make graphics cards work. Turning it on is
-recommended if only using iGPU, otherwise leave it off
-by default. The IOMMU is extremely buggy when a graphics
-card is used. Leaving it off by default will ensure that
-the default ROM images in Libreboot will work on any setup.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/mainboard/dell/optiplex_9020/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
-index 8253570f19..7bccc80e51 100644
---- a/src/mainboard/dell/optiplex_9020/cmos.default
-+++ b/src/mainboard/dell/optiplex_9020/cmos.default
-@@ -2,4 +2,4 @@ boot_option=Fallback
- debug_level=Debug
- nmi=Disable
- power_on_after_fail=Disable
--iommu=Enable
-+iommu=Disable
---
-2.39.2
-
diff --git a/config/coreboot/default/patches/0037-ec-dell-mec5035-Replace-defines-with-enums.patch b/config/coreboot/default/patches/0037-ec-dell-mec5035-Replace-defines-with-enums.patch
new file mode 100644
index 00000000..77011bce
--- /dev/null
+++ b/config/coreboot/default/patches/0037-ec-dell-mec5035-Replace-defines-with-enums.patch
@@ -0,0 +1,91 @@
+From 7420608acfca1790756fd80d718b737352379dbe Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Tue, 28 May 2024 17:23:21 -0600
+Subject: [PATCH 37/38] ec/dell/mec5035: Replace defines with enums
+
+Instead of using defines for command IDs and argument values, use enums
+to provide more type safety. This also has the effect of moving the
+command IDs to a more central location instead of defines spread out
+throughout the header.
+
+Change-Id: I788531e8b70e79541213853f177326d217235ef2
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+Reviewed-on: https://review.coreboot.org/c/coreboot/+/82998
+Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
+Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
+---
+ src/ec/dell/mec5035/mec5035.c | 10 +++++-----
+ src/ec/dell/mec5035/mec5035.h | 20 ++++++++++++--------
+ 2 files changed, 17 insertions(+), 13 deletions(-)
+
+diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
+index 68b6b2f7fb..dffbb7960c 100644
+--- a/src/ec/dell/mec5035/mec5035.c
++++ b/src/ec/dell/mec5035/mec5035.c
+@@ -66,17 +66,17 @@ static enum cb_err write_mailbox_regs(const u8 *data, u8 start, u8 count)
+ return CB_SUCCESS;
+ }
+
+-static void ec_command(u8 cmd)
++static void ec_command(enum mec5035_cmd cmd)
+ {
+ outb(0, MAILBOX_INDEX);
+- outb(cmd, MAILBOX_DATA);
++ outb((u8)cmd, MAILBOX_DATA);
+ wait_ec();
+ }
+
+-u8 mec5035_mouse_touchpad(u8 setting)
++u8 mec5035_mouse_touchpad(enum ec_mouse_setting setting)
+ {
+- u8 buf[15] = {0};
+- write_mailbox_regs(&setting, 2, 1);
++ u8 buf[15] = {(u8)setting};
++ write_mailbox_regs(buf, 2, 1);
+ ec_command(CMD_MOUSE_TP);
+ /* The vendor firmware reads 15 bytes starting at index 1, presumably
+ to get some sort of return code. Though I don't know for sure if
+diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
+index fa15a9d621..32f791cb01 100644
+--- a/src/ec/dell/mec5035/mec5035.h
++++ b/src/ec/dell/mec5035/mec5035.h
+@@ -7,16 +7,20 @@
+
+ #define NUM_REGISTERS 32
+
++enum mec5035_cmd {
++ CMD_MOUSE_TP = 0x1a,
++ CMD_RADIO_CTRL = 0x2b,
++ CMD_CPU_OK = 0xc2,
++};
++
+ /* Touchpad (TP) and mouse related. The EC seems to
+ default to 0 which results in the TP not working. */
+-#define CMD_MOUSE_TP 0x1a
+-#define SERIAL_MOUSE 0 /* Disable TP, force use of a serial mouse */
+-#define PS2_MOUSE 1 /* Disable TP when using a PS/2 mouse */
+-#define TP_PS2_MOUSE 2 /* Leave TP enabled when using a PS/2 mouse */
+-
+-#define CMD_CPU_OK 0xc2
++enum ec_mouse_setting {
++ SERIAL_MOUSE = 0, /* Disable TP, force use of a serial mouse */
++ PS2_MOUSE, /* Disable TP when using a PS/2 mouse */
++ TP_PS2_MOUSE /* Leave TP enabled when using a PS/2 mouse */
++};
+
+-#define CMD_RADIO_CTRL 0x2b
+ #define RADIO_CTRL_NUM_ARGS 3
+ enum ec_radio_dev {
+ RADIO_WLAN = 0,
+@@ -29,7 +33,7 @@ enum ec_radio_state {
+ RADIO_ON
+ };
+
+-u8 mec5035_mouse_touchpad(u8 setting);
++u8 mec5035_mouse_touchpad(enum ec_mouse_setting setting);
+ void mec5035_cpu_ok(void);
+ void mec5035_early_init(void);
+ void mec5035_control_radio(enum ec_radio_dev device, enum ec_radio_state state);
+--
+2.47.0
+
diff --git a/config/coreboot/default/patches/0045-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch b/config/coreboot/default/patches/0038-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
index 97f14314..7c96d9f9 100644
--- a/config/coreboot/default/patches/0045-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
+++ b/config/coreboot/default/patches/0038-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch
@@ -1,16 +1,37 @@
-From a8c4f7004ea1c9b8268a87dd0b700c250ec4747d Mon Sep 17 00:00:00 2001
+From 762f5d95d2314c3d09c1562d36d111dcdb9c8b93 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 3 May 2024 11:03:32 -0600
-Subject: [PATCH] ec/dell/mec5035: Add S3 suspend SMI handler
+Subject: [PATCH 38/38] ec/dell/mec5035: Add S3 suspend SMI handler
+
+This is necessary for S3 resume to work on SNB and newer Dell Latitude
+laptops. If a command isn't sent, the EC cuts power to the DIMMs,
+preventing the system from resuming. These commands were found using an
+FPGA to log all LPC bus transactions between the host and the EC and
+then narrowing down which ones were actually necessary.
+
+Interestingly, the command IDs appear to be identical to those in
+ec/google/wilco, the EC used on Dell Latitude Chromebooks, and that EC
+implements a similar S3 SMI handler as the one implemented in this
+commit. The Wilco EC Kconfig does suggest that its firmware is a
+modified version of Dell's usual Latitude EC firmware, so the
+similarities seem to be intentional.
+
+These similarities also identified a command to enable or disable wake
+sources like the power button and lid switch, and this was added to the
+SMI handler to disable lid wake as the system does not yet resume
+properly from a like wake with coreboot.
+
+Tested on the Latitude E6430 (Ivy Bridge) and the Precision M6800
+(Haswell, not yet pushed).
Change-Id: I655868aba46911d128f6c24f410dc6fdf83f3070
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
src/ec/dell/mec5035/Makefile.mk | 1 +
src/ec/dell/mec5035/mec5035.c | 14 ++++++++++++++
- src/ec/dell/mec5035/mec5035.h | 19 +++++++++++++++++++
+ src/ec/dell/mec5035/mec5035.h | 22 ++++++++++++++++++++++
src/ec/dell/mec5035/smihandler.c | 17 +++++++++++++++++
- 4 files changed, 51 insertions(+)
+ 4 files changed, 54 insertions(+)
create mode 100644 src/ec/dell/mec5035/smihandler.c
diff --git a/src/ec/dell/mec5035/Makefile.mk b/src/ec/dell/mec5035/Makefile.mk
@@ -25,20 +46,13 @@ index 4ebdd811f9..be557e4599 100644
endif
diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
-index 68b6b2f7fb..33bf046634 100644
+index dffbb7960c..85c2ab0140 100644
--- a/src/ec/dell/mec5035/mec5035.c
+++ b/src/ec/dell/mec5035/mec5035.c
@@ -94,6 +94,20 @@ void mec5035_control_radio(enum ec_radio_dev dev, enum ec_radio_state state)
ec_command(CMD_RADIO_CTRL);
}
-+void mec5035_sleep_enable(void)
-+{
-+ u8 buf[SLEEP_EN_NUM_ARGS] = {3, 0};
-+ write_mailbox_regs(buf, 2, SLEEP_EN_NUM_ARGS);
-+ ec_command(CMD_SLEEP_ENABLE);
-+}
-+
+void mec5035_change_wake(u8 source, enum ec_wake_change change)
+{
+ u8 buf[ACPI_WAKEUP_NUM_ARGS] = {change, source, 0, 0x40};
@@ -46,14 +60,21 @@ index 68b6b2f7fb..33bf046634 100644
+ ec_command(CMD_ACPI_WAKEUP_CHANGE);
+}
+
++void mec5035_sleep_enable(void)
++{
++ u8 buf[SLEEP_EN_NUM_ARGS] = {3, 0};
++ write_mailbox_regs(buf, 2, SLEEP_EN_NUM_ARGS);
++ ec_command(CMD_SLEEP_ENABLE);
++}
++
void mec5035_early_init(void)
{
/* If this isn't sent the EC shuts down the system after about 15
diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
-index fa15a9d621..069616fbc5 100644
+index 32f791cb01..8d4fded28b 100644
--- a/src/ec/dell/mec5035/mec5035.h
+++ b/src/ec/dell/mec5035/mec5035.h
-@@ -4,6 +4,7 @@
+@@ -4,12 +4,15 @@
#define _EC_DELL_MEC5035_H_
#include <stdint.h>
@@ -61,37 +82,46 @@ index fa15a9d621..069616fbc5 100644
#define NUM_REGISTERS 32
-@@ -29,9 +30,27 @@ enum ec_radio_state {
+ enum mec5035_cmd {
+ CMD_MOUSE_TP = 0x1a,
+ CMD_RADIO_CTRL = 0x2b,
++ CMD_ACPI_WAKEUP_CHANGE = 0x4a,
++ CMD_SLEEP_ENABLE = 0x64,
+ CMD_CPU_OK = 0xc2,
+ };
+
+@@ -33,9 +36,28 @@ enum ec_radio_state {
RADIO_ON
};
-+#define CMD_ACPI_WAKEUP_CHANGE 0x4a
+#define ACPI_WAKEUP_NUM_ARGS 4
+enum ec_wake_change {
+ WAKE_OFF = 0,
+ WAKE_ON
+};
++
++/* Copied from ec/google/wilco/commands.h. Not sure if these all apply */
+enum ec_acpi_wake_events {
+ EC_ACPI_WAKE_PWRB = BIT(0), /* Wake up by power button */
+ EC_ACPI_WAKE_LID = BIT(1), /* Wake up by lid switch */
+ EC_ACPI_WAKE_RTC = BIT(5), /* Wake up by RTC */
+};
+
-+#define CMD_SLEEP_ENABLE 0x64
+#define SLEEP_EN_NUM_ARGS 2
+
- u8 mec5035_mouse_touchpad(u8 setting);
+ u8 mec5035_mouse_touchpad(enum ec_mouse_setting setting);
void mec5035_cpu_ok(void);
void mec5035_early_init(void);
void mec5035_control_radio(enum ec_radio_dev device, enum ec_radio_state state);
-+void mec5035_sleep(int slp_type);
+void mec5035_change_wake(u8 source, enum ec_wake_change change);
+void mec5035_sleep_enable(void);
++
++void mec5035_smi_sleep(int slp_type);
#endif /* _EC_DELL_MEC5035_H_ */
diff --git a/src/ec/dell/mec5035/smihandler.c b/src/ec/dell/mec5035/smihandler.c
new file mode 100644
-index 0000000000..1db834773d
+index 0000000000..958733bf97
--- /dev/null
+++ b/src/ec/dell/mec5035/smihandler.c
@@ -0,0 +1,17 @@
@@ -102,7 +132,7 @@ index 0000000000..1db834773d
+#include <ec/acpi/ec.h>
+#include "mec5035.h"
+
-+void mec5035_sleep(int slp_type)
++void mec5035_smi_sleep(int slp_type)
+{
+ switch (slp_type) {
+ case ACPI_S3:
@@ -113,5 +143,5 @@ index 0000000000..1db834773d
+ }
+}
--
-2.44.0
+2.47.0
diff --git a/config/coreboot/default/patches/0038-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch b/config/coreboot/default/patches/0038-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
deleted file mode 100644
index 11f95a63..00000000
--- a/config/coreboot/default/patches/0038-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch
+++ /dev/null
@@ -1,774 +0,0 @@
-From 7dd58c8b301404a8bafee25a1e97a8a5d614b3d6 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Mon, 4 Mar 2024 18:05:43 -0700
-Subject: [PATCH] mb/dell: Add Latitude E5420 (Sandy Bridge)
-
----
- src/mainboard/dell/e5420/Kconfig | 37 ++++
- src/mainboard/dell/e5420/Kconfig.name | 2 +
- src/mainboard/dell/e5420/Makefile.mk | 5 +
- src/mainboard/dell/e5420/acpi/ec.asl | 9 +
- src/mainboard/dell/e5420/acpi/platform.asl | 12 ++
- src/mainboard/dell/e5420/acpi/superio.asl | 3 +
- src/mainboard/dell/e5420/acpi_tables.c | 16 ++
- src/mainboard/dell/e5420/board_info.txt | 6 +
- src/mainboard/dell/e5420/cmos.default | 9 +
- src/mainboard/dell/e5420/cmos.layout | 88 ++++++++++
- src/mainboard/dell/e5420/data.vbt | Bin 0 -> 6144 bytes
- src/mainboard/dell/e5420/devicetree.cb | 66 +++++++
- src/mainboard/dell/e5420/dsdt.asl | 30 ++++
- src/mainboard/dell/e5420/early_init.c | 32 ++++
- src/mainboard/dell/e5420/gma-mainboard.ads | 20 +++
- src/mainboard/dell/e5420/gpio.c | 195 +++++++++++++++++++++
- src/mainboard/dell/e5420/hda_verb.c | 33 ++++
- src/mainboard/dell/e5420/mainboard.c | 21 +++
- 18 files changed, 584 insertions(+)
- create mode 100644 src/mainboard/dell/e5420/Kconfig
- create mode 100644 src/mainboard/dell/e5420/Kconfig.name
- create mode 100644 src/mainboard/dell/e5420/Makefile.mk
- create mode 100644 src/mainboard/dell/e5420/acpi/ec.asl
- create mode 100644 src/mainboard/dell/e5420/acpi/platform.asl
- create mode 100644 src/mainboard/dell/e5420/acpi/superio.asl
- create mode 100644 src/mainboard/dell/e5420/acpi_tables.c
- create mode 100644 src/mainboard/dell/e5420/board_info.txt
- create mode 100644 src/mainboard/dell/e5420/cmos.default
- create mode 100644 src/mainboard/dell/e5420/cmos.layout
- create mode 100755 src/mainboard/dell/e5420/data.vbt
- create mode 100644 src/mainboard/dell/e5420/devicetree.cb
- create mode 100644 src/mainboard/dell/e5420/dsdt.asl
- create mode 100644 src/mainboard/dell/e5420/early_init.c
- create mode 100644 src/mainboard/dell/e5420/gma-mainboard.ads
- create mode 100644 src/mainboard/dell/e5420/gpio.c
- create mode 100644 src/mainboard/dell/e5420/hda_verb.c
- create mode 100644 src/mainboard/dell/e5420/mainboard.c
-
-diff --git a/src/mainboard/dell/e5420/Kconfig b/src/mainboard/dell/e5420/Kconfig
-new file mode 100644
-index 0000000000..f4385045ae
---- /dev/null
-+++ b/src/mainboard/dell/e5420/Kconfig
-@@ -0,0 +1,37 @@
-+if BOARD_DELL_LATITUDE_E5420
-+
-+config BOARD_SPECIFIC_OPTIONS
-+ def_bool y
-+ select BOARD_ROMSIZE_KB_6144
-+ select EC_ACPI
-+ select EC_DELL_MEC5035
-+ select GFX_GMA_PANEL_1_ON_LVDS
-+ select HAVE_ACPI_RESUME
-+ select HAVE_ACPI_TABLES
-+ select HAVE_CMOS_DEFAULT
-+ select HAVE_OPTION_TABLE
-+ select INTEL_GMA_HAVE_VBT
-+ select INTEL_INT15
-+ select MAINBOARD_HAS_LIBGFXINIT
-+ select NORTHBRIDGE_INTEL_SANDYBRIDGE
-+ select SERIRQ_CONTINUOUS_MODE
-+ select SOUTHBRIDGE_INTEL_BD82X6X
-+ select SYSTEM_TYPE_LAPTOP
-+ select USE_NATIVE_RAMINIT
-+
-+config DRAM_RESET_GATE_GPIO
-+ default 60
-+
-+config MAINBOARD_DIR
-+ default "dell/e5420"
-+
-+config MAINBOARD_PART_NUMBER
-+ default "Latitude E5420"
-+
-+config USBDEBUG_HCD_INDEX
-+ default 2
-+
-+config VGA_BIOS_ID
-+ default "8086,0116"
-+
-+endif # BOARD_DELL_LATITUDE_E5420
-diff --git a/src/mainboard/dell/e5420/Kconfig.name b/src/mainboard/dell/e5420/Kconfig.name
-new file mode 100644
-index 0000000000..eb495fb705
---- /dev/null
-+++ b/src/mainboard/dell/e5420/Kconfig.name
-@@ -0,0 +1,2 @@
-+config BOARD_DELL_LATITUDE_E5420
-+ bool "Latitude E5420"
-diff --git a/src/mainboard/dell/e5420/Makefile.mk b/src/mainboard/dell/e5420/Makefile.mk
-new file mode 100644
-index 0000000000..18391d8b18
---- /dev/null
-+++ b/src/mainboard/dell/e5420/Makefile.mk
-@@ -0,0 +1,5 @@
-+bootblock-y += early_init.c
-+bootblock-y += gpio.c
-+romstage-y += early_init.c
-+romstage-y += gpio.c
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-diff --git a/src/mainboard/dell/e5420/acpi/ec.asl b/src/mainboard/dell/e5420/acpi/ec.asl
-new file mode 100644
-index 0000000000..0d429410a9
---- /dev/null
-+++ b/src/mainboard/dell/e5420/acpi/ec.asl
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Device(EC)
-+{
-+ Name (_HID, EISAID("PNP0C09"))
-+ Name (_UID, 0)
-+ Name (_GPE, 16)
-+/* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e5420/acpi/platform.asl b/src/mainboard/dell/e5420/acpi/platform.asl
-new file mode 100644
-index 0000000000..2d24bbd9b9
---- /dev/null
-+++ b/src/mainboard/dell/e5420/acpi/platform.asl
-@@ -0,0 +1,12 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+Method(_WAK, 1)
-+{
-+ /* FIXME: EC support */
-+ Return(Package() {0, 0})
-+}
-+
-+Method(_PTS,1)
-+{
-+ /* FIXME: EC support */
-+}
-diff --git a/src/mainboard/dell/e5420/acpi/superio.asl b/src/mainboard/dell/e5420/acpi/superio.asl
-new file mode 100644
-index 0000000000..55b1db5b11
---- /dev/null
-+++ b/src/mainboard/dell/e5420/acpi/superio.asl
-@@ -0,0 +1,3 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <drivers/pc80/pc/ps2_controller.asl>
-diff --git a/src/mainboard/dell/e5420/acpi_tables.c b/src/mainboard/dell/e5420/acpi_tables.c
-new file mode 100644
-index 0000000000..e2759659bf
---- /dev/null
-+++ b/src/mainboard/dell/e5420/acpi_tables.c
-@@ -0,0 +1,16 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <acpi/acpi_gnvs.h>
-+#include <soc/nvs.h>
-+
-+/* FIXME: check this function. */
-+void mainboard_fill_gnvs(struct global_nvs *gnvs)
-+{
-+ /* The lid is open by default. */
-+ gnvs->lids = 1;
-+
-+ /* Temperature at which OS will shutdown */
-+ gnvs->tcrt = 100;
-+ /* Temperature at which OS will throttle CPU */
-+ gnvs->tpsv = 90;
-+}
-diff --git a/src/mainboard/dell/e5420/board_info.txt b/src/mainboard/dell/e5420/board_info.txt
-new file mode 100644
-index 0000000000..34d5ad9e0b
---- /dev/null
-+++ b/src/mainboard/dell/e5420/board_info.txt
-@@ -0,0 +1,6 @@
-+Category: laptop
-+ROM package: SOIC-8
-+ROM protocol: SPI
-+ROM socketed: n
-+Flashrom support: y
-+Release year: 2011
-diff --git a/src/mainboard/dell/e5420/cmos.default b/src/mainboard/dell/e5420/cmos.default
-new file mode 100644
-index 0000000000..279415dfd1
---- /dev/null
-+++ b/src/mainboard/dell/e5420/cmos.default
-@@ -0,0 +1,9 @@
-+boot_option=Fallback
-+debug_level=Debug
-+power_on_after_fail=Disable
-+nmi=Enable
-+bluetooth=Enable
-+wwan=Enable
-+wlan=Enable
-+sata_mode=AHCI
-+me_state=Disabled
-diff --git a/src/mainboard/dell/e5420/cmos.layout b/src/mainboard/dell/e5420/cmos.layout
-new file mode 100644
-index 0000000000..1aa7e77bce
---- /dev/null
-+++ b/src/mainboard/dell/e5420/cmos.layout
-@@ -0,0 +1,88 @@
-+## SPDX-License-Identifier: GPL-2.0-only
-+
-+# -----------------------------------------------------------------
-+entries
-+
-+# -----------------------------------------------------------------
-+0 120 r 0 reserved_memory
-+
-+# -----------------------------------------------------------------
-+# RTC_BOOT_BYTE (coreboot hardcoded)
-+384 1 e 4 boot_option
-+388 4 h 0 reboot_counter
-+
-+# -----------------------------------------------------------------
-+# coreboot config options: console
-+395 4 e 6 debug_level
-+
-+#400 8 r 0 reserved for century byte
-+
-+# coreboot config options: southbridge
-+408 1 e 1 nmi
-+409 2 e 7 power_on_after_fail
-+411 1 e 9 sata_mode
-+
-+# coreboot config options: EC
-+412 1 e 1 bluetooth
-+413 1 e 1 wwan
-+414 1 e 1 wlan
-+
-+# coreboot config options: ME
-+424 1 e 14 me_state
-+425 2 h 0 me_state_prev
-+
-+# coreboot config options: northbridge
-+432 3 e 11 gfx_uma_size
-+435 2 e 12 hybrid_graphics_mode
-+440 8 h 0 volume
-+
-+# VBOOT
-+448 128 r 0 vbnv
-+
-+# SandyBridge MRC Scrambler Seed values
-+896 32 r 0 mrc_scrambler_seed
-+928 32 r 0 mrc_scrambler_seed_s3
-+960 16 r 0 mrc_scrambler_seed_chk
-+
-+# coreboot config options: check sums
-+984 16 h 0 check_sum
-+
-+# -----------------------------------------------------------------
-+
-+enumerations
-+
-+#ID value text
-+1 0 Disable
-+1 1 Enable
-+2 0 Enable
-+2 1 Disable
-+4 0 Fallback
-+4 1 Normal
-+6 0 Emergency
-+6 1 Alert
-+6 2 Critical
-+6 3 Error
-+6 4 Warning
-+6 5 Notice
-+6 6 Info
-+6 7 Debug
-+6 8 Spew
-+7 0 Disable
-+7 1 Enable
-+7 2 Keep
-+9 0 AHCI
-+9 1 Compatible
-+11 0 32M
-+11 1 64M
-+11 2 96M
-+11 3 128M
-+11 4 160M
-+11 5 192M
-+11 6 224M
-+14 0 Normal
-+14 1 Disabled
-+
-+# -----------------------------------------------------------------
-+checksums
-+
-+checksum 392 447 984
-diff --git a/src/mainboard/dell/e5420/data.vbt b/src/mainboard/dell/e5420/data.vbt
-new file mode 100755
-index 0000000000000000000000000000000000000000..98b82fe6110fd295b5749041ec7f8c084ace5f57
-GIT binary patch
-literal 6144
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-z$#$~YiXtY*GpHp#@FvHJ1UnBD*H%d+{_j24XE4nmBa*?5mOWiold28s3}>*}<HaeO
-z+1|-8g2)FCfkDZIdb-Ub);z0#;XEbPfGe?A72!{DAUg|$m+Z~(i@h9j4gtm611ni(
-z#u>ACcP}M4exU`*MKVwl5+t6JBpTkmm}xWflKUe~7}`!#%z#gAo{NxUrpDAndYktu
-zI0}VLU`J7^xmF1AFiz5S^uzp*DPI$%$qq!(ikh0kP+(GKzF|@N?Y%_#Vp@M+xHr$F
-z=%+18z`-fT%z)9-TS$~Dh@2yeN7!UIt0h`fWxUu`JvA_ra*8P48l%7KR0&c1;0R75
-z4f0oz(xQ3MWqz5>qW5M4tZWExHs8<H(e1G@4km@5wEzOOP^x<l`YmA|eKs6j3wl8B
-z%C%;uygh%<#kGZ{fymL+OlV0!-*T!V5IB>X@p!@CBU=7e{5^Jl{s7by`po-AJqM2l
-znk(=^0bHkF0rUw7)^7j;$=_UIs8`6P6b-;vPDZ#U9L)W1_PAYRDP9k~;5$stt5ZiV
-zD0>;i-?OlYY2}P9WVnfGos4xee2r=EGWHR}ADH$VV>cO=xU?!4TjIi)OMBYI_PX#b
-zm-eBHed5BOT-x6*W>;{IqAga~G6lCQT93k>Q}CpsomJR*1%FjEkv?fuT%c-8RklXO
-zU8;6KWk*zeU)4TW+1D!mrE0EhHZfbBeN{4S7X@Pig%};A99QTdA~wZruL*8y?K!jP
-zG5R*k=);S}Zn<T;W!Mxt`(!+z7_r@3LVpf|FESauM&4}+wqzXfba-zG>A}on(uzNF
-zyu>BcjA})C@bg%<;+Eh2;Sz4heFFCbZ@C{FrXMIbYzu>?Bi-|vZ}JSFU%JA>7$7et
-z0Yo%CnOVZm#ZA}4kWZOn15};h5*#OM3b+6vHzgruMP>=5MNJK1y42{YgveP-!j%#(
-z0rGe@8t%!=66Ti%K4|Gx=o7gFp83wQ;+s3H7+r^SKlpp3KKcr!3@|n;NCH_=qL=3T
-zq3WH?en`b+W-HR-fnrhw*9aZ%M}lHX7@H?E>!6wv_&YQFEHdA$%Z1R--yub>=c@p?
-z6@7Fc$&>sAxwiz{BE$1kb$K9Co=ozlA973y^i(^BM|EZ$$^y`0KyHiMJ%O*XbfEX1
-ziZaH>W(1pWL0bo|T!x__N$^$DpmxI=bL6WUK3JGyn?rw-qC4ZA$yGjIB}N(=ldD2O
-zAJ@bxp<qR-3lIv<!P~SE8r*#_Ckl?$0|1fZ>2>n}u*mUIYFd>}O_wuwBD^r9<#=!0
-X1LGbT_rSOZ#yv3ZfpHH!G!Og(1Xg~J
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/dell/e5420/devicetree.cb b/src/mainboard/dell/e5420/devicetree.cb
-new file mode 100644
-index 0000000000..f26413557d
---- /dev/null
-+++ b/src/mainboard/dell/e5420/devicetree.cb
-@@ -0,0 +1,66 @@
-+chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
-+ register "gfx" = "GMA_STATIC_DISPLAYS(1)"
-+ register "gpu_cpu_backlight" = "0x00000c31"
-+ register "gpu_dp_b_hotplug" = "4"
-+ register "gpu_dp_c_hotplug" = "4"
-+ register "gpu_dp_d_hotplug" = "4"
-+ register "gpu_panel_port_select" = "0"
-+ register "gpu_panel_power_backlight_off_delay" = "2300"
-+ register "gpu_panel_power_backlight_on_delay" = "2300"
-+ register "gpu_panel_power_cycle_delay" = "6"
-+ register "gpu_panel_power_down_delay" = "400"
-+ register "gpu_panel_power_up_delay" = "400"
-+ register "gpu_pch_backlight" = "0x13121312"
-+
-+ register "spd_addresses" = "{0x50, 0, 0x52, 0}"
-+
-+ device domain 0x0 on
-+ subsystemid 0x1028 0x049b inherit
-+
-+ device ref host_bridge on end # Host bridge
-+ device ref peg10 on end # PEG
-+ device ref igd on end # iGPU
-+
-+ chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
-+ register "docking_supported" = "1"
-+ register "gen1_dec" = "0x007c0681"
-+ register "gen2_dec" = "0x007c0901"
-+ register "gen3_dec" = "0x003c07e1"
-+ register "gen4_dec" = "0x001c0901"
-+ register "gpi0_routing" = "2"
-+ register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 1, 0 }"
-+ register "pcie_port_coalesce" = "1"
-+ register "sata_interface_speed_support" = "0x3"
-+ register "sata_port_map" = "0x3b"
-+ register "spi_lvscc" = "0x2005"
-+ register "spi_uvscc" = "0x2005"
-+
-+ device ref mei1 off end
-+ device ref mei2 off end
-+ device ref me_ide_r off end
-+ device ref me_kt off end
-+ device ref gbe off end
-+ device ref ehci2 on end
-+ device ref hda on end
-+ device ref pcie_rp1 on end
-+ device ref pcie_rp2 on end
-+ device ref pcie_rp3 on end
-+ device ref pcie_rp4 off end
-+ device ref pcie_rp5 on end
-+ device ref pcie_rp6 on end
-+ device ref pcie_rp7 on end
-+ device ref pcie_rp8 off end
-+ device ref ehci1 on end
-+ device ref pci_bridge off end
-+ device ref lpc on
-+ chip ec/dell/mec5035
-+ device pnp ff.0 on end
-+ end
-+ end
-+ device ref sata1 on end
-+ device ref smbus on end
-+ device ref sata2 off end
-+ device ref thermal off end
-+ end
-+ end
-+end
-diff --git a/src/mainboard/dell/e5420/dsdt.asl b/src/mainboard/dell/e5420/dsdt.asl
-new file mode 100644
-index 0000000000..7d13c55b08
---- /dev/null
-+++ b/src/mainboard/dell/e5420/dsdt.asl
-@@ -0,0 +1,30 @@
-+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
-+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <acpi/acpi.h>
-+
-+DefinitionBlock(
-+ "dsdt.aml",
-+ "DSDT",
-+ ACPI_DSDT_REV_2,
-+ OEM_ID,
-+ ACPI_TABLE_CREATOR,
-+ 0x20141018 /* OEM revision */
-+)
-+{
-+ #include <acpi/dsdt_top.asl>
-+ #include "acpi/platform.asl"
-+ #include <cpu/intel/common/acpi/cpu.asl>
-+ #include <southbridge/intel/common/acpi/platform.asl>
-+ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
-+ #include <southbridge/intel/common/acpi/sleepstates.asl>
-+
-+ Device (\_SB.PCI0)
-+ {
-+ #include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
-+ #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
-+ #include <southbridge/intel/bd82x6x/acpi/pch.asl>
-+ }
-+}
-diff --git a/src/mainboard/dell/e5420/early_init.c b/src/mainboard/dell/e5420/early_init.c
-new file mode 100644
-index 0000000000..7297921546
---- /dev/null
-+++ b/src/mainboard/dell/e5420/early_init.c
-@@ -0,0 +1,32 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+
-+#include <bootblock_common.h>
-+#include <device/pci_ops.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+
-+const struct southbridge_usb_port mainboard_usb_ports[] = {
-+ { 1, 1, 0 },
-+ { 1, 1, 0 },
-+ { 1, 1, 1 },
-+ { 1, 1, 1 },
-+ { 1, 1, 2 },
-+ { 1, 1, 2 },
-+ { 1, 1, 3 },
-+ { 1, 1, 3 },
-+ { 1, 1, 5 },
-+ { 1, 1, 5 },
-+ { 1, 1, 7 },
-+ { 1, 1, 6 },
-+ { 1, 1, 6 },
-+ { 1, 1, 7 },
-+};
-+
-+void bootblock_mainboard_early_init(void)
-+{
-+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
-+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
-+ | COMB_LPC_EN | COMA_LPC_EN);
-+ mec5035_early_init();
-+}
-diff --git a/src/mainboard/dell/e5420/gma-mainboard.ads b/src/mainboard/dell/e5420/gma-mainboard.ads
-new file mode 100644
-index 0000000000..2a16f44360
---- /dev/null
-+++ b/src/mainboard/dell/e5420/gma-mainboard.ads
-@@ -0,0 +1,20 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+ ports : constant Port_List :=
-+ (
-+ HDMI1, -- mainboard HDMI
-+ DP2, -- dock DP
-+ DP3, -- dock DP
-+ Analog, -- mainboard VGA
-+ LVDS,
-+ others => Disabled);
-+
-+end GMA.Mainboard;
-diff --git a/src/mainboard/dell/e5420/gpio.c b/src/mainboard/dell/e5420/gpio.c
-new file mode 100644
-index 0000000000..f76b93d9f0
---- /dev/null
-+++ b/src/mainboard/dell/e5420/gpio.c
-@@ -0,0 +1,195 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <southbridge/intel/common/gpio.h>
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
-+ .gpio0 = GPIO_MODE_GPIO,
-+ .gpio1 = GPIO_MODE_NATIVE,
-+ .gpio2 = GPIO_MODE_GPIO,
-+ .gpio3 = GPIO_MODE_GPIO,
-+ .gpio4 = GPIO_MODE_GPIO,
-+ .gpio5 = GPIO_MODE_NATIVE,
-+ .gpio6 = GPIO_MODE_GPIO,
-+ .gpio7 = GPIO_MODE_GPIO,
-+ .gpio8 = GPIO_MODE_GPIO,
-+ .gpio9 = GPIO_MODE_NATIVE,
-+ .gpio10 = GPIO_MODE_NATIVE,
-+ .gpio11 = GPIO_MODE_NATIVE,
-+ .gpio12 = GPIO_MODE_GPIO,
-+ .gpio13 = GPIO_MODE_GPIO,
-+ .gpio14 = GPIO_MODE_GPIO,
-+ .gpio15 = GPIO_MODE_GPIO,
-+ .gpio16 = GPIO_MODE_NATIVE,
-+ .gpio17 = GPIO_MODE_GPIO,
-+ .gpio18 = GPIO_MODE_NATIVE,
-+ .gpio19 = GPIO_MODE_GPIO,
-+ .gpio20 = GPIO_MODE_NATIVE,
-+ .gpio21 = GPIO_MODE_GPIO,
-+ .gpio22 = GPIO_MODE_GPIO,
-+ .gpio23 = GPIO_MODE_NATIVE,
-+ .gpio24 = GPIO_MODE_GPIO,
-+ .gpio25 = GPIO_MODE_NATIVE,
-+ .gpio26 = GPIO_MODE_NATIVE,
-+ .gpio27 = GPIO_MODE_GPIO,
-+ .gpio28 = GPIO_MODE_GPIO,
-+ .gpio29 = GPIO_MODE_GPIO,
-+ .gpio30 = GPIO_MODE_GPIO,
-+ .gpio31 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
-+ .gpio0 = GPIO_DIR_INPUT,
-+ .gpio2 = GPIO_DIR_INPUT,
-+ .gpio3 = GPIO_DIR_INPUT,
-+ .gpio4 = GPIO_DIR_INPUT,
-+ .gpio6 = GPIO_DIR_INPUT,
-+ .gpio7 = GPIO_DIR_INPUT,
-+ .gpio8 = GPIO_DIR_INPUT,
-+ .gpio12 = GPIO_DIR_OUTPUT,
-+ .gpio13 = GPIO_DIR_INPUT,
-+ .gpio14 = GPIO_DIR_INPUT,
-+ .gpio15 = GPIO_DIR_INPUT,
-+ .gpio17 = GPIO_DIR_INPUT,
-+ .gpio19 = GPIO_DIR_INPUT,
-+ .gpio21 = GPIO_DIR_INPUT,
-+ .gpio22 = GPIO_DIR_INPUT,
-+ .gpio24 = GPIO_DIR_INPUT,
-+ .gpio27 = GPIO_DIR_INPUT,
-+ .gpio28 = GPIO_DIR_INPUT,
-+ .gpio29 = GPIO_DIR_INPUT,
-+ .gpio30 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_level = {
-+ .gpio12 = GPIO_LEVEL_HIGH,
-+ .gpio30 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
-+ .gpio0 = GPIO_INVERT,
-+ .gpio8 = GPIO_INVERT,
-+ .gpio14 = GPIO_INVERT,
-+};
-+
-+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
-+ .gpio32 = GPIO_MODE_NATIVE,
-+ .gpio33 = GPIO_MODE_GPIO,
-+ .gpio34 = GPIO_MODE_GPIO,
-+ .gpio35 = GPIO_MODE_GPIO,
-+ .gpio36 = GPIO_MODE_GPIO,
-+ .gpio37 = GPIO_MODE_GPIO,
-+ .gpio38 = GPIO_MODE_GPIO,
-+ .gpio39 = GPIO_MODE_GPIO,
-+ .gpio40 = GPIO_MODE_NATIVE,
-+ .gpio41 = GPIO_MODE_NATIVE,
-+ .gpio42 = GPIO_MODE_NATIVE,
-+ .gpio43 = GPIO_MODE_NATIVE,
-+ .gpio44 = GPIO_MODE_NATIVE,
-+ .gpio45 = GPIO_MODE_NATIVE,
-+ .gpio46 = GPIO_MODE_GPIO,
-+ .gpio47 = GPIO_MODE_NATIVE,
-+ .gpio48 = GPIO_MODE_GPIO,
-+ .gpio49 = GPIO_MODE_NATIVE,
-+ .gpio50 = GPIO_MODE_GPIO,
-+ .gpio51 = GPIO_MODE_GPIO,
-+ .gpio52 = GPIO_MODE_GPIO,
-+ .gpio53 = GPIO_MODE_GPIO,
-+ .gpio54 = GPIO_MODE_GPIO,
-+ .gpio55 = GPIO_MODE_GPIO,
-+ .gpio56 = GPIO_MODE_GPIO,
-+ .gpio57 = GPIO_MODE_GPIO,
-+ .gpio58 = GPIO_MODE_NATIVE,
-+ .gpio59 = GPIO_MODE_NATIVE,
-+ .gpio60 = GPIO_MODE_GPIO,
-+ .gpio61 = GPIO_MODE_NATIVE,
-+ .gpio62 = GPIO_MODE_NATIVE,
-+ .gpio63 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
-+ .gpio33 = GPIO_DIR_INPUT,
-+ .gpio34 = GPIO_DIR_OUTPUT,
-+ .gpio35 = GPIO_DIR_INPUT,
-+ .gpio36 = GPIO_DIR_INPUT,
-+ .gpio37 = GPIO_DIR_OUTPUT,
-+ .gpio38 = GPIO_DIR_INPUT,
-+ .gpio39 = GPIO_DIR_INPUT,
-+ .gpio46 = GPIO_DIR_OUTPUT,
-+ .gpio48 = GPIO_DIR_INPUT,
-+ .gpio50 = GPIO_DIR_OUTPUT,
-+ .gpio51 = GPIO_DIR_OUTPUT,
-+ .gpio52 = GPIO_DIR_INPUT,
-+ .gpio53 = GPIO_DIR_INPUT,
-+ .gpio54 = GPIO_DIR_INPUT,
-+ .gpio55 = GPIO_DIR_OUTPUT,
-+ .gpio56 = GPIO_DIR_INPUT,
-+ .gpio57 = GPIO_DIR_INPUT,
-+ .gpio60 = GPIO_DIR_OUTPUT,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_level = {
-+ .gpio34 = GPIO_LEVEL_LOW,
-+ .gpio37 = GPIO_LEVEL_LOW,
-+ .gpio46 = GPIO_LEVEL_HIGH,
-+ .gpio50 = GPIO_LEVEL_HIGH,
-+ .gpio51 = GPIO_LEVEL_LOW,
-+ .gpio55 = GPIO_LEVEL_LOW,
-+ .gpio60 = GPIO_LEVEL_HIGH,
-+};
-+
-+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
-+ .gpio64 = GPIO_MODE_NATIVE,
-+ .gpio65 = GPIO_MODE_NATIVE,
-+ .gpio66 = GPIO_MODE_NATIVE,
-+ .gpio67 = GPIO_MODE_NATIVE,
-+ .gpio68 = GPIO_MODE_NATIVE,
-+ .gpio69 = GPIO_MODE_NATIVE,
-+ .gpio70 = GPIO_MODE_NATIVE,
-+ .gpio71 = GPIO_MODE_NATIVE,
-+ .gpio72 = GPIO_MODE_NATIVE,
-+ .gpio73 = GPIO_MODE_NATIVE,
-+ .gpio74 = GPIO_MODE_GPIO,
-+ .gpio75 = GPIO_MODE_NATIVE,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
-+ .gpio74 = GPIO_DIR_INPUT,
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_level = {
-+};
-+
-+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
-+};
-+
-+const struct pch_gpio_map mainboard_gpio_map = {
-+ .set1 = {
-+ .mode = &pch_gpio_set1_mode,
-+ .direction = &pch_gpio_set1_direction,
-+ .level = &pch_gpio_set1_level,
-+ .blink = &pch_gpio_set1_blink,
-+ .invert = &pch_gpio_set1_invert,
-+ .reset = &pch_gpio_set1_reset,
-+ },
-+ .set2 = {
-+ .mode = &pch_gpio_set2_mode,
-+ .direction = &pch_gpio_set2_direction,
-+ .level = &pch_gpio_set2_level,
-+ .reset = &pch_gpio_set2_reset,
-+ },
-+ .set3 = {
-+ .mode = &pch_gpio_set3_mode,
-+ .direction = &pch_gpio_set3_direction,
-+ .level = &pch_gpio_set3_level,
-+ .reset = &pch_gpio_set3_reset,
-+ },
-+};
-diff --git a/src/mainboard/dell/e5420/hda_verb.c b/src/mainboard/dell/e5420/hda_verb.c
-new file mode 100644
-index 0000000000..70e7c2e79a
---- /dev/null
-+++ b/src/mainboard/dell/e5420/hda_verb.c
-@@ -0,0 +1,33 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/azalia_device.h>
-+
-+const u32 cim_verb_data[] = {
-+ 0x111d76e7, /* Codec Vendor / Device ID: IDT */
-+ 0x1028049b, /* Subsystem ID */
-+ 11, /* Number of 4 dword sets */
-+ AZALIA_SUBVENDOR(0, 0x1028049b),
-+ AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
-+ AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
-+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
-+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
-+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
-+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
-+ AZALIA_PIN_CFG(0, 0x11, 0x400000f0),
-+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
-+ AZALIA_PIN_CFG(0, 0x20, 0xd5a30130),
-+
-+ 0x80862805, /* Codec Vendor / Device ID: Intel */
-+ 0x80860101, /* Subsystem ID */
-+ 4, /* Number of 4 dword sets */
-+ AZALIA_SUBVENDOR(3, 0x80860101),
-+ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-+ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-+ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-+
-+};
-+
-+const u32 pc_beep_verbs[0] = {};
-+
-+AZALIA_ARRAY_SIZES;
-diff --git a/src/mainboard/dell/e5420/mainboard.c b/src/mainboard/dell/e5420/mainboard.c
-new file mode 100644
-index 0000000000..31e49802fc
---- /dev/null
-+++ b/src/mainboard/dell/e5420/mainboard.c
-@@ -0,0 +1,21 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <device/device.h>
-+#include <drivers/intel/gma/int15.h>
-+#include <southbridge/intel/bd82x6x/pch.h>
-+#include <ec/acpi/ec.h>
-+#include <console/console.h>
-+#include <pc80/keyboard.h>
-+
-+static void mainboard_enable(struct device *dev)
-+{
-+
-+ /* FIXME: fix these values. */
-+ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
-+ GMA_INT15_PANEL_FIT_DEFAULT,
-+ GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-+}
-+
-+struct chip_operations mainboard_ops = {
-+ .enable_dev = mainboard_enable,
-+};
---
-2.44.0
-
diff --git a/config/coreboot/default/patches/0039-fix-sata-ports-on-dell-9020-sff-and-mt.patch b/config/coreboot/default/patches/0039-fix-sata-ports-on-dell-9020-sff-and-mt.patch
deleted file mode 100644
index f4c3939c..00000000
--- a/config/coreboot/default/patches/0039-fix-sata-ports-on-dell-9020-sff-and-mt.patch
+++ /dev/null
@@ -1,66 +0,0 @@
-From 4889f08306f1530211dcc6f6a4e999c6cc72f3ac Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sat, 30 Mar 2024 05:57:54 +0000
-Subject: [PATCH 1/1] fix sata ports on dell 9020 sff and mt
-
-mate kukri has a patch under review on coreboot that sets
-sata port map to 0x7 on sff and 0xf on mt.
-
-see: intel 8 series pch datasheet, section 13.1.35
-
-basically, the 6 least significant bits enable the sata
-slots; 1 for enable and 0 for disable. there can be up
-to 6 ports. least significant bit is port 0, then next
-is port 1, and so on.
-
-coreboot currently enables ports 0, 1, 4 and 5, making this
-value 0x33 (converted to binary: 00110011). sff has ports
-0, 1 and 2 wired, so mate changed that to 0x7 (00000111).
-
-on mt, the blue ports are ports 0 and 1, but the two white
-ports don't work, but coreboot enables 4 and 5; it is
-likely that the blue ports are in fact 0 and 1, and the
-white ports are 2 and 3, but we've not tested this!
-
-it could be that the blue ports are ports 4 and 5, and
-the white ports are 2 and 3! we have not yet determined
-this, but mate set it to 0xf, meaning ports 0 1 2 and 3
-are enabled, in his patch under review. the chance that
-it's 2, 3, 4 and 5 on the board is unlikely, but it is
-theoretically possible and has not been confirmed.
-
-therefore, for now, i will set the value to 0x3f, which
-in binary is 00111111, thus enabling all 6 slots. the two
-that aren't physically wired don't really matter. enabling
-ports (from the pch) that electrically aren't there and
-then powering on is electrically equivalent to those ports
-being actually being wired, but with no devices plugged
-into them. therefore, 0x3f is an effective shotgun fix.
-
-i'll remove this patch and use mate's fix when the latter
-has been tested on MT; it has already been tested on SFF.
-
-this patch fixes the 3rd sata slot on 9020 sff, and the 3rd
-and 4th sata slots on 9020 MT
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/mainboard/dell/optiplex_9020/devicetree.cb | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/dell/optiplex_9020/devicetree.cb b/src/mainboard/dell/optiplex_9020/devicetree.cb
-index c0b17a15ff..7bfa6736a6 100644
---- a/src/mainboard/dell/optiplex_9020/devicetree.cb
-+++ b/src/mainboard/dell/optiplex_9020/devicetree.cb
-@@ -23,7 +23,7 @@ chip northbridge/intel/haswell
- register "gen2_dec" = "0x007c0901"
- register "gen3_dec" = "0x003c07e1"
- register "gen4_dec" = "0x001c0901"
-- register "sata_port_map" = "0x33"
-+ register "sata_port_map" = "0x3f"
-
- device pci 14.0 on end # xHCI controller
- device pci 16.0 on end # Management Engine interface 1
---
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0027-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch b/config/coreboot/default/patches/0039-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
index 9b6020a2..2b5173c5 100644
--- a/config/coreboot/haswell/patches/0027-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
+++ b/config/coreboot/default/patches/0039-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
@@ -1,7 +1,7 @@
-From b75d9e385137b3b561fc7220c04f742817d319b2 Mon Sep 17 00:00:00 2001
+From b24c5caf5a8f63555d3b71e7a786c822a4c262cc Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sat, 4 May 2024 02:00:53 +0100
-Subject: [PATCH 1/1] nb/haswell: lock policy regs when disabling IOMMU
+Subject: [PATCH 39/65] nb/haswell: lock policy regs when disabling IOMMU
Angel Pons told me I should do it. See comments here:
https://review.coreboot.org/c/coreboot/+/81016
@@ -51,5 +51,5 @@ index 1a7e0b1076..e9506ee830 100644
/* Set L3HIT2PEND_DIS, lock GFXVTBAR policy config registers */
u32 reg32;
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch b/config/coreboot/default/patches/0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch
deleted file mode 100644
index 7a02d902..00000000
--- a/config/coreboot/default/patches/0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From c6ce9c635e6576c86c546177c3d770dec2f3c9ae Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Fri, 23 Feb 2024 13:33:31 +0000
-Subject: [PATCH 1/1] nb/haswell: Disable iGPU when dGPU is used
-
-This is usually is handled by Haswell mrc.bin, disabling VGA
-decode on the iGPU when a dGPU is installed. However, Broadwell
-mrc.bin does not, so the iGPU and dGPU are both enabled.
-
-This patch disables legacy VGA cycles for iGPU, under such
-conditions. It has been tested on Broadwell mrc.bin when
-using a graphics card on Dell OptiPlex 9020 SFF (currently
-under review at this time of writing, submitted by Mate
-Kukri).
-
-This patch has also been tested when Haswell mrc.bin is used,
-and there are seemingly no breaking changes caused by it.
-
-Change-Id: I1df0a3aa42f8475b7741007bf3e28c2e089d916b
-Signed-off-by: Leah Rowe <info@minifree.org>
-Reviewed-on: https://review.coreboot.org/c/coreboot/+/80717
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-Reviewed-by: Nico Huber <nico.h@gmx.de>
----
- src/northbridge/intel/haswell/gma.c | 7 +++++++
- 1 file changed, 7 insertions(+)
-
-diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
-index 6e6948b70f..48a0ba54c7 100644
---- a/src/northbridge/intel/haswell/gma.c
-+++ b/src/northbridge/intel/haswell/gma.c
-@@ -461,12 +461,19 @@ static void gma_generate_ssdt(const struct device *dev)
- drivers_intel_gma_displays_ssdt_generate(&chip->gfx);
- }
-
-+static void gma_func0_disable(struct device *dev)
-+{
-+ /* Disable VGA decode */
-+ pci_or_config16(pcidev_on_root(0, 0), GGC, 1 << 1);
-+}
-+
- static struct device_operations gma_func0_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .init = gma_func0_init,
- .acpi_fill_ssdt = gma_generate_ssdt,
-+ .vga_disable = gma_func0_disable,
- .ops_pci = &pci_dev_ops_pci,
- };
-
---
-2.39.2
-
diff --git a/config/coreboot/dell/patches/0008-nb-intel-gm45-Make-DDR2-raminit-work.patch b/config/coreboot/default/patches/0040-nb-intel-gm45-Make-DDR2-raminit-work.patch
index 8de8060f..a75edd47 100644
--- a/config/coreboot/dell/patches/0008-nb-intel-gm45-Make-DDR2-raminit-work.patch
+++ b/config/coreboot/default/patches/0040-nb-intel-gm45-Make-DDR2-raminit-work.patch
@@ -1,7 +1,7 @@
-From f26df5dff7be4b0c9d8dced1cf6ed07472a174c7 Mon Sep 17 00:00:00 2001
+From c41e97f85f2a2677c742d62e3080af7cfeb2ef23 Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Mon, 10 May 2021 22:40:59 +0200
-Subject: [PATCH 8/9] nb/intel/gm45: Make DDR2 raminit work
+Subject: [PATCH 40/65] nb/intel/gm45: Make DDR2 raminit work
List of changes:
- Update some timing and ODT values
@@ -20,10 +20,10 @@ Signed-off-by: Angel Pons <th3fanbus@gmail.com>
3 files changed, 106 insertions(+), 13 deletions(-)
diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h
-index d929533d92..997f8a0e5a 100644
+index 5d9ac56606..338260ea7a 100644
--- a/src/northbridge/intel/gm45/gm45.h
+++ b/src/northbridge/intel/gm45/gm45.h
-@@ -419,7 +419,7 @@ void igd_compute_ggc(sysinfo_t *const sysinfo);
+@@ -420,7 +420,7 @@ void igd_compute_ggc(sysinfo_t *const sysinfo);
int raminit_read_vco_index(void);
u32 raminit_get_rank_addr(unsigned int channel, unsigned int rank);
@@ -219,5 +219,5 @@ index aef863f05a..b74765fd9c 100644
+ mchbar_clrsetbits32(0x4d0, 0x3f << 20, magic_comp[1] << 20);
}
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0041-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch b/config/coreboot/default/patches/0041-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
new file mode 100644
index 00000000..6ec32987
--- /dev/null
+++ b/config/coreboot/default/patches/0041-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch
@@ -0,0 +1,240 @@
+From 3110c4392d40175716f167be5ef8234f2b4cd030 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 6 Aug 2024 00:50:24 +0100
+Subject: [PATCH 41/65] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards
+
+We add this patch:
+
+commit commit_id_here
+Author: Angel Pons <th3fanbus@gmail.com>
+Date: Mon May 10 22:40:59 2021 +0200
+
+ nb/intel/gm45: Make DDR2 raminit work
+
+This patch was original applied, in lbmk, only on coreboot/dell,
+separately from coreboot/default, which was wasteful because it
+meant having an entire coreboot tree just for a single board. We
+did this, because the DDR2 RCOMP fix happened to break DDR3 init
+on other boards.
+
+What *this* new patch does on top of Angel's patch, is make sure
+that their changes only apply to DDR2, while DDR3 behaviour remains
+unchanged. This means that the Dell Latitude E6400 can be supported
+in the main coreboot tree, within lbmk.
+
+Essentially, this patch restores the old behaviour, prior to applying
+Angel's patch, only when DDR3 memory is used.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/northbridge/intel/gm45/raminit.c | 161 +++++++++---------
+ .../intel/gm45/raminit_rcomp_calibration.c | 9 +-
+ 2 files changed, 88 insertions(+), 82 deletions(-)
+
+diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
+index df8f46fbbc..433db3a68c 100644
+--- a/src/northbridge/intel/gm45/raminit.c
++++ b/src/northbridge/intel/gm45/raminit.c
+@@ -1117,7 +1117,10 @@ static void dram_program_timings(const int spd_type, const timings_t *const timi
+ reg = (reg & ~(0xf << 10)) | (2 << 10);
+ else
+ reg = (reg & ~(0xf << 10)) | (3 << 10);
+- reg = (reg & ~(0x7 << 5)) | (2 << 5);
++ if (spd_type == DDR2)
++ reg = (reg & ~(0x7 << 5)) | (2 << 5);
++ else
++ reg = (reg & ~(0x7 << 5)) | (3 << 5);
+ } else if (timings->mem_clock != MEM_CLOCK_1067MT) {
+ reg = (reg & ~(0x7 << 15)) | ((9 - timings->CAS) << 15);
+ reg = (reg & ~(0xf << 10)) | ((timings->CAS - 3) << 10);
+@@ -2209,83 +2212,85 @@ void raminit(sysinfo_t *const sysinfo, const int s3resume)
+ raminit_write_training(timings->mem_clock, dimms, s3resume);
+ }
+
+- /*
+- * Program hardcoded DDR2-800 RCOMP SRAM codes. This must be done
+- * after receiver enable calibration, otherwise raminit sometimes
+- * completes with non-working memory.
+- */
+- mchbar_write32(0x0530, 0x06060005);
+- mchbar_write32(0x0680, 0x06060606);
+- mchbar_write32(0x0684, 0x08070606);
+- mchbar_write32(0x0688, 0x0e0e0c0a);
+- mchbar_write32(0x068c, 0x0e0e0e0e);
+- mchbar_write32(0x0698, 0x06060606);
+- mchbar_write32(0x069c, 0x08070606);
+- mchbar_write32(0x06a0, 0x0c0c0b0a);
+- mchbar_write32(0x06a4, 0x0c0c0c0c);
+-
+- mchbar_write32(0x06c0, 0x02020202);
+- mchbar_write32(0x06c4, 0x03020202);
+- mchbar_write32(0x06c8, 0x04040403);
+- mchbar_write32(0x06cc, 0x04040404);
+- mchbar_write32(0x06d8, 0x02020202);
+- mchbar_write32(0x06dc, 0x03020202);
+- mchbar_write32(0x06e0, 0x04040403);
+- mchbar_write32(0x06e4, 0x04040404);
+-
+- mchbar_write32(0x0700, 0x02020202);
+- mchbar_write32(0x0704, 0x03020202);
+- mchbar_write32(0x0708, 0x04040403);
+- mchbar_write32(0x070c, 0x04040404);
+- mchbar_write32(0x0718, 0x02020202);
+- mchbar_write32(0x071c, 0x03020202);
+- mchbar_write32(0x0720, 0x04040403);
+- mchbar_write32(0x0724, 0x04040404);
+-
+- mchbar_write32(0x0740, 0x02020202);
+- mchbar_write32(0x0744, 0x03020202);
+- mchbar_write32(0x0748, 0x04040403);
+- mchbar_write32(0x074c, 0x04040404);
+- mchbar_write32(0x0758, 0x02020202);
+- mchbar_write32(0x075c, 0x03020202);
+- mchbar_write32(0x0760, 0x04040403);
+- mchbar_write32(0x0764, 0x04040404);
+-
+- mchbar_write32(0x0780, 0x06060606);
+- mchbar_write32(0x0784, 0x09070606);
+- mchbar_write32(0x0788, 0x0e0e0c0b);
+- mchbar_write32(0x078c, 0x0e0e0e0e);
+- mchbar_write32(0x0798, 0x06060606);
+- mchbar_write32(0x079c, 0x09070606);
+- mchbar_write32(0x07a0, 0x0d0d0c0b);
+- mchbar_write32(0x07a4, 0x0d0d0d0d);
+-
+- mchbar_write32(0x07c0, 0x06060606);
+- mchbar_write32(0x07c4, 0x09070606);
+- mchbar_write32(0x07c8, 0x0e0e0c0b);
+- mchbar_write32(0x07cc, 0x0e0e0e0e);
+- mchbar_write32(0x07d8, 0x06060606);
+- mchbar_write32(0x07dc, 0x09070606);
+- mchbar_write32(0x07e0, 0x0d0d0c0b);
+- mchbar_write32(0x07e4, 0x0d0d0d0d);
+-
+- mchbar_write32(0x0840, 0x06060606);
+- mchbar_write32(0x0844, 0x08070606);
+- mchbar_write32(0x0848, 0x0e0e0c0a);
+- mchbar_write32(0x084c, 0x0e0e0e0e);
+- mchbar_write32(0x0858, 0x06060606);
+- mchbar_write32(0x085c, 0x08070606);
+- mchbar_write32(0x0860, 0x0c0c0b0a);
+- mchbar_write32(0x0864, 0x0c0c0c0c);
+-
+- mchbar_write32(0x0880, 0x02020202);
+- mchbar_write32(0x0884, 0x03020202);
+- mchbar_write32(0x0888, 0x04040403);
+- mchbar_write32(0x088c, 0x04040404);
+- mchbar_write32(0x0898, 0x02020202);
+- mchbar_write32(0x089c, 0x03020202);
+- mchbar_write32(0x08a0, 0x04040403);
+- mchbar_write32(0x08a4, 0x04040404);
++ if (sysinfo->spd_type == DDR2) {
++ /*
++ * Program hardcoded DDR2-800 RCOMP SRAM codes. This must be done
++ * after receiver enable calibration, otherwise raminit sometimes
++ * completes with non-working memory.
++ */
++ mchbar_write32(0x0530, 0x06060005);
++ mchbar_write32(0x0680, 0x06060606);
++ mchbar_write32(0x0684, 0x08070606);
++ mchbar_write32(0x0688, 0x0e0e0c0a);
++ mchbar_write32(0x068c, 0x0e0e0e0e);
++ mchbar_write32(0x0698, 0x06060606);
++ mchbar_write32(0x069c, 0x08070606);
++ mchbar_write32(0x06a0, 0x0c0c0b0a);
++ mchbar_write32(0x06a4, 0x0c0c0c0c);
++
++ mchbar_write32(0x06c0, 0x02020202);
++ mchbar_write32(0x06c4, 0x03020202);
++ mchbar_write32(0x06c8, 0x04040403);
++ mchbar_write32(0x06cc, 0x04040404);
++ mchbar_write32(0x06d8, 0x02020202);
++ mchbar_write32(0x06dc, 0x03020202);
++ mchbar_write32(0x06e0, 0x04040403);
++ mchbar_write32(0x06e4, 0x04040404);
++
++ mchbar_write32(0x0700, 0x02020202);
++ mchbar_write32(0x0704, 0x03020202);
++ mchbar_write32(0x0708, 0x04040403);
++ mchbar_write32(0x070c, 0x04040404);
++ mchbar_write32(0x0718, 0x02020202);
++ mchbar_write32(0x071c, 0x03020202);
++ mchbar_write32(0x0720, 0x04040403);
++ mchbar_write32(0x0724, 0x04040404);
++
++ mchbar_write32(0x0740, 0x02020202);
++ mchbar_write32(0x0744, 0x03020202);
++ mchbar_write32(0x0748, 0x04040403);
++ mchbar_write32(0x074c, 0x04040404);
++ mchbar_write32(0x0758, 0x02020202);
++ mchbar_write32(0x075c, 0x03020202);
++ mchbar_write32(0x0760, 0x04040403);
++ mchbar_write32(0x0764, 0x04040404);
++
++ mchbar_write32(0x0780, 0x06060606);
++ mchbar_write32(0x0784, 0x09070606);
++ mchbar_write32(0x0788, 0x0e0e0c0b);
++ mchbar_write32(0x078c, 0x0e0e0e0e);
++ mchbar_write32(0x0798, 0x06060606);
++ mchbar_write32(0x079c, 0x09070606);
++ mchbar_write32(0x07a0, 0x0d0d0c0b);
++ mchbar_write32(0x07a4, 0x0d0d0d0d);
++
++ mchbar_write32(0x07c0, 0x06060606);
++ mchbar_write32(0x07c4, 0x09070606);
++ mchbar_write32(0x07c8, 0x0e0e0c0b);
++ mchbar_write32(0x07cc, 0x0e0e0e0e);
++ mchbar_write32(0x07d8, 0x06060606);
++ mchbar_write32(0x07dc, 0x09070606);
++ mchbar_write32(0x07e0, 0x0d0d0c0b);
++ mchbar_write32(0x07e4, 0x0d0d0d0d);
++
++ mchbar_write32(0x0840, 0x06060606);
++ mchbar_write32(0x0844, 0x08070606);
++ mchbar_write32(0x0848, 0x0e0e0c0a);
++ mchbar_write32(0x084c, 0x0e0e0e0e);
++ mchbar_write32(0x0858, 0x06060606);
++ mchbar_write32(0x085c, 0x08070606);
++ mchbar_write32(0x0860, 0x0c0c0b0a);
++ mchbar_write32(0x0864, 0x0c0c0c0c);
++
++ mchbar_write32(0x0880, 0x02020202);
++ mchbar_write32(0x0884, 0x03020202);
++ mchbar_write32(0x0888, 0x04040403);
++ mchbar_write32(0x088c, 0x04040404);
++ mchbar_write32(0x0898, 0x02020202);
++ mchbar_write32(0x089c, 0x03020202);
++ mchbar_write32(0x08a0, 0x04040403);
++ mchbar_write32(0x08a4, 0x04040404);
++ }
+
+ igd_compute_ggc(sysinfo);
+
+diff --git a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
+index b74765fd9c..5d4505e063 100644
+--- a/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
++++ b/src/northbridge/intel/gm45/raminit_rcomp_calibration.c
+@@ -198,7 +198,7 @@ void raminit_rcomp_calibration(int ddr_type, const stepping_t stepping) {
+ reg = mchbar_read32(0x518);
+ lut_idx[channel][group][PULL_UP] = (reg >> 24) & 0x7f;
+ lut_idx[channel][group][PULL_DOWN] = (reg >> 16) & 0x7f;
+- if (i == 1) {
++ if ((i == 1) && (ddr_type == DDR2)) {
+ magic_comp[0] = (reg >> 8) & 0x3f;
+ magic_comp[1] = (reg >> 0) & 0x3f;
+ }
+@@ -242,7 +242,8 @@ void raminit_rcomp_calibration(int ddr_type, const stepping_t stepping) {
+ }
+ mchbar += 0x0040;
+ }
+-
+- mchbar_clrsetbits32(0x4d0, 0x3f << 26, magic_comp[0] << 26);
+- mchbar_clrsetbits32(0x4d0, 0x3f << 20, magic_comp[1] << 20);
++ if (ddr_type == DDR2) {
++ mchbar_clrsetbits32(0x4d0, 0x3f << 26, magic_comp[0] << 26);
++ mchbar_clrsetbits32(0x4d0, 0x3f << 20, magic_comp[1] << 20);
++ }
+ }
+--
+2.39.5
+
diff --git a/config/coreboot/default/patches/0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch b/config/coreboot/default/patches/0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
new file mode 100644
index 00000000..0131af84
--- /dev/null
+++ b/config/coreboot/default/patches/0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
@@ -0,0 +1,52 @@
+From 265fb9f4fd017de635bc44b5a762c69a8bec6158 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Mon, 20 May 2024 10:24:16 -0600
+Subject: [PATCH 42/65] mb/dell/e6400: Use 100 MHz reference clock for display
+
+The E6400 uses a 100 MHz reference clock for spread spectrum support on
+LVDS, whereas libgfxinit previously assumed a 96 MHz input clock. For
+the more common 1280 x 800 display panels, the numerical error was not
+large enough to cause noticable issues, but the actual pixel clock
+frequency derived from a 100 MHz reference using PLL configs calculated
+assuming a 96 MHz reference was not close enough for 1440 x 900 panels,
+which require a much higher pixel clock. This resulted in a garbled
+display in the pre-OS graphics environment provided by libgfxinit.
+
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e6400/Kconfig | 3 +++
+ src/northbridge/intel/gm45/Kconfig | 4 ++++
+ 2 files changed, 7 insertions(+)
+
+diff --git a/src/mainboard/dell/e6400/Kconfig b/src/mainboard/dell/e6400/Kconfig
+index 417d95fd5d..6fe1b1c456 100644
+--- a/src/mainboard/dell/e6400/Kconfig
++++ b/src/mainboard/dell/e6400/Kconfig
+@@ -19,6 +19,9 @@ config BOARD_SPECIFIC_OPTIONS
+ select INTEL_GMA_HAVE_VBT
+ select EC_DELL_MEC5035
+
++config INTEL_GMA_DPLL_REF_FREQ
++ default 100000000
++
+ config MAINBOARD_DIR
+ default "dell/e6400"
+
+diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
+index 8059e7ee80..5df5a93296 100644
+--- a/src/northbridge/intel/gm45/Kconfig
++++ b/src/northbridge/intel/gm45/Kconfig
+@@ -14,6 +14,10 @@ config NORTHBRIDGE_INTEL_GM45
+
+ if NORTHBRIDGE_INTEL_GM45
+
++config INTEL_GMA_DPLL_REF_FREQ
++ int
++ default 96000000
++
+ config VBOOT
+ select VBOOT_STARTS_IN_BOOTBLOCK
+
+--
+2.39.5
+
diff --git a/config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch b/config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
deleted file mode 100644
index 37353e20..00000000
--- a/config/coreboot/default/patches/0042-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
+++ /dev/null
@@ -1,602 +0,0 @@
-From c58e0fea2a4e591e5ecd8a1f376c3b3af0fbb306 Mon Sep 17 00:00:00 2001
-From: Mate Kukri <kukri.mate@gmail.com>
-Date: Thu, 18 Apr 2024 20:28:45 +0100
-Subject: [PATCH 1/1] mb/dell/optiplex_9020: Implement late HWM initialization
-
-There are 4 different chassis types specified by vendor firmware, each
-with a slightly different HWM configuration.
-
-The chassis type to use is determined at runtime by reading a set of
-4 PCH GPIOs: 70, 38, 17, and 1.
-
-Additionally vendor firmware also provides an option to run the fans at
-full speed. This is substituted with a coreboot nvram option in this
-implementation.
-
-This was tested to make fan control work on my OptiPlex 7020 SFF.
-
-NOTE: This is superficially similar to the OptiPlex 9010's SCH5545
-however the OptiPlex 9020's SCH5555 does not use externally
-programmed EC firmware.
-
-Change-Id: Ibdccd3fc7364e03e84ca606592928410624eed43
-Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
----
- src/mainboard/dell/optiplex_9020/Makefile.inc | 3 +-
- src/mainboard/dell/optiplex_9020/bootblock.c | 25 +-
- src/mainboard/dell/optiplex_9020/cmos.default | 1 +
- src/mainboard/dell/optiplex_9020/cmos.layout | 5 +-
- src/mainboard/dell/optiplex_9020/mainboard.c | 387 ++++++++++++++++++
- src/mainboard/dell/optiplex_9020/sch5555_ec.c | 54 +++
- src/mainboard/dell/optiplex_9020/sch5555_ec.h | 10 +
- 7 files changed, 463 insertions(+), 22 deletions(-)
- create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.c
- create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.h
-
-diff --git a/src/mainboard/dell/optiplex_9020/Makefile.inc b/src/mainboard/dell/optiplex_9020/Makefile.inc
-index 6ca2f2afaa..08e2e53577 100644
---- a/src/mainboard/dell/optiplex_9020/Makefile.inc
-+++ b/src/mainboard/dell/optiplex_9020/Makefile.inc
-@@ -2,4 +2,5 @@
-
- romstage-y += gpio.c
- ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
--bootblock-y += bootblock.c
-+ramstage-y += sch5555_ec.c
-+bootblock-y += bootblock.c sch5555_ec.c
-diff --git a/src/mainboard/dell/optiplex_9020/bootblock.c b/src/mainboard/dell/optiplex_9020/bootblock.c
-index 2837cf9cf1..e5e759273e 100644
---- a/src/mainboard/dell/optiplex_9020/bootblock.c
-+++ b/src/mainboard/dell/optiplex_9020/bootblock.c
-@@ -4,29 +4,14 @@
- #include <device/pnp_ops.h>
- #include <superio/smsc/sch555x/sch555x.h>
- #include <southbridge/intel/lynxpoint/pch.h>
--
--static void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val)
--{
-- // Clear EC-to-Host mailbox
-- uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
-- outb(tmp, SCH555x_EMI_IOBASE + 1);
--
-- // Send address and value to the EC
-- sch555x_emi_write16(0, (addr1 * 2) | 0x101);
-- sch555x_emi_write32(4, val | (addr2 << 16));
--
-- // Wait for acknowledgement message from EC
-- outb(1, SCH555x_EMI_IOBASE);
-- size_t timeout = 0;
-- do {} while (++timeout < 0xfff && (inb(SCH555x_EMI_IOBASE + 1) & 1) == 0);
--}
-+#include "sch5555_ec.h"
-
- struct ec_init_entry {
- uint16_t addr;
- uint8_t val;
- };
-
--static void ec_init(void)
-+static void bootblock_ec_init(void)
- {
- /*
- * Tables from CORE_PEI
-@@ -108,9 +93,9 @@ void mainboard_config_superio(void)
- outb(0x01, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_UNK1);
- outb(0x0f, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_LED);
-
-- // Magic EC init
-- ec_init();
-+ // Perform bootblock EC initialization
-+ bootblock_ec_init();
-
-- // Magic EC init is needed for UART1 initialization to work
-+ // Bootblock EC initialization is required for UART1 to work
- sch555x_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- }
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
-index 7bccc80e51..1909abcb9f 100644
---- a/src/mainboard/dell/optiplex_9020/cmos.default
-+++ b/src/mainboard/dell/optiplex_9020/cmos.default
-@@ -3,3 +3,4 @@ debug_level=Debug
- nmi=Disable
- power_on_after_fail=Disable
- iommu=Disable
-+fan_full_speed=Disable
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.layout b/src/mainboard/dell/optiplex_9020/cmos.layout
-index 72ff9c4bee..4a1496a878 100644
---- a/src/mainboard/dell/optiplex_9020/cmos.layout
-+++ b/src/mainboard/dell/optiplex_9020/cmos.layout
-@@ -22,7 +22,10 @@ entries
- 409 2 e 5 power_on_after_fail
-
- # turn iommu on or off
--412 1 e 6 iommu
-+411 1 e 6 iommu
-+
-+# coreboot config options: EC
-+412 1 e 1 fan_full_speed
-
- # coreboot config options: check sums
- 984 16 h 0 check_sum
-diff --git a/src/mainboard/dell/optiplex_9020/mainboard.c b/src/mainboard/dell/optiplex_9020/mainboard.c
-index c834fea5d3..0b7829c736 100644
---- a/src/mainboard/dell/optiplex_9020/mainboard.c
-+++ b/src/mainboard/dell/optiplex_9020/mainboard.c
-@@ -1,7 +1,12 @@
- /* SPDX-License-Identifier: GPL-2.0-only */
-
-+#include <bootstate.h>
-+#include <cpu/x86/msr.h>
- #include <device/device.h>
- #include <drivers/intel/gma/int15.h>
-+#include <option.h>
-+#include <southbridge/intel/common/gpio.h>
-+#include "sch5555_ec.h"
-
- static void mainboard_enable(struct device *dev)
- {
-@@ -13,3 +18,385 @@ static void mainboard_enable(struct device *dev)
- struct chip_operations mainboard_ops = {
- .enable_dev = mainboard_enable,
- };
-+
-+#define HWM_TAB_ADD_TEMP_TARGET 1
-+#define HWM_TAB_PKG_POWER_ANY 0xffff
-+#define CHASSIS_TYPE_UNKNOWN 0xff
-+
-+struct hwm_tab_entry {
-+ uint16_t addr;
-+ uint8_t val;
-+ uint8_t flags;
-+ uint16_t pkg_power;
-+};
-+
-+struct hwm_tab_entry HWM_TAB3[] = {
-+ { 0x005, 0x33, 0, 0xffff },
-+ { 0x018, 0x2f, 0, 0xffff },
-+ { 0x019, 0x2f, 0, 0xffff },
-+ { 0x01a, 0x2f, 0, 0xffff },
-+ { 0x080, 0x00, 0, 0xffff },
-+ { 0x081, 0x00, 0, 0xffff },
-+ { 0x083, 0xbb, 0, 0xffff },
-+ { 0x085, 0x8a, 0, 0x0010 },
-+ { 0x086, 0x4c, 0, 0x0010 },
-+ { 0x08a, 0x66, 0, 0x0010 },
-+ { 0x08b, 0x5b, 0, 0x0010 },
-+ { 0x090, 0x65, 0, 0xffff },
-+ { 0x091, 0x70, 0, 0xffff },
-+ { 0x092, 0x86, 0, 0xffff },
-+ { 0x096, 0xa4, 0, 0xffff },
-+ { 0x097, 0xa4, 0, 0xffff },
-+ { 0x098, 0xa4, 0, 0xffff },
-+ { 0x09b, 0xa4, 0, 0xffff },
-+ { 0x0a0, 0x0e, 0, 0xffff },
-+ { 0x0a1, 0x0e, 0, 0xffff },
-+ { 0x0ae, 0x7c, 0, 0xffff },
-+ { 0x0af, 0x86, 0, 0xffff },
-+ { 0x0b0, 0x9a, 0, 0xffff },
-+ { 0x0b3, 0x9a, 0, 0xffff },
-+ { 0x0b6, 0x08, 0, 0xffff },
-+ { 0x0b7, 0x08, 0, 0xffff },
-+ { 0x0ea, 0x64, 0, 0x0020 },
-+ { 0x0ea, 0x5c, 0, 0x0010 },
-+ { 0x0ef, 0xff, 0, 0xffff },
-+ { 0x0f8, 0x15, 0, 0xffff },
-+ { 0x0f9, 0x00, 0, 0xffff },
-+ { 0x0f0, 0x30, 0, 0xffff },
-+ { 0x0fd, 0x01, 0, 0xffff },
-+ { 0x1a1, 0x00, 0, 0xffff },
-+ { 0x1a2, 0x00, 0, 0xffff },
-+ { 0x1b1, 0x08, 0, 0xffff },
-+ { 0x1be, 0x99, 0, 0xffff },
-+ { 0x280, 0xa0, 0, 0x0010 },
-+ { 0x281, 0x0f, 0, 0x0010 },
-+ { 0x282, 0x03, 0, 0xffff },
-+ { 0x283, 0x0a, 0, 0xffff },
-+ { 0x284, 0x80, 0, 0xffff },
-+ { 0x285, 0x03, 0, 0xffff },
-+ { 0x288, 0x68, 0, 0x0010 },
-+ { 0x289, 0x10, 0, 0x0010 },
-+ { 0x28a, 0x03, 0, 0xffff },
-+ { 0x28b, 0x0a, 0, 0xffff },
-+ { 0x28c, 0x80, 0, 0xffff },
-+ { 0x28d, 0x03, 0, 0xffff },
-+};
-+
-+struct hwm_tab_entry HWM_TAB4[] = {
-+ { 0x005, 0x33, 0, 0xffff },
-+ { 0x018, 0x2f, 0, 0xffff },
-+ { 0x019, 0x2f, 0, 0xffff },
-+ { 0x01a, 0x2f, 0, 0xffff },
-+ { 0x080, 0x00, 0, 0xffff },
-+ { 0x081, 0x00, 0, 0xffff },
-+ { 0x083, 0xbb, 0, 0xffff },
-+ { 0x085, 0x99, 0, 0x0020 },
-+ { 0x085, 0xad, 0, 0x0010 },
-+ { 0x086, 0x1c, 0, 0xffff },
-+ { 0x08a, 0x39, 0, 0x0020 },
-+ { 0x08a, 0x41, 0, 0x0010 },
-+ { 0x08b, 0x76, 0, 0x0020 },
-+ { 0x08b, 0x8b, 0, 0x0010 },
-+ { 0x090, 0x5e, 0, 0xffff },
-+ { 0x091, 0x5e, 0, 0xffff },
-+ { 0x092, 0x86, 0, 0xffff },
-+ { 0x096, 0xa4, 0, 0xffff },
-+ { 0x097, 0xa4, 0, 0xffff },
-+ { 0x098, 0xa4, 0, 0xffff },
-+ { 0x09b, 0xa4, 0, 0xffff },
-+ { 0x0a0, 0x0a, 0, 0xffff },
-+ { 0x0a1, 0x0a, 0, 0xffff },
-+ { 0x0ae, 0x7c, 0, 0xffff },
-+ { 0x0af, 0x7c, 0, 0xffff },
-+ { 0x0b0, 0x9a, 0, 0xffff },
-+ { 0x0b3, 0x7c, 0, 0xffff },
-+ { 0x0b6, 0x08, 0, 0xffff },
-+ { 0x0b7, 0x08, 0, 0xffff },
-+ { 0x0ea, 0x64, 0, 0x0020 },
-+ { 0x0ea, 0x5c, 0, 0x0010 },
-+ { 0x0ef, 0xff, 0, 0xffff },
-+ { 0x0f8, 0x15, 0, 0xffff },
-+ { 0x0f9, 0x00, 0, 0xffff },
-+ { 0x0f0, 0x30, 0, 0xffff },
-+ { 0x0fd, 0x01, 0, 0xffff },
-+ { 0x1a1, 0x00, 0, 0xffff },
-+ { 0x1a2, 0x00, 0, 0xffff },
-+ { 0x1b1, 0x08, 0, 0xffff },
-+ { 0x1be, 0x90, 0, 0xffff },
-+ { 0x280, 0x94, 0, 0x0020 },
-+ { 0x281, 0x11, 0, 0x0020 },
-+ { 0x280, 0x94, 0, 0x0010 },
-+ { 0x281, 0x11, 0, 0x0010 },
-+ { 0x282, 0x03, 0, 0xffff },
-+ { 0x283, 0x0a, 0, 0xffff },
-+ { 0x284, 0x80, 0, 0xffff },
-+ { 0x285, 0x03, 0, 0xffff },
-+ { 0x288, 0x28, 0, 0x0020 },
-+ { 0x289, 0x0a, 0, 0x0020 },
-+ { 0x288, 0x28, 0, 0x0010 },
-+ { 0x289, 0x0a, 0, 0x0010 },
-+ { 0x28a, 0x03, 0, 0xffff },
-+ { 0x28b, 0x0a, 0, 0xffff },
-+ { 0x28c, 0x80, 0, 0xffff },
-+ { 0x28d, 0x03, 0, 0xffff },
-+};
-+
-+struct hwm_tab_entry HWM_TAB5[] = {
-+ { 0x005, 0x33, 0, 0xffff },
-+ { 0x018, 0x2f, 0, 0xffff },
-+ { 0x019, 0x2f, 0, 0xffff },
-+ { 0x01a, 0x2f, 0, 0xffff },
-+ { 0x080, 0x00, 0, 0xffff },
-+ { 0x081, 0x00, 0, 0xffff },
-+ { 0x083, 0xbb, 0, 0xffff },
-+ { 0x085, 0x66, 0, 0x0020 },
-+ { 0x085, 0x5d, 0, 0x0010 },
-+ { 0x086, 0x1c, 0, 0xffff },
-+ { 0x08a, 0x39, 0, 0x0020 },
-+ { 0x08a, 0x41, 0, 0x0010 },
-+ { 0x08b, 0x76, 0, 0x0020 },
-+ { 0x08b, 0x80, 0, 0x0010 },
-+ { 0x090, 0x5d, 0, 0x0020 },
-+ { 0x090, 0x5e, 0, 0x0010 },
-+ { 0x091, 0x5e, 0, 0xffff },
-+ { 0x092, 0x86, 0, 0xffff },
-+ { 0x096, 0xa4, 0, 0xffff },
-+ { 0x097, 0xa4, 0, 0xffff },
-+ { 0x098, 0xa3, 0, 0x0020 },
-+ { 0x098, 0xa4, 0, 0x0010 },
-+ { 0x09b, 0xa4, 0, 0xffff },
-+ { 0x0a0, 0x08, 0, 0xffff },
-+ { 0x0a1, 0x0a, 0, 0xffff },
-+ { 0x0ae, 0x7c, 0, 0xffff },
-+ { 0x0af, 0x7c, 0, 0xffff },
-+ { 0x0b0, 0x9a, 0, 0xffff },
-+ { 0x0b3, 0x7c, 0, 0xffff },
-+ { 0x0b6, 0x08, 0, 0xffff },
-+ { 0x0b7, 0x08, 0, 0xffff },
-+ { 0x0ea, 0x64, 0, 0x0020 },
-+ { 0x0ea, 0x5c, 0, 0x0010 },
-+ { 0x0ef, 0xff, 0, 0xffff },
-+ { 0x0f8, 0x15, 0, 0xffff },
-+ { 0x0f9, 0x00, 0, 0xffff },
-+ { 0x0f0, 0x30, 0, 0xffff },
-+ { 0x0fd, 0x01, 0, 0xffff },
-+ { 0x1a1, 0x00, 0, 0xffff },
-+ { 0x1a2, 0x00, 0, 0xffff },
-+ { 0x1b1, 0x08, 0, 0xffff },
-+ { 0x1be, 0x98, 0, 0x0020 },
-+ { 0x1be, 0x90, 0, 0x0010 },
-+ { 0x280, 0x94, 0, 0x0020 },
-+ { 0x281, 0x11, 0, 0x0020 },
-+ { 0x280, 0x94, 0, 0x0010 },
-+ { 0x281, 0x11, 0, 0x0010 },
-+ { 0x282, 0x03, 0, 0xffff },
-+ { 0x283, 0x0a, 0, 0xffff },
-+ { 0x284, 0x80, 0, 0xffff },
-+ { 0x285, 0x03, 0, 0xffff },
-+ { 0x288, 0x28, 0, 0x0020 },
-+ { 0x289, 0x0a, 0, 0x0020 },
-+ { 0x288, 0x28, 0, 0x0010 },
-+ { 0x289, 0x0a, 0, 0x0010 },
-+ { 0x28a, 0x03, 0, 0xffff },
-+ { 0x28b, 0x0a, 0, 0xffff },
-+ { 0x28c, 0x80, 0, 0xffff },
-+ { 0x28d, 0x03, 0, 0xffff },
-+};
-+
-+struct hwm_tab_entry HWM_TAB6[] = {
-+ { 0x005, 0x33, 0, 0xffff },
-+ { 0x018, 0x2f, 0, 0xffff },
-+ { 0x019, 0x2f, 0, 0xffff },
-+ { 0x01a, 0x2f, 0, 0xffff },
-+ { 0x080, 0x00, 0, 0xffff },
-+ { 0x081, 0x00, 0, 0xffff },
-+ { 0x083, 0xbb, 0, 0xffff },
-+ { 0x085, 0x98, 0, 0xffff },
-+ { 0x086, 0x3c, 0, 0xffff },
-+ { 0x08a, 0x39, 0, 0x0020 },
-+ { 0x08a, 0x3d, 0, 0x0010 },
-+ { 0x08b, 0x44, 0, 0x0020 },
-+ { 0x08b, 0x51, 0, 0x0010 },
-+ { 0x090, 0x61, 0, 0xffff },
-+ { 0x091, 0x6d, 0, 0xffff },
-+ { 0x092, 0x86, 0, 0xffff },
-+ { 0x096, 0xa4, 0, 0xffff },
-+ { 0x097, 0xa4, 0, 0xffff },
-+ { 0x098, 0x9f, 0, 0x0020 },
-+ { 0x098, 0xa4, 0, 0x0010 },
-+ { 0x09b, 0xa4, 0, 0xffff },
-+ { 0x0a0, 0x0e, 0, 0xffff },
-+ { 0x0a1, 0x0e, 0, 0xffff },
-+ { 0x0ae, 0x7c, 0, 0xffff },
-+ { 0x0af, 0x7c, 0, 0xffff },
-+ { 0x0b0, 0x9b, 0, 0x0020 },
-+ { 0x0b0, 0x98, 0, 0x0010 },
-+ { 0x0b3, 0x9a, 0, 0xffff },
-+ { 0x0b6, 0x08, 0, 0xffff },
-+ { 0x0b7, 0x08, 0, 0xffff },
-+ { 0x0ea, 0x64, 0, 0x0020 },
-+ { 0x0ea, 0x5c, 0, 0x0010 },
-+ { 0x0ef, 0xff, 0, 0xffff },
-+ { 0x0f8, 0x15, 0, 0xffff },
-+ { 0x0f9, 0x00, 0, 0xffff },
-+ { 0x0f0, 0x30, 0, 0xffff },
-+ { 0x0fd, 0x01, 0, 0xffff },
-+ { 0x1a1, 0x00, 0, 0xffff },
-+ { 0x1a2, 0x00, 0, 0xffff },
-+ { 0x1b1, 0x08, 0, 0xffff },
-+ { 0x1be, 0x9a, 0, 0x0020 },
-+ { 0x1be, 0x96, 0, 0x0010 },
-+ { 0x280, 0x94, 0, 0x0020 },
-+ { 0x281, 0x11, 0, 0x0020 },
-+ { 0x280, 0x94, 0, 0x0010 },
-+ { 0x281, 0x11, 0, 0x0010 },
-+ { 0x282, 0x03, 0, 0xffff },
-+ { 0x283, 0x0a, 0, 0xffff },
-+ { 0x284, 0x80, 0, 0xffff },
-+ { 0x285, 0x03, 0, 0xffff },
-+ { 0x288, 0x94, 0, 0x0020 },
-+ { 0x289, 0x11, 0, 0x0020 },
-+ { 0x288, 0x94, 0, 0x0010 },
-+ { 0x289, 0x11, 0, 0x0010 },
-+ { 0x28a, 0x03, 0, 0xffff },
-+ { 0x28b, 0x0a, 0, 0xffff },
-+ { 0x28c, 0x80, 0, 0xffff },
-+ { 0x28d, 0x03, 0, 0xffff },
-+};
-+
-+static uint8_t get_chassis_type(void)
-+{
-+ uint8_t gpio_chassis_type;
-+
-+ // Read chassis type from GPIO
-+ gpio_chassis_type = get_gpio(70) << 3 | get_gpio(38) << 2 |
-+ get_gpio(17) << 1 | get_gpio(1);
-+
-+ printk(BIOS_DEBUG, "GPIO chassis type = %#x\n", gpio_chassis_type);
-+
-+ // Turn it into internal chassis index
-+ switch (gpio_chassis_type) {
-+ case 0x08:
-+ case 0x0a:
-+ return 4;
-+ case 0x0b:
-+ return 3;
-+ case 0x0c:
-+ return 5;
-+ case 0x0d: // SFF
-+ case 0x0e:
-+ case 0x0f:
-+ return 6;
-+ default:
-+ return CHASSIS_TYPE_UNKNOWN;
-+ }
-+
-+}
-+
-+static uint8_t get_temp_target(void)
-+{
-+ uint8_t val = rdmsr(0x1a2).lo >> 8 & 0xff;
-+ if (!val)
-+ val = 20;
-+ return 0x95 - val;
-+}
-+
-+static uint16_t get_pkg_power(void)
-+{
-+ uint8_t rapl_power_unit = rdmsr(0x606).lo & 0xf;
-+ if (rapl_power_unit)
-+ rapl_power_unit = 2 << (rapl_power_unit - 1);
-+ uint16_t pkg_power_info = rdmsr(0x614).lo & 0x7fff;
-+ if (pkg_power_info / rapl_power_unit > 0x41)
-+ return 32;
-+ else
-+ return 16;
-+}
-+
-+static void apply_hwm_tab(struct hwm_tab_entry *arr, size_t size)
-+{
-+ uint8_t temp_target = get_temp_target();
-+ uint16_t pkg_power = get_pkg_power();
-+
-+ printk(BIOS_DEBUG, "Temp target = %#x\n", temp_target);
-+ printk(BIOS_DEBUG, "Package power = %#x\n", pkg_power);
-+
-+ for (size_t i = 0; i < size; ++i) {
-+ // Skip entry if it doesn't apply for this package power
-+ if (arr[i].pkg_power != pkg_power &&
-+ arr[i].pkg_power != HWM_TAB_PKG_POWER_ANY)
-+ continue;
-+
-+ uint8_t val = arr[i].val;
-+
-+ // Add temp target to value if requested (current tables never do)
-+ if (arr[i].flags & HWM_TAB_ADD_TEMP_TARGET)
-+ val += temp_target;
-+
-+ // Perform write
-+ ec_write(1, arr[i].addr, val);
-+
-+ }
-+}
-+
-+static void sch5555_ec_hwm_init(void *arg)
-+{
-+ uint8_t chassis_type, saved_2fc;
-+
-+ printk(BIOS_DEBUG, "OptiPlex 9020 late HWM init\n");
-+
-+ saved_2fc = ec_read(1, 0x2fc);
-+ ec_write(1, 0x2fc, 0xa0);
-+ ec_write(1, 0x2fd, 0x32);
-+
-+ chassis_type = get_chassis_type();
-+
-+ if (chassis_type != CHASSIS_TYPE_UNKNOWN) {
-+ printk(BIOS_DEBUG, "Chassis type = %#x\n", chassis_type);
-+ } else {
-+ printk(BIOS_DEBUG, "WARNING: Unknown chassis type\n");
-+ }
-+
-+ // Apply HWM table based on chassis type
-+ switch (chassis_type) {
-+ case 3:
-+ apply_hwm_tab(HWM_TAB3, ARRAY_SIZE(HWM_TAB3));
-+ break;
-+ case 4:
-+ apply_hwm_tab(HWM_TAB4, ARRAY_SIZE(HWM_TAB4));
-+ break;
-+ case 5:
-+ apply_hwm_tab(HWM_TAB5, ARRAY_SIZE(HWM_TAB5));
-+ break;
-+ case 6:
-+ apply_hwm_tab(HWM_TAB6, ARRAY_SIZE(HWM_TAB6));
-+ break;
-+ }
-+
-+ // NOTE: vendor firmware applies these when "max core address" > 2
-+ // i think this is always the case
-+ ec_write(1, 0x9e, 0x30);
-+ ec_write(1, 0xeb, ec_read(1, 0xea));
-+
-+ ec_write(1, 0x2fc, saved_2fc);
-+
-+ // Apply full speed fan config if requested or if the chassis type is unknown
-+ if (chassis_type == CHASSIS_TYPE_UNKNOWN || get_uint_option("fan_full_speed", 0)) {
-+ printk(BIOS_DEBUG, "Setting full fan speed\n");
-+ ec_write(1, 0x80, 0x60 | ec_read(1, 0x80));
-+ ec_write(1, 0x81, 0x60 | ec_read(1, 0x81));
-+ }
-+
-+ ec_read(1, 0xb8);
-+
-+ if ((chassis_type == 4 || chassis_type == 5) && ec_read(1, 0x26) == 0) {
-+ ec_write(1, 0xa0, ec_read(1, 0xa0) & 0xfb);
-+ ec_write(1, 0xa1, ec_read(1, 0xa1) & 0xfb);
-+ ec_write(1, 0xa2, ec_read(1, 0xa2) & 0xfb);
-+ ec_write(1, 0x8a, 0x99);
-+ ec_write(1, 0x8b, 0x47);
-+ ec_write(1, 0x8c, 0x91);
-+ }
-+}
-+
-+BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL);
-diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.c b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
-new file mode 100644
-index 0000000000..a1067ac063
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
-@@ -0,0 +1,54 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <arch/io.h>
-+#include <device/pnp_ops.h>
-+#include <superio/smsc/sch555x/sch555x.h>
-+#include "sch5555_ec.h"
-+
-+uint8_t ec_read(uint8_t addr1, uint16_t addr2)
-+{
-+ // clear ec-to-host mailbox
-+ uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
-+ outb(tmp, SCH555x_EMI_IOBASE + 1);
-+
-+ // send address
-+ outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
-+ outw((addr1 * 2) | 0x100, SCH555x_EMI_IOBASE + 4);
-+
-+ outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
-+ outl(addr2 << 16, SCH555x_EMI_IOBASE + 4);
-+
-+ // send message to ec
-+ outb(1, SCH555x_EMI_IOBASE);
-+
-+ // wait for ack
-+ for (size_t retry = 0; retry < 0xfff; ++retry)
-+ if (inb(SCH555x_EMI_IOBASE + 1) & 1)
-+ break;
-+
-+ // read result
-+ outw(4 | 0x8000, SCH555x_EMI_IOBASE + 2);
-+ return inb(SCH555x_EMI_IOBASE + 4);
-+}
-+
-+void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val)
-+{
-+ // clear ec-to-host mailbox
-+ uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
-+ outb(tmp, SCH555x_EMI_IOBASE + 1);
-+
-+ // send address and value
-+ outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
-+ outw((addr1 * 2) | 0x101, SCH555x_EMI_IOBASE + 4);
-+
-+ outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
-+ outl(val | (addr2 << 16), SCH555x_EMI_IOBASE + 4);
-+
-+ // send message to ec
-+ outb(1, SCH555x_EMI_IOBASE);
-+
-+ // wait for ack
-+ for (size_t retry = 0; retry < 0xfff; ++retry)
-+ if (inb(SCH555x_EMI_IOBASE + 1) & 1)
-+ break;
-+}
-diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.h b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
-new file mode 100644
-index 0000000000..7e399e8e74
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
-@@ -0,0 +1,10 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#ifndef __SCH5555_EC_H__
-+#define __SCH5555_EC_H__
-+
-+uint8_t ec_read(uint8_t addr1, uint16_t addr2);
-+
-+void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val);
-+
-+#endif
---
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0001-haswell-NRI-Initialise-MPLL.patch b/config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch
index 0de1a4ec..c571fe3b 100644
--- a/config/coreboot/haswell/patches/0001-haswell-NRI-Initialise-MPLL.patch
+++ b/config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch
@@ -1,7 +1,7 @@
-From cce5392f272b0acc493f47f9b5ca3cf90ce901e8 Mon Sep 17 00:00:00 2001
+From ab36967cce0593dd17f3018ab4a6661e4219d242 Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Thu, 11 Apr 2024 17:25:07 +0200
-Subject: [PATCH 01/20] haswell NRI: Initialise MPLL
+Subject: [PATCH 43/65] haswell NRI: Initialise MPLL
Add code to initialise the MPLL (Memory PLL). The procedure is similar
to the one for Sandy/Ivy Bridge, but it is not worth factoring out.
@@ -290,10 +290,10 @@ index 19ec5859ac..bf745e943f 100644
/* Return a generic stepping value to make stepping checks simpler */
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 1a0793947e..a54581abc7 100644
+index 8078c9c386..15a1550424 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -23,6 +23,8 @@ enum raminit_status {
+@@ -24,6 +24,8 @@ enum raminit_status {
RAMINIT_STATUS_SUCCESS = 0,
RAMINIT_STATUS_NO_MEMORY_INSTALLED,
RAMINIT_STATUS_UNSUPPORTED_MEMORY,
@@ -302,7 +302,7 @@ index 1a0793947e..a54581abc7 100644
RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
};
-@@ -82,10 +84,19 @@ struct sysinfo {
+@@ -83,10 +85,19 @@ struct sysinfo {
uint8_t rankmap[NUM_CHANNELS];
uint8_t rank_mirrored[NUM_CHANNELS];
uint32_t channel_size_mb[NUM_CHANNELS];
@@ -344,5 +344,5 @@ index 5610e7089a..45f8174995 100644
#define SAPMCTL 0x5f00
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0043-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch b/config/coreboot/default/patches/0043-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
deleted file mode 100644
index 556e8e07..00000000
--- a/config/coreboot/default/patches/0043-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From cd3c553a313a26494e5dc31ff8323c3a919f190a Mon Sep 17 00:00:00 2001
-From: Mate Kukri <kukri.mate@gmail.com>
-Date: Wed, 10 Apr 2024 20:31:35 +0100
-Subject: [PATCH 1/1] mb/dell/optiplex_9020: Add support for TPM1.2 device
-
-These machines come with a TPM1.2 device by default. It is somewhat
-obsolete these days, but there is no harm in enabling it.
-
-Change-Id: Iec05321862aed58695c256b00494e5953219786d
-Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
-Reviewed-on: https://review.coreboot.org/c/coreboot/+/81827
-Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
----
- src/mainboard/dell/optiplex_9020/Kconfig | 2 ++
- src/mainboard/dell/optiplex_9020/devicetree.cb | 3 +++
- 2 files changed, 5 insertions(+)
-
-diff --git a/src/mainboard/dell/optiplex_9020/Kconfig b/src/mainboard/dell/optiplex_9020/Kconfig
-index 774a72f161..296938aa8d 100644
---- a/src/mainboard/dell/optiplex_9020/Kconfig
-+++ b/src/mainboard/dell/optiplex_9020/Kconfig
-@@ -12,7 +12,9 @@ config BOARD_SPECIFIC_OPTIONS
- select INTEL_GMA_HAVE_VBT
- select INTEL_INT15
- select MAINBOARD_HAS_LIBGFXINIT
-+ select MAINBOARD_HAS_TPM1
- select MAINBOARD_USES_IFD_GBE_REGION
-+ select MEMORY_MAPPED_TPM
- select NORTHBRIDGE_INTEL_HASWELL
- select SERIRQ_CONTINUOUS_MODE
- select SOUTHBRIDGE_INTEL_LYNXPOINT
-diff --git a/src/mainboard/dell/optiplex_9020/devicetree.cb b/src/mainboard/dell/optiplex_9020/devicetree.cb
-index 7bfa6736a6..e5cbd64127 100644
---- a/src/mainboard/dell/optiplex_9020/devicetree.cb
-+++ b/src/mainboard/dell/optiplex_9020/devicetree.cb
-@@ -70,6 +70,9 @@ chip northbridge/intel/haswell
- device pnp 2e.b off end # Floppy Controller
- device pnp 2e.11 off end # Parallel Port
- end
-+ chip drivers/pc80/tpm
-+ device pnp 0c31.0 on end
-+ end
- end
- device pci 1f.2 on end # SATA controller 1
- device pci 1f.3 on end # SMBus
---
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0002-haswell-NRI-Post-process-selected-timings.patch b/config/coreboot/default/patches/0044-haswell-NRI-Post-process-selected-timings.patch
index 0cc95cdd..69e32d2f 100644
--- a/config/coreboot/haswell/patches/0002-haswell-NRI-Post-process-selected-timings.patch
+++ b/config/coreboot/default/patches/0044-haswell-NRI-Post-process-selected-timings.patch
@@ -1,7 +1,7 @@
-From 42b21fdce8c8bade53d9d86515f88b0665a4c1b1 Mon Sep 17 00:00:00 2001
+From 876011559681881d950ad3b6742b40322f1f5a6d Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Sat, 7 May 2022 16:29:55 +0200
-Subject: [PATCH 02/20] haswell NRI: Post-process selected timings
+Subject: [PATCH 44/65] haswell NRI: Post-process selected timings
Once the MPLL has been initialised, convert the timings from the SPD to
be in DCLKs, which is what the hardware expects. In addition, calculate
@@ -110,10 +110,10 @@ index bf745e943f..2fea658415 100644
/* Return a generic stepping value to make stepping checks simpler */
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index a54581abc7..01e5ed1bd6 100644
+index 15a1550424..e0ebd3a2a7 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -78,6 +78,9 @@ struct sysinfo {
+@@ -79,6 +79,9 @@ struct sysinfo {
uint32_t tCWL;
uint32_t tCMD;
@@ -123,7 +123,7 @@ index a54581abc7..01e5ed1bd6 100644
uint8_t lanes; /* 8 or 9 */
uint8_t chanmap;
uint8_t dpc[NUM_CHANNELS]; /* DIMMs per channel */
-@@ -96,7 +99,12 @@ void raminit_main(enum raminit_boot_mode bootmode);
+@@ -97,7 +100,12 @@ void raminit_main(enum raminit_boot_mode bootmode);
enum raminit_status collect_spd_info(struct sysinfo *ctrl);
enum raminit_status initialise_mpll(struct sysinfo *ctrl);
@@ -137,7 +137,7 @@ index a54581abc7..01e5ed1bd6 100644
+
#endif
diff --git a/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c b/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c
-index 2dab8504c4..7d98341a7e 100644
+index eff993800b..4f7fe46494 100644
--- a/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c
+++ b/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c
@@ -204,3 +204,103 @@ enum raminit_status collect_spd_info(struct sysinfo *ctrl)
@@ -245,5 +245,5 @@ index 2dab8504c4..7d98341a7e 100644
+ return RAMINIT_STATUS_SUCCESS;
+}
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0044-hp-8560w-turn-on-wifi.patch b/config/coreboot/default/patches/0044-hp-8560w-turn-on-wifi.patch
deleted file mode 100644
index bb4a7b47..00000000
--- a/config/coreboot/default/patches/0044-hp-8560w-turn-on-wifi.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 4ccef4fffd98071c339cb4135e2d8c805e554378 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Fri, 3 May 2024 17:45:52 +0100
-Subject: [PATCH 1/1] hp/8560w: turn on wifi
-
-according to angel pons, this gpio is WLAN_TRN_OFF#
-and setting it high will make wifi work. testing with
-this change as suggested by angel. see:
-
-https://review.coreboot.org/c/coreboot/+/39398/4/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c#158
-
-if it makes it into a libreboot release, you can assume
-the fix works. right now we have this problem:
-
-https://codeberg.org/libreboot/lbmk/issues/201
-
-Riku reported:
-
-[ 333.890080] atkbd serio0: Unknown key pressed (translated set 2, code 0xf8 on isa0060/serio0).
-[ 333.890102] atkbd serio0: Use 'setkeycodes e078 <keycode>' to make it known.
-[ 334.104069] atkbd serio0: Unknown key released (translated set 2, code 0xf8 on isa0060/serio0).
-[ 334.104090] atkbd serio0: Use 'setkeycodes e078 <keycode>' to make it known.
-
-The wifi stays to hardblocked in rfkill. When the wireless button
-is pressed, nothing changes except for these lines in dmesg.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
-index 560d668d6f..10cd11ce48 100644
---- a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
-+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
-@@ -155,7 +155,7 @@ static const struct pch_gpio_set2 pch_gpio_set2_level = {
- .gpio37 = GPIO_LEVEL_LOW,
- .gpio49 = GPIO_LEVEL_LOW,
- .gpio53 = GPIO_LEVEL_HIGH,
-- .gpio57 = GPIO_LEVEL_LOW,
-+ .gpio57 = GPIO_LEVEL_HIGH,
- .gpio60 = GPIO_LEVEL_HIGH,
- .gpio61 = GPIO_LEVEL_HIGH,
- };
---
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0003-haswell-NRI-Configure-initial-MC-settings.patch b/config/coreboot/default/patches/0045-haswell-NRI-Configure-initial-MC-settings.patch
index f44eb029..eefd17a9 100644
--- a/config/coreboot/haswell/patches/0003-haswell-NRI-Configure-initial-MC-settings.patch
+++ b/config/coreboot/default/patches/0045-haswell-NRI-Configure-initial-MC-settings.patch
@@ -1,7 +1,7 @@
-From 574f4965976b56f98a825dea71e919fefb2c8547 Mon Sep 17 00:00:00 2001
+From e91b308fe5848b14cabbd29be4af60e3a9b7938d Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Sat, 7 May 2022 17:22:07 +0200
-Subject: [PATCH 03/20] haswell NRI: Configure initial MC settings
+Subject: [PATCH 45/65] haswell NRI: Configure initial MC settings
Program initial memory controller settings. Many of these values will be
adjusted later during training.
@@ -885,10 +885,10 @@ index 2fea658415..fcc981ad04 100644
ctrl->bootmode = bootmode;
}
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 01e5ed1bd6..aa86b9aa39 100644
+index e0ebd3a2a7..fffa6d5450 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -3,15 +3,40 @@
+@@ -3,16 +3,41 @@
#ifndef HASWELL_RAMINIT_NATIVE_H
#define HASWELL_RAMINIT_NATIVE_H
@@ -900,7 +900,8 @@ index 01e5ed1bd6..aa86b9aa39 100644
+
+#include "reg_structs.h"
- #define SPD_LEN 256
+ /** TODO (Angel): Remove this after in-review patches are submitted **/
+ #define SPD_LEN SPD_SIZE_MAX_DDR3
+/* Each channel has 4 ranks, spread across 2 slots */
+#define NUM_SLOTRANKS 4
@@ -929,7 +930,7 @@ index 01e5ed1bd6..aa86b9aa39 100644
enum raminit_boot_mode {
BOOTMODE_COLD,
BOOTMODE_WARM,
-@@ -57,6 +82,9 @@ struct sysinfo {
+@@ -58,6 +83,9 @@ struct sysinfo {
* LPDDR-specific functions have stubs which will halt upon execution.
*/
bool lpddr;
@@ -939,7 +940,7 @@ index 01e5ed1bd6..aa86b9aa39 100644
struct raminit_dimm_info dimms[NUM_CHANNELS][NUM_SLOTS];
union dimm_flags_ddr3_st flags;
-@@ -93,16 +121,89 @@ struct sysinfo {
+@@ -94,16 +122,89 @@ struct sysinfo {
uint32_t mem_clock_mhz;
uint32_t mem_clock_fs; /* Memory clock period in femtoseconds */
uint32_t qclkps; /* Quadrature clock period in picoseconds */
@@ -1589,5 +1590,5 @@ index 45f8174995..4c3f399b5d 100644
#define HDAUDRID 0x6008
#define UMAGFXCTL 0x6020
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/haswell/patches/0004-haswell-NRI-Add-timings-refresh-programming.patch b/config/coreboot/default/patches/0046-haswell-NRI-Add-timings-refresh-programming.patch
index 74c21227..73234ac5 100644
--- a/config/coreboot/haswell/patches/0004-haswell-NRI-Add-timings-refresh-programming.patch
+++ b/config/coreboot/default/patches/0046-haswell-NRI-Add-timings-refresh-programming.patch
@@ -1,7 +1,7 @@
-From d94843c7c0e25cb6da4040b845556034fdb0e2c3 Mon Sep 17 00:00:00 2001
+From 694d1650cad8573e899916c0d0a25604885f6e3b Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Sat, 7 May 2022 20:59:58 +0200
-Subject: [PATCH 04/20] haswell NRI: Add timings/refresh programming
+Subject: [PATCH 46/65] haswell NRI: Add timings/refresh programming
Program the registers with timing and refresh parameters.
@@ -126,10 +126,10 @@ index 8b81c7c341..b8d6c1ef40 100644
+ return DIV_ROUND_UP(get_tZQOPER(mem_clock_mhz, lpddr), 4);
+}
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index aa86b9aa39..cd1f2eb2a5 100644
+index fffa6d5450..5915a2bab0 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -155,6 +155,12 @@ struct sysinfo {
+@@ -156,6 +156,12 @@ struct sysinfo {
uint8_t cke_cmd_pi_code[NUM_CHANNELS][NUM_GROUPS];
uint8_t cmd_north_pi_code[NUM_CHANNELS][NUM_GROUPS];
uint8_t cmd_south_pi_code[NUM_CHANNELS][NUM_GROUPS];
@@ -142,7 +142,7 @@ index aa86b9aa39..cd1f2eb2a5 100644
};
static inline bool is_hsw_ult(void)
-@@ -200,6 +206,14 @@ enum raminit_status configure_mc(struct sysinfo *ctrl);
+@@ -201,6 +207,14 @@ enum raminit_status configure_mc(struct sysinfo *ctrl);
void configure_timings(struct sysinfo *ctrl);
void configure_refresh(struct sysinfo *ctrl);
@@ -537,5 +537,5 @@ index 4c3f399b5d..2acc5cbbc8 100644
/* MCMAIN broadcast */
#define MCSCHEDS_CBIT 0x4c20
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0046-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch b/config/coreboot/default/patches/0046-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch
deleted file mode 100644
index 34d92278..00000000
--- a/config/coreboot/default/patches/0046-mb-dell-Add-S3-SMI-handler-for-SNB-IVB-Latitudes.patch
+++ /dev/null
@@ -1,133 +0,0 @@
-From 9ff35368733c5e5a852ebd6295f262710553913b Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Fri, 3 May 2024 16:31:12 -0600
-Subject: [PATCH] mb/dell/: Add S3 SMI handler for SNB/IVB Latitudes
-
-This should fix S3 suspend on these systems
-
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/e5420/smihandler.c | 9 +++++++++
- src/mainboard/dell/e5520/smihandler.c | 9 +++++++++
- src/mainboard/dell/e5530/smihandler.c | 9 +++++++++
- src/mainboard/dell/e6420/smihandler.c | 9 +++++++++
- src/mainboard/dell/e6430/smihandler.c | 9 +++++++++
- src/mainboard/dell/e6520/smihandler.c | 9 +++++++++
- src/mainboard/dell/e6530/smihandler.c | 9 +++++++++
- 7 files changed, 63 insertions(+)
- create mode 100644 src/mainboard/dell/e5420/smihandler.c
- create mode 100644 src/mainboard/dell/e5520/smihandler.c
- create mode 100644 src/mainboard/dell/e5530/smihandler.c
- create mode 100644 src/mainboard/dell/e6420/smihandler.c
- create mode 100644 src/mainboard/dell/e6430/smihandler.c
- create mode 100644 src/mainboard/dell/e6520/smihandler.c
- create mode 100644 src/mainboard/dell/e6530/smihandler.c
-
-diff --git a/src/mainboard/dell/e5420/smihandler.c b/src/mainboard/dell/e5420/smihandler.c
-new file mode 100644
-index 0000000000..334d7b1a5f
---- /dev/null
-+++ b/src/mainboard/dell/e5420/smihandler.c
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <cpu/x86/smm.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+
-+void mainboard_smi_sleep(u8 slp_typ)
-+{
-+ mec5035_sleep(slp_typ);
-+}
-diff --git a/src/mainboard/dell/e5520/smihandler.c b/src/mainboard/dell/e5520/smihandler.c
-new file mode 100644
-index 0000000000..334d7b1a5f
---- /dev/null
-+++ b/src/mainboard/dell/e5520/smihandler.c
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <cpu/x86/smm.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+
-+void mainboard_smi_sleep(u8 slp_typ)
-+{
-+ mec5035_sleep(slp_typ);
-+}
-diff --git a/src/mainboard/dell/e5530/smihandler.c b/src/mainboard/dell/e5530/smihandler.c
-new file mode 100644
-index 0000000000..334d7b1a5f
---- /dev/null
-+++ b/src/mainboard/dell/e5530/smihandler.c
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <cpu/x86/smm.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+
-+void mainboard_smi_sleep(u8 slp_typ)
-+{
-+ mec5035_sleep(slp_typ);
-+}
-diff --git a/src/mainboard/dell/e6420/smihandler.c b/src/mainboard/dell/e6420/smihandler.c
-new file mode 100644
-index 0000000000..334d7b1a5f
---- /dev/null
-+++ b/src/mainboard/dell/e6420/smihandler.c
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <cpu/x86/smm.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+
-+void mainboard_smi_sleep(u8 slp_typ)
-+{
-+ mec5035_sleep(slp_typ);
-+}
-diff --git a/src/mainboard/dell/e6430/smihandler.c b/src/mainboard/dell/e6430/smihandler.c
-new file mode 100644
-index 0000000000..334d7b1a5f
---- /dev/null
-+++ b/src/mainboard/dell/e6430/smihandler.c
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <cpu/x86/smm.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+
-+void mainboard_smi_sleep(u8 slp_typ)
-+{
-+ mec5035_sleep(slp_typ);
-+}
-diff --git a/src/mainboard/dell/e6520/smihandler.c b/src/mainboard/dell/e6520/smihandler.c
-new file mode 100644
-index 0000000000..334d7b1a5f
---- /dev/null
-+++ b/src/mainboard/dell/e6520/smihandler.c
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <cpu/x86/smm.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+
-+void mainboard_smi_sleep(u8 slp_typ)
-+{
-+ mec5035_sleep(slp_typ);
-+}
-diff --git a/src/mainboard/dell/e6530/smihandler.c b/src/mainboard/dell/e6530/smihandler.c
-new file mode 100644
-index 0000000000..334d7b1a5f
---- /dev/null
-+++ b/src/mainboard/dell/e6530/smihandler.c
-@@ -0,0 +1,9 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <cpu/x86/smm.h>
-+#include <ec/dell/mec5035/mec5035.h>
-+
-+void mainboard_smi_sleep(u8 slp_typ)
-+{
-+ mec5035_sleep(slp_typ);
-+}
---
-2.44.0
-
diff --git a/config/coreboot/haswell/patches/0005-haswell-NRI-Program-memory-map.patch b/config/coreboot/default/patches/0047-haswell-NRI-Program-memory-map.patch
index e095417c..58a2f556 100644
--- a/config/coreboot/haswell/patches/0005-haswell-NRI-Program-memory-map.patch
+++ b/config/coreboot/default/patches/0047-haswell-NRI-Program-memory-map.patch
@@ -1,7 +1,7 @@
-From b872fb9fc10d1789989072b8533b797152e6cb54 Mon Sep 17 00:00:00 2001
+From 70d7333e1e0c2b0ce0f2a7e4c4c3ac5c1aca2094 Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Sat, 7 May 2022 21:24:50 +0200
-Subject: [PATCH 05/20] haswell NRI: Program memory map
+Subject: [PATCH 47/65] haswell NRI: Program memory map
This is very similar to Sandy/Ivy Bridge, except that there's several
registers to program in GDXCBAR. One of these GDXCBAR registers has a
@@ -234,10 +234,10 @@ index fcc981ad04..559dfc3a4e 100644
/* Return a generic stepping value to make stepping checks simpler */
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index cd1f2eb2a5..4763b25e8d 100644
+index 5915a2bab0..8f937c4ccd 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -202,6 +202,7 @@ enum raminit_status collect_spd_info(struct sysinfo *ctrl);
+@@ -203,6 +203,7 @@ enum raminit_status collect_spd_info(struct sysinfo *ctrl);
enum raminit_status initialise_mpll(struct sysinfo *ctrl);
enum raminit_status convert_timings(struct sysinfo *ctrl);
enum raminit_status configure_mc(struct sysinfo *ctrl);
@@ -259,5 +259,5 @@ index 1ee0ab2890..0228cf6bb9 100644
#define PAM0 0x80
#define PAM1 0x81
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0047-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch b/config/coreboot/default/patches/0047-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
deleted file mode 100644
index a7af707e..00000000
--- a/config/coreboot/default/patches/0047-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch
+++ /dev/null
@@ -1,55 +0,0 @@
-From fa4f05e39744eb4c4606f940b8acc7fd053b11d4 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sat, 4 May 2024 02:00:53 +0100
-Subject: [PATCH 1/1] nb/haswell: lock policy regs when disabling IOMMU
-
-Angel Pons told me I should do it. See comments here:
-https://review.coreboot.org/c/coreboot/+/81016
-
-I see no harm in complying with the request. I'll merge
-this into the main patch at a later date and try to
-get this upstreamed.
-
-Just a reminder: on Optiplex 9020 variants, Xorg locks up
-under Linux when tested with a graphics card; disabling
-IOMMU works around the issue. Intel graphics work just fine
-with IOMMU turned on. Libreboot disables IOMMU by default,
-on the 9020, so that users can install graphics cards easily.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/northbridge/intel/haswell/early_init.c | 15 +++++++--------
- 1 file changed, 7 insertions(+), 8 deletions(-)
-
-diff --git a/src/northbridge/intel/haswell/early_init.c b/src/northbridge/intel/haswell/early_init.c
-index 1a7e0b1076..e9506ee830 100644
---- a/src/northbridge/intel/haswell/early_init.c
-+++ b/src/northbridge/intel/haswell/early_init.c
-@@ -160,17 +160,16 @@ static void haswell_setup_iommu(void)
- const u32 capid0_a = pci_read_config32(HOST_BRIDGE, CAPID0_A);
- u8 enable_iommu = get_uint_option("iommu", 1);
-
-- if (!enable_iommu)
-- return;
--
- if (capid0_a & VTD_DISABLE)
- return;
-
-- /* Setup BARs: zeroize top 32 bits; set enable bit */
-- mchbar_write32(GFXVTBAR + 4, GFXVT_BASE_ADDRESS >> 32);
-- mchbar_write32(GFXVTBAR + 0, GFXVT_BASE_ADDRESS | 1);
-- mchbar_write32(VTVC0BAR + 4, VTVC0_BASE_ADDRESS >> 32);
-- mchbar_write32(VTVC0BAR + 0, VTVC0_BASE_ADDRESS | 1);
-+ if (enable_iommu) {
-+ /* Setup BARs: zeroize top 32 bits; set enable bit */
-+ mchbar_write32(GFXVTBAR + 4, GFXVT_BASE_ADDRESS >> 32);
-+ mchbar_write32(GFXVTBAR + 0, GFXVT_BASE_ADDRESS | 1);
-+ mchbar_write32(VTVC0BAR + 4, VTVC0_BASE_ADDRESS >> 32);
-+ mchbar_write32(VTVC0BAR + 0, VTVC0_BASE_ADDRESS | 1);
-+ }
-
- /* Set L3HIT2PEND_DIS, lock GFXVTBAR policy config registers */
- u32 reg32;
---
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0006-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch b/config/coreboot/default/patches/0048-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
index ea46364f..b4108c7b 100644
--- a/config/coreboot/haswell/patches/0006-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
+++ b/config/coreboot/default/patches/0048-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch
@@ -1,7 +1,7 @@
-From 1ea9b05694da7ee61d49d9cd2b7e533a98e42321 Mon Sep 17 00:00:00 2001
+From cc302630662eee011a903df4fd7a36d82bd22203 Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Sat, 7 May 2022 21:49:40 +0200
-Subject: [PATCH 06/20] haswell NRI: Add DDR3 JEDEC reset and init
+Subject: [PATCH 48/65] haswell NRI: Add DDR3 JEDEC reset and init
Implement JEDEC reset and init sequence for DDR3. The MRS commands are
issued through the REUT (Robust Electrical Unified Testing) hardware.
@@ -443,10 +443,10 @@ index 559dfc3a4e..94b268468c 100644
}
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 4763b25e8d..4bc2a4955f 100644
+index 8f937c4ccd..759d755d6d 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -27,6 +27,30 @@
+@@ -28,6 +28,30 @@
/* Always use 12 legs for emphasis (not trained) */
#define TXEQFULLDRV (3 << 4)
@@ -477,7 +477,7 @@ index 4763b25e8d..4bc2a4955f 100644
enum command_training_iteration {
CT_ITERATION_CLOCK = 0,
CT_ITERATION_CMD_NORTH,
-@@ -50,6 +74,7 @@ enum raminit_status {
+@@ -51,6 +75,7 @@ enum raminit_status {
RAMINIT_STATUS_UNSUPPORTED_MEMORY,
RAMINIT_STATUS_MPLL_INIT_FAILURE,
RAMINIT_STATUS_POLL_TIMEOUT,
@@ -485,7 +485,7 @@ index 4763b25e8d..4bc2a4955f 100644
RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
};
-@@ -72,6 +97,7 @@ struct sysinfo {
+@@ -73,6 +98,7 @@ struct sysinfo {
uint32_t cpu; /* CPUID value */
bool dq_pins_interleaved;
@@ -493,7 +493,7 @@ index 4763b25e8d..4bc2a4955f 100644
/** TODO: ECC support untested **/
bool is_ecc;
-@@ -161,6 +187,11 @@ struct sysinfo {
+@@ -162,6 +188,11 @@ struct sysinfo {
union tc_bank_rank_b_reg tc_bankrank_b[NUM_CHANNELS];
union tc_bank_rank_c_reg tc_bankrank_c[NUM_CHANNELS];
union tc_bank_rank_d_reg tc_bankrank_d[NUM_CHANNELS];
@@ -505,7 +505,7 @@ index 4763b25e8d..4bc2a4955f 100644
};
static inline bool is_hsw_ult(void)
-@@ -196,6 +227,53 @@ static inline void clear_data_offset_train_all(struct sysinfo *ctrl)
+@@ -197,6 +228,53 @@ static inline void clear_data_offset_train_all(struct sysinfo *ctrl)
memset(ctrl->data_offset_train, 0, sizeof(ctrl->data_offset_train));
}
@@ -559,7 +559,7 @@ index 4763b25e8d..4bc2a4955f 100644
void raminit_main(enum raminit_boot_mode bootmode);
enum raminit_status collect_spd_info(struct sysinfo *ctrl);
-@@ -203,6 +281,7 @@ enum raminit_status initialise_mpll(struct sysinfo *ctrl);
+@@ -204,6 +282,7 @@ enum raminit_status initialise_mpll(struct sysinfo *ctrl);
enum raminit_status convert_timings(struct sysinfo *ctrl);
enum raminit_status configure_mc(struct sysinfo *ctrl);
enum raminit_status configure_memory_map(struct sysinfo *ctrl);
@@ -567,7 +567,7 @@ index 4763b25e8d..4bc2a4955f 100644
void configure_timings(struct sysinfo *ctrl);
void configure_refresh(struct sysinfo *ctrl);
-@@ -215,8 +294,28 @@ uint32_t get_tXS_offset(uint32_t mem_clock_mhz);
+@@ -216,8 +295,28 @@ uint32_t get_tXS_offset(uint32_t mem_clock_mhz);
uint32_t get_tZQOPER(uint32_t mem_clock_mhz, bool lpddr);
uint32_t get_tZQCS(uint32_t mem_clock_mhz, bool lpddr);
@@ -1032,5 +1032,5 @@ index 07f4b9dc16..5b3696347c 100644
#define PMSYNC_CONFIG2 0x33cc /* 32bit */
#define SOFT_RESET_CTRL 0x38f4
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/haswell/patches/0007-haswell-NRI-Add-pre-training-steps.patch b/config/coreboot/default/patches/0049-haswell-NRI-Add-pre-training-steps.patch
index 8b73df88..ffec948d 100644
--- a/config/coreboot/haswell/patches/0007-haswell-NRI-Add-pre-training-steps.patch
+++ b/config/coreboot/default/patches/0049-haswell-NRI-Add-pre-training-steps.patch
@@ -1,7 +1,7 @@
-From 936d432822fcd9aa2f018444cdc89e48e6d257d5 Mon Sep 17 00:00:00 2001
+From 0f160dee563155e93422fc77c53251419043d4dc Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Sat, 7 May 2022 23:12:18 +0200
-Subject: [PATCH 07/20] haswell NRI: Add pre-training steps
+Subject: [PATCH 49/65] haswell NRI: Add pre-training steps
Implement pre-training steps, which consist of enabling ECC I/O and
filling the WDB (Write Data Buffer, stores test patterns) through a
@@ -91,10 +91,10 @@ index 94b268468c..5e4674957d 100644
/* Return a generic stepping value to make stepping checks simpler */
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 4bc2a4955f..1971b44b66 100644
+index 759d755d6d..4d9487d79c 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -35,6 +35,13 @@
+@@ -36,6 +36,13 @@
#define RTTNOM_MASK (BIT(9) | BIT(6) | BIT(2))
@@ -108,7 +108,7 @@ index 4bc2a4955f..1971b44b66 100644
/* ZQ calibration types */
enum {
ZQ_INIT, /* DDR3: ZQCL with tZQinit, LPDDR3: ZQ Init with tZQinit */
-@@ -316,6 +323,23 @@ void reut_issue_mrs_all(
+@@ -317,6 +324,23 @@ void reut_issue_mrs_all(
enum raminit_status reut_issue_zq(struct sysinfo *ctrl, uint8_t chanmask, uint8_t zq_type);
@@ -388,5 +388,5 @@ index 4fc78a7f43..f8408e51a0 100644
#define REUT_ch_SEQ_CFG(ch) (0x48a8 + 8 * (ch))
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/haswell/patches/0008-haswell-NRI-Add-REUT-I-O-test-library.patch b/config/coreboot/default/patches/0050-haswell-NRI-Add-REUT-I-O-test-library.patch
index 2225f18c..a65a6ea1 100644
--- a/config/coreboot/haswell/patches/0008-haswell-NRI-Add-REUT-I-O-test-library.patch
+++ b/config/coreboot/default/patches/0050-haswell-NRI-Add-REUT-I-O-test-library.patch
@@ -1,7 +1,7 @@
-From 49a7ef2401922a8492ba577a43235bcfba7ea822 Mon Sep 17 00:00:00 2001
+From 78b25eb96baef7da2f5481572a6df2b88ee2b3d4 Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Sun, 8 May 2022 00:11:29 +0200
-Subject: [PATCH 08/20] haswell NRI: Add REUT I/O test library
+Subject: [PATCH 50/65] haswell NRI: Add REUT I/O test library
Implement a library to run I/O tests using the REUT hardware.
@@ -27,10 +27,10 @@ index 8d7d4e4db0..6e1b365602 100644
+romstage-y += testing_io.c
romstage-y += timings_refresh.c
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 1971b44b66..7f19fde4cc 100644
+index 4d9487d79c..f029e7f076 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -58,6 +58,88 @@ enum {
+@@ -59,6 +59,88 @@ enum {
REUT_MODE_NOP = 3, /* Normal operation mode */
};
@@ -119,7 +119,7 @@ index 1971b44b66..7f19fde4cc 100644
enum command_training_iteration {
CT_ITERATION_CLOCK = 0,
CT_ITERATION_CMD_NORTH,
-@@ -199,6 +281,10 @@ struct sysinfo {
+@@ -200,6 +282,10 @@ struct sysinfo {
uint16_t mr1[NUM_CHANNELS][NUM_SLOTS];
uint16_t mr2[NUM_CHANNELS][NUM_SLOTS];
uint16_t mr3[NUM_CHANNELS][NUM_SLOTS];
@@ -130,7 +130,7 @@ index 1971b44b66..7f19fde4cc 100644
};
static inline bool is_hsw_ult(void)
-@@ -340,6 +426,30 @@ void write_wdb_va_pat(
+@@ -341,6 +427,30 @@ void write_wdb_va_pat(
void program_wdb_lfsr(const struct sysinfo *ctrl, bool cleanup);
void setup_wdb(const struct sysinfo *ctrl);
@@ -1126,5 +1126,5 @@ index f8408e51a0..817a9f8bf8 100644
#define MCSCHEDS_CBIT 0x4c20
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/haswell/patches/0009-haswell-NRI-Add-range-tracking-library.patch b/config/coreboot/default/patches/0051-haswell-NRI-Add-range-tracking-library.patch
index 9c3fe1c9..2ec35e26 100644
--- a/config/coreboot/haswell/patches/0009-haswell-NRI-Add-range-tracking-library.patch
+++ b/config/coreboot/default/patches/0051-haswell-NRI-Add-range-tracking-library.patch
@@ -1,7 +1,7 @@
-From 7f5c3f8c6c8960d1c374b9c95821c19f230fa34f Mon Sep 17 00:00:00 2001
+From ca6d92e13278832dfddbe7dcb4cbefa5861041e8 Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Sun, 8 May 2022 00:56:00 +0200
-Subject: [PATCH 09/20] haswell NRI: Add range tracking library
+Subject: [PATCH 51/65] haswell NRI: Add range tracking library
Implement a small library used to keep track of passing ranges. This
will be used by 1D training algorithms when margining some parameter.
@@ -218,5 +218,5 @@ index 0000000000..235392df96
+
+#endif
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/haswell/patches/0010-haswell-NRI-Add-library-to-change-margins.patch b/config/coreboot/default/patches/0052-haswell-NRI-Add-library-to-change-margins.patch
index 622fac5a..ffd76fc4 100644
--- a/config/coreboot/haswell/patches/0010-haswell-NRI-Add-library-to-change-margins.patch
+++ b/config/coreboot/default/patches/0052-haswell-NRI-Add-library-to-change-margins.patch
@@ -1,7 +1,7 @@
-From 8ad18cc335f60a78f47ab9e5a7994f6075b6a176 Mon Sep 17 00:00:00 2001
+From f6d7bd420640a9ccb137113d69b97bc13fe6b0da Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Sun, 8 May 2022 01:11:03 +0200
-Subject: [PATCH 10/20] haswell NRI: Add library to change margins
+Subject: [PATCH 52/65] haswell NRI: Add library to change margins
Implement a library to change Rx/Tx margins. It will be expanded later.
@@ -187,10 +187,10 @@ index 0000000000..055c666eee
+ mchbar_write32(reg, ddr_data_control_0.raw);
+}
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 7f19fde4cc..906b3143b9 100644
+index f029e7f076..8707257b27 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -117,6 +117,30 @@ enum test_stop {
+@@ -118,6 +118,30 @@ enum test_stop {
ALSOE = 3, /* Stop on all lanes error */
};
@@ -221,7 +221,7 @@ index 7f19fde4cc..906b3143b9 100644
struct wdb_pat {
uint32_t start_ptr; /* Starting pointer in WDB */
uint32_t stop_ptr; /* Stopping pointer in WDB */
-@@ -450,6 +474,32 @@ uint8_t select_reut_ranks(struct sysinfo *ctrl, uint8_t channel, uint8_t rankmas
+@@ -451,6 +475,32 @@ uint8_t select_reut_ranks(struct sysinfo *ctrl, uint8_t channel, uint8_t rankmas
void run_mpr_io_test(bool clear_errors);
uint8_t run_io_test(struct sysinfo *ctrl, uint8_t chanmask, uint8_t dq_pat, bool clear_errors);
@@ -290,5 +290,5 @@ index 817a9f8bf8..a81559bb1e 100644
#define REUT_ch_SEQ_ADDR_INC_CTL(ch) (0x4910 + 8 * (ch))
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/haswell/patches/0011-haswell-NRI-Add-RcvEn-training.patch b/config/coreboot/default/patches/0053-haswell-NRI-Add-RcvEn-training.patch
index 4815be9a..fdb8d270 100644
--- a/config/coreboot/haswell/patches/0011-haswell-NRI-Add-RcvEn-training.patch
+++ b/config/coreboot/default/patches/0053-haswell-NRI-Add-RcvEn-training.patch
@@ -1,7 +1,7 @@
-From 4254a9ff03658d7a6f1a4e32cfe4c65dbfc072f8 Mon Sep 17 00:00:00 2001
+From d3cd9ccb7d2eed7ecd5bcdc33d73a5e28b029dba Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Sun, 8 May 2022 00:05:41 +0200
-Subject: [PATCH 11/20] haswell NRI: Add RcvEn training
+Subject: [PATCH 53/65] haswell NRI: Add RcvEn training
Implement the RcvEn (Receive Enable) calibration procedure.
@@ -39,10 +39,10 @@ index 5e4674957d..7d444659c3 100644
/* Return a generic stepping value to make stepping checks simpler */
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 906b3143b9..b4e8c7de5a 100644
+index 8707257b27..eaaaedad1e 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -42,6 +42,9 @@
+@@ -43,6 +43,9 @@
#define NUM_WDB_CL_MUX_SEEDS 3
#define NUM_CADB_MUX_SEEDS 3
@@ -52,7 +52,7 @@ index 906b3143b9..b4e8c7de5a 100644
/* ZQ calibration types */
enum {
ZQ_INIT, /* DDR3: ZQCL with tZQinit, LPDDR3: ZQ Init with tZQinit */
-@@ -188,6 +191,7 @@ enum raminit_status {
+@@ -189,6 +192,7 @@ enum raminit_status {
RAMINIT_STATUS_MPLL_INIT_FAILURE,
RAMINIT_STATUS_POLL_TIMEOUT,
RAMINIT_STATUS_REUT_ERROR,
@@ -60,7 +60,7 @@ index 906b3143b9..b4e8c7de5a 100644
RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
};
-@@ -270,6 +274,10 @@ struct sysinfo {
+@@ -271,6 +275,10 @@ struct sysinfo {
union ddr_data_vref_adjust_reg dimm_vref;
@@ -71,7 +71,7 @@ index 906b3143b9..b4e8c7de5a 100644
uint32_t data_offset_train[NUM_CHANNELS][NUM_LANES];
uint32_t data_offset_comp[NUM_CHANNELS][NUM_LANES];
-@@ -344,6 +352,11 @@ static inline void clear_data_offset_train_all(struct sysinfo *ctrl)
+@@ -345,6 +353,11 @@ static inline void clear_data_offset_train_all(struct sysinfo *ctrl)
memset(ctrl->data_offset_train, 0, sizeof(ctrl->data_offset_train));
}
@@ -83,7 +83,7 @@ index 906b3143b9..b4e8c7de5a 100644
/* Number of ticks to wait in units of 69.841279 ns (citation needed) */
static inline void tick_delay(const uint32_t delay)
{
-@@ -399,6 +412,7 @@ enum raminit_status convert_timings(struct sysinfo *ctrl);
+@@ -400,6 +413,7 @@ enum raminit_status convert_timings(struct sysinfo *ctrl);
enum raminit_status configure_mc(struct sysinfo *ctrl);
enum raminit_status configure_memory_map(struct sysinfo *ctrl);
enum raminit_status do_jedec_init(struct sysinfo *ctrl);
@@ -704,5 +704,5 @@ index a81559bb1e..9172d4f2b0 100644
#define REUT_ch_PAT_WDB_CL_MUX_CFG(ch) _MCMAIN_C(0x4040, ch)
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/haswell/patches/0012-haswell-NRI-Add-function-to-change-margins.patch b/config/coreboot/default/patches/0054-haswell-NRI-Add-function-to-change-margins.patch
index f4f5161e..58cc9d82 100644
--- a/config/coreboot/haswell/patches/0012-haswell-NRI-Add-function-to-change-margins.patch
+++ b/config/coreboot/default/patches/0054-haswell-NRI-Add-function-to-change-margins.patch
@@ -1,7 +1,7 @@
-From c24b26594bfab47a8709ed7fb5cb77307fb73a53 Mon Sep 17 00:00:00 2001
+From dbf0fc28bbb939fe5a90c991b752f790828d462d Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Sun, 8 May 2022 11:58:59 +0200
-Subject: [PATCH 12/20] haswell NRI: Add function to change margins
+Subject: [PATCH 54/65] haswell NRI: Add function to change margins
Implement a function to change margin parameters. Haswell provides a
register to apply an offset to margin parameters during training, so
@@ -169,10 +169,10 @@ index 055c666eee..299c44a6b0 100644
+ change_margin(ctrl, param, value0, true, 0, rank, 0, update_ctrl, regfile);
+}
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index b4e8c7de5a..5242b16f28 100644
+index eaaaedad1e..1c8473056b 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -35,6 +35,18 @@
+@@ -36,6 +36,18 @@
#define RTTNOM_MASK (BIT(9) | BIT(6) | BIT(2))
@@ -191,7 +191,7 @@ index b4e8c7de5a..5242b16f28 100644
#define BASIC_VA_PAT_SPREAD_8 0x01010101
#define WDB_CACHE_LINE_SIZE 8
-@@ -45,6 +57,14 @@
+@@ -46,6 +58,14 @@
/* Specified in PI ticks. 64 PI ticks == 1 qclk */
#define tDQSCK_DRIFT 64
@@ -206,7 +206,7 @@ index b4e8c7de5a..5242b16f28 100644
/* ZQ calibration types */
enum {
ZQ_INIT, /* DDR3: ZQCL with tZQinit, LPDDR3: ZQ Init with tZQinit */
-@@ -514,6 +534,25 @@ void download_regfile(
+@@ -515,6 +535,25 @@ void download_regfile(
bool read_rf_rd,
bool read_rf_wr);
@@ -268,5 +268,5 @@ index 9172d4f2b0..0acafbc826 100644
/* DDR CKE per-channel */
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/haswell/patches/0013-haswell-NRI-Add-read-MPR-training.patch b/config/coreboot/default/patches/0055-haswell-NRI-Add-read-MPR-training.patch
index 5f154bcc..be0ddd13 100644
--- a/config/coreboot/haswell/patches/0013-haswell-NRI-Add-read-MPR-training.patch
+++ b/config/coreboot/default/patches/0055-haswell-NRI-Add-read-MPR-training.patch
@@ -1,7 +1,7 @@
-From e263f0d2e9d6d016d603342651da261bbcb6af1f Mon Sep 17 00:00:00 2001
+From 0a557e3d09a9a53bb085c43e6bdb99fa4cd78b85 Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Sun, 8 May 2022 11:35:49 +0200
-Subject: [PATCH 13/20] haswell NRI: Add read MPR training
+Subject: [PATCH 55/65] haswell NRI: Add read MPR training
Implement read training using DDR3 MPR (Multi-Purpose Register).
@@ -39,10 +39,10 @@ index 7d444659c3..264d1468f5 100644
/* Return a generic stepping value to make stepping checks simpler */
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 5242b16f28..49e9214656 100644
+index 1c8473056b..7a486479ea 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -27,6 +27,8 @@
+@@ -28,6 +28,8 @@
/* Always use 12 legs for emphasis (not trained) */
#define TXEQFULLDRV (3 << 4)
@@ -51,7 +51,7 @@ index 5242b16f28..49e9214656 100644
/* DDR3 mode register bits */
#define MR0_DLL_RESET BIT(8)
-@@ -212,6 +214,7 @@ enum raminit_status {
+@@ -213,6 +215,7 @@ enum raminit_status {
RAMINIT_STATUS_POLL_TIMEOUT,
RAMINIT_STATUS_REUT_ERROR,
RAMINIT_STATUS_RCVEN_FAILURE,
@@ -59,7 +59,7 @@ index 5242b16f28..49e9214656 100644
RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
};
-@@ -433,6 +436,7 @@ enum raminit_status configure_mc(struct sysinfo *ctrl);
+@@ -434,6 +437,7 @@ enum raminit_status configure_mc(struct sysinfo *ctrl);
enum raminit_status configure_memory_map(struct sysinfo *ctrl);
enum raminit_status do_jedec_init(struct sysinfo *ctrl);
enum raminit_status train_receive_enable(struct sysinfo *ctrl);
@@ -328,5 +328,5 @@ index 0acafbc826..6a31d3a32c 100644
#define REUT_ch_PAT_CADB_MRS(ch) _MCMAIN_C(0x419c, ch)
#define REUT_ch_PAT_CADB_MUX_CTRL(ch) _MCMAIN_C(0x41a0, ch)
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/haswell/patches/0014-haswell-NRI-Add-write-leveling.patch b/config/coreboot/default/patches/0056-haswell-NRI-Add-write-leveling.patch
index 5a96cd1f..0791fb80 100644
--- a/config/coreboot/haswell/patches/0014-haswell-NRI-Add-write-leveling.patch
+++ b/config/coreboot/default/patches/0056-haswell-NRI-Add-write-leveling.patch
@@ -1,7 +1,7 @@
-From bebe0b74bede64b03aa1e3781310ef539465627b Mon Sep 17 00:00:00 2001
+From e8f50deac2a671f7ec3958b376c37dd6b9bad5bd Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Sun, 8 May 2022 12:56:04 +0200
-Subject: [PATCH 14/20] haswell NRI: Add write leveling
+Subject: [PATCH 56/65] haswell NRI: Add write leveling
Implement JEDEC write leveling, which is done in two steps. The first
step uses the JEDEC procedure to do "fine" write leveling, i.e. align
@@ -43,10 +43,10 @@ index 264d1468f5..1ff23be615 100644
/* Return a generic stepping value to make stepping checks simpler */
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 49e9214656..86d89f2120 100644
+index 7a486479ea..d6b11b9d3c 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -59,6 +59,9 @@
+@@ -60,6 +60,9 @@
/* Specified in PI ticks. 64 PI ticks == 1 qclk */
#define tDQSCK_DRIFT 64
@@ -56,7 +56,7 @@ index 49e9214656..86d89f2120 100644
enum margin_parameter {
RcvEna,
RdT,
-@@ -215,6 +218,7 @@ enum raminit_status {
+@@ -216,6 +219,7 @@ enum raminit_status {
RAMINIT_STATUS_REUT_ERROR,
RAMINIT_STATUS_RCVEN_FAILURE,
RAMINIT_STATUS_RMPR_FAILURE,
@@ -64,7 +64,7 @@ index 49e9214656..86d89f2120 100644
RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
};
-@@ -380,6 +384,11 @@ static inline uint32_t get_data_train_feedback(const uint8_t channel, const uint
+@@ -381,6 +385,11 @@ static inline uint32_t get_data_train_feedback(const uint8_t channel, const uint
return mchbar_read32(DDR_DATA_TRAIN_FEEDBACK(channel, byte));
}
@@ -76,7 +76,7 @@ index 49e9214656..86d89f2120 100644
/* Number of ticks to wait in units of 69.841279 ns (citation needed) */
static inline void tick_delay(const uint32_t delay)
{
-@@ -437,6 +446,7 @@ enum raminit_status configure_memory_map(struct sysinfo *ctrl);
+@@ -438,6 +447,7 @@ enum raminit_status configure_memory_map(struct sysinfo *ctrl);
enum raminit_status do_jedec_init(struct sysinfo *ctrl);
enum raminit_status train_receive_enable(struct sysinfo *ctrl);
enum raminit_status train_read_mpr(struct sysinfo *ctrl);
@@ -685,5 +685,5 @@ index 6a31d3a32c..7c0b5a49de 100644
#define REUT_ch_MISC_ODT_CTRL(ch) _MCMAIN_C(0x4194, ch)
#define REUT_ch_MISC_PAT_CADB_CTRL(ch) _MCMAIN_C(0x4198, ch)
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/haswell/patches/0015-haswell-NRI-Add-final-raminit-steps.patch b/config/coreboot/default/patches/0057-haswell-NRI-Add-final-raminit-steps.patch
index 3626bf6d..3cd8c758 100644
--- a/config/coreboot/haswell/patches/0015-haswell-NRI-Add-final-raminit-steps.patch
+++ b/config/coreboot/default/patches/0057-haswell-NRI-Add-final-raminit-steps.patch
@@ -1,7 +1,7 @@
-From eba8680d618db95028e3f984f25881df0e67abf7 Mon Sep 17 00:00:00 2001
+From 990ee284d48b66f06adb6c43a96439f7628390f5 Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Sun, 8 May 2022 14:29:05 +0200
-Subject: [PATCH 15/20] haswell NRI: Add final raminit steps
+Subject: [PATCH 57/65] haswell NRI: Add final raminit steps
Implement the remaining raminit steps. Although many training steps are
missing, this is enough to boot on the Asrock B85M Pro4.
@@ -489,10 +489,10 @@ index 2fed93de5b..5f7ceec222 100644
/** TODO: setup_sdram_meminfo **/
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 86d89f2120..9bab57b518 100644
+index d6b11b9d3c..a0a913f926 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -447,6 +447,8 @@ enum raminit_status do_jedec_init(struct sysinfo *ctrl);
+@@ -448,6 +448,8 @@ enum raminit_status do_jedec_init(struct sysinfo *ctrl);
enum raminit_status train_receive_enable(struct sysinfo *ctrl);
enum raminit_status train_read_mpr(struct sysinfo *ctrl);
enum raminit_status train_jedec_write_leveling(struct sysinfo *ctrl);
@@ -566,5 +566,5 @@ index 7c0b5a49de..49a215aa71 100644
#define RCOMP_TIMER 0x5084
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/haswell/patches/0016-Haswell-NRI-Implement-fast-boot-path.patch b/config/coreboot/default/patches/0058-Haswell-NRI-Implement-fast-boot-path.patch
index c2fd8b60..b5d04b99 100644
--- a/config/coreboot/haswell/patches/0016-Haswell-NRI-Implement-fast-boot-path.patch
+++ b/config/coreboot/default/patches/0058-Haswell-NRI-Implement-fast-boot-path.patch
@@ -1,7 +1,7 @@
-From c7d6a901edf648f0f02dd2053337bcf3a319e49b Mon Sep 17 00:00:00 2001
+From 63e9aa1f998ebd41b4c638fa66bdb1a6272a9e85 Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Sat, 13 Apr 2024 01:16:30 +0200
-Subject: [PATCH 16/20] Haswell NRI: Implement fast boot path
+Subject: [PATCH 58/65] Haswell NRI: Implement fast boot path
When the memory configuration hasn't changed, there is no need to do
full memory training. Instead, boot firmware can use saved training
@@ -269,10 +269,10 @@ index 5f7ceec222..3ad8ce29e7 100644
/** TODO: setup_sdram_meminfo **/
}
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 9bab57b518..0750904aec 100644
+index a0a913f926..2ac16eaad3 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -169,6 +169,8 @@ enum regfile_mode {
+@@ -170,6 +170,8 @@ enum regfile_mode {
REG_FILE_USE_CURRENT, /* Used when changing parameters after the test */
};
@@ -281,7 +281,7 @@ index 9bab57b518..0750904aec 100644
struct wdb_pat {
uint32_t start_ptr; /* Starting pointer in WDB */
uint32_t stop_ptr; /* Stopping pointer in WDB */
-@@ -219,6 +221,7 @@ enum raminit_status {
+@@ -220,6 +222,7 @@ enum raminit_status {
RAMINIT_STATUS_RCVEN_FAILURE,
RAMINIT_STATUS_RMPR_FAILURE,
RAMINIT_STATUS_JWRL_FAILURE,
@@ -289,7 +289,7 @@ index 9bab57b518..0750904aec 100644
RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/
};
-@@ -228,6 +231,11 @@ enum generic_stepping {
+@@ -229,6 +232,11 @@ enum generic_stepping {
STEPPING_C0 = 3,
};
@@ -299,9 +299,9 @@ index 9bab57b518..0750904aec 100644
+};
+
struct raminit_dimm_info {
- spd_raw_data raw_spd;
+ spd_ddr3_raw_data raw_spd;
struct dimm_attr_ddr3_st data;
-@@ -447,12 +455,22 @@ enum raminit_status do_jedec_init(struct sysinfo *ctrl);
+@@ -448,12 +456,22 @@ enum raminit_status do_jedec_init(struct sysinfo *ctrl);
enum raminit_status train_receive_enable(struct sysinfo *ctrl);
enum raminit_status train_read_mpr(struct sysinfo *ctrl);
enum raminit_status train_jedec_write_leveling(struct sysinfo *ctrl);
@@ -718,5 +718,5 @@ index 0000000000..f1f50e3ff8
+ return RAMINIT_STATUS_SUCCESS;
+}
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/haswell/patches/0017-haswell-NRI-Do-sense-amplifier-offset-training.patch b/config/coreboot/default/patches/0059-haswell-NRI-Do-sense-amplifier-offset-training.patch
index 846fe9a3..0310e671 100644
--- a/config/coreboot/haswell/patches/0017-haswell-NRI-Do-sense-amplifier-offset-training.patch
+++ b/config/coreboot/default/patches/0059-haswell-NRI-Do-sense-amplifier-offset-training.patch
@@ -1,7 +1,7 @@
-From be58501141aa97aa544b670e566cd6cf6797c18e Mon Sep 17 00:00:00 2001
+From c22e06a8ef87f74cc9955ffc259e7052742269c4 Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Wed, 17 Apr 2024 13:20:32 +0200
-Subject: [PATCH 17/20] haswell NRI: Do sense amplifier offset training
+Subject: [PATCH 59/65] haswell NRI: Do sense amplifier offset training
Quoting Wikipedia:
@@ -61,10 +61,10 @@ index 056dde1adc..ce637e2d03 100644
{ train_read_mpr, true, "RDMPRT", },
{ train_jedec_write_leveling, true, "JWRL", },
diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-index 0750904aec..95ccd0a8b3 100644
+index 2ac16eaad3..07eea98831 100644
--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h
+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h
-@@ -22,6 +22,8 @@
+@@ -23,6 +23,8 @@
#define NUM_LANES 9
#define NUM_LANES_NO_ECC 8
@@ -73,7 +73,7 @@ index 0750904aec..95ccd0a8b3 100644
#define COMP_INT 10
/* Always use 12 legs for emphasis (not trained) */
-@@ -218,6 +220,7 @@ enum raminit_status {
+@@ -219,6 +221,7 @@ enum raminit_status {
RAMINIT_STATUS_MPLL_INIT_FAILURE,
RAMINIT_STATUS_POLL_TIMEOUT,
RAMINIT_STATUS_REUT_ERROR,
@@ -81,7 +81,7 @@ index 0750904aec..95ccd0a8b3 100644
RAMINIT_STATUS_RCVEN_FAILURE,
RAMINIT_STATUS_RMPR_FAILURE,
RAMINIT_STATUS_JWRL_FAILURE,
-@@ -243,6 +246,12 @@ struct raminit_dimm_info {
+@@ -244,6 +247,12 @@ struct raminit_dimm_info {
bool valid;
};
@@ -94,7 +94,7 @@ index 0750904aec..95ccd0a8b3 100644
struct sysinfo {
enum raminit_boot_mode bootmode;
enum generic_stepping stepping;
-@@ -330,6 +339,8 @@ struct sysinfo {
+@@ -331,6 +340,8 @@ struct sysinfo {
uint8_t rxdqsn[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES];
int8_t rxvref[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES];
@@ -103,7 +103,7 @@ index 0750904aec..95ccd0a8b3 100644
uint8_t clk_pi_code[NUM_CHANNELS][NUM_SLOTRANKS];
uint8_t ctl_pi_code[NUM_CHANNELS][NUM_SLOTRANKS];
uint8_t cke_pi_code[NUM_CHANNELS][NUM_SLOTRANKS];
-@@ -452,6 +463,7 @@ enum raminit_status convert_timings(struct sysinfo *ctrl);
+@@ -453,6 +464,7 @@ enum raminit_status convert_timings(struct sysinfo *ctrl);
enum raminit_status configure_mc(struct sysinfo *ctrl);
enum raminit_status configure_memory_map(struct sysinfo *ctrl);
enum raminit_status do_jedec_init(struct sysinfo *ctrl);
@@ -472,5 +472,5 @@ index 49a215aa71..1a168a3fc8 100644
#define DQ_CONTROL_1(ch, byte) _DDRIO_C_R_B(0x0060, ch, 0, byte)
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0060-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch b/config/coreboot/default/patches/0060-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
new file mode 100644
index 00000000..a899693b
--- /dev/null
+++ b/config/coreboot/default/patches/0060-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch
@@ -0,0 +1,52 @@
+From c0e95144b426ab323e0397942579261fbb7b922b Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Mon, 12 Aug 2024 02:15:24 +0100
+Subject: [PATCH 60/65] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ
+
+set it to 96MHz. fixes the following build error when
+building for x4x boards e.g. gigabyte ga-g41m-es2l:
+
+hw-gfx-gma-plls.adb:465:46: error: "INTEL_GMA_DPLL_REF_FREQ" not declared in "Config"
+make: *** [Makefile:423: build/ramstage/libgfxinit/common/g45/hw-gfx-gma-plls.o] Error 1
+
+this error was introduced when merging coreboot/dell
+into coreboot/default in lbmk. nicholas chin's fix in lbmk
+was as follows:
+
+commit 8629873a6043067affc137be275b7aa69cb1f10c
+Author: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Mon May 20 10:46:25 2024 -0600
+
+ Fix E6400 display issue with 1440 x 900 panel
+
+this currently corresponds to the patch in lbmk,
+as of 12 august 2024:
+
+0042-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch
+
+The assumption prior to Nicholas's fix was 96MHz, so set
+it accordingly on x4x northbridge.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/northbridge/intel/x4x/Kconfig | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
+index 9af063819b..93ba575b95 100644
+--- a/src/northbridge/intel/x4x/Kconfig
++++ b/src/northbridge/intel/x4x/Kconfig
+@@ -14,6 +14,10 @@ config NORTHBRIDGE_INTEL_X4X
+
+ if NORTHBRIDGE_INTEL_X4X
+
++config INTEL_GMA_DPLL_REF_FREQ
++ int
++ default 96000000
++
+ config CBFS_SIZE
+ default 0x100000 if !SOUTHBRIDGE_INTEL_I82801GX
+
+--
+2.39.5
+
diff --git a/config/coreboot/default/patches/0062-mb-dell-Convert-E6400-into-a-variant.patch b/config/coreboot/default/patches/0062-mb-dell-Convert-E6400-into-a-variant.patch
new file mode 100644
index 00000000..acd7074c
--- /dev/null
+++ b/config/coreboot/default/patches/0062-mb-dell-Convert-E6400-into-a-variant.patch
@@ -0,0 +1,243 @@
+From 0caa5d97b67b2acf571e4fab2b7f85ef3d3a7260 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Thu, 26 Sep 2024 19:48:26 -0600
+Subject: [PATCH 62/65] mb/dell: Convert E6400 into a variant
+
+All the GM45 Dell Latitudes should be nearly identical, so convert the
+E6400 port into a variant so that future ports for the other systems can
+share code with each other.
+
+Change-Id: I8094fce56eaaadb20aef173644cd3b2c0b008e95
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e6400/Makefile.mk | 10 --------
+ .../dell/{e6400 => gm45_latitude}/Kconfig | 22 +++++++++++++-----
+ .../{e6400 => gm45_latitude}/Kconfig.name | 0
+ src/mainboard/dell/gm45_latitude/Makefile.mk | 11 +++++++++
+ .../dell/{e6400 => gm45_latitude}/acpi/ec.asl | 0
+ .../acpi/ich9_pci_irqs.asl | 0
+ .../{e6400 => gm45_latitude}/acpi/superio.asl | 0
+ .../dell/{e6400 => gm45_latitude}/blc.c | 0
+ .../{e6400 => gm45_latitude}/board_info.txt | 0
+ .../dell/{e6400 => gm45_latitude}/bootblock.c | 0
+ .../{e6400 => gm45_latitude}/cmos.default | 0
+ .../dell/{e6400 => gm45_latitude}/cmos.layout | 0
+ .../dell/{e6400 => gm45_latitude}/cstates.c | 0
+ .../{e6400 => gm45_latitude}/devicetree.cb | 1 -
+ .../dell/{e6400 => gm45_latitude}/dsdt.asl | 0
+ .../dell/{e6400 => gm45_latitude}/mainboard.c | 0
+ .../dell/{e6400 => gm45_latitude}/romstage.c | 0
+ .../variants}/e6400/data.vbt | Bin
+ .../variants}/e6400/gma-mainboard.ads | 0
+ .../{ => gm45_latitude/variants}/e6400/gpio.c | 0
+ .../variants}/e6400/hda_verb.c | 0
+ .../variants/e6400/overridetree.cb | 7 ++++++
+ 22 files changed, 34 insertions(+), 17 deletions(-)
+ delete mode 100644 src/mainboard/dell/e6400/Makefile.mk
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/Kconfig (64%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/Kconfig.name (100%)
+ create mode 100644 src/mainboard/dell/gm45_latitude/Makefile.mk
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/ec.asl (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/ich9_pci_irqs.asl (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/superio.asl (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/blc.c (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/board_info.txt (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/bootblock.c (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/cmos.default (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/cmos.layout (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/cstates.c (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/devicetree.cb (98%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/dsdt.asl (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/mainboard.c (100%)
+ rename src/mainboard/dell/{e6400 => gm45_latitude}/romstage.c (100%)
+ rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/data.vbt (100%)
+ rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/gma-mainboard.ads (100%)
+ rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/gpio.c (100%)
+ rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/hda_verb.c (100%)
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
+
+diff --git a/src/mainboard/dell/e6400/Makefile.mk b/src/mainboard/dell/e6400/Makefile.mk
+deleted file mode 100644
+index ca3a82db48..0000000000
+--- a/src/mainboard/dell/e6400/Makefile.mk
++++ /dev/null
+@@ -1,10 +0,0 @@
+-## SPDX-License-Identifier: GPL-2.0-only
+-
+-bootblock-y += bootblock.c
+-
+-romstage-y += gpio.c
+-
+-ramstage-y += cstates.c
+-ramstage-y += blc.c
+-
+-ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+diff --git a/src/mainboard/dell/e6400/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig
+similarity index 64%
+rename from src/mainboard/dell/e6400/Kconfig
+rename to src/mainboard/dell/gm45_latitude/Kconfig
+index 6fe1b1c456..ba76fb6e8c 100644
+--- a/src/mainboard/dell/e6400/Kconfig
++++ b/src/mainboard/dell/gm45_latitude/Kconfig
+@@ -1,9 +1,7 @@
+ ## SPDX-License-Identifier: GPL-2.0-only
+
+-if BOARD_DELL_E6400
+-
+-config BOARD_SPECIFIC_OPTIONS
+- def_bool y
++config BOARD_DELL_GM45_LATITUDE_COMMON
++ def_bool n
+ select SYSTEM_TYPE_LAPTOP
+ select CPU_INTEL_SOCKET_P
+ select NORTHBRIDGE_INTEL_GM45
+@@ -19,19 +17,31 @@ config BOARD_SPECIFIC_OPTIONS
+ select INTEL_GMA_HAVE_VBT
+ select EC_DELL_MEC5035
+
++
++config BOARD_DELL_E6400
++ select BOARD_DELL_GM45_LATITUDE_COMMON
++
++if BOARD_DELL_GM45_LATITUDE_COMMON
++
+ config INTEL_GMA_DPLL_REF_FREQ
+ default 100000000
+
+ config MAINBOARD_DIR
+- default "dell/e6400"
++ default "dell/gm45_latitude"
+
+ config MAINBOARD_PART_NUMBER
+ default "Latitude E6400" if BOARD_DELL_E6400
+
++config OVERRIDE_DEVICETREE
++ default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
++
++config VARIANT_DIR
++ default "e6400" if BOARD_DELL_E6400
++
+ config USBDEBUG_HCD_INDEX
+ default 1
+
+ config CBFS_SIZE
+ default 0x1A0000
+
+-endif # BOARD_DELL_E6400
++endif # BOARD_DELL_GM45_LATITUDE_COMMON
+diff --git a/src/mainboard/dell/e6400/Kconfig.name b/src/mainboard/dell/gm45_latitude/Kconfig.name
+similarity index 100%
+rename from src/mainboard/dell/e6400/Kconfig.name
+rename to src/mainboard/dell/gm45_latitude/Kconfig.name
+diff --git a/src/mainboard/dell/gm45_latitude/Makefile.mk b/src/mainboard/dell/gm45_latitude/Makefile.mk
+new file mode 100644
+index 0000000000..5295d5be22
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/Makefile.mk
+@@ -0,0 +1,11 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++bootblock-y += bootblock.c
++
++romstage-y += variants/$(VARIANT_DIR)/gpio.c
++
++ramstage-y += cstates.c
++ramstage-y += blc.c
++ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
++
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
+diff --git a/src/mainboard/dell/e6400/acpi/ec.asl b/src/mainboard/dell/gm45_latitude/acpi/ec.asl
+similarity index 100%
+rename from src/mainboard/dell/e6400/acpi/ec.asl
+rename to src/mainboard/dell/gm45_latitude/acpi/ec.asl
+diff --git a/src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl b/src/mainboard/dell/gm45_latitude/acpi/ich9_pci_irqs.asl
+similarity index 100%
+rename from src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl
+rename to src/mainboard/dell/gm45_latitude/acpi/ich9_pci_irqs.asl
+diff --git a/src/mainboard/dell/e6400/acpi/superio.asl b/src/mainboard/dell/gm45_latitude/acpi/superio.asl
+similarity index 100%
+rename from src/mainboard/dell/e6400/acpi/superio.asl
+rename to src/mainboard/dell/gm45_latitude/acpi/superio.asl
+diff --git a/src/mainboard/dell/e6400/blc.c b/src/mainboard/dell/gm45_latitude/blc.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/blc.c
+rename to src/mainboard/dell/gm45_latitude/blc.c
+diff --git a/src/mainboard/dell/e6400/board_info.txt b/src/mainboard/dell/gm45_latitude/board_info.txt
+similarity index 100%
+rename from src/mainboard/dell/e6400/board_info.txt
+rename to src/mainboard/dell/gm45_latitude/board_info.txt
+diff --git a/src/mainboard/dell/e6400/bootblock.c b/src/mainboard/dell/gm45_latitude/bootblock.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/bootblock.c
+rename to src/mainboard/dell/gm45_latitude/bootblock.c
+diff --git a/src/mainboard/dell/e6400/cmos.default b/src/mainboard/dell/gm45_latitude/cmos.default
+similarity index 100%
+rename from src/mainboard/dell/e6400/cmos.default
+rename to src/mainboard/dell/gm45_latitude/cmos.default
+diff --git a/src/mainboard/dell/e6400/cmos.layout b/src/mainboard/dell/gm45_latitude/cmos.layout
+similarity index 100%
+rename from src/mainboard/dell/e6400/cmos.layout
+rename to src/mainboard/dell/gm45_latitude/cmos.layout
+diff --git a/src/mainboard/dell/e6400/cstates.c b/src/mainboard/dell/gm45_latitude/cstates.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/cstates.c
+rename to src/mainboard/dell/gm45_latitude/cstates.c
+diff --git a/src/mainboard/dell/e6400/devicetree.cb b/src/mainboard/dell/gm45_latitude/devicetree.cb
+similarity index 98%
+rename from src/mainboard/dell/e6400/devicetree.cb
+rename to src/mainboard/dell/gm45_latitude/devicetree.cb
+index e9f3915d17..76dae87153 100644
+--- a/src/mainboard/dell/e6400/devicetree.cb
++++ b/src/mainboard/dell/gm45_latitude/devicetree.cb
+@@ -15,7 +15,6 @@ chip northbridge/intel/gm45
+ register "pci_mmio_size" = "2048"
+
+ device domain 0 on
+- subsystemid 0x1028 0x0233 inherit
+ ops gm45_pci_domain_ops
+
+ device pci 00.0 on end # host bridge
+diff --git a/src/mainboard/dell/e6400/dsdt.asl b/src/mainboard/dell/gm45_latitude/dsdt.asl
+similarity index 100%
+rename from src/mainboard/dell/e6400/dsdt.asl
+rename to src/mainboard/dell/gm45_latitude/dsdt.asl
+diff --git a/src/mainboard/dell/e6400/mainboard.c b/src/mainboard/dell/gm45_latitude/mainboard.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/mainboard.c
+rename to src/mainboard/dell/gm45_latitude/mainboard.c
+diff --git a/src/mainboard/dell/e6400/romstage.c b/src/mainboard/dell/gm45_latitude/romstage.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/romstage.c
+rename to src/mainboard/dell/gm45_latitude/romstage.c
+diff --git a/src/mainboard/dell/e6400/data.vbt b/src/mainboard/dell/gm45_latitude/variants/e6400/data.vbt
+similarity index 100%
+rename from src/mainboard/dell/e6400/data.vbt
+rename to src/mainboard/dell/gm45_latitude/variants/e6400/data.vbt
+diff --git a/src/mainboard/dell/e6400/gma-mainboard.ads b/src/mainboard/dell/gm45_latitude/variants/e6400/gma-mainboard.ads
+similarity index 100%
+rename from src/mainboard/dell/e6400/gma-mainboard.ads
+rename to src/mainboard/dell/gm45_latitude/variants/e6400/gma-mainboard.ads
+diff --git a/src/mainboard/dell/e6400/gpio.c b/src/mainboard/dell/gm45_latitude/variants/e6400/gpio.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/gpio.c
+rename to src/mainboard/dell/gm45_latitude/variants/e6400/gpio.c
+diff --git a/src/mainboard/dell/e6400/hda_verb.c b/src/mainboard/dell/gm45_latitude/variants/e6400/hda_verb.c
+similarity index 100%
+rename from src/mainboard/dell/e6400/hda_verb.c
+rename to src/mainboard/dell/gm45_latitude/variants/e6400/hda_verb.c
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb b/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
+new file mode 100644
+index 0000000000..acc34a2252
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb
+@@ -0,0 +1,7 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/gm45
++ device domain 0 on
++ subsystemid 0x1028 0x0233 inherit
++ end
++end
+--
+2.39.5
+
diff --git a/config/coreboot/default/patches/0063-mb-dell-gm45_latitudes-Add-E4300-variant.patch b/config/coreboot/default/patches/0063-mb-dell-gm45_latitudes-Add-E4300-variant.patch
new file mode 100644
index 00000000..1e76adfe
--- /dev/null
+++ b/config/coreboot/default/patches/0063-mb-dell-gm45_latitudes-Add-E4300-variant.patch
@@ -0,0 +1,332 @@
+From bc9836ac2708687dfe43656adba2833493fa4199 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Thu, 26 Sep 2024 19:51:25 -0600
+Subject: [PATCH 63/65] mb/dell/gm45_latitudes: Add E4300 variant
+
+Change-Id: I0f2059501b11be103187e3ce1a7c04ab85ae63d2
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/gm45_latitude/Kconfig | 5 +
+ src/mainboard/dell/gm45_latitude/Kconfig.name | 3 +
+ .../gm45_latitude/variants/e4300/data.vbt | Bin 0 -> 3881 bytes
+ .../variants/e4300/gma-mainboard.ads | 17 +++
+ .../dell/gm45_latitude/variants/e4300/gpio.c | 138 ++++++++++++++++++
+ .../gm45_latitude/variants/e4300/hda_verb.c | 37 +++++
+ .../variants/e4300/overridetree.cb | 10 ++
+ 7 files changed, 210 insertions(+)
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/data.vbt
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/gma-mainboard.ads
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/gpio.c
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/hda_verb.c
+ create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/overridetree.cb
+
+diff --git a/src/mainboard/dell/gm45_latitude/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig
+index ba76fb6e8c..144f9bcdf0 100644
+--- a/src/mainboard/dell/gm45_latitude/Kconfig
++++ b/src/mainboard/dell/gm45_latitude/Kconfig
+@@ -21,6 +21,9 @@ config BOARD_DELL_GM45_LATITUDE_COMMON
+ config BOARD_DELL_E6400
+ select BOARD_DELL_GM45_LATITUDE_COMMON
+
++config BOARD_DELL_E4300
++ select BOARD_DELL_GM45_LATITUDE_COMMON
++
+ if BOARD_DELL_GM45_LATITUDE_COMMON
+
+ config INTEL_GMA_DPLL_REF_FREQ
+@@ -31,12 +34,14 @@ config MAINBOARD_DIR
+
+ config MAINBOARD_PART_NUMBER
+ default "Latitude E6400" if BOARD_DELL_E6400
++ default "Latitude E4300" if BOARD_DELL_E4300
+
+ config OVERRIDE_DEVICETREE
+ default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
+
+ config VARIANT_DIR
+ default "e6400" if BOARD_DELL_E6400
++ default "e4300" if BOARD_DELL_E4300
+
+ config USBDEBUG_HCD_INDEX
+ default 1
+diff --git a/src/mainboard/dell/gm45_latitude/Kconfig.name b/src/mainboard/dell/gm45_latitude/Kconfig.name
+index aefe777109..4dc95f46be 100644
+--- a/src/mainboard/dell/gm45_latitude/Kconfig.name
++++ b/src/mainboard/dell/gm45_latitude/Kconfig.name
+@@ -1,4 +1,7 @@
+ ## SPDX-License-Identifier: GPL-2.0-only
+
++config BOARD_DELL_E4300
++ bool "Latitude E4300"
++
+ config BOARD_DELL_E6400
+ bool "Latitude E6400"
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e4300/data.vbt b/src/mainboard/dell/gm45_latitude/variants/e4300/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..fa2f3db13f688b5687df16a155781d8674ea26f3
+GIT binary patch
+literal 3881
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+zeY&DumV{4Nw4(1*^g5r`avbR44Nj-miiQs;Ii;O}*rL^|oYl8hQ9P@{Qf5}Gn;uRg
+zI{c?gKNv~R$<jgIlQvzm9GD`y{Dh<T(H)!WlUUWvtFvzDqaVV>&eHj<So5w}UG%+7
+zt=J~1YHpT3TjRY{XlrmCz6QBZ$WqGr>8!uus22Br_GkCD$Q)pf!<P$30Ez;o=qDzr
+z7@f;LJ+ZPlo=?}4PvMm&OKLGLZ0h1&n7U8@9GP~;8!wz(OqQ<s6e;@8hfYU0ht*9>
+zGh%f}_&(hXOZrW-WCWJVw`DdrczV_sXGaOvzjt%F!O;{7J-K<j&AXad#XeO8mgw(v
+z_Gj1VBJZIpZ<>`tJBTNGZHe^T`VrkY0pv~u^?l~DG9UD8p8(692<oYlGx5_cte6LX
+JE5(FU=`RLB=-&VU
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e4300/gma-mainboard.ads b/src/mainboard/dell/gm45_latitude/variants/e4300/gma-mainboard.ads
+new file mode 100644
+index 0000000000..89b81b3d69
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/variants/e4300/gma-mainboard.ads
+@@ -0,0 +1,17 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++ ports : constant Port_List :=
++ (DP2, -- dock DP
++ Analog, -- mainboard VGA
++ LVDS,
++ others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e4300/gpio.c b/src/mainboard/dell/gm45_latitude/variants/e4300/gpio.c
+new file mode 100644
+index 0000000000..b50f8da0b5
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/variants/e4300/gpio.c
+@@ -0,0 +1,138 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++ .gpio0 = GPIO_MODE_NATIVE,
++ .gpio1 = GPIO_MODE_GPIO,
++ .gpio2 = GPIO_MODE_GPIO,
++ .gpio3 = GPIO_MODE_GPIO,
++ .gpio4 = GPIO_MODE_GPIO,
++ .gpio5 = GPIO_MODE_GPIO,
++ .gpio6 = GPIO_MODE_GPIO,
++ .gpio7 = GPIO_MODE_GPIO,
++ .gpio8 = GPIO_MODE_GPIO,
++ .gpio9 = GPIO_MODE_NATIVE,
++ .gpio10 = GPIO_MODE_NATIVE,
++ .gpio11 = GPIO_MODE_NATIVE,
++ .gpio12 = GPIO_MODE_NATIVE,
++ .gpio13 = GPIO_MODE_GPIO,
++ .gpio14 = GPIO_MODE_GPIO,
++ .gpio15 = GPIO_MODE_NATIVE,
++ .gpio16 = GPIO_MODE_NATIVE,
++ .gpio17 = GPIO_MODE_GPIO,
++ .gpio18 = GPIO_MODE_GPIO,
++ .gpio19 = GPIO_MODE_GPIO,
++ .gpio20 = GPIO_MODE_GPIO,
++ .gpio21 = GPIO_MODE_GPIO,
++ .gpio22 = GPIO_MODE_GPIO,
++ .gpio23 = GPIO_MODE_NATIVE,
++ .gpio24 = GPIO_MODE_GPIO,
++ .gpio25 = GPIO_MODE_NATIVE,
++ .gpio26 = GPIO_MODE_NATIVE,
++ .gpio27 = GPIO_MODE_GPIO,
++ .gpio28 = GPIO_MODE_GPIO,
++ .gpio29 = GPIO_MODE_NATIVE,
++ .gpio30 = GPIO_MODE_NATIVE,
++ .gpio31 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++ .gpio1 = GPIO_DIR_INPUT,
++ .gpio2 = GPIO_DIR_INPUT,
++ .gpio3 = GPIO_DIR_INPUT,
++ .gpio4 = GPIO_DIR_INPUT,
++ .gpio5 = GPIO_DIR_INPUT,
++ .gpio6 = GPIO_DIR_INPUT,
++ .gpio7 = GPIO_DIR_INPUT,
++ .gpio8 = GPIO_DIR_INPUT,
++ .gpio13 = GPIO_DIR_INPUT,
++ .gpio14 = GPIO_DIR_INPUT,
++ .gpio17 = GPIO_DIR_INPUT,
++ .gpio18 = GPIO_DIR_INPUT,
++ .gpio19 = GPIO_DIR_INPUT,
++ .gpio20 = GPIO_DIR_INPUT,
++ .gpio21 = GPIO_DIR_INPUT,
++ .gpio22 = GPIO_DIR_INPUT,
++ .gpio24 = GPIO_DIR_INPUT,
++ .gpio27 = GPIO_DIR_INPUT,
++ .gpio28 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++ .gpio1 = GPIO_INVERT,
++ .gpio7 = GPIO_INVERT,
++ .gpio8 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++ .gpio32 = GPIO_MODE_NATIVE,
++ .gpio33 = GPIO_MODE_GPIO,
++ .gpio34 = GPIO_MODE_GPIO,
++ .gpio35 = GPIO_MODE_NATIVE,
++ .gpio36 = GPIO_MODE_GPIO,
++ .gpio37 = GPIO_MODE_GPIO,
++ .gpio38 = GPIO_MODE_GPIO,
++ .gpio39 = GPIO_MODE_GPIO,
++ .gpio40 = GPIO_MODE_NATIVE,
++ .gpio41 = GPIO_MODE_NATIVE,
++ .gpio42 = GPIO_MODE_NATIVE,
++ .gpio43 = GPIO_MODE_NATIVE,
++ .gpio44 = GPIO_MODE_NATIVE,
++ .gpio45 = GPIO_MODE_NATIVE,
++ .gpio46 = GPIO_MODE_NATIVE,
++ .gpio47 = GPIO_MODE_NATIVE,
++ .gpio48 = GPIO_MODE_GPIO,
++ .gpio49 = GPIO_MODE_GPIO,
++ .gpio50 = GPIO_MODE_NATIVE,
++ .gpio51 = GPIO_MODE_NATIVE,
++ .gpio52 = GPIO_MODE_GPIO,
++ .gpio53 = GPIO_MODE_GPIO,
++ .gpio54 = GPIO_MODE_NATIVE,
++ .gpio55 = GPIO_MODE_NATIVE,
++ .gpio56 = GPIO_MODE_GPIO,
++ .gpio57 = GPIO_MODE_GPIO,
++ .gpio58 = GPIO_MODE_NATIVE,
++ .gpio59 = GPIO_MODE_NATIVE,
++ .gpio60 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++ .gpio33 = GPIO_DIR_INPUT,
++ .gpio34 = GPIO_DIR_INPUT,
++ .gpio36 = GPIO_DIR_INPUT,
++ .gpio37 = GPIO_DIR_INPUT,
++ .gpio38 = GPIO_DIR_INPUT,
++ .gpio39 = GPIO_DIR_INPUT,
++ .gpio48 = GPIO_DIR_INPUT,
++ .gpio49 = GPIO_DIR_INPUT,
++ .gpio52 = GPIO_DIR_INPUT,
++ .gpio53 = GPIO_DIR_INPUT,
++ .gpio56 = GPIO_DIR_INPUT,
++ .gpio57 = GPIO_DIR_INPUT,
++ .gpio60 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++ .set1 = {
++ .mode = &pch_gpio_set1_mode,
++ .direction = &pch_gpio_set1_direction,
++ .level = &pch_gpio_set1_level,
++ .blink = &pch_gpio_set1_blink,
++ .invert = &pch_gpio_set1_invert,
++ },
++ .set2 = {
++ .mode = &pch_gpio_set2_mode,
++ .direction = &pch_gpio_set2_direction,
++ .level = &pch_gpio_set2_level,
++ },
++};
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e4300/hda_verb.c b/src/mainboard/dell/gm45_latitude/variants/e4300/hda_verb.c
+new file mode 100644
+index 0000000000..a9948a93dd
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/variants/e4300/hda_verb.c
+@@ -0,0 +1,37 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++ /* coreboot specific header */
++ 0x111d76b2, /* IDT 92HD71B7X */
++ 0x1028024d, /* Subsystem ID */
++ 13, /* Number of entries */
++
++ /* Pin Widget Verb Table */
++
++ AZALIA_PIN_CFG(0, 0x0a, 0x0421101f),
++ AZALIA_PIN_CFG(0, 0x0b, 0x04a11021),
++ AZALIA_PIN_CFG(0, 0x0c, 0x40f000f0),
++ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
++ AZALIA_PIN_CFG(0, 0x0e, 0x23a1102e),
++ AZALIA_PIN_CFG(0, 0x0f, 0x23011050),
++ AZALIA_PIN_CFG(0, 0x14, 0x40f000f2),
++ AZALIA_PIN_CFG(0, 0x18, 0x90a601a0),
++ AZALIA_PIN_CFG(0, 0x19, 0x40f000f4),
++ AZALIA_PIN_CFG(0, 0x1e, 0x40f000f5),
++ AZALIA_PIN_CFG(0, 0x1f, 0x40f000f6),
++ AZALIA_PIN_CFG(0, 0x20, 0x40f000f7),
++ AZALIA_PIN_CFG(0, 0x27, 0x40f000f0),
++};
++
++const u32 pc_beep_verbs[] = {
++ 0x00170500, /* power up codec */
++ 0x00d70500, /* power up speakers */
++ 0x00d70102, /* select mixer (input 0x2) for speakers */
++ 0x00d70740, /* enable speakers output */
++ 0x02770720, /* enable beep input */
++ 0x01737217, /* unmute beep (mixer's input 0x2), set amp 0dB */
++ 0x00d37000, /* unmute speakers */
++};
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/gm45_latitude/variants/e4300/overridetree.cb b/src/mainboard/dell/gm45_latitude/variants/e4300/overridetree.cb
+new file mode 100644
+index 0000000000..20dfa245fb
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/variants/e4300/overridetree.cb
+@@ -0,0 +1,10 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/gm45
++ device domain 0 on
++ subsystemid 0x1028 0x024d inherit
++ chip southbridge/intel/i82801ix
++ device pci 1c.2 off end # PCIe Port #3
++ end
++ end
++end
+--
+2.39.5
+
diff --git a/config/coreboot/default/patches/0066-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch b/config/coreboot/default/patches/0066-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
new file mode 100644
index 00000000..d58968a1
--- /dev/null
+++ b/config/coreboot/default/patches/0066-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch
@@ -0,0 +1,70 @@
+From 0fe1d4b9fe56a0f27a6ff39cfb94d63559b729b8 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Fri, 3 May 2024 16:31:12 -0600
+Subject: [PATCH 66/67] mb/dell: Add S3 SMI handler for Dell Latitudes
+
+Integrate the previously added mec5035_smi_sleep() function into
+mainboard code to fix S3 suspend on the SNB/IVB Latitudes and the E7240.
+The E6400 does not require the EC command to sucessfully suspend and
+resume from S3, though sending it does enable the breathing effect on
+the power LED while in S3. Without it, all LEDs turn off during S3.
+
+Change-Id: Ic0d887f75be13c3fb9f6df62153ac458895e0283
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/e7240/smihandler.c | 9 +++++++++
+ src/mainboard/dell/gm45_latitude/smihandler.c | 9 +++++++++
+ src/mainboard/dell/snb_ivb_latitude/smihandler.c | 9 +++++++++
+ 3 files changed, 27 insertions(+)
+ create mode 100644 src/mainboard/dell/e7240/smihandler.c
+ create mode 100644 src/mainboard/dell/gm45_latitude/smihandler.c
+ create mode 100644 src/mainboard/dell/snb_ivb_latitude/smihandler.c
+
+diff --git a/src/mainboard/dell/e7240/smihandler.c b/src/mainboard/dell/e7240/smihandler.c
+new file mode 100644
+index 0000000000..00e55b51db
+--- /dev/null
++++ b/src/mainboard/dell/e7240/smihandler.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cpu/x86/smm.h>
++#include <ec/dell/mec5035/mec5035.h>
++
++void mainboard_smi_sleep(u8 slp_typ)
++{
++ mec5035_smi_sleep(slp_typ);
++}
+diff --git a/src/mainboard/dell/gm45_latitude/smihandler.c b/src/mainboard/dell/gm45_latitude/smihandler.c
+new file mode 100644
+index 0000000000..00e55b51db
+--- /dev/null
++++ b/src/mainboard/dell/gm45_latitude/smihandler.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cpu/x86/smm.h>
++#include <ec/dell/mec5035/mec5035.h>
++
++void mainboard_smi_sleep(u8 slp_typ)
++{
++ mec5035_smi_sleep(slp_typ);
++}
+diff --git a/src/mainboard/dell/snb_ivb_latitude/smihandler.c b/src/mainboard/dell/snb_ivb_latitude/smihandler.c
+new file mode 100644
+index 0000000000..00e55b51db
+--- /dev/null
++++ b/src/mainboard/dell/snb_ivb_latitude/smihandler.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <cpu/x86/smm.h>
++#include <ec/dell/mec5035/mec5035.h>
++
++void mainboard_smi_sleep(u8 slp_typ)
++{
++ mec5035_smi_sleep(slp_typ);
++}
+--
+2.47.0
+
diff --git a/config/coreboot/default/patches/0067-ec-dell-mec5035-Route-power-button-event-to-host.patch b/config/coreboot/default/patches/0067-ec-dell-mec5035-Route-power-button-event-to-host.patch
new file mode 100644
index 00000000..d8662e40
--- /dev/null
+++ b/config/coreboot/default/patches/0067-ec-dell-mec5035-Route-power-button-event-to-host.patch
@@ -0,0 +1,92 @@
+From 32118fa1d21fad517f85cee5eb4edff5f2fd91ea Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Tue, 18 Jun 2024 21:31:08 -0600
+Subject: [PATCH 67/67] ec/dell/mec5035: Route power button event to host
+
+If command 0x3e with an argument of 1 isn't sent to the EC, pressing the
+power button results in the EC powering off the system without letting
+the OS cleanly shutting itself down. This command and argument tells the
+EC to route power button events to the host so that it can determine
+what to do.
+
+The EC command was identified from the ec/google/wilco code, which is
+used for Dell's Latitude Chromebooks. According to the EC_GOOGLE_WILCO
+Kconfig help text, those ECs run a modified version of Dell's typical
+Latitude EC firmware, so it is likely that the two firmware
+implementations use similar commands. Examining LPC traffic between the
+host and the EC on the Latitude E6400 did reveal that the same command
+was being sent by the vendor firmware to the EC, but this does not
+confirm that it has the same meaning as the command from the Wilco code.
+Sending the command using inb/outb calls in a userspace C program while
+running coreboot without this patch did allow subsequent power button
+events to be handled by the host, confirming that the command was indeed
+the same.
+
+Change-Id: I5ded315270c0e1efbbc90cfa9d9d894b872e99a2
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/ec/dell/mec5035/mec5035.c | 8 ++++++++
+ src/ec/dell/mec5035/mec5035.h | 7 +++++++
+ 2 files changed, 15 insertions(+)
+
+diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c
+index 85c2ab0140..bdae929a27 100644
+--- a/src/ec/dell/mec5035/mec5035.c
++++ b/src/ec/dell/mec5035/mec5035.c
+@@ -94,6 +94,13 @@ void mec5035_control_radio(enum ec_radio_dev dev, enum ec_radio_state state)
+ ec_command(CMD_RADIO_CTRL);
+ }
+
++void mec5035_power_button_route(enum ec_power_button_route target)
++{
++ u8 buf = (u8)target;
++ write_mailbox_regs(&buf, 2, 1);
++ ec_command(CMD_POWER_BUTTON_TO_HOST);
++}
++
+ void mec5035_change_wake(u8 source, enum ec_wake_change change)
+ {
+ u8 buf[ACPI_WAKEUP_NUM_ARGS] = {change, source, 0, 0x40};
+@@ -121,6 +128,7 @@ static void mec5035_init(struct device *dev)
+ /* Unconditionally use this argument for now as this setting
+ is probably the most sensible default out of the 3 choices. */
+ mec5035_mouse_touchpad(TP_PS2_MOUSE);
++ mec5035_power_button_route(HOST);
+
+ pc_keyboard_init(NO_AUX_DEVICE);
+
+diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h
+index 8d4fded28b..51422598c4 100644
+--- a/src/ec/dell/mec5035/mec5035.h
++++ b/src/ec/dell/mec5035/mec5035.h
+@@ -11,6 +11,7 @@
+ enum mec5035_cmd {
+ CMD_MOUSE_TP = 0x1a,
+ CMD_RADIO_CTRL = 0x2b,
++ CMD_POWER_BUTTON_TO_HOST = 0x3e,
+ CMD_ACPI_WAKEUP_CHANGE = 0x4a,
+ CMD_SLEEP_ENABLE = 0x64,
+ CMD_CPU_OK = 0xc2,
+@@ -36,6 +37,11 @@ enum ec_radio_state {
+ RADIO_ON
+ };
+
++enum ec_power_button_route {
++ EC = 0,
++ HOST
++};
++
+ #define ACPI_WAKEUP_NUM_ARGS 4
+ enum ec_wake_change {
+ WAKE_OFF = 0,
+@@ -55,6 +61,7 @@ u8 mec5035_mouse_touchpad(enum ec_mouse_setting setting);
+ void mec5035_cpu_ok(void);
+ void mec5035_early_init(void);
+ void mec5035_control_radio(enum ec_radio_dev device, enum ec_radio_state state);
++void mec5035_power_button_route(enum ec_power_button_route target);
+ void mec5035_change_wake(u8 source, enum ec_wake_change change);
+ void mec5035_sleep_enable(void);
+
+--
+2.47.0
+
diff --git a/config/coreboot/default/target.cfg b/config/coreboot/default/target.cfg
index a70633c4..3a773b43 100644
--- a/config/coreboot/default/target.cfg
+++ b/config/coreboot/default/target.cfg
@@ -1,2 +1,2 @@
tree="default"
-rev="b6cbfa977f63d57d5d6b9e9f7c1cef30162f575a"
+rev="97bc693abc482139774a656212935387d43df8e2"
diff --git a/config/coreboot/dell/patches/0003-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch b/config/coreboot/dell/patches/0003-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
deleted file mode 100644
index 3193ed97..00000000
--- a/config/coreboot/dell/patches/0003-GM45-type-CPUs-don-t-enable-alternative-SMRR.patch
+++ /dev/null
@@ -1,173 +0,0 @@
-From 883455573f07551eaf2b12ab80bedcd2b4904a17 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Mon, 17 Apr 2023 15:49:57 +0100
-Subject: [PATCH 3/9] GM45-type CPUs: don't enable alternative SMRR
-
-This reverts the changes in coreboot revision:
-df7aecd92643d207feaf7fd840f8835097346644
-
-While this fix is *technically correct*, the one in
-coreboot, it breaks rebooting as tested on several
-GM45 ThinkPads e.g. X200, T400, when microcode
-updates are not applied.
-
-Since November 2022, Libreboot includes microcode
-updates by default, but it tells users how to remove
-it from the ROM (with cbfstool) if they wish.
-
-Well, with Libreboot 20221214, 20230319 and 20230413,
-mitigations present in Libreboot 20220710 (which did
-not have microcode updates) do not exist.
-
-This patch, along with the other patch to remove PECI
-support (which breaks speedstep when microcode updates
-are not applied) have now been re-added to Libreboot.
-
-It is still best to use microcode updates by default.
-These patches in coreboot are not critically urgent,
-and you can use the machines with or without them,
-regardless of ucode.
-
-I'll probably re-write this and the other patch at
-some point, applying the change conditionally upon
-whether or not microcode is applied.
-
-Pragmatism is a good thing. I recommend it.
----
- src/cpu/intel/model_1067x/model_1067x_init.c | 4 +++
- src/cpu/intel/model_1067x/mp_init.c | 26 --------------------
- src/cpu/intel/model_106cx/model_106cx_init.c | 4 +++
- src/cpu/intel/model_6ex/model_6ex_init.c | 4 +++
- src/cpu/intel/model_6fx/model_6fx_init.c | 4 +++
- 5 files changed, 16 insertions(+), 26 deletions(-)
-
-diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
-index 1423fd72bc..d1f98ca43a 100644
---- a/src/cpu/intel/model_1067x/model_1067x_init.c
-+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
-@@ -8,6 +8,7 @@
- #include <cpu/x86/cache.h>
- #include <cpu/x86/name.h>
- #include <cpu/intel/smm_reloc.h>
-+#include <cpu/intel/common/common.h>
-
- #define MSR_BBL_CR_CTL3 0x11e
-
-@@ -234,6 +235,9 @@ static void model_1067x_init(struct device *cpu)
- fill_processor_name(processor_name);
- printk(BIOS_INFO, "CPU: %s.\n", processor_name);
-
-+ /* Set virtualization based on Kconfig option */
-+ set_vmx_and_lock();
-+
- /* Configure C States */
- configure_c_states(quad);
-
-diff --git a/src/cpu/intel/model_1067x/mp_init.c b/src/cpu/intel/model_1067x/mp_init.c
-index bc53214310..72f40f6762 100644
---- a/src/cpu/intel/model_1067x/mp_init.c
-+++ b/src/cpu/intel/model_1067x/mp_init.c
-@@ -43,34 +43,8 @@ static void pre_mp_smm_init(void)
- smm_initialize();
- }
-
--#define SMRR_SUPPORTED (1 << 11)
--
- static void per_cpu_smm_trigger(void)
- {
-- msr_t mtrr_cap = rdmsr(MTRR_CAP_MSR);
-- if (cpu_has_alternative_smrr() && mtrr_cap.lo & SMRR_SUPPORTED) {
-- set_feature_ctrl_vmx();
-- msr_t ia32_ft_ctrl = rdmsr(IA32_FEATURE_CONTROL);
-- /* We don't care if the lock is already setting
-- as our smm relocation handler is able to handle
-- setups where SMRR is not enabled here. */
-- if (ia32_ft_ctrl.lo & (1 << 0)) {
-- /* IA32_FEATURE_CONTROL locked. If we set it again we
-- get an illegal instruction. */
-- printk(BIOS_DEBUG, "IA32_FEATURE_CONTROL already locked\n");
-- printk(BIOS_DEBUG, "SMRR status: %senabled\n",
-- ia32_ft_ctrl.lo & (1 << 3) ? "" : "not ");
-- } else {
-- if (!CONFIG(SET_IA32_FC_LOCK_BIT))
-- printk(BIOS_INFO,
-- "Overriding CONFIG(SET_IA32_FC_LOCK_BIT) to enable SMRR\n");
-- ia32_ft_ctrl.lo |= (1 << 3) | (1 << 0);
-- wrmsr(IA32_FEATURE_CONTROL, ia32_ft_ctrl);
-- }
-- } else {
-- set_vmx_and_lock();
-- }
--
- /* Relocate the SMM handler. */
- smm_relocate();
- }
-diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
-index 05f5f327cc..0450c2ad83 100644
---- a/src/cpu/intel/model_106cx/model_106cx_init.c
-+++ b/src/cpu/intel/model_106cx/model_106cx_init.c
-@@ -7,6 +7,7 @@
- #include <cpu/intel/speedstep.h>
- #include <cpu/x86/cache.h>
- #include <cpu/x86/name.h>
-+#include <cpu/intel/common/common.h>
-
- #define HIGHEST_CLEVEL 3
- static void configure_c_states(void)
-@@ -66,6 +67,9 @@ static void model_106cx_init(struct device *cpu)
- fill_processor_name(processor_name);
- printk(BIOS_INFO, "CPU: %s.\n", processor_name);
-
-+ /* Set virtualization based on Kconfig option */
-+ set_vmx_and_lock();
-+
- /* Configure C States */
- configure_c_states();
-
-diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c
-index 5bd1c32815..f3bb08cde3 100644
---- a/src/cpu/intel/model_6ex/model_6ex_init.c
-+++ b/src/cpu/intel/model_6ex/model_6ex_init.c
-@@ -7,6 +7,7 @@
- #include <cpu/intel/speedstep.h>
- #include <cpu/x86/cache.h>
- #include <cpu/x86/name.h>
-+#include <cpu/intel/common/common.h>
-
- #define HIGHEST_CLEVEL 3
- static void configure_c_states(void)
-@@ -105,6 +106,9 @@ static void model_6ex_init(struct device *cpu)
- /* Setup Page Attribute Tables (PAT) */
- // TODO set up PAT
-
-+ /* Set virtualization based on Kconfig option */
-+ set_vmx_and_lock();
-+
- /* Configure C States */
- configure_c_states();
-
-diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c
-index 535fb8fae7..f7b05facd2 100644
---- a/src/cpu/intel/model_6fx/model_6fx_init.c
-+++ b/src/cpu/intel/model_6fx/model_6fx_init.c
-@@ -7,6 +7,7 @@
- #include <cpu/intel/speedstep.h>
- #include <cpu/x86/cache.h>
- #include <cpu/x86/name.h>
-+#include <cpu/intel/common/common.h>
-
- #define HIGHEST_CLEVEL 3
- static void configure_c_states(void)
-@@ -118,6 +119,9 @@ static void model_6fx_init(struct device *cpu)
- /* Setup Page Attribute Tables (PAT) */
- // TODO set up PAT
-
-+ /* Set virtualization based on Kconfig option */
-+ set_vmx_and_lock();
-+
- /* Configure C States */
- configure_c_states();
-
---
-2.39.2
-
diff --git a/config/coreboot/dell/patches/0004-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch b/config/coreboot/dell/patches/0004-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
deleted file mode 100644
index c9b41c79..00000000
--- a/config/coreboot/dell/patches/0004-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 458fe39e9cd2536cfa8671427e6f557396143339 Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Sat, 6 May 2023 15:53:41 -0600
-Subject: [PATCH 4/9] mb/dell/e6400: Enable 01.0 device in devicetree for dGPU
- models
-
-Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed
-Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
----
- src/mainboard/dell/e6400/devicetree.cb | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/dell/e6400/devicetree.cb b/src/mainboard/dell/e6400/devicetree.cb
-index bb954cbd7b..e9f3915d17 100644
---- a/src/mainboard/dell/e6400/devicetree.cb
-+++ b/src/mainboard/dell/e6400/devicetree.cb
-@@ -19,7 +19,7 @@ chip northbridge/intel/gm45
- ops gm45_pci_domain_ops
-
- device pci 00.0 on end # host bridge
-- device pci 01.0 off end
-+ device pci 01.0 on end
- device pci 02.0 on end # VGA
- device pci 02.1 on end # Display
- device pci 03.0 on end # ME
---
-2.39.2
-
diff --git a/config/coreboot/dell/patches/0006-don-t-use-github-for-the-acpica-download.patch b/config/coreboot/dell/patches/0006-don-t-use-github-for-the-acpica-download.patch
deleted file mode 100644
index 3ee38c29..00000000
--- a/config/coreboot/dell/patches/0006-don-t-use-github-for-the-acpica-download.patch
+++ /dev/null
@@ -1,39 +0,0 @@
-From 261454e47783b973b088e9dbea47bda02758dcb4 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 22 Oct 2023 15:02:25 +0100
-Subject: [PATCH 6/9] don't use github for the acpica download
-
-i have the tarball from a previous download, and i placed
-it on libreboot rsync, which then got mirrored to princeton.
-
-today, github's ssl cert was b0rking the hell out and i really
-really wanted to finish a build, and didn't want to wait for
-github to fix their httpd.
-
-so i'm now hosting this specific acpica tarball on rsync.
-
-this patch makes that URL be used, instead of the github one.
-
-that's the 2nd time i've had to patch coreboot's acpica download!
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 23a5caf2bb..36565a906c 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -72,7 +72,7 @@ MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
- MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
- GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
- BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
--IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
-+IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
- # CLANG toolchain archive locations
- LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
- CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
---
-2.39.2
-
diff --git a/config/coreboot/dell/patches/0007-use-mirrorservice.org-for-gcc-downloads.patch b/config/coreboot/dell/patches/0007-use-mirrorservice.org-for-gcc-downloads.patch
deleted file mode 100644
index ff481081..00000000
--- a/config/coreboot/dell/patches/0007-use-mirrorservice.org-for-gcc-downloads.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 622daa7c46de01530de60a7be32c8b9e48b356fd Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 5 Nov 2023 22:57:08 +0000
-Subject: [PATCH 7/9] use mirrorservice.org for gcc downloads
-
-the gnu.org 302 redirect often fails
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 36565a906c..4d4ca06113 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -67,11 +67,11 @@ NASM_ARCHIVE="nasm-${NASM_VERSION}.tar.bz2"
- # to the jenkins build as well, or the builder won't download it.
-
- # GCC toolchain archive locations
--GMP_BASE_URL="https://ftpmirror.gnu.org/gmp"
--MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
--MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
--GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
--BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
-+GMP_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp"
-+MPFR_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr"
-+MPC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc"
-+GCC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}"
-+BINUTILS_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils"
- IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
- # CLANG toolchain archive locations
- LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
---
-2.39.2
-
diff --git a/config/coreboot/dell/patches/0009-dell-e6400-crank-up-vram-to-256MB-max.patch b/config/coreboot/dell/patches/0009-dell-e6400-crank-up-vram-to-256MB-max.patch
deleted file mode 100644
index 8d48bfd9..00000000
--- a/config/coreboot/dell/patches/0009-dell-e6400-crank-up-vram-to-256MB-max.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From f318da0563ecb2386ac368e04bad88a8aacbc83d Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Wed, 1 Nov 2023 16:33:11 +0000
-Subject: [PATCH 9/9] dell/e6400: crank up vram to 256MB (max)
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- src/mainboard/dell/e6400/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/dell/e6400/cmos.default b/src/mainboard/dell/e6400/cmos.default
-index eeb6f47364..25dfa38cb5 100644
---- a/src/mainboard/dell/e6400/cmos.default
-+++ b/src/mainboard/dell/e6400/cmos.default
-@@ -2,4 +2,4 @@ boot_option=Fallback
- debug_level=Debug
- power_on_after_fail=Disable
- sata_mode=AHCI
--gfx_uma_size=32M
-+gfx_uma_size=256M
---
-2.39.2
-
diff --git a/config/coreboot/dell/target.cfg b/config/coreboot/dell/target.cfg
deleted file mode 100644
index 45176407..00000000
--- a/config/coreboot/dell/target.cfg
+++ /dev/null
@@ -1,4 +0,0 @@
-tree="dell"
-tree_depend="default"
-xtree="default"
-rev="b6cbfa977f63d57d5d6b9e9f7c1cef30162f575a"
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..1604646b
--- /dev/null
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb
@@ -0,0 +1,809 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_OPTION_TABLE is not set
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_3050"
+CONFIG_VGA_BIOS_ID="8086,0406"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=512
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xEEE000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=16
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_USE_PM_ACPI_TIMER=y
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_3050=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_DCACHE_RAM_BASE=0xfef00000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
+CONFIG_USE_LEGACY_8254_TIMER=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin"
+CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
+CONFIG_TTYS0_BAUD=115200
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
+CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
+CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x200000
+CONFIG_SMM_MODULE_STACK_SIZE=0x800
+CONFIG_ACPI_BERT_SIZE=0x0
+CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IFD_CHIPSET="sklkbl"
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_MAX_ROOT_PORTS=24
+CONFIG_PCR_BASE_ADDRESS=0xfd000000
+CONFIG_CPU_BCLK_MHZ=100
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
+CONFIG_CPU_XTAL_HZ=24000000
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
+CONFIG_SOC_INTEL_I2C_DEV_MAX=6
+# CONFIG_ENABLE_SATA_TEST_MODE is not set
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
+CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
+CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_FSP_PUBLISH_MBP_HOB=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
+CONFIG_MAX_HECI_DEVICES=5
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_PAM0_REGISTER=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
+CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
+CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
+CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
+CONFIG_SOC_INTEL_KABYLAKE=y
+CONFIG_SKYLAKE_SOC_PCH_H=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
+CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
+CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_SOC_INTEL_COMMON=y
+
+#
+# Intel SoC Common Code for IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BLOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
+CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
+# CONFIG_USE_COREBOOT_MP_INIT is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
+CONFIG_INTEL_CAR_NEM_ENHANCED=y
+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_INTEL_KEYLOCKER is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
+CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
+CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
+CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
+CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
+CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
+CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
+CONFIG_SOC_INTEL_CSE_RW_FILE=""
+CONFIG_SOC_INTEL_CSE_RW_VERSION=""
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
+CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
+CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
+CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
+# CONFIG_SOC_INTEL_DISABLE_IGD is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
+CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
+CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
+CONFIG_SA_ENABLE_DPR=y
+CONFIG_HAVE_CAPID_A_REGISTER=y
+CONFIG_HAVE_BDSM_BGSM_REGISTER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
+
+#
+# Intel SoC Common PCH Code
+#
+CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
+CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
+CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
+CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
+
+#
+# Intel SoC Common coreboot stages and non-IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BASECODE=y
+CONFIG_SOC_INTEL_COMMON_RESET=y
+CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
+CONFIG_PAVP=y
+# CONFIG_MMA is not set
+CONFIG_SOC_INTEL_COMMON_NHLT=y
+# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_PARALLEL_MP_AP_WORK=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_UDK_BASE=y
+CONFIG_UDK_2017_BINDING=y
+CONFIG_UDK_2013_VERSION=2013
+CONFIG_UDK_2017_VERSION=2017
+CONFIG_UDK_202005_VERSION=202005
+CONFIG_UDK_202111_VERSION=202111
+CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_VERSION=2017
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_HAVE_FSP_GOP=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_RUN_FSP_GOP is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y
+# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set
+# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set
+# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_DRIVERS_EFI_FW_INFO is not set
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_DESIGNWARE=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_FSP_USE_REPO=y
+# CONFIG_DISPLAY_HOBS is not set
+# CONFIG_DISPLAY_UPD_DATA is not set
+# CONFIG_BMP_LOGO is not set
+CONFIG_PLATFORM_USES_FSP2_0=y
+CONFIG_PLATFORM_USES_FSP2_X86_32=y
+CONFIG_HAVE_INTEL_FSP_REPO=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_T_LOCATION=0xfffe0000
+CONFIG_FSP_S_CBFS="fsps.bin"
+CONFIG_FSP_M_CBFS="fspm.bin"
+CONFIG_FSP_FULL_FD=y
+CONFIG_FSP_T_RESERVED_SIZE=0x0
+CONFIG_FSP_M_XIP=y
+CONFIG_HAVE_FSP_LOGO_SUPPORT=y
+CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
+CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
+CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
+CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
+CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
+# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Skylake"
+CONFIG_GFX_GMA_PCH="Sunrise_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_CUSTOM_MADT=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_ACPI_LPIT=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_ACPI_S1_NOT_SUPPORTED=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_ACPI_NHLT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
+# CONFIG_DISPLAY_FSP_HEADER is not set
+# CONFIG_VERIFY_HOBS is not set
+# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
+CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
+# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+CONFIG_HAVE_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..c9c4e16a
--- /dev/null
+++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode
@@ -0,0 +1,802 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+CONFIG_OPTION_BACKEND_NONE=y
+# CONFIG_USE_OPTION_TABLE is not set
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_BOARD_SPECIFIC_OPTIONS=y
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_3050"
+CONFIG_VGA_BIOS_ID="8086,0406"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=512
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xEEE000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=16
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_USE_PM_ACPI_TIMER=y
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_3050=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_DCACHE_RAM_BASE=0xfef00000
+CONFIG_DCACHE_RAM_SIZE=0x40000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro"
+CONFIG_USE_LEGACY_8254_TIMER=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin"
+CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
+CONFIG_TTYS0_BAUD=115200
+CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=16384
+CONFIG_ROM_SIZE=0x01000000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
+CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb"
+CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
+CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x200000
+CONFIG_SMM_MODULE_STACK_SIZE=0x800
+CONFIG_ACPI_BERT_SIZE=0x0
+CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IFD_CHIPSET="sklkbl"
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_MAX_ROOT_PORTS=24
+CONFIG_PCR_BASE_ADDRESS=0xfd000000
+CONFIG_CPU_BCLK_MHZ=100
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
+CONFIG_CPU_XTAL_HZ=24000000
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
+CONFIG_SOC_INTEL_I2C_DEV_MAX=6
+# CONFIG_ENABLE_SATA_TEST_MODE is not set
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
+CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
+CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/"
+CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd"
+CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_FSP_PUBLISH_MBP_HOB=y
+CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
+CONFIG_MAX_HECI_DEVICES=5
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HAVE_PAM0_REGISTER=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000
+CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10
+CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
+CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
+CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y
+CONFIG_SOC_INTEL_KABYLAKE=y
+CONFIG_SKYLAKE_SOC_PCH_H=y
+CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y
+CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
+CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_SOC_INTEL_COMMON=y
+
+#
+# Intel SoC Common Code for IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BLOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
+CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
+# CONFIG_USE_COREBOOT_MP_INIT is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
+CONFIG_INTEL_CAR_NEM_ENHANCED=y
+# CONFIG_USE_INTEL_FSP_MP_INIT is not set
+CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
+CONFIG_HAVE_HYPERTHREADING=y
+CONFIG_FSP_HYPERTHREADING=y
+# CONFIG_INTEL_KEYLOCKER is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
+# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y
+CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
+CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
+CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
+CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
+CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
+CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
+CONFIG_SOC_INTEL_CSE_RW_FILE=""
+CONFIG_SOC_INTEL_CSE_RW_VERSION=""
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
+CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
+CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
+CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
+CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
+CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y
+# CONFIG_SOC_INTEL_DISABLE_IGD is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y
+CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
+# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
+CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
+CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
+CONFIG_SA_ENABLE_DPR=y
+CONFIG_HAVE_CAPID_A_REGISTER=y
+CONFIG_HAVE_BDSM_BGSM_REGISTER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
+CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
+
+#
+# Intel SoC Common PCH Code
+#
+CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
+CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
+CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
+CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
+CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
+
+#
+# Intel SoC Common coreboot stages and non-IP blocks
+#
+CONFIG_SOC_INTEL_COMMON_BASECODE=y
+CONFIG_SOC_INTEL_COMMON_RESET=y
+CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
+CONFIG_PAVP=y
+# CONFIG_MMA is not set
+CONFIG_SOC_INTEL_COMMON_NHLT=y
+# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_PARALLEL_MP_AP_WORK=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+
+#
+# Southbridge
+#
+# CONFIG_PCIEXP_HOTPLUG is not set
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH555x=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_UDK_BASE=y
+CONFIG_UDK_2017_BINDING=y
+CONFIG_UDK_2013_VERSION=2013
+CONFIG_UDK_2017_VERSION=2017
+CONFIG_UDK_202005_VERSION=202005
+CONFIG_UDK_202111_VERSION=202111
+CONFIG_UDK_202302_VERSION=202302
+CONFIG_UDK_VERSION=2017
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_HAVE_FSP_GOP=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_RUN_FSP_GOP is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
+# CONFIG_DRIVERS_EFI_FW_INFO is not set
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+CONFIG_MRC_SETTINGS_PROTECT=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_DESIGNWARE=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_FSP_USE_REPO=y
+# CONFIG_DISPLAY_HOBS is not set
+# CONFIG_DISPLAY_UPD_DATA is not set
+# CONFIG_BMP_LOGO is not set
+CONFIG_PLATFORM_USES_FSP2_0=y
+CONFIG_PLATFORM_USES_FSP2_X86_32=y
+CONFIG_HAVE_INTEL_FSP_REPO=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_T_LOCATION=0xfffe0000
+CONFIG_FSP_S_CBFS="fsps.bin"
+CONFIG_FSP_M_CBFS="fspm.bin"
+CONFIG_FSP_FULL_FD=y
+CONFIG_FSP_T_RESERVED_SIZE=0x0
+CONFIG_FSP_M_XIP=y
+CONFIG_HAVE_FSP_LOGO_SUPPORT=y
+CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
+CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
+CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
+CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y
+CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y
+# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
+# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Skylake"
+CONFIG_GFX_GMA_PCH="Sunrise_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_STM is not set
+# CONFIG_INTEL_CBNT_SUPPORT is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_CUSTOM_MADT=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_ACPI_LPIT=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_ACPI_S1_NOT_SUPPORTED=y
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_ACPI_NHLT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
+# CONFIG_DISPLAY_FSP_HEADER is not set
+# CONFIG_VERIFY_HOBS is not set
+# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
+CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
+# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+CONFIG_HAVE_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_GENERIC_GPIO_LIB=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell3050micro_fsp_16mb/target.cfg b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
new file mode 100644
index 00000000..539c0fb5
--- /dev/null
+++ b/config/coreboot/dell3050micro_fsp_16mb/target.cfg
@@ -0,0 +1,10 @@
+tree="dell7"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci"
+grubtree="xhci"
+vcfg="3050micro"
+build_depend="seabios/default grub/xhci memtest86plus"
+IFD_platform="sklkbl"
diff --git a/config/coreboot/dell7/patches/0001-WIP-OptiPlex-3050-Micro-port.patch b/config/coreboot/dell7/patches/0001-WIP-OptiPlex-3050-Micro-port.patch
new file mode 100644
index 00000000..e8a6bcc0
--- /dev/null
+++ b/config/coreboot/dell7/patches/0001-WIP-OptiPlex-3050-Micro-port.patch
@@ -0,0 +1,1421 @@
+From 2d266c50e2062dc202209494e9c1532ce8debd29 Mon Sep 17 00:00:00 2001
+From: Mate Kukri <kukri.mate@gmail.com>
+Date: Thu, 24 Oct 2024 18:05:19 +0100
+Subject: [PATCH 1/4] [WIP] OptiPlex 3050 Micro port
+
+- Boots Linux
+- SMSC SCH5553 SIO/EC
+ + Serial port works
+ + PWM fan control works
+- Realtek Gigabit LAN works
+- WiFi slot works
+- NVMe SSD slot works
+- Extra: LPSS UART0
+ + Stock FW sets undocumented power gating bit, RTC battery needs to
+ be pulled for it to work.
+ + Signals exposed on test points on the back of the board.
+ FIXME: add documentation about this
+- Needs 'deguard' to bypass BootGuard
+ + See https://review.coreboot.org/plugins/gitiles/deguard
+- TODO: HDA verbs
+- TODO: USB ports
+- TODO: Add VBT
+- Currently limited to the Micro form factor, but others are very
+ similar
+
+Change-Id: I8d443e39ee684a4eaa19c835a945cfe569c051e2
+Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
+---
+ src/mainboard/dell/optiplex_3050/Kconfig | 32 ++
+ src/mainboard/dell/optiplex_3050/Kconfig.name | 4 +
+ src/mainboard/dell/optiplex_3050/Makefile.mk | 9 +
+ src/mainboard/dell/optiplex_3050/acpi/ec.asl | 3 +
+ .../dell/optiplex_3050/acpi/superio.asl | 3 +
+ .../dell/optiplex_3050/board_info.txt | 7 +
+ src/mainboard/dell/optiplex_3050/bootblock.c | 107 ++++
+ src/mainboard/dell/optiplex_3050/cmos.default | 5 +
+ src/mainboard/dell/optiplex_3050/cmos.layout | 54 ++
+ .../dell/optiplex_3050/devicetree.cb | 119 ++++
+ src/mainboard/dell/optiplex_3050/dsdt.asl | 27 +
+ .../dell/optiplex_3050/gma-mainboard.ads | 19 +
+ .../dell/optiplex_3050/include/early_gpio.h | 11 +
+ .../dell/optiplex_3050/include/gpio.h | 241 ++++++++
+ src/mainboard/dell/optiplex_3050/ramstage.c | 513 ++++++++++++++++++
+ src/mainboard/dell/optiplex_3050/romstage.c | 26 +
+ src/mainboard/dell/optiplex_3050/sch5555_ec.c | 54 ++
+ src/mainboard/dell/optiplex_3050/sch5555_ec.h | 10 +
+ 18 files changed, 1244 insertions(+)
+ create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig
+ create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig.name
+ create mode 100644 src/mainboard/dell/optiplex_3050/Makefile.mk
+ create mode 100644 src/mainboard/dell/optiplex_3050/acpi/ec.asl
+ create mode 100644 src/mainboard/dell/optiplex_3050/acpi/superio.asl
+ create mode 100644 src/mainboard/dell/optiplex_3050/board_info.txt
+ create mode 100644 src/mainboard/dell/optiplex_3050/bootblock.c
+ create mode 100644 src/mainboard/dell/optiplex_3050/cmos.default
+ create mode 100644 src/mainboard/dell/optiplex_3050/cmos.layout
+ create mode 100644 src/mainboard/dell/optiplex_3050/devicetree.cb
+ create mode 100644 src/mainboard/dell/optiplex_3050/dsdt.asl
+ create mode 100644 src/mainboard/dell/optiplex_3050/gma-mainboard.ads
+ create mode 100644 src/mainboard/dell/optiplex_3050/include/early_gpio.h
+ create mode 100644 src/mainboard/dell/optiplex_3050/include/gpio.h
+ create mode 100644 src/mainboard/dell/optiplex_3050/ramstage.c
+ create mode 100644 src/mainboard/dell/optiplex_3050/romstage.c
+ create mode 100644 src/mainboard/dell/optiplex_3050/sch5555_ec.c
+ create mode 100644 src/mainboard/dell/optiplex_3050/sch5555_ec.h
+
+diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig
+new file mode 100644
+index 0000000000..2f0dccb98d
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/Kconfig
+@@ -0,0 +1,32 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++if BOARD_DELL_OPTIPLEX_3050
++
++config BOARD_SPECIFIC_OPTIONS
++ def_bool y
++ select BOARD_ROMSIZE_KB_16384
++ select HAVE_ACPI_RESUME
++ select HAVE_ACPI_TABLES
++ select HAVE_CMOS_DEFAULT
++ select HAVE_OPTION_TABLE
++ # select INTEL_GMA_HAVE_VBT
++ select MAINBOARD_HAS_LIBGFXINIT
++ select MAINBOARD_SUPPORTS_KABYLAKE_CPU
++ select MAINBOARD_SUPPORTS_SKYLAKE_CPU
++ select SKYLAKE_SOC_PCH_H
++ select SOC_INTEL_KABYLAKE
++ select SUPERIO_SMSC_SCH555x
++
++config CBFS_SIZE
++ default 0x900000
++
++config MAINBOARD_DIR
++ default "dell/optiplex_3050"
++
++config MAINBOARD_PART_NUMBER
++ default "OptiPlex 3050 Micro"
++
++config DIMM_SPD_SIZE
++ default 512 # DDR4
++
++endif
+diff --git a/src/mainboard/dell/optiplex_3050/Kconfig.name b/src/mainboard/dell/optiplex_3050/Kconfig.name
+new file mode 100644
+index 0000000000..14eab7f52c
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/Kconfig.name
+@@ -0,0 +1,4 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++config BOARD_DELL_OPTIPLEX_3050
++ bool "OptiPlex 3050 Micro"
+diff --git a/src/mainboard/dell/optiplex_3050/Makefile.mk b/src/mainboard/dell/optiplex_3050/Makefile.mk
+new file mode 100644
+index 0000000000..d50ea40879
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/Makefile.mk
+@@ -0,0 +1,9 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++bootblock-y += bootblock.c
++bootblock-y += sch5555_ec.c
++
++romstage-y += romstage.c
++
++ramstage-y += ramstage.c sch5555_ec.c
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+diff --git a/src/mainboard/dell/optiplex_3050/acpi/ec.asl b/src/mainboard/dell/optiplex_3050/acpi/ec.asl
+new file mode 100644
+index 0000000000..16990d45f4
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/acpi/ec.asl
+@@ -0,0 +1,3 @@
++/* SPDX-License-Identifier: CC-PDDC */
++
++/* Please update the license if adding licensable material. */
+diff --git a/src/mainboard/dell/optiplex_3050/acpi/superio.asl b/src/mainboard/dell/optiplex_3050/acpi/superio.asl
+new file mode 100644
+index 0000000000..16990d45f4
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/acpi/superio.asl
+@@ -0,0 +1,3 @@
++/* SPDX-License-Identifier: CC-PDDC */
++
++/* Please update the license if adding licensable material. */
+diff --git a/src/mainboard/dell/optiplex_3050/board_info.txt b/src/mainboard/dell/optiplex_3050/board_info.txt
+new file mode 100644
+index 0000000000..47a4a3a4f3
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/board_info.txt
+@@ -0,0 +1,7 @@
++Category: desktop
++Board URL: https://www.dell.com/support/kbdoc/en-uk/000124265/dell-optiplex-3050-system-guide
++ROM package: SOIC-8
++ROM protocol: SPI
++ROM socketed: n
++Flashrom support: y
++Release year: 2017
+diff --git a/src/mainboard/dell/optiplex_3050/bootblock.c b/src/mainboard/dell/optiplex_3050/bootblock.c
+new file mode 100644
+index 0000000000..10689c42a1
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/bootblock.c
+@@ -0,0 +1,107 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <device/pnp_ops.h>
++#include <soc/gpio.h>
++#include <superio/smsc/sch555x/sch555x.h>
++#include "include/early_gpio.h"
++#include "sch5555_ec.h"
++
++struct ec_init_entry {
++ uint16_t addr;
++ uint8_t val;
++};
++
++static void bootblock_ec_init(void)
++{
++ /*
++ * Early EC init
++ */
++
++ static const struct ec_init_entry init_table1[] = {
++ {0x08cc, 0x11}, {0x08d0, 0x11}, {0x088c, 0x10}, {0x0890, 0x10},
++ {0x0894, 0x10}, {0x0898, 0x12}, {0x089c, 0x12}, {0x08a0, 0x10},
++ {0x08a4, 0x12}, {0x08a8, 0x10}, {0x0820, 0x12}, {0x0824, 0x12},
++ {0x0878, 0x12}, {0x0880, 0x12}, {0x0884, 0x12}, {0x08e0, 0x12},
++ {0x08e4, 0x12}, {0x083c, 0x10}, {0x0840, 0x10}, {0x0844, 0x10},
++ {0x0848, 0x10}, {0x084c, 0x10}, {0x0850, 0x10}, {0x0814, 0x11},
++ };
++
++ for (size_t i = 0; i < ARRAY_SIZE(init_table1); ++i)
++ sch5555_mbox_write(2, init_table1[i].addr, init_table1[i].val);
++
++ static const struct ec_init_entry init_table2[] = {
++ {0x0040, 0x00}, {0x00f8, 0x10}, {0x00f9, 0x00}, {0x00f0, 0x30},
++ {0x00fa, 0x00}, {0x00fb, 0x00}, {0x00ea, 0x00}, {0x00eb, 0x00},
++ {0x00ef, 0x7c}, {0x0005, 0x0f}, {0x0014, 0x01}, {0x0018, 0x2f},
++ {0x0019, 0x2f}, {0x001a, 0x2f}, {0x001b, 0x2f}, {0x01d8, 0x01},
++ {0x0040, 0x11},
++ };
++
++ for (size_t i = 0; i < ARRAY_SIZE(init_table2); ++i)
++ sch5555_mbox_write(1, init_table2[i].addr, init_table2[i].val);
++
++ sch5555_mbox_write(1, 0x000b, 0x01);
++ sch5555_mbox_write(4, 0x001a, 0x04);
++ sch5555_mbox_write(4, 0x0028, 0x18);
++ sch5555_mbox_write(4, 0x001a, 0x00);
++ sch5555_mbox_write(1, 0x000b, 0x03);
++
++ /*
++ * Early HWM init
++ */
++
++ sch5555_mbox_read(1, 0xcb);
++ sch5555_mbox_read(1, 0xb8);
++
++ static const struct ec_init_entry hwm_init_table[] = {
++ {0x02fc, 0xa0}, {0x02fd, 0x32}, {0x0005, 0x77}, {0x0019, 0x2f},
++ {0x001a, 0x2f}, {0x008a, 0x33}, {0x008b, 0x33}, {0x008c, 0x33},
++ {0x00ba, 0x10}, {0x00d1, 0xff}, {0x00d6, 0xff}, {0x00db, 0xff},
++ {0x0048, 0x00}, {0x0049, 0x00}, {0x007a, 0x00}, {0x007b, 0x00},
++ {0x007c, 0x00}, {0x0080, 0x00}, {0x0081, 0x00}, {0x0082, 0x00},
++ {0x0083, 0xbb}, {0x0084, 0xb0}, {0x01a1, 0x88}, {0x01a4, 0x80},
++ {0x0088, 0x00}, {0x0089, 0x00}, {0x00a0, 0x02}, {0x00a1, 0x02},
++ {0x00a2, 0x02}, {0x00a4, 0x04}, {0x00a5, 0x04}, {0x00a6, 0x04},
++ {0x00ab, 0x00}, {0x00ad, 0x3f}, {0x00b7, 0x07}, {0x0062, 0x50},
++ {0x0000, 0x46}, {0x0000, 0x50}, {0x0000, 0x46}, {0x0000, 0x50},
++ {0x0000, 0x46}, {0x0000, 0x98}, {0x0059, 0x98}, {0x0061, 0x7c},
++ {0x01bc, 0x00}, {0x01bd, 0x00}, {0x01bb, 0x00}, {0x0085, 0xdd},
++ {0x0086, 0xdd}, {0x0087, 0x07}, {0x0090, 0x82}, {0x0091, 0x5e},
++ {0x0095, 0x5d}, {0x0096, 0xa9}, {0x0097, 0x00}, {0x009b, 0x00},
++ {0x00ae, 0x86}, {0x00af, 0x86}, {0x00b3, 0x67}, {0x00c4, 0xff},
++ {0x00c5, 0xff}, {0x00c9, 0xff}, {0x0040, 0x01}, {0x02fc, 0x00},
++ {0x02b3, 0x9a}, {0x02b4, 0x05}, {0x02cc, 0x01}, {0x02d0, 0x4c},
++ {0x02d2, 0x01}, {0x02db, 0x01}, {0x006f, 0x01}, {0x0070, 0x02},
++ {0x0071, 0x03}, {0x018b, 0x03}, {0x018c, 0x03}, {0x0015, 0x33},
++ {0x018b, 0x00}, {0x018c, 0x00}, {0x02f8, 0x5e}, {0x02f9, 0x01},
++ };
++
++ for (size_t i = 0; i < ARRAY_SIZE(hwm_init_table); ++i)
++ sch5555_mbox_write(1, hwm_init_table[i].addr, hwm_init_table[i].val);
++}
++
++
++#define SCH555x_IOBASE 0x2e
++#define GLOBAL_DEV PNP_DEV(SCH555x_IOBASE, SCH555x_LDN_GLOBAL)
++#define SERIAL_DEV PNP_DEV(SCH555x_IOBASE, SCH555x_LDN_UART1)
++
++void bootblock_mainboard_early_init(void)
++{
++ gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table));
++
++ // Super I/O early init will map Runtime and EMI registers
++ sch555x_early_init(GLOBAL_DEV);
++
++ // Changes LED color among a few other things
++ outb(1, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_PME_STS);
++ outb(1, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_PME_EN);
++ outb(0xf, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_LED);
++ outb(1, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_UNK1);
++
++ // Perform bootblock EC initialization
++ bootblock_ec_init();
++
++ // Bootblock EC initialization is required for UART1 to work
++ sch555x_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
++}
+diff --git a/src/mainboard/dell/optiplex_3050/cmos.default b/src/mainboard/dell/optiplex_3050/cmos.default
+new file mode 100644
+index 0000000000..79961f43d8
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/cmos.default
+@@ -0,0 +1,5 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++boot_option=Fallback
++debug_level=Debug
++power_on_after_fail=Disable
+diff --git a/src/mainboard/dell/optiplex_3050/cmos.layout b/src/mainboard/dell/optiplex_3050/cmos.layout
+new file mode 100644
+index 0000000000..54a5147b7d
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/cmos.layout
+@@ -0,0 +1,54 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++# -----------------------------------------------------------------
++entries
++
++#start-bit length config config-ID name
++
++# -----------------------------------------------------------------
++0 120 r 0 reserved_memory
++
++# -----------------------------------------------------------------
++# RTC_BOOT_BYTE (coreboot hardcoded)
++384 1 e 4 boot_option
++388 4 h 0 reboot_counter
++
++# -----------------------------------------------------------------
++# coreboot config options: console
++395 4 e 6 debug_level
++
++# coreboot config options: southbridge
++409 2 e 7 power_on_after_fail
++
++# coreboot config options: bootloader
++#Used by ChromeOS:
++416 128 r 0 vbnv
++
++# coreboot config options: check sums
++984 16 h 0 check_sum
++
++# -----------------------------------------------------------------
++
++enumerations
++
++#ID value text
++1 0 Disable
++1 1 Enable
++4 0 Fallback
++4 1 Normal
++6 0 Emergency
++6 1 Alert
++6 2 Critical
++6 3 Error
++6 4 Warning
++6 5 Notice
++6 6 Info
++6 7 Debug
++6 8 Spew
++7 0 Disable
++7 1 Enable
++7 2 Keep
++# -----------------------------------------------------------------
++checksums
++
++checksum 392 415 984
+diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb
+new file mode 100644
+index 0000000000..eb731fe48f
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/devicetree.cb
+@@ -0,0 +1,119 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++chip soc/intel/skylake
++ register "deep_sx_config" = "DSX_EN_WAKE_PIN | DSX_EN_LAN_WAKE_PIN"
++
++ # Enable Enhanced Intel SpeedStep
++ register "eist_enable" = "1"
++
++ device cpu_cluster 0 on end
++
++ device domain 0 on
++ device ref igpu on
++ register "PrimaryDisplay" = "Display_iGFX"
++ end
++
++ device ref south_xhci on
++ register "usb2_ports" = "{
++ [0] = USB2_PORT_MID(OC0),
++ [1] = USB2_PORT_MID(OC0),
++ [2] = USB2_PORT_MID(OC4),
++ [3] = USB2_PORT_MID(OC4),
++ [4] = USB2_PORT_MID(OC2),
++ [5] = USB2_PORT_MID(OC2),
++ [6] = USB2_PORT_MID(OC0),
++ [7] = USB2_PORT_MID(OC0),
++ [8] = USB2_PORT_MID(OC0),
++ [9] = USB2_PORT_MID(OC0),
++ [10] = USB2_PORT_MID(OC1),
++ [11] = USB2_PORT_MID(OC1),
++ [12] = USB2_PORT_MID(OC_SKIP),
++ [13] = USB2_PORT_MID(OC_SKIP),
++ }"
++ register "usb3_ports" = "{
++ [0] = USB3_PORT_DEFAULT(OC0),
++ [1] = USB3_PORT_DEFAULT(OC0),
++ [2] = USB3_PORT_DEFAULT(OC3),
++ [3] = USB3_PORT_DEFAULT(OC3),
++ [4] = USB3_PORT_DEFAULT(OC1),
++ [5] = USB3_PORT_DEFAULT(OC1),
++ [6] = USB3_PORT_DEFAULT(OC_SKIP),
++ [7] = USB3_PORT_DEFAULT(OC_SKIP),
++ [8] = USB3_PORT_DEFAULT(OC_SKIP),
++ [9] = USB3_PORT_DEFAULT(OC_SKIP),
++ }"
++ end
++
++ # ME interface is 'off' to avoid HECI reset delay due to HAP
++ device ref heci1 off end
++
++ device ref sata on
++ register "SataSalpSupport" = "1"
++ register "SataPortsEnable[0]" = "1"
++ end
++
++ device ref pcie_rp21 on
++ register "PcieRpEnable[20]" = "1"
++ register "PcieRpClkReqSupport[20]" = "1"
++ register "PcieRpClkReqNumber[20]" = "3"
++ register "PcieRpAdvancedErrorReporting[20]" = "1"
++ register "PcieRpLtrEnable[20]" = "1"
++ register "PcieRpClkSrcNumber[20]" = "3"
++ register "PcieRpHotPlug[20]" = "1"
++ end
++
++ # Realtek LAN
++ device ref pcie_rp5 on
++ register "PcieRpEnable[4]" = "1"
++ register "PcieRpClkReqSupport[4]" = "0"
++ register "PcieRpHotPlug[4]" = "0"
++ end
++
++ # M.2 WiFi
++ device ref pcie_rp8 on
++ register "PcieRpEnable[7]" = "1"
++ register "PcieRpClkReqSupport[7]" = "0"
++ register "PcieRpHotPlug[7]" = "1"
++ end
++
++ # UART0 is exposed on test points on the bottom of the board
++ device ref uart0 on
++ register "SerialIoDevMode[PchSerialIoIndexUart0]" = "PchSerialIoPci"
++ end
++
++ device ref lpc_espi on
++ register "serirq_mode" = "SERIRQ_CONTINUOUS"
++
++ # I/O decode for EMI/Runtime registers
++ register "gen1_dec" = "0x007c0a01"
++
++ # SCH5553
++ chip superio/smsc/sch555x
++ device pnp 2e.0 on # EMI
++ io 0x60 = 0xa00
++ end
++ device pnp 2e.1 off end # 8042
++ device pnp 2e.7 on # UART1
++ io 0x60 = 0x3f8
++ irq 0x0f = 2
++ irq 0x70 = 4
++ end
++ device pnp 2e.8 off end # UART2
++ device pnp 2e.c on # LPC interface
++ io 0x60 = 0x2e
++ end
++ device pnp 2e.a on # Runtime registers
++ io 0x60 = 0xa40
++ end
++ device pnp 2e.b off end # Floppy Controller
++ device pnp 2e.11 off end # Parallel Port
++ end
++ end
++
++ device ref hda on
++ register "PchHdaVcType" = "Vc1"
++ end
++
++ device ref smbus on end
++ end
++end
+diff --git a/src/mainboard/dell/optiplex_3050/dsdt.asl b/src/mainboard/dell/optiplex_3050/dsdt.asl
+new file mode 100644
+index 0000000000..9762f6ff74
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/dsdt.asl
+@@ -0,0 +1,27 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi.h>
++DefinitionBlock(
++ "dsdt.aml",
++ "DSDT",
++ ACPI_DSDT_REV_2,
++ OEM_ID,
++ ACPI_TABLE_CREATOR,
++ 0x20110725
++)
++{
++ #include <acpi/dsdt_top.asl>
++ #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
++ #include <cpu/intel/common/acpi/cpu.asl>
++
++ Scope (\_SB)
++ {
++ Device (PCI0)
++ {
++ #include <soc/intel/skylake/acpi/systemagent.asl>
++ #include <soc/intel/skylake/acpi/pch.asl>
++ }
++ }
++
++ #include <southbridge/intel/common/acpi/sleepstates.asl>
++}
+diff --git a/src/mainboard/dell/optiplex_3050/gma-mainboard.ads b/src/mainboard/dell/optiplex_3050/gma-mainboard.ads
+new file mode 100644
+index 0000000000..cb4c22f285
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/gma-mainboard.ads
+@@ -0,0 +1,19 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++ ports : constant Port_List :=
++ (HDMI1, -- External HDMI
++ DP2, -- External DP (native)
++ HDMI2, -- External DP (DP++)
++ DP3, -- Video I/O card: VGA (0PKGGG), DP (H64DC)
++ HDMI3, -- Video I/O card: VGA (0PKGGG), DP (H64DC)
++ others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/dell/optiplex_3050/include/early_gpio.h b/src/mainboard/dell/optiplex_3050/include/early_gpio.h
+new file mode 100644
+index 0000000000..17a16371e3
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/include/early_gpio.h
+@@ -0,0 +1,11 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#ifndef __OPTIPLEX_3050_EARLY_GPIO_H__
++#define __OPTIPLEX_3050_EARLY_GPIO_H__
++
++static const struct pad_config early_gpio_table[] = {
++ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), /* UART0_RXD */
++ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), /* UART0_TXD */
++};
++
++#endif
+diff --git a/src/mainboard/dell/optiplex_3050/include/gpio.h b/src/mainboard/dell/optiplex_3050/include/gpio.h
+new file mode 100644
+index 0000000000..83293c32a9
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/include/gpio.h
+@@ -0,0 +1,241 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#ifndef __OPTIPLEX_3050_GPIO_H__
++#define __OPTIPLEX_3050_GPIO_H__
++
++static const struct pad_config gpio_table[] = {
++
++ /* ------- GPIO Community 0 ------- */
++
++ /* ------- GPIO Group GPP_A ------- */
++ PAD_CFG_NF(GPP_A0, UP_20K, PLTRST, NF1), /* RCIN# */
++ PAD_CFG_NF(GPP_A1, UP_20K, PLTRST, NF1), /* LAD0 */
++ PAD_CFG_NF(GPP_A2, UP_20K, PLTRST, NF1), /* LAD1 */
++ PAD_CFG_NF(GPP_A3, UP_20K, PLTRST, NF1), /* LAD2 */
++ PAD_CFG_NF(GPP_A4, UP_20K, PLTRST, NF1), /* LAD3 */
++ PAD_CFG_NF(GPP_A5, NONE, PLTRST, NF1), /* LFRAME# */
++ PAD_CFG_NF(GPP_A6, NONE, PLTRST, NF1), /* SERIRQ */
++ PAD_CFG_GPI_TRIG_OWN(GPP_A7, NONE, DEEP, OFF, ACPI), /* GPIO */
++ PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1), /* CLKRUN# */
++ PAD_CFG_NF(GPP_A9, NONE, PLTRST, NF1), /* CLKOUT_LPC0 */
++ PAD_CFG_NF(GPP_A10, NONE, PLTRST, NF1), /* CLKOUT_LPC1 */
++ PAD_CFG_NF(GPP_A11, UP_20K, DEEP, NF1), /* PME# */
++ PAD_CFG_GPO(GPP_A12, 0, PLTRST), /* GPIO */
++ PAD_CFG_NF(GPP_A13, NONE, PLTRST, NF1), /* SUSWARN#/SUSPWRDNACK */
++ PAD_CFG_GPI_TRIG_OWN(GPP_A14, NONE, PLTRST, OFF, ACPI), /* GPIO */
++ PAD_CFG_NF(GPP_A15, UP_20K, PLTRST, NF1), /* SUS_ACK# */
++ PAD_CFG_GPO(GPP_A16, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_A17, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_A18, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_A19, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_A20, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_A21, 1, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_A22, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_A23, 0, PLTRST), /* GPIO */
++
++ /* ------- GPIO Group GPP_B ------- */
++ PAD_CFG_GPO(GPP_B0, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_B1, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_B2, 0, DEEP), /* GPIO */
++ PAD_CFG_GPO(GPP_B3, 1, RSMRST), /* GPIO (ME_CNTL, B3 -> LOW => HDA_SDO -> HIGH) */
++ PAD_CFG_GPI_TRIG_OWN(GPP_B4, NONE, DEEP, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPO(GPP_B5, 1, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_B6, 1, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_B7, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_B8, NONE, PLTRST, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPO(GPP_B9, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_B10, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_B11, NONE, PLTRST, OFF, ACPI), /* GPIO */
++ PAD_CFG_NF(GPP_B12, NONE, PLTRST, NF1), /* SLP_S0# */
++ PAD_CFG_NF(GPP_B13, NONE, PLTRST, NF1), /* PLTRST# */
++ PAD_CFG_NF(GPP_B14, DN_20K, PLTRST, NF1), /* SPKR */
++ PAD_CFG_GPO(GPP_B15, 1, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_B16, 1, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_B17, 0, PLTRST), /* GPIO */
++ PAD_CFG_NF(GPP_B18, DN_20K, DEEP, NF1), /* GSPIO_MOSI */
++ PAD_CFG_GPO(GPP_B19, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_B20, 1, DEEP), /* GPIO */
++ PAD_CFG_GPO(GPP_B21, 0, DEEP), /* GPIO */
++ PAD_CFG_NF(GPP_B22, DN_20K, DEEP, NF1), /* GSPI1_MOSI */
++ PAD_CFG_NF(GPP_B23, DN_20K, DEEP, NF2), /* PCHHOT# */
++
++ /* ------- GPIO Community 1 ------- */
++
++ /* ------- GPIO Group GPP_C ------- */
++ PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), /* SMBCLK */
++ PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), /* SMBDATA */
++ PAD_CFG_GPI_TRIG_OWN(GPP_C2, DN_20K, DEEP, OFF, ACPI), /* GPIO */
++ PAD_CFG_NF(GPP_C3, NONE, PLTRST, NF1), /* SML0CLK */
++ PAD_CFG_NF(GPP_C4, NONE, PLTRST, NF1), /* SML0DATA */
++ PAD_CFG_GPI_TRIG_OWN(GPP_C5, DN_20K, DEEP, OFF, ACPI), /* GPIO */
++ PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* SML1CLK */
++ PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* SML1DATA */
++ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), /* UART0_RXD */
++ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), /* UART0_TXD */
++ PAD_CFG_GPO(GPP_C10, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_C11, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_C12, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_C13, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_C14, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_C15, 0, PLTRST), /* GPIO */
++ PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1), /* I2C0_SDA */
++ PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1), /* I2C0_SCL */
++ PAD_CFG_GPO(GPP_C18, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_C19, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_C20, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_C21, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_C22, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT), /* GPIO */
++
++ /* ------- GPIO Group GPP_D ------- */
++ PAD_CFG_GPO(GPP_D0, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D1, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D2, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D3, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D4, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_D5, NONE, DEEP, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPO(GPP_D6, 0, DEEP), /* GPIO */
++ PAD_CFG_GPO(GPP_D7, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D8, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D9, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D10, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D11, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D12, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D13, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D14, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D15, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D16, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D17, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D18, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D19, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D20, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D21, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D22, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_D23, 0, PLTRST), /* GPIO */
++
++ /* ------- GPIO Group GPP_E ------- */
++ PAD_CFG_NF(GPP_E0, NONE, DEEP, NF1), /* SATAXPCIE0 */
++ PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1), /* SATAXPCIE1 */
++ PAD_CFG_NF(GPP_E2, NONE, DEEP, NF1), /* SATAXPCIE2 */
++ PAD_CFG_GPO(GPP_E3, 0, DEEP), /* GPIO */
++ PAD_CFG_GPO(GPP_E4, 0, DEEP), /* GPIO */
++ PAD_CFG_GPO(GPP_E5, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_E6, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_E7, NONE, DEEP, OFF, ACPI), /* GPIO */
++ PAD_CFG_NF(GPP_E8, NONE, PLTRST, NF1), /* SATA_LED# */
++ PAD_CFG_NF(GPP_E9, UP_20K, PLTRST, NF1), /* USB_OC0# */
++ PAD_CFG_NF(GPP_E10, UP_20K, PLTRST, NF1), /* USB_OC1# */
++ PAD_CFG_NF(GPP_E11, UP_20K, PLTRST, NF1), /* USB_OC2# */
++ PAD_CFG_NF(GPP_E12, UP_20K, PLTRST, NF1), /* USB_OC3# */
++
++ /* ------- GPIO Group GPP_F ------- */
++ PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1), /* SATAXPCIE3 */
++ PAD_CFG_NF(GPP_F1, NONE, DEEP, NF1), /* SATAXPCIE4 */
++ PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1), /* SATAXPCIE5 */
++ PAD_CFG_NF(GPP_F3, NONE, DEEP, NF1), /* SATAXPCIE6 */
++ PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1), /* SATAXPCIE7 */
++ PAD_CFG_GPI_TRIG_OWN(GPP_F5, NONE, PLTRST, OFF, ACPI), /* GPIO */
++ PAD_CFG_NF(GPP_F6, NONE, RSMRST, NF1), /* SATA_DEVSLP4 */
++ PAD_CFG_GPO(GPP_F7, 1, PLTRST), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_F8, NONE, DEEP, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPO(GPP_F9, 0, RSMRST), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_F10, NONE, DEEP, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_F11, NONE, PLTRST, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_F12, NONE, PLTRST, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPO(GPP_F13, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_F14, NONE, DEEP, OFF, ACPI), /* GPIO */
++ PAD_CFG_NF(GPP_F15, UP_20K, DEEP, NF1), /* USB_OC4# */
++ PAD_CFG_NF(GPP_F16, UP_20K, DEEP, NF1), /* USB_OC5# */
++ PAD_CFG_NF(GPP_F17, UP_20K, PLTRST, NF1), /* USB_OC6# */
++ PAD_CFG_TERM_GPO(GPP_F18, 0, UP_20K, DEEP), /* GPIO */
++ PAD_CFG_GPO(GPP_F19, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_F20, 1, DEEP), /* GPIO */
++ PAD_CFG_GPO(GPP_F21, 1, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_F22, 1, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_F23, 1, RSMRST), /* GPIO */
++
++ /* ------- GPIO Group GPP_G ------- */
++ PAD_CFG_GPI_TRIG_OWN(GPP_G0, NONE, PLTRST, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_G1, NONE, PLTRST, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_G2, NONE, PLTRST, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_G3, NONE, PLTRST, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_G4, NONE, PLTRST, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_G5, NONE, PLTRST, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_G6, NONE, PLTRST, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_G7, NONE, PLTRST, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_G8, NONE, PLTRST, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPO(GPP_G9, 1, PLTRST), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_G10, NONE, DEEP, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_G11, NONE, DEEP, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPO(GPP_G12, 1, DEEP), /* GPIO */
++ PAD_CFG_GPI_TRIG_OWN(GPP_G13, NONE, DEEP, OFF, ACPI), /* GPIO */
++ PAD_CFG_GPO(GPP_G14, 0, DEEP), /* GPIO */
++ PAD_CFG_GPO(GPP_G15, 1, DEEP), /* GPIO */
++ PAD_CFG_GPO(GPP_G16, 1, DEEP), /* GPIO */
++ PAD_CFG_GPO(GPP_G17, 1, DEEP), /* GPIO */
++ PAD_CFG_GPO(GPP_G18, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_G19, 1, DEEP), /* GPIO */
++ PAD_CFG_GPO(GPP_G20, 1, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_G21, 0, DEEP), /* GPIO */
++ PAD_CFG_GPO(GPP_G22, 0, DEEP), /* GPIO */
++ PAD_CFG_GPO(GPP_G23, 0, PLTRST), /* GPIO */
++
++ /* ------- GPIO Group GPP_H ------- */
++ PAD_CFG_GPO(GPP_H0, 0, DEEP), /* GPIO */
++ PAD_CFG_GPO(GPP_H1, 1, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H2, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H3, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H4, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H5, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H6, 1, DEEP), /* GPIO */
++ PAD_CFG_GPO(GPP_H7, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H8, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H9, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H10, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H11, 0, PLTRST), /* GPIO */
++ PAD_CFG_TERM_GPO(GPP_H12, 1, DN_20K, DEEP), /* GPIO */
++ PAD_CFG_GPO(GPP_H13, 1, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H14, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H15, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H16, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H17, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H18, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H19, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H20, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H21, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H22, 0, PLTRST), /* GPIO */
++ PAD_CFG_GPO(GPP_H23, 0, PLTRST), /* GPIO */
++
++ /* ------- GPIO Community 2 ------- */
++
++ /* -------- GPIO Group GPD -------- */
++ PAD_CFG_NF(GPD0, NONE, RSMRST, NF1), /* BATLOW# */
++ PAD_CFG_GPO(GPD1, 0, PWROK), /* GPIO */
++ PAD_CFG_NF(GPD2, NONE, RSMRST, NF1), /* LAN_WAKE# */
++ PAD_CFG_NF(GPD3, UP_20K, RSMRST, NF1), /* PWRBTN# */
++ PAD_CFG_NF(GPD4, NONE, RSMRST, NF1), /* SLP_S3# */
++ PAD_CFG_NF(GPD5, NONE, RSMRST, NF1), /* SLP_S4# */
++ PAD_CFG_NF(GPD6, NONE, RSMRST, NF1), /* SLP_A# */
++ PAD_CFG_GPO(GPD7, 1, RSMRST), /* GPIO */
++ PAD_CFG_NF(GPD8, NONE, RSMRST, NF1), /* SUSCLK */
++ PAD_CFG_NF(GPD9, NONE, RSMRST, NF1), /* SLP_WLAN# */
++ PAD_CFG_NF(GPD10, NONE, RSMRST, NF1), /* SLP_S5# */
++ PAD_CFG_GPO(GPD11, 1, RSMRST), /* GPIO */
++
++ /* ------- GPIO Community 3 ------- */
++
++ /* ------- GPIO Group GPP_I ------- */
++ PAD_CFG_NF(GPP_I0, NONE, PLTRST, NF1), /* DDPB_HPD0 */
++ PAD_CFG_NF(GPP_I1, NONE, PLTRST, NF1), /* DDPC_HPD1 */
++ PAD_CFG_NF(GPP_I2, NONE, PLTRST, NF1), /* DDPD_HPD2 */
++ PAD_CFG_NF(GPP_I3, NONE, PLTRST, NF1), /* DDPE_HPD3 */
++ PAD_CFG_NF(GPP_I4, NONE, PLTRST, NF1), /* EDP_HPD */
++ PAD_CFG_NF(GPP_I5, NONE, PLTRST, NF1), /* DDPB_CTRLCLK */
++ PAD_CFG_NF(GPP_I6, DN_20K, PLTRST, NF1), /* DDPB_CTRLDATA */
++ PAD_CFG_NF(GPP_I7, NONE, PLTRST, NF1), /* DDPC_CTRLCLK */
++ PAD_CFG_NF(GPP_I8, DN_20K, PLTRST, NF1), /* DDPC_CTRLDATA */
++ PAD_CFG_NF(GPP_I9, NONE, PLTRST, NF1), /* DDPD_CTRLCLK */
++ PAD_CFG_NF(GPP_I10, DN_20K, PLTRST, NF1), /* DDPD_CTRLDATA */
++};
++
++#endif
+diff --git a/src/mainboard/dell/optiplex_3050/ramstage.c b/src/mainboard/dell/optiplex_3050/ramstage.c
+new file mode 100644
+index 0000000000..5cf2c81e50
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/ramstage.c
+@@ -0,0 +1,513 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootstate.h>
++#include <arch/cpuid.h>
++#include <cpu/x86/msr.h>
++#include <soc/gpio.h>
++#include <soc/ramstage.h>
++#include "include/gpio.h"
++#include "sch5555_ec.h"
++
++void mainboard_silicon_init_params(FSP_SIL_UPD *params)
++{
++ gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
++}
++
++#define FORM_FACTOR_MICRO 0
++#define FORM_FACTOR_SFF 1
++// NOTE: one of these is MT, but 2 and 3 both get the same table anyways
++#define FORM_FACTOR_UNK2 2
++#define FORM_FACTOR_UNK3 3
++
++#define HWM_TAB_ADD_TEMP_TARGET 1
++#define HWM_TAB_PKG_POWER_ANY 0xffff
++
++struct hwm_tab_entry {
++ uint16_t addr;
++ uint8_t val;
++ uint8_t flags;
++ uint16_t pkg_power;
++};
++
++static const struct hwm_tab_entry HWM_TAB_MICRO_BASE[] = {
++ { 0x005, 0x33, 0, 0xffff },
++ { 0x018, 0x2f, 0, 0xffff },
++ { 0x019, 0x2f, 0, 0xffff },
++ { 0x01a, 0x2f, 0, 0xffff },
++ { 0x01b, 0x0f, 0, 0xffff },
++ { 0x057, 0xff, 0, 0xffff },
++ { 0x059, 0xff, 0, 0xffff },
++ { 0x05b, 0xff, 0, 0xffff },
++ { 0x05d, 0xff, 0, 0xffff },
++ { 0x05f, 0xff, 0, 0xffff },
++ { 0x061, 0xff, 0, 0xffff },
++ { 0x06e, 0x00, 0, 0xffff },
++ { 0x06f, 0x03, 0, 0xffff },
++ { 0x070, 0x03, 0, 0xffff },
++ { 0x071, 0x02, 0, 0xffff },
++ { 0x072, 0x02, 0, 0xffff },
++ { 0x073, 0x01, 0, 0xffff },
++ { 0x074, 0x06, 0, 0xffff },
++ { 0x075, 0x07, 0, 0xffff },
++ { 0x080, 0x00, 0, 0xffff },
++ { 0x081, 0x80, 0, 0xffff },
++ { 0x082, 0x80, 0, 0xffff },
++ { 0x083, 0xbb, 0, 0xffff },
++ { 0x085, 0xf1, 0, 0xffff },
++ { 0x086, 0x88, 0, 0xffff },
++ { 0x087, 0x61, 0, 0xffff },
++ { 0x088, 0x08, 0, 0xffff },
++ { 0x089, 0x00, 0, 0xffff },
++ { 0x08a, 0x73, 0, 0xffff },
++ { 0x08b, 0x73, 0, 0xffff },
++ { 0x08c, 0x73, 0, 0xffff },
++ { 0x090, 0x6d, 0, 0xffff },
++ { 0x091, 0x7e, 0, 0xffff },
++ { 0x092, 0x66, 0, 0xffff },
++ { 0x093, 0xa4, 0, 0xffff },
++ { 0x094, 0x7c, 0, 0xffff },
++ { 0x095, 0xa4, 0, 0xffff },
++ { 0x096, 0xa4, 0, 0xffff },
++ { 0x097, 0xa4, 0, 0xffff },
++ { 0x098, 0xa4, 0, 0xffff },
++ { 0x099, 0xa4, 0, 0xffff },
++ { 0x09a, 0xa4, 0, 0xffff },
++ { 0x09b, 0xa4, 0, 0xffff },
++ { 0x0a0, 0x2e, 0, 0xffff },
++ { 0x0a1, 0x00, 0, 0xffff },
++ { 0x0a2, 0x00, 0, 0xffff },
++ { 0x0ae, 0xa4, 0, 0xffff },
++ { 0x0af, 0xa4, 0, 0xffff },
++ { 0x0b0, 0xa4, 0, 0xffff },
++ { 0x0b1, 0xa4, 0, 0xffff },
++ { 0x0b2, 0xa4, 0, 0xffff },
++ { 0x0b3, 0xa4, 0, 0xffff },
++ { 0x0b6, 0x00, 0, 0xffff },
++ { 0x0b7, 0x00, 0, 0xffff },
++ { 0x0d1, 0xff, 0, 0xffff },
++ { 0x0d6, 0xff, 0, 0xffff },
++ { 0x0db, 0xff, 0, 0xffff },
++ { 0x0ea, 0x5c, 0, 0xffff },
++ { 0x0eb, 0x5c, 0, 0xffff },
++ { 0x0ef, 0xff, 0, 0xffff },
++ { 0x0f8, 0x15, 0, 0xffff },
++ { 0x0f9, 0x00, 0, 0xffff },
++ { 0x0f0, 0x30, 0, 0xffff },
++ { 0x184, 0xff, 0, 0xffff },
++ { 0x186, 0xff, 0, 0xffff },
++ { 0x1a1, 0xce, 0, 0xffff },
++ { 0x1a2, 0x0c, 0, 0xffff },
++ { 0x1a3, 0x0c, 0, 0xffff },
++ { 0x1a6, 0x00, 0, 0xffff },
++ { 0x1a7, 0x00, 0, 0xffff },
++ { 0x1a8, 0xa4, 0, 0xffff },
++ { 0x1a9, 0xa4, 0, 0xffff },
++ { 0x1ab, 0x2d, 0, 0xffff },
++ { 0x1ac, 0x2d, 0, 0xffff },
++ { 0x1b1, 0x00, 0, 0xffff },
++ { 0x1bb, 0x00, 0, 0xffff },
++ { 0x1bc, 0x00, 0, 0xffff },
++ { 0x1bd, 0x00, 0, 0xffff },
++ { 0x1be, 0x01, 0, 0xffff },
++ { 0x1bf, 0x01, 0, 0xffff },
++ { 0x1c0, 0x01, 0, 0xffff },
++ { 0x1c1, 0x01, 0, 0xffff },
++ { 0x1c2, 0x01, 0, 0xffff },
++ { 0x280, 0x00, 0, 0xffff },
++ { 0x281, 0x00, 0, 0xffff },
++ { 0x282, 0x03, 0, 0xffff },
++ { 0x283, 0x0a, 0, 0xffff },
++ { 0x284, 0x80, 0, 0xffff },
++ { 0x285, 0x03, 0, 0xffff },
++ { 0x040, 0x01, 0, 0xffff },
++};
++
++static const struct hwm_tab_entry HWM_TAB_MICRO_TEMP80[] = {
++ { 0x005, 0x33, 0, 0xffff },
++ { 0x018, 0x2f, 0, 0xffff },
++ { 0x019, 0x2f, 0, 0xffff },
++ { 0x01a, 0x2f, 0, 0xffff },
++ { 0x01b, 0x0f, 0, 0xffff },
++ { 0x057, 0xff, 0, 0xffff },
++ { 0x059, 0xff, 0, 0xffff },
++ { 0x05b, 0xff, 0, 0xffff },
++ { 0x05d, 0xff, 0, 0xffff },
++ { 0x05f, 0xff, 0, 0xffff },
++ { 0x061, 0xff, 0, 0xffff },
++ { 0x06e, 0x00, 0, 0xffff },
++ { 0x06f, 0x03, 0, 0xffff },
++ { 0x070, 0x03, 0, 0xffff },
++ { 0x071, 0x02, 0, 0xffff },
++ { 0x072, 0x02, 0, 0xffff },
++ { 0x073, 0x01, 0, 0xffff },
++ { 0x074, 0x06, 0, 0xffff },
++ { 0x075, 0x07, 0, 0xffff },
++ { 0x080, 0x00, 0, 0xffff },
++ { 0x081, 0x80, 0, 0xffff },
++ { 0x082, 0x80, 0, 0xffff },
++ { 0x083, 0xbb, 0, 0xffff },
++ { 0x085, 0xf6, 0, 0xffff },
++ { 0x086, 0x88, 0, 0xffff },
++ { 0x087, 0x61, 0, 0xffff },
++ { 0x088, 0x08, 0, 0xffff },
++ { 0x089, 0x00, 0, 0xffff },
++ { 0x08a, 0x73, 0, 0xffff },
++ { 0x08b, 0x73, 0, 0xffff },
++ { 0x08c, 0x73, 0, 0xffff },
++ { 0x090, 0x6d, 0, 0xffff },
++ { 0x091, 0x86, 0, 0xffff },
++ { 0x092, 0x66, 0, 0xffff },
++ { 0x093, 0xa4, 0, 0xffff },
++ { 0x094, 0x7c, 0, 0xffff },
++ { 0x095, 0xa4, 0, 0xffff },
++ { 0x096, 0xa4, 0, 0xffff },
++ { 0x097, 0xa4, 0, 0xffff },
++ { 0x098, 0xa4, 0, 0xffff },
++ { 0x099, 0xa4, 0, 0xffff },
++ { 0x09a, 0xa4, 0, 0xffff },
++ { 0x09b, 0xa4, 0, 0xffff },
++ { 0x0a0, 0x2e, 0, 0xffff },
++ { 0x0a1, 0x00, 0, 0xffff },
++ { 0x0a2, 0x00, 0, 0xffff },
++ { 0x0ae, 0xa4, 0, 0xffff },
++ { 0x0af, 0xa4, 0, 0xffff },
++ { 0x0b0, 0xa4, 0, 0xffff },
++ { 0x0b1, 0xa4, 0, 0xffff },
++ { 0x0b2, 0xa4, 0, 0xffff },
++ { 0x0b3, 0xa4, 0, 0xffff },
++ { 0x0b6, 0x00, 0, 0xffff },
++ { 0x0b7, 0x00, 0, 0xffff },
++ { 0x0d1, 0xff, 0, 0xffff },
++ { 0x0d6, 0xff, 0, 0xffff },
++ { 0x0db, 0xff, 0, 0xffff },
++ { 0x0ea, 0x50, 0, 0xffff },
++ { 0x0eb, 0x50, 0, 0xffff },
++ { 0x0ef, 0xff, 0, 0xffff },
++ { 0x0f8, 0x15, 0, 0xffff },
++ { 0x0f9, 0x00, 0, 0xffff },
++ { 0x0f0, 0x30, 0, 0xffff },
++ { 0x184, 0xff, 0, 0xffff },
++ { 0x186, 0xff, 0, 0xffff },
++ { 0x1a1, 0xce, 0, 0xffff },
++ { 0x1a2, 0x0c, 0, 0xffff },
++ { 0x1a3, 0x0c, 0, 0xffff },
++ { 0x1a6, 0x00, 0, 0xffff },
++ { 0x1a7, 0x00, 0, 0xffff },
++ { 0x1a8, 0xa4, 0, 0xffff },
++ { 0x1a9, 0xa4, 0, 0xffff },
++ { 0x1ab, 0x2d, 0, 0xffff },
++ { 0x1ac, 0x2d, 0, 0xffff },
++ { 0x1b1, 0x00, 0, 0xffff },
++ { 0x1bb, 0x00, 0, 0xffff },
++ { 0x1bc, 0x00, 0, 0xffff },
++ { 0x1bd, 0x00, 0, 0xffff },
++ { 0x1be, 0x01, 0, 0xffff },
++ { 0x1bf, 0x01, 0, 0xffff },
++ { 0x1c0, 0x01, 0, 0xffff },
++ { 0x1c1, 0x01, 0, 0xffff },
++ { 0x1c2, 0x01, 0, 0xffff },
++ { 0x280, 0x00, 0, 0xffff },
++ { 0x281, 0x00, 0, 0xffff },
++ { 0x282, 0x03, 0, 0xffff },
++ { 0x283, 0x0a, 0, 0xffff },
++ { 0x284, 0x80, 0, 0xffff },
++ { 0x285, 0x03, 0, 0xffff },
++ { 0x040, 0x01, 0, 0xffff },
++};
++
++static const struct hwm_tab_entry HWM_TAB_MICRO_EARLY_STEPPING[] = {
++ { 0x005, 0x33, 0, 0xffff },
++ { 0x018, 0x2f, 0, 0xffff },
++ { 0x019, 0x2f, 0, 0xffff },
++ { 0x01a, 0x2f, 0, 0xffff },
++ { 0x01b, 0x0f, 0, 0xffff },
++ { 0x057, 0xff, 0, 0xffff },
++ { 0x059, 0xff, 0, 0xffff },
++ { 0x05b, 0xff, 0, 0xffff },
++ { 0x05d, 0xff, 0, 0xffff },
++ { 0x05f, 0xff, 0, 0xffff },
++ { 0x061, 0xff, 0, 0xffff },
++ { 0x06e, 0x01, 0, 0xffff },
++ { 0x06f, 0x03, 0, 0xffff },
++ { 0x070, 0x03, 0, 0xffff },
++ { 0x071, 0x02, 0, 0xffff },
++ { 0x072, 0x02, 0, 0xffff },
++ { 0x073, 0x01, 0, 0xffff },
++ { 0x074, 0x06, 0, 0xffff },
++ { 0x075, 0x07, 0, 0xffff },
++ { 0x080, 0x00, 0, 0xffff },
++ { 0x081, 0x80, 0, 0xffff },
++ { 0x082, 0x80, 0, 0xffff },
++ { 0x083, 0xbb, 0, 0xffff },
++ { 0x085, 0xfd, 0, 0xffff },
++ { 0x086, 0x60, 0, 0xffff },
++ { 0x087, 0x50, 0, 0xffff },
++ { 0x088, 0x08, 0, 0xffff },
++ { 0x089, 0x00, 0, 0xffff },
++ { 0x08a, 0x73, 0, 0xffff },
++ { 0x08b, 0x73, 0, 0xffff },
++ { 0x08c, 0x73, 0, 0xffff },
++ { 0x090, 0x6d, 0, 0xffff },
++ { 0x091, 0x7a, 0, 0xffff },
++ { 0x092, 0x6b, 0, 0xffff },
++ { 0x093, 0xa4, 0, 0xffff },
++ { 0x094, 0x78, 0, 0xffff },
++ { 0x095, 0xa4, 0, 0xffff },
++ { 0x096, 0xa4, 0, 0xffff },
++ { 0x097, 0xa4, 0, 0xffff },
++ { 0x098, 0xa4, 0, 0xffff },
++ { 0x099, 0xa4, 0, 0xffff },
++ { 0x09a, 0xa4, 0, 0xffff },
++ { 0x09b, 0xa4, 0, 0xffff },
++ { 0x0a0, 0x2e, 0, 0xffff },
++ { 0x0a1, 0x00, 0, 0xffff },
++ { 0x0a2, 0x00, 0, 0xffff },
++ { 0x0ae, 0xa4, 0, 0xffff },
++ { 0x0af, 0xa4, 0, 0xffff },
++ { 0x0b0, 0xa4, 0, 0xffff },
++ { 0x0b1, 0xa4, 0, 0xffff },
++ { 0x0b2, 0xa4, 0, 0xffff },
++ { 0x0b3, 0xa4, 0, 0xffff },
++ { 0x0b6, 0x00, 0, 0xffff },
++ { 0x0b7, 0x00, 0, 0xffff },
++ { 0x0d1, 0xff, 0, 0xffff },
++ { 0x0d6, 0xff, 0, 0xffff },
++ { 0x0db, 0xff, 0, 0xffff },
++ { 0x0ea, 0x64, 0, 0xffff },
++ { 0x0eb, 0x64, 0, 0xffff },
++ { 0x0ef, 0xff, 0, 0xffff },
++ { 0x0f8, 0x15, 0, 0xffff },
++ { 0x0f9, 0x00, 0, 0xffff },
++ { 0x0f0, 0x30, 0, 0xffff },
++ { 0x184, 0xff, 0, 0xffff },
++ { 0x186, 0xff, 0, 0xffff },
++ { 0x1a1, 0xce, 0, 0xffff },
++ { 0x1a2, 0x0c, 0, 0xffff },
++ { 0x1a3, 0x0c, 0, 0xffff },
++ { 0x1a6, 0x00, 0, 0xffff },
++ { 0x1a7, 0x00, 0, 0xffff },
++ { 0x1a8, 0xa4, 0, 0xffff },
++ { 0x1a9, 0xa4, 0, 0xffff },
++ { 0x1ab, 0x2d, 0, 0xffff },
++ { 0x1ac, 0x2d, 0, 0xffff },
++ { 0x1b1, 0x00, 0, 0xffff },
++ { 0x1bb, 0x00, 0, 0xffff },
++ { 0x1bc, 0x00, 0, 0xffff },
++ { 0x1bd, 0x00, 0, 0xffff },
++ { 0x1be, 0x01, 0, 0xffff },
++ { 0x1bf, 0x01, 0, 0xffff },
++ { 0x1c0, 0x01, 0, 0xffff },
++ { 0x1c1, 0x01, 0, 0xffff },
++ { 0x1c2, 0x01, 0, 0xffff },
++ { 0x280, 0x00, 0, 0xffff },
++ { 0x281, 0x00, 0, 0xffff },
++ { 0x282, 0x03, 0, 0xffff },
++ { 0x283, 0x0a, 0, 0xffff },
++ { 0x284, 0x80, 0, 0xffff },
++ { 0x285, 0x03, 0, 0xffff },
++ { 0x040, 0x01, 0, 0xffff },
++};
++
++static const struct hwm_tab_entry HWM_TAB_SFF[] = {
++ { 0x019, 0x2f, 0, 0xffff },
++ { 0x040, 0x01, 0, 0xffff },
++ { 0x072, 0x03, 0, 0xffff },
++ { 0x075, 0x06, 0, 0xffff },
++ { 0x07c, 0x00, 0, 0xffff },
++ { 0x080, 0x00, 0, 0xffff },
++ { 0x081, 0x00, 0, 0xffff },
++ { 0x083, 0xbb, 0, 0xffff },
++ { 0x085, 0x59, 0, 0xffff },
++ { 0x086, 0x6a, 0, 0xffff },
++ { 0x087, 0xc0, 0, 0xffff },
++ { 0x08a, 0x33, 0, 0xffff },
++ { 0x090, 0x77, 0, 0xffff },
++ { 0x091, 0x66, 0, 0xffff },
++ { 0x092, 0x94, 0, 0xffff },
++ { 0x093, 0x90, 0, 0xffff },
++ { 0x094, 0x68, 0, 0xffff },
++ { 0x096, 0xa4, 0, 0xffff },
++ { 0x097, 0xa4, 0, 0xffff },
++ { 0x098, 0xa4, 0, 0xffff },
++ { 0x099, 0xa4, 0, 0xffff },
++ { 0x09a, 0xa4, 0, 0xffff },
++ { 0x09b, 0xa4, 0, 0xffff },
++ { 0x0a0, 0x3e, 0, 0xffff },
++ { 0x0ae, 0x86, 0, 0xffff },
++ { 0x0af, 0x86, 0, 0xffff },
++ { 0x0b0, 0xa4, 0, 0xffff },
++ { 0x0b1, 0xa4, 0, 0xffff },
++ { 0x0b2, 0x90, 0, 0xffff },
++ { 0x0b6, 0x48, 0, 0xffff },
++ { 0x0b7, 0x48, 0, 0xffff },
++ { 0x0ea, 0x64, 0, 0xffff },
++ { 0x0f0, 0x30, 0, 0xffff },
++ { 0x1b1, 0x48, 0, 0xffff },
++ { 0x1b8, 0x00, 0, 0xffff },
++ { 0x1be, 0x95, 0, 0xffff },
++ { 0x1c1, 0x90, 0, 0xffff },
++ { 0x1c6, 0x00, 0, 0xffff },
++ { 0x1c9, 0x00, 0, 0xffff },
++ { 0x280, 0x68, 0, 0xffff },
++ { 0x281, 0x10, 0, 0xffff },
++ { 0x282, 0x03, 0, 0xffff },
++ { 0x283, 0x0a, 0, 0xffff },
++ { 0x284, 0x80, 0, 0xffff },
++ { 0x285, 0x03, 0, 0xffff}
++};
++
++static const struct hwm_tab_entry HWM_TAB_MT[] = {
++ { 0x005, 0x33, 0, 0xffff },
++ { 0x018, 0x2f, 0, 0xffff },
++ { 0x019, 0x2f, 0, 0xffff },
++ { 0x01a, 0x2f, 0, 0xffff },
++ { 0x080, 0x00, 0, 0xffff },
++ { 0x081, 0x00, 0, 0xffff },
++ { 0x082, 0x80, 0, 0xffff },
++ { 0x083, 0xbb, 0, 0xffff },
++ { 0x085, 0xb9, 0, 0x0010 },
++ { 0x086, 0xac, 0, 0x0010 },
++ { 0x087, 0x87, 0, 0x0010 },
++ { 0x08a, 0x51, 0, 0x0010 },
++ { 0x08b, 0x39, 0, 0x0010 },
++ { 0x090, 0x78, 0, 0xffff },
++ { 0x091, 0x6a, 0, 0xffff },
++ { 0x092, 0x8f, 0, 0xffff },
++ { 0x094, 0x68, 0, 0xffff },
++ { 0x095, 0x5b, 0, 0xffff },
++ { 0x096, 0x92, 0, 0xffff },
++ { 0x097, 0x86, 0, 0xffff },
++ { 0x098, 0xa4, 0, 0xffff },
++ { 0x09a, 0x8b, 0, 0xffff },
++ { 0x0a0, 0x0a, 0, 0xffff },
++ { 0x0a1, 0x26, 0, 0xffff },
++ { 0x0a2, 0xd1, 0, 0xffff },
++ { 0x0ae, 0x7c, 0, 0xffff },
++ { 0x0af, 0x7c, 0, 0xffff },
++ { 0x0b0, 0x9a, 0, 0xffff },
++ { 0x0b3, 0x7c, 0, 0xffff },
++ { 0x0b6, 0x08, 0, 0xffff },
++ { 0x0b7, 0x00, 0, 0xffff },
++ { 0x0ea, 0x64, 0, 0xffff },
++ { 0x0ef, 0xff, 0, 0xffff },
++ { 0x0f8, 0x15, 0, 0xffff },
++ { 0x0f9, 0x00, 0, 0xffff },
++ { 0x0f0, 0x30, 0, 0xffff },
++ { 0x0fd, 0x01, 0, 0xffff },
++ { 0x1a1, 0x99, 0, 0xffff },
++ { 0x1a2, 0x00, 0, 0xffff },
++ { 0x1a4, 0x00, 0, 0xffff },
++ { 0x1b1, 0x00, 0, 0xffff },
++ { 0x1be, 0x90, 0, 0xffff },
++ { 0x280, 0xc4, 0, 0xffff },
++ { 0x281, 0x09, 0, 0xffff },
++ { 0x282, 0x0a, 0, 0xffff },
++ { 0x283, 0x14, 0, 0xffff },
++ { 0x284, 0x01, 0, 0xffff },
++ { 0x285, 0x01, 0, 0xffff },
++ { 0x288, 0x94, 0, 0xffff },
++ { 0x289, 0x11, 0, 0xffff },
++ { 0x28a, 0x0a, 0, 0xffff },
++ { 0x28b, 0x14, 0, 0xffff },
++ { 0x28c, 0x01, 0, 0xffff },
++ { 0x28d, 0x01, 0, 0xffff },
++ { 0x294, 0x24, 0, 0xffff },
++};
++
++static uint8_t get_temp_target(void)
++{
++ uint8_t val = rdmsr(0x1a2).lo >> 8 & 0xff;
++ if (!val)
++ val = 20;
++ return 0x95 - val;
++}
++
++static uint16_t get_pkg_power(void)
++{
++ const unsigned int pkg_power = rdmsr(0x614).lo & 0x7fff;
++ const unsigned int power_unit = 1 << (rdmsr(0x606).lo & 0xf);
++ if (pkg_power / power_unit > 65)
++ return 32;
++ else
++ return 16;
++}
++
++static uint8_t get_core_cnt(void)
++{
++ // Intel describes this CPUID field as:
++ // > Maximum number of addressable IDs for processor cores in the physical package
++ if (cpuid(0).eax >= 4)
++ return cpuid_ext(4, 0).eax >> 26;
++ return 0;
++}
++
++static void apply_hwm_tab(const struct hwm_tab_entry *arr, size_t size)
++{
++ uint8_t temp_target = get_temp_target();
++ uint16_t pkg_power = get_pkg_power();
++
++ printk(BIOS_DEBUG, "Temp target = %#x\n", temp_target);
++ printk(BIOS_DEBUG, "Package power = %#x\n", pkg_power);
++
++ for (size_t i = 0; i < size; ++i) {
++ // Skip entry if it doesn't apply for this package power
++ if (arr[i].pkg_power != pkg_power &&
++ arr[i].pkg_power != HWM_TAB_PKG_POWER_ANY)
++ continue;
++
++ uint8_t val = arr[i].val;
++
++ // Add temp target to value if requested (current tables never do)
++ if (arr[i].flags & HWM_TAB_ADD_TEMP_TARGET)
++ val += temp_target;
++
++ // Perform write
++ sch5555_mbox_write(1, arr[i].addr, val);
++
++ }
++}
++
++static void sch5555_ec_hwm_init(void *arg)
++{
++ uint8_t form_fac_id, saved_2fc, core_cnt;
++
++ printk(BIOS_DEBUG, "OptiPlex 3050 late HWM init\n");
++
++ form_fac_id = gpio_get(GPP_G2) | gpio_get(GPP_G3) << 1;
++ printk(BIOS_DEBUG, "Form Factor ID = %#x\n", form_fac_id);
++
++ saved_2fc = sch5555_mbox_read(1, 0x2fc);
++ sch5555_mbox_write(1, 0x2fc, 0xa0);
++ sch5555_mbox_write(1, 0x2fd, 0x32);
++
++ switch (form_fac_id) {
++ case FORM_FACTOR_MICRO:
++ // CPU stepping <= 3
++ if ((cpuid(1).eax & 0xf) <= 3)
++ apply_hwm_tab(HWM_TAB_MICRO_EARLY_STEPPING, ARRAY_SIZE(HWM_TAB_MICRO_EARLY_STEPPING));
++ // Tjunction == 80
++ else if ((rdmsr(0x1a2).lo >> 16 & 0xff) == 80)
++ apply_hwm_tab(HWM_TAB_MICRO_TEMP80, ARRAY_SIZE(HWM_TAB_MICRO_TEMP80));
++ else
++ apply_hwm_tab(HWM_TAB_MICRO_BASE, ARRAY_SIZE(HWM_TAB_MICRO_BASE));
++ break;
++ case FORM_FACTOR_SFF:
++ apply_hwm_tab(HWM_TAB_SFF, ARRAY_SIZE(HWM_TAB_SFF));
++ break;
++ default:
++ apply_hwm_tab(HWM_TAB_MT, ARRAY_SIZE(HWM_TAB_MT));
++ break;
++ }
++
++ core_cnt = get_core_cnt();
++ printk(BIOS_DEBUG, "CPU Core Count = %#x\n", core_cnt);
++ if (get_core_cnt() > 2) {
++ sch5555_mbox_write(1, 0x9e, 0x30);
++ sch5555_mbox_write(1, 0xeb, sch5555_mbox_read(1, 0xea));
++ }
++
++ sch5555_mbox_write(1, 0x2fc, saved_2fc);
++ sch5555_mbox_read(1, 0xb8);
++}
++
++BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL);
+diff --git a/src/mainboard/dell/optiplex_3050/romstage.c b/src/mainboard/dell/optiplex_3050/romstage.c
+new file mode 100644
+index 0000000000..a4734e5d61
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/romstage.c
+@@ -0,0 +1,26 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <assert.h>
++#include <soc/romstage.h>
++#include <stdint.h>
++#include <string.h>
++#include <spd_bin.h>
++#include <cbfs.h>
++
++void mainboard_memory_init_params(FSPM_UPD *mupd)
++{
++ struct spd_block blk = { .addr_map = { 0x50, 0x52, } };
++ get_spd_smbus(&blk);
++ dump_spd_info(&blk);
++
++ FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig;
++ mem_cfg->DqPinsInterleaved = true;
++ mem_cfg->CaVrefConfig = 2;
++ mem_cfg->MemorySpdDataLen = blk.len;
++ mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0];
++ mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[1];
++
++ /* use virtual channel 1 for the dmi interface of the PCH
++ * FIXME: do we need this? */
++ mupd->FspmTestConfig.DmiVc1 = 1;
++}
+diff --git a/src/mainboard/dell/optiplex_3050/sch5555_ec.c b/src/mainboard/dell/optiplex_3050/sch5555_ec.c
+new file mode 100644
+index 0000000000..1df5026531
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/sch5555_ec.c
+@@ -0,0 +1,54 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <arch/io.h>
++#include <device/pnp_ops.h>
++#include <superio/smsc/sch555x/sch555x.h>
++#include "sch5555_ec.h"
++
++uint8_t sch5555_mbox_read(uint8_t addr1, uint16_t addr2)
++{
++ // clear ec-to-host mailbox
++ uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
++ outb(tmp, SCH555x_EMI_IOBASE + 1);
++
++ // send address
++ outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
++ outw((addr1 * 2) | 0x100, SCH555x_EMI_IOBASE + 4);
++
++ outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
++ outl(addr2 << 16, SCH555x_EMI_IOBASE + 4);
++
++ // send message to ec
++ outb(1, SCH555x_EMI_IOBASE);
++
++ // wait for ack
++ for (size_t retry = 0; retry < 0xfff; ++retry)
++ if (inb(SCH555x_EMI_IOBASE + 1) & 1)
++ break;
++
++ // read result
++ outw(4 | 0x8000, SCH555x_EMI_IOBASE + 2);
++ return inb(SCH555x_EMI_IOBASE + 4);
++}
++
++void sch5555_mbox_write(uint8_t addr1, uint16_t addr2, uint8_t val)
++{
++ // clear ec-to-host mailbox
++ uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
++ outb(tmp, SCH555x_EMI_IOBASE + 1);
++
++ // send address and value
++ outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
++ outw((addr1 * 2) | 0x101, SCH555x_EMI_IOBASE + 4);
++
++ outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
++ outl(val | (addr2 << 16), SCH555x_EMI_IOBASE + 4);
++
++ // send message to ec
++ outb(1, SCH555x_EMI_IOBASE);
++
++ // wait for ack
++ for (size_t retry = 0; retry < 0xfff; ++retry)
++ if (inb(SCH555x_EMI_IOBASE + 1) & 1)
++ break;
++}
+diff --git a/src/mainboard/dell/optiplex_3050/sch5555_ec.h b/src/mainboard/dell/optiplex_3050/sch5555_ec.h
+new file mode 100644
+index 0000000000..9d262d5787
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/sch5555_ec.h
+@@ -0,0 +1,10 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#ifndef __SCH5555_EC_H__
++#define __SCH5555_EC_H__
++
++uint8_t sch5555_mbox_read(uint8_t addr1, uint16_t addr2);
++
++void sch5555_mbox_write(uint8_t addr1, uint16_t addr2, uint8_t val);
++
++#endif
+--
+2.39.5
+
diff --git a/config/coreboot/dell7/patches/0002-dell-optiplex_3050-add-hda_verb.c.patch b/config/coreboot/dell7/patches/0002-dell-optiplex_3050-add-hda_verb.c.patch
new file mode 100644
index 00000000..376a8761
--- /dev/null
+++ b/config/coreboot/dell7/patches/0002-dell-optiplex_3050-add-hda_verb.c.patch
@@ -0,0 +1,140 @@
+From 6140f780837726a24d6c473ac50a62fdd5ee8f2d Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sun, 6 Oct 2024 17:25:27 +0100
+Subject: [PATCH 2/4] dell/optiplex_3050: add hda_verb.c
+
+Configured for the line jack at the front of the machine.
+
+Based on dumps from the vendor BIOS.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/mainboard/dell/optiplex_3050/Kconfig | 1 +
+ src/mainboard/dell/optiplex_3050/Makefile.mk | 3 +-
+ src/mainboard/dell/optiplex_3050/hda_verb.c | 90 ++++++++++++++++++++
+ 3 files changed, 93 insertions(+), 1 deletion(-)
+ create mode 100644 src/mainboard/dell/optiplex_3050/hda_verb.c
+
+diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig
+index 2f0dccb98d..eab6034158 100644
+--- a/src/mainboard/dell/optiplex_3050/Kconfig
++++ b/src/mainboard/dell/optiplex_3050/Kconfig
+@@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
+ select SKYLAKE_SOC_PCH_H
+ select SOC_INTEL_KABYLAKE
+ select SUPERIO_SMSC_SCH555x
++ select SOC_INTEL_COMMON_BLOCK_HDA_VERB
+
+ config CBFS_SIZE
+ default 0x900000
+diff --git a/src/mainboard/dell/optiplex_3050/Makefile.mk b/src/mainboard/dell/optiplex_3050/Makefile.mk
+index d50ea40879..90b3cc4c48 100644
+--- a/src/mainboard/dell/optiplex_3050/Makefile.mk
++++ b/src/mainboard/dell/optiplex_3050/Makefile.mk
+@@ -5,5 +5,6 @@ bootblock-y += sch5555_ec.c
+
+ romstage-y += romstage.c
+
+-ramstage-y += ramstage.c sch5555_ec.c
++ramstage-y += ramstage.c sch5555_ec.c hda_verb.c
++
+ ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+diff --git a/src/mainboard/dell/optiplex_3050/hda_verb.c b/src/mainboard/dell/optiplex_3050/hda_verb.c
+new file mode 100644
+index 0000000000..621e4f7a52
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_3050/hda_verb.c
+@@ -0,0 +1,90 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++ /* coreboot specific header, codec 0 */
++ 0x10ec0255, /* Realtek ALC3234 */
++ 0x102807a3, /* Subsystem ID */
++ 11, /* Number of entries */
++
++ /* Pin Widget Verb Table */
++
++ AZALIA_SUBVENDOR(0, 0x102807a3),
++
++ AZALIA_PIN_CFG(0, 0x12, 0x40000000), // does not describe a jack or internal device
++ AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_DESC(
++ AZALIA_INTEGRATED,
++ AZALIA_INTERNAL,
++ AZALIA_SPEAKER,
++ AZALIA_OTHER_ANALOG,
++ AZALIA_COLOR_UNKNOWN,
++ AZALIA_NO_JACK_PRESENCE_DETECT,
++ 5, 0
++ )),
++ AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
++ AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
++ AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
++ AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
++ AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_DESC(
++ AZALIA_JACK,
++ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_FRONT,
++ AZALIA_LINE_OUT,
++ AZALIA_STEREO_MONO_1_8,
++ AZALIA_BLACK,
++ AZALIA_JACK_PRESENCE_DETECT,
++ 2, 0
++ )),
++ AZALIA_PIN_CFG(0, 0x1d, 0x4054c029), // does not describe a jack or internal device
++ AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
++ AZALIA_PIN_CFG(0, 0x21, AZALIA_PIN_DESC(
++ AZALIA_JACK,
++ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_FRONT,
++ AZALIA_HP_OUT,
++ AZALIA_STEREO_MONO_1_8,
++ AZALIA_BLACK,
++ AZALIA_JACK_PRESENCE_DETECT,
++ 5, 15
++ )),
++
++ /* coreboot specific header, codec 2 */
++ 0x80862809, /* Intel Skylake HDMI */
++ 0x80860101, /* Subsystem ID */
++ 4, /* Number of entries */
++
++ /* Pin Widget Verb Table */
++
++ AZALIA_SUBVENDOR(2, 0x80860101),
++
++ AZALIA_PIN_CFG(2, 0x05, AZALIA_PIN_DESC(
++ AZALIA_JACK,
++ AZALIA_DIGITAL_DISPLAY,
++ AZALIA_DIGITAL_OTHER_OUT,
++ AZALIA_OTHER_DIGITAL,
++ AZALIA_COLOR_UNKNOWN,
++ AZALIA_JACK_PRESENCE_DETECT,
++ 1, 0
++ )),
++ AZALIA_PIN_CFG(2, 0x06, AZALIA_PIN_DESC(
++ AZALIA_JACK,
++ AZALIA_DIGITAL_DISPLAY,
++ AZALIA_DIGITAL_OTHER_OUT,
++ AZALIA_OTHER_DIGITAL,
++ AZALIA_COLOR_UNKNOWN,
++ AZALIA_JACK_PRESENCE_DETECT,
++ 1, 0
++ )),
++ AZALIA_PIN_CFG(2, 0x07, AZALIA_PIN_DESC(
++ AZALIA_JACK,
++ AZALIA_DIGITAL_DISPLAY,
++ AZALIA_DIGITAL_OTHER_OUT,
++ AZALIA_OTHER_DIGITAL,
++ AZALIA_COLOR_UNKNOWN,
++ AZALIA_JACK_PRESENCE_DETECT,
++ 1, 0
++ )),
++};
++
++const u32 pc_beep_verbs[] = {};
++
++AZALIA_ARRAY_SIZES;
+--
+2.39.5
+
diff --git a/config/coreboot/dell7/patches/0003-dell-optiplex_3050-Add-data.vbt.patch b/config/coreboot/dell7/patches/0003-dell-optiplex_3050-Add-data.vbt.patch
new file mode 100644
index 00000000..5ec93c6f
--- /dev/null
+++ b/config/coreboot/dell7/patches/0003-dell-optiplex_3050-Add-data.vbt.patch
@@ -0,0 +1,74 @@
+From e8c7028be21084ef2f89140cccb393ca7a0ff327 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sun, 6 Oct 2024 23:48:05 +0100
+Subject: [PATCH 3/4] dell/optiplex_3050: Add data.vbt
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ src/mainboard/dell/optiplex_3050/Kconfig | 5 +++++
+ src/mainboard/dell/optiplex_3050/data.vbt | Bin 0 -> 4300 bytes
+ 2 files changed, 5 insertions(+)
+ create mode 100644 src/mainboard/dell/optiplex_3050/data.vbt
+
+diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig
+index eab6034158..523a160ae3 100644
+--- a/src/mainboard/dell/optiplex_3050/Kconfig
++++ b/src/mainboard/dell/optiplex_3050/Kconfig
+@@ -17,6 +17,8 @@ config BOARD_SPECIFIC_OPTIONS
+ select SOC_INTEL_KABYLAKE
+ select SUPERIO_SMSC_SCH555x
+ select SOC_INTEL_COMMON_BLOCK_HDA_VERB
++ select INTEL_GMA_HAVE_VBT
++ select INTEL_GMA_ADD_VBT
+
+ config CBFS_SIZE
+ default 0x900000
+@@ -27,6 +29,9 @@ config MAINBOARD_DIR
+ config MAINBOARD_PART_NUMBER
+ default "OptiPlex 3050 Micro"
+
++config INTEL_GMA_VBT_FILE
++ default "src/mainboard/\$(MAINBOARDDIR)/data.vbt"
++
+ config DIMM_SPD_SIZE
+ default 512 # DDR4
+
+diff --git a/src/mainboard/dell/optiplex_3050/data.vbt b/src/mainboard/dell/optiplex_3050/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..6dc40cd99563bcd957ec2a9c4567e3b21e5d1d1f
+GIT binary patch
+literal 4300
+zcmeHJZ)_A*5TD(>zi)T1ds~!pU>y<RuF$e~N-bJsuXmJ|7P*63&uGGx+#w{DmbQ?B
+ze^_HpNECA))Sw}xiC;|p(!}^ljU+}T!9QpeKH4uPN;EMM;}_tZeY@?IBiNH@l!V#L
+zn>X`jfBW9Nd2eS$e@7qg=y|L+*|P~<Du4l>Ybk24rH<}xJ9eg%eaW32z1vbf_%+-P
+zC$uXU01ASzM2Q>g;@$hkii6SZG3@E+#eVw*w9N;N1g6_?YiB3s;_)?@>DbVf-r9}P
+zO`Vx|jP%robSBQ#gsrAYO>p&IQpqWSxVK|yXmkvV`v!Im77N$TZXru*X!y{`-Y55r
+zVKf!Pgkc!X2_qgyK4nY|jSRP7a&Qp0+diYXy*OGNIan;Ts7z%5ry$@FKoGo8XMq5h
+z6OcC{V?x>l17U>+7I|RUgn|iuCftWGW>(Kf196=odH`0=A3;(GULp|y6Ks_T0R#_x
+zlLt);9A0GWnQsLE?*|8{0RgE`gv2JC<6bXwubJ}!0Qv+3{3xJE9q#3H2<s&G0tf>5
+z>@mL~p#5nF3*pl}^hKC<v1C31Ae!^M&^2;#l`=O_ZLQWF$7*Y}Uh$G>xt9(*`c-X6
+zFkpAE5jIOv7?VVJPHKbYp3@KrBCHN-@DOp9_>7mqcf{Wl|3v&7@nvGak3pDtDe*nT
+zYl+trr--)_KT146>^lIL%Ay5+{&h=mW!RCRdEk{8SSMWj3D+L{)!qr(URTPl<i;AB
+za@p^PE9Ea6pj-}YuxDTr0>wf|yGUKG?B!CDGOpf7(oT__tC!2cJgEtK{*6}R$n1=r
+z$PSguH+xU1hb?rHq(J+G2P}V^ryazPkEs%j0}In3b4gctpl8)ZC&3qS6o31yv0DC@
+zBN6*5So*Vg*3aOq|DtfT{{PvtW2P<e%*HkB(yV?<-ipBd2rTP@b3v<wGk0i#{Bmcc
+z@y0B7K0!Gt2Iyi?fd2i^HUB$v{Q!tv^fz~$94j}a>75FZ$;1Eo6%!)V*$4D5C>nt}
+z7_D}&ricJyuY&X-!vUs`GWIOPx0wDOV;?d6f$4uRCdjx-*4N7{CF5RMe_CcQ%J`0~
+ze<-uhWc)?e%Q6cpxK`1V3hPmDzoNgOuwx3otLUF7>?;L-S9HJ1!Ybac>fI{aq2eJ`
+ze@SJpsrbICf1$GTDqdFgx)56u!i^z48)A=#)F$0)i8F!~4)H=KFrv`ilM@v#FA5q-
+zZ`~^T%U!!Etw*TnvRA91loJ<5n5;vH=aymAq8i4g#?~Vu@R%z0b-pk{VF{Q?SZOpI
+zZFLYDT8~J)KBGPNg2zT^r<&>dt1z12coq!P7_N5^Xb$wE-B-rFk(v<3F&oiLZ61P9
+z^8O8kx7Uu(WFsrh-0{jBgc7g$6w^0d!yLLcn#Qi_glV3tAo!dLNa^?163N|n^-pD?
+z(daC>dtpbi#Q&W%m0IHPOiO7pA89lVboYWH=_yh1N|ChuwX7oAZcPqP-%SWj_FFt3
+zyd_?zD3jia8uH=I*yP#l#Bw9^#^N~y33zEtk*o#5XfjXdCkjSG)~N^WoRlb;h;B3|
+zIfCjSc(I06T!_GA1{WKOk*chsMCXx5vW@41o#fZgYViT9VSih*nQN}>g+zCejX>9!
+zZ{c$hGa+w5eO}YT_FH@}B)U(Dl-|zF&dk8R;^4yrPZe)YrI^k%j}0~VZ%*1PT98&h
+z556thD#%T3IZc)NKi{(4RJn@8Dq3?JywFKA?WW585y(IR)(Ee|k5bDtz|lFnDY}0G
+Ds8qe3
+
+literal 0
+HcmV?d00001
+
+--
+2.39.5
+
diff --git a/config/coreboot/dell/patches/0005-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/dell7/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch
index 546bad7f..ece00c26 100644
--- a/config/coreboot/dell/patches/0005-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ b/config/coreboot/dell7/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -1,7 +1,7 @@
-From de4eeaf6d44cb05c60c0b0d54b43cdb88686b998 Mon Sep 17 00:00:00 2001
+From d7f20d6adf94e6c4736c55e88fcd1c8bde88994a Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 5/9] Remove warning for coreboot images built without a
+Subject: [PATCH 4/4] Remove warning for coreboot images built without a
payload
I added this in upstream to prevent people from accidentally flashing
@@ -13,10 +13,10 @@ up. This has caused confusion and concern so just patch it out.
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk
-index a2336aa876..4f1692a873 100644
+index 5f988dac1b..516133880f 100644
--- a/payloads/Makefile.mk
+++ b/payloads/Makefile.mk
-@@ -49,16 +49,5 @@ distclean-payloads:
+@@ -50,16 +50,5 @@ distclean-payloads:
print-repo-info-payloads:
-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
@@ -35,5 +35,5 @@ index a2336aa876..4f1692a873 100644
-.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
+.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/dell/patches/0001-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/dell7/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
index cb1effa7..66059f24 100644
--- a/config/coreboot/dell/patches/0001-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ b/config/coreboot/dell7/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -1,7 +1,7 @@
-From 4fbd327df271d613d4a56a36eafd88d9d642ec6b Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
+From ecedecb1224a04531ec544b76ef93efd33cd8f6d Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 1/9] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 1/1] util/ifdtool: add --nuke flag (all 0xFF on region)
When this option is used, the region's contents are overwritten
with all ones (0xFF).
@@ -16,14 +16,14 @@ Rebased since the last revision update in lbmk.
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
- util/ifdtool/ifdtool.c | 112 +++++++++++++++++++++++++++++------------
- 1 file changed, 81 insertions(+), 31 deletions(-)
+ util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
+ 1 file changed, 83 insertions(+), 31 deletions(-)
diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index 191b3216de..38132b4a28 100644
+index 36477eef66..3ebef74042 100644
--- a/util/ifdtool/ifdtool.c
+++ b/util/ifdtool/ifdtool.c
-@@ -1942,6 +1942,7 @@ static void print_usage(const char *name)
+@@ -2217,6 +2217,7 @@ static void print_usage(const char *name)
" tgl - Tiger Lake\n"
" wbg - Wellsburg\n"
" -S | --setpchstrap Write a PCH strap\n"
@@ -31,7 +31,7 @@ index 191b3216de..38132b4a28 100644
" -V | --newvalue The new value to write into PCH strap specified by -S\n"
" -v | --version: print the version\n"
" -h | --help: print this help\n\n"
-@@ -1950,6 +1951,60 @@ static void print_usage(const char *name)
+@@ -2225,6 +2226,60 @@ static void print_usage(const char *name)
"\n");
}
@@ -92,15 +92,15 @@ index 191b3216de..38132b4a28 100644
int main(int argc, char *argv[])
{
int opt, option_index = 0;
-@@ -1957,6 +2012,7 @@ int main(int argc, char *argv[])
+@@ -2232,6 +2287,7 @@ int main(int argc, char *argv[])
int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
+ int mode_nuke = 0;
- int mode_gpr0_disable = 0;
+ int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
char *region_type_string = NULL, *region_fname = NULL;
const char *layout_fname = NULL;
-@@ -1990,6 +2046,7 @@ int main(int argc, char *argv[])
+@@ -2267,6 +2323,7 @@ int main(int argc, char *argv[])
{"validate", 0, NULL, 't'},
{"setpchstrap", 1, NULL, 'S'},
{"newvalue", 1, NULL, 'V'},
@@ -108,7 +108,7 @@ index 191b3216de..38132b4a28 100644
{0, 0, 0, 0}
};
-@@ -2039,35 +2096,8 @@ int main(int argc, char *argv[])
+@@ -2316,35 +2373,8 @@ int main(int argc, char *argv[])
region_fname++;
// Descriptor, BIOS, ME, GbE, Platform
// valid type?
@@ -141,12 +141,12 @@ index 191b3216de..38132b4a28 100644
- else if (!strcasecmp("PTT", region_type_string))
- region_type = 15;
- if (region_type == -1) {
-+ if ((region_type =
-+ get_region_type_string(region_type_string)) == -1) {
++ if ((region_type =
++ get_region_type_string(region_type_string)) == -1) {
fprintf(stderr, "No such region type: '%s'\n\n",
region_type_string);
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
-@@ -2236,6 +2266,22 @@ int main(int argc, char *argv[])
+@@ -2521,6 +2551,22 @@ int main(int argc, char *argv[])
case 't':
mode_validate = 1;
break;
@@ -169,35 +169,37 @@ index 191b3216de..38132b4a28 100644
case 'v':
print_version();
exit(EXIT_SUCCESS);
-@@ -2252,7 +2298,7 @@ int main(int argc, char *argv[])
+@@ -2540,7 +2586,8 @@ int main(int argc, char *argv[])
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
-- mode_gpr0_disable) > 1) {
-+ mode_gpr0_disable + mode_nuke) > 1) {
+- (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) > 1) {
++ (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
++ mode_nuke) > 1) {
fprintf(stderr, "You may not specify more than one mode.\n\n");
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
exit(EXIT_FAILURE);
-@@ -2261,7 +2307,7 @@ int main(int argc, char *argv[])
+@@ -2549,7 +2596,8 @@ int main(int argc, char *argv[])
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
mode_locked + mode_unlocked + mode_density + mode_altmedisable +
-- mode_validate + mode_gpr0_disable) == 0) {
-+ mode_validate + mode_gpr0_disable + mode_nuke) == 0) {
+- mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) == 0) {
++ mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
++ mode_nuke) == 0) {
fprintf(stderr, "You need to specify a mode.\n\n");
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
exit(EXIT_FAILURE);
-@@ -2368,6 +2414,10 @@ int main(int argc, char *argv[])
+@@ -2662,6 +2710,10 @@ int main(int argc, char *argv[])
write_image(new_filename, image, size);
}
-+ if (mode_nuke) {
-+ nuke(new_filename, image, size, region_type);
-+ }
++ if (mode_nuke) {
++ nuke(new_filename, image, size, region_type);
++ }
+
if (mode_altmedisable) {
struct fpsba *fpsba = find_fpsba(image, size);
struct fmsba *fmsba = find_fmsba(image, size);
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/dell7/target.cfg b/config/coreboot/dell7/target.cfg
new file mode 100644
index 00000000..366f8eff
--- /dev/null
+++ b/config/coreboot/dell7/target.cfg
@@ -0,0 +1,2 @@
+tree="dell7"
+rev="e81fdd74a930b0bf8105816ea115ceaeb99bae1d"
diff --git a/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode b/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..05151e1f
--- /dev/null
+++ b/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,671 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Precision T1650"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_workstations"
+CONFIG_VGA_BIOS_ID="8086,0106"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xBE5000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_DEVICETREE="variants/baseboard/devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="optiplex_9010_sff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_9010=y
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_WORKSTATIONS=y
+CONFIG_INCLUDE_SMSC_SCH5545_EC_FW=y
+CONFIG_SMSC_SCH5545_EC_FW_FILE="../../../vendorfiles/t1650/sch5545ec.bin"
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t1650/12_ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/t1650/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t1650/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Precision T1650"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+# CONFIG_TPM_MEASURED_BOOT is not set
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_SCH5545=y
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_MEMORY_MAPPED_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell7010sff_12mb/target.cfg b/config/coreboot/dell7010sff_12mb/target.cfg
new file mode 100644
index 00000000..abc1d14e
--- /dev/null
+++ b/config/coreboot/dell7010sff_12mb/target.cfg
@@ -0,0 +1,9 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci"
+grubtree="nvme"
+vcfg="t1650"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..4174c6ff
--- /dev/null
+++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb
@@ -0,0 +1,653 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_mt"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..088dd29e
--- /dev/null
+++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode
@@ -0,0 +1,649 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_mt"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell780mt_8mb/target.cfg b/config/coreboot/dell780mt_8mb/target.cfg
new file mode 100644
index 00000000..eca44aa2
--- /dev/null
+++ b/config/coreboot/dell780mt_8mb/target.cfg
@@ -0,0 +1,8 @@
+tree="next"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci ata"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..227505a8
--- /dev/null
+++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb
@@ -0,0 +1,653 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x5FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_mt"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=6144
+CONFIG_ROM_SIZE=0x00600000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..10472423
--- /dev/null
+++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode
@@ -0,0 +1,649 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x5FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_mt"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
+# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=6144
+CONFIG_ROM_SIZE=0x00600000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell780mt_truncate_8mb/target.cfg b/config/coreboot/dell780mt_truncate_8mb/target.cfg
new file mode 100644
index 00000000..eca44aa2
--- /dev/null
+++ b/config/coreboot/dell780mt_truncate_8mb/target.cfg
@@ -0,0 +1,8 @@
+tree="next"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci ata"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..4931a6ca
--- /dev/null
+++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb
@@ -0,0 +1,653 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_usff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..ad8186eb
--- /dev/null
+++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode
@@ -0,0 +1,649 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x7FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_usff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell780usff_8mb/target.cfg b/config/coreboot/dell780usff_8mb/target.cfg
new file mode 100644
index 00000000..eca44aa2
--- /dev/null
+++ b/config/coreboot/dell780usff_8mb/target.cfg
@@ -0,0 +1,8 @@
+tree="next"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci ata"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..9b4d346b
--- /dev/null
+++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb
@@ -0,0 +1,653 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x5FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_usff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=6144
+CONFIG_ROM_SIZE=0x00600000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..bd98f32d
--- /dev/null
+++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode
@@ -0,0 +1,649 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_LTO is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ARM is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_ERYING is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HARDKERNEL is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LATTEPANDA is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/optiplex_780"
+CONFIG_VGA_BIOS_ID="8086,2e22"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x5FD000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+CONFIG_VARIANT_DIR="780_usff"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+# CONFIG_FATAL_ASSERTS is not set
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y
+CONFIG_DCACHE_RAM_BASE=0xfeff8000
+CONFIG_DCACHE_RAM_SIZE=0x8000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT"
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
+CONFIG_TTYS0_BAUD=115200
+CONFIG_D3COLD_SUPPORT=y
+CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_6144=y
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=6144
+CONFIG_ROM_SIZE=0x00600000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_MODEL_F3X=y
+CONFIG_CPU_INTEL_MODEL_F4X=y
+CONFIG_CPU_INTEL_SOCKET_LGA775=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_X4X=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_SIPI_VECTOR_IN_ROM=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+CONFIG_DEFAULT_EBDA_LOWMEM=0x100000
+CONFIG_DEFAULT_EBDA_SEGMENT=0xF600
+CONFIG_DEFAULT_EBDA_SIZE=0x400
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+CONFIG_DEFAULT_SCREEN_ROTATION_INT=0
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x10000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+CONFIG_DRIVERS_I2C_CK505=y
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+CONFIG_TTYS0_BASE=0x3f8
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_LCS=3
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/dell780usff_truncate_8mb/target.cfg b/config/coreboot/dell780usff_truncate_8mb/target.cfg
new file mode 100644
index 00000000..eca44aa2
--- /dev/null
+++ b/config/coreboot/dell780usff_truncate_8mb/target.cfg
@@ -0,0 +1,8 @@
+tree="next"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci ata"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/dell9020mt-nri_12mb/target.cfg b/config/coreboot/dell9020mt-nri_12mb/target.cfg
deleted file mode 100644
index 37d8f553..00000000
--- a/config/coreboot/dell9020mt-nri_12mb/target.cfg
+++ /dev/null
@@ -1,7 +0,0 @@
-tree="haswell"
-xarch="i386-elf"
-payload_seabios="y"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
-payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
index 509e784e..8d8c5c20 100644
--- a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb
@@ -37,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +94,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,19 +129,37 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -159,6 +179,7 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_ENABLE_DDR_2X_REFRESH is not set
CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -170,14 +191,14 @@ CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -354,6 +375,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -476,8 +498,8 @@ CONFIG_DRIVERS_MTK_WIFI=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
diff --git a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
index 428bed87..231d6e94 100644
--- a/config/coreboot/dell9020mt-nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode
@@ -37,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +94,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,19 +127,37 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -157,6 +177,7 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_ENABLE_DDR_2X_REFRESH is not set
CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -168,14 +189,14 @@ CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -352,6 +373,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -473,8 +495,8 @@ CONFIG_DRIVERS_MTK_WIFI=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
diff --git a/config/coreboot/dell9020mt_nri_12mb/target.cfg b/config/coreboot/dell9020mt_nri_12mb/target.cfg
new file mode 100644
index 00000000..e7411d7f
--- /dev/null
+++ b/config/coreboot/dell9020mt_nri_12mb/target.cfg
@@ -0,0 +1,9 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci"
+grubtree="xhci"
+vcfg="haswell"
+build_depend="seabios/default grub/xhci memtest86plus"
diff --git a/config/coreboot/dell9020sff-nri_12mb/target.cfg b/config/coreboot/dell9020sff-nri_12mb/target.cfg
deleted file mode 100644
index 37d8f553..00000000
--- a/config/coreboot/dell9020sff-nri_12mb/target.cfg
+++ /dev/null
@@ -1,7 +0,0 @@
-tree="haswell"
-xarch="i386-elf"
-payload_seabios="y"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
-payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
index ac1d9f16..8d5ecd79 100644
--- a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb
@@ -37,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +94,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,19 +129,37 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -159,6 +179,7 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_ENABLE_DDR_2X_REFRESH is not set
CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -170,14 +191,14 @@ CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -354,6 +375,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -476,8 +498,8 @@ CONFIG_DRIVERS_MTK_WIFI=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
diff --git a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
index 179af9cc..272c35d5 100644
--- a/config/coreboot/dell9020sff-nri_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode
@@ -37,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +94,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,19 +127,37 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
# CONFIG_BOARD_DELL_E6400 is not set
CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -157,6 +177,7 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_ENABLE_DDR_2X_REFRESH is not set
CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -168,14 +189,14 @@ CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -352,6 +373,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -473,8 +495,8 @@ CONFIG_DRIVERS_MTK_WIFI=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
diff --git a/config/coreboot/dell9020sff_nri_12mb/target.cfg b/config/coreboot/dell9020sff_nri_12mb/target.cfg
new file mode 100644
index 00000000..e7411d7f
--- /dev/null
+++ b/config/coreboot/dell9020sff_nri_12mb/target.cfg
@@ -0,0 +1,9 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+grub_scan_disk="nvme ahci"
+grubtree="xhci"
+vcfg="haswell"
+build_depend="seabios/default grub/xhci memtest86plus"
diff --git a/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb b/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..67021be8
--- /dev/null
+++ b/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb
@@ -0,0 +1,622 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E4300"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/gm45_latitude"
+CONFIG_VGA_BIOS_ID="8086,2a42"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x3FD000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e4300"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_E4300=y
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefc0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E4300"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=4096
+CONFIG_ROM_SIZE=0x00400000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x61254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_SOCKET_P=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_GM45=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_EDID=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_NULL=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e4300_4mb/config/libgfxinit_txtmode b/config/coreboot/e4300_4mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..e6309b47
--- /dev/null
+++ b/config/coreboot/e4300_4mb/config/libgfxinit_txtmode
@@ -0,0 +1,618 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E4300"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/gm45_latitude"
+CONFIG_VGA_BIOS_ID="8086,2a42"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x3FD000
+CONFIG_MAX_CPUS=4
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e4300"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+CONFIG_BOARD_DELL_E4300=y
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefc0000
+CONFIG_DCACHE_RAM_SIZE=0x10000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_DRIVERS_INTEL_WIFI is not set
+CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E4300"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_4096=y
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=4096
+CONFIG_ROM_SIZE=0x00400000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x61254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_6FX=y
+CONFIG_CPU_INTEL_MODEL_1067X=y
+CONFIG_CPU_INTEL_SOCKET_P=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_SETUP_XIP_CACHE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_GM45=y
+
+#
+# Southbridge
+#
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+# CONFIG_HAVE_ME_BIN is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_AP_IN_SIPI_WAIT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
+CONFIG_USE_DDR3=y
+CONFIG_USE_DDR2=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_EDID=y
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="G45"
+CONFIG_GFX_GMA_PCH="No_PCH"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_NULL=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/g43t-am3/target.cfg b/config/coreboot/e4300_4mb/target.cfg
index 13f2a260..4a9af479 100644
--- a/config/coreboot/g43t-am3/target.cfg
+++ b/config/coreboot/e4300_4mb/target.cfg
@@ -1,5 +1,6 @@
tree="default"
xarch="i386-elf"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-grub_timeout=10
+grub_scan_disk="ahci"
diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
index 9abe57a3..3367bc2b 100644
--- a/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Latitude E5420"
CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e5420"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
CONFIG_VGA_BIOS_ID="8086,0116"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
@@ -123,31 +123,42 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e5420"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
CONFIG_BOARD_DELL_LATITUDE_E5420=y
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -164,6 +175,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe"
CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -173,14 +185,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_6144=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -222,9 +237,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -234,7 +250,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -265,6 +280,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -349,7 +365,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -364,6 +380,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -462,6 +479,7 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -515,7 +533,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_txtmode b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
index 5606a017..331dda80 100644
--- a/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Latitude E5420"
CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e5420"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
CONFIG_VGA_BIOS_ID="8086,0116"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
@@ -121,31 +121,42 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e5420"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
CONFIG_BOARD_DELL_LATITUDE_E5420=y
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -162,6 +173,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe"
CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -171,14 +183,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_6144=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -220,9 +235,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -232,7 +248,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -263,6 +278,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -347,7 +363,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -362,6 +378,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -459,6 +476,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -512,7 +530,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg
index 03fd230b..4201beb1 100644
--- a/config/coreboot/e5420_6mb/target.cfg
+++ b/config/coreboot/e5420_6mb/target.cfg
@@ -1,9 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
index e57da732..f6113581 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Latitude E5520"
CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e5520"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
CONFIG_VGA_BIOS_ID="8086,0126"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
@@ -123,31 +123,42 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e5520"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
CONFIG_BOARD_DELL_LATITUDE_E5520=y
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -164,6 +175,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe"
CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -173,14 +185,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_6144=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -222,9 +237,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -234,7 +250,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -265,6 +280,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -349,7 +365,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -364,6 +380,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -462,6 +479,7 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -515,7 +533,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
index b9c2cd0a..96bd21fc 100644
--- a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Latitude E5520"
CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e5520"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
CONFIG_VGA_BIOS_ID="8086,0126"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
@@ -121,31 +121,42 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e5520"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
CONFIG_BOARD_DELL_LATITUDE_E5520=y
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -162,6 +173,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe"
CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -171,14 +183,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_6144=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -220,9 +235,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -232,7 +248,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -263,6 +278,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -347,7 +363,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -362,6 +378,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -459,6 +476,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -512,7 +530,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg
index 03fd230b..4201beb1 100644
--- a/config/coreboot/e5520_6mb/target.cfg
+++ b/config/coreboot/e5520_6mb/target.cfg
@@ -1,9 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
index 7f4cdc8b..7702f7bd 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Latitude E5530"
CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e5530"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
CONFIG_VGA_BIOS_ID="8086,0166"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
@@ -123,31 +123,42 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e5530"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-CONFIG_BOARD_DELL_LATITUDE_E5530=y
-# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+CONFIG_BOARD_DELL_LATITUDE_E5530=y
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -164,6 +175,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd_nogbe"
CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -173,14 +185,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -222,9 +237,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -234,7 +250,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -265,6 +280,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -349,7 +365,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -364,6 +380,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -462,6 +479,7 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -515,7 +533,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
index 4e1303a4..fa950439 100644
--- a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Latitude E5530"
CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e5530"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
CONFIG_VGA_BIOS_ID="8086,0166"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
@@ -121,31 +121,42 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e5530"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-CONFIG_BOARD_DELL_LATITUDE_E5530=y
-# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+CONFIG_BOARD_DELL_LATITUDE_E5530=y
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -162,6 +173,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd_nogbe"
CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -171,14 +183,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -220,9 +235,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -232,7 +248,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -263,6 +278,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -347,7 +363,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -362,6 +378,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -459,6 +476,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -512,7 +530,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg
index 03fd230b..2556a4ce 100644
--- a/config/coreboot/e5530_12mb/target.cfg
+++ b/config/coreboot/e5530_12mb/target.cfg
@@ -1,9 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..25c27fdb
--- /dev/null
+++ b/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb
@@ -0,0 +1,640 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6220"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
+CONFIG_VGA_BIOS_ID="8086,0126"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x9E8000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e6220"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6220=y
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6220"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=10240
+CONFIG_ROM_SIZE=0x00a00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6220_10mb/config/libgfxinit_txtmode b/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..3a79e7e3
--- /dev/null
+++ b/config/coreboot/e6220_10mb/config/libgfxinit_txtmode
@@ -0,0 +1,637 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6220"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
+CONFIG_VGA_BIOS_ID="8086,0126"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x9E8000
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e6220"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6220=y
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6220"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=10240
+CONFIG_ROM_SIZE=0x00a00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg b/config/coreboot/e6220_10mb/target.cfg
index d5d37291..4201beb1 100644
--- a/config/coreboot/kcma-d8-rdimm_2mb/target.cfg
+++ b/config/coreboot/e6220_10mb/target.cfg
@@ -1,7 +1,7 @@
-tree="fam15h_rdimm"
+tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-xlang="c"
+grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..7bc76f82
--- /dev/null
+++ b/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,640 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6230"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xBE5000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e6230"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6230=y
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6230"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6230_12mb/config/libgfxinit_txtmode b/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..2d578a57
--- /dev/null
+++ b/config/coreboot/e6230_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,637 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6230"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xBE5000
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e6230"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6230=y
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6230"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/ga-g41m-es2l/target.cfg b/config/coreboot/e6230_12mb/target.cfg
index ef85da4b..2556a4ce 100644
--- a/config/coreboot/ga-g41m-es2l/target.cfg
+++ b/config/coreboot/e6230_12mb/target.cfg
@@ -1,6 +1,7 @@
tree="default"
xarch="i386-elf"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-grub_scan_disk="ata"
-grub_timeout=10
+grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..e6867cd1
--- /dev/null
+++ b/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb
@@ -0,0 +1,640 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6320"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
+CONFIG_VGA_BIOS_ID="8086,0126"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x9E8000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e6320"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6320=y
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6320"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=10240
+CONFIG_ROM_SIZE=0x00a00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6320_10mb/config/libgfxinit_txtmode b/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..ca030f32
--- /dev/null
+++ b/config/coreboot/e6320_10mb/config/libgfxinit_txtmode
@@ -0,0 +1,637 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6320"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
+CONFIG_VGA_BIOS_ID="8086,0126"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0x9E8000
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e6320"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6320=y
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6320"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_10240=y
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=10240
+CONFIG_ROM_SIZE=0x00a00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg b/config/coreboot/e6320_10mb/target.cfg
index d5d37291..4201beb1 100644
--- a/config/coreboot/kcma-d8-rdimm_16mb/target.cfg
+++ b/config/coreboot/e6320_10mb/target.cfg
@@ -1,7 +1,7 @@
-tree="fam15h_rdimm"
+tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-xlang="c"
+grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
new file mode 100644
index 00000000..bd93e3bf
--- /dev/null
+++ b/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb
@@ -0,0 +1,640 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6330"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xBE5000
+CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
+CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e6330"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6330=y
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6330"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
+CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
+CONFIG_LINEAR_FRAMEBUFFER=y
+# CONFIG_BOOTSPLASH is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/e6330_12mb/config/libgfxinit_txtmode b/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
new file mode 100644
index 00000000..ee4686da
--- /dev/null
+++ b/config/coreboot/e6330_12mb/config/libgfxinit_txtmode
@@ -0,0 +1,637 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+CONFIG_ARCH_SUPPORTS_CLANG=y
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_IWYU is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE_LZMA=y
+# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+CONFIG_NO_STAGE_CACHE=y
+# CONFIG_TSEG_STAGE_CACHE is not set
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+
+#
+# Software Bill Of Materials (SBOM)
+#
+# CONFIG_SBOM is not set
+# end of Software Bill Of Materials (SBOM)
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
+CONFIG_VENDOR_DELL=y
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+# CONFIG_VENDOR_HP is not set
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="Latitude E6330"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
+CONFIG_VGA_BIOS_ID="8086,0166"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="Dell Inc."
+CONFIG_CBFS_SIZE=0xBE5000
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="e6330"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6330=y
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
+# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
+CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6330"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
+CONFIG_D3COLD_SUPPORT=y
+# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
+CONFIG_BOARD_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_12288=y
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=12288
+CONFIG_ROM_SIZE=0x00c00000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb"
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+# CONFIG_USE_X86_64_SUPPORT is not set
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
+CONFIG_STACK_SIZE=0x2000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_HPET_MIN_TICKS=0x80
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+CONFIG_CBFS_CACHE_ALIGN=8
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+# CONFIG_X2APIC_LATE_WORKAROUND is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
+CONFIG_AP_STACK_SIZE=0x800
+CONFIG_SMP=y
+CONFIG_SSE=y
+CONFIG_SSE2=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_USE_NATIVE_RAMINIT=y
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y
+CONFIG_SOUTHBRIDGE_INTEL_C216=y
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+
+#
+# Super I/O
+#
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_ACPI=y
+CONFIG_EC_DELL_MEC5035=y
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_X86_64_SUPPORT=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+CONFIG_DEBUG_HW_BREAKPOINTS=y
+CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
+CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
+CONFIG_MAINBOARD_USE_LIBGFXINIT=y
+# CONFIG_VGA_ROM_RUN is not set
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_NO_EARLY_GFX_INIT=y
+
+#
+# Display
+#
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
+# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x800
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_INTEL_GMA_HAVE_VBT=y
+CONFIG_INTEL_GMA_ADD_VBT=y
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
+CONFIG_USE_DDR3=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
+# CONFIG_DRIVERS_I2C_MAX98396 is not set
+CONFIG_INTEL_INT15=y
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
+CONFIG_GFX_GMA=y
+CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y
+CONFIG_GFX_GMA_DYN_CPU=y
+CONFIG_GFX_GMA_GENERATION="Ironlake"
+CONFIG_GFX_GMA_PCH="Cougar_Point"
+CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
+CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
+# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
+CONFIG_VGA=y
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_CONSOLE_I2C_SMBUS is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# Vendorcode Debug Settings
+#
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
+# end of Debugging
+
+CONFIG_RAMSTAGE_ADA=y
+CONFIG_RAMSTAGE_LIBHWBASE=y
+CONFIG_HWBASE_DYNAMIC_MMIO=y
+CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
+CONFIG_HWBASE_DIRECT_PCIDEV=y
+CONFIG_DECOMPRESS_OFAST=y
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/g43t-am3_16mb/target.cfg b/config/coreboot/e6330_12mb/target.cfg
index bbe8a9fb..2556a4ce 100644
--- a/config/coreboot/g43t-am3_16mb/target.cfg
+++ b/config/coreboot/e6330_12mb/target.cfg
@@ -1,6 +1,7 @@
tree="default"
xarch="i386-elf"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-grub_timeout=10
-release="n"
+grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
index fcdde6b2..84809847 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Latitude E6400"
CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6400"
+CONFIG_MAINBOARD_DIR="dell/gm45_latitude"
CONFIG_VGA_BIOS_ID="10de,06eb"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
@@ -123,19 +123,42 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6400"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
CONFIG_VGA_BIOS=y
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
CONFIG_BOARD_DELL_E6400=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,6 +174,7 @@ CONFIG_SPI_FLASH_WINBOND=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_VGA_BIOS_FILE="../../../pciroms/pci10de,06eb.rom"
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -165,12 +189,13 @@ CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_4096=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -211,9 +236,10 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
# CONFIG_VGA_BIOS_SECOND is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -222,7 +248,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -255,6 +280,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -325,7 +351,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -341,6 +367,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -442,6 +469,8 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -494,7 +523,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
index e253feb0..4b53f9a9 100644
--- a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Latitude E6400"
CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6400"
+CONFIG_MAINBOARD_DIR="dell/gm45_latitude"
CONFIG_VGA_BIOS_ID="10de,06eb"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
@@ -121,19 +121,42 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6400"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
CONFIG_VGA_BIOS=y
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
CONFIG_BOARD_DELL_E6400=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -149,6 +172,7 @@ CONFIG_SPI_FLASH_WINBOND=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_VGA_BIOS_FILE="../../../pciroms/pci10de,06eb.rom"
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -163,12 +187,13 @@ CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_4096=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -209,9 +234,10 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
# CONFIG_VGA_BIOS_SECOND is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -220,7 +246,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -253,6 +278,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -323,7 +349,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -339,6 +365,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -438,6 +465,8 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -490,7 +519,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg
index 3a458ee4..98eb8d3b 100644
--- a/config/coreboot/e6400_4mb/target.cfg
+++ b/config/coreboot/e6400_4mb/target.cfg
@@ -1,9 +1,7 @@
-tree="dell"
+tree="default"
xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
grub_scan_disk="ahci"
+vcfg="e6400"
diff --git a/config/coreboot/e6400nvidia_4mb/config/normal b/config/coreboot/e6400nvidia_4mb/config/normal
index 4593f32a..79c3790a 100644
--- a/config/coreboot/e6400nvidia_4mb/config/normal
+++ b/config/coreboot/e6400nvidia_4mb/config/normal
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Latitude E6400"
CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6400"
+CONFIG_MAINBOARD_DIR="dell/gm45_latitude"
CONFIG_VGA_BIOS_ID="10de,06eb"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
@@ -121,18 +121,41 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6400"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
CONFIG_VGA_BIOS=y
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
+CONFIG_USBDEBUG_HCD_INDEX=1
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
CONFIG_BOARD_DELL_E6400=y
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -148,6 +171,7 @@ CONFIG_SPI_FLASH_WINBOND=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_VGA_BIOS_FILE="../../../pciroms/pci10de,06eb.rom"
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
@@ -161,12 +185,13 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_4096=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -207,9 +232,10 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
# CONFIG_VGA_BIOS_SECOND is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -218,7 +244,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -251,6 +276,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -321,7 +347,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -337,6 +363,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -416,6 +443,8 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -468,7 +497,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg
index 3a458ee4..98eb8d3b 100644
--- a/config/coreboot/e6400nvidia_4mb/target.cfg
+++ b/config/coreboot/e6400nvidia_4mb/target.cfg
@@ -1,9 +1,7 @@
-tree="dell"
+tree="default"
xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
grub_scan_disk="ahci"
+vcfg="e6400"
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
index 5bdd1843..f558eefd 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Latitude E6420"
CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6420"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
CONFIG_VGA_BIOS_ID="8086,0126"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
@@ -123,31 +123,42 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6420"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
CONFIG_BOARD_DELL_LATITUDE_E6420=y
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -165,6 +176,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -174,14 +186,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_10240=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -223,9 +238,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -235,7 +251,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -266,6 +281,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -352,7 +368,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -367,6 +383,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -465,6 +482,7 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -518,7 +536,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
index b7aafbaa..2158736b 100644
--- a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Latitude E6420"
CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6420"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
CONFIG_VGA_BIOS_ID="8086,0126"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
@@ -121,31 +121,42 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6420"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
CONFIG_BOARD_DELL_LATITUDE_E6420=y
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -163,6 +174,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -172,14 +184,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_10240=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -221,9 +236,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -233,7 +249,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -264,6 +279,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -350,7 +366,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -365,6 +381,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -462,6 +479,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -515,7 +533,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg
index 03fd230b..4201beb1 100644
--- a/config/coreboot/e6420_10mb/target.cfg
+++ b/config/coreboot/e6420_10mb/target.cfg
@@ -1,9 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
index 7d1fd1ed..593d294c 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Latitude E6430"
CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6430"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
CONFIG_VGA_BIOS_ID="8086,0166"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
@@ -123,31 +123,42 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6430"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-CONFIG_BOARD_DELL_LATITUDE_E6430=y
# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6430=y
# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -165,6 +176,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -174,14 +186,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -223,9 +238,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -235,7 +251,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -266,6 +281,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -352,7 +368,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -367,6 +383,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -465,6 +482,7 @@ CONFIG_USE_PC_CMOS_ALTCENTURY=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -518,7 +536,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
index fe8d8105..e9211864 100644
--- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Latitude E6430"
CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6430"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
CONFIG_VGA_BIOS_ID="8086,0166"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
@@ -121,31 +121,42 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6430"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-CONFIG_BOARD_DELL_LATITUDE_E6430=y
# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+CONFIG_BOARD_DELL_LATITUDE_E6430=y
# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -163,6 +174,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -172,14 +184,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -221,9 +236,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -233,7 +249,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -264,6 +279,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -350,7 +366,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -365,6 +381,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -462,6 +479,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -515,7 +533,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg
index 03fd230b..2556a4ce 100644
--- a/config/coreboot/e6430_12mb/target.cfg
+++ b/config/coreboot/e6430_12mb/target.cfg
@@ -1,9 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
index 7b3385ff..381b7207 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Latitude E6520"
CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6520"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
CONFIG_VGA_BIOS_ID="8086,0116"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
@@ -123,31 +123,42 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6520"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
CONFIG_BOARD_DELL_LATITUDE_E6520=y
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -165,6 +176,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -174,14 +186,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_10240=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -223,9 +238,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -235,7 +251,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -266,6 +281,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -352,7 +368,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -367,6 +383,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -465,6 +482,7 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -518,7 +536,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
index c5195de0..92d54b1b 100644
--- a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Latitude E6520"
CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6520"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
CONFIG_VGA_BIOS_ID="8086,0116"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
@@ -121,31 +121,42 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6520"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
CONFIG_BOARD_DELL_LATITUDE_E6520=y
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -163,6 +174,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -172,14 +184,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_10240=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -221,9 +236,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -233,7 +249,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -264,6 +279,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -350,7 +366,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -365,6 +381,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -462,6 +479,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -515,7 +533,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg
index 03fd230b..4201beb1 100644
--- a/config/coreboot/e6520_10mb/target.cfg
+++ b/config/coreboot/e6520_10mb/target.cfg
@@ -1,9 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
index 3824cd7e..4345d838 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Latitude E6530"
CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6530"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
CONFIG_VGA_BIOS_ID="8086,0166"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
@@ -123,31 +123,42 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6530"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
CONFIG_BOARD_DELL_LATITUDE_E6530=y
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -165,6 +176,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -174,14 +186,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -223,9 +238,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -235,7 +251,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -266,6 +281,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -352,7 +368,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -367,6 +383,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -465,6 +482,7 @@ CONFIG_USE_PC_CMOS_ALTCENTURY=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -518,7 +536,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
index 7bcc0d08..d5a2b25b 100644
--- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -104,10 +105,9 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_PART_NUMBER="Latitude E6530"
CONFIG_MAINBOARD_VERSION="1.0"
-CONFIG_MAINBOARD_DIR="dell/e6530"
+CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude"
CONFIG_VGA_BIOS_ID="8086,0166"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=256
@@ -121,31 +121,42 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_VARIANT_DIR="e6530"
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_DRAM_RESET_GATE_GPIO=60
-CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
+CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
CONFIG_BOARD_DELL_LATITUDE_E6530=y
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
+CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -163,6 +174,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -172,14 +184,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -221,9 +236,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -233,7 +249,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -264,6 +279,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -350,7 +366,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -365,6 +381,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -462,6 +479,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -515,7 +533,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg
index 03fd230b..2556a4ce 100644
--- a/config/coreboot/e6530_12mb/target.cfg
+++ b/config/coreboot/e6530_12mb/target.cfg
@@ -1,9 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="n"
-payload_grub_withseabios="n"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/fam15h_rdimm/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch b/config/coreboot/fam15h/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch
index 5a39bd69..5a39bd69 100644
--- a/config/coreboot/fam15h_rdimm/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch
+++ b/config/coreboot/fam15h/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch
diff --git a/config/coreboot/fam15h_rdimm/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch b/config/coreboot/fam15h/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch
index 5ada0dff..5ada0dff 100644
--- a/config/coreboot/fam15h_rdimm/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch
+++ b/config/coreboot/fam15h/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch
diff --git a/config/coreboot/fam15h_rdimm/patches/0007-util-cbfstool-Makefile-support-distclean.patch b/config/coreboot/fam15h/patches/0007-util-cbfstool-Makefile-support-distclean.patch
index 87db312c..87db312c 100644
--- a/config/coreboot/fam15h_rdimm/patches/0007-util-cbfstool-Makefile-support-distclean.patch
+++ b/config/coreboot/fam15h/patches/0007-util-cbfstool-Makefile-support-distclean.patch
diff --git a/config/coreboot/fam15h_rdimm/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch b/config/coreboot/fam15h/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch
index 72681490..72681490 100644
--- a/config/coreboot/fam15h_rdimm/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch
+++ b/config/coreboot/fam15h/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch
diff --git a/config/coreboot/fam15h_rdimm/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch b/config/coreboot/fam15h/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch
index ecc06d00..ecc06d00 100644
--- a/config/coreboot/fam15h_rdimm/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch
+++ b/config/coreboot/fam15h/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch
diff --git a/config/coreboot/fam15h_rdimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch b/config/coreboot/fam15h/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
index 2f95297d..2f95297d 100644
--- a/config/coreboot/fam15h_rdimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
+++ b/config/coreboot/fam15h/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
diff --git a/config/coreboot/fam15h_rdimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch b/config/coreboot/fam15h/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch
index bee2d89a..bee2d89a 100644
--- a/config/coreboot/fam15h_rdimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch
+++ b/config/coreboot/fam15h/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch
diff --git a/config/coreboot/fam15h_rdimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch b/config/coreboot/fam15h/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch
index c767968b..c767968b 100644
--- a/config/coreboot/fam15h_rdimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch
+++ b/config/coreboot/fam15h/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch
diff --git a/config/coreboot/fam15h_rdimm/target.cfg b/config/coreboot/fam15h/target.cfg
index 7ca0c217..1056920a 100644
--- a/config/coreboot/fam15h_rdimm/target.cfg
+++ b/config/coreboot/fam15h/target.cfg
@@ -1,2 +1,2 @@
-tree="fam15h_rdimm"
+tree="fam15h"
rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"
diff --git a/config/coreboot/fam15h_udimm/patches/0001-Revert-Revert-nb-amd-mct_ddr3-Fix-RDIMM-training-fai.patch b/config/coreboot/fam15h_udimm/patches/0001-Revert-Revert-nb-amd-mct_ddr3-Fix-RDIMM-training-fai.patch
deleted file mode 100644
index 3c131a86..00000000
--- a/config/coreboot/fam15h_udimm/patches/0001-Revert-Revert-nb-amd-mct_ddr3-Fix-RDIMM-training-fai.patch
+++ /dev/null
@@ -1,31 +0,0 @@
-From 8f2988cba4fffef1bd4f65e123c76bf4b7a18672 Mon Sep 17 00:00:00 2001
-From: "D.d.P.F. Lombard" <lombard@lombards.xyz>
-Date: Sun, 7 Feb 2021 15:29:40 +0100
-Subject: [PATCH 1/6] Revert "Revert "nb/amd/mct_ddr3: Fix RDIMM training
- failure on Fam15h" (fixes a bug that prevent certain RAM modules from
- booting)
-
-This reverts commit 610d1c67b2298a9840681c2b4492b6d3fdf44a46.
-
-After 610d1c67b2298a9840681c2b4492b6d3fdf44a46 many RAM modules wouldn't work and you couldn't even see any output on the screen.
----
- src/northbridge/amd/amdmct/mct_ddr3/mctproc.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
-index ddaaaab8d5..3b07786b91 100644
---- a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
-+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
-@@ -71,6 +71,9 @@ u32 mct_SetDramConfigMisc2(struct DCTStatStruc *pDCTstat,
- misc2 |= ((cs_mux_67 & 0x1) << 27);
- misc2 &= ~(0x1 << 26); /* CsMux45 = cs_mux_45 */
- misc2 |= ((cs_mux_45 & 0x1) << 26);
-+
-+ if (pDCTstat->Status & (1 << SB_Registered))
-+ misc2 |= 1 << SubMemclkRegDly;
- } else if (pDCTstat->LogicalCPUID & (AMD_DR_Dx | AMD_DR_Cx)) {
- if (pDCTstat->Status & (1 << SB_Registered)) {
- misc2 |= 1 << SubMemclkRegDly;
---
-2.25.1
-
diff --git a/config/coreboot/fam15h_udimm/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch b/config/coreboot/fam15h_udimm/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch
deleted file mode 100644
index 5a39bd69..00000000
--- a/config/coreboot/fam15h_udimm/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 7a00638cea41ad939a59fc0e5996959435fbdb7f Mon Sep 17 00:00:00 2001
-From: "D.d.P.F. Lombard" <lombard@lombards.xyz>
-Date: Sun, 7 Feb 2021 16:40:05 +0100
-Subject: [PATCH 3/6] Tweak cmos defaults for KCMA-D8 (for a little speed
- boost)
-
-63xx CPUs have the option to use a reduced latency value inside the crossbar.
-Setting "experimental_memory_speed_boost=Enable" aparently only has an effect
-on 63xx CPUs and may, in certain cases, yield a slight memory bandwidth
-increase (according to Timothy Pearson), but maybe it also works for
-43xx CPUs.
-
-Setting "l3_cache_partitioning=Enable" will increase performance in certain
-situations. See:
-https://developer.arm.com/documentation/100453/0401/functional-description/l3-cache/l3-cache-partitioning?lang=en
----
- src/mainboard/asus/kcma-d8/cmos.default | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/src/mainboard/asus/kcma-d8/cmos.default b/src/mainboard/asus/kcma-d8/cmos.default
-index 306687157f..4e033d756f 100644
---- a/src/mainboard/asus/kcma-d8/cmos.default
-+++ b/src/mainboard/asus/kcma-d8/cmos.default
-@@ -21,9 +21,9 @@ sata_ahci_mode=Enable
- sata_alpm=Disable
- maximum_p_state_limit=0xf
- probe_filter=Auto
--l3_cache_partitioning=Disable
-+l3_cache_partitioning=Enable
- gart=Enable
- ehci_async_data_cache=Enable
--experimental_memory_speed_boost=Disable
-+experimental_memory_speed_boost=Enable
- power_on_after_fail=On
- boot_option=Fallback
---
-2.25.1
-
diff --git a/config/coreboot/fam15h_udimm/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch b/config/coreboot/fam15h_udimm/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch
deleted file mode 100644
index 5ada0dff..00000000
--- a/config/coreboot/fam15h_udimm/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-From f0aac7261e16adc8e61eca7a506ff2de5112be47 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Fri, 7 May 2021 19:43:32 +0100
-Subject: [PATCH 6/6] asus/kgpe-d16: enable lc_cache_partitioning and
- experimental_memory_speed_boost
-
-This really only benefits 63xx opterons which are less reliable in libreboot due
-to lack of CPU microcode updates, but we might aswell enable this anyway.
----
- src/mainboard/asus/kgpe-d16/cmos.default | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/src/mainboard/asus/kgpe-d16/cmos.default b/src/mainboard/asus/kgpe-d16/cmos.default
-index 7c496a50d7..8a25620e1d 100644
---- a/src/mainboard/asus/kgpe-d16/cmos.default
-+++ b/src/mainboard/asus/kgpe-d16/cmos.default
-@@ -21,10 +21,10 @@ sata_ahci_mode=Enable
- sata_alpm=Disable
- maximum_p_state_limit=0xf
- probe_filter=Auto
--l3_cache_partitioning=Disable
-+l3_cache_partitioning=Enable
- ieee1394_controller=Enable
- gart=Enable
- ehci_async_data_cache=Enable
--experimental_memory_speed_boost=Disable
-+experimental_memory_speed_boost=Enable
- power_on_after_fail=On
- boot_option=Fallback
---
-2.25.1
-
diff --git a/config/coreboot/fam15h_udimm/patches/0007-util-cbfstool-Makefile-support-distclean.patch b/config/coreboot/fam15h_udimm/patches/0007-util-cbfstool-Makefile-support-distclean.patch
deleted file mode 100644
index 87db312c..00000000
--- a/config/coreboot/fam15h_udimm/patches/0007-util-cbfstool-Makefile-support-distclean.patch
+++ /dev/null
@@ -1,41 +0,0 @@
-From d5dc3f23eb546cf328fdfe1e918afa028fb9cd8c Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 9 Jul 2023 04:13:52 +0100
-Subject: [PATCH 1/1] util/cbfstool Makefile: support distclean
-
-it just does make-clean
-
-this is so that this super-old coreboot revision
-interfaces well with lbmk, which runs distclean
-on cbfstool (which is supported, on modern cbfstool)
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/cbfstool/Makefile | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/util/cbfstool/Makefile b/util/cbfstool/Makefile
-index d5321f6959..b8424d7d87 100644
---- a/util/cbfstool/Makefile
-+++ b/util/cbfstool/Makefile
-@@ -26,7 +26,7 @@ ifittool: $(objutil)/cbfstool/ifittool
-
- cbfs-compression-tool: $(objutil)/cbfstool/cbfs-compression-tool
-
--.PHONY: clean cbfstool ifittool fmaptool rmodtool ifwitool cbfs-compression-tool
-+.PHONY: distclean clean cbfstool ifittool fmaptool rmodtool ifwitool cbfs-compression-tool
- clean:
- $(RM) fmd_parser.c fmd_parser.h fmd_scanner.c fmd_scanner.h
- $(RM) $(objutil)/cbfstool/cbfstool $(cbfsobj)
-@@ -55,6 +55,8 @@ install: all
- $(INSTALL) ifittool $(DESTDIR)$(BINDIR)
- $(INSTALL) cbfs-compression-tool $(DESTDIR)$(BINDIR)
-
-+distclean: clean
-+
- ifneq ($(V),1)
- .SILENT:
- endif
---
-2.40.1
-
diff --git a/config/coreboot/fam15h_udimm/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch b/config/coreboot/fam15h_udimm/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch
deleted file mode 100644
index 72681490..00000000
--- a/config/coreboot/fam15h_udimm/patches/0008-crossgcc-patch-binutils-2.32-for-newer-hostcc.patch
+++ /dev/null
@@ -1,37 +0,0 @@
-From 4b4b2bdc2cedb3e219c6f90809e5684441b1dafa Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 9 Jul 2023 04:54:19 +0100
-Subject: [PATCH 1/1] crossgcc: patch binutils 2.32 for newer hostcc
-
-tested on debian sid as of 9 July 2023
-
-implicit string declaration
-
-easy peasy
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/patches/binutils-2.32_stringfix.patch | 11 +++++++++++
- 1 file changed, 11 insertions(+)
- create mode 100644 util/crossgcc/patches/binutils-2.32_stringfix.patch
-
-diff --git a/util/crossgcc/patches/binutils-2.32_stringfix.patch b/util/crossgcc/patches/binutils-2.32_stringfix.patch
-new file mode 100644
-index 0000000000..de27a2752a
---- /dev/null
-+++ b/util/crossgcc/patches/binutils-2.32_stringfix.patch
-@@ -0,0 +1,11 @@
-+diff -u binutils-2.32/gold/errors.h binutils-2.32.patched/gold/errors.h
-+--- binutils-2.32/gold/errors.h
-++++ binutils-2.32.patched/gold/errors.h
-+@@ -24,6 +24,7 @@
-+ #define GOLD_ERRORS_H
-+
-+ #include <cstdarg>
-++#include <string>
-+
-+ #include "gold-threads.h"
-+
---
-2.40.1
-
diff --git a/config/coreboot/fam15h_udimm/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch b/config/coreboot/fam15h_udimm/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch
deleted file mode 100644
index ecc06d00..00000000
--- a/config/coreboot/fam15h_udimm/patches/0009-fix-crossgcc-acpica-build-on-newer-hostcc.patch
+++ /dev/null
@@ -1,108 +0,0 @@
-From 373dd351e374f391c9e2048e5f3e535267a04719 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 9 Jul 2023 19:37:39 +0100
-Subject: [PATCH 1/1] fix crossgcc/acpica build on newer hostcc
-
-Changes made to acpica/iasl:
-
-remove superfluous YYSTYPE declaration
-
-make LuxBuffer variables static, to avoid warnings
-treated as errors about multiple definitions
-
-AcpiGbl_DbOpt_NoRegionSupport - remove this definition
-in source/tools/acpiexec/aemain.c because it's already
-re-defined by acpiexec. otherwise the linker complains
-about multiple definitions
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- .../acpica-unix2-20190703_mitigategcc.patch | 76 +++++++++++++++++++
- 1 file changed, 76 insertions(+)
- create mode 100644 util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
-
-diff --git a/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch b/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
-new file mode 100644
-index 0000000000..8de47245bd
---- /dev/null
-+++ b/util/crossgcc/patches/acpica-unix2-20190703_mitigategcc.patch
-@@ -0,0 +1,76 @@
-+From 66b927d923183ff62c9a757fafdeca9d1ac3fa87 Mon Sep 17 00:00:00 2001
-+From: Leah Rowe <leah@libreboot.org>
-+Date: Sun, 9 Jul 2023 18:58:11 +0100
-+Subject: [PATCH 1/1] fix building on newer hostcc (debian sid tested)
-+
-+remove superfluous YYSTYPE declaration
-+
-+make LuxBuffer variables static, to avoid warnings
-+treated as errors about multiple definitions
-+
-+AcpiGbl_DbOpt_NoRegionSupport - remove this definition
-+in source/tools/acpiexec/aemain.c because it's already
-+re-defined by acpiexec. otherwise the linker complains
-+about multiple definitions
-+
-+Signed-off-by: Leah Rowe <leah@libreboot.org>
-+---
-+ source/compiler/aslcompiler.l | 1 -
-+ source/compiler/dtparser.l | 2 +-
-+ source/compiler/prparser.l | 2 +-
-+ source/tools/acpiexec/aemain.c | 1 -
-+ 4 files changed, 2 insertions(+), 4 deletions(-)
-+
-+diff --git a/source/compiler/aslcompiler.l b/source/compiler/aslcompiler.l
-+index 1949b32..a24f028 100644
-+--- a/source/compiler/aslcompiler.l
-++++ b/source/compiler/aslcompiler.l
-+@@ -48,7 +48,6 @@
-+
-+ #include <stdlib.h>
-+ #include <string.h>
-+-YYSTYPE AslCompilerlval;
-+
-+ /*
-+ * Generation: Use the following command line:
-+diff --git a/source/compiler/dtparser.l b/source/compiler/dtparser.l
-+index 6517e52..d35181c 100644
-+--- a/source/compiler/dtparser.l
-++++ b/source/compiler/dtparser.l
-+@@ -100,7 +100,7 @@ NewLine [\n]
-+ /*
-+ * Local support functions
-+ */
-+-YY_BUFFER_STATE LexBuffer;
-++static YY_BUFFER_STATE LexBuffer;
-+
-+ /******************************************************************************
-+ *
-+diff --git a/source/compiler/prparser.l b/source/compiler/prparser.l
-+index bcdef14..5a1b848 100644
-+--- a/source/compiler/prparser.l
-++++ b/source/compiler/prparser.l
-+@@ -116,7 +116,7 @@ Identifier [a-zA-Z][0-9a-zA-Z]*
-+ /*
-+ * Local support functions
-+ */
-+-YY_BUFFER_STATE LexBuffer;
-++static YY_BUFFER_STATE LexBuffer;
-+
-+
-+ /******************************************************************************
-+diff --git a/source/tools/acpiexec/aemain.c b/source/tools/acpiexec/aemain.c
-+index 58640dd..cd0add6 100644
-+--- a/source/tools/acpiexec/aemain.c
-++++ b/source/tools/acpiexec/aemain.c
-+@@ -84,7 +84,6 @@ BOOLEAN AcpiGbl_VerboseHandlers = FALSE;
-+ UINT8 AcpiGbl_RegionFillValue = 0;
-+ BOOLEAN AcpiGbl_IgnoreErrors = FALSE;
-+ BOOLEAN AcpiGbl_AbortLoopOnTimeout = FALSE;
-+-BOOLEAN AcpiGbl_DbOpt_NoRegionSupport = FALSE;
-+ UINT8 AcpiGbl_UseHwReducedFadt = FALSE;
-+ BOOLEAN AcpiGbl_DoInterfaceTests = FALSE;
-+ BOOLEAN AcpiGbl_LoadTestTables = FALSE;
-+--
-+2.40.1
-+
---
-2.40.1
-
diff --git a/config/coreboot/fam15h_udimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch b/config/coreboot/fam15h_udimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
deleted file mode 100644
index 2f95297d..00000000
--- a/config/coreboot/fam15h_udimm/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From ba94a3f27a26d181291b5908bdd627be375eb606 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 16 Jul 2023 00:44:22 +0100
-Subject: [PATCH 1/1] coreboot/fam15h: use new upstream for acpica
-
-the original upstream died
-
-i decided to host it myself, on libreboot rsync,
-for use by mirrors.
-
-this is also useful for GNU Boot, when downloading
-acpica on coreboot 4.11_branch, for fam15h boards
-
-this change is not necessary on other coreboot trees,
-which adhere to new coreboot policy (newer coreboot
-pulls acpica from github, which is fairly reliable)
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index b75b90a877..e3efa722f1 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -73,7 +73,7 @@ MPC_ARCHIVE="https://ftpmirror.gnu.org/mpc/mpc-${MPC_VERSION}.tar.gz"
- GCC_ARCHIVE="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
- BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
- GDB_ARCHIVE="https://ftpmirror.gnu.org/gdb/gdb-${GDB_VERSION}.tar.xz"
--IASL_ARCHIVE="https://acpica.org/sites/acpica/files/acpica-unix2-${IASL_VERSION}.tar.gz"
-+IASL_ARCHIVE="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
- PYTHON_ARCHIVE="https://www.python.org/ftp/python/${PYTHON_VERSION}/Python-${PYTHON_VERSION}.tar.xz"
- EXPAT_ARCHIVE="https://downloads.sourceforge.net/sourceforge/expat/expat-${EXPAT_VERSION}.tar.bz2"
- # CLANG toolchain archive locations
---
-2.40.1
-
diff --git a/config/coreboot/fam15h_udimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch b/config/coreboot/fam15h_udimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch
deleted file mode 100644
index bee2d89a..00000000
--- a/config/coreboot/fam15h_udimm/patches/0011-use-mirrorservire.org-for-gcc-downloads.patch
+++ /dev/null
@@ -1,47 +0,0 @@
-From 5358f0adc28bb1300162aa6bcfaa45aea69970d0 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 5 Nov 2023 23:08:43 +0000
-Subject: [PATCH 1/1] use mirrorservire.org for gcc downloads
-
-the gnu.org 302 redirect often fails
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 14 +++++++-------
- 1 file changed, 7 insertions(+), 7 deletions(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 4b838208bb..438fb5a59f 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -67,12 +67,12 @@ NASM_VERSION=2.14.02
- # These are sanitized by the jenkins toolchain test builder, so if
- # a completely new URL is added here, it probably needs to be added
- # to the jenkins build as well, or the builder won't download it.
--GMP_ARCHIVE="https://ftpmirror.gnu.org/gmp/gmp-${GMP_VERSION}.tar.xz"
--MPFR_ARCHIVE="https://ftpmirror.gnu.org/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
--MPC_ARCHIVE="https://ftpmirror.gnu.org/mpc/mpc-${MPC_VERSION}.tar.gz"
--GCC_ARCHIVE="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
--BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
--GDB_ARCHIVE="https://ftpmirror.gnu.org/gdb/gdb-${GDB_VERSION}.tar.xz"
-+GMP_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-${GMP_VERSION}.tar.xz"
-+MPFR_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
-+MPC_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-${MPC_VERSION}.tar.gz"
-+GCC_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
-+BINUTILS_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
-+GDB_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gdb/gdb-${GDB_VERSION}.tar.xz"
- IASL_ARCHIVE="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-${IASL_VERSION}.tar.gz"
- PYTHON_ARCHIVE="https://www.python.org/ftp/python/${PYTHON_VERSION}/Python-${PYTHON_VERSION}.tar.xz"
- EXPAT_ARCHIVE="https://downloads.sourceforge.net/sourceforge/expat/expat-${EXPAT_VERSION}.tar.bz2"
-@@ -81,7 +81,7 @@ LLVM_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/llvm-${CLANG_VERSION}.s
- CFE_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/cfe-${CLANG_VERSION}.src.tar.xz"
- CRT_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/compiler-rt-${CLANG_VERSION}.src.tar.xz"
- CTE_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/clang-tools-extra-${CLANG_VERSION}.src.tar.xz"
--MAKE_ARCHIVE="https://ftpmirror.gnu.org/make/make-${MAKE_VERSION}.tar.bz2"
-+MAKE_ARCHIVE="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/make/make-${MAKE_VERSION}.tar.bz2"
- CMAKE_ARCHIVE="https://cmake.org/files/v3.15/cmake-${CMAKE_VERSION}.tar.gz"
- NASM_ARCHIVE="https://www.nasm.us/pub/nasm/releasebuilds/${NASM_VERSION}/nasm-${NASM_VERSION}.tar.bz2"
-
---
-2.39.2
-
diff --git a/config/coreboot/fam15h_udimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch b/config/coreboot/fam15h_udimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch
deleted file mode 100644
index c767968b..00000000
--- a/config/coreboot/fam15h_udimm/patches/0012-buildgcc-don-t-treat-binutil-warnings-as-errors.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From 5ec265deac0da077c9b1e23fc52abe1b5f0696b5 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sat, 13 Jan 2024 14:57:46 +0000
-Subject: [PATCH 1/1] buildgcc: don't treat binutil warnings as errors
-
-binutils 2.32 has too many build warnings on modern toolchains,
-and newer gcc versions are much more pedantic about warnings,
-treating them as errors by default.
-
-instead of patching binutils like before, just let the warnings
-persist. the warnings are benign. a user on gnuboot irc had serious
-issues building binutils 2.32 specifically, on current gentoo as
-of 13 January 2024. this patch mitigates those warning messages.
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 505cd7484c..6f1953e68d 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -719,7 +719,7 @@ build_BINUTILS() {
- --disable-werror --disable-nls --enable-lto --enable-gold \
- --enable-interwork --enable-multilib \
- --enable-plugins --enable-multilibs \
-- CFLAGS="$HOSTCFLAGS" \
-+ CFLAGS="$HOSTCFLAGS -Wno-error -w" \
- CXXFLAGS="$HOSTCFLAGS" \
- || touch .failed
- # shellcheck disable=SC2086
---
-2.39.2
-
diff --git a/config/coreboot/fam15h_udimm/target.cfg b/config/coreboot/fam15h_udimm/target.cfg
deleted file mode 100644
index c3c76603..00000000
--- a/config/coreboot/fam15h_udimm/target.cfg
+++ /dev/null
@@ -1,4 +0,0 @@
-tree="fam15h_udimm"
-tree_depend="fam15h_rdimm"
-xtree="fam15h_rdimm"
-rev="1c13f8d85c7306213cd525308ee8973e5663a3f8"
diff --git a/config/coreboot/g43t-am3/config/libgfxinit_txtmode b/config/coreboot/g43t_am3/config/libgfxinit_txtmode
index 3ce6d330..cca1ebda 100644
--- a/config/coreboot/g43t-am3/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t_am3/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
CONFIG_VENDOR_ACER=y
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_VENDOR_ACER=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_ACER=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,15 +126,18 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Acer"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -148,6 +152,7 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -157,15 +162,18 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="G43T-AM3"
CONFIG_PCIEXP_HOTPLUG_BUSES=32
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-CONFIG_PCIEXP_CLK_PM=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -204,8 +212,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -214,7 +223,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -249,6 +257,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -297,6 +306,8 @@ CONFIG_RCBA_LENGTH=0x4000
# Super I/O
#
CONFIG_SUPERIO_ITE_COMMON_PRE_RAM=y
+CONFIG_SUPERIO_ITE_COMMON_GPIO_PRE_RAM=y
+CONFIG_SUPERIO_ITE_COMMON_NUM_GPIO_SETS=8
CONFIG_SUPERIO_ITE_ENV_CTRL=y
CONFIG_SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG=y
CONFIG_SUPERIO_ITE_ENV_CTRL_PWM_FREQ2=y
@@ -317,7 +328,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
@@ -334,6 +345,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -431,6 +443,8 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -482,7 +496,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/g43t_am3/target.cfg b/config/coreboot/g43t_am3/target.cfg
new file mode 100644
index 00000000..7f3d7886
--- /dev/null
+++ b/config/coreboot/g43t_am3/target.cfg
@@ -0,0 +1,6 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_memtest="y"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode b/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
index 60a4aa7b..563a47c7 100644
--- a/config/coreboot/g43t-am3_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
CONFIG_VENDOR_ACER=y
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_VENDOR_ACER=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_ACER=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,15 +126,18 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+CONFIG_PCIEXP_CLK_PM=y
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Acer"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -148,6 +152,7 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -157,15 +162,18 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="G43T-AM3"
CONFIG_PCIEXP_HOTPLUG_BUSES=32
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-CONFIG_PCIEXP_CLK_PM=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -204,8 +212,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -214,7 +223,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -249,6 +257,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -297,6 +306,8 @@ CONFIG_RCBA_LENGTH=0x4000
# Super I/O
#
CONFIG_SUPERIO_ITE_COMMON_PRE_RAM=y
+CONFIG_SUPERIO_ITE_COMMON_GPIO_PRE_RAM=y
+CONFIG_SUPERIO_ITE_COMMON_NUM_GPIO_SETS=8
CONFIG_SUPERIO_ITE_ENV_CTRL=y
CONFIG_SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG=y
CONFIG_SUPERIO_ITE_ENV_CTRL_PWM_FREQ2=y
@@ -317,7 +328,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
@@ -334,6 +345,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -431,6 +443,8 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -482,7 +496,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/g43t_am3_16mb/target.cfg b/config/coreboot/g43t_am3_16mb/target.cfg
new file mode 100644
index 00000000..594b6612
--- /dev/null
+++ b/config/coreboot/g43t_am3_16mb/target.cfg
@@ -0,0 +1,7 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_memtest="y"
+release="n"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode b/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode
index 5f0fb156..ade6b308 100644
--- a/config/coreboot/ga-g41m-es2l/config/libgfxinit_txtmode
+++ b/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
CONFIG_VENDOR_GIGABYTE=y
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_GIGABYTE=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -123,15 +124,18 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="GIGABYTE"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,7 +159,9 @@ CONFIG_BOARD_GIGABYTE_GA_G41M_ES2L=y
# CONFIG_BOARD_GIGABYTE_GA_H61M_DS2 is not set
# CONFIG_BOARD_GIGABYTE_GA_H61M_DS2V is not set
# CONFIG_BOARD_GIGABYTE_GA_H61MA_D3V is not set
+# CONFIG_BOARD_GIGABYTE_GA_H61M_S2P_R3 is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -164,15 +170,18 @@ CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="GA-G41M-ES2L"
CONFIG_PCIEXP_HOTPLUG_BUSES=32
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_1024=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -211,8 +220,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -221,7 +231,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -259,6 +268,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -308,6 +318,8 @@ CONFIG_RCBA_LENGTH=0x4000
# Super I/O
#
CONFIG_SUPERIO_ITE_COMMON_PRE_RAM=y
+CONFIG_SUPERIO_ITE_COMMON_GPIO_PRE_RAM=y
+CONFIG_SUPERIO_ITE_COMMON_NUM_GPIO_SETS=6
CONFIG_SUPERIO_ITE_ENV_CTRL=y
CONFIG_SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG=y
CONFIG_SUPERIO_ITE_ENV_CTRL_PWM_FREQ2=y
@@ -323,7 +335,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
@@ -340,6 +352,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -437,6 +450,8 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -489,7 +504,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/ga_g41m_es2l/target.cfg b/config/coreboot/ga_g41m_es2l/target.cfg
new file mode 100644
index 00000000..7f3d7886
--- /dev/null
+++ b/config/coreboot/ga_g41m_es2l/target.cfg
@@ -0,0 +1,6 @@
+tree="default"
+xarch="i386-elf"
+payload_seabios="y"
+payload_memtest="y"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/gru_bob/config/libgfxinit_corebootfb b/config/coreboot/gru_bob/config/libgfxinit_corebootfb
index 3425806c..24935ea3 100644
--- a/config/coreboot/gru_bob/config/libgfxinit_corebootfb
+++ b/config/coreboot/gru_bob/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -32,7 +31,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_CBMEM_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -50,8 +48,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -62,11 +60,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
CONFIG_VENDOR_GOOGLE=y
@@ -88,6 +88,7 @@ CONFIG_VENDOR_GOOGLE=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -116,13 +117,13 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
# CONFIG_CHROMEOS is not set
CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=1
CONFIG_CONSOLE_SERIAL_UART_ADDRESS=0xFF1A0000
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_MEMLAYOUT_LD_FILE="src/soc/rockchip/rk3399/memlayout.ld"
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_ARM64_CURRENT_EL=3
CONFIG_SPI_FLASH_WINBOND=y
#
@@ -155,6 +156,9 @@ CONFIG_SPI_FLASH_WINBOND=y
# Brox
#
# CONFIG_BOARD_GOOGLE_BROX is not set
+# CONFIG_BOARD_GOOGLE_BROX_EC_ISH is not set
+# CONFIG_BOARD_GOOGLE_LOTSO is not set
+# CONFIG_BOARD_GOOGLE_GREENBAYUPOC is not set
#
# Brya
@@ -162,6 +166,7 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_BOARD_GOOGLE_AGAH is not set
# CONFIG_BOARD_GOOGLE_ANAHERA is not set
# CONFIG_BOARD_GOOGLE_ANAHERA4ES is not set
+# CONFIG_BOARD_GOOGLE_ANRAGGAR is not set
# CONFIG_BOARD_GOOGLE_AURASH is not set
# CONFIG_BOARD_GOOGLE_BANSHEE is not set
# CONFIG_BOARD_GOOGLE_BRASK is not set
@@ -170,11 +175,14 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_BOARD_GOOGLE_CRAASKOV is not set
# CONFIG_BOARD_GOOGLE_CONSTITUTION is not set
# CONFIG_BOARD_GOOGLE_CROTA is not set
+# CONFIG_BOARD_GOOGLE_DOCHI is not set
+# CONFIG_BOARD_GOOGLE_DOMIKA is not set
# CONFIG_BOARD_GOOGLE_FELWINTER is not set
# CONFIG_BOARD_GOOGLE_GAELIN is not set
# CONFIG_BOARD_GOOGLE_GIMBLE is not set
# CONFIG_BOARD_GOOGLE_GIMBLE4ES is not set
# CONFIG_BOARD_GOOGLE_GLADIOS is not set
+# CONFIG_BOARD_GOOGLE_GLASSWAY is not set
# CONFIG_BOARD_GOOGLE_GOTHRAX is not set
# CONFIG_BOARD_GOOGLE_HADES is not set
# CONFIG_BOARD_GOOGLE_KANO is not set
@@ -187,6 +195,7 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_BOARD_GOOGLE_MOLI is not set
# CONFIG_BOARD_GOOGLE_NIVVIKS is not set
# CONFIG_BOARD_GOOGLE_NEREID is not set
+# CONFIG_BOARD_GOOGLE_NOKRIS is not set
# CONFIG_BOARD_GOOGLE_OMNIGUL is not set
# CONFIG_BOARD_GOOGLE_OSIRIS is not set
# CONFIG_BOARD_GOOGLE_PIRRHA is not set
@@ -195,11 +204,15 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_BOARD_GOOGLE_QUANDISO is not set
# CONFIG_BOARD_GOOGLE_REDRIX is not set
# CONFIG_BOARD_GOOGLE_REDRIX4ES is not set
+# CONFIG_BOARD_GOOGLE_RIVEN is not set
# CONFIG_BOARD_GOOGLE_SKOLAS is not set
# CONFIG_BOARD_GOOGLE_SKOLAS4ES is not set
# CONFIG_BOARD_GOOGLE_TAEKO is not set
# CONFIG_BOARD_GOOGLE_TAEKO4ES is not set
# CONFIG_BOARD_GOOGLE_TANIKS is not set
+# CONFIG_BOARD_GOOGLE_TEREID is not set
+# CONFIG_BOARD_GOOGLE_TIVVIKS is not set
+# CONFIG_BOARD_GOOGLE_TRULO is not set
# CONFIG_BOARD_GOOGLE_ULDREN is not set
# CONFIG_BOARD_GOOGLE_VELL is not set
# CONFIG_BOARD_GOOGLE_VOLMAR is not set
@@ -207,10 +220,13 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_BOARD_GOOGLE_YAVIKS is not set
# CONFIG_BOARD_GOOGLE_YAVILLA is not set
# CONFIG_BOARD_GOOGLE_ZYDRON is not set
-# CONFIG_BOARD_GOOGLE_NOKRIS is not set
-# CONFIG_BOARD_GOOGLE_DOCHI is not set
-# CONFIG_BOARD_GOOGLE_ANRAGGAR is not set
# CONFIG_BOARD_GOOGLE_XOL is not set
+# CONFIG_BOARD_GOOGLE_NOVA is not set
+# CONFIG_BOARD_GOOGLE_BUJIA is not set
+# CONFIG_BOARD_GOOGLE_YAVISTA is not set
+# CONFIG_BOARD_GOOGLE_SUNDANCE is not set
+# CONFIG_BOARD_GOOGLE_PUJJOGA is not set
+# CONFIG_BOARD_GOOGLE_ORISA is not set
#
# Butterfly
@@ -228,22 +244,27 @@ CONFIG_SPI_FLASH_WINBOND=y
# Kingler
#
# CONFIG_BOARD_GOOGLE_KINGLER is not set
+# CONFIG_BOARD_GOOGLE_KYOGRE is not set
+# CONFIG_BOARD_GOOGLE_PONYTA is not set
+# CONFIG_BOARD_GOOGLE_SQUIRTLE is not set
# CONFIG_BOARD_GOOGLE_STEELIX is not set
# CONFIG_BOARD_GOOGLE_VOLTORB is not set
-# CONFIG_BOARD_GOOGLE_PONYTA is not set
#
# Krabby
#
+# CONFIG_BOARD_GOOGLE_CHINCHOU is not set
# CONFIG_BOARD_GOOGLE_KRABBY is not set
-# CONFIG_BOARD_GOOGLE_TENTACRUEL is not set
# CONFIG_BOARD_GOOGLE_MAGIKARP is not set
-# CONFIG_BOARD_GOOGLE_CHINCHOU is not set
+# CONFIG_BOARD_GOOGLE_SKITTY is not set
+# CONFIG_BOARD_GOOGLE_TENTACRUEL is not set
+# CONFIG_BOARD_GOOGLE_VELUZA is not set
#
# Staryu
#
# CONFIG_BOARD_GOOGLE_STARMIE is not set
+# CONFIG_BOARD_GOOGLE_WUGTRIO is not set
#
# Cyan
@@ -268,37 +289,38 @@ CONFIG_SPI_FLASH_WINBOND=y
#
# Dedede
#
+# CONFIG_BOARD_GOOGLE_BEADRIX is not set
+# CONFIG_BOARD_GOOGLE_BLIPPER is not set
# CONFIG_BOARD_GOOGLE_BOTEN is not set
-# CONFIG_BOARD_GOOGLE_DIBBI is not set
+# CONFIG_BOARD_GOOGLE_BOXY is not set
+# CONFIG_BOARD_GOOGLE_BUGZZY is not set
+# CONFIG_BOARD_GOOGLE_CAPPY2 is not set
+# CONFIG_BOARD_GOOGLE_CORORI is not set
+# CONFIG_BOARD_GOOGLE_CRET is not set
# CONFIG_BOARD_GOOGLE_DEDEDE is not set
+# CONFIG_BOARD_GOOGLE_DEXI is not set
+# CONFIG_BOARD_GOOGLE_DIBBI is not set
+# CONFIG_BOARD_GOOGLE_DITA is not set
# CONFIG_BOARD_GOOGLE_DRAWCIA is not set
+# CONFIG_BOARD_GOOGLE_DRIBLEE is not set
+# CONFIG_BOARD_GOOGLE_GALTIC is not set
+# CONFIG_BOARD_GOOGLE_GOOEY is not set
# CONFIG_BOARD_GOOGLE_HABOKI is not set
-# CONFIG_BOARD_GOOGLE_MADOO is not set
-# CONFIG_BOARD_GOOGLE_WADDLEDOO is not set
-# CONFIG_BOARD_GOOGLE_WADDLEDEE is not set
+# CONFIG_BOARD_GOOGLE_KRACKO is not set
# CONFIG_BOARD_GOOGLE_LALALA is not set
+# CONFIG_BOARD_GOOGLE_LANTIS is not set
+# CONFIG_BOARD_GOOGLE_MADOO is not set
# CONFIG_BOARD_GOOGLE_MAGOLOR is not set
# CONFIG_BOARD_GOOGLE_METAKNIGHT is not set
-# CONFIG_BOARD_GOOGLE_LANTIS is not set
-# CONFIG_BOARD_GOOGLE_GALTIC is not set
+# CONFIG_BOARD_GOOGLE_PIRIKA is not set
# CONFIG_BOARD_GOOGLE_SASUKE is not set
-# CONFIG_BOARD_GOOGLE_STORO is not set
# CONFIG_BOARD_GOOGLE_SASUKETTE is not set
-# CONFIG_BOARD_GOOGLE_KRACKO is not set
-# CONFIG_BOARD_GOOGLE_BLIPPER is not set
-# CONFIG_BOARD_GOOGLE_CRET is not set
-# CONFIG_BOARD_GOOGLE_PIRIKA is not set
-# CONFIG_BOARD_GOOGLE_CAPPY2 is not set
-# CONFIG_BOARD_GOOGLE_BUGZZY is not set
-# CONFIG_BOARD_GOOGLE_CORORI is not set
-# CONFIG_BOARD_GOOGLE_DRIBLEE is not set
-# CONFIG_BOARD_GOOGLE_GOOEY is not set
-# CONFIG_BOARD_GOOGLE_BEADRIX is not set
+# CONFIG_BOARD_GOOGLE_STORO is not set
# CONFIG_BOARD_GOOGLE_SHOTZO is not set
# CONFIG_BOARD_GOOGLE_TARANZA is not set
-# CONFIG_BOARD_GOOGLE_BOXY is not set
-# CONFIG_BOARD_GOOGLE_DEXI is not set
-# CONFIG_BOARD_GOOGLE_DITA is not set
+# CONFIG_BOARD_GOOGLE_WADDLEDEE is not set
+# CONFIG_BOARD_GOOGLE_WADDLEDOO is not set
+# CONFIG_BOARD_GOOGLE_AWASUKI is not set
#
# Drallion
@@ -311,6 +333,11 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_BOARD_GOOGLE_EVE is not set
#
+# Fatcat
+#
+# CONFIG_BOARD_GOOGLE_FATCAT is not set
+
+#
# Fizz
#
# CONFIG_BOARD_GOOGLE_FIZZ is not set
@@ -549,6 +576,11 @@ CONFIG_BOARD_GOOGLE_BOB=y
# CONFIG_BOARD_GOOGLE_WINKY is not set
#
+# Rauru
+#
+# CONFIG_BOARD_GOOGLE_RAURU is not set
+
+#
# Reef
#
# CONFIG_BOARD_GOOGLE_REEF is not set
@@ -560,18 +592,19 @@ CONFIG_BOARD_GOOGLE_BOB=y
#
# Rex
#
-# CONFIG_BOARD_GOOGLE_REX0 is not set
-# CONFIG_BOARD_GOOGLE_SCREEBO is not set
-# CONFIG_BOARD_GOOGLE_SCREEBO4ES is not set
+# CONFIG_BOARD_GOOGLE_DEKU is not set
+# CONFIG_BOARD_GOOGLE_DEKU4ES is not set
# CONFIG_BOARD_GOOGLE_KARIS is not set
# CONFIG_BOARD_GOOGLE_KARIS4ES is not set
-# CONFIG_BOARD_GOOGLE_REX_EC_ISH is not set
# CONFIG_BOARD_GOOGLE_OVIS is not set
# CONFIG_BOARD_GOOGLE_OVIS4ES is not set
-# CONFIG_BOARD_GOOGLE_DEKU is not set
-# CONFIG_BOARD_GOOGLE_DEKU4ES is not set
+# CONFIG_BOARD_GOOGLE_REX0 is not set
+# CONFIG_BOARD_GOOGLE_REX_EC_ISH is not set
# CONFIG_BOARD_GOOGLE_REX4ES is not set
# CONFIG_BOARD_GOOGLE_REX4ES_EC_ISH is not set
+# CONFIG_BOARD_GOOGLE_REX64 is not set
+# CONFIG_BOARD_GOOGLE_SCREEBO is not set
+# CONFIG_BOARD_GOOGLE_SCREEBO4ES is not set
#
# Sarien
@@ -686,6 +719,7 @@ CONFIG_BOARD_GOOGLE_BOB=y
CONFIG_DRIVER_TPM_SPI_BUS=0x0
CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS=0x5
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_DRIVER_TPM_I2C_BUS=0x0
CONFIG_DRIVER_TPM_I2C_ADDR=0x20
CONFIG_PMIC_BUS=-1
@@ -693,14 +727,19 @@ CONFIG_BOARD_GOOGLE_GRU_COMMON=y
CONFIG_GRU_HAS_TPM2=y
CONFIG_GRU_HAS_CENTERLOG_PWM=y
CONFIG_GRU_HAS_WLAN_RESET=y
-CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME=""
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US=0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_DRIVER_TPM_SPI_CHIP=0
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
@@ -769,9 +808,8 @@ CONFIG_EC_GOOGLE_CHROMEEC=y
CONFIG_EC_GOOGLE_CHROMEEC_SPI=y
CONFIG_EC_GOOGLE_CHROMEEC_SPI_CHIP=0x0
CONFIG_EC_GOOGLE_CHROMEEC_RTC=y
-CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_NONE=y
# CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL is not set
-# CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_BUILTIN is not set
+# CONFIG_EC_GOOGLE_CHROMEEC_AUTO_FAN_CTRL is not set
CONFIG_MAINBOARD_HAS_CHROMEOS=y
#
@@ -789,6 +827,7 @@ CONFIG_ARCH_VERSTAGE_ARMV8_64=y
CONFIG_ARCH_ROMSTAGE_ARMV8_64=y
CONFIG_ARCH_RAMSTAGE_ARMV8_64=y
CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE=y
+# CONFIG_ARM64_BL31_OPTEE_WITH_SMC is not set
# end of Chipset
#
@@ -861,7 +900,7 @@ CONFIG_CR50_RESET_CLEAR_EC_AP_IDLE_FLAG=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
+# CONFIG_TPM1 is not set
CONFIG_TPM2=y
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM2=y
@@ -890,7 +929,6 @@ CONFIG_ACPI_CUSTOM_MADT=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
@@ -933,6 +971,7 @@ CONFIG_HAVE_MONOTONIC_TIMER=y
#
# System tables
#
+# CONFIG_GENERATE_SMBIOS_TABLES is not set
# end of System tables
#
diff --git a/config/coreboot/gru_bob/target.cfg b/config/coreboot/gru_bob/target.cfg
index a7c36159..482ff306 100644
--- a/config/coreboot/gru_bob/target.cfg
+++ b/config/coreboot/gru_bob/target.cfg
@@ -1,3 +1,4 @@
tree="default"
xarch="aarch64-elf arm-eabi"
payload_uboot="y"
+build_depend="u-boot/gru_bob"
diff --git a/config/coreboot/gru_kevin/config/libgfxinit_corebootfb b/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
index 0b836026..be585271 100644
--- a/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
+++ b/config/coreboot/gru_kevin/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -32,7 +31,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_CBMEM_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -50,8 +48,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -62,11 +60,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
CONFIG_VENDOR_GOOGLE=y
@@ -88,6 +88,7 @@ CONFIG_VENDOR_GOOGLE=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -116,13 +117,13 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
# CONFIG_CHROMEOS is not set
CONFIG_OVERRIDE_DEVICETREE=""
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=1
CONFIG_CONSOLE_SERIAL_UART_ADDRESS=0xFF1A0000
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_MEMLAYOUT_LD_FILE="src/soc/rockchip/rk3399/memlayout.ld"
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_ARM64_CURRENT_EL=3
CONFIG_SPI_FLASH_WINBOND=y
#
@@ -155,6 +156,9 @@ CONFIG_SPI_FLASH_WINBOND=y
# Brox
#
# CONFIG_BOARD_GOOGLE_BROX is not set
+# CONFIG_BOARD_GOOGLE_BROX_EC_ISH is not set
+# CONFIG_BOARD_GOOGLE_LOTSO is not set
+# CONFIG_BOARD_GOOGLE_GREENBAYUPOC is not set
#
# Brya
@@ -162,6 +166,7 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_BOARD_GOOGLE_AGAH is not set
# CONFIG_BOARD_GOOGLE_ANAHERA is not set
# CONFIG_BOARD_GOOGLE_ANAHERA4ES is not set
+# CONFIG_BOARD_GOOGLE_ANRAGGAR is not set
# CONFIG_BOARD_GOOGLE_AURASH is not set
# CONFIG_BOARD_GOOGLE_BANSHEE is not set
# CONFIG_BOARD_GOOGLE_BRASK is not set
@@ -170,11 +175,14 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_BOARD_GOOGLE_CRAASKOV is not set
# CONFIG_BOARD_GOOGLE_CONSTITUTION is not set
# CONFIG_BOARD_GOOGLE_CROTA is not set
+# CONFIG_BOARD_GOOGLE_DOCHI is not set
+# CONFIG_BOARD_GOOGLE_DOMIKA is not set
# CONFIG_BOARD_GOOGLE_FELWINTER is not set
# CONFIG_BOARD_GOOGLE_GAELIN is not set
# CONFIG_BOARD_GOOGLE_GIMBLE is not set
# CONFIG_BOARD_GOOGLE_GIMBLE4ES is not set
# CONFIG_BOARD_GOOGLE_GLADIOS is not set
+# CONFIG_BOARD_GOOGLE_GLASSWAY is not set
# CONFIG_BOARD_GOOGLE_GOTHRAX is not set
# CONFIG_BOARD_GOOGLE_HADES is not set
# CONFIG_BOARD_GOOGLE_KANO is not set
@@ -187,6 +195,7 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_BOARD_GOOGLE_MOLI is not set
# CONFIG_BOARD_GOOGLE_NIVVIKS is not set
# CONFIG_BOARD_GOOGLE_NEREID is not set
+# CONFIG_BOARD_GOOGLE_NOKRIS is not set
# CONFIG_BOARD_GOOGLE_OMNIGUL is not set
# CONFIG_BOARD_GOOGLE_OSIRIS is not set
# CONFIG_BOARD_GOOGLE_PIRRHA is not set
@@ -195,11 +204,15 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_BOARD_GOOGLE_QUANDISO is not set
# CONFIG_BOARD_GOOGLE_REDRIX is not set
# CONFIG_BOARD_GOOGLE_REDRIX4ES is not set
+# CONFIG_BOARD_GOOGLE_RIVEN is not set
# CONFIG_BOARD_GOOGLE_SKOLAS is not set
# CONFIG_BOARD_GOOGLE_SKOLAS4ES is not set
# CONFIG_BOARD_GOOGLE_TAEKO is not set
# CONFIG_BOARD_GOOGLE_TAEKO4ES is not set
# CONFIG_BOARD_GOOGLE_TANIKS is not set
+# CONFIG_BOARD_GOOGLE_TEREID is not set
+# CONFIG_BOARD_GOOGLE_TIVVIKS is not set
+# CONFIG_BOARD_GOOGLE_TRULO is not set
# CONFIG_BOARD_GOOGLE_ULDREN is not set
# CONFIG_BOARD_GOOGLE_VELL is not set
# CONFIG_BOARD_GOOGLE_VOLMAR is not set
@@ -207,10 +220,13 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_BOARD_GOOGLE_YAVIKS is not set
# CONFIG_BOARD_GOOGLE_YAVILLA is not set
# CONFIG_BOARD_GOOGLE_ZYDRON is not set
-# CONFIG_BOARD_GOOGLE_NOKRIS is not set
-# CONFIG_BOARD_GOOGLE_DOCHI is not set
-# CONFIG_BOARD_GOOGLE_ANRAGGAR is not set
# CONFIG_BOARD_GOOGLE_XOL is not set
+# CONFIG_BOARD_GOOGLE_NOVA is not set
+# CONFIG_BOARD_GOOGLE_BUJIA is not set
+# CONFIG_BOARD_GOOGLE_YAVISTA is not set
+# CONFIG_BOARD_GOOGLE_SUNDANCE is not set
+# CONFIG_BOARD_GOOGLE_PUJJOGA is not set
+# CONFIG_BOARD_GOOGLE_ORISA is not set
#
# Butterfly
@@ -228,22 +244,27 @@ CONFIG_SPI_FLASH_WINBOND=y
# Kingler
#
# CONFIG_BOARD_GOOGLE_KINGLER is not set
+# CONFIG_BOARD_GOOGLE_KYOGRE is not set
+# CONFIG_BOARD_GOOGLE_PONYTA is not set
+# CONFIG_BOARD_GOOGLE_SQUIRTLE is not set
# CONFIG_BOARD_GOOGLE_STEELIX is not set
# CONFIG_BOARD_GOOGLE_VOLTORB is not set
-# CONFIG_BOARD_GOOGLE_PONYTA is not set
#
# Krabby
#
+# CONFIG_BOARD_GOOGLE_CHINCHOU is not set
# CONFIG_BOARD_GOOGLE_KRABBY is not set
-# CONFIG_BOARD_GOOGLE_TENTACRUEL is not set
# CONFIG_BOARD_GOOGLE_MAGIKARP is not set
-# CONFIG_BOARD_GOOGLE_CHINCHOU is not set
+# CONFIG_BOARD_GOOGLE_SKITTY is not set
+# CONFIG_BOARD_GOOGLE_TENTACRUEL is not set
+# CONFIG_BOARD_GOOGLE_VELUZA is not set
#
# Staryu
#
# CONFIG_BOARD_GOOGLE_STARMIE is not set
+# CONFIG_BOARD_GOOGLE_WUGTRIO is not set
#
# Cyan
@@ -268,37 +289,38 @@ CONFIG_SPI_FLASH_WINBOND=y
#
# Dedede
#
+# CONFIG_BOARD_GOOGLE_BEADRIX is not set
+# CONFIG_BOARD_GOOGLE_BLIPPER is not set
# CONFIG_BOARD_GOOGLE_BOTEN is not set
-# CONFIG_BOARD_GOOGLE_DIBBI is not set
+# CONFIG_BOARD_GOOGLE_BOXY is not set
+# CONFIG_BOARD_GOOGLE_BUGZZY is not set
+# CONFIG_BOARD_GOOGLE_CAPPY2 is not set
+# CONFIG_BOARD_GOOGLE_CORORI is not set
+# CONFIG_BOARD_GOOGLE_CRET is not set
# CONFIG_BOARD_GOOGLE_DEDEDE is not set
+# CONFIG_BOARD_GOOGLE_DEXI is not set
+# CONFIG_BOARD_GOOGLE_DIBBI is not set
+# CONFIG_BOARD_GOOGLE_DITA is not set
# CONFIG_BOARD_GOOGLE_DRAWCIA is not set
+# CONFIG_BOARD_GOOGLE_DRIBLEE is not set
+# CONFIG_BOARD_GOOGLE_GALTIC is not set
+# CONFIG_BOARD_GOOGLE_GOOEY is not set
# CONFIG_BOARD_GOOGLE_HABOKI is not set
-# CONFIG_BOARD_GOOGLE_MADOO is not set
-# CONFIG_BOARD_GOOGLE_WADDLEDOO is not set
-# CONFIG_BOARD_GOOGLE_WADDLEDEE is not set
+# CONFIG_BOARD_GOOGLE_KRACKO is not set
# CONFIG_BOARD_GOOGLE_LALALA is not set
+# CONFIG_BOARD_GOOGLE_LANTIS is not set
+# CONFIG_BOARD_GOOGLE_MADOO is not set
# CONFIG_BOARD_GOOGLE_MAGOLOR is not set
# CONFIG_BOARD_GOOGLE_METAKNIGHT is not set
-# CONFIG_BOARD_GOOGLE_LANTIS is not set
-# CONFIG_BOARD_GOOGLE_GALTIC is not set
+# CONFIG_BOARD_GOOGLE_PIRIKA is not set
# CONFIG_BOARD_GOOGLE_SASUKE is not set
-# CONFIG_BOARD_GOOGLE_STORO is not set
# CONFIG_BOARD_GOOGLE_SASUKETTE is not set
-# CONFIG_BOARD_GOOGLE_KRACKO is not set
-# CONFIG_BOARD_GOOGLE_BLIPPER is not set
-# CONFIG_BOARD_GOOGLE_CRET is not set
-# CONFIG_BOARD_GOOGLE_PIRIKA is not set
-# CONFIG_BOARD_GOOGLE_CAPPY2 is not set
-# CONFIG_BOARD_GOOGLE_BUGZZY is not set
-# CONFIG_BOARD_GOOGLE_CORORI is not set
-# CONFIG_BOARD_GOOGLE_DRIBLEE is not set
-# CONFIG_BOARD_GOOGLE_GOOEY is not set
-# CONFIG_BOARD_GOOGLE_BEADRIX is not set
+# CONFIG_BOARD_GOOGLE_STORO is not set
# CONFIG_BOARD_GOOGLE_SHOTZO is not set
# CONFIG_BOARD_GOOGLE_TARANZA is not set
-# CONFIG_BOARD_GOOGLE_BOXY is not set
-# CONFIG_BOARD_GOOGLE_DEXI is not set
-# CONFIG_BOARD_GOOGLE_DITA is not set
+# CONFIG_BOARD_GOOGLE_WADDLEDEE is not set
+# CONFIG_BOARD_GOOGLE_WADDLEDOO is not set
+# CONFIG_BOARD_GOOGLE_AWASUKI is not set
#
# Drallion
@@ -311,6 +333,11 @@ CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_BOARD_GOOGLE_EVE is not set
#
+# Fatcat
+#
+# CONFIG_BOARD_GOOGLE_FATCAT is not set
+
+#
# Fizz
#
# CONFIG_BOARD_GOOGLE_FIZZ is not set
@@ -549,6 +576,11 @@ CONFIG_BOARD_GOOGLE_KEVIN=y
# CONFIG_BOARD_GOOGLE_WINKY is not set
#
+# Rauru
+#
+# CONFIG_BOARD_GOOGLE_RAURU is not set
+
+#
# Reef
#
# CONFIG_BOARD_GOOGLE_REEF is not set
@@ -560,18 +592,19 @@ CONFIG_BOARD_GOOGLE_KEVIN=y
#
# Rex
#
-# CONFIG_BOARD_GOOGLE_REX0 is not set
-# CONFIG_BOARD_GOOGLE_SCREEBO is not set
-# CONFIG_BOARD_GOOGLE_SCREEBO4ES is not set
+# CONFIG_BOARD_GOOGLE_DEKU is not set
+# CONFIG_BOARD_GOOGLE_DEKU4ES is not set
# CONFIG_BOARD_GOOGLE_KARIS is not set
# CONFIG_BOARD_GOOGLE_KARIS4ES is not set
-# CONFIG_BOARD_GOOGLE_REX_EC_ISH is not set
# CONFIG_BOARD_GOOGLE_OVIS is not set
# CONFIG_BOARD_GOOGLE_OVIS4ES is not set
-# CONFIG_BOARD_GOOGLE_DEKU is not set
-# CONFIG_BOARD_GOOGLE_DEKU4ES is not set
+# CONFIG_BOARD_GOOGLE_REX0 is not set
+# CONFIG_BOARD_GOOGLE_REX_EC_ISH is not set
# CONFIG_BOARD_GOOGLE_REX4ES is not set
# CONFIG_BOARD_GOOGLE_REX4ES_EC_ISH is not set
+# CONFIG_BOARD_GOOGLE_REX64 is not set
+# CONFIG_BOARD_GOOGLE_SCREEBO is not set
+# CONFIG_BOARD_GOOGLE_SCREEBO4ES is not set
#
# Sarien
@@ -686,6 +719,7 @@ CONFIG_BOARD_GOOGLE_KEVIN=y
CONFIG_DRIVER_TPM_SPI_BUS=0x0
CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS=0x5
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_DRIVER_TPM_I2C_BUS=0x0
CONFIG_DRIVER_TPM_I2C_ADDR=0x20
CONFIG_PMIC_BUS=-1
@@ -693,14 +727,19 @@ CONFIG_BOARD_GOOGLE_GRU_COMMON=y
# CONFIG_GRU_HAS_TPM2 is not set
CONFIG_GRU_HAS_CENTERLOG_PWM=y
CONFIG_GRU_HAS_WLAN_RESET=y
-CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME=""
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US=0
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -768,9 +807,8 @@ CONFIG_EC_GOOGLE_CHROMEEC=y
CONFIG_EC_GOOGLE_CHROMEEC_SPI=y
CONFIG_EC_GOOGLE_CHROMEEC_SPI_CHIP=0x0
CONFIG_EC_GOOGLE_CHROMEEC_RTC=y
-CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_NONE=y
# CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL is not set
-# CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_BUILTIN is not set
+# CONFIG_EC_GOOGLE_CHROMEEC_AUTO_FAN_CTRL is not set
CONFIG_MAINBOARD_HAS_CHROMEOS=y
#
@@ -788,6 +826,7 @@ CONFIG_ARCH_VERSTAGE_ARMV8_64=y
CONFIG_ARCH_ROMSTAGE_ARMV8_64=y
CONFIG_ARCH_RAMSTAGE_ARMV8_64=y
CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE=y
+# CONFIG_ARM64_BL31_OPTEE_WITH_SMC is not set
# end of Chipset
#
@@ -857,8 +896,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -887,7 +926,6 @@ CONFIG_ACPI_CUSTOM_MADT=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
@@ -930,6 +968,7 @@ CONFIG_HAVE_MONOTONIC_TIMER=y
#
# System tables
#
+# CONFIG_GENERATE_SMBIOS_TABLES is not set
# end of System tables
#
diff --git a/config/coreboot/gru_kevin/target.cfg b/config/coreboot/gru_kevin/target.cfg
index a7c36159..993bf617 100644
--- a/config/coreboot/gru_kevin/target.cfg
+++ b/config/coreboot/gru_kevin/target.cfg
@@ -1,3 +1,4 @@
tree="default"
xarch="aarch64-elf arm-eabi"
payload_uboot="y"
+build_depend="u-boot/gru_kevin"
diff --git a/config/coreboot/haswell/patches/0019-use-mirrorservice.org-for-gcc-downloads.patch b/config/coreboot/haswell/patches/0019-use-mirrorservice.org-for-gcc-downloads.patch
deleted file mode 100644
index e197b3f3..00000000
--- a/config/coreboot/haswell/patches/0019-use-mirrorservice.org-for-gcc-downloads.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-From 081890bab8d454247b6f7e9cb209f46159c45c8b Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 5 Nov 2023 23:19:42 +0000
-Subject: [PATCH 19/20] use mirrorservice.org for gcc downloads
-
-the gnu.org 302 redirect often fails
-
-Signed-off-by: Leah Rowe <leah@libreboot.org>
----
- util/crossgcc/buildgcc | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 0a0462e2f6..6ae201239d 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -69,11 +69,11 @@ NASM_ARCHIVE="nasm-${NASM_VERSION}.tar.bz2"
- # to the jenkins build as well, or the builder won't download it.
-
- # GCC toolchain archive locations
--GMP_BASE_URL="https://ftpmirror.gnu.org/gmp"
--MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
--MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
--GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
--BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
-+GMP_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp"
-+MPFR_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr"
-+MPC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc"
-+GCC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}"
-+BINUTILS_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils"
- IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
- # CLANG toolchain archive locations
- LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
---
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0023-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch b/config/coreboot/haswell/patches/0023-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
deleted file mode 100644
index e2db6a17..00000000
--- a/config/coreboot/haswell/patches/0023-mb-dell-optiplex_9020-Implement-late-HWM-initializat.patch
+++ /dev/null
@@ -1,602 +0,0 @@
-From 05cc767d1398f91533e87db5ceaa0aabb7918425 Mon Sep 17 00:00:00 2001
-From: Mate Kukri <kukri.mate@gmail.com>
-Date: Thu, 18 Apr 2024 20:28:45 +0100
-Subject: [PATCH 1/1] mb/dell/optiplex_9020: Implement late HWM initialization
-
-There are 4 different chassis types specified by vendor firmware, each
-with a slightly different HWM configuration.
-
-The chassis type to use is determined at runtime by reading a set of
-4 PCH GPIOs: 70, 38, 17, and 1.
-
-Additionally vendor firmware also provides an option to run the fans at
-full speed. This is substituted with a coreboot nvram option in this
-implementation.
-
-This was tested to make fan control work on my OptiPlex 7020 SFF.
-
-NOTE: This is superficially similar to the OptiPlex 9010's SCH5545
-however the OptiPlex 9020's SCH5555 does not use externally
-programmed EC firmware.
-
-Change-Id: Ibdccd3fc7364e03e84ca606592928410624eed43
-Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
----
- src/mainboard/dell/optiplex_9020/Makefile.mk | 3 +-
- src/mainboard/dell/optiplex_9020/bootblock.c | 25 +-
- src/mainboard/dell/optiplex_9020/cmos.default | 1 +
- src/mainboard/dell/optiplex_9020/cmos.layout | 5 +-
- src/mainboard/dell/optiplex_9020/mainboard.c | 387 ++++++++++++++++++
- src/mainboard/dell/optiplex_9020/sch5555_ec.c | 54 +++
- src/mainboard/dell/optiplex_9020/sch5555_ec.h | 10 +
- 7 files changed, 463 insertions(+), 22 deletions(-)
- create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.c
- create mode 100644 src/mainboard/dell/optiplex_9020/sch5555_ec.h
-
-diff --git a/src/mainboard/dell/optiplex_9020/Makefile.mk b/src/mainboard/dell/optiplex_9020/Makefile.mk
-index 6ca2f2afaa..08e2e53577 100644
---- a/src/mainboard/dell/optiplex_9020/Makefile.mk
-+++ b/src/mainboard/dell/optiplex_9020/Makefile.mk
-@@ -2,4 +2,5 @@
-
- romstage-y += gpio.c
- ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
--bootblock-y += bootblock.c
-+ramstage-y += sch5555_ec.c
-+bootblock-y += bootblock.c sch5555_ec.c
-diff --git a/src/mainboard/dell/optiplex_9020/bootblock.c b/src/mainboard/dell/optiplex_9020/bootblock.c
-index 2837cf9cf1..e5e759273e 100644
---- a/src/mainboard/dell/optiplex_9020/bootblock.c
-+++ b/src/mainboard/dell/optiplex_9020/bootblock.c
-@@ -4,29 +4,14 @@
- #include <device/pnp_ops.h>
- #include <superio/smsc/sch555x/sch555x.h>
- #include <southbridge/intel/lynxpoint/pch.h>
--
--static void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val)
--{
-- // Clear EC-to-Host mailbox
-- uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
-- outb(tmp, SCH555x_EMI_IOBASE + 1);
--
-- // Send address and value to the EC
-- sch555x_emi_write16(0, (addr1 * 2) | 0x101);
-- sch555x_emi_write32(4, val | (addr2 << 16));
--
-- // Wait for acknowledgement message from EC
-- outb(1, SCH555x_EMI_IOBASE);
-- size_t timeout = 0;
-- do {} while (++timeout < 0xfff && (inb(SCH555x_EMI_IOBASE + 1) & 1) == 0);
--}
-+#include "sch5555_ec.h"
-
- struct ec_init_entry {
- uint16_t addr;
- uint8_t val;
- };
-
--static void ec_init(void)
-+static void bootblock_ec_init(void)
- {
- /*
- * Tables from CORE_PEI
-@@ -108,9 +93,9 @@ void mainboard_config_superio(void)
- outb(0x01, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_UNK1);
- outb(0x0f, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_LED);
-
-- // Magic EC init
-- ec_init();
-+ // Perform bootblock EC initialization
-+ bootblock_ec_init();
-
-- // Magic EC init is needed for UART1 initialization to work
-+ // Bootblock EC initialization is required for UART1 to work
- sch555x_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- }
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.default b/src/mainboard/dell/optiplex_9020/cmos.default
-index a0acd7b6bb..9e02534c16 100644
---- a/src/mainboard/dell/optiplex_9020/cmos.default
-+++ b/src/mainboard/dell/optiplex_9020/cmos.default
-@@ -4,3 +4,4 @@ debug_level=Debug
- nmi=Disable
- power_on_after_fail=Disable
- iommu=Disable
-+fan_full_speed=Disable
-diff --git a/src/mainboard/dell/optiplex_9020/cmos.layout b/src/mainboard/dell/optiplex_9020/cmos.layout
-index 72ff9c4bee..4a1496a878 100644
---- a/src/mainboard/dell/optiplex_9020/cmos.layout
-+++ b/src/mainboard/dell/optiplex_9020/cmos.layout
-@@ -22,7 +22,10 @@ entries
- 409 2 e 5 power_on_after_fail
-
- # turn iommu on or off
--412 1 e 6 iommu
-+411 1 e 6 iommu
-+
-+# coreboot config options: EC
-+412 1 e 1 fan_full_speed
-
- # coreboot config options: check sums
- 984 16 h 0 check_sum
-diff --git a/src/mainboard/dell/optiplex_9020/mainboard.c b/src/mainboard/dell/optiplex_9020/mainboard.c
-index c834fea5d3..0b7829c736 100644
---- a/src/mainboard/dell/optiplex_9020/mainboard.c
-+++ b/src/mainboard/dell/optiplex_9020/mainboard.c
-@@ -1,7 +1,12 @@
- /* SPDX-License-Identifier: GPL-2.0-only */
-
-+#include <bootstate.h>
-+#include <cpu/x86/msr.h>
- #include <device/device.h>
- #include <drivers/intel/gma/int15.h>
-+#include <option.h>
-+#include <southbridge/intel/common/gpio.h>
-+#include "sch5555_ec.h"
-
- static void mainboard_enable(struct device *dev)
- {
-@@ -13,3 +18,385 @@ static void mainboard_enable(struct device *dev)
- struct chip_operations mainboard_ops = {
- .enable_dev = mainboard_enable,
- };
-+
-+#define HWM_TAB_ADD_TEMP_TARGET 1
-+#define HWM_TAB_PKG_POWER_ANY 0xffff
-+#define CHASSIS_TYPE_UNKNOWN 0xff
-+
-+struct hwm_tab_entry {
-+ uint16_t addr;
-+ uint8_t val;
-+ uint8_t flags;
-+ uint16_t pkg_power;
-+};
-+
-+struct hwm_tab_entry HWM_TAB3[] = {
-+ { 0x005, 0x33, 0, 0xffff },
-+ { 0x018, 0x2f, 0, 0xffff },
-+ { 0x019, 0x2f, 0, 0xffff },
-+ { 0x01a, 0x2f, 0, 0xffff },
-+ { 0x080, 0x00, 0, 0xffff },
-+ { 0x081, 0x00, 0, 0xffff },
-+ { 0x083, 0xbb, 0, 0xffff },
-+ { 0x085, 0x8a, 0, 0x0010 },
-+ { 0x086, 0x4c, 0, 0x0010 },
-+ { 0x08a, 0x66, 0, 0x0010 },
-+ { 0x08b, 0x5b, 0, 0x0010 },
-+ { 0x090, 0x65, 0, 0xffff },
-+ { 0x091, 0x70, 0, 0xffff },
-+ { 0x092, 0x86, 0, 0xffff },
-+ { 0x096, 0xa4, 0, 0xffff },
-+ { 0x097, 0xa4, 0, 0xffff },
-+ { 0x098, 0xa4, 0, 0xffff },
-+ { 0x09b, 0xa4, 0, 0xffff },
-+ { 0x0a0, 0x0e, 0, 0xffff },
-+ { 0x0a1, 0x0e, 0, 0xffff },
-+ { 0x0ae, 0x7c, 0, 0xffff },
-+ { 0x0af, 0x86, 0, 0xffff },
-+ { 0x0b0, 0x9a, 0, 0xffff },
-+ { 0x0b3, 0x9a, 0, 0xffff },
-+ { 0x0b6, 0x08, 0, 0xffff },
-+ { 0x0b7, 0x08, 0, 0xffff },
-+ { 0x0ea, 0x64, 0, 0x0020 },
-+ { 0x0ea, 0x5c, 0, 0x0010 },
-+ { 0x0ef, 0xff, 0, 0xffff },
-+ { 0x0f8, 0x15, 0, 0xffff },
-+ { 0x0f9, 0x00, 0, 0xffff },
-+ { 0x0f0, 0x30, 0, 0xffff },
-+ { 0x0fd, 0x01, 0, 0xffff },
-+ { 0x1a1, 0x00, 0, 0xffff },
-+ { 0x1a2, 0x00, 0, 0xffff },
-+ { 0x1b1, 0x08, 0, 0xffff },
-+ { 0x1be, 0x99, 0, 0xffff },
-+ { 0x280, 0xa0, 0, 0x0010 },
-+ { 0x281, 0x0f, 0, 0x0010 },
-+ { 0x282, 0x03, 0, 0xffff },
-+ { 0x283, 0x0a, 0, 0xffff },
-+ { 0x284, 0x80, 0, 0xffff },
-+ { 0x285, 0x03, 0, 0xffff },
-+ { 0x288, 0x68, 0, 0x0010 },
-+ { 0x289, 0x10, 0, 0x0010 },
-+ { 0x28a, 0x03, 0, 0xffff },
-+ { 0x28b, 0x0a, 0, 0xffff },
-+ { 0x28c, 0x80, 0, 0xffff },
-+ { 0x28d, 0x03, 0, 0xffff },
-+};
-+
-+struct hwm_tab_entry HWM_TAB4[] = {
-+ { 0x005, 0x33, 0, 0xffff },
-+ { 0x018, 0x2f, 0, 0xffff },
-+ { 0x019, 0x2f, 0, 0xffff },
-+ { 0x01a, 0x2f, 0, 0xffff },
-+ { 0x080, 0x00, 0, 0xffff },
-+ { 0x081, 0x00, 0, 0xffff },
-+ { 0x083, 0xbb, 0, 0xffff },
-+ { 0x085, 0x99, 0, 0x0020 },
-+ { 0x085, 0xad, 0, 0x0010 },
-+ { 0x086, 0x1c, 0, 0xffff },
-+ { 0x08a, 0x39, 0, 0x0020 },
-+ { 0x08a, 0x41, 0, 0x0010 },
-+ { 0x08b, 0x76, 0, 0x0020 },
-+ { 0x08b, 0x8b, 0, 0x0010 },
-+ { 0x090, 0x5e, 0, 0xffff },
-+ { 0x091, 0x5e, 0, 0xffff },
-+ { 0x092, 0x86, 0, 0xffff },
-+ { 0x096, 0xa4, 0, 0xffff },
-+ { 0x097, 0xa4, 0, 0xffff },
-+ { 0x098, 0xa4, 0, 0xffff },
-+ { 0x09b, 0xa4, 0, 0xffff },
-+ { 0x0a0, 0x0a, 0, 0xffff },
-+ { 0x0a1, 0x0a, 0, 0xffff },
-+ { 0x0ae, 0x7c, 0, 0xffff },
-+ { 0x0af, 0x7c, 0, 0xffff },
-+ { 0x0b0, 0x9a, 0, 0xffff },
-+ { 0x0b3, 0x7c, 0, 0xffff },
-+ { 0x0b6, 0x08, 0, 0xffff },
-+ { 0x0b7, 0x08, 0, 0xffff },
-+ { 0x0ea, 0x64, 0, 0x0020 },
-+ { 0x0ea, 0x5c, 0, 0x0010 },
-+ { 0x0ef, 0xff, 0, 0xffff },
-+ { 0x0f8, 0x15, 0, 0xffff },
-+ { 0x0f9, 0x00, 0, 0xffff },
-+ { 0x0f0, 0x30, 0, 0xffff },
-+ { 0x0fd, 0x01, 0, 0xffff },
-+ { 0x1a1, 0x00, 0, 0xffff },
-+ { 0x1a2, 0x00, 0, 0xffff },
-+ { 0x1b1, 0x08, 0, 0xffff },
-+ { 0x1be, 0x90, 0, 0xffff },
-+ { 0x280, 0x94, 0, 0x0020 },
-+ { 0x281, 0x11, 0, 0x0020 },
-+ { 0x280, 0x94, 0, 0x0010 },
-+ { 0x281, 0x11, 0, 0x0010 },
-+ { 0x282, 0x03, 0, 0xffff },
-+ { 0x283, 0x0a, 0, 0xffff },
-+ { 0x284, 0x80, 0, 0xffff },
-+ { 0x285, 0x03, 0, 0xffff },
-+ { 0x288, 0x28, 0, 0x0020 },
-+ { 0x289, 0x0a, 0, 0x0020 },
-+ { 0x288, 0x28, 0, 0x0010 },
-+ { 0x289, 0x0a, 0, 0x0010 },
-+ { 0x28a, 0x03, 0, 0xffff },
-+ { 0x28b, 0x0a, 0, 0xffff },
-+ { 0x28c, 0x80, 0, 0xffff },
-+ { 0x28d, 0x03, 0, 0xffff },
-+};
-+
-+struct hwm_tab_entry HWM_TAB5[] = {
-+ { 0x005, 0x33, 0, 0xffff },
-+ { 0x018, 0x2f, 0, 0xffff },
-+ { 0x019, 0x2f, 0, 0xffff },
-+ { 0x01a, 0x2f, 0, 0xffff },
-+ { 0x080, 0x00, 0, 0xffff },
-+ { 0x081, 0x00, 0, 0xffff },
-+ { 0x083, 0xbb, 0, 0xffff },
-+ { 0x085, 0x66, 0, 0x0020 },
-+ { 0x085, 0x5d, 0, 0x0010 },
-+ { 0x086, 0x1c, 0, 0xffff },
-+ { 0x08a, 0x39, 0, 0x0020 },
-+ { 0x08a, 0x41, 0, 0x0010 },
-+ { 0x08b, 0x76, 0, 0x0020 },
-+ { 0x08b, 0x80, 0, 0x0010 },
-+ { 0x090, 0x5d, 0, 0x0020 },
-+ { 0x090, 0x5e, 0, 0x0010 },
-+ { 0x091, 0x5e, 0, 0xffff },
-+ { 0x092, 0x86, 0, 0xffff },
-+ { 0x096, 0xa4, 0, 0xffff },
-+ { 0x097, 0xa4, 0, 0xffff },
-+ { 0x098, 0xa3, 0, 0x0020 },
-+ { 0x098, 0xa4, 0, 0x0010 },
-+ { 0x09b, 0xa4, 0, 0xffff },
-+ { 0x0a0, 0x08, 0, 0xffff },
-+ { 0x0a1, 0x0a, 0, 0xffff },
-+ { 0x0ae, 0x7c, 0, 0xffff },
-+ { 0x0af, 0x7c, 0, 0xffff },
-+ { 0x0b0, 0x9a, 0, 0xffff },
-+ { 0x0b3, 0x7c, 0, 0xffff },
-+ { 0x0b6, 0x08, 0, 0xffff },
-+ { 0x0b7, 0x08, 0, 0xffff },
-+ { 0x0ea, 0x64, 0, 0x0020 },
-+ { 0x0ea, 0x5c, 0, 0x0010 },
-+ { 0x0ef, 0xff, 0, 0xffff },
-+ { 0x0f8, 0x15, 0, 0xffff },
-+ { 0x0f9, 0x00, 0, 0xffff },
-+ { 0x0f0, 0x30, 0, 0xffff },
-+ { 0x0fd, 0x01, 0, 0xffff },
-+ { 0x1a1, 0x00, 0, 0xffff },
-+ { 0x1a2, 0x00, 0, 0xffff },
-+ { 0x1b1, 0x08, 0, 0xffff },
-+ { 0x1be, 0x98, 0, 0x0020 },
-+ { 0x1be, 0x90, 0, 0x0010 },
-+ { 0x280, 0x94, 0, 0x0020 },
-+ { 0x281, 0x11, 0, 0x0020 },
-+ { 0x280, 0x94, 0, 0x0010 },
-+ { 0x281, 0x11, 0, 0x0010 },
-+ { 0x282, 0x03, 0, 0xffff },
-+ { 0x283, 0x0a, 0, 0xffff },
-+ { 0x284, 0x80, 0, 0xffff },
-+ { 0x285, 0x03, 0, 0xffff },
-+ { 0x288, 0x28, 0, 0x0020 },
-+ { 0x289, 0x0a, 0, 0x0020 },
-+ { 0x288, 0x28, 0, 0x0010 },
-+ { 0x289, 0x0a, 0, 0x0010 },
-+ { 0x28a, 0x03, 0, 0xffff },
-+ { 0x28b, 0x0a, 0, 0xffff },
-+ { 0x28c, 0x80, 0, 0xffff },
-+ { 0x28d, 0x03, 0, 0xffff },
-+};
-+
-+struct hwm_tab_entry HWM_TAB6[] = {
-+ { 0x005, 0x33, 0, 0xffff },
-+ { 0x018, 0x2f, 0, 0xffff },
-+ { 0x019, 0x2f, 0, 0xffff },
-+ { 0x01a, 0x2f, 0, 0xffff },
-+ { 0x080, 0x00, 0, 0xffff },
-+ { 0x081, 0x00, 0, 0xffff },
-+ { 0x083, 0xbb, 0, 0xffff },
-+ { 0x085, 0x98, 0, 0xffff },
-+ { 0x086, 0x3c, 0, 0xffff },
-+ { 0x08a, 0x39, 0, 0x0020 },
-+ { 0x08a, 0x3d, 0, 0x0010 },
-+ { 0x08b, 0x44, 0, 0x0020 },
-+ { 0x08b, 0x51, 0, 0x0010 },
-+ { 0x090, 0x61, 0, 0xffff },
-+ { 0x091, 0x6d, 0, 0xffff },
-+ { 0x092, 0x86, 0, 0xffff },
-+ { 0x096, 0xa4, 0, 0xffff },
-+ { 0x097, 0xa4, 0, 0xffff },
-+ { 0x098, 0x9f, 0, 0x0020 },
-+ { 0x098, 0xa4, 0, 0x0010 },
-+ { 0x09b, 0xa4, 0, 0xffff },
-+ { 0x0a0, 0x0e, 0, 0xffff },
-+ { 0x0a1, 0x0e, 0, 0xffff },
-+ { 0x0ae, 0x7c, 0, 0xffff },
-+ { 0x0af, 0x7c, 0, 0xffff },
-+ { 0x0b0, 0x9b, 0, 0x0020 },
-+ { 0x0b0, 0x98, 0, 0x0010 },
-+ { 0x0b3, 0x9a, 0, 0xffff },
-+ { 0x0b6, 0x08, 0, 0xffff },
-+ { 0x0b7, 0x08, 0, 0xffff },
-+ { 0x0ea, 0x64, 0, 0x0020 },
-+ { 0x0ea, 0x5c, 0, 0x0010 },
-+ { 0x0ef, 0xff, 0, 0xffff },
-+ { 0x0f8, 0x15, 0, 0xffff },
-+ { 0x0f9, 0x00, 0, 0xffff },
-+ { 0x0f0, 0x30, 0, 0xffff },
-+ { 0x0fd, 0x01, 0, 0xffff },
-+ { 0x1a1, 0x00, 0, 0xffff },
-+ { 0x1a2, 0x00, 0, 0xffff },
-+ { 0x1b1, 0x08, 0, 0xffff },
-+ { 0x1be, 0x9a, 0, 0x0020 },
-+ { 0x1be, 0x96, 0, 0x0010 },
-+ { 0x280, 0x94, 0, 0x0020 },
-+ { 0x281, 0x11, 0, 0x0020 },
-+ { 0x280, 0x94, 0, 0x0010 },
-+ { 0x281, 0x11, 0, 0x0010 },
-+ { 0x282, 0x03, 0, 0xffff },
-+ { 0x283, 0x0a, 0, 0xffff },
-+ { 0x284, 0x80, 0, 0xffff },
-+ { 0x285, 0x03, 0, 0xffff },
-+ { 0x288, 0x94, 0, 0x0020 },
-+ { 0x289, 0x11, 0, 0x0020 },
-+ { 0x288, 0x94, 0, 0x0010 },
-+ { 0x289, 0x11, 0, 0x0010 },
-+ { 0x28a, 0x03, 0, 0xffff },
-+ { 0x28b, 0x0a, 0, 0xffff },
-+ { 0x28c, 0x80, 0, 0xffff },
-+ { 0x28d, 0x03, 0, 0xffff },
-+};
-+
-+static uint8_t get_chassis_type(void)
-+{
-+ uint8_t gpio_chassis_type;
-+
-+ // Read chassis type from GPIO
-+ gpio_chassis_type = get_gpio(70) << 3 | get_gpio(38) << 2 |
-+ get_gpio(17) << 1 | get_gpio(1);
-+
-+ printk(BIOS_DEBUG, "GPIO chassis type = %#x\n", gpio_chassis_type);
-+
-+ // Turn it into internal chassis index
-+ switch (gpio_chassis_type) {
-+ case 0x08:
-+ case 0x0a:
-+ return 4;
-+ case 0x0b:
-+ return 3;
-+ case 0x0c:
-+ return 5;
-+ case 0x0d: // SFF
-+ case 0x0e:
-+ case 0x0f:
-+ return 6;
-+ default:
-+ return CHASSIS_TYPE_UNKNOWN;
-+ }
-+
-+}
-+
-+static uint8_t get_temp_target(void)
-+{
-+ uint8_t val = rdmsr(0x1a2).lo >> 8 & 0xff;
-+ if (!val)
-+ val = 20;
-+ return 0x95 - val;
-+}
-+
-+static uint16_t get_pkg_power(void)
-+{
-+ uint8_t rapl_power_unit = rdmsr(0x606).lo & 0xf;
-+ if (rapl_power_unit)
-+ rapl_power_unit = 2 << (rapl_power_unit - 1);
-+ uint16_t pkg_power_info = rdmsr(0x614).lo & 0x7fff;
-+ if (pkg_power_info / rapl_power_unit > 0x41)
-+ return 32;
-+ else
-+ return 16;
-+}
-+
-+static void apply_hwm_tab(struct hwm_tab_entry *arr, size_t size)
-+{
-+ uint8_t temp_target = get_temp_target();
-+ uint16_t pkg_power = get_pkg_power();
-+
-+ printk(BIOS_DEBUG, "Temp target = %#x\n", temp_target);
-+ printk(BIOS_DEBUG, "Package power = %#x\n", pkg_power);
-+
-+ for (size_t i = 0; i < size; ++i) {
-+ // Skip entry if it doesn't apply for this package power
-+ if (arr[i].pkg_power != pkg_power &&
-+ arr[i].pkg_power != HWM_TAB_PKG_POWER_ANY)
-+ continue;
-+
-+ uint8_t val = arr[i].val;
-+
-+ // Add temp target to value if requested (current tables never do)
-+ if (arr[i].flags & HWM_TAB_ADD_TEMP_TARGET)
-+ val += temp_target;
-+
-+ // Perform write
-+ ec_write(1, arr[i].addr, val);
-+
-+ }
-+}
-+
-+static void sch5555_ec_hwm_init(void *arg)
-+{
-+ uint8_t chassis_type, saved_2fc;
-+
-+ printk(BIOS_DEBUG, "OptiPlex 9020 late HWM init\n");
-+
-+ saved_2fc = ec_read(1, 0x2fc);
-+ ec_write(1, 0x2fc, 0xa0);
-+ ec_write(1, 0x2fd, 0x32);
-+
-+ chassis_type = get_chassis_type();
-+
-+ if (chassis_type != CHASSIS_TYPE_UNKNOWN) {
-+ printk(BIOS_DEBUG, "Chassis type = %#x\n", chassis_type);
-+ } else {
-+ printk(BIOS_DEBUG, "WARNING: Unknown chassis type\n");
-+ }
-+
-+ // Apply HWM table based on chassis type
-+ switch (chassis_type) {
-+ case 3:
-+ apply_hwm_tab(HWM_TAB3, ARRAY_SIZE(HWM_TAB3));
-+ break;
-+ case 4:
-+ apply_hwm_tab(HWM_TAB4, ARRAY_SIZE(HWM_TAB4));
-+ break;
-+ case 5:
-+ apply_hwm_tab(HWM_TAB5, ARRAY_SIZE(HWM_TAB5));
-+ break;
-+ case 6:
-+ apply_hwm_tab(HWM_TAB6, ARRAY_SIZE(HWM_TAB6));
-+ break;
-+ }
-+
-+ // NOTE: vendor firmware applies these when "max core address" > 2
-+ // i think this is always the case
-+ ec_write(1, 0x9e, 0x30);
-+ ec_write(1, 0xeb, ec_read(1, 0xea));
-+
-+ ec_write(1, 0x2fc, saved_2fc);
-+
-+ // Apply full speed fan config if requested or if the chassis type is unknown
-+ if (chassis_type == CHASSIS_TYPE_UNKNOWN || get_uint_option("fan_full_speed", 0)) {
-+ printk(BIOS_DEBUG, "Setting full fan speed\n");
-+ ec_write(1, 0x80, 0x60 | ec_read(1, 0x80));
-+ ec_write(1, 0x81, 0x60 | ec_read(1, 0x81));
-+ }
-+
-+ ec_read(1, 0xb8);
-+
-+ if ((chassis_type == 4 || chassis_type == 5) && ec_read(1, 0x26) == 0) {
-+ ec_write(1, 0xa0, ec_read(1, 0xa0) & 0xfb);
-+ ec_write(1, 0xa1, ec_read(1, 0xa1) & 0xfb);
-+ ec_write(1, 0xa2, ec_read(1, 0xa2) & 0xfb);
-+ ec_write(1, 0x8a, 0x99);
-+ ec_write(1, 0x8b, 0x47);
-+ ec_write(1, 0x8c, 0x91);
-+ }
-+}
-+
-+BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL);
-diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.c b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
-new file mode 100644
-index 0000000000..a1067ac063
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.c
-@@ -0,0 +1,54 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#include <arch/io.h>
-+#include <device/pnp_ops.h>
-+#include <superio/smsc/sch555x/sch555x.h>
-+#include "sch5555_ec.h"
-+
-+uint8_t ec_read(uint8_t addr1, uint16_t addr2)
-+{
-+ // clear ec-to-host mailbox
-+ uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
-+ outb(tmp, SCH555x_EMI_IOBASE + 1);
-+
-+ // send address
-+ outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
-+ outw((addr1 * 2) | 0x100, SCH555x_EMI_IOBASE + 4);
-+
-+ outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
-+ outl(addr2 << 16, SCH555x_EMI_IOBASE + 4);
-+
-+ // send message to ec
-+ outb(1, SCH555x_EMI_IOBASE);
-+
-+ // wait for ack
-+ for (size_t retry = 0; retry < 0xfff; ++retry)
-+ if (inb(SCH555x_EMI_IOBASE + 1) & 1)
-+ break;
-+
-+ // read result
-+ outw(4 | 0x8000, SCH555x_EMI_IOBASE + 2);
-+ return inb(SCH555x_EMI_IOBASE + 4);
-+}
-+
-+void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val)
-+{
-+ // clear ec-to-host mailbox
-+ uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1);
-+ outb(tmp, SCH555x_EMI_IOBASE + 1);
-+
-+ // send address and value
-+ outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2);
-+ outw((addr1 * 2) | 0x101, SCH555x_EMI_IOBASE + 4);
-+
-+ outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2);
-+ outl(val | (addr2 << 16), SCH555x_EMI_IOBASE + 4);
-+
-+ // send message to ec
-+ outb(1, SCH555x_EMI_IOBASE);
-+
-+ // wait for ack
-+ for (size_t retry = 0; retry < 0xfff; ++retry)
-+ if (inb(SCH555x_EMI_IOBASE + 1) & 1)
-+ break;
-+}
-diff --git a/src/mainboard/dell/optiplex_9020/sch5555_ec.h b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
-new file mode 100644
-index 0000000000..7e399e8e74
---- /dev/null
-+++ b/src/mainboard/dell/optiplex_9020/sch5555_ec.h
-@@ -0,0 +1,10 @@
-+/* SPDX-License-Identifier: GPL-2.0-only */
-+
-+#ifndef __SCH5555_EC_H__
-+#define __SCH5555_EC_H__
-+
-+uint8_t ec_read(uint8_t addr1, uint16_t addr2);
-+
-+void ec_write(uint8_t addr1, uint16_t addr2, uint8_t val);
-+
-+#endif
---
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0024-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch b/config/coreboot/haswell/patches/0024-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
deleted file mode 100644
index fb112f8c..00000000
--- a/config/coreboot/haswell/patches/0024-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From ae494dc1b1dde92ec42390b85ced0ffe816f5110 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sat, 6 Apr 2024 01:22:47 +0100
-Subject: [PATCH 4/4] nb/haswell: Fully disable iGPU when dGPU is used
-
-My earlier patch disabled decode *and* disabled the iGPU itself, but
-a subsequent revision disabled only VGA decode. Upon revisiting, I
-found that, actually, yes, you also need to disable the iGPU entirely.
-
-Tested on Dell 9020 SFF using broadwell MRC, with both iGPU and dGPU.
-With this patch, the iGPU is completely disabled when you install a
-graphics card, but the iGPU is available to use when no graphics card
-is present.
-
-For more context, see:
-
-Author: Leah Rowe <info@minifree.org>
-Date: Fri Feb 23 13:33:31 2024 +0000
-
- nb/haswell: Disable iGPU when dGPU is used
-
-And look at the Gerrit comments:
-
-https://review.coreboot.org/c/coreboot/+/80717/
-
-So, my original submission on change 80717 was actually correct.
-This patch fixes the issue. I tested on iGPU and dGPU, with both
-broadwell and haswell mrc.bin.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- src/northbridge/intel/haswell/gma.c | 3 +++
- 1 file changed, 3 insertions(+)
-
-diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
-index 9e9f9804f5..526a51aff0 100644
---- a/src/northbridge/intel/haswell/gma.c
-+++ b/src/northbridge/intel/haswell/gma.c
-@@ -464,6 +464,9 @@ static void gma_func0_disable(struct device *dev)
- {
- /* Disable VGA decode */
- pci_or_config16(pcidev_on_root(0, 0), GGC, 1 << 1);
-+
-+ /* Required or else the graphics card doesn't work */
-+ dev->enabled = 0;
- }
-
- static struct device_operations gma_func0_ops = {
---
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0025-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch b/config/coreboot/haswell/patches/0025-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
deleted file mode 100644
index 52147426..00000000
--- a/config/coreboot/haswell/patches/0025-mb-dell-optiplex_9020-Add-support-for-TPM1.2-device.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 355536155898e649fa50277136ccd2df53a52bb1 Mon Sep 17 00:00:00 2001
-From: Mate Kukri <kukri.mate@gmail.com>
-Date: Wed, 10 Apr 2024 20:31:35 +0100
-Subject: [PATCH 1/1] mb/dell/optiplex_9020: Add support for TPM1.2 device
-
-These machines come with a TPM1.2 device by default. It is somewhat
-obsolete these days, but there is no harm in enabling it.
-
-Change-Id: Iec05321862aed58695c256b00494e5953219786d
-Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
-Reviewed-on: https://review.coreboot.org/c/coreboot/+/81827
-Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
----
- src/mainboard/dell/optiplex_9020/Kconfig | 2 ++
- src/mainboard/dell/optiplex_9020/devicetree.cb | 3 +++
- 2 files changed, 5 insertions(+)
-
-diff --git a/src/mainboard/dell/optiplex_9020/Kconfig b/src/mainboard/dell/optiplex_9020/Kconfig
-index 2de4a9abd6..38c3281e70 100644
---- a/src/mainboard/dell/optiplex_9020/Kconfig
-+++ b/src/mainboard/dell/optiplex_9020/Kconfig
-@@ -12,7 +12,9 @@ config BOARD_SPECIFIC_OPTIONS
- select INTEL_GMA_HAVE_VBT
- select INTEL_INT15
- select MAINBOARD_HAS_LIBGFXINIT
-+ select MAINBOARD_HAS_TPM1
- select MAINBOARD_USES_IFD_GBE_REGION
-+ select MEMORY_MAPPED_TPM
- select NORTHBRIDGE_INTEL_HASWELL
- select SERIRQ_CONTINUOUS_MODE
- select SOUTHBRIDGE_INTEL_LYNXPOINT
-diff --git a/src/mainboard/dell/optiplex_9020/devicetree.cb b/src/mainboard/dell/optiplex_9020/devicetree.cb
-index dce5869478..841285bb9c 100644
---- a/src/mainboard/dell/optiplex_9020/devicetree.cb
-+++ b/src/mainboard/dell/optiplex_9020/devicetree.cb
-@@ -70,6 +70,9 @@ chip northbridge/intel/haswell
- device pnp 2e.b off end # Floppy Controller
- device pnp 2e.11 off end # Parallel Port
- end
-+ chip drivers/pc80/tpm
-+ device pnp 0c31.0 on end
-+ end
- end
- device pci 1f.2 on end # SATA controller 1
- device pci 1f.3 on end # SMBus
---
-2.39.2
-
diff --git a/config/coreboot/haswell/patches/0026-use-mirrorservice.org-for-iasl-downloads.patch b/config/coreboot/haswell/patches/0026-use-mirrorservice.org-for-iasl-downloads.patch
deleted file mode 100644
index f9981abd..00000000
--- a/config/coreboot/haswell/patches/0026-use-mirrorservice.org-for-iasl-downloads.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From ed30cca924fa576dd5b69ce4a348b5a1466a8db1 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sun, 28 Apr 2024 01:57:46 +0100
-Subject: [PATCH 1/1] use mirrorservice.org for iasl downloads
-
-github is unreliable. i mirror these files myself.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- util/crossgcc/buildgcc | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 6ae201239d..a8433a25e5 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -74,7 +74,7 @@ MPFR_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr"
- MPC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc"
- GCC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}"
- BINUTILS_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils"
--IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
-+IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
- # CLANG toolchain archive locations
- LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
- CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
---
-2.39.2
-
diff --git a/config/coreboot/haswell/target.cfg b/config/coreboot/haswell/target.cfg
deleted file mode 100644
index a38399e4..00000000
--- a/config/coreboot/haswell/target.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-tree="haswell"
-rev="b7341da19133991efd29880849bdaab29a6e243d"
-xarch="i386-elf"
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
index bb4340b1..d51bf0f8 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,18 +128,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="2170p"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=0
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=0
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -156,6 +159,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
CONFIG_BOARD_HP_2170P=y
@@ -187,15 +192,18 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -238,9 +246,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -250,7 +259,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -281,6 +289,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -345,6 +354,7 @@ CONFIG_SUPERIO_SMSC_LPC47N217=y
#
# Embedded Controllers
#
+CONFIG_EC_ACPI=y
CONFIG_EC_HP_KBC1126=y
#
@@ -378,7 +388,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -393,6 +403,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -496,6 +507,7 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -516,8 +528,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -556,7 +568,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
index c590be38..8983c8d1 100644
--- a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="2170p"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=0
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=0
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
CONFIG_BOARD_HP_2170P=y
@@ -185,15 +190,18 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -236,9 +244,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -248,7 +257,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -279,6 +287,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -343,6 +352,7 @@ CONFIG_SUPERIO_SMSC_LPC47N217=y
#
# Embedded Controllers
#
+CONFIG_EC_ACPI=y
CONFIG_EC_HP_KBC1126=y
#
@@ -376,7 +386,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -391,6 +401,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -493,6 +504,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -513,8 +525,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -553,7 +565,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg
index fee132f4..f7544548 100644
--- a/config/coreboot/hp2170p_16mb/target.cfg
+++ b/config/coreboot/hp2170p_16mb/target.cfg
@@ -1,8 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
-grub_timeout=10
+vcfg="hp2170p"
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
index 0bfb67e3..b238d1b0 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="2560p"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=1
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -185,14 +190,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -235,9 +243,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -247,7 +256,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -278,6 +286,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -341,6 +350,7 @@ CONFIG_RCBA_LENGTH=0x4000
#
# Embedded Controllers
#
+CONFIG_EC_ACPI=y
CONFIG_EC_HP_KBC1126=y
#
@@ -374,7 +384,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -389,6 +399,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -490,6 +501,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -510,8 +523,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -550,7 +563,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
index c4d9a3f9..8a65a765 100644
--- a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -123,18 +124,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="2560p"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=1
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -183,14 +188,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -233,9 +241,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -245,7 +254,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -276,6 +284,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -339,6 +348,7 @@ CONFIG_RCBA_LENGTH=0x4000
#
# Embedded Controllers
#
+CONFIG_EC_ACPI=y
CONFIG_EC_HP_KBC1126=y
#
@@ -372,7 +382,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -387,6 +397,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -487,6 +498,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -507,8 +520,8 @@ CONFIG_VGA=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -547,7 +560,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg
index fee132f4..a9dfe4e4 100644
--- a/config/coreboot/hp2560p_8mb/target.cfg
+++ b/config/coreboot/hp2560p_8mb/target.cfg
@@ -1,8 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
-grub_timeout=10
+vcfg="hp2560p"
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
index 83ad2690..7cb7ec72 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,17 +126,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="2570p"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -162,6 +166,7 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -184,14 +189,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -234,9 +242,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -246,7 +255,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -277,6 +285,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -340,6 +349,7 @@ CONFIG_RCBA_LENGTH=0x4000
#
# Embedded Controllers
#
+CONFIG_EC_ACPI=y
CONFIG_EC_HP_KBC1126=y
#
@@ -373,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -388,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -484,6 +495,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -504,8 +517,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -544,7 +557,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
index 3e14d81a..1ba19c1d 100644
--- a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -123,17 +124,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="2570p"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,6 +154,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -160,6 +164,7 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -182,14 +187,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -232,9 +240,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -244,7 +253,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -275,6 +283,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -338,6 +347,7 @@ CONFIG_RCBA_LENGTH=0x4000
#
# Embedded Controllers
#
+CONFIG_EC_ACPI=y
CONFIG_EC_HP_KBC1126=y
#
@@ -371,7 +381,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -386,6 +396,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -481,6 +492,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -501,8 +514,8 @@ CONFIG_VGA=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -541,7 +554,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg
index fee132f4..928527da 100644
--- a/config/coreboot/hp2570p_16mb/target.cfg
+++ b/config/coreboot/hp2570p_16mb/target.cfg
@@ -1,8 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
-grub_timeout=10
+vcfg="hp2570p"
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
index 340efb5e..fee1b405 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd_4mb"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -182,15 +187,18 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -231,9 +239,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -243,7 +252,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -274,6 +282,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -360,7 +369,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -375,6 +384,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -475,6 +485,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -495,8 +507,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -535,7 +547,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
index 4b0f5922..8ec24130 100644
--- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -123,18 +124,20 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd_4mb"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -180,15 +185,18 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -229,9 +237,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -241,7 +250,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -272,6 +280,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -358,7 +367,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -373,6 +382,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -472,6 +482,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -492,8 +504,8 @@ CONFIG_VGA=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -532,7 +544,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg
index 0badb4fb..54966da1 100644
--- a/config/coreboot/hp8200sff_4mb/target.cfg
+++ b/config/coreboot/hp8200sff_4mb/target.cfg
@@ -1,7 +1,9 @@
tree="default"
xarch="i386-elf"
payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
payload_memtest="y"
-grub_scan_disk="ahci"
-grub_timeout=10
+grub_scan_disk="nvme ahci"
+grubtree="nvme"
+vcfg="hp8200sff"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
index 0bcfdd0e..7adc1b3b 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -182,15 +187,18 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -231,9 +239,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -243,7 +252,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -274,6 +282,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -360,7 +369,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -375,6 +384,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -475,6 +485,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -495,8 +507,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -535,7 +547,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
index 2fa0b57f..fe2ed050 100644
--- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -123,18 +124,20 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -180,15 +185,18 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -229,9 +237,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -241,7 +250,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -272,6 +280,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -358,7 +367,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -373,6 +382,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -472,6 +482,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -492,8 +504,8 @@ CONFIG_VGA=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -532,7 +544,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg
index 0badb4fb..54966da1 100644
--- a/config/coreboot/hp8200sff_8mb/target.cfg
+++ b/config/coreboot/hp8200sff_8mb/target.cfg
@@ -1,7 +1,9 @@
tree="default"
xarch="i386-elf"
payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
payload_memtest="y"
-grub_scan_disk="ahci"
-grub_timeout=10
+grub_scan_disk="nvme ahci"
+grubtree="nvme"
+vcfg="hp8200sff"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb b/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
index 6c0c06ec..16bf95e9 100644
--- a/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -36,7 +35,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,8 +52,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -66,11 +64,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -92,6 +92,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -126,14 +127,16 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_ME_BIN_PATH="../../../vendorfiles/hp820g2/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp820g2/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -178,16 +183,19 @@ CONFIG_EC_HP_KBC1126_GPE=0x6
# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2"
CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -232,6 +240,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xd8000000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -241,7 +250,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HAVE_MRC=y
CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
CONFIG_MRC_BIN_ADDRESS=0xfffa0000
@@ -322,6 +330,7 @@ CONFIG_RCBA_LENGTH=0x4000
#
# Embedded Controllers
#
+CONFIG_EC_ACPI=y
CONFIG_EC_HP_KBC1126=y
#
@@ -357,6 +366,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -454,6 +464,7 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -474,8 +485,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -515,7 +526,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode b/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
index 705dcf0f..ae46144c 100644
--- a/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -36,7 +35,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,8 +52,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -66,11 +64,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -92,6 +92,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -124,14 +125,16 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -150,6 +153,7 @@ CONFIG_ME_BIN_PATH="../../../vendorfiles/hp820g2/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp820g2/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -159,6 +163,7 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -176,16 +181,19 @@ CONFIG_EC_HP_KBC1126_GPE=0x6
# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2"
CONFIG_HAVE_IFD_BIN=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -230,6 +238,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xd8000000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -239,7 +248,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HAVE_MRC=y
CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
CONFIG_MRC_BIN_ADDRESS=0xfffa0000
@@ -320,6 +328,7 @@ CONFIG_RCBA_LENGTH=0x4000
#
# Embedded Controllers
#
+CONFIG_EC_ACPI=y
CONFIG_EC_HP_KBC1126=y
#
@@ -355,6 +364,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -451,6 +461,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -471,8 +482,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -512,7 +523,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg
index 06f3025c..99be701a 100644
--- a/config/coreboot/hp820g2_12mb/target.cfg
+++ b/config/coreboot/hp820g2_12mb/target.cfg
@@ -1,8 +1,10 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-grub_scan_disk="ahci"
release="n"
+grub_scan_disk="nvme ahci"
+grubtree="xhci"
+vcfg="hp820g2"
+build_depend="seabios/default grub/xhci memtest86plus"
diff --git a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
index 6af76c78..12d0aefd 100644
--- a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -36,7 +35,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,8 +52,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -66,11 +64,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -92,6 +92,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -126,17 +127,19 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -182,16 +187,19 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -232,9 +240,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -244,7 +253,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -275,6 +283,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -361,7 +370,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -376,6 +385,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -474,6 +484,7 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -494,8 +505,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -534,7 +545,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
index 83a7aaa5..cf23e745 100644
--- a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -36,7 +35,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,8 +52,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -66,11 +64,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -92,6 +92,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -124,17 +125,19 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -180,16 +185,19 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -230,9 +238,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -242,7 +251,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -273,6 +281,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -359,7 +368,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -374,6 +383,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -471,6 +481,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -491,8 +502,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -531,7 +542,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg
index 0badb4fb..d0e19b73 100644
--- a/config/coreboot/hp8300cmt_16mb/target.cfg
+++ b/config/coreboot/hp8300cmt_16mb/target.cfg
@@ -1,7 +1,9 @@
tree="default"
xarch="i386-elf"
payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
payload_memtest="y"
-grub_scan_disk="ahci"
-grub_timeout=10
+grub_scan_disk="nvme ahci"
+grubtree="nvme"
+vcfg="ivybridge"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
index 02f9e183..c931923e 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -36,7 +35,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,8 +52,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -66,11 +64,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -92,6 +92,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -126,17 +127,19 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_SPI_FLASH_STMICRO=y
CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -182,16 +187,19 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -232,9 +240,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -244,7 +253,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -275,6 +283,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -361,7 +370,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -376,6 +385,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -474,6 +484,7 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -494,8 +505,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -534,7 +545,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
index dea032d1..6f639aa3 100644
--- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -36,7 +35,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,8 +52,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -66,11 +64,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -92,6 +92,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -124,17 +125,19 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_SPI_FLASH_STMICRO=y
CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -180,16 +185,19 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -230,9 +238,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -242,7 +251,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -273,6 +281,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -359,7 +368,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -374,6 +383,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -471,6 +481,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -491,8 +502,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -531,7 +542,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg
index 0badb4fb..2556a4ce 100644
--- a/config/coreboot/hp8300usdt_16mb/target.cfg
+++ b/config/coreboot/hp8300usdt_16mb/target.cfg
@@ -1,7 +1,7 @@
tree="default"
xarch="i386-elf"
payload_seabios="y"
-payload_seabios_withgrub="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
-grub_timeout=10
+vcfg="ivybridge"
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
index cedf4e2e..e6dc0b34 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="8460p"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=1
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -185,14 +190,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -235,9 +243,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -247,7 +256,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -278,6 +286,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -342,6 +351,7 @@ CONFIG_SUPERIO_SMSC_LPC47N217=y
#
# Embedded Controllers
#
+CONFIG_EC_ACPI=y
CONFIG_EC_HP_KBC1126=y
#
@@ -375,7 +385,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -390,6 +400,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -491,6 +502,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -511,8 +524,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -551,7 +564,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
index 9da024f0..19d012f2 100644
--- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -123,18 +124,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="8460p"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=1
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -183,14 +188,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -233,9 +241,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -245,7 +254,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -276,6 +284,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -340,6 +349,7 @@ CONFIG_SUPERIO_SMSC_LPC47N217=y
#
# Embedded Controllers
#
+CONFIG_EC_ACPI=y
CONFIG_EC_HP_KBC1126=y
#
@@ -373,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -388,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -488,6 +499,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -508,8 +521,8 @@ CONFIG_VGA=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -548,7 +561,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg
index fee132f4..b39036ba 100644
--- a/config/coreboot/hp8460pintel_8mb/target.cfg
+++ b/config/coreboot/hp8460pintel_8mb/target.cfg
@@ -1,8 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
-grub_timeout=10
+vcfg="hp8460pintel"
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
index b1f48be0..f4c3c3eb 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,17 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="8470p"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -164,6 +168,7 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -186,15 +191,18 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -237,9 +245,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -249,7 +258,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -280,6 +288,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -344,6 +353,7 @@ CONFIG_SUPERIO_SMSC_LPC47N217=y
#
# Embedded Controllers
#
+CONFIG_EC_ACPI=y
CONFIG_EC_HP_KBC1126=y
#
@@ -377,7 +387,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -392,6 +402,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -490,6 +501,7 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -510,8 +522,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -550,7 +562,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
index 21243c8d..959016ae 100644
--- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,17 +126,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="8470p"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -162,6 +166,7 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -184,15 +189,18 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -235,9 +243,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -247,7 +256,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -278,6 +286,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -342,6 +351,7 @@ CONFIG_SUPERIO_SMSC_LPC47N217=y
#
# Embedded Controllers
#
+CONFIG_EC_ACPI=y
CONFIG_EC_HP_KBC1126=y
#
@@ -375,7 +385,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -390,6 +400,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -487,6 +498,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -507,8 +519,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -547,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg
index fee132f4..d960f36b 100644
--- a/config/coreboot/hp8470pintel_16mb/target.cfg
+++ b/config/coreboot/hp8470pintel_16mb/target.cfg
@@ -1,8 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
-grub_timeout=10
+vcfg="hp8470pintel"
diff --git a/config/coreboot/hp8560w_8mb/config/normal b/config/coreboot/hp8560w_8mb/config/normal
index d3e4d52d..c332d78e 100644
--- a/config/coreboot/hp8560w_8mb/config/normal
+++ b/config/coreboot/hp8560w_8mb/config/normal
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -36,7 +35,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,8 +52,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -66,11 +64,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -92,6 +92,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -124,17 +125,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="8560w"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=1
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -183,14 +188,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -233,9 +241,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -245,7 +254,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -276,6 +284,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -340,6 +349,7 @@ CONFIG_SUPERIO_SMSC_LPC47N217=y
#
# Embedded Controllers
#
+CONFIG_EC_ACPI=y
CONFIG_EC_HP_KBC1126=y
#
@@ -373,7 +383,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -388,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -464,6 +475,7 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -484,8 +496,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -524,7 +536,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp8560w_8mb/target.cfg b/config/coreboot/hp8560w_8mb/target.cfg
index ae56c735..7bad4889 100644
--- a/config/coreboot/hp8560w_8mb/target.cfg
+++ b/config/coreboot/hp8560w_8mb/target.cfg
@@ -1,7 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
+payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
-grub_timeout=10
+vcfg="hp8560w"
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
index 0e09f0ea..43003291 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="folio_9470m"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=0
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=0
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +167,7 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -185,14 +190,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -235,9 +243,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -247,7 +256,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -278,6 +286,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -341,6 +350,7 @@ CONFIG_RCBA_LENGTH=0x4000
#
# Embedded Controllers
#
+CONFIG_EC_ACPI=y
CONFIG_EC_HP_KBC1126=y
#
@@ -374,7 +384,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -389,6 +399,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -490,6 +501,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -510,8 +523,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -550,7 +563,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
index d3217fdd..42c7eeba 100644
--- a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_HP=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -123,18 +124,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="folio_9470m"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=0
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=0
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +155,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -161,6 +165,7 @@ CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set
# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PRO_3500_SERIES is not set
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
# CONFIG_BOARD_HP_2170P is not set
@@ -183,14 +188,17 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -233,9 +241,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -245,7 +254,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -276,6 +284,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -339,6 +348,7 @@ CONFIG_RCBA_LENGTH=0x4000
#
# Embedded Controllers
#
+CONFIG_EC_ACPI=y
CONFIG_EC_HP_KBC1126=y
#
@@ -372,7 +382,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -387,6 +397,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -487,6 +498,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -507,8 +520,8 @@ CONFIG_VGA=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -547,7 +560,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg
index fee132f4..35a0a6fd 100644
--- a/config/coreboot/hp9470m_16mb/target.cfg
+++ b/config/coreboot/hp9470m_16mb/target.cfg
@@ -1,8 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
-grub_timeout=10
+vcfg="hp9470m"
diff --git a/config/coreboot/i945/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch b/config/coreboot/i945/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
deleted file mode 100644
index a06a5058..00000000
--- a/config/coreboot/i945/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From 4c5971a6fcf7e948f7df4d0ce2ab0751060cb2ca Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@retroboot.org>
-Date: Fri, 19 Mar 2021 05:54:58 +0000
-Subject: [PATCH 01/18] apple/macbook21: Set default VRAM to 64MiB instead of
- 8MiB
-
----
- src/mainboard/apple/macbook21/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/apple/macbook21/cmos.default b/src/mainboard/apple/macbook21/cmos.default
-index cf1bc4566e..dc0df3b6d6 100644
---- a/src/mainboard/apple/macbook21/cmos.default
-+++ b/src/mainboard/apple/macbook21/cmos.default
-@@ -5,4 +5,4 @@ boot_devices=''
- boot_default=0x40
- cmos_defaults_loaded=Yes
- lpt=Enable
--gfx_uma_size=8M
-+gfx_uma_size=64M
---
-2.39.2
-
diff --git a/config/coreboot/i945/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch b/config/coreboot/i945/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
deleted file mode 100644
index 57c32ec7..00000000
--- a/config/coreboot/i945/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
+++ /dev/null
@@ -1,68 +0,0 @@
-From ff523fd40649b72512b0f1253701509d83ca4a8d Mon Sep 17 00:00:00 2001
-From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
-Date: Wed, 27 Oct 2021 13:36:01 +0200
-Subject: [PATCH 02/18] add c3 and clockgen to apple/macbook21
-
----
- src/mainboard/apple/macbook21/Kconfig | 1 +
- src/mainboard/apple/macbook21/cstates.c | 13 +++++++++++++
- src/mainboard/apple/macbook21/devicetree.cb | 6 ++++++
- 3 files changed, 20 insertions(+)
-
-diff --git a/src/mainboard/apple/macbook21/Kconfig b/src/mainboard/apple/macbook21/Kconfig
-index 5f5ffde588..27377b737c 100644
---- a/src/mainboard/apple/macbook21/Kconfig
-+++ b/src/mainboard/apple/macbook21/Kconfig
-@@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
- select HAVE_ACPI_TABLES
- select HAVE_ACPI_RESUME
- select I945_LVDS
-+ select DRIVERS_I2C_CK505
-
- config MAINBOARD_DIR
- default "apple/macbook21"
-diff --git a/src/mainboard/apple/macbook21/cstates.c b/src/mainboard/apple/macbook21/cstates.c
-index 13d06f0839..88b8669c61 100644
---- a/src/mainboard/apple/macbook21/cstates.c
-+++ b/src/mainboard/apple/macbook21/cstates.c
-@@ -29,6 +29,19 @@ static const acpi_cstate_t cst_entries[] = {
- .addrh = 0,
- }
- },
-+ {
-+ .ctype = 3,
-+ .latency = 17,
-+ .power = 250,
-+ .resource = {
-+ .space_id = ACPI_ADDRESS_SPACE_FIXED,
-+ .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
-+ .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
-+ .access_size = ACPI_ACCESS_SIZE_UNDEFINED,
-+ .addrl = 0x20,
-+ .addrh = 0,
-+ }
-+ },
- };
-
- int get_cst_entries(const acpi_cstate_t **entries)
-diff --git a/src/mainboard/apple/macbook21/devicetree.cb b/src/mainboard/apple/macbook21/devicetree.cb
-index dd701da7ed..5587c48d1f 100644
---- a/src/mainboard/apple/macbook21/devicetree.cb
-+++ b/src/mainboard/apple/macbook21/devicetree.cb
-@@ -100,7 +100,13 @@ chip northbridge/intel/i945
- end
- device pci 1f.3 on # SMBUS
- subsystemid 0x8086 0x7270
-+ chip drivers/i2c/ck505
-+ register "mask" = "{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }"
-+ register "regs" = "{ 0x77, 0x77, 0x2d, 0x00, 0x21, 0x10, 0x3b, 0x06, 0x07, 0x0f, 0xf0, 0x01, 0x1e, 0x7f, 0x80, 0x80, 0x10, 0x08, 0x04, 0x01 }"
-+ device i2c 69 on end
-+ end
- end
-+
- end
- end
- end
---
-2.39.2
-
diff --git a/config/coreboot/i945/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch b/config/coreboot/i945/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
deleted file mode 100644
index d8ca5b1f..00000000
--- a/config/coreboot/i945/patches/0003-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
+++ /dev/null
@@ -1,23 +0,0 @@
-From fe79712702002bf2044227d6c3cef7ae022e3539 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@osboot.org>
-Date: Sun, 3 Jan 2021 03:34:01 +0000
-Subject: [PATCH 03/18] lenovo/x60: 64MiB Video RAM changed to default
- (previously it was 8MiB)
-
----
- src/mainboard/lenovo/x60/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/lenovo/x60/cmos.default b/src/mainboard/lenovo/x60/cmos.default
-index 5c3576d1f3..88170a1aab 100644
---- a/src/mainboard/lenovo/x60/cmos.default
-+++ b/src/mainboard/lenovo/x60/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
- sticky_fn=Disable
- power_management_beeps=Enable
- low_battery_beep=Enable
--gfx_uma_size=8M
-+gfx_uma_size=64M
---
-2.39.2
-
diff --git a/config/coreboot/i945/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch b/config/coreboot/i945/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
deleted file mode 100644
index 630e68a6..00000000
--- a/config/coreboot/i945/patches/0004-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
+++ /dev/null
@@ -1,22 +0,0 @@
-From 79440902866bdafeec651476a5a0e51d42b43b21 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@osboot.org>
-Date: Mon, 22 Feb 2021 22:16:59 +0000
-Subject: [PATCH 04/18] lenovo/t60: make 64MiB VRAM the default in cmos.default
-
----
- src/mainboard/lenovo/t60/cmos.default | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/lenovo/t60/cmos.default b/src/mainboard/lenovo/t60/cmos.default
-index af865f16da..7f03157df7 100644
---- a/src/mainboard/lenovo/t60/cmos.default
-+++ b/src/mainboard/lenovo/t60/cmos.default
-@@ -15,4 +15,4 @@ trackpoint=Enable
- sticky_fn=Disable
- power_management_beeps=Enable
- low_battery_beep=Enable
--gfx_uma_size=8M
-+gfx_uma_size=64M
---
-2.39.2
-
diff --git a/config/coreboot/i945/patches/0005-buildgcc-use-mirrorservice-for-gnu-toolchains.patch b/config/coreboot/i945/patches/0005-buildgcc-use-mirrorservice-for-gnu-toolchains.patch
deleted file mode 100644
index dcb28780..00000000
--- a/config/coreboot/i945/patches/0005-buildgcc-use-mirrorservice-for-gnu-toolchains.patch
+++ /dev/null
@@ -1,34 +0,0 @@
-From 5d8fc92948782e9837b26ee8cdfaa88f41fce174 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Fri, 26 Apr 2024 09:16:57 +0100
-Subject: [PATCH 1/1] buildgcc: use mirrorservice for gnu toolchains
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- util/crossgcc/buildgcc | 10 +++++-----
- 1 file changed, 5 insertions(+), 5 deletions(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 0de27ed6e8..0faea86894 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -66,11 +66,11 @@ NASM_ARCHIVE="nasm-${NASM_VERSION}.tar.bz2"
- # to the jenkins build as well, or the builder won't download it.
-
- # GCC toolchain archive locations
--GMP_BASE_URL="https://ftpmirror.gnu.org/gmp"
--MPFR_BASE_URL="https://ftpmirror.gnu.org/mpfr"
--MPC_BASE_URL="https://ftpmirror.gnu.org/mpc"
--GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}"
--BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils"
-+GMP_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp"
-+MPFR_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr"
-+MPC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc"
-+GCC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}"
-+BINUTILS_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils"
- IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
- # CLANG toolchain archive locations
- LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
---
-2.39.2
-
diff --git a/config/coreboot/i945/patches/0006-drivers-pc80-rtc-option.c-Stop-resetting-CMOS-during.patch b/config/coreboot/i945/patches/0006-drivers-pc80-rtc-option.c-Stop-resetting-CMOS-during.patch
deleted file mode 100644
index e11e33da..00000000
--- a/config/coreboot/i945/patches/0006-drivers-pc80-rtc-option.c-Stop-resetting-CMOS-during.patch
+++ /dev/null
@@ -1,56 +0,0 @@
-From 412f1d68c610f69384b156f09f0b326af984b7cc Mon Sep 17 00:00:00 2001
-From: Bill XIE <persmule@hardenedlinux.org>
-Date: Sat, 7 Oct 2023 01:32:51 +0800
-Subject: [PATCH 1/2] drivers/pc80/rtc/option.c: Stop resetting CMOS during s3
- resume
-
-After commit e12b313844da ("drivers/pc80/rtc/option.c: Allow CMOS
-defaults to extend to bank 1"), Thinkpad X200 with
-CONFIG(STATIC_OPTION_TABLE) can no longer resume from s3 (detected via
-bisect).
-
-Further inspection shows that DRAM training result of GM45 is stored
-in CMOS above 128 bytes in raminit_read_write_training.c, for s3 resume
-to restore, but it will be erased by sanitize_cmos(), which now clears
-both bank 0 and bank 1, leaving only "untrained" result restored, so s3
-resume will fail.
-
-However, resetting CMOS seems unnecessary during s3 resume. Now,
-cmos_need_reset will be negated when acpi_is_wakeup_s3() returns true.
-
-Tested: Thinkpad X200 with CONFIG(STATIC_OPTION_TABLE) can resume from
- s3 again with these changes.
-
-Change-Id: I533e83f3b95f327b0e24f4d750f8812325b7770b
-Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
-Reviewed-on: https://review.coreboot.org/c/coreboot/+/78288
-Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
----
- src/drivers/pc80/rtc/option.c | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
-
-diff --git a/src/drivers/pc80/rtc/option.c b/src/drivers/pc80/rtc/option.c
-index e8e2345133..e6cfa175ad 100644
---- a/src/drivers/pc80/rtc/option.c
-+++ b/src/drivers/pc80/rtc/option.c
-@@ -1,5 +1,6 @@
- /* SPDX-License-Identifier: GPL-2.0-only */
-
-+#include <acpi/acpi.h>
- #include <console/console.h>
- #include <string.h>
- #include <cbfs.h>
-@@ -200,7 +201,8 @@ void sanitize_cmos(void)
- {
- const unsigned char *cmos_default;
- const bool cmos_need_reset =
-- CONFIG(STATIC_OPTION_TABLE) || cmos_error() || !cmos_lb_cks_valid();
-+ (CONFIG(STATIC_OPTION_TABLE) || cmos_error() || !cmos_lb_cks_valid())
-+ && !acpi_is_wakeup_s3();
- size_t length = 128;
- size_t i;
-
---
-2.39.2
-
diff --git a/config/coreboot/i945/patches/0007-drivers-pc80-rtc-option.c-Reset-only-CMOS-range-cove.patch b/config/coreboot/i945/patches/0007-drivers-pc80-rtc-option.c-Reset-only-CMOS-range-cove.patch
deleted file mode 100644
index 1a614db7..00000000
--- a/config/coreboot/i945/patches/0007-drivers-pc80-rtc-option.c-Reset-only-CMOS-range-cove.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 0bc5a67f926e193a429cce4028fb382c49fa08f8 Mon Sep 17 00:00:00 2001
-From: Bill XIE <persmule@hardenedlinux.org>
-Date: Fri, 3 Nov 2023 12:34:01 +0800
-Subject: [PATCH 2/2] drivers/pc80/rtc/option.c: Reset only CMOS range covered
- by checksum
-
-Proposed in the comment of commit 29030d0f3dad
-("drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume"),
-during sanitize_cmos(), only reset CMOS range covered by checksum and
-the checksum itself from the file cmos.default in CBFS, in order to
-prevent other runtime data in CMOS (e.g. the DRAM training data on
-GM45 platforms for s3 resume) being erased.
-
-Tested: cherry-pick this commit before commit 44a48ce7a46c ("Kconfig:
- Bring HEAP_SIZE to a common, large value"), which is already
- before my commit 29030d0f3dad , Thinkpad X200 with
- CONFIG(STATIC_OPTION_TABLE) can resume from s3 again,
- indicating that DRAM training data are no longer erased.
-
-Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
-Co-authored-by: Jonathon Hall <jonathon.hall@puri.sm>
-Change-Id: I872bf5f41422bc3424cd8631e932aaae2ae82f7a
-Reviewed-on: https://review.coreboot.org/c/coreboot/+/78906
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-Reviewed-by: Nico Huber <nico.h@gmx.de>
-Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
----
- src/drivers/pc80/rtc/option.c | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
-diff --git a/src/drivers/pc80/rtc/option.c b/src/drivers/pc80/rtc/option.c
-index e6cfa175ad..cb18e14ae9 100644
---- a/src/drivers/pc80/rtc/option.c
-+++ b/src/drivers/pc80/rtc/option.c
-@@ -213,8 +213,12 @@ void sanitize_cmos(void)
- return;
-
- u8 control_state = cmos_disable_rtc();
-- for (i = 14; i < MIN(128, length); i++)
-+ /* Copy checked range and the checksum from the default */
-+ for (i = LB_CKS_RANGE_START; i < MIN(LB_CKS_RANGE_END + 1, length); i++)
- cmos_write_inner(cmos_default[i], i);
-+ /* CMOS checksum takes 2 bytes */
-+ cmos_write_inner(cmos_default[LB_CKS_LOC], LB_CKS_LOC);
-+ cmos_write_inner(cmos_default[LB_CKS_LOC + 1], LB_CKS_LOC + 1);
- cmos_restore_rtc(control_state);
- }
- }
---
-2.39.2
-
diff --git a/config/coreboot/i945/patches/0022-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/i945/patches/0022-Remove-warning-for-coreboot-images-built-without-a-p.patch
deleted file mode 100644
index 547c6392..00000000
--- a/config/coreboot/i945/patches/0022-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ /dev/null
@@ -1,38 +0,0 @@
-From 1ce4f118b024a6367382b46016781f30fe622e3e Mon Sep 17 00:00:00 2001
-From: Nicholas Chin <nic.c3.14@gmail.com>
-Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH] Remove warning for coreboot images built without a payload
-
-I added this in upstream to prevent people from accidentally flashing
-roms without a payload resulting in a no boot situation, but in
-libreboot lbmk handles the payload and thus this warning always comes
-up. This has caused confusion and concern so just patch it out.
----
- payloads/Makefile.inc | 13 +------------
- 1 file changed, 1 insertion(+), 12 deletions(-)
-
-diff --git a/payloads/Makefile.inc b/payloads/Makefile.inc
-index e735443a76..4f1692a873 100644
---- a/payloads/Makefile.inc
-+++ b/payloads/Makefile.inc
-@@ -49,16 +49,5 @@ distclean-payloads:
- print-repo-info-payloads:
- -$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
-
--ifeq ($(CONFIG_PAYLOAD_NONE),y)
--files_added:: warn_no_payload
--endif
--
--warn_no_payload:
-- printf "\n\t** WARNING **\n"
-- printf "coreboot has been built without a payload. Writing\n"
-- printf "a coreboot image without a payload to your board's\n"
-- printf "flash chip will result in a non-booting system. You\n"
-- printf "can use cbfstool to add a payload to the image.\n\n"
--
- .PHONY: force-payload coreinfo nvramcui
--.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
-+.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
---
-2.40.1
-
diff --git a/config/coreboot/i945/patches/0023-use-mirrorservice.org-for-iasl-downloads.patch b/config/coreboot/i945/patches/0023-use-mirrorservice.org-for-iasl-downloads.patch
deleted file mode 100644
index 012d8dab..00000000
--- a/config/coreboot/i945/patches/0023-use-mirrorservice.org-for-iasl-downloads.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 781ab8407d08a5fdb7fbc2c239e684def7380b15 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <info@minifree.org>
-Date: Sun, 28 Apr 2024 01:59:30 +0100
-Subject: [PATCH 1/1] use mirrorservice.org for iasl downloads
-
-github is unreliable. i mirror these files myself.
-
-Signed-off-by: Leah Rowe <info@minifree.org>
----
- util/crossgcc/buildgcc | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 0faea86894..6779a20425 100755
---- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -71,7 +71,7 @@ MPFR_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr"
- MPC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc"
- GCC_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-${GCC_VERSION}"
- BINUTILS_BASE_URL="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils"
--IASL_BASE_URL="https://github.com/acpica/acpica/archive/refs/tags"
-+IASL_BASE_URL="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica"
- # CLANG toolchain archive locations
- LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
- CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}"
---
-2.39.2
-
diff --git a/config/coreboot/i945/target.cfg b/config/coreboot/i945/target.cfg
deleted file mode 100644
index 16a4de7d..00000000
--- a/config/coreboot/i945/target.cfg
+++ /dev/null
@@ -1,2 +0,0 @@
-tree="i945"
-rev="e70bc423f9a2e1d13827f2703efe1f9c72549f20"
diff --git a/config/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode
deleted file mode 100644
index 39cfe811..00000000
--- a/config/coreboot/kcma-d8-udimm_16mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,704 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_NO_RELOCATABLE_RAMSTAGE=y
-# CONFIG_RELOCATABLE_RAMSTAGE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_ADI is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_ADVANSUS is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-CONFIG_VENDOR_ASUS=y
-# CONFIG_VENDOR_AVALUE is not set
-# CONFIG_VENDOR_BAP is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_ELMEX is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_ESD is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IEI is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_JETWAY is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIPPERT is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_TYAN is not set
-# CONFIG_VENDOR_UP is not set
-# CONFIG_VENDOR_VIA is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_DIR="asus/kcma-d8"
-CONFIG_MAINBOARD_PART_NUMBER="KCMA-D8"
-CONFIG_MAX_CPUS=16
-CONFIG_CBFS_SIZE=0x1000000
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_MAINBOARD_VENDOR="ASUS"
-CONFIG_APIC_ID_OFFSET=0x0
-CONFIG_HW_MEM_HOLE_SIZEK=0x100000
-CONFIG_MAX_PHYSICAL_CPUS=2
-CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
-CONFIG_HT_CHAIN_UNITID_BASE=0x0
-CONFIG_IRQ_SLOT_COUNT=13
-CONFIG_VGA_BIOS_ID="1000,0072"
-CONFIG_ONBOARD_VGA_IS_PRIMARY=y
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_VGA_BIOS=y
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-CONFIG_VGA_BIOS_FILE="/dev/null"
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
-CONFIG_DEVICETREE="devicetree.cb"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-# CONFIG_BOARD_ASUS_AM1I_A is not set
-# CONFIG_BOARD_ASUS_F2A85_M is not set
-# CONFIG_BOARD_ASUS_F2A85_M_PRO is not set
-# CONFIG_BOARD_ASUS_F2A85_M_LE is not set
-# CONFIG_BOARD_ASUS_H61M_CS is not set
-CONFIG_BOARD_ASUS_KCMA_D8=y
-# CONFIG_BOARD_ASUS_KFSN4_DRE is not set
-# CONFIG_BOARD_ASUS_KGPE_D16 is not set
-# CONFIG_BOARD_ASUS_M4A78_EM is not set
-# CONFIG_BOARD_ASUS_M4A785M is not set
-# CONFIG_BOARD_ASUS_M4A785TM is not set
-# CONFIG_BOARD_ASUS_M5A88_V is not set
-# CONFIG_BOARD_ASUS_MAXIMUS_IV_GENE_Z is not set
-# CONFIG_BOARD_ASUS_P2B_D is not set
-# CONFIG_BOARD_ASUS_P2B_DS is not set
-# CONFIG_BOARD_ASUS_P2B_F is not set
-# CONFIG_BOARD_ASUS_P2B_LS is not set
-# CONFIG_BOARD_ASUS_P2B is not set
-# CONFIG_BOARD_ASUS_P3B_F is not set
-# CONFIG_BOARD_ASUS_P5GC_MX is not set
-# CONFIG_BOARD_ASUS_P5QC is not set
-# CONFIG_BOARD_ASUS_P5Q_PRO is not set
-# CONFIG_BOARD_ASUS_P5QL_PRO is not set
-# CONFIG_BOARD_ASUS_P5QL_EM is not set
-# CONFIG_BOARD_ASUS_P5QPL_AM is not set
-# CONFIG_BOARD_ASUS_P5G41T_M_LX is not set
-# CONFIG_BOARD_ASUS_P8H61_M_LX is not set
-# CONFIG_BOARD_ASUS_P8H61_M_PRO is not set
-# CONFIG_BOARD_ASUS_P8Z77_M_PRO is not set
-CONFIG_POST_IO=y
-CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kcma-d8/bootblock.c"
-CONFIG_DCACHE_RAM_BASE=0xc2000
-CONFIG_DCACHE_RAM_SIZE=0x1e000
-CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f
-CONFIG_MAX_REBOOT_CNT=10
-CONFIG_OVERRIDE_DEVICETREE=""
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_FMDFILE=""
-# CONFIG_VBOOT is not set
-CONFIG_MMCONF_BASE_ADDRESS=0xc0000000
-CONFIG_POST_DEVICE=y
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_DIMM_MAX=4
-CONFIG_TTYS0_LCS=3
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KCMA-D8"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-# CONFIG_USBDEBUG is not set
-CONFIG_MAINBOARD_VERSION="1.0"
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_PCIEXP_L1_SUB_STATE=y
-# CONFIG_NO_POST is not set
-CONFIG_SMBIOS_ENCLOSURE_TYPE=0x03
-CONFIG_HEAP_SIZE=0xc0000
-# CONFIG_CONSOLE_POST is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_BOARD_ROMSIZE_KB_2048=y
-# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=16384
-CONFIG_ROM_SIZE=0x1000000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
-CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
-# CONFIG_SYSTEM_TYPE_LAPTOP is not set
-# CONFIG_SYSTEM_TYPE_TABLET is not set
-# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
-# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
-# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_CPU_ADDR_BITS=48
-CONFIG_MMCONF_BUS_NUMBER=256
-CONFIG_EHCI_BAR=0xfef00000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
-# CONFIG_SOC_CAVIUM_CN81XX is not set
-CONFIG_ARCH_ARMV8_EXTENSION=0
-CONFIG_STACK_SIZE=0x1000
-# CONFIG_SOC_CAVIUM_COMMON is not set
-# CONFIG_SOC_INTEL_GLK is not set
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_TTYS0_BASE=0x3f8
-CONFIG_HPET_MIN_TICKS=0x14
-CONFIG_UART_PCI_ADDR=0x0
-# CONFIG_SOC_MEDIATEK_MT8173 is not set
-# CONFIG_SOC_MEDIATEK_MT8183 is not set
-# CONFIG_SOC_NVIDIA_TEGRA124 is not set
-# CONFIG_SOC_NVIDIA_TEGRA210 is not set
-# CONFIG_SOC_QUALCOMM_COMMON is not set
-# CONFIG_SOC_QC_IPQ40XX is not set
-# CONFIG_SOC_QC_IPQ806X is not set
-# CONFIG_SOC_QUALCOMM_QCS405 is not set
-# CONFIG_SOC_QUALCOMM_SC7180 is not set
-# CONFIG_SOC_QUALCOMM_SDM845 is not set
-# CONFIG_SOC_ROCKCHIP_RK3288 is not set
-# CONFIG_SOC_ROCKCHIP_RK3399 is not set
-# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
-# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
-# CONFIG_SOC_UCB_RISCV is not set
-
-#
-# CPU
-#
-CONFIG_CPU_SOCKET_TYPE=0x14
-# CONFIG_EXT_RT_TBL_SUPPORT is not set
-CONFIG_CBB=0x0
-CONFIG_CDB=0x18
-CONFIG_XIP_ROM_SIZE=0x80000
-CONFIG_CPU_AMD_SOCKET_C32_NON_AGESA=y
-CONFIG_CPU_AMD_MODEL_10XXX=y
-CONFIG_USE_LARGE_DCACHE=y
-CONFIG_NUM_IPI_STARTS=1
-CONFIG_DCACHE_BSP_TOP_STACK_SIZE=0x4000
-CONFIG_DCACHE_BSP_TOP_STACK_SLUSH=0x4000
-CONFIG_DCACHE_AP_STACK_SIZE=0x500
-CONFIG_SET_FIDVID=y
-CONFIG_LIFT_BSP_APIC_ID=y
-CONFIG_SET_FIDVID_DEBUG=y
-CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST=y
-# CONFIG_SET_FIDVID_CORE0_ONLY is not set
-CONFIG_SET_FIDVID_CORE_RANGE=0
-CONFIG_UDELAY_LAPIC_FIXED_FSB=200
-# CONFIG_CPU_AMD_AGESA is not set
-# CONFIG_CPU_AMD_PI is not set
-# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
-CONFIG_SSE2=y
-# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
-# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
-# CONFIG_CPU_TI_AM335X is not set
-CONFIG_PARALLEL_CPU_INIT=y
-# CONFIG_PARALLEL_MP is not set
-CONFIG_UDELAY_LAPIC=y
-# CONFIG_LAPIC_MONOTONIC_TIMER is not set
-# CONFIG_UDELAY_TSC is not set
-CONFIG_TSC_SYNC_LFENCE=y
-# CONFIG_TSC_SYNC_MFENCE is not set
-# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
-CONFIG_LOGICAL_CPUS=y
-# CONFIG_HAVE_SMI_HANDLER is not set
-# CONFIG_NO_SMM is not set
-# CONFIG_SMM_ASEG is not set
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
-CONFIG_SMM_STUB_STACK_SIZE=0x400
-# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
-# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
-CONFIG_X86_AMD_FIXED_MTRRS=y
-# CONFIG_X86_AMD_INIT_SIPI is not set
-# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
-# CONFIG_SOC_SETS_MSRS is not set
-CONFIG_CAR_GLOBAL_MIGRATION=y
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-# CONFIG_USES_MICROCODE_HEADER_FILES is not set
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-CONFIG_CPU_MICROCODE_MULTIPLE_FILES=y
-
-#
-# Northbridge
-#
-# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
-CONFIG_NORTHBRIDGE_AMD_AMDFAM10=y
-CONFIG_AGP_APERTURE_SIZE=0x4000000
-CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/amd/amdfam10/bootblock.c"
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y
-# CONFIG_HT_CHAIN_DISTRIBUTE is not set
-# CONFIG_DIMM_DDR2 is not set
-CONFIG_DIMM_DDR3=y
-CONFIG_DIMM_REGISTERED=y
-CONFIG_DIMM_VOLTAGE_SET_SUPPORT=y
-# CONFIG_SVI_HIGH_FREQ is not set
-
-#
-# HyperTransport setup
-#
-# CONFIG_LIMIT_HT_DOWN_WIDTH_8 is not set
-CONFIG_LIMIT_HT_DOWN_WIDTH_16=y
-# CONFIG_LIMIT_HT_UP_WIDTH_8 is not set
-CONFIG_LIMIT_HT_UP_WIDTH_16=y
-# CONFIG_NORTHBRIDGE_AMD_PI is not set
-
-#
-# Southbridge
-#
-CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
-CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
-# CONFIG_AMD_SB_CIMX is not set
-# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
-# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
-CONFIG_SOUTHBRIDGE_AMD_SB700=y
-CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
-CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
-# CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT is not set
-CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA=y
-CONFIG_SOUTHBRIDGE_AMD_SR5650=y
-CONFIG_EXT_CONF_SUPPORT=y
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
-# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
-# CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE is not set
-
-#
-# Super I/O
-#
-# CONFIG_SUPERIO_ASPEED_AST2400 is not set
-# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
-# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
-# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
-CONFIG_SUPERIO_WINBOND_COMMON_PRE_RAM=y
-CONFIG_SUPERIO_WINBOND_W83667HG_A=y
-
-#
-# Embedded Controllers
-#
-# CONFIG_EC_GOOGLE_WILCO is not set
-# CONFIG_CAVIUM_BDK is not set
-# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
-# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
-# CONFIG_UEFI_2_4_BINDING is not set
-# CONFIG_UDK_2015_BINDING is not set
-# CONFIG_UDK_2017_BINDING is not set
-# CONFIG_USE_SIEMENS_HWILIB is not set
-# CONFIG_ARM_LPAE is not set
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-# CONFIG_ARCH_POSTCAR_X86_32 is not set
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
-# CONFIG_ARCH_VERSTAGE_X86_64 is not set
-# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
-# CONFIG_ARCH_POSTCAR_X86_64 is not set
-# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
-# CONFIG_USE_MARCH_586 is not set
-# CONFIG_AP_IN_SIPI_WAIT is not set
-# CONFIG_SIPI_VECTOR_IN_ROM is not set
-CONFIG_RAMBASE=0xe00000
-CONFIG_RAMTOP=0x1000000
-# CONFIG_CBMEM_TOP_BACKUP is not set
-CONFIG_PC80_SYSTEM=y
-# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
-# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
-# CONFIG_HPET_ADDRESS_OVERRIDE is not set
-CONFIG_HPET_ADDRESS=0xfed00000
-CONFIG_ID_SECTION_OFFSET=0x80
-# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
-# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
-CONFIG_ACPI_HAVE_PCAT_8259=y
-# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
-# CONFIG_IDT_IN_EVERY_STAGE is not set
-# CONFIG_PIRQ_ROUTE is not set
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
-CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
-# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
-CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
-# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_SMBUS_HAS_AUX_CHANNELS=y
-CONFIG_PCI=y
-# CONFIG_NO_MMCONF_SUPPORT is not set
-CONFIG_MMCONF_SUPPORT=y
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_VGA_BIOS_DGPU=y
-CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
-CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
-# CONFIG_SOFTWARE_I2C is not set
-
-#
-# Generic Drivers
-#
-# CONFIG_DRIVERS_AS3722_RTC is not set
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
-# CONFIG_GIC is not set
-# CONFIG_IPMI_KCS is not set
-# CONFIG_DRIVERS_LENOVO_WACOM is not set
-# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
-# CONFIG_RT8168_SET_LED_MODE is not set
-# CONFIG_SMMSTORE_IN_CBFS is not set
-CONFIG_SPI_FLASH=y
-# CONFIG_SPI_SDCARD is not set
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
-# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
-# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
-# CONFIG_NO_UART_ON_SUPERIO is not set
-# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
-# CONFIG_UART_OVERRIDE_REFCLK is not set
-# CONFIG_DRIVERS_UART_8250MEM is not set
-# CONFIG_DRIVERS_UART_8250MEM_32 is not set
-# CONFIG_HAVE_UART_SPECIAL is not set
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-# CONFIG_DRIVERS_UART_PL011 is not set
-# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_WIFI is not set
-# CONFIG_DRIVERS_AMD_PI is not set
-CONFIG_DRIVERS_ASPEED_AST2050=y
-CONFIG_DRIVERS_ASPEED_AST_COMMON=y
-# CONFIG_DRIVERS_I2C_MAX98373 is not set
-# CONFIG_DRIVERS_I2C_MAX98927 is not set
-# CONFIG_DRIVERS_I2C_PCA9538 is not set
-# CONFIG_DRIVERS_I2C_PCF8523 is not set
-# CONFIG_DRIVERS_I2C_PTN3460 is not set
-# CONFIG_DRIVERS_I2C_RT1011 is not set
-# CONFIG_DRIVERS_I2C_RT5663 is not set
-# CONFIG_DRIVERS_I2C_RTD2132 is not set
-# CONFIG_DRIVERS_I2C_RX6110SA is not set
-# CONFIG_DRIVERS_I2C_SX9310 is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
-CONFIG_DRIVERS_I2C_W83795=y
-# CONFIG_PLATFORM_USES_FSP1_0 is not set
-# CONFIG_PLATFORM_USES_FSP2_0 is not set
-# CONFIG_PLATFORM_USES_FSP2_1 is not set
-# CONFIG_INTEL_DDI is not set
-# CONFIG_INTEL_EDID is not set
-# CONFIG_INTEL_INT15 is not set
-# CONFIG_INTEL_GMA_ACPI is not set
-# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
-# CONFIG_INTEL_GMA_SWSMISCI is not set
-# CONFIG_DRIVER_INTEL_I210 is not set
-# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
-# CONFIG_HAVE_INTEL_PTT is not set
-# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
-# CONFIG_DRIVER_MAXIM_MAX77686 is not set
-# CONFIG_DRIVER_PARADE_PS8625 is not set
-# CONFIG_DRIVER_PARADE_PS8640 is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_LPC_TPM is not set
-# CONFIG_MAINBOARD_HAS_LPC_TPM is not set
-CONFIG_VGA=y
-# CONFIG_DRIVERS_RICOH_RCE822 is not set
-# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
-# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
-# CONFIG_DRIVERS_SIL_3114 is not set
-# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
-# CONFIG_DRIVER_TI_TPS65090 is not set
-# CONFIG_DRIVERS_TI_TPS65913 is not set
-# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
-# CONFIG_DRIVERS_USB_ACPI is not set
-# CONFIG_COMMONLIB_STORAGE is not set
-
-#
-# Security
-#
-
-#
-# Verified Boot (vboot)
-#
-
-#
-# Trusted Platform Module
-#
-CONFIG_USER_NO_TPM=y
-
-#
-# Memory initialization
-#
-# CONFIG_STM is not set
-# CONFIG_ACPI_SATA_GENERATOR is not set
-# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
-# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
-# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
-# CONFIG_RTC is not set
-
-#
-# Console
-#
-CONFIG_SQUELCH_EARLY_SMP=y
-CONFIG_CONSOLE_SERIAL=y
-
-#
-# I/O mapped, 8250-compatible
-#
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_BAUD=115200
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-CONFIG_HWBASE_DEBUG_CB=y
-CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
-CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
-CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
-# CONFIG_NO_MONOTONIC_TIMER is not set
-CONFIG_HAVE_MONOTONIC_TIMER=y
-# CONFIG_TIMER_QUEUE is not set
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_PCI_IO_CFG_EXT=y
-CONFIG_IOAPIC=y
-# CONFIG_USE_WATCHDOG_ON_BOOT is not set
-# CONFIG_GFXUMA is not set
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_HAVE_MP_TABLE=y
-CONFIG_HAVE_PIRQ_TABLE=y
-# CONFIG_COMMON_FADT is not set
-# CONFIG_ACPI_NHLT is not set
-
-#
-# System tables
-#
-CONFIG_GENERATE_MP_TABLE=y
-CONFIG_GENERATE_PIRQ_TABLE=y
-CONFIG_GENERATE_SMBIOS_TABLES=y
-# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_BAYOU is not set
-# CONFIG_PAYLOAD_FILO is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_LINUXBOOT is not set
-# CONFIG_PAYLOAD_SEABIOS is not set
-# CONFIG_PAYLOAD_UBOOT is not set
-# CONFIG_PAYLOAD_YABITS is not set
-# CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PXE is not set
-# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
-# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
-# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
-# CONFIG_TINT_SECONDARY_PAYLOAD is not set
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-CONFIG_HAVE_DEBUG_CAR=y
-# CONFIG_DEBUG_CAR is not set
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_RAM_SETUP=y
-# CONFIG_DEBUG_RAM_SETUP is not set
-# CONFIG_DEBUG_PIRQ is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_TRACE is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_HAVE_EM100_SUPPORT is not set
-CONFIG_ENABLE_APIC_EXT_ID=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
-# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
-# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
-# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
-# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
-# CONFIG_REG_SCRIPT is not set
-# CONFIG_NO_XIP_EARLY_STAGES is not set
-# CONFIG_EARLY_CBMEM_LIST is not set
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_NO_STAGE_CACHE=y
-CONFIG_BOOTBLOCK_CUSTOM=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/kcma-d8-udimm_16mb/target.cfg b/config/coreboot/kcma-d8-udimm_16mb/target.cfg
deleted file mode 100644
index 35354c26..00000000
--- a/config/coreboot/kcma-d8-udimm_16mb/target.cfg
+++ /dev/null
@@ -1,8 +0,0 @@
-tree="fam15h_udimm"
-xtree="fam15h_rdimm"
-xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
-payload_seabios="y"
-payload_memtest="y"
-xlang="c"
diff --git a/config/coreboot/kcma-d8-udimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kcma-d8-udimm_2mb/config/libgfxinit_txtmode
deleted file mode 100644
index 7949bcfd..00000000
--- a/config/coreboot/kcma-d8-udimm_2mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,704 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_NO_RELOCATABLE_RAMSTAGE=y
-# CONFIG_RELOCATABLE_RAMSTAGE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_ADI is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_ADVANSUS is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-CONFIG_VENDOR_ASUS=y
-# CONFIG_VENDOR_AVALUE is not set
-# CONFIG_VENDOR_BAP is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_ELMEX is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_ESD is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IEI is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_JETWAY is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIPPERT is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_TYAN is not set
-# CONFIG_VENDOR_UP is not set
-# CONFIG_VENDOR_VIA is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_DIR="asus/kcma-d8"
-CONFIG_MAINBOARD_PART_NUMBER="KCMA-D8"
-CONFIG_MAX_CPUS=16
-CONFIG_CBFS_SIZE=0x200000
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_MAINBOARD_VENDOR="ASUS"
-CONFIG_APIC_ID_OFFSET=0x0
-CONFIG_HW_MEM_HOLE_SIZEK=0x100000
-CONFIG_MAX_PHYSICAL_CPUS=2
-CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
-CONFIG_HT_CHAIN_UNITID_BASE=0x0
-CONFIG_IRQ_SLOT_COUNT=13
-CONFIG_VGA_BIOS_ID="1000,0072"
-CONFIG_ONBOARD_VGA_IS_PRIMARY=y
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_VGA_BIOS=y
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-CONFIG_VGA_BIOS_FILE="/dev/null"
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
-CONFIG_DEVICETREE="devicetree.cb"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-# CONFIG_BOARD_ASUS_AM1I_A is not set
-# CONFIG_BOARD_ASUS_F2A85_M is not set
-# CONFIG_BOARD_ASUS_F2A85_M_PRO is not set
-# CONFIG_BOARD_ASUS_F2A85_M_LE is not set
-# CONFIG_BOARD_ASUS_H61M_CS is not set
-CONFIG_BOARD_ASUS_KCMA_D8=y
-# CONFIG_BOARD_ASUS_KFSN4_DRE is not set
-# CONFIG_BOARD_ASUS_KGPE_D16 is not set
-# CONFIG_BOARD_ASUS_M4A78_EM is not set
-# CONFIG_BOARD_ASUS_M4A785M is not set
-# CONFIG_BOARD_ASUS_M4A785TM is not set
-# CONFIG_BOARD_ASUS_M5A88_V is not set
-# CONFIG_BOARD_ASUS_MAXIMUS_IV_GENE_Z is not set
-# CONFIG_BOARD_ASUS_P2B_D is not set
-# CONFIG_BOARD_ASUS_P2B_DS is not set
-# CONFIG_BOARD_ASUS_P2B_F is not set
-# CONFIG_BOARD_ASUS_P2B_LS is not set
-# CONFIG_BOARD_ASUS_P2B is not set
-# CONFIG_BOARD_ASUS_P3B_F is not set
-# CONFIG_BOARD_ASUS_P5GC_MX is not set
-# CONFIG_BOARD_ASUS_P5QC is not set
-# CONFIG_BOARD_ASUS_P5Q_PRO is not set
-# CONFIG_BOARD_ASUS_P5QL_PRO is not set
-# CONFIG_BOARD_ASUS_P5QL_EM is not set
-# CONFIG_BOARD_ASUS_P5QPL_AM is not set
-# CONFIG_BOARD_ASUS_P5G41T_M_LX is not set
-# CONFIG_BOARD_ASUS_P8H61_M_LX is not set
-# CONFIG_BOARD_ASUS_P8H61_M_PRO is not set
-# CONFIG_BOARD_ASUS_P8Z77_M_PRO is not set
-CONFIG_POST_IO=y
-CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kcma-d8/bootblock.c"
-CONFIG_DCACHE_RAM_BASE=0xc2000
-CONFIG_DCACHE_RAM_SIZE=0x1e000
-CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f
-CONFIG_MAX_REBOOT_CNT=10
-CONFIG_OVERRIDE_DEVICETREE=""
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_FMDFILE=""
-# CONFIG_VBOOT is not set
-CONFIG_MMCONF_BASE_ADDRESS=0xc0000000
-CONFIG_POST_DEVICE=y
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_DIMM_MAX=4
-CONFIG_TTYS0_LCS=3
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KCMA-D8"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-# CONFIG_USBDEBUG is not set
-CONFIG_MAINBOARD_VERSION="1.0"
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_PCIEXP_L1_SUB_STATE=y
-# CONFIG_NO_POST is not set
-CONFIG_SMBIOS_ENCLOSURE_TYPE=0x03
-CONFIG_HEAP_SIZE=0xc0000
-# CONFIG_CONSOLE_POST is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_BOARD_ROMSIZE_KB_2048=y
-# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_2048=y
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=2048
-CONFIG_ROM_SIZE=0x200000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
-CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
-# CONFIG_SYSTEM_TYPE_LAPTOP is not set
-# CONFIG_SYSTEM_TYPE_TABLET is not set
-# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
-# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
-# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_CPU_ADDR_BITS=48
-CONFIG_MMCONF_BUS_NUMBER=256
-CONFIG_EHCI_BAR=0xfef00000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
-# CONFIG_SOC_CAVIUM_CN81XX is not set
-CONFIG_ARCH_ARMV8_EXTENSION=0
-CONFIG_STACK_SIZE=0x1000
-# CONFIG_SOC_CAVIUM_COMMON is not set
-# CONFIG_SOC_INTEL_GLK is not set
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_TTYS0_BASE=0x3f8
-CONFIG_HPET_MIN_TICKS=0x14
-CONFIG_UART_PCI_ADDR=0x0
-# CONFIG_SOC_MEDIATEK_MT8173 is not set
-# CONFIG_SOC_MEDIATEK_MT8183 is not set
-# CONFIG_SOC_NVIDIA_TEGRA124 is not set
-# CONFIG_SOC_NVIDIA_TEGRA210 is not set
-# CONFIG_SOC_QUALCOMM_COMMON is not set
-# CONFIG_SOC_QC_IPQ40XX is not set
-# CONFIG_SOC_QC_IPQ806X is not set
-# CONFIG_SOC_QUALCOMM_QCS405 is not set
-# CONFIG_SOC_QUALCOMM_SC7180 is not set
-# CONFIG_SOC_QUALCOMM_SDM845 is not set
-# CONFIG_SOC_ROCKCHIP_RK3288 is not set
-# CONFIG_SOC_ROCKCHIP_RK3399 is not set
-# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
-# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
-# CONFIG_SOC_UCB_RISCV is not set
-
-#
-# CPU
-#
-CONFIG_CPU_SOCKET_TYPE=0x14
-# CONFIG_EXT_RT_TBL_SUPPORT is not set
-CONFIG_CBB=0x0
-CONFIG_CDB=0x18
-CONFIG_XIP_ROM_SIZE=0x80000
-CONFIG_CPU_AMD_SOCKET_C32_NON_AGESA=y
-CONFIG_CPU_AMD_MODEL_10XXX=y
-CONFIG_USE_LARGE_DCACHE=y
-CONFIG_NUM_IPI_STARTS=1
-CONFIG_DCACHE_BSP_TOP_STACK_SIZE=0x4000
-CONFIG_DCACHE_BSP_TOP_STACK_SLUSH=0x4000
-CONFIG_DCACHE_AP_STACK_SIZE=0x500
-CONFIG_SET_FIDVID=y
-CONFIG_LIFT_BSP_APIC_ID=y
-CONFIG_SET_FIDVID_DEBUG=y
-CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST=y
-# CONFIG_SET_FIDVID_CORE0_ONLY is not set
-CONFIG_SET_FIDVID_CORE_RANGE=0
-CONFIG_UDELAY_LAPIC_FIXED_FSB=200
-# CONFIG_CPU_AMD_AGESA is not set
-# CONFIG_CPU_AMD_PI is not set
-# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
-CONFIG_SSE2=y
-# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
-# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
-# CONFIG_CPU_TI_AM335X is not set
-CONFIG_PARALLEL_CPU_INIT=y
-# CONFIG_PARALLEL_MP is not set
-CONFIG_UDELAY_LAPIC=y
-# CONFIG_LAPIC_MONOTONIC_TIMER is not set
-# CONFIG_UDELAY_TSC is not set
-CONFIG_TSC_SYNC_LFENCE=y
-# CONFIG_TSC_SYNC_MFENCE is not set
-# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
-CONFIG_LOGICAL_CPUS=y
-# CONFIG_HAVE_SMI_HANDLER is not set
-# CONFIG_NO_SMM is not set
-# CONFIG_SMM_ASEG is not set
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
-CONFIG_SMM_STUB_STACK_SIZE=0x400
-# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
-# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
-CONFIG_X86_AMD_FIXED_MTRRS=y
-# CONFIG_X86_AMD_INIT_SIPI is not set
-# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
-# CONFIG_SOC_SETS_MSRS is not set
-CONFIG_CAR_GLOBAL_MIGRATION=y
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-# CONFIG_USES_MICROCODE_HEADER_FILES is not set
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-CONFIG_CPU_MICROCODE_MULTIPLE_FILES=y
-
-#
-# Northbridge
-#
-# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
-CONFIG_NORTHBRIDGE_AMD_AMDFAM10=y
-CONFIG_AGP_APERTURE_SIZE=0x4000000
-CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/amd/amdfam10/bootblock.c"
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y
-# CONFIG_HT_CHAIN_DISTRIBUTE is not set
-# CONFIG_DIMM_DDR2 is not set
-CONFIG_DIMM_DDR3=y
-CONFIG_DIMM_REGISTERED=y
-CONFIG_DIMM_VOLTAGE_SET_SUPPORT=y
-# CONFIG_SVI_HIGH_FREQ is not set
-
-#
-# HyperTransport setup
-#
-# CONFIG_LIMIT_HT_DOWN_WIDTH_8 is not set
-CONFIG_LIMIT_HT_DOWN_WIDTH_16=y
-# CONFIG_LIMIT_HT_UP_WIDTH_8 is not set
-CONFIG_LIMIT_HT_UP_WIDTH_16=y
-# CONFIG_NORTHBRIDGE_AMD_PI is not set
-
-#
-# Southbridge
-#
-CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
-CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
-# CONFIG_AMD_SB_CIMX is not set
-# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
-# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
-CONFIG_SOUTHBRIDGE_AMD_SB700=y
-CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
-CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
-# CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT is not set
-CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA=y
-CONFIG_SOUTHBRIDGE_AMD_SR5650=y
-CONFIG_EXT_CONF_SUPPORT=y
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
-# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
-# CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE is not set
-
-#
-# Super I/O
-#
-# CONFIG_SUPERIO_ASPEED_AST2400 is not set
-# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
-# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
-# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
-CONFIG_SUPERIO_WINBOND_COMMON_PRE_RAM=y
-CONFIG_SUPERIO_WINBOND_W83667HG_A=y
-
-#
-# Embedded Controllers
-#
-# CONFIG_EC_GOOGLE_WILCO is not set
-# CONFIG_CAVIUM_BDK is not set
-# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
-# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
-# CONFIG_UEFI_2_4_BINDING is not set
-# CONFIG_UDK_2015_BINDING is not set
-# CONFIG_UDK_2017_BINDING is not set
-# CONFIG_USE_SIEMENS_HWILIB is not set
-# CONFIG_ARM_LPAE is not set
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-# CONFIG_ARCH_POSTCAR_X86_32 is not set
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
-# CONFIG_ARCH_VERSTAGE_X86_64 is not set
-# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
-# CONFIG_ARCH_POSTCAR_X86_64 is not set
-# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
-# CONFIG_USE_MARCH_586 is not set
-# CONFIG_AP_IN_SIPI_WAIT is not set
-# CONFIG_SIPI_VECTOR_IN_ROM is not set
-CONFIG_RAMBASE=0xe00000
-CONFIG_RAMTOP=0x1000000
-# CONFIG_CBMEM_TOP_BACKUP is not set
-CONFIG_PC80_SYSTEM=y
-# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
-# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
-# CONFIG_HPET_ADDRESS_OVERRIDE is not set
-CONFIG_HPET_ADDRESS=0xfed00000
-CONFIG_ID_SECTION_OFFSET=0x80
-# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
-# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
-CONFIG_ACPI_HAVE_PCAT_8259=y
-# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
-# CONFIG_IDT_IN_EVERY_STAGE is not set
-# CONFIG_PIRQ_ROUTE is not set
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
-CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
-# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
-CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
-# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_SMBUS_HAS_AUX_CHANNELS=y
-CONFIG_PCI=y
-# CONFIG_NO_MMCONF_SUPPORT is not set
-CONFIG_MMCONF_SUPPORT=y
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_VGA_BIOS_DGPU=y
-CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
-CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
-# CONFIG_SOFTWARE_I2C is not set
-
-#
-# Generic Drivers
-#
-# CONFIG_DRIVERS_AS3722_RTC is not set
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
-# CONFIG_GIC is not set
-# CONFIG_IPMI_KCS is not set
-# CONFIG_DRIVERS_LENOVO_WACOM is not set
-# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
-# CONFIG_RT8168_SET_LED_MODE is not set
-# CONFIG_SMMSTORE_IN_CBFS is not set
-CONFIG_SPI_FLASH=y
-# CONFIG_SPI_SDCARD is not set
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
-# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
-# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
-# CONFIG_NO_UART_ON_SUPERIO is not set
-# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
-# CONFIG_UART_OVERRIDE_REFCLK is not set
-# CONFIG_DRIVERS_UART_8250MEM is not set
-# CONFIG_DRIVERS_UART_8250MEM_32 is not set
-# CONFIG_HAVE_UART_SPECIAL is not set
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-# CONFIG_DRIVERS_UART_PL011 is not set
-# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_WIFI is not set
-# CONFIG_DRIVERS_AMD_PI is not set
-CONFIG_DRIVERS_ASPEED_AST2050=y
-CONFIG_DRIVERS_ASPEED_AST_COMMON=y
-# CONFIG_DRIVERS_I2C_MAX98373 is not set
-# CONFIG_DRIVERS_I2C_MAX98927 is not set
-# CONFIG_DRIVERS_I2C_PCA9538 is not set
-# CONFIG_DRIVERS_I2C_PCF8523 is not set
-# CONFIG_DRIVERS_I2C_PTN3460 is not set
-# CONFIG_DRIVERS_I2C_RT1011 is not set
-# CONFIG_DRIVERS_I2C_RT5663 is not set
-# CONFIG_DRIVERS_I2C_RTD2132 is not set
-# CONFIG_DRIVERS_I2C_RX6110SA is not set
-# CONFIG_DRIVERS_I2C_SX9310 is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
-CONFIG_DRIVERS_I2C_W83795=y
-# CONFIG_PLATFORM_USES_FSP1_0 is not set
-# CONFIG_PLATFORM_USES_FSP2_0 is not set
-# CONFIG_PLATFORM_USES_FSP2_1 is not set
-# CONFIG_INTEL_DDI is not set
-# CONFIG_INTEL_EDID is not set
-# CONFIG_INTEL_INT15 is not set
-# CONFIG_INTEL_GMA_ACPI is not set
-# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
-# CONFIG_INTEL_GMA_SWSMISCI is not set
-# CONFIG_DRIVER_INTEL_I210 is not set
-# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
-# CONFIG_HAVE_INTEL_PTT is not set
-# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
-# CONFIG_DRIVER_MAXIM_MAX77686 is not set
-# CONFIG_DRIVER_PARADE_PS8625 is not set
-# CONFIG_DRIVER_PARADE_PS8640 is not set
-CONFIG_DRIVERS_MC146818=y
-# CONFIG_LPC_TPM is not set
-# CONFIG_MAINBOARD_HAS_LPC_TPM is not set
-CONFIG_VGA=y
-# CONFIG_DRIVERS_RICOH_RCE822 is not set
-# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
-# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
-# CONFIG_DRIVERS_SIL_3114 is not set
-# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
-# CONFIG_DRIVER_TI_TPS65090 is not set
-# CONFIG_DRIVERS_TI_TPS65913 is not set
-# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
-# CONFIG_DRIVERS_USB_ACPI is not set
-# CONFIG_COMMONLIB_STORAGE is not set
-
-#
-# Security
-#
-
-#
-# Verified Boot (vboot)
-#
-
-#
-# Trusted Platform Module
-#
-CONFIG_USER_NO_TPM=y
-
-#
-# Memory initialization
-#
-# CONFIG_STM is not set
-# CONFIG_ACPI_SATA_GENERATOR is not set
-# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
-# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
-# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
-# CONFIG_RTC is not set
-
-#
-# Console
-#
-CONFIG_SQUELCH_EARLY_SMP=y
-CONFIG_CONSOLE_SERIAL=y
-
-#
-# I/O mapped, 8250-compatible
-#
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_BAUD=115200
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-CONFIG_HWBASE_DEBUG_CB=y
-CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
-CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
-CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
-# CONFIG_NO_MONOTONIC_TIMER is not set
-CONFIG_HAVE_MONOTONIC_TIMER=y
-# CONFIG_TIMER_QUEUE is not set
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_PCI_IO_CFG_EXT=y
-CONFIG_IOAPIC=y
-# CONFIG_USE_WATCHDOG_ON_BOOT is not set
-# CONFIG_GFXUMA is not set
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_HAVE_MP_TABLE=y
-CONFIG_HAVE_PIRQ_TABLE=y
-# CONFIG_COMMON_FADT is not set
-# CONFIG_ACPI_NHLT is not set
-
-#
-# System tables
-#
-CONFIG_GENERATE_MP_TABLE=y
-CONFIG_GENERATE_PIRQ_TABLE=y
-CONFIG_GENERATE_SMBIOS_TABLES=y
-# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_BAYOU is not set
-# CONFIG_PAYLOAD_FILO is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_LINUXBOOT is not set
-# CONFIG_PAYLOAD_SEABIOS is not set
-# CONFIG_PAYLOAD_UBOOT is not set
-# CONFIG_PAYLOAD_YABITS is not set
-# CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PXE is not set
-# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
-# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
-# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
-# CONFIG_TINT_SECONDARY_PAYLOAD is not set
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-CONFIG_HAVE_DEBUG_CAR=y
-# CONFIG_DEBUG_CAR is not set
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_RAM_SETUP=y
-# CONFIG_DEBUG_RAM_SETUP is not set
-# CONFIG_DEBUG_PIRQ is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_TRACE is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_HAVE_EM100_SUPPORT is not set
-CONFIG_ENABLE_APIC_EXT_ID=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
-# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
-# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
-# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
-# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
-# CONFIG_REG_SCRIPT is not set
-# CONFIG_NO_XIP_EARLY_STAGES is not set
-# CONFIG_EARLY_CBMEM_LIST is not set
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_NO_STAGE_CACHE=y
-CONFIG_BOOTBLOCK_CUSTOM=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/kcma-d8-udimm_2mb/target.cfg b/config/coreboot/kcma-d8-udimm_2mb/target.cfg
deleted file mode 100644
index 35354c26..00000000
--- a/config/coreboot/kcma-d8-udimm_2mb/target.cfg
+++ /dev/null
@@ -1,8 +0,0 @@
-tree="fam15h_udimm"
-xtree="fam15h_rdimm"
-xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
-payload_seabios="y"
-payload_memtest="y"
-xlang="c"
diff --git a/config/coreboot/kcma-d8-rdimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kcma_d8_16mb/config/libgfxinit_txtmode
index 39cfe811..39cfe811 100644
--- a/config/coreboot/kcma-d8-rdimm_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kcma_d8_16mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kcma_d8_16mb/target.cfg b/config/coreboot/kcma_d8_16mb/target.cfg
new file mode 100644
index 00000000..5f705f43
--- /dev/null
+++ b/config/coreboot/kcma_d8_16mb/target.cfg
@@ -0,0 +1,9 @@
+tree="fam15h"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+xlang="c"
+grub_scan_disk="nvme ahci"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/kcma-d8-rdimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kcma_d8_2mb/config/libgfxinit_txtmode
index 7949bcfd..7949bcfd 100644
--- a/config/coreboot/kcma-d8-rdimm_2mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kcma_d8_2mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kcma_d8_2mb/target.cfg b/config/coreboot/kcma_d8_2mb/target.cfg
new file mode 100644
index 00000000..5f705f43
--- /dev/null
+++ b/config/coreboot/kcma_d8_2mb/target.cfg
@@ -0,0 +1,9 @@
+tree="fam15h"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+xlang="c"
+grub_scan_disk="nvme ahci"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/kfsn4-dre_2mb/target.cfg b/config/coreboot/kfsn4-dre_2mb/target.cfg
deleted file mode 100644
index 9bd20d45..00000000
--- a/config/coreboot/kfsn4-dre_2mb/target.cfg
+++ /dev/null
@@ -1,7 +0,0 @@
-tree="fam15h_udimm"
-xarch="i386-elf"
-payload_seabios="y"
-payload_seabios_withgrub="y"
-payload_memtest="y"
-xlang="c"
-grub_timeout=10
diff --git a/config/coreboot/kfsn4-dre_1mb/config/libgfxinit_txtmode b/config/coreboot/kfsn4_dre_1mb/config/libgfxinit_txtmode
index b538c0f9..b538c0f9 100644
--- a/config/coreboot/kfsn4-dre_1mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kfsn4_dre_1mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg b/config/coreboot/kfsn4_dre_1mb/target.cfg
index 2867a730..57e64580 100644
--- a/config/coreboot/kgpe-d16-rdimm_16mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_1mb/target.cfg
@@ -1,7 +1,6 @@
-tree="fam15h_rdimm"
+tree="fam15h"
xarch="i386-elf"
payload_seabios="y"
-payload_seabios_withgrub="y"
payload_memtest="y"
xlang="c"
-grub_timeout=10
+build_depend="seabios/default memtest86plus"
diff --git a/config/coreboot/kfsn4-dre_2mb/config/libgfxinit_txtmode b/config/coreboot/kfsn4_dre_2mb/config/libgfxinit_txtmode
index a5329039..a5329039 100644
--- a/config/coreboot/kfsn4-dre_2mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kfsn4_dre_2mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kfsn4-dre_1mb/target.cfg b/config/coreboot/kfsn4_dre_2mb/target.cfg
index 19c57b8d..606962a2 100644
--- a/config/coreboot/kfsn4-dre_1mb/target.cfg
+++ b/config/coreboot/kfsn4_dre_2mb/target.cfg
@@ -1,6 +1,6 @@
-tree="fam15h_udimm"
+tree="fam15h"
xarch="i386-elf"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
xlang="c"
-grub_timeout=10
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg b/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
deleted file mode 100644
index 2867a730..00000000
--- a/config/coreboot/kgpe-d16-rdimm_2mb/target.cfg
+++ /dev/null
@@ -1,7 +0,0 @@
-tree="fam15h_rdimm"
-xarch="i386-elf"
-payload_seabios="y"
-payload_seabios_withgrub="y"
-payload_memtest="y"
-xlang="c"
-grub_timeout=10
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kgpe-d16-udimm_16mb/config/libgfxinit_txtmode
deleted file mode 100644
index c29a71f8..00000000
--- a/config/coreboot/kgpe-d16-udimm_16mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,713 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_NO_RELOCATABLE_RAMSTAGE=y
-# CONFIG_RELOCATABLE_RAMSTAGE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_ADI is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_ADVANSUS is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-CONFIG_VENDOR_ASUS=y
-# CONFIG_VENDOR_AVALUE is not set
-# CONFIG_VENDOR_BAP is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_ELMEX is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_ESD is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IEI is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_JETWAY is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIPPERT is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_TYAN is not set
-# CONFIG_VENDOR_UP is not set
-# CONFIG_VENDOR_VIA is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_DIR="asus/kgpe-d16"
-CONFIG_MAINBOARD_PART_NUMBER="KGPE-D16"
-CONFIG_MAX_CPUS=32
-CONFIG_CBFS_SIZE=0x1000000
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_MAINBOARD_VENDOR="ASUS"
-CONFIG_APIC_ID_OFFSET=0x0
-CONFIG_HW_MEM_HOLE_SIZEK=0x100000
-CONFIG_MAX_PHYSICAL_CPUS=4
-CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
-CONFIG_HT_CHAIN_UNITID_BASE=0x0
-CONFIG_IRQ_SLOT_COUNT=13
-CONFIG_VGA_BIOS_ID="1000,0072"
-CONFIG_ONBOARD_VGA_IS_PRIMARY=y
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_VGA_BIOS=y
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-CONFIG_VGA_BIOS_FILE="/dev/null"
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
-CONFIG_DEVICETREE="devicetree.cb"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-# CONFIG_BOARD_ASUS_AM1I_A is not set
-# CONFIG_BOARD_ASUS_F2A85_M is not set
-# CONFIG_BOARD_ASUS_F2A85_M_PRO is not set
-# CONFIG_BOARD_ASUS_F2A85_M_LE is not set
-# CONFIG_BOARD_ASUS_H61M_CS is not set
-# CONFIG_BOARD_ASUS_KCMA_D8 is not set
-# CONFIG_BOARD_ASUS_KFSN4_DRE is not set
-CONFIG_BOARD_ASUS_KGPE_D16=y
-# CONFIG_BOARD_ASUS_M4A78_EM is not set
-# CONFIG_BOARD_ASUS_M4A785M is not set
-# CONFIG_BOARD_ASUS_M4A785TM is not set
-# CONFIG_BOARD_ASUS_M5A88_V is not set
-# CONFIG_BOARD_ASUS_MAXIMUS_IV_GENE_Z is not set
-# CONFIG_BOARD_ASUS_P2B_D is not set
-# CONFIG_BOARD_ASUS_P2B_DS is not set
-# CONFIG_BOARD_ASUS_P2B_F is not set
-# CONFIG_BOARD_ASUS_P2B_LS is not set
-# CONFIG_BOARD_ASUS_P2B is not set
-# CONFIG_BOARD_ASUS_P3B_F is not set
-# CONFIG_BOARD_ASUS_P5GC_MX is not set
-# CONFIG_BOARD_ASUS_P5QC is not set
-# CONFIG_BOARD_ASUS_P5Q_PRO is not set
-# CONFIG_BOARD_ASUS_P5QL_PRO is not set
-# CONFIG_BOARD_ASUS_P5QL_EM is not set
-# CONFIG_BOARD_ASUS_P5QPL_AM is not set
-# CONFIG_BOARD_ASUS_P5G41T_M_LX is not set
-# CONFIG_BOARD_ASUS_P8H61_M_LX is not set
-# CONFIG_BOARD_ASUS_P8H61_M_PRO is not set
-# CONFIG_BOARD_ASUS_P8Z77_M_PRO is not set
-CONFIG_POST_IO=y
-CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kgpe-d16/bootblock.c"
-CONFIG_DCACHE_RAM_BASE=0xc2000
-CONFIG_DCACHE_RAM_SIZE=0x1e000
-CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f
-CONFIG_MAX_REBOOT_CNT=10
-CONFIG_OVERRIDE_DEVICETREE=""
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_FMDFILE=""
-# CONFIG_VBOOT is not set
-CONFIG_MMCONF_BASE_ADDRESS=0xc0000000
-CONFIG_POST_DEVICE=y
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_DIMM_MAX=4
-CONFIG_TPM_PIRQ=0x0
-CONFIG_TTYS0_LCS=3
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KGPE-D16"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-# CONFIG_USBDEBUG is not set
-CONFIG_IPMI_KCS_REGISTER_SPACING=1
-CONFIG_IPMI_FRU_SINGLE_RW_SZ=16
-CONFIG_MAINBOARD_VERSION="1.0"
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_PCIEXP_L1_SUB_STATE=y
-# CONFIG_NO_POST is not set
-CONFIG_SMBIOS_ENCLOSURE_TYPE=0x03
-CONFIG_HEAP_SIZE=0xc0000
-# CONFIG_CONSOLE_POST is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_BOARD_ROMSIZE_KB_2048=y
-# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_16384=y
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=16384
-CONFIG_ROM_SIZE=0x1000000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
-CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
-# CONFIG_SYSTEM_TYPE_LAPTOP is not set
-# CONFIG_SYSTEM_TYPE_TABLET is not set
-# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
-# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
-# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_CPU_ADDR_BITS=48
-CONFIG_MMCONF_BUS_NUMBER=256
-CONFIG_EHCI_BAR=0xfef00000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
-# CONFIG_SOC_CAVIUM_CN81XX is not set
-CONFIG_ARCH_ARMV8_EXTENSION=0
-CONFIG_STACK_SIZE=0x1000
-# CONFIG_SOC_CAVIUM_COMMON is not set
-# CONFIG_SOC_INTEL_GLK is not set
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_TTYS0_BASE=0x3f8
-CONFIG_HPET_MIN_TICKS=0x14
-CONFIG_UART_PCI_ADDR=0x0
-# CONFIG_SOC_MEDIATEK_MT8173 is not set
-# CONFIG_SOC_MEDIATEK_MT8183 is not set
-# CONFIG_SOC_NVIDIA_TEGRA124 is not set
-# CONFIG_SOC_NVIDIA_TEGRA210 is not set
-# CONFIG_SOC_QUALCOMM_COMMON is not set
-# CONFIG_SOC_QC_IPQ40XX is not set
-# CONFIG_SOC_QC_IPQ806X is not set
-# CONFIG_SOC_QUALCOMM_QCS405 is not set
-# CONFIG_SOC_QUALCOMM_SC7180 is not set
-# CONFIG_SOC_QUALCOMM_SDM845 is not set
-# CONFIG_SOC_ROCKCHIP_RK3288 is not set
-# CONFIG_SOC_ROCKCHIP_RK3399 is not set
-# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
-# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
-# CONFIG_SOC_UCB_RISCV is not set
-
-#
-# CPU
-#
-CONFIG_CPU_SOCKET_TYPE=0x15
-# CONFIG_EXT_RT_TBL_SUPPORT is not set
-CONFIG_CBB=0x0
-CONFIG_CDB=0x18
-CONFIG_XIP_ROM_SIZE=0x80000
-CONFIG_CPU_AMD_SOCKET_G34_NON_AGESA=y
-CONFIG_CPU_AMD_MODEL_10XXX=y
-CONFIG_USE_LARGE_DCACHE=y
-CONFIG_NUM_IPI_STARTS=1
-CONFIG_DCACHE_BSP_TOP_STACK_SIZE=0x4000
-CONFIG_DCACHE_BSP_TOP_STACK_SLUSH=0x4000
-CONFIG_DCACHE_AP_STACK_SIZE=0x500
-CONFIG_SET_FIDVID=y
-CONFIG_LIFT_BSP_APIC_ID=y
-CONFIG_SET_FIDVID_DEBUG=y
-CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST=y
-# CONFIG_SET_FIDVID_CORE0_ONLY is not set
-CONFIG_SET_FIDVID_CORE_RANGE=0
-CONFIG_UDELAY_LAPIC_FIXED_FSB=200
-# CONFIG_CPU_AMD_AGESA is not set
-# CONFIG_CPU_AMD_PI is not set
-# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
-CONFIG_SSE2=y
-# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
-# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
-# CONFIG_CPU_TI_AM335X is not set
-CONFIG_PARALLEL_CPU_INIT=y
-# CONFIG_PARALLEL_MP is not set
-CONFIG_UDELAY_LAPIC=y
-# CONFIG_LAPIC_MONOTONIC_TIMER is not set
-# CONFIG_UDELAY_TSC is not set
-CONFIG_TSC_SYNC_LFENCE=y
-# CONFIG_TSC_SYNC_MFENCE is not set
-# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
-CONFIG_LOGICAL_CPUS=y
-# CONFIG_HAVE_SMI_HANDLER is not set
-# CONFIG_NO_SMM is not set
-# CONFIG_SMM_ASEG is not set
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
-CONFIG_SMM_STUB_STACK_SIZE=0x400
-# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
-# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
-CONFIG_X86_AMD_FIXED_MTRRS=y
-# CONFIG_X86_AMD_INIT_SIPI is not set
-# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
-# CONFIG_SOC_SETS_MSRS is not set
-CONFIG_CAR_GLOBAL_MIGRATION=y
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-# CONFIG_USES_MICROCODE_HEADER_FILES is not set
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-CONFIG_CPU_MICROCODE_MULTIPLE_FILES=y
-
-#
-# Northbridge
-#
-# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
-CONFIG_NORTHBRIDGE_AMD_AMDFAM10=y
-CONFIG_AGP_APERTURE_SIZE=0x4000000
-CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/amd/amdfam10/bootblock.c"
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y
-# CONFIG_HT_CHAIN_DISTRIBUTE is not set
-# CONFIG_DIMM_DDR2 is not set
-CONFIG_DIMM_DDR3=y
-CONFIG_DIMM_REGISTERED=y
-CONFIG_DIMM_VOLTAGE_SET_SUPPORT=y
-# CONFIG_SVI_HIGH_FREQ is not set
-
-#
-# HyperTransport setup
-#
-# CONFIG_LIMIT_HT_DOWN_WIDTH_8 is not set
-CONFIG_LIMIT_HT_DOWN_WIDTH_16=y
-# CONFIG_LIMIT_HT_UP_WIDTH_8 is not set
-CONFIG_LIMIT_HT_UP_WIDTH_16=y
-# CONFIG_NORTHBRIDGE_AMD_PI is not set
-
-#
-# Southbridge
-#
-CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
-CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
-# CONFIG_AMD_SB_CIMX is not set
-# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
-# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
-CONFIG_SOUTHBRIDGE_AMD_SB700=y
-CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
-CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
-# CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT is not set
-CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA=y
-CONFIG_SOUTHBRIDGE_AMD_SR5650=y
-CONFIG_EXT_CONF_SUPPORT=y
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
-# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
-# CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE is not set
-
-#
-# Super I/O
-#
-# CONFIG_SUPERIO_ASPEED_AST2400 is not set
-# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
-# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
-# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
-CONFIG_SUPERIO_WINBOND_COMMON_PRE_RAM=y
-CONFIG_SUPERIO_WINBOND_W83667HG_A=y
-
-#
-# Embedded Controllers
-#
-# CONFIG_EC_GOOGLE_WILCO is not set
-# CONFIG_CAVIUM_BDK is not set
-# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
-# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
-# CONFIG_UEFI_2_4_BINDING is not set
-# CONFIG_UDK_2015_BINDING is not set
-# CONFIG_UDK_2017_BINDING is not set
-# CONFIG_USE_SIEMENS_HWILIB is not set
-# CONFIG_ARM_LPAE is not set
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-# CONFIG_ARCH_POSTCAR_X86_32 is not set
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
-# CONFIG_ARCH_VERSTAGE_X86_64 is not set
-# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
-# CONFIG_ARCH_POSTCAR_X86_64 is not set
-# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
-# CONFIG_USE_MARCH_586 is not set
-# CONFIG_AP_IN_SIPI_WAIT is not set
-# CONFIG_SIPI_VECTOR_IN_ROM is not set
-CONFIG_RAMBASE=0xe00000
-CONFIG_RAMTOP=0x1000000
-# CONFIG_CBMEM_TOP_BACKUP is not set
-CONFIG_PC80_SYSTEM=y
-# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
-# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
-# CONFIG_HPET_ADDRESS_OVERRIDE is not set
-CONFIG_HPET_ADDRESS=0xfed00000
-CONFIG_ID_SECTION_OFFSET=0x80
-# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
-# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
-CONFIG_ACPI_HAVE_PCAT_8259=y
-# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
-# CONFIG_IDT_IN_EVERY_STAGE is not set
-# CONFIG_PIRQ_ROUTE is not set
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
-CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
-# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
-CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
-# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_SMBUS_HAS_AUX_CHANNELS=y
-CONFIG_PCI=y
-# CONFIG_NO_MMCONF_SUPPORT is not set
-CONFIG_MMCONF_SUPPORT=y
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_VGA_BIOS_DGPU=y
-CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
-CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
-# CONFIG_SOFTWARE_I2C is not set
-
-#
-# Generic Drivers
-#
-# CONFIG_DRIVERS_AS3722_RTC is not set
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
-# CONFIG_GIC is not set
-CONFIG_IPMI_KCS=y
-CONFIG_IPMI_KCS_TIMEOUT_MS=5000
-# CONFIG_DRIVERS_LENOVO_WACOM is not set
-# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
-# CONFIG_RT8168_SET_LED_MODE is not set
-# CONFIG_SMMSTORE_IN_CBFS is not set
-CONFIG_SPI_FLASH=y
-# CONFIG_SPI_SDCARD is not set
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
-# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
-# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
-# CONFIG_NO_UART_ON_SUPERIO is not set
-# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
-# CONFIG_UART_OVERRIDE_REFCLK is not set
-# CONFIG_DRIVERS_UART_8250MEM is not set
-# CONFIG_DRIVERS_UART_8250MEM_32 is not set
-# CONFIG_HAVE_UART_SPECIAL is not set
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-# CONFIG_DRIVERS_UART_PL011 is not set
-# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_WIFI is not set
-# CONFIG_DRIVERS_AMD_PI is not set
-CONFIG_DRIVERS_ASPEED_AST2050=y
-CONFIG_DRIVERS_ASPEED_AST_COMMON=y
-# CONFIG_DRIVERS_I2C_MAX98373 is not set
-# CONFIG_DRIVERS_I2C_MAX98927 is not set
-# CONFIG_DRIVERS_I2C_PCA9538 is not set
-# CONFIG_DRIVERS_I2C_PCF8523 is not set
-# CONFIG_DRIVERS_I2C_PTN3460 is not set
-# CONFIG_DRIVERS_I2C_RT1011 is not set
-# CONFIG_DRIVERS_I2C_RT5663 is not set
-# CONFIG_DRIVERS_I2C_RTD2132 is not set
-# CONFIG_DRIVERS_I2C_RX6110SA is not set
-# CONFIG_DRIVERS_I2C_SX9310 is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
-CONFIG_DRIVERS_I2C_W83795=y
-# CONFIG_PLATFORM_USES_FSP1_0 is not set
-# CONFIG_PLATFORM_USES_FSP2_0 is not set
-# CONFIG_PLATFORM_USES_FSP2_1 is not set
-# CONFIG_INTEL_DDI is not set
-# CONFIG_INTEL_EDID is not set
-# CONFIG_INTEL_INT15 is not set
-# CONFIG_INTEL_GMA_ACPI is not set
-# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
-# CONFIG_INTEL_GMA_SWSMISCI is not set
-# CONFIG_DRIVER_INTEL_I210 is not set
-# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
-# CONFIG_HAVE_INTEL_PTT is not set
-# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
-# CONFIG_DRIVER_MAXIM_MAX77686 is not set
-# CONFIG_DRIVER_PARADE_PS8625 is not set
-# CONFIG_DRIVER_PARADE_PS8640 is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_LPC_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_MAINBOARD_HAS_LPC_TPM=y
-CONFIG_VGA=y
-# CONFIG_DRIVERS_RICOH_RCE822 is not set
-# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
-# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
-# CONFIG_DRIVERS_SIL_3114 is not set
-# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
-# CONFIG_DRIVER_TI_TPS65090 is not set
-# CONFIG_DRIVERS_TI_TPS65913 is not set
-# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
-# CONFIG_DRIVERS_USB_ACPI is not set
-# CONFIG_COMMONLIB_STORAGE is not set
-
-#
-# Security
-#
-
-#
-# Verified Boot (vboot)
-#
-
-#
-# Trusted Platform Module
-#
-CONFIG_USER_NO_TPM=y
-# CONFIG_USER_TPM1 is not set
-# CONFIG_USER_TPM2 is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-
-#
-# Memory initialization
-#
-# CONFIG_STM is not set
-# CONFIG_ACPI_SATA_GENERATOR is not set
-# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
-# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
-# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
-# CONFIG_RTC is not set
-
-#
-# Console
-#
-CONFIG_SQUELCH_EARLY_SMP=y
-CONFIG_CONSOLE_SERIAL=y
-
-#
-# I/O mapped, 8250-compatible
-#
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_BAUD=115200
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-CONFIG_HWBASE_DEBUG_CB=y
-CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
-CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
-CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
-# CONFIG_NO_MONOTONIC_TIMER is not set
-CONFIG_HAVE_MONOTONIC_TIMER=y
-# CONFIG_TIMER_QUEUE is not set
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_PCI_IO_CFG_EXT=y
-CONFIG_IOAPIC=y
-# CONFIG_USE_WATCHDOG_ON_BOOT is not set
-# CONFIG_GFXUMA is not set
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_HAVE_MP_TABLE=y
-CONFIG_HAVE_PIRQ_TABLE=y
-# CONFIG_COMMON_FADT is not set
-# CONFIG_ACPI_NHLT is not set
-
-#
-# System tables
-#
-CONFIG_GENERATE_MP_TABLE=y
-CONFIG_GENERATE_PIRQ_TABLE=y
-CONFIG_GENERATE_SMBIOS_TABLES=y
-# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_BAYOU is not set
-# CONFIG_PAYLOAD_FILO is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_LINUXBOOT is not set
-# CONFIG_PAYLOAD_SEABIOS is not set
-# CONFIG_PAYLOAD_UBOOT is not set
-# CONFIG_PAYLOAD_YABITS is not set
-# CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PXE is not set
-# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
-# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
-# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
-# CONFIG_TINT_SECONDARY_PAYLOAD is not set
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-CONFIG_HAVE_DEBUG_CAR=y
-# CONFIG_DEBUG_CAR is not set
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_RAM_SETUP=y
-# CONFIG_DEBUG_RAM_SETUP is not set
-# CONFIG_DEBUG_PIRQ is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_IPMI is not set
-# CONFIG_TRACE is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_HAVE_EM100_SUPPORT is not set
-CONFIG_ENABLE_APIC_EXT_ID=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
-# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
-# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
-# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
-# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
-# CONFIG_REG_SCRIPT is not set
-# CONFIG_NO_XIP_EARLY_STAGES is not set
-# CONFIG_EARLY_CBMEM_LIST is not set
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_NO_STAGE_CACHE=y
-CONFIG_BOOTBLOCK_CUSTOM=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg b/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
deleted file mode 100644
index 5b4010d8..00000000
--- a/config/coreboot/kgpe-d16-udimm_16mb/target.cfg
+++ /dev/null
@@ -1,8 +0,0 @@
-tree="fam15h_udimm"
-xtree="fam15h_rdimm"
-xarch="i386-elf"
-payload_seabios="y"
-payload_seabios_withgrub="y"
-payload_memtest="y"
-xlang="c"
-grub_timeout=10
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kgpe-d16-udimm_2mb/config/libgfxinit_txtmode
deleted file mode 100644
index 060966a5..00000000
--- a/config/coreboot/kgpe-d16-udimm_2mb/config/libgfxinit_txtmode
+++ /dev/null
@@ -1,713 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# coreboot configuration
-#
-
-#
-# General setup
-#
-CONFIG_COREBOOT_BUILD=y
-CONFIG_LOCALVERSION=""
-CONFIG_CBFS_PREFIX="fallback"
-CONFIG_COMPILER_GCC=y
-# CONFIG_COMPILER_LLVM_CLANG is not set
-# CONFIG_ANY_TOOLCHAIN is not set
-# CONFIG_CCACHE is not set
-# CONFIG_FMD_GENPARSER is not set
-# CONFIG_UTIL_GENPARSER is not set
-CONFIG_USE_OPTION_TABLE=y
-CONFIG_STATIC_OPTION_TABLE=y
-CONFIG_COMPRESS_RAMSTAGE=y
-CONFIG_INCLUDE_CONFIG_FILE=y
-CONFIG_COLLECT_TIMESTAMPS=y
-# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
-CONFIG_USE_BLOBS=y
-# CONFIG_USE_AMD_BLOBS is not set
-# CONFIG_COVERAGE is not set
-# CONFIG_UBSAN is not set
-CONFIG_NO_RELOCATABLE_RAMSTAGE=y
-# CONFIG_RELOCATABLE_RAMSTAGE is not set
-# CONFIG_UPDATE_IMAGE is not set
-# CONFIG_BOOTSPLASH_IMAGE is not set
-
-#
-# Mainboard
-#
-
-#
-# Important: Run 'make distclean' before switching boards
-#
-# CONFIG_VENDOR_ADI is not set
-# CONFIG_VENDOR_ADLINK is not set
-# CONFIG_VENDOR_ADVANSUS is not set
-# CONFIG_VENDOR_AMD is not set
-# CONFIG_VENDOR_AOPEN is not set
-# CONFIG_VENDOR_APPLE is not set
-# CONFIG_VENDOR_ASROCK is not set
-CONFIG_VENDOR_ASUS=y
-# CONFIG_VENDOR_AVALUE is not set
-# CONFIG_VENDOR_BAP is not set
-# CONFIG_VENDOR_BIOSTAR is not set
-# CONFIG_VENDOR_CAVIUM is not set
-# CONFIG_VENDOR_COMPULAB is not set
-# CONFIG_VENDOR_ELMEX is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_ESD is not set
-# CONFIG_VENDOR_FACEBOOK is not set
-# CONFIG_VENDOR_FOXCONN is not set
-# CONFIG_VENDOR_GETAC is not set
-# CONFIG_VENDOR_GIGABYTE is not set
-# CONFIG_VENDOR_GIZMOSPHERE is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_HP is not set
-# CONFIG_VENDOR_IBASE is not set
-# CONFIG_VENDOR_IEI is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_VENDOR_JETWAY is not set
-# CONFIG_VENDOR_KONTRON is not set
-# CONFIG_VENDOR_LENOVO is not set
-# CONFIG_VENDOR_LIPPERT is not set
-# CONFIG_VENDOR_MSI is not set
-# CONFIG_VENDOR_OCP is not set
-# CONFIG_VENDOR_OPENCELLULAR is not set
-# CONFIG_VENDOR_PACKARDBELL is not set
-# CONFIG_VENDOR_PCENGINES is not set
-# CONFIG_VENDOR_PORTWELL is not set
-# CONFIG_VENDOR_PURISM is not set
-# CONFIG_VENDOR_RAZER is not set
-# CONFIG_VENDOR_RODA is not set
-# CONFIG_VENDOR_SAMSUNG is not set
-# CONFIG_VENDOR_SAPPHIRE is not set
-# CONFIG_VENDOR_SCALEWAY is not set
-# CONFIG_VENDOR_SIEMENS is not set
-# CONFIG_VENDOR_SIFIVE is not set
-# CONFIG_VENDOR_SUPERMICRO is not set
-# CONFIG_VENDOR_TI is not set
-# CONFIG_VENDOR_TYAN is not set
-# CONFIG_VENDOR_UP is not set
-# CONFIG_VENDOR_VIA is not set
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-CONFIG_MAINBOARD_DIR="asus/kgpe-d16"
-CONFIG_MAINBOARD_PART_NUMBER="KGPE-D16"
-CONFIG_MAX_CPUS=32
-CONFIG_CBFS_SIZE=0x200000
-CONFIG_UART_FOR_CONSOLE=0
-CONFIG_MAINBOARD_VENDOR="ASUS"
-CONFIG_APIC_ID_OFFSET=0x0
-CONFIG_HW_MEM_HOLE_SIZEK=0x100000
-CONFIG_MAX_PHYSICAL_CPUS=4
-CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
-CONFIG_HT_CHAIN_UNITID_BASE=0x0
-CONFIG_IRQ_SLOT_COUNT=13
-CONFIG_VGA_BIOS_ID="1000,0072"
-CONFIG_ONBOARD_VGA_IS_PRIMARY=y
-CONFIG_DIMM_SPD_SIZE=256
-CONFIG_VGA_BIOS=y
-CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
-CONFIG_VGA_BIOS_FILE="/dev/null"
-CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
-CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
-CONFIG_DEVICETREE="devicetree.cb"
-CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
-# CONFIG_BOARD_ASUS_AM1I_A is not set
-# CONFIG_BOARD_ASUS_F2A85_M is not set
-# CONFIG_BOARD_ASUS_F2A85_M_PRO is not set
-# CONFIG_BOARD_ASUS_F2A85_M_LE is not set
-# CONFIG_BOARD_ASUS_H61M_CS is not set
-# CONFIG_BOARD_ASUS_KCMA_D8 is not set
-# CONFIG_BOARD_ASUS_KFSN4_DRE is not set
-CONFIG_BOARD_ASUS_KGPE_D16=y
-# CONFIG_BOARD_ASUS_M4A78_EM is not set
-# CONFIG_BOARD_ASUS_M4A785M is not set
-# CONFIG_BOARD_ASUS_M4A785TM is not set
-# CONFIG_BOARD_ASUS_M5A88_V is not set
-# CONFIG_BOARD_ASUS_MAXIMUS_IV_GENE_Z is not set
-# CONFIG_BOARD_ASUS_P2B_D is not set
-# CONFIG_BOARD_ASUS_P2B_DS is not set
-# CONFIG_BOARD_ASUS_P2B_F is not set
-# CONFIG_BOARD_ASUS_P2B_LS is not set
-# CONFIG_BOARD_ASUS_P2B is not set
-# CONFIG_BOARD_ASUS_P3B_F is not set
-# CONFIG_BOARD_ASUS_P5GC_MX is not set
-# CONFIG_BOARD_ASUS_P5QC is not set
-# CONFIG_BOARD_ASUS_P5Q_PRO is not set
-# CONFIG_BOARD_ASUS_P5QL_PRO is not set
-# CONFIG_BOARD_ASUS_P5QL_EM is not set
-# CONFIG_BOARD_ASUS_P5QPL_AM is not set
-# CONFIG_BOARD_ASUS_P5G41T_M_LX is not set
-# CONFIG_BOARD_ASUS_P8H61_M_LX is not set
-# CONFIG_BOARD_ASUS_P8H61_M_PRO is not set
-# CONFIG_BOARD_ASUS_P8Z77_M_PRO is not set
-CONFIG_POST_IO=y
-CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kgpe-d16/bootblock.c"
-CONFIG_DCACHE_RAM_BASE=0xc2000
-CONFIG_DCACHE_RAM_SIZE=0x1e000
-CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f
-CONFIG_MAX_REBOOT_CNT=10
-CONFIG_OVERRIDE_DEVICETREE=""
-CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
-CONFIG_FMDFILE=""
-# CONFIG_VBOOT is not set
-CONFIG_MMCONF_BASE_ADDRESS=0xc0000000
-CONFIG_POST_DEVICE=y
-CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
-CONFIG_SPI_FLASH_WINBOND=y
-# CONFIG_DRIVERS_INTEL_WIFI is not set
-CONFIG_DRIVERS_UART_8250IO=y
-CONFIG_DIMM_MAX=4
-CONFIG_TPM_PIRQ=0x0
-CONFIG_TTYS0_LCS=3
-CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KGPE-D16"
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
-# CONFIG_USBDEBUG is not set
-CONFIG_IPMI_KCS_REGISTER_SPACING=1
-CONFIG_IPMI_FRU_SINGLE_RW_SZ=16
-CONFIG_MAINBOARD_VERSION="1.0"
-# CONFIG_DRIVERS_PS2_KEYBOARD is not set
-CONFIG_PCIEXP_L1_SUB_STATE=y
-# CONFIG_NO_POST is not set
-CONFIG_SMBIOS_ENCLOSURE_TYPE=0x03
-CONFIG_HEAP_SIZE=0xc0000
-# CONFIG_CONSOLE_POST is not set
-CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
-CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
-CONFIG_BOARD_ROMSIZE_KB_2048=y
-# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
-CONFIG_COREBOOT_ROMSIZE_KB_2048=y
-# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
-# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
-CONFIG_COREBOOT_ROMSIZE_KB=2048
-CONFIG_ROM_SIZE=0x200000
-CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
-CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
-CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
-CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
-# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
-CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
-# CONFIG_SYSTEM_TYPE_LAPTOP is not set
-# CONFIG_SYSTEM_TYPE_TABLET is not set
-# CONFIG_SYSTEM_TYPE_DETACHABLE is not set
-# CONFIG_SYSTEM_TYPE_CONVERTIBLE is not set
-# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
-
-#
-# Chipset
-#
-
-#
-# SoC
-#
-CONFIG_HAVE_BOOTBLOCK=y
-CONFIG_CPU_ADDR_BITS=48
-CONFIG_MMCONF_BUS_NUMBER=256
-CONFIG_EHCI_BAR=0xfef00000
-CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
-# CONFIG_SOC_CAVIUM_CN81XX is not set
-CONFIG_ARCH_ARMV8_EXTENSION=0
-CONFIG_STACK_SIZE=0x1000
-# CONFIG_SOC_CAVIUM_COMMON is not set
-# CONFIG_SOC_INTEL_GLK is not set
-CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
-CONFIG_ROMSTAGE_ADDR=0x2000000
-CONFIG_VERSTAGE_ADDR=0x2000000
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_COMMON_CLOCK=y
-CONFIG_PCIEXP_CLK_PM=y
-CONFIG_TTYS0_BASE=0x3f8
-CONFIG_HPET_MIN_TICKS=0x14
-CONFIG_UART_PCI_ADDR=0x0
-# CONFIG_SOC_MEDIATEK_MT8173 is not set
-# CONFIG_SOC_MEDIATEK_MT8183 is not set
-# CONFIG_SOC_NVIDIA_TEGRA124 is not set
-# CONFIG_SOC_NVIDIA_TEGRA210 is not set
-# CONFIG_SOC_QUALCOMM_COMMON is not set
-# CONFIG_SOC_QC_IPQ40XX is not set
-# CONFIG_SOC_QC_IPQ806X is not set
-# CONFIG_SOC_QUALCOMM_QCS405 is not set
-# CONFIG_SOC_QUALCOMM_SC7180 is not set
-# CONFIG_SOC_QUALCOMM_SDM845 is not set
-# CONFIG_SOC_ROCKCHIP_RK3288 is not set
-# CONFIG_SOC_ROCKCHIP_RK3399 is not set
-# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
-# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
-# CONFIG_SOC_UCB_RISCV is not set
-
-#
-# CPU
-#
-CONFIG_CPU_SOCKET_TYPE=0x15
-# CONFIG_EXT_RT_TBL_SUPPORT is not set
-CONFIG_CBB=0x0
-CONFIG_CDB=0x18
-CONFIG_XIP_ROM_SIZE=0x80000
-CONFIG_CPU_AMD_SOCKET_G34_NON_AGESA=y
-CONFIG_CPU_AMD_MODEL_10XXX=y
-CONFIG_USE_LARGE_DCACHE=y
-CONFIG_NUM_IPI_STARTS=1
-CONFIG_DCACHE_BSP_TOP_STACK_SIZE=0x4000
-CONFIG_DCACHE_BSP_TOP_STACK_SLUSH=0x4000
-CONFIG_DCACHE_AP_STACK_SIZE=0x500
-CONFIG_SET_FIDVID=y
-CONFIG_LIFT_BSP_APIC_ID=y
-CONFIG_SET_FIDVID_DEBUG=y
-CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST=y
-# CONFIG_SET_FIDVID_CORE0_ONLY is not set
-CONFIG_SET_FIDVID_CORE_RANGE=0
-CONFIG_UDELAY_LAPIC_FIXED_FSB=200
-# CONFIG_CPU_AMD_AGESA is not set
-# CONFIG_CPU_AMD_PI is not set
-# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
-CONFIG_SSE2=y
-# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
-# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
-# CONFIG_CPU_TI_AM335X is not set
-CONFIG_PARALLEL_CPU_INIT=y
-# CONFIG_PARALLEL_MP is not set
-CONFIG_UDELAY_LAPIC=y
-# CONFIG_LAPIC_MONOTONIC_TIMER is not set
-# CONFIG_UDELAY_TSC is not set
-CONFIG_TSC_SYNC_LFENCE=y
-# CONFIG_TSC_SYNC_MFENCE is not set
-# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
-CONFIG_LOGICAL_CPUS=y
-# CONFIG_HAVE_SMI_HANDLER is not set
-# CONFIG_NO_SMM is not set
-# CONFIG_SMM_ASEG is not set
-CONFIG_SMM_TSEG=y
-CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
-CONFIG_SMM_STUB_STACK_SIZE=0x400
-# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
-# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
-CONFIG_X86_AMD_FIXED_MTRRS=y
-# CONFIG_X86_AMD_INIT_SIPI is not set
-# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
-# CONFIG_SOC_SETS_MSRS is not set
-CONFIG_CAR_GLOBAL_MIGRATION=y
-CONFIG_SMP=y
-CONFIG_SSE=y
-CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
-# CONFIG_USES_MICROCODE_HEADER_FILES is not set
-CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
-CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
-# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
-CONFIG_CPU_MICROCODE_MULTIPLE_FILES=y
-
-#
-# Northbridge
-#
-# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
-CONFIG_NORTHBRIDGE_AMD_AMDFAM10=y
-CONFIG_AGP_APERTURE_SIZE=0x4000000
-CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/amd/amdfam10/bootblock.c"
-CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y
-# CONFIG_HT_CHAIN_DISTRIBUTE is not set
-# CONFIG_DIMM_DDR2 is not set
-CONFIG_DIMM_DDR3=y
-CONFIG_DIMM_REGISTERED=y
-CONFIG_DIMM_VOLTAGE_SET_SUPPORT=y
-# CONFIG_SVI_HIGH_FREQ is not set
-
-#
-# HyperTransport setup
-#
-# CONFIG_LIMIT_HT_DOWN_WIDTH_8 is not set
-CONFIG_LIMIT_HT_DOWN_WIDTH_16=y
-# CONFIG_LIMIT_HT_UP_WIDTH_8 is not set
-CONFIG_LIMIT_HT_UP_WIDTH_16=y
-# CONFIG_NORTHBRIDGE_AMD_PI is not set
-
-#
-# Southbridge
-#
-CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
-CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
-# CONFIG_AMD_SB_CIMX is not set
-# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
-# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
-CONFIG_SOUTHBRIDGE_AMD_SB700=y
-CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y
-CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
-# CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT is not set
-CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA=y
-CONFIG_SOUTHBRIDGE_AMD_SR5650=y
-CONFIG_EXT_CONF_SUPPORT=y
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
-# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
-# CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG is not set
-# CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE is not set
-
-#
-# Super I/O
-#
-# CONFIG_SUPERIO_ASPEED_AST2400 is not set
-# CONFIG_SUPERIO_ASPEED_COMMON_PRE_RAM is not set
-# CONFIG_SUPERIO_ASPEED_HAS_UART_DELAY_WORKAROUND is not set
-# CONFIG_SUPERIO_FINTEK_FAN_CONTROL is not set
-CONFIG_SUPERIO_WINBOND_COMMON_PRE_RAM=y
-CONFIG_SUPERIO_WINBOND_W83667HG_A=y
-
-#
-# Embedded Controllers
-#
-# CONFIG_EC_GOOGLE_WILCO is not set
-# CONFIG_CAVIUM_BDK is not set
-# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
-# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
-# CONFIG_UEFI_2_4_BINDING is not set
-# CONFIG_UDK_2015_BINDING is not set
-# CONFIG_UDK_2017_BINDING is not set
-# CONFIG_USE_SIEMENS_HWILIB is not set
-# CONFIG_ARM_LPAE is not set
-CONFIG_ARCH_X86=y
-CONFIG_ARCH_BOOTBLOCK_X86_32=y
-CONFIG_ARCH_VERSTAGE_X86_32=y
-CONFIG_ARCH_ROMSTAGE_X86_32=y
-# CONFIG_ARCH_POSTCAR_X86_32 is not set
-CONFIG_ARCH_RAMSTAGE_X86_32=y
-# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
-# CONFIG_ARCH_VERSTAGE_X86_64 is not set
-# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
-# CONFIG_ARCH_POSTCAR_X86_64 is not set
-# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
-# CONFIG_USE_MARCH_586 is not set
-# CONFIG_AP_IN_SIPI_WAIT is not set
-# CONFIG_SIPI_VECTOR_IN_ROM is not set
-CONFIG_RAMBASE=0xe00000
-CONFIG_RAMTOP=0x1000000
-# CONFIG_CBMEM_TOP_BACKUP is not set
-CONFIG_PC80_SYSTEM=y
-# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
-CONFIG_HAVE_CMOS_DEFAULT=y
-CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
-CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
-# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
-# CONFIG_HPET_ADDRESS_OVERRIDE is not set
-CONFIG_HPET_ADDRESS=0xfed00000
-CONFIG_ID_SECTION_OFFSET=0x80
-# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
-# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
-CONFIG_BOOTBLOCK_SIMPLE=y
-# CONFIG_BOOTBLOCK_NORMAL is not set
-CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
-CONFIG_ACPI_HAVE_PCAT_8259=y
-# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
-CONFIG_COLLECT_TIMESTAMPS_TSC=y
-# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
-# CONFIG_IDT_IN_EVERY_STAGE is not set
-# CONFIG_PIRQ_ROUTE is not set
-
-#
-# Devices
-#
-CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
-CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
-# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
-CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
-# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
-
-#
-# Display
-#
-CONFIG_VGA_TEXT_FRAMEBUFFER=y
-CONFIG_SMBUS_HAS_AUX_CHANNELS=y
-CONFIG_PCI=y
-# CONFIG_NO_MMCONF_SUPPORT is not set
-CONFIG_MMCONF_SUPPORT=y
-CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT=y
-CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
-CONFIG_PCIEXP_PLUGIN_SUPPORT=y
-# CONFIG_EARLY_PCI_BRIDGE is not set
-CONFIG_VGA_BIOS_DGPU=y
-CONFIG_VGA_BIOS_DGPU_FILE="/dev/null"
-CONFIG_VGA_BIOS_DGPU_ID="1000,3050"
-# CONFIG_SOFTWARE_I2C is not set
-
-#
-# Generic Drivers
-#
-# CONFIG_DRIVERS_AS3722_RTC is not set
-CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
-# CONFIG_MAINBOARD_HAS_CRB_TPM is not set
-# CONFIG_GIC is not set
-CONFIG_IPMI_KCS=y
-CONFIG_IPMI_KCS_TIMEOUT_MS=5000
-# CONFIG_DRIVERS_LENOVO_WACOM is not set
-# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
-# CONFIG_RT8168_SET_LED_MODE is not set
-# CONFIG_SMMSTORE_IN_CBFS is not set
-CONFIG_SPI_FLASH=y
-# CONFIG_SPI_SDCARD is not set
-CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
-# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
-# CONFIG_SPI_FLASH_NO_FAST_READ is not set
-CONFIG_SPI_FLASH_ADESTO=y
-CONFIG_SPI_FLASH_AMIC=y
-CONFIG_SPI_FLASH_ATMEL=y
-CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
-# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
-# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
-# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
-CONFIG_DRIVERS_UART=y
-# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
-# CONFIG_NO_UART_ON_SUPERIO is not set
-# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
-# CONFIG_UART_OVERRIDE_REFCLK is not set
-# CONFIG_DRIVERS_UART_8250MEM is not set
-# CONFIG_DRIVERS_UART_8250MEM_32 is not set
-# CONFIG_HAVE_UART_SPECIAL is not set
-# CONFIG_DRIVERS_UART_OXPCIE is not set
-# CONFIG_DRIVERS_UART_PL011 is not set
-# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
-CONFIG_HAVE_USBDEBUG=y
-CONFIG_HAVE_USBDEBUG_OPTIONS=y
-# CONFIG_VPD is not set
-# CONFIG_DRIVERS_GENERIC_WIFI is not set
-# CONFIG_DRIVERS_AMD_PI is not set
-CONFIG_DRIVERS_ASPEED_AST2050=y
-CONFIG_DRIVERS_ASPEED_AST_COMMON=y
-# CONFIG_DRIVERS_I2C_MAX98373 is not set
-# CONFIG_DRIVERS_I2C_MAX98927 is not set
-# CONFIG_DRIVERS_I2C_PCA9538 is not set
-# CONFIG_DRIVERS_I2C_PCF8523 is not set
-# CONFIG_DRIVERS_I2C_PTN3460 is not set
-# CONFIG_DRIVERS_I2C_RT1011 is not set
-# CONFIG_DRIVERS_I2C_RT5663 is not set
-# CONFIG_DRIVERS_I2C_RTD2132 is not set
-# CONFIG_DRIVERS_I2C_RX6110SA is not set
-# CONFIG_DRIVERS_I2C_SX9310 is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
-# CONFIG_MAINBOARD_HAS_I2C_TPM_GENERIC is not set
-CONFIG_DRIVERS_I2C_W83795=y
-# CONFIG_PLATFORM_USES_FSP1_0 is not set
-# CONFIG_PLATFORM_USES_FSP2_0 is not set
-# CONFIG_PLATFORM_USES_FSP2_1 is not set
-# CONFIG_INTEL_DDI is not set
-# CONFIG_INTEL_EDID is not set
-# CONFIG_INTEL_INT15 is not set
-# CONFIG_INTEL_GMA_ACPI is not set
-# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
-# CONFIG_INTEL_GMA_SWSMISCI is not set
-# CONFIG_DRIVER_INTEL_I210 is not set
-# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
-# CONFIG_HAVE_INTEL_PTT is not set
-# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
-# CONFIG_DRIVER_MAXIM_MAX77686 is not set
-# CONFIG_DRIVER_PARADE_PS8625 is not set
-# CONFIG_DRIVER_PARADE_PS8640 is not set
-CONFIG_DRIVERS_MC146818=y
-CONFIG_LPC_TPM=y
-CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
-CONFIG_MAINBOARD_HAS_LPC_TPM=y
-CONFIG_VGA=y
-# CONFIG_DRIVERS_RICOH_RCE822 is not set
-# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
-# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
-# CONFIG_DRIVERS_SIL_3114 is not set
-# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
-# CONFIG_DRIVER_TI_TPS65090 is not set
-# CONFIG_DRIVERS_TI_TPS65913 is not set
-# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
-# CONFIG_DRIVERS_USB_ACPI is not set
-# CONFIG_COMMONLIB_STORAGE is not set
-
-#
-# Security
-#
-
-#
-# Verified Boot (vboot)
-#
-
-#
-# Trusted Platform Module
-#
-CONFIG_USER_NO_TPM=y
-# CONFIG_USER_TPM1 is not set
-# CONFIG_USER_TPM2 is not set
-# CONFIG_TPM_RDRESP_NEED_DELAY is not set
-
-#
-# Memory initialization
-#
-# CONFIG_STM is not set
-# CONFIG_ACPI_SATA_GENERATOR is not set
-# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
-# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
-# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
-CONFIG_BOOT_DEVICE_SPI_FLASH=y
-CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
-# CONFIG_RTC is not set
-
-#
-# Console
-#
-CONFIG_SQUELCH_EARLY_SMP=y
-CONFIG_CONSOLE_SERIAL=y
-
-#
-# I/O mapped, 8250-compatible
-#
-
-#
-# Serial port base address = 0x3f8
-#
-# CONFIG_CONSOLE_SERIAL_921600 is not set
-# CONFIG_CONSOLE_SERIAL_460800 is not set
-# CONFIG_CONSOLE_SERIAL_230400 is not set
-CONFIG_CONSOLE_SERIAL_115200=y
-# CONFIG_CONSOLE_SERIAL_57600 is not set
-# CONFIG_CONSOLE_SERIAL_38400 is not set
-# CONFIG_CONSOLE_SERIAL_19200 is not set
-# CONFIG_CONSOLE_SERIAL_9600 is not set
-CONFIG_TTYS0_BAUD=115200
-# CONFIG_SPKMODEM is not set
-# CONFIG_CONSOLE_NE2K is not set
-CONFIG_CONSOLE_CBMEM=y
-CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
-# CONFIG_CONSOLE_SPI_FLASH is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
-CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
-# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
-# CONFIG_CMOS_POST is not set
-CONFIG_POST_DEVICE_NONE=y
-# CONFIG_POST_DEVICE_LPC is not set
-# CONFIG_POST_DEVICE_PCI_PCIE is not set
-CONFIG_POST_IO_PORT=0x80
-# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
-CONFIG_HWBASE_DEBUG_CB=y
-CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
-CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
-CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
-# CONFIG_NO_MONOTONIC_TIMER is not set
-CONFIG_HAVE_MONOTONIC_TIMER=y
-# CONFIG_TIMER_QUEUE is not set
-CONFIG_HAVE_OPTION_TABLE=y
-CONFIG_PCI_IO_CFG_EXT=y
-CONFIG_IOAPIC=y
-# CONFIG_USE_WATCHDOG_ON_BOOT is not set
-# CONFIG_GFXUMA is not set
-CONFIG_HAVE_ACPI_TABLES=y
-CONFIG_HAVE_MP_TABLE=y
-CONFIG_HAVE_PIRQ_TABLE=y
-# CONFIG_COMMON_FADT is not set
-# CONFIG_ACPI_NHLT is not set
-
-#
-# System tables
-#
-CONFIG_GENERATE_MP_TABLE=y
-CONFIG_GENERATE_PIRQ_TABLE=y
-CONFIG_GENERATE_SMBIOS_TABLES=y
-# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
-
-#
-# Payload
-#
-CONFIG_PAYLOAD_NONE=y
-# CONFIG_PAYLOAD_ELF is not set
-# CONFIG_PAYLOAD_BAYOU is not set
-# CONFIG_PAYLOAD_FILO is not set
-# CONFIG_PAYLOAD_GRUB2 is not set
-# CONFIG_PAYLOAD_LINUXBOOT is not set
-# CONFIG_PAYLOAD_SEABIOS is not set
-# CONFIG_PAYLOAD_UBOOT is not set
-# CONFIG_PAYLOAD_YABITS is not set
-# CONFIG_PAYLOAD_LINUX is not set
-# CONFIG_PAYLOAD_TIANOCORE is not set
-CONFIG_PAYLOAD_OPTIONS=""
-# CONFIG_PXE is not set
-# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
-CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
-
-#
-# Secondary Payloads
-#
-# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
-# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
-# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
-# CONFIG_TINT_SECONDARY_PAYLOAD is not set
-
-#
-# Debugging
-#
-
-#
-# CPU Debug Settings
-#
-CONFIG_HAVE_DEBUG_CAR=y
-# CONFIG_DEBUG_CAR is not set
-
-#
-# BLOB Debug Settings
-#
-
-#
-# General Debug Settings
-#
-# CONFIG_GDB_STUB is not set
-# CONFIG_FATAL_ASSERTS is not set
-# CONFIG_DEBUG_CBFS is not set
-CONFIG_HAVE_DEBUG_RAM_SETUP=y
-# CONFIG_DEBUG_RAM_SETUP is not set
-# CONFIG_DEBUG_PIRQ is not set
-CONFIG_HAVE_DEBUG_SMBUS=y
-# CONFIG_DEBUG_SMBUS is not set
-# CONFIG_DEBUG_MALLOC is not set
-# CONFIG_DEBUG_CONSOLE_INIT is not set
-# CONFIG_DEBUG_SPI_FLASH is not set
-# CONFIG_DEBUG_IPMI is not set
-# CONFIG_TRACE is not set
-# CONFIG_DEBUG_BOOT_STATE is not set
-# CONFIG_DEBUG_ADA_CODE is not set
-# CONFIG_HAVE_EM100_SUPPORT is not set
-CONFIG_ENABLE_APIC_EXT_ID=y
-CONFIG_WARNINGS_ARE_ERRORS=y
-# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
-# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
-# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
-# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
-# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
-# CONFIG_REG_SCRIPT is not set
-# CONFIG_NO_XIP_EARLY_STAGES is not set
-# CONFIG_EARLY_CBMEM_LIST is not set
-CONFIG_RELOCATABLE_MODULES=y
-CONFIG_NO_STAGE_CACHE=y
-CONFIG_BOOTBLOCK_CUSTOM=y
-CONFIG_HAVE_ROMSTAGE=y
-CONFIG_HAVE_RAMSTAGE=y
diff --git a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg b/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
deleted file mode 100644
index 5b4010d8..00000000
--- a/config/coreboot/kgpe-d16-udimm_2mb/target.cfg
+++ /dev/null
@@ -1,8 +0,0 @@
-tree="fam15h_udimm"
-xtree="fam15h_rdimm"
-xarch="i386-elf"
-payload_seabios="y"
-payload_seabios_withgrub="y"
-payload_memtest="y"
-xlang="c"
-grub_timeout=10
diff --git a/config/coreboot/kgpe-d16-rdimm_16mb/config/libgfxinit_txtmode b/config/coreboot/kgpe_d16_16mb/config/libgfxinit_txtmode
index c29a71f8..c29a71f8 100644
--- a/config/coreboot/kgpe-d16-rdimm_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kgpe_d16_16mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kgpe_d16_16mb/target.cfg b/config/coreboot/kgpe_d16_16mb/target.cfg
new file mode 100644
index 00000000..5f705f43
--- /dev/null
+++ b/config/coreboot/kgpe_d16_16mb/target.cfg
@@ -0,0 +1,9 @@
+tree="fam15h"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+xlang="c"
+grub_scan_disk="nvme ahci"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/kgpe-d16-rdimm_2mb/config/libgfxinit_txtmode b/config/coreboot/kgpe_d16_2mb/config/libgfxinit_txtmode
index 060966a5..060966a5 100644
--- a/config/coreboot/kgpe-d16-rdimm_2mb/config/libgfxinit_txtmode
+++ b/config/coreboot/kgpe_d16_2mb/config/libgfxinit_txtmode
diff --git a/config/coreboot/kgpe_d16_2mb/target.cfg b/config/coreboot/kgpe_d16_2mb/target.cfg
new file mode 100644
index 00000000..5f705f43
--- /dev/null
+++ b/config/coreboot/kgpe_d16_2mb/target.cfg
@@ -0,0 +1,9 @@
+tree="fam15h"
+xarch="i386-elf"
+payload_seabios="y"
+payload_grub="y"
+payload_memtest="y"
+xlang="c"
+grub_scan_disk="nvme ahci"
+grubtree="nvme"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/macbook11/config/libgfxinit_corebootfb b/config/coreboot/macbook11/config/libgfxinit_corebootfb
index 1fe47062..ca0b9853 100644
--- a/config/coreboot/macbook11/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -119,6 +124,9 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_BOARD_APPLE_MACBOOK21 is not set
CONFIG_BOARD_APPLE_MACBOOK11=y
# CONFIG_BOARD_APPLE_IMAC52 is not set
@@ -127,33 +135,41 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -166,6 +182,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -193,22 +210,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -219,7 +237,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
#
CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -237,13 +254,13 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
-CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -301,8 +318,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -312,6 +332,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -337,8 +359,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -349,8 +370,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -358,10 +377,6 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -379,11 +394,10 @@ CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
@@ -399,13 +413,15 @@ CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -427,6 +443,11 @@ CONFIG_VGA=y
# Trusted Platform Module
#
CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
@@ -446,6 +467,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -496,6 +520,7 @@ CONFIG_HAVE_MP_TABLE=y
#
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -515,6 +540,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#
@@ -531,6 +560,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook11/config/libgfxinit_txtmode b/config/coreboot/macbook11/config/libgfxinit_txtmode
index 5779bb7f..26d073be 100644
--- a/config/coreboot/macbook11/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -119,6 +124,9 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_BOARD_APPLE_MACBOOK21 is not set
CONFIG_BOARD_APPLE_MACBOOK11=y
# CONFIG_BOARD_APPLE_IMAC52 is not set
@@ -127,33 +135,41 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -166,6 +182,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -193,22 +210,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -219,7 +237,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
#
CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -237,13 +254,13 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
-CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -301,8 +318,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -312,6 +332,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -335,8 +357,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -347,8 +368,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -356,10 +375,6 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -377,11 +392,10 @@ CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
@@ -397,13 +411,15 @@ CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -425,6 +441,11 @@ CONFIG_VGA=y
# Trusted Platform Module
#
CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
@@ -444,6 +465,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -494,6 +518,7 @@ CONFIG_HAVE_MP_TABLE=y
#
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -513,6 +538,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#
@@ -529,6 +558,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg
index dcf5d1de..9ceb99e8 100644
--- a/config/coreboot/macbook11/target.cfg
+++ b/config/coreboot/macbook11/target.cfg
@@ -1,6 +1,6 @@
-tree="i945"
+tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
grub_scan_disk="ahci"
+build_depend="seabios/default grub/default"
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
index 634f287c..0cc0a9ec 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -21,6 +20,7 @@ CONFIG_OPTION_BACKEND_NONE=y
# CONFIG_USE_OPTION_TABLE is not set
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -35,7 +35,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -53,28 +52,33 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
@@ -88,6 +92,7 @@ CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -118,6 +123,9 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_BOARD_APPLE_MACBOOK21 is not set
CONFIG_BOARD_APPLE_MACBOOK11=y
# CONFIG_BOARD_APPLE_IMAC52 is not set
@@ -126,33 +134,41 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -165,6 +181,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -192,22 +209,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -218,7 +236,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
#
CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -236,13 +253,13 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
-CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -300,8 +317,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -311,6 +331,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -336,8 +358,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -348,8 +369,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -357,10 +376,6 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -378,11 +393,10 @@ CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
@@ -398,13 +412,15 @@ CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -426,6 +442,11 @@ CONFIG_VGA=y
# Trusted Platform Module
#
CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
@@ -445,6 +466,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -495,6 +519,7 @@ CONFIG_HAVE_MP_TABLE=y
#
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -514,6 +539,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#
@@ -531,6 +560,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
index 6549df1b..735a7be0 100644
--- a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -21,6 +20,7 @@ CONFIG_OPTION_BACKEND_NONE=y
# CONFIG_USE_OPTION_TABLE is not set
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -35,7 +35,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -53,28 +52,33 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
@@ -88,6 +92,7 @@ CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -118,6 +123,9 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_BOARD_APPLE_MACBOOK21 is not set
CONFIG_BOARD_APPLE_MACBOOK11=y
# CONFIG_BOARD_APPLE_IMAC52 is not set
@@ -126,33 +134,41 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -165,6 +181,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -192,22 +209,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -218,7 +236,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
#
CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -236,13 +253,13 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
-CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -300,8 +317,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -311,6 +331,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -334,8 +356,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -346,8 +367,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -355,10 +374,6 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -376,11 +391,10 @@ CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
@@ -396,13 +410,15 @@ CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -424,6 +440,11 @@ CONFIG_VGA=y
# Trusted Platform Module
#
CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
@@ -443,6 +464,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -493,6 +517,7 @@ CONFIG_HAVE_MP_TABLE=y
#
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -512,6 +537,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#
@@ -529,6 +558,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg
index dcf5d1de..a53a1668 100644
--- a/config/coreboot/macbook11_16mb/target.cfg
+++ b/config/coreboot/macbook11_16mb/target.cfg
@@ -1,6 +1,6 @@
-tree="i945"
+tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
-grub_scan_disk="ahci"
+payload_grub="y"
+scan_scan_disk="ahci"
+build_depend="seabios/default grub/default"
diff --git a/config/coreboot/macbook21/config/libgfxinit_corebootfb b/config/coreboot/macbook21/config/libgfxinit_corebootfb
index 900e1b32..9dc95583 100644
--- a/config/coreboot/macbook21/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -119,6 +124,9 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_BOARD_APPLE_MACBOOK21=y
# CONFIG_BOARD_APPLE_MACBOOK11 is not set
# CONFIG_BOARD_APPLE_IMAC52 is not set
@@ -127,33 +135,41 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -166,6 +182,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -193,22 +210,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -219,7 +237,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
#
CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -237,13 +254,13 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
-CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -301,8 +318,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -312,6 +332,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -337,8 +359,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -349,8 +370,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -358,10 +377,6 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -379,11 +394,10 @@ CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
@@ -399,13 +413,15 @@ CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -427,6 +443,11 @@ CONFIG_VGA=y
# Trusted Platform Module
#
CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
@@ -446,6 +467,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -496,6 +520,7 @@ CONFIG_HAVE_MP_TABLE=y
#
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -515,6 +540,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#
@@ -531,6 +560,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook21/config/libgfxinit_txtmode b/config/coreboot/macbook21/config/libgfxinit_txtmode
index 49cde773..e73ddf4e 100644
--- a/config/coreboot/macbook21/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -119,6 +124,9 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_BOARD_APPLE_MACBOOK21=y
# CONFIG_BOARD_APPLE_MACBOOK11 is not set
# CONFIG_BOARD_APPLE_IMAC52 is not set
@@ -127,33 +135,41 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -166,6 +182,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -193,22 +210,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -219,7 +237,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
#
CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -237,13 +254,13 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
-CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -301,8 +318,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -312,6 +332,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -335,8 +357,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -347,8 +368,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -356,10 +375,6 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -377,11 +392,10 @@ CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
@@ -397,13 +411,15 @@ CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -425,6 +441,11 @@ CONFIG_VGA=y
# Trusted Platform Module
#
CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
@@ -444,6 +465,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -494,6 +518,7 @@ CONFIG_HAVE_MP_TABLE=y
#
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -513,6 +538,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#
@@ -529,6 +558,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg
index bb56ec25..4a9af479 100644
--- a/config/coreboot/macbook21/target.cfg
+++ b/config/coreboot/macbook21/target.cfg
@@ -1,7 +1,6 @@
-tree="i945"
+tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
index 70287afc..d760ec5e 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -21,6 +20,7 @@ CONFIG_OPTION_BACKEND_NONE=y
# CONFIG_USE_OPTION_TABLE is not set
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -35,7 +35,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -53,28 +52,33 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
@@ -88,6 +92,7 @@ CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -118,6 +123,9 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_BOARD_APPLE_MACBOOK21=y
# CONFIG_BOARD_APPLE_MACBOOK11 is not set
# CONFIG_BOARD_APPLE_IMAC52 is not set
@@ -126,33 +134,41 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -165,6 +181,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -192,22 +209,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -218,7 +236,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
#
CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -236,13 +253,13 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
-CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -300,8 +317,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -311,6 +331,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -336,8 +358,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -348,8 +369,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -357,10 +376,6 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -378,11 +393,10 @@ CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
@@ -398,13 +412,15 @@ CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -426,6 +442,11 @@ CONFIG_VGA=y
# Trusted Platform Module
#
CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
@@ -445,6 +466,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -495,6 +519,7 @@ CONFIG_HAVE_MP_TABLE=y
#
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -514,6 +539,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#
@@ -531,6 +560,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
index e9712d24..1533d3c6 100644
--- a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -21,6 +20,7 @@ CONFIG_OPTION_BACKEND_NONE=y
# CONFIG_USE_OPTION_TABLE is not set
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -35,7 +35,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -53,28 +52,33 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
@@ -88,6 +92,7 @@ CONFIG_VENDOR_APPLE=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -118,6 +123,9 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_BOARD_APPLE_MACBOOK21=y
# CONFIG_BOARD_APPLE_MACBOOK11 is not set
# CONFIG_BOARD_APPLE_IMAC52 is not set
@@ -126,33 +134,41 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc."
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -165,6 +181,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -192,22 +209,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -218,7 +236,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
#
CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -236,13 +253,13 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
-CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -300,8 +317,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -311,6 +331,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -334,8 +356,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -346,8 +367,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -355,10 +374,6 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -376,11 +391,10 @@ CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
@@ -396,13 +410,15 @@ CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_USE_PC_CMOS_ALTCENTURY=y
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -424,6 +440,11 @@ CONFIG_VGA=y
# Trusted Platform Module
#
CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
@@ -443,6 +464,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -493,6 +517,7 @@ CONFIG_HAVE_MP_TABLE=y
#
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -512,6 +537,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#
@@ -529,6 +558,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg
index bb56ec25..4a9af479 100644
--- a/config/coreboot/macbook21_16mb/target.cfg
+++ b/config/coreboot/macbook21_16mb/target.cfg
@@ -1,7 +1,6 @@
-tree="i945"
+tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
diff --git a/config/coreboot/next/patches/0001-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch b/config/coreboot/next/patches/0001-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
new file mode 100644
index 00000000..e6af410a
--- /dev/null
+++ b/config/coreboot/next/patches/0001-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
@@ -0,0 +1,708 @@
+From 8b951349f2ef77916633c817ad2fc1decd5c0920 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Mon, 30 Sep 2024 20:44:38 -0400
+Subject: [PATCH 1/3] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
+
+Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/optiplex_780/Kconfig | 40 ++++
+ src/mainboard/dell/optiplex_780/Kconfig.name | 4 +
+ src/mainboard/dell/optiplex_780/Makefile.mk | 10 +
+ src/mainboard/dell/optiplex_780/acpi/ec.asl | 5 +
+ .../dell/optiplex_780/acpi/ich10_pci_irqs.asl | 32 ++++
+ .../dell/optiplex_780/acpi/superio.asl | 18 ++
+ .../dell/optiplex_780/board_info.txt | 6 +
+ src/mainboard/dell/optiplex_780/cmos.default | 8 +
+ src/mainboard/dell/optiplex_780/cmos.layout | 72 ++++++++
+ src/mainboard/dell/optiplex_780/cstates.c | 8 +
+ src/mainboard/dell/optiplex_780/devicetree.cb | 63 +++++++
+ src/mainboard/dell/optiplex_780/dsdt.asl | 26 +++
+ .../dell/optiplex_780/gma-mainboard.ads | 16 ++
+ .../optiplex_780/variants/780_mt/data.vbt | Bin 0 -> 1917 bytes
+ .../optiplex_780/variants/780_mt/early_init.c | 12 ++
+ .../dell/optiplex_780/variants/780_mt/gpio.c | 174 ++++++++++++++++++
+ .../optiplex_780/variants/780_mt/hda_verb.c | 26 +++
+ .../variants/780_mt/overridetree.cb | 10 +
+ 18 files changed, 530 insertions(+)
+ create mode 100644 src/mainboard/dell/optiplex_780/Kconfig
+ create mode 100644 src/mainboard/dell/optiplex_780/Kconfig.name
+ create mode 100644 src/mainboard/dell/optiplex_780/Makefile.mk
+ create mode 100644 src/mainboard/dell/optiplex_780/acpi/ec.asl
+ create mode 100644 src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl
+ create mode 100644 src/mainboard/dell/optiplex_780/acpi/superio.asl
+ create mode 100644 src/mainboard/dell/optiplex_780/board_info.txt
+ create mode 100644 src/mainboard/dell/optiplex_780/cmos.default
+ create mode 100644 src/mainboard/dell/optiplex_780/cmos.layout
+ create mode 100644 src/mainboard/dell/optiplex_780/cstates.c
+ create mode 100644 src/mainboard/dell/optiplex_780/devicetree.cb
+ create mode 100644 src/mainboard/dell/optiplex_780/dsdt.asl
+ create mode 100644 src/mainboard/dell/optiplex_780/gma-mainboard.ads
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/data.vbt
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb
+
+diff --git a/src/mainboard/dell/optiplex_780/Kconfig b/src/mainboard/dell/optiplex_780/Kconfig
+new file mode 100644
+index 0000000000..2d06c75c9a
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/Kconfig
+@@ -0,0 +1,40 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++config BOARD_DELL_OPTIPLEX_780_COMMON
++ def_bool n
++ select BOARD_ROMSIZE_KB_8192
++ select CPU_INTEL_SOCKET_LGA775
++ select DRIVERS_I2C_CK505
++ select HAVE_ACPI_RESUME
++ select HAVE_ACPI_TABLES
++ select HAVE_CMOS_DEFAULT
++ select HAVE_OPTION_TABLE
++ select INTEL_GMA_HAVE_VBT
++ select MAINBOARD_HAS_LIBGFXINIT
++ select MAINBOARD_USES_IFD_GBE_REGION
++ select NORTHBRIDGE_INTEL_X4X
++ select PCIEXP_ASPM
++ select PCIEXP_CLK_PM
++ select SOUTHBRIDGE_INTEL_I82801JX
++
++config BOARD_DELL_OPTIPLEX_780_MT
++ select BOARD_DELL_OPTIPLEX_780_COMMON
++
++if BOARD_DELL_OPTIPLEX_780_COMMON
++
++config VGA_BIOS_ID
++ default "8086,2e22"
++
++config MAINBOARD_DIR
++ default "dell/optiplex_780"
++
++config MAINBOARD_PART_NUMBER
++ default "OptiPlex 780 MT" if BOARD_DELL_OPTIPLEX_780_MT
++
++config OVERRIDE_DEVICETREE
++ default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
++
++config VARIANT_DIR
++ default "780_mt" if BOARD_DELL_OPTIPLEX_780_MT
++
++endif # BOARD_DELL_OPTIPLEX_780_COMMON
+diff --git a/src/mainboard/dell/optiplex_780/Kconfig.name b/src/mainboard/dell/optiplex_780/Kconfig.name
+new file mode 100644
+index 0000000000..db7f2e8fe3
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/Kconfig.name
+@@ -0,0 +1,4 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++config BOARD_DELL_OPTIPLEX_780_MT
++ bool "OptiPlex 780 MT"
+diff --git a/src/mainboard/dell/optiplex_780/Makefile.mk b/src/mainboard/dell/optiplex_780/Makefile.mk
+new file mode 100644
+index 0000000000..d462995d75
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/Makefile.mk
+@@ -0,0 +1,10 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++ramstage-y += cstates.c
++romstage-y += variants/$(VARIANT_DIR)/gpio.c
++
++bootblock-y += variants/$(VARIANT_DIR)/early_init.c
++romstage-y += variants/$(VARIANT_DIR)/early_init.c
++
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
++ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
+diff --git a/src/mainboard/dell/optiplex_780/acpi/ec.asl b/src/mainboard/dell/optiplex_780/acpi/ec.asl
+new file mode 100644
+index 0000000000..479296cb76
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/acpi/ec.asl
+@@ -0,0 +1,5 @@
++/* SPDX-License-Identifier: CC-PDDC */
++
++/* Please update the license if adding licensable material. */
++
++/* dummy */
+diff --git a/src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl b/src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl
+new file mode 100644
+index 0000000000..b7588dcc41
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl
+@@ -0,0 +1,32 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++/* This is board specific information:
++ * IRQ routing for the 0:1e.0 PCI bridge of the ICH10
++ */
++
++If (PICM) {
++ Return (Package() {
++ /* PCI slot */
++ Package() { 0x0001ffff, 0, 0, 0x14},
++ Package() { 0x0001ffff, 1, 0, 0x15},
++ Package() { 0x0001ffff, 2, 0, 0x16},
++ Package() { 0x0001ffff, 3, 0, 0x17},
++
++ Package() { 0x0002ffff, 0, 0, 0x15},
++ Package() { 0x0002ffff, 1, 0, 0x16},
++ Package() { 0x0002ffff, 2, 0, 0x17},
++ Package() { 0x0002ffff, 3, 0, 0x14},
++ })
++} Else {
++ Return (Package() {
++ Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKE, 0},
++ Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKF, 0},
++ Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKG, 0},
++ Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKH, 0},
++
++ Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKF, 0},
++ Package() { 0x0002ffff, 1, \_SB.PCI0.LPCB.LNKG, 0},
++ Package() { 0x0002ffff, 2, \_SB.PCI0.LPCB.LNKH, 0},
++ Package() { 0x0002ffff, 3, \_SB.PCI0.LPCB.LNKE, 0},
++ })
++}
+diff --git a/src/mainboard/dell/optiplex_780/acpi/superio.asl b/src/mainboard/dell/optiplex_780/acpi/superio.asl
+new file mode 100644
+index 0000000000..9f3900b86c
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/acpi/superio.asl
+@@ -0,0 +1,18 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#undef SUPERIO_DEV
++#undef SUPERIO_PNP_BASE
++#undef IT8720F_SHOW_SP1
++#undef IT8720F_SHOW_SP2
++#undef IT8720F_SHOW_EC
++#undef IT8720F_SHOW_KBCK
++#undef IT8720F_SHOW_KBCM
++#undef IT8720F_SHOW_GPIO
++#undef IT8720F_SHOW_CIR
++#define SUPERIO_DEV SIO0
++#define SUPERIO_PNP_BASE 0x2e
++#define IT8720F_SHOW_EC 1
++#define IT8720F_SHOW_KBCK 1
++#define IT8720F_SHOW_KBCM 1
++#define IT8720F_SHOW_GPIO 1
++#include <superio/ite/it8720f/acpi/superio.asl>
+diff --git a/src/mainboard/dell/optiplex_780/board_info.txt b/src/mainboard/dell/optiplex_780/board_info.txt
+new file mode 100644
+index 0000000000..aaf657b583
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/board_info.txt
+@@ -0,0 +1,6 @@
++Category: desktop
++Board URL: https://www.acer.com/ac/en/GB/content/support-product/1137?b=1
++ROM package: SOIC-8
++ROM protocol: SPI
++ROM socketed: n
++Flashrom support: y
+diff --git a/src/mainboard/dell/optiplex_780/cmos.default b/src/mainboard/dell/optiplex_780/cmos.default
+new file mode 100644
+index 0000000000..23f0e55f3e
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/cmos.default
+@@ -0,0 +1,8 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++boot_option=Fallback
++debug_level=Debug
++power_on_after_fail=Disable
++nmi=Enable
++sata_mode=AHCI
++gfx_uma_size=64M
+diff --git a/src/mainboard/dell/optiplex_780/cmos.layout b/src/mainboard/dell/optiplex_780/cmos.layout
+new file mode 100644
+index 0000000000..9f5012adb4
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/cmos.layout
+@@ -0,0 +1,72 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++# -----------------------------------------------------------------
++entries
++
++# -----------------------------------------------------------------
++0 120 r 0 reserved_memory
++
++# -----------------------------------------------------------------
++# RTC_BOOT_BYTE (coreboot hardcoded)
++384 1 e 4 boot_option
++388 4 h 0 reboot_counter
++
++# -----------------------------------------------------------------
++# coreboot config options: console
++395 4 e 6 debug_level
++
++# coreboot config options: southbridge
++408 1 e 10 sata_mode
++409 2 e 7 power_on_after_fail
++411 1 e 1 nmi
++
++# coreboot config options: cpu
++
++# coreboot config options: northbridge
++432 4 e 11 gfx_uma_size
++
++# coreboot config options: check sums
++984 16 h 0 check_sum
++
++# -----------------------------------------------------------------
++
++enumerations
++
++#ID value text
++1 0 Disable
++1 1 Enable
++2 0 Enable
++2 1 Disable
++4 0 Fallback
++4 1 Normal
++6 0 Emergency
++6 1 Alert
++6 2 Critical
++6 3 Error
++6 4 Warning
++6 5 Notice
++6 6 Info
++6 7 Debug
++6 8 Spew
++7 0 Disable
++7 1 Enable
++7 2 Keep
++10 0 AHCI
++10 1 Compatible
++11 1 4M
++11 2 8M
++11 3 16M
++11 4 32M
++11 5 48M
++11 6 64M
++11 7 128M
++11 8 256M
++11 9 96M
++11 10 160M
++11 11 224M
++11 12 352M
++
++# -----------------------------------------------------------------
++checksums
++
++checksum 392 983 984
+diff --git a/src/mainboard/dell/optiplex_780/cstates.c b/src/mainboard/dell/optiplex_780/cstates.c
+new file mode 100644
+index 0000000000..4adf0edc63
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/cstates.c
+@@ -0,0 +1,8 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpigen.h>
++
++int get_cst_entries(const acpi_cstate_t **entries)
++{
++ return 0;
++}
+diff --git a/src/mainboard/dell/optiplex_780/devicetree.cb b/src/mainboard/dell/optiplex_780/devicetree.cb
+new file mode 100644
+index 0000000000..95e3bd517c
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/devicetree.cb
+@@ -0,0 +1,63 @@
++# SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/x4x
++ device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
++ device domain 0 on
++ ops x4x_pci_domain_ops # PCI domain
++ subsystemid 0x8086 0x0028 inherit
++ device pci 0.0 on end # Host Bridge
++ device pci 1.0 on end # PCIe x16 2.0 slot
++ device pci 2.0 on end # Integrated graphics controller
++ device pci 2.1 on end # Integrated graphics controller 2
++ device pci 3.0 off end # ME
++ device pci 3.1 off end # ME
++ chip southbridge/intel/i82801jx # ICH10
++ register "gpe0_en" = "0x40"
++
++ # Set AHCI mode.
++ register "sata_port_map" = "0x3f"
++ register "sata_clock_request" = "1"
++
++ # Enable PCIe ports 0,1 as slots.
++ register "pcie_slot_implemented" = "0x3"
++
++ device pci 19.0 on end # GBE
++ device pci 1a.0 on end # USB
++ device pci 1a.1 on end # USB
++ device pci 1a.2 on end # USB
++ device pci 1a.7 on end # USB
++ device pci 1b.0 on end # Audio
++ device pci 1c.0 off end # PCIe 1
++ device pci 1c.1 off end # PCIe 2
++ device pci 1c.2 off end # PCIe 3
++ device pci 1c.3 off end # PCIe 4
++ device pci 1c.4 off end # PCIe 5
++ device pci 1c.5 off end # PCIe 6
++ device pci 1d.0 on end # USB
++ device pci 1d.1 on end # USB
++ device pci 1d.2 on end # USB
++ device pci 1d.7 on end # USB
++ device pci 1e.0 on end # PCI bridge
++ device pci 1f.0 on end # LPC bridge
++ device pci 1f.2 on end # SATA (IDE: port 0-3, AHCI/RAID: 0-5)
++ device pci 1f.3 on # SMBus
++ chip drivers/i2c/ck505 # IDT CV194
++ register "mask" = "{ 0xff, 0xff, 0xff, 0xff,
++ 0xff, 0xff, 0xff, 0xff,
++ 0xff, 0xff, 0xff, 0xff,
++ 0xff, 0xff, 0xff, 0xff,
++ 0xff, 0xff, 0xff }"
++ register "regs" = "{ 0x15, 0x82, 0xff, 0xff,
++ 0xff, 0x00, 0x00, 0x95,
++ 0x00, 0x65, 0x7d, 0x56,
++ 0x13, 0xc0, 0x00, 0x07,
++ 0x01, 0x0a, 0x64 }"
++ device i2c 69 on end
++ end
++ end
++ device pci 1f.4 off end
++ device pci 1f.5 off end # SATA 2 (for port 4-5 in IDE mode)
++ device pci 1f.6 off end # Thermal Subsystem
++ end
++ end
++end
+diff --git a/src/mainboard/dell/optiplex_780/dsdt.asl b/src/mainboard/dell/optiplex_780/dsdt.asl
+new file mode 100644
+index 0000000000..9ad70469de
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/dsdt.asl
+@@ -0,0 +1,26 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi.h>
++DefinitionBlock(
++ "dsdt.aml",
++ "DSDT",
++ ACPI_DSDT_REV_2,
++ OEM_ID,
++ ACPI_TABLE_CREATOR,
++ 0x20090811 // OEM revision
++)
++{
++ #include <acpi/dsdt_top.asl>
++
++ OSYS = 2002
++ // global NVS and variables
++ #include <southbridge/intel/common/acpi/platform.asl>
++
++ Device (\_SB.PCI0)
++ {
++ #include <northbridge/intel/x4x/acpi/x4x.asl>
++ #include <southbridge/intel/i82801jx/acpi/ich10.asl>
++ }
++
++ #include <southbridge/intel/common/acpi/sleepstates.asl>
++}
+diff --git a/src/mainboard/dell/optiplex_780/gma-mainboard.ads b/src/mainboard/dell/optiplex_780/gma-mainboard.ads
+new file mode 100644
+index 0000000000..bc81cf4a40
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/gma-mainboard.ads
+@@ -0,0 +1,16 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++ ports : constant Port_List :=
++ (DP2,
++ Analog,
++ others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/data.vbt b/src/mainboard/dell/optiplex_780/variants/780_mt/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..fefda9d6f226b88ab67c5b044de30a707df22fbf
+GIT binary patch
+literal 1917
+zcmd6nO>7%Q6vzLwGv0Mv$FUpJ*ik4iQd_wnX*X`M0y3~p?8a$~>ZXxZMU`4dc9RGb
+zTXq_i1Bwd~aNr{c4i)r(goF^M-nek+sY0sMa}Sk>xFFy_FTEfX^Y+7unt+OgkeJbX
+zznS;`v-5V=o<pVaS;}Q53%NpOI!8{cz{K0eVfK65_|*A}SF)Me%$4!N`H5-z90%~a
+zvGog3fe5LjnM&o#3$<#k{6>{ZwwmnN>gY?}>{`7^JBpP$l`EBIwbi0*k&aU)n@v)E
+znI_A1T57efS5MG<y}m-_+CrVKE#0VADDft%nb#Y<<ao9;Mf?!XvM)_$Xla>NN5_ut
+zt=x`G)EjR#mlhURC^2!A3p33TcBg4-d8JyTiF&hfk}|a#&Dfe2%~V^}=4!QavNzBh
+z0Pae^5`gfb?<R!YN+PQ)U7<%H;73qF3iyQT71$?W2s|f{69_4sRY(x>7Q)c(LsP)8
+zQy)2gw<F#IP`I}U>gG1S^>aw&0D}Z+-SCcJJF;s)yXJeQ|4N{SU?$I`#$HZa<Jq(M
+zbA{r}Z0XY6<@U{Y-d!KWR>9dWBuxA$6X;VK;%W?Y>I;0P`|*vwAK$S(VB2JSq6g4n
+z>oEf8XCt;_Y-iYBWz#<re{?il1^f{S#nht`VW!62^5R*KQ6_?#8e&Qw=9%`og2x!s
+z&J)wlZ=a<yoJkutfwu4%aVXlu?i^8v?R77IyGvKcD|M`CFG$6FUmK8q<|o>3T9EmJ
+z2x?*GPeN%?=Fj3+fv~4%I(nv~XF7VOqi5RsAt%13JtW>q=<<<Gei4)FzWqGEt6P8D
+zA9m}s>;0IkLPSUGL%_1h)2kjaZzuV;`43yCV;I=#Jcyyw@xKE8GGX39@am|0GKhH`
+zawsKv^FvHqm+<DDPT)%}_kZ8^eT88YGmG-#)X3=RRB|L^Uj_{yd%JeO<1HRZVz=Fz
+z+aqUCWdF3_={#Q&&k)eF1i=WV`AbSlzo*bP?x?ir5BVVO`R34f89jWL{Z}or^BwmG
+z-E;A_iWVUUWnWQl3L|~0xA@rHJRA-;7V)Y6B5=@E8R@?(?5{Eh23RefpSOGX_F{8A
+z1PtU+iNng^h#C7J<vufJ9>c8*FfFsu??w)Oed@;Mg~21%rCZ%d{x!>-zmv4AyWL1E
+xfz+CGUnQ7Y^TD}&c_cQRYlBC+`?m?k6Nuw??s04gg4@4`<@FO{XEbO(<xf!`#Pk3F
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c b/src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c
+new file mode 100644
+index 0000000000..e2fa05cd8f
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c
+@@ -0,0 +1,12 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++
++#include <northbridge/intel/x4x/x4x.h>
++
++void mb_get_spd_map(u8 spd_map[4])
++{
++ // BTX form factor
++ spd_map[0] = 0x53;
++ spd_map[1] = 0x52;
++ spd_map[2] = 0x51;
++ spd_map[3] = 0x50;
++}
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c b/src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c
+new file mode 100644
+index 0000000000..9993f17c55
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c
+@@ -0,0 +1,174 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++ .gpio0 = GPIO_MODE_NATIVE,
++ .gpio1 = GPIO_MODE_NATIVE,
++ .gpio2 = GPIO_MODE_GPIO,
++ .gpio3 = GPIO_MODE_GPIO,
++ .gpio4 = GPIO_MODE_GPIO,
++ .gpio5 = GPIO_MODE_GPIO,
++ .gpio6 = GPIO_MODE_GPIO,
++ .gpio7 = GPIO_MODE_NATIVE,
++ .gpio8 = GPIO_MODE_NATIVE,
++ .gpio9 = GPIO_MODE_GPIO,
++ .gpio10 = GPIO_MODE_GPIO,
++ .gpio11 = GPIO_MODE_NATIVE,
++ .gpio12 = GPIO_MODE_NATIVE,
++ .gpio13 = GPIO_MODE_GPIO,
++ .gpio14 = GPIO_MODE_GPIO,
++ .gpio15 = GPIO_MODE_NATIVE,
++ .gpio16 = GPIO_MODE_GPIO,
++ .gpio17 = GPIO_MODE_NATIVE,
++ .gpio18 = GPIO_MODE_GPIO,
++ .gpio19 = GPIO_MODE_GPIO,
++ .gpio20 = GPIO_MODE_GPIO,
++ .gpio21 = GPIO_MODE_GPIO,
++ .gpio22 = GPIO_MODE_GPIO,
++ .gpio23 = GPIO_MODE_NATIVE,
++ .gpio24 = GPIO_MODE_GPIO,
++ .gpio25 = GPIO_MODE_NATIVE,
++ .gpio26 = GPIO_MODE_NATIVE,
++ .gpio27 = GPIO_MODE_GPIO,
++ .gpio28 = GPIO_MODE_GPIO,
++ .gpio29 = GPIO_MODE_GPIO,
++ .gpio30 = GPIO_MODE_GPIO,
++ .gpio31 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++ .gpio2 = GPIO_DIR_INPUT,
++ .gpio3 = GPIO_DIR_INPUT,
++ .gpio4 = GPIO_DIR_INPUT,
++ .gpio5 = GPIO_DIR_INPUT,
++ .gpio6 = GPIO_DIR_INPUT,
++ .gpio9 = GPIO_DIR_OUTPUT,
++ .gpio10 = GPIO_DIR_INPUT,
++ .gpio13 = GPIO_DIR_INPUT,
++ .gpio14 = GPIO_DIR_INPUT,
++ .gpio16 = GPIO_DIR_INPUT,
++ .gpio18 = GPIO_DIR_OUTPUT,
++ .gpio19 = GPIO_DIR_INPUT,
++ .gpio20 = GPIO_DIR_OUTPUT,
++ .gpio21 = GPIO_DIR_INPUT,
++ .gpio22 = GPIO_DIR_INPUT,
++ .gpio24 = GPIO_DIR_INPUT,
++ .gpio27 = GPIO_DIR_INPUT,
++ .gpio28 = GPIO_DIR_OUTPUT,
++ .gpio29 = GPIO_DIR_INPUT,
++ .gpio30 = GPIO_DIR_INPUT,
++ .gpio31 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++ .gpio9 = GPIO_LEVEL_HIGH,
++ .gpio18 = GPIO_LEVEL_HIGH,
++ .gpio20 = GPIO_LEVEL_HIGH,
++ .gpio28 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++ .gpio13 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++ .gpio32 = GPIO_MODE_GPIO,
++ .gpio33 = GPIO_MODE_GPIO,
++ .gpio34 = GPIO_MODE_GPIO,
++ .gpio35 = GPIO_MODE_GPIO,
++ .gpio36 = GPIO_MODE_GPIO,
++ .gpio37 = GPIO_MODE_GPIO,
++ .gpio38 = GPIO_MODE_GPIO,
++ .gpio39 = GPIO_MODE_GPIO,
++ .gpio40 = GPIO_MODE_NATIVE,
++ .gpio41 = GPIO_MODE_NATIVE,
++ .gpio42 = GPIO_MODE_NATIVE,
++ .gpio43 = GPIO_MODE_NATIVE,
++ .gpio44 = GPIO_MODE_NATIVE,
++ .gpio45 = GPIO_MODE_NATIVE,
++ .gpio46 = GPIO_MODE_NATIVE,
++ .gpio47 = GPIO_MODE_NATIVE,
++ .gpio48 = GPIO_MODE_GPIO,
++ .gpio49 = GPIO_MODE_GPIO,
++ .gpio50 = GPIO_MODE_NATIVE,
++ .gpio51 = GPIO_MODE_NATIVE,
++ .gpio52 = GPIO_MODE_NATIVE,
++ .gpio53 = GPIO_MODE_NATIVE,
++ .gpio54 = GPIO_MODE_GPIO,
++ .gpio55 = GPIO_MODE_NATIVE,
++ .gpio56 = GPIO_MODE_GPIO,
++ .gpio57 = GPIO_MODE_GPIO,
++ .gpio58 = GPIO_MODE_NATIVE,
++ .gpio59 = GPIO_MODE_NATIVE,
++ .gpio60 = GPIO_MODE_GPIO,
++ .gpio61 = GPIO_MODE_NATIVE,
++ .gpio62 = GPIO_MODE_NATIVE,
++ .gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++ .gpio32 = GPIO_DIR_INPUT,
++ .gpio33 = GPIO_DIR_INPUT,
++ .gpio34 = GPIO_DIR_INPUT,
++ .gpio35 = GPIO_DIR_OUTPUT,
++ .gpio36 = GPIO_DIR_INPUT,
++ .gpio37 = GPIO_DIR_INPUT,
++ .gpio38 = GPIO_DIR_INPUT,
++ .gpio39 = GPIO_DIR_INPUT,
++ .gpio48 = GPIO_DIR_INPUT,
++ .gpio49 = GPIO_DIR_OUTPUT,
++ .gpio54 = GPIO_DIR_INPUT,
++ .gpio56 = GPIO_DIR_OUTPUT,
++ .gpio57 = GPIO_DIR_INPUT,
++ .gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++ .gpio35 = GPIO_LEVEL_LOW,
++ .gpio49 = GPIO_LEVEL_HIGH,
++ .gpio56 = GPIO_LEVEL_HIGH,
++ .gpio60 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++ .gpio64 = GPIO_MODE_NATIVE,
++ .gpio65 = GPIO_MODE_NATIVE,
++ .gpio66 = GPIO_MODE_NATIVE,
++ .gpio67 = GPIO_MODE_NATIVE,
++ .gpio68 = GPIO_MODE_NATIVE,
++ .gpio69 = GPIO_MODE_NATIVE,
++ .gpio70 = GPIO_MODE_NATIVE,
++ .gpio71 = GPIO_MODE_NATIVE,
++ .gpio72 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++ .gpio72 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++ .set1 = {
++ .mode = &pch_gpio_set1_mode,
++ .direction = &pch_gpio_set1_direction,
++ .level = &pch_gpio_set1_level,
++ .blink = &pch_gpio_set1_blink,
++ .invert = &pch_gpio_set1_invert,
++ },
++ .set2 = {
++ .mode = &pch_gpio_set2_mode,
++ .direction = &pch_gpio_set2_direction,
++ .level = &pch_gpio_set2_level,
++ },
++ .set3 = {
++ .mode = &pch_gpio_set3_mode,
++ .direction = &pch_gpio_set3_direction,
++ .level = &pch_gpio_set3_level,
++ },
++};
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c b/src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c
+new file mode 100644
+index 0000000000..4158bcf899
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c
+@@ -0,0 +1,26 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++ /* coreboot specific header */
++ 0x11d4194a, /* Analog Devices AD1984A */
++ 0xbfd40000, /* Subsystem ID */
++ 10, /* Number of entries */
++
++ /* Pin Widget Verb Table */
++ AZALIA_PIN_CFG(0, 0x11, 0x032140f0),
++ AZALIA_PIN_CFG(0, 0x12, 0x21214010),
++ AZALIA_PIN_CFG(0, 0x13, 0x901701f0),
++ AZALIA_PIN_CFG(0, 0x14, 0x03a190f0),
++ AZALIA_PIN_CFG(0, 0x15, 0xb7a70121),
++ AZALIA_PIN_CFG(0, 0x16, 0x9933012e),
++ AZALIA_PIN_CFG(0, 0x17, 0x97a601f0),
++ AZALIA_PIN_CFG(0, 0x1a, 0x90f301f0),
++ AZALIA_PIN_CFG(0, 0x1b, 0x014510f0),
++ AZALIA_PIN_CFG(0, 0x1c, 0x21a19020),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb b/src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb
+new file mode 100644
+index 0000000000..555b1c1f5c
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb
+@@ -0,0 +1,10 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/x4x
++ device domain 0 on
++ chip southbridge/intel/i82801jx
++ device pci 1c.0 on end # PCIe 1
++ device pci 1c.1 on end # PCIe 2
++ end
++ end
++end
+--
+2.39.5
+
diff --git a/config/coreboot/default/patches/0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/next/patches/0002-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
index a71324db..5b77c0e6 100644
--- a/config/coreboot/default/patches/0015-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
+++ b/config/coreboot/next/patches/0002-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
@@ -1,7 +1,7 @@
-From 158b79e6057e071d039619f617c112d31fb13f64 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
+From 1b230f671ebc6e355a001ac7ffc9b031329de019 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
Date: Sun, 19 Feb 2023 18:21:43 +0000
-Subject: [PATCH 15/30] util/ifdtool: add --nuke flag (all 0xFF on region)
+Subject: [PATCH 2/3] util/ifdtool: add --nuke flag (all 0xFF on region)
When this option is used, the region's contents are overwritten
with all ones (0xFF).
@@ -16,14 +16,14 @@ Rebased since the last revision update in lbmk.
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
- util/ifdtool/ifdtool.c | 112 +++++++++++++++++++++++++++++------------
- 1 file changed, 81 insertions(+), 31 deletions(-)
+ util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
+ 1 file changed, 83 insertions(+), 31 deletions(-)
diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
-index 191b3216de..38132b4a28 100644
+index 36477eef66..3ebef74042 100644
--- a/util/ifdtool/ifdtool.c
+++ b/util/ifdtool/ifdtool.c
-@@ -1942,6 +1942,7 @@ static void print_usage(const char *name)
+@@ -2217,6 +2217,7 @@ static void print_usage(const char *name)
" tgl - Tiger Lake\n"
" wbg - Wellsburg\n"
" -S | --setpchstrap Write a PCH strap\n"
@@ -31,7 +31,7 @@ index 191b3216de..38132b4a28 100644
" -V | --newvalue The new value to write into PCH strap specified by -S\n"
" -v | --version: print the version\n"
" -h | --help: print this help\n\n"
-@@ -1950,6 +1951,60 @@ static void print_usage(const char *name)
+@@ -2225,6 +2226,60 @@ static void print_usage(const char *name)
"\n");
}
@@ -92,15 +92,15 @@ index 191b3216de..38132b4a28 100644
int main(int argc, char *argv[])
{
int opt, option_index = 0;
-@@ -1957,6 +2012,7 @@ int main(int argc, char *argv[])
+@@ -2232,6 +2287,7 @@ int main(int argc, char *argv[])
int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
+ int mode_nuke = 0;
- int mode_gpr0_disable = 0;
+ int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
char *region_type_string = NULL, *region_fname = NULL;
const char *layout_fname = NULL;
-@@ -1990,6 +2046,7 @@ int main(int argc, char *argv[])
+@@ -2267,6 +2323,7 @@ int main(int argc, char *argv[])
{"validate", 0, NULL, 't'},
{"setpchstrap", 1, NULL, 'S'},
{"newvalue", 1, NULL, 'V'},
@@ -108,7 +108,7 @@ index 191b3216de..38132b4a28 100644
{0, 0, 0, 0}
};
-@@ -2039,35 +2096,8 @@ int main(int argc, char *argv[])
+@@ -2316,35 +2373,8 @@ int main(int argc, char *argv[])
region_fname++;
// Descriptor, BIOS, ME, GbE, Platform
// valid type?
@@ -141,12 +141,12 @@ index 191b3216de..38132b4a28 100644
- else if (!strcasecmp("PTT", region_type_string))
- region_type = 15;
- if (region_type == -1) {
-+ if ((region_type =
-+ get_region_type_string(region_type_string)) == -1) {
++ if ((region_type =
++ get_region_type_string(region_type_string)) == -1) {
fprintf(stderr, "No such region type: '%s'\n\n",
region_type_string);
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
-@@ -2236,6 +2266,22 @@ int main(int argc, char *argv[])
+@@ -2521,6 +2551,22 @@ int main(int argc, char *argv[])
case 't':
mode_validate = 1;
break;
@@ -169,35 +169,37 @@ index 191b3216de..38132b4a28 100644
case 'v':
print_version();
exit(EXIT_SUCCESS);
-@@ -2252,7 +2298,7 @@ int main(int argc, char *argv[])
+@@ -2540,7 +2586,8 @@ int main(int argc, char *argv[])
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
-- mode_gpr0_disable) > 1) {
-+ mode_gpr0_disable + mode_nuke) > 1) {
+- (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) > 1) {
++ (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
++ mode_nuke) > 1) {
fprintf(stderr, "You may not specify more than one mode.\n\n");
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
exit(EXIT_FAILURE);
-@@ -2261,7 +2307,7 @@ int main(int argc, char *argv[])
+@@ -2549,7 +2596,8 @@ int main(int argc, char *argv[])
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
mode_locked + mode_unlocked + mode_density + mode_altmedisable +
-- mode_validate + mode_gpr0_disable) == 0) {
-+ mode_validate + mode_gpr0_disable + mode_nuke) == 0) {
+- mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) == 0) {
++ mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
++ mode_nuke) == 0) {
fprintf(stderr, "You need to specify a mode.\n\n");
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
exit(EXIT_FAILURE);
-@@ -2368,6 +2414,10 @@ int main(int argc, char *argv[])
+@@ -2662,6 +2710,10 @@ int main(int argc, char *argv[])
write_image(new_filename, image, size);
}
-+ if (mode_nuke) {
-+ nuke(new_filename, image, size, region_type);
-+ }
++ if (mode_nuke) {
++ nuke(new_filename, image, size, region_type);
++ }
+
if (mode_altmedisable) {
struct fpsba *fpsba = find_fpsba(image, size);
struct fmsba *fmsba = find_fmsba(image, size);
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/default/patches/0019-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/next/patches/0003-Remove-warning-for-coreboot-images-built-without-a-p.patch
index 090f2629..31bf5a42 100644
--- a/config/coreboot/default/patches/0019-Remove-warning-for-coreboot-images-built-without-a-p.patch
+++ b/config/coreboot/next/patches/0003-Remove-warning-for-coreboot-images-built-without-a-p.patch
@@ -1,7 +1,7 @@
-From 2ccd3e71730004c3ffbed178087cb778c170079e Mon Sep 17 00:00:00 2001
+From ddc7390d7750eb3b29a6d6fe7bf2400121d639b5 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 12 May 2023 19:55:15 -0600
-Subject: [PATCH 19/30] Remove warning for coreboot images built without a
+Subject: [PATCH 3/3] Remove warning for coreboot images built without a
payload
I added this in upstream to prevent people from accidentally flashing
@@ -13,10 +13,10 @@ up. This has caused confusion and concern so just patch it out.
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk
-index a2336aa876..4f1692a873 100644
+index 5f988dac1b..516133880f 100644
--- a/payloads/Makefile.mk
+++ b/payloads/Makefile.mk
-@@ -49,16 +49,5 @@ distclean-payloads:
+@@ -50,16 +50,5 @@ distclean-payloads:
print-repo-info-payloads:
-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
@@ -35,5 +35,5 @@ index a2336aa876..4f1692a873 100644
-.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
+.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
--
-2.39.2
+2.39.5
diff --git a/config/coreboot/next/patches/0004-mb-dell-optiplex_780-Add-USFF-variant.patch b/config/coreboot/next/patches/0004-mb-dell-optiplex_780-Add-USFF-variant.patch
new file mode 100644
index 00000000..875a4b2a
--- /dev/null
+++ b/config/coreboot/next/patches/0004-mb-dell-optiplex_780-Add-USFF-variant.patch
@@ -0,0 +1,326 @@
+From 300f73eae58bfcde26f82814a5e295585b3e3a2a Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Wed, 30 Oct 2024 20:55:25 -0600
+Subject: [PATCH 1/1] mb/dell/optiplex_780: Add USFF variant
+
+Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ src/mainboard/dell/optiplex_780/Kconfig | 5 +
+ src/mainboard/dell/optiplex_780/Kconfig.name | 3 +
+ .../optiplex_780/variants/780_usff/data.vbt | Bin 0 -> 1917 bytes
+ .../variants/780_usff/early_init.c | 9 +
+ .../optiplex_780/variants/780_usff/gpio.c | 166 ++++++++++++++++++
+ .../optiplex_780/variants/780_usff/hda_verb.c | 26 +++
+ .../variants/780_usff/overridetree.cb | 10 ++
+ 7 files changed, 219 insertions(+)
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/data.vbt
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c
+ create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb
+
+diff --git a/src/mainboard/dell/optiplex_780/Kconfig b/src/mainboard/dell/optiplex_780/Kconfig
+index 2d06c75c9a..fc649e35d5 100644
+--- a/src/mainboard/dell/optiplex_780/Kconfig
++++ b/src/mainboard/dell/optiplex_780/Kconfig
+@@ -20,6 +20,9 @@ config BOARD_DELL_OPTIPLEX_780_COMMON
+ config BOARD_DELL_OPTIPLEX_780_MT
+ select BOARD_DELL_OPTIPLEX_780_COMMON
+
++config BOARD_DELL_OPTIPLEX_780_USFF
++ select BOARD_DELL_OPTIPLEX_780_COMMON
++
+ if BOARD_DELL_OPTIPLEX_780_COMMON
+
+ config VGA_BIOS_ID
+@@ -30,11 +33,13 @@ config MAINBOARD_DIR
+
+ config MAINBOARD_PART_NUMBER
+ default "OptiPlex 780 MT" if BOARD_DELL_OPTIPLEX_780_MT
++ default "OptiPlex 780 USFF" if BOARD_DELL_OPTIPLEX_780_USFF
+
+ config OVERRIDE_DEVICETREE
+ default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
+
+ config VARIANT_DIR
+ default "780_mt" if BOARD_DELL_OPTIPLEX_780_MT
++ default "780_usff" if BOARD_DELL_OPTIPLEX_780_USFF
+
+ endif # BOARD_DELL_OPTIPLEX_780_COMMON
+diff --git a/src/mainboard/dell/optiplex_780/Kconfig.name b/src/mainboard/dell/optiplex_780/Kconfig.name
+index db7f2e8fe3..bc84c82a79 100644
+--- a/src/mainboard/dell/optiplex_780/Kconfig.name
++++ b/src/mainboard/dell/optiplex_780/Kconfig.name
+@@ -2,3 +2,6 @@
+
+ config BOARD_DELL_OPTIPLEX_780_MT
+ bool "OptiPlex 780 MT"
++
++config BOARD_DELL_OPTIPLEX_780_USFF
++ bool "OptiPlex 780 USFF"
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/data.vbt b/src/mainboard/dell/optiplex_780/variants/780_usff/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..dbd764f285ed18f7ee9c54bc777560138bd9b5f7
+GIT binary patch
+literal 1917
+zcmd6nO>7%Q6vzLwGv3{}j$^l`v7@w1q*9sEq+2(b3K>`@c5#TSx@i<uQKf!)+gO;|
+zveT#>P+W+B10OwbsGtX=N(gc4jSGjKDkP+yIUo^nsel8$^ny^9H?td8Ra=EiCEn=G
+z@6DV4?!2AdojnUv^Rirgvs$heXUkGs9S+{Jc2WPhP0buTak^BTFP@&N9-E$(UtuSX
+zS{r`=b+EX|Ig`2a*^5oDdG>8jE-1BBxs`*jgrf_sj_fP;%L|PwURRcCFBMCroNRQv
+zmp$2TUhc}qJMB(u#jDG@x6(N85thC4%Z=8hiN}lj&zb2~``u3C;?lCrPQOTnInFqB
+zhvdwqWv?lxTb=fVEH;~RPHDPw&g*&|s$pU<Iv53Rb6YTgMPOY8;~P1Yglh^6Fgt1^
+zCTz|SVPcSpZ44F@&oNPUMO@&BE3y(57YP_Y!4SZhE?GXYa7k+b0(X|s7u3GDRf^1#
+zOd2ZCCPO|I&sHEt;p8UshhHtYQ>7!7x2m<d`Gu2<r+Qc4|6pwd8&zFboH_W7XE7uU
+zWW-@Cim&mdY2!O{JANR)OTJG2z>LBtAF!g>K`zPnkx!DpPHuk6{_zc*0qi7)Aet$T
+z1ks@8hWS#+6cI5)j1oD86{5PX8Zu2(^OC6M`<pE+J?KFZ=&_JVP1YL=#z<-Q*24K4
+zn+$YxrHNJJc`k?_8N=Kres26_#E8GLn2{jfW5P%ge`kL(Btkt=>xo)V)Ow=U6P12c
+z=U0uNC9T9v{)-|#h(mSX*hSA8)ZeocL7l4J&!{RSO{6~oTtyn535j!RQh#GA*wTF8
+zvasRbO~d!?*FbM3K`W?lHx=v*(jiARIhWyh4^io|;n?@1H>uqJy>0sjV-Dt)_=%bE
+zgNO3D@uE5m+7aqi?Y8b+inye%Z=HUmgBtaZ3Lc%OLt+bo+)5BjVwT<{mxT`nde$vb
+zV99s{>`r76L#Hr6XW6r|<iq#4Jr?XsxKyeJKEj7;e4SZ^1B12u&iV_9M0*Kem@fmn
+z1C>>HT47I`**Q#Vu0QW!^VP-9S{xXzpq_zS#9k-;aXz?b+S!Ne$Kkk6dq<Gj{q2D(
+z>&Hj-x+kx1W-4#E&beDT*S)=&NoSE?<-w!G@~aW()0ZN4O&=Q+nZa)p%Vd$k-_$a=
+T#w3FFBiyj<XAh$hb(enud`r7S
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c b/src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c
+new file mode 100644
+index 0000000000..2a55fc3a6e
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c
+@@ -0,0 +1,9 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++
++#include <northbridge/intel/x4x/x4x.h>
++
++void mb_get_spd_map(u8 spd_map[4])
++{
++ spd_map[0] = 0x50;
++ spd_map[2] = 0x52;
++}
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c b/src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c
+new file mode 100644
+index 0000000000..389f4077d7
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c
+@@ -0,0 +1,166 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++ .gpio0 = GPIO_MODE_NATIVE,
++ .gpio1 = GPIO_MODE_NATIVE,
++ .gpio2 = GPIO_MODE_GPIO,
++ .gpio3 = GPIO_MODE_GPIO,
++ .gpio4 = GPIO_MODE_GPIO,
++ .gpio5 = GPIO_MODE_GPIO,
++ .gpio6 = GPIO_MODE_GPIO,
++ .gpio7 = GPIO_MODE_NATIVE,
++ .gpio8 = GPIO_MODE_NATIVE,
++ .gpio9 = GPIO_MODE_GPIO,
++ .gpio10 = GPIO_MODE_GPIO,
++ .gpio11 = GPIO_MODE_NATIVE,
++ .gpio12 = GPIO_MODE_NATIVE,
++ .gpio13 = GPIO_MODE_GPIO,
++ .gpio14 = GPIO_MODE_GPIO,
++ .gpio15 = GPIO_MODE_NATIVE,
++ .gpio16 = GPIO_MODE_GPIO,
++ .gpio17 = GPIO_MODE_NATIVE,
++ .gpio18 = GPIO_MODE_GPIO,
++ .gpio19 = GPIO_MODE_GPIO,
++ .gpio20 = GPIO_MODE_GPIO,
++ .gpio21 = GPIO_MODE_GPIO,
++ .gpio22 = GPIO_MODE_GPIO,
++ .gpio23 = GPIO_MODE_NATIVE,
++ .gpio24 = GPIO_MODE_GPIO,
++ .gpio25 = GPIO_MODE_NATIVE,
++ .gpio26 = GPIO_MODE_NATIVE,
++ .gpio27 = GPIO_MODE_GPIO,
++ .gpio28 = GPIO_MODE_GPIO,
++ .gpio29 = GPIO_MODE_GPIO,
++ .gpio30 = GPIO_MODE_GPIO,
++ .gpio31 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++ .gpio2 = GPIO_DIR_INPUT,
++ .gpio3 = GPIO_DIR_INPUT,
++ .gpio4 = GPIO_DIR_INPUT,
++ .gpio5 = GPIO_DIR_INPUT,
++ .gpio6 = GPIO_DIR_INPUT,
++ .gpio9 = GPIO_DIR_OUTPUT,
++ .gpio10 = GPIO_DIR_INPUT,
++ .gpio13 = GPIO_DIR_INPUT,
++ .gpio14 = GPIO_DIR_INPUT,
++ .gpio16 = GPIO_DIR_INPUT,
++ .gpio18 = GPIO_DIR_OUTPUT,
++ .gpio19 = GPIO_DIR_INPUT,
++ .gpio20 = GPIO_DIR_OUTPUT,
++ .gpio21 = GPIO_DIR_INPUT,
++ .gpio22 = GPIO_DIR_INPUT,
++ .gpio24 = GPIO_DIR_INPUT,
++ .gpio27 = GPIO_DIR_INPUT,
++ .gpio28 = GPIO_DIR_OUTPUT,
++ .gpio29 = GPIO_DIR_INPUT,
++ .gpio30 = GPIO_DIR_INPUT,
++ .gpio31 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++ .gpio9 = GPIO_LEVEL_HIGH,
++ .gpio18 = GPIO_LEVEL_HIGH,
++ .gpio20 = GPIO_LEVEL_HIGH,
++ .gpio28 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++ .gpio13 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++ .gpio32 = GPIO_MODE_GPIO,
++ .gpio33 = GPIO_MODE_GPIO,
++ .gpio34 = GPIO_MODE_GPIO,
++ .gpio35 = GPIO_MODE_GPIO,
++ .gpio36 = GPIO_MODE_GPIO,
++ .gpio37 = GPIO_MODE_GPIO,
++ .gpio38 = GPIO_MODE_GPIO,
++ .gpio39 = GPIO_MODE_GPIO,
++ .gpio40 = GPIO_MODE_NATIVE,
++ .gpio41 = GPIO_MODE_NATIVE,
++ .gpio42 = GPIO_MODE_NATIVE,
++ .gpio43 = GPIO_MODE_NATIVE,
++ .gpio44 = GPIO_MODE_NATIVE,
++ .gpio45 = GPIO_MODE_NATIVE,
++ .gpio46 = GPIO_MODE_NATIVE,
++ .gpio47 = GPIO_MODE_NATIVE,
++ .gpio48 = GPIO_MODE_GPIO,
++ .gpio49 = GPIO_MODE_GPIO,
++ .gpio50 = GPIO_MODE_NATIVE,
++ .gpio51 = GPIO_MODE_NATIVE,
++ .gpio52 = GPIO_MODE_NATIVE,
++ .gpio53 = GPIO_MODE_NATIVE,
++ .gpio54 = GPIO_MODE_GPIO,
++ .gpio55 = GPIO_MODE_NATIVE,
++ .gpio56 = GPIO_MODE_GPIO,
++ .gpio57 = GPIO_MODE_GPIO,
++ .gpio58 = GPIO_MODE_NATIVE,
++ .gpio59 = GPIO_MODE_NATIVE,
++ .gpio60 = GPIO_MODE_GPIO,
++ .gpio61 = GPIO_MODE_NATIVE,
++ .gpio62 = GPIO_MODE_NATIVE,
++ .gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++ .gpio32 = GPIO_DIR_INPUT,
++ .gpio33 = GPIO_DIR_INPUT,
++ .gpio34 = GPIO_DIR_INPUT,
++ .gpio35 = GPIO_DIR_OUTPUT,
++ .gpio36 = GPIO_DIR_INPUT,
++ .gpio37 = GPIO_DIR_INPUT,
++ .gpio38 = GPIO_DIR_INPUT,
++ .gpio39 = GPIO_DIR_INPUT,
++ .gpio48 = GPIO_DIR_INPUT,
++ .gpio49 = GPIO_DIR_OUTPUT,
++ .gpio54 = GPIO_DIR_INPUT,
++ .gpio56 = GPIO_DIR_OUTPUT,
++ .gpio57 = GPIO_DIR_INPUT,
++ .gpio60 = GPIO_DIR_OUTPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++ .gpio35 = GPIO_LEVEL_LOW,
++ .gpio49 = GPIO_LEVEL_HIGH,
++ .gpio56 = GPIO_LEVEL_HIGH,
++ .gpio60 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++ .gpio72 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++ .gpio72 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++ .set1 = {
++ .mode = &pch_gpio_set1_mode,
++ .direction = &pch_gpio_set1_direction,
++ .level = &pch_gpio_set1_level,
++ .blink = &pch_gpio_set1_blink,
++ .invert = &pch_gpio_set1_invert,
++ },
++ .set2 = {
++ .mode = &pch_gpio_set2_mode,
++ .direction = &pch_gpio_set2_direction,
++ .level = &pch_gpio_set2_level,
++ },
++ .set3 = {
++ .mode = &pch_gpio_set3_mode,
++ .direction = &pch_gpio_set3_direction,
++ .level = &pch_gpio_set3_level,
++ },
++};
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c b/src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c
+new file mode 100644
+index 0000000000..c94e06b156
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c
+@@ -0,0 +1,26 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++ /* coreboot specific header */
++ 0x11d4194a, /* Analog Devices AD1984A */
++ 0x10280420, /* Subsystem ID */
++ 10, /* Number of entries */
++
++ /* Pin Widget Verb Table */
++ AZALIA_PIN_CFG(0, 0x11, 0x02214040),
++ AZALIA_PIN_CFG(0, 0x12, 0x01014010),
++ AZALIA_PIN_CFG(0, 0x13, 0x991301f0),
++ AZALIA_PIN_CFG(0, 0x14, 0x02a19020),
++ AZALIA_PIN_CFG(0, 0x15, 0x01813030),
++ AZALIA_PIN_CFG(0, 0x16, 0x413301f0),
++ AZALIA_PIN_CFG(0, 0x17, 0x41a601f0),
++ AZALIA_PIN_CFG(0, 0x1a, 0x41f301f0),
++ AZALIA_PIN_CFG(0, 0x1b, 0x414501f0),
++ AZALIA_PIN_CFG(0, 0x1c, 0x413301f0),
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb b/src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb
+new file mode 100644
+index 0000000000..555b1c1f5c
+--- /dev/null
++++ b/src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb
+@@ -0,0 +1,10 @@
++## SPDX-License-Identifier: GPL-2.0-or-later
++
++chip northbridge/intel/x4x
++ device domain 0 on
++ chip southbridge/intel/i82801jx
++ device pci 1c.0 on end # PCIe 1
++ device pci 1c.1 on end # PCIe 2
++ end
++ end
++end
+--
+2.39.5
+
diff --git a/config/coreboot/next/target.cfg b/config/coreboot/next/target.cfg
new file mode 100644
index 00000000..f8f6d074
--- /dev/null
+++ b/config/coreboot/next/target.cfg
@@ -0,0 +1,2 @@
+tree="next"
+rev="c21bed6de9359111afd5d6ed6e76b1d2116b216c"
diff --git a/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
index 8c435502..909ab29e 100644
--- a/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -33,7 +32,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_CBMEM_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -51,8 +49,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -63,11 +61,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
CONFIG_VENDOR_EMULATION=y
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -89,6 +89,7 @@ CONFIG_VENDOR_EMULATION=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -117,10 +118,12 @@ CONFIG_UART_FOR_CONSOLE=0
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_MAX_SOCKET=1
CONFIG_DRAM_SIZE_MB=261120
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_BOARD_EMULATION_QEMU_AARCH64=y
# CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
# CONFIG_BOARD_EMULATION_QEMU_X86_I440FX is not set
@@ -129,21 +132,28 @@ CONFIG_BOARD_EMULATION_QEMU_AARCH64=y
# CONFIG_BOARD_EMULATION_QEMU_X86_Q35 is not set
# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV64 is not set
# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set
+# CONFIG_BOARD_EMULATION_QEMU_SBSA is not set
# CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0x4010000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
+CONFIG_PCI_IOBASE=0x3eff0000
CONFIG_MEMLAYOUT_LD_FILE="src/mainboard/emulation/qemu-aarch64/memlayout.ld"
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_ARM64_CURRENT_EL=3
CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -171,6 +181,7 @@ CONFIG_ROM_SIZE=0x00c00000
# SoC
#
CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_ARM64_BL31_EXTERNAL_FILE=""
CONFIG_ARCH_ARMV8_EXTENSION=0
CONFIG_STACK_SIZE=0x0
@@ -178,7 +189,6 @@ CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
# CONFIG_PCIEXP_COMMON_CLOCK is not set
CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION=y
CONFIG_GENERIC_UDELAY=y
@@ -217,6 +227,7 @@ CONFIG_ARCH_ROMSTAGE_ARMV8_64=y
CONFIG_ARCH_RAMSTAGE_ARMV8_64=y
CONFIG_ARM64_USE_ARCH_TIMER=y
CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE=y
+# CONFIG_ARM64_BL31_OPTEE_WITH_SMC is not set
# end of Chipset
#
@@ -272,6 +283,7 @@ CONFIG_DRIVERS_UART_PL011=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -313,7 +325,6 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_CUSTOM_MADT=y
CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
@@ -357,6 +368,7 @@ CONFIG_HAVE_MONOTONIC_TIMER=y
#
# System tables
#
+# CONFIG_GENERATE_SMBIOS_TABLES is not set
# end of System tables
#
diff --git a/config/coreboot/qemu_arm64_12mb/target.cfg b/config/coreboot/qemu_arm64_12mb/target.cfg
index a7c36159..980de84f 100644
--- a/config/coreboot/qemu_arm64_12mb/target.cfg
+++ b/config/coreboot/qemu_arm64_12mb/target.cfg
@@ -1,3 +1,4 @@
tree="default"
xarch="aarch64-elf arm-eabi"
payload_uboot="y"
+build_depend="u-boot/qemu_arm64_12mb"
diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
index 6aa7a4b8..951bd326 100644
--- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -38,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_CBMEM_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -56,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -68,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
CONFIG_VENDOR_EMULATION=y
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -94,6 +94,7 @@ CONFIG_VENDOR_EMULATION=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,13 +128,14 @@ CONFIG_VBOOT_VBNV_OFFSET=0x2c
CONFIG_IRQ_SLOT_COUNT=6
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="QEMU"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
# CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set
# CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
@@ -142,6 +144,7 @@ CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
# CONFIG_BOARD_EMULATION_QEMU_X86_Q35 is not set
# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV64 is not set
# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set
+# CONFIG_BOARD_EMULATION_QEMU_SBSA is not set
# CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0x10000
@@ -151,18 +154,23 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_4096=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -193,8 +201,9 @@ CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
@@ -202,7 +211,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
@@ -221,6 +229,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_UNKNOWN_TSC_RATE=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_NO_SMM=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
@@ -254,7 +263,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
@@ -268,6 +277,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -316,8 +326,9 @@ CONFIG_DRIVERS_UART=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
# CONFIG_VPD is not set
CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y
-CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_XRES=800
-CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_YRES=600
+CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y
+CONFIG_DRIVERS_EMULATION_QEMU_XRES=800
+CONFIG_DRIVERS_EMULATION_QEMU_YRES=600
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -331,6 +342,8 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -379,7 +392,6 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
index 91435206..64afd0a0 100644
--- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -38,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_CBMEM_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -56,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -68,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
CONFIG_VENDOR_EMULATION=y
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -94,6 +94,7 @@ CONFIG_VENDOR_EMULATION=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,13 +128,14 @@ CONFIG_VBOOT_VBNV_OFFSET=0x2c
CONFIG_IRQ_SLOT_COUNT=6
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="QEMU"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
# CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set
# CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
@@ -142,6 +144,7 @@ CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y
# CONFIG_BOARD_EMULATION_QEMU_X86_Q35 is not set
# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV64 is not set
# CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set
+# CONFIG_BOARD_EMULATION_QEMU_SBSA is not set
# CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0x10000
@@ -151,18 +154,23 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_4096=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -193,8 +201,9 @@ CONFIG_CHIPSET_DEVICETREE=""
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
@@ -202,7 +211,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
@@ -221,6 +229,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_UNKNOWN_TSC_RATE=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_NO_SMM=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
@@ -254,7 +263,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
@@ -268,6 +277,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -314,6 +324,7 @@ CONFIG_DRIVERS_UART=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
# CONFIG_VPD is not set
CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y
+CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
@@ -327,6 +338,8 @@ CONFIG_DRIVERS_MC146818=y
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -375,7 +388,6 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg
index 4d03eb4a..27921ff9 100644
--- a/config/coreboot/qemu_x86_12mb/target.cfg
+++ b/config/coreboot/qemu_x86_12mb/target.cfg
@@ -1,7 +1,5 @@
tree="default"
xarch="i386-elf"
payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
payload_memtest="y"
-grub_scan_disk="both"
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
index 3215ca68..9a1af842 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +159,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +193,7 @@ CONFIG_BOARD_LENOVO_R400=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +205,22 @@ CONFIG_BOARD_LENOVO_R400=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +261,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -260,7 +272,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +304,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +384,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +400,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -490,6 +503,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -542,7 +556,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/r400_16mb/config/libgfxinit_txtmode b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
index 4b6b5e6f..d2bd1d3c 100644
--- a/config/coreboot/r400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +191,7 @@ CONFIG_BOARD_LENOVO_R400=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +203,22 @@ CONFIG_BOARD_LENOVO_R400=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +259,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -258,7 +270,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +302,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +382,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -486,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -538,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg
index 8688df3f..4a9af479 100644
--- a/config/coreboot/r400_16mb/target.cfg
+++ b/config/coreboot/r400_16mb/target.cfg
@@ -1,7 +1,6 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
index cd0beb97..93499bad 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +159,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +193,7 @@ CONFIG_BOARD_LENOVO_R400=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +205,22 @@ CONFIG_BOARD_LENOVO_R400=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +261,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -260,7 +272,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +304,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +384,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +400,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -490,6 +503,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -542,7 +556,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/r400_4mb/config/libgfxinit_txtmode b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
index 37c7462d..3bbf7aaa 100644
--- a/config/coreboot/r400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +191,7 @@ CONFIG_BOARD_LENOVO_R400=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +203,22 @@ CONFIG_BOARD_LENOVO_R400=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +259,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -258,7 +270,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +302,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +382,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -486,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -538,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg
index 8688df3f..4a9af479 100644
--- a/config/coreboot/r400_4mb/target.cfg
+++ b/config/coreboot/r400_4mb/target.cfg
@@ -1,7 +1,6 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
index 665468d9..4faef26a 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +159,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +193,7 @@ CONFIG_BOARD_LENOVO_R400=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +205,22 @@ CONFIG_BOARD_LENOVO_R400=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +261,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -260,7 +272,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +304,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +384,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +400,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -490,6 +503,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -542,7 +556,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/r400_8mb/config/libgfxinit_txtmode b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
index 5b6f8870..21b32616 100644
--- a/config/coreboot/r400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r400_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +191,7 @@ CONFIG_BOARD_LENOVO_R400=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +203,22 @@ CONFIG_BOARD_LENOVO_R400=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +259,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -258,7 +270,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +302,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +382,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -486,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -538,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg
index 8688df3f..f596cc06 100644
--- a/config/coreboot/r400_8mb/target.cfg
+++ b/config/coreboot/r400_8mb/target.cfg
@@ -1,7 +1,5 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-grub_scan_disk="ahci"
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
index 1b500abb..2d7e0b54 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="r500"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +158,7 @@ CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd_nogbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -166,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -186,6 +192,7 @@ CONFIG_BOARD_LENOVO_R500=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -197,18 +204,22 @@ CONFIG_BOARD_LENOVO_R500=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_4096=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -249,8 +260,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -259,7 +271,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -292,6 +303,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -369,7 +381,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -385,6 +397,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -487,6 +500,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -539,7 +553,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/r500_4mb/config/libgfxinit_txtmode b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
index 5ec9de19..8d437bd5 100644
--- a/config/coreboot/r500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/r500_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="r500"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -152,6 +156,7 @@ CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd_nogbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -164,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -184,6 +190,7 @@ CONFIG_BOARD_LENOVO_R500=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -195,18 +202,22 @@ CONFIG_BOARD_LENOVO_R500=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_4096=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -247,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -257,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -290,6 +301,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -367,7 +379,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -383,6 +395,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -483,6 +496,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -535,7 +549,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg
index 8688df3f..4a9af479 100644
--- a/config/coreboot/r500_4mb/target.cfg
+++ b/config/coreboot/r500_4mb/target.cfg
@@ -1,7 +1,6 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
index 3128736d..e7358991 100644
--- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_DELL=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,30 +126,39 @@ CONFIG_DEVICETREE="variants/baseboard/devicetree.cb"
CONFIG_VARIANT_DIR="precision_t1650"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc."
CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
+# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
+# CONFIG_BOARD_DELL_E4300 is not set
+# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
+# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set
# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
-# CONFIG_BOARD_DELL_E6400 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set
-# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set
+# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
-# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
CONFIG_BOARD_DELL_PRECISION_T1650=y
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_BOARD_DELL_XPS_8300 is not set
CONFIG_BOARD_DELL_SNB_IVB_WORKSTATIONS=y
CONFIG_INCLUDE_SMSC_SCH5545_EC_FW=y
CONFIG_SMSC_SCH5545_EC_FW_FILE="../../../vendorfiles/t1650/sch5545ec.bin"
@@ -169,6 +179,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/t1650/12_ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/t1650/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/t1650/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -178,16 +189,19 @@ CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -228,9 +242,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -240,7 +255,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -271,6 +285,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -356,7 +371,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -371,6 +386,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -472,6 +488,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -492,8 +509,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -532,7 +549,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg
index e6d3bec6..abc1d14e 100644
--- a/config/coreboot/t1650_12mb/target.cfg
+++ b/config/coreboot/t1650_12mb/target.cfg
@@ -1,7 +1,9 @@
tree="default"
xarch="i386-elf"
payload_seabios="y"
-payload_seabios_withgrub="y"
-payload_seabios_grubonly="y"
+payload_grub="y"
payload_memtest="y"
-grub_scan_disk="ahci"
+grub_scan_disk="nvme ahci"
+grubtree="nvme"
+vcfg="t1650"
+build_depend="seabios/default grub/nvme memtest86plus"
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
index 4c3fe7d9..bda47e12 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +159,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +193,7 @@ CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +205,22 @@ CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +261,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -260,7 +272,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +304,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +384,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +400,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -490,6 +503,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -542,7 +556,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t400_16mb/config/libgfxinit_txtmode b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
index e5ef8b70..92866ae0 100644
--- a/config/coreboot/t400_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +191,7 @@ CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +203,22 @@ CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +259,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -258,7 +270,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +302,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +382,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -486,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -538,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg
index 8688df3f..4a9af479 100644
--- a/config/coreboot/t400_16mb/target.cfg
+++ b/config/coreboot/t400_16mb/target.cfg
@@ -1,7 +1,6 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
index 598ee337..c25f6b21 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +159,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +193,7 @@ CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +205,22 @@ CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +261,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -260,7 +272,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +304,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +384,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +400,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -490,6 +503,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -542,7 +556,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t400_4mb/config/libgfxinit_txtmode b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
index 30f21fc1..3eb566f6 100644
--- a/config/coreboot/t400_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +191,7 @@ CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +203,22 @@ CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +259,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -258,7 +270,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +302,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +382,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -486,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -538,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg
index 8688df3f..4a9af479 100644
--- a/config/coreboot/t400_4mb/target.cfg
+++ b/config/coreboot/t400_4mb/target.cfg
@@ -1,7 +1,6 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
index 5e198ab7..a23aa0d7 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +159,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +193,7 @@ CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +205,22 @@ CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +261,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -260,7 +272,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +304,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +384,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +400,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -490,6 +503,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -542,7 +556,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t400_8mb/config/libgfxinit_txtmode b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
index 1aa474d7..da7785f7 100644
--- a/config/coreboot/t400_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t400_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +191,7 @@ CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +203,22 @@ CONFIG_BOARD_LENOVO_T400=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +259,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -258,7 +270,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +302,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +382,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -486,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -538,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg
index 8688df3f..4a9af479 100644
--- a/config/coreboot/t400_8mb/target.cfg
+++ b/config/coreboot/t400_8mb/target.cfg
@@ -1,7 +1,6 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
diff --git a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
index 2a5b9aca..31a79444 100644
--- a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -126,18 +127,20 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -156,6 +159,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -168,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -188,6 +193,7 @@ CONFIG_BOARD_LENOVO_T420=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -199,17 +205,21 @@ CONFIG_BOARD_LENOVO_T420=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -252,9 +262,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -264,7 +275,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -295,6 +305,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -387,7 +398,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -402,6 +413,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -506,6 +518,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -526,8 +540,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -566,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg
index 8688df3f..4201beb1 100644
--- a/config/coreboot/t420_8mb/target.cfg
+++ b/config/coreboot/t420_8mb/target.cfg
@@ -1,7 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
index bfe34d36..21d4a5ff 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -126,18 +127,20 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -156,6 +159,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -168,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -188,6 +193,7 @@ CONFIG_BOARD_LENOVO_T420S=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -199,17 +205,21 @@ CONFIG_BOARD_LENOVO_T420S=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -252,9 +262,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -264,7 +275,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -295,6 +305,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -387,7 +398,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -402,6 +413,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -505,6 +517,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -525,8 +539,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -565,7 +579,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
index b1cfe169..6f060940 100644
--- a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -124,18 +125,20 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -166,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -186,6 +191,7 @@ CONFIG_BOARD_LENOVO_T420S=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -197,17 +203,21 @@ CONFIG_BOARD_LENOVO_T420S=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -250,9 +260,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -262,7 +273,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -293,6 +303,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -385,7 +396,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -400,6 +411,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -502,6 +514,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -522,8 +536,8 @@ CONFIG_VGA=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -562,7 +576,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg
index 8688df3f..4201beb1 100644
--- a/config/coreboot/t420s_8mb/target.cfg
+++ b/config/coreboot/t420s_8mb/target.cfg
@@ -1,7 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
index a293e1dd..62fbf932 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -126,18 +127,20 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +204,22 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_VBOOT_SLOTS_RW_AB=y
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -252,9 +262,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -264,7 +275,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -295,6 +305,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -387,7 +398,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -402,6 +413,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -506,6 +518,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -526,8 +540,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -566,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t430_12mb/config/libgfxinit_txtmode b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
index bbd70386..5610ea5e 100644
--- a/config/coreboot/t430_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t430_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -124,18 +125,20 @@ CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +202,22 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_VBOOT_SLOTS_RW_AB=y
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -250,9 +260,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -262,7 +273,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -293,6 +303,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -385,7 +396,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -400,6 +411,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -503,6 +515,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -523,8 +537,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -563,7 +577,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg
index 8688df3f..2556a4ce 100644
--- a/config/coreboot/t430_12mb/target.cfg
+++ b/config/coreboot/t430_12mb/target.cfg
@@ -1,7 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
index dd614202..19816005 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
@@ -37,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +94,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -126,12 +128,16 @@ CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
CONFIG_VARIANT_DIR="t440p"
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
@@ -154,6 +160,7 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_ENABLE_DDR_2X_REFRESH is not set
CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -205,14 +212,14 @@ CONFIG_PS2M_EISAID="LEN0036"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -400,6 +407,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -522,8 +530,8 @@ CONFIG_DRIVERS_MTK_WIFI=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
index a0dce901..d9627c4e 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
@@ -37,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +94,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -124,12 +126,16 @@ CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
CONFIG_VARIANT_DIR="t440p"
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
@@ -152,6 +158,7 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_ENABLE_DDR_2X_REFRESH is not set
CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -203,14 +210,14 @@ CONFIG_PS2M_EISAID="LEN0036"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -398,6 +405,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -519,8 +527,8 @@ CONFIG_DRIVERS_MTK_WIFI=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg
index 8bb575a9..e7411d7f 100644
--- a/config/coreboot/t440plibremrc_12mb/target.cfg
+++ b/config/coreboot/t440plibremrc_12mb/target.cfg
@@ -1,7 +1,9 @@
-tree="haswell"
+tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-grub_scan_disk="ahci"
+grub_scan_disk="nvme ahci"
+grubtree="xhci"
+vcfg="haswell"
+build_depend="seabios/default grub/xhci memtest86plus"
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
index 4b1d2147..951668c7 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +159,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
CONFIG_BOARD_LENOVO_T500=y
@@ -187,6 +193,7 @@ CONFIG_BOARD_LENOVO_T500=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +205,22 @@ CONFIG_BOARD_LENOVO_T500=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +261,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -260,7 +272,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +304,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +384,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +400,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -490,6 +503,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -542,7 +556,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t500_16mb/config/libgfxinit_txtmode b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
index 243d6bf0..c1ed36e9 100644
--- a/config/coreboot/t500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
CONFIG_BOARD_LENOVO_T500=y
@@ -185,6 +191,7 @@ CONFIG_BOARD_LENOVO_T500=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +203,22 @@ CONFIG_BOARD_LENOVO_T500=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +259,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -258,7 +270,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +302,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +382,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -486,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -538,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg
index 8688df3f..4a9af479 100644
--- a/config/coreboot/t500_16mb/target.cfg
+++ b/config/coreboot/t500_16mb/target.cfg
@@ -1,7 +1,6 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
index 7704b0e0..e090a1cc 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +159,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
CONFIG_BOARD_LENOVO_T500=y
@@ -187,6 +193,7 @@ CONFIG_BOARD_LENOVO_T500=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +205,22 @@ CONFIG_BOARD_LENOVO_T500=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +261,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -260,7 +272,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +304,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +384,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +400,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -490,6 +503,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -542,7 +556,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t500_4mb/config/libgfxinit_txtmode b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
index 5b5b323c..4d6a6fa9 100644
--- a/config/coreboot/t500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
CONFIG_BOARD_LENOVO_T500=y
@@ -185,6 +191,7 @@ CONFIG_BOARD_LENOVO_T500=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +203,22 @@ CONFIG_BOARD_LENOVO_T500=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +259,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -258,7 +270,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +302,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +382,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -486,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -538,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg
index 8688df3f..4a9af479 100644
--- a/config/coreboot/t500_4mb/target.cfg
+++ b/config/coreboot/t500_4mb/target.cfg
@@ -1,7 +1,6 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
index dcac539e..2020124c 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +159,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
CONFIG_BOARD_LENOVO_T500=y
@@ -187,6 +193,7 @@ CONFIG_BOARD_LENOVO_T500=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +205,22 @@ CONFIG_BOARD_LENOVO_T500=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +261,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -260,7 +272,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +304,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +384,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +400,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -490,6 +503,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -542,7 +556,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t500_8mb/config/libgfxinit_txtmode b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
index 081b6a0a..80830324 100644
--- a/config/coreboot/t500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t500_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
CONFIG_BOARD_LENOVO_T500=y
@@ -185,6 +191,7 @@ CONFIG_BOARD_LENOVO_T500=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +203,22 @@ CONFIG_BOARD_LENOVO_T500=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +259,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -258,7 +270,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +302,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +382,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -486,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -538,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg
index 8688df3f..4a9af479 100644
--- a/config/coreboot/t500_8mb/target.cfg
+++ b/config/coreboot/t500_8mb/target.cfg
@@ -1,7 +1,6 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
index bc3ef394..c83c43ba 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -126,18 +127,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t520"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -156,6 +159,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -168,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -188,6 +193,7 @@ CONFIG_BOARD_LENOVO_T520=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -199,18 +205,22 @@ CONFIG_BOARD_LENOVO_T520=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_BOARD_LENOVO_BASEBOARD_T520=y
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -253,9 +263,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -265,7 +276,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -296,6 +306,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -388,7 +399,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -403,6 +414,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -506,6 +518,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -526,8 +540,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -566,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t520_8mb/config/libgfxinit_txtmode b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
index 8c8a6145..de062a35 100644
--- a/config/coreboot/t520_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t520_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -124,18 +125,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t520"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0015"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -166,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -186,6 +191,7 @@ CONFIG_BOARD_LENOVO_T520=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -197,18 +203,22 @@ CONFIG_BOARD_LENOVO_T520=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0015"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_BOARD_LENOVO_BASEBOARD_T520=y
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -251,9 +261,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -263,7 +274,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -294,6 +304,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -386,7 +397,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -401,6 +412,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -503,6 +515,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -523,8 +537,8 @@ CONFIG_VGA=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -563,7 +577,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg
index 8688df3f..4201beb1 100644
--- a/config/coreboot/t520_8mb/target.cfg
+++ b/config/coreboot/t520_8mb/target.cfg
@@ -1,7 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
index 0d3a372a..2558ee17 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -126,18 +127,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t530"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0015"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_T530=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,19 +204,23 @@ CONFIG_BOARD_LENOVO_T530=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_VBOOT_SLOTS_RW_AB=y
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN0015"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_BOARD_LENOVO_BASEBOARD_T530=y
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -253,9 +263,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -265,7 +276,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -296,6 +306,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -388,7 +399,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -403,6 +414,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -507,6 +519,7 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -527,8 +540,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -567,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t530_12mb/config/libgfxinit_txtmode b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
index fc8c903f..999b6632 100644
--- a/config/coreboot/t530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t530_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -124,18 +125,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t530"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0015"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_T530=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,19 +202,23 @@ CONFIG_BOARD_LENOVO_T530=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_VBOOT_SLOTS_RW_AB=y
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN0015"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_BOARD_LENOVO_BASEBOARD_T530=y
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -251,9 +261,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -263,7 +274,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -294,6 +304,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -386,7 +397,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -401,6 +412,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -504,6 +516,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -524,8 +537,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -564,7 +577,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg
index 8688df3f..2556a4ce 100644
--- a/config/coreboot/t530_12mb/target.cfg
+++ b/config/coreboot/t530_12mb/target.cfg
@@ -1,7 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
index 7867f6dd..4db373a7 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -121,25 +126,34 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t60"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -147,6 +161,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -167,6 +182,7 @@ CONFIG_BOARD_LENOVO_T60=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -178,18 +194,21 @@ CONFIG_BOARD_LENOVO_T60=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="IBM0057"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -202,6 +221,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -229,22 +249,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -255,7 +276,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
#
CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -273,13 +293,13 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
-CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -346,8 +366,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -357,6 +380,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -382,8 +407,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -394,8 +418,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -404,10 +426,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -425,11 +443,10 @@ CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
@@ -445,13 +462,19 @@ CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -473,6 +496,11 @@ CONFIG_VGA=y
# Trusted Platform Module
#
CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
@@ -492,6 +520,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -543,6 +574,7 @@ CONFIG_HAVE_MP_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -562,6 +594,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#
@@ -578,6 +614,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
index aee059ba..1829c377 100644
--- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -121,25 +126,34 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t60"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -147,6 +161,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -167,6 +182,7 @@ CONFIG_BOARD_LENOVO_T60=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -178,18 +194,21 @@ CONFIG_BOARD_LENOVO_T60=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="IBM0057"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -202,6 +221,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -229,22 +249,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -255,7 +276,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
#
CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -273,13 +293,13 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
-CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -346,8 +366,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -357,6 +380,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -380,8 +405,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -392,8 +416,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -402,10 +424,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -423,11 +441,10 @@ CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
@@ -443,13 +460,19 @@ CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -471,6 +494,11 @@ CONFIG_VGA=y
# Trusted Platform Module
#
CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
@@ -490,6 +518,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -541,6 +572,7 @@ CONFIG_HAVE_MP_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -560,6 +592,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#
@@ -576,6 +612,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg
index 2daf00f7..9ceb99e8 100644
--- a/config/coreboot/t60_16mb_intelgpu/target.cfg
+++ b/config/coreboot/t60_16mb_intelgpu/target.cfg
@@ -1,7 +1,6 @@
-tree="i945"
+tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
grub_scan_disk="ahci"
-grub_background="background1024x768.png"
+build_depend="seabios/default grub/default"
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
index b42d92e7..55f101f6 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -121,25 +126,34 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t60"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -147,6 +161,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -167,6 +182,7 @@ CONFIG_BOARD_LENOVO_T60=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -178,18 +194,21 @@ CONFIG_BOARD_LENOVO_T60=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="IBM0057"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -202,6 +221,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -229,22 +249,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -255,7 +276,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
#
CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -273,13 +293,13 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
-CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -346,8 +366,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -357,6 +380,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -382,8 +407,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -394,8 +418,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -404,10 +426,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -425,11 +443,10 @@ CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
@@ -445,13 +462,19 @@ CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -473,6 +496,11 @@ CONFIG_VGA=y
# Trusted Platform Module
#
CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
@@ -492,6 +520,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -543,6 +574,7 @@ CONFIG_HAVE_MP_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -562,6 +594,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#
@@ -578,6 +614,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
index 1fc2ab3c..7e1a8807 100644
--- a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
+++ b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -121,25 +126,34 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t60"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -147,6 +161,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -167,6 +182,7 @@ CONFIG_BOARD_LENOVO_T60=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -178,18 +194,21 @@ CONFIG_BOARD_LENOVO_T60=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="IBM0057"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -202,6 +221,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -229,22 +249,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -255,7 +276,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
#
CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -273,13 +293,13 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
-CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -346,8 +366,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -357,6 +380,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -380,8 +405,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -392,8 +416,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -402,10 +424,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -423,11 +441,10 @@ CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
@@ -443,13 +460,19 @@ CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -471,6 +494,11 @@ CONFIG_VGA=y
# Trusted Platform Module
#
CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
@@ -490,6 +518,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -541,6 +572,7 @@ CONFIG_HAVE_MP_TABLE=y
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -560,6 +592,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#
@@ -576,6 +612,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg
index 2daf00f7..9ceb99e8 100644
--- a/config/coreboot/t60_intelgpu/target.cfg
+++ b/config/coreboot/t60_intelgpu/target.cfg
@@ -1,7 +1,6 @@
-tree="i945"
+tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
grub_scan_disk="ahci"
-grub_background="background1024x768.png"
+build_depend="seabios/default grub/default"
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
index cc011456..d8642c08 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +159,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +193,7 @@ CONFIG_BOARD_LENOVO_W500=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +205,22 @@ CONFIG_BOARD_LENOVO_W500=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +261,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -260,7 +272,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +304,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +384,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +400,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -490,6 +503,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -542,7 +556,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/w500_16mb/config/libgfxinit_txtmode b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
index d63b87ea..6e094553 100644
--- a/config/coreboot/w500_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +191,7 @@ CONFIG_BOARD_LENOVO_W500=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +203,22 @@ CONFIG_BOARD_LENOVO_W500=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +259,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -258,7 +270,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +302,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +382,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -486,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -538,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg
index 8688df3f..4a9af479 100644
--- a/config/coreboot/w500_16mb/target.cfg
+++ b/config/coreboot/w500_16mb/target.cfg
@@ -1,7 +1,6 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
index 7b1a2903..0e2b4963 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +159,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +193,7 @@ CONFIG_BOARD_LENOVO_W500=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +205,22 @@ CONFIG_BOARD_LENOVO_W500=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +261,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -260,7 +272,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +304,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +384,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +400,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -490,6 +503,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -542,7 +556,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/w500_4mb/config/libgfxinit_txtmode b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
index 53e1a547..bc35cd23 100644
--- a/config/coreboot/w500_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +191,7 @@ CONFIG_BOARD_LENOVO_W500=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +203,22 @@ CONFIG_BOARD_LENOVO_W500=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +259,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -258,7 +270,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +302,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +382,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -486,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -538,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg
index 8688df3f..4a9af479 100644
--- a/config/coreboot/w500_4mb/target.cfg
+++ b/config/coreboot/w500_4mb/target.cfg
@@ -1,7 +1,6 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
index 1e44e5c2..ed2cd9ef 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -129,16 +130,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +159,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +193,7 @@ CONFIG_BOARD_LENOVO_W500=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,18 +205,22 @@ CONFIG_BOARD_LENOVO_W500=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -250,8 +261,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -260,7 +272,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -293,6 +304,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -372,7 +384,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -388,6 +400,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -490,6 +503,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -542,7 +556,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/w500_8mb/config/libgfxinit_txtmode b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
index d7066e43..e998c77b 100644
--- a/config/coreboot/w500_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w500_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="t400"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +191,7 @@ CONFIG_BOARD_LENOVO_W500=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,18 +203,22 @@ CONFIG_BOARD_LENOVO_W500=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_TTYS0_BAUD=115200
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -248,8 +259,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -258,7 +270,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -291,6 +302,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -370,7 +382,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -386,6 +398,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -486,6 +499,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -538,7 +552,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg
index 8688df3f..4a9af479 100644
--- a/config/coreboot/w500_8mb/target.cfg
+++ b/config/coreboot/w500_8mb/target.cfg
@@ -1,7 +1,6 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
index 16127d90..869e0a4b 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -126,18 +127,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="w530"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0015"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +192,7 @@ CONFIG_BOARD_LENOVO_W530=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,19 +204,23 @@ CONFIG_BOARD_LENOVO_W530=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_VBOOT_SLOTS_RW_AB=y
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN0015"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_BOARD_LENOVO_BASEBOARD_T530=y
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -253,9 +263,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -265,7 +276,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -296,6 +306,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -388,7 +399,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -403,6 +414,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -508,6 +520,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -528,8 +541,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -568,7 +581,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/w530_12mb/config/libgfxinit_txtmode b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
index 13cfb5d9..3d247345 100644
--- a/config/coreboot/w530_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w530_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -124,18 +125,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="w530"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN0015"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +156,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +169,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +190,7 @@ CONFIG_BOARD_LENOVO_W530=y
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,19 +202,23 @@ CONFIG_BOARD_LENOVO_W530=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_VBOOT_SLOTS_RW_AB=y
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN0015"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_BOARD_LENOVO_BASEBOARD_T530=y
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -251,9 +261,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -263,7 +274,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -294,6 +304,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -386,7 +397,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -401,6 +412,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -505,6 +517,7 @@ CONFIG_VGA=y
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -525,8 +538,8 @@ CONFIG_DRIVERS_WIFI_GENERIC=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -565,7 +578,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg
index 8688df3f..2556a4ce 100644
--- a/config/coreboot/w530_12mb/target.cfg
+++ b/config/coreboot/w530_12mb/target.cfg
@@ -1,7 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
index ae155585..944e3b3d 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb
@@ -37,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +94,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -126,12 +128,16 @@ CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
CONFIG_VARIANT_DIR="w541"
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
@@ -154,6 +160,7 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_ENABLE_DDR_2X_REFRESH is not set
CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -205,14 +212,14 @@ CONFIG_PS2M_EISAID="LEN004A"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -400,6 +407,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -521,8 +529,8 @@ CONFIG_DRIVERS_MTK_WIFI=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
diff --git a/config/coreboot/w541_12mb/config/libgfxinit_txtmode b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
index 9a891434..e07e8867 100644
--- a/config/coreboot/w541_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541_12mb/config/libgfxinit_txtmode
@@ -37,7 +37,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +54,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +66,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +94,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -124,12 +126,16 @@ CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
CONFIG_VARIANT_DIR="w541"
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_L1_SUB_STATE=y
+CONFIG_PCIEXP_CLK_PM=y
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
@@ -152,6 +158,7 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_ENABLE_DDR_2X_REFRESH is not set
CONFIG_PCIEXP_AER=y
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -203,14 +210,14 @@ CONFIG_PS2M_EISAID="LEN004A"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-CONFIG_PCIEXP_L1_SUB_STATE=y
-CONFIG_PCIEXP_CLK_PM=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -398,6 +405,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -518,8 +526,8 @@ CONFIG_DRIVERS_MTK_WIFI=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg
index 8bb575a9..e7411d7f 100644
--- a/config/coreboot/w541_12mb/target.cfg
+++ b/config/coreboot/w541_12mb/target.cfg
@@ -1,7 +1,9 @@
-tree="haswell"
+tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-grub_scan_disk="ahci"
+grub_scan_disk="nvme ahci"
+grubtree="xhci"
+vcfg="haswell"
+build_depend="seabios/default grub/xhci memtest86plus"
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
index 6dcc4bca..646aa044 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x200"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +191,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
CONFIG_BOARD_LENOVO_X200=y
@@ -196,17 +203,21 @@ CONFIG_BOARD_LENOVO_X200=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -247,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -257,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -289,6 +300,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -367,7 +379,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -382,6 +394,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -487,6 +500,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -539,7 +553,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x200_16mb/config/libgfxinit_txtmode b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
index a7c23af7..dd4c7e97 100644
--- a/config/coreboot/x200_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,16 +126,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x200"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,6 +155,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +168,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -183,6 +189,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
CONFIG_BOARD_LENOVO_X200=y
@@ -194,17 +201,21 @@ CONFIG_BOARD_LENOVO_X200=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -245,8 +256,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -255,7 +267,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -287,6 +298,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -365,7 +377,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -380,6 +392,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -483,6 +496,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -535,7 +549,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg
index 8688df3f..4a9af479 100644
--- a/config/coreboot/x200_16mb/target.cfg
+++ b/config/coreboot/x200_16mb/target.cfg
@@ -1,7 +1,6 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
index b522fff3..0a7710f4 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x200"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +191,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
CONFIG_BOARD_LENOVO_X200=y
@@ -196,17 +203,21 @@ CONFIG_BOARD_LENOVO_X200=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -247,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -257,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -289,6 +300,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -367,7 +379,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -382,6 +394,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -487,6 +500,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -539,7 +553,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x200_4mb/config/libgfxinit_txtmode b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
index e7d4a538..68f067fa 100644
--- a/config/coreboot/x200_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,16 +126,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x200"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,6 +155,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +168,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -183,6 +189,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
CONFIG_BOARD_LENOVO_X200=y
@@ -194,17 +201,21 @@ CONFIG_BOARD_LENOVO_X200=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -245,8 +256,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -255,7 +267,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -287,6 +298,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -365,7 +377,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -380,6 +392,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -483,6 +496,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -535,7 +549,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg
index 8688df3f..4a9af479 100644
--- a/config/coreboot/x200_4mb/target.cfg
+++ b/config/coreboot/x200_4mb/target.cfg
@@ -1,7 +1,6 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
index 12e8cb6e..15b698e4 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x200"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +191,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
CONFIG_BOARD_LENOVO_X200=y
@@ -196,17 +203,21 @@ CONFIG_BOARD_LENOVO_X200=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -247,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -257,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -289,6 +300,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -367,7 +379,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -382,6 +394,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -487,6 +500,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -539,7 +553,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x200_8mb/config/libgfxinit_txtmode b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
index ca608667..2d2f81f2 100644
--- a/config/coreboot/x200_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x200_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,16 +126,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x200"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="LEN0010"
-CONFIG_PS2M_EISAID="IBM3780"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,6 +155,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +168,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -183,6 +189,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
CONFIG_BOARD_LENOVO_X200=y
@@ -194,17 +201,21 @@ CONFIG_BOARD_LENOVO_X200=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="LEN0010"
+CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -245,8 +256,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -255,7 +267,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -287,6 +298,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -365,7 +377,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -380,6 +392,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -483,6 +496,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -535,7 +549,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg
index 8688df3f..4a9af479 100644
--- a/config/coreboot/x200_8mb/target.cfg
+++ b/config/coreboot/x200_8mb/target.cfg
@@ -1,7 +1,6 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
index 3aaac0c4..9661ff3c 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,18 +128,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x220"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -157,6 +160,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -169,6 +173,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -189,6 +194,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -200,17 +206,21 @@ CONFIG_BOARD_LENOVO_X220=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -253,9 +263,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -265,7 +276,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -296,6 +306,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -388,7 +399,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -403,6 +414,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -506,6 +518,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -526,8 +540,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -566,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x220_8mb/config/libgfxinit_txtmode b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
index 0e679481..089c3e0b 100644
--- a/config/coreboot/x220_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x220_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x220"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -155,6 +158,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -167,6 +171,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -187,6 +192,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -198,17 +204,21 @@ CONFIG_BOARD_LENOVO_X220=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -251,9 +261,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -263,7 +274,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -294,6 +304,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -386,7 +397,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -401,6 +412,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -503,6 +515,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -523,8 +537,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -563,7 +577,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg
index 8688df3f..4201beb1 100644
--- a/config/coreboot/x220_8mb/target.cfg
+++ b/config/coreboot/x220_8mb/target.cfg
@@ -1,7 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
+vcfg="sandybridge"
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
index 72e1d756..b2efa38a 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,18 +128,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x230"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -156,6 +159,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -168,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -188,6 +193,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -199,18 +205,22 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_BOARD_LENOVO_X230=y
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_VBOOT_SLOTS_RW_AB=y
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -253,9 +263,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -265,7 +276,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -296,6 +306,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -388,7 +399,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -403,6 +414,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -506,6 +518,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -526,8 +540,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -566,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x230_12mb/config/libgfxinit_txtmode b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
index d8fa1e98..f92b4ace 100644
--- a/config/coreboot/x230_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x230"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -166,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -186,6 +191,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -197,18 +203,22 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_BOARD_LENOVO_X230=y
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_VBOOT_SLOTS_RW_AB=y
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -251,9 +261,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -263,7 +274,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -294,6 +304,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -386,7 +397,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -401,6 +412,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -503,6 +515,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -523,8 +537,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -563,7 +577,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg
index 8688df3f..2556a4ce 100644
--- a/config/coreboot/x230_12mb/target.cfg
+++ b/config/coreboot/x230_12mb/target.cfg
@@ -1,7 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
index 2de1cb4a..1bd1259b 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,18 +128,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x230"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -156,6 +159,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -168,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -188,6 +193,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -199,18 +205,22 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_BOARD_LENOVO_X230=y
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_VBOOT_SLOTS_RW_AB=y
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -253,9 +263,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -265,7 +276,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -296,6 +306,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -388,7 +399,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -403,6 +414,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -506,6 +518,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -526,8 +540,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -566,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x230_16mb/config/libgfxinit_txtmode b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
index daaae9f4..93511360 100644
--- a/config/coreboot/x230_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x230"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -166,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -186,6 +191,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -197,18 +203,22 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
CONFIG_BOARD_LENOVO_X230=y
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_VBOOT_SLOTS_RW_AB=y
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -251,9 +261,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -263,7 +274,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -294,6 +304,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -386,7 +397,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -401,6 +412,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -503,6 +515,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -523,8 +537,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -563,7 +577,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg
index 8688df3f..2556a4ce 100644
--- a/config/coreboot/x230_16mb/target.cfg
+++ b/config/coreboot/x230_16mb/target.cfg
@@ -1,7 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
index ca11d165..94bc6d0b 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,18 +128,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x230"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -156,6 +159,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -168,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -188,6 +193,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -199,18 +205,22 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_X230 is not set
CONFIG_BOARD_LENOVO_X230T=y
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_VBOOT_SLOTS_RW_AB=y
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -253,9 +263,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -265,7 +276,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -296,6 +306,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -388,7 +399,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -403,6 +414,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -506,6 +518,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -526,8 +540,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -566,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
index bad2ecd6..98a489a6 100644
--- a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x230"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -166,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -186,6 +191,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -197,18 +203,22 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_X230 is not set
CONFIG_BOARD_LENOVO_X230T=y
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_VBOOT_SLOTS_RW_AB=y
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -251,9 +261,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -263,7 +274,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -294,6 +304,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -386,7 +397,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -401,6 +412,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -503,6 +515,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -523,8 +537,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -563,7 +577,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg
index 8688df3f..2556a4ce 100644
--- a/config/coreboot/x230t_12mb/target.cfg
+++ b/config/coreboot/x230t_12mb/target.cfg
@@ -1,7 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
index c98c70d5..94a44d3a 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,18 +128,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x230"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -156,6 +159,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -168,6 +172,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -188,6 +193,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -199,18 +205,22 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_X230 is not set
CONFIG_BOARD_LENOVO_X230T=y
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_VBOOT_SLOTS_RW_AB=y
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -253,9 +263,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -265,7 +276,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -296,6 +306,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -388,7 +399,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -403,6 +414,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -506,6 +518,8 @@ CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -526,8 +540,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -566,7 +580,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
index c0d848d0..6cf264f6 100644
--- a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_TSEG_STAGE_CACHE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_NO_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_NO_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,18 +126,20 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x230"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+CONFIG_PCIEXP_ASPM=y
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_DRAM_RESET_GATE_GPIO=10
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
CONFIG_TPM_PIRQ=0x0
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="LEN0020"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -154,6 +157,7 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd"
CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin"
CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -166,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -186,6 +191,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -197,18 +203,22 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_X230 is not set
CONFIG_BOARD_LENOVO_X230T=y
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_VBOOT_SLOTS_RW_AB=y
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="LEN0020"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-CONFIG_PCIEXP_ASPM=y
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -251,9 +261,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -263,7 +274,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
@@ -294,6 +304,7 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
@@ -386,7 +397,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -401,6 +412,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -503,6 +515,8 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
CONFIG_VGA=y
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -523,8 +537,8 @@ CONFIG_DRIVERS_RICOH_RCE822=y
#
# Trusted Platform Module
#
-# CONFIG_NO_TPM is not set
CONFIG_TPM1=y
+# CONFIG_TPM2 is not set
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM1=y
# CONFIG_TPM_DEACTIVATE is not set
@@ -563,7 +577,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg
index 8688df3f..2556a4ce 100644
--- a/config/coreboot/x230t_16mb/target.cfg
+++ b/config/coreboot/x230t_16mb/target.cfg
@@ -1,7 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
grub_scan_disk="ahci"
+vcfg="ivybridge"
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
index 61fedae8..6120c2a8 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x301"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +191,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,17 +203,21 @@ CONFIG_BOARD_LENOVO_X301=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -247,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -257,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -289,6 +300,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -367,7 +379,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -382,6 +394,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -487,6 +500,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -539,7 +553,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x301_16mb/config/libgfxinit_txtmode b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
index d5c24416..96911b1e 100644
--- a/config/coreboot/x301_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,16 +126,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x301"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,6 +155,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +168,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -183,6 +189,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -194,17 +201,21 @@ CONFIG_BOARD_LENOVO_X301=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -245,8 +256,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -255,7 +267,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -287,6 +298,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -365,7 +377,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -380,6 +392,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -483,6 +496,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -535,7 +549,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg
index 06f3025c..16ffc818 100644
--- a/config/coreboot/x301_16mb/target.cfg
+++ b/config/coreboot/x301_16mb/target.cfg
@@ -1,8 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-grub_scan_disk="ahci"
release="n"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
index 02a910d7..1600d752 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x301"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +191,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,17 +203,21 @@ CONFIG_BOARD_LENOVO_X301=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -247,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -257,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -289,6 +300,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -367,7 +379,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -382,6 +394,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -487,6 +500,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -539,7 +553,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x301_4mb/config/libgfxinit_txtmode b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
index f6652cfc..6931179e 100644
--- a/config/coreboot/x301_4mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_4mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,16 +126,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x301"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,6 +155,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +168,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -183,6 +189,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -194,17 +201,21 @@ CONFIG_BOARD_LENOVO_X301=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -245,8 +256,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -255,7 +267,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -287,6 +298,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -365,7 +377,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -380,6 +392,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -483,6 +496,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -535,7 +549,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg
index 06f3025c..16ffc818 100644
--- a/config/coreboot/x301_4mb/target.cfg
+++ b/config/coreboot/x301_4mb/target.cfg
@@ -1,8 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-grub_scan_disk="ahci"
release="n"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
index d800eed3..c4aa7b1d 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -127,16 +128,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x301"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -153,6 +157,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -165,6 +170,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -185,6 +191,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -196,17 +203,21 @@ CONFIG_BOARD_LENOVO_X301=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -247,8 +258,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -257,7 +269,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -289,6 +300,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -367,7 +379,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -382,6 +394,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -487,6 +500,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -539,7 +553,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x301_8mb/config/libgfxinit_txtmode b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
index ef88107c..7385ce0a 100644
--- a/config/coreboot/x301_8mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x301_8mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -37,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -55,8 +53,8 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
@@ -67,11 +65,13 @@ CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
@@ -93,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -125,16 +126,19 @@ CONFIG_DEVICETREE="devicetree.cb"
CONFIG_VARIANT_DIR="x301"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
+CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_INTEL_GMA_VBT_FILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
-CONFIG_USBDEBUG_HCD_INDEX=2
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
-CONFIG_PS2K_EISAID="PNP0303"
-CONFIG_PS2M_EISAID="PNP0F13"
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,6 +155,7 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd"
CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -163,6 +168,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -183,6 +189,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -194,17 +201,21 @@ CONFIG_BOARD_LENOVO_X301=y
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_DRIVER_LENOVO_SERIALS=y
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
CONFIG_GFX_GMA_PANEL_1_PORT="LVDS"
CONFIG_D3COLD_SUPPORT=y
-# CONFIG_PCIEXP_ASPM is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -245,8 +256,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+# CONFIG_USE_X86_64_SUPPORT is not set
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -255,7 +267,6 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0x61256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
@@ -287,6 +298,7 @@ CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
@@ -365,7 +377,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
-CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+CONFIG_HAVE_X86_64_SUPPORT=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
@@ -380,6 +392,7 @@ CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -483,6 +496,7 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -535,7 +549,6 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
-CONFIG_HEAP_SIZE=0x100000
#
# Console
diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg
index 06f3025c..16ffc818 100644
--- a/config/coreboot/x301_8mb/target.cfg
+++ b/config/coreboot/x301_8mb/target.cfg
@@ -1,8 +1,7 @@
tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
payload_memtest="y"
-grub_scan_disk="ahci"
release="n"
+grub_scan_disk="ahci"
diff --git a/config/coreboot/x60/config/libgfxinit_corebootfb b/config/coreboot/x60/config/libgfxinit_corebootfb
index 8197735b..432da395 100644
--- a/config/coreboot/x60/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -118,30 +123,38 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_VBOOT_VBNV_OFFSET=0x76
CONFIG_IRQ_SLOT_COUNT=18
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_VBOOT_SLOTS_RW_A=y
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -149,6 +162,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -169,6 +183,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -180,18 +195,21 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
CONFIG_BOARD_LENOVO_X60=y
CONFIG_DRIVER_LENOVO_SERIALS=y
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -204,6 +222,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -231,22 +250,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -257,7 +277,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
#
CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -275,13 +294,13 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
-CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -349,8 +368,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -360,6 +382,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -385,8 +409,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -397,8 +420,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -407,10 +428,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -432,11 +449,10 @@ CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
@@ -452,13 +468,19 @@ CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -480,6 +502,11 @@ CONFIG_VGA=y
# Trusted Platform Module
#
CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
@@ -499,6 +526,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -552,6 +582,7 @@ CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -571,6 +602,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#
@@ -588,6 +623,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/x60/config/libgfxinit_txtmode b/config/coreboot/x60/config/libgfxinit_txtmode
index 9ac40a02..9cbd428a 100644
--- a/config/coreboot/x60/config/libgfxinit_txtmode
+++ b/config/coreboot/x60/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -118,30 +123,38 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_VBOOT_VBNV_OFFSET=0x76
CONFIG_IRQ_SLOT_COUNT=18
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_VBOOT_SLOTS_RW_A=y
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -149,6 +162,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -169,6 +183,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -180,18 +195,21 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
CONFIG_BOARD_LENOVO_X60=y
CONFIG_DRIVER_LENOVO_SERIALS=y
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -204,6 +222,7 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=2048
@@ -231,22 +250,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -257,7 +277,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
#
CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -275,13 +294,13 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
-CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -349,8 +368,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -360,6 +382,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -383,8 +407,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -395,8 +418,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -405,10 +426,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -430,11 +447,10 @@ CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
@@ -450,13 +466,19 @@ CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -478,6 +500,11 @@ CONFIG_VGA=y
# Trusted Platform Module
#
CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
@@ -497,6 +524,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -550,6 +580,7 @@ CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -569,6 +600,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#
@@ -586,6 +621,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg
index 2daf00f7..9ceb99e8 100644
--- a/config/coreboot/x60/target.cfg
+++ b/config/coreboot/x60/target.cfg
@@ -1,7 +1,6 @@
-tree="i945"
+tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
grub_scan_disk="ahci"
-grub_background="background1024x768.png"
+build_depend="seabios/default grub/default"
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
index fc3a4402..93d86ad5 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -118,30 +123,38 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_VBOOT_VBNV_OFFSET=0x76
CONFIG_IRQ_SLOT_COUNT=18
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_VBOOT_SLOTS_RW_A=y
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -149,6 +162,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -169,6 +183,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -180,18 +195,21 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
CONFIG_BOARD_LENOVO_X60=y
CONFIG_DRIVER_LENOVO_SERIALS=y
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -204,6 +222,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -231,22 +250,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -257,7 +277,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
#
CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -275,13 +294,13 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
-CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -349,8 +368,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -360,6 +382,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -385,8 +409,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -397,8 +420,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -407,10 +428,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -432,11 +449,10 @@ CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
@@ -452,13 +468,19 @@ CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -480,6 +502,11 @@ CONFIG_VGA=y
# Trusted Platform Module
#
CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
@@ -499,6 +526,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -552,6 +582,7 @@ CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -571,6 +602,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#
@@ -588,6 +623,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_txtmode b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
index c4049565..d46b991e 100644
--- a/config/coreboot/x60_16mb/config/libgfxinit_txtmode
+++ b/config/coreboot/x60_16mb/config/libgfxinit_txtmode
@@ -6,7 +6,6 @@
#
# General setup
#
-CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION=""
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
@@ -22,6 +21,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -36,7 +36,6 @@ CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
-# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
@@ -54,28 +53,33 @@ CONFIG_TSEG_STAGE_CACHE=y
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
-# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOOSTAR is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
# CONFIG_VENDOR_CLEVO is not set
# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_CWWK is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_FRAMEWORK is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_LIBRETREND is not set
@@ -89,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAPTOR_CS is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
@@ -118,30 +123,38 @@ CONFIG_POST_DEVICE=y
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
-CONFIG_VBOOT_VBNV_OFFSET=0x76
CONFIG_IRQ_SLOT_COUNT=18
CONFIG_OVERRIDE_DEVICETREE=""
# CONFIG_VGA_BIOS is not set
+# CONFIG_PCIEXP_ASPM is not set
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_VBOOT_SLOTS_RW_A=y
CONFIG_DCACHE_RAM_BASE=0xfefc0000
CONFIG_DCACHE_RAM_SIZE=0x8000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
-CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
-CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_ACPI_FNKEY_GEN_SCANCODE=0
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60"
CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
@@ -149,6 +162,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
# CONFIG_BOARD_LENOVO_L520 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T500 is not set
@@ -169,6 +183,7 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_Z61T is not set
# CONFIG_BOARD_LENOVO_R60 is not set
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
+# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
@@ -180,18 +195,21 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X230T is not set
# CONFIG_BOARD_LENOVO_X230S is not set
+# CONFIG_BOARD_LENOVO_X230_EDP is not set
CONFIG_BOARD_LENOVO_X60=y
CONFIG_DRIVER_LENOVO_SERIALS=y
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="IBM3780"
CONFIG_THINKPADEC_HKEY_EISAID="IBM0068"
-# CONFIG_DEBUG_SMI is not set
-# CONFIG_PCIEXP_L1_SUB_STATE is not set
-# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_D3COLD_SUPPORT=y
# CONFIG_DRIVERS_UART_8250IO is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
-CONFIG_HEAP_SIZE=0x4000
+CONFIG_HEAP_SIZE=0x100000
CONFIG_EC_GPE_SCI=0x50
+CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown"
+CONFIG_EC_STARLABS_BATTERY_TYPE="LION"
+CONFIG_EC_STARLABS_BATTERY_OEM="Unknown"
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
@@ -204,6 +222,7 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=16384
@@ -231,22 +250,23 @@ CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
-CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_EHCI_BAR=0xfef00000
+CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
-# CONFIG_PCIEXP_ASPM is not set
# CONFIG_PCIEXP_COMMON_CLOCK is not set
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_INTEL_HAS_TOP_SWAP=y
# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set
@@ -257,7 +277,6 @@ CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000
#
CONFIG_CPU_INTEL_MODEL_6EX=y
CONFIG_CPU_INTEL_MODEL_6FX=y
-CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_CPU_INTEL_SOCKET_M=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
@@ -275,13 +294,13 @@ CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_SETUP_XIP_CACHE=y
-CONFIG_LOGICAL_CPUS=y
CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_LAPIC_REMAP_MITIGATION=y
+CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
-CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
@@ -349,8 +368,11 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -360,6 +382,8 @@ CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
+# CONFIG_DUMP_SMBIOS_TYPE17 is not set
+CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0
# end of Chipset
#
@@ -383,8 +407,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_CARDBUS_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -395,8 +418,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -405,10 +426,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
-CONFIG_NO_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -430,11 +447,10 @@ CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
-CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
-CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_ISSI=y
# CONFIG_DRIVERS_UART_OXPCIE is not set
CONFIG_HAVE_USBDEBUG=y
# CONFIG_USBDEBUG is not set
@@ -450,13 +466,19 @@ CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_INTEL_GMA_SSC_ALTERNATE_REF=y
-CONFIG_INTEL_GMA_OPREGION_2_0=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_VGA=y
# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+CONFIG_DRIVERS_MTK_WIFI=y
# end of Generic Drivers
#
@@ -478,6 +500,11 @@ CONFIG_VGA=y
# Trusted Platform Module
#
CONFIG_NO_TPM=y
+CONFIG_PCR_BOOT_MODE=1
+CONFIG_PCR_HWID=1
+CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
+CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
@@ -497,6 +524,9 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
+CONFIG_ACPI_NO_CUSTOM_MADT=y
+CONFIG_ACPI_COMMON_MADT_LAPIC=y
+CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
@@ -550,6 +580,7 @@ CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
+CONFIG_BIOS_VENDOR="coreboot"
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
@@ -569,6 +600,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#
@@ -586,6 +621,7 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
+# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_DECOMPRESS_OFAST=y
diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg
index 2daf00f7..9ceb99e8 100644
--- a/config/coreboot/x60_16mb/target.cfg
+++ b/config/coreboot/x60_16mb/target.cfg
@@ -1,7 +1,6 @@
-tree="i945"
+tree="default"
xarch="i386-elf"
-payload_grub="y"
-payload_grub_withseabios="y"
payload_seabios="y"
+payload_grub="y"
grub_scan_disk="ahci"
-grub_background="background1024x768.png"
+build_depend="seabios/default grub/default"
diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg
new file mode 100644
index 00000000..73cc957d
--- /dev/null
+++ b/config/data/coreboot/mkhelper.cfg
@@ -0,0 +1,16 @@
+. "include/rom.sh"
+
+makeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
+build_depend="seabios/default grub/default memtest86plus"
+
+seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
+
+pv="payload_uboot payload_seabios payload_memtest payload_grub"
+v="initmode ubootelf grub_scan_disk uboot_config grubtree grubelf pname"
+v="$v displaymode tmprom newrom"
+eval `setvars "n" $pv`
+eval `setvars "" $v`
+
+premake="mkvendorfiles"
+mkhelper="mkcorebootbin"
+postmake="mkcoreboottar"
diff --git a/config/data/deguard/appdir.patch b/config/data/deguard/appdir.patch
new file mode 100644
index 00000000..722a6168
--- /dev/null
+++ b/config/data/deguard/appdir.patch
@@ -0,0 +1,131 @@
+From b978cbb651a4bdd84be4a92ae240c8ca99ef21eb Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Tue, 24 Sep 2024 16:44:51 +0100
+Subject: [PATCH 1/1] Patch to integrate with lbmk
+
+Deguard is a standalone utility, but the way it works
+doesn't integrate well with lbmk.
+
+Remove the download logic, because lbmk already downloads
+the requisite zip file.
+
+Also not required, but nice, and included in this patch:
+
+Detect what python version is available, and make sure it's
+python 3.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ RUNME.sh | 64 +++++++++++++++++++++++++++++++-------------------------
+ 1 file changed, 36 insertions(+), 28 deletions(-)
+
+diff --git a/RUNME.sh b/RUNME.sh
+index 9809f89..7404ba6 100755
+--- a/RUNME.sh
++++ b/RUNME.sh
+@@ -1,25 +1,33 @@
+ #!/bin/sh
+ # SPDX-License-Identifier: GPL-2.0-only
+
++# This version of deguard is patched to integrate with lbmk.
++# Do not run this version standalone. Please use src/deguard/ instead.
++
+ set -e
+
+-if [ ! -f "me.bin" ]; then
+- wget "https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip"
+- unzip "H110M-DGS(7.30)ROM.zip" H11MDGS7.30
+- rm "H110M-DGS(7.30)ROM.zip"
+- dd if=H11MDGS7.30 of=me.bin skip=1 count=511 bs=4096
+- rm H11MDGS7.30
++pyver="2"
++python="python3"
++which python3 || python="python"
++which $python || pyver=""
++[ -n "$pyver" ] && pyver="$($python --version | awk '{print $2}')"
++if [ "${pyver%%.*}" != "3" ]; then
++ printf "Wrong python version, or python missing. Must be python 3.\n" 1>&2
++ exit 1
+ fi
+
++rm -f me.bin MFS.part
++dd if=../H11MDGS7.30 of=me.bin skip=1 count=511 bs=4096
++
+ dd if=me.bin of=MFS.part skip=168 count=100 bs=4096
+
+ # Extract file number 7 (fitc.cfg)
+-python3 MFSUtil.py -m MFS.part -x -i 7 -o fitc.cfg
++$python MFSUtil.py -m MFS.part -x -i 7 -o fitc.cfg
+
+ # Remove /home/mca/eom
+-python3 MFSUtil.py -c fitc.cfg -r -f /home/mca/eom -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg -r -f /home/mca/eom -o fitc.cfg
+ # Remove /home/bup/ct
+-python3 MFSUtil.py -c fitc.cfg -r -f /home/bup/ct -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg -r -f /home/bup/ct -o fitc.cfg
+
+ # list off files differing in optiplex 3050 fw vs donor
+ files="
+@@ -39,40 +47,40 @@ secureboot/pubkeyhash
+
+ for i in $files
+ do
+- python3 MFSUtil.py -c fitc.cfg -r -f /home/$i -o fitc.cfg
++ $python MFSUtil.py -c fitc.cfg -r -f /home/$i -o fitc.cfg
+ done
+
+ # Add /home/mca/eom
+ dd if=/dev/zero of=eom count=1 bs=1
+-python3 MFSUtil.py -c fitc.cfg --add eom --alignment 2 --mode ' --Irw-r-----' \
++$python MFSUtil.py -c fitc.cfg --add eom --alignment 2 --mode ' --Irw-r-----' \
+ --opt '?!-F' --uid 0 --gid 238 -f /home/mca/eom -o fitc.cfg
+
+ # Add /home/bup/ct
+-python3 gen_shellcode.py -p H -v 11.6.0.1126 --fake-fpfs=fpfs/optiplex_3050 -o ct
+-python3 MFSUtil.py -c fitc.cfg --add ct --alignment 2 --mode ' ---rwxr-----' \
++$python gen_shellcode.py -p H -v 11.6.0.1126 --fake-fpfs=fpfs/optiplex_3050 -o ct
++$python MFSUtil.py -c fitc.cfg --add ct --alignment 2 --mode ' ---rwxr-----' \
+ --opt '?--F' --uid 3 --gid 351 -f /home/bup/ct -o fitc.cfg
+
+ # Add dell files
+-python3 MFSUtil.py -c fitc.cfg --add data/emu_fuse_map --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=3 --gid=238 -f /home/bup/bup_sku/emu_fuse_map -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/plat_n_sku --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=3 --gid=238 -f /home/bup/bup_sku/plat_n_sku -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/fwuoemid --alignment 2 --mode=' ---rw-rw----' --opt='?--F' --uid=32 --gid=238 -f /home/fwupdate/fwuoemid -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/prof0 --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=55 --gid=238 -f /home/icc/prof0 -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/device_ports --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=73 --gid=238 -f /home/mctp/device_ports -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/hdcp_ports --alignment 2 --mode=' -EIrw-r-----' --opt='?!-F' --uid=80 --gid=238 -f /home/pavp/hdcp_ports -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/cfg_rules --alignment 2 --mode=' ---rw-rw----' --opt='-!MF' --uid=85 --gid=238 -f /home/policy/cfgmgr/cfg_rules -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/bootpolres --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/bootpolres -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/bootpoltype --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/bootpoltype -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/enfpolicy --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/enfpolicy -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/kmid --alignment 2 --mode=' ---rw-r-----' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/kmid -o fitc.cfg
+-python3 MFSUtil.py -c fitc.cfg --add data/pubkeyhash --alignment 2 --mode=' ---rw-rw-r--' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/pubkeyhash -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/emu_fuse_map --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=3 --gid=238 -f /home/bup/bup_sku/emu_fuse_map -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/plat_n_sku --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=3 --gid=238 -f /home/bup/bup_sku/plat_n_sku -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/fwuoemid --alignment 2 --mode=' ---rw-rw----' --opt='?--F' --uid=32 --gid=238 -f /home/fwupdate/fwuoemid -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/prof0 --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=55 --gid=238 -f /home/icc/prof0 -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/device_ports --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=73 --gid=238 -f /home/mctp/device_ports -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/hdcp_ports --alignment 2 --mode=' -EIrw-r-----' --opt='?!-F' --uid=80 --gid=238 -f /home/pavp/hdcp_ports -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/cfg_rules --alignment 2 --mode=' ---rw-rw----' --opt='-!MF' --uid=85 --gid=238 -f /home/policy/cfgmgr/cfg_rules -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/bootpolres --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/bootpolres -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/bootpoltype --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/bootpoltype -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/enfpolicy --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/enfpolicy -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/kmid --alignment 2 --mode=' ---rw-r-----' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/kmid -o fitc.cfg
++$python MFSUtil.py -c fitc.cfg --add data/pubkeyhash --alignment 2 --mode=' ---rw-rw-r--' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/pubkeyhash -o fitc.cfg
+
+ # Delete file id 7 (fitc.cfg) from the MFS partition
+-python3 MFSUtil.py -m MFS.part -r -i 7 -o MFS.part
++$python MFSUtil.py -m MFS.part -r -i 7 -o MFS.part
+ # Delete file id 8 (home) from the MFS partition
+-python3 MFSUtil.py -m MFS.part -r -i 8 -o MFS.part
++$python MFSUtil.py -m MFS.part -r -i 8 -o MFS.part
+
+ # Add the modified fitc.cfg into the MFS partition
+-python3 MFSUtil.py -m MFS.part -a fitc.cfg --deoptimize -i 7 -o MFS.part
++$python MFSUtil.py -m MFS.part -a fitc.cfg --deoptimize -i 7 -o MFS.part
+
+ # Write
+ dd conv=notrunc if=MFS.part of=me.bin seek=168 count=100 bs=4096
+--
+2.39.5
+
diff --git a/config/data/flashprog/build.list b/config/data/flashprog/build.list
new file mode 100644
index 00000000..9c83bce7
--- /dev/null
+++ b/config/data/flashprog/build.list
@@ -0,0 +1 @@
+flashprog
diff --git a/config/data/grub/background/COPYING b/config/data/grub/background/COPYING
new file mode 100644
index 00000000..ba07806d
--- /dev/null
+++ b/config/data/grub/background/COPYING
@@ -0,0 +1,4 @@
+The deer logo for Libreboot is copyright 2014 Marcus Moeller and released under
+CC-0 1.0: https://creativecommons.org/publicdomain/zero/1.0/legalcode
+The grey backgrounds with it were made by Leah Rowe in 2016, also CC-0 1.0; the
+same applies to the purple version which was made in 2023.
diff --git a/config/grub/background/background1024x768.png b/config/data/grub/background/background1024x768.png
index 181909db..181909db 100644
--- a/config/grub/background/background1024x768.png
+++ b/config/data/grub/background/background1024x768.png
Binary files differ
diff --git a/config/grub/background/background1280x800.png b/config/data/grub/background/background1280x800.png
index f563ea63..f563ea63 100644
--- a/config/grub/background/background1280x800.png
+++ b/config/data/grub/background/background1280x800.png
Binary files differ
diff --git a/config/grub/bootorder b/config/data/grub/bootorder
index b33e1295..b33e1295 100644
--- a/config/grub/bootorder
+++ b/config/data/grub/bootorder
diff --git a/config/data/grub/build.list b/config/data/grub/build.list
new file mode 100644
index 00000000..5b891e5a
--- /dev/null
+++ b/config/data/grub/build.list
@@ -0,0 +1 @@
+grub.elf
diff --git a/config/grub/keymap/colemak.gkb b/config/data/grub/keymap/colemak.gkb
index d357816b..d357816b 100644
--- a/config/grub/keymap/colemak.gkb
+++ b/config/data/grub/keymap/colemak.gkb
Binary files differ
diff --git a/config/grub/keymap/deqwertz.gkb b/config/data/grub/keymap/deqwertz.gkb
index 4928d026..4928d026 100644
--- a/config/grub/keymap/deqwertz.gkb
+++ b/config/data/grub/keymap/deqwertz.gkb
Binary files differ
diff --git a/config/grub/keymap/esqwerty.gkb b/config/data/grub/keymap/esqwerty.gkb
index 6ce76330..6ce76330 100644
--- a/config/grub/keymap/esqwerty.gkb
+++ b/config/data/grub/keymap/esqwerty.gkb
Binary files differ
diff --git a/config/grub/keymap/frazerty.gkb b/config/data/grub/keymap/frazerty.gkb
index f8455154..f8455154 100644
--- a/config/grub/keymap/frazerty.gkb
+++ b/config/data/grub/keymap/frazerty.gkb
Binary files differ
diff --git a/config/grub/keymap/frdvbepo.gkb b/config/data/grub/keymap/frdvbepo.gkb
index 20702607..20702607 100644
--- a/config/grub/keymap/frdvbepo.gkb
+++ b/config/data/grub/keymap/frdvbepo.gkb
Binary files differ
diff --git a/config/grub/keymap/itqwerty.gkb b/config/data/grub/keymap/itqwerty.gkb
index db10a54c..db10a54c 100644
--- a/config/grub/keymap/itqwerty.gkb
+++ b/config/data/grub/keymap/itqwerty.gkb
Binary files differ
diff --git a/config/data/grub/keymap/ptqwerty.gkb b/config/data/grub/keymap/ptqwerty.gkb
new file mode 100644
index 00000000..5d9b453e
--- /dev/null
+++ b/config/data/grub/keymap/ptqwerty.gkb
Binary files differ
diff --git a/config/grub/keymap/svenska.gkb b/config/data/grub/keymap/svenska.gkb
index 75ca762d..75ca762d 100644
--- a/config/grub/keymap/svenska.gkb
+++ b/config/data/grub/keymap/svenska.gkb
Binary files differ
diff --git a/config/grub/keymap/trqwerty.gkb b/config/data/grub/keymap/trqwerty.gkb
index 452100d5..452100d5 100644
--- a/config/grub/keymap/trqwerty.gkb
+++ b/config/data/grub/keymap/trqwerty.gkb
Binary files differ
diff --git a/config/grub/keymap/ukdvorak.gkb b/config/data/grub/keymap/ukdvorak.gkb
index 76b9e380..76b9e380 100644
--- a/config/grub/keymap/ukdvorak.gkb
+++ b/config/data/grub/keymap/ukdvorak.gkb
Binary files differ
diff --git a/config/grub/keymap/ukqwerty.gkb b/config/data/grub/keymap/ukqwerty.gkb
index 5f513d85..5f513d85 100644
--- a/config/grub/keymap/ukqwerty.gkb
+++ b/config/data/grub/keymap/ukqwerty.gkb
Binary files differ
diff --git a/config/grub/keymap/usdvorak.gkb b/config/data/grub/keymap/usdvorak.gkb
index ef88232c..ef88232c 100644
--- a/config/grub/keymap/usdvorak.gkb
+++ b/config/data/grub/keymap/usdvorak.gkb
Binary files differ
diff --git a/config/grub/keymap/usqwerty.gkb b/config/data/grub/keymap/usqwerty.gkb
index 0ea130f2..0ea130f2 100644
--- a/config/grub/keymap/usqwerty.gkb
+++ b/config/data/grub/keymap/usqwerty.gkb
Binary files differ
diff --git a/config/grub/config/grub_memdisk.cfg b/config/data/grub/memdisk.cfg
index 0763801b..543e421d 100644
--- a/config/grub/config/grub_memdisk.cfg
+++ b/config/data/grub/memdisk.cfg
@@ -1,3 +1,6 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+# Copyright (C) 2023 Leah Rowe <leah@libreboot.org>
+
set prefix=(memdisk)/boot/grub
if [ -f (cbfsdisk)/grub.cfg ]; then
diff --git a/config/grub/target.cfg b/config/data/grub/mkhelper.cfg
index 2aaeb559..b75cf9d7 100644
--- a/config/grub/target.cfg
+++ b/config/data/grub/mkhelper.cfg
@@ -1,3 +1,7 @@
+. "include/rom.sh"
+
bootstrapargs="--gnulib-srcdir=gnulib/ --no-git"
autoconfargs="--with-platform=coreboot --disable-werror"
makeargs="FS_PAYLOAD_MODULES=\"\""
+btype="autohell"
+mkhelper="mkpayload_grub"
diff --git a/config/data/grub/module/default b/config/data/grub/module/default
new file mode 100755
index 00000000..3555ad11
--- /dev/null
+++ b/config/data/grub/module/default
@@ -0,0 +1,155 @@
+# Install modules (installed, but not automatically loaded)
+grub_install_modules=" \
+hexdump \
+newc \
+odc \
+usbserial_common \
+usbserial_ftdi \
+usbserial_pl2303 \
+usbserial_usbdebug \
+video_colors \
+"
+# Modules (and always loaded)
+grub_modules=" \
+acpi \
+ahci \
+at_keyboard \
+all_video \
+ata \
+bitmap \
+bitmap_scale \
+boot \
+bsd \
+btrfs \
+cat \
+cbfs \
+cbls \
+cbmemc \
+cbtime \
+chain \
+configfile \
+cpio \
+cpio_be \
+crc64 \
+crypto \
+cryptodisk \
+diskfilter \
+echo \
+ehci \
+eval \
+exfat \
+elf \
+ext2 \
+fat \
+f2fs \
+gcry_arcfour \
+gcry_blowfish \
+gcry_camellia \
+gcry_cast5 \
+gcry_crc \
+gcry_des \
+gcry_dsa \
+gcry_idea \
+gcry_md4 \
+gcry_md5 \
+gcry_rfc2268 \
+gcry_rijndael \
+gcry_rmd160 \
+gcry_rsa \
+gcry_seed \
+gcry_serpent \
+gcry_sha1 \
+gcry_sha256 \
+gcry_sha512 \
+gcry_tiger \
+gcry_twofish \
+gcry_whirlpool \
+geli \
+gfxmenu \
+gfxterm_background \
+gfxterm_menu \
+gzio \
+hashsum \
+halt \
+help \
+iorw \
+iso9660 \
+jpeg \
+json \
+keylayouts \
+keystatus \
+linux \
+linux16 \
+loadenv \
+loopback \
+ls \
+lsacpi \
+lsmmap \
+lspci \
+luks \
+luks2 \
+argon2 \
+lvm \
+lzopio \
+mdraid09 \
+mdraid09_be \
+mdraid1x \
+memdisk \
+memrw \
+minicmd \
+mmap \
+multiboot \
+multiboot2 \
+nativedisk \
+normal \
+ntfs \
+ohci \
+part_bsd \
+part_dfly \
+part_gpt \
+part_msdos \
+password \
+password_pbkdf2 \
+pata \
+pbkdf2 \
+pcidump \
+pgp \
+play \
+png \
+procfs \
+raid5rec \
+raid6rec \
+read \
+reboot \
+regexp \
+romfs \
+scsi \
+search \
+search_fs_file \
+search_fs_uuid \
+search_label \
+serial \
+syslinuxcfg \
+setjmp \
+setpci \
+spkmodem \
+squash4 \
+sleep \
+tar \
+test \
+true \
+uhci \
+udf \
+ufs1 \
+ufs1_be \
+ufs2 \
+usb \
+usb_keyboard \
+usbms \
+xfs \
+xzio \
+zfs \
+zfscrypt \
+zfsinfo \
+zstd \
+"
diff --git a/config/data/grub/module/nvme b/config/data/grub/module/nvme
new file mode 100755
index 00000000..503c61c8
--- /dev/null
+++ b/config/data/grub/module/nvme
@@ -0,0 +1,156 @@
+# Install modules (installed, but not automatically loaded)
+grub_install_modules=" \
+hexdump \
+newc \
+odc \
+usbserial_common \
+usbserial_ftdi \
+usbserial_pl2303 \
+usbserial_usbdebug \
+video_colors \
+"
+# Modules (and always loaded)
+grub_modules=" \
+acpi \
+ahci \
+at_keyboard \
+all_video \
+ata \
+bitmap \
+bitmap_scale \
+boot \
+bsd \
+btrfs \
+cat \
+cbfs \
+cbls \
+cbmemc \
+cbtime \
+chain \
+configfile \
+cpio \
+cpio_be \
+crc64 \
+crypto \
+cryptodisk \
+diskfilter \
+echo \
+ehci \
+eval \
+exfat \
+elf \
+ext2 \
+fat \
+f2fs \
+gcry_arcfour \
+gcry_blowfish \
+gcry_camellia \
+gcry_cast5 \
+gcry_crc \
+gcry_des \
+gcry_dsa \
+gcry_idea \
+gcry_md4 \
+gcry_md5 \
+gcry_rfc2268 \
+gcry_rijndael \
+gcry_rmd160 \
+gcry_rsa \
+gcry_seed \
+gcry_serpent \
+gcry_sha1 \
+gcry_sha256 \
+gcry_sha512 \
+gcry_tiger \
+gcry_twofish \
+gcry_whirlpool \
+geli \
+gfxmenu \
+gfxterm_background \
+gfxterm_menu \
+gzio \
+hashsum \
+halt \
+help \
+iorw \
+iso9660 \
+jpeg \
+json \
+keylayouts \
+keystatus \
+linux \
+linux16 \
+loadenv \
+loopback \
+ls \
+lsacpi \
+lsmmap \
+lspci \
+luks \
+luks2 \
+argon2 \
+lvm \
+lzopio \
+mdraid09 \
+mdraid09_be \
+mdraid1x \
+memdisk \
+memrw \
+minicmd \
+mmap \
+multiboot \
+multiboot2 \
+nativedisk \
+normal \
+ntfs \
+nvme \
+ohci \
+part_bsd \
+part_dfly \
+part_gpt \
+part_msdos \
+password \
+password_pbkdf2 \
+pata \
+pbkdf2 \
+pcidump \
+pgp \
+play \
+png \
+procfs \
+raid5rec \
+raid6rec \
+read \
+reboot \
+regexp \
+romfs \
+scsi \
+search \
+search_fs_file \
+search_fs_uuid \
+search_label \
+serial \
+syslinuxcfg \
+setjmp \
+setpci \
+spkmodem \
+squash4 \
+sleep \
+tar \
+test \
+true \
+uhci \
+udf \
+ufs1 \
+ufs1_be \
+ufs2 \
+usb \
+usb_keyboard \
+usbms \
+xfs \
+xzio \
+zfs \
+zfscrypt \
+zfsinfo \
+zstd \
+"
diff --git a/config/grub/modules.list b/config/data/grub/module/xhci
index f3768adb..6235bbad 100644..100755
--- a/config/grub/modules.list
+++ b/config/data/grub/module/xhci
@@ -8,8 +8,8 @@ usbserial_ftdi \
usbserial_pl2303 \
usbserial_usbdebug \
video_colors \
+xhci \
"
-
# Modules (and always loaded)
grub_modules=" \
acpi \
@@ -36,7 +36,6 @@ crypto \
cryptodisk \
diskfilter \
echo \
-xhci \
ehci \
eval \
exfat \
@@ -105,6 +104,7 @@ multiboot2 \
nativedisk \
normal \
ntfs \
+nvme \
ohci \
part_bsd \
part_dfly \
diff --git a/config/data/memtest86plus/build.list b/config/data/memtest86plus/build.list
new file mode 100644
index 00000000..3074d133
--- /dev/null
+++ b/config/data/memtest86plus/build.list
@@ -0,0 +1 @@
+build64/memtest.bin
diff --git a/config/data/pcsx-redux/mkhelper.cfg b/config/data/pcsx-redux/mkhelper.cfg
new file mode 100644
index 00000000..379ad032
--- /dev/null
+++ b/config/data/pcsx-redux/mkhelper.cfg
@@ -0,0 +1,3 @@
+. "include/rom.sh"
+
+postmake="copyps1bios"
diff --git a/config/data/pico-serprog/mkhelper.cfg b/config/data/pico-serprog/mkhelper.cfg
new file mode 100644
index 00000000..e424e2f4
--- /dev/null
+++ b/config/data/pico-serprog/mkhelper.cfg
@@ -0,0 +1,7 @@
+. "include/rom.sh"
+
+sersrc="src/pico-serprog"
+serx="$sersrc/build/pico_serprog.uf2"
+picosdk="src/pico-sdk"
+serdir="$picosdk/src/boards/include/boards"
+premake="mkserprog rp2040"
diff --git a/config/seabios/build.list b/config/data/seabios/build.list
index d6fefb4e..d6fefb4e 100644
--- a/config/seabios/build.list
+++ b/config/data/seabios/build.list
diff --git a/config/data/seabios/mkhelper.cfg b/config/data/seabios/mkhelper.cfg
new file mode 100644
index 00000000..e69de29b
--- /dev/null
+++ b/config/data/seabios/mkhelper.cfg
diff --git a/config/data/stm32-vserprog/mkhelper.cfg b/config/data/stm32-vserprog/mkhelper.cfg
new file mode 100644
index 00000000..8f45d7fd
--- /dev/null
+++ b/config/data/stm32-vserprog/mkhelper.cfg
@@ -0,0 +1,6 @@
+. "include/rom.sh"
+
+sersrc="src/stm32-vserprog"
+serx="$sersrc/stm32-vserprog.hex"
+serdir="$sersrc/boards"
+mkhelper="mkserprog stm32"
diff --git a/config/u-boot/build.list b/config/data/u-boot/build.list
index 8d9a5cf0..8d9a5cf0 100644
--- a/config/u-boot/build.list
+++ b/config/data/u-boot/build.list
diff --git a/config/data/uefitool/build.list b/config/data/uefitool/build.list
new file mode 100644
index 00000000..2c59bb50
--- /dev/null
+++ b/config/data/uefitool/build.list
@@ -0,0 +1 @@
+uefiextract
diff --git a/config/dependencies/arch b/config/dependencies/arch
index cfe69ac7..6a0f93b7 100644
--- a/config/dependencies/arch
+++ b/config/dependencies/arch
@@ -4,9 +4,9 @@ acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \
autogen base-devel bison cmake curl device-mapper doxygen \
dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \
help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \
-ncurses openssl p7zip \
+ncurses openssl p7zip ccache \
pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
sharutils subversion swig texinfo ttf-dejavu unarchiver unzip wget xz zlib \
"
-aur_notice="bdf-unifont unifont"
+aur_notice="bdf-unifont unifont cross-mipsel-linux-gnu-binutils cross-mipsel-linux-gnu-gcc"
diff --git a/config/dependencies/debian b/config/dependencies/debian
index 33902f19..387cb288 100755
--- a/config/dependencies/debian
+++ b/config/dependencies/debian
@@ -11,5 +11,6 @@ libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0 libusb-1.0-0-dev \
libusb-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted pciutils \
perl pkg-config python3 python3-distutils python3-pkg-resources python3-pycryptodome \
python3-pyelftools python3-setuptools python-is-python3 sharutils swig unar \
-unifont unifont-bin unzip uuid-dev wget xfonts-unifont zlib1g-dev \
+unifont unifont-bin unzip uuid-dev wget xfonts-unifont zlib1g-dev ccache \
+g++-mipsel-linux-gnu make \
"
diff --git a/config/dependencies/fedora38 b/config/dependencies/fedora38
index 1b9affe3..8f672205 100755
--- a/config/dependencies/fedora38
+++ b/config/dependencies/fedora38
@@ -8,5 +8,5 @@ innoextract intltool libftdi-devel libselinux-devel libusb1 libusb1-devel \
nasm ncurses-devel openssl-devel p7zip p7zip-plugins pandoc parted \
pciutils-devel perl perl-libwww-perl python-unversioned-command python3 \
python3-setuptools rsync sharutils subversion texinfo unar unifont \
-unifont-fonts unifont-ttf-fonts unzip wget xz zlib-devel \
+unifont-fonts unifont-ttf-fonts unzip wget xz zlib-devel ccache swig \
"
diff --git a/config/dependencies/fedora40 b/config/dependencies/fedora40
new file mode 100755
index 00000000..6836b57b
--- /dev/null
+++ b/config/dependencies/fedora40
@@ -0,0 +1,13 @@
+pkg_add="dnf -y install"
+pkglist=" \
+acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc \
+arm-none-eabi-gcc arm-none-eabi-newlib autogen bison bzip2 cmake curl \
+dejavu-fonts-all device-mapper doxygen e2fsprogs flex freetype-devel fuse \
+gawk gcc gcc-gnat gdb gettext gettext-devel git gprbuild help2man \
+innoextract intltool libftdi-devel libgpiod-devel libjaylink-devel \
+libselinux-devel libusb1 libusb1-devel nasm ncurses-devel openssl-devel \
+p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \
+python-unversioned-command python3 python3-setuptools rsync sharutils \
+subversion systemd-devel texinfo unar unifont unifont-fonts \
+unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel \
+"
diff --git a/config/dependencies/parabola b/config/dependencies/parabola
index 27dd59c4..f598e491 100644
--- a/config/dependencies/parabola
+++ b/config/dependencies/parabola
@@ -7,5 +7,7 @@ help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \
ncurses openssl p7zip \
pandoc parted pciutils perl perl-libwww python python-setuptools rsync \
sharutils subversion swig texinfo ttf-dejavu unarchiver unifont-utils unzip \
-wget xz zlib \
+wget xz zlib ccache \
"
+
+aur_notice="cross-mipsel-linux-gnu-binutils cross-mipsel-linux-gnu-gcc"
diff --git a/config/dependencies/trisquel b/config/dependencies/trisquel
index 1ae9a80b..a5e1fa13 100755
--- a/config/dependencies/trisquel
+++ b/config/dependencies/trisquel
@@ -5,11 +5,12 @@ bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools
flex gawk gcc-arm-linux-gnueabi gcc-arm-none-eabi gdb gettext git gnat help2man \
innoextract libdevmapper-dev libfdt-dev libfont-freetype-perl libfreetype6-dev \
libftdi-dev libfuse-dev libgnutls28-dev libgpiod-dev libjaylink-dev liblz4-tool \
-liblzma-dev libncurses5-dev \
+liblzma-dev libncurses5-dev ccache \
libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev \
libpython3-dev libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 \
libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \
pciutils perl pkg-config python3 python3-distutils python3-pkg-resources \
python3-pycryptodome python3-pyelftools python3-setuptools python-is-python3 \
sharutils swig fonts-unifont unar unifont unzip uuid-dev wget zlib1g-dev \
+g++-mipsel-linux-gnu make \
"
diff --git a/config/dependencies/ubuntu2004 b/config/dependencies/ubuntu2004
index 02661ca5..8fe09aef 100755
--- a/config/dependencies/ubuntu2004
+++ b/config/dependencies/ubuntu2004
@@ -10,5 +10,6 @@ libpython3-dev libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 \
libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \
pciutils perl pkg-config python3 python3-distutils python3-pkg-resources \
python3-pycryptodome python3-pyelftools python3-setuptools python-is-python3 \
-sharutils swig ttf-unifont unar unifont unzip uuid-dev wget zlib1g-dev \
+sharutils swig ttf-unifont unar unifont unzip uuid-dev wget zlib1g-dev ccache \
+g++-mipsel-linux-gnu make \
"
diff --git a/config/dependencies/ubuntu2404 b/config/dependencies/ubuntu2404
new file mode 100755
index 00000000..a93d0b49
--- /dev/null
+++ b/config/dependencies/ubuntu2404
@@ -0,0 +1,15 @@
+pkg_add="apt-get -y install"
+pkglist=" \
+autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \
+bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \
+flex gawk gcc-arm-linux-gnueabi gcc-arm-none-eabi gdb gettext git gnat help2man \
+innoextract libdevmapper-dev libfdt-dev libfont-freetype-perl libfreetype6-dev \
+libftdi-dev libfuse-dev libgnutls28-dev liblz4-tool liblzma-dev libncurses5-dev \
+libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev \
+libpython3-dev libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 \
+libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \
+pciutils perl pkg-config python3 python3-pkg-resources python3-pycryptodome \
+python3-pyelftools python3-setuptools python-is-python3 sharutils swig \
+fonts-unifont unar unifont unzip uuid-dev wget zlib1g-dev ccache \
+g++-mipsel-linux-gnu make \
+"
diff --git a/config/dependencies/void b/config/dependencies/void
index 0ab258c2..79a12328 100644
--- a/config/dependencies/void
+++ b/config/dependencies/void
@@ -8,5 +8,5 @@ freetype freetype-devel fuse gawk gcc-ada gdb gettext gettext-devel git \
help2man innoextract libftdi1 libpciaccess libusb nasm ncurses \
ncurses-devel openssl openssl-devel p7zip parted pciutils perl perl-LWP \
python python3 python3-setuptools rsync sharutils subversion texinfo \
-unar unzip wget xz zlib
+unar unzip wget xz zlib ccache
"
diff --git a/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch b/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch
index b4fd904b..fc3befb1 100644
--- a/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch
+++ b/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch
@@ -1,7 +1,7 @@
-From 294433aeac82764ea22caf0c17b05cf4127aaa19 Mon Sep 17 00:00:00 2001
+From 9d8c79eecf760e4f963a0a7f29b577cd84962a2a Mon Sep 17 00:00:00 2001
From: consts <grudnevkv@gmail.com>
Date: Fri, 2 Mar 2018 07:03:37 +0000
-Subject: [PATCH] Workaround for MX25 chips
+Subject: [PATCH 1/1] Workaround for MX25 chips
TEST: In-system programming a ThinkPad X200 using a clip and
pico-serprog works now. It just doesn't without this hack.
@@ -11,13 +11,13 @@ Chip: MX25L6405D
Tested-by: Riku Viitanen <riku.viitanen@protonmail.com>
Change-Id: I43a306b67862b59c1dcd02729e189f3bf73f481b
---
- cli_classic.c | 5 +++++
- include/programmer.h | 1 +
- spi.c | 9 +++++++++
- 3 files changed, 15 insertions(+)
+ cli_classic.c | 5 +++++
+ include/programmer.h | 1 +
+ spi.c | 11 ++++++++++-
+ 3 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/cli_classic.c b/cli_classic.c
-index 1ffe4dd..3b50d23 100644
+index ab5f8b1..2825033 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -67,6 +67,7 @@ static void cli_classic_usage(const char *name)
@@ -28,29 +28,29 @@ index 1ffe4dd..3b50d23 100644
#if CONFIG_PRINT_WIKI == 1
" -z | --list-supported-wiki print supported devices in wiki syntax\n"
#endif
-@@ -290,6 +291,7 @@ int main(int argc, char *argv[])
- {"help", 0, NULL, 'h'},
+@@ -262,6 +263,7 @@ int main(int argc, char *argv[])
{"version", 0, NULL, 'R'},
{"output", 1, NULL, 'o'},
+ {"progress", 0, NULL, OPTION_PROGRESS},
+ {"workaround-mx", 0, NULL, 'm'},
{NULL, 0, NULL, 0},
};
-@@ -506,6 +508,9 @@ int main(int argc, char *argv[])
+@@ -478,6 +480,9 @@ int main(int argc, char *argv[])
cli_classic_abort_usage("No log filename specified.\n");
}
break;
+ case 'm': /* --workaround-mx */
+ workaround_mx = 1;
+ break;
- default:
- cli_classic_abort_usage(NULL);
+ case OPTION_PROGRESS:
+ show_progress = true;
break;
diff --git a/include/programmer.h b/include/programmer.h
-index 4fee2ef..7e78598 100644
+index 873dc37..2007fd6 100644
--- a/include/programmer.h
+++ b/include/programmer.h
-@@ -355,6 +355,7 @@ enum ich_chipset {
+@@ -364,6 +364,7 @@ enum ich_chipset {
CHIPSET_GEMINI_LAKE,
CHIPSET_ELKHART_LAKE,
};
@@ -59,11 +59,11 @@ index 4fee2ef..7e78598 100644
/* ichspi.c */
#if CONFIG_INTERNAL == 1
diff --git a/spi.c b/spi.c
-index 6e61f53..f8f5d11 100644
+index 748ef99..9bbdee9 100644
--- a/spi.c
+++ b/spi.c
-@@ -26,10 +26,19 @@
- #include "programmer.h"
+@@ -27,13 +27,22 @@
+ #include "spi_command.h"
#include "spi.h"
+int workaround_mx; /* Make operations with MX25* chips more reliable */
@@ -72,16 +72,20 @@ index 6e61f53..f8f5d11 100644
unsigned int readcnt, const unsigned char *writearr,
unsigned char *readarr)
{
-+ if (workaround_mx) {
+- if (spi_current_io_mode(flash) != SINGLE_IO_1_1_1)
++ if (spi_current_io_mode(flash) != SINGLE_IO_1_1_1) {
+ return default_spi_send_command(flash, writecnt, readcnt, writearr, readarr);
++ } else if (workaround_mx) {
+ const unsigned char cmd[JEDEC_READ_OUTSIZE] = {JEDEC_READ, 0, 0, 0};
+ unsigned char buf[256];
+ /* keep flash busy for some time, keep CS warm before sending actual command */
-+ flash->mst->spi.command(flash, sizeof(cmd), sizeof(buf), cmd, buf);
++ flash->mst.spi->command(flash, sizeof(cmd), sizeof(buf), cmd, buf);
+ }
+
+ /* actual command */
- return flash->mst->spi.command(flash, writecnt, readcnt, writearr,
+ return flash->mst.spi->command(flash, writecnt, readcnt, writearr,
readarr);
}
--
-2.43.0
+2.39.2
diff --git a/config/git/bios_extract b/config/git/bios_extract
deleted file mode 100644
index 2b313e83..00000000
--- a/config/git/bios_extract
+++ /dev/null
@@ -1,6 +0,0 @@
-{bios_extract}{
- rev: 0a7bc1d71735ef97b00dfec0fd54a02fcc5d1bb0
- loc: bios_extract
- url: https://review.coreboot.org/bios_extract
- bkup_url: https://github.com/coreboot/bios_extract/
-}
diff --git a/config/git/bios_extract/pkg.cfg b/config/git/bios_extract/pkg.cfg
new file mode 100644
index 00000000..e77bf0a5
--- /dev/null
+++ b/config/git/bios_extract/pkg.cfg
@@ -0,0 +1,3 @@
+rev="0a7bc1d71735ef97b00dfec0fd54a02fcc5d1bb0"
+url="https://review.coreboot.org/bios_extract"
+bkup_url="https://github.com/coreboot/bios_extract"
diff --git a/config/git/biosutilities b/config/git/biosutilities
deleted file mode 100644
index bd11c88a..00000000
--- a/config/git/biosutilities
+++ /dev/null
@@ -1,6 +0,0 @@
-{biosutilities}{
- rev: 03ae0cf0706ede5a2a15da0986c19c776d0e6b26
- loc: biosutilities
- url: https://codeberg.org/libreboot/BIOSUtilities
- bkup_url: https://github.com/platomav/BIOSUtilities
-}
diff --git a/config/git/biosutilities/pkg.cfg b/config/git/biosutilities/pkg.cfg
new file mode 100644
index 00000000..a1c02015
--- /dev/null
+++ b/config/git/biosutilities/pkg.cfg
@@ -0,0 +1,3 @@
+rev="03ae0cf0706ede5a2a15da0986c19c776d0e6b26"
+url="https://codeberg.org/libreboot/BIOSUtilities"
+bkup_url="https://github.com/platomav/BIOSUtilities"
diff --git a/config/git/coreboot b/config/git/coreboot
deleted file mode 100644
index 4b139e19..00000000
--- a/config/git/coreboot
+++ /dev/null
@@ -1,6 +0,0 @@
-{coreboot}{
- rev: HEAD
- loc: coreboot/coreboot
- url: https://review.coreboot.org/coreboot
- bkup_url: https://github.com/coreboot/coreboot.git
-}
diff --git a/config/git/coreboot/pkg.cfg b/config/git/coreboot/pkg.cfg
new file mode 100644
index 00000000..f4ed31e8
--- /dev/null
+++ b/config/git/coreboot/pkg.cfg
@@ -0,0 +1,3 @@
+rev="HEAD"
+url="https://review.coreboot.org/coreboot"
+bkup_url="https://github.com/coreboot/coreboot.git"
diff --git a/config/git/deguard/pkg.cfg b/config/git/deguard/pkg.cfg
new file mode 100644
index 00000000..3da47380
--- /dev/null
+++ b/config/git/deguard/pkg.cfg
@@ -0,0 +1,3 @@
+rev="fc4c59ac35e6f38c195214d71340a6adade2689f"
+url="https://review.coreboot.org/deguard"
+bkup_url="https://codeberg.org/libreboot/deguard"
diff --git a/config/git/docs b/config/git/docs
deleted file mode 100644
index c6b7a387..00000000
--- a/config/git/docs
+++ /dev/null
@@ -1,30 +0,0 @@
-{docs}{
- rev: 693a4f811d321d81f685a5822caf8d639e778832
- loc: docs
- url: https://codeberg.org/vimuser/untitled
- bkup_url: https://notabug.org/untitled/untitled
- depend: mdfiles
- depend: untitledwww
-}
-
-{mdfiles}{
- rev: 20fd775c855428ecff647a42823746863fd57efe
- loc: docs/www/html
- url: https://codeberg.org/libreboot/lbwww
- bkup_url: https://git.disroot.org/libreboot/lbwww
- depend: imgfiles
-}
-
-{imgfiles}{
- rev: 625bb7535d388a235bec47a8ce822cda10b53692
- loc: docs/www/html/site/img
- url: https://codeberg.org/libreboot/lbwww-img
- bkup_url: https://git.disroot.org/libreboot/lbwww-img
-}
-
-{untitledwww}{
- rev: d8e2043c1512eb1171c274559ce82e8093ef393f
- loc: docs/www/untitled
- url: https://codeberg.org/vimuser/untitled-website
- bkup_url: https://notabug.org/untitled/untitled-website
-}
diff --git a/config/git/docs/pkg.cfg b/config/git/docs/pkg.cfg
new file mode 100644
index 00000000..9913ee5f
--- /dev/null
+++ b/config/git/docs/pkg.cfg
@@ -0,0 +1,3 @@
+rev="e72d055915c3a9ffe739982946e101b146b2483c"
+url="https://codeberg.org/vimuser/untitled"
+bkup_url="https://notabug.org/untitled/untitled"
diff --git a/config/git/flashprog b/config/git/flashprog
deleted file mode 100644
index 12105361..00000000
--- a/config/git/flashprog
+++ /dev/null
@@ -1,6 +0,0 @@
-{flashprog}{
- rev: ddb6d926783d4f9cbee04c7392718ed8f89daa0e
- loc: flashprog
- url: https://review.sourcearcade.org/flashprog
- bkup_url: https://github.com/SourceArcade/flashprog.git
-}
diff --git a/config/git/flashprog/pkg.cfg b/config/git/flashprog/pkg.cfg
new file mode 100644
index 00000000..ff45c7b6
--- /dev/null
+++ b/config/git/flashprog/pkg.cfg
@@ -0,0 +1,3 @@
+rev="d128a0ae87086b37c0e5d7a8d934bcdee173402f"
+url="https://review.sourcearcade.org/flashprog"
+bkup_url="https://github.com/SourceArcade/flashprog.git"
diff --git a/config/git/gpio-scripts/pkg.cfg b/config/git/gpio-scripts/pkg.cfg
new file mode 100644
index 00000000..60963e9d
--- /dev/null
+++ b/config/git/gpio-scripts/pkg.cfg
@@ -0,0 +1,3 @@
+rev="be2de1233a70e3cf05ad17b008fd85c862b1ecf9"
+url="https://codeberg.org/libreboot/gpio-scripts"
+bkup_url="https://git.disroot.org/libreboot/gpio-scripts"
diff --git a/config/git/grub b/config/git/grub
deleted file mode 100644
index b52fa0fb..00000000
--- a/config/git/grub
+++ /dev/null
@@ -1,14 +0,0 @@
-{grub}{
- rev: 8719cc2040368d43ab2de0b6e1b850b2c9cfc5b7
- loc: grub
- url: git://git.savannah.gnu.org/grub.git
- bkup_url: https://codeberg.org/libreboot/grub
- depend: gnulib
-}
-
-{gnulib}{
- rev: 9f48fb992a3d7e96610c4ce8be969cff2d61a01b
- loc: grub/gnulib
- url: git://git.sv.gnu.org/gnulib
- bkup_url: https://codeberg.org/libreboot/gnulib
-}
diff --git a/config/git/grub/pkg.cfg b/config/git/grub/pkg.cfg
new file mode 100644
index 00000000..ed26a766
--- /dev/null
+++ b/config/git/grub/pkg.cfg
@@ -0,0 +1,3 @@
+rev="HEAD"
+url="git://git.savannah.gnu.org/grub.git"
+bkup_url="https://codeberg.org/libreboot/grub"
diff --git a/config/git/int/pkg.cfg b/config/git/int/pkg.cfg
new file mode 100644
index 00000000..d3c2958a
--- /dev/null
+++ b/config/git/int/pkg.cfg
@@ -0,0 +1,3 @@
+rev="d1ac570549f00477d9ade21807f42f28a4864fcd"
+url="https://codeberg.org/libreboot/int"
+bkup_url="https://git.disroot.org/libreboot/int"
diff --git a/config/git/memtest86plus b/config/git/memtest86plus
deleted file mode 100644
index c1f56623..00000000
--- a/config/git/memtest86plus
+++ /dev/null
@@ -1,6 +0,0 @@
-{memtest86plus}{
- rev: 5dcd424ea7afb857c1171e747ef064d98d26afeb
- loc: memtest86plus
- url: https://codeberg.org/libreboot/memtest86plus
- bkup_url: https://github.com/memtest86plus/memtest86plus.git
-}
diff --git a/config/git/memtest86plus/pkg.cfg b/config/git/memtest86plus/pkg.cfg
new file mode 100644
index 00000000..4bf44294
--- /dev/null
+++ b/config/git/memtest86plus/pkg.cfg
@@ -0,0 +1,3 @@
+rev="5dcd424ea7afb857c1171e747ef064d98d26afeb"
+url="https://codeberg.org/libreboot/memtest86plus"
+bkup_url="https://github.com/memtest86plus/memtest86plus.git"
diff --git a/config/git/mxmdump/pkg.cfg b/config/git/mxmdump/pkg.cfg
new file mode 100644
index 00000000..19ede8d8
--- /dev/null
+++ b/config/git/mxmdump/pkg.cfg
@@ -0,0 +1,3 @@
+rev="ab3393c84fd3de01793bbfa2ec4caddfe0dc44f6"
+url="https://codeberg.org/libreboot/mxmdump"
+bkup_url="https://git.disroot.org/libreboot/mxmdump"
diff --git a/config/git/pcsx-redux/pkg.cfg b/config/git/pcsx-redux/pkg.cfg
new file mode 100644
index 00000000..0ae9a205
--- /dev/null
+++ b/config/git/pcsx-redux/pkg.cfg
@@ -0,0 +1,3 @@
+rev="6ec5348058413619b290b069adbdae68180ce8c0"
+url="https://github.com/grumpycoders/pcsx-redux"
+bkup_url="https://codeberg.org/vimuser/pcsx-redux"
diff --git a/config/git/pico-sdk b/config/git/pico-sdk
deleted file mode 100644
index 076a8e01..00000000
--- a/config/git/pico-sdk
+++ /dev/null
@@ -1,6 +0,0 @@
-{pico-sdk}{
- rev: 6a7db34ff63345a7badec79ebea3aaef1712f374
- loc: pico-sdk
- url: https://codeberg.org/libreboot/pico-sdk
- bkup_url: https://github.com/raspberrypi/pico-sdk
-}
diff --git a/config/git/pico-sdk/pkg.cfg b/config/git/pico-sdk/pkg.cfg
new file mode 100644
index 00000000..68b5bca6
--- /dev/null
+++ b/config/git/pico-sdk/pkg.cfg
@@ -0,0 +1,3 @@
+rev="6a7db34ff63345a7badec79ebea3aaef1712f374"
+url="https://codeberg.org/libreboot/pico-sdk"
+bkup_url="https://github.com/raspberrypi/pico-sdk"
diff --git a/config/git/pico-serprog b/config/git/pico-serprog
deleted file mode 100644
index 6d46566b..00000000
--- a/config/git/pico-serprog
+++ /dev/null
@@ -1,7 +0,0 @@
-{pico-serprog}{
- rev: e75e3a20e63269a5e3189bc2e49a6a81d45a636a
- loc: pico-serprog
- url: https://codeberg.org/libreboot/pico-serprog
- bkup_url: https://git.disroot.org/libreboot/pico-serprog
- depend: pico-sdk
-}
diff --git a/config/git/pico-serprog/pkg.cfg b/config/git/pico-serprog/pkg.cfg
new file mode 100644
index 00000000..54c5fa44
--- /dev/null
+++ b/config/git/pico-serprog/pkg.cfg
@@ -0,0 +1,4 @@
+rev="e75e3a20e63269a5e3189bc2e49a6a81d45a636a"
+url="https://codeberg.org/libreboot/pico-serprog"
+bkup_url="https://git.disroot.org/libreboot/pico-serprog"
+depend="pico-sdk"
diff --git a/config/git/seabios b/config/git/seabios
deleted file mode 100644
index 62c90d30..00000000
--- a/config/git/seabios
+++ /dev/null
@@ -1,6 +0,0 @@
-{seabios}{
- rev: HEAD
- loc: seabios/seabios
- url: https://review.coreboot.org/seabios
- bkup_url: https://github.com/coreboot/seabios
-}
diff --git a/config/git/seabios/pkg.cfg b/config/git/seabios/pkg.cfg
new file mode 100644
index 00000000..d8c6932b
--- /dev/null
+++ b/config/git/seabios/pkg.cfg
@@ -0,0 +1,3 @@
+rev="HEAD"
+url="https://review.coreboot.org/seabios"
+bkup_url="https://github.com/coreboot/seabios"
diff --git a/config/git/stm32-vserprog b/config/git/stm32-vserprog
deleted file mode 100644
index 37e901fc..00000000
--- a/config/git/stm32-vserprog
+++ /dev/null
@@ -1,6 +0,0 @@
-{stm32-vserprog}{
- rev: 8fcf0a4d41800631b571fa7bbd1d8b251f0a2111
- loc: stm32-vserprog
- url: https://codeberg.org/libreboot/stm32-vserprog
- bkup_url: https://git.disroot.org/libreboot/stm32-vserprog
-}
diff --git a/config/git/stm32-vserprog/pkg.cfg b/config/git/stm32-vserprog/pkg.cfg
new file mode 100644
index 00000000..9fb12c63
--- /dev/null
+++ b/config/git/stm32-vserprog/pkg.cfg
@@ -0,0 +1,3 @@
+rev="8fcf0a4d41800631b571fa7bbd1d8b251f0a2111"
+url="https://codeberg.org/libreboot/stm32-vserprog"
+bkup_url="https://git.disroot.org/libreboot/stm32-vserprog"
diff --git a/config/git/u-boot b/config/git/u-boot
deleted file mode 100644
index 4057c089..00000000
--- a/config/git/u-boot
+++ /dev/null
@@ -1,6 +0,0 @@
-{u-boot}{
- rev: HEAD
- loc: u-boot/u-boot
- url: https://source.denx.de/u-boot/u-boot.git
- bkup_url: https://github.com/u-boot/u-boot.git
-}
diff --git a/config/git/u-boot/pkg.cfg b/config/git/u-boot/pkg.cfg
new file mode 100644
index 00000000..e65ad63a
--- /dev/null
+++ b/config/git/u-boot/pkg.cfg
@@ -0,0 +1,3 @@
+rev="HEAD"
+url="https://source.denx.de/u-boot/u-boot.git"
+bkup_url="https://github.com/u-boot/u-boot.git"
diff --git a/config/git/uefitool b/config/git/uefitool
deleted file mode 100644
index e3ced920..00000000
--- a/config/git/uefitool
+++ /dev/null
@@ -1,6 +0,0 @@
-{uefitool}{
- rev: 4a41c33596e9bc3ae812e763965d91ac57553e02
- loc: uefitool
- url: https://codeberg.org/libreboot/UEFITool
- bkup_url: https://github.com/LongSoft/UEFITool
-}
diff --git a/config/git/uefitool/pkg.cfg b/config/git/uefitool/pkg.cfg
new file mode 100644
index 00000000..1602e6be
--- /dev/null
+++ b/config/git/uefitool/pkg.cfg
@@ -0,0 +1,3 @@
+rev="4a41c33596e9bc3ae812e763965d91ac57553e02"
+url="https://codeberg.org/libreboot/UEFITool"
+bkup_url="https://github.com/LongSoft/UEFITool"
diff --git a/config/grub/background/COPYING b/config/grub/background/COPYING
deleted file mode 100644
index 9a5f81c6..00000000
--- a/config/grub/background/COPYING
+++ /dev/null
@@ -1,3 +0,0 @@
-The deer logo for Libreboot is copyright 2014 Marcus Moeller and released under
-CC-0: https://creativecommons.org/publicdomain/zero/1.0/legalcode
-The grey backgrounds with it were made by Leah Rowe in 2016, also CC-0
diff --git a/config/grub/config/AUTHORS b/config/grub/config/AUTHORS
deleted file mode 100644
index 542739ce..00000000
--- a/config/grub/config/AUTHORS
+++ /dev/null
@@ -1,2 +0,0 @@
-Copyright (C) 2014, 2015, 2016, 2020, 2021, 2023 Leah Rowe <leah@libreboot.org>
-Copyright (C) 2015 Klemens Nanni <contact@autoboot.org>
diff --git a/config/grub/config/COPYING b/config/grub/config/COPYING
deleted file mode 100644
index f74bc54d..00000000
--- a/config/grub/config/COPYING
+++ /dev/null
@@ -1,695 +0,0 @@
-# GRUB configuration files under resources/grub/config/
-
-# This program is free software: you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program. If not, see <http://www.gnu.org/licenses/>.
-#
-
-# See AUTHORS for copyright holder information.
-
-# Full terms of GPLv3 below, taken from https://www.gnu.org/licenses/licenses.html
-________________________________________________________________________
-
- GNU GENERAL PUBLIC LICENSE
- Version 3, 29 June 2007
-
- Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
- Everyone is permitted to copy and distribute verbatim copies
- of this license document, but changing it is not allowed.
-
- Preamble
-
- The GNU General Public License is a free, copyleft license for
-software and other kinds of works.
-
- The licenses for most software and other practical works are designed
-to take away your freedom to share and change the works. By contrast,
-the GNU General Public License is intended to guarantee your freedom to
-share and change all versions of a program--to make sure it remains free
-software for all its users. We, the Free Software Foundation, use the
-GNU General Public License for most of our software; it applies also to
-any other work released this way by its authors. You can apply it to
-your programs, too.
-
- When we speak of free software, we are referring to freedom, not
-price. Our General Public Licenses are designed to make sure that you
-have the freedom to distribute copies of free software (and charge for
-them if you wish), that you receive source code or can get it if you
-want it, that you can change the software or use pieces of it in new
-free programs, and that you know you can do these things.
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- To protect your rights, we need to prevent others from denying you
-these rights or asking you to surrender the rights. Therefore, you have
-certain responsibilities if you distribute copies of the software, or if
-you modify it: responsibilities to respect the freedom of others.
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- For example, if you distribute copies of such a program, whether
-gratis or for a fee, you must pass on to the recipients the same
-freedoms that you received. You must make sure that they, too, receive
-or can get the source code. And you must show them these terms so they
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- Developers that use the GNU GPL protect your rights with two steps:
-(1) assert copyright on the software, and (2) offer you this License
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-that there is no warranty for this free software. For both users' and
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diff --git a/config/grub/config/grub.cfg b/config/grub/default/config/payload
index 3bbd2ecc..cdd6c0f0 100644
--- a/config/grub/config/grub.cfg
+++ b/config/grub/default/config/payload
@@ -1,3 +1,7 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+# Copyright (C) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (C) 2015 Klemens Nanni <contact@autoboot.org>
+
set prefix=(memdisk)/boot/grub
insmod at_keyboard
@@ -22,13 +26,14 @@ else
gfxpayload=keep
terminal_output --append gfxterm
- if [ -f (cbfsdisk)/background.png ]; then
- insmod png
- background_image (cbfsdisk)/background.png
- elif [ -f (cbfsdisk)/background.jpg ]; then
- insmod jpeg
- background_image (cbfsdisk)/background.jpg
- fi
+ for dt in cbfsdisk memdisk; do
+ for it in png jpg; do
+ if [ -f (${dt})/background.${it} ]; then
+ insmod ${it}
+ background_image (${dt})/background.${it}
+ fi
+ done
+ done
fi
# Keep CTRL pressed to enable default serial terminal (COM1 or the like)
@@ -48,9 +53,9 @@ set default="0"
if [ -f (cbfsdisk)/timeout.cfg ]; then
source (cbfsdisk)/timeout.cfg
else
- set timeout=5
+ set timeout=8
fi
-set grub_scan_disk="both"
+set grub_scan_disk="ahci ata"
if [ -f (cbfsdisk)/scan.cfg ]; then
source (cbfsdisk)/scan.cfg
fi
@@ -59,34 +64,43 @@ if [ -f (cbfsdisk)/keymap.gkb ]; then
keymap (cbfsdisk)/keymap.gkb
fi
-function try_user_config {
+function really_try_user_config {
set root="${1}"
+ if [ -f /"${2}"/grub.cfg ]; then
+ unset superusers
+ configfile /"${2}"/grub.cfg
+ fi
+}
+
+function try_user_config {
# The @/... entries are for cases where the BTRFS filesystem is being used
- for dir in boot grub grub2 boot/grub boot/grub2 @/boot @/grub @/grub2 @/boot/grub @/boot/grub2; do
- for name in '' osboot_ autoboot_ libreboot_ coreboot_; do
- if [ -f /"${dir}"/"${name}"grub.cfg ]; then
- unset superusers
- configfile /"${dir}"/"${name}"grub.cfg
- fi
- done
+ for dir in grub boot/grub @/grub @/boot/grub grub2 boot/grub2 @/grub2 @/boot/grub2 boot @/boot; do
+ really_try_user_config "${1}" "${dir}"
+ done
+ for dir in ubuntu debian redhat; do
+ really_try_user_config "${1}" "EFI/${dir}"
done
}
function search_grub {
echo -n "Attempting to load grub.cfg from '${1}' devices"
- for i in 0 1 2 3 4 5 6 7 8 9 10 11; do
- for part in 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20; do
- try_user_config "(${1}${i},${part})"
+ for i in 0 1 2 3 4 5 6 7 8; do
+ for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
+ if [ "${1}" != "nvme" ]; then
+ try_user_config "(${1}${i},${part})"
+ fi
done
- # raw devices e.g. (ahci0) instead of (ahci0,1)
- try_user_config "(${1}${i})"
+ if [ "${1}" != "nvme" ]; then
+ # raw devices e.g. (ahci0) instead of (ahci0,1)
+ try_user_config "(${1}${i})"
+ fi
done
echo # Insert newline
}
function try_isolinux_config {
set root="${1}"
- for dir in '' /boot /EFI /boot/EFI /@ /@/boot /@/boot/EFI /@/EFI; do
+ for dir in '' /boot /EFI /@ /@/boot; do
if [ -f "${dir}"/isolinux/isolinux.cfg ]; then
syslinux_configfile -i "${dir}"/isolinux/isolinux.cfg
elif [ -f "${dir}"/syslinux/syslinux.cfg ]; then
@@ -100,12 +114,16 @@ function try_isolinux_config {
}
function search_isolinux {
echo "\nAttempting to parse iso/sys/extlinux config from '${1}' devices"
- for i in 0 1 2 3 4 5 6 7 8 9 10 11; do
- for part in 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20; do
- try_isolinux_config "(${1}${i},${part})"
+ for i in 0 1 2 3 4 5 6 7 8; do
+ for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
+ if [ "${1}" != "nvme" ]; then
+ try_isolinux_config "(${1}${i},${part})"
+ fi
done
- # raw devices e.g. (usb0) instead of (usb0,1)
- try_isolinux_config "(${1}${i})"
+ if [ "${1}" != "nvme" ]; then
+ # raw devices e.g. (usb0) instead of (usb0,1)
+ try_isolinux_config "(${1}${i})"
+ fi
done
echo # Insert newline
}
@@ -119,12 +137,9 @@ function search_bootcfg {
}
menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o' {
- if [ "${grub_scan_disk}" != "ata" ]; then
- search_bootcfg ahci
- fi
- if [ "${grub_scan_disk}" != "ahci" ]; then
- search_bootcfg ata
- fi
+ for grub_disk in ${grub_scan_disk}; do
+ search_bootcfg ${grub_disk}
+ done
# grub device enumeration is very slow, so checks are hardcoded
@@ -141,22 +156,22 @@ menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o
try_bootcfg "${vol}"
done
- unset ahcidev
- unset atadev
- for i in 11 10 9 8 7 6 5 4 3 2 1 0; do
- for part in 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1; do
- if [ "${grub_scan_disk}" != "ata" ]; then
- ahcidev="(ahci${i},${part}) ${ahcidev}"
- fi
- if [ "${grub_scan_disk}" != "ahci" ]; then
- atadev="(ata${i},${part}) ${atadev}"
- fi
+ unset bootdev
+ for grub_disk in ${grub_scan_disk}; do
+ for i in 0 1 2 3 4 5 6 7 8; do
+ for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
+ if [ "${grub_disk}" = "ahci" ]; then
+ bootdev="${bootdev} (ahci${i},${part})"
+ elif [ "${grub_disk}" = "ata" ]; then
+ bootdev="${bootdev} (ata${i},${part})"
+ fi
+ done
done
done
set pager=0
echo -n "Attempting to unlock encrypted volumes"
- for dev in ${ahcidev} ${atadev} ${lvmvol} ${raidvol}; do
+ for dev in ${bootdev} ${lvmvol} ${raidvol}; do
if cryptomount "${dev}" ; then break ; fi
done
set pager=1
@@ -185,6 +200,14 @@ menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on AHCI [a]' --hotkey='a'
menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on ATA/IDE [d]' --hotkey='d' {
search_bootcfg ata
}
+if [ -f (cbfsdisk)/grub.cfg ]; then
+menuentry 'Load configuration (grub.cfg) in CBFS [t]' --hotkey='t' {
+ set root='(cbfsdisk)'
+ if [ -f /grub.cfg ]; then
+ configfile /grub.cfg
+ fi
+}
+fi
if [ -f (cbfsdisk)/grubtest.cfg ]; then
menuentry 'Load test configuration (grubtest.cfg) inside of CBFS [t]' --hotkey='t' {
set root='(cbfsdisk)'
@@ -246,4 +269,4 @@ submenu 'Other [z]' --hotkey='z' {
menuentry 'Disable spkmodem [z]' --hotkey='z' {
terminal_output --remove spkmodem
}
-} \ No newline at end of file
+}
diff --git a/config/grub/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
index 183f5a91..7aa0d568 100644
--- a/config/grub/patches/0001-borderfix/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
+++ b/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -1,7 +1,7 @@
-From ce13539fe2103abbd991814d995e06cf96e485f7 Mon Sep 17 00:00:00 2001
+From 8b55c63ab6094bc9017eedd34bd7d0ae3c04cb9c Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 31 Oct 2021 03:47:05 +0000
-Subject: [PATCH 1/3] mitigate grub's missing characters for borders/arrow
+Subject: [PATCH 01/13] mitigate grub's missing characters for borders/arrow
characters
This cleans up the display on the main screen in GRUB.
@@ -12,7 +12,7 @@ Just don't draw a border, at all.
1 file changed, 2 insertions(+), 47 deletions(-)
diff --git a/grub-core/normal/menu_text.c b/grub-core/normal/menu_text.c
-index b1321eb26..e76094dfd 100644
+index 9c383e64a..8ec1dd1e8 100644
--- a/grub-core/normal/menu_text.c
+++ b/grub-core/normal/menu_text.c
@@ -108,47 +108,6 @@ grub_print_message_indented (const char *msg, int margin_left, int margin_right,
@@ -76,7 +76,7 @@ index b1321eb26..e76094dfd 100644
if (!msg_translated)
return 0;
ret += grub_print_message_indented_real (msg_translated, STANDARD_MARGIN,
-@@ -410,8 +367,6 @@ grub_menu_init_page (int nested, int edit,
+@@ -413,8 +370,6 @@ grub_menu_init_page (int nested, int edit,
grub_term_normal_color = grub_color_menu_normal;
grub_term_highlight_color = grub_color_menu_highlight;
@@ -86,5 +86,5 @@ index b1321eb26..e76094dfd 100644
grub_term_highlight_color = old_color_highlight;
geo->timeout_y = geo->first_entry_y + geo->num_entries
--
-2.25.1
+2.39.2
diff --git a/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
index 6ff97979..99082320 100644
--- a/config/grub/patches/0001-borderfix/0002-say-the-name-libreboot-in-the-grub-menu.patch
+++ b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -1,14 +1,14 @@
-From 70f9e72c3ff6381fe3519612de3b649c0cf26b9a Mon Sep 17 00:00:00 2001
+From 3b719f8153350f9bfac2cb889d37562cdf566cc8 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sat, 19 Nov 2022 16:30:24 +0000
-Subject: [PATCH 2/3] say the name libreboot, in the grub menu
+Subject: [PATCH 02/13] say the name libreboot, in the grub menu
---
grub-core/normal/main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c
-index bd4431000..31308e16a 100644
+index bd4431000..300f55fe1 100644
--- a/grub-core/normal/main.c
+++ b/grub-core/normal/main.c
@@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term,
@@ -16,10 +16,10 @@ index bd4431000..31308e16a 100644
grub_term_cls (term);
- msg_formatted = grub_xasprintf (_("GNU GRUB version %s"), PACKAGE_VERSION);
-+ msg_formatted = grub_xasprintf (_("Libreboot 20240504 release, based on coreboot. https://libreboot.org/"));
++ msg_formatted = grub_xasprintf (_("Libreboot 20241008 release, based on coreboot. https://libreboot.org/"));
if (!msg_formatted)
return;
--
-2.25.1
+2.39.2
diff --git a/config/grub/patches/0002-luks2/0003-Add-CC0-license.patch b/config/grub/default/patches/0003-Add-CC0-license.patch
index dc9060c3..5795b05c 100644
--- a/config/grub/patches/0002-luks2/0003-Add-CC0-license.patch
+++ b/config/grub/default/patches/0003-Add-CC0-license.patch
@@ -1,7 +1,7 @@
-From de6e7cc62522ce1be21bd2f06e7c15cd234b5426 Mon Sep 17 00:00:00 2001
+From 09cbe5c71236987605cd375c4f69c6a36401e81c Mon Sep 17 00:00:00 2001
From: Ax333l <main@axelen.xyz>
Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 1/6] Add CC0 license
+Subject: [PATCH 03/13] Add CC0 license
Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
---
diff --git a/config/grub/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch
index be875e67..cb910c85 100644
--- a/config/grub/patches/0002-luks2/0004-Define-GRUB_UINT32_MAX.patch
+++ b/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch
@@ -1,7 +1,7 @@
-From 9edaaffac91d593a439e44bac3b6f5558f5a8245 Mon Sep 17 00:00:00 2001
+From fb7e3d852bf3658b6e3cf4725c40f2a3eaa56c5b Mon Sep 17 00:00:00 2001
From: Ax333l <main@axelen.xyz>
Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 2/6] Define GRUB_UINT32_MAX
+Subject: [PATCH 04/13] Define GRUB_UINT32_MAX
Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
---
@@ -9,7 +9,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
1 file changed, 8 insertions(+)
diff --git a/include/grub/types.h b/include/grub/types.h
-index 0d96006fe..a13f3a60b 100644
+index 45079bf65..8c0b30395 100644
--- a/include/grub/types.h
+++ b/include/grub/types.h
@@ -156,6 +156,7 @@ typedef grub_int32_t grub_ssize_t;
diff --git a/config/grub/patches/0002-luks2/0005-Add-Argon2-algorithm.patch b/config/grub/default/patches/0005-Add-Argon2-algorithm.patch
index 1c6b4f04..1adfdef7 100644
--- a/config/grub/patches/0002-luks2/0005-Add-Argon2-algorithm.patch
+++ b/config/grub/default/patches/0005-Add-Argon2-algorithm.patch
@@ -1,7 +1,7 @@
-From 5b63da5c4267933f573ca37ce39a073098c443ba Mon Sep 17 00:00:00 2001
+From 9bc9e32ace3f103ff12aab063c8a250c8ba6a642 Mon Sep 17 00:00:00 2001
From: Ax333l <main@axelen.xyz>
Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 3/6] Add Argon2 algorithm
+Subject: [PATCH 05/13] Add Argon2 algorithm
Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
---
@@ -30,7 +30,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
create mode 100644 grub-core/lib/argon2/ref.c
diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi
-index a695b02f0..313335a53 100644
+index 1276c5930..cd6fb0e1e 100644
--- a/docs/grub-dev.texi
+++ b/docs/grub-dev.texi
@@ -503,11 +503,75 @@ GRUB includes some code from other projects, and it is sometimes necessary
@@ -110,10 +110,10 @@ index a695b02f0..313335a53 100644
@section Gnulib
diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index d2cf29584..4a06789e5 100644
+index 705d73fab..452f11b20 100644
--- a/grub-core/Makefile.core.def
+++ b/grub-core/Makefile.core.def
-@@ -1215,6 +1215,14 @@ module = {
+@@ -1219,6 +1219,14 @@ module = {
common = lib/json/json.c;
};
diff --git a/config/grub/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch
index 5d56bd61..6fb8fca2 100644
--- a/config/grub/patches/0002-luks2/0006-Error-on-missing-Argon2id-parameters.patch
+++ b/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch
@@ -1,7 +1,7 @@
-From 0044d32121bf52c4547c6b3c78f12d7305f57e6b Mon Sep 17 00:00:00 2001
+From 7090ad00b4c3b4a9af3d7e9df245aed5969da79d Mon Sep 17 00:00:00 2001
From: Ax333l <main@axelen.xyz>
Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 4/6] Error on missing Argon2id parameters
+Subject: [PATCH 06/13] Error on missing Argon2id parameters
Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
---
diff --git a/config/grub/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch b/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch
index f2e26fd4..65d89c33 100644
--- a/config/grub/patches/0002-luks2/0007-Compile-with-Argon2id-support.patch
+++ b/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch
@@ -1,7 +1,7 @@
-From 0a21695c55f76f1c958bb633481d55b3168562f7 Mon Sep 17 00:00:00 2001
+From 54bad25f08aab9bae2fbc2122aba9eb678549cc6 Mon Sep 17 00:00:00 2001
From: Ax333l <main@axelen.xyz>
Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 5/6] Compile with Argon2id support
+Subject: [PATCH 07/13] Compile with Argon2id support
Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
---
@@ -11,7 +11,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
3 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/Makefile.util.def b/Makefile.util.def
-index 1e9a13d3e..a167825c3 100644
+index 0f74a1680..5a15e5637 100644
--- a/Makefile.util.def
+++ b/Makefile.util.def
@@ -3,7 +3,7 @@ AutoGen definitions Makefile.tpl;
@@ -35,10 +35,10 @@ index 1e9a13d3e..a167825c3 100644
common = grub-core/disk/luks.c;
common = grub-core/disk/luks2.c;
diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index 4a06789e5..e939dcc99 100644
+index 452f11b20..5c1af8682 100644
--- a/grub-core/Makefile.core.def
+++ b/grub-core/Makefile.core.def
-@@ -1238,7 +1238,7 @@ module = {
+@@ -1242,7 +1242,7 @@ module = {
common = disk/luks2.c;
common = lib/gnulib/base64.c;
cflags = '$(CFLAGS_POSIX) $(CFLAGS_GNULIB)';
diff --git a/config/grub/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch
index dc65b7a6..83c268ed 100644
--- a/config/grub/patches/0002-luks2/0008-Make-grub-install-work-with-Argon2.patch
+++ b/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch
@@ -1,7 +1,7 @@
-From 6c9a6625c0dc038d1bdbdc13665f40e269e86496 Mon Sep 17 00:00:00 2001
+From a04a61ac008379d14749b0a1c47a8c9641c9eed5 Mon Sep 17 00:00:00 2001
From: Ax333l <main@axelen.xyz>
Date: Thu, 17 Aug 2023 00:00:00 +0000
-Subject: [PATCH 6/6] Make grub-install work with Argon2
+Subject: [PATCH 08/13] Make grub-install work with Argon2
Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
---
@@ -9,7 +9,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
1 file changed, 2 insertions(+)
diff --git a/util/grub-install.c b/util/grub-install.c
-index 1ad04db36..a8a3330b8 100644
+index 7dc5657bb..cf7315891 100644
--- a/util/grub-install.c
+++ b/util/grub-install.c
@@ -448,6 +448,8 @@ probe_mods (grub_disk_t disk)
diff --git a/config/grub/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
index 21e8630b..2a728537 100644
--- a/config/grub/patches/0003-keyboardfix/0001-at_keyboard-coreboot-force-scancodes2-translate.patch
+++ b/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -1,7 +1,7 @@
-From 96c0bbe5d406b616360a7fce7cee67d7692c0d6d Mon Sep 17 00:00:00 2001
+From 68f1bf73366ee0da82676c076cd9f282f89a888b Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 30 Oct 2023 22:19:21 +0000
-Subject: [PATCH 1/1] at_keyboard coreboot: force scancodes2+translate
+Subject: [PATCH 09/13] at_keyboard coreboot: force scancodes2+translate
Scan code set 2 with translation should be assumed in
every case, as the default starting position.
diff --git a/config/grub/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
index fbef86a4..bd15fdd5 100644
--- a/config/grub/patches/0003-keyboardfix/0002-keylayouts-don-t-print-Unknown-key-message.patch
+++ b/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
@@ -1,7 +1,7 @@
-From 0a6abeb40ac4284fbff6ef5958989d561b6290a7 Mon Sep 17 00:00:00 2001
+From c0f2f1b156cbc6f89accf9ce827ae13e8a347969 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Oct 2023 10:33:28 +0000
-Subject: [PATCH 1/1] keylayouts: don't print "Unknown key" message
+Subject: [PATCH 10/13] keylayouts: don't print "Unknown key" message
on keyboards with stuck keys, this results in GRUB just
spewing it repeatedly, preventing use of GRUB.
diff --git a/config/grub/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
index 25091d16..5031474a 100644
--- a/config/grub/patches/0004-prefix/0001-don-t-print-missing-prefix-errors-on-the-screen.patch
+++ b/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -1,7 +1,7 @@
-From 9e7a651a0f15f2e9dec65a77765c3c4fd97b4165 Mon Sep 17 00:00:00 2001
+From 34cab10d16b45938be82705bc8720c76f2aa1542 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 16:14:58 +0000
-Subject: [PATCH 1/1] don't print missing prefix errors on the screen
+Subject: [PATCH 11/13] don't print missing prefix errors on the screen
we do actually set the prefix. this patch modifies
grub to still set grub_errno and return accordingly,
diff --git a/config/grub/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch b/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch
index f4cf939e..9184e6fb 100644
--- a/config/grub/patches/0004-prefix/0002-don-t-print-error-if-module-not-found.patch
+++ b/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch
@@ -1,7 +1,7 @@
-From 6237c5762edccc1e1fa4746b1d4aa5e8d81e4883 Mon Sep 17 00:00:00 2001
+From bf4fbc14d4d9a4612b70531b9678676571a46818 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 16:36:22 +0000
-Subject: [PATCH 1/1] don't print error if module not found
+Subject: [PATCH 12/13] don't print error if module not found
still set grub_errno accordingly, and otherwise
behave the same. in libreboot, we remove a lot of
diff --git a/config/grub/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch b/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch
index 25221c9c..1fc76bcd 100644
--- a/config/grub/patches/0004-prefix/0003-don-t-print-empty-error-messages.patch
+++ b/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch
@@ -1,7 +1,7 @@
-From e5b7ec81421487e71bcaf8b6b5a27f3649a62753 Mon Sep 17 00:00:00 2001
+From e920aefcca3ad131d0f14d02955c3420fb99ee85 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Sun, 5 Nov 2023 17:25:20 +0000
-Subject: [PATCH 1/1] don't print empty error messages
+Subject: [PATCH 13/13] don't print empty error messages
this is part two of the quest to kill the prefix
error message. after i disabled prefix-related
diff --git a/config/grub/default/target.cfg b/config/grub/default/target.cfg
new file mode 100644
index 00000000..c546b1f9
--- /dev/null
+++ b/config/grub/default/target.cfg
@@ -0,0 +1,2 @@
+tree="default"
+rev="b53ec06a1d6f22ffc1139cbfc0f292e4ca2da9cd"
diff --git a/config/grub/nvme/config/payload b/config/grub/nvme/config/payload
new file mode 100644
index 00000000..2f9c7114
--- /dev/null
+++ b/config/grub/nvme/config/payload
@@ -0,0 +1,290 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+# Copyright (C) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (C) 2015 Klemens Nanni <contact@autoboot.org>
+
+set prefix=(memdisk)/boot/grub
+
+insmod at_keyboard
+insmod usb_keyboard
+insmod nativedisk
+insmod ehci
+insmod ohci
+insmod uhci
+insmod usb
+insmod usbms
+insmod regexp
+
+terminal_input --append at_keyboard
+terminal_input --append usb_keyboard
+terminal_output --append cbmemc
+
+# User interface overrides wherever "keystatus" is supported
+# Keep SHIFT key pressed before powering on to disable graphics
+if keystatus --shift; then
+ terminal_output --append vga_text
+else
+ gfxpayload=keep
+ terminal_output --append gfxterm
+
+ for dt in cbfsdisk memdisk; do
+ for it in png jpg; do
+ if [ -f (${dt})/background.${it} ]; then
+ insmod ${it}
+ background_image (${dt})/background.${it}
+ fi
+ done
+ done
+fi
+
+# Keep CTRL pressed to enable default serial terminal (COM1 or the like)
+if keystatus --ctrl; then
+ serial
+ terminal_input --append serial
+ terminal_output --append serial
+fi
+
+# Keep ALT pressed to enable spkmodem
+if keystatus --alt; then
+ terminal_output --append spkmodem
+fi
+
+
+set default="0"
+if [ -f (cbfsdisk)/timeout.cfg ]; then
+ source (cbfsdisk)/timeout.cfg
+else
+ set timeout=8
+fi
+set grub_scan_disk="nvme ahci ata"
+if [ -f (cbfsdisk)/scan.cfg ]; then
+ source (cbfsdisk)/scan.cfg
+fi
+
+if [ -f (cbfsdisk)/keymap.gkb ]; then
+ keymap (cbfsdisk)/keymap.gkb
+fi
+
+function really_try_user_config {
+ set root="${1}"
+
+ if [ -f /"${2}"/grub.cfg ]; then
+ unset superusers
+ configfile /"${2}"/grub.cfg
+ fi
+}
+
+function try_user_config {
+ # The @/... entries are for cases where the BTRFS filesystem is being used
+ for dir in grub boot/grub @/grub @/boot/grub grub2 boot/grub2 @/grub2 @/boot/grub2 boot @/boot; do
+ really_try_user_config "${1}" "${dir}"
+ done
+ for dir in ubuntu debian redhat; do
+ really_try_user_config "${1}" "EFI/${dir}"
+ done
+}
+function search_grub {
+ echo -n "Attempting to load grub.cfg from '${1}' devices"
+ for i in 0 1 2 3 4 5 6 7 8; do
+ for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
+ if [ "${1}" != "nvme" ]; then
+ try_user_config "(${1}${i},${part})"
+ else
+ # TODO: do we care about other namesapces
+ try_user_config "(nvme${i}n1,${part})"
+ fi
+ done
+ if [ "${1}" != "nvme" ]; then
+ # raw devices e.g. (ahci0) instead of (ahci0,1)
+ try_user_config "(${1}${i})"
+ else
+ # TODO: do we care about other namesapces
+ try_user_config "(nvme${i}n1)"
+ fi
+ done
+ echo # Insert newline
+}
+
+function try_isolinux_config {
+ set root="${1}"
+ for dir in '' /boot /EFI /@ /@/boot; do
+ if [ -f "${dir}"/isolinux/isolinux.cfg ]; then
+ syslinux_configfile -i "${dir}"/isolinux/isolinux.cfg
+ elif [ -f "${dir}"/syslinux/syslinux.cfg ]; then
+ syslinux_configfile -s "${dir}"/syslinux/syslinux.cfg
+ elif [ -f "${dir}"/syslinux/extlinux.conf ]; then
+ syslinux_configfile -s "${dir}"/syslinux/extlinux.conf
+ elif [ -f "${dir}"/extlinux/extlinux.conf ]; then
+ syslinux_configfile -s "${dir}"/extlinux/extlinux.conf
+ fi
+ done
+}
+function search_isolinux {
+ echo "\nAttempting to parse iso/sys/extlinux config from '${1}' devices"
+ for i in 0 1 2 3 4 5 6 7 8; do
+ for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
+ if [ "${1}" != "nvme" ]; then
+ try_isolinux_config "(${1}${i},${part})"
+ else
+ # TODO: see above
+ try_isolinux_config "(nvme${i}n1,${part})"
+ fi
+ done
+ if [ "${1}" != "nvme" ]; then
+ # raw devices e.g. (usb0) instead of (usb0,1)
+ try_isolinux_config "(${1}${i})"
+ else
+ # TODO: do we care about other namesapces
+ try_isolinux_config "(nvme${i}n1)"
+ fi
+ done
+ echo # Insert newline
+}
+function try_bootcfg {
+ try_user_config "${1}"
+ try_isolinux_config "${1}"
+}
+function search_bootcfg {
+ search_grub "${1}"
+ search_isolinux "${1}"
+}
+menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o' {
+
+ for grub_disk in ${grub_scan_disk}; do
+ search_bootcfg ${grub_disk}
+ done
+
+ # grub device enumeration is very slow, so checks are hardcoded
+
+ # TODO: add more strings, based on what distros set up when
+ # the user select auto-partitioning on those installers
+ lvmvol="lvm/grubcrypt-bootvol lvm/grubcrypt-rootvol"
+
+ raidvol="md/0 md/1 md/2 md/3 md/4 md/5 md/6 md/7 md/8 md/9"
+
+ # in practise, doing multiple redundant checks is perfectly fast and
+ # TODO: optimize grub itself, and use */? here for everything
+
+ for vol in ${lvmvol} ${raidvol} ; do
+ try_bootcfg "${vol}"
+ done
+
+ unset bootdev
+ for grub_disk in ${grub_scan_disk}; do
+ for i in 0 1 2 3 4 5 6 7 8; do
+ for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
+ if [ "${grub_disk}" = "ahci" ]; then
+ bootdev="${bootdev} (ahci${i},${part})"
+ elif [ "${grub_disk}" = "ata" ]; then
+ bootdev="${bootdev} (ata${i},${part})"
+ elif [ "${grub_disk}" = "nvme" ]; then
+ # TODO: do we care about other namesapces
+ bootdev="${bootdev} (nvme${i}n1,${part})"
+ fi
+ done
+ done
+ done
+
+ set pager=0
+ echo -n "Attempting to unlock encrypted volumes"
+ for dev in ${bootdev} ${lvmvol} ${raidvol}; do
+ if cryptomount "${dev}" ; then break ; fi
+ done
+ set pager=1
+ echo
+
+ # after cryptomount, lvm volumes might be available
+ for vol in ${lvmvol}; do
+ try_bootcfg "${vol}"
+ done
+
+ search_bootcfg crypto
+
+ for vol in lvm/* ; do
+ try_bootcfg "${vol}"
+ done
+
+ true # Prevent pager requiring to accept each line instead of whole screen
+}
+
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on USB [s]' --hotkey='s' {
+ search_bootcfg usb
+}
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on AHCI [a]' --hotkey='a' {
+ search_bootcfg ahci
+}
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on ATA/IDE [d]' --hotkey='d' {
+ search_bootcfg ata
+}
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on NVMe [e]' --hotkey='e' {
+ search_bootcfg nvme
+}
+if [ -f (cbfsdisk)/grub.cfg ]; then
+menuentry 'Load configuration (grub.cfg) in CBFS [t]' --hotkey='t' {
+ set root='(cbfsdisk)'
+ if [ -f /grub.cfg ]; then
+ configfile /grub.cfg
+ fi
+}
+fi
+if [ -f (cbfsdisk)/grubtest.cfg ]; then
+menuentry 'Load test configuration (grubtest.cfg) inside of CBFS [t]' --hotkey='t' {
+ set root='(cbfsdisk)'
+ if [ -f /grubtest.cfg ]; then
+ configfile /grubtest.cfg
+ fi
+}
+fi
+if [ -f (cbfsdisk)/seabios.elf ]; then
+menuentry 'Load SeaBIOS (payload) [b]' --hotkey='b' {
+ set root='cbfsdisk'
+ chainloader /seabios.elf
+}
+fi
+if [ -f (cbfsdisk)/img/grub2 ]; then
+menuentry 'Return to SeaBIOS [b]' --hotkey='b' {
+ set root='cbfsdisk'
+ chainloader /fallback/payload
+}
+fi
+menuentry 'Poweroff [p]' --hotkey='p' {
+ halt
+}
+menuentry 'Reboot [r]' --hotkey='r' {
+ reboot
+}
+if [ -f (cbfsdisk)/img/memtest ]; then
+menuentry 'Load MemTest86+ [m]' --hotkey='m' {
+ set root='cbfsdisk'
+ chainloader /img/memtest
+}
+fi
+
+submenu 'Other [z]' --hotkey='z' {
+ menuentry 'Enable default serial terminal [s]' --hotkey='s' {
+ serial
+ terminal_input --append serial
+ terminal_output --append serial
+ }
+
+ menuentry 'Disable default serial terminal' {
+ terminal_input --remove serial
+ terminal_output --remove serial
+ }
+
+ menuentry 'Enable gfxterm' {
+ terminal_output --append gfxterm
+ terminal_output --remove vga_text
+ }
+ menuentry 'Disable gfxterm [g]' --hotkey='g' {
+ terminal_output --remove gfxterm
+ terminal_output --append vga_text
+ }
+
+ menuentry 'Enable spkmodem [a]' --hotkey='a' {
+ terminal_output --append spkmodem
+ }
+
+ menuentry 'Disable spkmodem [z]' --hotkey='z' {
+ terminal_output --remove spkmodem
+ }
+}
diff --git a/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
new file mode 100644
index 00000000..b5ab0e5a
--- /dev/null
+++ b/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -0,0 +1,90 @@
+From b89bf30d11fdc4fdc9bc5350621e73a2fc0d5b89 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 31 Oct 2021 03:47:05 +0000
+Subject: [PATCH 01/14] mitigate grub's missing characters for borders/arrow
+ characters
+
+This cleans up the display on the main screen in GRUB.
+
+Just don't draw a border, at all.
+---
+ grub-core/normal/menu_text.c | 49 ++----------------------------------
+ 1 file changed, 2 insertions(+), 47 deletions(-)
+
+diff --git a/grub-core/normal/menu_text.c b/grub-core/normal/menu_text.c
+index 9c383e64a..8ec1dd1e8 100644
+--- a/grub-core/normal/menu_text.c
++++ b/grub-core/normal/menu_text.c
+@@ -108,47 +108,6 @@ grub_print_message_indented (const char *msg, int margin_left, int margin_right,
+ grub_print_message_indented_real (msg, margin_left, margin_right, term, 0);
+ }
+
+-static void
+-draw_border (struct grub_term_output *term, const struct grub_term_screen_geometry *geo)
+-{
+- int i;
+-
+- grub_term_setcolorstate (term, GRUB_TERM_COLOR_NORMAL);
+-
+- grub_term_gotoxy (term, (struct grub_term_coordinate) { geo->first_entry_x - 1,
+- geo->first_entry_y - 1 });
+- grub_putcode (GRUB_UNICODE_CORNER_UL, term);
+- for (i = 0; i < geo->entry_width + 1; i++)
+- grub_putcode (GRUB_UNICODE_HLINE, term);
+- grub_putcode (GRUB_UNICODE_CORNER_UR, term);
+-
+- for (i = 0; i < geo->num_entries; i++)
+- {
+- grub_term_gotoxy (term, (struct grub_term_coordinate) { geo->first_entry_x - 1,
+- geo->first_entry_y + i });
+- grub_putcode (GRUB_UNICODE_VLINE, term);
+- grub_term_gotoxy (term,
+- (struct grub_term_coordinate) { geo->first_entry_x + geo->entry_width + 1,
+- geo->first_entry_y + i });
+- grub_putcode (GRUB_UNICODE_VLINE, term);
+- }
+-
+- grub_term_gotoxy (term,
+- (struct grub_term_coordinate) { geo->first_entry_x - 1,
+- geo->first_entry_y - 1 + geo->num_entries + 1 });
+- grub_putcode (GRUB_UNICODE_CORNER_LL, term);
+- for (i = 0; i < geo->entry_width + 1; i++)
+- grub_putcode (GRUB_UNICODE_HLINE, term);
+- grub_putcode (GRUB_UNICODE_CORNER_LR, term);
+-
+- grub_term_setcolorstate (term, GRUB_TERM_COLOR_NORMAL);
+-
+- grub_term_gotoxy (term,
+- (struct grub_term_coordinate) { geo->first_entry_x - 1,
+- (geo->first_entry_y - 1 + geo->num_entries
+- + GRUB_TERM_MARGIN + 1) });
+-}
+-
+ static int
+ print_message (int nested, int edit, struct grub_term_output *term, int dry_run)
+ {
+@@ -167,10 +126,8 @@ command-line or ESC to discard edits and return to the GRUB menu."),
+ {
+ char *msg_translated;
+
+- msg_translated = grub_xasprintf (_("Use the %C and %C keys to select which "
+- "entry is highlighted."),
+- GRUB_UNICODE_UPARROW,
+- GRUB_UNICODE_DOWNARROW);
++ msg_translated = grub_xasprintf (_("Use the arrow keys to select which "
++ "entry is highlighted."));
+ if (!msg_translated)
+ return 0;
+ ret += grub_print_message_indented_real (msg_translated, STANDARD_MARGIN,
+@@ -413,8 +370,6 @@ grub_menu_init_page (int nested, int edit,
+
+ grub_term_normal_color = grub_color_menu_normal;
+ grub_term_highlight_color = grub_color_menu_highlight;
+- if (geo->border)
+- draw_border (term, geo);
+ grub_term_normal_color = old_color_normal;
+ grub_term_highlight_color = old_color_highlight;
+ geo->timeout_y = geo->first_entry_y + geo->num_entries
+--
+2.39.2
+
diff --git a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
new file mode 100644
index 00000000..d6bd2464
--- /dev/null
+++ b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -0,0 +1,25 @@
+From e074baff4a8ab3a6f8e397b49f6b3eade8728e02 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sat, 19 Nov 2022 16:30:24 +0000
+Subject: [PATCH 02/14] say the name libreboot, in the grub menu
+
+---
+ grub-core/normal/main.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c
+index bd4431000..300f55fe1 100644
+--- a/grub-core/normal/main.c
++++ b/grub-core/normal/main.c
+@@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term,
+
+ grub_term_cls (term);
+
+- msg_formatted = grub_xasprintf (_("GNU GRUB version %s"), PACKAGE_VERSION);
++ msg_formatted = grub_xasprintf (_("Libreboot 20241008 release, based on coreboot. https://libreboot.org/"));
+ if (!msg_formatted)
+ return;
+
+--
+2.39.2
+
diff --git a/config/grub/nvme/patches/0003-Add-CC0-license.patch b/config/grub/nvme/patches/0003-Add-CC0-license.patch
new file mode 100644
index 00000000..6434ed21
--- /dev/null
+++ b/config/grub/nvme/patches/0003-Add-CC0-license.patch
@@ -0,0 +1,42 @@
+From a62b61c5f3fda5a49e007095d79e654603c658d8 Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 03/14] Add CC0 license
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ grub-core/kern/dl.c | 3 ++-
+ util/grub-module-verifierXX.c | 3 ++-
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
+index 0bf40caa6..4011e2d15 100644
+--- a/grub-core/kern/dl.c
++++ b/grub-core/kern/dl.c
+@@ -470,7 +470,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e)
+
+ if (grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3") == 0
+ || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3+") == 0
+- || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv2+") == 0)
++ || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv2+") == 0
++ || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=CC0") == 0)
+ return GRUB_ERR_NONE;
+
+ return grub_error (GRUB_ERR_BAD_MODULE,
+diff --git a/util/grub-module-verifierXX.c b/util/grub-module-verifierXX.c
+index a42c20bd1..7157a30aa 100644
+--- a/util/grub-module-verifierXX.c
++++ b/util/grub-module-verifierXX.c
+@@ -236,7 +236,8 @@ check_license (const char * const filename,
+ Elf_Shdr *s = find_section (arch, e, ".module_license", module_size);
+ if (s && (strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=GPLv3") == 0
+ || strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=GPLv3+") == 0
+- || strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=GPLv2+") == 0))
++ || strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=GPLv2+") == 0
++ || strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=CC0") == 0))
+ return;
+ grub_util_error ("%s: incompatible license", filename);
+ }
+--
+2.39.2
+
diff --git a/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch
new file mode 100644
index 00000000..310fe8bf
--- /dev/null
+++ b/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch
@@ -0,0 +1,39 @@
+From c8c80f05753c26b7d7f5e3c3993039c565194875 Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 04/14] Define GRUB_UINT32_MAX
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ include/grub/types.h | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/include/grub/types.h b/include/grub/types.h
+index 45079bf65..8c0b30395 100644
+--- a/include/grub/types.h
++++ b/include/grub/types.h
+@@ -156,6 +156,7 @@ typedef grub_int32_t grub_ssize_t;
+ #define GRUB_SHRT_MAX 0x7fff
+ #define GRUB_SHRT_MIN (-GRUB_SHRT_MAX - 1)
+ #define GRUB_UINT_MAX 4294967295U
++#define GRUB_UINT32_MAX 4294967295U
+ #define GRUB_INT_MAX 0x7fffffff
+ #define GRUB_INT_MIN (-GRUB_INT_MAX - 1)
+ #define GRUB_INT32_MAX 2147483647
+@@ -177,6 +178,13 @@ typedef grub_int32_t grub_ssize_t;
+ #define GRUB_TYPE_U_MAX(type) ((unsigned long long)((typeof (type))(~0)))
+ #define GRUB_TYPE_U_MIN(type) 0ULL
+
++# define GRUB_UINT32_C(x) x ## U
++# if GRUB_ULONG_MAX >> 31 >> 31 >> 1 == 1
++# define GRUB_UINT64_C(x) x##UL
++# elif 1
++# define GRUB_UINT64_C(x) x##ULL
++# endif
++
+ typedef grub_uint64_t grub_properly_aligned_t;
+
+ #define GRUB_PROPERLY_ALIGNED_ARRAY(name, size) grub_properly_aligned_t name[((size) + sizeof (grub_properly_aligned_t) - 1) / sizeof (grub_properly_aligned_t)]
+--
+2.39.2
+
diff --git a/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch b/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch
new file mode 100644
index 00000000..b26e1f2c
--- /dev/null
+++ b/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch
@@ -0,0 +1,2611 @@
+From d171eb927e33f20627797cdca0dc81a3f3f478e0 Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 05/14] Add Argon2 algorithm
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ docs/grub-dev.texi | 64 +++
+ grub-core/Makefile.core.def | 8 +
+ grub-core/lib/argon2/LICENSE | 314 +++++++++++
+ grub-core/lib/argon2/argon2.c | 232 ++++++++
+ grub-core/lib/argon2/argon2.h | 264 +++++++++
+ grub-core/lib/argon2/blake2/blake2-impl.h | 151 ++++++
+ grub-core/lib/argon2/blake2/blake2.h | 89 +++
+ grub-core/lib/argon2/blake2/blake2b.c | 388 ++++++++++++++
+ .../lib/argon2/blake2/blamka-round-ref.h | 56 ++
+ grub-core/lib/argon2/core.c | 506 ++++++++++++++++++
+ grub-core/lib/argon2/core.h | 228 ++++++++
+ grub-core/lib/argon2/ref.c | 190 +++++++
+ 12 files changed, 2490 insertions(+)
+ create mode 100644 grub-core/lib/argon2/LICENSE
+ create mode 100644 grub-core/lib/argon2/argon2.c
+ create mode 100644 grub-core/lib/argon2/argon2.h
+ create mode 100644 grub-core/lib/argon2/blake2/blake2-impl.h
+ create mode 100644 grub-core/lib/argon2/blake2/blake2.h
+ create mode 100644 grub-core/lib/argon2/blake2/blake2b.c
+ create mode 100644 grub-core/lib/argon2/blake2/blamka-round-ref.h
+ create mode 100644 grub-core/lib/argon2/core.c
+ create mode 100644 grub-core/lib/argon2/core.h
+ create mode 100644 grub-core/lib/argon2/ref.c
+
+diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi
+index 1276c5930..cd6fb0e1e 100644
+--- a/docs/grub-dev.texi
++++ b/docs/grub-dev.texi
+@@ -503,11 +503,75 @@ GRUB includes some code from other projects, and it is sometimes necessary
+ to update it.
+
+ @menu
++* Argon2::
+ * Gnulib::
+ * jsmn::
+ * minilzo::
+ @end menu
+
++@node Argon2
++@section Argon2
++
++Argon2 is a key derivation function used by LUKS2 in order to derive encryption
++keys from a user-provided password. GRUB imports the official reference
++implementation of Argon2 from @url{https://github.com/P-H-C/phc-winner-argon2}.
++In order to make the library usable for GRUB, we need to perform various
++conversions. This is mainly due to the fact that the imported code makes use of
++types and functions defined in the C standard library, which isn't available.
++Furthermore, using the POSIX wrapper library is not possible as the code needs
++to be part of the kernel.
++
++Updating the code can thus be performed like following:
++
++@example
++$ git clone https://github.com/P-H-C/phc-winner-argon2 argon2
++$ cp argon2/include/argon2.h argon2/src/@{argon2.c,core.c,core.h,ref.c@} \
++ grub-core/lib/argon2/
++$ cp argon2/src/blake2/@{blake2-impl.h,blake2.h,blake2b.c,blamka-round-ref.h@} \
++ grub-core/lib/argon2/blake2/
++$ sed -e 's/UINT32_C/GRUB_UINT32_C/g' \
++ -e 's/UINT64_C/GRUB_UINT64_C/g' \
++ -e 's/UINT32_MAX/GRUB_UINT32_MAX/g' \
++ -e 's/CHAR_BIT/GRUB_CHAR_BIT/g' \
++ -e 's/UINT_MAX/GRUB_UINT_MAX/g' \
++ -e 's/uintptr_t/grub_addr_t/g' \
++ -e 's/size_t/grub_size_t/g' \
++ -e 's/uint32_t/grub_uint32_t/g' \
++ -e 's/uint64_t/grub_uint64_t/g' \
++ -e 's/uint8_t/grub_uint8_t/g' \
++ -e 's/memset/grub_memset/g' \
++ -e 's/memcpy/grub_memcpy/g' \
++ -e 's/malloc/grub_malloc/g' \
++ -e 's/free/grub_free/g' \
++ -e 's/#elif _MSC_VER/#elif defined(_MSC_VER)/' \
++ grub-core/lib/argon2/@{*,blake2/*@}.@{c,h@} -i
++@end example
++
++Afterwards, you need to perform the following manual steps:
++
++@enumerate
++@item Remove all includes of standard library headers, "encoding.h" and
++ "thread.h".
++@item Add includes <grub/mm.h> and <grub/misc.h> to "argon2.h".
++@item Add include <grub/dl.h> and module license declaration to "argon2.c".
++@item Remove the following declarations and functions from "argon2.h" and
++ "argon2.c": argon2_type2string, argon2i_hash_encoded, argon2i_hash_raw,
++ argon2d_hash_encoded, argon2d_hash_raw, argon2id_hash_encoded,
++ argon2id_hash_raw, argon2_compare, argon2_verify, argon2i_verify,
++ argon2d_verify, argon2id_verify, argon2d_ctx, argon2i_ctx, argon2id_ctx,
++ argon2_verify_ctx, argon2d_verify_ctx, argon2i_verify_ctx,
++ argon2id_verify_ctx, argon2_encodedlen.
++@item Move the declaration of `clear_internal_memory()` in "blake2-impl.h" to
++ "blake2b.c".
++@item Remove code guarded by the ARGON2_NO_THREADS macro.
++@item Remove parameters `encoded` and `encodedlen` from `argon2_hash` and remove
++ the encoding block in that function.
++@item Remove parameter verifications in `validate_inputs()` for
++ ARGON2_MIN_PWD_LENGTH, ARGON2_MIN_SECRET, ARGON2_MIN_AD_LENGTH and
++ ARGON2_MAX_MEMORY to fix compiler warnings.
++@item Mark the function argon2_ctx as static.
++@end enumerate
++
+ @node Gnulib
+ @section Gnulib
+
+diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
+index 705d73fab..452f11b20 100644
+--- a/grub-core/Makefile.core.def
++++ b/grub-core/Makefile.core.def
+@@ -1219,6 +1219,14 @@ module = {
+ common = lib/json/json.c;
+ };
+
++module = {
++ name = argon2;
++ common = lib/argon2/argon2.c;
++ common = lib/argon2/core.c;
++ common = lib/argon2/ref.c;
++ common = lib/argon2/blake2/blake2b.c;
++};
++
+ module = {
+ name = afsplitter;
+ common = disk/AFSplitter.c;
+diff --git a/grub-core/lib/argon2/LICENSE b/grub-core/lib/argon2/LICENSE
+new file mode 100644
+index 000000000..97aae2925
+--- /dev/null
++++ b/grub-core/lib/argon2/LICENSE
+@@ -0,0 +1,314 @@
++Argon2 reference source code package - reference C implementations
++
++Copyright 2015
++Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++
++You may use this work under the terms of a Creative Commons CC0 1.0
++License/Waiver or the Apache Public License 2.0, at your option. The terms of
++these licenses can be found at:
++
++- CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++- Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++
++The terms of the licenses are reproduced below.
++
++--------------------------------------------------------------------------------
++
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+diff --git a/grub-core/lib/argon2/argon2.c b/grub-core/lib/argon2/argon2.c
+new file mode 100644
+index 000000000..49532fe80
+--- /dev/null
++++ b/grub-core/lib/argon2/argon2.c
+@@ -0,0 +1,232 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#include <grub/dl.h>
++
++#include "argon2.h"
++#include "core.h"
++
++GRUB_MOD_LICENSE ("CC0");
++
++static int argon2_ctx(argon2_context *context, argon2_type type) {
++ /* 1. Validate all inputs */
++ int result = validate_inputs(context);
++ grub_uint32_t memory_blocks, segment_length;
++ argon2_instance_t instance;
++
++ if (ARGON2_OK != result) {
++ return result;
++ }
++
++ if (Argon2_d != type && Argon2_i != type && Argon2_id != type) {
++ return ARGON2_INCORRECT_TYPE;
++ }
++
++ /* 2. Align memory size */
++ /* Minimum memory_blocks = 8L blocks, where L is the number of lanes */
++ memory_blocks = context->m_cost;
++
++ if (memory_blocks < 2 * ARGON2_SYNC_POINTS * context->lanes) {
++ memory_blocks = 2 * ARGON2_SYNC_POINTS * context->lanes;
++ }
++
++ segment_length = memory_blocks / (context->lanes * ARGON2_SYNC_POINTS);
++ /* Ensure that all segments have equal length */
++ memory_blocks = segment_length * (context->lanes * ARGON2_SYNC_POINTS);
++
++ instance.version = context->version;
++ instance.memory = NULL;
++ instance.passes = context->t_cost;
++ instance.memory_blocks = memory_blocks;
++ instance.segment_length = segment_length;
++ instance.lane_length = segment_length * ARGON2_SYNC_POINTS;
++ instance.lanes = context->lanes;
++ instance.threads = context->threads;
++ instance.type = type;
++
++ if (instance.threads > instance.lanes) {
++ instance.threads = instance.lanes;
++ }
++
++ /* 3. Initialization: Hashing inputs, allocating memory, filling first
++ * blocks
++ */
++ result = initialize(&instance, context);
++
++ if (ARGON2_OK != result) {
++ return result;
++ }
++
++ /* 4. Filling memory */
++ result = fill_memory_blocks(&instance);
++
++ if (ARGON2_OK != result) {
++ return result;
++ }
++ /* 5. Finalization */
++ finalize(context, &instance);
++
++ return ARGON2_OK;
++}
++
++int argon2_hash(const grub_uint32_t t_cost, const grub_uint32_t m_cost,
++ const grub_uint32_t parallelism, const void *pwd,
++ const grub_size_t pwdlen, const void *salt, const grub_size_t saltlen,
++ void *hash, const grub_size_t hashlen, argon2_type type,
++ const grub_uint32_t version){
++
++ argon2_context context;
++ int result;
++ grub_uint8_t *out;
++
++ if (pwdlen > ARGON2_MAX_PWD_LENGTH) {
++ return ARGON2_PWD_TOO_LONG;
++ }
++
++ if (saltlen > ARGON2_MAX_SALT_LENGTH) {
++ return ARGON2_SALT_TOO_LONG;
++ }
++
++ if (hashlen > ARGON2_MAX_OUTLEN) {
++ return ARGON2_OUTPUT_TOO_LONG;
++ }
++
++ if (hashlen < ARGON2_MIN_OUTLEN) {
++ return ARGON2_OUTPUT_TOO_SHORT;
++ }
++
++ out = grub_malloc(hashlen);
++ if (!out) {
++ return ARGON2_MEMORY_ALLOCATION_ERROR;
++ }
++
++ context.out = (grub_uint8_t *)out;
++ context.outlen = (grub_uint32_t)hashlen;
++ context.pwd = CONST_CAST(grub_uint8_t *)pwd;
++ context.pwdlen = (grub_uint32_t)pwdlen;
++ context.salt = CONST_CAST(grub_uint8_t *)salt;
++ context.saltlen = (grub_uint32_t)saltlen;
++ context.secret = NULL;
++ context.secretlen = 0;
++ context.ad = NULL;
++ context.adlen = 0;
++ context.t_cost = t_cost;
++ context.m_cost = m_cost;
++ context.lanes = parallelism;
++ context.threads = parallelism;
++ context.allocate_cbk = NULL;
++ context.grub_free_cbk = NULL;
++ context.flags = ARGON2_DEFAULT_FLAGS;
++ context.version = version;
++
++ result = argon2_ctx(&context, type);
++
++ if (result != ARGON2_OK) {
++ clear_internal_memory(out, hashlen);
++ grub_free(out);
++ return result;
++ }
++
++ /* if raw hash requested, write it */
++ if (hash) {
++ grub_memcpy(hash, out, hashlen);
++ }
++
++ clear_internal_memory(out, hashlen);
++ grub_free(out);
++
++ return ARGON2_OK;
++}
++
++const char *argon2_error_message(int error_code) {
++ switch (error_code) {
++ case ARGON2_OK:
++ return "OK";
++ case ARGON2_OUTPUT_PTR_NULL:
++ return "Output pointer is NULL";
++ case ARGON2_OUTPUT_TOO_SHORT:
++ return "Output is too short";
++ case ARGON2_OUTPUT_TOO_LONG:
++ return "Output is too long";
++ case ARGON2_PWD_TOO_SHORT:
++ return "Password is too short";
++ case ARGON2_PWD_TOO_LONG:
++ return "Password is too long";
++ case ARGON2_SALT_TOO_SHORT:
++ return "Salt is too short";
++ case ARGON2_SALT_TOO_LONG:
++ return "Salt is too long";
++ case ARGON2_AD_TOO_SHORT:
++ return "Associated data is too short";
++ case ARGON2_AD_TOO_LONG:
++ return "Associated data is too long";
++ case ARGON2_SECRET_TOO_SHORT:
++ return "Secret is too short";
++ case ARGON2_SECRET_TOO_LONG:
++ return "Secret is too long";
++ case ARGON2_TIME_TOO_SMALL:
++ return "Time cost is too small";
++ case ARGON2_TIME_TOO_LARGE:
++ return "Time cost is too large";
++ case ARGON2_MEMORY_TOO_LITTLE:
++ return "Memory cost is too small";
++ case ARGON2_MEMORY_TOO_MUCH:
++ return "Memory cost is too large";
++ case ARGON2_LANES_TOO_FEW:
++ return "Too few lanes";
++ case ARGON2_LANES_TOO_MANY:
++ return "Too many lanes";
++ case ARGON2_PWD_PTR_MISMATCH:
++ return "Password pointer is NULL, but password length is not 0";
++ case ARGON2_SALT_PTR_MISMATCH:
++ return "Salt pointer is NULL, but salt length is not 0";
++ case ARGON2_SECRET_PTR_MISMATCH:
++ return "Secret pointer is NULL, but secret length is not 0";
++ case ARGON2_AD_PTR_MISMATCH:
++ return "Associated data pointer is NULL, but ad length is not 0";
++ case ARGON2_MEMORY_ALLOCATION_ERROR:
++ return "Memory allocation error";
++ case ARGON2_FREE_MEMORY_CBK_NULL:
++ return "The grub_free memory callback is NULL";
++ case ARGON2_ALLOCATE_MEMORY_CBK_NULL:
++ return "The allocate memory callback is NULL";
++ case ARGON2_INCORRECT_PARAMETER:
++ return "Argon2_Context context is NULL";
++ case ARGON2_INCORRECT_TYPE:
++ return "There is no such version of Argon2";
++ case ARGON2_OUT_PTR_MISMATCH:
++ return "Output pointer mismatch";
++ case ARGON2_THREADS_TOO_FEW:
++ return "Not enough threads";
++ case ARGON2_THREADS_TOO_MANY:
++ return "Too many threads";
++ case ARGON2_MISSING_ARGS:
++ return "Missing arguments";
++ case ARGON2_ENCODING_FAIL:
++ return "Encoding failed";
++ case ARGON2_DECODING_FAIL:
++ return "Decoding failed";
++ case ARGON2_THREAD_FAIL:
++ return "Threading failure";
++ case ARGON2_DECODING_LENGTH_FAIL:
++ return "Some of encoded parameters are too long or too short";
++ case ARGON2_VERIFY_MISMATCH:
++ return "The password does not match the supplied hash";
++ default:
++ return "Unknown error code";
++ }
++}
+diff --git a/grub-core/lib/argon2/argon2.h b/grub-core/lib/argon2/argon2.h
+new file mode 100644
+index 000000000..129f7efbd
+--- /dev/null
++++ b/grub-core/lib/argon2/argon2.h
+@@ -0,0 +1,264 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef ARGON2_H
++#define ARGON2_H
++
++#include <grub/misc.h>
++#include <grub/mm.h>
++
++#if defined(__cplusplus)
++extern "C" {
++#endif
++
++/* Symbols visibility control */
++#ifdef A2_VISCTL
++#define ARGON2_PUBLIC __attribute__((visibility("default")))
++#define ARGON2_LOCAL __attribute__ ((visibility ("hidden")))
++#elif defined(_MSC_VER)
++#define ARGON2_PUBLIC __declspec(dllexport)
++#define ARGON2_LOCAL
++#else
++#define ARGON2_PUBLIC
++#define ARGON2_LOCAL
++#endif
++
++/*
++ * Argon2 input parameter restrictions
++ */
++
++/* Minimum and maximum number of lanes (degree of parallelism) */
++#define ARGON2_MIN_LANES GRUB_UINT32_C(1)
++#define ARGON2_MAX_LANES GRUB_UINT32_C(0xFFFFFF)
++
++/* Minimum and maximum number of threads */
++#define ARGON2_MIN_THREADS GRUB_UINT32_C(1)
++#define ARGON2_MAX_THREADS GRUB_UINT32_C(0xFFFFFF)
++
++/* Number of synchronization points between lanes per pass */
++#define ARGON2_SYNC_POINTS GRUB_UINT32_C(4)
++
++/* Minimum and maximum digest size in bytes */
++#define ARGON2_MIN_OUTLEN GRUB_UINT32_C(4)
++#define ARGON2_MAX_OUTLEN GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum number of memory blocks (each of BLOCK_SIZE bytes) */
++#define ARGON2_MIN_MEMORY (2 * ARGON2_SYNC_POINTS) /* 2 blocks per slice */
++
++#define ARGON2_MIN(a, b) ((a) < (b) ? (a) : (b))
++/* Max memory size is addressing-space/2, topping at 2^32 blocks (4 TB) */
++#define ARGON2_MAX_MEMORY_BITS \
++ ARGON2_MIN(GRUB_UINT32_C(32), (sizeof(void *) * GRUB_CHAR_BIT - 10 - 1))
++#define ARGON2_MAX_MEMORY \
++ ARGON2_MIN(GRUB_UINT32_C(0xFFFFFFFF), GRUB_UINT64_C(1) << ARGON2_MAX_MEMORY_BITS)
++
++/* Minimum and maximum number of passes */
++#define ARGON2_MIN_TIME GRUB_UINT32_C(1)
++#define ARGON2_MAX_TIME GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum password length in bytes */
++#define ARGON2_MIN_PWD_LENGTH GRUB_UINT32_C(0)
++#define ARGON2_MAX_PWD_LENGTH GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum associated data length in bytes */
++#define ARGON2_MIN_AD_LENGTH GRUB_UINT32_C(0)
++#define ARGON2_MAX_AD_LENGTH GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum salt length in bytes */
++#define ARGON2_MIN_SALT_LENGTH GRUB_UINT32_C(8)
++#define ARGON2_MAX_SALT_LENGTH GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum key length in bytes */
++#define ARGON2_MIN_SECRET GRUB_UINT32_C(0)
++#define ARGON2_MAX_SECRET GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Flags to determine which fields are securely wiped (default = no wipe). */
++#define ARGON2_DEFAULT_FLAGS GRUB_UINT32_C(0)
++#define ARGON2_FLAG_CLEAR_PASSWORD (GRUB_UINT32_C(1) << 0)
++#define ARGON2_FLAG_CLEAR_SECRET (GRUB_UINT32_C(1) << 1)
++
++/* Global flag to determine if we are wiping internal memory buffers. This flag
++ * is defined in core.c and defaults to 1 (wipe internal memory). */
++extern int FLAG_clear_internal_memory;
++
++/* Error codes */
++typedef enum Argon2_ErrorCodes {
++ ARGON2_OK = 0,
++
++ ARGON2_OUTPUT_PTR_NULL = -1,
++
++ ARGON2_OUTPUT_TOO_SHORT = -2,
++ ARGON2_OUTPUT_TOO_LONG = -3,
++
++ ARGON2_PWD_TOO_SHORT = -4,
++ ARGON2_PWD_TOO_LONG = -5,
++
++ ARGON2_SALT_TOO_SHORT = -6,
++ ARGON2_SALT_TOO_LONG = -7,
++
++ ARGON2_AD_TOO_SHORT = -8,
++ ARGON2_AD_TOO_LONG = -9,
++
++ ARGON2_SECRET_TOO_SHORT = -10,
++ ARGON2_SECRET_TOO_LONG = -11,
++
++ ARGON2_TIME_TOO_SMALL = -12,
++ ARGON2_TIME_TOO_LARGE = -13,
++
++ ARGON2_MEMORY_TOO_LITTLE = -14,
++ ARGON2_MEMORY_TOO_MUCH = -15,
++
++ ARGON2_LANES_TOO_FEW = -16,
++ ARGON2_LANES_TOO_MANY = -17,
++
++ ARGON2_PWD_PTR_MISMATCH = -18, /* NULL ptr with non-zero length */
++ ARGON2_SALT_PTR_MISMATCH = -19, /* NULL ptr with non-zero length */
++ ARGON2_SECRET_PTR_MISMATCH = -20, /* NULL ptr with non-zero length */
++ ARGON2_AD_PTR_MISMATCH = -21, /* NULL ptr with non-zero length */
++
++ ARGON2_MEMORY_ALLOCATION_ERROR = -22,
++
++ ARGON2_FREE_MEMORY_CBK_NULL = -23,
++ ARGON2_ALLOCATE_MEMORY_CBK_NULL = -24,
++
++ ARGON2_INCORRECT_PARAMETER = -25,
++ ARGON2_INCORRECT_TYPE = -26,
++
++ ARGON2_OUT_PTR_MISMATCH = -27,
++
++ ARGON2_THREADS_TOO_FEW = -28,
++ ARGON2_THREADS_TOO_MANY = -29,
++
++ ARGON2_MISSING_ARGS = -30,
++
++ ARGON2_ENCODING_FAIL = -31,
++
++ ARGON2_DECODING_FAIL = -32,
++
++ ARGON2_THREAD_FAIL = -33,
++
++ ARGON2_DECODING_LENGTH_FAIL = -34,
++
++ ARGON2_VERIFY_MISMATCH = -35
++} argon2_error_codes;
++
++/* Memory allocator types --- for external allocation */
++typedef int (*allocate_fptr)(grub_uint8_t **memory, grub_size_t bytes_to_allocate);
++typedef void (*deallocate_fptr)(grub_uint8_t *memory, grub_size_t bytes_to_allocate);
++
++/* Argon2 external data structures */
++
++/*
++ *****
++ * Context: structure to hold Argon2 inputs:
++ * output array and its length,
++ * password and its length,
++ * salt and its length,
++ * secret and its length,
++ * associated data and its length,
++ * number of passes, amount of used memory (in KBytes, can be rounded up a bit)
++ * number of parallel threads that will be run.
++ * All the parameters above affect the output hash value.
++ * Additionally, two function pointers can be provided to allocate and
++ * deallocate the memory (if NULL, memory will be allocated internally).
++ * Also, three flags indicate whether to erase password, secret as soon as they
++ * are pre-hashed (and thus not needed anymore), and the entire memory
++ *****
++ * Simplest situation: you have output array out[8], password is stored in
++ * pwd[32], salt is stored in salt[16], you do not have keys nor associated
++ * data. You need to spend 1 GB of RAM and you run 5 passes of Argon2d with
++ * 4 parallel lanes.
++ * You want to erase the password, but you're OK with last pass not being
++ * erased. You want to use the default memory allocator.
++ * Then you initialize:
++ Argon2_Context(out,8,pwd,32,salt,16,NULL,0,NULL,0,5,1<<20,4,4,NULL,NULL,true,false,false,false)
++ */
++typedef struct Argon2_Context {
++ grub_uint8_t *out; /* output array */
++ grub_uint32_t outlen; /* digest length */
++
++ grub_uint8_t *pwd; /* password array */
++ grub_uint32_t pwdlen; /* password length */
++
++ grub_uint8_t *salt; /* salt array */
++ grub_uint32_t saltlen; /* salt length */
++
++ grub_uint8_t *secret; /* key array */
++ grub_uint32_t secretlen; /* key length */
++
++ grub_uint8_t *ad; /* associated data array */
++ grub_uint32_t adlen; /* associated data length */
++
++ grub_uint32_t t_cost; /* number of passes */
++ grub_uint32_t m_cost; /* amount of memory requested (KB) */
++ grub_uint32_t lanes; /* number of lanes */
++ grub_uint32_t threads; /* maximum number of threads */
++
++ grub_uint32_t version; /* version number */
++
++ allocate_fptr allocate_cbk; /* pointer to memory allocator */
++ deallocate_fptr grub_free_cbk; /* pointer to memory deallocator */
++
++ grub_uint32_t flags; /* array of bool options */
++} argon2_context;
++
++/* Argon2 primitive type */
++typedef enum Argon2_type {
++ Argon2_d = 0,
++ Argon2_i = 1,
++ Argon2_id = 2
++} argon2_type;
++
++/* Version of the algorithm */
++typedef enum Argon2_version {
++ ARGON2_VERSION_10 = 0x10,
++ ARGON2_VERSION_13 = 0x13,
++ ARGON2_VERSION_NUMBER = ARGON2_VERSION_13
++} argon2_version;
++
++/**
++ * Hashes a password with Argon2, producing a raw hash at @hash
++ * @param t_cost Number of iterations
++ * @param m_cost Sets memory usage to m_cost kibibytes
++ * @param parallelism Number of threads and compute lanes
++ * @param pwd Pointer to password
++ * @param pwdlen Password size in bytes
++ * @param salt Pointer to salt
++ * @param saltlen Salt size in bytes
++ * @param hash Buffer where to write the raw hash - updated by the function
++ * @param hashlen Desired length of the hash in bytes
++ * @pre Different parallelism levels will give different results
++ * @pre Returns ARGON2_OK if successful
++ */
++ARGON2_PUBLIC int argon2_hash(const grub_uint32_t t_cost, const grub_uint32_t m_cost,
++ const grub_uint32_t parallelism, const void *pwd,
++ const grub_size_t pwdlen, const void *salt,
++ const grub_size_t saltlen, void *hash,
++ const grub_size_t hashlen, argon2_type type,
++ const grub_uint32_t version);
++
++/**
++ * Get the associated error message for given error code
++ * @return The error message associated with the given error code
++ */
++ARGON2_PUBLIC const char *argon2_error_message(int error_code);
++
++#if defined(__cplusplus)
++}
++#endif
++
++#endif
+diff --git a/grub-core/lib/argon2/blake2/blake2-impl.h b/grub-core/lib/argon2/blake2/blake2-impl.h
+new file mode 100644
+index 000000000..3a795680b
+--- /dev/null
++++ b/grub-core/lib/argon2/blake2/blake2-impl.h
+@@ -0,0 +1,151 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef PORTABLE_BLAKE2_IMPL_H
++#define PORTABLE_BLAKE2_IMPL_H
++
++#if defined(_MSC_VER)
++#define BLAKE2_INLINE __inline
++#elif defined(__GNUC__) || defined(__clang__)
++#define BLAKE2_INLINE __inline__
++#else
++#define BLAKE2_INLINE
++#endif
++
++/* Argon2 Team - Begin Code */
++/*
++ Not an exhaustive list, but should cover the majority of modern platforms
++ Additionally, the code will always be correct---this is only a performance
++ tweak.
++*/
++#if (defined(__BYTE_ORDER__) && \
++ (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__)) || \
++ defined(__LITTLE_ENDIAN__) || defined(__ARMEL__) || defined(__MIPSEL__) || \
++ defined(__AARCH64EL__) || defined(__amd64__) || defined(__i386__) || \
++ defined(_M_IX86) || defined(_M_X64) || defined(_M_AMD64) || \
++ defined(_M_ARM)
++#define NATIVE_LITTLE_ENDIAN
++#endif
++/* Argon2 Team - End Code */
++
++static BLAKE2_INLINE grub_uint32_t load32(const void *src) {
++#if defined(NATIVE_LITTLE_ENDIAN)
++ grub_uint32_t w;
++ grub_memcpy(&w, src, sizeof w);
++ return w;
++#else
++ const grub_uint8_t *p = (const grub_uint8_t *)src;
++ grub_uint32_t w = *p++;
++ w |= (grub_uint32_t)(*p++) << 8;
++ w |= (grub_uint32_t)(*p++) << 16;
++ w |= (grub_uint32_t)(*p++) << 24;
++ return w;
++#endif
++}
++
++static BLAKE2_INLINE grub_uint64_t load64(const void *src) {
++#if defined(NATIVE_LITTLE_ENDIAN)
++ grub_uint64_t w;
++ grub_memcpy(&w, src, sizeof w);
++ return w;
++#else
++ const grub_uint8_t *p = (const grub_uint8_t *)src;
++ grub_uint64_t w = *p++;
++ w |= (grub_uint64_t)(*p++) << 8;
++ w |= (grub_uint64_t)(*p++) << 16;
++ w |= (grub_uint64_t)(*p++) << 24;
++ w |= (grub_uint64_t)(*p++) << 32;
++ w |= (grub_uint64_t)(*p++) << 40;
++ w |= (grub_uint64_t)(*p++) << 48;
++ w |= (grub_uint64_t)(*p++) << 56;
++ return w;
++#endif
++}
++
++static BLAKE2_INLINE void store32(void *dst, grub_uint32_t w) {
++#if defined(NATIVE_LITTLE_ENDIAN)
++ grub_memcpy(dst, &w, sizeof w);
++#else
++ grub_uint8_t *p = (grub_uint8_t *)dst;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++#endif
++}
++
++static BLAKE2_INLINE void store64(void *dst, grub_uint64_t w) {
++#if defined(NATIVE_LITTLE_ENDIAN)
++ grub_memcpy(dst, &w, sizeof w);
++#else
++ grub_uint8_t *p = (grub_uint8_t *)dst;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++#endif
++}
++
++static BLAKE2_INLINE grub_uint64_t load48(const void *src) {
++ const grub_uint8_t *p = (const grub_uint8_t *)src;
++ grub_uint64_t w = *p++;
++ w |= (grub_uint64_t)(*p++) << 8;
++ w |= (grub_uint64_t)(*p++) << 16;
++ w |= (grub_uint64_t)(*p++) << 24;
++ w |= (grub_uint64_t)(*p++) << 32;
++ w |= (grub_uint64_t)(*p++) << 40;
++ return w;
++}
++
++static BLAKE2_INLINE void store48(void *dst, grub_uint64_t w) {
++ grub_uint8_t *p = (grub_uint8_t *)dst;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++}
++
++static BLAKE2_INLINE grub_uint32_t rotr32(const grub_uint32_t w, const unsigned c) {
++ return (w >> c) | (w << (32 - c));
++}
++
++static BLAKE2_INLINE grub_uint64_t rotr64(const grub_uint64_t w, const unsigned c) {
++ return (w >> c) | (w << (64 - c));
++}
++
++#endif
+diff --git a/grub-core/lib/argon2/blake2/blake2.h b/grub-core/lib/argon2/blake2/blake2.h
+new file mode 100644
+index 000000000..4e8efeb22
+--- /dev/null
++++ b/grub-core/lib/argon2/blake2/blake2.h
+@@ -0,0 +1,89 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef PORTABLE_BLAKE2_H
++#define PORTABLE_BLAKE2_H
++
++#include "../argon2.h"
++
++#if defined(__cplusplus)
++extern "C" {
++#endif
++
++enum blake2b_constant {
++ BLAKE2B_BLOCKBYTES = 128,
++ BLAKE2B_OUTBYTES = 64,
++ BLAKE2B_KEYBYTES = 64,
++ BLAKE2B_SALTBYTES = 16,
++ BLAKE2B_PERSONALBYTES = 16
++};
++
++#pragma pack(push, 1)
++typedef struct __blake2b_param {
++ grub_uint8_t digest_length; /* 1 */
++ grub_uint8_t key_length; /* 2 */
++ grub_uint8_t fanout; /* 3 */
++ grub_uint8_t depth; /* 4 */
++ grub_uint32_t leaf_length; /* 8 */
++ grub_uint64_t node_offset; /* 16 */
++ grub_uint8_t node_depth; /* 17 */
++ grub_uint8_t inner_length; /* 18 */
++ grub_uint8_t reserved[14]; /* 32 */
++ grub_uint8_t salt[BLAKE2B_SALTBYTES]; /* 48 */
++ grub_uint8_t personal[BLAKE2B_PERSONALBYTES]; /* 64 */
++} blake2b_param;
++#pragma pack(pop)
++
++typedef struct __blake2b_state {
++ grub_uint64_t h[8];
++ grub_uint64_t t[2];
++ grub_uint64_t f[2];
++ grub_uint8_t buf[BLAKE2B_BLOCKBYTES];
++ unsigned buflen;
++ unsigned outlen;
++ grub_uint8_t last_node;
++} blake2b_state;
++
++/* Ensure param structs have not been wrongly padded */
++/* Poor man's static_assert */
++enum {
++ blake2_size_check_0 = 1 / !!(GRUB_CHAR_BIT == 8),
++ blake2_size_check_2 =
++ 1 / !!(sizeof(blake2b_param) == sizeof(grub_uint64_t) * GRUB_CHAR_BIT)
++};
++
++/* Streaming API */
++ARGON2_LOCAL int blake2b_init(blake2b_state *S, grub_size_t outlen);
++ARGON2_LOCAL int blake2b_init_key(blake2b_state *S, grub_size_t outlen, const void *key,
++ grub_size_t keylen);
++ARGON2_LOCAL int blake2b_init_param(blake2b_state *S, const blake2b_param *P);
++ARGON2_LOCAL int blake2b_update(blake2b_state *S, const void *in, grub_size_t inlen);
++ARGON2_LOCAL int blake2b_final(blake2b_state *S, void *out, grub_size_t outlen);
++
++/* Simple API */
++ARGON2_LOCAL int blake2b(void *out, grub_size_t outlen, const void *in, grub_size_t inlen,
++ const void *key, grub_size_t keylen);
++
++/* Argon2 Team - Begin Code */
++ARGON2_LOCAL int blake2b_long(void *out, grub_size_t outlen, const void *in, grub_size_t inlen);
++/* Argon2 Team - End Code */
++
++#if defined(__cplusplus)
++}
++#endif
++
++#endif
+diff --git a/grub-core/lib/argon2/blake2/blake2b.c b/grub-core/lib/argon2/blake2/blake2b.c
+new file mode 100644
+index 000000000..53abd7bef
+--- /dev/null
++++ b/grub-core/lib/argon2/blake2/blake2b.c
+@@ -0,0 +1,388 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#include "blake2.h"
++#include "blake2-impl.h"
++
++static const grub_uint64_t blake2b_IV[8] = {
++ GRUB_UINT64_C(0x6a09e667f3bcc908), GRUB_UINT64_C(0xbb67ae8584caa73b),
++ GRUB_UINT64_C(0x3c6ef372fe94f82b), GRUB_UINT64_C(0xa54ff53a5f1d36f1),
++ GRUB_UINT64_C(0x510e527fade682d1), GRUB_UINT64_C(0x9b05688c2b3e6c1f),
++ GRUB_UINT64_C(0x1f83d9abfb41bd6b), GRUB_UINT64_C(0x5be0cd19137e2179)};
++
++static const unsigned int blake2b_sigma[12][16] = {
++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15},
++ {14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3},
++ {11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4},
++ {7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8},
++ {9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13},
++ {2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9},
++ {12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11},
++ {13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10},
++ {6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5},
++ {10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0},
++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15},
++ {14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3},
++};
++
++void clear_internal_memory(void *v, grub_size_t n);
++
++static BLAKE2_INLINE void blake2b_set_lastnode(blake2b_state *S) {
++ S->f[1] = (grub_uint64_t)-1;
++}
++
++static BLAKE2_INLINE void blake2b_set_lastblock(blake2b_state *S) {
++ if (S->last_node) {
++ blake2b_set_lastnode(S);
++ }
++ S->f[0] = (grub_uint64_t)-1;
++}
++
++static BLAKE2_INLINE void blake2b_increment_counter(blake2b_state *S,
++ grub_uint64_t inc) {
++ S->t[0] += inc;
++ S->t[1] += (S->t[0] < inc);
++}
++
++static BLAKE2_INLINE void blake2b_invalidate_state(blake2b_state *S) {
++ clear_internal_memory(S, sizeof(*S)); /* wipe */
++ blake2b_set_lastblock(S); /* invalidate for further use */
++}
++
++static BLAKE2_INLINE void blake2b_init0(blake2b_state *S) {
++ grub_memset(S, 0, sizeof(*S));
++ grub_memcpy(S->h, blake2b_IV, sizeof(S->h));
++}
++
++int blake2b_init_param(blake2b_state *S, const blake2b_param *P) {
++ const unsigned char *p = (const unsigned char *)P;
++ unsigned int i;
++
++ if (NULL == P || NULL == S) {
++ return -1;
++ }
++
++ blake2b_init0(S);
++ /* IV XOR Parameter Block */
++ for (i = 0; i < 8; ++i) {
++ S->h[i] ^= load64(&p[i * sizeof(S->h[i])]);
++ }
++ S->outlen = P->digest_length;
++ return 0;
++}
++
++/* Sequential blake2b initialization */
++int blake2b_init(blake2b_state *S, grub_size_t outlen) {
++ blake2b_param P;
++
++ if (S == NULL) {
++ return -1;
++ }
++
++ if ((outlen == 0) || (outlen > BLAKE2B_OUTBYTES)) {
++ blake2b_invalidate_state(S);
++ return -1;
++ }
++
++ /* Setup Parameter Block for unkeyed BLAKE2 */
++ P.digest_length = (grub_uint8_t)outlen;
++ P.key_length = 0;
++ P.fanout = 1;
++ P.depth = 1;
++ P.leaf_length = 0;
++ P.node_offset = 0;
++ P.node_depth = 0;
++ P.inner_length = 0;
++ grub_memset(P.reserved, 0, sizeof(P.reserved));
++ grub_memset(P.salt, 0, sizeof(P.salt));
++ grub_memset(P.personal, 0, sizeof(P.personal));
++
++ return blake2b_init_param(S, &P);
++}
++
++int blake2b_init_key(blake2b_state *S, grub_size_t outlen, const void *key,
++ grub_size_t keylen) {
++ blake2b_param P;
++
++ if (S == NULL) {
++ return -1;
++ }
++
++ if ((outlen == 0) || (outlen > BLAKE2B_OUTBYTES)) {
++ blake2b_invalidate_state(S);
++ return -1;
++ }
++
++ if ((key == 0) || (keylen == 0) || (keylen > BLAKE2B_KEYBYTES)) {
++ blake2b_invalidate_state(S);
++ return -1;
++ }
++
++ /* Setup Parameter Block for keyed BLAKE2 */
++ P.digest_length = (grub_uint8_t)outlen;
++ P.key_length = (grub_uint8_t)keylen;
++ P.fanout = 1;
++ P.depth = 1;
++ P.leaf_length = 0;
++ P.node_offset = 0;
++ P.node_depth = 0;
++ P.inner_length = 0;
++ grub_memset(P.reserved, 0, sizeof(P.reserved));
++ grub_memset(P.salt, 0, sizeof(P.salt));
++ grub_memset(P.personal, 0, sizeof(P.personal));
++
++ if (blake2b_init_param(S, &P) < 0) {
++ blake2b_invalidate_state(S);
++ return -1;
++ }
++
++ {
++ grub_uint8_t block[BLAKE2B_BLOCKBYTES];
++ grub_memset(block, 0, BLAKE2B_BLOCKBYTES);
++ grub_memcpy(block, key, keylen);
++ blake2b_update(S, block, BLAKE2B_BLOCKBYTES);
++ /* Burn the key from stack */
++ clear_internal_memory(block, BLAKE2B_BLOCKBYTES);
++ }
++ return 0;
++}
++
++static void blake2b_compress(blake2b_state *S, const grub_uint8_t *block) {
++ grub_uint64_t m[16];
++ grub_uint64_t v[16];
++ unsigned int i, r;
++
++ for (i = 0; i < 16; ++i) {
++ m[i] = load64(block + i * sizeof(m[i]));
++ }
++
++ for (i = 0; i < 8; ++i) {
++ v[i] = S->h[i];
++ }
++
++ v[8] = blake2b_IV[0];
++ v[9] = blake2b_IV[1];
++ v[10] = blake2b_IV[2];
++ v[11] = blake2b_IV[3];
++ v[12] = blake2b_IV[4] ^ S->t[0];
++ v[13] = blake2b_IV[5] ^ S->t[1];
++ v[14] = blake2b_IV[6] ^ S->f[0];
++ v[15] = blake2b_IV[7] ^ S->f[1];
++
++#define G(r, i, a, b, c, d) \
++ do { \
++ a = a + b + m[blake2b_sigma[r][2 * i + 0]]; \
++ d = rotr64(d ^ a, 32); \
++ c = c + d; \
++ b = rotr64(b ^ c, 24); \
++ a = a + b + m[blake2b_sigma[r][2 * i + 1]]; \
++ d = rotr64(d ^ a, 16); \
++ c = c + d; \
++ b = rotr64(b ^ c, 63); \
++ } while ((void)0, 0)
++
++#define ROUND(r) \
++ do { \
++ G(r, 0, v[0], v[4], v[8], v[12]); \
++ G(r, 1, v[1], v[5], v[9], v[13]); \
++ G(r, 2, v[2], v[6], v[10], v[14]); \
++ G(r, 3, v[3], v[7], v[11], v[15]); \
++ G(r, 4, v[0], v[5], v[10], v[15]); \
++ G(r, 5, v[1], v[6], v[11], v[12]); \
++ G(r, 6, v[2], v[7], v[8], v[13]); \
++ G(r, 7, v[3], v[4], v[9], v[14]); \
++ } while ((void)0, 0)
++
++ for (r = 0; r < 12; ++r) {
++ ROUND(r);
++ }
++
++ for (i = 0; i < 8; ++i) {
++ S->h[i] = S->h[i] ^ v[i] ^ v[i + 8];
++ }
++
++#undef G
++#undef ROUND
++}
++
++int blake2b_update(blake2b_state *S, const void *in, grub_size_t inlen) {
++ const grub_uint8_t *pin = (const grub_uint8_t *)in;
++
++ if (inlen == 0) {
++ return 0;
++ }
++
++ /* Sanity check */
++ if (S == NULL || in == NULL) {
++ return -1;
++ }
++
++ /* Is this a reused state? */
++ if (S->f[0] != 0) {
++ return -1;
++ }
++
++ if (S->buflen + inlen > BLAKE2B_BLOCKBYTES) {
++ /* Complete current block */
++ grub_size_t left = S->buflen;
++ grub_size_t fill = BLAKE2B_BLOCKBYTES - left;
++ grub_memcpy(&S->buf[left], pin, fill);
++ blake2b_increment_counter(S, BLAKE2B_BLOCKBYTES);
++ blake2b_compress(S, S->buf);
++ S->buflen = 0;
++ inlen -= fill;
++ pin += fill;
++ /* Avoid buffer copies when possible */
++ while (inlen > BLAKE2B_BLOCKBYTES) {
++ blake2b_increment_counter(S, BLAKE2B_BLOCKBYTES);
++ blake2b_compress(S, pin);
++ inlen -= BLAKE2B_BLOCKBYTES;
++ pin += BLAKE2B_BLOCKBYTES;
++ }
++ }
++ grub_memcpy(&S->buf[S->buflen], pin, inlen);
++ S->buflen += (unsigned int)inlen;
++ return 0;
++}
++
++int blake2b_final(blake2b_state *S, void *out, grub_size_t outlen) {
++ grub_uint8_t buffer[BLAKE2B_OUTBYTES] = {0};
++ unsigned int i;
++
++ /* Sanity checks */
++ if (S == NULL || out == NULL || outlen < S->outlen) {
++ return -1;
++ }
++
++ /* Is this a reused state? */
++ if (S->f[0] != 0) {
++ return -1;
++ }
++
++ blake2b_increment_counter(S, S->buflen);
++ blake2b_set_lastblock(S);
++ grub_memset(&S->buf[S->buflen], 0, BLAKE2B_BLOCKBYTES - S->buflen); /* Padding */
++ blake2b_compress(S, S->buf);
++
++ for (i = 0; i < 8; ++i) { /* Output full hash to temp buffer */
++ store64(buffer + sizeof(S->h[i]) * i, S->h[i]);
++ }
++
++ grub_memcpy(out, buffer, S->outlen);
++ clear_internal_memory(buffer, sizeof(buffer));
++ clear_internal_memory(S->buf, sizeof(S->buf));
++ clear_internal_memory(S->h, sizeof(S->h));
++ return 0;
++}
++
++int blake2b(void *out, grub_size_t outlen, const void *in, grub_size_t inlen,
++ const void *key, grub_size_t keylen) {
++ blake2b_state S;
++ int ret = -1;
++
++ /* Verify parameters */
++ if (NULL == in && inlen > 0) {
++ goto fail;
++ }
++
++ if (NULL == out || outlen == 0 || outlen > BLAKE2B_OUTBYTES) {
++ goto fail;
++ }
++
++ if ((NULL == key && keylen > 0) || keylen > BLAKE2B_KEYBYTES) {
++ goto fail;
++ }
++
++ if (keylen > 0) {
++ if (blake2b_init_key(&S, outlen, key, keylen) < 0) {
++ goto fail;
++ }
++ } else {
++ if (blake2b_init(&S, outlen) < 0) {
++ goto fail;
++ }
++ }
++
++ if (blake2b_update(&S, in, inlen) < 0) {
++ goto fail;
++ }
++ ret = blake2b_final(&S, out, outlen);
++
++fail:
++ clear_internal_memory(&S, sizeof(S));
++ return ret;
++}
++
++/* Argon2 Team - Begin Code */
++int blake2b_long(void *pout, grub_size_t outlen, const void *in, grub_size_t inlen) {
++ grub_uint8_t *out = (grub_uint8_t *)pout;
++ blake2b_state blake_state;
++ grub_uint8_t outlen_bytes[sizeof(grub_uint32_t)] = {0};
++ int ret = -1;
++
++ if (outlen > GRUB_UINT32_MAX) {
++ goto fail;
++ }
++
++ /* Ensure little-endian byte order! */
++ store32(outlen_bytes, (grub_uint32_t)outlen);
++
++#define TRY(statement) \
++ do { \
++ ret = statement; \
++ if (ret < 0) { \
++ goto fail; \
++ } \
++ } while ((void)0, 0)
++
++ if (outlen <= BLAKE2B_OUTBYTES) {
++ TRY(blake2b_init(&blake_state, outlen));
++ TRY(blake2b_update(&blake_state, outlen_bytes, sizeof(outlen_bytes)));
++ TRY(blake2b_update(&blake_state, in, inlen));
++ TRY(blake2b_final(&blake_state, out, outlen));
++ } else {
++ grub_uint32_t toproduce;
++ grub_uint8_t out_buffer[BLAKE2B_OUTBYTES];
++ grub_uint8_t in_buffer[BLAKE2B_OUTBYTES];
++ TRY(blake2b_init(&blake_state, BLAKE2B_OUTBYTES));
++ TRY(blake2b_update(&blake_state, outlen_bytes, sizeof(outlen_bytes)));
++ TRY(blake2b_update(&blake_state, in, inlen));
++ TRY(blake2b_final(&blake_state, out_buffer, BLAKE2B_OUTBYTES));
++ grub_memcpy(out, out_buffer, BLAKE2B_OUTBYTES / 2);
++ out += BLAKE2B_OUTBYTES / 2;
++ toproduce = (grub_uint32_t)outlen - BLAKE2B_OUTBYTES / 2;
++
++ while (toproduce > BLAKE2B_OUTBYTES) {
++ grub_memcpy(in_buffer, out_buffer, BLAKE2B_OUTBYTES);
++ TRY(blake2b(out_buffer, BLAKE2B_OUTBYTES, in_buffer,
++ BLAKE2B_OUTBYTES, NULL, 0));
++ grub_memcpy(out, out_buffer, BLAKE2B_OUTBYTES / 2);
++ out += BLAKE2B_OUTBYTES / 2;
++ toproduce -= BLAKE2B_OUTBYTES / 2;
++ }
++
++ grub_memcpy(in_buffer, out_buffer, BLAKE2B_OUTBYTES);
++ TRY(blake2b(out_buffer, toproduce, in_buffer, BLAKE2B_OUTBYTES, NULL,
++ 0));
++ grub_memcpy(out, out_buffer, toproduce);
++ }
++fail:
++ clear_internal_memory(&blake_state, sizeof(blake_state));
++ return ret;
++#undef TRY
++}
++/* Argon2 Team - End Code */
+diff --git a/grub-core/lib/argon2/blake2/blamka-round-ref.h b/grub-core/lib/argon2/blake2/blamka-round-ref.h
+new file mode 100644
+index 000000000..7f0071ada
+--- /dev/null
++++ b/grub-core/lib/argon2/blake2/blamka-round-ref.h
+@@ -0,0 +1,56 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef BLAKE_ROUND_MKA_H
++#define BLAKE_ROUND_MKA_H
++
++#include "blake2.h"
++#include "blake2-impl.h"
++
++/* designed by the Lyra PHC team */
++static BLAKE2_INLINE grub_uint64_t fBlaMka(grub_uint64_t x, grub_uint64_t y) {
++ const grub_uint64_t m = GRUB_UINT64_C(0xFFFFFFFF);
++ const grub_uint64_t xy = (x & m) * (y & m);
++ return x + y + 2 * xy;
++}
++
++#define G(a, b, c, d) \
++ do { \
++ a = fBlaMka(a, b); \
++ d = rotr64(d ^ a, 32); \
++ c = fBlaMka(c, d); \
++ b = rotr64(b ^ c, 24); \
++ a = fBlaMka(a, b); \
++ d = rotr64(d ^ a, 16); \
++ c = fBlaMka(c, d); \
++ b = rotr64(b ^ c, 63); \
++ } while ((void)0, 0)
++
++#define BLAKE2_ROUND_NOMSG(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11, \
++ v12, v13, v14, v15) \
++ do { \
++ G(v0, v4, v8, v12); \
++ G(v1, v5, v9, v13); \
++ G(v2, v6, v10, v14); \
++ G(v3, v7, v11, v15); \
++ G(v0, v5, v10, v15); \
++ G(v1, v6, v11, v12); \
++ G(v2, v7, v8, v13); \
++ G(v3, v4, v9, v14); \
++ } while ((void)0, 0)
++
++#endif
+diff --git a/grub-core/lib/argon2/core.c b/grub-core/lib/argon2/core.c
+new file mode 100644
+index 000000000..0fe5b74cb
+--- /dev/null
++++ b/grub-core/lib/argon2/core.c
+@@ -0,0 +1,506 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++/*For memory wiping*/
++#ifdef _MSC_VER
++#include <windows.h>
++#include <winbase.h> /* For SecureZeroMemory */
++#endif
++#if defined __STDC_LIB_EXT1__
++#define __STDC_WANT_LIB_EXT1__ 1
++#endif
++#define VC_GE_2005(version) (version >= 1400)
++
++#include "core.h"
++#include "blake2/blake2.h"
++#include "blake2/blake2-impl.h"
++
++#ifdef GENKAT
++#include "genkat.h"
++#endif
++
++#if defined(__clang__)
++#if __has_attribute(optnone)
++#define NOT_OPTIMIZED __attribute__((optnone))
++#endif
++#elif defined(__GNUC__)
++#define GCC_VERSION \
++ (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__)
++#if GCC_VERSION >= 40400
++#define NOT_OPTIMIZED __attribute__((optimize("O0")))
++#endif
++#endif
++#ifndef NOT_OPTIMIZED
++#define NOT_OPTIMIZED
++#endif
++
++/***************Instance and Position constructors**********/
++void init_block_value(block *b, grub_uint8_t in) { grub_memset(b->v, in, sizeof(b->v)); }
++
++void copy_block(block *dst, const block *src) {
++ grub_memcpy(dst->v, src->v, sizeof(grub_uint64_t) * ARGON2_QWORDS_IN_BLOCK);
++}
++
++void xor_block(block *dst, const block *src) {
++ int i;
++ for (i = 0; i < ARGON2_QWORDS_IN_BLOCK; ++i) {
++ dst->v[i] ^= src->v[i];
++ }
++}
++
++static void load_block(block *dst, const void *input) {
++ unsigned i;
++ for (i = 0; i < ARGON2_QWORDS_IN_BLOCK; ++i) {
++ dst->v[i] = load64((const grub_uint8_t *)input + i * sizeof(dst->v[i]));
++ }
++}
++
++static void store_block(void *output, const block *src) {
++ unsigned i;
++ for (i = 0; i < ARGON2_QWORDS_IN_BLOCK; ++i) {
++ store64((grub_uint8_t *)output + i * sizeof(src->v[i]), src->v[i]);
++ }
++}
++
++/***************Memory functions*****************/
++
++int allocate_memory(const argon2_context *context, grub_uint8_t **memory,
++ grub_size_t num, grub_size_t size) {
++ grub_size_t memory_size = num*size;
++ if (memory == NULL) {
++ return ARGON2_MEMORY_ALLOCATION_ERROR;
++ }
++
++ /* 1. Check for multiplication overflow */
++ if (size != 0 && memory_size / size != num) {
++ return ARGON2_MEMORY_ALLOCATION_ERROR;
++ }
++
++ /* 2. Try to allocate with appropriate allocator */
++ if (context->allocate_cbk) {
++ (context->allocate_cbk)(memory, memory_size);
++ } else {
++ *memory = grub_malloc(memory_size);
++ }
++
++ if (*memory == NULL) {
++ return ARGON2_MEMORY_ALLOCATION_ERROR;
++ }
++
++ return ARGON2_OK;
++}
++
++void grub_free_memory(const argon2_context *context, grub_uint8_t *memory,
++ grub_size_t num, grub_size_t size) {
++ grub_size_t memory_size = num*size;
++ clear_internal_memory(memory, memory_size);
++ if (context->grub_free_cbk) {
++ (context->grub_free_cbk)(memory, memory_size);
++ } else {
++ grub_free(memory);
++ }
++}
++
++void NOT_OPTIMIZED secure_wipe_memory(void *v, grub_size_t n) {
++ static void *(*const volatile grub_memset_sec)(void *, int, grub_size_t) = &grub_memset;
++ grub_memset_sec(v, 0, n);
++}
++
++/* Memory clear flag defaults to true. */
++int FLAG_clear_internal_memory = 1;
++void clear_internal_memory(void *v, grub_size_t n) {
++ if (FLAG_clear_internal_memory && v) {
++ secure_wipe_memory(v, n);
++ }
++}
++
++void finalize(const argon2_context *context, argon2_instance_t *instance) {
++ if (context != NULL && instance != NULL) {
++ block blockhash;
++ grub_uint32_t l;
++
++ copy_block(&blockhash, instance->memory + instance->lane_length - 1);
++
++ /* XOR the last blocks */
++ for (l = 1; l < instance->lanes; ++l) {
++ grub_uint32_t last_block_in_lane =
++ l * instance->lane_length + (instance->lane_length - 1);
++ xor_block(&blockhash, instance->memory + last_block_in_lane);
++ }
++
++ /* Hash the result */
++ {
++ grub_uint8_t blockhash_bytes[ARGON2_BLOCK_SIZE];
++ store_block(blockhash_bytes, &blockhash);
++ blake2b_long(context->out, context->outlen, blockhash_bytes,
++ ARGON2_BLOCK_SIZE);
++ /* clear blockhash and blockhash_bytes */
++ clear_internal_memory(blockhash.v, ARGON2_BLOCK_SIZE);
++ clear_internal_memory(blockhash_bytes, ARGON2_BLOCK_SIZE);
++ }
++
++#ifdef GENKAT
++ print_tag(context->out, context->outlen);
++#endif
++
++ grub_free_memory(context, (grub_uint8_t *)instance->memory,
++ instance->memory_blocks, sizeof(block));
++ }
++}
++
++grub_uint32_t index_alpha(const argon2_instance_t *instance,
++ const argon2_position_t *position, grub_uint32_t pseudo_rand,
++ int same_lane) {
++ /*
++ * Pass 0:
++ * This lane : all already finished segments plus already constructed
++ * blocks in this segment
++ * Other lanes : all already finished segments
++ * Pass 1+:
++ * This lane : (SYNC_POINTS - 1) last segments plus already constructed
++ * blocks in this segment
++ * Other lanes : (SYNC_POINTS - 1) last segments
++ */
++ grub_uint32_t reference_area_size;
++ grub_uint64_t relative_position;
++ grub_uint64_t start_position, absolute_position;
++
++ if (0 == position->pass) {
++ /* First pass */
++ if (0 == position->slice) {
++ /* First slice */
++ reference_area_size =
++ position->index - 1; /* all but the previous */
++ } else {
++ if (same_lane) {
++ /* The same lane => add current segment */
++ reference_area_size =
++ position->slice * instance->segment_length +
++ position->index - 1;
++ } else {
++ reference_area_size =
++ position->slice * instance->segment_length +
++ ((position->index == 0) ? (-1) : 0);
++ }
++ }
++ } else {
++ /* Second pass */
++ if (same_lane) {
++ reference_area_size = instance->lane_length -
++ instance->segment_length + position->index -
++ 1;
++ } else {
++ reference_area_size = instance->lane_length -
++ instance->segment_length +
++ ((position->index == 0) ? (-1) : 0);
++ }
++ }
++
++ /* 1.2.4. Mapping pseudo_rand to 0..<reference_area_size-1> and produce
++ * relative position */
++ relative_position = pseudo_rand;
++ relative_position = relative_position * relative_position >> 32;
++ relative_position = reference_area_size - 1 -
++ (reference_area_size * relative_position >> 32);
++
++ /* 1.2.5 Computing starting position */
++ start_position = 0;
++
++ if (0 != position->pass) {
++ start_position = (position->slice == ARGON2_SYNC_POINTS - 1)
++ ? 0
++ : (position->slice + 1) * instance->segment_length;
++ }
++
++ /* 1.2.6. Computing absolute position */
++ grub_divmod64 (start_position + relative_position, instance->lane_length,
++ &absolute_position); /* absolute position */
++ return absolute_position;
++}
++
++/* Single-threaded version for p=1 case */
++static int fill_memory_blocks_st(argon2_instance_t *instance) {
++ grub_uint32_t r, s, l;
++
++ for (r = 0; r < instance->passes; ++r) {
++ for (s = 0; s < ARGON2_SYNC_POINTS; ++s) {
++ for (l = 0; l < instance->lanes; ++l) {
++ argon2_position_t position = {r, l, (grub_uint8_t)s, 0};
++ fill_segment(instance, position);
++ }
++ }
++#ifdef GENKAT
++ internal_kat(instance, r); /* Print all memory blocks */
++#endif
++ }
++ return ARGON2_OK;
++}
++
++int fill_memory_blocks(argon2_instance_t *instance) {
++ if (instance == NULL || instance->lanes == 0) {
++ return ARGON2_INCORRECT_PARAMETER;
++ }
++ return fill_memory_blocks_st(instance);
++}
++
++int validate_inputs(const argon2_context *context) {
++ if (NULL == context) {
++ return ARGON2_INCORRECT_PARAMETER;
++ }
++
++ if (NULL == context->out) {
++ return ARGON2_OUTPUT_PTR_NULL;
++ }
++
++ /* Validate output length */
++ if (ARGON2_MIN_OUTLEN > context->outlen) {
++ return ARGON2_OUTPUT_TOO_SHORT;
++ }
++
++ if (ARGON2_MAX_OUTLEN < context->outlen) {
++ return ARGON2_OUTPUT_TOO_LONG;
++ }
++
++ /* Validate password (required param) */
++ if (NULL == context->pwd) {
++ if (0 != context->pwdlen) {
++ return ARGON2_PWD_PTR_MISMATCH;
++ }
++ }
++
++ if (ARGON2_MAX_PWD_LENGTH < context->pwdlen) {
++ return ARGON2_PWD_TOO_LONG;
++ }
++
++ /* Validate salt (required param) */
++ if (NULL == context->salt) {
++ if (0 != context->saltlen) {
++ return ARGON2_SALT_PTR_MISMATCH;
++ }
++ }
++
++ if (ARGON2_MIN_SALT_LENGTH > context->saltlen) {
++ return ARGON2_SALT_TOO_SHORT;
++ }
++
++ if (ARGON2_MAX_SALT_LENGTH < context->saltlen) {
++ return ARGON2_SALT_TOO_LONG;
++ }
++
++ /* Validate secret (optional param) */
++ if (NULL == context->secret) {
++ if (0 != context->secretlen) {
++ return ARGON2_SECRET_PTR_MISMATCH;
++ }
++ } else {
++ if (ARGON2_MAX_SECRET < context->secretlen) {
++ return ARGON2_SECRET_TOO_LONG;
++ }
++ }
++
++ /* Validate associated data (optional param) */
++ if (NULL == context->ad) {
++ if (0 != context->adlen) {
++ return ARGON2_AD_PTR_MISMATCH;
++ }
++ } else {
++ if (ARGON2_MAX_AD_LENGTH < context->adlen) {
++ return ARGON2_AD_TOO_LONG;
++ }
++ }
++
++ /* Validate memory cost */
++ if (ARGON2_MIN_MEMORY > context->m_cost) {
++ return ARGON2_MEMORY_TOO_LITTLE;
++ }
++
++ if (context->m_cost < 8 * context->lanes) {
++ return ARGON2_MEMORY_TOO_LITTLE;
++ }
++
++ /* Validate time cost */
++ if (ARGON2_MIN_TIME > context->t_cost) {
++ return ARGON2_TIME_TOO_SMALL;
++ }
++
++ if (ARGON2_MAX_TIME < context->t_cost) {
++ return ARGON2_TIME_TOO_LARGE;
++ }
++
++ /* Validate lanes */
++ if (ARGON2_MIN_LANES > context->lanes) {
++ return ARGON2_LANES_TOO_FEW;
++ }
++
++ if (ARGON2_MAX_LANES < context->lanes) {
++ return ARGON2_LANES_TOO_MANY;
++ }
++
++ /* Validate threads */
++ if (ARGON2_MIN_THREADS > context->threads) {
++ return ARGON2_THREADS_TOO_FEW;
++ }
++
++ if (ARGON2_MAX_THREADS < context->threads) {
++ return ARGON2_THREADS_TOO_MANY;
++ }
++
++ if (NULL != context->allocate_cbk && NULL == context->grub_free_cbk) {
++ return ARGON2_FREE_MEMORY_CBK_NULL;
++ }
++
++ if (NULL == context->allocate_cbk && NULL != context->grub_free_cbk) {
++ return ARGON2_ALLOCATE_MEMORY_CBK_NULL;
++ }
++
++ return ARGON2_OK;
++}
++
++void fill_first_blocks(grub_uint8_t *blockhash, const argon2_instance_t *instance) {
++ grub_uint32_t l;
++ /* Make the first and second block in each lane as G(H0||0||i) or
++ G(H0||1||i) */
++ grub_uint8_t blockhash_bytes[ARGON2_BLOCK_SIZE];
++ for (l = 0; l < instance->lanes; ++l) {
++
++ store32(blockhash + ARGON2_PREHASH_DIGEST_LENGTH, 0);
++ store32(blockhash + ARGON2_PREHASH_DIGEST_LENGTH + 4, l);
++ blake2b_long(blockhash_bytes, ARGON2_BLOCK_SIZE, blockhash,
++ ARGON2_PREHASH_SEED_LENGTH);
++ load_block(&instance->memory[l * instance->lane_length + 0],
++ blockhash_bytes);
++
++ store32(blockhash + ARGON2_PREHASH_DIGEST_LENGTH, 1);
++ blake2b_long(blockhash_bytes, ARGON2_BLOCK_SIZE, blockhash,
++ ARGON2_PREHASH_SEED_LENGTH);
++ load_block(&instance->memory[l * instance->lane_length + 1],
++ blockhash_bytes);
++ }
++ clear_internal_memory(blockhash_bytes, ARGON2_BLOCK_SIZE);
++}
++
++void initial_hash(grub_uint8_t *blockhash, argon2_context *context,
++ argon2_type type) {
++ blake2b_state BlakeHash;
++ grub_uint8_t value[sizeof(grub_uint32_t)];
++
++ if (NULL == context || NULL == blockhash) {
++ return;
++ }
++
++ blake2b_init(&BlakeHash, ARGON2_PREHASH_DIGEST_LENGTH);
++
++ store32(&value, context->lanes);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ store32(&value, context->outlen);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ store32(&value, context->m_cost);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ store32(&value, context->t_cost);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ store32(&value, context->version);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ store32(&value, (grub_uint32_t)type);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ store32(&value, context->pwdlen);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ if (context->pwd != NULL) {
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)context->pwd,
++ context->pwdlen);
++
++ if (context->flags & ARGON2_FLAG_CLEAR_PASSWORD) {
++ secure_wipe_memory(context->pwd, context->pwdlen);
++ context->pwdlen = 0;
++ }
++ }
++
++ store32(&value, context->saltlen);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ if (context->salt != NULL) {
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)context->salt,
++ context->saltlen);
++ }
++
++ store32(&value, context->secretlen);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ if (context->secret != NULL) {
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)context->secret,
++ context->secretlen);
++
++ if (context->flags & ARGON2_FLAG_CLEAR_SECRET) {
++ secure_wipe_memory(context->secret, context->secretlen);
++ context->secretlen = 0;
++ }
++ }
++
++ store32(&value, context->adlen);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ if (context->ad != NULL) {
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)context->ad,
++ context->adlen);
++ }
++
++ blake2b_final(&BlakeHash, blockhash, ARGON2_PREHASH_DIGEST_LENGTH);
++}
++
++int initialize(argon2_instance_t *instance, argon2_context *context) {
++ grub_uint8_t blockhash[ARGON2_PREHASH_SEED_LENGTH];
++ int result = ARGON2_OK;
++
++ if (instance == NULL || context == NULL)
++ return ARGON2_INCORRECT_PARAMETER;
++ instance->context_ptr = context;
++
++ /* 1. Memory allocation */
++ result = allocate_memory(context, (grub_uint8_t **)&(instance->memory),
++ instance->memory_blocks, sizeof(block));
++ if (result != ARGON2_OK) {
++ return result;
++ }
++
++ /* 2. Initial hashing */
++ /* H_0 + 8 extra bytes to produce the first blocks */
++ /* grub_uint8_t blockhash[ARGON2_PREHASH_SEED_LENGTH]; */
++ /* Hashing all inputs */
++ initial_hash(blockhash, context, instance->type);
++ /* Zeroing 8 extra bytes */
++ clear_internal_memory(blockhash + ARGON2_PREHASH_DIGEST_LENGTH,
++ ARGON2_PREHASH_SEED_LENGTH -
++ ARGON2_PREHASH_DIGEST_LENGTH);
++
++#ifdef GENKAT
++ initial_kat(blockhash, context, instance->type);
++#endif
++
++ /* 3. Creating first blocks, we always have at least two blocks in a slice
++ */
++ fill_first_blocks(blockhash, instance);
++ /* Clearing the hash */
++ clear_internal_memory(blockhash, ARGON2_PREHASH_SEED_LENGTH);
++
++ return ARGON2_OK;
++}
+diff --git a/grub-core/lib/argon2/core.h b/grub-core/lib/argon2/core.h
+new file mode 100644
+index 000000000..bbcd56998
+--- /dev/null
++++ b/grub-core/lib/argon2/core.h
+@@ -0,0 +1,228 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef ARGON2_CORE_H
++#define ARGON2_CORE_H
++
++#include "argon2.h"
++
++#define CONST_CAST(x) (x)(grub_addr_t)
++
++/**********************Argon2 internal constants*******************************/
++
++enum argon2_core_constants {
++ /* Memory block size in bytes */
++ ARGON2_BLOCK_SIZE = 1024,
++ ARGON2_QWORDS_IN_BLOCK = ARGON2_BLOCK_SIZE / 8,
++ ARGON2_OWORDS_IN_BLOCK = ARGON2_BLOCK_SIZE / 16,
++ ARGON2_HWORDS_IN_BLOCK = ARGON2_BLOCK_SIZE / 32,
++ ARGON2_512BIT_WORDS_IN_BLOCK = ARGON2_BLOCK_SIZE / 64,
++
++ /* Number of pseudo-random values generated by one call to Blake in Argon2i
++ to
++ generate reference block positions */
++ ARGON2_ADDRESSES_IN_BLOCK = 128,
++
++ /* Pre-hashing digest length and its extension*/
++ ARGON2_PREHASH_DIGEST_LENGTH = 64,
++ ARGON2_PREHASH_SEED_LENGTH = 72
++};
++
++/*************************Argon2 internal data types***********************/
++
++/*
++ * Structure for the (1KB) memory block implemented as 128 64-bit words.
++ * Memory blocks can be copied, XORed. Internal words can be accessed by [] (no
++ * bounds checking).
++ */
++typedef struct block_ { grub_uint64_t v[ARGON2_QWORDS_IN_BLOCK]; } block;
++
++/*****************Functions that work with the block******************/
++
++/* Initialize each byte of the block with @in */
++void init_block_value(block *b, grub_uint8_t in);
++
++/* Copy block @src to block @dst */
++void copy_block(block *dst, const block *src);
++
++/* XOR @src onto @dst bytewise */
++void xor_block(block *dst, const block *src);
++
++/*
++ * Argon2 instance: memory pointer, number of passes, amount of memory, type,
++ * and derived values.
++ * Used to evaluate the number and location of blocks to construct in each
++ * thread
++ */
++typedef struct Argon2_instance_t {
++ block *memory; /* Memory pointer */
++ grub_uint32_t version;
++ grub_uint32_t passes; /* Number of passes */
++ grub_uint32_t memory_blocks; /* Number of blocks in memory */
++ grub_uint32_t segment_length;
++ grub_uint32_t lane_length;
++ grub_uint32_t lanes;
++ grub_uint32_t threads;
++ argon2_type type;
++ int print_internals; /* whether to print the memory blocks */
++ argon2_context *context_ptr; /* points back to original context */
++} argon2_instance_t;
++
++/*
++ * Argon2 position: where we construct the block right now. Used to distribute
++ * work between threads.
++ */
++typedef struct Argon2_position_t {
++ grub_uint32_t pass;
++ grub_uint32_t lane;
++ grub_uint8_t slice;
++ grub_uint32_t index;
++} argon2_position_t;
++
++/*Struct that holds the inputs for thread handling FillSegment*/
++typedef struct Argon2_thread_data {
++ argon2_instance_t *instance_ptr;
++ argon2_position_t pos;
++} argon2_thread_data;
++
++/*************************Argon2 core functions********************************/
++
++/* Allocates memory to the given pointer, uses the appropriate allocator as
++ * specified in the context. Total allocated memory is num*size.
++ * @param context argon2_context which specifies the allocator
++ * @param memory pointer to the pointer to the memory
++ * @param size the size in bytes for each element to be allocated
++ * @param num the number of elements to be allocated
++ * @return ARGON2_OK if @memory is a valid pointer and memory is allocated
++ */
++int allocate_memory(const argon2_context *context, grub_uint8_t **memory,
++ grub_size_t num, grub_size_t size);
++
++/*
++ * Frees memory at the given pointer, uses the appropriate deallocator as
++ * specified in the context. Also cleans the memory using clear_internal_memory.
++ * @param context argon2_context which specifies the deallocator
++ * @param memory pointer to buffer to be grub_freed
++ * @param size the size in bytes for each element to be deallocated
++ * @param num the number of elements to be deallocated
++ */
++void grub_free_memory(const argon2_context *context, grub_uint8_t *memory,
++ grub_size_t num, grub_size_t size);
++
++/* Function that securely cleans the memory. This ignores any flags set
++ * regarding clearing memory. Usually one just calls clear_internal_memory.
++ * @param mem Pointer to the memory
++ * @param s Memory size in bytes
++ */
++void secure_wipe_memory(void *v, grub_size_t n);
++
++/* Function that securely clears the memory if FLAG_clear_internal_memory is
++ * set. If the flag isn't set, this function does nothing.
++ * @param mem Pointer to the memory
++ * @param s Memory size in bytes
++ */
++void clear_internal_memory(void *v, grub_size_t n);
++
++/*
++ * Computes absolute position of reference block in the lane following a skewed
++ * distribution and using a pseudo-random value as input
++ * @param instance Pointer to the current instance
++ * @param position Pointer to the current position
++ * @param pseudo_rand 32-bit pseudo-random value used to determine the position
++ * @param same_lane Indicates if the block will be taken from the current lane.
++ * If so we can reference the current segment
++ * @pre All pointers must be valid
++ */
++grub_uint32_t index_alpha(const argon2_instance_t *instance,
++ const argon2_position_t *position, grub_uint32_t pseudo_rand,
++ int same_lane);
++
++/*
++ * Function that validates all inputs against predefined restrictions and return
++ * an error code
++ * @param context Pointer to current Argon2 context
++ * @return ARGON2_OK if everything is all right, otherwise one of error codes
++ * (all defined in <argon2.h>
++ */
++int validate_inputs(const argon2_context *context);
++
++/*
++ * Hashes all the inputs into @a blockhash[PREHASH_DIGEST_LENGTH], clears
++ * password and secret if needed
++ * @param context Pointer to the Argon2 internal structure containing memory
++ * pointer, and parameters for time and space requirements.
++ * @param blockhash Buffer for pre-hashing digest
++ * @param type Argon2 type
++ * @pre @a blockhash must have at least @a PREHASH_DIGEST_LENGTH bytes
++ * allocated
++ */
++void initial_hash(grub_uint8_t *blockhash, argon2_context *context,
++ argon2_type type);
++
++/*
++ * Function creates first 2 blocks per lane
++ * @param instance Pointer to the current instance
++ * @param blockhash Pointer to the pre-hashing digest
++ * @pre blockhash must point to @a PREHASH_SEED_LENGTH allocated values
++ */
++void fill_first_blocks(grub_uint8_t *blockhash, const argon2_instance_t *instance);
++
++/*
++ * Function allocates memory, hashes the inputs with Blake, and creates first
++ * two blocks. Returns the pointer to the main memory with 2 blocks per lane
++ * initialized
++ * @param context Pointer to the Argon2 internal structure containing memory
++ * pointer, and parameters for time and space requirements.
++ * @param instance Current Argon2 instance
++ * @return Zero if successful, -1 if memory failed to allocate. @context->state
++ * will be modified if successful.
++ */
++int initialize(argon2_instance_t *instance, argon2_context *context);
++
++/*
++ * XORing the last block of each lane, hashing it, making the tag. Deallocates
++ * the memory.
++ * @param context Pointer to current Argon2 context (use only the out parameters
++ * from it)
++ * @param instance Pointer to current instance of Argon2
++ * @pre instance->state must point to necessary amount of memory
++ * @pre context->out must point to outlen bytes of memory
++ * @pre if context->grub_free_cbk is not NULL, it should point to a function that
++ * deallocates memory
++ */
++void finalize(const argon2_context *context, argon2_instance_t *instance);
++
++/*
++ * Function that fills the segment using previous segments also from other
++ * threads
++ * @param context current context
++ * @param instance Pointer to the current instance
++ * @param position Current position
++ * @pre all block pointers must be valid
++ */
++void fill_segment(const argon2_instance_t *instance,
++ argon2_position_t position);
++
++/*
++ * Function that fills the entire memory t_cost times based on the first two
++ * blocks in each lane
++ * @param instance Pointer to the current instance
++ * @return ARGON2_OK if successful, @context->state
++ */
++int fill_memory_blocks(argon2_instance_t *instance);
++
++#endif
+diff --git a/grub-core/lib/argon2/ref.c b/grub-core/lib/argon2/ref.c
+new file mode 100644
+index 000000000..c933df80d
+--- /dev/null
++++ b/grub-core/lib/argon2/ref.c
+@@ -0,0 +1,190 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#include "argon2.h"
++#include "core.h"
++
++#include "blake2/blamka-round-ref.h"
++#include "blake2/blake2-impl.h"
++#include "blake2/blake2.h"
++
++
++/*
++ * Function fills a new memory block and optionally XORs the old block over the new one.
++ * @next_block must be initialized.
++ * @param prev_block Pointer to the previous block
++ * @param ref_block Pointer to the reference block
++ * @param next_block Pointer to the block to be constructed
++ * @param with_xor Whether to XOR into the new block (1) or just overwrite (0)
++ * @pre all block pointers must be valid
++ */
++static void fill_block(const block *prev_block, const block *ref_block,
++ block *next_block, int with_xor) {
++ block blockR, block_tmp;
++ unsigned i;
++
++ copy_block(&blockR, ref_block);
++ xor_block(&blockR, prev_block);
++ copy_block(&block_tmp, &blockR);
++ /* Now blockR = ref_block + prev_block and block_tmp = ref_block + prev_block */
++ if (with_xor) {
++ /* Saving the next block contents for XOR over: */
++ xor_block(&block_tmp, next_block);
++ /* Now blockR = ref_block + prev_block and
++ block_tmp = ref_block + prev_block + next_block */
++ }
++
++ /* Apply Blake2 on columns of 64-bit words: (0,1,...,15) , then
++ (16,17,..31)... finally (112,113,...127) */
++ for (i = 0; i < 8; ++i) {
++ BLAKE2_ROUND_NOMSG(
++ blockR.v[16 * i], blockR.v[16 * i + 1], blockR.v[16 * i + 2],
++ blockR.v[16 * i + 3], blockR.v[16 * i + 4], blockR.v[16 * i + 5],
++ blockR.v[16 * i + 6], blockR.v[16 * i + 7], blockR.v[16 * i + 8],
++ blockR.v[16 * i + 9], blockR.v[16 * i + 10], blockR.v[16 * i + 11],
++ blockR.v[16 * i + 12], blockR.v[16 * i + 13], blockR.v[16 * i + 14],
++ blockR.v[16 * i + 15]);
++ }
++
++ /* Apply Blake2 on rows of 64-bit words: (0,1,16,17,...112,113), then
++ (2,3,18,19,...,114,115).. finally (14,15,30,31,...,126,127) */
++ for (i = 0; i < 8; i++) {
++ BLAKE2_ROUND_NOMSG(
++ blockR.v[2 * i], blockR.v[2 * i + 1], blockR.v[2 * i + 16],
++ blockR.v[2 * i + 17], blockR.v[2 * i + 32], blockR.v[2 * i + 33],
++ blockR.v[2 * i + 48], blockR.v[2 * i + 49], blockR.v[2 * i + 64],
++ blockR.v[2 * i + 65], blockR.v[2 * i + 80], blockR.v[2 * i + 81],
++ blockR.v[2 * i + 96], blockR.v[2 * i + 97], blockR.v[2 * i + 112],
++ blockR.v[2 * i + 113]);
++ }
++
++ copy_block(next_block, &block_tmp);
++ xor_block(next_block, &blockR);
++}
++
++static void next_addresses(block *address_block, block *input_block,
++ const block *zero_block) {
++ input_block->v[6]++;
++ fill_block(zero_block, input_block, address_block, 0);
++ fill_block(zero_block, address_block, address_block, 0);
++}
++
++void fill_segment(const argon2_instance_t *instance,
++ argon2_position_t position) {
++ block *ref_block = NULL, *curr_block = NULL;
++ block address_block, input_block, zero_block;
++ grub_uint64_t pseudo_rand, ref_index, ref_lane;
++ grub_uint32_t prev_offset, curr_offset;
++ grub_uint32_t starting_index;
++ grub_uint32_t i;
++ int data_independent_addressing;
++
++ if (instance == NULL) {
++ return;
++ }
++
++ data_independent_addressing =
++ (instance->type == Argon2_i) ||
++ (instance->type == Argon2_id && (position.pass == 0) &&
++ (position.slice < ARGON2_SYNC_POINTS / 2));
++
++ if (data_independent_addressing) {
++ init_block_value(&zero_block, 0);
++ init_block_value(&input_block, 0);
++
++ input_block.v[0] = position.pass;
++ input_block.v[1] = position.lane;
++ input_block.v[2] = position.slice;
++ input_block.v[3] = instance->memory_blocks;
++ input_block.v[4] = instance->passes;
++ input_block.v[5] = instance->type;
++ }
++
++ starting_index = 0;
++
++ if ((0 == position.pass) && (0 == position.slice)) {
++ starting_index = 2; /* we have already generated the first two blocks */
++
++ /* Don't forget to generate the first block of addresses: */
++ if (data_independent_addressing) {
++ next_addresses(&address_block, &input_block, &zero_block);
++ }
++ }
++
++ /* Offset of the current block */
++ curr_offset = position.lane * instance->lane_length +
++ position.slice * instance->segment_length + starting_index;
++
++ if (0 == curr_offset % instance->lane_length) {
++ /* Last block in this lane */
++ prev_offset = curr_offset + instance->lane_length - 1;
++ } else {
++ /* Previous block */
++ prev_offset = curr_offset - 1;
++ }
++
++ for (i = starting_index; i < instance->segment_length;
++ ++i, ++curr_offset, ++prev_offset) {
++ /*1.1 Rotating prev_offset if needed */
++ if (curr_offset % instance->lane_length == 1) {
++ prev_offset = curr_offset - 1;
++ }
++
++ /* 1.2 Computing the index of the reference block */
++ /* 1.2.1 Taking pseudo-random value from the previous block */
++ if (data_independent_addressing) {
++ if (i % ARGON2_ADDRESSES_IN_BLOCK == 0) {
++ next_addresses(&address_block, &input_block, &zero_block);
++ }
++ pseudo_rand = address_block.v[i % ARGON2_ADDRESSES_IN_BLOCK];
++ } else {
++ pseudo_rand = instance->memory[prev_offset].v[0];
++ }
++
++ /* 1.2.2 Computing the lane of the reference block */
++ grub_divmod64 (pseudo_rand >> 32, instance->lanes, &ref_lane);
++
++ if ((position.pass == 0) && (position.slice == 0)) {
++ /* Can not reference other lanes yet */
++ ref_lane = position.lane;
++ }
++
++ /* 1.2.3 Computing the number of possible reference block within the
++ * lane.
++ */
++ position.index = i;
++ ref_index = index_alpha(instance, &position, pseudo_rand & 0xFFFFFFFF,
++ ref_lane == position.lane);
++
++ /* 2 Creating a new block */
++ ref_block =
++ instance->memory + instance->lane_length * ref_lane + ref_index;
++ curr_block = instance->memory + curr_offset;
++ if (ARGON2_VERSION_10 == instance->version) {
++ /* version 1.2.1 and earlier: overwrite, not XOR */
++ fill_block(instance->memory + prev_offset, ref_block, curr_block, 0);
++ } else {
++ if(0 == position.pass) {
++ fill_block(instance->memory + prev_offset, ref_block,
++ curr_block, 0);
++ } else {
++ fill_block(instance->memory + prev_offset, ref_block,
++ curr_block, 1);
++ }
++ }
++ }
++}
+--
+2.39.2
+
diff --git a/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch
new file mode 100644
index 00000000..98a69414
--- /dev/null
+++ b/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch
@@ -0,0 +1,58 @@
+From 916de62553b3bcc4a565e1ea8f562031fb2a7b0f Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 06/14] Error on missing Argon2id parameters
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ grub-core/disk/luks2.c | 13 ++++++++-----
+ 1 file changed, 8 insertions(+), 5 deletions(-)
+
+diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c
+index d5106402f..bc818ea69 100644
+--- a/grub-core/disk/luks2.c
++++ b/grub-core/disk/luks2.c
+@@ -38,6 +38,7 @@ GRUB_MOD_LICENSE ("GPLv3+");
+ enum grub_luks2_kdf_type
+ {
+ LUKS2_KDF_TYPE_ARGON2I,
++ LUKS2_KDF_TYPE_ARGON2ID,
+ LUKS2_KDF_TYPE_PBKDF2
+ };
+ typedef enum grub_luks2_kdf_type grub_luks2_kdf_type_t;
+@@ -90,7 +91,7 @@ struct grub_luks2_keyslot
+ grub_int64_t time;
+ grub_int64_t memory;
+ grub_int64_t cpus;
+- } argon2i;
++ } argon2;
+ struct
+ {
+ const char *hash;
+@@ -160,10 +161,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot)
+ return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing or invalid KDF");
+ else if (!grub_strcmp (type, "argon2i") || !grub_strcmp (type, "argon2id"))
+ {
+- out->kdf.type = LUKS2_KDF_TYPE_ARGON2I;
+- if (grub_json_getint64 (&out->kdf.u.argon2i.time, &kdf, "time") ||
+- grub_json_getint64 (&out->kdf.u.argon2i.memory, &kdf, "memory") ||
+- grub_json_getint64 (&out->kdf.u.argon2i.cpus, &kdf, "cpus"))
++ out->kdf.type = !grub_strcmp (type, "argon2i")
++ ? LUKS2_KDF_TYPE_ARGON2I : LUKS2_KDF_TYPE_ARGON2ID;
++ if (grub_json_getint64 (&out->kdf.u.argon2.time, &kdf, "time") ||
++ grub_json_getint64 (&out->kdf.u.argon2.memory, &kdf, "memory") ||
++ grub_json_getint64 (&out->kdf.u.argon2.cpus, &kdf, "cpus"))
+ return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing Argon2i parameters");
+ }
+ else if (!grub_strcmp (type, "pbkdf2"))
+@@ -459,6 +461,7 @@ luks2_decrypt_key (grub_uint8_t *out_key,
+ switch (k->kdf.type)
+ {
+ case LUKS2_KDF_TYPE_ARGON2I:
++ case LUKS2_KDF_TYPE_ARGON2ID:
+ ret = grub_error (GRUB_ERR_BAD_ARGUMENT, "Argon2 not supported");
+ goto err;
+ case LUKS2_KDF_TYPE_PBKDF2:
+--
+2.39.2
+
diff --git a/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch
new file mode 100644
index 00000000..487ab2a2
--- /dev/null
+++ b/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch
@@ -0,0 +1,83 @@
+From fa5deb59606422773ba8e77f3ab56226a10b116b Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 07/14] Compile with Argon2id support
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ Makefile.util.def | 6 +++++-
+ grub-core/Makefile.core.def | 2 +-
+ grub-core/disk/luks2.c | 13 +++++++++++--
+ 3 files changed, 17 insertions(+), 4 deletions(-)
+
+diff --git a/Makefile.util.def b/Makefile.util.def
+index 0f74a1680..5a15e5637 100644
+--- a/Makefile.util.def
++++ b/Makefile.util.def
+@@ -3,7 +3,7 @@ AutoGen definitions Makefile.tpl;
+ library = {
+ name = libgrubkern.a;
+ cflags = '$(CFLAGS_GNULIB)';
+- cppflags = '$(CPPFLAGS_GNULIB) -I$(srcdir)/grub-core/lib/json';
++ cppflags = '$(CPPFLAGS_GNULIB) -I$(srcdir)/grub-core/lib/json -I$(srcdir)/grub-core/lib/argon2';
+
+ common = util/misc.c;
+ common = grub-core/kern/command.c;
+@@ -36,6 +36,10 @@ library = {
+ common = grub-core/kern/misc.c;
+ common = grub-core/kern/partition.c;
+ common = grub-core/lib/crypto.c;
++ common = grub-core/lib/argon2/argon2.c;
++ common = grub-core/lib/argon2/core.c;
++ common = grub-core/lib/argon2/ref.c;
++ common = grub-core/lib/argon2/blake2/blake2b.c;
+ common = grub-core/lib/json/json.c;
+ common = grub-core/disk/luks.c;
+ common = grub-core/disk/luks2.c;
+diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
+index 452f11b20..5c1af8682 100644
+--- a/grub-core/Makefile.core.def
++++ b/grub-core/Makefile.core.def
+@@ -1242,7 +1242,7 @@ module = {
+ common = disk/luks2.c;
+ common = lib/gnulib/base64.c;
+ cflags = '$(CFLAGS_POSIX) $(CFLAGS_GNULIB)';
+- cppflags = '$(CPPFLAGS_POSIX) $(CPPFLAGS_GNULIB) -I$(srcdir)/lib/json';
++ cppflags = '$(CPPFLAGS_POSIX) $(CPPFLAGS_GNULIB) -I$(srcdir)/lib/json -I$(srcdir)/lib/argon2';
+ };
+
+ module = {
+diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c
+index bc818ea69..5b9eaa599 100644
+--- a/grub-core/disk/luks2.c
++++ b/grub-core/disk/luks2.c
+@@ -27,6 +27,7 @@
+ #include <grub/partition.h>
+ #include <grub/i18n.h>
+
++#include <argon2.h>
+ #include <base64.h>
+ #include <json.h>
+
+@@ -462,8 +463,16 @@ luks2_decrypt_key (grub_uint8_t *out_key,
+ {
+ case LUKS2_KDF_TYPE_ARGON2I:
+ case LUKS2_KDF_TYPE_ARGON2ID:
+- ret = grub_error (GRUB_ERR_BAD_ARGUMENT, "Argon2 not supported");
+- goto err;
++ ret = argon2_hash (k->kdf.u.argon2.time, k->kdf.u.argon2.memory, k->kdf.u.argon2.cpus,
++ passphrase, passphraselen, salt, saltlen, area_key, k->area.key_size,
++ k->kdf.type == LUKS2_KDF_TYPE_ARGON2I ? Argon2_i : Argon2_id,
++ ARGON2_VERSION_NUMBER);
++ if (ret)
++ {
++ grub_dprintf ("luks2", "Argon2 failed: %s\n", argon2_error_message (ret));
++ goto err;
++ }
++ break;
+ case LUKS2_KDF_TYPE_PBKDF2:
+ hash = grub_crypto_lookup_md_by_name (k->kdf.u.pbkdf2.hash);
+ if (!hash)
+--
+2.39.2
+
diff --git a/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch
new file mode 100644
index 00000000..327989fa
--- /dev/null
+++ b/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch
@@ -0,0 +1,26 @@
+From dad12fd3307bd15e55f5ea483f174a1d3eaa45f5 Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 08/14] Make grub-install work with Argon2
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ util/grub-install.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/util/grub-install.c b/util/grub-install.c
+index 7dc5657bb..cf7315891 100644
+--- a/util/grub-install.c
++++ b/util/grub-install.c
+@@ -448,6 +448,8 @@ probe_mods (grub_disk_t disk)
+ {
+ grub_util_cryptodisk_get_abstraction (disk,
+ push_cryptodisk_module, NULL);
++ /* HACK: always push argon2 */
++ grub_install_push_module ("argon2");
+ have_abstractions = 1;
+ have_cryptodisk = 1;
+ }
+--
+2.39.2
+
diff --git a/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
new file mode 100644
index 00000000..ddd3b85b
--- /dev/null
+++ b/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -0,0 +1,107 @@
+From 55d2ea1ebaa6b399736aa24393e08d007fde988c Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Mon, 30 Oct 2023 22:19:21 +0000
+Subject: [PATCH 09/14] at_keyboard coreboot: force scancodes2+translate
+
+Scan code set 2 with translation should be assumed in
+every case, as the default starting position.
+
+However, GRUB is trying to detect and use other modes
+such as set 2 without translation, or set 1 without
+translation from set 2; it also detects no-mode and
+assumes mode 1, on really old keyboards.
+
+The current behaviour has been retained, for everything
+except GRUB_MACHINE_COREBOOT; for the latter, scan code
+set 2 with translation is hardcoded, and forced in code.
+
+This is required to make keyboard initialisation work on
+the MEC5035 EC used by the Dell Latitude E6400, when
+running GRUB as a coreboot payload on that laptop. The
+EC reports scancode set 2 with translation when probed,
+but actually only outputs scancode set 1.
+
+Since GRUB is attempting to use it without translation,
+and since the machine reports set 2 with translation,
+but only ever outputs set 1 scancodes, this results in
+wrong keypresses for every key.
+
+This fix fixed that, by forcing set 2 with translation,
+treating it as set 1, but only on coreboot. This is the
+same behaviour used in GNU+Linux systems and SeaBIOS.
+With this change, GRUB keyboard initialisation now works
+just fine on those machines.
+
+This has *also* been tested on other coreboot machines
+running GRUB; several HP EliteBooks, ThinkPads and
+Dell Precision T1650. All seems to work just fine.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/term/at_keyboard.c | 20 ++++++++++++++++++--
+ 1 file changed, 18 insertions(+), 2 deletions(-)
+
+diff --git a/grub-core/term/at_keyboard.c b/grub-core/term/at_keyboard.c
+index f8a129eb7..8207225c2 100644
+--- a/grub-core/term/at_keyboard.c
++++ b/grub-core/term/at_keyboard.c
+@@ -138,6 +138,7 @@ write_mode (int mode)
+ return (i != GRUB_AT_TRIES);
+ }
+
++#if !defined (GRUB_MACHINE_COREBOOT)
+ static int
+ query_mode (void)
+ {
+@@ -161,10 +162,12 @@ query_mode (void)
+ return 3;
+ return 0;
+ }
++#endif
+
+ static void
+ set_scancodes (void)
+ {
++#if !defined (GRUB_MACHINE_COREBOOT)
+ /* You must have visited computer museum. Keyboard without scancode set
+ knowledge. Assume XT. */
+ if (!grub_keyboard_orig_set)
+@@ -173,20 +176,33 @@ set_scancodes (void)
+ ps2_state.current_set = 1;
+ return;
+ }
++#endif
+
+ #if !USE_SCANCODE_SET
+ ps2_state.current_set = 1;
+ return;
+-#else
++#endif
+
++#if defined (GRUB_MACHINE_COREBOOT)
++ /* enable translation */
++ grub_keyboard_controller_write (grub_keyboard_controller_orig
++ & ~KEYBOARD_AT_DISABLE);
++#else
++ /* if not coreboot, disable translation and try mode 2 first, before 1 */
+ grub_keyboard_controller_write (grub_keyboard_controller_orig
+ & ~KEYBOARD_AT_TRANSLATE
+ & ~KEYBOARD_AT_DISABLE);
++#endif
+
+ keyboard_controller_wait_until_ready ();
+ grub_outb (KEYBOARD_COMMAND_ENABLE, KEYBOARD_REG_DATA);
+-
+ write_mode (2);
++
++#if defined (GRUB_MACHINE_COREBOOT)
++ /* mode 2 with translation, so make grub treat as set 1 */
++ ps2_state.current_set = 1;
++#else
++ /* if not coreboot, translation isn't set; test 2 and fall back to 1 */
+ ps2_state.current_set = query_mode ();
+ grub_dprintf ("atkeyb", "returned set %d\n", ps2_state.current_set);
+ if (ps2_state.current_set == 2)
+--
+2.39.2
+
diff --git a/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
new file mode 100644
index 00000000..ed3c1f4a
--- /dev/null
+++ b/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
@@ -0,0 +1,38 @@
+From 4e89b0da7213b710bfb4d95a20e34b193f39e58c Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 31 Oct 2023 10:33:28 +0000
+Subject: [PATCH 10/14] keylayouts: don't print "Unknown key" message
+
+on keyboards with stuck keys, this results in GRUB just
+spewing it repeatedly, preventing use of GRUB.
+
+in such cases, it's still possible to use the keyboard,
+and we should let the user at least boot.
+
+it often appears when people plug in faulty usb keyboards,
+but can appear for laptop keyboards too; one of my e6400
+has stuck keys.
+
+with this patch, grub should be a bit more reliable in
+terms of user experience, when the keyboard is faulty.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/commands/keylayouts.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/grub-core/commands/keylayouts.c b/grub-core/commands/keylayouts.c
+index aa3ba34f2..445fa0601 100644
+--- a/grub-core/commands/keylayouts.c
++++ b/grub-core/commands/keylayouts.c
+@@ -174,7 +174,6 @@ grub_term_map_key (grub_keyboard_key_t code, int status)
+ key = map_key_core (code, status, &alt_gr_consumed);
+
+ if (key == 0 || key == GRUB_TERM_SHIFT) {
+- grub_printf ("Unknown key 0x%x detected\n", code);
+ return GRUB_TERM_NO_KEY;
+ }
+
+--
+2.39.2
+
diff --git a/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
new file mode 100644
index 00000000..77cb7a64
--- /dev/null
+++ b/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -0,0 +1,102 @@
+From d14c9af2656ee6b63b029ac28816f38d4ae26946 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 16:14:58 +0000
+Subject: [PATCH 11/14] don't print missing prefix errors on the screen
+
+we do actually set the prefix. this patch modifies
+grub to still set grub_errno and return accordingly,
+so the behaviour is otherwise identical, but it will
+no longer print a warning message on the screen.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/commands/keylayouts.c | 2 +-
+ grub-core/commands/loadenv.c | 2 +-
+ grub-core/commands/nativedisk.c | 2 +-
+ grub-core/efiemu/main.c | 3 +--
+ grub-core/font/font.c | 2 +-
+ grub-core/kern/dl.c | 2 +-
+ 6 files changed, 6 insertions(+), 7 deletions(-)
+
+diff --git a/grub-core/commands/keylayouts.c b/grub-core/commands/keylayouts.c
+index 445fa0601..00bcf7025 100644
+--- a/grub-core/commands/keylayouts.c
++++ b/grub-core/commands/keylayouts.c
+@@ -211,7 +211,7 @@ grub_cmd_keymap (struct grub_command *cmd __attribute__ ((unused)),
+ {
+ const char *prefix = grub_env_get ("prefix");
+ if (!prefix)
+- return grub_error (GRUB_ERR_BAD_ARGUMENT, N_("variable `%s' isn't set"), "prefix");
++ return (grub_errno = GRUB_ERR_BAD_ARGUMENT);
+ filename = grub_xasprintf ("%s/layouts/%s.gkb", prefix, argv[0]);
+ if (!filename)
+ return grub_errno;
+diff --git a/grub-core/commands/loadenv.c b/grub-core/commands/loadenv.c
+index 166445849..699b39bfa 100644
+--- a/grub-core/commands/loadenv.c
++++ b/grub-core/commands/loadenv.c
+@@ -58,7 +58,7 @@ open_envblk_file (char *filename,
+ prefix = grub_env_get ("prefix");
+ if (! prefix)
+ {
+- grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++ grub_errno = GRUB_ERR_FILE_NOT_FOUND;
+ return 0;
+ }
+
+diff --git a/grub-core/commands/nativedisk.c b/grub-core/commands/nativedisk.c
+index 580c8d3b0..6806bff9c 100644
+--- a/grub-core/commands/nativedisk.c
++++ b/grub-core/commands/nativedisk.c
+@@ -186,7 +186,7 @@ grub_cmd_nativedisk (grub_command_t cmd __attribute__ ((unused)),
+ prefix = grub_env_get ("prefix");
+
+ if (! prefix)
+- return grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++ return (grub_errno = GRUB_ERR_FILE_NOT_FOUND);
+
+ if (prefix)
+ path_prefix = (prefix[0] == '(') ? grub_strchr (prefix, ')') : NULL;
+diff --git a/grub-core/efiemu/main.c b/grub-core/efiemu/main.c
+index e7037f4ed..e5d4dbff1 100644
+--- a/grub-core/efiemu/main.c
++++ b/grub-core/efiemu/main.c
+@@ -231,8 +231,7 @@ grub_efiemu_autocore (void)
+ prefix = grub_env_get ("prefix");
+
+ if (! prefix)
+- return grub_error (GRUB_ERR_FILE_NOT_FOUND,
+- N_("variable `%s' isn't set"), "prefix");
++ return (grub_errno = GRUB_ERR_FILE_NOT_FOUND);
+
+ suffix = grub_efiemu_get_default_core_name ();
+
+diff --git a/grub-core/font/font.c b/grub-core/font/font.c
+index 18de52562..2a0fea6c8 100644
+--- a/grub-core/font/font.c
++++ b/grub-core/font/font.c
+@@ -461,7 +461,7 @@ grub_font_load (const char *filename)
+
+ if (!prefix)
+ {
+- grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++ grub_errno = GRUB_ERR_FILE_NOT_FOUND;
+ goto fail;
+ }
+ file = try_open_from_prefix (prefix, filename);
+diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
+index 4011e2d15..af3bd00d0 100644
+--- a/grub-core/kern/dl.c
++++ b/grub-core/kern/dl.c
+@@ -758,7 +758,7 @@ grub_dl_load (const char *name)
+ return 0;
+
+ if (! grub_dl_dir) {
+- grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++ grub_errno = GRUB_ERR_FILE_NOT_FOUND;
+ return 0;
+ }
+
+--
+2.39.2
+
diff --git a/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch
new file mode 100644
index 00000000..ada8288e
--- /dev/null
+++ b/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch
@@ -0,0 +1,34 @@
+From d58c6298f62e70084a14aabc6c46b31d61f28152 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 16:36:22 +0000
+Subject: [PATCH 12/14] don't print error if module not found
+
+still set grub_errno accordingly, and otherwise
+behave the same. in libreboot, we remove a lot of
+modules but then rely on loading a grub.cfg
+provided by a distro; in almost all cases that works,
+but also in almost all cases, that will try to load
+a module we don't actually need, but then it prints
+a message. this can annoy some users, so silence it.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/kern/dl.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
+index af3bd00d0..21d0cedb1 100644
+--- a/grub-core/kern/dl.c
++++ b/grub-core/kern/dl.c
+@@ -486,7 +486,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e)
+
+ s = grub_dl_find_section (e, ".modname");
+ if (!s)
+- return grub_error (GRUB_ERR_BAD_MODULE, "no module name found");
++ return (grub_errno = GRUB_ERR_BAD_MODULE);
+
+ mod->name = grub_strdup ((char *) e + s->sh_offset);
+ if (! mod->name)
+--
+2.39.2
+
diff --git a/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch
new file mode 100644
index 00000000..f89977b4
--- /dev/null
+++ b/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch
@@ -0,0 +1,31 @@
+From 031ee85c97452f6d1a5f341ff41c65aace5584c4 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 17:25:20 +0000
+Subject: [PATCH 13/14] don't print empty error messages
+
+this is part two of the quest to kill the prefix
+error message. after i disabled prefix-related
+messages, it still printed "error: ." on screen.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/kern/err.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/grub-core/kern/err.c b/grub-core/kern/err.c
+index 53c734de7..7cac53983 100644
+--- a/grub-core/kern/err.c
++++ b/grub-core/kern/err.c
+@@ -107,7 +107,8 @@ grub_print_error (void)
+ {
+ if (grub_errno != GRUB_ERR_NONE)
+ {
+- grub_err_printf (_("error: %s.\n"), grub_errmsg);
++ if (grub_strlen(grub_errmsg) > 0)
++ grub_err_printf (_("error: %s.\n"), grub_errmsg);
+ grub_err_printed_errors++;
+ }
+ }
+--
+2.39.2
+
diff --git a/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch
new file mode 100644
index 00000000..bfe28efd
--- /dev/null
+++ b/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch
@@ -0,0 +1,1074 @@
+From 246a626a369fc3730c6b5c21982fd89ed19c6fe0 Mon Sep 17 00:00:00 2001
+From: Mate Kukri <km@mkukri.xyz>
+Date: Mon, 20 May 2024 11:43:35 +0100
+Subject: [PATCH 14/14] Add native NVMe driver based on SeaBIOS
+
+Tested to successfully boot Debian on QEMU and OptiPlex 3050.
+
+Signed-off-by: Mate Kukri <km@mkukri.xyz>
+---
+ Makefile.am | 2 +-
+ grub-core/Makefile.core.def | 6 +
+ grub-core/commands/nativedisk.c | 1 +
+ grub-core/disk/nvme-int.h | 208 +++++++++
+ grub-core/disk/nvme.c | 781 ++++++++++++++++++++++++++++++++
+ include/grub/disk.h | 1 +
+ 6 files changed, 998 insertions(+), 1 deletion(-)
+ create mode 100644 grub-core/disk/nvme-int.h
+ create mode 100644 grub-core/disk/nvme.c
+
+diff --git a/Makefile.am b/Makefile.am
+index 43635d5ff..2c86dbbf6 100644
+--- a/Makefile.am
++++ b/Makefile.am
+@@ -434,7 +434,7 @@ if COND_i386_coreboot
+ FS_PAYLOAD_MODULES ?= $(shell cat grub-core/fs.lst)
+ default_payload.elf: grub-mkstandalone grub-mkimage FORCE
+ test -f $@ && rm $@ || true
+- pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
++ pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata nvme ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
+ endif
+
+ endif
+diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
+index 5c1af8682..02967d3ff 100644
+--- a/grub-core/Makefile.core.def
++++ b/grub-core/Makefile.core.def
+@@ -2614,3 +2614,9 @@ module = {
+ enable = efi;
+ depends = part_gpt;
+ };
++
++module = {
++ name = nvme;
++ common = disk/nvme.c;
++ enable = pci;
++};
+diff --git a/grub-core/commands/nativedisk.c b/grub-core/commands/nativedisk.c
+index 6806bff9c..fd68a513e 100644
+--- a/grub-core/commands/nativedisk.c
++++ b/grub-core/commands/nativedisk.c
+@@ -78,6 +78,7 @@ get_uuid (const char *name, char **uuid, int getnative)
+ case GRUB_DISK_DEVICE_ATA_ID:
+ case GRUB_DISK_DEVICE_SCSI_ID:
+ case GRUB_DISK_DEVICE_XEN:
++ case GRUB_DISK_DEVICE_NVME_ID:
+ if (getnative)
+ break;
+ /* FALLTHROUGH */
+diff --git a/grub-core/disk/nvme-int.h b/grub-core/disk/nvme-int.h
+new file mode 100644
+index 000000000..1295b58aa
+--- /dev/null
++++ b/grub-core/disk/nvme-int.h
+@@ -0,0 +1,208 @@
++// NVMe datastructures and constants
++//
++// Copyright 2017 Amazon.com, Inc. or its affiliates.
++//
++// This file may be distributed under the terms of the GNU LGPLv3 license.
++
++#ifndef __NVME_INT_H
++#define __NVME_INT_H
++
++#include <grub/types.h>
++
++/* Data structures */
++
++/* The register file of a NVMe host controller. This struct follows the naming
++ scheme in the NVMe specification. */
++struct nvme_reg {
++ grub_uint64_t cap; /* controller capabilities */
++ grub_uint32_t vs; /* version */
++ grub_uint32_t intms; /* interrupt mask set */
++ grub_uint32_t intmc; /* interrupt mask clear */
++ grub_uint32_t cc; /* controller configuration */
++ grub_uint32_t _res0;
++ grub_uint32_t csts; /* controller status */
++ grub_uint32_t _res1;
++ grub_uint32_t aqa; /* admin queue attributes */
++ grub_uint64_t asq; /* admin submission queue base address */
++ grub_uint64_t acq; /* admin completion queue base address */
++};
++
++/* Submission queue entry */
++struct nvme_sqe {
++ union {
++ grub_uint32_t dword[16];
++ struct {
++ grub_uint32_t cdw0; /* Command DWORD 0 */
++ grub_uint32_t nsid; /* Namespace ID */
++ grub_uint64_t _res0;
++ grub_uint64_t mptr; /* metadata ptr */
++
++ grub_uint64_t dptr_prp1;
++ grub_uint64_t dptr_prp2;
++ };
++ };
++};
++
++/* Completion queue entry */
++struct nvme_cqe {
++ union {
++ grub_uint32_t dword[4];
++ struct {
++ grub_uint32_t cdw0;
++ grub_uint32_t _res0;
++ grub_uint16_t sq_head;
++ grub_uint16_t sq_id;
++ grub_uint16_t cid;
++ grub_uint16_t status;
++ };
++ };
++};
++
++/* The common part of every submission or completion queue. */
++struct nvme_queue {
++ grub_uint32_t *dbl; /* doorbell */
++ grub_uint16_t mask; /* length - 1 */
++};
++
++struct nvme_cq {
++ struct nvme_queue common;
++ struct nvme_cqe *cqe;
++
++ /* We have read upto (but not including) this entry in the queue. */
++ grub_uint16_t head;
++
++ /* The current phase bit the controller uses to indicate that it has written
++ a new entry. This is inverted after each wrap. */
++ unsigned phase : 1;
++};
++
++struct nvme_sq {
++ struct nvme_queue common;
++ struct nvme_sqe *sqe;
++
++ /* Corresponding completion queue. We only support a single SQ per CQ. */
++ struct nvme_cq *cq;
++
++ /* The last entry the controller has fetched. */
++ grub_uint16_t head;
++
++ /* The last value we have written to the tail doorbell. */
++ grub_uint16_t tail;
++};
++
++struct nvme_ctrl {
++ grub_pci_device_t pci;
++ struct nvme_reg volatile *reg;
++
++ grub_uint32_t ctrlnum;
++
++ grub_uint32_t doorbell_stride; /* in bytes */
++
++ struct nvme_sq admin_sq;
++ struct nvme_cq admin_cq;
++
++ grub_uint32_t ns_count;
++
++ struct nvme_sq io_sq;
++ struct nvme_cq io_cq;
++};
++
++struct nvme_namespace {
++ struct nvme_namespace *next;
++ struct nvme_namespace **prev;
++
++ char *devname;
++
++ grub_uint32_t nsnum;
++
++ struct nvme_ctrl *ctrl;
++
++ grub_uint32_t ns_id;
++
++ grub_uint64_t lba_count; /* The total amount of sectors. */
++
++ grub_uint32_t block_size;
++ grub_uint32_t metadata_size;
++ grub_uint32_t max_req_size;
++};
++
++/* Data structures for NVMe admin identify commands */
++
++struct nvme_identify_ctrl {
++ grub_uint16_t vid;
++ grub_uint16_t ssvid;
++ char sn[20];
++ char mn[40];
++ char fr[8];
++
++ grub_uint8_t rab;
++ grub_uint8_t ieee[3];
++ grub_uint8_t cmic;
++ grub_uint8_t mdts;
++
++ char _boring[516 - 78];
++
++ grub_uint32_t nn; /* number of namespaces */
++};
++
++struct nvme_identify_ns_list {
++ grub_uint32_t ns_id[1024];
++};
++
++struct nvme_lba_format {
++ grub_uint16_t ms;
++ grub_uint8_t lbads;
++ grub_uint8_t rp;
++};
++
++struct nvme_identify_ns {
++ grub_uint64_t nsze;
++ grub_uint64_t ncap;
++ grub_uint64_t nuse;
++ grub_uint8_t nsfeat;
++ grub_uint8_t nlbaf;
++ grub_uint8_t flbas;
++
++ char _boring[128 - 27];
++
++ struct nvme_lba_format lbaf[16];
++};
++
++union nvme_identify {
++ struct nvme_identify_ns ns;
++ struct nvme_identify_ctrl ctrl;
++ struct nvme_identify_ns_list ns_list;
++};
++
++/* NVMe constants */
++
++#define NVME_CAP_CSS_NVME (1ULL << 37)
++
++#define NVME_CSTS_FATAL (1U << 1)
++#define NVME_CSTS_RDY (1U << 0)
++
++#define NVME_CC_EN (1U << 0)
++
++#define NVME_SQE_OPC_ADMIN_CREATE_IO_SQ 1U
++#define NVME_SQE_OPC_ADMIN_CREATE_IO_CQ 5U
++#define NVME_SQE_OPC_ADMIN_IDENTIFY 6U
++
++#define NVME_SQE_OPC_IO_WRITE 1U
++#define NVME_SQE_OPC_IO_READ 2U
++
++#define NVME_ADMIN_IDENTIFY_CNS_ID_NS 0U
++#define NVME_ADMIN_IDENTIFY_CNS_ID_CTRL 1U
++#define NVME_ADMIN_IDENTIFY_CNS_GET_NS_LIST 2U
++
++#define NVME_CQE_DW3_P (1U << 16)
++
++#define NVME_PAGE_SIZE 4096
++#define NVME_PAGE_MASK ~(NVME_PAGE_SIZE - 1)
++
++/* Length for the queue entries. */
++#define NVME_SQE_SIZE_LOG 6
++#define NVME_CQE_SIZE_LOG 4
++
++#endif
++
++/* EOF */
+diff --git a/grub-core/disk/nvme.c b/grub-core/disk/nvme.c
+new file mode 100644
+index 000000000..093237c70
+--- /dev/null
++++ b/grub-core/disk/nvme.c
+@@ -0,0 +1,781 @@
++// Low level NVMe disk access
++//
++// Based on SeaBIOS NVMe driver - Copyright 2017 Amazon.com, Inc. or its affiliates.
++// Port to GRUB2 done by Mate Kukri
++//
++// This file may be distributed under the terms of the GNU LGPLv3 license.
++
++#include <grub/disk.h>
++#include <grub/dl.h>
++#include <grub/pci.h>
++#include "nvme-int.h"
++
++GRUB_MOD_LICENSE ("GPLv3"); /* LGPLv3 in reality but it is GPLv3 compatible */
++
++static grub_uint32_t grub_nvme_ctrlcnt;
++static grub_uint32_t grub_nvme_nscnt;
++
++static struct nvme_namespace *grub_nvme_namespaces;
++
++// Page aligned "dma bounce buffer" of size NVME_PAGE_SIZE
++static void *nvme_dma_buffer;
++
++static void *
++zalloc_page_aligned(grub_uint32_t size)
++{
++ void *res = grub_memalign(NVME_PAGE_SIZE, size);
++ if (res) grub_memset(res, 0, size);
++ return res;
++}
++
++static void
++nvme_init_queue_common(struct nvme_ctrl *ctrl, struct nvme_queue *q, grub_uint16_t q_idx,
++ grub_uint16_t length)
++{
++ grub_memset(q, 0, sizeof(*q));
++ q->dbl = (grub_uint32_t *)((char *)ctrl->reg + 0x1000 + q_idx * ctrl->doorbell_stride);
++ grub_dprintf("nvme", " q %p q_idx %u dbl %p\n", q, q_idx, q->dbl);
++ q->mask = length - 1;
++}
++
++static int
++nvme_init_sq(struct nvme_ctrl *ctrl, struct nvme_sq *sq, grub_uint16_t q_idx, grub_uint16_t length,
++ struct nvme_cq *cq)
++{
++ nvme_init_queue_common(ctrl, &sq->common, q_idx, length);
++ sq->sqe = zalloc_page_aligned(sizeof(*sq->sqe) * length);
++
++ if (!sq->sqe) {
++ return -1;
++ }
++
++ grub_dprintf("nvme", "sq %p q_idx %u sqe %p\n", sq, q_idx, sq->sqe);
++ sq->cq = cq;
++ sq->head = 0;
++ sq->tail = 0;
++
++ return 0;
++}
++
++static int
++nvme_init_cq(struct nvme_ctrl *ctrl, struct nvme_cq *cq, grub_uint16_t q_idx, grub_uint16_t length)
++{
++ nvme_init_queue_common(ctrl, &cq->common, q_idx, length);
++ cq->cqe = zalloc_page_aligned(sizeof(*cq->cqe) * length);
++ if (!cq->cqe) {
++ return -1;
++ }
++
++ cq->head = 0;
++
++ /* All CQE phase bits are initialized to zero. This means initially we wait
++ for the host controller to set these to 1. */
++ cq->phase = 1;
++
++ return 0;
++}
++
++static int
++nvme_poll_cq(struct nvme_cq *cq)
++{
++ grub_uint32_t dw3 = *(volatile grub_uint32_t *) &cq->cqe[cq->head].dword[3];
++ return (!!(dw3 & NVME_CQE_DW3_P) == cq->phase);
++}
++
++static int
++nvme_is_cqe_success(struct nvme_cqe const *cqe)
++{
++ return ((cqe->status >> 1) & 0xFF) == 0;
++}
++
++static struct nvme_cqe
++nvme_error_cqe(void)
++{
++ struct nvme_cqe r;
++
++ /* 0xFF is a vendor specific status code != success. Should be okay for
++ indicating failure. */
++ grub_memset(&r, 0xFF, sizeof(r));
++ return r;
++}
++
++static struct nvme_cqe
++nvme_consume_cqe(struct nvme_sq *sq)
++{
++ struct nvme_cq *cq = sq->cq;
++
++ if (!nvme_poll_cq(cq)) {
++ /* Cannot consume a completion queue entry, if there is none ready. */
++ return nvme_error_cqe();
++ }
++
++ struct nvme_cqe *cqe = &cq->cqe[cq->head];
++ grub_uint16_t cq_next_head = (cq->head + 1) & cq->common.mask;
++ grub_dprintf("nvme", "cq %p head %u -> %u\n", cq, cq->head, cq_next_head);
++ if (cq_next_head < cq->head) {
++ grub_dprintf("nvme", "cq %p wrap\n", cq);
++ cq->phase = ~cq->phase;
++ }
++ cq->head = cq_next_head;
++
++ /* Update the submission queue head. */
++ if (cqe->sq_head != sq->head) {
++ sq->head = cqe->sq_head;
++ grub_dprintf("nvme", "sq %p advanced to %u\n", sq, cqe->sq_head);
++ }
++
++ /* Tell the controller that we consumed the completion. */
++ *(volatile grub_uint32_t *) cq->common.dbl = cq->head;
++
++ return *cqe;
++}
++
++static struct nvme_cqe
++nvme_wait(struct nvme_sq *sq)
++{
++ // static const unsigned nvme_timeout = 5000 /* ms */;
++ // grub_uint32_t to = timer_calc(nvme_timeout);
++ while (!nvme_poll_cq(sq->cq)) {
++ /* FIXME
++ yield();
++
++ if (timer_check(to)) {
++ warn_timeout();
++ return nvme_error_cqe();
++ }*/
++ }
++
++ return nvme_consume_cqe(sq);
++}
++
++/* Returns the next submission queue entry (or NULL if the queue is full). It
++ also fills out Command Dword 0 and clears the rest. */
++static struct nvme_sqe *
++nvme_get_next_sqe(struct nvme_sq *sq, grub_uint8_t opc, void *metadata, void *data, void *data2)
++{
++ if (((sq->head + 1) & sq->common.mask) == sq->tail) {
++ grub_dprintf("nvme", "submission queue is full\n");
++ return NULL;
++ }
++
++ struct nvme_sqe *sqe = &sq->sqe[sq->tail];
++ grub_dprintf("nvme", "sq %p next_sqe %u\n", sq, sq->tail);
++
++ grub_memset(sqe, 0, sizeof(*sqe));
++ sqe->cdw0 = opc | (sq->tail << 16 /* CID */);
++ sqe->mptr = (grub_uint32_t)metadata;
++ sqe->dptr_prp1 = (grub_uint32_t)data;
++ sqe->dptr_prp2 = (grub_uint32_t)data2;
++
++ return sqe;
++}
++
++/* Call this after you've filled out an sqe that you've got from nvme_get_next_sqe. */
++static void
++nvme_commit_sqe(struct nvme_sq *sq)
++{
++ grub_dprintf("nvme", "sq %p commit_sqe %u\n", sq, sq->tail);
++ sq->tail = (sq->tail + 1) & sq->common.mask;
++ *(volatile grub_uint32_t *) sq->common.dbl = sq->tail;
++}
++
++/* Perform an identify command on the admin queue and return the resulting
++ buffer. This may be a NULL pointer, if something failed. This function
++ cannot be used after initialization, because it uses buffers in tmp zone. */
++static union nvme_identify *
++nvme_admin_identify(struct nvme_ctrl *ctrl, grub_uint8_t cns, grub_uint32_t nsid)
++{
++ union nvme_identify *identify_buf = zalloc_page_aligned(4096);
++ if (!identify_buf)
++ return NULL;
++
++ struct nvme_sqe *cmd_identify;
++ cmd_identify = nvme_get_next_sqe(&ctrl->admin_sq,
++ NVME_SQE_OPC_ADMIN_IDENTIFY, NULL,
++ identify_buf, NULL);
++ if (!cmd_identify)
++ goto error;
++
++ cmd_identify->nsid = nsid;
++ cmd_identify->dword[10] = cns;
++
++ nvme_commit_sqe(&ctrl->admin_sq);
++
++ struct nvme_cqe cqe = nvme_wait(&ctrl->admin_sq);
++
++ if (!nvme_is_cqe_success(&cqe)) {
++ goto error;
++ }
++
++ return identify_buf;
++ error:
++ grub_free(identify_buf);
++ return NULL;
++}
++
++static struct nvme_identify_ctrl *
++nvme_admin_identify_ctrl(struct nvme_ctrl *ctrl)
++{
++ return &nvme_admin_identify(ctrl, NVME_ADMIN_IDENTIFY_CNS_ID_CTRL, 0)->ctrl;
++}
++
++static struct nvme_identify_ns *
++nvme_admin_identify_ns(struct nvme_ctrl *ctrl, grub_uint32_t ns_id)
++{
++ return &nvme_admin_identify(ctrl, NVME_ADMIN_IDENTIFY_CNS_ID_NS,
++ ns_id)->ns;
++}
++
++static void
++nvme_probe_ns(struct nvme_ctrl *ctrl, grub_uint32_t ns_idx, grub_uint8_t mdts)
++{
++ grub_uint32_t ns_id = ns_idx + 1;
++
++ struct nvme_identify_ns *id = nvme_admin_identify_ns(ctrl, ns_id);
++ if (!id) {
++ grub_dprintf("nvme", "NVMe couldn't identify namespace %u.\n", ns_id);
++ goto free_buffer;
++ }
++
++ grub_uint8_t current_lba_format = id->flbas & 0xF;
++ if (current_lba_format > id->nlbaf) {
++ grub_dprintf("nvme", "NVMe NS %u: current LBA format %u is beyond what the "
++ " namespace supports (%u)?\n",
++ ns_id, current_lba_format, id->nlbaf + 1);
++ goto free_buffer;
++ }
++
++ if (!id->nsze) {
++ grub_dprintf("nvme", "NVMe NS %u is inactive.\n", ns_id);
++ goto free_buffer;
++ }
++
++ if (!nvme_dma_buffer) {
++ nvme_dma_buffer = zalloc_page_aligned(NVME_PAGE_SIZE);
++ if (!nvme_dma_buffer) {
++ goto free_buffer;
++ }
++ }
++
++ struct nvme_namespace *ns = grub_malloc(sizeof(*ns));
++ if (!ns) {
++ goto free_buffer;
++ }
++ grub_memset(ns, 0, sizeof(*ns));
++ ns->ctrl = ctrl;
++ ns->ns_id = ns_id;
++ ns->lba_count = id->nsze;
++
++ struct nvme_lba_format *fmt = &id->lbaf[current_lba_format];
++
++ ns->block_size = 1U << fmt->lbads;
++ ns->metadata_size = fmt->ms;
++
++ if (ns->block_size > NVME_PAGE_SIZE) {
++ /* If we see devices that trigger this path, we need to increase our
++ buffer size. */
++ grub_free(ns);
++ goto free_buffer;
++ }
++
++ if (mdts) {
++ ns->max_req_size = ((1U << mdts) * NVME_PAGE_SIZE) / ns->block_size;
++ grub_dprintf("nvme", "NVME NS %u max request size: %d sectors\n",
++ ns_id, ns->max_req_size);
++ } else {
++ ns->max_req_size = -1U;
++ }
++
++ ns->devname = grub_xasprintf("nvme%un%u", ctrl->ctrlnum, ns_id);
++ ns->nsnum = grub_nvme_nscnt++;
++
++ grub_list_push (GRUB_AS_LIST_P (&grub_nvme_namespaces), GRUB_AS_LIST (ns));
++
++free_buffer:
++ grub_free(id);
++}
++
++
++/* Release memory allocated for a completion queue */
++static void
++nvme_destroy_cq(struct nvme_cq *cq)
++{
++ grub_free(cq->cqe);
++ cq->cqe = NULL;
++}
++
++/* Release memory allocated for a submission queue */
++static void
++nvme_destroy_sq(struct nvme_sq *sq)
++{
++ grub_free(sq->sqe);
++ sq->sqe = NULL;
++}
++
++/* Returns 0 on success. */
++static int
++nvme_create_io_cq(struct nvme_ctrl *ctrl, struct nvme_cq *cq, grub_uint16_t q_idx)
++{
++ int rc;
++ struct nvme_sqe *cmd_create_cq;
++ grub_uint32_t length = 1 + (ctrl->reg->cap & 0xffff);
++ if (length > NVME_PAGE_SIZE / sizeof(struct nvme_cqe))
++ length = NVME_PAGE_SIZE / sizeof(struct nvme_cqe);
++
++ rc = nvme_init_cq(ctrl, cq, q_idx, length);
++ if (rc) {
++ goto err;
++ }
++
++ cmd_create_cq = nvme_get_next_sqe(&ctrl->admin_sq,
++ NVME_SQE_OPC_ADMIN_CREATE_IO_CQ, NULL,
++ cq->cqe, NULL);
++ if (!cmd_create_cq) {
++ goto err_destroy_cq;
++ }
++
++ cmd_create_cq->dword[10] = (cq->common.mask << 16) | (q_idx >> 1);
++ cmd_create_cq->dword[11] = 1 /* physically contiguous */;
++
++ nvme_commit_sqe(&ctrl->admin_sq);
++
++ struct nvme_cqe cqe = nvme_wait(&ctrl->admin_sq);
++
++ if (!nvme_is_cqe_success(&cqe)) {
++ grub_dprintf("nvme", "create io cq failed: %08x %08x %08x %08x\n",
++ cqe.dword[0], cqe.dword[1], cqe.dword[2], cqe.dword[3]);
++
++ goto err_destroy_cq;
++ }
++
++ return 0;
++
++err_destroy_cq:
++ nvme_destroy_cq(cq);
++err:
++ return -1;
++}
++
++/* Returns 0 on success. */
++static int
++nvme_create_io_sq(struct nvme_ctrl *ctrl, struct nvme_sq *sq, grub_uint16_t q_idx, struct nvme_cq *cq)
++{
++ int rc;
++ struct nvme_sqe *cmd_create_sq;
++ grub_uint32_t length = 1 + (ctrl->reg->cap & 0xffff);
++ if (length > NVME_PAGE_SIZE / sizeof(struct nvme_cqe))
++ length = NVME_PAGE_SIZE / sizeof(struct nvme_cqe);
++
++ rc = nvme_init_sq(ctrl, sq, q_idx, length, cq);
++ if (rc) {
++ goto err;
++ }
++
++ cmd_create_sq = nvme_get_next_sqe(&ctrl->admin_sq,
++ NVME_SQE_OPC_ADMIN_CREATE_IO_SQ, NULL,
++ sq->sqe, NULL);
++ if (!cmd_create_sq) {
++ goto err_destroy_sq;
++ }
++
++ cmd_create_sq->dword[10] = (sq->common.mask << 16) | (q_idx >> 1);
++ cmd_create_sq->dword[11] = (q_idx >> 1) << 16 | 1 /* contiguous */;
++ grub_dprintf("nvme", "sq %p create dword10 %08x dword11 %08x\n", sq,
++ cmd_create_sq->dword[10], cmd_create_sq->dword[11]);
++
++ nvme_commit_sqe(&ctrl->admin_sq);
++
++ struct nvme_cqe cqe = nvme_wait(&ctrl->admin_sq);
++
++ if (!nvme_is_cqe_success(&cqe)) {
++ grub_dprintf("nvme", "create io sq failed: %08x %08x %08x %08x\n",
++ cqe.dword[0], cqe.dword[1], cqe.dword[2], cqe.dword[3]);
++ goto err_destroy_sq;
++ }
++
++ return 0;
++
++err_destroy_sq:
++ nvme_destroy_sq(sq);
++err:
++ return -1;
++}
++
++/* Reads count sectors into buf. The buffer cannot cross page boundaries. */
++static int
++nvme_io_xfer(struct nvme_namespace *ns, grub_uint64_t lba, void *prp1, void *prp2,
++ grub_uint16_t count, int write)
++{
++ if (((grub_uint32_t)prp1 & 0x3) || ((grub_uint32_t)prp2 & 0x3)) {
++ /* Buffer is misaligned */
++ return -1;
++ }
++
++ struct nvme_sqe *io_read = nvme_get_next_sqe(&ns->ctrl->io_sq,
++ write ? NVME_SQE_OPC_IO_WRITE
++ : NVME_SQE_OPC_IO_READ,
++ NULL, prp1, prp2);
++ io_read->nsid = ns->ns_id;
++ io_read->dword[10] = (grub_uint32_t)lba;
++ io_read->dword[11] = (grub_uint32_t)(lba >> 32);
++ io_read->dword[12] = (1U << 31 /* limited retry */) | (count - 1);
++
++ nvme_commit_sqe(&ns->ctrl->io_sq);
++
++ struct nvme_cqe cqe = nvme_wait(&ns->ctrl->io_sq);
++
++ if (!nvme_is_cqe_success(&cqe)) {
++ grub_dprintf("nvme", "read io: %08x %08x %08x %08x\n",
++ cqe.dword[0], cqe.dword[1], cqe.dword[2], cqe.dword[3]);
++
++ return -1;
++ }
++
++ grub_dprintf("nvme", "ns %u %s lba %llu+%u\n", ns->ns_id, write ? "write" : "read",
++ lba, count);
++ return count;
++}
++
++// Transfer up to one page of data using the internal dma bounce buffer
++static int
++nvme_bounce_xfer(struct nvme_namespace *ns, grub_uint64_t lba, void *buf, grub_uint16_t count,
++ int write)
++{
++ grub_uint16_t const max_blocks = NVME_PAGE_SIZE / ns->block_size;
++ grub_uint16_t blocks = count < max_blocks ? count : max_blocks;
++
++ if (write)
++ grub_memcpy(nvme_dma_buffer, buf, blocks * ns->block_size);
++
++ int res = nvme_io_xfer(ns, lba, nvme_dma_buffer, NULL, blocks, write);
++
++ if (!write && res >= 0)
++ grub_memcpy(buf, nvme_dma_buffer, res * ns->block_size);
++
++ return res;
++}
++
++#define NVME_MAX_PRPL_ENTRIES 15 /* Allows requests up to 64kb */
++
++// Transfer data using page list (if applicable)
++static int
++nvme_prpl_xfer(struct nvme_namespace *ns, grub_uint64_t lba, void *buf, grub_uint16_t count,
++ int write)
++{
++ grub_uint32_t base = (long)buf;
++ grub_int32_t size;
++
++ if (count > ns->max_req_size)
++ count = ns->max_req_size;
++
++ size = count * ns->block_size;
++ /* Special case for transfers that fit into PRP1, but are unaligned */
++ if (((size + (base & ~NVME_PAGE_MASK)) <= NVME_PAGE_SIZE))
++ goto single;
++
++ /* Every request has to be page aligned */
++ if (base & ~NVME_PAGE_MASK)
++ goto bounce;
++
++ /* Make sure a full block fits into the last chunk */
++ if (size & (ns->block_size - 1ULL))
++ goto bounce;
++
++ /* Build PRP list if we need to describe more than 2 pages */
++ if ((ns->block_size * count) > (NVME_PAGE_SIZE * 2)) {
++ grub_uint32_t prpl_len = 0;
++ grub_uint64_t *prpl = nvme_dma_buffer;
++ int first_page = 1;
++ for (; size > 0; base += NVME_PAGE_SIZE, size -= NVME_PAGE_SIZE) {
++ if (first_page) {
++ /* First page is special */
++ first_page = 0;
++ continue;
++ }
++ if (prpl_len >= NVME_MAX_PRPL_ENTRIES)
++ goto bounce;
++ prpl[prpl_len++] = base;
++ }
++ return nvme_io_xfer(ns, lba, buf, prpl, count, write);
++ }
++
++ /* Directly embed the 2nd page if we only need 2 pages */
++ if ((ns->block_size * count) > NVME_PAGE_SIZE)
++ return nvme_io_xfer(ns, lba, buf, (char *) buf + NVME_PAGE_SIZE, count, write);
++
++single:
++ /* One page is enough, don't expose anything else */
++ return nvme_io_xfer(ns, lba, buf, NULL, count, write);
++
++bounce:
++ /* Use bounce buffer to make transfer */
++ return nvme_bounce_xfer(ns, lba, buf, count, write);
++}
++
++static int
++nvme_create_io_queues(struct nvme_ctrl *ctrl)
++{
++ if (nvme_create_io_cq(ctrl, &ctrl->io_cq, 3))
++ goto err;
++
++ if (nvme_create_io_sq(ctrl, &ctrl->io_sq, 2, &ctrl->io_cq))
++ goto err_free_cq;
++
++ return 0;
++
++ err_free_cq:
++ nvme_destroy_cq(&ctrl->io_cq);
++ err:
++ return -1;
++}
++
++/* Waits for CSTS.RDY to match rdy. Returns 0 on success. */
++static int
++nvme_wait_csts_rdy(struct nvme_ctrl *ctrl, unsigned rdy)
++{
++ // grub_uint32_t const max_to = 500 /* ms */ * ((ctrl->reg->cap >> 24) & 0xFFU);
++ // grub_uint32_t to = timer_calc(max_to);
++ grub_uint32_t csts;
++
++ while (rdy != ((csts = ctrl->reg->csts) & NVME_CSTS_RDY)) {
++ // FIXME
++ //yield();
++
++ if (csts & NVME_CSTS_FATAL) {
++ grub_dprintf("nvme", "NVMe fatal error during controller shutdown\n");
++ return -1;
++ }
++
++ /*
++ if (timer_check(to)) {
++ warn_timeout();
++ return -1;
++ }*/
++ }
++
++ return 0;
++}
++
++/* Returns 0 on success. */
++static int grub_nvme_controller_enable(struct nvme_ctrl *ctrl)
++{
++ grub_pci_address_t addr;
++ int rc;
++
++ addr = grub_pci_make_address (ctrl->pci, GRUB_PCI_REG_COMMAND);
++ grub_pci_write_word (addr, grub_pci_read_word (addr) | GRUB_PCI_COMMAND_BUS_MASTER);
++
++ /* Turn the controller off. */
++ ctrl->reg->cc = 0;
++ if (nvme_wait_csts_rdy(ctrl, 0)) {
++ grub_dprintf("nvme", "NVMe fatal error during controller shutdown\n");
++ return -1;
++ }
++
++ ctrl->doorbell_stride = 4U << ((ctrl->reg->cap >> 32) & 0xF);
++
++ rc = nvme_init_cq(ctrl, &ctrl->admin_cq, 1,
++ NVME_PAGE_SIZE / sizeof(struct nvme_cqe));
++ if (rc) {
++ return -1;
++ }
++
++ rc = nvme_init_sq(ctrl, &ctrl->admin_sq, 0,
++ NVME_PAGE_SIZE / sizeof(struct nvme_sqe), &ctrl->admin_cq);
++ if (rc) {
++ goto err_destroy_admin_cq;
++ }
++
++ ctrl->reg->aqa = ctrl->admin_cq.common.mask << 16
++ | ctrl->admin_sq.common.mask;
++
++ ctrl->reg->asq = (grub_uint32_t)ctrl->admin_sq.sqe;
++ ctrl->reg->acq = (grub_uint32_t)ctrl->admin_cq.cqe;
++
++ grub_dprintf("nvme", " admin submission queue: %p\n", ctrl->admin_sq.sqe);
++ grub_dprintf("nvme", " admin completion queue: %p\n", ctrl->admin_cq.cqe);
++
++ ctrl->reg->cc = NVME_CC_EN | (NVME_CQE_SIZE_LOG << 20)
++ | (NVME_SQE_SIZE_LOG << 16 /* IOSQES */);
++
++ if (nvme_wait_csts_rdy(ctrl, 1)) {
++ grub_dprintf("nvme", "NVMe fatal error while enabling controller\n");
++ goto err_destroy_admin_sq;
++ }
++
++ /* The admin queue is set up and the controller is ready. Let's figure out
++ what namespaces we have. */
++
++ struct nvme_identify_ctrl *identify = nvme_admin_identify_ctrl(ctrl);
++
++ if (!identify) {
++ grub_dprintf("nvme", "NVMe couldn't identify controller.\n");
++ goto err_destroy_admin_sq;
++ }
++
++ grub_dprintf("nvme", "NVMe has %u namespace%s.\n",
++ identify->nn, (identify->nn == 1) ? "" : "s");
++
++ ctrl->ns_count = identify->nn;
++ grub_uint8_t mdts = identify->mdts;
++ grub_free(identify);
++
++ if ((ctrl->ns_count == 0) || nvme_create_io_queues(ctrl)) {
++ /* No point to continue, if the controller says it doesn't have
++ namespaces or we couldn't create I/O queues. */
++ goto err_destroy_admin_sq;
++ }
++
++ /* Give the controller a global number */
++ ctrl->ctrlnum = grub_nvme_ctrlcnt++;
++
++ /* Populate namespace IDs */
++ for (grub_uint32_t ns_idx = 0; ns_idx < ctrl->ns_count; ns_idx++) {
++ nvme_probe_ns(ctrl, ns_idx, mdts);
++ }
++
++ grub_dprintf("nvme", "NVMe initialization complete!\n");
++ return 0;
++
++ err_destroy_admin_sq:
++ nvme_destroy_sq(&ctrl->admin_sq);
++ err_destroy_admin_cq:
++ nvme_destroy_cq(&ctrl->admin_cq);
++ return -1;
++}
++
++static int grub_nvme_pci_probe(grub_pci_device_t dev, grub_pci_id_t pciid __attribute__ ((unused)), void *data __attribute__ ((unused)))
++{
++ grub_pci_address_t addr;
++ grub_uint32_t class, bar, version;
++ struct nvme_reg volatile *reg;
++
++ class = grub_pci_read (grub_pci_make_address (dev, GRUB_PCI_REG_CLASS));
++ if (class >> 16 != 0x0108)
++ return 0;
++ if ((class >> 8 & 0xff) != 2) { /* as of NVM 1.0e */
++ grub_dprintf("nvme", "Found incompatble NVMe: prog-if=%02x\n", class >> 8 & 0xff);
++ return 0;
++ }
++
++ bar = grub_pci_read (grub_pci_make_address (dev, GRUB_PCI_REG_ADDRESS_REG0));
++ reg = grub_pci_device_map_range (dev, bar & GRUB_PCI_ADDR_MEM_MASK, sizeof (*reg));
++
++ addr = grub_pci_make_address (dev, GRUB_PCI_REG_COMMAND);
++ grub_pci_write_word (addr, grub_pci_read_word (addr) | GRUB_PCI_COMMAND_MEM_ENABLED);
++
++ version = reg->vs;
++ grub_dprintf("nvme", "Found NVMe controller with version %u.%u.%u.\n", version >> 16, (version >> 8) & 0xFF, version & 0xFF);
++ grub_dprintf("nvme", " Capabilities %016llx\n", reg->cap);
++
++ if (~reg->cap & NVME_CAP_CSS_NVME) {
++ grub_dprintf("nvme", "Controller doesn't speak NVMe command set. Skipping.\n");
++ goto err;
++ }
++
++ struct nvme_ctrl *ctrl = grub_malloc(sizeof(*ctrl));
++ if (!ctrl)
++ goto err;
++
++ grub_memset(ctrl, 0, sizeof(*ctrl));
++
++ ctrl->reg = reg;
++ ctrl->pci = dev;
++
++ if (grub_nvme_controller_enable(ctrl))
++ goto err_free_ctrl;
++
++ return 0;
++
++ err_free_ctrl:
++ grub_free(ctrl);
++ err:
++ grub_dprintf("nvme", "Failed to enable NVMe controller.\n");
++ return 0;
++}
++
++static int
++grub_nvme_iterate (grub_disk_dev_iterate_hook_t hook, void *hook_data, grub_disk_pull_t pull)
++{
++ struct nvme_namespace *ns;
++
++ if (pull != GRUB_DISK_PULL_NONE)
++ return 0;
++
++ FOR_LIST_ELEMENTS(ns, grub_nvme_namespaces)
++ if (hook (ns->devname, hook_data))
++ return 1;
++
++ return 0;
++}
++
++static grub_err_t
++grub_nvme_open (const char *name __attribute ((unused)), grub_disk_t disk __attribute ((unused)))
++{
++ struct nvme_namespace *ns;
++
++ FOR_LIST_ELEMENTS(ns, grub_nvme_namespaces)
++ if (grub_strcmp (ns->devname, name) == 0)
++ break;
++
++ if (! ns)
++ return grub_error (GRUB_ERR_UNKNOWN_DEVICE, "can't open device");
++
++ disk->total_sectors = ns->lba_count;
++ disk->max_agglomerate = ns->max_req_size;
++
++ disk->id = ns->nsnum; /* global id of the namespace */
++
++ disk->data = ns;
++
++ return 0;
++}
++
++static grub_err_t
++nvme_readwrite(struct nvme_namespace *ns, grub_disk_addr_t sector, grub_size_t num_sectors, char *buf, int write)
++{
++ for (int i = 0; i < num_sectors;) {
++ grub_uint16_t blocks_remaining = num_sectors - i;
++ char *op_buf = buf + i * ns->block_size;
++ int blocks = nvme_prpl_xfer(ns, sector + i, op_buf, blocks_remaining, write);
++ if (blocks < 0)
++ return GRUB_ERR_IO;
++ i += blocks;
++ }
++ return GRUB_ERR_NONE;
++}
++
++static grub_err_t
++grub_nvme_read (grub_disk_t disk, grub_disk_addr_t sector, grub_size_t num_sectors, char *buf)
++{
++ return nvme_readwrite((struct nvme_namespace *) disk->data, sector, num_sectors, buf, 0);
++}
++
++static grub_err_t
++grub_nvme_write (grub_disk_t disk, grub_disk_addr_t sector, grub_size_t num_sectors, const char *buf)
++{
++ return nvme_readwrite((struct nvme_namespace *) disk->data, sector, num_sectors, buf, 1);
++}
++
++static struct grub_disk_dev grub_nvme_dev =
++ {
++ .name = "nvme",
++ .id = GRUB_DISK_DEVICE_NVME_ID,
++ .disk_iterate = grub_nvme_iterate,
++ .disk_open = grub_nvme_open,
++ .disk_read = grub_nvme_read,
++ .disk_write = grub_nvme_write,
++ .next = 0
++ };
++
++GRUB_MOD_INIT(nvme)
++{
++ grub_stop_disk_firmware ();
++ grub_pci_iterate (grub_nvme_pci_probe, NULL);
++ grub_disk_dev_register (&grub_nvme_dev);
++}
++
++GRUB_MOD_FINI(nvme)
++{
++ grub_disk_dev_unregister (&grub_nvme_dev);
++}
+diff --git a/include/grub/disk.h b/include/grub/disk.h
+index fbf23df7f..186e76f0b 100644
+--- a/include/grub/disk.h
++++ b/include/grub/disk.h
+@@ -52,6 +52,7 @@ enum grub_disk_dev_id
+ GRUB_DISK_DEVICE_UBOOTDISK_ID,
+ GRUB_DISK_DEVICE_XEN,
+ GRUB_DISK_DEVICE_OBDISK_ID,
++ GRUB_DISK_DEVICE_NVME_ID
+ };
+
+ struct grub_disk;
+--
+2.39.2
+
diff --git a/config/grub/nvme/target.cfg b/config/grub/nvme/target.cfg
new file mode 100644
index 00000000..9177dbd7
--- /dev/null
+++ b/config/grub/nvme/target.cfg
@@ -0,0 +1,2 @@
+tree="nvme"
+rev="b53ec06a1d6f22ffc1139cbfc0f292e4ca2da9cd"
diff --git a/config/grub/xhci/config/payload b/config/grub/xhci/config/payload
new file mode 100644
index 00000000..923e3551
--- /dev/null
+++ b/config/grub/xhci/config/payload
@@ -0,0 +1,291 @@
+# SPDX-License-Identifier: GPL-3.0-or-later
+# Copyright (C) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (C) 2015 Klemens Nanni <contact@autoboot.org>
+
+set prefix=(memdisk)/boot/grub
+
+insmod at_keyboard
+insmod usb_keyboard
+insmod nativedisk
+insmod xhci
+insmod ehci
+insmod ohci
+insmod uhci
+insmod usb
+insmod usbms
+insmod regexp
+
+terminal_input --append at_keyboard
+terminal_input --append usb_keyboard
+terminal_output --append cbmemc
+
+# User interface overrides wherever "keystatus" is supported
+# Keep SHIFT key pressed before powering on to disable graphics
+if keystatus --shift; then
+ terminal_output --append vga_text
+else
+ gfxpayload=keep
+ terminal_output --append gfxterm
+
+ for dt in cbfsdisk memdisk; do
+ for it in png jpg; do
+ if [ -f (${dt})/background.${it} ]; then
+ insmod ${it}
+ background_image (${dt})/background.${it}
+ fi
+ done
+ done
+fi
+
+# Keep CTRL pressed to enable default serial terminal (COM1 or the like)
+if keystatus --ctrl; then
+ serial
+ terminal_input --append serial
+ terminal_output --append serial
+fi
+
+# Keep ALT pressed to enable spkmodem
+if keystatus --alt; then
+ terminal_output --append spkmodem
+fi
+
+
+set default="0"
+if [ -f (cbfsdisk)/timeout.cfg ]; then
+ source (cbfsdisk)/timeout.cfg
+else
+ set timeout=8
+fi
+set grub_scan_disk="nvme ahci ata"
+if [ -f (cbfsdisk)/scan.cfg ]; then
+ source (cbfsdisk)/scan.cfg
+fi
+
+if [ -f (cbfsdisk)/keymap.gkb ]; then
+ keymap (cbfsdisk)/keymap.gkb
+fi
+
+function really_try_user_config {
+ set root="${1}"
+
+ if [ -f /"${2}"/grub.cfg ]; then
+ unset superusers
+ configfile /"${2}"/grub.cfg
+ fi
+}
+
+function try_user_config {
+ # The @/... entries are for cases where the BTRFS filesystem is being used
+ for dir in grub boot/grub @/grub @/boot/grub grub2 boot/grub2 @/grub2 @/boot/grub2 boot @/boot; do
+ really_try_user_config "${1}" "${dir}"
+ done
+ for dir in ubuntu debian redhat; do
+ really_try_user_config "${1}" "EFI/${dir}"
+ done
+}
+function search_grub {
+ echo -n "Attempting to load grub.cfg from '${1}' devices"
+ for i in 0 1 2 3 4 5 6 7 8; do
+ for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
+ if [ "${1}" != "nvme" ]; then
+ try_user_config "(${1}${i},${part})"
+ else
+ # TODO: do we care about other namesapces
+ try_user_config "(nvme${i}n1,${part})"
+ fi
+ done
+ if [ "${1}" != "nvme" ]; then
+ # raw devices e.g. (ahci0) instead of (ahci0,1)
+ try_user_config "(${1}${i})"
+ else
+ # TODO: do we care about other namesapces
+ try_user_config "(nvme${i}n1)"
+ fi
+ done
+ echo # Insert newline
+}
+
+function try_isolinux_config {
+ set root="${1}"
+ for dir in '' /boot /EFI /@ /@/boot; do
+ if [ -f "${dir}"/isolinux/isolinux.cfg ]; then
+ syslinux_configfile -i "${dir}"/isolinux/isolinux.cfg
+ elif [ -f "${dir}"/syslinux/syslinux.cfg ]; then
+ syslinux_configfile -s "${dir}"/syslinux/syslinux.cfg
+ elif [ -f "${dir}"/syslinux/extlinux.conf ]; then
+ syslinux_configfile -s "${dir}"/syslinux/extlinux.conf
+ elif [ -f "${dir}"/extlinux/extlinux.conf ]; then
+ syslinux_configfile -s "${dir}"/extlinux/extlinux.conf
+ fi
+ done
+}
+function search_isolinux {
+ echo "\nAttempting to parse iso/sys/extlinux config from '${1}' devices"
+ for i in 0 1 2 3 4 5 6 7 8; do
+ for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
+ if [ "${1}" != "nvme" ]; then
+ try_isolinux_config "(${1}${i},${part})"
+ else
+ # TODO: see above
+ try_isolinux_config "(nvme${i}n1,${part})"
+ fi
+ done
+ if [ "${1}" != "nvme" ]; then
+ # raw devices e.g. (usb0) instead of (usb0,1)
+ try_isolinux_config "(${1}${i})"
+ else
+ # TODO: do we care about other namesapces
+ try_isolinux_config "(nvme${i}n1)"
+ fi
+ done
+ echo # Insert newline
+}
+function try_bootcfg {
+ try_user_config "${1}"
+ try_isolinux_config "${1}"
+}
+function search_bootcfg {
+ search_grub "${1}"
+ search_isolinux "${1}"
+}
+menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o' {
+
+ for grub_disk in ${grub_scan_disk}; do
+ search_bootcfg ${grub_disk}
+ done
+
+ # grub device enumeration is very slow, so checks are hardcoded
+
+ # TODO: add more strings, based on what distros set up when
+ # the user select auto-partitioning on those installers
+ lvmvol="lvm/grubcrypt-bootvol lvm/grubcrypt-rootvol"
+
+ raidvol="md/0 md/1 md/2 md/3 md/4 md/5 md/6 md/7 md/8 md/9"
+
+ # in practise, doing multiple redundant checks is perfectly fast and
+ # TODO: optimize grub itself, and use */? here for everything
+
+ for vol in ${lvmvol} ${raidvol} ; do
+ try_bootcfg "${vol}"
+ done
+
+ unset bootdev
+ for grub_disk in ${grub_scan_disk}; do
+ for i in 0 1 2 3 4 5 6 7 8; do
+ for part in 1 2 3 4 5 6 7 8 9 10 11 12; do
+ if [ "${grub_disk}" = "ahci" ]; then
+ bootdev="${bootdev} (ahci${i},${part})"
+ elif [ "${grub_disk}" = "ata" ]; then
+ bootdev="${bootdev} (ata${i},${part})"
+ elif [ "${grub_disk}" = "nvme" ]; then
+ # TODO: do we care about other namesapces
+ bootdev="${bootdev} (nvme${i}n1,${part})"
+ fi
+ done
+ done
+ done
+
+ set pager=0
+ echo -n "Attempting to unlock encrypted volumes"
+ for dev in ${bootdev} ${lvmvol} ${raidvol}; do
+ if cryptomount "${dev}" ; then break ; fi
+ done
+ set pager=1
+ echo
+
+ # after cryptomount, lvm volumes might be available
+ for vol in ${lvmvol}; do
+ try_bootcfg "${vol}"
+ done
+
+ search_bootcfg crypto
+
+ for vol in lvm/* ; do
+ try_bootcfg "${vol}"
+ done
+
+ true # Prevent pager requiring to accept each line instead of whole screen
+}
+
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on USB [s]' --hotkey='s' {
+ search_bootcfg usb
+}
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on AHCI [a]' --hotkey='a' {
+ search_bootcfg ahci
+}
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on ATA/IDE [d]' --hotkey='d' {
+ search_bootcfg ata
+}
+menuentry 'Search for GRUB/SYSLINUX/EXTLINUX/ISOLINUX on NVMe [e]' --hotkey='e' {
+ search_bootcfg nvme
+}
+if [ -f (cbfsdisk)/grub.cfg ]; then
+menuentry 'Load configuration (grub.cfg) in CBFS [t]' --hotkey='t' {
+ set root='(cbfsdisk)'
+ if [ -f /grub.cfg ]; then
+ configfile /grub.cfg
+ fi
+}
+fi
+if [ -f (cbfsdisk)/grubtest.cfg ]; then
+menuentry 'Load test configuration (grubtest.cfg) in CBFS [t]' --hotkey='t' {
+ set root='(cbfsdisk)'
+ if [ -f /grubtest.cfg ]; then
+ configfile /grubtest.cfg
+ fi
+}
+fi
+if [ -f (cbfsdisk)/seabios.elf ]; then
+menuentry 'Load SeaBIOS (payload) [b]' --hotkey='b' {
+ set root='cbfsdisk'
+ chainloader /seabios.elf
+}
+fi
+if [ -f (cbfsdisk)/img/grub2 ]; then
+menuentry 'Return to SeaBIOS [b]' --hotkey='b' {
+ set root='cbfsdisk'
+ chainloader /fallback/payload
+}
+fi
+menuentry 'Poweroff [p]' --hotkey='p' {
+ halt
+}
+menuentry 'Reboot [r]' --hotkey='r' {
+ reboot
+}
+if [ -f (cbfsdisk)/img/memtest ]; then
+menuentry 'Load MemTest86+ [m]' --hotkey='m' {
+ set root='cbfsdisk'
+ chainloader /img/memtest
+}
+fi
+
+submenu 'Other [z]' --hotkey='z' {
+ menuentry 'Enable default serial terminal [s]' --hotkey='s' {
+ serial
+ terminal_input --append serial
+ terminal_output --append serial
+ }
+
+ menuentry 'Disable default serial terminal' {
+ terminal_input --remove serial
+ terminal_output --remove serial
+ }
+
+ menuentry 'Enable gfxterm' {
+ terminal_output --append gfxterm
+ terminal_output --remove vga_text
+ }
+ menuentry 'Disable gfxterm [g]' --hotkey='g' {
+ terminal_output --remove gfxterm
+ terminal_output --append vga_text
+ }
+
+ menuentry 'Enable spkmodem [a]' --hotkey='a' {
+ terminal_output --append spkmodem
+ }
+
+ menuentry 'Disable spkmodem [z]' --hotkey='z' {
+ terminal_output --remove spkmodem
+ }
+}
diff --git a/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
new file mode 100644
index 00000000..0cc0cb34
--- /dev/null
+++ b/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch
@@ -0,0 +1,90 @@
+From 1ee64f2373af3ad992993f9cf103a29df0359c3c Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 31 Oct 2021 03:47:05 +0000
+Subject: [PATCH 01/22] mitigate grub's missing characters for borders/arrow
+ characters
+
+This cleans up the display on the main screen in GRUB.
+
+Just don't draw a border, at all.
+---
+ grub-core/normal/menu_text.c | 49 ++----------------------------------
+ 1 file changed, 2 insertions(+), 47 deletions(-)
+
+diff --git a/grub-core/normal/menu_text.c b/grub-core/normal/menu_text.c
+index 9c383e64a..8ec1dd1e8 100644
+--- a/grub-core/normal/menu_text.c
++++ b/grub-core/normal/menu_text.c
+@@ -108,47 +108,6 @@ grub_print_message_indented (const char *msg, int margin_left, int margin_right,
+ grub_print_message_indented_real (msg, margin_left, margin_right, term, 0);
+ }
+
+-static void
+-draw_border (struct grub_term_output *term, const struct grub_term_screen_geometry *geo)
+-{
+- int i;
+-
+- grub_term_setcolorstate (term, GRUB_TERM_COLOR_NORMAL);
+-
+- grub_term_gotoxy (term, (struct grub_term_coordinate) { geo->first_entry_x - 1,
+- geo->first_entry_y - 1 });
+- grub_putcode (GRUB_UNICODE_CORNER_UL, term);
+- for (i = 0; i < geo->entry_width + 1; i++)
+- grub_putcode (GRUB_UNICODE_HLINE, term);
+- grub_putcode (GRUB_UNICODE_CORNER_UR, term);
+-
+- for (i = 0; i < geo->num_entries; i++)
+- {
+- grub_term_gotoxy (term, (struct grub_term_coordinate) { geo->first_entry_x - 1,
+- geo->first_entry_y + i });
+- grub_putcode (GRUB_UNICODE_VLINE, term);
+- grub_term_gotoxy (term,
+- (struct grub_term_coordinate) { geo->first_entry_x + geo->entry_width + 1,
+- geo->first_entry_y + i });
+- grub_putcode (GRUB_UNICODE_VLINE, term);
+- }
+-
+- grub_term_gotoxy (term,
+- (struct grub_term_coordinate) { geo->first_entry_x - 1,
+- geo->first_entry_y - 1 + geo->num_entries + 1 });
+- grub_putcode (GRUB_UNICODE_CORNER_LL, term);
+- for (i = 0; i < geo->entry_width + 1; i++)
+- grub_putcode (GRUB_UNICODE_HLINE, term);
+- grub_putcode (GRUB_UNICODE_CORNER_LR, term);
+-
+- grub_term_setcolorstate (term, GRUB_TERM_COLOR_NORMAL);
+-
+- grub_term_gotoxy (term,
+- (struct grub_term_coordinate) { geo->first_entry_x - 1,
+- (geo->first_entry_y - 1 + geo->num_entries
+- + GRUB_TERM_MARGIN + 1) });
+-}
+-
+ static int
+ print_message (int nested, int edit, struct grub_term_output *term, int dry_run)
+ {
+@@ -167,10 +126,8 @@ command-line or ESC to discard edits and return to the GRUB menu."),
+ {
+ char *msg_translated;
+
+- msg_translated = grub_xasprintf (_("Use the %C and %C keys to select which "
+- "entry is highlighted."),
+- GRUB_UNICODE_UPARROW,
+- GRUB_UNICODE_DOWNARROW);
++ msg_translated = grub_xasprintf (_("Use the arrow keys to select which "
++ "entry is highlighted."));
+ if (!msg_translated)
+ return 0;
+ ret += grub_print_message_indented_real (msg_translated, STANDARD_MARGIN,
+@@ -413,8 +370,6 @@ grub_menu_init_page (int nested, int edit,
+
+ grub_term_normal_color = grub_color_menu_normal;
+ grub_term_highlight_color = grub_color_menu_highlight;
+- if (geo->border)
+- draw_border (term, geo);
+ grub_term_normal_color = old_color_normal;
+ grub_term_highlight_color = old_color_highlight;
+ geo->timeout_y = geo->first_entry_y + geo->num_entries
+--
+2.39.2
+
diff --git a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
new file mode 100644
index 00000000..bf2b5940
--- /dev/null
+++ b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch
@@ -0,0 +1,25 @@
+From 0e89a40423cdd6f8f20ad03d1c2f54ee7b5ea1b6 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sat, 19 Nov 2022 16:30:24 +0000
+Subject: [PATCH 02/22] say the name libreboot, in the grub menu
+
+---
+ grub-core/normal/main.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c
+index bd4431000..300f55fe1 100644
+--- a/grub-core/normal/main.c
++++ b/grub-core/normal/main.c
+@@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term,
+
+ grub_term_cls (term);
+
+- msg_formatted = grub_xasprintf (_("GNU GRUB version %s"), PACKAGE_VERSION);
++ msg_formatted = grub_xasprintf (_("Libreboot 20241008 release, based on coreboot. https://libreboot.org/"));
+ if (!msg_formatted)
+ return;
+
+--
+2.39.2
+
diff --git a/config/grub/xhci/patches/0003-Add-CC0-license.patch b/config/grub/xhci/patches/0003-Add-CC0-license.patch
new file mode 100644
index 00000000..cf35c343
--- /dev/null
+++ b/config/grub/xhci/patches/0003-Add-CC0-license.patch
@@ -0,0 +1,42 @@
+From c9be46c903d4aabc88fe4d9394d7a8e024868c32 Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 03/22] Add CC0 license
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ grub-core/kern/dl.c | 3 ++-
+ util/grub-module-verifierXX.c | 3 ++-
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
+index 0bf40caa6..4011e2d15 100644
+--- a/grub-core/kern/dl.c
++++ b/grub-core/kern/dl.c
+@@ -470,7 +470,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e)
+
+ if (grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3") == 0
+ || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3+") == 0
+- || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv2+") == 0)
++ || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv2+") == 0
++ || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=CC0") == 0)
+ return GRUB_ERR_NONE;
+
+ return grub_error (GRUB_ERR_BAD_MODULE,
+diff --git a/util/grub-module-verifierXX.c b/util/grub-module-verifierXX.c
+index a42c20bd1..7157a30aa 100644
+--- a/util/grub-module-verifierXX.c
++++ b/util/grub-module-verifierXX.c
+@@ -236,7 +236,8 @@ check_license (const char * const filename,
+ Elf_Shdr *s = find_section (arch, e, ".module_license", module_size);
+ if (s && (strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=GPLv3") == 0
+ || strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=GPLv3+") == 0
+- || strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=GPLv2+") == 0))
++ || strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=GPLv2+") == 0
++ || strcmp ((char *) e + grub_target_to_host(s->sh_offset), "LICENSE=CC0") == 0))
+ return;
+ grub_util_error ("%s: incompatible license", filename);
+ }
+--
+2.39.2
+
diff --git a/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch
new file mode 100644
index 00000000..08566ba9
--- /dev/null
+++ b/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch
@@ -0,0 +1,39 @@
+From c988b6b3bb7567f9ed6bb0332b992577011970c2 Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 04/22] Define GRUB_UINT32_MAX
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ include/grub/types.h | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/include/grub/types.h b/include/grub/types.h
+index 45079bf65..8c0b30395 100644
+--- a/include/grub/types.h
++++ b/include/grub/types.h
+@@ -156,6 +156,7 @@ typedef grub_int32_t grub_ssize_t;
+ #define GRUB_SHRT_MAX 0x7fff
+ #define GRUB_SHRT_MIN (-GRUB_SHRT_MAX - 1)
+ #define GRUB_UINT_MAX 4294967295U
++#define GRUB_UINT32_MAX 4294967295U
+ #define GRUB_INT_MAX 0x7fffffff
+ #define GRUB_INT_MIN (-GRUB_INT_MAX - 1)
+ #define GRUB_INT32_MAX 2147483647
+@@ -177,6 +178,13 @@ typedef grub_int32_t grub_ssize_t;
+ #define GRUB_TYPE_U_MAX(type) ((unsigned long long)((typeof (type))(~0)))
+ #define GRUB_TYPE_U_MIN(type) 0ULL
+
++# define GRUB_UINT32_C(x) x ## U
++# if GRUB_ULONG_MAX >> 31 >> 31 >> 1 == 1
++# define GRUB_UINT64_C(x) x##UL
++# elif 1
++# define GRUB_UINT64_C(x) x##ULL
++# endif
++
+ typedef grub_uint64_t grub_properly_aligned_t;
+
+ #define GRUB_PROPERLY_ALIGNED_ARRAY(name, size) grub_properly_aligned_t name[((size) + sizeof (grub_properly_aligned_t) - 1) / sizeof (grub_properly_aligned_t)]
+--
+2.39.2
+
diff --git a/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch b/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch
new file mode 100644
index 00000000..85a629c5
--- /dev/null
+++ b/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch
@@ -0,0 +1,2611 @@
+From e2cfe7dcdb384ce5268a7c6e5cc8a6e8e01fc05f Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 05/22] Add Argon2 algorithm
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ docs/grub-dev.texi | 64 +++
+ grub-core/Makefile.core.def | 8 +
+ grub-core/lib/argon2/LICENSE | 314 +++++++++++
+ grub-core/lib/argon2/argon2.c | 232 ++++++++
+ grub-core/lib/argon2/argon2.h | 264 +++++++++
+ grub-core/lib/argon2/blake2/blake2-impl.h | 151 ++++++
+ grub-core/lib/argon2/blake2/blake2.h | 89 +++
+ grub-core/lib/argon2/blake2/blake2b.c | 388 ++++++++++++++
+ .../lib/argon2/blake2/blamka-round-ref.h | 56 ++
+ grub-core/lib/argon2/core.c | 506 ++++++++++++++++++
+ grub-core/lib/argon2/core.h | 228 ++++++++
+ grub-core/lib/argon2/ref.c | 190 +++++++
+ 12 files changed, 2490 insertions(+)
+ create mode 100644 grub-core/lib/argon2/LICENSE
+ create mode 100644 grub-core/lib/argon2/argon2.c
+ create mode 100644 grub-core/lib/argon2/argon2.h
+ create mode 100644 grub-core/lib/argon2/blake2/blake2-impl.h
+ create mode 100644 grub-core/lib/argon2/blake2/blake2.h
+ create mode 100644 grub-core/lib/argon2/blake2/blake2b.c
+ create mode 100644 grub-core/lib/argon2/blake2/blamka-round-ref.h
+ create mode 100644 grub-core/lib/argon2/core.c
+ create mode 100644 grub-core/lib/argon2/core.h
+ create mode 100644 grub-core/lib/argon2/ref.c
+
+diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi
+index 1276c5930..cd6fb0e1e 100644
+--- a/docs/grub-dev.texi
++++ b/docs/grub-dev.texi
+@@ -503,11 +503,75 @@ GRUB includes some code from other projects, and it is sometimes necessary
+ to update it.
+
+ @menu
++* Argon2::
+ * Gnulib::
+ * jsmn::
+ * minilzo::
+ @end menu
+
++@node Argon2
++@section Argon2
++
++Argon2 is a key derivation function used by LUKS2 in order to derive encryption
++keys from a user-provided password. GRUB imports the official reference
++implementation of Argon2 from @url{https://github.com/P-H-C/phc-winner-argon2}.
++In order to make the library usable for GRUB, we need to perform various
++conversions. This is mainly due to the fact that the imported code makes use of
++types and functions defined in the C standard library, which isn't available.
++Furthermore, using the POSIX wrapper library is not possible as the code needs
++to be part of the kernel.
++
++Updating the code can thus be performed like following:
++
++@example
++$ git clone https://github.com/P-H-C/phc-winner-argon2 argon2
++$ cp argon2/include/argon2.h argon2/src/@{argon2.c,core.c,core.h,ref.c@} \
++ grub-core/lib/argon2/
++$ cp argon2/src/blake2/@{blake2-impl.h,blake2.h,blake2b.c,blamka-round-ref.h@} \
++ grub-core/lib/argon2/blake2/
++$ sed -e 's/UINT32_C/GRUB_UINT32_C/g' \
++ -e 's/UINT64_C/GRUB_UINT64_C/g' \
++ -e 's/UINT32_MAX/GRUB_UINT32_MAX/g' \
++ -e 's/CHAR_BIT/GRUB_CHAR_BIT/g' \
++ -e 's/UINT_MAX/GRUB_UINT_MAX/g' \
++ -e 's/uintptr_t/grub_addr_t/g' \
++ -e 's/size_t/grub_size_t/g' \
++ -e 's/uint32_t/grub_uint32_t/g' \
++ -e 's/uint64_t/grub_uint64_t/g' \
++ -e 's/uint8_t/grub_uint8_t/g' \
++ -e 's/memset/grub_memset/g' \
++ -e 's/memcpy/grub_memcpy/g' \
++ -e 's/malloc/grub_malloc/g' \
++ -e 's/free/grub_free/g' \
++ -e 's/#elif _MSC_VER/#elif defined(_MSC_VER)/' \
++ grub-core/lib/argon2/@{*,blake2/*@}.@{c,h@} -i
++@end example
++
++Afterwards, you need to perform the following manual steps:
++
++@enumerate
++@item Remove all includes of standard library headers, "encoding.h" and
++ "thread.h".
++@item Add includes <grub/mm.h> and <grub/misc.h> to "argon2.h".
++@item Add include <grub/dl.h> and module license declaration to "argon2.c".
++@item Remove the following declarations and functions from "argon2.h" and
++ "argon2.c": argon2_type2string, argon2i_hash_encoded, argon2i_hash_raw,
++ argon2d_hash_encoded, argon2d_hash_raw, argon2id_hash_encoded,
++ argon2id_hash_raw, argon2_compare, argon2_verify, argon2i_verify,
++ argon2d_verify, argon2id_verify, argon2d_ctx, argon2i_ctx, argon2id_ctx,
++ argon2_verify_ctx, argon2d_verify_ctx, argon2i_verify_ctx,
++ argon2id_verify_ctx, argon2_encodedlen.
++@item Move the declaration of `clear_internal_memory()` in "blake2-impl.h" to
++ "blake2b.c".
++@item Remove code guarded by the ARGON2_NO_THREADS macro.
++@item Remove parameters `encoded` and `encodedlen` from `argon2_hash` and remove
++ the encoding block in that function.
++@item Remove parameter verifications in `validate_inputs()` for
++ ARGON2_MIN_PWD_LENGTH, ARGON2_MIN_SECRET, ARGON2_MIN_AD_LENGTH and
++ ARGON2_MAX_MEMORY to fix compiler warnings.
++@item Mark the function argon2_ctx as static.
++@end enumerate
++
+ @node Gnulib
+ @section Gnulib
+
+diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
+index 705d73fab..452f11b20 100644
+--- a/grub-core/Makefile.core.def
++++ b/grub-core/Makefile.core.def
+@@ -1219,6 +1219,14 @@ module = {
+ common = lib/json/json.c;
+ };
+
++module = {
++ name = argon2;
++ common = lib/argon2/argon2.c;
++ common = lib/argon2/core.c;
++ common = lib/argon2/ref.c;
++ common = lib/argon2/blake2/blake2b.c;
++};
++
+ module = {
+ name = afsplitter;
+ common = disk/AFSplitter.c;
+diff --git a/grub-core/lib/argon2/LICENSE b/grub-core/lib/argon2/LICENSE
+new file mode 100644
+index 000000000..97aae2925
+--- /dev/null
++++ b/grub-core/lib/argon2/LICENSE
+@@ -0,0 +1,314 @@
++Argon2 reference source code package - reference C implementations
++
++Copyright 2015
++Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++
++You may use this work under the terms of a Creative Commons CC0 1.0
++License/Waiver or the Apache Public License 2.0, at your option. The terms of
++these licenses can be found at:
++
++- CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++- Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++
++The terms of the licenses are reproduced below.
++
++--------------------------------------------------------------------------------
++
++Creative Commons Legal Code
++
++CC0 1.0 Universal
++
++ CREATIVE COMMONS CORPORATION IS NOT A LAW FIRM AND DOES NOT PROVIDE
++ LEGAL SERVICES. DISTRIBUTION OF THIS DOCUMENT DOES NOT CREATE AN
++ ATTORNEY-CLIENT RELATIONSHIP. CREATIVE COMMONS PROVIDES THIS
++ INFORMATION ON AN "AS-IS" BASIS. CREATIVE COMMONS MAKES NO WARRANTIES
++ REGARDING THE USE OF THIS DOCUMENT OR THE INFORMATION OR WORKS
++ PROVIDED HEREUNDER, AND DISCLAIMS LIABILITY FOR DAMAGES RESULTING FROM
++ THE USE OF THIS DOCUMENT OR THE INFORMATION OR WORKS PROVIDED
++ HEREUNDER.
++
++Statement of Purpose
++
++The laws of most jurisdictions throughout the world automatically confer
++exclusive Copyright and Related Rights (defined below) upon the creator
++and subsequent owner(s) (each and all, an "owner") of an original work of
++authorship and/or a database (each, a "Work").
++
++Certain owners wish to permanently relinquish those rights to a Work for
++the purpose of contributing to a commons of creative, cultural and
++scientific works ("Commons") that the public can reliably and without fear
++of later claims of infringement build upon, modify, incorporate in other
++works, reuse and redistribute as freely as possible in any form whatsoever
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+diff --git a/grub-core/lib/argon2/argon2.c b/grub-core/lib/argon2/argon2.c
+new file mode 100644
+index 000000000..49532fe80
+--- /dev/null
++++ b/grub-core/lib/argon2/argon2.c
+@@ -0,0 +1,232 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#include <grub/dl.h>
++
++#include "argon2.h"
++#include "core.h"
++
++GRUB_MOD_LICENSE ("CC0");
++
++static int argon2_ctx(argon2_context *context, argon2_type type) {
++ /* 1. Validate all inputs */
++ int result = validate_inputs(context);
++ grub_uint32_t memory_blocks, segment_length;
++ argon2_instance_t instance;
++
++ if (ARGON2_OK != result) {
++ return result;
++ }
++
++ if (Argon2_d != type && Argon2_i != type && Argon2_id != type) {
++ return ARGON2_INCORRECT_TYPE;
++ }
++
++ /* 2. Align memory size */
++ /* Minimum memory_blocks = 8L blocks, where L is the number of lanes */
++ memory_blocks = context->m_cost;
++
++ if (memory_blocks < 2 * ARGON2_SYNC_POINTS * context->lanes) {
++ memory_blocks = 2 * ARGON2_SYNC_POINTS * context->lanes;
++ }
++
++ segment_length = memory_blocks / (context->lanes * ARGON2_SYNC_POINTS);
++ /* Ensure that all segments have equal length */
++ memory_blocks = segment_length * (context->lanes * ARGON2_SYNC_POINTS);
++
++ instance.version = context->version;
++ instance.memory = NULL;
++ instance.passes = context->t_cost;
++ instance.memory_blocks = memory_blocks;
++ instance.segment_length = segment_length;
++ instance.lane_length = segment_length * ARGON2_SYNC_POINTS;
++ instance.lanes = context->lanes;
++ instance.threads = context->threads;
++ instance.type = type;
++
++ if (instance.threads > instance.lanes) {
++ instance.threads = instance.lanes;
++ }
++
++ /* 3. Initialization: Hashing inputs, allocating memory, filling first
++ * blocks
++ */
++ result = initialize(&instance, context);
++
++ if (ARGON2_OK != result) {
++ return result;
++ }
++
++ /* 4. Filling memory */
++ result = fill_memory_blocks(&instance);
++
++ if (ARGON2_OK != result) {
++ return result;
++ }
++ /* 5. Finalization */
++ finalize(context, &instance);
++
++ return ARGON2_OK;
++}
++
++int argon2_hash(const grub_uint32_t t_cost, const grub_uint32_t m_cost,
++ const grub_uint32_t parallelism, const void *pwd,
++ const grub_size_t pwdlen, const void *salt, const grub_size_t saltlen,
++ void *hash, const grub_size_t hashlen, argon2_type type,
++ const grub_uint32_t version){
++
++ argon2_context context;
++ int result;
++ grub_uint8_t *out;
++
++ if (pwdlen > ARGON2_MAX_PWD_LENGTH) {
++ return ARGON2_PWD_TOO_LONG;
++ }
++
++ if (saltlen > ARGON2_MAX_SALT_LENGTH) {
++ return ARGON2_SALT_TOO_LONG;
++ }
++
++ if (hashlen > ARGON2_MAX_OUTLEN) {
++ return ARGON2_OUTPUT_TOO_LONG;
++ }
++
++ if (hashlen < ARGON2_MIN_OUTLEN) {
++ return ARGON2_OUTPUT_TOO_SHORT;
++ }
++
++ out = grub_malloc(hashlen);
++ if (!out) {
++ return ARGON2_MEMORY_ALLOCATION_ERROR;
++ }
++
++ context.out = (grub_uint8_t *)out;
++ context.outlen = (grub_uint32_t)hashlen;
++ context.pwd = CONST_CAST(grub_uint8_t *)pwd;
++ context.pwdlen = (grub_uint32_t)pwdlen;
++ context.salt = CONST_CAST(grub_uint8_t *)salt;
++ context.saltlen = (grub_uint32_t)saltlen;
++ context.secret = NULL;
++ context.secretlen = 0;
++ context.ad = NULL;
++ context.adlen = 0;
++ context.t_cost = t_cost;
++ context.m_cost = m_cost;
++ context.lanes = parallelism;
++ context.threads = parallelism;
++ context.allocate_cbk = NULL;
++ context.grub_free_cbk = NULL;
++ context.flags = ARGON2_DEFAULT_FLAGS;
++ context.version = version;
++
++ result = argon2_ctx(&context, type);
++
++ if (result != ARGON2_OK) {
++ clear_internal_memory(out, hashlen);
++ grub_free(out);
++ return result;
++ }
++
++ /* if raw hash requested, write it */
++ if (hash) {
++ grub_memcpy(hash, out, hashlen);
++ }
++
++ clear_internal_memory(out, hashlen);
++ grub_free(out);
++
++ return ARGON2_OK;
++}
++
++const char *argon2_error_message(int error_code) {
++ switch (error_code) {
++ case ARGON2_OK:
++ return "OK";
++ case ARGON2_OUTPUT_PTR_NULL:
++ return "Output pointer is NULL";
++ case ARGON2_OUTPUT_TOO_SHORT:
++ return "Output is too short";
++ case ARGON2_OUTPUT_TOO_LONG:
++ return "Output is too long";
++ case ARGON2_PWD_TOO_SHORT:
++ return "Password is too short";
++ case ARGON2_PWD_TOO_LONG:
++ return "Password is too long";
++ case ARGON2_SALT_TOO_SHORT:
++ return "Salt is too short";
++ case ARGON2_SALT_TOO_LONG:
++ return "Salt is too long";
++ case ARGON2_AD_TOO_SHORT:
++ return "Associated data is too short";
++ case ARGON2_AD_TOO_LONG:
++ return "Associated data is too long";
++ case ARGON2_SECRET_TOO_SHORT:
++ return "Secret is too short";
++ case ARGON2_SECRET_TOO_LONG:
++ return "Secret is too long";
++ case ARGON2_TIME_TOO_SMALL:
++ return "Time cost is too small";
++ case ARGON2_TIME_TOO_LARGE:
++ return "Time cost is too large";
++ case ARGON2_MEMORY_TOO_LITTLE:
++ return "Memory cost is too small";
++ case ARGON2_MEMORY_TOO_MUCH:
++ return "Memory cost is too large";
++ case ARGON2_LANES_TOO_FEW:
++ return "Too few lanes";
++ case ARGON2_LANES_TOO_MANY:
++ return "Too many lanes";
++ case ARGON2_PWD_PTR_MISMATCH:
++ return "Password pointer is NULL, but password length is not 0";
++ case ARGON2_SALT_PTR_MISMATCH:
++ return "Salt pointer is NULL, but salt length is not 0";
++ case ARGON2_SECRET_PTR_MISMATCH:
++ return "Secret pointer is NULL, but secret length is not 0";
++ case ARGON2_AD_PTR_MISMATCH:
++ return "Associated data pointer is NULL, but ad length is not 0";
++ case ARGON2_MEMORY_ALLOCATION_ERROR:
++ return "Memory allocation error";
++ case ARGON2_FREE_MEMORY_CBK_NULL:
++ return "The grub_free memory callback is NULL";
++ case ARGON2_ALLOCATE_MEMORY_CBK_NULL:
++ return "The allocate memory callback is NULL";
++ case ARGON2_INCORRECT_PARAMETER:
++ return "Argon2_Context context is NULL";
++ case ARGON2_INCORRECT_TYPE:
++ return "There is no such version of Argon2";
++ case ARGON2_OUT_PTR_MISMATCH:
++ return "Output pointer mismatch";
++ case ARGON2_THREADS_TOO_FEW:
++ return "Not enough threads";
++ case ARGON2_THREADS_TOO_MANY:
++ return "Too many threads";
++ case ARGON2_MISSING_ARGS:
++ return "Missing arguments";
++ case ARGON2_ENCODING_FAIL:
++ return "Encoding failed";
++ case ARGON2_DECODING_FAIL:
++ return "Decoding failed";
++ case ARGON2_THREAD_FAIL:
++ return "Threading failure";
++ case ARGON2_DECODING_LENGTH_FAIL:
++ return "Some of encoded parameters are too long or too short";
++ case ARGON2_VERIFY_MISMATCH:
++ return "The password does not match the supplied hash";
++ default:
++ return "Unknown error code";
++ }
++}
+diff --git a/grub-core/lib/argon2/argon2.h b/grub-core/lib/argon2/argon2.h
+new file mode 100644
+index 000000000..129f7efbd
+--- /dev/null
++++ b/grub-core/lib/argon2/argon2.h
+@@ -0,0 +1,264 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef ARGON2_H
++#define ARGON2_H
++
++#include <grub/misc.h>
++#include <grub/mm.h>
++
++#if defined(__cplusplus)
++extern "C" {
++#endif
++
++/* Symbols visibility control */
++#ifdef A2_VISCTL
++#define ARGON2_PUBLIC __attribute__((visibility("default")))
++#define ARGON2_LOCAL __attribute__ ((visibility ("hidden")))
++#elif defined(_MSC_VER)
++#define ARGON2_PUBLIC __declspec(dllexport)
++#define ARGON2_LOCAL
++#else
++#define ARGON2_PUBLIC
++#define ARGON2_LOCAL
++#endif
++
++/*
++ * Argon2 input parameter restrictions
++ */
++
++/* Minimum and maximum number of lanes (degree of parallelism) */
++#define ARGON2_MIN_LANES GRUB_UINT32_C(1)
++#define ARGON2_MAX_LANES GRUB_UINT32_C(0xFFFFFF)
++
++/* Minimum and maximum number of threads */
++#define ARGON2_MIN_THREADS GRUB_UINT32_C(1)
++#define ARGON2_MAX_THREADS GRUB_UINT32_C(0xFFFFFF)
++
++/* Number of synchronization points between lanes per pass */
++#define ARGON2_SYNC_POINTS GRUB_UINT32_C(4)
++
++/* Minimum and maximum digest size in bytes */
++#define ARGON2_MIN_OUTLEN GRUB_UINT32_C(4)
++#define ARGON2_MAX_OUTLEN GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum number of memory blocks (each of BLOCK_SIZE bytes) */
++#define ARGON2_MIN_MEMORY (2 * ARGON2_SYNC_POINTS) /* 2 blocks per slice */
++
++#define ARGON2_MIN(a, b) ((a) < (b) ? (a) : (b))
++/* Max memory size is addressing-space/2, topping at 2^32 blocks (4 TB) */
++#define ARGON2_MAX_MEMORY_BITS \
++ ARGON2_MIN(GRUB_UINT32_C(32), (sizeof(void *) * GRUB_CHAR_BIT - 10 - 1))
++#define ARGON2_MAX_MEMORY \
++ ARGON2_MIN(GRUB_UINT32_C(0xFFFFFFFF), GRUB_UINT64_C(1) << ARGON2_MAX_MEMORY_BITS)
++
++/* Minimum and maximum number of passes */
++#define ARGON2_MIN_TIME GRUB_UINT32_C(1)
++#define ARGON2_MAX_TIME GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum password length in bytes */
++#define ARGON2_MIN_PWD_LENGTH GRUB_UINT32_C(0)
++#define ARGON2_MAX_PWD_LENGTH GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum associated data length in bytes */
++#define ARGON2_MIN_AD_LENGTH GRUB_UINT32_C(0)
++#define ARGON2_MAX_AD_LENGTH GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum salt length in bytes */
++#define ARGON2_MIN_SALT_LENGTH GRUB_UINT32_C(8)
++#define ARGON2_MAX_SALT_LENGTH GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Minimum and maximum key length in bytes */
++#define ARGON2_MIN_SECRET GRUB_UINT32_C(0)
++#define ARGON2_MAX_SECRET GRUB_UINT32_C(0xFFFFFFFF)
++
++/* Flags to determine which fields are securely wiped (default = no wipe). */
++#define ARGON2_DEFAULT_FLAGS GRUB_UINT32_C(0)
++#define ARGON2_FLAG_CLEAR_PASSWORD (GRUB_UINT32_C(1) << 0)
++#define ARGON2_FLAG_CLEAR_SECRET (GRUB_UINT32_C(1) << 1)
++
++/* Global flag to determine if we are wiping internal memory buffers. This flag
++ * is defined in core.c and defaults to 1 (wipe internal memory). */
++extern int FLAG_clear_internal_memory;
++
++/* Error codes */
++typedef enum Argon2_ErrorCodes {
++ ARGON2_OK = 0,
++
++ ARGON2_OUTPUT_PTR_NULL = -1,
++
++ ARGON2_OUTPUT_TOO_SHORT = -2,
++ ARGON2_OUTPUT_TOO_LONG = -3,
++
++ ARGON2_PWD_TOO_SHORT = -4,
++ ARGON2_PWD_TOO_LONG = -5,
++
++ ARGON2_SALT_TOO_SHORT = -6,
++ ARGON2_SALT_TOO_LONG = -7,
++
++ ARGON2_AD_TOO_SHORT = -8,
++ ARGON2_AD_TOO_LONG = -9,
++
++ ARGON2_SECRET_TOO_SHORT = -10,
++ ARGON2_SECRET_TOO_LONG = -11,
++
++ ARGON2_TIME_TOO_SMALL = -12,
++ ARGON2_TIME_TOO_LARGE = -13,
++
++ ARGON2_MEMORY_TOO_LITTLE = -14,
++ ARGON2_MEMORY_TOO_MUCH = -15,
++
++ ARGON2_LANES_TOO_FEW = -16,
++ ARGON2_LANES_TOO_MANY = -17,
++
++ ARGON2_PWD_PTR_MISMATCH = -18, /* NULL ptr with non-zero length */
++ ARGON2_SALT_PTR_MISMATCH = -19, /* NULL ptr with non-zero length */
++ ARGON2_SECRET_PTR_MISMATCH = -20, /* NULL ptr with non-zero length */
++ ARGON2_AD_PTR_MISMATCH = -21, /* NULL ptr with non-zero length */
++
++ ARGON2_MEMORY_ALLOCATION_ERROR = -22,
++
++ ARGON2_FREE_MEMORY_CBK_NULL = -23,
++ ARGON2_ALLOCATE_MEMORY_CBK_NULL = -24,
++
++ ARGON2_INCORRECT_PARAMETER = -25,
++ ARGON2_INCORRECT_TYPE = -26,
++
++ ARGON2_OUT_PTR_MISMATCH = -27,
++
++ ARGON2_THREADS_TOO_FEW = -28,
++ ARGON2_THREADS_TOO_MANY = -29,
++
++ ARGON2_MISSING_ARGS = -30,
++
++ ARGON2_ENCODING_FAIL = -31,
++
++ ARGON2_DECODING_FAIL = -32,
++
++ ARGON2_THREAD_FAIL = -33,
++
++ ARGON2_DECODING_LENGTH_FAIL = -34,
++
++ ARGON2_VERIFY_MISMATCH = -35
++} argon2_error_codes;
++
++/* Memory allocator types --- for external allocation */
++typedef int (*allocate_fptr)(grub_uint8_t **memory, grub_size_t bytes_to_allocate);
++typedef void (*deallocate_fptr)(grub_uint8_t *memory, grub_size_t bytes_to_allocate);
++
++/* Argon2 external data structures */
++
++/*
++ *****
++ * Context: structure to hold Argon2 inputs:
++ * output array and its length,
++ * password and its length,
++ * salt and its length,
++ * secret and its length,
++ * associated data and its length,
++ * number of passes, amount of used memory (in KBytes, can be rounded up a bit)
++ * number of parallel threads that will be run.
++ * All the parameters above affect the output hash value.
++ * Additionally, two function pointers can be provided to allocate and
++ * deallocate the memory (if NULL, memory will be allocated internally).
++ * Also, three flags indicate whether to erase password, secret as soon as they
++ * are pre-hashed (and thus not needed anymore), and the entire memory
++ *****
++ * Simplest situation: you have output array out[8], password is stored in
++ * pwd[32], salt is stored in salt[16], you do not have keys nor associated
++ * data. You need to spend 1 GB of RAM and you run 5 passes of Argon2d with
++ * 4 parallel lanes.
++ * You want to erase the password, but you're OK with last pass not being
++ * erased. You want to use the default memory allocator.
++ * Then you initialize:
++ Argon2_Context(out,8,pwd,32,salt,16,NULL,0,NULL,0,5,1<<20,4,4,NULL,NULL,true,false,false,false)
++ */
++typedef struct Argon2_Context {
++ grub_uint8_t *out; /* output array */
++ grub_uint32_t outlen; /* digest length */
++
++ grub_uint8_t *pwd; /* password array */
++ grub_uint32_t pwdlen; /* password length */
++
++ grub_uint8_t *salt; /* salt array */
++ grub_uint32_t saltlen; /* salt length */
++
++ grub_uint8_t *secret; /* key array */
++ grub_uint32_t secretlen; /* key length */
++
++ grub_uint8_t *ad; /* associated data array */
++ grub_uint32_t adlen; /* associated data length */
++
++ grub_uint32_t t_cost; /* number of passes */
++ grub_uint32_t m_cost; /* amount of memory requested (KB) */
++ grub_uint32_t lanes; /* number of lanes */
++ grub_uint32_t threads; /* maximum number of threads */
++
++ grub_uint32_t version; /* version number */
++
++ allocate_fptr allocate_cbk; /* pointer to memory allocator */
++ deallocate_fptr grub_free_cbk; /* pointer to memory deallocator */
++
++ grub_uint32_t flags; /* array of bool options */
++} argon2_context;
++
++/* Argon2 primitive type */
++typedef enum Argon2_type {
++ Argon2_d = 0,
++ Argon2_i = 1,
++ Argon2_id = 2
++} argon2_type;
++
++/* Version of the algorithm */
++typedef enum Argon2_version {
++ ARGON2_VERSION_10 = 0x10,
++ ARGON2_VERSION_13 = 0x13,
++ ARGON2_VERSION_NUMBER = ARGON2_VERSION_13
++} argon2_version;
++
++/**
++ * Hashes a password with Argon2, producing a raw hash at @hash
++ * @param t_cost Number of iterations
++ * @param m_cost Sets memory usage to m_cost kibibytes
++ * @param parallelism Number of threads and compute lanes
++ * @param pwd Pointer to password
++ * @param pwdlen Password size in bytes
++ * @param salt Pointer to salt
++ * @param saltlen Salt size in bytes
++ * @param hash Buffer where to write the raw hash - updated by the function
++ * @param hashlen Desired length of the hash in bytes
++ * @pre Different parallelism levels will give different results
++ * @pre Returns ARGON2_OK if successful
++ */
++ARGON2_PUBLIC int argon2_hash(const grub_uint32_t t_cost, const grub_uint32_t m_cost,
++ const grub_uint32_t parallelism, const void *pwd,
++ const grub_size_t pwdlen, const void *salt,
++ const grub_size_t saltlen, void *hash,
++ const grub_size_t hashlen, argon2_type type,
++ const grub_uint32_t version);
++
++/**
++ * Get the associated error message for given error code
++ * @return The error message associated with the given error code
++ */
++ARGON2_PUBLIC const char *argon2_error_message(int error_code);
++
++#if defined(__cplusplus)
++}
++#endif
++
++#endif
+diff --git a/grub-core/lib/argon2/blake2/blake2-impl.h b/grub-core/lib/argon2/blake2/blake2-impl.h
+new file mode 100644
+index 000000000..3a795680b
+--- /dev/null
++++ b/grub-core/lib/argon2/blake2/blake2-impl.h
+@@ -0,0 +1,151 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef PORTABLE_BLAKE2_IMPL_H
++#define PORTABLE_BLAKE2_IMPL_H
++
++#if defined(_MSC_VER)
++#define BLAKE2_INLINE __inline
++#elif defined(__GNUC__) || defined(__clang__)
++#define BLAKE2_INLINE __inline__
++#else
++#define BLAKE2_INLINE
++#endif
++
++/* Argon2 Team - Begin Code */
++/*
++ Not an exhaustive list, but should cover the majority of modern platforms
++ Additionally, the code will always be correct---this is only a performance
++ tweak.
++*/
++#if (defined(__BYTE_ORDER__) && \
++ (__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__)) || \
++ defined(__LITTLE_ENDIAN__) || defined(__ARMEL__) || defined(__MIPSEL__) || \
++ defined(__AARCH64EL__) || defined(__amd64__) || defined(__i386__) || \
++ defined(_M_IX86) || defined(_M_X64) || defined(_M_AMD64) || \
++ defined(_M_ARM)
++#define NATIVE_LITTLE_ENDIAN
++#endif
++/* Argon2 Team - End Code */
++
++static BLAKE2_INLINE grub_uint32_t load32(const void *src) {
++#if defined(NATIVE_LITTLE_ENDIAN)
++ grub_uint32_t w;
++ grub_memcpy(&w, src, sizeof w);
++ return w;
++#else
++ const grub_uint8_t *p = (const grub_uint8_t *)src;
++ grub_uint32_t w = *p++;
++ w |= (grub_uint32_t)(*p++) << 8;
++ w |= (grub_uint32_t)(*p++) << 16;
++ w |= (grub_uint32_t)(*p++) << 24;
++ return w;
++#endif
++}
++
++static BLAKE2_INLINE grub_uint64_t load64(const void *src) {
++#if defined(NATIVE_LITTLE_ENDIAN)
++ grub_uint64_t w;
++ grub_memcpy(&w, src, sizeof w);
++ return w;
++#else
++ const grub_uint8_t *p = (const grub_uint8_t *)src;
++ grub_uint64_t w = *p++;
++ w |= (grub_uint64_t)(*p++) << 8;
++ w |= (grub_uint64_t)(*p++) << 16;
++ w |= (grub_uint64_t)(*p++) << 24;
++ w |= (grub_uint64_t)(*p++) << 32;
++ w |= (grub_uint64_t)(*p++) << 40;
++ w |= (grub_uint64_t)(*p++) << 48;
++ w |= (grub_uint64_t)(*p++) << 56;
++ return w;
++#endif
++}
++
++static BLAKE2_INLINE void store32(void *dst, grub_uint32_t w) {
++#if defined(NATIVE_LITTLE_ENDIAN)
++ grub_memcpy(dst, &w, sizeof w);
++#else
++ grub_uint8_t *p = (grub_uint8_t *)dst;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++#endif
++}
++
++static BLAKE2_INLINE void store64(void *dst, grub_uint64_t w) {
++#if defined(NATIVE_LITTLE_ENDIAN)
++ grub_memcpy(dst, &w, sizeof w);
++#else
++ grub_uint8_t *p = (grub_uint8_t *)dst;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++#endif
++}
++
++static BLAKE2_INLINE grub_uint64_t load48(const void *src) {
++ const grub_uint8_t *p = (const grub_uint8_t *)src;
++ grub_uint64_t w = *p++;
++ w |= (grub_uint64_t)(*p++) << 8;
++ w |= (grub_uint64_t)(*p++) << 16;
++ w |= (grub_uint64_t)(*p++) << 24;
++ w |= (grub_uint64_t)(*p++) << 32;
++ w |= (grub_uint64_t)(*p++) << 40;
++ return w;
++}
++
++static BLAKE2_INLINE void store48(void *dst, grub_uint64_t w) {
++ grub_uint8_t *p = (grub_uint8_t *)dst;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++ w >>= 8;
++ *p++ = (grub_uint8_t)w;
++}
++
++static BLAKE2_INLINE grub_uint32_t rotr32(const grub_uint32_t w, const unsigned c) {
++ return (w >> c) | (w << (32 - c));
++}
++
++static BLAKE2_INLINE grub_uint64_t rotr64(const grub_uint64_t w, const unsigned c) {
++ return (w >> c) | (w << (64 - c));
++}
++
++#endif
+diff --git a/grub-core/lib/argon2/blake2/blake2.h b/grub-core/lib/argon2/blake2/blake2.h
+new file mode 100644
+index 000000000..4e8efeb22
+--- /dev/null
++++ b/grub-core/lib/argon2/blake2/blake2.h
+@@ -0,0 +1,89 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef PORTABLE_BLAKE2_H
++#define PORTABLE_BLAKE2_H
++
++#include "../argon2.h"
++
++#if defined(__cplusplus)
++extern "C" {
++#endif
++
++enum blake2b_constant {
++ BLAKE2B_BLOCKBYTES = 128,
++ BLAKE2B_OUTBYTES = 64,
++ BLAKE2B_KEYBYTES = 64,
++ BLAKE2B_SALTBYTES = 16,
++ BLAKE2B_PERSONALBYTES = 16
++};
++
++#pragma pack(push, 1)
++typedef struct __blake2b_param {
++ grub_uint8_t digest_length; /* 1 */
++ grub_uint8_t key_length; /* 2 */
++ grub_uint8_t fanout; /* 3 */
++ grub_uint8_t depth; /* 4 */
++ grub_uint32_t leaf_length; /* 8 */
++ grub_uint64_t node_offset; /* 16 */
++ grub_uint8_t node_depth; /* 17 */
++ grub_uint8_t inner_length; /* 18 */
++ grub_uint8_t reserved[14]; /* 32 */
++ grub_uint8_t salt[BLAKE2B_SALTBYTES]; /* 48 */
++ grub_uint8_t personal[BLAKE2B_PERSONALBYTES]; /* 64 */
++} blake2b_param;
++#pragma pack(pop)
++
++typedef struct __blake2b_state {
++ grub_uint64_t h[8];
++ grub_uint64_t t[2];
++ grub_uint64_t f[2];
++ grub_uint8_t buf[BLAKE2B_BLOCKBYTES];
++ unsigned buflen;
++ unsigned outlen;
++ grub_uint8_t last_node;
++} blake2b_state;
++
++/* Ensure param structs have not been wrongly padded */
++/* Poor man's static_assert */
++enum {
++ blake2_size_check_0 = 1 / !!(GRUB_CHAR_BIT == 8),
++ blake2_size_check_2 =
++ 1 / !!(sizeof(blake2b_param) == sizeof(grub_uint64_t) * GRUB_CHAR_BIT)
++};
++
++/* Streaming API */
++ARGON2_LOCAL int blake2b_init(blake2b_state *S, grub_size_t outlen);
++ARGON2_LOCAL int blake2b_init_key(blake2b_state *S, grub_size_t outlen, const void *key,
++ grub_size_t keylen);
++ARGON2_LOCAL int blake2b_init_param(blake2b_state *S, const blake2b_param *P);
++ARGON2_LOCAL int blake2b_update(blake2b_state *S, const void *in, grub_size_t inlen);
++ARGON2_LOCAL int blake2b_final(blake2b_state *S, void *out, grub_size_t outlen);
++
++/* Simple API */
++ARGON2_LOCAL int blake2b(void *out, grub_size_t outlen, const void *in, grub_size_t inlen,
++ const void *key, grub_size_t keylen);
++
++/* Argon2 Team - Begin Code */
++ARGON2_LOCAL int blake2b_long(void *out, grub_size_t outlen, const void *in, grub_size_t inlen);
++/* Argon2 Team - End Code */
++
++#if defined(__cplusplus)
++}
++#endif
++
++#endif
+diff --git a/grub-core/lib/argon2/blake2/blake2b.c b/grub-core/lib/argon2/blake2/blake2b.c
+new file mode 100644
+index 000000000..53abd7bef
+--- /dev/null
++++ b/grub-core/lib/argon2/blake2/blake2b.c
+@@ -0,0 +1,388 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#include "blake2.h"
++#include "blake2-impl.h"
++
++static const grub_uint64_t blake2b_IV[8] = {
++ GRUB_UINT64_C(0x6a09e667f3bcc908), GRUB_UINT64_C(0xbb67ae8584caa73b),
++ GRUB_UINT64_C(0x3c6ef372fe94f82b), GRUB_UINT64_C(0xa54ff53a5f1d36f1),
++ GRUB_UINT64_C(0x510e527fade682d1), GRUB_UINT64_C(0x9b05688c2b3e6c1f),
++ GRUB_UINT64_C(0x1f83d9abfb41bd6b), GRUB_UINT64_C(0x5be0cd19137e2179)};
++
++static const unsigned int blake2b_sigma[12][16] = {
++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15},
++ {14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3},
++ {11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4},
++ {7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8},
++ {9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13},
++ {2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9},
++ {12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11},
++ {13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10},
++ {6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5},
++ {10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0},
++ {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15},
++ {14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3},
++};
++
++void clear_internal_memory(void *v, grub_size_t n);
++
++static BLAKE2_INLINE void blake2b_set_lastnode(blake2b_state *S) {
++ S->f[1] = (grub_uint64_t)-1;
++}
++
++static BLAKE2_INLINE void blake2b_set_lastblock(blake2b_state *S) {
++ if (S->last_node) {
++ blake2b_set_lastnode(S);
++ }
++ S->f[0] = (grub_uint64_t)-1;
++}
++
++static BLAKE2_INLINE void blake2b_increment_counter(blake2b_state *S,
++ grub_uint64_t inc) {
++ S->t[0] += inc;
++ S->t[1] += (S->t[0] < inc);
++}
++
++static BLAKE2_INLINE void blake2b_invalidate_state(blake2b_state *S) {
++ clear_internal_memory(S, sizeof(*S)); /* wipe */
++ blake2b_set_lastblock(S); /* invalidate for further use */
++}
++
++static BLAKE2_INLINE void blake2b_init0(blake2b_state *S) {
++ grub_memset(S, 0, sizeof(*S));
++ grub_memcpy(S->h, blake2b_IV, sizeof(S->h));
++}
++
++int blake2b_init_param(blake2b_state *S, const blake2b_param *P) {
++ const unsigned char *p = (const unsigned char *)P;
++ unsigned int i;
++
++ if (NULL == P || NULL == S) {
++ return -1;
++ }
++
++ blake2b_init0(S);
++ /* IV XOR Parameter Block */
++ for (i = 0; i < 8; ++i) {
++ S->h[i] ^= load64(&p[i * sizeof(S->h[i])]);
++ }
++ S->outlen = P->digest_length;
++ return 0;
++}
++
++/* Sequential blake2b initialization */
++int blake2b_init(blake2b_state *S, grub_size_t outlen) {
++ blake2b_param P;
++
++ if (S == NULL) {
++ return -1;
++ }
++
++ if ((outlen == 0) || (outlen > BLAKE2B_OUTBYTES)) {
++ blake2b_invalidate_state(S);
++ return -1;
++ }
++
++ /* Setup Parameter Block for unkeyed BLAKE2 */
++ P.digest_length = (grub_uint8_t)outlen;
++ P.key_length = 0;
++ P.fanout = 1;
++ P.depth = 1;
++ P.leaf_length = 0;
++ P.node_offset = 0;
++ P.node_depth = 0;
++ P.inner_length = 0;
++ grub_memset(P.reserved, 0, sizeof(P.reserved));
++ grub_memset(P.salt, 0, sizeof(P.salt));
++ grub_memset(P.personal, 0, sizeof(P.personal));
++
++ return blake2b_init_param(S, &P);
++}
++
++int blake2b_init_key(blake2b_state *S, grub_size_t outlen, const void *key,
++ grub_size_t keylen) {
++ blake2b_param P;
++
++ if (S == NULL) {
++ return -1;
++ }
++
++ if ((outlen == 0) || (outlen > BLAKE2B_OUTBYTES)) {
++ blake2b_invalidate_state(S);
++ return -1;
++ }
++
++ if ((key == 0) || (keylen == 0) || (keylen > BLAKE2B_KEYBYTES)) {
++ blake2b_invalidate_state(S);
++ return -1;
++ }
++
++ /* Setup Parameter Block for keyed BLAKE2 */
++ P.digest_length = (grub_uint8_t)outlen;
++ P.key_length = (grub_uint8_t)keylen;
++ P.fanout = 1;
++ P.depth = 1;
++ P.leaf_length = 0;
++ P.node_offset = 0;
++ P.node_depth = 0;
++ P.inner_length = 0;
++ grub_memset(P.reserved, 0, sizeof(P.reserved));
++ grub_memset(P.salt, 0, sizeof(P.salt));
++ grub_memset(P.personal, 0, sizeof(P.personal));
++
++ if (blake2b_init_param(S, &P) < 0) {
++ blake2b_invalidate_state(S);
++ return -1;
++ }
++
++ {
++ grub_uint8_t block[BLAKE2B_BLOCKBYTES];
++ grub_memset(block, 0, BLAKE2B_BLOCKBYTES);
++ grub_memcpy(block, key, keylen);
++ blake2b_update(S, block, BLAKE2B_BLOCKBYTES);
++ /* Burn the key from stack */
++ clear_internal_memory(block, BLAKE2B_BLOCKBYTES);
++ }
++ return 0;
++}
++
++static void blake2b_compress(blake2b_state *S, const grub_uint8_t *block) {
++ grub_uint64_t m[16];
++ grub_uint64_t v[16];
++ unsigned int i, r;
++
++ for (i = 0; i < 16; ++i) {
++ m[i] = load64(block + i * sizeof(m[i]));
++ }
++
++ for (i = 0; i < 8; ++i) {
++ v[i] = S->h[i];
++ }
++
++ v[8] = blake2b_IV[0];
++ v[9] = blake2b_IV[1];
++ v[10] = blake2b_IV[2];
++ v[11] = blake2b_IV[3];
++ v[12] = blake2b_IV[4] ^ S->t[0];
++ v[13] = blake2b_IV[5] ^ S->t[1];
++ v[14] = blake2b_IV[6] ^ S->f[0];
++ v[15] = blake2b_IV[7] ^ S->f[1];
++
++#define G(r, i, a, b, c, d) \
++ do { \
++ a = a + b + m[blake2b_sigma[r][2 * i + 0]]; \
++ d = rotr64(d ^ a, 32); \
++ c = c + d; \
++ b = rotr64(b ^ c, 24); \
++ a = a + b + m[blake2b_sigma[r][2 * i + 1]]; \
++ d = rotr64(d ^ a, 16); \
++ c = c + d; \
++ b = rotr64(b ^ c, 63); \
++ } while ((void)0, 0)
++
++#define ROUND(r) \
++ do { \
++ G(r, 0, v[0], v[4], v[8], v[12]); \
++ G(r, 1, v[1], v[5], v[9], v[13]); \
++ G(r, 2, v[2], v[6], v[10], v[14]); \
++ G(r, 3, v[3], v[7], v[11], v[15]); \
++ G(r, 4, v[0], v[5], v[10], v[15]); \
++ G(r, 5, v[1], v[6], v[11], v[12]); \
++ G(r, 6, v[2], v[7], v[8], v[13]); \
++ G(r, 7, v[3], v[4], v[9], v[14]); \
++ } while ((void)0, 0)
++
++ for (r = 0; r < 12; ++r) {
++ ROUND(r);
++ }
++
++ for (i = 0; i < 8; ++i) {
++ S->h[i] = S->h[i] ^ v[i] ^ v[i + 8];
++ }
++
++#undef G
++#undef ROUND
++}
++
++int blake2b_update(blake2b_state *S, const void *in, grub_size_t inlen) {
++ const grub_uint8_t *pin = (const grub_uint8_t *)in;
++
++ if (inlen == 0) {
++ return 0;
++ }
++
++ /* Sanity check */
++ if (S == NULL || in == NULL) {
++ return -1;
++ }
++
++ /* Is this a reused state? */
++ if (S->f[0] != 0) {
++ return -1;
++ }
++
++ if (S->buflen + inlen > BLAKE2B_BLOCKBYTES) {
++ /* Complete current block */
++ grub_size_t left = S->buflen;
++ grub_size_t fill = BLAKE2B_BLOCKBYTES - left;
++ grub_memcpy(&S->buf[left], pin, fill);
++ blake2b_increment_counter(S, BLAKE2B_BLOCKBYTES);
++ blake2b_compress(S, S->buf);
++ S->buflen = 0;
++ inlen -= fill;
++ pin += fill;
++ /* Avoid buffer copies when possible */
++ while (inlen > BLAKE2B_BLOCKBYTES) {
++ blake2b_increment_counter(S, BLAKE2B_BLOCKBYTES);
++ blake2b_compress(S, pin);
++ inlen -= BLAKE2B_BLOCKBYTES;
++ pin += BLAKE2B_BLOCKBYTES;
++ }
++ }
++ grub_memcpy(&S->buf[S->buflen], pin, inlen);
++ S->buflen += (unsigned int)inlen;
++ return 0;
++}
++
++int blake2b_final(blake2b_state *S, void *out, grub_size_t outlen) {
++ grub_uint8_t buffer[BLAKE2B_OUTBYTES] = {0};
++ unsigned int i;
++
++ /* Sanity checks */
++ if (S == NULL || out == NULL || outlen < S->outlen) {
++ return -1;
++ }
++
++ /* Is this a reused state? */
++ if (S->f[0] != 0) {
++ return -1;
++ }
++
++ blake2b_increment_counter(S, S->buflen);
++ blake2b_set_lastblock(S);
++ grub_memset(&S->buf[S->buflen], 0, BLAKE2B_BLOCKBYTES - S->buflen); /* Padding */
++ blake2b_compress(S, S->buf);
++
++ for (i = 0; i < 8; ++i) { /* Output full hash to temp buffer */
++ store64(buffer + sizeof(S->h[i]) * i, S->h[i]);
++ }
++
++ grub_memcpy(out, buffer, S->outlen);
++ clear_internal_memory(buffer, sizeof(buffer));
++ clear_internal_memory(S->buf, sizeof(S->buf));
++ clear_internal_memory(S->h, sizeof(S->h));
++ return 0;
++}
++
++int blake2b(void *out, grub_size_t outlen, const void *in, grub_size_t inlen,
++ const void *key, grub_size_t keylen) {
++ blake2b_state S;
++ int ret = -1;
++
++ /* Verify parameters */
++ if (NULL == in && inlen > 0) {
++ goto fail;
++ }
++
++ if (NULL == out || outlen == 0 || outlen > BLAKE2B_OUTBYTES) {
++ goto fail;
++ }
++
++ if ((NULL == key && keylen > 0) || keylen > BLAKE2B_KEYBYTES) {
++ goto fail;
++ }
++
++ if (keylen > 0) {
++ if (blake2b_init_key(&S, outlen, key, keylen) < 0) {
++ goto fail;
++ }
++ } else {
++ if (blake2b_init(&S, outlen) < 0) {
++ goto fail;
++ }
++ }
++
++ if (blake2b_update(&S, in, inlen) < 0) {
++ goto fail;
++ }
++ ret = blake2b_final(&S, out, outlen);
++
++fail:
++ clear_internal_memory(&S, sizeof(S));
++ return ret;
++}
++
++/* Argon2 Team - Begin Code */
++int blake2b_long(void *pout, grub_size_t outlen, const void *in, grub_size_t inlen) {
++ grub_uint8_t *out = (grub_uint8_t *)pout;
++ blake2b_state blake_state;
++ grub_uint8_t outlen_bytes[sizeof(grub_uint32_t)] = {0};
++ int ret = -1;
++
++ if (outlen > GRUB_UINT32_MAX) {
++ goto fail;
++ }
++
++ /* Ensure little-endian byte order! */
++ store32(outlen_bytes, (grub_uint32_t)outlen);
++
++#define TRY(statement) \
++ do { \
++ ret = statement; \
++ if (ret < 0) { \
++ goto fail; \
++ } \
++ } while ((void)0, 0)
++
++ if (outlen <= BLAKE2B_OUTBYTES) {
++ TRY(blake2b_init(&blake_state, outlen));
++ TRY(blake2b_update(&blake_state, outlen_bytes, sizeof(outlen_bytes)));
++ TRY(blake2b_update(&blake_state, in, inlen));
++ TRY(blake2b_final(&blake_state, out, outlen));
++ } else {
++ grub_uint32_t toproduce;
++ grub_uint8_t out_buffer[BLAKE2B_OUTBYTES];
++ grub_uint8_t in_buffer[BLAKE2B_OUTBYTES];
++ TRY(blake2b_init(&blake_state, BLAKE2B_OUTBYTES));
++ TRY(blake2b_update(&blake_state, outlen_bytes, sizeof(outlen_bytes)));
++ TRY(blake2b_update(&blake_state, in, inlen));
++ TRY(blake2b_final(&blake_state, out_buffer, BLAKE2B_OUTBYTES));
++ grub_memcpy(out, out_buffer, BLAKE2B_OUTBYTES / 2);
++ out += BLAKE2B_OUTBYTES / 2;
++ toproduce = (grub_uint32_t)outlen - BLAKE2B_OUTBYTES / 2;
++
++ while (toproduce > BLAKE2B_OUTBYTES) {
++ grub_memcpy(in_buffer, out_buffer, BLAKE2B_OUTBYTES);
++ TRY(blake2b(out_buffer, BLAKE2B_OUTBYTES, in_buffer,
++ BLAKE2B_OUTBYTES, NULL, 0));
++ grub_memcpy(out, out_buffer, BLAKE2B_OUTBYTES / 2);
++ out += BLAKE2B_OUTBYTES / 2;
++ toproduce -= BLAKE2B_OUTBYTES / 2;
++ }
++
++ grub_memcpy(in_buffer, out_buffer, BLAKE2B_OUTBYTES);
++ TRY(blake2b(out_buffer, toproduce, in_buffer, BLAKE2B_OUTBYTES, NULL,
++ 0));
++ grub_memcpy(out, out_buffer, toproduce);
++ }
++fail:
++ clear_internal_memory(&blake_state, sizeof(blake_state));
++ return ret;
++#undef TRY
++}
++/* Argon2 Team - End Code */
+diff --git a/grub-core/lib/argon2/blake2/blamka-round-ref.h b/grub-core/lib/argon2/blake2/blamka-round-ref.h
+new file mode 100644
+index 000000000..7f0071ada
+--- /dev/null
++++ b/grub-core/lib/argon2/blake2/blamka-round-ref.h
+@@ -0,0 +1,56 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef BLAKE_ROUND_MKA_H
++#define BLAKE_ROUND_MKA_H
++
++#include "blake2.h"
++#include "blake2-impl.h"
++
++/* designed by the Lyra PHC team */
++static BLAKE2_INLINE grub_uint64_t fBlaMka(grub_uint64_t x, grub_uint64_t y) {
++ const grub_uint64_t m = GRUB_UINT64_C(0xFFFFFFFF);
++ const grub_uint64_t xy = (x & m) * (y & m);
++ return x + y + 2 * xy;
++}
++
++#define G(a, b, c, d) \
++ do { \
++ a = fBlaMka(a, b); \
++ d = rotr64(d ^ a, 32); \
++ c = fBlaMka(c, d); \
++ b = rotr64(b ^ c, 24); \
++ a = fBlaMka(a, b); \
++ d = rotr64(d ^ a, 16); \
++ c = fBlaMka(c, d); \
++ b = rotr64(b ^ c, 63); \
++ } while ((void)0, 0)
++
++#define BLAKE2_ROUND_NOMSG(v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11, \
++ v12, v13, v14, v15) \
++ do { \
++ G(v0, v4, v8, v12); \
++ G(v1, v5, v9, v13); \
++ G(v2, v6, v10, v14); \
++ G(v3, v7, v11, v15); \
++ G(v0, v5, v10, v15); \
++ G(v1, v6, v11, v12); \
++ G(v2, v7, v8, v13); \
++ G(v3, v4, v9, v14); \
++ } while ((void)0, 0)
++
++#endif
+diff --git a/grub-core/lib/argon2/core.c b/grub-core/lib/argon2/core.c
+new file mode 100644
+index 000000000..0fe5b74cb
+--- /dev/null
++++ b/grub-core/lib/argon2/core.c
+@@ -0,0 +1,506 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++/*For memory wiping*/
++#ifdef _MSC_VER
++#include <windows.h>
++#include <winbase.h> /* For SecureZeroMemory */
++#endif
++#if defined __STDC_LIB_EXT1__
++#define __STDC_WANT_LIB_EXT1__ 1
++#endif
++#define VC_GE_2005(version) (version >= 1400)
++
++#include "core.h"
++#include "blake2/blake2.h"
++#include "blake2/blake2-impl.h"
++
++#ifdef GENKAT
++#include "genkat.h"
++#endif
++
++#if defined(__clang__)
++#if __has_attribute(optnone)
++#define NOT_OPTIMIZED __attribute__((optnone))
++#endif
++#elif defined(__GNUC__)
++#define GCC_VERSION \
++ (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__)
++#if GCC_VERSION >= 40400
++#define NOT_OPTIMIZED __attribute__((optimize("O0")))
++#endif
++#endif
++#ifndef NOT_OPTIMIZED
++#define NOT_OPTIMIZED
++#endif
++
++/***************Instance and Position constructors**********/
++void init_block_value(block *b, grub_uint8_t in) { grub_memset(b->v, in, sizeof(b->v)); }
++
++void copy_block(block *dst, const block *src) {
++ grub_memcpy(dst->v, src->v, sizeof(grub_uint64_t) * ARGON2_QWORDS_IN_BLOCK);
++}
++
++void xor_block(block *dst, const block *src) {
++ int i;
++ for (i = 0; i < ARGON2_QWORDS_IN_BLOCK; ++i) {
++ dst->v[i] ^= src->v[i];
++ }
++}
++
++static void load_block(block *dst, const void *input) {
++ unsigned i;
++ for (i = 0; i < ARGON2_QWORDS_IN_BLOCK; ++i) {
++ dst->v[i] = load64((const grub_uint8_t *)input + i * sizeof(dst->v[i]));
++ }
++}
++
++static void store_block(void *output, const block *src) {
++ unsigned i;
++ for (i = 0; i < ARGON2_QWORDS_IN_BLOCK; ++i) {
++ store64((grub_uint8_t *)output + i * sizeof(src->v[i]), src->v[i]);
++ }
++}
++
++/***************Memory functions*****************/
++
++int allocate_memory(const argon2_context *context, grub_uint8_t **memory,
++ grub_size_t num, grub_size_t size) {
++ grub_size_t memory_size = num*size;
++ if (memory == NULL) {
++ return ARGON2_MEMORY_ALLOCATION_ERROR;
++ }
++
++ /* 1. Check for multiplication overflow */
++ if (size != 0 && memory_size / size != num) {
++ return ARGON2_MEMORY_ALLOCATION_ERROR;
++ }
++
++ /* 2. Try to allocate with appropriate allocator */
++ if (context->allocate_cbk) {
++ (context->allocate_cbk)(memory, memory_size);
++ } else {
++ *memory = grub_malloc(memory_size);
++ }
++
++ if (*memory == NULL) {
++ return ARGON2_MEMORY_ALLOCATION_ERROR;
++ }
++
++ return ARGON2_OK;
++}
++
++void grub_free_memory(const argon2_context *context, grub_uint8_t *memory,
++ grub_size_t num, grub_size_t size) {
++ grub_size_t memory_size = num*size;
++ clear_internal_memory(memory, memory_size);
++ if (context->grub_free_cbk) {
++ (context->grub_free_cbk)(memory, memory_size);
++ } else {
++ grub_free(memory);
++ }
++}
++
++void NOT_OPTIMIZED secure_wipe_memory(void *v, grub_size_t n) {
++ static void *(*const volatile grub_memset_sec)(void *, int, grub_size_t) = &grub_memset;
++ grub_memset_sec(v, 0, n);
++}
++
++/* Memory clear flag defaults to true. */
++int FLAG_clear_internal_memory = 1;
++void clear_internal_memory(void *v, grub_size_t n) {
++ if (FLAG_clear_internal_memory && v) {
++ secure_wipe_memory(v, n);
++ }
++}
++
++void finalize(const argon2_context *context, argon2_instance_t *instance) {
++ if (context != NULL && instance != NULL) {
++ block blockhash;
++ grub_uint32_t l;
++
++ copy_block(&blockhash, instance->memory + instance->lane_length - 1);
++
++ /* XOR the last blocks */
++ for (l = 1; l < instance->lanes; ++l) {
++ grub_uint32_t last_block_in_lane =
++ l * instance->lane_length + (instance->lane_length - 1);
++ xor_block(&blockhash, instance->memory + last_block_in_lane);
++ }
++
++ /* Hash the result */
++ {
++ grub_uint8_t blockhash_bytes[ARGON2_BLOCK_SIZE];
++ store_block(blockhash_bytes, &blockhash);
++ blake2b_long(context->out, context->outlen, blockhash_bytes,
++ ARGON2_BLOCK_SIZE);
++ /* clear blockhash and blockhash_bytes */
++ clear_internal_memory(blockhash.v, ARGON2_BLOCK_SIZE);
++ clear_internal_memory(blockhash_bytes, ARGON2_BLOCK_SIZE);
++ }
++
++#ifdef GENKAT
++ print_tag(context->out, context->outlen);
++#endif
++
++ grub_free_memory(context, (grub_uint8_t *)instance->memory,
++ instance->memory_blocks, sizeof(block));
++ }
++}
++
++grub_uint32_t index_alpha(const argon2_instance_t *instance,
++ const argon2_position_t *position, grub_uint32_t pseudo_rand,
++ int same_lane) {
++ /*
++ * Pass 0:
++ * This lane : all already finished segments plus already constructed
++ * blocks in this segment
++ * Other lanes : all already finished segments
++ * Pass 1+:
++ * This lane : (SYNC_POINTS - 1) last segments plus already constructed
++ * blocks in this segment
++ * Other lanes : (SYNC_POINTS - 1) last segments
++ */
++ grub_uint32_t reference_area_size;
++ grub_uint64_t relative_position;
++ grub_uint64_t start_position, absolute_position;
++
++ if (0 == position->pass) {
++ /* First pass */
++ if (0 == position->slice) {
++ /* First slice */
++ reference_area_size =
++ position->index - 1; /* all but the previous */
++ } else {
++ if (same_lane) {
++ /* The same lane => add current segment */
++ reference_area_size =
++ position->slice * instance->segment_length +
++ position->index - 1;
++ } else {
++ reference_area_size =
++ position->slice * instance->segment_length +
++ ((position->index == 0) ? (-1) : 0);
++ }
++ }
++ } else {
++ /* Second pass */
++ if (same_lane) {
++ reference_area_size = instance->lane_length -
++ instance->segment_length + position->index -
++ 1;
++ } else {
++ reference_area_size = instance->lane_length -
++ instance->segment_length +
++ ((position->index == 0) ? (-1) : 0);
++ }
++ }
++
++ /* 1.2.4. Mapping pseudo_rand to 0..<reference_area_size-1> and produce
++ * relative position */
++ relative_position = pseudo_rand;
++ relative_position = relative_position * relative_position >> 32;
++ relative_position = reference_area_size - 1 -
++ (reference_area_size * relative_position >> 32);
++
++ /* 1.2.5 Computing starting position */
++ start_position = 0;
++
++ if (0 != position->pass) {
++ start_position = (position->slice == ARGON2_SYNC_POINTS - 1)
++ ? 0
++ : (position->slice + 1) * instance->segment_length;
++ }
++
++ /* 1.2.6. Computing absolute position */
++ grub_divmod64 (start_position + relative_position, instance->lane_length,
++ &absolute_position); /* absolute position */
++ return absolute_position;
++}
++
++/* Single-threaded version for p=1 case */
++static int fill_memory_blocks_st(argon2_instance_t *instance) {
++ grub_uint32_t r, s, l;
++
++ for (r = 0; r < instance->passes; ++r) {
++ for (s = 0; s < ARGON2_SYNC_POINTS; ++s) {
++ for (l = 0; l < instance->lanes; ++l) {
++ argon2_position_t position = {r, l, (grub_uint8_t)s, 0};
++ fill_segment(instance, position);
++ }
++ }
++#ifdef GENKAT
++ internal_kat(instance, r); /* Print all memory blocks */
++#endif
++ }
++ return ARGON2_OK;
++}
++
++int fill_memory_blocks(argon2_instance_t *instance) {
++ if (instance == NULL || instance->lanes == 0) {
++ return ARGON2_INCORRECT_PARAMETER;
++ }
++ return fill_memory_blocks_st(instance);
++}
++
++int validate_inputs(const argon2_context *context) {
++ if (NULL == context) {
++ return ARGON2_INCORRECT_PARAMETER;
++ }
++
++ if (NULL == context->out) {
++ return ARGON2_OUTPUT_PTR_NULL;
++ }
++
++ /* Validate output length */
++ if (ARGON2_MIN_OUTLEN > context->outlen) {
++ return ARGON2_OUTPUT_TOO_SHORT;
++ }
++
++ if (ARGON2_MAX_OUTLEN < context->outlen) {
++ return ARGON2_OUTPUT_TOO_LONG;
++ }
++
++ /* Validate password (required param) */
++ if (NULL == context->pwd) {
++ if (0 != context->pwdlen) {
++ return ARGON2_PWD_PTR_MISMATCH;
++ }
++ }
++
++ if (ARGON2_MAX_PWD_LENGTH < context->pwdlen) {
++ return ARGON2_PWD_TOO_LONG;
++ }
++
++ /* Validate salt (required param) */
++ if (NULL == context->salt) {
++ if (0 != context->saltlen) {
++ return ARGON2_SALT_PTR_MISMATCH;
++ }
++ }
++
++ if (ARGON2_MIN_SALT_LENGTH > context->saltlen) {
++ return ARGON2_SALT_TOO_SHORT;
++ }
++
++ if (ARGON2_MAX_SALT_LENGTH < context->saltlen) {
++ return ARGON2_SALT_TOO_LONG;
++ }
++
++ /* Validate secret (optional param) */
++ if (NULL == context->secret) {
++ if (0 != context->secretlen) {
++ return ARGON2_SECRET_PTR_MISMATCH;
++ }
++ } else {
++ if (ARGON2_MAX_SECRET < context->secretlen) {
++ return ARGON2_SECRET_TOO_LONG;
++ }
++ }
++
++ /* Validate associated data (optional param) */
++ if (NULL == context->ad) {
++ if (0 != context->adlen) {
++ return ARGON2_AD_PTR_MISMATCH;
++ }
++ } else {
++ if (ARGON2_MAX_AD_LENGTH < context->adlen) {
++ return ARGON2_AD_TOO_LONG;
++ }
++ }
++
++ /* Validate memory cost */
++ if (ARGON2_MIN_MEMORY > context->m_cost) {
++ return ARGON2_MEMORY_TOO_LITTLE;
++ }
++
++ if (context->m_cost < 8 * context->lanes) {
++ return ARGON2_MEMORY_TOO_LITTLE;
++ }
++
++ /* Validate time cost */
++ if (ARGON2_MIN_TIME > context->t_cost) {
++ return ARGON2_TIME_TOO_SMALL;
++ }
++
++ if (ARGON2_MAX_TIME < context->t_cost) {
++ return ARGON2_TIME_TOO_LARGE;
++ }
++
++ /* Validate lanes */
++ if (ARGON2_MIN_LANES > context->lanes) {
++ return ARGON2_LANES_TOO_FEW;
++ }
++
++ if (ARGON2_MAX_LANES < context->lanes) {
++ return ARGON2_LANES_TOO_MANY;
++ }
++
++ /* Validate threads */
++ if (ARGON2_MIN_THREADS > context->threads) {
++ return ARGON2_THREADS_TOO_FEW;
++ }
++
++ if (ARGON2_MAX_THREADS < context->threads) {
++ return ARGON2_THREADS_TOO_MANY;
++ }
++
++ if (NULL != context->allocate_cbk && NULL == context->grub_free_cbk) {
++ return ARGON2_FREE_MEMORY_CBK_NULL;
++ }
++
++ if (NULL == context->allocate_cbk && NULL != context->grub_free_cbk) {
++ return ARGON2_ALLOCATE_MEMORY_CBK_NULL;
++ }
++
++ return ARGON2_OK;
++}
++
++void fill_first_blocks(grub_uint8_t *blockhash, const argon2_instance_t *instance) {
++ grub_uint32_t l;
++ /* Make the first and second block in each lane as G(H0||0||i) or
++ G(H0||1||i) */
++ grub_uint8_t blockhash_bytes[ARGON2_BLOCK_SIZE];
++ for (l = 0; l < instance->lanes; ++l) {
++
++ store32(blockhash + ARGON2_PREHASH_DIGEST_LENGTH, 0);
++ store32(blockhash + ARGON2_PREHASH_DIGEST_LENGTH + 4, l);
++ blake2b_long(blockhash_bytes, ARGON2_BLOCK_SIZE, blockhash,
++ ARGON2_PREHASH_SEED_LENGTH);
++ load_block(&instance->memory[l * instance->lane_length + 0],
++ blockhash_bytes);
++
++ store32(blockhash + ARGON2_PREHASH_DIGEST_LENGTH, 1);
++ blake2b_long(blockhash_bytes, ARGON2_BLOCK_SIZE, blockhash,
++ ARGON2_PREHASH_SEED_LENGTH);
++ load_block(&instance->memory[l * instance->lane_length + 1],
++ blockhash_bytes);
++ }
++ clear_internal_memory(blockhash_bytes, ARGON2_BLOCK_SIZE);
++}
++
++void initial_hash(grub_uint8_t *blockhash, argon2_context *context,
++ argon2_type type) {
++ blake2b_state BlakeHash;
++ grub_uint8_t value[sizeof(grub_uint32_t)];
++
++ if (NULL == context || NULL == blockhash) {
++ return;
++ }
++
++ blake2b_init(&BlakeHash, ARGON2_PREHASH_DIGEST_LENGTH);
++
++ store32(&value, context->lanes);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ store32(&value, context->outlen);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ store32(&value, context->m_cost);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ store32(&value, context->t_cost);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ store32(&value, context->version);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ store32(&value, (grub_uint32_t)type);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ store32(&value, context->pwdlen);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ if (context->pwd != NULL) {
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)context->pwd,
++ context->pwdlen);
++
++ if (context->flags & ARGON2_FLAG_CLEAR_PASSWORD) {
++ secure_wipe_memory(context->pwd, context->pwdlen);
++ context->pwdlen = 0;
++ }
++ }
++
++ store32(&value, context->saltlen);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ if (context->salt != NULL) {
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)context->salt,
++ context->saltlen);
++ }
++
++ store32(&value, context->secretlen);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ if (context->secret != NULL) {
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)context->secret,
++ context->secretlen);
++
++ if (context->flags & ARGON2_FLAG_CLEAR_SECRET) {
++ secure_wipe_memory(context->secret, context->secretlen);
++ context->secretlen = 0;
++ }
++ }
++
++ store32(&value, context->adlen);
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)&value, sizeof(value));
++
++ if (context->ad != NULL) {
++ blake2b_update(&BlakeHash, (const grub_uint8_t *)context->ad,
++ context->adlen);
++ }
++
++ blake2b_final(&BlakeHash, blockhash, ARGON2_PREHASH_DIGEST_LENGTH);
++}
++
++int initialize(argon2_instance_t *instance, argon2_context *context) {
++ grub_uint8_t blockhash[ARGON2_PREHASH_SEED_LENGTH];
++ int result = ARGON2_OK;
++
++ if (instance == NULL || context == NULL)
++ return ARGON2_INCORRECT_PARAMETER;
++ instance->context_ptr = context;
++
++ /* 1. Memory allocation */
++ result = allocate_memory(context, (grub_uint8_t **)&(instance->memory),
++ instance->memory_blocks, sizeof(block));
++ if (result != ARGON2_OK) {
++ return result;
++ }
++
++ /* 2. Initial hashing */
++ /* H_0 + 8 extra bytes to produce the first blocks */
++ /* grub_uint8_t blockhash[ARGON2_PREHASH_SEED_LENGTH]; */
++ /* Hashing all inputs */
++ initial_hash(blockhash, context, instance->type);
++ /* Zeroing 8 extra bytes */
++ clear_internal_memory(blockhash + ARGON2_PREHASH_DIGEST_LENGTH,
++ ARGON2_PREHASH_SEED_LENGTH -
++ ARGON2_PREHASH_DIGEST_LENGTH);
++
++#ifdef GENKAT
++ initial_kat(blockhash, context, instance->type);
++#endif
++
++ /* 3. Creating first blocks, we always have at least two blocks in a slice
++ */
++ fill_first_blocks(blockhash, instance);
++ /* Clearing the hash */
++ clear_internal_memory(blockhash, ARGON2_PREHASH_SEED_LENGTH);
++
++ return ARGON2_OK;
++}
+diff --git a/grub-core/lib/argon2/core.h b/grub-core/lib/argon2/core.h
+new file mode 100644
+index 000000000..bbcd56998
+--- /dev/null
++++ b/grub-core/lib/argon2/core.h
+@@ -0,0 +1,228 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#ifndef ARGON2_CORE_H
++#define ARGON2_CORE_H
++
++#include "argon2.h"
++
++#define CONST_CAST(x) (x)(grub_addr_t)
++
++/**********************Argon2 internal constants*******************************/
++
++enum argon2_core_constants {
++ /* Memory block size in bytes */
++ ARGON2_BLOCK_SIZE = 1024,
++ ARGON2_QWORDS_IN_BLOCK = ARGON2_BLOCK_SIZE / 8,
++ ARGON2_OWORDS_IN_BLOCK = ARGON2_BLOCK_SIZE / 16,
++ ARGON2_HWORDS_IN_BLOCK = ARGON2_BLOCK_SIZE / 32,
++ ARGON2_512BIT_WORDS_IN_BLOCK = ARGON2_BLOCK_SIZE / 64,
++
++ /* Number of pseudo-random values generated by one call to Blake in Argon2i
++ to
++ generate reference block positions */
++ ARGON2_ADDRESSES_IN_BLOCK = 128,
++
++ /* Pre-hashing digest length and its extension*/
++ ARGON2_PREHASH_DIGEST_LENGTH = 64,
++ ARGON2_PREHASH_SEED_LENGTH = 72
++};
++
++/*************************Argon2 internal data types***********************/
++
++/*
++ * Structure for the (1KB) memory block implemented as 128 64-bit words.
++ * Memory blocks can be copied, XORed. Internal words can be accessed by [] (no
++ * bounds checking).
++ */
++typedef struct block_ { grub_uint64_t v[ARGON2_QWORDS_IN_BLOCK]; } block;
++
++/*****************Functions that work with the block******************/
++
++/* Initialize each byte of the block with @in */
++void init_block_value(block *b, grub_uint8_t in);
++
++/* Copy block @src to block @dst */
++void copy_block(block *dst, const block *src);
++
++/* XOR @src onto @dst bytewise */
++void xor_block(block *dst, const block *src);
++
++/*
++ * Argon2 instance: memory pointer, number of passes, amount of memory, type,
++ * and derived values.
++ * Used to evaluate the number and location of blocks to construct in each
++ * thread
++ */
++typedef struct Argon2_instance_t {
++ block *memory; /* Memory pointer */
++ grub_uint32_t version;
++ grub_uint32_t passes; /* Number of passes */
++ grub_uint32_t memory_blocks; /* Number of blocks in memory */
++ grub_uint32_t segment_length;
++ grub_uint32_t lane_length;
++ grub_uint32_t lanes;
++ grub_uint32_t threads;
++ argon2_type type;
++ int print_internals; /* whether to print the memory blocks */
++ argon2_context *context_ptr; /* points back to original context */
++} argon2_instance_t;
++
++/*
++ * Argon2 position: where we construct the block right now. Used to distribute
++ * work between threads.
++ */
++typedef struct Argon2_position_t {
++ grub_uint32_t pass;
++ grub_uint32_t lane;
++ grub_uint8_t slice;
++ grub_uint32_t index;
++} argon2_position_t;
++
++/*Struct that holds the inputs for thread handling FillSegment*/
++typedef struct Argon2_thread_data {
++ argon2_instance_t *instance_ptr;
++ argon2_position_t pos;
++} argon2_thread_data;
++
++/*************************Argon2 core functions********************************/
++
++/* Allocates memory to the given pointer, uses the appropriate allocator as
++ * specified in the context. Total allocated memory is num*size.
++ * @param context argon2_context which specifies the allocator
++ * @param memory pointer to the pointer to the memory
++ * @param size the size in bytes for each element to be allocated
++ * @param num the number of elements to be allocated
++ * @return ARGON2_OK if @memory is a valid pointer and memory is allocated
++ */
++int allocate_memory(const argon2_context *context, grub_uint8_t **memory,
++ grub_size_t num, grub_size_t size);
++
++/*
++ * Frees memory at the given pointer, uses the appropriate deallocator as
++ * specified in the context. Also cleans the memory using clear_internal_memory.
++ * @param context argon2_context which specifies the deallocator
++ * @param memory pointer to buffer to be grub_freed
++ * @param size the size in bytes for each element to be deallocated
++ * @param num the number of elements to be deallocated
++ */
++void grub_free_memory(const argon2_context *context, grub_uint8_t *memory,
++ grub_size_t num, grub_size_t size);
++
++/* Function that securely cleans the memory. This ignores any flags set
++ * regarding clearing memory. Usually one just calls clear_internal_memory.
++ * @param mem Pointer to the memory
++ * @param s Memory size in bytes
++ */
++void secure_wipe_memory(void *v, grub_size_t n);
++
++/* Function that securely clears the memory if FLAG_clear_internal_memory is
++ * set. If the flag isn't set, this function does nothing.
++ * @param mem Pointer to the memory
++ * @param s Memory size in bytes
++ */
++void clear_internal_memory(void *v, grub_size_t n);
++
++/*
++ * Computes absolute position of reference block in the lane following a skewed
++ * distribution and using a pseudo-random value as input
++ * @param instance Pointer to the current instance
++ * @param position Pointer to the current position
++ * @param pseudo_rand 32-bit pseudo-random value used to determine the position
++ * @param same_lane Indicates if the block will be taken from the current lane.
++ * If so we can reference the current segment
++ * @pre All pointers must be valid
++ */
++grub_uint32_t index_alpha(const argon2_instance_t *instance,
++ const argon2_position_t *position, grub_uint32_t pseudo_rand,
++ int same_lane);
++
++/*
++ * Function that validates all inputs against predefined restrictions and return
++ * an error code
++ * @param context Pointer to current Argon2 context
++ * @return ARGON2_OK if everything is all right, otherwise one of error codes
++ * (all defined in <argon2.h>
++ */
++int validate_inputs(const argon2_context *context);
++
++/*
++ * Hashes all the inputs into @a blockhash[PREHASH_DIGEST_LENGTH], clears
++ * password and secret if needed
++ * @param context Pointer to the Argon2 internal structure containing memory
++ * pointer, and parameters for time and space requirements.
++ * @param blockhash Buffer for pre-hashing digest
++ * @param type Argon2 type
++ * @pre @a blockhash must have at least @a PREHASH_DIGEST_LENGTH bytes
++ * allocated
++ */
++void initial_hash(grub_uint8_t *blockhash, argon2_context *context,
++ argon2_type type);
++
++/*
++ * Function creates first 2 blocks per lane
++ * @param instance Pointer to the current instance
++ * @param blockhash Pointer to the pre-hashing digest
++ * @pre blockhash must point to @a PREHASH_SEED_LENGTH allocated values
++ */
++void fill_first_blocks(grub_uint8_t *blockhash, const argon2_instance_t *instance);
++
++/*
++ * Function allocates memory, hashes the inputs with Blake, and creates first
++ * two blocks. Returns the pointer to the main memory with 2 blocks per lane
++ * initialized
++ * @param context Pointer to the Argon2 internal structure containing memory
++ * pointer, and parameters for time and space requirements.
++ * @param instance Current Argon2 instance
++ * @return Zero if successful, -1 if memory failed to allocate. @context->state
++ * will be modified if successful.
++ */
++int initialize(argon2_instance_t *instance, argon2_context *context);
++
++/*
++ * XORing the last block of each lane, hashing it, making the tag. Deallocates
++ * the memory.
++ * @param context Pointer to current Argon2 context (use only the out parameters
++ * from it)
++ * @param instance Pointer to current instance of Argon2
++ * @pre instance->state must point to necessary amount of memory
++ * @pre context->out must point to outlen bytes of memory
++ * @pre if context->grub_free_cbk is not NULL, it should point to a function that
++ * deallocates memory
++ */
++void finalize(const argon2_context *context, argon2_instance_t *instance);
++
++/*
++ * Function that fills the segment using previous segments also from other
++ * threads
++ * @param context current context
++ * @param instance Pointer to the current instance
++ * @param position Current position
++ * @pre all block pointers must be valid
++ */
++void fill_segment(const argon2_instance_t *instance,
++ argon2_position_t position);
++
++/*
++ * Function that fills the entire memory t_cost times based on the first two
++ * blocks in each lane
++ * @param instance Pointer to the current instance
++ * @return ARGON2_OK if successful, @context->state
++ */
++int fill_memory_blocks(argon2_instance_t *instance);
++
++#endif
+diff --git a/grub-core/lib/argon2/ref.c b/grub-core/lib/argon2/ref.c
+new file mode 100644
+index 000000000..c933df80d
+--- /dev/null
++++ b/grub-core/lib/argon2/ref.c
+@@ -0,0 +1,190 @@
++/*
++ * Argon2 reference source code package - reference C implementations
++ *
++ * Copyright 2015
++ * Daniel Dinu, Dmitry Khovratovich, Jean-Philippe Aumasson, and Samuel Neves
++ *
++ * You may use this work under the terms of a Creative Commons CC0 1.0
++ * License/Waiver or the Apache Public License 2.0, at your option. The terms of
++ * these licenses can be found at:
++ *
++ * - CC0 1.0 Universal : http://creativecommons.org/publicdomain/zero/1.0
++ * - Apache 2.0 : http://www.apache.org/licenses/LICENSE-2.0
++ *
++ * You should have received a copy of both of these licenses along with this
++ * software. If not, they may be obtained at the above URLs.
++ */
++
++#include "argon2.h"
++#include "core.h"
++
++#include "blake2/blamka-round-ref.h"
++#include "blake2/blake2-impl.h"
++#include "blake2/blake2.h"
++
++
++/*
++ * Function fills a new memory block and optionally XORs the old block over the new one.
++ * @next_block must be initialized.
++ * @param prev_block Pointer to the previous block
++ * @param ref_block Pointer to the reference block
++ * @param next_block Pointer to the block to be constructed
++ * @param with_xor Whether to XOR into the new block (1) or just overwrite (0)
++ * @pre all block pointers must be valid
++ */
++static void fill_block(const block *prev_block, const block *ref_block,
++ block *next_block, int with_xor) {
++ block blockR, block_tmp;
++ unsigned i;
++
++ copy_block(&blockR, ref_block);
++ xor_block(&blockR, prev_block);
++ copy_block(&block_tmp, &blockR);
++ /* Now blockR = ref_block + prev_block and block_tmp = ref_block + prev_block */
++ if (with_xor) {
++ /* Saving the next block contents for XOR over: */
++ xor_block(&block_tmp, next_block);
++ /* Now blockR = ref_block + prev_block and
++ block_tmp = ref_block + prev_block + next_block */
++ }
++
++ /* Apply Blake2 on columns of 64-bit words: (0,1,...,15) , then
++ (16,17,..31)... finally (112,113,...127) */
++ for (i = 0; i < 8; ++i) {
++ BLAKE2_ROUND_NOMSG(
++ blockR.v[16 * i], blockR.v[16 * i + 1], blockR.v[16 * i + 2],
++ blockR.v[16 * i + 3], blockR.v[16 * i + 4], blockR.v[16 * i + 5],
++ blockR.v[16 * i + 6], blockR.v[16 * i + 7], blockR.v[16 * i + 8],
++ blockR.v[16 * i + 9], blockR.v[16 * i + 10], blockR.v[16 * i + 11],
++ blockR.v[16 * i + 12], blockR.v[16 * i + 13], blockR.v[16 * i + 14],
++ blockR.v[16 * i + 15]);
++ }
++
++ /* Apply Blake2 on rows of 64-bit words: (0,1,16,17,...112,113), then
++ (2,3,18,19,...,114,115).. finally (14,15,30,31,...,126,127) */
++ for (i = 0; i < 8; i++) {
++ BLAKE2_ROUND_NOMSG(
++ blockR.v[2 * i], blockR.v[2 * i + 1], blockR.v[2 * i + 16],
++ blockR.v[2 * i + 17], blockR.v[2 * i + 32], blockR.v[2 * i + 33],
++ blockR.v[2 * i + 48], blockR.v[2 * i + 49], blockR.v[2 * i + 64],
++ blockR.v[2 * i + 65], blockR.v[2 * i + 80], blockR.v[2 * i + 81],
++ blockR.v[2 * i + 96], blockR.v[2 * i + 97], blockR.v[2 * i + 112],
++ blockR.v[2 * i + 113]);
++ }
++
++ copy_block(next_block, &block_tmp);
++ xor_block(next_block, &blockR);
++}
++
++static void next_addresses(block *address_block, block *input_block,
++ const block *zero_block) {
++ input_block->v[6]++;
++ fill_block(zero_block, input_block, address_block, 0);
++ fill_block(zero_block, address_block, address_block, 0);
++}
++
++void fill_segment(const argon2_instance_t *instance,
++ argon2_position_t position) {
++ block *ref_block = NULL, *curr_block = NULL;
++ block address_block, input_block, zero_block;
++ grub_uint64_t pseudo_rand, ref_index, ref_lane;
++ grub_uint32_t prev_offset, curr_offset;
++ grub_uint32_t starting_index;
++ grub_uint32_t i;
++ int data_independent_addressing;
++
++ if (instance == NULL) {
++ return;
++ }
++
++ data_independent_addressing =
++ (instance->type == Argon2_i) ||
++ (instance->type == Argon2_id && (position.pass == 0) &&
++ (position.slice < ARGON2_SYNC_POINTS / 2));
++
++ if (data_independent_addressing) {
++ init_block_value(&zero_block, 0);
++ init_block_value(&input_block, 0);
++
++ input_block.v[0] = position.pass;
++ input_block.v[1] = position.lane;
++ input_block.v[2] = position.slice;
++ input_block.v[3] = instance->memory_blocks;
++ input_block.v[4] = instance->passes;
++ input_block.v[5] = instance->type;
++ }
++
++ starting_index = 0;
++
++ if ((0 == position.pass) && (0 == position.slice)) {
++ starting_index = 2; /* we have already generated the first two blocks */
++
++ /* Don't forget to generate the first block of addresses: */
++ if (data_independent_addressing) {
++ next_addresses(&address_block, &input_block, &zero_block);
++ }
++ }
++
++ /* Offset of the current block */
++ curr_offset = position.lane * instance->lane_length +
++ position.slice * instance->segment_length + starting_index;
++
++ if (0 == curr_offset % instance->lane_length) {
++ /* Last block in this lane */
++ prev_offset = curr_offset + instance->lane_length - 1;
++ } else {
++ /* Previous block */
++ prev_offset = curr_offset - 1;
++ }
++
++ for (i = starting_index; i < instance->segment_length;
++ ++i, ++curr_offset, ++prev_offset) {
++ /*1.1 Rotating prev_offset if needed */
++ if (curr_offset % instance->lane_length == 1) {
++ prev_offset = curr_offset - 1;
++ }
++
++ /* 1.2 Computing the index of the reference block */
++ /* 1.2.1 Taking pseudo-random value from the previous block */
++ if (data_independent_addressing) {
++ if (i % ARGON2_ADDRESSES_IN_BLOCK == 0) {
++ next_addresses(&address_block, &input_block, &zero_block);
++ }
++ pseudo_rand = address_block.v[i % ARGON2_ADDRESSES_IN_BLOCK];
++ } else {
++ pseudo_rand = instance->memory[prev_offset].v[0];
++ }
++
++ /* 1.2.2 Computing the lane of the reference block */
++ grub_divmod64 (pseudo_rand >> 32, instance->lanes, &ref_lane);
++
++ if ((position.pass == 0) && (position.slice == 0)) {
++ /* Can not reference other lanes yet */
++ ref_lane = position.lane;
++ }
++
++ /* 1.2.3 Computing the number of possible reference block within the
++ * lane.
++ */
++ position.index = i;
++ ref_index = index_alpha(instance, &position, pseudo_rand & 0xFFFFFFFF,
++ ref_lane == position.lane);
++
++ /* 2 Creating a new block */
++ ref_block =
++ instance->memory + instance->lane_length * ref_lane + ref_index;
++ curr_block = instance->memory + curr_offset;
++ if (ARGON2_VERSION_10 == instance->version) {
++ /* version 1.2.1 and earlier: overwrite, not XOR */
++ fill_block(instance->memory + prev_offset, ref_block, curr_block, 0);
++ } else {
++ if(0 == position.pass) {
++ fill_block(instance->memory + prev_offset, ref_block,
++ curr_block, 0);
++ } else {
++ fill_block(instance->memory + prev_offset, ref_block,
++ curr_block, 1);
++ }
++ }
++ }
++}
+--
+2.39.2
+
diff --git a/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch
new file mode 100644
index 00000000..30de08cc
--- /dev/null
+++ b/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch
@@ -0,0 +1,58 @@
+From 08a2fce70c6e988eb0112d5ad2787843910811bc Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 06/22] Error on missing Argon2id parameters
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ grub-core/disk/luks2.c | 13 ++++++++-----
+ 1 file changed, 8 insertions(+), 5 deletions(-)
+
+diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c
+index d5106402f..bc818ea69 100644
+--- a/grub-core/disk/luks2.c
++++ b/grub-core/disk/luks2.c
+@@ -38,6 +38,7 @@ GRUB_MOD_LICENSE ("GPLv3+");
+ enum grub_luks2_kdf_type
+ {
+ LUKS2_KDF_TYPE_ARGON2I,
++ LUKS2_KDF_TYPE_ARGON2ID,
+ LUKS2_KDF_TYPE_PBKDF2
+ };
+ typedef enum grub_luks2_kdf_type grub_luks2_kdf_type_t;
+@@ -90,7 +91,7 @@ struct grub_luks2_keyslot
+ grub_int64_t time;
+ grub_int64_t memory;
+ grub_int64_t cpus;
+- } argon2i;
++ } argon2;
+ struct
+ {
+ const char *hash;
+@@ -160,10 +161,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot)
+ return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing or invalid KDF");
+ else if (!grub_strcmp (type, "argon2i") || !grub_strcmp (type, "argon2id"))
+ {
+- out->kdf.type = LUKS2_KDF_TYPE_ARGON2I;
+- if (grub_json_getint64 (&out->kdf.u.argon2i.time, &kdf, "time") ||
+- grub_json_getint64 (&out->kdf.u.argon2i.memory, &kdf, "memory") ||
+- grub_json_getint64 (&out->kdf.u.argon2i.cpus, &kdf, "cpus"))
++ out->kdf.type = !grub_strcmp (type, "argon2i")
++ ? LUKS2_KDF_TYPE_ARGON2I : LUKS2_KDF_TYPE_ARGON2ID;
++ if (grub_json_getint64 (&out->kdf.u.argon2.time, &kdf, "time") ||
++ grub_json_getint64 (&out->kdf.u.argon2.memory, &kdf, "memory") ||
++ grub_json_getint64 (&out->kdf.u.argon2.cpus, &kdf, "cpus"))
+ return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing Argon2i parameters");
+ }
+ else if (!grub_strcmp (type, "pbkdf2"))
+@@ -459,6 +461,7 @@ luks2_decrypt_key (grub_uint8_t *out_key,
+ switch (k->kdf.type)
+ {
+ case LUKS2_KDF_TYPE_ARGON2I:
++ case LUKS2_KDF_TYPE_ARGON2ID:
+ ret = grub_error (GRUB_ERR_BAD_ARGUMENT, "Argon2 not supported");
+ goto err;
+ case LUKS2_KDF_TYPE_PBKDF2:
+--
+2.39.2
+
diff --git a/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch
new file mode 100644
index 00000000..23f361dc
--- /dev/null
+++ b/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch
@@ -0,0 +1,83 @@
+From 268da8d0ccce822ffa4c2d9d35fe717245daa726 Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 07/22] Compile with Argon2id support
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ Makefile.util.def | 6 +++++-
+ grub-core/Makefile.core.def | 2 +-
+ grub-core/disk/luks2.c | 13 +++++++++++--
+ 3 files changed, 17 insertions(+), 4 deletions(-)
+
+diff --git a/Makefile.util.def b/Makefile.util.def
+index 0f74a1680..5a15e5637 100644
+--- a/Makefile.util.def
++++ b/Makefile.util.def
+@@ -3,7 +3,7 @@ AutoGen definitions Makefile.tpl;
+ library = {
+ name = libgrubkern.a;
+ cflags = '$(CFLAGS_GNULIB)';
+- cppflags = '$(CPPFLAGS_GNULIB) -I$(srcdir)/grub-core/lib/json';
++ cppflags = '$(CPPFLAGS_GNULIB) -I$(srcdir)/grub-core/lib/json -I$(srcdir)/grub-core/lib/argon2';
+
+ common = util/misc.c;
+ common = grub-core/kern/command.c;
+@@ -36,6 +36,10 @@ library = {
+ common = grub-core/kern/misc.c;
+ common = grub-core/kern/partition.c;
+ common = grub-core/lib/crypto.c;
++ common = grub-core/lib/argon2/argon2.c;
++ common = grub-core/lib/argon2/core.c;
++ common = grub-core/lib/argon2/ref.c;
++ common = grub-core/lib/argon2/blake2/blake2b.c;
+ common = grub-core/lib/json/json.c;
+ common = grub-core/disk/luks.c;
+ common = grub-core/disk/luks2.c;
+diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
+index 452f11b20..5c1af8682 100644
+--- a/grub-core/Makefile.core.def
++++ b/grub-core/Makefile.core.def
+@@ -1242,7 +1242,7 @@ module = {
+ common = disk/luks2.c;
+ common = lib/gnulib/base64.c;
+ cflags = '$(CFLAGS_POSIX) $(CFLAGS_GNULIB)';
+- cppflags = '$(CPPFLAGS_POSIX) $(CPPFLAGS_GNULIB) -I$(srcdir)/lib/json';
++ cppflags = '$(CPPFLAGS_POSIX) $(CPPFLAGS_GNULIB) -I$(srcdir)/lib/json -I$(srcdir)/lib/argon2';
+ };
+
+ module = {
+diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c
+index bc818ea69..5b9eaa599 100644
+--- a/grub-core/disk/luks2.c
++++ b/grub-core/disk/luks2.c
+@@ -27,6 +27,7 @@
+ #include <grub/partition.h>
+ #include <grub/i18n.h>
+
++#include <argon2.h>
+ #include <base64.h>
+ #include <json.h>
+
+@@ -462,8 +463,16 @@ luks2_decrypt_key (grub_uint8_t *out_key,
+ {
+ case LUKS2_KDF_TYPE_ARGON2I:
+ case LUKS2_KDF_TYPE_ARGON2ID:
+- ret = grub_error (GRUB_ERR_BAD_ARGUMENT, "Argon2 not supported");
+- goto err;
++ ret = argon2_hash (k->kdf.u.argon2.time, k->kdf.u.argon2.memory, k->kdf.u.argon2.cpus,
++ passphrase, passphraselen, salt, saltlen, area_key, k->area.key_size,
++ k->kdf.type == LUKS2_KDF_TYPE_ARGON2I ? Argon2_i : Argon2_id,
++ ARGON2_VERSION_NUMBER);
++ if (ret)
++ {
++ grub_dprintf ("luks2", "Argon2 failed: %s\n", argon2_error_message (ret));
++ goto err;
++ }
++ break;
+ case LUKS2_KDF_TYPE_PBKDF2:
+ hash = grub_crypto_lookup_md_by_name (k->kdf.u.pbkdf2.hash);
+ if (!hash)
+--
+2.39.2
+
diff --git a/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch
new file mode 100644
index 00000000..ffdb306c
--- /dev/null
+++ b/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch
@@ -0,0 +1,26 @@
+From 5e540d3e4c01940c66425c4475a1cb6a35b188e8 Mon Sep 17 00:00:00 2001
+From: Ax333l <main@axelen.xyz>
+Date: Thu, 17 Aug 2023 00:00:00 +0000
+Subject: [PATCH 08/22] Make grub-install work with Argon2
+
+Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch>
+---
+ util/grub-install.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/util/grub-install.c b/util/grub-install.c
+index 7dc5657bb..cf7315891 100644
+--- a/util/grub-install.c
++++ b/util/grub-install.c
+@@ -448,6 +448,8 @@ probe_mods (grub_disk_t disk)
+ {
+ grub_util_cryptodisk_get_abstraction (disk,
+ push_cryptodisk_module, NULL);
++ /* HACK: always push argon2 */
++ grub_install_push_module ("argon2");
+ have_abstractions = 1;
+ have_cryptodisk = 1;
+ }
+--
+2.39.2
+
diff --git a/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
new file mode 100644
index 00000000..e4b26a38
--- /dev/null
+++ b/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch
@@ -0,0 +1,107 @@
+From 9e9c69a74e5c14fd87ae56c8b9171a808d89742e Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Mon, 30 Oct 2023 22:19:21 +0000
+Subject: [PATCH 09/22] at_keyboard coreboot: force scancodes2+translate
+
+Scan code set 2 with translation should be assumed in
+every case, as the default starting position.
+
+However, GRUB is trying to detect and use other modes
+such as set 2 without translation, or set 1 without
+translation from set 2; it also detects no-mode and
+assumes mode 1, on really old keyboards.
+
+The current behaviour has been retained, for everything
+except GRUB_MACHINE_COREBOOT; for the latter, scan code
+set 2 with translation is hardcoded, and forced in code.
+
+This is required to make keyboard initialisation work on
+the MEC5035 EC used by the Dell Latitude E6400, when
+running GRUB as a coreboot payload on that laptop. The
+EC reports scancode set 2 with translation when probed,
+but actually only outputs scancode set 1.
+
+Since GRUB is attempting to use it without translation,
+and since the machine reports set 2 with translation,
+but only ever outputs set 1 scancodes, this results in
+wrong keypresses for every key.
+
+This fix fixed that, by forcing set 2 with translation,
+treating it as set 1, but only on coreboot. This is the
+same behaviour used in GNU+Linux systems and SeaBIOS.
+With this change, GRUB keyboard initialisation now works
+just fine on those machines.
+
+This has *also* been tested on other coreboot machines
+running GRUB; several HP EliteBooks, ThinkPads and
+Dell Precision T1650. All seems to work just fine.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/term/at_keyboard.c | 20 ++++++++++++++++++--
+ 1 file changed, 18 insertions(+), 2 deletions(-)
+
+diff --git a/grub-core/term/at_keyboard.c b/grub-core/term/at_keyboard.c
+index f8a129eb7..8207225c2 100644
+--- a/grub-core/term/at_keyboard.c
++++ b/grub-core/term/at_keyboard.c
+@@ -138,6 +138,7 @@ write_mode (int mode)
+ return (i != GRUB_AT_TRIES);
+ }
+
++#if !defined (GRUB_MACHINE_COREBOOT)
+ static int
+ query_mode (void)
+ {
+@@ -161,10 +162,12 @@ query_mode (void)
+ return 3;
+ return 0;
+ }
++#endif
+
+ static void
+ set_scancodes (void)
+ {
++#if !defined (GRUB_MACHINE_COREBOOT)
+ /* You must have visited computer museum. Keyboard without scancode set
+ knowledge. Assume XT. */
+ if (!grub_keyboard_orig_set)
+@@ -173,20 +176,33 @@ set_scancodes (void)
+ ps2_state.current_set = 1;
+ return;
+ }
++#endif
+
+ #if !USE_SCANCODE_SET
+ ps2_state.current_set = 1;
+ return;
+-#else
++#endif
+
++#if defined (GRUB_MACHINE_COREBOOT)
++ /* enable translation */
++ grub_keyboard_controller_write (grub_keyboard_controller_orig
++ & ~KEYBOARD_AT_DISABLE);
++#else
++ /* if not coreboot, disable translation and try mode 2 first, before 1 */
+ grub_keyboard_controller_write (grub_keyboard_controller_orig
+ & ~KEYBOARD_AT_TRANSLATE
+ & ~KEYBOARD_AT_DISABLE);
++#endif
+
+ keyboard_controller_wait_until_ready ();
+ grub_outb (KEYBOARD_COMMAND_ENABLE, KEYBOARD_REG_DATA);
+-
+ write_mode (2);
++
++#if defined (GRUB_MACHINE_COREBOOT)
++ /* mode 2 with translation, so make grub treat as set 1 */
++ ps2_state.current_set = 1;
++#else
++ /* if not coreboot, translation isn't set; test 2 and fall back to 1 */
+ ps2_state.current_set = query_mode ();
+ grub_dprintf ("atkeyb", "returned set %d\n", ps2_state.current_set);
+ if (ps2_state.current_set == 2)
+--
+2.39.2
+
diff --git a/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
new file mode 100644
index 00000000..e8a3ce14
--- /dev/null
+++ b/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch
@@ -0,0 +1,38 @@
+From ccbcdb93af6747fe77094dfa9e114a034420bdd5 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Tue, 31 Oct 2023 10:33:28 +0000
+Subject: [PATCH 10/22] keylayouts: don't print "Unknown key" message
+
+on keyboards with stuck keys, this results in GRUB just
+spewing it repeatedly, preventing use of GRUB.
+
+in such cases, it's still possible to use the keyboard,
+and we should let the user at least boot.
+
+it often appears when people plug in faulty usb keyboards,
+but can appear for laptop keyboards too; one of my e6400
+has stuck keys.
+
+with this patch, grub should be a bit more reliable in
+terms of user experience, when the keyboard is faulty.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/commands/keylayouts.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/grub-core/commands/keylayouts.c b/grub-core/commands/keylayouts.c
+index aa3ba34f2..445fa0601 100644
+--- a/grub-core/commands/keylayouts.c
++++ b/grub-core/commands/keylayouts.c
+@@ -174,7 +174,6 @@ grub_term_map_key (grub_keyboard_key_t code, int status)
+ key = map_key_core (code, status, &alt_gr_consumed);
+
+ if (key == 0 || key == GRUB_TERM_SHIFT) {
+- grub_printf ("Unknown key 0x%x detected\n", code);
+ return GRUB_TERM_NO_KEY;
+ }
+
+--
+2.39.2
+
diff --git a/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
new file mode 100644
index 00000000..de68bb78
--- /dev/null
+++ b/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch
@@ -0,0 +1,102 @@
+From 21a829a3a6f5e7d9028059df8057fdf8bce8fe06 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 16:14:58 +0000
+Subject: [PATCH 11/22] don't print missing prefix errors on the screen
+
+we do actually set the prefix. this patch modifies
+grub to still set grub_errno and return accordingly,
+so the behaviour is otherwise identical, but it will
+no longer print a warning message on the screen.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/commands/keylayouts.c | 2 +-
+ grub-core/commands/loadenv.c | 2 +-
+ grub-core/commands/nativedisk.c | 2 +-
+ grub-core/efiemu/main.c | 3 +--
+ grub-core/font/font.c | 2 +-
+ grub-core/kern/dl.c | 2 +-
+ 6 files changed, 6 insertions(+), 7 deletions(-)
+
+diff --git a/grub-core/commands/keylayouts.c b/grub-core/commands/keylayouts.c
+index 445fa0601..00bcf7025 100644
+--- a/grub-core/commands/keylayouts.c
++++ b/grub-core/commands/keylayouts.c
+@@ -211,7 +211,7 @@ grub_cmd_keymap (struct grub_command *cmd __attribute__ ((unused)),
+ {
+ const char *prefix = grub_env_get ("prefix");
+ if (!prefix)
+- return grub_error (GRUB_ERR_BAD_ARGUMENT, N_("variable `%s' isn't set"), "prefix");
++ return (grub_errno = GRUB_ERR_BAD_ARGUMENT);
+ filename = grub_xasprintf ("%s/layouts/%s.gkb", prefix, argv[0]);
+ if (!filename)
+ return grub_errno;
+diff --git a/grub-core/commands/loadenv.c b/grub-core/commands/loadenv.c
+index 166445849..699b39bfa 100644
+--- a/grub-core/commands/loadenv.c
++++ b/grub-core/commands/loadenv.c
+@@ -58,7 +58,7 @@ open_envblk_file (char *filename,
+ prefix = grub_env_get ("prefix");
+ if (! prefix)
+ {
+- grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++ grub_errno = GRUB_ERR_FILE_NOT_FOUND;
+ return 0;
+ }
+
+diff --git a/grub-core/commands/nativedisk.c b/grub-core/commands/nativedisk.c
+index 580c8d3b0..6806bff9c 100644
+--- a/grub-core/commands/nativedisk.c
++++ b/grub-core/commands/nativedisk.c
+@@ -186,7 +186,7 @@ grub_cmd_nativedisk (grub_command_t cmd __attribute__ ((unused)),
+ prefix = grub_env_get ("prefix");
+
+ if (! prefix)
+- return grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++ return (grub_errno = GRUB_ERR_FILE_NOT_FOUND);
+
+ if (prefix)
+ path_prefix = (prefix[0] == '(') ? grub_strchr (prefix, ')') : NULL;
+diff --git a/grub-core/efiemu/main.c b/grub-core/efiemu/main.c
+index e7037f4ed..e5d4dbff1 100644
+--- a/grub-core/efiemu/main.c
++++ b/grub-core/efiemu/main.c
+@@ -231,8 +231,7 @@ grub_efiemu_autocore (void)
+ prefix = grub_env_get ("prefix");
+
+ if (! prefix)
+- return grub_error (GRUB_ERR_FILE_NOT_FOUND,
+- N_("variable `%s' isn't set"), "prefix");
++ return (grub_errno = GRUB_ERR_FILE_NOT_FOUND);
+
+ suffix = grub_efiemu_get_default_core_name ();
+
+diff --git a/grub-core/font/font.c b/grub-core/font/font.c
+index 18de52562..2a0fea6c8 100644
+--- a/grub-core/font/font.c
++++ b/grub-core/font/font.c
+@@ -461,7 +461,7 @@ grub_font_load (const char *filename)
+
+ if (!prefix)
+ {
+- grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++ grub_errno = GRUB_ERR_FILE_NOT_FOUND;
+ goto fail;
+ }
+ file = try_open_from_prefix (prefix, filename);
+diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
+index 4011e2d15..af3bd00d0 100644
+--- a/grub-core/kern/dl.c
++++ b/grub-core/kern/dl.c
+@@ -758,7 +758,7 @@ grub_dl_load (const char *name)
+ return 0;
+
+ if (! grub_dl_dir) {
+- grub_error (GRUB_ERR_FILE_NOT_FOUND, N_("variable `%s' isn't set"), "prefix");
++ grub_errno = GRUB_ERR_FILE_NOT_FOUND;
+ return 0;
+ }
+
+--
+2.39.2
+
diff --git a/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch
new file mode 100644
index 00000000..37f52e03
--- /dev/null
+++ b/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch
@@ -0,0 +1,34 @@
+From edb8208100c523b5776f2cb0712fdc0c9065e517 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 16:36:22 +0000
+Subject: [PATCH 12/22] don't print error if module not found
+
+still set grub_errno accordingly, and otherwise
+behave the same. in libreboot, we remove a lot of
+modules but then rely on loading a grub.cfg
+provided by a distro; in almost all cases that works,
+but also in almost all cases, that will try to load
+a module we don't actually need, but then it prints
+a message. this can annoy some users, so silence it.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/kern/dl.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c
+index af3bd00d0..21d0cedb1 100644
+--- a/grub-core/kern/dl.c
++++ b/grub-core/kern/dl.c
+@@ -486,7 +486,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e)
+
+ s = grub_dl_find_section (e, ".modname");
+ if (!s)
+- return grub_error (GRUB_ERR_BAD_MODULE, "no module name found");
++ return (grub_errno = GRUB_ERR_BAD_MODULE);
+
+ mod->name = grub_strdup ((char *) e + s->sh_offset);
+ if (! mod->name)
+--
+2.39.2
+
diff --git a/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch
new file mode 100644
index 00000000..74d8bade
--- /dev/null
+++ b/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch
@@ -0,0 +1,31 @@
+From 65cb1871a3e125355df78a6d1d6f1bc7e356c4e8 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sun, 5 Nov 2023 17:25:20 +0000
+Subject: [PATCH 13/22] don't print empty error messages
+
+this is part two of the quest to kill the prefix
+error message. after i disabled prefix-related
+messages, it still printed "error: ." on screen.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ grub-core/kern/err.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+diff --git a/grub-core/kern/err.c b/grub-core/kern/err.c
+index 53c734de7..7cac53983 100644
+--- a/grub-core/kern/err.c
++++ b/grub-core/kern/err.c
+@@ -107,7 +107,8 @@ grub_print_error (void)
+ {
+ if (grub_errno != GRUB_ERR_NONE)
+ {
+- grub_err_printf (_("error: %s.\n"), grub_errmsg);
++ if (grub_strlen(grub_errmsg) > 0)
++ grub_err_printf (_("error: %s.\n"), grub_errmsg);
+ grub_err_printed_errors++;
+ }
+ }
+--
+2.39.2
+
diff --git a/config/grub/patches/0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch b/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
index f533269f..4c84b8c3 100644
--- a/config/grub/patches/0005-xhci/0001-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
+++ b/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch
@@ -1,7 +1,8 @@
-From 90c9011f2e0350a97e3df44b0fc6dd022e04c276 Mon Sep 17 00:00:00 2001
+From 3273128b6dc6df83ef6b1d54d009a1ae26844bff Mon Sep 17 00:00:00 2001
From: Patrick Rudolph <patrick.rudolph@9elements.com>
Date: Sun, 15 Nov 2020 19:00:27 +0100
-Subject: [PATCH 1/8] grub-core/bus/usb: Parse SuperSpeed companion descriptors
+Subject: [PATCH 14/22] grub-core/bus/usb: Parse SuperSpeed companion
+ descriptors
Parse the SS_ENDPOINT_COMPANION descriptor, which is only present on USB 3.0
capable devices and xHCI controllers. Make the descendp an array of pointers
diff --git a/config/grub/patches/0005-xhci/0002-usb-Add-enum-for-xHCI.patch b/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch
index d61da615..937ff1af 100644
--- a/config/grub/patches/0005-xhci/0002-usb-Add-enum-for-xHCI.patch
+++ b/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch
@@ -1,7 +1,7 @@
-From e111983ca5e2a52bfe2bdc5cd639b06bb2f7902d Mon Sep 17 00:00:00 2001
+From 3b8f2defcda1a3b51ad0be8795a2338a0ed5ca59 Mon Sep 17 00:00:00 2001
From: Patrick Rudolph <patrick.rudolph@9elements.com>
Date: Sun, 15 Nov 2020 19:47:06 +0100
-Subject: [PATCH 2/8] usb: Add enum for xHCI
+Subject: [PATCH 15/22] usb: Add enum for xHCI
Will be used in future patches.
diff --git a/config/grub/patches/0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch b/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch
index 70e73ca2..8f6bb001 100644
--- a/config/grub/patches/0005-xhci/0003-usbtrans-Set-default-maximum-packet-size.patch
+++ b/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch
@@ -1,7 +1,7 @@
-From 3e25c83a1d1c6e149c7e9f0660ddadb2beca2476 Mon Sep 17 00:00:00 2001
+From ba7ce6daec155bc3deac4e0c48d470afa024ab94 Mon Sep 17 00:00:00 2001
From: Patrick Rudolph <patrick.rudolph@9elements.com>
Date: Sun, 15 Nov 2020 19:48:03 +0100
-Subject: [PATCH 3/8] usbtrans: Set default maximum packet size
+Subject: [PATCH 16/22] usbtrans: Set default maximum packet size
Set the maximum packet size to 512 for SuperSpeed devices.
diff --git a/config/grub/patches/0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch b/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
index a090e0ea..60680bd0 100644
--- a/config/grub/patches/0005-xhci/0004-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
+++ b/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch
@@ -1,8 +1,8 @@
-From 89701aba00caa81bb566ab10da0c89264393be30 Mon Sep 17 00:00:00 2001
+From c4cd7fbe3e2e8ff4cbe6d0db8c3356aeee614af5 Mon Sep 17 00:00:00 2001
From: Patrick Rudolph <patrick.rudolph@9elements.com>
Date: Sun, 15 Nov 2020 19:51:42 +0100
-Subject: [PATCH 4/8] grub-core/bus/usb: Add function pointer for attach/detach
- events
+Subject: [PATCH 17/22] grub-core/bus/usb: Add function pointer for
+ attach/detach events
The xHCI code needs to be called for attaching or detaching a device.
Introduce two functions pointers and call it from the USB hub code.
diff --git a/config/grub/patches/0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch b/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
index 7d69c3a6..bc0f957f 100644
--- a/config/grub/patches/0005-xhci/0005-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
+++ b/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch
@@ -1,8 +1,8 @@
-From 5e5d74a4531770258e21dedd45c33f1a9d3afa6b Mon Sep 17 00:00:00 2001
+From 1ab23afbfa7ae436741947c0b9bdacc434ad6153 Mon Sep 17 00:00:00 2001
From: Patrick Rudolph <patrick.rudolph@9elements.com>
Date: Sun, 15 Nov 2020 19:54:40 +0100
-Subject: [PATCH 5/8] grub-core/bus/usb/usbhub: Add new private fields for xHCI
- controller
+Subject: [PATCH 18/22] grub-core/bus/usb/usbhub: Add new private fields for
+ xHCI controller
Store the root port number, the route, consisting out of the port ID
in each nibble, and a pointer to driver private data.
diff --git a/config/grub/patches/0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch b/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch
index 11df42d8..02a24d5a 100644
--- a/config/grub/patches/0005-xhci/0006-grub-core-bus-usb-Add-xhci-support.patch
+++ b/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch
@@ -1,7 +1,7 @@
-From fe3a0bce527e059e9121eb5ad2c3cc099f07a4bf Mon Sep 17 00:00:00 2001
+From 8c9e61e7b0f28a66d0f63c07b10fc6617a709010 Mon Sep 17 00:00:00 2001
From: Patrick Rudolph <patrick.rudolph@9elements.com>
Date: Sun, 15 Nov 2020 19:59:25 +0100
-Subject: [PATCH 6/8] grub-core/bus/usb: Add xhci support
+Subject: [PATCH 19/22] grub-core/bus/usb: Add xhci support
Add support for xHCI USB controllers.
The code is based on seabios implementation, but has been heavily
@@ -74,7 +74,7 @@ index 43635d5ff..65016f856 100644
endif
diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
-index fb6078a34..64c3806ab 100644
+index 5c1af8682..9d59acd1e 100644
--- a/grub-core/Makefile.core.def
+++ b/grub-core/Makefile.core.def
@@ -667,6 +667,13 @@ module = {
diff --git a/config/grub/patches/0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch b/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
index a37bbd6b..735ef22d 100644
--- a/config/grub/patches/0005-xhci/0007-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
+++ b/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch
@@ -1,7 +1,7 @@
-From 2a2c64f6ea62337c1263a70f6ca9a9bade66b78b Mon Sep 17 00:00:00 2001
+From 127961742cf7992f6989c6e89a18ab6d8f0b297f Mon Sep 17 00:00:00 2001
From: Patrick Rudolph <patrick.rudolph@9elements.com>
Date: Thu, 3 Dec 2020 13:44:55 +0100
-Subject: [PATCH 7/8] grub-core/bus/usb/usbhub: Add xHCI non root hub support
+Subject: [PATCH 20/22] grub-core/bus/usb/usbhub: Add xHCI non root hub support
Tested on Intel PCH C246, the USB3 hub can be configured by grub.
diff --git a/config/grub/patches/0005-xhci/0008-Fix-compilation-on-x86_64.patch b/config/grub/xhci/patches/0021-Fix-compilation-on-x86_64.patch
index af79c3d0..6a5f0502 100644
--- a/config/grub/patches/0005-xhci/0008-Fix-compilation-on-x86_64.patch
+++ b/config/grub/xhci/patches/0021-Fix-compilation-on-x86_64.patch
@@ -1,7 +1,7 @@
-From 871d768f8c5c960cb0d9761a9028b16882e1a7d3 Mon Sep 17 00:00:00 2001
+From 8d46c537d4df8c785af4b85644d311ba53af5964 Mon Sep 17 00:00:00 2001
From: Patrick Rudolph <patrick.rudolph@9elements.com>
Date: Wed, 24 Feb 2021 08:25:41 +0100
-Subject: [PATCH 8/8] Fix compilation on x86_64
+Subject: [PATCH 21/22] Fix compilation on x86_64
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
diff --git a/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch
new file mode 100644
index 00000000..82452f1c
--- /dev/null
+++ b/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch
@@ -0,0 +1,1074 @@
+From 394102db8f4de6782b628b29c59d2634f2c72674 Mon Sep 17 00:00:00 2001
+From: Mate Kukri <km@mkukri.xyz>
+Date: Mon, 20 May 2024 11:43:35 +0100
+Subject: [PATCH 22/22] Add native NVMe driver based on SeaBIOS
+
+Tested to successfully boot Debian on QEMU and OptiPlex 3050.
+
+Signed-off-by: Mate Kukri <km@mkukri.xyz>
+---
+ Makefile.am | 2 +-
+ grub-core/Makefile.core.def | 6 +
+ grub-core/commands/nativedisk.c | 1 +
+ grub-core/disk/nvme-int.h | 208 +++++++++
+ grub-core/disk/nvme.c | 781 ++++++++++++++++++++++++++++++++
+ include/grub/disk.h | 1 +
+ 6 files changed, 998 insertions(+), 1 deletion(-)
+ create mode 100644 grub-core/disk/nvme-int.h
+ create mode 100644 grub-core/disk/nvme.c
+
+diff --git a/Makefile.am b/Makefile.am
+index 65016f856..7bc0866ba 100644
+--- a/Makefile.am
++++ b/Makefile.am
+@@ -434,7 +434,7 @@ if COND_i386_coreboot
+ FS_PAYLOAD_MODULES ?= $(shell cat grub-core/fs.lst)
+ default_payload.elf: grub-mkstandalone grub-mkimage FORCE
+ test -f $@ && rm $@ || true
+- pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata xhci ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
++ pkgdatadir=. ./grub-mkstandalone --grub-mkimage=./grub-mkimage -O i386-coreboot -o $@ --modules='ahci pata nvme xhci ehci uhci ohci usb_keyboard usbms part_msdos ext2 fat at_keyboard part_gpt usbserial_usbdebug cbfs' --install-modules='ls linux search configfile normal cbtime cbls memrw iorw minicmd lsmmap lspci halt reboot hexdump pcidump regexp setpci lsacpi chain test serial multiboot cbmemc linux16 gzio echo help syslinuxcfg xnu $(FS_PAYLOAD_MODULES) password_pbkdf2 $(EXTRA_PAYLOAD_MODULES)' --fonts= --themes= --locales= -d grub-core/ /boot/grub/grub.cfg=$(srcdir)/coreboot.cfg
+ endif
+
+ endif
+diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def
+index 9d59acd1e..56076728b 100644
+--- a/grub-core/Makefile.core.def
++++ b/grub-core/Makefile.core.def
+@@ -2621,3 +2621,9 @@ module = {
+ enable = efi;
+ depends = part_gpt;
+ };
++
++module = {
++ name = nvme;
++ common = disk/nvme.c;
++ enable = pci;
++};
+diff --git a/grub-core/commands/nativedisk.c b/grub-core/commands/nativedisk.c
+index 6806bff9c..fd68a513e 100644
+--- a/grub-core/commands/nativedisk.c
++++ b/grub-core/commands/nativedisk.c
+@@ -78,6 +78,7 @@ get_uuid (const char *name, char **uuid, int getnative)
+ case GRUB_DISK_DEVICE_ATA_ID:
+ case GRUB_DISK_DEVICE_SCSI_ID:
+ case GRUB_DISK_DEVICE_XEN:
++ case GRUB_DISK_DEVICE_NVME_ID:
+ if (getnative)
+ break;
+ /* FALLTHROUGH */
+diff --git a/grub-core/disk/nvme-int.h b/grub-core/disk/nvme-int.h
+new file mode 100644
+index 000000000..1295b58aa
+--- /dev/null
++++ b/grub-core/disk/nvme-int.h
+@@ -0,0 +1,208 @@
++// NVMe datastructures and constants
++//
++// Copyright 2017 Amazon.com, Inc. or its affiliates.
++//
++// This file may be distributed under the terms of the GNU LGPLv3 license.
++
++#ifndef __NVME_INT_H
++#define __NVME_INT_H
++
++#include <grub/types.h>
++
++/* Data structures */
++
++/* The register file of a NVMe host controller. This struct follows the naming
++ scheme in the NVMe specification. */
++struct nvme_reg {
++ grub_uint64_t cap; /* controller capabilities */
++ grub_uint32_t vs; /* version */
++ grub_uint32_t intms; /* interrupt mask set */
++ grub_uint32_t intmc; /* interrupt mask clear */
++ grub_uint32_t cc; /* controller configuration */
++ grub_uint32_t _res0;
++ grub_uint32_t csts; /* controller status */
++ grub_uint32_t _res1;
++ grub_uint32_t aqa; /* admin queue attributes */
++ grub_uint64_t asq; /* admin submission queue base address */
++ grub_uint64_t acq; /* admin completion queue base address */
++};
++
++/* Submission queue entry */
++struct nvme_sqe {
++ union {
++ grub_uint32_t dword[16];
++ struct {
++ grub_uint32_t cdw0; /* Command DWORD 0 */
++ grub_uint32_t nsid; /* Namespace ID */
++ grub_uint64_t _res0;
++ grub_uint64_t mptr; /* metadata ptr */
++
++ grub_uint64_t dptr_prp1;
++ grub_uint64_t dptr_prp2;
++ };
++ };
++};
++
++/* Completion queue entry */
++struct nvme_cqe {
++ union {
++ grub_uint32_t dword[4];
++ struct {
++ grub_uint32_t cdw0;
++ grub_uint32_t _res0;
++ grub_uint16_t sq_head;
++ grub_uint16_t sq_id;
++ grub_uint16_t cid;
++ grub_uint16_t status;
++ };
++ };
++};
++
++/* The common part of every submission or completion queue. */
++struct nvme_queue {
++ grub_uint32_t *dbl; /* doorbell */
++ grub_uint16_t mask; /* length - 1 */
++};
++
++struct nvme_cq {
++ struct nvme_queue common;
++ struct nvme_cqe *cqe;
++
++ /* We have read upto (but not including) this entry in the queue. */
++ grub_uint16_t head;
++
++ /* The current phase bit the controller uses to indicate that it has written
++ a new entry. This is inverted after each wrap. */
++ unsigned phase : 1;
++};
++
++struct nvme_sq {
++ struct nvme_queue common;
++ struct nvme_sqe *sqe;
++
++ /* Corresponding completion queue. We only support a single SQ per CQ. */
++ struct nvme_cq *cq;
++
++ /* The last entry the controller has fetched. */
++ grub_uint16_t head;
++
++ /* The last value we have written to the tail doorbell. */
++ grub_uint16_t tail;
++};
++
++struct nvme_ctrl {
++ grub_pci_device_t pci;
++ struct nvme_reg volatile *reg;
++
++ grub_uint32_t ctrlnum;
++
++ grub_uint32_t doorbell_stride; /* in bytes */
++
++ struct nvme_sq admin_sq;
++ struct nvme_cq admin_cq;
++
++ grub_uint32_t ns_count;
++
++ struct nvme_sq io_sq;
++ struct nvme_cq io_cq;
++};
++
++struct nvme_namespace {
++ struct nvme_namespace *next;
++ struct nvme_namespace **prev;
++
++ char *devname;
++
++ grub_uint32_t nsnum;
++
++ struct nvme_ctrl *ctrl;
++
++ grub_uint32_t ns_id;
++
++ grub_uint64_t lba_count; /* The total amount of sectors. */
++
++ grub_uint32_t block_size;
++ grub_uint32_t metadata_size;
++ grub_uint32_t max_req_size;
++};
++
++/* Data structures for NVMe admin identify commands */
++
++struct nvme_identify_ctrl {
++ grub_uint16_t vid;
++ grub_uint16_t ssvid;
++ char sn[20];
++ char mn[40];
++ char fr[8];
++
++ grub_uint8_t rab;
++ grub_uint8_t ieee[3];
++ grub_uint8_t cmic;
++ grub_uint8_t mdts;
++
++ char _boring[516 - 78];
++
++ grub_uint32_t nn; /* number of namespaces */
++};
++
++struct nvme_identify_ns_list {
++ grub_uint32_t ns_id[1024];
++};
++
++struct nvme_lba_format {
++ grub_uint16_t ms;
++ grub_uint8_t lbads;
++ grub_uint8_t rp;
++};
++
++struct nvme_identify_ns {
++ grub_uint64_t nsze;
++ grub_uint64_t ncap;
++ grub_uint64_t nuse;
++ grub_uint8_t nsfeat;
++ grub_uint8_t nlbaf;
++ grub_uint8_t flbas;
++
++ char _boring[128 - 27];
++
++ struct nvme_lba_format lbaf[16];
++};
++
++union nvme_identify {
++ struct nvme_identify_ns ns;
++ struct nvme_identify_ctrl ctrl;
++ struct nvme_identify_ns_list ns_list;
++};
++
++/* NVMe constants */
++
++#define NVME_CAP_CSS_NVME (1ULL << 37)
++
++#define NVME_CSTS_FATAL (1U << 1)
++#define NVME_CSTS_RDY (1U << 0)
++
++#define NVME_CC_EN (1U << 0)
++
++#define NVME_SQE_OPC_ADMIN_CREATE_IO_SQ 1U
++#define NVME_SQE_OPC_ADMIN_CREATE_IO_CQ 5U
++#define NVME_SQE_OPC_ADMIN_IDENTIFY 6U
++
++#define NVME_SQE_OPC_IO_WRITE 1U
++#define NVME_SQE_OPC_IO_READ 2U
++
++#define NVME_ADMIN_IDENTIFY_CNS_ID_NS 0U
++#define NVME_ADMIN_IDENTIFY_CNS_ID_CTRL 1U
++#define NVME_ADMIN_IDENTIFY_CNS_GET_NS_LIST 2U
++
++#define NVME_CQE_DW3_P (1U << 16)
++
++#define NVME_PAGE_SIZE 4096
++#define NVME_PAGE_MASK ~(NVME_PAGE_SIZE - 1)
++
++/* Length for the queue entries. */
++#define NVME_SQE_SIZE_LOG 6
++#define NVME_CQE_SIZE_LOG 4
++
++#endif
++
++/* EOF */
+diff --git a/grub-core/disk/nvme.c b/grub-core/disk/nvme.c
+new file mode 100644
+index 000000000..093237c70
+--- /dev/null
++++ b/grub-core/disk/nvme.c
+@@ -0,0 +1,781 @@
++// Low level NVMe disk access
++//
++// Based on SeaBIOS NVMe driver - Copyright 2017 Amazon.com, Inc. or its affiliates.
++// Port to GRUB2 done by Mate Kukri
++//
++// This file may be distributed under the terms of the GNU LGPLv3 license.
++
++#include <grub/disk.h>
++#include <grub/dl.h>
++#include <grub/pci.h>
++#include "nvme-int.h"
++
++GRUB_MOD_LICENSE ("GPLv3"); /* LGPLv3 in reality but it is GPLv3 compatible */
++
++static grub_uint32_t grub_nvme_ctrlcnt;
++static grub_uint32_t grub_nvme_nscnt;
++
++static struct nvme_namespace *grub_nvme_namespaces;
++
++// Page aligned "dma bounce buffer" of size NVME_PAGE_SIZE
++static void *nvme_dma_buffer;
++
++static void *
++zalloc_page_aligned(grub_uint32_t size)
++{
++ void *res = grub_memalign(NVME_PAGE_SIZE, size);
++ if (res) grub_memset(res, 0, size);
++ return res;
++}
++
++static void
++nvme_init_queue_common(struct nvme_ctrl *ctrl, struct nvme_queue *q, grub_uint16_t q_idx,
++ grub_uint16_t length)
++{
++ grub_memset(q, 0, sizeof(*q));
++ q->dbl = (grub_uint32_t *)((char *)ctrl->reg + 0x1000 + q_idx * ctrl->doorbell_stride);
++ grub_dprintf("nvme", " q %p q_idx %u dbl %p\n", q, q_idx, q->dbl);
++ q->mask = length - 1;
++}
++
++static int
++nvme_init_sq(struct nvme_ctrl *ctrl, struct nvme_sq *sq, grub_uint16_t q_idx, grub_uint16_t length,
++ struct nvme_cq *cq)
++{
++ nvme_init_queue_common(ctrl, &sq->common, q_idx, length);
++ sq->sqe = zalloc_page_aligned(sizeof(*sq->sqe) * length);
++
++ if (!sq->sqe) {
++ return -1;
++ }
++
++ grub_dprintf("nvme", "sq %p q_idx %u sqe %p\n", sq, q_idx, sq->sqe);
++ sq->cq = cq;
++ sq->head = 0;
++ sq->tail = 0;
++
++ return 0;
++}
++
++static int
++nvme_init_cq(struct nvme_ctrl *ctrl, struct nvme_cq *cq, grub_uint16_t q_idx, grub_uint16_t length)
++{
++ nvme_init_queue_common(ctrl, &cq->common, q_idx, length);
++ cq->cqe = zalloc_page_aligned(sizeof(*cq->cqe) * length);
++ if (!cq->cqe) {
++ return -1;
++ }
++
++ cq->head = 0;
++
++ /* All CQE phase bits are initialized to zero. This means initially we wait
++ for the host controller to set these to 1. */
++ cq->phase = 1;
++
++ return 0;
++}
++
++static int
++nvme_poll_cq(struct nvme_cq *cq)
++{
++ grub_uint32_t dw3 = *(volatile grub_uint32_t *) &cq->cqe[cq->head].dword[3];
++ return (!!(dw3 & NVME_CQE_DW3_P) == cq->phase);
++}
++
++static int
++nvme_is_cqe_success(struct nvme_cqe const *cqe)
++{
++ return ((cqe->status >> 1) & 0xFF) == 0;
++}
++
++static struct nvme_cqe
++nvme_error_cqe(void)
++{
++ struct nvme_cqe r;
++
++ /* 0xFF is a vendor specific status code != success. Should be okay for
++ indicating failure. */
++ grub_memset(&r, 0xFF, sizeof(r));
++ return r;
++}
++
++static struct nvme_cqe
++nvme_consume_cqe(struct nvme_sq *sq)
++{
++ struct nvme_cq *cq = sq->cq;
++
++ if (!nvme_poll_cq(cq)) {
++ /* Cannot consume a completion queue entry, if there is none ready. */
++ return nvme_error_cqe();
++ }
++
++ struct nvme_cqe *cqe = &cq->cqe[cq->head];
++ grub_uint16_t cq_next_head = (cq->head + 1) & cq->common.mask;
++ grub_dprintf("nvme", "cq %p head %u -> %u\n", cq, cq->head, cq_next_head);
++ if (cq_next_head < cq->head) {
++ grub_dprintf("nvme", "cq %p wrap\n", cq);
++ cq->phase = ~cq->phase;
++ }
++ cq->head = cq_next_head;
++
++ /* Update the submission queue head. */
++ if (cqe->sq_head != sq->head) {
++ sq->head = cqe->sq_head;
++ grub_dprintf("nvme", "sq %p advanced to %u\n", sq, cqe->sq_head);
++ }
++
++ /* Tell the controller that we consumed the completion. */
++ *(volatile grub_uint32_t *) cq->common.dbl = cq->head;
++
++ return *cqe;
++}
++
++static struct nvme_cqe
++nvme_wait(struct nvme_sq *sq)
++{
++ // static const unsigned nvme_timeout = 5000 /* ms */;
++ // grub_uint32_t to = timer_calc(nvme_timeout);
++ while (!nvme_poll_cq(sq->cq)) {
++ /* FIXME
++ yield();
++
++ if (timer_check(to)) {
++ warn_timeout();
++ return nvme_error_cqe();
++ }*/
++ }
++
++ return nvme_consume_cqe(sq);
++}
++
++/* Returns the next submission queue entry (or NULL if the queue is full). It
++ also fills out Command Dword 0 and clears the rest. */
++static struct nvme_sqe *
++nvme_get_next_sqe(struct nvme_sq *sq, grub_uint8_t opc, void *metadata, void *data, void *data2)
++{
++ if (((sq->head + 1) & sq->common.mask) == sq->tail) {
++ grub_dprintf("nvme", "submission queue is full\n");
++ return NULL;
++ }
++
++ struct nvme_sqe *sqe = &sq->sqe[sq->tail];
++ grub_dprintf("nvme", "sq %p next_sqe %u\n", sq, sq->tail);
++
++ grub_memset(sqe, 0, sizeof(*sqe));
++ sqe->cdw0 = opc | (sq->tail << 16 /* CID */);
++ sqe->mptr = (grub_uint32_t)metadata;
++ sqe->dptr_prp1 = (grub_uint32_t)data;
++ sqe->dptr_prp2 = (grub_uint32_t)data2;
++
++ return sqe;
++}
++
++/* Call this after you've filled out an sqe that you've got from nvme_get_next_sqe. */
++static void
++nvme_commit_sqe(struct nvme_sq *sq)
++{
++ grub_dprintf("nvme", "sq %p commit_sqe %u\n", sq, sq->tail);
++ sq->tail = (sq->tail + 1) & sq->common.mask;
++ *(volatile grub_uint32_t *) sq->common.dbl = sq->tail;
++}
++
++/* Perform an identify command on the admin queue and return the resulting
++ buffer. This may be a NULL pointer, if something failed. This function
++ cannot be used after initialization, because it uses buffers in tmp zone. */
++static union nvme_identify *
++nvme_admin_identify(struct nvme_ctrl *ctrl, grub_uint8_t cns, grub_uint32_t nsid)
++{
++ union nvme_identify *identify_buf = zalloc_page_aligned(4096);
++ if (!identify_buf)
++ return NULL;
++
++ struct nvme_sqe *cmd_identify;
++ cmd_identify = nvme_get_next_sqe(&ctrl->admin_sq,
++ NVME_SQE_OPC_ADMIN_IDENTIFY, NULL,
++ identify_buf, NULL);
++ if (!cmd_identify)
++ goto error;
++
++ cmd_identify->nsid = nsid;
++ cmd_identify->dword[10] = cns;
++
++ nvme_commit_sqe(&ctrl->admin_sq);
++
++ struct nvme_cqe cqe = nvme_wait(&ctrl->admin_sq);
++
++ if (!nvme_is_cqe_success(&cqe)) {
++ goto error;
++ }
++
++ return identify_buf;
++ error:
++ grub_free(identify_buf);
++ return NULL;
++}
++
++static struct nvme_identify_ctrl *
++nvme_admin_identify_ctrl(struct nvme_ctrl *ctrl)
++{
++ return &nvme_admin_identify(ctrl, NVME_ADMIN_IDENTIFY_CNS_ID_CTRL, 0)->ctrl;
++}
++
++static struct nvme_identify_ns *
++nvme_admin_identify_ns(struct nvme_ctrl *ctrl, grub_uint32_t ns_id)
++{
++ return &nvme_admin_identify(ctrl, NVME_ADMIN_IDENTIFY_CNS_ID_NS,
++ ns_id)->ns;
++}
++
++static void
++nvme_probe_ns(struct nvme_ctrl *ctrl, grub_uint32_t ns_idx, grub_uint8_t mdts)
++{
++ grub_uint32_t ns_id = ns_idx + 1;
++
++ struct nvme_identify_ns *id = nvme_admin_identify_ns(ctrl, ns_id);
++ if (!id) {
++ grub_dprintf("nvme", "NVMe couldn't identify namespace %u.\n", ns_id);
++ goto free_buffer;
++ }
++
++ grub_uint8_t current_lba_format = id->flbas & 0xF;
++ if (current_lba_format > id->nlbaf) {
++ grub_dprintf("nvme", "NVMe NS %u: current LBA format %u is beyond what the "
++ " namespace supports (%u)?\n",
++ ns_id, current_lba_format, id->nlbaf + 1);
++ goto free_buffer;
++ }
++
++ if (!id->nsze) {
++ grub_dprintf("nvme", "NVMe NS %u is inactive.\n", ns_id);
++ goto free_buffer;
++ }
++
++ if (!nvme_dma_buffer) {
++ nvme_dma_buffer = zalloc_page_aligned(NVME_PAGE_SIZE);
++ if (!nvme_dma_buffer) {
++ goto free_buffer;
++ }
++ }
++
++ struct nvme_namespace *ns = grub_malloc(sizeof(*ns));
++ if (!ns) {
++ goto free_buffer;
++ }
++ grub_memset(ns, 0, sizeof(*ns));
++ ns->ctrl = ctrl;
++ ns->ns_id = ns_id;
++ ns->lba_count = id->nsze;
++
++ struct nvme_lba_format *fmt = &id->lbaf[current_lba_format];
++
++ ns->block_size = 1U << fmt->lbads;
++ ns->metadata_size = fmt->ms;
++
++ if (ns->block_size > NVME_PAGE_SIZE) {
++ /* If we see devices that trigger this path, we need to increase our
++ buffer size. */
++ grub_free(ns);
++ goto free_buffer;
++ }
++
++ if (mdts) {
++ ns->max_req_size = ((1U << mdts) * NVME_PAGE_SIZE) / ns->block_size;
++ grub_dprintf("nvme", "NVME NS %u max request size: %d sectors\n",
++ ns_id, ns->max_req_size);
++ } else {
++ ns->max_req_size = -1U;
++ }
++
++ ns->devname = grub_xasprintf("nvme%un%u", ctrl->ctrlnum, ns_id);
++ ns->nsnum = grub_nvme_nscnt++;
++
++ grub_list_push (GRUB_AS_LIST_P (&grub_nvme_namespaces), GRUB_AS_LIST (ns));
++
++free_buffer:
++ grub_free(id);
++}
++
++
++/* Release memory allocated for a completion queue */
++static void
++nvme_destroy_cq(struct nvme_cq *cq)
++{
++ grub_free(cq->cqe);
++ cq->cqe = NULL;
++}
++
++/* Release memory allocated for a submission queue */
++static void
++nvme_destroy_sq(struct nvme_sq *sq)
++{
++ grub_free(sq->sqe);
++ sq->sqe = NULL;
++}
++
++/* Returns 0 on success. */
++static int
++nvme_create_io_cq(struct nvme_ctrl *ctrl, struct nvme_cq *cq, grub_uint16_t q_idx)
++{
++ int rc;
++ struct nvme_sqe *cmd_create_cq;
++ grub_uint32_t length = 1 + (ctrl->reg->cap & 0xffff);
++ if (length > NVME_PAGE_SIZE / sizeof(struct nvme_cqe))
++ length = NVME_PAGE_SIZE / sizeof(struct nvme_cqe);
++
++ rc = nvme_init_cq(ctrl, cq, q_idx, length);
++ if (rc) {
++ goto err;
++ }
++
++ cmd_create_cq = nvme_get_next_sqe(&ctrl->admin_sq,
++ NVME_SQE_OPC_ADMIN_CREATE_IO_CQ, NULL,
++ cq->cqe, NULL);
++ if (!cmd_create_cq) {
++ goto err_destroy_cq;
++ }
++
++ cmd_create_cq->dword[10] = (cq->common.mask << 16) | (q_idx >> 1);
++ cmd_create_cq->dword[11] = 1 /* physically contiguous */;
++
++ nvme_commit_sqe(&ctrl->admin_sq);
++
++ struct nvme_cqe cqe = nvme_wait(&ctrl->admin_sq);
++
++ if (!nvme_is_cqe_success(&cqe)) {
++ grub_dprintf("nvme", "create io cq failed: %08x %08x %08x %08x\n",
++ cqe.dword[0], cqe.dword[1], cqe.dword[2], cqe.dword[3]);
++
++ goto err_destroy_cq;
++ }
++
++ return 0;
++
++err_destroy_cq:
++ nvme_destroy_cq(cq);
++err:
++ return -1;
++}
++
++/* Returns 0 on success. */
++static int
++nvme_create_io_sq(struct nvme_ctrl *ctrl, struct nvme_sq *sq, grub_uint16_t q_idx, struct nvme_cq *cq)
++{
++ int rc;
++ struct nvme_sqe *cmd_create_sq;
++ grub_uint32_t length = 1 + (ctrl->reg->cap & 0xffff);
++ if (length > NVME_PAGE_SIZE / sizeof(struct nvme_cqe))
++ length = NVME_PAGE_SIZE / sizeof(struct nvme_cqe);
++
++ rc = nvme_init_sq(ctrl, sq, q_idx, length, cq);
++ if (rc) {
++ goto err;
++ }
++
++ cmd_create_sq = nvme_get_next_sqe(&ctrl->admin_sq,
++ NVME_SQE_OPC_ADMIN_CREATE_IO_SQ, NULL,
++ sq->sqe, NULL);
++ if (!cmd_create_sq) {
++ goto err_destroy_sq;
++ }
++
++ cmd_create_sq->dword[10] = (sq->common.mask << 16) | (q_idx >> 1);
++ cmd_create_sq->dword[11] = (q_idx >> 1) << 16 | 1 /* contiguous */;
++ grub_dprintf("nvme", "sq %p create dword10 %08x dword11 %08x\n", sq,
++ cmd_create_sq->dword[10], cmd_create_sq->dword[11]);
++
++ nvme_commit_sqe(&ctrl->admin_sq);
++
++ struct nvme_cqe cqe = nvme_wait(&ctrl->admin_sq);
++
++ if (!nvme_is_cqe_success(&cqe)) {
++ grub_dprintf("nvme", "create io sq failed: %08x %08x %08x %08x\n",
++ cqe.dword[0], cqe.dword[1], cqe.dword[2], cqe.dword[3]);
++ goto err_destroy_sq;
++ }
++
++ return 0;
++
++err_destroy_sq:
++ nvme_destroy_sq(sq);
++err:
++ return -1;
++}
++
++/* Reads count sectors into buf. The buffer cannot cross page boundaries. */
++static int
++nvme_io_xfer(struct nvme_namespace *ns, grub_uint64_t lba, void *prp1, void *prp2,
++ grub_uint16_t count, int write)
++{
++ if (((grub_uint32_t)prp1 & 0x3) || ((grub_uint32_t)prp2 & 0x3)) {
++ /* Buffer is misaligned */
++ return -1;
++ }
++
++ struct nvme_sqe *io_read = nvme_get_next_sqe(&ns->ctrl->io_sq,
++ write ? NVME_SQE_OPC_IO_WRITE
++ : NVME_SQE_OPC_IO_READ,
++ NULL, prp1, prp2);
++ io_read->nsid = ns->ns_id;
++ io_read->dword[10] = (grub_uint32_t)lba;
++ io_read->dword[11] = (grub_uint32_t)(lba >> 32);
++ io_read->dword[12] = (1U << 31 /* limited retry */) | (count - 1);
++
++ nvme_commit_sqe(&ns->ctrl->io_sq);
++
++ struct nvme_cqe cqe = nvme_wait(&ns->ctrl->io_sq);
++
++ if (!nvme_is_cqe_success(&cqe)) {
++ grub_dprintf("nvme", "read io: %08x %08x %08x %08x\n",
++ cqe.dword[0], cqe.dword[1], cqe.dword[2], cqe.dword[3]);
++
++ return -1;
++ }
++
++ grub_dprintf("nvme", "ns %u %s lba %llu+%u\n", ns->ns_id, write ? "write" : "read",
++ lba, count);
++ return count;
++}
++
++// Transfer up to one page of data using the internal dma bounce buffer
++static int
++nvme_bounce_xfer(struct nvme_namespace *ns, grub_uint64_t lba, void *buf, grub_uint16_t count,
++ int write)
++{
++ grub_uint16_t const max_blocks = NVME_PAGE_SIZE / ns->block_size;
++ grub_uint16_t blocks = count < max_blocks ? count : max_blocks;
++
++ if (write)
++ grub_memcpy(nvme_dma_buffer, buf, blocks * ns->block_size);
++
++ int res = nvme_io_xfer(ns, lba, nvme_dma_buffer, NULL, blocks, write);
++
++ if (!write && res >= 0)
++ grub_memcpy(buf, nvme_dma_buffer, res * ns->block_size);
++
++ return res;
++}
++
++#define NVME_MAX_PRPL_ENTRIES 15 /* Allows requests up to 64kb */
++
++// Transfer data using page list (if applicable)
++static int
++nvme_prpl_xfer(struct nvme_namespace *ns, grub_uint64_t lba, void *buf, grub_uint16_t count,
++ int write)
++{
++ grub_uint32_t base = (long)buf;
++ grub_int32_t size;
++
++ if (count > ns->max_req_size)
++ count = ns->max_req_size;
++
++ size = count * ns->block_size;
++ /* Special case for transfers that fit into PRP1, but are unaligned */
++ if (((size + (base & ~NVME_PAGE_MASK)) <= NVME_PAGE_SIZE))
++ goto single;
++
++ /* Every request has to be page aligned */
++ if (base & ~NVME_PAGE_MASK)
++ goto bounce;
++
++ /* Make sure a full block fits into the last chunk */
++ if (size & (ns->block_size - 1ULL))
++ goto bounce;
++
++ /* Build PRP list if we need to describe more than 2 pages */
++ if ((ns->block_size * count) > (NVME_PAGE_SIZE * 2)) {
++ grub_uint32_t prpl_len = 0;
++ grub_uint64_t *prpl = nvme_dma_buffer;
++ int first_page = 1;
++ for (; size > 0; base += NVME_PAGE_SIZE, size -= NVME_PAGE_SIZE) {
++ if (first_page) {
++ /* First page is special */
++ first_page = 0;
++ continue;
++ }
++ if (prpl_len >= NVME_MAX_PRPL_ENTRIES)
++ goto bounce;
++ prpl[prpl_len++] = base;
++ }
++ return nvme_io_xfer(ns, lba, buf, prpl, count, write);
++ }
++
++ /* Directly embed the 2nd page if we only need 2 pages */
++ if ((ns->block_size * count) > NVME_PAGE_SIZE)
++ return nvme_io_xfer(ns, lba, buf, (char *) buf + NVME_PAGE_SIZE, count, write);
++
++single:
++ /* One page is enough, don't expose anything else */
++ return nvme_io_xfer(ns, lba, buf, NULL, count, write);
++
++bounce:
++ /* Use bounce buffer to make transfer */
++ return nvme_bounce_xfer(ns, lba, buf, count, write);
++}
++
++static int
++nvme_create_io_queues(struct nvme_ctrl *ctrl)
++{
++ if (nvme_create_io_cq(ctrl, &ctrl->io_cq, 3))
++ goto err;
++
++ if (nvme_create_io_sq(ctrl, &ctrl->io_sq, 2, &ctrl->io_cq))
++ goto err_free_cq;
++
++ return 0;
++
++ err_free_cq:
++ nvme_destroy_cq(&ctrl->io_cq);
++ err:
++ return -1;
++}
++
++/* Waits for CSTS.RDY to match rdy. Returns 0 on success. */
++static int
++nvme_wait_csts_rdy(struct nvme_ctrl *ctrl, unsigned rdy)
++{
++ // grub_uint32_t const max_to = 500 /* ms */ * ((ctrl->reg->cap >> 24) & 0xFFU);
++ // grub_uint32_t to = timer_calc(max_to);
++ grub_uint32_t csts;
++
++ while (rdy != ((csts = ctrl->reg->csts) & NVME_CSTS_RDY)) {
++ // FIXME
++ //yield();
++
++ if (csts & NVME_CSTS_FATAL) {
++ grub_dprintf("nvme", "NVMe fatal error during controller shutdown\n");
++ return -1;
++ }
++
++ /*
++ if (timer_check(to)) {
++ warn_timeout();
++ return -1;
++ }*/
++ }
++
++ return 0;
++}
++
++/* Returns 0 on success. */
++static int grub_nvme_controller_enable(struct nvme_ctrl *ctrl)
++{
++ grub_pci_address_t addr;
++ int rc;
++
++ addr = grub_pci_make_address (ctrl->pci, GRUB_PCI_REG_COMMAND);
++ grub_pci_write_word (addr, grub_pci_read_word (addr) | GRUB_PCI_COMMAND_BUS_MASTER);
++
++ /* Turn the controller off. */
++ ctrl->reg->cc = 0;
++ if (nvme_wait_csts_rdy(ctrl, 0)) {
++ grub_dprintf("nvme", "NVMe fatal error during controller shutdown\n");
++ return -1;
++ }
++
++ ctrl->doorbell_stride = 4U << ((ctrl->reg->cap >> 32) & 0xF);
++
++ rc = nvme_init_cq(ctrl, &ctrl->admin_cq, 1,
++ NVME_PAGE_SIZE / sizeof(struct nvme_cqe));
++ if (rc) {
++ return -1;
++ }
++
++ rc = nvme_init_sq(ctrl, &ctrl->admin_sq, 0,
++ NVME_PAGE_SIZE / sizeof(struct nvme_sqe), &ctrl->admin_cq);
++ if (rc) {
++ goto err_destroy_admin_cq;
++ }
++
++ ctrl->reg->aqa = ctrl->admin_cq.common.mask << 16
++ | ctrl->admin_sq.common.mask;
++
++ ctrl->reg->asq = (grub_uint32_t)ctrl->admin_sq.sqe;
++ ctrl->reg->acq = (grub_uint32_t)ctrl->admin_cq.cqe;
++
++ grub_dprintf("nvme", " admin submission queue: %p\n", ctrl->admin_sq.sqe);
++ grub_dprintf("nvme", " admin completion queue: %p\n", ctrl->admin_cq.cqe);
++
++ ctrl->reg->cc = NVME_CC_EN | (NVME_CQE_SIZE_LOG << 20)
++ | (NVME_SQE_SIZE_LOG << 16 /* IOSQES */);
++
++ if (nvme_wait_csts_rdy(ctrl, 1)) {
++ grub_dprintf("nvme", "NVMe fatal error while enabling controller\n");
++ goto err_destroy_admin_sq;
++ }
++
++ /* The admin queue is set up and the controller is ready. Let's figure out
++ what namespaces we have. */
++
++ struct nvme_identify_ctrl *identify = nvme_admin_identify_ctrl(ctrl);
++
++ if (!identify) {
++ grub_dprintf("nvme", "NVMe couldn't identify controller.\n");
++ goto err_destroy_admin_sq;
++ }
++
++ grub_dprintf("nvme", "NVMe has %u namespace%s.\n",
++ identify->nn, (identify->nn == 1) ? "" : "s");
++
++ ctrl->ns_count = identify->nn;
++ grub_uint8_t mdts = identify->mdts;
++ grub_free(identify);
++
++ if ((ctrl->ns_count == 0) || nvme_create_io_queues(ctrl)) {
++ /* No point to continue, if the controller says it doesn't have
++ namespaces or we couldn't create I/O queues. */
++ goto err_destroy_admin_sq;
++ }
++
++ /* Give the controller a global number */
++ ctrl->ctrlnum = grub_nvme_ctrlcnt++;
++
++ /* Populate namespace IDs */
++ for (grub_uint32_t ns_idx = 0; ns_idx < ctrl->ns_count; ns_idx++) {
++ nvme_probe_ns(ctrl, ns_idx, mdts);
++ }
++
++ grub_dprintf("nvme", "NVMe initialization complete!\n");
++ return 0;
++
++ err_destroy_admin_sq:
++ nvme_destroy_sq(&ctrl->admin_sq);
++ err_destroy_admin_cq:
++ nvme_destroy_cq(&ctrl->admin_cq);
++ return -1;
++}
++
++static int grub_nvme_pci_probe(grub_pci_device_t dev, grub_pci_id_t pciid __attribute__ ((unused)), void *data __attribute__ ((unused)))
++{
++ grub_pci_address_t addr;
++ grub_uint32_t class, bar, version;
++ struct nvme_reg volatile *reg;
++
++ class = grub_pci_read (grub_pci_make_address (dev, GRUB_PCI_REG_CLASS));
++ if (class >> 16 != 0x0108)
++ return 0;
++ if ((class >> 8 & 0xff) != 2) { /* as of NVM 1.0e */
++ grub_dprintf("nvme", "Found incompatble NVMe: prog-if=%02x\n", class >> 8 & 0xff);
++ return 0;
++ }
++
++ bar = grub_pci_read (grub_pci_make_address (dev, GRUB_PCI_REG_ADDRESS_REG0));
++ reg = grub_pci_device_map_range (dev, bar & GRUB_PCI_ADDR_MEM_MASK, sizeof (*reg));
++
++ addr = grub_pci_make_address (dev, GRUB_PCI_REG_COMMAND);
++ grub_pci_write_word (addr, grub_pci_read_word (addr) | GRUB_PCI_COMMAND_MEM_ENABLED);
++
++ version = reg->vs;
++ grub_dprintf("nvme", "Found NVMe controller with version %u.%u.%u.\n", version >> 16, (version >> 8) & 0xFF, version & 0xFF);
++ grub_dprintf("nvme", " Capabilities %016llx\n", reg->cap);
++
++ if (~reg->cap & NVME_CAP_CSS_NVME) {
++ grub_dprintf("nvme", "Controller doesn't speak NVMe command set. Skipping.\n");
++ goto err;
++ }
++
++ struct nvme_ctrl *ctrl = grub_malloc(sizeof(*ctrl));
++ if (!ctrl)
++ goto err;
++
++ grub_memset(ctrl, 0, sizeof(*ctrl));
++
++ ctrl->reg = reg;
++ ctrl->pci = dev;
++
++ if (grub_nvme_controller_enable(ctrl))
++ goto err_free_ctrl;
++
++ return 0;
++
++ err_free_ctrl:
++ grub_free(ctrl);
++ err:
++ grub_dprintf("nvme", "Failed to enable NVMe controller.\n");
++ return 0;
++}
++
++static int
++grub_nvme_iterate (grub_disk_dev_iterate_hook_t hook, void *hook_data, grub_disk_pull_t pull)
++{
++ struct nvme_namespace *ns;
++
++ if (pull != GRUB_DISK_PULL_NONE)
++ return 0;
++
++ FOR_LIST_ELEMENTS(ns, grub_nvme_namespaces)
++ if (hook (ns->devname, hook_data))
++ return 1;
++
++ return 0;
++}
++
++static grub_err_t
++grub_nvme_open (const char *name __attribute ((unused)), grub_disk_t disk __attribute ((unused)))
++{
++ struct nvme_namespace *ns;
++
++ FOR_LIST_ELEMENTS(ns, grub_nvme_namespaces)
++ if (grub_strcmp (ns->devname, name) == 0)
++ break;
++
++ if (! ns)
++ return grub_error (GRUB_ERR_UNKNOWN_DEVICE, "can't open device");
++
++ disk->total_sectors = ns->lba_count;
++ disk->max_agglomerate = ns->max_req_size;
++
++ disk->id = ns->nsnum; /* global id of the namespace */
++
++ disk->data = ns;
++
++ return 0;
++}
++
++static grub_err_t
++nvme_readwrite(struct nvme_namespace *ns, grub_disk_addr_t sector, grub_size_t num_sectors, char *buf, int write)
++{
++ for (int i = 0; i < num_sectors;) {
++ grub_uint16_t blocks_remaining = num_sectors - i;
++ char *op_buf = buf + i * ns->block_size;
++ int blocks = nvme_prpl_xfer(ns, sector + i, op_buf, blocks_remaining, write);
++ if (blocks < 0)
++ return GRUB_ERR_IO;
++ i += blocks;
++ }
++ return GRUB_ERR_NONE;
++}
++
++static grub_err_t
++grub_nvme_read (grub_disk_t disk, grub_disk_addr_t sector, grub_size_t num_sectors, char *buf)
++{
++ return nvme_readwrite((struct nvme_namespace *) disk->data, sector, num_sectors, buf, 0);
++}
++
++static grub_err_t
++grub_nvme_write (grub_disk_t disk, grub_disk_addr_t sector, grub_size_t num_sectors, const char *buf)
++{
++ return nvme_readwrite((struct nvme_namespace *) disk->data, sector, num_sectors, buf, 1);
++}
++
++static struct grub_disk_dev grub_nvme_dev =
++ {
++ .name = "nvme",
++ .id = GRUB_DISK_DEVICE_NVME_ID,
++ .disk_iterate = grub_nvme_iterate,
++ .disk_open = grub_nvme_open,
++ .disk_read = grub_nvme_read,
++ .disk_write = grub_nvme_write,
++ .next = 0
++ };
++
++GRUB_MOD_INIT(nvme)
++{
++ grub_stop_disk_firmware ();
++ grub_pci_iterate (grub_nvme_pci_probe, NULL);
++ grub_disk_dev_register (&grub_nvme_dev);
++}
++
++GRUB_MOD_FINI(nvme)
++{
++ grub_disk_dev_unregister (&grub_nvme_dev);
++}
+diff --git a/include/grub/disk.h b/include/grub/disk.h
+index fbf23df7f..186e76f0b 100644
+--- a/include/grub/disk.h
++++ b/include/grub/disk.h
+@@ -52,6 +52,7 @@ enum grub_disk_dev_id
+ GRUB_DISK_DEVICE_UBOOTDISK_ID,
+ GRUB_DISK_DEVICE_XEN,
+ GRUB_DISK_DEVICE_OBDISK_ID,
++ GRUB_DISK_DEVICE_NVME_ID
+ };
+
+ struct grub_disk;
+--
+2.39.2
+
diff --git a/config/grub/xhci/target.cfg b/config/grub/xhci/target.cfg
new file mode 100644
index 00000000..af33f65d
--- /dev/null
+++ b/config/grub/xhci/target.cfg
@@ -0,0 +1,2 @@
+tree="xhci"
+rev="b53ec06a1d6f22ffc1139cbfc0f292e4ca2da9cd"
diff --git a/config/ifd/3050micro/ifd b/config/ifd/3050micro/ifd
new file mode 100644
index 00000000..782c5697
--- /dev/null
+++ b/config/ifd/3050micro/ifd
Binary files differ
diff --git a/config/ifd/hp8200sff/ifd_4mb b/config/ifd/hp8200sff/ifd_4mb
index fef35107..141e1314 100644
--- a/config/ifd/hp8200sff/ifd_4mb
+++ b/config/ifd/hp8200sff/ifd_4mb
Binary files differ
diff --git a/config/ifd/ich10/gbe b/config/ifd/ich10/gbe
new file mode 100644
index 00000000..f1f51129
--- /dev/null
+++ b/config/ifd/ich10/gbe
Binary files differ
diff --git a/config/ifd/ich10/ifd_8 b/config/ifd/ich10/ifd_8
new file mode 100644
index 00000000..2bc82d7f
--- /dev/null
+++ b/config/ifd/ich10/ifd_8
Binary files differ
diff --git a/config/ifd/ich10/ifd_8_truncate b/config/ifd/ich10/ifd_8_truncate
new file mode 100644
index 00000000..2a9c0932
--- /dev/null
+++ b/config/ifd/ich10/ifd_8_truncate
Binary files differ
diff --git a/config/pcsx-redux/patches/0001-no-context-will-be-given.patch b/config/pcsx-redux/patches/0001-no-context-will-be-given.patch
new file mode 100644
index 00000000..b2968c11
--- /dev/null
+++ b/config/pcsx-redux/patches/0001-no-context-will-be-given.patch
@@ -0,0 +1,36 @@
+From 6516ecaea03845cd07732bd4ca8c32cd08ea4281 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Wed, 25 Sep 2024 23:45:56 +0100
+Subject: [PATCH 1/1] no context will be given.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ lbmkbofhmakefile | 16 ++++++++++++++++
+ 1 file changed, 16 insertions(+)
+ create mode 100644 lbmkbofhmakefile
+
+diff --git a/lbmkbofhmakefile b/lbmkbofhmakefile
+new file mode 100644
+index 00000000..fe2e36d2
+--- /dev/null
++++ b/lbmkbofhmakefile
+@@ -0,0 +1,16 @@
++# SPDX-License-Identifier: MIT
++# SPDX-FileCopyrightText: 2024 Leah Rowe <leah@libreboot.org>
++
++# This is not the original pcsx-redux Makefile.
++# We don't need to build all of PCSX-Redux, only the Open BIOS.
++# Due to idiosyncrasies of lbmk's design, it's simpler to just hack
++# the Makefile like this.
++
++all:
++ make -C src/mips/openbios
++
++clean:
++ make -C src/mips/openbios clean
++
++distclean:
++ make -C src/mips/openbios clean
+--
+2.39.5
+
diff --git a/config/pcsx-redux/target.cfg b/config/pcsx-redux/target.cfg
new file mode 100644
index 00000000..21dc4b2d
--- /dev/null
+++ b/config/pcsx-redux/target.cfg
@@ -0,0 +1,3 @@
+makeargs="-f lbmkbofhmakefile"
+cleanargs="-f lbmkbofhmakefile"
+mkhelper="copyps1bios"
diff --git a/config/seabios/default/config/libgfxinit b/config/seabios/default/config/libgfxinit
index 9c9fbe63..f1f4b0a6 100644
--- a/config/seabios/default/config/libgfxinit
+++ b/config/seabios/default/config/libgfxinit
@@ -28,7 +28,7 @@ CONFIG_ROM_SIZE=0
# Hardware support
#
CONFIG_ATA=y
-CONFIG_ATA_DMA=y
+# CONFIG_ATA_DMA is not set
# CONFIG_ATA_PIO32 is not set
CONFIG_AHCI=y
CONFIG_SDCARD=y
@@ -92,4 +92,7 @@ CONFIG_VGA_VBE=y
#
# Debugging
#
-CONFIG_DEBUG_LEVEL=0
+CONFIG_DEBUG_LEVEL=1
+# CONFIG_DEBUG_SERIAL is not set
+# CONFIG_DEBUG_SERIAL_MMIO is not set
+CONFIG_DEBUG_COREBOOT=y
diff --git a/config/seabios/default/config/normal b/config/seabios/default/config/normal
index 92b9c56c..187a7501 100644
--- a/config/seabios/default/config/normal
+++ b/config/seabios/default/config/normal
@@ -28,7 +28,7 @@ CONFIG_ROM_SIZE=0
# Hardware support
#
CONFIG_ATA=y
-CONFIG_ATA_DMA=y
+# CONFIG_ATA_DMA is not set
# CONFIG_ATA_PIO32 is not set
CONFIG_AHCI=y
CONFIG_SDCARD=y
@@ -88,4 +88,7 @@ CONFIG_VGA_EXTRA_STACK_SIZE=512
#
# Debugging
#
-CONFIG_DEBUG_LEVEL=0
+CONFIG_DEBUG_LEVEL=1
+# CONFIG_DEBUG_SERIAL is not set
+# CONFIG_DEBUG_SERIAL_MMIO is not set
+CONFIG_DEBUG_COREBOOT=y
diff --git a/config/seabios/default/config/vgarom b/config/seabios/default/config/vgarom
index 9f543cea..9e63e65c 100644
--- a/config/seabios/default/config/vgarom
+++ b/config/seabios/default/config/vgarom
@@ -28,7 +28,7 @@ CONFIG_ROM_SIZE=0
# Hardware support
#
CONFIG_ATA=y
-CONFIG_ATA_DMA=y
+# CONFIG_ATA_DMA is not set
# CONFIG_ATA_PIO32 is not set
CONFIG_AHCI=y
CONFIG_SDCARD=y
@@ -87,4 +87,7 @@ CONFIG_VGA_EXTRA_STACK_SIZE=512
#
# Debugging
#
-CONFIG_DEBUG_LEVEL=0
+CONFIG_DEBUG_LEVEL=1
+# CONFIG_DEBUG_SERIAL is not set
+# CONFIG_DEBUG_SERIAL_MMIO is not set
+CONFIG_DEBUG_COREBOOT=y
diff --git a/config/seabios/default/target.cfg b/config/seabios/default/target.cfg
index bc7cc9fc..f80b9db2 100644
--- a/config/seabios/default/target.cfg
+++ b/config/seabios/default/target.cfg
@@ -1,2 +1,2 @@
tree="default"
-rev="e5f2e4c69643bc3cd385306a9e5d29e11578148c"
+rev="62a1429ec1ec67f14c039d97627a6a7ef70a983c"
diff --git a/config/snippet/mit b/config/snippet/mit
new file mode 100644
index 00000000..969d061e
--- /dev/null
+++ b/config/snippet/mit
@@ -0,0 +1,17 @@
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.
diff --git a/config/submodule/coreboot/coreboot413/module.list b/config/submodule/coreboot/coreboot413/module.list
new file mode 100644
index 00000000..08e76de0
--- /dev/null
+++ b/config/submodule/coreboot/coreboot413/module.list
@@ -0,0 +1 @@
+3rdparty/vboot
diff --git a/config/submodule/coreboot/coreboot413/vboot/module.cfg b/config/submodule/coreboot/coreboot413/vboot/module.cfg
new file mode 100644
index 00000000..34656ba9
--- /dev/null
+++ b/config/submodule/coreboot/coreboot413/vboot/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/vboot.git"
+subrepo_bkup="https://github.com/coreboot/vboot"
+subhash="4c523ed10f25de872ac0513ebd6ca53d3970b9de"
diff --git a/config/submodule/coreboot/coreboot413/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/coreboot413/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
new file mode 100644
index 00000000..1ac41de6
--- /dev/null
+++ b/config/submodule/coreboot/coreboot413/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
@@ -0,0 +1,178 @@
+From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
+From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
+Date: Thu, 30 May 2024 14:08:33 -0600
+Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
+ vmlinuz_header_{offset,size}
+
+The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
+wrong:
+
+ if (!vmlinuz_header_size ||
+ kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+ kpart_data) {
+ return 1;
+ }
+
+`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
+unless something has overflowed! And `vmlinuz_header_offset` hasn't even
+been set yet (besides being initialized to zero)!
+
+GCC will deduce that if the check didn't cause the function to bail, then
+vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
+[2GiB,4GiB).
+
+On platforms where size_t is 32-bits, this is *especially* broken.
+memcpy's size argument must be in the range [0,2GiB). Because GCC has
+proved that vmlinuz_header_size is higher than that, it will fail to
+compile:
+
+ host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
+
+So, fix the check.
+
+I can now say that what I suspect the original author meant to write would
+be the following patch, if `vmlinuz_header_offset` were already set:
+
+ -kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
+ +now + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
+
+This hypothesis is supported by `now` not getting incremented by
+`kblob_size` the way it is for the keyblock and preamble sizes.
+
+However, we can also see that even this "corrected" bounds check is
+insufficient: it does not detect the vmlinuz_header overflowing into
+kblob_data.
+
+OK, so let's describe the fix:
+
+Have a `*vmlinuz_header` pointer instead of a
+`uint64_t vmlinuz_header_offset`, to be more similar to all the other
+regions. With this change, the correct check becomes a simple
+
+ vmlinuz_header + vmlinuz_header_size > kblob_data
+
+While we're at it, make some changes that could have helped avoid this in
+the first place:
+
+ - Add comments.
+ - Calculate the vmlinuz_header offset right away, instead of waiting.
+ - Go ahead and increment `now` by `kblob_size`, to increase regularity.
+
+Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
+---
+ host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
+ 1 file changed, 51 insertions(+), 21 deletions(-)
+
+diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
+index 4ccfcf33..d2c09443 100644
+--- a/host/lib/extract_vmlinuz.c
++++ b/host/lib/extract_vmlinuz.c
+@@ -15,16 +15,44 @@
+
+ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ void **vmlinuz_out, size_t *vmlinuz_size) {
++ // We're going to be extracting `vmlinuz_header` and
++ // `kblob_data`, and returning the concatenation of them.
++ //
++ // kpart_data = +-[kpart_size]------------------------------------+
++ // | |
++ // keyblock = | +-[keyblock->keyblock_size]-------------------+ |
++ // | | struct vb2_keyblock keyblock | |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // preamble = | +-[preamble->preamble_size]-------------------+ |
++ // | | struct vb2_kernel_preamble preamble | |
++ // | | char [] ...data... | |
++ // | | char [] vmlinuz_header | |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // kblob_data= | +-[preamble->body_signature.data_size]--------+ |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // +-------------------------------------------------+
++
+ size_t now = 0;
++ // The 3 sections of kpart_data.
++ struct vb2_keyblock *keyblock = NULL;
+ struct vb2_kernel_preamble *preamble = NULL;
+ uint8_t *kblob_data = NULL;
+ uint32_t kblob_size = 0;
++ // vmlinuz_header
++ uint8_t *vmlinuz_header = NULL;
+ uint32_t vmlinuz_header_size = 0;
+- uint64_t vmlinuz_header_address = 0;
+- uint64_t vmlinuz_header_offset = 0;
++ // The concatenated result.
+ void *vmlinuz = NULL;
+
+- struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
++ // Isolate the 3 sections of kpart_data.
++
++ keyblock = (struct vb2_keyblock *)kpart_data;
+ now += keyblock->keyblock_size;
+ if (now > kpart_size)
+ return 1;
+@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+
+ kblob_data = kpart_data + now;
+ kblob_size = preamble->body_signature.data_size;
+-
+- if (!kblob_data || (now + kblob_size) > kpart_size)
++ now += kblob_size;
++ if (now > kpart_size)
+ return 1;
+
++ // Find `vmlinuz_header` within `preamble`.
++
+ if (preamble->header_version_minor > 0) {
+- vmlinuz_header_address = preamble->vmlinuz_header_address;
++ // calculate the vmlinuz_header offset from
++ // the beginning of the kpart_data. The kblob doesn't
++ // include the body_load_offset, but does include
++ // the keyblock and preamble sections.
++ size_t vmlinuz_header_offset =
++ preamble->vmlinuz_header_address -
++ preamble->body_load_address +
++ keyblock->keyblock_size +
++ preamble->preamble_size;
++
++ vmlinuz_header = kpart_data + vmlinuz_header_offset;
+ vmlinuz_header_size = preamble->vmlinuz_header_size;
+ }
+
+- if (!vmlinuz_header_size ||
+- kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+- kpart_data) {
++ if (!vmlinuz_header ||
++ !vmlinuz_header_size ||
++ vmlinuz_header + vmlinuz_header_size > kblob_data) {
+ return 1;
+ }
+
+- // calculate the vmlinuz_header offset from
+- // the beginning of the kpart_data. The kblob doesn't
+- // include the body_load_offset, but does include
+- // the keyblock and preamble sections.
+- vmlinuz_header_offset = vmlinuz_header_address -
+- preamble->body_load_address +
+- keyblock->keyblock_size +
+- preamble->preamble_size;
++ // Concatenate and return.
+
+ vmlinuz = malloc(vmlinuz_header_size + kblob_size);
+ if (vmlinuz == NULL)
+ return 1;
+-
+- memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
+- vmlinuz_header_size);
+-
++ memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
+ memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
+
+ *vmlinuz_out = vmlinuz;
+--
+2.45.1
+
diff --git a/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg b/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg
new file mode 100644
index 00000000..6dde459a
--- /dev/null
+++ b/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20230628.tar.gz"
+subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20230628.tar.gz"
+subhash="d726e69ebd8b8110690e3aff8d1919b43b0a2185efdeb9131ea8d89d321ca3a318a89c721ea740ae366f31ed3d1c11c2906f8807ee8a190e6f67fe5b2023cea4"
diff --git a/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
new file mode 100644
index 00000000..d7864542
--- /dev/null
+++ b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/arm-trusted-firmware.git"
+subrepo_bkup="https://github.com/coreboot/arm-trusted-firmware"
+subhash="c5b8de86c8838d08d5d8c9d67c7a432817ee62b8"
diff --git a/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg b/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg
new file mode 100644
index 00000000..370a52ec
--- /dev/null
+++ b/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.42.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.42.tar.xz"
+subhash="155f3ba14cd220102f4f29a4f1e5cfee3c48aa03b74603460d05afb73c70d6657a9d87eee6eb88bf13203fe6f31177a5c9addc04384e956e7da8069c8ecd20a6"
diff --git a/config/submodule/coreboot/default/fsp/module.cfg b/config/submodule/coreboot/default/fsp/module.cfg
new file mode 100644
index 00000000..3373a1a9
--- /dev/null
+++ b/config/submodule/coreboot/default/fsp/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/fsp.git"
+subrepo_bkup="https://github.com/coreboot/fsp"
+subhash="800c85770b458ee7f7eeb1276b46e904590d3bd7"
diff --git a/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg b/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg
new file mode 100644
index 00000000..1e4037e8
--- /dev/null
+++ b/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.1.0/gcc-14.1.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.1.0/gcc-14.1.0.tar.xz"
+subhash="e9e224f2b26646fcf038d28dfa08b94c623bc57941f99894a321d01c600f7c68aff6b8837fd25e73e540de1f8de5606e98694a62cdcdfb525ce768b3ef6879ea"
diff --git a/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg
new file mode 100644
index 00000000..fe274faf
--- /dev/null
+++ b/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz"
+subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2"
diff --git a/config/submodule/coreboot/default/intel-microcode/module.cfg b/config/submodule/coreboot/default/intel-microcode/module.cfg
new file mode 100644
index 00000000..be106f7d
--- /dev/null
+++ b/config/submodule/coreboot/default/intel-microcode/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/intel-microcode.git"
+subrepo_bkup="https://github.com/coreboot/intel-microcode"
+subhash="5278dfcf98e89098326b3eb8a85d07120a8730f8"
diff --git a/config/submodule/coreboot/default/libgfxinit/module.cfg b/config/submodule/coreboot/default/libgfxinit/module.cfg
new file mode 100644
index 00000000..1ba41724
--- /dev/null
+++ b/config/submodule/coreboot/default/libgfxinit/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libgfxinit.git"
+subrepo_bkup="https://github.com/coreboot/libgfxinit"
+subhash="17cfc92f402493979783585b6581efbd98c0cf07"
diff --git a/config/submodule/coreboot/default/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch b/config/submodule/coreboot/default/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
new file mode 100644
index 00000000..2d248941
--- /dev/null
+++ b/config/submodule/coreboot/default/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
@@ -0,0 +1,42 @@
+From ba078864500de99c26b6ea7e3fdcef19bca582a7 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Mon, 20 May 2024 10:10:03 -0600
+Subject: [PATCH 1/1] g45/hw-gfx-gma-plls.adb: Make reference clock frequency
+ configurable
+
+Instead of assuming a 96 MHz reference clock frequency, use the value
+specified by the new INTEL_GMA_DPLL_REF_FREQ Kconfig. This defaults to
+96 MHz to preserve the existing behavior. An example of where this is
+needed is the DPLL_REF_SSCLK input, which will typically be 100 MHz
+to support LVDS spread spectrum clocking.
+
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ common/g45/hw-gfx-gma-plls.adb | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/common/g45/hw-gfx-gma-plls.adb b/common/g45/hw-gfx-gma-plls.adb
+index 67242f2..5e970d7 100644
+--- a/common/g45/hw-gfx-gma-plls.adb
++++ b/common/g45/hw-gfx-gma-plls.adb
+@@ -12,6 +12,8 @@
+ -- GNU General Public License for more details.
+ --
+
++with CB.Config;
++
+ with HW.Time;
+ with HW.GFX.GMA.Config;
+ with HW.GFX.GMA.Registers;
+@@ -460,7 +462,7 @@ is
+ (Display => Port_Cfg.Display,
+ Target_Dotclock => Target_Clock,
+ -- should be, but doesn't has to be always the same:
+- Reference_Clock => 96_000_000,
++ Reference_Clock => CB.Config.INTEL_GMA_DPLL_REF_FREQ,
+ Best_Clock => Clk,
+ Valid => Success);
+ else
+--
+2.39.2
+
diff --git a/config/submodule/coreboot/default/libhwbase/module.cfg b/config/submodule/coreboot/default/libhwbase/module.cfg
new file mode 100644
index 00000000..2937b8b7
--- /dev/null
+++ b/config/submodule/coreboot/default/libhwbase/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libhwbase.git"
+subrepo_bkup="https://github.com/coreboot/libhwbase"
+subhash="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/default/module.list b/config/submodule/coreboot/default/module.list
new file mode 100644
index 00000000..599df254
--- /dev/null
+++ b/config/submodule/coreboot/default/module.list
@@ -0,0 +1,13 @@
+3rdparty/arm-trusted-firmware
+3rdparty/fsp
+3rdparty/intel-microcode
+3rdparty/libgfxinit
+3rdparty/libhwbase
+3rdparty/vboot
+util/crossgcc/tarballs/binutils-2.42.tar.xz
+util/crossgcc/tarballs/gcc-14.1.0.tar.xz
+util/crossgcc/tarballs/gmp-6.3.0.tar.xz
+util/crossgcc/tarballs/mpc-1.3.1.tar.gz
+util/crossgcc/tarballs/mpfr-4.2.1.tar.xz
+util/crossgcc/tarballs/nasm-2.16.03.tar.bz2
+util/crossgcc/tarballs/acpica-unix-20230628.tar.gz
diff --git a/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg
new file mode 100644
index 00000000..f98b6444
--- /dev/null
+++ b/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz"
+subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97"
diff --git a/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg
new file mode 100644
index 00000000..3419bc30
--- /dev/null
+++ b/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475"
diff --git a/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg b/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg
new file mode 100644
index 00000000..c98cc71f
--- /dev/null
+++ b/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2"
+subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2"
+subhash="f28445d368debdf44219cc57df33800a8c0e49186cd60836d4adfec7700d53b801d34aa9fc9bfda74169843f33a1e8b465e11292582eb968bb9c3a26f54dd172"
diff --git a/config/submodule/coreboot/default/vboot/module.cfg b/config/submodule/coreboot/default/vboot/module.cfg
new file mode 100644
index 00000000..1dc4c904
--- /dev/null
+++ b/config/submodule/coreboot/default/vboot/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/vboot.git"
+subrepo_bkup="https://github.com/coreboot/vboot"
+subhash="4b12d392e5b12de29c582df4e717b1228e9f1594"
diff --git a/config/submodule/coreboot/default/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/default/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
new file mode 100644
index 00000000..1ac41de6
--- /dev/null
+++ b/config/submodule/coreboot/default/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
@@ -0,0 +1,178 @@
+From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
+From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
+Date: Thu, 30 May 2024 14:08:33 -0600
+Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
+ vmlinuz_header_{offset,size}
+
+The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
+wrong:
+
+ if (!vmlinuz_header_size ||
+ kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+ kpart_data) {
+ return 1;
+ }
+
+`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
+unless something has overflowed! And `vmlinuz_header_offset` hasn't even
+been set yet (besides being initialized to zero)!
+
+GCC will deduce that if the check didn't cause the function to bail, then
+vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
+[2GiB,4GiB).
+
+On platforms where size_t is 32-bits, this is *especially* broken.
+memcpy's size argument must be in the range [0,2GiB). Because GCC has
+proved that vmlinuz_header_size is higher than that, it will fail to
+compile:
+
+ host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
+
+So, fix the check.
+
+I can now say that what I suspect the original author meant to write would
+be the following patch, if `vmlinuz_header_offset` were already set:
+
+ -kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
+ +now + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
+
+This hypothesis is supported by `now` not getting incremented by
+`kblob_size` the way it is for the keyblock and preamble sizes.
+
+However, we can also see that even this "corrected" bounds check is
+insufficient: it does not detect the vmlinuz_header overflowing into
+kblob_data.
+
+OK, so let's describe the fix:
+
+Have a `*vmlinuz_header` pointer instead of a
+`uint64_t vmlinuz_header_offset`, to be more similar to all the other
+regions. With this change, the correct check becomes a simple
+
+ vmlinuz_header + vmlinuz_header_size > kblob_data
+
+While we're at it, make some changes that could have helped avoid this in
+the first place:
+
+ - Add comments.
+ - Calculate the vmlinuz_header offset right away, instead of waiting.
+ - Go ahead and increment `now` by `kblob_size`, to increase regularity.
+
+Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
+---
+ host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
+ 1 file changed, 51 insertions(+), 21 deletions(-)
+
+diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
+index 4ccfcf33..d2c09443 100644
+--- a/host/lib/extract_vmlinuz.c
++++ b/host/lib/extract_vmlinuz.c
+@@ -15,16 +15,44 @@
+
+ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ void **vmlinuz_out, size_t *vmlinuz_size) {
++ // We're going to be extracting `vmlinuz_header` and
++ // `kblob_data`, and returning the concatenation of them.
++ //
++ // kpart_data = +-[kpart_size]------------------------------------+
++ // | |
++ // keyblock = | +-[keyblock->keyblock_size]-------------------+ |
++ // | | struct vb2_keyblock keyblock | |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // preamble = | +-[preamble->preamble_size]-------------------+ |
++ // | | struct vb2_kernel_preamble preamble | |
++ // | | char [] ...data... | |
++ // | | char [] vmlinuz_header | |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // kblob_data= | +-[preamble->body_signature.data_size]--------+ |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // +-------------------------------------------------+
++
+ size_t now = 0;
++ // The 3 sections of kpart_data.
++ struct vb2_keyblock *keyblock = NULL;
+ struct vb2_kernel_preamble *preamble = NULL;
+ uint8_t *kblob_data = NULL;
+ uint32_t kblob_size = 0;
++ // vmlinuz_header
++ uint8_t *vmlinuz_header = NULL;
+ uint32_t vmlinuz_header_size = 0;
+- uint64_t vmlinuz_header_address = 0;
+- uint64_t vmlinuz_header_offset = 0;
++ // The concatenated result.
+ void *vmlinuz = NULL;
+
+- struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
++ // Isolate the 3 sections of kpart_data.
++
++ keyblock = (struct vb2_keyblock *)kpart_data;
+ now += keyblock->keyblock_size;
+ if (now > kpart_size)
+ return 1;
+@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+
+ kblob_data = kpart_data + now;
+ kblob_size = preamble->body_signature.data_size;
+-
+- if (!kblob_data || (now + kblob_size) > kpart_size)
++ now += kblob_size;
++ if (now > kpart_size)
+ return 1;
+
++ // Find `vmlinuz_header` within `preamble`.
++
+ if (preamble->header_version_minor > 0) {
+- vmlinuz_header_address = preamble->vmlinuz_header_address;
++ // calculate the vmlinuz_header offset from
++ // the beginning of the kpart_data. The kblob doesn't
++ // include the body_load_offset, but does include
++ // the keyblock and preamble sections.
++ size_t vmlinuz_header_offset =
++ preamble->vmlinuz_header_address -
++ preamble->body_load_address +
++ keyblock->keyblock_size +
++ preamble->preamble_size;
++
++ vmlinuz_header = kpart_data + vmlinuz_header_offset;
+ vmlinuz_header_size = preamble->vmlinuz_header_size;
+ }
+
+- if (!vmlinuz_header_size ||
+- kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+- kpart_data) {
++ if (!vmlinuz_header ||
++ !vmlinuz_header_size ||
++ vmlinuz_header + vmlinuz_header_size > kblob_data) {
+ return 1;
+ }
+
+- // calculate the vmlinuz_header offset from
+- // the beginning of the kpart_data. The kblob doesn't
+- // include the body_load_offset, but does include
+- // the keyblock and preamble sections.
+- vmlinuz_header_offset = vmlinuz_header_address -
+- preamble->body_load_address +
+- keyblock->keyblock_size +
+- preamble->preamble_size;
++ // Concatenate and return.
+
+ vmlinuz = malloc(vmlinuz_header_size + kblob_size);
+ if (vmlinuz == NULL)
+ return 1;
+-
+- memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
+- vmlinuz_header_size);
+-
++ memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
+ memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
+
+ *vmlinuz_out = vmlinuz;
+--
+2.45.1
+
diff --git a/config/submodule/coreboot/dell7/acpica-unix-20230628.tar.gz/module.cfg b/config/submodule/coreboot/dell7/acpica-unix-20230628.tar.gz/module.cfg
new file mode 100644
index 00000000..6dde459a
--- /dev/null
+++ b/config/submodule/coreboot/dell7/acpica-unix-20230628.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20230628.tar.gz"
+subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20230628.tar.gz"
+subhash="d726e69ebd8b8110690e3aff8d1919b43b0a2185efdeb9131ea8d89d321ca3a318a89c721ea740ae366f31ed3d1c11c2906f8807ee8a190e6f67fe5b2023cea4"
diff --git a/config/submodule/coreboot/dell7/binutils-2.43.1.tar.xz/module.cfg b/config/submodule/coreboot/dell7/binutils-2.43.1.tar.xz/module.cfg
new file mode 100644
index 00000000..f3e372a4
--- /dev/null
+++ b/config/submodule/coreboot/dell7/binutils-2.43.1.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.43.1.tar.xz"
+subfile_bkup="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.43.1.tar.xz"
+subhash="20977ad17729141a2c26d358628f44a0944b84dcfefdec2ba029c2d02f40dfc41cc91c0631044560d2bd6f9a51e1f15846b4b311befbe14f1239f14ff7d57824"
diff --git a/config/submodule/coreboot/dell7/fsp/module.cfg b/config/submodule/coreboot/dell7/fsp/module.cfg
new file mode 100644
index 00000000..8042a059
--- /dev/null
+++ b/config/submodule/coreboot/dell7/fsp/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/fsp.git"
+subrepo_bkup="https://github.com/coreboot/fsp"
+subhash="68328e297e195a6cfb1949b60d971c032a172ba3"
diff --git a/config/submodule/coreboot/dell7/gcc-14.2.0.tar.xz/module.cfg b/config/submodule/coreboot/dell7/gcc-14.2.0.tar.xz/module.cfg
new file mode 100644
index 00000000..9a4892f5
--- /dev/null
+++ b/config/submodule/coreboot/dell7/gcc-14.2.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
+subhash="932bdef0cda94bacedf452ab17f103c0cb511ff2cec55e9112fc0328cbf1d803b42595728ea7b200e0a057c03e85626f937012e49a7515bc5dd256b2bf4bc396"
diff --git a/config/submodule/coreboot/dell7/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/dell7/gmp-6.3.0.tar.xz/module.cfg
new file mode 100644
index 00000000..fe274faf
--- /dev/null
+++ b/config/submodule/coreboot/dell7/gmp-6.3.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz"
+subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2"
diff --git a/config/submodule/coreboot/dell7/intel-microcode/module.cfg b/config/submodule/coreboot/dell7/intel-microcode/module.cfg
new file mode 100644
index 00000000..cb6c6d46
--- /dev/null
+++ b/config/submodule/coreboot/dell7/intel-microcode/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/intel-microcode.git"
+subrepo_bkup="https://github.com/coreboot/intel-microcode"
+subhash="fbfe741896c55b36fcbf0560a68be96286103556"
diff --git a/config/submodule/coreboot/dell7/libgfxinit/module.cfg b/config/submodule/coreboot/dell7/libgfxinit/module.cfg
new file mode 100644
index 00000000..1ba41724
--- /dev/null
+++ b/config/submodule/coreboot/dell7/libgfxinit/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libgfxinit.git"
+subrepo_bkup="https://github.com/coreboot/libgfxinit"
+subhash="17cfc92f402493979783585b6581efbd98c0cf07"
diff --git a/config/submodule/coreboot/dell7/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch b/config/submodule/coreboot/dell7/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
new file mode 100644
index 00000000..2d248941
--- /dev/null
+++ b/config/submodule/coreboot/dell7/libgfxinit/patches/0001-g45-hw-gfx-gma-plls.adb-Make-reference-clock-frequen.patch
@@ -0,0 +1,42 @@
+From ba078864500de99c26b6ea7e3fdcef19bca582a7 Mon Sep 17 00:00:00 2001
+From: Nicholas Chin <nic.c3.14@gmail.com>
+Date: Mon, 20 May 2024 10:10:03 -0600
+Subject: [PATCH 1/1] g45/hw-gfx-gma-plls.adb: Make reference clock frequency
+ configurable
+
+Instead of assuming a 96 MHz reference clock frequency, use the value
+specified by the new INTEL_GMA_DPLL_REF_FREQ Kconfig. This defaults to
+96 MHz to preserve the existing behavior. An example of where this is
+needed is the DPLL_REF_SSCLK input, which will typically be 100 MHz
+to support LVDS spread spectrum clocking.
+
+Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
+---
+ common/g45/hw-gfx-gma-plls.adb | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+diff --git a/common/g45/hw-gfx-gma-plls.adb b/common/g45/hw-gfx-gma-plls.adb
+index 67242f2..5e970d7 100644
+--- a/common/g45/hw-gfx-gma-plls.adb
++++ b/common/g45/hw-gfx-gma-plls.adb
+@@ -12,6 +12,8 @@
+ -- GNU General Public License for more details.
+ --
+
++with CB.Config;
++
+ with HW.Time;
+ with HW.GFX.GMA.Config;
+ with HW.GFX.GMA.Registers;
+@@ -460,7 +462,7 @@ is
+ (Display => Port_Cfg.Display,
+ Target_Dotclock => Target_Clock,
+ -- should be, but doesn't has to be always the same:
+- Reference_Clock => 96_000_000,
++ Reference_Clock => CB.Config.INTEL_GMA_DPLL_REF_FREQ,
+ Best_Clock => Clk,
+ Valid => Success);
+ else
+--
+2.39.2
+
diff --git a/config/submodule/coreboot/dell7/libhwbase/module.cfg b/config/submodule/coreboot/dell7/libhwbase/module.cfg
new file mode 100644
index 00000000..2937b8b7
--- /dev/null
+++ b/config/submodule/coreboot/dell7/libhwbase/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libhwbase.git"
+subrepo_bkup="https://github.com/coreboot/libhwbase"
+subhash="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/dell7/module.list b/config/submodule/coreboot/dell7/module.list
new file mode 100644
index 00000000..1cc88fd6
--- /dev/null
+++ b/config/submodule/coreboot/dell7/module.list
@@ -0,0 +1,12 @@
+3rdparty/fsp
+3rdparty/intel-microcode
+3rdparty/libgfxinit
+3rdparty/libhwbase
+3rdparty/vboot
+util/crossgcc/tarballs/binutils-2.43.1.tar.xz
+util/crossgcc/tarballs/gcc-14.2.0.tar.xz
+util/crossgcc/tarballs/gmp-6.3.0.tar.xz
+util/crossgcc/tarballs/mpc-1.3.1.tar.gz
+util/crossgcc/tarballs/mpfr-4.2.1.tar.xz
+util/crossgcc/tarballs/nasm-2.16.03.tar.bz2
+util/crossgcc/tarballs/acpica-unix-20230628.tar.gz
diff --git a/config/submodule/coreboot/dell7/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/dell7/mpc-1.3.1.tar.gz/module.cfg
new file mode 100644
index 00000000..f98b6444
--- /dev/null
+++ b/config/submodule/coreboot/dell7/mpc-1.3.1.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz"
+subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97"
diff --git a/config/submodule/coreboot/dell7/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/dell7/mpfr-4.2.1.tar.xz/module.cfg
new file mode 100644
index 00000000..3419bc30
--- /dev/null
+++ b/config/submodule/coreboot/dell7/mpfr-4.2.1.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475"
diff --git a/config/submodule/coreboot/dell7/nasm-2.16.03.tar.bz2/module.cfg b/config/submodule/coreboot/dell7/nasm-2.16.03.tar.bz2/module.cfg
new file mode 100644
index 00000000..c98cc71f
--- /dev/null
+++ b/config/submodule/coreboot/dell7/nasm-2.16.03.tar.bz2/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2"
+subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2"
+subhash="f28445d368debdf44219cc57df33800a8c0e49186cd60836d4adfec7700d53b801d34aa9fc9bfda74169843f33a1e8b465e11292582eb968bb9c3a26f54dd172"
diff --git a/config/submodule/coreboot/dell7/vboot/module.cfg b/config/submodule/coreboot/dell7/vboot/module.cfg
new file mode 100644
index 00000000..917d23fa
--- /dev/null
+++ b/config/submodule/coreboot/dell7/vboot/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/vboot.git"
+subrepo_bkup="https://github.com/coreboot/vboot"
+subhash="f1f70f46dc5482bb7c654e53ed58d4001e386df2"
diff --git a/config/submodule/coreboot/dell7/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/dell7/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
new file mode 100644
index 00000000..1ac41de6
--- /dev/null
+++ b/config/submodule/coreboot/dell7/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
@@ -0,0 +1,178 @@
+From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
+From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
+Date: Thu, 30 May 2024 14:08:33 -0600
+Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
+ vmlinuz_header_{offset,size}
+
+The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
+wrong:
+
+ if (!vmlinuz_header_size ||
+ kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+ kpart_data) {
+ return 1;
+ }
+
+`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
+unless something has overflowed! And `vmlinuz_header_offset` hasn't even
+been set yet (besides being initialized to zero)!
+
+GCC will deduce that if the check didn't cause the function to bail, then
+vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
+[2GiB,4GiB).
+
+On platforms where size_t is 32-bits, this is *especially* broken.
+memcpy's size argument must be in the range [0,2GiB). Because GCC has
+proved that vmlinuz_header_size is higher than that, it will fail to
+compile:
+
+ host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
+
+So, fix the check.
+
+I can now say that what I suspect the original author meant to write would
+be the following patch, if `vmlinuz_header_offset` were already set:
+
+ -kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
+ +now + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
+
+This hypothesis is supported by `now` not getting incremented by
+`kblob_size` the way it is for the keyblock and preamble sizes.
+
+However, we can also see that even this "corrected" bounds check is
+insufficient: it does not detect the vmlinuz_header overflowing into
+kblob_data.
+
+OK, so let's describe the fix:
+
+Have a `*vmlinuz_header` pointer instead of a
+`uint64_t vmlinuz_header_offset`, to be more similar to all the other
+regions. With this change, the correct check becomes a simple
+
+ vmlinuz_header + vmlinuz_header_size > kblob_data
+
+While we're at it, make some changes that could have helped avoid this in
+the first place:
+
+ - Add comments.
+ - Calculate the vmlinuz_header offset right away, instead of waiting.
+ - Go ahead and increment `now` by `kblob_size`, to increase regularity.
+
+Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
+---
+ host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
+ 1 file changed, 51 insertions(+), 21 deletions(-)
+
+diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
+index 4ccfcf33..d2c09443 100644
+--- a/host/lib/extract_vmlinuz.c
++++ b/host/lib/extract_vmlinuz.c
+@@ -15,16 +15,44 @@
+
+ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ void **vmlinuz_out, size_t *vmlinuz_size) {
++ // We're going to be extracting `vmlinuz_header` and
++ // `kblob_data`, and returning the concatenation of them.
++ //
++ // kpart_data = +-[kpart_size]------------------------------------+
++ // | |
++ // keyblock = | +-[keyblock->keyblock_size]-------------------+ |
++ // | | struct vb2_keyblock keyblock | |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // preamble = | +-[preamble->preamble_size]-------------------+ |
++ // | | struct vb2_kernel_preamble preamble | |
++ // | | char [] ...data... | |
++ // | | char [] vmlinuz_header | |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // kblob_data= | +-[preamble->body_signature.data_size]--------+ |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // +-------------------------------------------------+
++
+ size_t now = 0;
++ // The 3 sections of kpart_data.
++ struct vb2_keyblock *keyblock = NULL;
+ struct vb2_kernel_preamble *preamble = NULL;
+ uint8_t *kblob_data = NULL;
+ uint32_t kblob_size = 0;
++ // vmlinuz_header
++ uint8_t *vmlinuz_header = NULL;
+ uint32_t vmlinuz_header_size = 0;
+- uint64_t vmlinuz_header_address = 0;
+- uint64_t vmlinuz_header_offset = 0;
++ // The concatenated result.
+ void *vmlinuz = NULL;
+
+- struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
++ // Isolate the 3 sections of kpart_data.
++
++ keyblock = (struct vb2_keyblock *)kpart_data;
+ now += keyblock->keyblock_size;
+ if (now > kpart_size)
+ return 1;
+@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+
+ kblob_data = kpart_data + now;
+ kblob_size = preamble->body_signature.data_size;
+-
+- if (!kblob_data || (now + kblob_size) > kpart_size)
++ now += kblob_size;
++ if (now > kpart_size)
+ return 1;
+
++ // Find `vmlinuz_header` within `preamble`.
++
+ if (preamble->header_version_minor > 0) {
+- vmlinuz_header_address = preamble->vmlinuz_header_address;
++ // calculate the vmlinuz_header offset from
++ // the beginning of the kpart_data. The kblob doesn't
++ // include the body_load_offset, but does include
++ // the keyblock and preamble sections.
++ size_t vmlinuz_header_offset =
++ preamble->vmlinuz_header_address -
++ preamble->body_load_address +
++ keyblock->keyblock_size +
++ preamble->preamble_size;
++
++ vmlinuz_header = kpart_data + vmlinuz_header_offset;
+ vmlinuz_header_size = preamble->vmlinuz_header_size;
+ }
+
+- if (!vmlinuz_header_size ||
+- kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+- kpart_data) {
++ if (!vmlinuz_header ||
++ !vmlinuz_header_size ||
++ vmlinuz_header + vmlinuz_header_size > kblob_data) {
+ return 1;
+ }
+
+- // calculate the vmlinuz_header offset from
+- // the beginning of the kpart_data. The kblob doesn't
+- // include the body_load_offset, but does include
+- // the keyblock and preamble sections.
+- vmlinuz_header_offset = vmlinuz_header_address -
+- preamble->body_load_address +
+- keyblock->keyblock_size +
+- preamble->preamble_size;
++ // Concatenate and return.
+
+ vmlinuz = malloc(vmlinuz_header_size + kblob_size);
+ if (vmlinuz == NULL)
+ return 1;
+-
+- memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
+- vmlinuz_header_size);
+-
++ memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
+ memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
+
+ *vmlinuz_out = vmlinuz;
+--
+2.45.1
+
diff --git a/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg b/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg
new file mode 100644
index 00000000..e839b77e
--- /dev/null
+++ b/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-20190703.tar.gz"
+subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix2-20190703.tar.gz"
+subhash="8445a6d354ce3bcbfb5159f4ec0312b1e910c0b1b2033a2300f892e4ac580abab4e3f5b4ded379f0036299359d307330511ab7053678cfd9031d7df4c365f555"
diff --git a/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg
new file mode 100644
index 00000000..b549e139
--- /dev/null
+++ b/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.32.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.32.tar.xz"
+subhash="d326408f12a03d9a61a9de56584c2af12f81c2e50d2d7e835d51565df8314df01575724afa1e43bd0db45cfc9916b41519b67dfce03232aa4978704492a6994a"
diff --git a/config/submodule/coreboot/fam15h/blobs/module.cfg b/config/submodule/coreboot/fam15h/blobs/module.cfg
new file mode 100644
index 00000000..215caf4d
--- /dev/null
+++ b/config/submodule/coreboot/fam15h/blobs/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/blobs.git"
+subrepo_bkup="https://github.com/coreboot/blobs"
+subhash="034b27818450428f70aa9316c8bd0d65bacd8ee8"
diff --git a/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg
new file mode 100644
index 00000000..6ce00577
--- /dev/null
+++ b/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-8.3.0/gcc-8.3.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-8.3.0/gcc-8.3.0.tar.xz"
+subhash="1811337ae3add9680cec64968a2509d085b6dc5b6783fc1e8c295e3e47416196fd1a3ad8dfe7e10be2276b4f62c357659ce2902f239f60a8648548231b4b5802"
diff --git a/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg
new file mode 100644
index 00000000..7caf1845
--- /dev/null
+++ b/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.1.2.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.1.2.tar.xz"
+subhash="9f098281c0593b76ee174b722936952671fab1dae353ce3ed436a31fe2bc9d542eca752353f6645b7077c1f395ab4fdd355c58e08e2a801368f1375690eee2c6"
diff --git a/config/submodule/coreboot/fam15h/module.list b/config/submodule/coreboot/fam15h/module.list
new file mode 100644
index 00000000..64f09aea
--- /dev/null
+++ b/config/submodule/coreboot/fam15h/module.list
@@ -0,0 +1,9 @@
+3rdparty/blobs
+3rdparty/vboot
+util/crossgcc/tarballs/acpica-unix2-20190703.tar.gz
+util/crossgcc/tarballs/binutils-2.32.tar.xz
+util/crossgcc/tarballs/gcc-8.3.0.tar.xz
+util/crossgcc/tarballs/gmp-6.1.2.tar.xz
+util/crossgcc/tarballs/mpc-1.1.0.tar.gz
+util/crossgcc/tarballs/mpfr-4.0.2.tar.xz
+util/crossgcc/tarballs/nasm-2.14.02.tar.bz2
diff --git a/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg b/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg
new file mode 100644
index 00000000..34e77772
--- /dev/null
+++ b/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.1.0.tar.gz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.1.0.tar.gz"
+subhash="72d657958b07c7812dc9c7cbae093118ce0e454c68a585bfb0e2fa559f1bf7c5f49b93906f580ab3f1073e5b595d23c6494d4d76b765d16dde857a18dd239628"
diff --git a/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg
new file mode 100644
index 00000000..e33b1804
--- /dev/null
+++ b/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.0.2.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.0.2.tar.xz"
+subhash="d583555d08863bf36c89b289ae26bae353d9a31f08ee3894520992d2c26e5683c4c9c193d7ad139632f71c0a476d85ea76182702a98bf08dde7b6f65a54f8b88"
diff --git a/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg b/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg
new file mode 100644
index 00000000..fecb3cba
--- /dev/null
+++ b/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.14.02/nasm-2.14.02.tar.bz2"
+subfile_bkup="https://coreboot.org/releases/crossgcc-sources/nasm-2.14.02.tar.bz2"
+subhash="71e3d44736493b1a56d4230bc2e5519e858aaadde5d89a692f1472fad6755084460e36b42852707f4c862eff75d3f2c232aedcc4e61e9d9ffcc8c9ca6498292b"
diff --git a/config/submodule/coreboot/fam15h/vboot/module.cfg b/config/submodule/coreboot/fam15h/vboot/module.cfg
new file mode 100644
index 00000000..5fac75c3
--- /dev/null
+++ b/config/submodule/coreboot/fam15h/vboot/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/vboot.git"
+subrepo_bkup="https://github.com/coreboot/vboot"
+subhash="ecdca931ae0637d1a9498f64862939bd5bb99e0b"
diff --git a/config/submodule/coreboot/fam15h/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/fam15h/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
new file mode 100644
index 00000000..1ac41de6
--- /dev/null
+++ b/config/submodule/coreboot/fam15h/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
@@ -0,0 +1,178 @@
+From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
+From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
+Date: Thu, 30 May 2024 14:08:33 -0600
+Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
+ vmlinuz_header_{offset,size}
+
+The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
+wrong:
+
+ if (!vmlinuz_header_size ||
+ kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+ kpart_data) {
+ return 1;
+ }
+
+`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
+unless something has overflowed! And `vmlinuz_header_offset` hasn't even
+been set yet (besides being initialized to zero)!
+
+GCC will deduce that if the check didn't cause the function to bail, then
+vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
+[2GiB,4GiB).
+
+On platforms where size_t is 32-bits, this is *especially* broken.
+memcpy's size argument must be in the range [0,2GiB). Because GCC has
+proved that vmlinuz_header_size is higher than that, it will fail to
+compile:
+
+ host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
+
+So, fix the check.
+
+I can now say that what I suspect the original author meant to write would
+be the following patch, if `vmlinuz_header_offset` were already set:
+
+ -kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
+ +now + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
+
+This hypothesis is supported by `now` not getting incremented by
+`kblob_size` the way it is for the keyblock and preamble sizes.
+
+However, we can also see that even this "corrected" bounds check is
+insufficient: it does not detect the vmlinuz_header overflowing into
+kblob_data.
+
+OK, so let's describe the fix:
+
+Have a `*vmlinuz_header` pointer instead of a
+`uint64_t vmlinuz_header_offset`, to be more similar to all the other
+regions. With this change, the correct check becomes a simple
+
+ vmlinuz_header + vmlinuz_header_size > kblob_data
+
+While we're at it, make some changes that could have helped avoid this in
+the first place:
+
+ - Add comments.
+ - Calculate the vmlinuz_header offset right away, instead of waiting.
+ - Go ahead and increment `now` by `kblob_size`, to increase regularity.
+
+Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
+---
+ host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
+ 1 file changed, 51 insertions(+), 21 deletions(-)
+
+diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
+index 4ccfcf33..d2c09443 100644
+--- a/host/lib/extract_vmlinuz.c
++++ b/host/lib/extract_vmlinuz.c
+@@ -15,16 +15,44 @@
+
+ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ void **vmlinuz_out, size_t *vmlinuz_size) {
++ // We're going to be extracting `vmlinuz_header` and
++ // `kblob_data`, and returning the concatenation of them.
++ //
++ // kpart_data = +-[kpart_size]------------------------------------+
++ // | |
++ // keyblock = | +-[keyblock->keyblock_size]-------------------+ |
++ // | | struct vb2_keyblock keyblock | |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // preamble = | +-[preamble->preamble_size]-------------------+ |
++ // | | struct vb2_kernel_preamble preamble | |
++ // | | char [] ...data... | |
++ // | | char [] vmlinuz_header | |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // kblob_data= | +-[preamble->body_signature.data_size]--------+ |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // +-------------------------------------------------+
++
+ size_t now = 0;
++ // The 3 sections of kpart_data.
++ struct vb2_keyblock *keyblock = NULL;
+ struct vb2_kernel_preamble *preamble = NULL;
+ uint8_t *kblob_data = NULL;
+ uint32_t kblob_size = 0;
++ // vmlinuz_header
++ uint8_t *vmlinuz_header = NULL;
+ uint32_t vmlinuz_header_size = 0;
+- uint64_t vmlinuz_header_address = 0;
+- uint64_t vmlinuz_header_offset = 0;
++ // The concatenated result.
+ void *vmlinuz = NULL;
+
+- struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
++ // Isolate the 3 sections of kpart_data.
++
++ keyblock = (struct vb2_keyblock *)kpart_data;
+ now += keyblock->keyblock_size;
+ if (now > kpart_size)
+ return 1;
+@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+
+ kblob_data = kpart_data + now;
+ kblob_size = preamble->body_signature.data_size;
+-
+- if (!kblob_data || (now + kblob_size) > kpart_size)
++ now += kblob_size;
++ if (now > kpart_size)
+ return 1;
+
++ // Find `vmlinuz_header` within `preamble`.
++
+ if (preamble->header_version_minor > 0) {
+- vmlinuz_header_address = preamble->vmlinuz_header_address;
++ // calculate the vmlinuz_header offset from
++ // the beginning of the kpart_data. The kblob doesn't
++ // include the body_load_offset, but does include
++ // the keyblock and preamble sections.
++ size_t vmlinuz_header_offset =
++ preamble->vmlinuz_header_address -
++ preamble->body_load_address +
++ keyblock->keyblock_size +
++ preamble->preamble_size;
++
++ vmlinuz_header = kpart_data + vmlinuz_header_offset;
+ vmlinuz_header_size = preamble->vmlinuz_header_size;
+ }
+
+- if (!vmlinuz_header_size ||
+- kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+- kpart_data) {
++ if (!vmlinuz_header ||
++ !vmlinuz_header_size ||
++ vmlinuz_header + vmlinuz_header_size > kblob_data) {
+ return 1;
+ }
+
+- // calculate the vmlinuz_header offset from
+- // the beginning of the kpart_data. The kblob doesn't
+- // include the body_load_offset, but does include
+- // the keyblock and preamble sections.
+- vmlinuz_header_offset = vmlinuz_header_address -
+- preamble->body_load_address +
+- keyblock->keyblock_size +
+- preamble->preamble_size;
++ // Concatenate and return.
+
+ vmlinuz = malloc(vmlinuz_header_size + kblob_size);
+ if (vmlinuz == NULL)
+ return 1;
+-
+- memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
+- vmlinuz_header_size);
+-
++ memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
+ memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
+
+ *vmlinuz_out = vmlinuz;
+--
+2.45.1
+
diff --git a/config/submodule/coreboot/haswell/R06_28_23.tar.gz/module.cfg b/config/submodule/coreboot/haswell/R06_28_23.tar.gz/module.cfg
new file mode 100644
index 00000000..71ab78bc
--- /dev/null
+++ b/config/submodule/coreboot/haswell/R06_28_23.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/R06_28_23.tar.gz"
+subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/R06_28_23.tar.gz"
+subhash="d64091202866cd306fef08bbf95b585584331704fdbe5ef0bfa99c8f9cb188e51a52880625c8d6bc971b3d251c8b13686b43a013058cadda861efe09b219c1b0"
diff --git a/config/submodule/coreboot/haswell/binutils-2.42.tar.xz/module.cfg b/config/submodule/coreboot/haswell/binutils-2.42.tar.xz/module.cfg
new file mode 100644
index 00000000..370a52ec
--- /dev/null
+++ b/config/submodule/coreboot/haswell/binutils-2.42.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.42.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.42.tar.xz"
+subhash="155f3ba14cd220102f4f29a4f1e5cfee3c48aa03b74603460d05afb73c70d6657a9d87eee6eb88bf13203fe6f31177a5c9addc04384e956e7da8069c8ecd20a6"
diff --git a/config/submodule/coreboot/haswell/gcc-13.2.0.tar.xz/module.cfg b/config/submodule/coreboot/haswell/gcc-13.2.0.tar.xz/module.cfg
new file mode 100644
index 00000000..dbcc0805
--- /dev/null
+++ b/config/submodule/coreboot/haswell/gcc-13.2.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-13.2.0/gcc-13.2.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-13.2.0/gcc-13.2.0.tar.xz"
+subhash="d99e4826a70db04504467e349e9fbaedaa5870766cda7c5cab50cdebedc4be755ebca5b789e1232a34a20be1a0b60097de9280efe47bdb71c73251e30b0862a2"
diff --git a/config/submodule/coreboot/haswell/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/haswell/gmp-6.3.0.tar.xz/module.cfg
new file mode 100644
index 00000000..fe274faf
--- /dev/null
+++ b/config/submodule/coreboot/haswell/gmp-6.3.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz"
+subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2"
diff --git a/config/submodule/coreboot/haswell/intel-microcode/module.cfg b/config/submodule/coreboot/haswell/intel-microcode/module.cfg
new file mode 100644
index 00000000..90f7d273
--- /dev/null
+++ b/config/submodule/coreboot/haswell/intel-microcode/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/intel-microcode.git"
+subrepo_bkup="https://github.com/coreboot/intel-microcode"
+subhash="41af34500598418150aa298bb04e7edacc547897"
diff --git a/config/submodule/coreboot/haswell/libgfxinit/module.cfg b/config/submodule/coreboot/haswell/libgfxinit/module.cfg
new file mode 100644
index 00000000..7e2536f9
--- /dev/null
+++ b/config/submodule/coreboot/haswell/libgfxinit/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libgfxinit.git"
+subrepo_bkup="https://github.com/coreboot/libgfxinit"
+subhash="a4be8a21b0e2c752da0042c79aae5942418f53e2"
diff --git a/config/submodule/coreboot/haswell/libhwbase/module.cfg b/config/submodule/coreboot/haswell/libhwbase/module.cfg
new file mode 100644
index 00000000..2937b8b7
--- /dev/null
+++ b/config/submodule/coreboot/haswell/libhwbase/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libhwbase.git"
+subrepo_bkup="https://github.com/coreboot/libhwbase"
+subhash="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/haswell/module.list b/config/submodule/coreboot/haswell/module.list
new file mode 100644
index 00000000..80e2cede
--- /dev/null
+++ b/config/submodule/coreboot/haswell/module.list
@@ -0,0 +1,11 @@
+3rdparty/intel-microcode
+3rdparty/libgfxinit
+3rdparty/libhwbase
+3rdparty/vboot
+util/crossgcc/tarballs/binutils-2.42.tar.xz
+util/crossgcc/tarballs/gcc-13.2.0.tar.xz
+util/crossgcc/tarballs/gmp-6.3.0.tar.xz
+util/crossgcc/tarballs/mpc-1.3.1.tar.gz
+util/crossgcc/tarballs/mpfr-4.2.1.tar.xz
+util/crossgcc/tarballs/nasm-2.16.01.tar.bz2
+util/crossgcc/tarballs/R06_28_23.tar.gz
diff --git a/config/submodule/coreboot/haswell/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/haswell/mpc-1.3.1.tar.gz/module.cfg
new file mode 100644
index 00000000..f98b6444
--- /dev/null
+++ b/config/submodule/coreboot/haswell/mpc-1.3.1.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz"
+subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97"
diff --git a/config/submodule/coreboot/haswell/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/haswell/mpfr-4.2.1.tar.xz/module.cfg
new file mode 100644
index 00000000..3419bc30
--- /dev/null
+++ b/config/submodule/coreboot/haswell/mpfr-4.2.1.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475"
diff --git a/config/submodule/coreboot/haswell/nasm-2.16.01.tar.bz2/module.cfg b/config/submodule/coreboot/haswell/nasm-2.16.01.tar.bz2/module.cfg
new file mode 100644
index 00000000..a98cab0b
--- /dev/null
+++ b/config/submodule/coreboot/haswell/nasm-2.16.01.tar.bz2/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.01/nasm-2.16.01.tar.bz2"
+subfile_bkup="https://coreboot.org/releases/crossgcc-sources/nasm-2.16.01.tar.bz2"
+subhash="daecc50d0c04cfa1e8a09bbece808548478fc03834b0c3fb06a9da56d3b51697e2d09a469cef8a4761290cdfc65e0eb46d76b6ca11dfa1dcd1051882c5e7fd88"
diff --git a/config/submodule/coreboot/haswell/vboot/module.cfg b/config/submodule/coreboot/haswell/vboot/module.cfg
new file mode 100644
index 00000000..5ef2153c
--- /dev/null
+++ b/config/submodule/coreboot/haswell/vboot/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/vboot.git"
+subrepo_bkup="https://github.com/coreboot/vboot"
+subhash="09fcd2184f9c714829503e84b8a7dfe7f2584e00"
diff --git a/config/submodule/coreboot/haswell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/haswell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
new file mode 100644
index 00000000..1ac41de6
--- /dev/null
+++ b/config/submodule/coreboot/haswell/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
@@ -0,0 +1,178 @@
+From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
+From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
+Date: Thu, 30 May 2024 14:08:33 -0600
+Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
+ vmlinuz_header_{offset,size}
+
+The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
+wrong:
+
+ if (!vmlinuz_header_size ||
+ kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+ kpart_data) {
+ return 1;
+ }
+
+`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
+unless something has overflowed! And `vmlinuz_header_offset` hasn't even
+been set yet (besides being initialized to zero)!
+
+GCC will deduce that if the check didn't cause the function to bail, then
+vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
+[2GiB,4GiB).
+
+On platforms where size_t is 32-bits, this is *especially* broken.
+memcpy's size argument must be in the range [0,2GiB). Because GCC has
+proved that vmlinuz_header_size is higher than that, it will fail to
+compile:
+
+ host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
+
+So, fix the check.
+
+I can now say that what I suspect the original author meant to write would
+be the following patch, if `vmlinuz_header_offset` were already set:
+
+ -kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
+ +now + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
+
+This hypothesis is supported by `now` not getting incremented by
+`kblob_size` the way it is for the keyblock and preamble sizes.
+
+However, we can also see that even this "corrected" bounds check is
+insufficient: it does not detect the vmlinuz_header overflowing into
+kblob_data.
+
+OK, so let's describe the fix:
+
+Have a `*vmlinuz_header` pointer instead of a
+`uint64_t vmlinuz_header_offset`, to be more similar to all the other
+regions. With this change, the correct check becomes a simple
+
+ vmlinuz_header + vmlinuz_header_size > kblob_data
+
+While we're at it, make some changes that could have helped avoid this in
+the first place:
+
+ - Add comments.
+ - Calculate the vmlinuz_header offset right away, instead of waiting.
+ - Go ahead and increment `now` by `kblob_size`, to increase regularity.
+
+Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
+---
+ host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
+ 1 file changed, 51 insertions(+), 21 deletions(-)
+
+diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
+index 4ccfcf33..d2c09443 100644
+--- a/host/lib/extract_vmlinuz.c
++++ b/host/lib/extract_vmlinuz.c
+@@ -15,16 +15,44 @@
+
+ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ void **vmlinuz_out, size_t *vmlinuz_size) {
++ // We're going to be extracting `vmlinuz_header` and
++ // `kblob_data`, and returning the concatenation of them.
++ //
++ // kpart_data = +-[kpart_size]------------------------------------+
++ // | |
++ // keyblock = | +-[keyblock->keyblock_size]-------------------+ |
++ // | | struct vb2_keyblock keyblock | |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // preamble = | +-[preamble->preamble_size]-------------------+ |
++ // | | struct vb2_kernel_preamble preamble | |
++ // | | char [] ...data... | |
++ // | | char [] vmlinuz_header | |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // kblob_data= | +-[preamble->body_signature.data_size]--------+ |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // +-------------------------------------------------+
++
+ size_t now = 0;
++ // The 3 sections of kpart_data.
++ struct vb2_keyblock *keyblock = NULL;
+ struct vb2_kernel_preamble *preamble = NULL;
+ uint8_t *kblob_data = NULL;
+ uint32_t kblob_size = 0;
++ // vmlinuz_header
++ uint8_t *vmlinuz_header = NULL;
+ uint32_t vmlinuz_header_size = 0;
+- uint64_t vmlinuz_header_address = 0;
+- uint64_t vmlinuz_header_offset = 0;
++ // The concatenated result.
+ void *vmlinuz = NULL;
+
+- struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
++ // Isolate the 3 sections of kpart_data.
++
++ keyblock = (struct vb2_keyblock *)kpart_data;
+ now += keyblock->keyblock_size;
+ if (now > kpart_size)
+ return 1;
+@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+
+ kblob_data = kpart_data + now;
+ kblob_size = preamble->body_signature.data_size;
+-
+- if (!kblob_data || (now + kblob_size) > kpart_size)
++ now += kblob_size;
++ if (now > kpart_size)
+ return 1;
+
++ // Find `vmlinuz_header` within `preamble`.
++
+ if (preamble->header_version_minor > 0) {
+- vmlinuz_header_address = preamble->vmlinuz_header_address;
++ // calculate the vmlinuz_header offset from
++ // the beginning of the kpart_data. The kblob doesn't
++ // include the body_load_offset, but does include
++ // the keyblock and preamble sections.
++ size_t vmlinuz_header_offset =
++ preamble->vmlinuz_header_address -
++ preamble->body_load_address +
++ keyblock->keyblock_size +
++ preamble->preamble_size;
++
++ vmlinuz_header = kpart_data + vmlinuz_header_offset;
+ vmlinuz_header_size = preamble->vmlinuz_header_size;
+ }
+
+- if (!vmlinuz_header_size ||
+- kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+- kpart_data) {
++ if (!vmlinuz_header ||
++ !vmlinuz_header_size ||
++ vmlinuz_header + vmlinuz_header_size > kblob_data) {
+ return 1;
+ }
+
+- // calculate the vmlinuz_header offset from
+- // the beginning of the kpart_data. The kblob doesn't
+- // include the body_load_offset, but does include
+- // the keyblock and preamble sections.
+- vmlinuz_header_offset = vmlinuz_header_address -
+- preamble->body_load_address +
+- keyblock->keyblock_size +
+- preamble->preamble_size;
++ // Concatenate and return.
+
+ vmlinuz = malloc(vmlinuz_header_size + kblob_size);
+ if (vmlinuz == NULL)
+ return 1;
+-
+- memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
+- vmlinuz_header_size);
+-
++ memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
+ memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
+
+ *vmlinuz_out = vmlinuz;
+--
+2.45.1
+
diff --git a/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg b/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg
new file mode 100644
index 00000000..6dde459a
--- /dev/null
+++ b/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20230628.tar.gz"
+subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20230628.tar.gz"
+subhash="d726e69ebd8b8110690e3aff8d1919b43b0a2185efdeb9131ea8d89d321ca3a318a89c721ea740ae366f31ed3d1c11c2906f8807ee8a190e6f67fe5b2023cea4"
diff --git a/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg b/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg
new file mode 100644
index 00000000..f3e372a4
--- /dev/null
+++ b/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.43.1.tar.xz"
+subfile_bkup="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.43.1.tar.xz"
+subhash="20977ad17729141a2c26d358628f44a0944b84dcfefdec2ba029c2d02f40dfc41cc91c0631044560d2bd6f9a51e1f15846b4b311befbe14f1239f14ff7d57824"
diff --git a/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg b/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg
new file mode 100644
index 00000000..9a4892f5
--- /dev/null
+++ b/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz"
+subhash="932bdef0cda94bacedf452ab17f103c0cb511ff2cec55e9112fc0328cbf1d803b42595728ea7b200e0a057c03e85626f937012e49a7515bc5dd256b2bf4bc396"
diff --git a/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg
new file mode 100644
index 00000000..fe274faf
--- /dev/null
+++ b/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz"
+subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2"
diff --git a/config/submodule/coreboot/next/intel-microcode/module.cfg b/config/submodule/coreboot/next/intel-microcode/module.cfg
new file mode 100644
index 00000000..cb6c6d46
--- /dev/null
+++ b/config/submodule/coreboot/next/intel-microcode/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/intel-microcode.git"
+subrepo_bkup="https://github.com/coreboot/intel-microcode"
+subhash="fbfe741896c55b36fcbf0560a68be96286103556"
diff --git a/config/submodule/coreboot/next/libgfxinit/module.cfg b/config/submodule/coreboot/next/libgfxinit/module.cfg
new file mode 100644
index 00000000..1ba41724
--- /dev/null
+++ b/config/submodule/coreboot/next/libgfxinit/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libgfxinit.git"
+subrepo_bkup="https://github.com/coreboot/libgfxinit"
+subhash="17cfc92f402493979783585b6581efbd98c0cf07"
diff --git a/config/submodule/coreboot/next/libhwbase/module.cfg b/config/submodule/coreboot/next/libhwbase/module.cfg
new file mode 100644
index 00000000..2937b8b7
--- /dev/null
+++ b/config/submodule/coreboot/next/libhwbase/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/libhwbase.git"
+subrepo_bkup="https://github.com/coreboot/libhwbase"
+subhash="584629b9f4771b7618951cec57df2ca3af9c6981"
diff --git a/config/submodule/coreboot/next/module.list b/config/submodule/coreboot/next/module.list
new file mode 100644
index 00000000..8c520e04
--- /dev/null
+++ b/config/submodule/coreboot/next/module.list
@@ -0,0 +1,11 @@
+3rdparty/intel-microcode
+3rdparty/libgfxinit
+3rdparty/libhwbase
+3rdparty/vboot
+util/crossgcc/tarballs/binutils-2.43.1.tar.xz
+util/crossgcc/tarballs/gcc-14.2.0.tar.xz
+util/crossgcc/tarballs/gmp-6.3.0.tar.xz
+util/crossgcc/tarballs/mpc-1.3.1.tar.gz
+util/crossgcc/tarballs/mpfr-4.2.1.tar.xz
+util/crossgcc/tarballs/nasm-2.16.03.tar.bz2
+util/crossgcc/tarballs/acpica-unix-20230628.tar.gz
diff --git a/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg
new file mode 100644
index 00000000..f98b6444
--- /dev/null
+++ b/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz"
+subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97"
diff --git a/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg
new file mode 100644
index 00000000..3419bc30
--- /dev/null
+++ b/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz"
+subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475"
diff --git a/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg b/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg
new file mode 100644
index 00000000..c98cc71f
--- /dev/null
+++ b/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg
@@ -0,0 +1,3 @@
+subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2"
+subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2"
+subhash="f28445d368debdf44219cc57df33800a8c0e49186cd60836d4adfec7700d53b801d34aa9fc9bfda74169843f33a1e8b465e11292582eb968bb9c3a26f54dd172"
diff --git a/config/submodule/coreboot/next/vboot/module.cfg b/config/submodule/coreboot/next/vboot/module.cfg
new file mode 100644
index 00000000..917d23fa
--- /dev/null
+++ b/config/submodule/coreboot/next/vboot/module.cfg
@@ -0,0 +1,3 @@
+subrepo="https://review.coreboot.org/vboot.git"
+subrepo_bkup="https://github.com/coreboot/vboot"
+subhash="f1f70f46dc5482bb7c654e53ed58d4001e386df2"
diff --git a/config/submodule/coreboot/next/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/next/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
new file mode 100644
index 00000000..1ac41de6
--- /dev/null
+++ b/config/submodule/coreboot/next/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch
@@ -0,0 +1,178 @@
+From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001
+From: "Luke T. Shumaker" <lukeshu@lukeshu.com>
+Date: Thu, 30 May 2024 14:08:33 -0600
+Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on
+ vmlinuz_header_{offset,size}
+
+The check on vmlinuz_header_offset and vmlinuz_header_size is obviously
+wrong:
+
+ if (!vmlinuz_header_size ||
+ kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+ kpart_data) {
+ return 1;
+ }
+
+`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`,
+unless something has overflowed! And `vmlinuz_header_offset` hasn't even
+been set yet (besides being initialized to zero)!
+
+GCC will deduce that if the check didn't cause the function to bail, then
+vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range
+[2GiB,4GiB).
+
+On platforms where size_t is 32-bits, this is *especially* broken.
+memcpy's size argument must be in the range [0,2GiB). Because GCC has
+proved that vmlinuz_header_size is higher than that, it will fail to
+compile:
+
+ host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=]
+
+So, fix the check.
+
+I can now say that what I suspect the original author meant to write would
+be the following patch, if `vmlinuz_header_offset` were already set:
+
+ -kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data
+ +now + vmlinuz_header_offset + vmlinuz_header_size > kpart_size
+
+This hypothesis is supported by `now` not getting incremented by
+`kblob_size` the way it is for the keyblock and preamble sizes.
+
+However, we can also see that even this "corrected" bounds check is
+insufficient: it does not detect the vmlinuz_header overflowing into
+kblob_data.
+
+OK, so let's describe the fix:
+
+Have a `*vmlinuz_header` pointer instead of a
+`uint64_t vmlinuz_header_offset`, to be more similar to all the other
+regions. With this change, the correct check becomes a simple
+
+ vmlinuz_header + vmlinuz_header_size > kblob_data
+
+While we're at it, make some changes that could have helped avoid this in
+the first place:
+
+ - Add comments.
+ - Calculate the vmlinuz_header offset right away, instead of waiting.
+ - Go ahead and increment `now` by `kblob_size`, to increase regularity.
+
+Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4
+---
+ host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++-----------
+ 1 file changed, 51 insertions(+), 21 deletions(-)
+
+diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c
+index 4ccfcf33..d2c09443 100644
+--- a/host/lib/extract_vmlinuz.c
++++ b/host/lib/extract_vmlinuz.c
+@@ -15,16 +15,44 @@
+
+ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+ void **vmlinuz_out, size_t *vmlinuz_size) {
++ // We're going to be extracting `vmlinuz_header` and
++ // `kblob_data`, and returning the concatenation of them.
++ //
++ // kpart_data = +-[kpart_size]------------------------------------+
++ // | |
++ // keyblock = | +-[keyblock->keyblock_size]-------------------+ |
++ // | | struct vb2_keyblock keyblock | |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // preamble = | +-[preamble->preamble_size]-------------------+ |
++ // | | struct vb2_kernel_preamble preamble | |
++ // | | char [] ...data... | |
++ // | | char [] vmlinuz_header | |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // kblob_data= | +-[preamble->body_signature.data_size]--------+ |
++ // | | char [] ...data... | |
++ // | +---------------------------------------------+ |
++ // | |
++ // +-------------------------------------------------+
++
+ size_t now = 0;
++ // The 3 sections of kpart_data.
++ struct vb2_keyblock *keyblock = NULL;
+ struct vb2_kernel_preamble *preamble = NULL;
+ uint8_t *kblob_data = NULL;
+ uint32_t kblob_size = 0;
++ // vmlinuz_header
++ uint8_t *vmlinuz_header = NULL;
+ uint32_t vmlinuz_header_size = 0;
+- uint64_t vmlinuz_header_address = 0;
+- uint64_t vmlinuz_header_offset = 0;
++ // The concatenated result.
+ void *vmlinuz = NULL;
+
+- struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data;
++ // Isolate the 3 sections of kpart_data.
++
++ keyblock = (struct vb2_keyblock *)kpart_data;
+ now += keyblock->keyblock_size;
+ if (now > kpart_size)
+ return 1;
+@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size,
+
+ kblob_data = kpart_data + now;
+ kblob_size = preamble->body_signature.data_size;
+-
+- if (!kblob_data || (now + kblob_size) > kpart_size)
++ now += kblob_size;
++ if (now > kpart_size)
+ return 1;
+
++ // Find `vmlinuz_header` within `preamble`.
++
+ if (preamble->header_version_minor > 0) {
+- vmlinuz_header_address = preamble->vmlinuz_header_address;
++ // calculate the vmlinuz_header offset from
++ // the beginning of the kpart_data. The kblob doesn't
++ // include the body_load_offset, but does include
++ // the keyblock and preamble sections.
++ size_t vmlinuz_header_offset =
++ preamble->vmlinuz_header_address -
++ preamble->body_load_address +
++ keyblock->keyblock_size +
++ preamble->preamble_size;
++
++ vmlinuz_header = kpart_data + vmlinuz_header_offset;
+ vmlinuz_header_size = preamble->vmlinuz_header_size;
+ }
+
+- if (!vmlinuz_header_size ||
+- kpart_data + vmlinuz_header_offset + vmlinuz_header_size >
+- kpart_data) {
++ if (!vmlinuz_header ||
++ !vmlinuz_header_size ||
++ vmlinuz_header + vmlinuz_header_size > kblob_data) {
+ return 1;
+ }
+
+- // calculate the vmlinuz_header offset from
+- // the beginning of the kpart_data. The kblob doesn't
+- // include the body_load_offset, but does include
+- // the keyblock and preamble sections.
+- vmlinuz_header_offset = vmlinuz_header_address -
+- preamble->body_load_address +
+- keyblock->keyblock_size +
+- preamble->preamble_size;
++ // Concatenate and return.
+
+ vmlinuz = malloc(vmlinuz_header_size + kblob_size);
+ if (vmlinuz == NULL)
+ return 1;
+-
+- memcpy(vmlinuz, kpart_data + vmlinuz_header_offset,
+- vmlinuz_header_size);
+-
++ memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size);
+ memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size);
+
+ *vmlinuz_out = vmlinuz;
+--
+2.45.1
+
diff --git a/config/submodule/docs/html/module.cfg b/config/submodule/docs/html/module.cfg
new file mode 100644
index 00000000..1b13b25d
--- /dev/null
+++ b/config/submodule/docs/html/module.cfg
@@ -0,0 +1,3 @@
+subhash="cef9c80c01dbcbe62b0cd63e5ebf03133f16ac1b"
+subrepo="https://codeberg.org/libreboot/lbwww"
+subrepo_bkup="https://git.disroot.org/libreboot/lbwww"
diff --git a/config/submodule/docs/img/module.cfg b/config/submodule/docs/img/module.cfg
new file mode 100644
index 00000000..87c99fc1
--- /dev/null
+++ b/config/submodule/docs/img/module.cfg
@@ -0,0 +1,3 @@
+subhash="bd92e319bde851d567240452bb89299050a24f3f"
+subrepo="https://codeberg.org/libreboot/lbwww-img"
+subrepo_bkup="https://git.disroot.org/libreboot/lbwww-img"
diff --git a/config/submodule/docs/module.list b/config/submodule/docs/module.list
new file mode 100644
index 00000000..1ad2aecb
--- /dev/null
+++ b/config/submodule/docs/module.list
@@ -0,0 +1,3 @@
+www/untitled
+www/html
+www/html/site/img
diff --git a/config/submodule/docs/untitled/module.cfg b/config/submodule/docs/untitled/module.cfg
new file mode 100644
index 00000000..35e950e7
--- /dev/null
+++ b/config/submodule/docs/untitled/module.cfg
@@ -0,0 +1,3 @@
+subhash="d8e2043c1512eb1171c274559ce82e8093ef393f"
+subrepo="https://codeberg.org/vimuser/untitled-website"
+subrepo_bkup="https://notabug.org/untitled/untitled-website"
diff --git a/config/submodule/grub/default/gnulib/module.cfg b/config/submodule/grub/default/gnulib/module.cfg
new file mode 100644
index 00000000..6fd77871
--- /dev/null
+++ b/config/submodule/grub/default/gnulib/module.cfg
@@ -0,0 +1,3 @@
+subrepo="git://git.sv.gnu.org/gnulib"
+subrepo_bkup="https://codeberg.org/libreboot/gnulib"
+subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
diff --git a/config/submodule/grub/default/module.list b/config/submodule/grub/default/module.list
new file mode 100644
index 00000000..0e57095c
--- /dev/null
+++ b/config/submodule/grub/default/module.list
@@ -0,0 +1 @@
+gnulib
diff --git a/config/submodule/grub/nvme/gnulib/module.cfg b/config/submodule/grub/nvme/gnulib/module.cfg
new file mode 100644
index 00000000..6fd77871
--- /dev/null
+++ b/config/submodule/grub/nvme/gnulib/module.cfg
@@ -0,0 +1,3 @@
+subrepo="git://git.sv.gnu.org/gnulib"
+subrepo_bkup="https://codeberg.org/libreboot/gnulib"
+subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
diff --git a/config/submodule/grub/nvme/module.list b/config/submodule/grub/nvme/module.list
new file mode 100644
index 00000000..0e57095c
--- /dev/null
+++ b/config/submodule/grub/nvme/module.list
@@ -0,0 +1 @@
+gnulib
diff --git a/config/submodule/grub/xhci/gnulib/module.cfg b/config/submodule/grub/xhci/gnulib/module.cfg
new file mode 100644
index 00000000..6fd77871
--- /dev/null
+++ b/config/submodule/grub/xhci/gnulib/module.cfg
@@ -0,0 +1,3 @@
+subrepo="git://git.sv.gnu.org/gnulib"
+subrepo_bkup="https://codeberg.org/libreboot/gnulib"
+subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b"
diff --git a/config/submodule/grub/xhci/module.list b/config/submodule/grub/xhci/module.list
new file mode 100644
index 00000000..0e57095c
--- /dev/null
+++ b/config/submodule/grub/xhci/module.list
@@ -0,0 +1 @@
+gnulib
diff --git a/config/submodule/pcsx-redux/module.list b/config/submodule/pcsx-redux/module.list
new file mode 100644
index 00000000..9b1f70ee
--- /dev/null
+++ b/config/submodule/pcsx-redux/module.list
@@ -0,0 +1 @@
+third_party/uC-sdk
diff --git a/config/submodule/pcsx-redux/uC-sdk/module.cfg b/config/submodule/pcsx-redux/uC-sdk/module.cfg
new file mode 100644
index 00000000..dd112407
--- /dev/null
+++ b/config/submodule/pcsx-redux/uC-sdk/module.cfg
@@ -0,0 +1,3 @@
+subhash="7c6f1973a16893cf1f0868af6f8e60a028b933ad"
+subrepo="https://github.com/grumpycoders/uC-sdk.git"
+subrepo_bkup="https://codeberg.org/vimuser/uC-sdk"
diff --git a/config/submodule/pico-sdk/module.list b/config/submodule/pico-sdk/module.list
new file mode 100644
index 00000000..6b4010a6
--- /dev/null
+++ b/config/submodule/pico-sdk/module.list
@@ -0,0 +1 @@
+lib/tinyusb
diff --git a/config/submodule/pico-sdk/tinyusb/module.cfg b/config/submodule/pico-sdk/tinyusb/module.cfg
new file mode 100644
index 00000000..43b71534
--- /dev/null
+++ b/config/submodule/pico-sdk/tinyusb/module.cfg
@@ -0,0 +1,3 @@
+subhash="86c416d4c0fb38432460b3e11b08b9de76941bf5"
+subrepo="https://codeberg.org/libreboot/tinyusb"
+subrepo_bkup="https://github.com/hathach/tinyusb.git"
diff --git a/config/submodule/stm32-vserprog/libopencm3/module.cfg b/config/submodule/stm32-vserprog/libopencm3/module.cfg
new file mode 100644
index 00000000..9fb3460b
--- /dev/null
+++ b/config/submodule/stm32-vserprog/libopencm3/module.cfg
@@ -0,0 +1,3 @@
+subhash="458250dc6147dc807eec9e4d5a6caf38a699ecb1"
+subrepo="https://codeberg.org/libreboot/libopencm3"
+subrepo_bkup="https://github.com/libopencm3/libopencm3"
diff --git a/config/submodule/stm32-vserprog/module.list b/config/submodule/stm32-vserprog/module.list
new file mode 100644
index 00000000..f14cc1fa
--- /dev/null
+++ b/config/submodule/stm32-vserprog/module.list
@@ -0,0 +1 @@
+libopencm3
diff --git a/config/u-boot/default/nuke.list b/config/u-boot/default/nuke.list
new file mode 100644
index 00000000..f3a3fcc3
--- /dev/null
+++ b/config/u-boot/default/nuke.list
@@ -0,0 +1 @@
+test/lib/strlcat.c
diff --git a/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch b/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch
index 4a3e8687..4ceeac59 100644
--- a/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch
+++ b/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch
@@ -1,4 +1,4 @@
-From 27d49512277677afb7f71e093b007b3e2022b83e Mon Sep 17 00:00:00 2001
+From f98475a64fcfe6ef710acb29391c33c17903e580 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Fri, 8 Oct 2021 17:33:22 +0300
Subject: [PATCH] clk: rockchip: rk3399: Set hardcoded clock rates same as
@@ -60,7 +60,7 @@ index d941a129f3e5..54035c0df1f3 100644
#define PWM_CLOCK_HZ PMU_PCLK_HZ
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
-index f748fb5189e0..33f02c2d633c 100644
+index 67b2c05ec9ed..754b35c23197 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -54,10 +54,11 @@ struct pll_div {
@@ -87,7 +87,7 @@ index f748fb5189e0..33f02c2d633c 100644
void *aclkreg_addr, *dclkreg_addr;
u32 div;
-@@ -1336,6 +1337,7 @@ static void rkclk_init(struct rockchip_cru *cru)
+@@ -1395,6 +1396,7 @@ static void rkclk_init(struct rockchip_cru *cru)
/* configure gpll cpll */
rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg);
rkclk_set_pll(&cru->cpll_con[0], &cpll_init_cfg);
@@ -96,5 +96,5 @@ index f748fb5189e0..33f02c2d633c 100644
/* configure perihp aclk, hclk, pclk */
aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1;
--
-2.42.0
+2.45.2
diff --git a/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch b/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch
index cd5a2751..d5c6788a 100644
--- a/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch
+++ b/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch
@@ -1,7 +1,7 @@
-From ac31b6bc4bcfc328342ec1677db5b80548d43b35 Mon Sep 17 00:00:00 2001
+From 3e1e14e0b14539ca42db40488c7b1067eb01dea4 Mon Sep 17 00:00:00 2001
From: Andre Przywara <andre.przywara@arm.com>
Date: Mon, 10 Jan 2022 00:56:31 +0000
-Subject: [PATCH 1/4] video: Add cursor support for video consoles
+Subject: [PATCH 1/3] video: Add cursor support for video consoles
So far the video console is completely lacking any cursor, which makes
typing and correcting quite irritating.
@@ -24,7 +24,7 @@ Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
3 files changed, 44 insertions(+)
diff --git a/drivers/video/console_core.c b/drivers/video/console_core.c
-index b5d0e3dceca3..60de5fcacb82 100644
+index 939363653f6c..6b531718276f 100644
--- a/drivers/video/console_core.c
+++ b/drivers/video/console_core.c
@@ -30,6 +30,7 @@ static int console_set_font(struct udevice *dev, struct video_fontdata *fontdata
@@ -36,10 +36,10 @@ index b5d0e3dceca3..60de5fcacb82 100644
vc_priv->y_charsize = fontdata->height;
if (vid_priv->rot % 2) {
diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c
-index b5b3b6625902..a6d994bd637c 100644
+index 80e7adf6a1a4..8b2ef51f1b3b 100644
--- a/drivers/video/vidconsole-uclass.c
+++ b/drivers/video/vidconsole-uclass.c
-@@ -56,6 +56,26 @@ static int vidconsole_entry_start(struct udevice *dev)
+@@ -57,6 +57,26 @@ int vidconsole_entry_start(struct udevice *dev)
return ops->entry_start(dev);
}
@@ -66,7 +66,7 @@ index b5b3b6625902..a6d994bd637c 100644
/* Move backwards one space */
static int vidconsole_back(struct udevice *dev)
{
-@@ -63,6 +83,8 @@ static int vidconsole_back(struct udevice *dev)
+@@ -64,6 +84,8 @@ static int vidconsole_back(struct udevice *dev)
struct vidconsole_ops *ops = vidconsole_get_ops(dev);
int ret;
@@ -75,7 +75,7 @@ index b5b3b6625902..a6d994bd637c 100644
if (ops->backspace) {
ret = ops->backspace(dev);
if (ret != -ENOSYS)
-@@ -89,6 +111,8 @@ static void vidconsole_newline(struct udevice *dev)
+@@ -90,6 +112,8 @@ static void vidconsole_newline(struct udevice *dev)
const int rows = CONFIG_VAL(CONSOLE_SCROLL_LINES);
int i, ret;
@@ -84,7 +84,7 @@ index b5b3b6625902..a6d994bd637c 100644
priv->xcur_frac = priv->xstart_frac;
priv->ycur += priv->y_charsize;
-@@ -282,6 +306,14 @@ static void vidconsole_escape_char(struct udevice *dev, char ch)
+@@ -284,6 +308,14 @@ static void vidconsole_escape_char(struct udevice *dev, char ch)
break;
}
@@ -99,9 +99,9 @@ index b5b3b6625902..a6d994bd637c 100644
case 'J': {
int mode;
-@@ -456,6 +488,11 @@ int vidconsole_put_char(struct udevice *dev, char ch)
+@@ -458,6 +490,11 @@ int vidconsole_put_char(struct udevice *dev, char ch)
struct vidconsole_priv *priv = dev_get_uclass_priv(dev);
- int ret;
+ int cp, ret;
+ /*
+ * We don't need to clear the cursor since we are going to overwrite
@@ -111,7 +111,7 @@ index b5b3b6625902..a6d994bd637c 100644
if (priv->escape) {
vidconsole_escape_char(dev, ch);
return 0;
-@@ -470,6 +507,7 @@ int vidconsole_put_char(struct udevice *dev, char ch)
+@@ -472,6 +509,7 @@ int vidconsole_put_char(struct udevice *dev, char ch)
/* beep */
break;
case '\r':
@@ -119,7 +119,7 @@ index b5b3b6625902..a6d994bd637c 100644
priv->xcur_frac = priv->xstart_frac;
break;
case '\n':
-@@ -477,6 +515,7 @@ int vidconsole_put_char(struct udevice *dev, char ch)
+@@ -479,6 +517,7 @@ int vidconsole_put_char(struct udevice *dev, char ch)
vidconsole_entry_start(dev);
break;
case '\t': /* Tab (8 chars alignment) */
@@ -127,7 +127,7 @@ index b5b3b6625902..a6d994bd637c 100644
priv->xcur_frac = ((priv->xcur_frac / priv->tab_width_frac)
+ 1) * priv->tab_width_frac;
-@@ -494,6 +533,8 @@ int vidconsole_put_char(struct udevice *dev, char ch)
+@@ -503,6 +542,8 @@ int vidconsole_put_char(struct udevice *dev, char ch)
break;
}
@@ -136,7 +136,7 @@ index b5b3b6625902..a6d994bd637c 100644
return 0;
}
-@@ -646,6 +687,7 @@ static int vidconsole_pre_probe(struct udevice *dev)
+@@ -723,6 +764,7 @@ static int vidconsole_pre_probe(struct udevice *dev)
struct video_priv *vid_priv = dev_get_uclass_priv(vid);
priv->xsize_frac = VID_TO_POS(vid_priv->xsize);
@@ -145,25 +145,27 @@ index b5b3b6625902..a6d994bd637c 100644
return 0;
}
diff --git a/include/video_console.h b/include/video_console.h
-index 2694e44f6ecf..949abb3861e7 100644
+index 8b5928dc5ebb..00c5ecb664b9 100644
--- a/include/video_console.h
+++ b/include/video_console.h
-@@ -59,6 +59,7 @@ struct vidconsole_priv {
+@@ -66,6 +66,7 @@ struct vidconsole_priv {
int escape_len;
int row_saved;
int col_saved;
+ bool cursor_visible;
char escape_buf[32];
+ char utf8_buf[5];
};
-
+
+base-commit: 475aa8345a78396d39b42f96eccecd37ebe24e99
--
-2.42.0
+2.45.2
-From ab8ddf81c1442717f6ffddc3460d4e4adbd5b570 Mon Sep 17 00:00:00 2001
+From 0dd4fb08993b01d36e491705b24063834dcb618e Mon Sep 17 00:00:00 2001
From: Andre Przywara <andre.przywara@arm.com>
Date: Mon, 10 Jan 2022 00:56:36 +0000
-Subject: [PATCH 2/4] efi-selftest: Add international characters test
+Subject: [PATCH 2/3] efi-selftest: Add international characters test
UEFI relies entirely on unicode output, which actual fonts displayed on
the screen might not be ready for.
@@ -180,10 +182,10 @@ Link: https://lore.kernel.org/r/20220110005638.21599-7-andre.przywara@arm.com
1 file changed, 5 insertions(+)
diff --git a/lib/efi_selftest/efi_selftest_textoutput.c b/lib/efi_selftest/efi_selftest_textoutput.c
-index cc44b38bc23a..175731ae96b6 100644
+index a3023c82567c..2f8d8d323c2b 100644
--- a/lib/efi_selftest/efi_selftest_textoutput.c
+++ b/lib/efi_selftest/efi_selftest_textoutput.c
-@@ -118,6 +118,11 @@ static int execute(void)
+@@ -154,6 +154,11 @@ static int execute(void)
efi_st_printf("Unicode not handled properly\n");
return EFI_ST_FAILURE;
}
@@ -193,16 +195,16 @@ index cc44b38bc23a..175731ae96b6 100644
+ return EFI_ST_FAILURE;
+ }
efi_st_printf("\n");
-
- return EFI_ST_SUCCESS;
+ ret = con_out->output_string(con_out, text);
+ if (ret != EFI_ST_SUCCESS) {
--
-2.42.0
+2.45.2
-From 48e918c31a46815325ffd7a77eb7a3ffedf8e59c Mon Sep 17 00:00:00 2001
+From 13101947807bec7ceaf3231d94e943b9b29a7369 Mon Sep 17 00:00:00 2001
From: Andre Przywara <andre.przywara@arm.com>
Date: Mon, 10 Jan 2022 00:56:37 +0000
-Subject: [PATCH 3/4] efi_selftest: Add box drawing character selftest
+Subject: [PATCH 3/3] efi_selftest: Add box drawing character selftest
UEFI applications rely on Unicode output capability, and might use that
for drawing pseudo-graphical interfaces using Unicode defined box
@@ -220,10 +222,10 @@ Link: https://lore.kernel.org/r/20220110005638.21599-8-andre.przywara@arm.com
1 file changed, 11 insertions(+)
diff --git a/lib/efi_selftest/efi_selftest_textoutput.c b/lib/efi_selftest/efi_selftest_textoutput.c
-index 175731ae96b6..3c6870f74241 100644
+index 2f8d8d323c2b..02209a5bf224 100644
--- a/lib/efi_selftest/efi_selftest_textoutput.c
+++ b/lib/efi_selftest/efi_selftest_textoutput.c
-@@ -123,6 +123,17 @@ static int execute(void)
+@@ -159,6 +159,17 @@ static int execute(void)
efi_st_error("OutputString failed for international chars\n");
return EFI_ST_FAILURE;
}
@@ -239,275 +241,8 @@ index 175731ae96b6..3c6870f74241 100644
+ con_out->output_string(con_out, L"waiting for admiration...\n");
+ EFI_CALL(systab.boottime->stall(3000000));
efi_st_printf("\n");
-
- return EFI_ST_SUCCESS;
---
-2.42.0
-
-
-From 407ca7e821aabf240c2602dd0db56d6398a0c03b Mon Sep 17 00:00:00 2001
-From: Andre Przywara <andre.przywara@arm.com>
-Date: Mon, 10 Jan 2022 00:56:38 +0000
-Subject: [PATCH 4/4] video: Convert UTF-8 input stream to the 437 code page
-
-The bitmap fonts (VGA 8x16 and friends) we import from Linux use the
-437 code page to map their glyphs. For U-Boot's own purposes this is
-probably fine, but UEFI applications output Unicode, which only matches
-in the very basic first 127 characters.
-
-Add a function that converts UTF-8 character sequences into the
-respective CP437 code point, as far as the characters defined in there
-allow this. This includes quite some international and box drawing
-characters, which are used by UEFI applications.
-
-Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-Link: https://lore.kernel.org/r/20220110005638.21599-9-andre.przywara@arm.com
-[Alper: Rebase for makefile changes, use $(SPL_TPL_)VIDEO]
-Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
----
- drivers/video/Makefile | 1 +
- drivers/video/utf8_cp437.c | 169 ++++++++++++++++++++++++++++++
- drivers/video/vidconsole-uclass.c | 6 +-
- include/video_console.h | 9 ++
- 4 files changed, 184 insertions(+), 1 deletion(-)
- create mode 100644 drivers/video/utf8_cp437.c
-
-diff --git a/drivers/video/Makefile b/drivers/video/Makefile
-index d13af9f3b19b..4b1983990aba 100644
---- a/drivers/video/Makefile
-+++ b/drivers/video/Makefile
-@@ -20,6 +20,7 @@ obj-$(CONFIG_DISPLAY) += display-uclass.o
- obj-$(CONFIG_VIDEO_MIPI_DSI) += dsi-host-uclass.o
- obj-$(CONFIG_$(SPL_TPL_)VIDEO) += video-uclass.o vidconsole-uclass.o
- obj-$(CONFIG_$(SPL_TPL_)VIDEO) += video_bmp.o
-+obj-$(CONFIG_$(SPL_TPL_)VIDEO) += utf8_cp437.o
- obj-$(CONFIG_$(SPL_TPL_)PANEL) += panel-uclass.o
- obj-$(CONFIG_PANEL_HX8238D) += hx8238d.o
- obj-$(CONFIG_$(SPL_TPL_)SIMPLE_PANEL) += simple_panel.o
-diff --git a/drivers/video/utf8_cp437.c b/drivers/video/utf8_cp437.c
-new file mode 100644
-index 000000000000..cab68b92b6e3
---- /dev/null
-+++ b/drivers/video/utf8_cp437.c
-@@ -0,0 +1,169 @@
-+/*
-+ * Convert UTF-8 bytes into a code page 437 character.
-+ * Based on the table in the Code_page_437 Wikipedia page.
-+ */
-+
-+#include <linux/types.h>
-+
-+uint8_t code_points_00a0[] = {
-+ 255, 173, 155, 156, 7, 157, 7, 21,
-+ 7, 7, 166, 174, 170, 7, 7, 7,
-+ 248, 241, 253, 7, 7, 230, 20, 250,
-+ 7, 7, 167, 175, 172, 171, 7, 168,
-+ 7, 7, 7, 7, 142, 143, 146, 128,
-+ 7, 144, 7, 7, 7, 7, 7, 7,
-+ 7, 165, 7, 7, 7, 7, 153, 7,
-+ 7, 7, 7, 7, 154, 7, 7, 225,
-+ 133, 160, 131, 7, 132, 134, 145, 135,
-+ 138, 130, 136, 137, 141, 161, 140, 139,
-+ 7, 164, 149, 162, 147, 7, 148, 246,
-+ 7, 151, 163, 150, 129, 7, 7, 152,
-+};
-+
-+uint8_t code_points_2550[] = {
-+ 205, 186, 213, 214, 201, 184, 183, 187,
-+ 212, 211, 200, 190, 189, 188, 198, 199,
-+ 204, 181, 182, 185, 209, 210, 203, 207,
-+ 208, 202, 216, 215, 206
-+};
-+
-+static uint8_t utf8_convert_11bit(uint16_t code)
-+{
-+ switch (code) {
-+ case 0x0192: return 159;
-+ case 0x0393: return 226;
-+ case 0x0398: return 233;
-+ case 0x03A3: return 228;
-+ case 0x03A6: return 232;
-+ case 0x03A9: return 234;
-+ case 0x03B1: return 224;
-+ case 0x03B4: return 235;
-+ case 0x03B5: return 238;
-+ case 0x03C0: return 227;
-+ case 0x03C3: return 229;
-+ case 0x03C4: return 231;
-+ case 0x03C6: return 237;
-+ }
-+
-+ return 0;
-+};
-+
-+static uint8_t utf8_convert_2xxx(uint16_t code)
-+{
-+ switch (code) {
-+ case 0x2022: return 7;
-+ case 0x203C: return 19;
-+ case 0x207F: return 252;
-+ case 0x20A7: return 158;
-+ case 0x2190: return 27;
-+ case 0x2191: return 24;
-+ case 0x2192: return 26;
-+ case 0x2193: return 25;
-+ case 0x2194: return 29;
-+ case 0x2195: return 18;
-+ case 0x21A8: return 23;
-+ case 0x2219: return 249;
-+ case 0x221A: return 251;
-+ case 0x221E: return 236;
-+ case 0x221F: return 28;
-+ case 0x2229: return 239;
-+ case 0x2248: return 247;
-+ case 0x2261: return 240;
-+ case 0x2264: return 243;
-+ case 0x2265: return 242;
-+ case 0x2310: return 169;
-+ case 0x2320: return 244;
-+ case 0x2321: return 245;
-+ case 0x2500: return 196;
-+ case 0x2502: return 179;
-+ case 0x250C: return 218;
-+ case 0x2510: return 191;
-+ case 0x2514: return 192;
-+ case 0x2518: return 217;
-+ case 0x251C: return 195;
-+ case 0x2524: return 180;
-+ case 0x252C: return 194;
-+ case 0x2534: return 193;
-+ case 0x253C: return 197;
-+ case 0x2580: return 223;
-+ case 0x2584: return 220;
-+ case 0x2588: return 219;
-+ case 0x258C: return 221;
-+ case 0x2590: return 222;
-+ case 0x2591: return 176;
-+ case 0x2592: return 177;
-+ case 0x2593: return 178;
-+ case 0x25A0: return 254;
-+ case 0x25AC: return 22;
-+ case 0x25B2: return 30;
-+ case 0x25BA: return 16;
-+ case 0x25BC: return 31;
-+ case 0x25C4: return 17;
-+ case 0x25CB: return 9;
-+ case 0x25D8: return 8;
-+ case 0x25D9: return 10;
-+ case 0x263A: return 1;
-+ case 0x263B: return 2;
-+ case 0x263C: return 15;
-+ case 0x2640: return 12;
-+ case 0x2642: return 11;
-+ case 0x2660: return 6;
-+ case 0x2663: return 5;
-+ case 0x2665: return 3;
-+ case 0x2666: return 4;
-+ case 0x266A: return 13;
-+ case 0x266B: return 14;
-+ }
-+
-+ return 0;
-+}
-+
-+uint8_t convert_uc16_to_cp437(uint16_t code)
-+{
-+ if (code < 0x7f) // ASCII
-+ return code;
-+ if (code < 0xa0) // high control characters
-+ return code;
-+ if (code < 0x100) // international characters
-+ return code_points_00a0[code - 0xa0];
-+ if (code < 0x800)
-+ return utf8_convert_11bit(code);
-+ if (code >= 0x2550 && code < 0x256d) // block graphics
-+ return code_points_2550[code - 0x2550];
-+
-+ return utf8_convert_2xxx(code);
-+}
-+
-+uint8_t convert_utf8_to_cp437(uint8_t c, uint32_t *esc)
-+{
-+ int shift;
-+ uint16_t ucs;
-+
-+ if (c < 127) // ASCII
-+ return c;
-+ if (c == 127)
-+ return 8; // DEL (?)
-+
-+ switch (c & 0xf0) {
-+ case 0xc0: case 0xd0: // two bytes sequence
-+ *esc = (1U << 24) | ((c & 0x1f) << 6);
-+ return 0;
-+ case 0xe0: // three bytes sequence
-+ *esc = (2U << 24) | ((c & 0x0f) << 12);
-+ return 0;
-+ case 0xf0: // four bytes sequence
-+ *esc = (3U << 24) | ((c & 0x07) << 18);
-+ return 0;
-+ case 0x80: case 0x90: case 0xa0: case 0xb0: // continuation
-+ shift = (*esc >> 24) - 1;
-+ ucs = *esc & 0xffffff;
-+ if (shift) {
-+ *esc = (shift << 24) | ucs | (c & 0x3f) << (shift * 6);
-+ return 0;
-+ }
-+ *esc = 0;
-+ return convert_uc16_to_cp437(ucs | (c & 0x3f));
-+ }
-+
-+ return 0;
-+}
-diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c
-index a6d994bd637c..a4029a58660b 100644
---- a/drivers/video/vidconsole-uclass.c
-+++ b/drivers/video/vidconsole-uclass.c
-@@ -486,6 +486,7 @@ static int vidconsole_output_glyph(struct udevice *dev, char ch)
- int vidconsole_put_char(struct udevice *dev, char ch)
- {
- struct vidconsole_priv *priv = dev_get_uclass_priv(dev);
-+ uint8_t cp437;
- int ret;
-
- /*
-@@ -527,7 +528,10 @@ int vidconsole_put_char(struct udevice *dev, char ch)
- priv->last_ch = 0;
- break;
- default:
-- ret = vidconsole_output_glyph(dev, ch);
-+ cp437 = convert_utf8_to_cp437(ch, &priv->ucs);
-+ if (cp437 == 0)
-+ return 0;
-+ ret = vidconsole_output_glyph(dev, cp437);
- if (ret < 0)
- return ret;
- break;
-diff --git a/include/video_console.h b/include/video_console.h
-index 949abb3861e7..dbfb389f324f 100644
---- a/include/video_console.h
-+++ b/include/video_console.h
-@@ -59,6 +59,7 @@ struct vidconsole_priv {
- int escape_len;
- int row_saved;
- int col_saved;
-+ u32 ucs;
- bool cursor_visible;
- char escape_buf[32];
- };
-@@ -457,4 +458,12 @@ static inline int vidconsole_memmove(struct udevice *dev, void *dst,
-
- #endif
-
-+/*
-+ * Convert an UTF-8 byte into the corresponding character in the CP437
-+ * code page. Returns 0 if that character is part of a multi-byte sequence.
-+ * for which *esc holds the state of. Repeatedly feed in more bytes until
-+ * the return value returns a non-0 character.
-+ */
-+uint8_t convert_utf8_to_cp437(uint8_t c, uint32_t *esc);
-+
- #endif
+ ret = con_out->output_string(con_out, text);
+ if (ret != EFI_ST_SUCCESS) {
--
-2.42.0
+2.45.2
diff --git a/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch b/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch
index 80195dc0..616efa0f 100644
--- a/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch
+++ b/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch
@@ -1,4 +1,4 @@
-From 60a24786c1c542b2a5967632df15ae14d1385061 Mon Sep 17 00:00:00 2001
+From 3efc90a6ea3bb88b66af7f7096e8168c2cc34aa6 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Fri, 18 Aug 2023 13:31:36 +0300
Subject: [PATCH 01/13] video: test: Split copy frame buffer check into a
@@ -12,16 +12,17 @@ function that we can skip calling, since we won't want it to error on
those mismatched cases.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-2-alpernebiyasak@gmail.com/
---
test/dm/video.c | 69 +++++++++++++++++++++++++++++++++++++++++--------
1 file changed, 58 insertions(+), 11 deletions(-)
diff --git a/test/dm/video.c b/test/dm/video.c
-index d907f681600b..641a6250100a 100644
+index 7dfbeb9555d1..14e6af5181f1 100644
--- a/test/dm/video.c
+++ b/test/dm/video.c
-@@ -55,9 +55,6 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+@@ -54,9 +54,6 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
* size of the compressed data. This provides a pretty good level of
* certainty and the resulting tests need only check a single value.
*
@@ -31,7 +32,7 @@ index d907f681600b..641a6250100a 100644
* @uts: Test state
* @dev: Video device
* Return: compressed size of the frame buffer, or -ve on error
-@@ -66,7 +63,6 @@ static int compress_frame_buffer(struct unit_test_state *uts,
+@@ -65,7 +62,6 @@ static int compress_frame_buffer(struct unit_test_state *uts,
struct udevice *dev)
{
struct video_priv *priv = dev_get_uclass_priv(dev);
@@ -39,7 +40,7 @@ index d907f681600b..641a6250100a 100644
uint destlen;
void *dest;
int ret;
-@@ -82,16 +78,34 @@ static int compress_frame_buffer(struct unit_test_state *uts,
+@@ -81,16 +77,34 @@ static int compress_frame_buffer(struct unit_test_state *uts,
if (ret)
return ret;
@@ -81,7 +82,7 @@ index d907f681600b..641a6250100a 100644
/*
* Call this function at any point to halt and show the current display. Be
* sure to run the test with the -l flag.
-@@ -155,24 +169,30 @@ static int dm_test_video_text(struct unit_test_state *uts)
+@@ -154,24 +168,30 @@ static int dm_test_video_text(struct unit_test_state *uts)
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
ut_assertok(vidconsole_select_font(con, "8x16", 0));
ut_asserteq(46, compress_frame_buffer(uts, dev));
@@ -112,7 +113,7 @@ index d907f681600b..641a6250100a 100644
return 0;
}
-@@ -191,24 +211,30 @@ static int dm_test_video_text_12x22(struct unit_test_state *uts)
+@@ -190,24 +210,30 @@ static int dm_test_video_text_12x22(struct unit_test_state *uts)
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
ut_assertok(vidconsole_select_font(con, "12x22", 0));
ut_asserteq(46, compress_frame_buffer(uts, dev));
@@ -143,7 +144,7 @@ index d907f681600b..641a6250100a 100644
return 0;
}
-@@ -226,6 +252,7 @@ static int dm_test_video_chars(struct unit_test_state *uts)
+@@ -225,6 +251,7 @@ static int dm_test_video_chars(struct unit_test_state *uts)
ut_assertok(vidconsole_select_font(con, "8x16", 0));
vidconsole_put_string(con, test_string);
ut_asserteq(466, compress_frame_buffer(uts, dev));
@@ -151,7 +152,7 @@ index d907f681600b..641a6250100a 100644
return 0;
}
-@@ -247,19 +274,23 @@ static int dm_test_video_ansi(struct unit_test_state *uts)
+@@ -246,19 +273,23 @@ static int dm_test_video_ansi(struct unit_test_state *uts)
video_clear(con->parent);
video_sync(con->parent, false);
ut_asserteq(46, compress_frame_buffer(uts, dev));
@@ -175,7 +176,7 @@ index d907f681600b..641a6250100a 100644
return 0;
}
-@@ -292,11 +323,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot,
+@@ -291,11 +322,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot,
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
ut_assertok(vidconsole_select_font(con, "8x16", 0));
ut_asserteq(46, compress_frame_buffer(uts, dev));
@@ -189,7 +190,7 @@ index d907f681600b..641a6250100a 100644
/* Check display scrolling */
for (i = 0; i < SCROLL_LINES; i++) {
-@@ -304,11 +337,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot,
+@@ -303,11 +336,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot,
vidconsole_put_char(con, '\n');
}
ut_asserteq(scroll_size, compress_frame_buffer(uts, dev));
@@ -203,7 +204,7 @@ index d907f681600b..641a6250100a 100644
return 0;
}
-@@ -383,6 +418,7 @@ static int dm_test_video_bmp(struct unit_test_state *uts)
+@@ -382,6 +417,7 @@ static int dm_test_video_bmp(struct unit_test_state *uts)
ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
ut_asserteq(1368, compress_frame_buffer(uts, dev));
@@ -211,7 +212,7 @@ index d907f681600b..641a6250100a 100644
return 0;
}
-@@ -402,6 +438,7 @@ static int dm_test_video_bmp8(struct unit_test_state *uts)
+@@ -401,6 +437,7 @@ static int dm_test_video_bmp8(struct unit_test_state *uts)
ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
ut_asserteq(1247, compress_frame_buffer(uts, dev));
@@ -219,7 +220,7 @@ index d907f681600b..641a6250100a 100644
return 0;
}
-@@ -425,6 +462,7 @@ static int dm_test_video_bmp16(struct unit_test_state *uts)
+@@ -424,6 +461,7 @@ static int dm_test_video_bmp16(struct unit_test_state *uts)
ut_assertok(video_bmp_display(dev, dst, 0, 0, false));
ut_asserteq(3700, compress_frame_buffer(uts, dev));
@@ -227,7 +228,7 @@ index d907f681600b..641a6250100a 100644
return 0;
}
-@@ -448,6 +486,7 @@ static int dm_test_video_bmp24(struct unit_test_state *uts)
+@@ -447,6 +485,7 @@ static int dm_test_video_bmp24(struct unit_test_state *uts)
ut_assertok(video_bmp_display(dev, dst, 0, 0, false));
ut_asserteq(3656, compress_frame_buffer(uts, dev));
@@ -235,7 +236,7 @@ index d907f681600b..641a6250100a 100644
return 0;
}
-@@ -471,6 +510,7 @@ static int dm_test_video_bmp24_32(struct unit_test_state *uts)
+@@ -470,6 +509,7 @@ static int dm_test_video_bmp24_32(struct unit_test_state *uts)
ut_assertok(video_bmp_display(dev, dst, 0, 0, false));
ut_asserteq(6827, compress_frame_buffer(uts, dev));
@@ -243,7 +244,7 @@ index d907f681600b..641a6250100a 100644
return 0;
}
-@@ -489,6 +529,7 @@ static int dm_test_video_bmp32(struct unit_test_state *uts)
+@@ -488,6 +528,7 @@ static int dm_test_video_bmp32(struct unit_test_state *uts)
ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
ut_asserteq(2024, compress_frame_buffer(uts, dev));
@@ -251,7 +252,7 @@ index d907f681600b..641a6250100a 100644
return 0;
}
-@@ -505,6 +546,7 @@ static int dm_test_video_bmp_comp(struct unit_test_state *uts)
+@@ -504,6 +545,7 @@ static int dm_test_video_bmp_comp(struct unit_test_state *uts)
ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
ut_asserteq(1368, compress_frame_buffer(uts, dev));
@@ -259,7 +260,7 @@ index d907f681600b..641a6250100a 100644
return 0;
}
-@@ -524,6 +566,7 @@ static int dm_test_video_comp_bmp32(struct unit_test_state *uts)
+@@ -523,6 +565,7 @@ static int dm_test_video_comp_bmp32(struct unit_test_state *uts)
ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
ut_asserteq(2024, compress_frame_buffer(uts, dev));
@@ -267,7 +268,7 @@ index d907f681600b..641a6250100a 100644
return 0;
}
-@@ -543,6 +586,7 @@ static int dm_test_video_comp_bmp8(struct unit_test_state *uts)
+@@ -542,6 +585,7 @@ static int dm_test_video_comp_bmp8(struct unit_test_state *uts)
ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
ut_asserteq(1247, compress_frame_buffer(uts, dev));
@@ -275,7 +276,7 @@ index d907f681600b..641a6250100a 100644
return 0;
}
-@@ -558,6 +602,7 @@ static int dm_test_video_truetype(struct unit_test_state *uts)
+@@ -557,6 +601,7 @@ static int dm_test_video_truetype(struct unit_test_state *uts)
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
vidconsole_put_string(con, test_string);
ut_asserteq(12174, compress_frame_buffer(uts, dev));
@@ -283,7 +284,7 @@ index d907f681600b..641a6250100a 100644
return 0;
}
-@@ -579,6 +624,7 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts)
+@@ -578,6 +623,7 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts)
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
vidconsole_put_string(con, test_string);
ut_asserteq(34287, compress_frame_buffer(uts, dev));
@@ -291,7 +292,7 @@ index d907f681600b..641a6250100a 100644
return 0;
}
-@@ -600,6 +646,7 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts)
+@@ -599,6 +645,7 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts)
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
vidconsole_put_string(con, test_string);
ut_asserteq(29471, compress_frame_buffer(uts, dev));
@@ -299,11 +300,13 @@ index d907f681600b..641a6250100a 100644
return 0;
}
+
+base-commit: 475aa8345a78396d39b42f96eccecd37ebe24e99
--
-2.42.0
+2.45.2
-From e441c509aa784328c735c52e0a27a39601049de7 Mon Sep 17 00:00:00 2001
+From 19c878635c1271c79a017ea3a860b9a2f1a3fed9 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Sun, 20 Aug 2023 17:46:46 +0300
Subject: [PATCH 02/13] video: test: Support checking copy frame buffer
@@ -320,16 +323,17 @@ Add a boolean argument to the existing helper function to indicate which
frame buffer we want to inspect, and update the existing callers.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-3-alpernebiyasak@gmail.com/
---
test/dm/video.c | 76 ++++++++++++++++++++++++++-----------------------
1 file changed, 41 insertions(+), 35 deletions(-)
diff --git a/test/dm/video.c b/test/dm/video.c
-index 641a6250100a..b9ff3da10c18 100644
+index 14e6af5181f1..50374cafc009 100644
--- a/test/dm/video.c
+++ b/test/dm/video.c
-@@ -57,22 +57,28 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+@@ -56,22 +56,28 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
*
* @uts: Test state
* @dev: Video device
@@ -360,7 +364,7 @@ index 641a6250100a..b9ff3da10c18 100644
3, 0, 0);
free(dest);
if (ret)
-@@ -168,30 +174,30 @@ static int dm_test_video_text(struct unit_test_state *uts)
+@@ -167,30 +173,30 @@ static int dm_test_video_text(struct unit_test_state *uts)
ut_assertok(video_get_nologo(uts, &dev));
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
ut_assertok(vidconsole_select_font(con, "8x16", 0));
@@ -397,7 +401,7 @@ index 641a6250100a..b9ff3da10c18 100644
ut_assertok(check_copy_frame_buffer(uts, dev));
return 0;
-@@ -210,30 +216,30 @@ static int dm_test_video_text_12x22(struct unit_test_state *uts)
+@@ -209,30 +215,30 @@ static int dm_test_video_text_12x22(struct unit_test_state *uts)
ut_assertok(video_get_nologo(uts, &dev));
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
ut_assertok(vidconsole_select_font(con, "12x22", 0));
@@ -434,7 +438,7 @@ index 641a6250100a..b9ff3da10c18 100644
ut_assertok(check_copy_frame_buffer(uts, dev));
return 0;
-@@ -251,7 +257,7 @@ static int dm_test_video_chars(struct unit_test_state *uts)
+@@ -250,7 +256,7 @@ static int dm_test_video_chars(struct unit_test_state *uts)
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
ut_assertok(vidconsole_select_font(con, "8x16", 0));
vidconsole_put_string(con, test_string);
@@ -443,7 +447,7 @@ index 641a6250100a..b9ff3da10c18 100644
ut_assertok(check_copy_frame_buffer(uts, dev));
return 0;
-@@ -273,23 +279,23 @@ static int dm_test_video_ansi(struct unit_test_state *uts)
+@@ -272,23 +278,23 @@ static int dm_test_video_ansi(struct unit_test_state *uts)
/* reference clear: */
video_clear(con->parent);
video_sync(con->parent, false);
@@ -471,7 +475,7 @@ index 641a6250100a..b9ff3da10c18 100644
ut_assertok(check_copy_frame_buffer(uts, dev));
return 0;
-@@ -322,13 +328,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot,
+@@ -321,13 +327,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot,
ut_assertok(video_get_nologo(uts, &dev));
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
ut_assertok(vidconsole_select_font(con, "8x16", 0));
@@ -487,7 +491,7 @@ index 641a6250100a..b9ff3da10c18 100644
ut_assertok(check_copy_frame_buffer(uts, dev));
/* Check display scrolling */
-@@ -336,13 +342,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot,
+@@ -335,13 +341,13 @@ static int check_vidconsole_output(struct unit_test_state *uts, int rot,
vidconsole_put_char(con, 'A' + i % 50);
vidconsole_put_char(con, '\n');
}
@@ -503,7 +507,7 @@ index 641a6250100a..b9ff3da10c18 100644
ut_assertok(check_copy_frame_buffer(uts, dev));
return 0;
-@@ -417,7 +423,7 @@ static int dm_test_video_bmp(struct unit_test_state *uts)
+@@ -416,7 +422,7 @@ static int dm_test_video_bmp(struct unit_test_state *uts)
ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr));
ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
@@ -512,7 +516,7 @@ index 641a6250100a..b9ff3da10c18 100644
ut_assertok(check_copy_frame_buffer(uts, dev));
return 0;
-@@ -437,7 +443,7 @@ static int dm_test_video_bmp8(struct unit_test_state *uts)
+@@ -436,7 +442,7 @@ static int dm_test_video_bmp8(struct unit_test_state *uts)
ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr));
ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
@@ -521,7 +525,7 @@ index 641a6250100a..b9ff3da10c18 100644
ut_assertok(check_copy_frame_buffer(uts, dev));
return 0;
-@@ -461,7 +467,7 @@ static int dm_test_video_bmp16(struct unit_test_state *uts)
+@@ -460,7 +466,7 @@ static int dm_test_video_bmp16(struct unit_test_state *uts)
&src_len));
ut_assertok(video_bmp_display(dev, dst, 0, 0, false));
@@ -530,7 +534,7 @@ index 641a6250100a..b9ff3da10c18 100644
ut_assertok(check_copy_frame_buffer(uts, dev));
return 0;
-@@ -485,7 +491,7 @@ static int dm_test_video_bmp24(struct unit_test_state *uts)
+@@ -484,7 +490,7 @@ static int dm_test_video_bmp24(struct unit_test_state *uts)
&src_len));
ut_assertok(video_bmp_display(dev, dst, 0, 0, false));
@@ -539,7 +543,7 @@ index 641a6250100a..b9ff3da10c18 100644
ut_assertok(check_copy_frame_buffer(uts, dev));
return 0;
-@@ -509,7 +515,7 @@ static int dm_test_video_bmp24_32(struct unit_test_state *uts)
+@@ -508,7 +514,7 @@ static int dm_test_video_bmp24_32(struct unit_test_state *uts)
&src_len));
ut_assertok(video_bmp_display(dev, dst, 0, 0, false));
@@ -548,7 +552,7 @@ index 641a6250100a..b9ff3da10c18 100644
ut_assertok(check_copy_frame_buffer(uts, dev));
return 0;
-@@ -528,7 +534,7 @@ static int dm_test_video_bmp32(struct unit_test_state *uts)
+@@ -527,7 +533,7 @@ static int dm_test_video_bmp32(struct unit_test_state *uts)
ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr));
ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
@@ -557,7 +561,7 @@ index 641a6250100a..b9ff3da10c18 100644
ut_assertok(check_copy_frame_buffer(uts, dev));
return 0;
-@@ -545,7 +551,7 @@ static int dm_test_video_bmp_comp(struct unit_test_state *uts)
+@@ -544,7 +550,7 @@ static int dm_test_video_bmp_comp(struct unit_test_state *uts)
ut_assertok(read_file(uts, "tools/logos/denx-comp.bmp", &addr));
ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
@@ -566,7 +570,7 @@ index 641a6250100a..b9ff3da10c18 100644
ut_assertok(check_copy_frame_buffer(uts, dev));
return 0;
-@@ -565,7 +571,7 @@ static int dm_test_video_comp_bmp32(struct unit_test_state *uts)
+@@ -564,7 +570,7 @@ static int dm_test_video_comp_bmp32(struct unit_test_state *uts)
ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr));
ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
@@ -575,7 +579,7 @@ index 641a6250100a..b9ff3da10c18 100644
ut_assertok(check_copy_frame_buffer(uts, dev));
return 0;
-@@ -585,7 +591,7 @@ static int dm_test_video_comp_bmp8(struct unit_test_state *uts)
+@@ -584,7 +590,7 @@ static int dm_test_video_comp_bmp8(struct unit_test_state *uts)
ut_assertok(read_file(uts, "tools/logos/denx.bmp", &addr));
ut_assertok(video_bmp_display(dev, addr, 0, 0, false));
@@ -584,7 +588,7 @@ index 641a6250100a..b9ff3da10c18 100644
ut_assertok(check_copy_frame_buffer(uts, dev));
return 0;
-@@ -601,7 +607,7 @@ static int dm_test_video_truetype(struct unit_test_state *uts)
+@@ -600,7 +606,7 @@ static int dm_test_video_truetype(struct unit_test_state *uts)
ut_assertok(video_get_nologo(uts, &dev));
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
vidconsole_put_string(con, test_string);
@@ -593,7 +597,7 @@ index 641a6250100a..b9ff3da10c18 100644
ut_assertok(check_copy_frame_buffer(uts, dev));
return 0;
-@@ -623,7 +629,7 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts)
+@@ -622,7 +628,7 @@ static int dm_test_video_truetype_scroll(struct unit_test_state *uts)
ut_assertok(video_get_nologo(uts, &dev));
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
vidconsole_put_string(con, test_string);
@@ -602,7 +606,7 @@ index 641a6250100a..b9ff3da10c18 100644
ut_assertok(check_copy_frame_buffer(uts, dev));
return 0;
-@@ -645,7 +651,7 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts)
+@@ -644,7 +650,7 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts)
ut_assertok(video_get_nologo(uts, &dev));
ut_assertok(uclass_get_device(UCLASS_VIDEO_CONSOLE, 0, &con));
vidconsole_put_string(con, test_string);
@@ -612,10 +616,10 @@ index 641a6250100a..b9ff3da10c18 100644
return 0;
--
-2.42.0
+2.45.2
-From 2b431f45d217e3ab454fc719157cb8b78657a129 Mon Sep 17 00:00:00 2001
+From 173f97f38d1c6621acd9f24f8956c3a7d808cdd7 Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Fri, 18 Aug 2023 17:31:27 +0300
Subject: [PATCH 03/13] video: test: Test partial updates of hardware frame
@@ -628,16 +632,17 @@ then checking if the overwritten contents have been redrawn on the next
sync.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-4-alpernebiyasak@gmail.com/
---
test/dm/video.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/test/dm/video.c b/test/dm/video.c
-index b9ff3da10c18..e4bd27a6b76f 100644
+index 50374cafc009..4798f2205a99 100644
--- a/test/dm/video.c
+++ b/test/dm/video.c
-@@ -657,3 +657,57 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts)
+@@ -656,3 +656,57 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts)
return 0;
}
DM_TEST(dm_test_video_truetype_bs, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
@@ -696,10 +701,10 @@ index b9ff3da10c18..e4bd27a6b76f 100644
+}
+DM_TEST(dm_test_video_copy, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
--
-2.42.0
+2.45.2
-From 5aea7d8d14de93dcd33acc2bc19d9de942b6d8cd Mon Sep 17 00:00:00 2001
+From 11066af4f8d7a9c6b4729ce2647eb6251397423d Mon Sep 17 00:00:00 2001
From: Alexander Graf <agraf@csgraf.de>
Date: Fri, 10 Jun 2022 00:59:15 +0200
Subject: [PATCH 04/13] dm: video: Add damage tracking API
@@ -717,14 +722,15 @@ Reported-by: Da Xue <da@libre.computer>
Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-5-alpernebiyasak@gmail.com/
+Reviewed-by: Simon Glass <sjg@chromium.org>
---
drivers/video/Kconfig | 13 ++++++++++++
- drivers/video/video-uclass.c | 41 +++++++++++++++++++++++++++++++++---
- include/video.h | 32 ++++++++++++++++++++++++++--
- 3 files changed, 81 insertions(+), 5 deletions(-)
+ drivers/video/video-uclass.c | 40 +++++++++++++++++++++++++++++++++---
+ include/video.h | 40 ++++++++++++++++++++++++++++++++++--
+ 3 files changed, 88 insertions(+), 5 deletions(-)
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
-index 69f4809cf4a6..db531d7caae0 100644
+index 7808ae7919e0..7815b590481e 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -92,6 +92,19 @@ config VIDEO_COPY
@@ -748,23 +754,21 @@ index 69f4809cf4a6..db531d7caae0 100644
bool "Generic PWM based Backlight Driver"
depends on BACKLIGHT && DM_PWM
diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index f743ed74c818..9888a580bfd3 100644
+index ff1382f4a43b..75ab5f5ba9d7 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
-@@ -351,9 +351,39 @@ void video_set_default_colors(struct udevice *dev, bool invert)
+@@ -346,9 +346,38 @@ void video_set_default_colors(struct udevice *dev, bool invert)
priv->colour_bg = video_index_to_colour(priv, back);
}
+/* Notify about changes in the frame buffer */
++#ifdef CONFIG_VIDEO_DAMAGE
+void video_damage(struct udevice *vid, int x, int y, int width, int height)
+{
+ struct video_priv *priv = dev_get_uclass_priv(vid);
+ int xend = x + width;
+ int yend = y + height;
+
-+ if (!IS_ENABLED(CONFIG_VIDEO_DAMAGE))
-+ return;
-+
+ if (x > priv->xsize)
+ return;
+
@@ -783,6 +787,7 @@ index f743ed74c818..9888a580bfd3 100644
+ priv->damage.xend = max(xend, priv->damage.xend);
+ priv->damage.yend = max(yend, priv->damage.yend);
+}
++#endif
+
/* Flush video activity to the caches */
int video_sync(struct udevice *vid, bool force)
@@ -791,7 +796,7 @@ index f743ed74c818..9888a580bfd3 100644
struct video_ops *ops = video_get_ops(vid);
int ret;
-@@ -369,15 +399,12 @@ int video_sync(struct udevice *vid, bool force)
+@@ -364,15 +393,12 @@ int video_sync(struct udevice *vid, bool force)
* out whether it exists? For now, ARM is safe.
*/
#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
@@ -807,7 +812,7 @@ index f743ed74c818..9888a580bfd3 100644
static ulong last_sync;
if (force || get_timer(last_sync) > 100) {
-@@ -385,6 +412,14 @@ int video_sync(struct udevice *vid, bool force)
+@@ -380,6 +406,14 @@ int video_sync(struct udevice *vid, bool force)
last_sync = get_timer(0);
}
#endif
@@ -823,10 +828,10 @@ index f743ed74c818..9888a580bfd3 100644
}
diff --git a/include/video.h b/include/video.h
-index 16f7a83f8d50..307e954db828 100644
+index 4d8df9baaada..d2dabb66e9e6 100644
--- a/include/video.h
+++ b/include/video.h
-@@ -85,6 +85,11 @@ enum video_format {
+@@ -88,6 +88,11 @@ enum video_format {
* @fb_size: Frame buffer size
* @copy_fb: Copy of the frame buffer to keep up to date; see struct
* video_uc_plat
@@ -838,7 +843,7 @@ index 16f7a83f8d50..307e954db828 100644
* @line_length: Length of each frame buffer line, in bytes. This can be
* set by the driver, but if not, the uclass will set it after
* probing
-@@ -112,6 +117,12 @@ struct video_priv {
+@@ -115,6 +120,12 @@ struct video_priv {
void *fb;
int fb_size;
void *copy_fb;
@@ -851,7 +856,7 @@ index 16f7a83f8d50..307e954db828 100644
int line_length;
u32 colour_fg;
u32 colour_bg;
-@@ -254,8 +265,9 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
+@@ -257,8 +268,9 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
* @return: 0 on success, error code otherwise
*
* Some frame buffers are cached or have a secondary frame buffer. This
@@ -863,10 +868,11 @@ index 16f7a83f8d50..307e954db828 100644
*/
int video_sync(struct udevice *vid, bool force);
-@@ -375,6 +387,22 @@ static inline int video_sync_copy_all(struct udevice *dev)
+@@ -378,6 +390,30 @@ static inline int video_sync_copy_all(struct udevice *dev)
#endif
++#ifdef CONFIG_VIDEO_DAMAGE
+/**
+ * video_damage() - Notify the video subsystem about screen updates.
+ *
@@ -882,15 +888,22 @@ index 16f7a83f8d50..307e954db828 100644
+ * next call to video_sync().
+ */
+void video_damage(struct udevice *vid, int x, int y, int width, int height);
++#else
++static inline void video_damage(struct udevice *vid, int x, int y, int width,
++ int height)
++{
++ return;
++}
++#endif /* CONFIG_VIDEO_DAMAGE */
+
/**
* video_is_active() - Test if one video device it active
*
--
-2.42.0
+2.45.2
-From 9d61d286be0e696a719af0c25a60d31482ee152c Mon Sep 17 00:00:00 2001
+From 5613cd630801ccb329895f62c27b8690a2cbf74c Mon Sep 17 00:00:00 2001
From: Alexander Graf <agraf@csgraf.de>
Date: Fri, 10 Jun 2022 00:59:16 +0200
Subject: [PATCH 05/13] dm: video: Add damage notification on display fills
@@ -902,16 +915,17 @@ Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reported-by: Da Xue <da@libre.computer>
[Alper: Move from video_clear() to video_fill(), video_fill_part()]
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-6-alpernebiyasak@gmail.com/
---
drivers/video/video-uclass.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index 9888a580bfd3..09172f1f7f45 100644
+index 75ab5f5ba9d7..ca348101817a 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
-@@ -203,6 +203,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
+@@ -195,6 +195,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
if (ret)
return ret;
@@ -920,7 +934,7 @@ index 9888a580bfd3..09172f1f7f45 100644
return 0;
}
-@@ -249,6 +251,8 @@ int video_fill(struct udevice *dev, u32 colour)
+@@ -244,6 +246,8 @@ int video_fill(struct udevice *dev, u32 colour)
if (ret)
return ret;
@@ -930,10 +944,10 @@ index 9888a580bfd3..09172f1f7f45 100644
}
--
-2.42.0
+2.45.2
-From 599159f0d1678a473211a2beda302d12ac64bf5c Mon Sep 17 00:00:00 2001
+From 4e29f9d2190f2ea390d5321192f5e71193d62f71 Mon Sep 17 00:00:00 2001
From: Alexander Graf <agraf@csgraf.de>
Date: Fri, 10 Jun 2022 00:59:17 +0200
Subject: [PATCH 06/13] vidconsole: Add damage notifications to all vidconsole
@@ -954,11 +968,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-7-alpernebiyasak@gma
drivers/video/console_normal.c | 18 +++++++++++
drivers/video/console_rotate.c | 54 ++++++++++++++++++++++++++++++++
drivers/video/console_truetype.c | 21 +++++++++++++
- drivers/video/video-uclass.c | 1 +
- 4 files changed, 94 insertions(+)
+ 3 files changed, 93 insertions(+)
diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c
-index 413c7abee9e1..a19ce6a2bc11 100644
+index 6f4194a18147..51ac8cc78e9d 100644
--- a/drivers/video/console_normal.c
+++ b/drivers/video/console_normal.c
@@ -39,6 +39,12 @@ static int console_set_row(struct udevice *dev, uint row, int clr)
@@ -987,7 +1000,7 @@ index 413c7abee9e1..a19ce6a2bc11 100644
return 0;
}
-@@ -90,6 +102,12 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, char ch)
+@@ -91,6 +103,12 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, int cp)
if (ret)
return ret;
@@ -1001,7 +1014,7 @@ index 413c7abee9e1..a19ce6a2bc11 100644
if (ret)
return ret;
diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c
-index 65358a1c6e74..6c3e7c1bb8dc 100644
+index dc9698362741..5c4a98f6cad0 100644
--- a/drivers/video/console_rotate.c
+++ b/drivers/video/console_rotate.c
@@ -36,6 +36,12 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr)
@@ -1030,7 +1043,7 @@ index 65358a1c6e74..6c3e7c1bb8dc 100644
return 0;
}
-@@ -96,6 +108,12 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, char ch)
+@@ -97,6 +109,12 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, int cp)
if (ret)
return ret;
@@ -1043,7 +1056,7 @@ index 65358a1c6e74..6c3e7c1bb8dc 100644
return VID_TO_POS(fontdata->width);
}
-@@ -121,6 +139,12 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
+@@ -122,6 +140,12 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
if (ret)
return ret;
@@ -1056,7 +1069,7 @@ index 65358a1c6e74..6c3e7c1bb8dc 100644
return 0;
}
-@@ -142,6 +166,12 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc,
+@@ -143,6 +167,12 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc,
vidconsole_memmove(dev, dst, src,
fontdata->height * vid_priv->line_length * count);
@@ -1069,7 +1082,7 @@ index 65358a1c6e74..6c3e7c1bb8dc 100644
return 0;
}
-@@ -174,6 +204,12 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, char ch)
+@@ -176,6 +206,12 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp)
if (ret)
return ret;
@@ -1082,7 +1095,7 @@ index 65358a1c6e74..6c3e7c1bb8dc 100644
return VID_TO_POS(fontdata->width);
}
-@@ -198,6 +234,12 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
+@@ -200,6 +236,12 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
if (ret)
return ret;
@@ -1095,7 +1108,7 @@ index 65358a1c6e74..6c3e7c1bb8dc 100644
return 0;
}
-@@ -224,6 +266,12 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc,
+@@ -226,6 +268,12 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc,
dst += vid_priv->line_length;
}
@@ -1108,7 +1121,7 @@ index 65358a1c6e74..6c3e7c1bb8dc 100644
return 0;
}
-@@ -255,6 +303,12 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, char ch)
+@@ -258,6 +306,12 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp)
if (ret)
return ret;
@@ -1122,10 +1135,10 @@ index 65358a1c6e74..6c3e7c1bb8dc 100644
}
diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c
-index 0f9bb49e44f7..0adbf9cc3d67 100644
+index c435162d3f94..6a17f732fc26 100644
--- a/drivers/video/console_truetype.c
+++ b/drivers/video/console_truetype.c
-@@ -178,6 +178,7 @@ struct console_tt_priv {
+@@ -190,6 +190,7 @@ struct console_tt_store {
static int console_truetype_set_row(struct udevice *dev, uint row, int clr)
{
struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent);
@@ -1133,7 +1146,7 @@ index 0f9bb49e44f7..0adbf9cc3d67 100644
struct console_tt_priv *priv = dev_get_priv(dev);
struct console_tt_metrics *met = priv->cur_met;
void *end, *line;
-@@ -221,6 +222,12 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr)
+@@ -233,6 +234,12 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr)
if (ret)
return ret;
@@ -1146,7 +1159,7 @@ index 0f9bb49e44f7..0adbf9cc3d67 100644
return 0;
}
-@@ -228,6 +235,7 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst,
+@@ -240,6 +247,7 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst,
uint rowsrc, uint count)
{
struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent);
@@ -1154,7 +1167,7 @@ index 0f9bb49e44f7..0adbf9cc3d67 100644
struct console_tt_priv *priv = dev_get_priv(dev);
struct console_tt_metrics *met = priv->cur_met;
void *dst;
-@@ -246,6 +254,12 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst,
+@@ -258,6 +266,12 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst,
for (i = 0; i < priv->pos_ptr; i++)
priv->pos[i].ypos -= diff;
@@ -1167,7 +1180,7 @@ index 0f9bb49e44f7..0adbf9cc3d67 100644
return 0;
}
-@@ -403,6 +417,13 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y,
+@@ -418,6 +432,13 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y,
line += vid_priv->line_length;
}
@@ -1181,23 +1194,11 @@ index 0f9bb49e44f7..0adbf9cc3d67 100644
ret = vidconsole_sync_copy(dev, start, line);
if (ret)
return ret;
-diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index 09172f1f7f45..06e344f415ce 100644
---- a/drivers/video/video-uclass.c
-+++ b/drivers/video/video-uclass.c
-@@ -199,6 +199,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
- }
- line += priv->line_length;
- }
-+
- ret = video_sync_copy(dev, start, line);
- if (ret)
- return ret;
--
-2.42.0
+2.45.2
-From 4946d75efb4a6b4ff1c2ec306cb7509e98c24c17 Mon Sep 17 00:00:00 2001
+From 11fa5d7c68878f629c8fff7dc28a76acaf1252ab Mon Sep 17 00:00:00 2001
From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Date: Fri, 18 Aug 2023 17:55:08 +0300
Subject: [PATCH 07/13] video: test: Test video damage tracking via vidconsole
@@ -1208,6 +1209,7 @@ the config in sandbox and add a test for it, by printing strings at a
few locations and checking the tracked region.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-8-alpernebiyasak@gmail.com/
---
configs/sandbox_defconfig | 1 +
@@ -1215,10 +1217,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-8-alpernebiyasak@gma
2 files changed, 57 insertions(+)
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
-index 62bc182ca161..d26659ff0a0b 100644
+index da8c1976d7bd..6bc20ec34169 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
-@@ -307,6 +307,7 @@ CONFIG_USB_ETH_CDC=y
+@@ -319,6 +319,7 @@ CONFIG_USB_ETH_CDC=y
CONFIG_VIDEO=y
CONFIG_VIDEO_FONT_SUN12X22=y
CONFIG_VIDEO_COPY=y
@@ -1227,10 +1229,10 @@ index 62bc182ca161..d26659ff0a0b 100644
CONFIG_CONSOLE_TRUETYPE=y
CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
diff --git a/test/dm/video.c b/test/dm/video.c
-index e4bd27a6b76f..8c7d9800a42e 100644
+index 4798f2205a99..119c43153165 100644
--- a/test/dm/video.c
+++ b/test/dm/video.c
-@@ -711,3 +711,59 @@ static int dm_test_video_copy(struct unit_test_state *uts)
+@@ -710,3 +710,59 @@ static int dm_test_video_copy(struct unit_test_state *uts)
return 0;
}
DM_TEST(dm_test_video_copy, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
@@ -1291,10 +1293,10 @@ index e4bd27a6b76f..8c7d9800a42e 100644
+}
+DM_TEST(dm_test_video_damage, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
--
-2.42.0
+2.45.2
-From a8073a8ba8a35600302ad6430977c766869f1605 Mon Sep 17 00:00:00 2001
+From 80a32fe8f34466e6b86553018f47192a1fef3c6a Mon Sep 17 00:00:00 2001
From: Alexander Graf <agraf@csgraf.de>
Date: Fri, 10 Jun 2022 00:59:18 +0200
Subject: [PATCH 08/13] video: Add damage notification on bmp display
@@ -1311,10 +1313,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-9-alpernebiyasak@gma
1 file changed, 2 insertions(+)
diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c
-index 45f003c8251a..10943b9ca19f 100644
+index ad512d99a1b9..78de95607924 100644
--- a/drivers/video/video_bmp.c
+++ b/drivers/video/video_bmp.c
-@@ -460,6 +460,8 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y,
+@@ -459,6 +459,8 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y,
break;
};
@@ -1324,10 +1326,10 @@ index 45f003c8251a..10943b9ca19f 100644
fb = (uchar *)(priv->fb + y * priv->line_length + x * bpix / 8);
ret = video_sync_copy(dev, start, fb);
--
-2.42.0
+2.45.2
-From 210faf6dd92d4d7647cec88aa5affddf74c35fcb Mon Sep 17 00:00:00 2001
+From 7afe761e51bfb0f24fd4547e8bec1826aaf2e6a0 Mon Sep 17 00:00:00 2001
From: Alexander Graf <agraf@csgraf.de>
Date: Fri, 10 Jun 2022 00:59:19 +0200
Subject: [PATCH 09/13] efi_loader: GOP: Add damage notification on BLT
@@ -1340,13 +1342,14 @@ Reported-by: Da Xue <da@libre.computer>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[Alper: Add struct comment for new member]
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-10-alpernebiyasak@gmail.com/
---
lib/efi_loader/efi_gop.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c
-index 778b693f983a..db6535e080c4 100644
+index 41e12fa72460..1694e23dcc62 100644
--- a/lib/efi_loader/efi_gop.c
+++ b/lib/efi_loader/efi_gop.c
@@ -24,6 +24,7 @@ static const efi_guid_t efi_gop_guid = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID;
@@ -1383,19 +1386,19 @@ index 778b693f983a..db6535e080c4 100644
return EFI_SUCCESS;
}
-@@ -548,6 +554,7 @@ efi_status_t efi_gop_register(void)
+@@ -549,6 +555,7 @@ efi_status_t efi_gop_register(void)
gopobj->info.pixels_per_scanline = col;
gopobj->bpix = bpix;
- gopobj->fb = fb;
+ gopobj->fb = map_sysmem(fb_base, fb_size);
+ gopobj->vdev = vdev;
return EFI_SUCCESS;
}
--
-2.42.0
+2.45.2
-From 95c2109f13e9457961745193cae222523366d810 Mon Sep 17 00:00:00 2001
+From 134415d6cbe38f7ab630f978a602b6e15929feea Mon Sep 17 00:00:00 2001
From: Alexander Graf <agraf@csgraf.de>
Date: Fri, 10 Jun 2022 00:59:20 +0200
Subject: [PATCH 10/13] video: Only dcache flush damaged lines
@@ -1412,29 +1415,29 @@ Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-11-alpernebiyasak@gmail.com/
---
- drivers/video/video-uclass.c | 41 +++++++++++++++++++++++++++++++-----
- 1 file changed, 36 insertions(+), 5 deletions(-)
+ drivers/video/video-uclass.c | 43 +++++++++++++++++++++++++++++++-----
+ 1 file changed, 38 insertions(+), 5 deletions(-)
diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index 06e344f415ce..ac2141892bf7 100644
+index ca348101817a..add7a85b20fe 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
-@@ -385,6 +385,41 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height)
- priv->damage.yend = max(yend, priv->damage.yend);
+@@ -378,6 +378,40 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height)
}
+ #endif
+#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
-+static void video_flush_dcache(struct udevice *vid)
++static void video_flush_dcache(struct udevice *vid, bool use_copy)
+{
+ struct video_priv *priv = dev_get_uclass_priv(vid);
++ ulong fb = use_copy ? (ulong)priv->copy_fb : (ulong)priv->fb;
+
+ if (!priv->flush_dcache)
+ return;
+
+ if (!IS_ENABLED(CONFIG_VIDEO_DAMAGE)) {
-+ flush_dcache_range((ulong)priv->fb,
-+ ALIGN((ulong)priv->fb + priv->fb_size,
-+ CONFIG_SYS_CACHELINE_SIZE));
++ flush_dcache_range(fb, ALIGN(fb + priv->fb_size,
++ CONFIG_SYS_CACHELINE_SIZE));
+
+ return;
+ }
@@ -1445,7 +1448,6 @@ index 06e344f415ce..ac2141892bf7 100644
+ int y;
+
+ for (y = priv->damage.ystart; y < priv->damage.yend; y++) {
-+ ulong fb = (ulong)priv->fb;
+ ulong start = fb + (y * priv->line_length) + lstart;
+ ulong end = start + lend - lstart;
+
@@ -1461,7 +1463,7 @@ index 06e344f415ce..ac2141892bf7 100644
/* Flush video activity to the caches */
int video_sync(struct udevice *vid, bool force)
{
-@@ -404,11 +439,7 @@ int video_sync(struct udevice *vid, bool force)
+@@ -397,11 +431,10 @@ int video_sync(struct udevice *vid, bool force)
* out whether it exists? For now, ARM is safe.
*/
#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
@@ -1470,15 +1472,18 @@ index 06e344f415ce..ac2141892bf7 100644
- ALIGN((ulong)priv->fb + priv->fb_size,
- CONFIG_SYS_CACHELINE_SIZE));
- }
-+ video_flush_dcache(vid);
++ video_flush_dcache(vid, false);
++
++ if (IS_ENABLED(CONFIG_VIDEO_COPY))
++ video_flush_dcache(vid, true);
#elif defined(CONFIG_VIDEO_SANDBOX_SDL)
static ulong last_sync;
--
-2.42.0
+2.45.2
-From d4c117c2455f2df8fa224ec603f2749219c72243 Mon Sep 17 00:00:00 2001
+From d3f1653a87d51c5ecf187b19ecb60a2f740fb8e2 Mon Sep 17 00:00:00 2001
From: Alexander Graf <agraf@csgraf.de>
Date: Fri, 10 Jun 2022 00:59:21 +0200
Subject: [PATCH 11/13] video: Use VIDEO_DAMAGE for VIDEO_COPY
@@ -1511,20 +1516,20 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-12-alpernebiyasak@gm
drivers/video/Kconfig | 5 ++
drivers/video/console_normal.c | 13 +----
drivers/video/console_rotate.c | 44 +++-----------
- drivers/video/console_truetype.c | 16 +----
- drivers/video/vidconsole-uclass.c | 16 -----
- drivers/video/video-uclass.c | 97 ++++++++-----------------------
+ drivers/video/console_truetype.c | 16 +-----
+ drivers/video/vidconsole-uclass.c | 16 ------
+ drivers/video/video-uclass.c | 96 ++++++++-----------------------
drivers/video/video_bmp.c | 7 ---
include/video.h | 37 ------------
include/video_console.h | 52 -----------------
test/dm/video.c | 3 +-
- 11 files changed, 43 insertions(+), 248 deletions(-)
+ 11 files changed, 43 insertions(+), 247 deletions(-)
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
-index d26659ff0a0b..62bc182ca161 100644
+index 6bc20ec34169..da8c1976d7bd 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
-@@ -307,7 +307,6 @@ CONFIG_USB_ETH_CDC=y
+@@ -319,7 +319,6 @@ CONFIG_USB_ETH_CDC=y
CONFIG_VIDEO=y
CONFIG_VIDEO_FONT_SUN12X22=y
CONFIG_VIDEO_COPY=y
@@ -1533,7 +1538,7 @@ index d26659ff0a0b..62bc182ca161 100644
CONFIG_CONSOLE_TRUETYPE=y
CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
-index db531d7caae0..5f17c6be84ed 100644
+index 7815b590481e..88c6f8e68976 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -83,11 +83,14 @@ config VIDEO_PCI_DEFAULT_FB_SIZE
@@ -1561,7 +1566,7 @@ index db531d7caae0..5f17c6be84ed 100644
bool "Generic PWM based Backlight Driver"
depends on BACKLIGHT && DM_PWM
diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c
-index a19ce6a2bc11..c44aa09473a3 100644
+index 51ac8cc78e9d..07db613ac53c 100644
--- a/drivers/video/console_normal.c
+++ b/drivers/video/console_normal.c
@@ -35,10 +35,6 @@ static int console_set_row(struct udevice *dev, uint row, int clr)
@@ -1591,7 +1596,7 @@ index a19ce6a2bc11..c44aa09473a3 100644
video_damage(dev->parent,
0,
-@@ -108,10 +101,6 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, char ch)
+@@ -109,10 +102,6 @@ static int console_putc_xy(struct udevice *dev, uint x_frac, uint y, int cp)
fontdata->width,
fontdata->height);
@@ -1603,7 +1608,7 @@ index a19ce6a2bc11..c44aa09473a3 100644
}
diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c
-index 6c3e7c1bb8dc..6e9067d1c7fb 100644
+index 5c4a98f6cad0..9f8e1b92770c 100644
--- a/drivers/video/console_rotate.c
+++ b/drivers/video/console_rotate.c
@@ -21,7 +21,6 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr)
@@ -1645,7 +1650,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
src += vid_priv->line_length;
dst += vid_priv->line_length;
}
-@@ -104,10 +97,6 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, char ch)
+@@ -105,10 +98,6 @@ static int console_putc_xy_1(struct udevice *dev, uint x_frac, uint y, int cp)
return ret;
/* We draw backwards from 'start, so account for the first line */
@@ -1656,7 +1661,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
video_damage(dev->parent,
vid_priv->xsize - y - fontdata->height,
linenum - 1,
-@@ -125,7 +114,7 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
+@@ -126,7 +115,7 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
struct video_fontdata *fontdata = priv->fontdata;
void *start, *line, *dst, *end;
int pixels = fontdata->height * vid_priv->xsize;
@@ -1665,7 +1670,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
int pbytes = VNBYTES(vid_priv->bpix);
start = vid_priv->fb + vid_priv->ysize * vid_priv->line_length -
-@@ -135,9 +124,6 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
+@@ -136,9 +125,6 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr)
for (i = 0; i < pixels; i++)
fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes);
end = dst;
@@ -1675,7 +1680,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
video_damage(dev->parent,
0,
-@@ -163,8 +149,7 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc,
+@@ -164,8 +150,7 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc,
vid_priv->line_length;
src = end - (rowsrc + count) * fontdata->height *
vid_priv->line_length;
@@ -1685,7 +1690,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
video_damage(dev->parent,
0,
-@@ -199,11 +184,6 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, char ch)
+@@ -201,11 +186,6 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp)
if (ret)
return ret;
@@ -1697,7 +1702,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
video_damage(dev->parent,
x - fontdata->width + 1,
linenum - fontdata->height + 1,
-@@ -220,7 +200,7 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
+@@ -222,7 +202,7 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
struct video_fontdata *fontdata = priv->fontdata;
int pbytes = VNBYTES(vid_priv->bpix);
void *start, *dst, *line;
@@ -1706,7 +1711,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
start = vid_priv->fb + row * fontdata->height * pbytes;
line = start;
-@@ -230,9 +210,6 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
+@@ -232,9 +212,6 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr)
fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes);
line += vid_priv->line_length;
}
@@ -1716,7 +1721,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
video_damage(dev->parent,
row * fontdata->height,
-@@ -252,16 +229,13 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc,
+@@ -254,16 +231,13 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc,
int pbytes = VNBYTES(vid_priv->bpix);
void *dst;
void *src;
@@ -1735,7 +1740,7 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
src += vid_priv->line_length;
dst += vid_priv->line_length;
}
-@@ -296,10 +270,6 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, char ch)
+@@ -299,10 +273,6 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp)
line = start;
ret = fill_char_horizontally(pfont, &line, vid_priv, fontdata, NORMAL_DIRECTION);
@@ -1747,10 +1752,10 @@ index 6c3e7c1bb8dc..6e9067d1c7fb 100644
return ret;
diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c
-index 0adbf9cc3d67..07bb0af71311 100644
+index 6a17f732fc26..58dcd8e050c3 100644
--- a/drivers/video/console_truetype.c
+++ b/drivers/video/console_truetype.c
-@@ -182,7 +182,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr)
+@@ -194,7 +194,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr)
struct console_tt_priv *priv = dev_get_priv(dev);
struct console_tt_metrics *met = priv->cur_met;
void *end, *line;
@@ -1758,7 +1763,7 @@ index 0adbf9cc3d67..07bb0af71311 100644
line = vid_priv->fb + row * met->font_size * vid_priv->line_length;
end = line + met->font_size * vid_priv->line_length;
-@@ -218,9 +217,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr)
+@@ -230,9 +229,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr)
default:
return -ENOSYS;
}
@@ -1768,7 +1773,7 @@ index 0adbf9cc3d67..07bb0af71311 100644
video_damage(dev->parent,
0,
-@@ -240,14 +236,11 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst,
+@@ -252,14 +248,11 @@ static int console_truetype_move_rows(struct udevice *dev, uint rowdst,
struct console_tt_metrics *met = priv->cur_met;
void *dst;
void *src;
@@ -1785,7 +1790,7 @@ index 0adbf9cc3d67..07bb0af71311 100644
/* Scroll up our position history */
diff = (rowsrc - rowdst) * met->font_size;
-@@ -280,7 +273,7 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y,
+@@ -292,7 +285,7 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y,
u8 *bits, *data;
int advance;
void *start, *end, *line;
@@ -1793,8 +1798,8 @@ index 0adbf9cc3d67..07bb0af71311 100644
+ int row;
/* First get some basic metrics about this character */
- stbtt_GetCodepointHMetrics(font, ch, &advance, &lsb);
-@@ -424,9 +417,6 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y,
+ stbtt_GetCodepointHMetrics(font, cp, &advance, &lsb);
+@@ -439,9 +432,6 @@ static int console_truetype_putc_xy(struct udevice *dev, uint x, uint y,
width,
height);
@@ -1805,10 +1810,10 @@ index 0adbf9cc3d67..07bb0af71311 100644
return width_frac;
diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c
-index a4029a58660b..f0db412146a8 100644
+index 80e7adf6a1a4..6dc5162804aa 100644
--- a/drivers/video/vidconsole-uclass.c
+++ b/drivers/video/vidconsole-uclass.c
-@@ -728,22 +728,6 @@ UCLASS_DRIVER(vidconsole) = {
+@@ -759,22 +759,6 @@ UCLASS_DRIVER(vidconsole) = {
.per_device_auto = sizeof(struct vidconsole_priv),
};
@@ -1832,10 +1837,10 @@ index a4029a58660b..f0db412146a8 100644
{
int ret;
diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index ac2141892bf7..afbd4670240b 100644
+index add7a85b20fe..3b9b9fad0975 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
-@@ -160,7 +160,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
+@@ -152,7 +152,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
struct video_priv *priv = dev_get_uclass_priv(dev);
void *start, *line;
int pixels = xend - xstart;
@@ -1844,18 +1849,17 @@ index ac2141892bf7..afbd4670240b 100644
start = priv->fb + ystart * priv->line_length;
start += xstart * VNBYTES(priv->bpix);
-@@ -200,10 +200,6 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
+@@ -191,9 +191,6 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend,
+ }
line += priv->line_length;
}
-
- ret = video_sync_copy(dev, start, line);
- if (ret)
- return ret;
--
+
video_damage(dev, xstart, ystart, xend - xstart, yend - ystart);
- return 0;
-@@ -223,7 +219,6 @@ int video_reserve_from_bloblist(struct video_handoff *ho)
+@@ -217,7 +214,6 @@ int video_reserve_from_bloblist(struct video_handoff *ho)
int video_fill(struct udevice *dev, u32 colour)
{
struct video_priv *priv = dev_get_uclass_priv(dev);
@@ -1863,7 +1867,7 @@ index ac2141892bf7..afbd4670240b 100644
switch (priv->bpix) {
case VIDEO_BPP16:
-@@ -248,9 +243,6 @@ int video_fill(struct udevice *dev, u32 colour)
+@@ -242,9 +238,6 @@ int video_fill(struct udevice *dev, u32 colour)
memset(priv->fb, colour, priv->fb_size);
break;
}
@@ -1873,7 +1877,7 @@ index ac2141892bf7..afbd4670240b 100644
video_damage(dev, 0, 0, priv->xsize, priv->ysize);
-@@ -420,6 +412,27 @@ static void video_flush_dcache(struct udevice *vid)
+@@ -412,6 +405,27 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy)
}
#endif
@@ -1901,7 +1905,7 @@ index ac2141892bf7..afbd4670240b 100644
/* Flush video activity to the caches */
int video_sync(struct udevice *vid, bool force)
{
-@@ -427,6 +440,9 @@ int video_sync(struct udevice *vid, bool force)
+@@ -419,6 +433,9 @@ int video_sync(struct udevice *vid, bool force)
struct video_ops *ops = video_get_ops(vid);
int ret;
@@ -1911,7 +1915,7 @@ index ac2141892bf7..afbd4670240b 100644
if (ops && ops->video_sync) {
ret = ops->video_sync(vid);
if (ret)
-@@ -503,69 +519,6 @@ int video_get_ysize(struct udevice *dev)
+@@ -502,69 +519,6 @@ int video_get_ysize(struct udevice *dev)
return priv->ysize;
}
@@ -1982,10 +1986,10 @@ index ac2141892bf7..afbd4670240b 100644
extern u8 __splash_ ## _name ## _begin[]; \
extern u8 __splash_ ## _name ## _end[]
diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c
-index 10943b9ca19f..da2bbe864a03 100644
+index 78de95607924..1f267d45812c 100644
--- a/drivers/video/video_bmp.c
+++ b/drivers/video/video_bmp.c
-@@ -268,7 +268,6 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y,
+@@ -267,7 +267,6 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y,
enum video_format eformat;
struct bmp_color_table_entry *palette;
int hdr_size;
@@ -1993,7 +1997,7 @@ index 10943b9ca19f..da2bbe864a03 100644
if (!bmp || !(bmp->header.signature[0] == 'B' &&
bmp->header.signature[1] == 'M')) {
-@@ -462,11 +461,5 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y,
+@@ -461,11 +460,5 @@ int video_bmp_display(struct udevice *dev, ulong bmp_image, int x, int y,
video_damage(dev, x, y, width, height);
@@ -2006,10 +2010,10 @@ index 10943b9ca19f..da2bbe864a03 100644
return video_sync(dev, false);
}
diff --git a/include/video.h b/include/video.h
-index 307e954db828..3f072b4d6b89 100644
+index d2dabb66e9e6..44557457bf80 100644
--- a/include/video.h
+++ b/include/video.h
-@@ -350,43 +350,6 @@ void video_set_default_colors(struct udevice *dev, bool invert);
+@@ -353,43 +353,6 @@ void video_set_default_colors(struct udevice *dev, bool invert);
*/
int video_default_font_height(struct udevice *dev);
@@ -2050,14 +2054,14 @@ index 307e954db828..3f072b4d6b89 100644
-
-#endif
-
+ #ifdef CONFIG_VIDEO_DAMAGE
/**
* video_damage() - Notify the video subsystem about screen updates.
- *
diff --git a/include/video_console.h b/include/video_console.h
-index dbfb389f324f..4b4d2e621b30 100644
+index 8b5928dc5ebb..8806d10f946d 100644
--- a/include/video_console.h
+++ b/include/video_console.h
-@@ -406,58 +406,6 @@ void vidconsole_list_fonts(struct udevice *dev);
+@@ -529,56 +529,4 @@ void vidconsole_list_fonts(struct udevice *dev);
*/
int vidconsole_get_font_size(struct udevice *dev, const char **name, uint *sizep);
@@ -2113,14 +2117,12 @@ index dbfb389f324f..4b4d2e621b30 100644
-
-#endif
-
- /*
- * Convert an UTF-8 byte into the corresponding character in the CP437
- * code page. Returns 0 if that character is part of a multi-byte sequence.
+ #endif
diff --git a/test/dm/video.c b/test/dm/video.c
-index 8c7d9800a42e..4c3bcd26e94f 100644
+index 119c43153165..9b7bb51a3dd9 100644
--- a/test/dm/video.c
+++ b/test/dm/video.c
-@@ -106,6 +106,7 @@ static int check_copy_frame_buffer(struct unit_test_state *uts,
+@@ -105,6 +105,7 @@ static int check_copy_frame_buffer(struct unit_test_state *uts,
if (!IS_ENABLED(CONFIG_VIDEO_COPY))
return 0;
@@ -2128,7 +2130,7 @@ index 8c7d9800a42e..4c3bcd26e94f 100644
ut_assertf(!memcmp(priv->fb, priv->copy_fb, priv->fb_size),
"Copy framebuffer does not match fb");
-@@ -706,7 +707,7 @@ static int dm_test_video_copy(struct unit_test_state *uts)
+@@ -705,7 +706,7 @@ static int dm_test_video_copy(struct unit_test_state *uts)
vidconsole_put_string(con, test_string);
vidconsole_put_string(con, test_string);
ut_asserteq(7589, compress_frame_buffer(uts, dev, false));
@@ -2138,10 +2140,10 @@ index 8c7d9800a42e..4c3bcd26e94f 100644
return 0;
}
--
-2.42.0
+2.45.2
-From cf7e5c9411fbe82487191e162bafcf178eaeaf5e Mon Sep 17 00:00:00 2001
+From d0b64a4e493b665d7abafc185d88f533ebc27f2f Mon Sep 17 00:00:00 2001
From: Alexander Graf <agraf@csgraf.de>
Date: Tue, 3 Jan 2023 22:50:03 +0100
Subject: [PATCH 12/13] video: Always compile cache flushing code
@@ -2162,21 +2164,16 @@ Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-13-alpernebiyasak@gmail.com/
---
- drivers/video/video-uclass.c | 14 +++++---------
- 1 file changed, 5 insertions(+), 9 deletions(-)
+ drivers/video/video-uclass.c | 12 +++++-------
+ 1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
-index afbd4670240b..2c7777261ad1 100644
+index 3b9b9fad0975..f050ed1f67cb 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
-@@ -377,11 +377,13 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height)
- priv->damage.yend = max(yend, priv->damage.yend);
- }
-
--#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
- static void video_flush_dcache(struct udevice *vid)
- {
+@@ -377,6 +377,9 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy)
struct video_priv *priv = dev_get_uclass_priv(vid);
+ ulong fb = use_copy ? (ulong)priv->copy_fb : (ulong)priv->fb;
+ if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
+ return;
@@ -2184,15 +2181,7 @@ index afbd4670240b..2c7777261ad1 100644
if (!priv->flush_dcache)
return;
-@@ -410,7 +412,6 @@ static void video_flush_dcache(struct udevice *vid)
- }
- }
- }
--#endif
-
- static void video_flush_copy(struct udevice *vid)
- {
-@@ -449,14 +450,9 @@ int video_sync(struct udevice *vid, bool force)
+@@ -442,17 +445,12 @@ int video_sync(struct udevice *vid, bool force)
return ret;
}
@@ -2202,7 +2191,10 @@ index afbd4670240b..2c7777261ad1 100644
- * out whether it exists? For now, ARM is safe.
- */
-#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
- video_flush_dcache(vid);
+ video_flush_dcache(vid, false);
+
+ if (IS_ENABLED(CONFIG_VIDEO_COPY))
+ video_flush_dcache(vid, true);
-#elif defined(CONFIG_VIDEO_SANDBOX_SDL)
+
+#if defined(CONFIG_VIDEO_SANDBOX_SDL)
@@ -2210,10 +2202,10 @@ index afbd4670240b..2c7777261ad1 100644
if (force || get_timer(last_sync) > 100) {
--
-2.42.0
+2.45.2
-From 2ada48e20ae7fb1ce66d63c6f549887c38b058d4 Mon Sep 17 00:00:00 2001
+From e6b053a9d59d0b4ea0936edee5be2fadf0b8efc2 Mon Sep 17 00:00:00 2001
From: Alexander Graf <agraf@csgraf.de>
Date: Tue, 3 Jan 2023 22:50:04 +0100
Subject: [PATCH 13/13] video: Enable VIDEO_DAMAGE for drivers that need it
@@ -2230,6 +2222,7 @@ Signed-off-by: Alexander Graf <agraf@csgraf.de>
[Alper: Add to VIDEO_TIDSS, imply instead of select]
Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-14-alpernebiyasak@gmail.com/
---
arch/arm/mach-sunxi/Kconfig | 1 +
@@ -2244,11 +2237,11 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-14-alpernebiyasak@gm
9 files changed, 16 insertions(+)
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
-index e20c3a3ee926..6bd813b68c9c 100644
+index ddf9414b08e7..3c9745065bab 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
-@@ -813,6 +813,7 @@ config VIDEO_SUNXI
- depends on !SUN50I_GEN_H6
+@@ -863,6 +863,7 @@ config VIDEO_SUNXI
+ depends on !SUNXI_GEN_NCAT2
select VIDEO
select DISPLAY
+ imply VIDEO_DAMAGE
@@ -2256,7 +2249,7 @@ index e20c3a3ee926..6bd813b68c9c 100644
default y
---help---
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
-index 5f17c6be84ed..546df93f51a9 100644
+index 88c6f8e68976..06d3ed8a736e 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -499,6 +499,7 @@ config VIDEO_LCD_ANX9804
@@ -2275,7 +2268,7 @@ index 5f17c6be84ed..546df93f51a9 100644
help
The graphics processor already sets up the display so this driver
simply checks the resolution and then sets up the frame buffer with
-@@ -654,6 +656,7 @@ source "drivers/video/meson/Kconfig"
+@@ -671,6 +673,7 @@ source "drivers/video/meson/Kconfig"
config VIDEO_MVEBU
bool "Armada XP LCD controller"
@@ -2283,7 +2276,7 @@ index 5f17c6be84ed..546df93f51a9 100644
---help---
Support for the LCD controller integrated in the Marvell
Armada XP SoC.
-@@ -688,6 +691,7 @@ config NXP_TDA19988
+@@ -705,6 +708,7 @@ config NXP_TDA19988
config ATMEL_HLCD
bool "Enable ATMEL video support using HLCDC"
@@ -2291,7 +2284,7 @@ index 5f17c6be84ed..546df93f51a9 100644
help
HLCDC supports video output to an attached LCD panel.
-@@ -764,6 +768,7 @@ source "drivers/video/tidss/Kconfig"
+@@ -781,6 +785,7 @@ source "drivers/video/tidss/Kconfig"
config VIDEO_TEGRA124
bool "Enable video support on Tegra124"
@@ -2299,7 +2292,7 @@ index 5f17c6be84ed..546df93f51a9 100644
help
Tegra124 supports many video output options including eDP and
HDMI. At present only eDP is supported by U-Boot. This option
-@@ -778,6 +783,7 @@ source "drivers/video/imx/Kconfig"
+@@ -795,6 +800,7 @@ source "drivers/video/imx/Kconfig"
config VIDEO_MXS
bool "Enable video support on i.MX28/i.MX6UL/i.MX7 SoCs"
@@ -2307,7 +2300,7 @@ index 5f17c6be84ed..546df93f51a9 100644
help
Enable framebuffer driver for i.MX28/i.MX6UL/i.MX7 processors
-@@ -840,6 +846,7 @@ config VIDEO_DW_MIPI_DSI
+@@ -857,6 +863,7 @@ config VIDEO_DW_MIPI_DSI
config VIDEO_SIMPLE
bool "Simple display driver for preconfigured display"
@@ -2315,7 +2308,7 @@ index 5f17c6be84ed..546df93f51a9 100644
help
Enables a simple generic display driver which utilizes the
simple-framebuffer devicetree bindings.
-@@ -858,6 +865,7 @@ config VIDEO_DT_SIMPLEFB
+@@ -875,6 +882,7 @@ config VIDEO_DT_SIMPLEFB
config VIDEO_MCDE_SIMPLE
bool "Simple driver for ST-Ericsson MCDE with preconfigured display"
@@ -2407,5 +2400,5 @@ index 95086f3a5d66..3291b3ceb8d5 100644
TIDSS supports video output options LVDS and
DPI . This option enables these supports which can be used on
--
-2.42.0
+2.45.2
diff --git a/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch b/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch
new file mode 100644
index 00000000..e1a26bb4
--- /dev/null
+++ b/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch
@@ -0,0 +1,34 @@
+From ba34d29274c23c52be957ea040539dccbab09765 Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Wed, 10 Jul 2024 17:37:56 +0300
+Subject: [PATCH] HACK: Makefile: Ignore missing input files for binman images
+
+For Rockchip boards binman tries to build SPI and MMC images that
+require an externally built BL31 file to be provided, and the build
+fails otherwise.
+
+Some downstreams only care about build outputs for U-Boot proper. As a
+hack to make sure they can do so without passing in a BL31 file, tell
+binman to ignore missing input files.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+ Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/Makefile b/Makefile
+index 1c754ceb5953..fec8d9b2d2b1 100644
+--- a/Makefile
++++ b/Makefile
+@@ -1375,7 +1375,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \
+ --toolpath $(objtree)/tools \
+ $(if $(BINMAN_VERBOSE),-v$(BINMAN_VERBOSE)) \
+ build -u -d u-boot.dtb -O . -m \
+- --allow-missing $(if $(BINMAN_ALLOW_MISSING),--ignore-missing) \
++ --allow-missing --ignore-missing \
+ -I . -I $(srctree) -I $(srctree)/board/$(BOARDDIR) \
+ -I $(dt_dir) -a of-list=$(CONFIG_OF_LIST) \
+ $(foreach f,$(BINMAN_INDIRS),-I $(f)) \
+--
+2.45.2
+
diff --git a/config/u-boot/default/patches/0004-HACK-regulator-Don-t-error-on-reentrant-regulator-ac.patch b/config/u-boot/default/patches/0004-HACK-regulator-Don-t-error-on-reentrant-regulator-ac.patch
deleted file mode 100644
index 3a66b99a..00000000
--- a/config/u-boot/default/patches/0004-HACK-regulator-Don-t-error-on-reentrant-regulator-ac.patch
+++ /dev/null
@@ -1,42 +0,0 @@
-From 2ab104621dc97a89bc8f75e3b5903b83e793baf8 Mon Sep 17 00:00:00 2001
-From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Date: Sat, 19 Aug 2023 16:43:58 +0300
-Subject: [PATCH] HACK: regulator: Don't error on reentrant regulator actions
-
-Commit 4fcba5d556b42 ("regulator: implement basic reference counter")
-implements reference counting for regulator enable/disable actions, but
-does not update its callers to handle the error cases it adds. This
-breaks gru-kevin, report enabling the regulator as a success as a
-workaround. It would be better to fix the callers but that needs more
-debugging.
-
-Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
----
- drivers/power/regulator/regulator_common.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/power/regulator/regulator_common.c b/drivers/power/regulator/regulator_common.c
-index e26f5ebec347..1c2dfdf9b19d 100644
---- a/drivers/power/regulator/regulator_common.c
-+++ b/drivers/power/regulator/regulator_common.c
-@@ -75,7 +75,7 @@ int regulator_common_set_enable(const struct udevice *dev,
- /* If previously enabled, increase count */
- if (enable && plat->enable_count > 0) {
- plat->enable_count++;
-- return -EALREADY;
-+ return 0;
- }
-
- if (!enable) {
-@@ -85,7 +85,7 @@ int regulator_common_set_enable(const struct udevice *dev,
- return -EBUSY;
- } else if (!plat->enable_count) {
- /* If already disabled, do nothing */
-- return -EALREADY;
-+ return 0;
- }
- }
-
---
-2.42.0
-
diff --git a/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch b/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch
new file mode 100644
index 00000000..73789811
--- /dev/null
+++ b/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch
@@ -0,0 +1,36 @@
+From 1107dc81b24743e77374f1b484a843d81fa0348a Mon Sep 17 00:00:00 2001
+From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+Date: Wed, 10 Jul 2024 14:32:19 +0300
+Subject: [PATCH] HACK: rk3399: gru: Remove assigned clock dt properties for
+ EDP node
+
+Having the PCLK_EDP clock in the assigned-clocks property of the `edp`
+node means that U-Boot tries to set its rate automatically. This clock
+isn't implemented for the RK3399 clock driver, so it fails and prevents
+display from being initialized.
+
+The display happens to work fine without it, remove the property until
+the clock driver can handle the clock.
+
+Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
+---
+ arch/arm/dts/rk3399-gru-u-boot.dtsi | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi
+index 487dde38d86a..30cfb58aca12 100644
+--- a/arch/arm/dts/rk3399-gru-u-boot.dtsi
++++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi
+@@ -28,6 +28,9 @@ &cros_ec {
+
+ &edp {
+ rockchip,panel = <&edp_panel>;
++
++ /delete-property/ assigned-clocks;
++ /delete-property/ assigned-clock-rates;
+ };
+
+ &pp1800_audio {
+--
+2.45.2
+
diff --git a/config/u-boot/default/patches/0005-HACK-rockchip-Remove-binman-image-descriptions.patch b/config/u-boot/default/patches/0005-HACK-rockchip-Remove-binman-image-descriptions.patch
deleted file mode 100644
index ac3ada3b..00000000
--- a/config/u-boot/default/patches/0005-HACK-rockchip-Remove-binman-image-descriptions.patch
+++ /dev/null
@@ -1,307 +0,0 @@
-From b14bc4a5d8dc31294dde4ee9ce8008d763c695de Mon Sep 17 00:00:00 2001
-From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Date: Fri, 13 Oct 2023 14:06:26 +0300
-Subject: [PATCH] HACK: rockchip: Remove binman image descriptions
-
-For Rockchip boards binman tries to build SPI and MMC images that
-require an externally built BL31 file to be provided, and the build
-fails otherwise. This is not really as configurable as it should be.
-
-Some downstreams only care about build outputs for U-Boot proper. As a
-hack to make sure they can do so without building BL31, remove the
-binman image descriptions from the device-tree sources. However,
-BINMAN_FDT expects these to be present and has to be disabled as well.
-
-Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
----
- arch/arm/dts/rk3288-u-boot.dtsi | 24 ----
- arch/arm/dts/rk3399-gru-u-boot.dtsi | 6 -
- arch/arm/dts/rk3399-u-boot.dtsi | 25 ----
- arch/arm/dts/rockchip-u-boot.dtsi | 186 ----------------------------
- 4 files changed, 241 deletions(-)
-
-diff --git a/arch/arm/dts/rk3288-u-boot.dtsi b/arch/arm/dts/rk3288-u-boot.dtsi
-index c4c5a2d225c4..432ab92d97c9 100644
---- a/arch/arm/dts/rk3288-u-boot.dtsi
-+++ b/arch/arm/dts/rk3288-u-boot.dtsi
-@@ -55,30 +55,6 @@ noc: syscon@ffac0000 {
- };
- };
-
--#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
--&binman {
-- rom {
-- filename = "u-boot.rom";
-- size = <0x400000>;
-- pad-byte = <0xff>;
--
-- mkimage {
-- args = "-n rk3288 -T rkspi";
-- u-boot-spl {
-- };
-- };
-- u-boot-img {
-- offset = <0x20000>;
-- };
-- u-boot {
-- offset = <0x300000>;
-- };
-- fdtmap {
-- };
-- };
--};
--#endif
--
- &bus_intmem {
- ddr_sram: ddr-sram@1000 {
- compatible = "rockchip,rk3288-ddr-sram";
-diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi
-index b1604a6872c0..54296b4d7a1c 100644
---- a/arch/arm/dts/rk3399-gru-u-boot.dtsi
-+++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi
-@@ -15,12 +15,6 @@ config {
- };
- };
-
--&binman {
-- rom {
-- size = <0x800000>;
-- };
--};
--
- &cros_ec {
- ec-interrupt = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>;
- };
-diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
-index 3423b882c437..0bf4c481b39a 100644
---- a/arch/arm/dts/rk3399-u-boot.dtsi
-+++ b/arch/arm/dts/rk3399-u-boot.dtsi
-@@ -60,31 +60,6 @@ pmusgrf: syscon@ff330000 {
-
- };
-
--#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
--&binman {
-- multiple-images;
-- rom {
-- filename = "u-boot.rom";
-- size = <0x400000>;
-- pad-byte = <0xff>;
--
-- mkimage {
-- args = "-n rk3399 -T rkspi";
-- u-boot-spl {
-- };
-- };
-- u-boot-img {
-- offset = <0x40000>;
-- };
-- u-boot {
-- offset = <0x300000>;
-- };
-- fdtmap {
-- };
-- };
--};
--#endif /* CONFIG_ROCKCHIP_SPI_IMAGE && CONFIG_HAS_ROM */
--
- &cru {
- bootph-all;
- };
-diff --git a/arch/arm/dts/rockchip-u-boot.dtsi b/arch/arm/dts/rockchip-u-boot.dtsi
-index be2658e8ef18..3d55553e4401 100644
---- a/arch/arm/dts/rockchip-u-boot.dtsi
-+++ b/arch/arm/dts/rockchip-u-boot.dtsi
-@@ -10,189 +10,3 @@ binman: binman {
- multiple-images;
- };
- };
--
--#ifdef CONFIG_SPL
--&binman {
-- simple-bin {
-- filename = "u-boot-rockchip.bin";
-- pad-byte = <0xff>;
--
-- mkimage {
-- filename = "idbloader.img";
-- args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
-- multiple-data-files;
--
--#ifdef CONFIG_ROCKCHIP_EXTERNAL_TPL
-- rockchip-tpl {
-- };
--#elif defined(CONFIG_TPL)
-- u-boot-tpl {
-- };
--#endif
-- u-boot-spl {
-- };
-- };
--
--#if defined(CONFIG_SPL_FIT) && (defined(CONFIG_ARM64) || defined(CONFIG_SPL_OPTEE_IMAGE))
-- fit: fit {
--#ifdef CONFIG_ARM64
-- description = "FIT image for U-Boot with bl31 (TF-A)";
--#else
-- description = "FIT image with OP-TEE";
--#endif
-- #address-cells = <1>;
-- fit,fdt-list = "of-list";
-- filename = "u-boot.itb";
-- fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
-- fit,align = <512>;
-- offset = <CONFIG_SPL_PAD_TO>;
-- images {
-- u-boot {
-- description = "U-Boot";
-- type = "standalone";
-- os = "U-Boot";
--#ifdef CONFIG_ARM64
-- arch = "arm64";
--#else
-- arch = "arm";
--#endif
-- compression = "none";
-- load = <CONFIG_TEXT_BASE>;
-- entry = <CONFIG_TEXT_BASE>;
-- u-boot-nodtb {
-- };
--#ifdef CONFIG_SPL_FIT_SIGNATURE
-- hash {
-- algo = "sha256";
-- };
--#endif
-- };
--
--#ifdef CONFIG_ARM64
-- @atf-SEQ {
-- fit,operation = "split-elf";
-- description = "ARM Trusted Firmware";
-- type = "firmware";
-- arch = "arm64";
-- os = "arm-trusted-firmware";
-- compression = "none";
-- fit,load;
-- fit,entry;
-- fit,data;
--
-- atf-bl31 {
-- };
--#ifdef CONFIG_SPL_FIT_SIGNATURE
-- hash {
-- algo = "sha256";
-- };
--#endif
-- };
-- @tee-SEQ {
-- fit,operation = "split-elf";
-- description = "TEE";
-- type = "tee";
-- arch = "arm64";
-- os = "tee";
-- compression = "none";
-- fit,load;
-- fit,entry;
-- fit,data;
--
-- tee-os {
-- optional;
-- };
--#ifdef CONFIG_SPL_FIT_SIGNATURE
-- hash {
-- algo = "sha256";
-- };
--#endif
-- };
--#else
-- op-tee {
-- description = "OP-TEE";
-- type = "tee";
-- arch = "arm";
-- os = "tee";
-- compression = "none";
-- load = <(CFG_SYS_SDRAM_BASE + 0x8400000)>;
-- entry = <(CFG_SYS_SDRAM_BASE + 0x8400000)>;
--
-- tee-os {
-- };
--#ifdef CONFIG_SPL_FIT_SIGNATURE
-- hash {
-- algo = "sha256";
-- };
--#endif
-- };
--#endif
--
-- @fdt-SEQ {
-- description = "fdt-NAME";
-- compression = "none";
-- type = "flat_dt";
--#ifdef CONFIG_SPL_FIT_SIGNATURE
-- hash {
-- algo = "sha256";
-- };
--#endif
-- };
-- };
--
-- configurations {
-- default = "@config-DEFAULT-SEQ";
-- @config-SEQ {
-- description = "NAME.dtb";
-- fdt = "fdt-SEQ";
--#ifdef CONFIG_ARM64
-- fit,firmware = "atf-1", "u-boot";
--#else
-- fit,firmware = "op-tee", "u-boot";
--#endif
-- fit,loadables;
-- };
-- };
-- };
--#else
-- u-boot-img {
-- offset = <CONFIG_SPL_PAD_TO>;
-- };
--#endif
-- };
--
--#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
-- simple-bin-spi {
-- filename = "u-boot-rockchip-spi.bin";
-- pad-byte = <0xff>;
--
-- mkimage {
-- filename = "idbloader-spi.img";
-- args = "-n", CONFIG_SYS_SOC, "-T", "rkspi";
-- multiple-data-files;
--
--#ifdef CONFIG_ROCKCHIP_EXTERNAL_TPL
-- rockchip-tpl {
-- };
--#elif defined(CONFIG_TPL)
-- u-boot-tpl {
-- };
--#endif
-- u-boot-spl {
-- };
-- };
--
--#if defined(CONFIG_ARM64) || defined(CONFIG_SPL_OPTEE_IMAGE)
-- fit {
-- type = "blob";
-- filename = "u-boot.itb";
--#else
-- u-boot-img {
--#endif
-- /* Sync with u-boot,spl-payload-offset if present */
-- offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>;
-- };
-- };
--#endif /* CONFIG_ROCKCHIP_SPI_IMAGE */
--};
--#endif /* CONFIG_SPL */
---
-2.42.0
-
diff --git a/config/u-boot/default/patches/0006-arm-qemu-Enable-Bochs-console-buffering-USB-keyboard.patch b/config/u-boot/default/patches/0006-arm-qemu-Enable-Bochs-console-buffering-USB-keyboard.patch
deleted file mode 100644
index 7aa4e526..00000000
--- a/config/u-boot/default/patches/0006-arm-qemu-Enable-Bochs-console-buffering-USB-keyboard.patch
+++ /dev/null
@@ -1,348 +0,0 @@
-From 2957e8bf43edf8de6e579ce1ed7f95e5bb4a1437 Mon Sep 17 00:00:00 2001
-From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Date: Mon, 14 Aug 2023 20:39:41 +0300
-Subject: [PATCH 1/4] arm: qemu: Enable Bochs video support
-
-Commit 716161663ec49 ("riscv: qemu: Enable Bochs video support") enables
-a video console for QEMU RISC-V virtual machines using an emulated Bochs
-VGA card. Similarly, enable it for ARM virtual machines as well.
-
-Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Reviewed-by: Bin Meng <bmeng@tinylab.org>
-Link: https://lore.kernel.org/u-boot/20230814173944.288356-2-alpernebiyasak@gmail.com/
----
- arch/arm/Kconfig | 4 ++++
- board/emulation/qemu-arm/qemu-arm.env | 3 +++
- doc/board/emulation/qemu-arm.rst | 4 ++++
- 3 files changed, 11 insertions(+)
-
-diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index 328e2ddc33af..d96e230e9ee8 100644
---- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -1036,6 +1036,10 @@ config ARCH_QEMU
- imply DM_RTC
- imply RTC_PL031
- imply OF_HAS_PRIOR_STAGE
-+ imply VIDEO
-+ imply VIDEO_BOCHS
-+ imply SYS_WHITE_ON_BLACK
-+ imply SYS_CONSOLE_IS_IN_ENV
-
- config ARCH_RMOBILE
- bool "Renesas ARM SoCs"
-diff --git a/board/emulation/qemu-arm/qemu-arm.env b/board/emulation/qemu-arm/qemu-arm.env
-index e658d5ee7d63..86a99a2e8713 100644
---- a/board/emulation/qemu-arm/qemu-arm.env
-+++ b/board/emulation/qemu-arm/qemu-arm.env
-@@ -2,6 +2,9 @@
-
- /* environment for qemu-arm and qemu-arm64 */
-
-+stdin=serial
-+stdout=serial,vidconsole
-+stderr=serial,vidconsole
- fdt_high=0xffffffff
- initrd_high=0xffffffff
- fdt_addr=0x40000000
-diff --git a/doc/board/emulation/qemu-arm.rst b/doc/board/emulation/qemu-arm.rst
-index 7291fa4a3150..c423fce76edd 100644
---- a/doc/board/emulation/qemu-arm.rst
-+++ b/doc/board/emulation/qemu-arm.rst
-@@ -67,6 +67,10 @@ Additional persistent U-Boot environment support can be added as follows:
- Additional peripherals that have been tested to work in both U-Boot and Linux
- can be enabled with the following command line parameters:
-
-+- To add a video console, remove "-nographic" and add e.g.::
-+
-+ -serial stdio -device VGA
-+
- - To add a Serial ATA disk via an Intel ICH9 AHCI controller, pass e.g.::
-
- -drive if=none,file=disk.img,format=raw,id=mydisk \
---
-2.42.0
-
-
-From 5330bc1c2ad84ba9ecc473f8c24d6e15b366adf9 Mon Sep 17 00:00:00 2001
-From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Date: Mon, 14 Aug 2023 20:39:42 +0300
-Subject: [PATCH 2/4] arm: qemu: Enable PRE_CONSOLE_BUFFER
-
-Commit 608b80b5b855 ("riscv: qemu: Enable PRE_CONSOLE_BUFFER") enables
-buffering console messages for QEMU RISC-V virtual machines so those
-printed before the video console is available will still show up on the
-display. Similarly, enable it for ARM virtual machines as well.
-
-Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Reviewed-by: Simon Glass <sjg@chromium.org>
-Reviewed-by: Bin Meng <bmeng@tinylab.org>
-Link: https://lore.kernel.org/u-boot/20230814173944.288356-3-alpernebiyasak@gmail.com/
----
- arch/arm/Kconfig | 1 +
- board/emulation/qemu-arm/Kconfig | 4 ++++
- 2 files changed, 5 insertions(+)
-
-diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index d96e230e9ee8..1cc2be55140a 100644
---- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -1040,6 +1040,7 @@ config ARCH_QEMU
- imply VIDEO_BOCHS
- imply SYS_WHITE_ON_BLACK
- imply SYS_CONSOLE_IS_IN_ENV
-+ imply PRE_CONSOLE_BUFFER
-
- config ARCH_RMOBILE
- bool "Renesas ARM SoCs"
-diff --git a/board/emulation/qemu-arm/Kconfig b/board/emulation/qemu-arm/Kconfig
-index ed9949651c4b..09c95413a541 100644
---- a/board/emulation/qemu-arm/Kconfig
-+++ b/board/emulation/qemu-arm/Kconfig
-@@ -12,6 +12,10 @@ config BOARD_SPECIFIC_OPTIONS # dummy
- imply VIRTIO_NET
- imply VIRTIO_BLK
-
-+config PRE_CON_BUF_ADDR
-+ hex
-+ default 0x40100000
-+
- endif
-
- if TARGET_QEMU_ARM_64BIT && !TFABOOT
---
-2.42.0
-
-
-From 7f666214855d062dc939ff54a0fa52fbde9f0391 Mon Sep 17 00:00:00 2001
-From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Date: Mon, 14 Aug 2023 20:39:43 +0300
-Subject: [PATCH 3/4] arm: qemu: Enable usb keyboard as an input device
-
-Commit 02be57caf730 ("riscv: qemu: Enable usb keyboard as an input
-device") adds PCI xHCI support to QEMU RISC-V virtual machines and
-enables using a USB keyboard as one of the input devices. Similarly,
-enable those for ARM virtual machines as well.
-
-Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Reviewed-by: Simon Glass <sjg@chromium.org>
-Reviewed-by: Bin Meng <bmeng@tinylab.org>
-Link: https://lore.kernel.org/u-boot/20230814173944.288356-4-alpernebiyasak@gmail.com/
----
- arch/arm/Kconfig | 5 +++++
- board/emulation/qemu-arm/qemu-arm.c | 5 +++++
- board/emulation/qemu-arm/qemu-arm.env | 2 +-
- configs/qemu_arm64_defconfig | 2 --
- configs/qemu_arm_defconfig | 2 --
- doc/board/emulation/qemu-arm.rst | 4 ++++
- 6 files changed, 15 insertions(+), 5 deletions(-)
-
-diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index 1cc2be55140a..4c739bd9bc82 100644
---- a/arch/arm/Kconfig
-+++ b/arch/arm/Kconfig
-@@ -1041,6 +1041,11 @@ config ARCH_QEMU
- imply SYS_WHITE_ON_BLACK
- imply SYS_CONSOLE_IS_IN_ENV
- imply PRE_CONSOLE_BUFFER
-+ imply USB
-+ imply USB_XHCI_HCD
-+ imply USB_XHCI_PCI
-+ imply USB_KEYBOARD
-+ imply CMD_USB
-
- config ARCH_RMOBILE
- bool "Renesas ARM SoCs"
-diff --git a/board/emulation/qemu-arm/qemu-arm.c b/board/emulation/qemu-arm/qemu-arm.c
-index dfea0d92a3c8..942f1fff5717 100644
---- a/board/emulation/qemu-arm/qemu-arm.c
-+++ b/board/emulation/qemu-arm/qemu-arm.c
-@@ -11,6 +11,7 @@
- #include <fdtdec.h>
- #include <init.h>
- #include <log.h>
-+#include <usb.h>
- #include <virtio_types.h>
- #include <virtio.h>
-
-@@ -114,6 +115,10 @@ int board_late_init(void)
- */
- virtio_init();
-
-+ /* start usb so that usb keyboard can be used as input device */
-+ if (CONFIG_IS_ENABLED(USB_KEYBOARD))
-+ usb_init();
-+
- return 0;
- }
-
-diff --git a/board/emulation/qemu-arm/qemu-arm.env b/board/emulation/qemu-arm/qemu-arm.env
-index 86a99a2e8713..fb4adef281ed 100644
---- a/board/emulation/qemu-arm/qemu-arm.env
-+++ b/board/emulation/qemu-arm/qemu-arm.env
-@@ -2,7 +2,7 @@
-
- /* environment for qemu-arm and qemu-arm64 */
-
--stdin=serial
-+stdin=serial,usbkbd
- stdout=serial,vidconsole
- stderr=serial,vidconsole
- fdt_high=0xffffffff
-diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig
-index 94bd96678443..f6b8ae530a4a 100644
---- a/configs/qemu_arm64_defconfig
-+++ b/configs/qemu_arm64_defconfig
-@@ -35,7 +35,6 @@ CONFIG_CMD_NVEDIT_EFI=y
- CONFIG_CMD_DFU=y
- CONFIG_CMD_MTD=y
- CONFIG_CMD_PCI=y
--CONFIG_CMD_USB=y
- CONFIG_CMD_TPM=y
- CONFIG_CMD_MTDPARTS=y
- CONFIG_ENV_IS_IN_FLASH=y
-@@ -68,7 +67,6 @@ CONFIG_SYSRESET=y
- CONFIG_SYSRESET_CMD_POWEROFF=y
- CONFIG_SYSRESET_PSCI=y
- CONFIG_TPM2_MMIO=y
--CONFIG_USB=y
- CONFIG_USB_EHCI_HCD=y
- CONFIG_USB_EHCI_PCI=y
- CONFIG_TPM=y
-diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig
-index 7cb1e9f037ff..1347b86f34b1 100644
---- a/configs/qemu_arm_defconfig
-+++ b/configs/qemu_arm_defconfig
-@@ -36,7 +36,6 @@ CONFIG_CMD_NVEDIT_EFI=y
- CONFIG_CMD_DFU=y
- CONFIG_CMD_MTD=y
- CONFIG_CMD_PCI=y
--CONFIG_CMD_USB=y
- CONFIG_CMD_TPM=y
- CONFIG_CMD_MTDPARTS=y
- CONFIG_ENV_IS_IN_FLASH=y
-@@ -69,7 +68,6 @@ CONFIG_SYSRESET=y
- CONFIG_SYSRESET_CMD_POWEROFF=y
- CONFIG_SYSRESET_PSCI=y
- CONFIG_TPM2_MMIO=y
--CONFIG_USB=y
- CONFIG_USB_EHCI_HCD=y
- CONFIG_USB_EHCI_PCI=y
- CONFIG_TPM=y
-diff --git a/doc/board/emulation/qemu-arm.rst b/doc/board/emulation/qemu-arm.rst
-index c423fce76edd..5481ef6da328 100644
---- a/doc/board/emulation/qemu-arm.rst
-+++ b/doc/board/emulation/qemu-arm.rst
-@@ -84,6 +84,10 @@ can be enabled with the following command line parameters:
-
- -device usb-ehci,id=ehci
-
-+- To add a USB keyboard attached to an emulated xHCI controller, pass e.g.::
-+
-+ -device qemu-xhci,id=xhci -device usb-kbd,bus=xhci.0
-+
- - To add an NVMe disk, pass e.g.::
-
- -drive if=none,file=disk.img,id=mydisk -device nvme,drive=mydisk,serial=foo
---
-2.42.0
-
-
-From fcc1b6cb56beaaf90bf80928627a606f33a42c3c Mon Sep 17 00:00:00 2001
-From: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Date: Mon, 14 Aug 2023 20:39:44 +0300
-Subject: [PATCH 4/4] doc: qemu: arm: Add a section on booting Linux distros
-
-Add an example qemu-system-aarch64 command that can make U-Boot on QEMU
-boot into the Debian Installer, along with resulting console messages
-from U-Boot, based on the existing documentation section for the x86
-version.
-
-Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
-Link: https://lore.kernel.org/u-boot/20230814173944.288356-5-alpernebiyasak@gmail.com/
----
- doc/board/emulation/qemu-arm.rst | 68 ++++++++++++++++++++++++++++++++
- 1 file changed, 68 insertions(+)
-
-diff --git a/doc/board/emulation/qemu-arm.rst b/doc/board/emulation/qemu-arm.rst
-index 5481ef6da328..1c91c7f3ac67 100644
---- a/doc/board/emulation/qemu-arm.rst
-+++ b/doc/board/emulation/qemu-arm.rst
-@@ -98,6 +98,74 @@ can be enabled with the following command line parameters:
-
- These have been tested in QEMU 2.9.0 but should work in at least 2.5.0 as well.
-
-+Booting distros
-+---------------
-+
-+It is possible to install and boot a standard Linux distribution using
-+qemu_arm64 by setting up a root disk::
-+
-+ qemu-img create root.img 20G
-+
-+then using the installer to install. For example, with Debian 12::
-+
-+ qemu-system-aarch64 \
-+ -machine virt -cpu cortex-a53 -m 4G -smp 4 \
-+ -bios u-boot.bin \
-+ -serial stdio -device VGA \
-+ -nic user,model=virtio-net-pci \
-+ -device virtio-rng-pci \
-+ -device qemu-xhci,id=xhci \
-+ -device usb-kbd -device usb-tablet \
-+ -drive if=virtio,file=debian-12.0.0-arm64-netinst.iso,format=raw,readonly=on,media=cdrom \
-+ -drive if=virtio,file=root.img,format=raw,media=disk
-+
-+The output will be something like this::
-+
-+ U-Boot 2023.10-rc2-00075-gbe8fbe718e35 (Aug 11 2023 - 08:38:49 +0000)
-+
-+ DRAM: 4 GiB
-+ Core: 51 devices, 14 uclasses, devicetree: board
-+ Flash: 64 MiB
-+ Loading Environment from Flash... *** Warning - bad CRC, using default environment
-+
-+ In: serial,usbkbd
-+ Out: serial,vidconsole
-+ Err: serial,vidconsole
-+ Bus xhci_pci: Register 8001040 NbrPorts 8
-+ Starting the controller
-+ USB XHCI 1.00
-+ scanning bus xhci_pci for devices... 3 USB Device(s) found
-+ Net: eth0: virtio-net#32
-+ Hit any key to stop autoboot: 0
-+ Scanning for bootflows in all bootdevs
-+ Seq Method State Uclass Part Name Filename
-+ --- ----------- ------ -------- ---- ------------------------ ----------------
-+ Scanning global bootmeth 'efi_mgr':
-+ Scanning bootdev 'fw-cfg@9020000.bootdev':
-+ fatal: no kernel available
-+ scanning bus for devices...
-+ Scanning bootdev 'virtio-blk#34.bootdev':
-+ 0 efi ready virtio 2 virtio-blk#34.bootdev.par efi/boot/bootaa64.efi
-+ ** Booting bootflow 'virtio-blk#34.bootdev.part_2' with efi
-+ Using prior-stage device tree
-+ Failed to load EFI variables
-+ Error: writing contents
-+ ** Unable to write file ubootefi.var **
-+ Failed to persist EFI variables
-+ Missing TPMv2 device for EFI_TCG_PROTOCOL
-+ Booting /efi\boot\bootaa64.efi
-+ Error: writing contents
-+ ** Unable to write file ubootefi.var **
-+ Failed to persist EFI variables
-+ Welcome to GRUB!
-+
-+Standard boot looks through various available devices and finds the virtio
-+disks, then boots from the first one. After a second or so the grub menu appears
-+and you can work through the installer flow normally.
-+
-+After the installation, you can boot into the installed system by running QEMU
-+again without the drive argument corresponding to the installer CD image.
-+
- Enabling TPMv2 support
- ----------------------
-
---
-2.42.0
-
diff --git a/config/u-boot/default/target.cfg b/config/u-boot/default/target.cfg
index cdbb5216..8d6af6d9 100644
--- a/config/u-boot/default/target.cfg
+++ b/config/u-boot/default/target.cfg
@@ -1,2 +1,2 @@
tree="default"
-rev="4459ed60cb1e0562bc5b40405e2b4b9bbf766d57" # v2023.10
+rev="3f772959501c99fbe5aa0b22a36efe3478d1ae1c" # v2024.07
diff --git a/config/u-boot/gru_bob/config/default b/config/u-boot/gru_bob/config/default
index 2bcbe3d8..da088ef0 100644
--- a/config/u-boot/gru_bob/config/default
+++ b/config/u-boot/gru_bob/config/default
@@ -1,13 +1,14 @@
#
# Automatically generated file; DO NOT EDIT.
-# U-Boot 2023.10 Configuration
+# U-Boot 2024.07 Configuration
#
#
-# Compiler: gcc (Debian 13.2.0-5) 13.2.0
+# Compiler: gcc (Debian 13.3.0-2) 13.3.0
#
CONFIG_CREATE_ARCH_SYMLINK=y
CONFIG_SYS_CACHE_SHIFT_6=y
+CONFIG_64BIT=y
CONFIG_SYS_CACHELINE_SIZE=64
CONFIG_LINKER_LIST_ALIGN=8
# CONFIG_ARC is not set
@@ -40,7 +41,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y
# CONFIG_SYS_ICACHE_OFF is not set
# CONFIG_SPL_SYS_ICACHE_OFF is not set
# CONFIG_SYS_DCACHE_OFF is not set
-# CONFIG_SPL_SYS_DCACHE_OFF is not set
+CONFIG_SPL_SYS_DCACHE_OFF=y
#
# ARM architecture
@@ -53,6 +54,7 @@ CONFIG_INIT_SP_RELATIVE=y
CONFIG_SYS_INIT_SP_BSS_OFFSET=524288
CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE=0x18000000
# CONFIG_GIC_V3_ITS is not set
+# CONFIG_GICV3_SUPPORT_GIC600 is not set
CONFIG_STATIC_RELA=y
CONFIG_DMA_ADDR_T_64BIT=y
CONFIG_ARM_ASM_UNIFIED=y
@@ -81,13 +83,11 @@ CONFIG_ARM64_SUPPORT_AARCH32=y
# CONFIG_ARCH_KIRKWOOD is not set
# CONFIG_ARCH_MVEBU is not set
# CONFIG_ARCH_ORION5X is not set
-# CONFIG_TARGET_STV0991 is not set
# CONFIG_ARCH_BCM283X is not set
# CONFIG_ARCH_BCMSTB is not set
# CONFIG_ARCH_BCMBCA is not set
# CONFIG_TARGET_VEXPRESS_CA9X4 is not set
# CONFIG_TARGET_BCMNS is not set
-# CONFIG_TARGET_BCMNS2 is not set
# CONFIG_TARGET_BCMNS3 is not set
# CONFIG_ARCH_EXYNOS is not set
# CONFIG_ARCH_S5PC1XX is not set
@@ -117,7 +117,7 @@ CONFIG_ARM64_SUPPORT_AARCH32=y
# CONFIG_ARCH_APPLE is not set
# CONFIG_ARCH_OWL is not set
# CONFIG_ARCH_QEMU is not set
-# CONFIG_ARCH_RMOBILE is not set
+# CONFIG_ARCH_RENESAS is not set
# CONFIG_ARCH_SNAPDRAGON is not set
# CONFIG_ARCH_SOCFPGA is not set
# CONFIG_ARCH_SUNXI is not set
@@ -176,6 +176,7 @@ CONFIG_ARCH_ROCKCHIP=y
# CONFIG_ARCH_ASPEED is not set
# CONFIG_TARGET_DURIAN is not set
# CONFIG_TARGET_POMELO is not set
+# CONFIG_TARGET_PE2201 is not set
# CONFIG_TARGET_PRESIDIO_ASIC is not set
# CONFIG_TARGET_XENGUEST_ARM64 is not set
# CONFIG_ARCH_GXP is not set
@@ -194,10 +195,9 @@ CONFIG_SF_DEFAULT_MODE=0x0
CONFIG_ENV_SIZE=0x8000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-bob"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-bob"
CONFIG_SPL_TEXT_BASE=0xff8c2000
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-# CONFIG_OF_LIBFDT_OVERLAY is not set
+CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=0
@@ -227,13 +227,15 @@ CONFIG_ROCKCHIP_STIMER=y
CONFIG_ROCKCHIP_STIMER_BASE=0xff8680a0
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
# CONFIG_SPL_ROCKCHIP_EARLYRETURN_TO_BROM is not set
+CONFIG_ROCKCHIP_DISABLE_FORCE_JTAG=y
# CONFIG_SPL_MMC is not set
CONFIG_ROCKCHIP_SPI_IMAGE=y
+CONFIG_ROCKCHIP_COMMON_STACK_ADDR=y
CONFIG_SPL_SERIAL=y
CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
CONFIG_TPL_TEXT_BASE=0xff8c2000
CONFIG_TPL_STACK=0xff8effff
-CONFIG_SPL_DRIVERS_MISC=y
+# CONFIG_SPL_DRIVERS_MISC is not set
CONFIG_SPL_STACK_R_ADDR=0x04000000
CONFIG_TARGET_CHROMEBOOK_BOB=y
# CONFIG_TARGET_CHROMEBOOK_KEVIN is not set
@@ -242,16 +244,23 @@ CONFIG_TARGET_CHROMEBOOK_BOB=y
# CONFIG_TARGET_PINEPHONE_PRO_RK3399 is not set
# CONFIG_TARGET_PUMA_RK3399 is not set
# CONFIG_TARGET_ROCK960_RK3399 is not set
+# CONFIG_TARGET_ROCKPI4_RK3399 is not set
# CONFIG_TARGET_ROCKPRO64_RK3399 is not set
# CONFIG_TARGET_ROC_PC_RK3399 is not set
CONFIG_SPL_STACK=0xff8effff
CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xff8e0000
+CONFIG_SPL_BSS_MAX_SIZE=0x10000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_SYS_MALLOC_F=y
CONFIG_ERR_PTR_OFFSET=0x0
CONFIG_SPL_SIZE_LIMIT=0x0
CONFIG_SPL=y
CONFIG_PRE_CON_BUF_ADDR=0x0f200000
CONFIG_PRE_CON_BUF_SZ=4096
-CONFIG_BOOTSTAGE_STASH_ADDR=0
+CONFIG_BOOTSTAGE_STASH_ADDR=0x0
CONFIG_DEBUG_UART_BASE=0xff1a0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -265,7 +274,7 @@ CONFIG_SPL_SPI=y
# CONFIG_CMO_BY_VA_ONLY is not set
# CONFIG_ARMV8_SPL_EXCEPTION_VECTORS is not set
# CONFIG_ARMV8_MULTIENTRY is not set
-# CONFIG_ARMV8_SET_SMPEN is not set
+CONFIG_ARMV8_SET_SMPEN=y
# CONFIG_ARMV8_SWITCH_TO_EL1 is not set
#
@@ -277,7 +286,9 @@ CONFIG_SPL_SPI=y
CONFIG_PSCI_RESET=y
# CONFIG_ARMV8_PSCI is not set
# CONFIG_ARMV8_EA_EL3_FIRST is not set
-# CONFIG_ARMV8_CRYPTO is not set
+CONFIG_ARMV8_CRYPTO=y
+CONFIG_ARMV8_CE_SHA1=y
+CONFIG_ARMV8_CE_SHA256=y
# CONFIG_CMD_DEKBLOB is not set
# CONFIG_IMX_CAAM_DEK_ENCAP is not set
# CONFIG_IMX_OPTEE_DEK_ENCAP is not set
@@ -285,8 +296,6 @@ CONFIG_PSCI_RESET=y
# CONFIG_IMX_ELE_DEK_ENCAP is not set
# CONFIG_CMD_HDMIDETECT is not set
CONFIG_IMX_DCD_ADDR=0x00910000
-# CONFIG_SPL_LOAD_IMX_CONTAINER is not set
-CONFIG_IMX_CONTAINER_CFG=""
CONFIG_SYS_MEM_TOP_HIDE=0x0
CONFIG_SYS_LOAD_ADDR=0x800800
@@ -313,7 +322,7 @@ CONFIG_DEBUG_UART=y
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=130200
+CONFIG_GCC_VERSION=130300
CONFIG_CLANG_VERSION=0
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
# CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
@@ -346,6 +355,10 @@ CONFIG_STACK_SIZE=0x1000000
CONFIG_SYS_SRAM_BASE=0x0
CONFIG_SYS_SRAM_SIZE=0x0
# CONFIG_MP is not set
+CONFIG_HAVE_TEXT_BASE=y
+# CONFIG_HAVE_SYS_UBOOT_START is not set
+CONFIG_SYS_UBOOT_START=0x18000000
+# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
# CONFIG_API is not set
#
@@ -356,8 +369,8 @@ CONFIG_SYS_SRAM_SIZE=0x0
# Boot images
#
# CONFIG_ANDROID_BOOT_IMAGE is not set
-CONFIG_FIT=y
# CONFIG_TIMESTAMP is not set
+CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x0
CONFIG_FIT_FULL_CHECK=y
# CONFIG_FIT_SIGNATURE is not set
@@ -377,6 +390,8 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x0
CONFIG_SPL_FIT_SOURCE=""
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_PXE_UTILS=y
+CONFIG_BOOT_DEFAULTS_FEATURES=y
+CONFIG_BOOT_DEFAULTS_CMDS=y
CONFIG_BOOT_DEFAULTS=y
CONFIG_BOOTSTD=y
# CONFIG_SPL_BOOTSTD is not set
@@ -384,9 +399,11 @@ CONFIG_BOOTSTD_FULL=y
CONFIG_BOOTSTD_DEFAULTS=y
CONFIG_BOOTSTD_BOOTCOMMAND=y
CONFIG_BOOTMETH_GLOBAL=y
+# CONFIG_BOOTMETH_CROS is not set
CONFIG_BOOTMETH_EXTLINUX=y
CONFIG_BOOTMETH_EXTLINUX_PXE=y
CONFIG_BOOTMETH_EFILOADER=y
+CONFIG_BOOTMETH_EFI_BOOTMGR=y
CONFIG_BOOTMETH_VBE=y
CONFIG_BOOTMETH_DISTRO=y
# CONFIG_SPL_BOOTMETH_VBE is not set
@@ -398,13 +415,8 @@ CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
CONFIG_EXPO=y
CONFIG_BOOTMETH_SCRIPT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SUPPORT_RAW_INITRD=y
-# CONFIG_OF_BOARD_SETUP is not set
-# CONFIG_OF_SYSTEM_SETUP is not set
-# CONFIG_OF_STDOUT_VIA_ALIAS is not set
-CONFIG_HAVE_TEXT_BASE=y
-# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
-CONFIG_ARCH_FIXUP_FDT_MEMORY=y
# CONFIG_CHROMEOS is not set
# CONFIG_CHROMEOS_VBOOT is not set
# CONFIG_RAMBOOT_PBL is not set
@@ -444,6 +456,17 @@ CONFIG_BOOTDELAY=2
# Image support
#
# CONFIG_IMAGE_PRE_LOAD is not set
+
+#
+# Devicetree fixup
+#
+# CONFIG_OF_ENV_SETUP is not set
+# CONFIG_OF_BOARD_SETUP is not set
+# CONFIG_OF_SYSTEM_SETUP is not set
+# CONFIG_OF_STDOUT_VIA_ALIAS is not set
+# CONFIG_FDT_FIXUP_PARTITIONS is not set
+# CONFIG_FDT_SIMPLEFB is not set
+CONFIG_ARCH_FIXUP_FDT_MEMORY=y
# CONFIG_USE_BOOTARGS is not set
# CONFIG_BOOTARGS_SUBST is not set
CONFIG_USE_BOOTCOMMAND=y
@@ -463,6 +486,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
#
CONFIG_MENU=y
# CONFIG_CONSOLE_RECORD is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1044
# CONFIG_DISABLE_CONSOLE is not set
CONFIG_LOGLEVEL=4
CONFIG_SPL_LOGLEVEL=4
@@ -471,6 +496,7 @@ CONFIG_SPL_LOGLEVEL=4
# CONFIG_TPL_SILENT_CONSOLE is not set
CONFIG_PRE_CONSOLE_BUFFER=y
CONFIG_CONSOLE_FLUSH_SUPPORT=y
+# CONFIG_CONSOLE_FLUSH_ON_NEWLINE is not set
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
@@ -517,7 +543,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_BOARD_LATE_INIT=y
# CONFIG_CLOCKS is not set
# CONFIG_HWCONFIG is not set
-# CONFIG_LAST_STAGE_INIT is not set
+CONFIG_LAST_STAGE_INIT=y
CONFIG_MISC_INIT_R=y
# CONFIG_SYS_MALLOC_BOOTPARAMS is not set
# CONFIG_ID_EEPROM is not set
@@ -557,14 +583,11 @@ CONFIG_SUPPORT_TPL=y
#
CONFIG_SPL_FRAMEWORK=y
# CONFIG_SPL_FRAMEWORK_BOARD_INIT_F is not set
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x1e000
CONFIG_SPL_PAD_TO=0x7f8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xff8e0000
# CONFIG_SPL_NO_BSS_LIMIT is not set
CONFIG_SPL_BSS_LIMIT=y
# CONFIG_SPL_FOOTPRINT_LIMIT is not set
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL_SYS_STACK_F_CHECK_BYTE=0xaa
# CONFIG_SPL_SYS_REPORT_STACK_F_USAGE is not set
# CONFIG_SPL_SHOW_ERRORS is not set
@@ -576,12 +599,11 @@ CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_BOOTROM_SUPPORT is not set
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
+# CONFIG_SPL_LOAD_IMX_CONTAINER is not set
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
CONFIG_SPL_SEPARATE_BSS=y
-# CONFIG_SYS_SPL_MALLOC is not set
+# CONFIG_SPL_SYS_MALLOC is not set
CONFIG_SPL_BANNER_PRINT=y
# CONFIG_SPL_DISPLAY_PRINT is not set
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
@@ -602,7 +624,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x0
# CONFIG_SPL_DM_MAILBOX is not set
# CONFIG_SPL_MEMORY is not set
# CONFIG_SPL_MPC8XXX_INIT_DDR is not set
-# CONFIG_SPL_MTD_SUPPORT is not set
+# CONFIG_SPL_MTD is not set
# CONFIG_SPL_MUSB_NEW is not set
# CONFIG_SPL_NAND_SUPPORT is not set
# CONFIG_SPL_NAND_DRIVERS is not set
@@ -640,23 +662,21 @@ CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_SPL_TARGET=""
# CONFIG_TPL is not set
# CONFIG_VPL is not set
-# CONFIG_FDT_SIMPLEFB is not set
-# CONFIG_BMP is not set
+CONFIG_CMDLINE=y
+CONFIG_HUSH_PARSER=y
#
-# Command line interface
+# Hush flavor to use
#
-CONFIG_CMDLINE=y
-CONFIG_HUSH_PARSER=y
+CONFIG_HUSH_OLD_PARSER=y
+# CONFIG_HUSH_MODERN_PARSER is not set
CONFIG_CMDLINE_EDITING=y
# CONFIG_CMDLINE_PS_SUPPORT is not set
CONFIG_AUTO_COMPLETE=y
CONFIG_SYS_LONGHELP=y
CONFIG_SYS_PROMPT="=> "
CONFIG_SYS_PROMPT_HUSH_PS2="> "
-CONFIG_SYS_MAXARGS=16
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1044
+CONFIG_SYS_MAXARGS=64
CONFIG_SYS_XTRACE=y
#
@@ -670,8 +690,10 @@ CONFIG_CMD_BDI=y
# CONFIG_CMD_BDINFO_EXTRA is not set
# CONFIG_CMD_CONFIG is not set
CONFIG_CMD_CONSOLE=y
+# CONFIG_CMD_HISTORY is not set
# CONFIG_CMD_LICENSE is not set
# CONFIG_CMD_PMC is not set
+# CONFIG_CMD_SMBIOS is not set
#
# Boot commands
@@ -693,24 +715,24 @@ CONFIG_BOOTM_PLAN9=y
CONFIG_BOOTM_RTEMS=y
CONFIG_CMD_VBE=y
CONFIG_BOOTM_VXWORKS=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_BOOTEFI=y
+CONFIG_CMD_BOOTEFI_BINARY=y
+CONFIG_CMD_BOOTEFI_BOOTMGR=y
CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
CONFIG_CMD_BOOTEFI_HELLO=y
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_ADTIMG is not set
CONFIG_CMD_ELF=y
+# CONFIG_CMD_ELF_FDT_SETUP is not set
CONFIG_CMD_FDT=y
CONFIG_CMD_GO=y
CONFIG_CMD_RUN=y
CONFIG_CMD_IMI=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_XIMG=y
-# CONFIG_CMD_XXD is not set
+CONFIG_SYS_XIMG_LEN=0x800000
# CONFIG_CMD_SPL is not set
-# CONFIG_CMD_THOR_DOWNLOAD is not set
-# CONFIG_CMD_ZBOOT is not set
#
# Environment commands
@@ -776,7 +798,6 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_GPIO_READ is not set
# CONFIG_CMD_PWM is not set
CONFIG_CMD_GPT=y
-CONFIG_RANDOM_UUID=y
# CONFIG_CMD_GPT_RENAME is not set
# CONFIG_CMD_IDE is not set
# CONFIG_CMD_IO is not set
@@ -794,8 +815,11 @@ CONFIG_CMD_LOADXY_TIMEOUT=90
# CONFIG_CMD_MISC is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_BKOPS_ENABLE is not set
+# CONFIG_CMD_MMC_REG is not set
# CONFIG_CMD_MMC_SWRITE is not set
# CONFIG_CMD_CLONE is not set
+# CONFIG_CMD_MTD is not set
+# CONFIG_CMD_ONENAND is not set
# CONFIG_CMD_OSD is not set
CONFIG_CMD_PART=y
# CONFIG_CMD_PCI is not set
@@ -808,11 +832,12 @@ CONFIG_CMD_SF=y
CONFIG_CMD_SF_TEST=y
CONFIG_CMD_SPI=y
CONFIG_DEFAULT_SPI_BUS=0
-CONFIG_DEFAULT_SPI_MODE=0
+CONFIG_DEFAULT_SPI_MODE=0x0
# CONFIG_CMD_TSI148 is not set
# CONFIG_CMD_UNIVERSE is not set
CONFIG_CMD_USB=y
# CONFIG_CMD_USB_SDP is not set
+# CONFIG_CMD_RKMTD is not set
# CONFIG_CMD_WRITE is not set
#
@@ -823,6 +848,7 @@ CONFIG_CMD_ECHO=y
CONFIG_CMD_ITEST=y
CONFIG_CMD_SOURCE=y
# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_XXD is not set
#
# Android support commands
@@ -845,6 +871,7 @@ CONFIG_BOOTP_SUBNETMASK=y
# CONFIG_CMD_PCAP is not set
CONFIG_BOOTP_PXE=y
CONFIG_BOOTP_PXE_CLIENTARCH=0x16
+# CONFIG_BOOTP_PXE_DHCP_OPTION is not set
CONFIG_BOOTP_VCI_STRING="U-Boot.armv8"
CONFIG_CMD_TFTPBOOT=y
# CONFIG_CMD_TFTPPUT is not set
@@ -898,7 +925,6 @@ CONFIG_CMD_VIDCONSOLE=y
#
# TI specific command line interface
#
-# CONFIG_CMD_DDR3 is not set
#
# Power commands
@@ -933,9 +959,9 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
# CONFIG_CMD_FS_UUID is not set
# CONFIG_CMD_JFFS2 is not set
+# CONFIG_CMD_MTDPARTS is not set
CONFIG_MTDIDS_DEFAULT=""
CONFIG_MTDPARTS_DEFAULT=""
-# CONFIG_CMD_REISER is not set
# CONFIG_CMD_ZFS is not set
#
@@ -979,16 +1005,18 @@ CONFIG_BINMAN=y
CONFIG_OF_CONTROL=y
CONFIG_OF_REAL=y
CONFIG_SPL_OF_CONTROL=y
-# CONFIG_OF_LIVE is not set
+CONFIG_OF_LIVE=y
+CONFIG_OF_UPSTREAM=y
+# CONFIG_OF_UPSTREAM_BUILD_VENDOR is not set
CONFIG_OF_SEPARATE=y
# CONFIG_OF_EMBED is not set
# CONFIG_OF_BOARD is not set
# CONFIG_OF_OMIT_DTB is not set
CONFIG_DEVICE_TREE_INCLUDES=""
-CONFIG_OF_LIST="rk3399-gru-bob"
+CONFIG_OF_LIST="rockchip/rk3399-gru-bob"
# CONFIG_MULTI_DTB_FIT is not set
# CONFIG_SPL_MULTI_DTB_FIT is not set
-CONFIG_SPL_OF_LIST="rk3399-gru-bob"
+CONFIG_SPL_OF_LIST="rockchip/rk3399-gru-bob"
CONFIG_OF_TAG_MIGRATE=y
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
# CONFIG_OF_DTB_PROPS_REMOVE is not set
@@ -1066,10 +1094,11 @@ CONFIG_SYS_RX_ETH_BUFFER=4
#
CONFIG_DM=y
CONFIG_SPL_DM=y
-CONFIG_DM_WARN=y
+# CONFIG_DM_WARN is not set
# CONFIG_SPL_DM_WARN is not set
# CONFIG_DM_DEBUG is not set
# CONFIG_DM_STATS is not set
+# CONFIG_SPL_DM_STATS is not set
CONFIG_DM_DEVICE_REMOVE=y
CONFIG_DM_EVENT=y
# CONFIG_SPL_DM_DEVICE_REMOVE is not set
@@ -1089,8 +1118,8 @@ CONFIG_SPL_SIMPLE_BUS=y
CONFIG_OF_TRANSLATE=y
# CONFIG_SPL_OF_TRANSLATE is not set
# CONFIG_TRANSLATION_OFFSET is not set
-CONFIG_DM_DEV_READ_INLINE=y
-# CONFIG_OFNODE_MULTI_TREE is not set
+CONFIG_OFNODE_MULTI_TREE=y
+CONFIG_OFNODE_MULTI_TREE_MAX=4
CONFIG_BOUNCE_BUFFER=y
CONFIG_ADC=y
# CONFIG_ADC_EXYNOS is not set
@@ -1119,6 +1148,7 @@ CONFIG_BLOCK_CACHE=y
# CONFIG_IDE is not set
# CONFIG_LBA48 is not set
# CONFIG_SYS_64BIT_LBA is not set
+# CONFIG_RKMTD is not set
# CONFIG_BOOTCOUNT_LIMIT is not set
#
@@ -1131,9 +1161,10 @@ CONFIG_BLOCK_CACHE=y
#
# CONFIG_CACHE is not set
# CONFIG_L2X0_CACHE is not set
-# CONFIG_V5L2_CACHE is not set
+# CONFIG_ANDES_L2_CACHE is not set
# CONFIG_NCORE_CACHE is not set
# CONFIG_SIFIVE_CCACHE is not set
+# CONFIG_SIFIVE_PL2 is not set
#
# Clock
@@ -1142,6 +1173,8 @@ CONFIG_CLK=y
CONFIG_SPL_CLK=y
# CONFIG_SPL_CLK_CCF is not set
# CONFIG_CLK_CCF is not set
+# CONFIG_CLK_GPIO is not set
+# CONFIG_SPL_CLK_GPIO is not set
# CONFIG_CLK_CDCE9XX is not set
# CONFIG_CLK_ICS8N3QV01 is not set
# CONFIG_CLK_K210 is not set
@@ -1266,7 +1299,6 @@ CONFIG_ROCKCHIP_GPIO=y
# CONFIG_NOMADIK_GPIO is not set
# CONFIG_ZYNQMP_GPIO_MODEPIN is not set
# CONFIG_SLG7XL45106_I2C_GPO is not set
-# CONFIG_TURRIS_OMNIA_MCU is not set
# CONFIG_FTGPIO010 is not set
# CONFIG_ADP5585_GPIO is not set
@@ -1351,6 +1383,7 @@ CONFIG_SPL_MISC=y
# CONFIG_GATEWORKS_SC is not set
CONFIG_ROCKCHIP_EFUSE=y
# CONFIG_ROCKCHIP_OTP is not set
+CONFIG_ROCKCHIP_IODOMAIN=y
# CONFIG_SIFIVE_OTP is not set
# CONFIG_SMSC_LPC47M is not set
# CONFIG_SMSC_SIO1007 is not set
@@ -1370,6 +1403,7 @@ CONFIG_PWRSEQ=y
# CONFIG_SPL_PWRSEQ is not set
# CONFIG_PCA9551_LED is not set
# CONFIG_TEST_DRV is not set
+# CONFIG_TURRIS_OMNIA_MCU is not set
# CONFIG_USB_HUB_USB251XB is not set
# CONFIG_TWL4030_LED is not set
# CONFIG_WINBOND_W83627 is not set
@@ -1385,6 +1419,7 @@ CONFIG_PWRSEQ=y
# CONFIG_MICROCHIP_FLEXCOM is not set
# CONFIG_ESM_PMIC is not set
# CONFIG_SL28CPLD is not set
+# CONFIG_SPL_SOCFPGA_DT_REG is not set
#
# MMC Host controller Support
@@ -1420,8 +1455,11 @@ CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
# CONFIG_MMC_SDHCI_ADMA is not set
+# CONFIG_MMC_SDHCI_ADMA_FORCE_32BIT is not set
+CONFIG_MMC_SDHCI_ADMA_64BIT=y
# CONFIG_MMC_SDHCI_BCMSTB is not set
# CONFIG_MMC_SDHCI_CADENCE is not set
+# CONFIG_MMC_SDHCI_CV1800B is not set
# CONFIG_MMC_SDHCI_IPROC is not set
# CONFIG_MMC_SDHCI_F_SDH30 is not set
# CONFIG_MMC_SDHCI_KONA is not set
@@ -1442,9 +1480,11 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
#
# MTD Support
#
-# CONFIG_MTD is not set
+CONFIG_MTD=y
# CONFIG_DM_MTD is not set
# CONFIG_MTD_NOR_FLASH is not set
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_SYS_MTDPARTS_RUNTIME is not set
# CONFIG_FLASH_CFI_DRIVER is not set
# CONFIG_HBMC_AM654 is not set
# CONFIG_SAMSUNG_ONENAND is not set
@@ -1464,20 +1504,24 @@ CONFIG_SPI_FLASH_SMART_HWCAPS=y
# CONFIG_SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT is not set
# CONFIG_SPI_FLASH_SOFT_RESET is not set
# CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_LOCK=y
CONFIG_SPI_FLASH_UNLOCK_ALL=y
# CONFIG_SPI_FLASH_ATMEL is not set
# CONFIG_SPI_FLASH_EON is not set
CONFIG_SPI_FLASH_GIGADEVICE=y
# CONFIG_SPI_FLASH_ISSI is not set
# CONFIG_SPI_FLASH_MACRONIX is not set
+# CONFIG_SPI_FLASH_SILICONKAISER is not set
# CONFIG_SPI_FLASH_SPANSION is not set
# CONFIG_SPI_FLASH_STMICRO is not set
# CONFIG_SPI_FLASH_SST is not set
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_XMC is not set
# CONFIG_SPI_FLASH_XTX is not set
+# CONFIG_SPI_FLASH_ZBIT is not set
CONFIG_SPI_FLASH_USE_4K_SECTORS=y
# CONFIG_SPI_FLASH_DATAFLASH is not set
+# CONFIG_SPI_FLASH_MTD is not set
#
# UBI support
@@ -1538,7 +1582,7 @@ CONFIG_DM_ETH=y
# CONFIG_DM_MDIO is not set
# CONFIG_DM_ETH_PHY is not set
CONFIG_NETDEVICES=y
-# CONFIG_PHY_GIGE is not set
+CONFIG_PHY_GIGE=y
# CONFIG_ALTERA_TSE is not set
# CONFIG_BCM_SF2_ETH is not set
# CONFIG_BCMGENET is not set
@@ -1557,7 +1601,6 @@ CONFIG_ETH_DESIGNWARE=y
# CONFIG_FTMAC100 is not set
# CONFIG_FTGMAC100 is not set
# CONFIG_MCFFEC is not set
-# CONFIG_FSLDMAFEC is not set
# CONFIG_KS8851_MLL is not set
# CONFIG_LITEETH is not set
# CONFIG_MACB is not set
@@ -1586,6 +1629,7 @@ CONFIG_GMAC_ROCKCHIP=y
# CONFIG_SYS_DPAA_QBMAN is not set
# CONFIG_TSEC_ENET is not set
# CONFIG_MEDIATEK_ETH is not set
+# CONFIG_HIFEMAC_ETH is not set
# CONFIG_HIGMACV300_ETH is not set
# CONFIG_NVME is not set
# CONFIG_NVME_APPLE is not set
@@ -1611,6 +1655,7 @@ CONFIG_PHY=y
# Rockchip PHY driver
#
# CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set
+# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
# CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY is not set
# CONFIG_PHY_ROCKCHIP_PCIE is not set
@@ -1649,6 +1694,8 @@ CONFIG_SPL_PINCONF_RECURSIVE=y
# CONFIG_PINCTRL_K210 is not set
CONFIG_PINCTRL_ROCKCHIP=y
CONFIG_SPL_PINCTRL_ROCKCHIP=y
+# CONFIG_PINCTRL_TEGRA is not set
+# CONFIG_SPL_PINCTRL_TEGRA is not set
CONFIG_POWER=y
# CONFIG_POWER_LEGACY is not set
# CONFIG_ACPI_PMC is not set
@@ -1678,6 +1725,7 @@ CONFIG_SPL_PMIC_CHILDREN=y
# CONFIG_SPL_DM_PMIC_PCA9450 is not set
# CONFIG_DM_PMIC_PFUZE100 is not set
# CONFIG_SPL_DM_PMIC_PFUZE100 is not set
+# CONFIG_DM_PMIC_MAX77663 is not set
# CONFIG_DM_PMIC_MAX77686 is not set
# CONFIG_DM_PMIC_MAX8998 is not set
# CONFIG_DM_PMIC_MC34708 is not set
@@ -1695,12 +1743,14 @@ CONFIG_PMIC_RK8XX=y
# CONFIG_PMIC_LP873X is not set
# CONFIG_PMIC_LP87565 is not set
# CONFIG_DM_PMIC_TPS65910 is not set
+# CONFIG_DM_PMIC_TPS80031 is not set
# CONFIG_PMIC_STPMIC1 is not set
# CONFIG_SPL_PMIC_PALMAS is not set
# CONFIG_SPL_PMIC_LP873X is not set
# CONFIG_SPL_PMIC_LP87565 is not set
# CONFIG_PMIC_TPS65941 is not set
# CONFIG_PMIC_TPS65219 is not set
+# CONFIG_PMIC_RAA215300 is not set
# CONFIG_PMIC_TPS65217 is not set
# CONFIG_POWER_TPS65218 is not set
# CONFIG_POWER_TPS62362 is not set
@@ -1758,6 +1808,7 @@ CONFIG_RAM_ROCKCHIP_DEBUG=y
#
# Remote Processor drivers
#
+CONFIG_REMOTEPROC_MAX_FW_SIZE=0x10000
#
# Reset Controller Support
@@ -1770,11 +1821,13 @@ CONFIG_RESET_ROCKCHIP=y
# CONFIG_RESET_SCMI is not set
# CONFIG_RESET_DRA7 is not set
CONFIG_DM_RNG=y
+# CONFIG_SPL_DM_RNG is not set
# CONFIG_RNG_MSM is not set
# CONFIG_RNG_NPCM is not set
CONFIG_RNG_ROCKCHIP=y
# CONFIG_RNG_IPROC200 is not set
# CONFIG_RNG_SMCCC_TRNG is not set
+# CONFIG_RNG_ARM_RNDR is not set
#
# Real Time Clock
@@ -1794,9 +1847,9 @@ CONFIG_RNG_ROCKCHIP=y
# CONFIG_RTC_MC146818 is not set
# CONFIG_RTC_M41T62 is not set
# CONFIG_SCSI is not set
-# CONFIG_DM_SCSI is not set
CONFIG_SERIAL=y
CONFIG_BAUDRATE=115200
+# CONFIG_DEFAULT_ENV_IS_RW is not set
CONFIG_REQUIRE_SERIAL_CONSOLE=y
# CONFIG_SPECIFY_CONSOLE_INDEX is not set
CONFIG_SERIAL_PRESENT=y
@@ -1838,11 +1891,14 @@ CONFIG_SYS_NS16550_MEM32=y
# CONFIG_MSM_GENI_SERIAL is not set
# CONFIG_MXS_AUART_SERIAL is not set
# CONFIG_OMAP_SERIAL is not set
+# CONFIG_HTIF_CONSOLE is not set
# CONFIG_SIFIVE_SERIAL is not set
# CONFIG_ZYNQ_SERIAL is not set
# CONFIG_MTK_SERIAL is not set
# CONFIG_MT7620_SERIAL is not set
# CONFIG_NPCM_SERIAL is not set
+# CONFIG_SM is not set
+# CONFIG_MESON_SM is not set
# CONFIG_SMEM is not set
#
@@ -1854,6 +1910,7 @@ CONFIG_SYS_NS16550_MEM32=y
# SOC (System On Chip) specific Drivers
#
# CONFIG_SOC_DEVICE is not set
+# CONFIG_SOC_SAMSUNG is not set
# CONFIG_SOC_TI is not set
CONFIG_SPI=y
CONFIG_DM_SPI=y
@@ -1867,6 +1924,7 @@ CONFIG_SPI_MEM=y
# CONFIG_CORTINA_SFLASH is not set
# CONFIG_CADENCE_QSPI is not set
# CONFIG_CF_SPI is not set
+# CONFIG_CV1800B_SPIF is not set
# CONFIG_DESIGNWARE_SPI is not set
# CONFIG_EXYNOS_SPI is not set
# CONFIG_FSL_DSPI is not set
@@ -1919,7 +1977,8 @@ CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_CMD_RESET=y
-# CONFIG_SYSRESET_CMD_POWEROFF is not set
+CONFIG_SYSRESET_CMD_POWEROFF=y
+# CONFIG_SYSRESET_CV1800B is not set
# CONFIG_POWEROFF_GPIO is not set
# CONFIG_SYSRESET_GPIO is not set
# CONFIG_SYSRESET_PSCI is not set
@@ -1950,9 +2009,8 @@ CONFIG_SPL_DM_USB=y
CONFIG_USB_HOST=y
# CONFIG_SPL_USB_HOST is not set
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
-CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y
-# CONFIG_USB_XHCI_PCI is not set
+# CONFIG_USB_XHCI_DWC3 is not set
+# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
# CONFIG_USB_XHCI_FSL is not set
# CONFIG_USB_XHCI_BRCM is not set
CONFIG_USB_EHCI_HCD=y
@@ -1977,7 +2035,7 @@ CONFIG_USB_DWC3=y
# Platform Glue Driver Support
#
# CONFIG_USB_DWC3_OMAP is not set
-# CONFIG_USB_DWC3_GENERIC is not set
+CONFIG_USB_DWC3_GENERIC=y
# CONFIG_SPL_USB_DWC3_GENERIC is not set
# CONFIG_USB_DWC3_LAYERSCAPE is not set
@@ -2046,7 +2104,7 @@ CONFIG_VIDEO_FONT_8X16=y
# CONFIG_VIDEO_FONT_16X32 is not set
CONFIG_VIDEO_LOGO=y
CONFIG_BACKLIGHT=y
-CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0
+CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0x0
# CONFIG_VIDEO_COPY is not set
CONFIG_VIDEO_DAMAGE=y
CONFIG_BACKLIGHT_PWM=y
@@ -2077,9 +2135,11 @@ CONFIG_SIMPLE_PANEL=y
# CONFIG_VIDEO_LCD_ENDEAVORU is not set
# CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
# CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
+# CONFIG_VIDEO_LCD_LG_LD070WX3 is not set
# CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
# CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
# CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
+# CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02 is not set
# CONFIG_VIDEO_LCD_SSD2828 is not set
# CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
# CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
@@ -2106,7 +2166,9 @@ CONFIG_DISPLAY_ROCKCHIP_EDP=y
# CONFIG_VIDEO_TIDSS is not set
# CONFIG_VIDEO_TEGRA124 is not set
# CONFIG_VIDEO_BRIDGE is not set
+# CONFIG_VIDEO_BRIDGE_PARADE_DP501 is not set
# CONFIG_VIDEO_BRIDGE_SOLOMON_SSD2825 is not set
+# CONFIG_VIDEO_BRIDGE_TOSHIBA_TC358768 is not set
# CONFIG_VIDEO_TEGRA20 is not set
# CONFIG_VIDEO_DSI_TEGRA30 is not set
# CONFIG_TEGRA_BACKLIGHT_PWM is not set
@@ -2119,6 +2181,7 @@ CONFIG_CONSOLE_SCROLL_LINES=1
# CONFIG_OSD is not set
# CONFIG_VIDEO_REMOVE is not set
# CONFIG_SPLASH_SCREEN is not set
+# CONFIG_BMP is not set
CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
CONFIG_VIDEO_BMP_RLE8=y
# CONFIG_BMP_16BPP is not set
@@ -2183,6 +2246,7 @@ CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
CONFIG_CHARSET=y
# CONFIG_DYNAMIC_CRC_TABLE is not set
CONFIG_LIB_UUID=y
+CONFIG_RANDOM_UUID=y
CONFIG_SPL_LIB_UUID=y
# CONFIG_SEMIHOSTING is not set
# CONFIG_SPL_SEMIHOSTING is not set
@@ -2200,6 +2264,7 @@ CONFIG_LIB_RAND=y
# CONFIG_LIB_HW_RAND is not set
CONFIG_SUPPORT_ACPI=y
# CONFIG_ACPI is not set
+# CONFIG_SPL_ACPI is not set
# CONFIG_SPL_TINY_MEMSET is not set
# CONFIG_BITREVERSE is not set
# CONFIG_TRACE is not set
@@ -2238,6 +2303,7 @@ CONFIG_MD5=y
# CONFIG_SPL_MD5 is not set
CONFIG_CRC8=y
# CONFIG_SPL_CRC8 is not set
+# CONFIG_SPL_CRC16 is not set
CONFIG_CRC32=y
#
@@ -2262,7 +2328,7 @@ CONFIG_ERRNO_STR=y
# CONFIG_HEXDUMP is not set
CONFIG_GETOPT=y
CONFIG_OF_LIBFDT=y
-CONFIG_OF_LIBFDT_ASSUME_MASK=0
+CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
CONFIG_SYS_FDT_PAD=0x3000
CONFIG_SPL_OF_LIBFDT=y
CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff
@@ -2273,13 +2339,15 @@ CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff
CONFIG_GENERATE_SMBIOS_TABLE=y
# CONFIG_LIB_RATIONAL is not set
# CONFIG_SPL_LIB_RATIONAL is not set
+CONFIG_SMBIOS=y
# CONFIG_SMBIOS_PARSER is not set
CONFIG_EFI_LOADER=y
-CONFIG_CMD_BOOTEFI_BOOTMGR=y
+CONFIG_EFI_BINARY_EXEC=y
+CONFIG_EFI_BOOTMGR=y
# CONFIG_EFI_VARIABLE_FILE_STORE is not set
CONFIG_EFI_VARIABLE_NO_STORE=y
# CONFIG_EFI_VARIABLES_PRESEED is not set
-CONFIG_EFI_VAR_BUF_SIZE=65536
+CONFIG_EFI_VAR_BUF_SIZE=131072
# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
# CONFIG_EFI_CAPSULE_ON_DISK is not set
@@ -2297,6 +2365,7 @@ CONFIG_EFI_RNG_PROTOCOL=y
CONFIG_EFI_LOAD_FILE2_INITRD=y
CONFIG_EFI_ECPT=y
CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
+# CONFIG_EFI_HTTP_BOOT is not set
# CONFIG_OPTEE_LIB is not set
# CONFIG_OPTEE_IMAGE is not set
# CONFIG_BOOTM_OPTEE is not set
@@ -2308,15 +2377,11 @@ CONFIG_LMB_MAX_REGIONS=16
# CONFIG_PHANDLE_CHECK_SEQ is not set
#
-# FWU Multi Bank Updates
-#
-# CONFIG_POST is not set
-
-#
-# Unit tests
+# Testing
#
# CONFIG_UNIT_TEST is not set
# CONFIG_SPL_UNIT_TEST is not set
+# CONFIG_POST is not set
#
# Tools options
@@ -2324,6 +2389,7 @@ CONFIG_LMB_MAX_REGIONS=16
CONFIG_MKIMAGE_DTC_PATH="dtc"
CONFIG_TOOLS_CRC32=y
CONFIG_TOOLS_LIBCRYPTO=y
+CONFIG_TOOLS_KWBIMAGE=y
CONFIG_TOOLS_FIT=y
CONFIG_TOOLS_FIT_FULL_CHECK=y
CONFIG_TOOLS_FIT_PRINT=y
diff --git a/config/u-boot/gru_kevin/config/default b/config/u-boot/gru_kevin/config/default
index 466bc96d..1bf46d24 100644
--- a/config/u-boot/gru_kevin/config/default
+++ b/config/u-boot/gru_kevin/config/default
@@ -1,13 +1,14 @@
#
# Automatically generated file; DO NOT EDIT.
-# U-Boot 2023.10 Configuration
+# U-Boot 2024.07 Configuration
#
#
-# Compiler: gcc (Debian 13.2.0-5) 13.2.0
+# Compiler: gcc (Debian 13.3.0-2) 13.3.0
#
CONFIG_CREATE_ARCH_SYMLINK=y
CONFIG_SYS_CACHE_SHIFT_6=y
+CONFIG_64BIT=y
CONFIG_SYS_CACHELINE_SIZE=64
CONFIG_LINKER_LIST_ALIGN=8
# CONFIG_ARC is not set
@@ -40,7 +41,7 @@ CONFIG_SKIP_LOWLEVEL_INIT=y
# CONFIG_SYS_ICACHE_OFF is not set
# CONFIG_SPL_SYS_ICACHE_OFF is not set
# CONFIG_SYS_DCACHE_OFF is not set
-# CONFIG_SPL_SYS_DCACHE_OFF is not set
+CONFIG_SPL_SYS_DCACHE_OFF=y
#
# ARM architecture
@@ -53,6 +54,7 @@ CONFIG_INIT_SP_RELATIVE=y
CONFIG_SYS_INIT_SP_BSS_OFFSET=524288
CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE=0x18000000
# CONFIG_GIC_V3_ITS is not set
+# CONFIG_GICV3_SUPPORT_GIC600 is not set
CONFIG_STATIC_RELA=y
CONFIG_DMA_ADDR_T_64BIT=y
CONFIG_ARM_ASM_UNIFIED=y
@@ -81,13 +83,11 @@ CONFIG_ARM64_SUPPORT_AARCH32=y
# CONFIG_ARCH_KIRKWOOD is not set
# CONFIG_ARCH_MVEBU is not set
# CONFIG_ARCH_ORION5X is not set
-# CONFIG_TARGET_STV0991 is not set
# CONFIG_ARCH_BCM283X is not set
# CONFIG_ARCH_BCMSTB is not set
# CONFIG_ARCH_BCMBCA is not set
# CONFIG_TARGET_VEXPRESS_CA9X4 is not set
# CONFIG_TARGET_BCMNS is not set
-# CONFIG_TARGET_BCMNS2 is not set
# CONFIG_TARGET_BCMNS3 is not set
# CONFIG_ARCH_EXYNOS is not set
# CONFIG_ARCH_S5PC1XX is not set
@@ -117,7 +117,7 @@ CONFIG_ARM64_SUPPORT_AARCH32=y
# CONFIG_ARCH_APPLE is not set
# CONFIG_ARCH_OWL is not set
# CONFIG_ARCH_QEMU is not set
-# CONFIG_ARCH_RMOBILE is not set
+# CONFIG_ARCH_RENESAS is not set
# CONFIG_ARCH_SNAPDRAGON is not set
# CONFIG_ARCH_SOCFPGA is not set
# CONFIG_ARCH_SUNXI is not set
@@ -176,6 +176,7 @@ CONFIG_ARCH_ROCKCHIP=y
# CONFIG_ARCH_ASPEED is not set
# CONFIG_TARGET_DURIAN is not set
# CONFIG_TARGET_POMELO is not set
+# CONFIG_TARGET_PE2201 is not set
# CONFIG_TARGET_PRESIDIO_ASIC is not set
# CONFIG_TARGET_XENGUEST_ARM64 is not set
# CONFIG_ARCH_GXP is not set
@@ -194,10 +195,9 @@ CONFIG_SF_DEFAULT_MODE=0x0
CONFIG_ENV_SIZE=0x8000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-kevin"
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-kevin"
CONFIG_SPL_TEXT_BASE=0xff8c2000
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-# CONFIG_OF_LIBFDT_OVERLAY is not set
+CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
CONFIG_DM_RESET=y
CONFIG_SYS_MONITOR_LEN=0
@@ -227,13 +227,15 @@ CONFIG_ROCKCHIP_STIMER=y
CONFIG_ROCKCHIP_STIMER_BASE=0xff8680a0
CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
# CONFIG_SPL_ROCKCHIP_EARLYRETURN_TO_BROM is not set
+CONFIG_ROCKCHIP_DISABLE_FORCE_JTAG=y
# CONFIG_SPL_MMC is not set
CONFIG_ROCKCHIP_SPI_IMAGE=y
+CONFIG_ROCKCHIP_COMMON_STACK_ADDR=y
CONFIG_SPL_SERIAL=y
CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
CONFIG_TPL_TEXT_BASE=0xff8c2000
CONFIG_TPL_STACK=0xff8effff
-CONFIG_SPL_DRIVERS_MISC=y
+# CONFIG_SPL_DRIVERS_MISC is not set
CONFIG_SPL_STACK_R_ADDR=0x04000000
# CONFIG_TARGET_CHROMEBOOK_BOB is not set
CONFIG_TARGET_CHROMEBOOK_KEVIN=y
@@ -242,16 +244,23 @@ CONFIG_TARGET_CHROMEBOOK_KEVIN=y
# CONFIG_TARGET_PINEPHONE_PRO_RK3399 is not set
# CONFIG_TARGET_PUMA_RK3399 is not set
# CONFIG_TARGET_ROCK960_RK3399 is not set
+# CONFIG_TARGET_ROCKPI4_RK3399 is not set
# CONFIG_TARGET_ROCKPRO64_RK3399 is not set
# CONFIG_TARGET_ROC_PC_RK3399 is not set
CONFIG_SPL_STACK=0xff8effff
CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0xff8e0000
+CONFIG_SPL_BSS_MAX_SIZE=0x10000
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_SYS_MALLOC_F=y
CONFIG_ERR_PTR_OFFSET=0x0
CONFIG_SPL_SIZE_LIMIT=0x0
CONFIG_SPL=y
CONFIG_PRE_CON_BUF_ADDR=0x0f200000
CONFIG_PRE_CON_BUF_SZ=4096
-CONFIG_BOOTSTAGE_STASH_ADDR=0
+CONFIG_BOOTSTAGE_STASH_ADDR=0x0
CONFIG_DEBUG_UART_BASE=0xff1a0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -265,7 +274,7 @@ CONFIG_SPL_SPI=y
# CONFIG_CMO_BY_VA_ONLY is not set
# CONFIG_ARMV8_SPL_EXCEPTION_VECTORS is not set
# CONFIG_ARMV8_MULTIENTRY is not set
-# CONFIG_ARMV8_SET_SMPEN is not set
+CONFIG_ARMV8_SET_SMPEN=y
# CONFIG_ARMV8_SWITCH_TO_EL1 is not set
#
@@ -277,7 +286,9 @@ CONFIG_SPL_SPI=y
CONFIG_PSCI_RESET=y
# CONFIG_ARMV8_PSCI is not set
# CONFIG_ARMV8_EA_EL3_FIRST is not set
-# CONFIG_ARMV8_CRYPTO is not set
+CONFIG_ARMV8_CRYPTO=y
+CONFIG_ARMV8_CE_SHA1=y
+CONFIG_ARMV8_CE_SHA256=y
# CONFIG_CMD_DEKBLOB is not set
# CONFIG_IMX_CAAM_DEK_ENCAP is not set
# CONFIG_IMX_OPTEE_DEK_ENCAP is not set
@@ -285,8 +296,6 @@ CONFIG_PSCI_RESET=y
# CONFIG_IMX_ELE_DEK_ENCAP is not set
# CONFIG_CMD_HDMIDETECT is not set
CONFIG_IMX_DCD_ADDR=0x00910000
-# CONFIG_SPL_LOAD_IMX_CONTAINER is not set
-CONFIG_IMX_CONTAINER_CFG=""
CONFIG_SYS_MEM_TOP_HIDE=0x0
CONFIG_SYS_LOAD_ADDR=0x800800
@@ -313,7 +322,7 @@ CONFIG_DEBUG_UART=y
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=130200
+CONFIG_GCC_VERSION=130300
CONFIG_CLANG_VERSION=0
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
# CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
@@ -346,6 +355,10 @@ CONFIG_STACK_SIZE=0x1000000
CONFIG_SYS_SRAM_BASE=0x0
CONFIG_SYS_SRAM_SIZE=0x0
# CONFIG_MP is not set
+CONFIG_HAVE_TEXT_BASE=y
+# CONFIG_HAVE_SYS_UBOOT_START is not set
+CONFIG_SYS_UBOOT_START=0x18000000
+# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
# CONFIG_API is not set
#
@@ -356,8 +369,8 @@ CONFIG_SYS_SRAM_SIZE=0x0
# Boot images
#
# CONFIG_ANDROID_BOOT_IMAGE is not set
-CONFIG_FIT=y
# CONFIG_TIMESTAMP is not set
+CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x0
CONFIG_FIT_FULL_CHECK=y
# CONFIG_FIT_SIGNATURE is not set
@@ -377,6 +390,8 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x0
CONFIG_SPL_FIT_SOURCE=""
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_PXE_UTILS=y
+CONFIG_BOOT_DEFAULTS_FEATURES=y
+CONFIG_BOOT_DEFAULTS_CMDS=y
CONFIG_BOOT_DEFAULTS=y
CONFIG_BOOTSTD=y
# CONFIG_SPL_BOOTSTD is not set
@@ -384,9 +399,11 @@ CONFIG_BOOTSTD_FULL=y
CONFIG_BOOTSTD_DEFAULTS=y
CONFIG_BOOTSTD_BOOTCOMMAND=y
CONFIG_BOOTMETH_GLOBAL=y
+# CONFIG_BOOTMETH_CROS is not set
CONFIG_BOOTMETH_EXTLINUX=y
CONFIG_BOOTMETH_EXTLINUX_PXE=y
CONFIG_BOOTMETH_EFILOADER=y
+CONFIG_BOOTMETH_EFI_BOOTMGR=y
CONFIG_BOOTMETH_VBE=y
CONFIG_BOOTMETH_DISTRO=y
# CONFIG_SPL_BOOTMETH_VBE is not set
@@ -398,13 +415,8 @@ CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
CONFIG_EXPO=y
CONFIG_BOOTMETH_SCRIPT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SUPPORT_RAW_INITRD=y
-# CONFIG_OF_BOARD_SETUP is not set
-# CONFIG_OF_SYSTEM_SETUP is not set
-# CONFIG_OF_STDOUT_VIA_ALIAS is not set
-CONFIG_HAVE_TEXT_BASE=y
-# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
-CONFIG_ARCH_FIXUP_FDT_MEMORY=y
# CONFIG_CHROMEOS is not set
# CONFIG_CHROMEOS_VBOOT is not set
# CONFIG_RAMBOOT_PBL is not set
@@ -444,6 +456,17 @@ CONFIG_BOOTDELAY=2
# Image support
#
# CONFIG_IMAGE_PRE_LOAD is not set
+
+#
+# Devicetree fixup
+#
+# CONFIG_OF_ENV_SETUP is not set
+# CONFIG_OF_BOARD_SETUP is not set
+# CONFIG_OF_SYSTEM_SETUP is not set
+# CONFIG_OF_STDOUT_VIA_ALIAS is not set
+# CONFIG_FDT_FIXUP_PARTITIONS is not set
+# CONFIG_FDT_SIMPLEFB is not set
+CONFIG_ARCH_FIXUP_FDT_MEMORY=y
# CONFIG_USE_BOOTARGS is not set
# CONFIG_BOOTARGS_SUBST is not set
CONFIG_USE_BOOTCOMMAND=y
@@ -463,6 +486,8 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-kevin.dtb"
#
CONFIG_MENU=y
# CONFIG_CONSOLE_RECORD is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1044
# CONFIG_DISABLE_CONSOLE is not set
CONFIG_LOGLEVEL=4
CONFIG_SPL_LOGLEVEL=4
@@ -471,6 +496,7 @@ CONFIG_SPL_LOGLEVEL=4
# CONFIG_TPL_SILENT_CONSOLE is not set
CONFIG_PRE_CONSOLE_BUFFER=y
CONFIG_CONSOLE_FLUSH_SUPPORT=y
+# CONFIG_CONSOLE_FLUSH_ON_NEWLINE is not set
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
@@ -517,7 +543,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_BOARD_LATE_INIT=y
# CONFIG_CLOCKS is not set
# CONFIG_HWCONFIG is not set
-# CONFIG_LAST_STAGE_INIT is not set
+CONFIG_LAST_STAGE_INIT=y
CONFIG_MISC_INIT_R=y
# CONFIG_SYS_MALLOC_BOOTPARAMS is not set
# CONFIG_ID_EEPROM is not set
@@ -557,14 +583,11 @@ CONFIG_SUPPORT_TPL=y
#
CONFIG_SPL_FRAMEWORK=y
# CONFIG_SPL_FRAMEWORK_BOARD_INIT_F is not set
-CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_MAX_SIZE=0x1e000
CONFIG_SPL_PAD_TO=0x7f8000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0xff8e0000
# CONFIG_SPL_NO_BSS_LIMIT is not set
CONFIG_SPL_BSS_LIMIT=y
# CONFIG_SPL_FOOTPRINT_LIMIT is not set
-CONFIG_SPL_BSS_MAX_SIZE=0x10000
CONFIG_SPL_SYS_STACK_F_CHECK_BYTE=0xaa
# CONFIG_SPL_SYS_REPORT_STACK_F_USAGE is not set
# CONFIG_SPL_SHOW_ERRORS is not set
@@ -576,12 +599,11 @@ CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_BOOTROM_SUPPORT is not set
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
+# CONFIG_SPL_LOAD_IMX_CONTAINER is not set
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
CONFIG_SPL_SEPARATE_BSS=y
-# CONFIG_SYS_SPL_MALLOC is not set
+# CONFIG_SPL_SYS_MALLOC is not set
CONFIG_SPL_BANNER_PRINT=y
# CONFIG_SPL_DISPLAY_PRINT is not set
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
@@ -602,7 +624,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x0
# CONFIG_SPL_DM_MAILBOX is not set
# CONFIG_SPL_MEMORY is not set
# CONFIG_SPL_MPC8XXX_INIT_DDR is not set
-# CONFIG_SPL_MTD_SUPPORT is not set
+# CONFIG_SPL_MTD is not set
# CONFIG_SPL_MUSB_NEW is not set
# CONFIG_SPL_NAND_SUPPORT is not set
# CONFIG_SPL_NAND_DRIVERS is not set
@@ -640,23 +662,21 @@ CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_SPL_TARGET=""
# CONFIG_TPL is not set
# CONFIG_VPL is not set
-# CONFIG_FDT_SIMPLEFB is not set
-# CONFIG_BMP is not set
+CONFIG_CMDLINE=y
+CONFIG_HUSH_PARSER=y
#
-# Command line interface
+# Hush flavor to use
#
-CONFIG_CMDLINE=y
-CONFIG_HUSH_PARSER=y
+CONFIG_HUSH_OLD_PARSER=y
+# CONFIG_HUSH_MODERN_PARSER is not set
CONFIG_CMDLINE_EDITING=y
# CONFIG_CMDLINE_PS_SUPPORT is not set
CONFIG_AUTO_COMPLETE=y
CONFIG_SYS_LONGHELP=y
CONFIG_SYS_PROMPT="=> "
CONFIG_SYS_PROMPT_HUSH_PS2="> "
-CONFIG_SYS_MAXARGS=16
-CONFIG_SYS_CBSIZE=1024
-CONFIG_SYS_PBSIZE=1044
+CONFIG_SYS_MAXARGS=64
CONFIG_SYS_XTRACE=y
#
@@ -670,8 +690,10 @@ CONFIG_CMD_BDI=y
# CONFIG_CMD_BDINFO_EXTRA is not set
# CONFIG_CMD_CONFIG is not set
CONFIG_CMD_CONSOLE=y
+# CONFIG_CMD_HISTORY is not set
# CONFIG_CMD_LICENSE is not set
# CONFIG_CMD_PMC is not set
+# CONFIG_CMD_SMBIOS is not set
#
# Boot commands
@@ -693,24 +715,24 @@ CONFIG_BOOTM_PLAN9=y
CONFIG_BOOTM_RTEMS=y
CONFIG_CMD_VBE=y
CONFIG_BOOTM_VXWORKS=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_BOOTEFI=y
+CONFIG_CMD_BOOTEFI_BINARY=y
+CONFIG_CMD_BOOTEFI_BOOTMGR=y
CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
CONFIG_CMD_BOOTEFI_HELLO=y
CONFIG_CMD_BOOTEFI_SELFTEST=y
CONFIG_CMD_BOOTMENU=y
# CONFIG_CMD_ADTIMG is not set
CONFIG_CMD_ELF=y
+# CONFIG_CMD_ELF_FDT_SETUP is not set
CONFIG_CMD_FDT=y
CONFIG_CMD_GO=y
CONFIG_CMD_RUN=y
CONFIG_CMD_IMI=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_XIMG=y
-# CONFIG_CMD_XXD is not set
+CONFIG_SYS_XIMG_LEN=0x800000
# CONFIG_CMD_SPL is not set
-# CONFIG_CMD_THOR_DOWNLOAD is not set
-# CONFIG_CMD_ZBOOT is not set
#
# Environment commands
@@ -776,7 +798,6 @@ CONFIG_CMD_GPIO=y
# CONFIG_CMD_GPIO_READ is not set
# CONFIG_CMD_PWM is not set
CONFIG_CMD_GPT=y
-CONFIG_RANDOM_UUID=y
# CONFIG_CMD_GPT_RENAME is not set
# CONFIG_CMD_IDE is not set
# CONFIG_CMD_IO is not set
@@ -794,8 +815,11 @@ CONFIG_CMD_LOADXY_TIMEOUT=90
# CONFIG_CMD_MISC is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_BKOPS_ENABLE is not set
+# CONFIG_CMD_MMC_REG is not set
# CONFIG_CMD_MMC_SWRITE is not set
# CONFIG_CMD_CLONE is not set
+# CONFIG_CMD_MTD is not set
+# CONFIG_CMD_ONENAND is not set
# CONFIG_CMD_OSD is not set
CONFIG_CMD_PART=y
# CONFIG_CMD_PCI is not set
@@ -808,11 +832,12 @@ CONFIG_CMD_SF=y
CONFIG_CMD_SF_TEST=y
CONFIG_CMD_SPI=y
CONFIG_DEFAULT_SPI_BUS=0
-CONFIG_DEFAULT_SPI_MODE=0
+CONFIG_DEFAULT_SPI_MODE=0x0
# CONFIG_CMD_TSI148 is not set
# CONFIG_CMD_UNIVERSE is not set
CONFIG_CMD_USB=y
# CONFIG_CMD_USB_SDP is not set
+# CONFIG_CMD_RKMTD is not set
# CONFIG_CMD_WRITE is not set
#
@@ -823,6 +848,7 @@ CONFIG_CMD_ECHO=y
CONFIG_CMD_ITEST=y
CONFIG_CMD_SOURCE=y
# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_XXD is not set
#
# Android support commands
@@ -845,6 +871,7 @@ CONFIG_BOOTP_SUBNETMASK=y
# CONFIG_CMD_PCAP is not set
CONFIG_BOOTP_PXE=y
CONFIG_BOOTP_PXE_CLIENTARCH=0x16
+# CONFIG_BOOTP_PXE_DHCP_OPTION is not set
CONFIG_BOOTP_VCI_STRING="U-Boot.armv8"
CONFIG_CMD_TFTPBOOT=y
# CONFIG_CMD_TFTPPUT is not set
@@ -898,7 +925,6 @@ CONFIG_CMD_VIDCONSOLE=y
#
# TI specific command line interface
#
-# CONFIG_CMD_DDR3 is not set
#
# Power commands
@@ -933,9 +959,9 @@ CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
# CONFIG_CMD_FS_UUID is not set
# CONFIG_CMD_JFFS2 is not set
+# CONFIG_CMD_MTDPARTS is not set
CONFIG_MTDIDS_DEFAULT=""
CONFIG_MTDPARTS_DEFAULT=""
-# CONFIG_CMD_REISER is not set
# CONFIG_CMD_ZFS is not set
#
@@ -979,16 +1005,18 @@ CONFIG_BINMAN=y
CONFIG_OF_CONTROL=y
CONFIG_OF_REAL=y
CONFIG_SPL_OF_CONTROL=y
-# CONFIG_OF_LIVE is not set
+CONFIG_OF_LIVE=y
+CONFIG_OF_UPSTREAM=y
+# CONFIG_OF_UPSTREAM_BUILD_VENDOR is not set
CONFIG_OF_SEPARATE=y
# CONFIG_OF_EMBED is not set
# CONFIG_OF_BOARD is not set
# CONFIG_OF_OMIT_DTB is not set
CONFIG_DEVICE_TREE_INCLUDES=""
-CONFIG_OF_LIST="rk3399-gru-kevin"
+CONFIG_OF_LIST="rockchip/rk3399-gru-kevin"
# CONFIG_MULTI_DTB_FIT is not set
# CONFIG_SPL_MULTI_DTB_FIT is not set
-CONFIG_SPL_OF_LIST="rk3399-gru-kevin"
+CONFIG_SPL_OF_LIST="rockchip/rk3399-gru-kevin"
CONFIG_OF_TAG_MIGRATE=y
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
# CONFIG_OF_DTB_PROPS_REMOVE is not set
@@ -1066,10 +1094,11 @@ CONFIG_SYS_RX_ETH_BUFFER=4
#
CONFIG_DM=y
CONFIG_SPL_DM=y
-CONFIG_DM_WARN=y
+# CONFIG_DM_WARN is not set
# CONFIG_SPL_DM_WARN is not set
# CONFIG_DM_DEBUG is not set
# CONFIG_DM_STATS is not set
+# CONFIG_SPL_DM_STATS is not set
CONFIG_DM_DEVICE_REMOVE=y
CONFIG_DM_EVENT=y
# CONFIG_SPL_DM_DEVICE_REMOVE is not set
@@ -1089,8 +1118,8 @@ CONFIG_SPL_SIMPLE_BUS=y
CONFIG_OF_TRANSLATE=y
# CONFIG_SPL_OF_TRANSLATE is not set
# CONFIG_TRANSLATION_OFFSET is not set
-CONFIG_DM_DEV_READ_INLINE=y
-# CONFIG_OFNODE_MULTI_TREE is not set
+CONFIG_OFNODE_MULTI_TREE=y
+CONFIG_OFNODE_MULTI_TREE_MAX=4
CONFIG_BOUNCE_BUFFER=y
CONFIG_ADC=y
# CONFIG_ADC_EXYNOS is not set
@@ -1119,6 +1148,7 @@ CONFIG_BLOCK_CACHE=y
# CONFIG_IDE is not set
# CONFIG_LBA48 is not set
# CONFIG_SYS_64BIT_LBA is not set
+# CONFIG_RKMTD is not set
# CONFIG_BOOTCOUNT_LIMIT is not set
#
@@ -1131,9 +1161,10 @@ CONFIG_BLOCK_CACHE=y
#
# CONFIG_CACHE is not set
# CONFIG_L2X0_CACHE is not set
-# CONFIG_V5L2_CACHE is not set
+# CONFIG_ANDES_L2_CACHE is not set
# CONFIG_NCORE_CACHE is not set
# CONFIG_SIFIVE_CCACHE is not set
+# CONFIG_SIFIVE_PL2 is not set
#
# Clock
@@ -1142,6 +1173,8 @@ CONFIG_CLK=y
CONFIG_SPL_CLK=y
# CONFIG_SPL_CLK_CCF is not set
# CONFIG_CLK_CCF is not set
+# CONFIG_CLK_GPIO is not set
+# CONFIG_SPL_CLK_GPIO is not set
# CONFIG_CLK_CDCE9XX is not set
# CONFIG_CLK_ICS8N3QV01 is not set
# CONFIG_CLK_K210 is not set
@@ -1266,7 +1299,6 @@ CONFIG_ROCKCHIP_GPIO=y
# CONFIG_NOMADIK_GPIO is not set
# CONFIG_ZYNQMP_GPIO_MODEPIN is not set
# CONFIG_SLG7XL45106_I2C_GPO is not set
-# CONFIG_TURRIS_OMNIA_MCU is not set
# CONFIG_FTGPIO010 is not set
# CONFIG_ADP5585_GPIO is not set
@@ -1351,6 +1383,7 @@ CONFIG_SPL_MISC=y
# CONFIG_GATEWORKS_SC is not set
CONFIG_ROCKCHIP_EFUSE=y
# CONFIG_ROCKCHIP_OTP is not set
+CONFIG_ROCKCHIP_IODOMAIN=y
# CONFIG_SIFIVE_OTP is not set
# CONFIG_SMSC_LPC47M is not set
# CONFIG_SMSC_SIO1007 is not set
@@ -1370,6 +1403,7 @@ CONFIG_PWRSEQ=y
# CONFIG_SPL_PWRSEQ is not set
# CONFIG_PCA9551_LED is not set
# CONFIG_TEST_DRV is not set
+# CONFIG_TURRIS_OMNIA_MCU is not set
# CONFIG_USB_HUB_USB251XB is not set
# CONFIG_TWL4030_LED is not set
# CONFIG_WINBOND_W83627 is not set
@@ -1385,6 +1419,7 @@ CONFIG_PWRSEQ=y
# CONFIG_MICROCHIP_FLEXCOM is not set
# CONFIG_ESM_PMIC is not set
# CONFIG_SL28CPLD is not set
+# CONFIG_SPL_SOCFPGA_DT_REG is not set
#
# MMC Host controller Support
@@ -1420,8 +1455,11 @@ CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
# CONFIG_MMC_SDHCI_ADMA is not set
+# CONFIG_MMC_SDHCI_ADMA_FORCE_32BIT is not set
+CONFIG_MMC_SDHCI_ADMA_64BIT=y
# CONFIG_MMC_SDHCI_BCMSTB is not set
# CONFIG_MMC_SDHCI_CADENCE is not set
+# CONFIG_MMC_SDHCI_CV1800B is not set
# CONFIG_MMC_SDHCI_IPROC is not set
# CONFIG_MMC_SDHCI_F_SDH30 is not set
# CONFIG_MMC_SDHCI_KONA is not set
@@ -1442,9 +1480,11 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
#
# MTD Support
#
-# CONFIG_MTD is not set
+CONFIG_MTD=y
# CONFIG_DM_MTD is not set
# CONFIG_MTD_NOR_FLASH is not set
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_SYS_MTDPARTS_RUNTIME is not set
# CONFIG_FLASH_CFI_DRIVER is not set
# CONFIG_HBMC_AM654 is not set
# CONFIG_SAMSUNG_ONENAND is not set
@@ -1464,20 +1504,24 @@ CONFIG_SPI_FLASH_SMART_HWCAPS=y
# CONFIG_SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT is not set
# CONFIG_SPI_FLASH_SOFT_RESET is not set
# CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_LOCK=y
CONFIG_SPI_FLASH_UNLOCK_ALL=y
# CONFIG_SPI_FLASH_ATMEL is not set
# CONFIG_SPI_FLASH_EON is not set
CONFIG_SPI_FLASH_GIGADEVICE=y
# CONFIG_SPI_FLASH_ISSI is not set
# CONFIG_SPI_FLASH_MACRONIX is not set
+# CONFIG_SPI_FLASH_SILICONKAISER is not set
# CONFIG_SPI_FLASH_SPANSION is not set
# CONFIG_SPI_FLASH_STMICRO is not set
# CONFIG_SPI_FLASH_SST is not set
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_XMC is not set
# CONFIG_SPI_FLASH_XTX is not set
+# CONFIG_SPI_FLASH_ZBIT is not set
CONFIG_SPI_FLASH_USE_4K_SECTORS=y
# CONFIG_SPI_FLASH_DATAFLASH is not set
+# CONFIG_SPI_FLASH_MTD is not set
#
# UBI support
@@ -1538,7 +1582,7 @@ CONFIG_DM_ETH=y
# CONFIG_DM_MDIO is not set
# CONFIG_DM_ETH_PHY is not set
CONFIG_NETDEVICES=y
-# CONFIG_PHY_GIGE is not set
+CONFIG_PHY_GIGE=y
# CONFIG_ALTERA_TSE is not set
# CONFIG_BCM_SF2_ETH is not set
# CONFIG_BCMGENET is not set
@@ -1557,7 +1601,6 @@ CONFIG_ETH_DESIGNWARE=y
# CONFIG_FTMAC100 is not set
# CONFIG_FTGMAC100 is not set
# CONFIG_MCFFEC is not set
-# CONFIG_FSLDMAFEC is not set
# CONFIG_KS8851_MLL is not set
# CONFIG_LITEETH is not set
# CONFIG_MACB is not set
@@ -1586,6 +1629,7 @@ CONFIG_GMAC_ROCKCHIP=y
# CONFIG_SYS_DPAA_QBMAN is not set
# CONFIG_TSEC_ENET is not set
# CONFIG_MEDIATEK_ETH is not set
+# CONFIG_HIFEMAC_ETH is not set
# CONFIG_HIGMACV300_ETH is not set
# CONFIG_NVME is not set
# CONFIG_NVME_APPLE is not set
@@ -1611,6 +1655,7 @@ CONFIG_PHY=y
# Rockchip PHY driver
#
# CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY is not set
+# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
# CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY is not set
# CONFIG_PHY_ROCKCHIP_PCIE is not set
@@ -1649,6 +1694,8 @@ CONFIG_SPL_PINCONF_RECURSIVE=y
# CONFIG_PINCTRL_K210 is not set
CONFIG_PINCTRL_ROCKCHIP=y
CONFIG_SPL_PINCTRL_ROCKCHIP=y
+# CONFIG_PINCTRL_TEGRA is not set
+# CONFIG_SPL_PINCTRL_TEGRA is not set
CONFIG_POWER=y
# CONFIG_POWER_LEGACY is not set
# CONFIG_ACPI_PMC is not set
@@ -1678,6 +1725,7 @@ CONFIG_SPL_PMIC_CHILDREN=y
# CONFIG_SPL_DM_PMIC_PCA9450 is not set
# CONFIG_DM_PMIC_PFUZE100 is not set
# CONFIG_SPL_DM_PMIC_PFUZE100 is not set
+# CONFIG_DM_PMIC_MAX77663 is not set
# CONFIG_DM_PMIC_MAX77686 is not set
# CONFIG_DM_PMIC_MAX8998 is not set
# CONFIG_DM_PMIC_MC34708 is not set
@@ -1695,12 +1743,14 @@ CONFIG_PMIC_RK8XX=y
# CONFIG_PMIC_LP873X is not set
# CONFIG_PMIC_LP87565 is not set
# CONFIG_DM_PMIC_TPS65910 is not set
+# CONFIG_DM_PMIC_TPS80031 is not set
# CONFIG_PMIC_STPMIC1 is not set
# CONFIG_SPL_PMIC_PALMAS is not set
# CONFIG_SPL_PMIC_LP873X is not set
# CONFIG_SPL_PMIC_LP87565 is not set
# CONFIG_PMIC_TPS65941 is not set
# CONFIG_PMIC_TPS65219 is not set
+# CONFIG_PMIC_RAA215300 is not set
# CONFIG_PMIC_TPS65217 is not set
# CONFIG_POWER_TPS65218 is not set
# CONFIG_POWER_TPS62362 is not set
@@ -1758,6 +1808,7 @@ CONFIG_RAM_ROCKCHIP_DEBUG=y
#
# Remote Processor drivers
#
+CONFIG_REMOTEPROC_MAX_FW_SIZE=0x10000
#
# Reset Controller Support
@@ -1770,11 +1821,13 @@ CONFIG_RESET_ROCKCHIP=y
# CONFIG_RESET_SCMI is not set
# CONFIG_RESET_DRA7 is not set
CONFIG_DM_RNG=y
+# CONFIG_SPL_DM_RNG is not set
# CONFIG_RNG_MSM is not set
# CONFIG_RNG_NPCM is not set
CONFIG_RNG_ROCKCHIP=y
# CONFIG_RNG_IPROC200 is not set
# CONFIG_RNG_SMCCC_TRNG is not set
+# CONFIG_RNG_ARM_RNDR is not set
#
# Real Time Clock
@@ -1794,9 +1847,9 @@ CONFIG_RNG_ROCKCHIP=y
# CONFIG_RTC_MC146818 is not set
# CONFIG_RTC_M41T62 is not set
# CONFIG_SCSI is not set
-# CONFIG_DM_SCSI is not set
CONFIG_SERIAL=y
CONFIG_BAUDRATE=115200
+# CONFIG_DEFAULT_ENV_IS_RW is not set
CONFIG_REQUIRE_SERIAL_CONSOLE=y
# CONFIG_SPECIFY_CONSOLE_INDEX is not set
CONFIG_SERIAL_PRESENT=y
@@ -1838,11 +1891,14 @@ CONFIG_SYS_NS16550_MEM32=y
# CONFIG_MSM_GENI_SERIAL is not set
# CONFIG_MXS_AUART_SERIAL is not set
# CONFIG_OMAP_SERIAL is not set
+# CONFIG_HTIF_CONSOLE is not set
# CONFIG_SIFIVE_SERIAL is not set
# CONFIG_ZYNQ_SERIAL is not set
# CONFIG_MTK_SERIAL is not set
# CONFIG_MT7620_SERIAL is not set
# CONFIG_NPCM_SERIAL is not set
+# CONFIG_SM is not set
+# CONFIG_MESON_SM is not set
# CONFIG_SMEM is not set
#
@@ -1854,6 +1910,7 @@ CONFIG_SYS_NS16550_MEM32=y
# SOC (System On Chip) specific Drivers
#
# CONFIG_SOC_DEVICE is not set
+# CONFIG_SOC_SAMSUNG is not set
# CONFIG_SOC_TI is not set
CONFIG_SPI=y
CONFIG_DM_SPI=y
@@ -1867,6 +1924,7 @@ CONFIG_SPI_MEM=y
# CONFIG_CORTINA_SFLASH is not set
# CONFIG_CADENCE_QSPI is not set
# CONFIG_CF_SPI is not set
+# CONFIG_CV1800B_SPIF is not set
# CONFIG_DESIGNWARE_SPI is not set
# CONFIG_EXYNOS_SPI is not set
# CONFIG_FSL_DSPI is not set
@@ -1919,7 +1977,8 @@ CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_SPL_SYSRESET=y
CONFIG_SYSRESET_CMD_RESET=y
-# CONFIG_SYSRESET_CMD_POWEROFF is not set
+CONFIG_SYSRESET_CMD_POWEROFF=y
+# CONFIG_SYSRESET_CV1800B is not set
# CONFIG_POWEROFF_GPIO is not set
# CONFIG_SYSRESET_GPIO is not set
# CONFIG_SYSRESET_PSCI is not set
@@ -1950,9 +2009,8 @@ CONFIG_SPL_DM_USB=y
CONFIG_USB_HOST=y
# CONFIG_SPL_USB_HOST is not set
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
-CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y
-# CONFIG_USB_XHCI_PCI is not set
+# CONFIG_USB_XHCI_DWC3 is not set
+# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
# CONFIG_USB_XHCI_FSL is not set
# CONFIG_USB_XHCI_BRCM is not set
CONFIG_USB_EHCI_HCD=y
@@ -1977,7 +2035,7 @@ CONFIG_USB_DWC3=y
# Platform Glue Driver Support
#
# CONFIG_USB_DWC3_OMAP is not set
-# CONFIG_USB_DWC3_GENERIC is not set
+CONFIG_USB_DWC3_GENERIC=y
# CONFIG_SPL_USB_DWC3_GENERIC is not set
# CONFIG_USB_DWC3_LAYERSCAPE is not set
@@ -2046,7 +2104,7 @@ CONFIG_VIDEO=y
CONFIG_VIDEO_FONT_16X32=y
CONFIG_VIDEO_LOGO=y
CONFIG_BACKLIGHT=y
-CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0
+CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0x0
# CONFIG_VIDEO_COPY is not set
CONFIG_VIDEO_DAMAGE=y
CONFIG_BACKLIGHT_PWM=y
@@ -2077,9 +2135,11 @@ CONFIG_SIMPLE_PANEL=y
# CONFIG_VIDEO_LCD_ENDEAVORU is not set
# CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
# CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
+# CONFIG_VIDEO_LCD_LG_LD070WX3 is not set
# CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
# CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
# CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
+# CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02 is not set
# CONFIG_VIDEO_LCD_SSD2828 is not set
# CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
# CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
@@ -2106,7 +2166,9 @@ CONFIG_DISPLAY_ROCKCHIP_EDP=y
# CONFIG_VIDEO_TIDSS is not set
# CONFIG_VIDEO_TEGRA124 is not set
# CONFIG_VIDEO_BRIDGE is not set
+# CONFIG_VIDEO_BRIDGE_PARADE_DP501 is not set
# CONFIG_VIDEO_BRIDGE_SOLOMON_SSD2825 is not set
+# CONFIG_VIDEO_BRIDGE_TOSHIBA_TC358768 is not set
# CONFIG_VIDEO_TEGRA20 is not set
# CONFIG_VIDEO_DSI_TEGRA30 is not set
# CONFIG_TEGRA_BACKLIGHT_PWM is not set
@@ -2119,6 +2181,7 @@ CONFIG_CONSOLE_SCROLL_LINES=1
# CONFIG_OSD is not set
# CONFIG_VIDEO_REMOVE is not set
# CONFIG_SPLASH_SCREEN is not set
+# CONFIG_BMP is not set
CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
CONFIG_VIDEO_BMP_RLE8=y
# CONFIG_BMP_16BPP is not set
@@ -2183,6 +2246,7 @@ CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
CONFIG_CHARSET=y
# CONFIG_DYNAMIC_CRC_TABLE is not set
CONFIG_LIB_UUID=y
+CONFIG_RANDOM_UUID=y
CONFIG_SPL_LIB_UUID=y
# CONFIG_SEMIHOSTING is not set
# CONFIG_SPL_SEMIHOSTING is not set
@@ -2200,6 +2264,7 @@ CONFIG_LIB_RAND=y
# CONFIG_LIB_HW_RAND is not set
CONFIG_SUPPORT_ACPI=y
# CONFIG_ACPI is not set
+# CONFIG_SPL_ACPI is not set
# CONFIG_SPL_TINY_MEMSET is not set
# CONFIG_BITREVERSE is not set
# CONFIG_TRACE is not set
@@ -2238,6 +2303,7 @@ CONFIG_MD5=y
# CONFIG_SPL_MD5 is not set
CONFIG_CRC8=y
# CONFIG_SPL_CRC8 is not set
+# CONFIG_SPL_CRC16 is not set
CONFIG_CRC32=y
#
@@ -2262,7 +2328,7 @@ CONFIG_ERRNO_STR=y
# CONFIG_HEXDUMP is not set
CONFIG_GETOPT=y
CONFIG_OF_LIBFDT=y
-CONFIG_OF_LIBFDT_ASSUME_MASK=0
+CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
CONFIG_SYS_FDT_PAD=0x3000
CONFIG_SPL_OF_LIBFDT=y
CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff
@@ -2273,13 +2339,15 @@ CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff
CONFIG_GENERATE_SMBIOS_TABLE=y
# CONFIG_LIB_RATIONAL is not set
# CONFIG_SPL_LIB_RATIONAL is not set
+CONFIG_SMBIOS=y
# CONFIG_SMBIOS_PARSER is not set
CONFIG_EFI_LOADER=y
-CONFIG_CMD_BOOTEFI_BOOTMGR=y
+CONFIG_EFI_BINARY_EXEC=y
+CONFIG_EFI_BOOTMGR=y
# CONFIG_EFI_VARIABLE_FILE_STORE is not set
CONFIG_EFI_VARIABLE_NO_STORE=y
# CONFIG_EFI_VARIABLES_PRESEED is not set
-CONFIG_EFI_VAR_BUF_SIZE=65536
+CONFIG_EFI_VAR_BUF_SIZE=131072
# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
# CONFIG_EFI_CAPSULE_ON_DISK is not set
@@ -2297,6 +2365,7 @@ CONFIG_EFI_RNG_PROTOCOL=y
CONFIG_EFI_LOAD_FILE2_INITRD=y
CONFIG_EFI_ECPT=y
CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
+# CONFIG_EFI_HTTP_BOOT is not set
# CONFIG_OPTEE_LIB is not set
# CONFIG_OPTEE_IMAGE is not set
# CONFIG_BOOTM_OPTEE is not set
@@ -2308,15 +2377,11 @@ CONFIG_LMB_MAX_REGIONS=16
# CONFIG_PHANDLE_CHECK_SEQ is not set
#
-# FWU Multi Bank Updates
-#
-# CONFIG_POST is not set
-
-#
-# Unit tests
+# Testing
#
# CONFIG_UNIT_TEST is not set
# CONFIG_SPL_UNIT_TEST is not set
+# CONFIG_POST is not set
#
# Tools options
@@ -2324,6 +2389,7 @@ CONFIG_LMB_MAX_REGIONS=16
CONFIG_MKIMAGE_DTC_PATH="dtc"
CONFIG_TOOLS_CRC32=y
CONFIG_TOOLS_LIBCRYPTO=y
+CONFIG_TOOLS_KWBIMAGE=y
CONFIG_TOOLS_FIT=y
CONFIG_TOOLS_FIT_FULL_CHECK=y
CONFIG_TOOLS_FIT_PRINT=y
diff --git a/config/u-boot/qemu_arm64_12mb/config/default b/config/u-boot/qemu_arm64_12mb/config/default
index 83c90261..65c6e684 100644
--- a/config/u-boot/qemu_arm64_12mb/config/default
+++ b/config/u-boot/qemu_arm64_12mb/config/default
@@ -1,13 +1,14 @@
#
# Automatically generated file; DO NOT EDIT.
-# U-Boot 2023.10 Configuration
+# U-Boot 2024.07 Configuration
#
#
-# Compiler: gcc (Debian 13.2.0-5) 13.2.0
+# Compiler: gcc (Debian 13.3.0-2) 13.3.0
#
CONFIG_CREATE_ARCH_SYMLINK=y
CONFIG_SYS_CACHE_SHIFT_6=y
+CONFIG_64BIT=y
CONFIG_SYS_CACHELINE_SIZE=64
CONFIG_LINKER_LIST_ALIGN=8
# CONFIG_ARC is not set
@@ -45,6 +46,7 @@ CONFIG_COUNTER_FREQUENCY=0
CONFIG_POSITION_INDEPENDENT=y
# CONFIG_INIT_SP_RELATIVE is not set
# CONFIG_GIC_V3_ITS is not set
+# CONFIG_GICV3_SUPPORT_GIC600 is not set
CONFIG_STATIC_RELA=y
CONFIG_DMA_ADDR_T_64BIT=y
CONFIG_ARM_ASM_UNIFIED=y
@@ -71,13 +73,11 @@ CONFIG_ARM64_SUPPORT_AARCH32=y
# CONFIG_ARCH_KIRKWOOD is not set
# CONFIG_ARCH_MVEBU is not set
# CONFIG_ARCH_ORION5X is not set
-# CONFIG_TARGET_STV0991 is not set
# CONFIG_ARCH_BCM283X is not set
# CONFIG_ARCH_BCMSTB is not set
# CONFIG_ARCH_BCMBCA is not set
# CONFIG_TARGET_VEXPRESS_CA9X4 is not set
# CONFIG_TARGET_BCMNS is not set
-# CONFIG_TARGET_BCMNS2 is not set
# CONFIG_TARGET_BCMNS3 is not set
# CONFIG_ARCH_EXYNOS is not set
# CONFIG_ARCH_S5PC1XX is not set
@@ -107,7 +107,7 @@ CONFIG_ARM64_SUPPORT_AARCH32=y
# CONFIG_ARCH_APPLE is not set
# CONFIG_ARCH_OWL is not set
CONFIG_ARCH_QEMU=y
-# CONFIG_ARCH_RMOBILE is not set
+# CONFIG_ARCH_RENESAS is not set
# CONFIG_ARCH_SNAPDRAGON is not set
# CONFIG_ARCH_SOCFPGA is not set
# CONFIG_ARCH_SUNXI is not set
@@ -166,6 +166,7 @@ CONFIG_ARCH_QEMU=y
# CONFIG_ARCH_ASPEED is not set
# CONFIG_TARGET_DURIAN is not set
# CONFIG_TARGET_POMELO is not set
+# CONFIG_TARGET_PE2201 is not set
# CONFIG_TARGET_PRESIDIO_ASIC is not set
# CONFIG_TARGET_XENGUEST_ARM64 is not set
# CONFIG_ARCH_GXP is not set
@@ -190,7 +191,7 @@ CONFIG_TARGET_QEMU_ARM_64BIT=y
CONFIG_ERR_PTR_OFFSET=0x0
CONFIG_PRE_CON_BUF_ADDR=0x40100000
CONFIG_PRE_CON_BUF_SZ=4096
-CONFIG_BOOTSTAGE_STASH_ADDR=0
+CONFIG_BOOTSTAGE_STASH_ADDR=0x0
CONFIG_DEBUG_UART_BASE=0x9000000
CONFIG_DEBUG_UART_CLOCK=0
# CONFIG_DEBUG_UART_BOARD_INIT is not set
@@ -247,7 +248,7 @@ CONFIG_AHCI=y
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=130200
+CONFIG_GCC_VERSION=130300
CONFIG_CLANG_VERSION=0
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
# CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
@@ -276,6 +277,12 @@ CONFIG_STACK_SIZE=0x1000000
CONFIG_SYS_SRAM_BASE=0x0
CONFIG_SYS_SRAM_SIZE=0x0
# CONFIG_MP is not set
+CONFIG_HAVE_TEXT_BASE=y
+# CONFIG_HAVE_SYS_UBOOT_START is not set
+CONFIG_SYS_UBOOT_START=0x50000000
+CONFIG_HAVE_SYS_MONITOR_BASE=y
+CONFIG_SYS_MONITOR_BASE=0x50000000
+# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
# CONFIG_API is not set
#
@@ -286,8 +293,8 @@ CONFIG_SYS_SRAM_SIZE=0x0
# Boot images
#
# CONFIG_ANDROID_BOOT_IMAGE is not set
-CONFIG_FIT=y
CONFIG_TIMESTAMP=y
+CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x0
CONFIG_FIT_FULL_CHECK=y
CONFIG_FIT_SIGNATURE=y
@@ -299,15 +306,19 @@ CONFIG_FIT_BEST_MATCH=y
CONFIG_FIT_PRINT=y
# CONFIG_SPL_LOAD_FIT_FULL is not set
CONFIG_PXE_UTILS=y
+CONFIG_BOOT_DEFAULTS_FEATURES=y
+CONFIG_BOOT_DEFAULTS_CMDS=y
CONFIG_BOOT_DEFAULTS=y
CONFIG_BOOTSTD=y
CONFIG_BOOTSTD_FULL=y
CONFIG_BOOTSTD_DEFAULTS=y
CONFIG_BOOTSTD_BOOTCOMMAND=y
CONFIG_BOOTMETH_GLOBAL=y
+# CONFIG_BOOTMETH_CROS is not set
CONFIG_BOOTMETH_EXTLINUX=y
CONFIG_BOOTMETH_EXTLINUX_PXE=y
CONFIG_BOOTMETH_EFILOADER=y
+CONFIG_BOOTMETH_EFI_BOOTMGR=y
CONFIG_BOOTMETH_VBE=y
CONFIG_BOOTMETH_DISTRO=y
CONFIG_BOOTMETH_VBE_REQUEST=y
@@ -316,15 +327,9 @@ CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
CONFIG_EXPO=y
CONFIG_BOOTMETH_SCRIPT=y
CONFIG_LEGACY_IMAGE_FORMAT=y
+# CONFIG_MEASURED_BOOT is not set
+CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_SUPPORT_RAW_INITRD=y
-# CONFIG_OF_BOARD_SETUP is not set
-# CONFIG_OF_SYSTEM_SETUP is not set
-# CONFIG_OF_STDOUT_VIA_ALIAS is not set
-CONFIG_HAVE_TEXT_BASE=y
-CONFIG_HAVE_SYS_MONITOR_BASE=y
-CONFIG_SYS_MONITOR_BASE=0x50000000
-# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
-CONFIG_ARCH_FIXUP_FDT_MEMORY=y
# CONFIG_CHROMEOS is not set
# CONFIG_CHROMEOS_VBOOT is not set
# CONFIG_RAMBOOT_PBL is not set
@@ -362,6 +367,17 @@ CONFIG_BOOTDELAY=2
# Image support
#
# CONFIG_IMAGE_PRE_LOAD is not set
+
+#
+# Devicetree fixup
+#
+# CONFIG_OF_ENV_SETUP is not set
+# CONFIG_OF_BOARD_SETUP is not set
+# CONFIG_OF_SYSTEM_SETUP is not set
+# CONFIG_OF_STDOUT_VIA_ALIAS is not set
+# CONFIG_FDT_FIXUP_PARTITIONS is not set
+# CONFIG_FDT_SIMPLEFB is not set
+CONFIG_ARCH_FIXUP_FDT_MEMORY=y
# CONFIG_USE_BOOTARGS is not set
# CONFIG_BOOTARGS_SUBST is not set
CONFIG_USE_BOOTCOMMAND=y
@@ -383,6 +399,8 @@ CONFIG_DEFAULT_FDT_FILE=""
#
CONFIG_MENU=y
# CONFIG_CONSOLE_RECORD is not set
+CONFIG_SYS_CBSIZE=1024
+CONFIG_SYS_PBSIZE=1044
# CONFIG_DISABLE_CONSOLE is not set
CONFIG_LOGLEVEL=4
# CONFIG_SILENT_CONSOLE is not set
@@ -390,6 +408,7 @@ CONFIG_LOGLEVEL=4
# CONFIG_TPL_SILENT_CONSOLE is not set
CONFIG_PRE_CONSOLE_BUFFER=y
CONFIG_CONSOLE_FLUSH_SUPPORT=y
+# CONFIG_CONSOLE_FLUSH_ON_NEWLINE is not set
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
@@ -426,7 +445,7 @@ CONFIG_EVENT_DYNAMIC=y
CONFIG_BOARD_LATE_INIT=y
# CONFIG_CLOCKS is not set
# CONFIG_HWCONFIG is not set
-# CONFIG_LAST_STAGE_INIT is not set
+CONFIG_LAST_STAGE_INIT=y
# CONFIG_MISC_INIT_R is not set
# CONFIG_SYS_MALLOC_BOOTPARAMS is not set
# CONFIG_ID_EEPROM is not set
@@ -455,23 +474,21 @@ CONFIG_UPDATE_LOAD_ADDR=0x100000
#
# CONFIG_BLOBLIST is not set
CONFIG_IMAGE_SIGN_INFO=y
-# CONFIG_FDT_SIMPLEFB is not set
-# CONFIG_BMP is not set
+CONFIG_CMDLINE=y
+CONFIG_HUSH_PARSER=y
#
-# Command line interface
+# Hush flavor to use
#
-CONFIG_CMDLINE=y
-CONFIG_HUSH_PARSER=y
+CONFIG_HUSH_OLD_PARSER=y
+# CONFIG_HUSH_MODERN_PARSER is not set
CONFIG_CMDLINE_EDITING=y
# CONFIG_CMDLINE_PS_SUPPORT is not set
CONFIG_AUTO_COMPLETE=y
CONFIG_SYS_LONGHELP=y
CONFIG_SYS_PROMPT="=> "
CONFIG_SYS_PROMPT_HUSH_PS2="> "
-CONFIG_SYS_MAXARGS=16
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=532
+CONFIG_SYS_MAXARGS=64
CONFIG_SYS_XTRACE=y
#
@@ -485,8 +502,10 @@ CONFIG_CMD_BDI=y
# CONFIG_CMD_BDINFO_EXTRA is not set
# CONFIG_CMD_CONFIG is not set
CONFIG_CMD_CONSOLE=y
+# CONFIG_CMD_HISTORY is not set
# CONFIG_CMD_LICENSE is not set
# CONFIG_CMD_PMC is not set
+CONFIG_CMD_SMBIOS=y
#
# Boot commands
@@ -508,23 +527,23 @@ CONFIG_BOOTM_PLAN9=y
CONFIG_BOOTM_RTEMS=y
CONFIG_CMD_VBE=y
CONFIG_BOOTM_VXWORKS=y
-CONFIG_SYS_BOOTM_LEN=0x4000000
CONFIG_CMD_BOOTEFI=y
+CONFIG_CMD_BOOTEFI_BINARY=y
+CONFIG_CMD_BOOTEFI_BOOTMGR=y
CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
CONFIG_CMD_BOOTEFI_HELLO=y
CONFIG_CMD_BOOTEFI_SELFTEST=y
# CONFIG_CMD_BOOTMENU is not set
# CONFIG_CMD_ADTIMG is not set
CONFIG_CMD_ELF=y
+# CONFIG_CMD_ELF_FDT_SETUP is not set
CONFIG_CMD_FDT=y
CONFIG_CMD_GO=y
CONFIG_CMD_RUN=y
CONFIG_CMD_IMI=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_XIMG=y
-# CONFIG_CMD_XXD is not set
-# CONFIG_CMD_THOR_DOWNLOAD is not set
-# CONFIG_CMD_ZBOOT is not set
+CONFIG_SYS_XIMG_LEN=0x800000
#
# Environment commands
@@ -549,10 +568,8 @@ CONFIG_CMD_NVEDIT_EFI=y
# Memory commands
#
# CONFIG_CMD_BINOP is not set
-# CONFIG_CMD_BLOBLIST is not set
CONFIG_CMD_CRC32=y
# CONFIG_CRC32_VERIFY is not set
-# CONFIG_CMD_EEPROM is not set
# CONFIG_LOOPW is not set
# CONFIG_CMD_MD5SUM is not set
# CONFIG_CMD_MEMINFO is not set
@@ -576,6 +593,7 @@ CONFIG_CMD_UNZIP=y
# Device access commands
#
# CONFIG_CMD_ARMFLASH is not set
+# CONFIG_CMD_BCB is not set
# CONFIG_CMD_BIND is not set
# CONFIG_CMD_CLK is not set
# CONFIG_CMD_DEMO is not set
@@ -586,7 +604,6 @@ CONFIG_CMD_FLASH=y
# CONFIG_CMD_FUSE is not set
# CONFIG_CMD_GPIO is not set
# CONFIG_CMD_GPT is not set
-# CONFIG_RANDOM_UUID is not set
# CONFIG_CMD_IDE is not set
# CONFIG_CMD_IO is not set
# CONFIG_CMD_IOTRACE is not set
@@ -602,6 +619,7 @@ CONFIG_CMD_LOADXY_TIMEOUT=90
# CONFIG_CMD_MBR is not set
# CONFIG_CMD_CLONE is not set
CONFIG_CMD_MTD=y
+# CONFIG_CMD_MTD_OTP is not set
CONFIG_CMD_NVME=y
# CONFIG_CMD_ONENAND is not set
# CONFIG_CMD_OSD is not set
@@ -617,6 +635,7 @@ CONFIG_CMD_SCSI=y
# CONFIG_CMD_UNIVERSE is not set
CONFIG_CMD_USB=y
# CONFIG_CMD_USB_SDP is not set
+# CONFIG_CMD_RKMTD is not set
CONFIG_CMD_VIRTIO=y
# CONFIG_CMD_WRITE is not set
@@ -629,6 +648,7 @@ CONFIG_CMD_ITEST=y
CONFIG_CMD_SOURCE=y
CONFIG_CMD_SETEXPR=y
# CONFIG_CMD_SETEXPR_FMT is not set
+# CONFIG_CMD_XXD is not set
#
# Android support commands
@@ -651,6 +671,7 @@ CONFIG_BOOTP_SUBNETMASK=y
# CONFIG_CMD_PCAP is not set
CONFIG_BOOTP_PXE=y
CONFIG_BOOTP_PXE_CLIENTARCH=0x16
+# CONFIG_BOOTP_PXE_DHCP_OPTION is not set
CONFIG_BOOTP_VCI_STRING="U-Boot.armv8"
CONFIG_CMD_TFTPBOOT=y
# CONFIG_CMD_TFTPPUT is not set
@@ -704,7 +725,6 @@ CONFIG_CMD_VIDCONSOLE=y
#
# TI specific command line interface
#
-# CONFIG_CMD_DDR3 is not set
#
# Power commands
@@ -743,7 +763,6 @@ CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_MTDPARTS=y
# CONFIG_CMD_MTDPARTS_SPREAD is not set
# CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES is not set
-# CONFIG_CMD_REISER is not set
# CONFIG_CMD_ZFS is not set
#
@@ -775,6 +794,7 @@ CONFIG_SUPPORT_OF_CONTROL=y
CONFIG_OF_CONTROL=y
CONFIG_OF_REAL=y
# CONFIG_OF_LIVE is not set
+# CONFIG_OF_UPSTREAM is not set
CONFIG_OF_SEPARATE=y
# CONFIG_OF_EMBED is not set
CONFIG_OF_BOARD=y
@@ -854,7 +874,7 @@ CONFIG_SYS_RX_ETH_BUFFER=4
# Generic Driver Options
#
CONFIG_DM=y
-CONFIG_DM_WARN=y
+# CONFIG_DM_WARN is not set
# CONFIG_DM_DEBUG is not set
# CONFIG_DM_STATS is not set
CONFIG_DM_DEVICE_REMOVE=y
@@ -872,11 +892,6 @@ CONFIG_DM_DEV_READ_INLINE=y
# CONFIG_OFNODE_MULTI_TREE is not set
# CONFIG_BOUNCE_BUFFER is not set
# CONFIG_ADC is not set
-# CONFIG_ADC_EXYNOS is not set
-# CONFIG_ADC_SANDBOX is not set
-# CONFIG_SARADC_MESON is not set
-# CONFIG_SARADC_ROCKCHIP is not set
-# CONFIG_ADC_IMX93 is not set
# CONFIG_SATA is not set
CONFIG_LIBATA=y
CONFIG_SCSI_AHCI=y
@@ -901,6 +916,7 @@ CONFIG_BLOCK_CACHE=y
# CONFIG_IDE is not set
# CONFIG_LBA48 is not set
# CONFIG_SYS_64BIT_LBA is not set
+# CONFIG_RKMTD is not set
# CONFIG_BOOTCOUNT_LIMIT is not set
#
@@ -913,9 +929,10 @@ CONFIG_BLOCK_CACHE=y
#
# CONFIG_CACHE is not set
# CONFIG_L2X0_CACHE is not set
-# CONFIG_V5L2_CACHE is not set
+# CONFIG_ANDES_L2_CACHE is not set
# CONFIG_NCORE_CACHE is not set
# CONFIG_SIFIVE_CCACHE is not set
+# CONFIG_SIFIVE_PL2 is not set
#
# Clock
@@ -955,11 +972,11 @@ CONFIG_DFU_TFTP=y
# CONFIG_DFU_TIMEOUT is not set
CONFIG_DFU_MTD=y
CONFIG_DFU_RAM=y
-# CONFIG_DFU_SF is not set
# CONFIG_DFU_VIRT is not set
CONFIG_SET_DFU_ALT_INFO=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x800000
CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000
+CONFIG_DFU_NAME_MAX_SIZE=32
#
# DMA Support
@@ -1082,6 +1099,7 @@ CONFIG_DM_KEYBOARD=y
# CONFIG_WINBOND_W83627 is not set
CONFIG_QFW=y
CONFIG_QFW_MMIO=y
+CONFIG_QFW_SMBIOS=y
# CONFIG_FS_LOADER is not set
#
@@ -1177,7 +1195,6 @@ CONFIG_E1000=y
# CONFIG_FTMAC100 is not set
# CONFIG_FTGMAC100 is not set
# CONFIG_MCFFEC is not set
-# CONFIG_FSLDMAFEC is not set
# CONFIG_KS8851_MLL is not set
# CONFIG_LITEETH is not set
# CONFIG_MACB is not set
@@ -1206,6 +1223,7 @@ CONFIG_E1000=y
# CONFIG_SYS_DPAA_QBMAN is not set
# CONFIG_TSEC_ENET is not set
# CONFIG_MEDIATEK_ETH is not set
+# CONFIG_HIFEMAC_ETH is not set
# CONFIG_HIGMACV300_ETH is not set
CONFIG_NVME=y
# CONFIG_NVME_APPLE is not set
@@ -1219,6 +1237,7 @@ CONFIG_PCI_ENHANCED_ALLOCATION=y
# CONFIG_PCI_ARID is not set
CONFIG_PCIE_ECAM_GENERIC=y
# CONFIG_PCIE_ECAM_SYNQUACER is not set
+# CONFIG_PCI_FTPCI100 is not set
# CONFIG_PCI_PHYTIUM is not set
# CONFIG_PCIE_FSL is not set
# CONFIG_PCI_MPC85XX is not set
@@ -1253,6 +1272,7 @@ CONFIG_PCIE_ECAM_GENERIC=y
# Pin controllers
#
# CONFIG_PINCTRL is not set
+# CONFIG_PINCTRL_TEGRA is not set
CONFIG_POWER=y
# CONFIG_POWER_LEGACY is not set
# CONFIG_ACPI_PMC is not set
@@ -1282,6 +1302,7 @@ CONFIG_POWER=y
#
# Remote Processor drivers
#
+CONFIG_REMOTEPROC_MAX_FW_SIZE=0x10000
#
# Reset Controller Support
@@ -1292,6 +1313,7 @@ CONFIG_DM_RNG=y
# CONFIG_RNG_NPCM is not set
# CONFIG_RNG_IPROC200 is not set
# CONFIG_RNG_SMCCC_TRNG is not set
+# CONFIG_RNG_ARM_RNDR is not set
CONFIG_TPM_RNG=y
#
@@ -1305,6 +1327,7 @@ CONFIG_DM_RTC=y
# CONFIG_RTC_DS1338 is not set
# CONFIG_RTC_DS3231 is not set
# CONFIG_RTC_EMULATION is not set
+# CONFIG_RTC_GOLDFISH is not set
# CONFIG_RTC_ISL1208 is not set
# CONFIG_RTC_PCF8563 is not set
# CONFIG_RTC_PT7C4338 is not set
@@ -1321,9 +1344,9 @@ CONFIG_RTC_PL031=y
# CONFIG_RTC_STM32 is not set
# CONFIG_RTC_ABX80X is not set
CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
CONFIG_SERIAL=y
CONFIG_BAUDRATE=115200
+# CONFIG_DEFAULT_ENV_IS_RW is not set
CONFIG_REQUIRE_SERIAL_CONSOLE=y
# CONFIG_SPECIFY_CONSOLE_INDEX is not set
CONFIG_SERIAL_PRESENT=y
@@ -1354,16 +1377,20 @@ CONFIG_DEBUG_UART_SHIFT=2
# CONFIG_SYS_NS16550 is not set
CONFIG_PL01X_SERIAL=y
# CONFIG_ROCKCHIP_SERIAL is not set
+# CONFIG_SEMIHOSTING_SERIAL is not set
# CONFIG_XILINX_UARTLITE is not set
# CONFIG_MSM_SERIAL is not set
# CONFIG_MSM_GENI_SERIAL is not set
# CONFIG_MXS_AUART_SERIAL is not set
# CONFIG_OMAP_SERIAL is not set
+# CONFIG_HTIF_CONSOLE is not set
# CONFIG_SIFIVE_SERIAL is not set
# CONFIG_ZYNQ_SERIAL is not set
# CONFIG_MTK_SERIAL is not set
# CONFIG_MT7620_SERIAL is not set
# CONFIG_NPCM_SERIAL is not set
+# CONFIG_SM is not set
+# CONFIG_MESON_SM is not set
# CONFIG_SMEM is not set
#
@@ -1376,6 +1403,7 @@ CONFIG_PL01X_SERIAL=y
# SOC (System On Chip) specific Drivers
#
# CONFIG_SOC_DEVICE is not set
+# CONFIG_SOC_SAMSUNG is not set
# CONFIG_SOC_TI is not set
# CONFIG_SPI is not set
@@ -1391,6 +1419,7 @@ CONFIG_PL01X_SERIAL=y
CONFIG_SYSRESET=y
CONFIG_SYSRESET_CMD_RESET=y
CONFIG_SYSRESET_CMD_POWEROFF=y
+# CONFIG_SYSRESET_CV1800B is not set
CONFIG_SYSRESET_PSCI=y
# CONFIG_SYSRESET_SYSCON is not set
# CONFIG_SYSRESET_WATCHDOG is not set
@@ -1527,9 +1556,11 @@ CONFIG_VIDEO_BOCHS_SIZE_Y=1024
# CONFIG_VIDEO_LCD_ENDEAVORU is not set
# CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
# CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
+# CONFIG_VIDEO_LCD_LG_LD070WX3 is not set
# CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
# CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
# CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
+# CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02 is not set
# CONFIG_VIDEO_LCD_SSD2828 is not set
# CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
# CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
@@ -1557,6 +1588,7 @@ CONFIG_CONSOLE_SCROLL_LINES=1
# CONFIG_OSD is not set
# CONFIG_VIDEO_REMOVE is not set
# CONFIG_SPLASH_SCREEN is not set
+# CONFIG_BMP is not set
CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
CONFIG_VIDEO_BMP_RLE8=y
# CONFIG_BMP_16BPP is not set
@@ -1623,7 +1655,9 @@ CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
CONFIG_CHARSET=y
# CONFIG_DYNAMIC_CRC_TABLE is not set
CONFIG_LIB_UUID=y
-# CONFIG_SEMIHOSTING is not set
+# CONFIG_RANDOM_UUID is not set
+CONFIG_SEMIHOSTING=y
+CONFIG_SEMIHOSTING_FALLBACK=y
CONFIG_PRINTF=y
CONFIG_SPRINTF=y
CONFIG_STRTO=y
@@ -1685,22 +1719,24 @@ CONFIG_VPL_LZMA=y
CONFIG_HEXDUMP=y
# CONFIG_GETOPT is not set
CONFIG_OF_LIBFDT=y
-CONFIG_OF_LIBFDT_ASSUME_MASK=0
+CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
CONFIG_SYS_FDT_PAD=0x3000
-# CONFIG_FDT_FIXUP_PARTITIONS is not set
#
# System tables
#
CONFIG_GENERATE_SMBIOS_TABLE=y
# CONFIG_LIB_RATIONAL is not set
+CONFIG_SMBIOS=y
CONFIG_SMBIOS_PARSER=y
CONFIG_EFI_LOADER=y
-CONFIG_CMD_BOOTEFI_BOOTMGR=y
+CONFIG_EFI_BINARY_EXEC=y
+CONFIG_EFI_BOOTMGR=y
CONFIG_EFI_VARIABLE_FILE_STORE=y
+# CONFIG_EFI_RT_VOLATILE_STORE is not set
# CONFIG_EFI_VARIABLE_NO_STORE is not set
# CONFIG_EFI_VARIABLES_PRESEED is not set
-CONFIG_EFI_VAR_BUF_SIZE=65536
+CONFIG_EFI_VAR_BUF_SIZE=131072
CONFIG_EFI_GET_TIME=y
CONFIG_EFI_SET_TIME=y
# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
@@ -1724,6 +1760,7 @@ CONFIG_EFI_LOAD_FILE2_INITRD=y
# CONFIG_EFI_SECURE_BOOT is not set
CONFIG_EFI_ECPT=y
CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
+# CONFIG_EFI_HTTP_BOOT is not set
# CONFIG_OPTEE_LIB is not set
# CONFIG_OPTEE_IMAGE is not set
# CONFIG_BOOTM_OPTEE is not set
@@ -1736,14 +1773,10 @@ CONFIG_LMB_MAX_REGIONS=16
# CONFIG_PHANDLE_CHECK_SEQ is not set
#
-# FWU Multi Bank Updates
-#
-# CONFIG_POST is not set
-
-#
-# Unit tests
+# Testing
#
# CONFIG_UNIT_TEST is not set
+# CONFIG_POST is not set
#
# Tools options
@@ -1751,6 +1784,7 @@ CONFIG_LMB_MAX_REGIONS=16
CONFIG_MKIMAGE_DTC_PATH="dtc"
CONFIG_TOOLS_CRC32=y
CONFIG_TOOLS_LIBCRYPTO=y
+CONFIG_TOOLS_KWBIMAGE=y
CONFIG_TOOLS_FIT=y
CONFIG_TOOLS_FIT_FULL_CHECK=y
CONFIG_TOOLS_FIT_PRINT=y
diff --git a/config/u-boot/qemu_x86_12mb/config/default b/config/u-boot/qemu_x86_12mb/config/default
deleted file mode 100644
index bd4ddebb..00000000
--- a/config/u-boot/qemu_x86_12mb/config/default
+++ /dev/null
@@ -1,1712 +0,0 @@
-#
-# Automatically generated file; DO NOT EDIT.
-# U-Boot 2023.10 Configuration
-#
-
-#
-# Compiler: gcc (Debian 13.2.0-5) 13.2.0
-#
-CONFIG_CREATE_ARCH_SYMLINK=y
-CONFIG_SYS_CACHE_SHIFT_6=y
-CONFIG_SYS_CACHELINE_SIZE=64
-CONFIG_LINKER_LIST_ALIGN=8
-# CONFIG_ARC is not set
-# CONFIG_ARM is not set
-# CONFIG_M68K is not set
-# CONFIG_MICROBLAZE is not set
-# CONFIG_MIPS is not set
-# CONFIG_NIOS2 is not set
-# CONFIG_PPC is not set
-# CONFIG_RISCV is not set
-# CONFIG_SANDBOX is not set
-# CONFIG_SH is not set
-CONFIG_X86=y
-# CONFIG_XTENSA is not set
-CONFIG_SYS_ARCH="x86"
-CONFIG_SYS_SOC="coreboot"
-CONFIG_SYS_VENDOR="coreboot"
-CONFIG_SYS_BOARD="coreboot"
-CONFIG_SYS_CONFIG_NAME="coreboot"
-CONFIG_TEXT_BASE=0x1110000
-CONFIG_SYS_MALLOC_LEN=0x2000000
-CONFIG_SYS_MALLOC_F_LEN=0x800
-CONFIG_NR_DRAM_BANKS=8
-CONFIG_ENV_SOURCE_FILE=""
-CONFIG_ENV_SIZE=0x1000
-CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="coreboot"
-CONFIG_BOARD_SPECIFIC_OPTIONS=y
-# CONFIG_OF_LIBFDT_OVERLAY is not set
-CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000
-# CONFIG_DM_RESET is not set
-CONFIG_SYS_MONITOR_LEN=1048576
-CONFIG_ERR_PTR_OFFSET=0x0
-# CONFIG_SPL is not set
-CONFIG_PRE_CON_BUF_ADDR=0x100000
-CONFIG_PRE_CON_BUF_SZ=4096
-CONFIG_BOOTSTAGE_STASH_ADDR=0
-CONFIG_IDENT_STRING=""
-CONFIG_SYS_CLK_FREQ=0
-CONFIG_SYS_MEM_TOP_HIDE=0x0
-CONFIG_SYS_LOAD_ADDR=0x02000000
-CONFIG_BUILD_TARGET=""
-# CONFIG_SYS_PCI_64BIT is not set
-CONFIG_PCI=y
-CONFIG_FWU_NUM_BANKS=2
-CONFIG_FWU_NUM_IMAGES_PER_BANK=2
-
-#
-# x86 architecture
-#
-CONFIG_X86_RUN_32BIT=y
-# CONFIG_X86_RUN_64BIT is not set
-# CONFIG_VENDOR_ADVANTECH is not set
-# CONFIG_VENDOR_CONGATEC is not set
-CONFIG_VENDOR_COREBOOT=y
-# CONFIG_VENDOR_DFI is not set
-# CONFIG_VENDOR_EFI is not set
-# CONFIG_VENDOR_EMULATION is not set
-# CONFIG_VENDOR_GOOGLE is not set
-# CONFIG_VENDOR_INTEL is not set
-# CONFIG_INTEL_MID is not set
-CONFIG_PCIE_ECAM_BASE=0xe0000000
-CONFIG_TARGET_COREBOOT=y
-CONFIG_SYS_CAR_ADDR=0x01920000
-CONFIG_SYS_CAR_SIZE=0x4000
-CONFIG_ROM_TABLE_ADDR=0xf0000
-CONFIG_ROM_TABLE_SIZE=0x10000
-CONFIG_CPU_ADDR_BITS=36
-# CONFIG_DEBUG_UART is not set
-CONFIG_SYS_COREBOOT=y
-CONFIG_X86_TSC_TIMER_FREQ=1000000000
-CONFIG_AHCI=y
-CONFIG_RAMBASE=0x100000
-CONFIG_HPET_ADDRESS=0xfed00000
-# CONFIG_X86_LOAD_FROM_32_BIT is not set
-# CONFIG_HAVE_INTEL_ME is not set
-# CONFIG_X86_RAMTEST is not set
-# CONFIG_USE_HOB is not set
-# CONFIG_HAVE_FSP is not set
-CONFIG_USE_CAR=y
-# CONFIG_HAVE_MRC is not set
-# CONFIG_HAVE_REFCODE is not set
-CONFIG_HAVE_MICROCODE=y
-# CONFIG_SMP is not set
-# CONFIG_HAVE_VGA_BIOS is not set
-# CONFIG_HAVE_ITSS is not set
-# CONFIG_HAVE_ACPI_RESUME is not set
-CONFIG_MAX_PIRQ_LINKS=8
-CONFIG_IRQ_SLOT_COUNT=128
-CONFIG_PCIE_ECAM_SIZE=0x10000000
-CONFIG_I8259_PIC=y
-CONFIG_APIC=y
-CONFIG_I8254_TIMER=y
-# CONFIG_SEABIOS is not set
-# CONFIG_INTEL_CAR_CQOS is not set
-CONFIG_X86_OFFSET_U_BOOT=0x1110000
-# CONFIG_ACPI_GPE is not set
-CONFIG_SA_PCIEX_LENGTH=0x10000000
-CONFIG_COREBOOT_SYSINFO=y
-# CONFIG_OF_BOARD_FIXUP is not set
-
-#
-# General setup
-#
-CONFIG_LOCALVERSION=""
-CONFIG_LOCALVERSION_AUTO=y
-CONFIG_CC_IS_GCC=y
-CONFIG_GCC_VERSION=130200
-CONFIG_CLANG_VERSION=0
-CONFIG_CC_OPTIMIZE_FOR_SIZE=y
-# CONFIG_CC_OPTIMIZE_FOR_SPEED is not set
-# CONFIG_CC_OPTIMIZE_FOR_DEBUG is not set
-# CONFIG_OPTIMIZE_INLINING is not set
-CONFIG_CC_HAS_ASM_INLINE=y
-# CONFIG_ENV_VARS_UBOOT_CONFIG is not set
-# CONFIG_SYS_BOOT_GET_CMDLINE is not set
-# CONFIG_SYS_BOOT_GET_KBD is not set
-CONFIG_SYS_MALLOC_F=y
-# CONFIG_VALGRIND is not set
-CONFIG_EXPERT=y
-CONFIG_SYS_MALLOC_CLEAR_ON_INIT=y
-# CONFIG_SYS_MALLOC_DEFAULT_TO_INIT is not set
-# CONFIG_TOOLS_DEBUG is not set
-# CONFIG_PHYS_64BIT is not set
-# CONFIG_FDT_64BIT is not set
-# CONFIG_REMAKE_ELF is not set
-# CONFIG_HAS_BOARD_SIZE_LIMIT is not set
-# CONFIG_SYS_CUSTOM_LDSCRIPT is not set
-CONFIG_PLATFORM_ELFENTRY="_start"
-CONFIG_STACK_SIZE=0x1000000
-CONFIG_SYS_SRAM_BASE=0x0
-CONFIG_SYS_SRAM_SIZE=0x0
-# CONFIG_MP is not set
-# CONFIG_API is not set
-
-#
-# Boot options
-#
-
-#
-# Boot images
-#
-# CONFIG_ANDROID_BOOT_IMAGE is not set
-CONFIG_FIT=y
-CONFIG_TIMESTAMP=y
-CONFIG_FIT_EXTERNAL_OFFSET=0x0
-CONFIG_FIT_FULL_CHECK=y
-CONFIG_FIT_SIGNATURE=y
-CONFIG_FIT_SIGNATURE_MAX_SIZE=0x10000000
-# CONFIG_FIT_RSASSA_PSS is not set
-# CONFIG_FIT_CIPHER is not set
-# CONFIG_FIT_VERBOSE is not set
-# CONFIG_FIT_BEST_MATCH is not set
-CONFIG_FIT_PRINT=y
-# CONFIG_SPL_LOAD_FIT_FULL is not set
-CONFIG_PXE_UTILS=y
-CONFIG_BOOTSTD=y
-CONFIG_BOOTSTD_FULL=y
-# CONFIG_BOOTSTD_DEFAULTS is not set
-CONFIG_BOOTSTD_BOOTCOMMAND=y
-CONFIG_BOOTMETH_GLOBAL=y
-CONFIG_BOOTMETH_CROS=y
-CONFIG_BOOTMETH_EXTLINUX=y
-CONFIG_BOOTMETH_EFILOADER=y
-CONFIG_BOOTMETH_VBE=y
-CONFIG_BOOTMETH_VBE_REQUEST=y
-CONFIG_BOOTMETH_VBE_SIMPLE=y
-CONFIG_BOOTMETH_VBE_SIMPLE_OS=y
-CONFIG_EXPO=y
-CONFIG_BOOTMETH_SCRIPT=y
-# CONFIG_LEGACY_IMAGE_FORMAT is not set
-# CONFIG_SUPPORT_RAW_INITRD is not set
-# CONFIG_OF_BOARD_SETUP is not set
-# CONFIG_OF_SYSTEM_SETUP is not set
-# CONFIG_OF_STDOUT_VIA_ALIAS is not set
-CONFIG_HAVE_TEXT_BASE=y
-CONFIG_HAVE_SYS_MONITOR_BASE=y
-CONFIG_SYS_MONITOR_BASE=0x01110000
-# CONFIG_DYNAMIC_SYS_CLK_FREQ is not set
-CONFIG_ARCH_FIXUP_FDT_MEMORY=y
-# CONFIG_CHROMEOS is not set
-# CONFIG_CHROMEOS_VBOOT is not set
-# CONFIG_RAMBOOT_PBL is not set
-CONFIG_SYS_BOOT_RAMDISK_HIGH=y
-# CONFIG_DISTRO_DEFAULTS is not set
-
-#
-# Boot timing
-#
-# CONFIG_BOOTSTAGE is not set
-CONFIG_BOOTSTAGE_STASH_SIZE=0x1000
-CONFIG_SHOW_BOOT_PROGRESS=y
-
-#
-# Boot media
-#
-# CONFIG_NAND_BOOT is not set
-# CONFIG_ONENAND_BOOT is not set
-# CONFIG_QSPI_BOOT is not set
-# CONFIG_SATA_BOOT is not set
-# CONFIG_SD_BOOT is not set
-# CONFIG_SD_BOOT_QSPI is not set
-# CONFIG_SPI_BOOT is not set
-
-#
-# Autoboot options
-#
-CONFIG_AUTOBOOT=y
-CONFIG_BOOTDELAY=2
-# CONFIG_AUTOBOOT_KEYED is not set
-# CONFIG_AUTOBOOT_USE_MENUKEY is not set
-# CONFIG_BOOT_RETRY is not set
-
-#
-# Image support
-#
-# CONFIG_IMAGE_PRE_LOAD is not set
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
-# CONFIG_BOOTARGS_SUBST is not set
-# CONFIG_USE_BOOTCOMMAND is not set
-# CONFIG_USE_PREBOOT is not set
-CONFIG_DEFAULT_FDT_FILE=""
-
-#
-# Configuration editor
-#
-# CONFIG_CEDIT is not set
-
-#
-# Console
-#
-CONFIG_MENU=y
-# CONFIG_CONSOLE_RECORD is not set
-# CONFIG_DISABLE_CONSOLE is not set
-CONFIG_LOGLEVEL=4
-# CONFIG_SILENT_CONSOLE is not set
-# CONFIG_SPL_SILENT_CONSOLE is not set
-# CONFIG_TPL_SILENT_CONSOLE is not set
-CONFIG_PRE_CONSOLE_BUFFER=y
-CONFIG_CONSOLE_FLUSH_SUPPORT=y
-CONFIG_CONSOLE_MUX=y
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
-# CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE is not set
-# CONFIG_SYS_CONSOLE_ENV_OVERWRITE is not set
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_SYS_STDIO_DEREGISTER=y
-# CONFIG_SPL_SYS_STDIO_DEREGISTER is not set
-CONFIG_SYS_DEVICE_NULLDEV=y
-
-#
-# Logging
-#
-CONFIG_LOG=y
-CONFIG_LOG_MAX_LEVEL=6
-CONFIG_LOG_DEFAULT_LEVEL=6
-CONFIG_LOG_CONSOLE=y
-# CONFIG_LOGF_FILE is not set
-CONFIG_LOGF_LINE=y
-CONFIG_LOGF_FUNC=y
-CONFIG_LOGF_FUNC_PAD=20
-# CONFIG_LOG_SYSLOG is not set
-# CONFIG_LOG_ERROR_RETURN is not set
-
-#
-# Init options
-#
-# CONFIG_BOARD_TYPES is not set
-CONFIG_DISPLAY_CPUINFO=y
-# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_DISPLAY_BOARDINFO_LATE=y
-
-#
-# Start-up hooks
-#
-# CONFIG_CYCLIC is not set
-CONFIG_EVENT=y
-CONFIG_EVENT_DYNAMIC=y
-# CONFIG_EVENT_DEBUG is not set
-# CONFIG_ARCH_MISC_INIT is not set
-# CONFIG_BOARD_EARLY_INIT_F is not set
-CONFIG_BOARD_EARLY_INIT_R=y
-# CONFIG_BOARD_POSTCLK_INIT is not set
-# CONFIG_BOARD_LATE_INIT is not set
-# CONFIG_HWCONFIG is not set
-CONFIG_LAST_STAGE_INIT=y
-# CONFIG_MISC_INIT_R is not set
-# CONFIG_SYS_MALLOC_BOOTPARAMS is not set
-# CONFIG_ID_EEPROM is not set
-CONFIG_PCI_INIT_R=y
-# CONFIG_RESET_PHY_R is not set
-
-#
-# Security support
-#
-CONFIG_HASH=y
-# CONFIG_STACKPROTECTOR is not set
-# CONFIG_BOARD_RNG_SEED is not set
-
-#
-# Update support
-#
-# CONFIG_UPDATE_TFTP is not set
-# CONFIG_ANDROID_AB is not set
-
-#
-# Blob list
-#
-# CONFIG_BLOBLIST is not set
-CONFIG_SUPPORT_SPL=y
-CONFIG_SUPPORT_TPL=y
-# CONFIG_TPL is not set
-# CONFIG_VPL is not set
-CONFIG_IMAGE_SIGN_INFO=y
-# CONFIG_FDT_SIMPLEFB is not set
-# CONFIG_BMP is not set
-
-#
-# Command line interface
-#
-CONFIG_CMDLINE=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMDLINE_EDITING=y
-# CONFIG_CMDLINE_PS_SUPPORT is not set
-CONFIG_AUTO_COMPLETE=y
-CONFIG_SYS_LONGHELP=y
-CONFIG_SYS_PROMPT="=> "
-CONFIG_SYS_PROMPT_HUSH_PS2="> "
-CONFIG_SYS_MAXARGS=16
-CONFIG_SYS_CBSIZE=512
-CONFIG_SYS_PBSIZE=1044
-CONFIG_SYS_XTRACE=y
-
-#
-# Commands
-#
-
-#
-# Info commands
-#
-CONFIG_CMD_ACPI=y
-CONFIG_CMD_BDI=y
-CONFIG_CMD_BDINFO_EXTRA=y
-# CONFIG_CMD_CONFIG is not set
-CONFIG_CMD_CONSOLE=y
-# CONFIG_CMD_LICENSE is not set
-# CONFIG_CMD_PMC is not set
-
-#
-# Boot commands
-#
-CONFIG_CMD_BOOTD=y
-CONFIG_CMD_BOOTM=y
-CONFIG_CMD_BOOTDEV=y
-CONFIG_CMD_BOOTFLOW=y
-CONFIG_CMD_BOOTFLOW_FULL=y
-CONFIG_CMD_BOOTMETH=y
-CONFIG_BOOTM_EFI=y
-# CONFIG_CMD_BOOTZ is not set
-CONFIG_BOOTM_LINUX=y
-CONFIG_BOOTM_NETBSD=y
-# CONFIG_BOOTM_OPENRTOS is not set
-# CONFIG_BOOTM_OSE is not set
-CONFIG_BOOTM_PLAN9=y
-CONFIG_BOOTM_RTEMS=y
-CONFIG_CMD_VBE=y
-CONFIG_BOOTM_VXWORKS=y
-CONFIG_SYS_BOOTM_LEN=0x1000000
-CONFIG_CMD_BOOTEFI=y
-CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
-# CONFIG_CMD_BOOTEFI_HELLO is not set
-# CONFIG_CMD_BOOTEFI_SELFTEST is not set
-# CONFIG_CMD_BOOTMENU is not set
-# CONFIG_CMD_ADTIMG is not set
-CONFIG_CMD_ELF=y
-CONFIG_CMD_FDT=y
-CONFIG_CMD_GO=y
-CONFIG_CMD_RUN=y
-CONFIG_CMD_IMI=y
-# CONFIG_CMD_IMLS is not set
-CONFIG_CMD_XIMG=y
-# CONFIG_CMD_XXD is not set
-# CONFIG_CMD_THOR_DOWNLOAD is not set
-CONFIG_CMD_ZBOOT=y
-
-#
-# Environment commands
-#
-# CONFIG_CMD_ASKENV is not set
-CONFIG_CMD_EXPORTENV=y
-CONFIG_CMD_IMPORTENV=y
-CONFIG_CMD_EDITENV=y
-# CONFIG_CMD_GREPENV is not set
-CONFIG_CMD_SAVEENV=y
-# CONFIG_CMD_ERASEENV is not set
-CONFIG_CMD_ENV_EXISTS=y
-# CONFIG_CMD_ENV_CALLBACK is not set
-# CONFIG_CMD_ENV_FLAGS is not set
-# CONFIG_CMD_NVEDIT_EFI is not set
-# CONFIG_CMD_NVEDIT_INDIRECT is not set
-# CONFIG_CMD_NVEDIT_INFO is not set
-# CONFIG_CMD_NVEDIT_LOAD is not set
-# CONFIG_CMD_NVEDIT_SELECT is not set
-
-#
-# Memory commands
-#
-# CONFIG_CMD_BINOP is not set
-# CONFIG_CMD_BLOBLIST is not set
-CONFIG_CMD_CRC32=y
-# CONFIG_CRC32_VERIFY is not set
-# CONFIG_CMD_EEPROM is not set
-# CONFIG_LOOPW is not set
-# CONFIG_CMD_MD5SUM is not set
-# CONFIG_CMD_MEMINFO is not set
-CONFIG_CMD_MEMORY=y
-# CONFIG_CMD_MEM_SEARCH is not set
-# CONFIG_CMD_MX_CYCLIC is not set
-CONFIG_CMD_RANDOM=y
-# CONFIG_CMD_MEMTEST is not set
-# CONFIG_CMD_SHA1SUM is not set
-# CONFIG_CMD_STRINGS is not set
-
-#
-# Compression commands
-#
-# CONFIG_CMD_LZMADEC is not set
-# CONFIG_CMD_UNLZ4 is not set
-# CONFIG_CMD_UNZIP is not set
-# CONFIG_CMD_ZIP is not set
-
-#
-# Device access commands
-#
-# CONFIG_CMD_ARMFLASH is not set
-# CONFIG_CMD_BCB is not set
-# CONFIG_CMD_BIND is not set
-# CONFIG_CMD_CLK is not set
-# CONFIG_CMD_DEMO is not set
-# CONFIG_CMD_DFU is not set
-CONFIG_CMD_DM=y
-# CONFIG_CMD_FPGAD is not set
-# CONFIG_CMD_FUSE is not set
-# CONFIG_CMD_GPIO is not set
-# CONFIG_CMD_GPT is not set
-# CONFIG_RANDOM_UUID is not set
-# CONFIG_CMD_IDE is not set
-CONFIG_CMD_IO=y
-# CONFIG_CMD_IOTRACE is not set
-# CONFIG_CMD_I2C is not set
-CONFIG_CMD_LOADB=y
-# CONFIG_CMD_LOADM is not set
-CONFIG_CMD_LOADS=y
-# CONFIG_LOADS_ECHO is not set
-# CONFIG_CMD_SAVES is not set
-# CONFIG_SYS_LOADS_BAUD_CHANGE is not set
-CONFIG_CMD_LOADXY_TIMEOUT=90
-# CONFIG_CMD_LSBLK is not set
-# CONFIG_CMD_MBR is not set
-CONFIG_CMD_MMC=y
-# CONFIG_CMD_BKOPS_ENABLE is not set
-# CONFIG_CMD_MMC_SWRITE is not set
-# CONFIG_CMD_CLONE is not set
-CONFIG_CMD_NVME=y
-# CONFIG_CMD_OSD is not set
-CONFIG_CMD_PART=y
-CONFIG_CMD_PCI=y
-# CONFIG_CMD_PCI_MPS is not set
-# CONFIG_CMD_POWEROFF is not set
-# CONFIG_CMD_READ is not set
-# CONFIG_CMD_SATA is not set
-CONFIG_CMD_SCSI=y
-# CONFIG_CMD_SDRAM is not set
-# CONFIG_CMD_TSI148 is not set
-# CONFIG_CMD_UNIVERSE is not set
-CONFIG_CMD_USB=y
-# CONFIG_CMD_USB_SDP is not set
-# CONFIG_CMD_WRITE is not set
-
-#
-# Shell scripting commands
-#
-# CONFIG_CMD_CAT is not set
-CONFIG_CMD_ECHO=y
-CONFIG_CMD_ITEST=y
-CONFIG_CMD_SOURCE=y
-# CONFIG_CMD_SETEXPR is not set
-
-#
-# Android support commands
-#
-CONFIG_CMD_NET=y
-CONFIG_CMD_BOOTP=y
-CONFIG_CMD_DHCP=y
-# CONFIG_BOOTP_MAY_FAIL is not set
-CONFIG_BOOTP_BOOTPATH=y
-# CONFIG_BOOTP_VENDOREX is not set
-CONFIG_BOOTP_BOOTFILESIZE=y
-CONFIG_BOOTP_DNS=y
-# CONFIG_BOOTP_DNS2 is not set
-CONFIG_BOOTP_GATEWAY=y
-CONFIG_BOOTP_HOSTNAME=y
-# CONFIG_BOOTP_PREFER_SERVERIP is not set
-CONFIG_BOOTP_SUBNETMASK=y
-# CONFIG_BOOTP_NISDOMAIN is not set
-# CONFIG_BOOTP_NTPSERVER is not set
-# CONFIG_CMD_PCAP is not set
-CONFIG_BOOTP_VCI_STRING="U-Boot"
-CONFIG_CMD_TFTPBOOT=y
-# CONFIG_CMD_TFTPPUT is not set
-# CONFIG_CMD_TFTPSRV is not set
-CONFIG_NET_TFTP_VARS=y
-# CONFIG_CMD_RARP is not set
-# CONFIG_CMD_NFS is not set
-# CONFIG_SYS_DISABLE_AUTOLOAD is not set
-# CONFIG_CMD_WGET is not set
-# CONFIG_CMD_MII is not set
-# CONFIG_CMD_MDIO is not set
-CONFIG_CMD_PING=y
-# CONFIG_CMD_CDP is not set
-# CONFIG_CMD_SNTP is not set
-# CONFIG_CMD_DNS is not set
-# CONFIG_CMD_LINK_LOCAL is not set
-# CONFIG_CMD_ETHSW is not set
-# CONFIG_CMD_PXE is not set
-# CONFIG_CMD_WOL is not set
-
-#
-# Misc commands
-#
-# CONFIG_CMD_2048 is not set
-# CONFIG_CMD_BMP is not set
-# CONFIG_CMD_BSP is not set
-CONFIG_CMD_BLOCK_CACHE=y
-# CONFIG_CMD_CACHE is not set
-# CONFIG_CMD_CONITRACE is not set
-CONFIG_CMD_CLS=y
-# CONFIG_CMD_EFIDEBUG is not set
-CONFIG_CMD_EFICONFIG=y
-# CONFIG_CMD_EXCEPTION is not set
-# CONFIG_CMD_INI is not set
-CONFIG_CMD_DATE=y
-# CONFIG_CMD_RTC is not set
-CONFIG_CMD_TIME=y
-CONFIG_CMD_GETTIME=y
-# CONFIG_CMD_PAUSE is not set
-CONFIG_CMD_SLEEP=y
-# CONFIG_CMD_TIMER is not set
-CONFIG_CMD_SOUND=y
-# CONFIG_CMD_SYSBOOT is not set
-# CONFIG_CMD_QFW is not set
-# CONFIG_CMD_PSTORE is not set
-# CONFIG_CMD_TERMINAL is not set
-# CONFIG_CMD_UUID is not set
-CONFIG_CMD_VIDCONSOLE=y
-# CONFIG_CMD_SELECT_FONT is not set
-
-#
-# TI specific command line interface
-#
-# CONFIG_CMD_DDR3 is not set
-
-#
-# Power commands
-#
-
-#
-# Security commands
-#
-# CONFIG_CMD_AES is not set
-# CONFIG_CMD_BLOB is not set
-# CONFIG_CMD_HASH is not set
-
-#
-# Firmware commands
-#
-
-#
-# Filesystem commands
-#
-# CONFIG_CMD_BTRFS is not set
-CONFIG_CMD_CBFS=y
-# CONFIG_CMD_EROFS is not set
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-# CONFIG_CMD_SQUASHFS is not set
-CONFIG_CMD_FS_GENERIC=y
-# CONFIG_CMD_FS_UUID is not set
-# CONFIG_CMD_JFFS2 is not set
-# CONFIG_CMD_REISER is not set
-# CONFIG_CMD_ZFS is not set
-
-#
-# Debug commands
-#
-CONFIG_CMD_CBSYSINFO=y
-# CONFIG_CMD_DIAG is not set
-# CONFIG_CMD_EVENT is not set
-CONFIG_CMD_IRQ=y
-# CONFIG_CMD_LOG is not set
-# CONFIG_CMD_UBI is not set
-# CONFIG_MMC_SPEED_MODE_SET is not set
-
-#
-# Partition Types
-#
-CONFIG_PARTITIONS=y
-CONFIG_MAC_PARTITION=y
-CONFIG_DOS_PARTITION=y
-CONFIG_ISO_PARTITION=y
-# CONFIG_AMIGA_PARTITION is not set
-CONFIG_EFI_PARTITION=y
-CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=128
-CONFIG_EFI_PARTITION_ENTRIES_OFF=0
-CONFIG_PARTITION_UUIDS=y
-# CONFIG_PARTITION_TYPE_GUID is not set
-CONFIG_SUPPORT_OF_CONTROL=y
-
-#
-# Device Tree Control
-#
-CONFIG_OF_CONTROL=y
-CONFIG_OF_REAL=y
-# CONFIG_OF_LIVE is not set
-# CONFIG_OF_SEPARATE is not set
-CONFIG_OF_EMBED=y
-# CONFIG_OF_BOARD is not set
-# CONFIG_OF_OMIT_DTB is not set
-CONFIG_DEVICE_TREE_INCLUDES=""
-CONFIG_OF_LIST="coreboot"
-# CONFIG_MULTI_DTB_FIT is not set
-CONFIG_OF_TAG_MIGRATE=y
-# CONFIG_OF_DTB_PROPS_REMOVE is not set
-
-#
-# Environment
-#
-CONFIG_ENV_SUPPORT=y
-CONFIG_SAVEENV=y
-CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_MIN_ENTRIES=64
-CONFIG_ENV_MAX_ENTRIES=512
-CONFIG_ENV_IS_DEFAULT=y
-CONFIG_ENV_IS_NOWHERE=y
-# CONFIG_ENV_IS_IN_EEPROM is not set
-# CONFIG_ENV_IS_IN_FAT is not set
-# CONFIG_ENV_IS_IN_EXT4 is not set
-# CONFIG_ENV_IS_IN_FLASH is not set
-# CONFIG_ENV_IS_IN_MMC is not set
-# CONFIG_ENV_IS_IN_NAND is not set
-# CONFIG_ENV_IS_IN_NVRAM is not set
-# CONFIG_ENV_IS_IN_ONENAND is not set
-# CONFIG_ENV_IS_IN_REMOTE is not set
-# CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-# CONFIG_USE_DEFAULT_ENV_FILE is not set
-# CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG is not set
-# CONFIG_ENV_IMPORT_FDT is not set
-# CONFIG_ENV_APPEND is not set
-# CONFIG_ENV_WRITEABLE_LIST is not set
-# CONFIG_ENV_ACCESS_IGNORE_FORCE is not set
-CONFIG_USE_BOOTFILE=y
-CONFIG_BOOTFILE="bzImage"
-# CONFIG_USE_ETHPRIME is not set
-CONFIG_USE_HOSTNAME=y
-CONFIG_HOSTNAME="x86"
-# CONFIG_VERSION_VARIABLE is not set
-CONFIG_NET=y
-CONFIG_ARP_TIMEOUT=5000
-CONFIG_NET_RETRY_COUNT=5
-# CONFIG_PROT_UDP is not set
-CONFIG_BOOTDEV_ETH=y
-# CONFIG_BOOTP_SEND_HOSTNAME is not set
-# CONFIG_NET_RANDOM_ETHADDR is not set
-# CONFIG_NETCONSOLE is not set
-# CONFIG_IP_DEFRAG is not set
-# CONFIG_SYS_FAULT_ECHO_LINK_DOWN is not set
-CONFIG_TFTP_BLOCKSIZE=1468
-# CONFIG_TFTP_PORT is not set
-CONFIG_TFTP_WINDOWSIZE=1
-CONFIG_TFTP_TSIZE=y
-# CONFIG_SERVERIP_FROM_PROXYDHCP is not set
-CONFIG_SERVERIP_FROM_PROXYDHCP_DELAY_MS=100
-# CONFIG_KEEP_SERVERADDR is not set
-# CONFIG_UDP_CHECKSUM is not set
-# CONFIG_BOOTP_SERVERIP is not set
-CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64
-# CONFIG_USE_GATEWAYIP is not set
-# CONFIG_USE_IPADDR is not set
-# CONFIG_USE_NETMASK is not set
-CONFIG_USE_ROOTPATH=y
-CONFIG_ROOTPATH="/opt/nfsroot"
-# CONFIG_USE_SERVERIP is not set
-# CONFIG_PROT_TCP is not set
-# CONFIG_IPV6 is not set
-CONFIG_SYS_RX_ETH_BUFFER=4
-
-#
-# Device Drivers
-#
-
-#
-# Generic Driver Options
-#
-CONFIG_DM=y
-CONFIG_DM_WARN=y
-# CONFIG_DM_DEBUG is not set
-# CONFIG_DM_STATS is not set
-CONFIG_DM_DEVICE_REMOVE=y
-CONFIG_DM_EVENT=y
-CONFIG_DM_STDIO=y
-CONFIG_DM_SEQ_ALIAS=y
-# CONFIG_DM_DMA is not set
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-# CONFIG_DEVRES is not set
-CONFIG_SIMPLE_BUS=y
-# CONFIG_SIMPLE_BUS_CORRECT_RANGE is not set
-CONFIG_OF_TRANSLATE=y
-# CONFIG_TRANSLATION_OFFSET is not set
-CONFIG_DM_DEV_READ_INLINE=y
-# CONFIG_OFNODE_MULTI_TREE is not set
-# CONFIG_ACPIGEN is not set
-# CONFIG_BOUNCE_BUFFER is not set
-# CONFIG_ADC is not set
-# CONFIG_ADC_EXYNOS is not set
-# CONFIG_ADC_SANDBOX is not set
-# CONFIG_SARADC_MESON is not set
-# CONFIG_SARADC_ROCKCHIP is not set
-# CONFIG_ADC_IMX93 is not set
-# CONFIG_SATA is not set
-CONFIG_LIBATA=y
-CONFIG_SCSI_AHCI=y
-
-#
-# SATA/SCSI device support
-#
-CONFIG_AHCI_PCI=y
-# CONFIG_DWC_AHCI is not set
-# CONFIG_DWC_AHSATA is not set
-# CONFIG_MTK_AHCI is not set
-# CONFIG_SUNXI_AHCI is not set
-# CONFIG_AXI is not set
-
-#
-# Bus devices
-#
-CONFIG_BLK=y
-CONFIG_BLOCK_CACHE=y
-# CONFIG_BLKMAP is not set
-# CONFIG_EFI_MEDIA is not set
-# CONFIG_IDE is not set
-# CONFIG_LBA48 is not set
-# CONFIG_SYS_64BIT_LBA is not set
-# CONFIG_BOOTCOUNT_LIMIT is not set
-
-#
-# Button Support
-#
-# CONFIG_BUTTON is not set
-
-#
-# Cache Controller drivers
-#
-# CONFIG_CACHE is not set
-# CONFIG_V5L2_CACHE is not set
-# CONFIG_NCORE_CACHE is not set
-# CONFIG_SIFIVE_CCACHE is not set
-
-#
-# Clock
-#
-# CONFIG_CLK is not set
-# CONFIG_CLK_CCF is not set
-# CONFIG_CLK_RCAR is not set
-# CONFIG_CLK_RCAR_CPG_LIB is not set
-# CONFIG_CPU is not set
-
-#
-# Hardware crypto devices
-#
-# CONFIG_DM_HASH is not set
-# CONFIG_FSL_CAAM is not set
-# CONFIG_SYS_FSL_SEC_BE is not set
-# CONFIG_SYS_FSL_SEC_LE is not set
-# CONFIG_NPCM_AES is not set
-# CONFIG_NPCM_SHA is not set
-# CONFIG_DDR_SPD is not set
-# CONFIG_IMX_SNPS_DDR_PHY is not set
-
-#
-# Demo for driver model
-#
-# CONFIG_DM_DEMO is not set
-
-#
-# DFU support
-#
-
-#
-# DMA Support
-#
-# CONFIG_DMA is not set
-# CONFIG_DMA_LPC32XX is not set
-# CONFIG_TI_EDMA3 is not set
-# CONFIG_DMA_LEGACY is not set
-
-#
-# Extcon Support
-#
-# CONFIG_EXTCON is not set
-
-#
-# Fastboot support
-#
-# CONFIG_UDP_FUNCTION_FASTBOOT is not set
-# CONFIG_TCP_FUNCTION_FASTBOOT is not set
-# CONFIG_FIRMWARE is not set
-# CONFIG_ZYNQMP_FIRMWARE is not set
-# CONFIG_DM_FUZZING_ENGINE is not set
-
-#
-# FPGA support
-#
-# CONFIG_FPGA_ALTERA is not set
-# CONFIG_FPGA_SOCFPGA is not set
-# CONFIG_FPGA_LATTICE is not set
-# CONFIG_FPGA_XILINX is not set
-# CONFIG_DM_FPGA is not set
-# CONFIG_FWU_MDATA is not set
-CONFIG_GPIO=y
-# CONFIG_GPIO_HOG is not set
-# CONFIG_DM_GPIO_LOOKUP_LABEL is not set
-# CONFIG_ALTERA_PIO is not set
-# CONFIG_BCM2835_GPIO is not set
-# CONFIG_DWAPB_GPIO is not set
-# CONFIG_AT91_GPIO is not set
-# CONFIG_ATMEL_PIO4 is not set
-# CONFIG_ASPEED_GPIO is not set
-# CONFIG_DA8XX_GPIO is not set
-# CONFIG_HIKEY_GPIO is not set
-# CONFIG_INTEL_BROADWELL_GPIO is not set
-# CONFIG_INTEL_GPIO is not set
-# CONFIG_INTEL_ICH6_GPIO is not set
-# CONFIG_IMX_RGPIO2P is not set
-# CONFIG_IPROC_GPIO is not set
-# CONFIG_HSDK_CREG_GPIO is not set
-# CONFIG_KIRKWOOD_GPIO is not set
-# CONFIG_LPC32XX_GPIO is not set
-# CONFIG_MCP230XX_GPIO is not set
-# CONFIG_MSM_GPIO is not set
-# CONFIG_MXC_GPIO is not set
-# CONFIG_MXS_GPIO is not set
-# CONFIG_NPCM_GPIO is not set
-# CONFIG_CMD_PCA953X is not set
-# CONFIG_ROCKCHIP_GPIO is not set
-# CONFIG_XILINX_GPIO is not set
-# CONFIG_TCA642X is not set
-# CONFIG_TEGRA_GPIO is not set
-# CONFIG_TEGRA186_GPIO is not set
-# CONFIG_VYBRID_GPIO is not set
-# CONFIG_SIFIVE_GPIO is not set
-# CONFIG_ZYNQ_GPIO is not set
-# CONFIG_DM_74X164 is not set
-# CONFIG_PCA953X is not set
-# CONFIG_MPC8XXX_GPIO is not set
-# CONFIG_MPC8XX_GPIO is not set
-# CONFIG_NX_GPIO is not set
-# CONFIG_NOMADIK_GPIO is not set
-# CONFIG_ZYNQMP_GPIO_MODEPIN is not set
-# CONFIG_SLG7XL45106_I2C_GPO is not set
-# CONFIG_TURRIS_OMNIA_MCU is not set
-# CONFIG_FTGPIO010 is not set
-
-#
-# Hardware Spinlock Support
-#
-# CONFIG_DM_HWSPINLOCK is not set
-CONFIG_I2C=y
-# CONFIG_DM_I2C is not set
-# CONFIG_SYS_I2C_LEGACY is not set
-# CONFIG_SPL_SYS_I2C_LEGACY is not set
-# CONFIG_TPL_SYS_I2C_LEGACY is not set
-# CONFIG_SYS_I2C_FSL is not set
-# CONFIG_SYS_I2C_DW is not set
-# CONFIG_SYS_I2C_IMX_LPI2C is not set
-# CONFIG_SYS_I2C_MTK is not set
-# CONFIG_SYS_I2C_MICROCHIP is not set
-# CONFIG_SYS_I2C_MXC is not set
-# CONFIG_SYS_I2C_NPCM is not set
-# CONFIG_SYS_I2C_SOFT is not set
-# CONFIG_SYS_I2C_MV is not set
-# CONFIG_SYS_I2C_MVTWSI is not set
-CONFIG_INPUT=y
-CONFIG_DM_KEYBOARD=y
-# CONFIG_BUTTON_KEYBOARD is not set
-# CONFIG_CROS_EC_KEYB is not set
-CONFIG_I8042_KEYB=y
-# CONFIG_TEGRA_KEYBOARD is not set
-# CONFIG_TWL4030_INPUT is not set
-
-#
-# IOMMU device drivers
-#
-# CONFIG_IOMMU is not set
-
-#
-# LED Support
-#
-# CONFIG_LED is not set
-# CONFIG_LED_STATUS is not set
-
-#
-# Mailbox Controller Support
-#
-# CONFIG_DM_MAILBOX is not set
-
-#
-# Memory Controller drivers
-#
-# CONFIG_MEMORY is not set
-# CONFIG_ATMEL_EBI is not set
-# CONFIG_MFD_ATMEL_SMC is not set
-
-#
-# Multifunction device drivers
-#
-# CONFIG_MISC is not set
-# CONFIG_NVMEM is not set
-# CONFIG_SPL_NVMEM is not set
-# CONFIG_SMSC_LPC47M is not set
-# CONFIG_SMSC_SIO1007 is not set
-# CONFIG_CROS_EC is not set
-# CONFIG_DS4510 is not set
-# CONFIG_FSL_SEC_MON is not set
-CONFIG_IRQ=y
-# CONFIG_NPCM_HOST is not set
-# CONFIG_NUVOTON_NCT6102D is not set
-# CONFIG_P2SB is not set
-# CONFIG_PWRSEQ is not set
-# CONFIG_PCA9551_LED is not set
-# CONFIG_TEST_DRV is not set
-# CONFIG_USB_HUB_USB251XB is not set
-# CONFIG_TWL4030_LED is not set
-# CONFIG_WINBOND_W83627 is not set
-# CONFIG_FS_LOADER is not set
-
-#
-# MMC Host controller Support
-#
-CONFIG_MMC=y
-CONFIG_MMC_WRITE=y
-# CONFIG_MMC_BROKEN_CD is not set
-CONFIG_DM_MMC=y
-# CONFIG_ARM_PL180_MMCI is not set
-CONFIG_MMC_QUIRKS=y
-CONFIG_SYS_MMC_MAX_BLK_COUNT=65535
-CONFIG_MMC_HW_PARTITIONING=y
-# CONFIG_SUPPORT_EMMC_RPMB is not set
-# CONFIG_SUPPORT_EMMC_BOOT is not set
-# CONFIG_MMC_IO_VOLTAGE is not set
-# CONFIG_MMC_HS400_ES_SUPPORT is not set
-# CONFIG_MMC_HS400_SUPPORT is not set
-# CONFIG_MMC_HS200_SUPPORT is not set
-CONFIG_MMC_VERBOSE=y
-# CONFIG_MMC_TRACE is not set
-# CONFIG_MMC_DW is not set
-# CONFIG_MMC_MXC is not set
-CONFIG_MMC_PCI=y
-# CONFIG_MMC_OMAP_HS is not set
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_SDMA=y
-# CONFIG_MMC_SDHCI_ADMA is not set
-# CONFIG_MMC_SDHCI_BCMSTB is not set
-# CONFIG_MMC_SDHCI_CADENCE is not set
-# CONFIG_MMC_SDHCI_IPROC is not set
-# CONFIG_MMC_SDHCI_F_SDH30 is not set
-# CONFIG_MMC_SDHCI_KONA is not set
-# CONFIG_MMC_SDHCI_MSM is not set
-# CONFIG_MMC_SDHCI_NPCM is not set
-# CONFIG_MMC_SDHCI_S5P is not set
-# CONFIG_MMC_SDHCI_STI is not set
-# CONFIG_MMC_SDHCI_XENON is not set
-# CONFIG_MMC_SDHCI_TANGIER is not set
-# CONFIG_MMC_SDHCI_ZYNQ is not set
-# CONFIG_MMC_PITON is not set
-# CONFIG_STM32_SDMMC2 is not set
-# CONFIG_FTSDC010 is not set
-# CONFIG_FSL_ESDHC is not set
-# CONFIG_FSL_ESDHC_IMX is not set
-
-#
-# MTD Support
-#
-# CONFIG_MTD is not set
-# CONFIG_DM_MTD is not set
-# CONFIG_MTD_NOR_FLASH is not set
-# CONFIG_FLASH_CFI_DRIVER is not set
-# CONFIG_HBMC_AM654 is not set
-# CONFIG_SAMSUNG_ONENAND is not set
-# CONFIG_USE_SYS_MAX_FLASH_BANKS is not set
-# CONFIG_MTD_RAW_NAND is not set
-
-#
-# SPI Flash Support
-#
-# CONFIG_SPI_FLASH is not set
-
-#
-# UBI support
-#
-# CONFIG_UBI_SILENCE_MSG is not set
-# CONFIG_MTD_UBI is not set
-# CONFIG_NVMXIP is not set
-# CONFIG_NVMXIP_QSPI is not set
-
-#
-# Multiplexer drivers
-#
-# CONFIG_MULTIPLEXER is not set
-# CONFIG_BITBANGMII is not set
-# CONFIG_MV88E6352_SWITCH is not set
-CONFIG_PHYLIB=y
-# CONFIG_PHY_ADDR_ENABLE is not set
-# CONFIG_B53_SWITCH is not set
-# CONFIG_MV88E61XX_SWITCH is not set
-# CONFIG_PHYLIB_10G is not set
-# CONFIG_PHY_ADIN is not set
-# CONFIG_PHY_AQUANTIA is not set
-# CONFIG_PHY_ATHEROS is not set
-# CONFIG_SPL_PHY_ATHEROS is not set
-# CONFIG_PHY_BROADCOM is not set
-# CONFIG_PHY_CORTINA is not set
-# CONFIG_PHY_DAVICOM is not set
-# CONFIG_PHY_ET1011C is not set
-# CONFIG_PHY_LXT is not set
-# CONFIG_PHY_MARVELL is not set
-# CONFIG_PHY_MARVELL_10G is not set
-# CONFIG_PHY_MESON_GXL is not set
-# CONFIG_PHY_MICREL is not set
-# CONFIG_PHY_MOTORCOMM is not set
-# CONFIG_PHY_MSCC is not set
-# CONFIG_PHY_NATSEMI is not set
-# CONFIG_PHY_NXP_C45_TJA11XX is not set
-# CONFIG_PHY_NXP_TJA11XX is not set
-# CONFIG_PHY_REALTEK is not set
-# CONFIG_PHY_SMSC is not set
-# CONFIG_PHY_TERANETICS is not set
-# CONFIG_PHY_TI is not set
-# CONFIG_PHY_TI_DP83867 is not set
-# CONFIG_PHY_TI_DP83869 is not set
-# CONFIG_PHY_TI_GENERIC is not set
-# CONFIG_PHY_VITESSE is not set
-# CONFIG_PHY_XILINX is not set
-# CONFIG_PHY_XILINX_GMII2RGMII is not set
-# CONFIG_PHY_XWAY is not set
-# CONFIG_PHY_ETHERNET_ID is not set
-# CONFIG_PHY_FIXED is not set
-# CONFIG_PHY_NCSI is not set
-# CONFIG_FSL_MEMAC is not set
-CONFIG_PHY_RESET_DELAY=0
-# CONFIG_FSL_PFE is not set
-CONFIG_ETH=y
-CONFIG_DM_ETH=y
-# CONFIG_DM_MDIO is not set
-# CONFIG_DM_ETH_PHY is not set
-CONFIG_NETDEVICES=y
-# CONFIG_PHY_GIGE is not set
-# CONFIG_ALTERA_TSE is not set
-# CONFIG_BCM_SF2_ETH is not set
-# CONFIG_BCMGENET is not set
-# CONFIG_BNXT_ETH is not set
-# CONFIG_CALXEDA_XGMAC is not set
-# CONFIG_DRIVER_DM9000 is not set
-# CONFIG_DWC_ETH_QOS is not set
-CONFIG_E1000=y
-# CONFIG_E1000_NO_NVM is not set
-# CONFIG_E1000_SPI_GENERIC is not set
-# CONFIG_E1000_SPI is not set
-# CONFIG_CMD_E1000 is not set
-# CONFIG_EEPRO100 is not set
-CONFIG_ETH_DESIGNWARE=y
-# CONFIG_ETH_DESIGNWARE_MESON8B is not set
-# CONFIG_ETH_DESIGNWARE_SOCFPGA is not set
-# CONFIG_ETH_DESIGNWARE_S700 is not set
-# CONFIG_DW_ALTDESCRIPTOR is not set
-# CONFIG_ETHOC is not set
-# CONFIG_FTMAC100 is not set
-# CONFIG_FTGMAC100 is not set
-# CONFIG_MCFFEC is not set
-# CONFIG_FSLDMAFEC is not set
-# CONFIG_KS8851_MLL is not set
-# CONFIG_LITEETH is not set
-# CONFIG_MACB is not set
-# CONFIG_NET_NPCM750 is not set
-CONFIG_PCH_GBE=y
-# CONFIG_RGMII is not set
-# CONFIG_MII is not set
-# CONFIG_RMII is not set
-# CONFIG_PCNET is not set
-# CONFIG_QE_UEC is not set
-# CONFIG_RTL8139 is not set
-CONFIG_RTL8169=y
-# CONFIG_SMC911X is not set
-# CONFIG_SUN7I_GMAC is not set
-# CONFIG_SUN4I_EMAC is not set
-# CONFIG_SUN8I_EMAC is not set
-# CONFIG_SH_ETHER is not set
-# CONFIG_DRIVER_TI_CPSW is not set
-# CONFIG_DRIVER_TI_EMAC is not set
-# CONFIG_DRIVER_TI_KEYSTONE_NET is not set
-# CONFIG_TULIP is not set
-# CONFIG_XILINX_AXIEMAC is not set
-# CONFIG_VSC7385_ENET is not set
-# CONFIG_XILINX_EMACLITE is not set
-# CONFIG_ZYNQ_GEM is not set
-# CONFIG_GMAC_ROCKCHIP is not set
-# CONFIG_TSEC_ENET is not set
-# CONFIG_MEDIATEK_ETH is not set
-# CONFIG_HIGMACV300_ETH is not set
-CONFIG_NVME=y
-# CONFIG_NVME_APPLE is not set
-CONFIG_NVME_PCI=y
-# CONFIG_DM_PCI_COMPAT is not set
-# CONFIG_PCI_PNP is not set
-# CONFIG_PCI_REGION_MULTI_ENTRY is not set
-CONFIG_PCI_CONFIG_HOST_BRIDGE=y
-# CONFIG_PCI_SRIOV is not set
-CONFIG_PCI_ENHANCED_ALLOCATION=y
-# CONFIG_PCI_ARID is not set
-# CONFIG_PCIE_ECAM_GENERIC is not set
-# CONFIG_PCIE_ECAM_SYNQUACER is not set
-# CONFIG_PCI_PHYTIUM is not set
-# CONFIG_PCIE_FSL is not set
-# CONFIG_PCI_MPC85XX is not set
-# CONFIG_PCI_XILINX is not set
-# CONFIG_PCIE_LAYERSCAPE_RC is not set
-# CONFIG_PCIE_LAYERSCAPE_EP is not set
-# CONFIG_PCIE_LAYERSCAPE_GEN4 is not set
-# CONFIG_PCIE_INTEL_FPGA is not set
-# CONFIG_PCIE_IPROC is not set
-# CONFIG_PCI_KEYSTONE is not set
-# CONFIG_PCIE_STARFIVE_JH7110 is not set
-
-#
-# PCI Endpoint
-#
-# CONFIG_PCI_ENDPOINT is not set
-CONFIG_PCH=y
-CONFIG_X86_PCH7=y
-CONFIG_X86_PCH9=y
-
-#
-# PHY Subsystem
-#
-# CONFIG_PHY is not set
-# CONFIG_MIPI_DPHY_HELPERS is not set
-
-#
-# Rockchip PHY driver
-#
-# CONFIG_MVEBU_COMPHY_SUPPORT is not set
-
-#
-# Pin controllers
-#
-# CONFIG_PINCTRL is not set
-CONFIG_POWER=y
-# CONFIG_POWER_LEGACY is not set
-# CONFIG_ACPI_PMC is not set
-
-#
-# Power Domain Support
-#
-# CONFIG_POWER_DOMAIN is not set
-# CONFIG_DM_PMIC is not set
-# CONFIG_PMIC_TPS65217 is not set
-# CONFIG_POWER_TPS65218 is not set
-# CONFIG_POWER_TPS62362 is not set
-# CONFIG_DM_REGULATOR is not set
-# CONFIG_TPS6586X_POWER is not set
-# CONFIG_POWER_MT6323 is not set
-# CONFIG_DM_PWM is not set
-# CONFIG_PWM_IMX is not set
-# CONFIG_PWM_SANDBOX is not set
-# CONFIG_U_QE is not set
-# CONFIG_RAM is not set
-
-#
-# Reboot Mode Support
-#
-# CONFIG_DM_REBOOT_MODE is not set
-
-#
-# Remote Processor drivers
-#
-
-#
-# Reset Controller Support
-#
-# CONFIG_RESET_SCMI is not set
-# CONFIG_DM_RNG is not set
-
-#
-# Real Time Clock
-#
-CONFIG_DM_RTC=y
-# CONFIG_RTC_ENABLE_32KHZ_OUTPUT is not set
-# CONFIG_RTC_PCF2127 is not set
-# CONFIG_RTC_DS1307 is not set
-# CONFIG_RTC_DS1337 is not set
-# CONFIG_RTC_DS1338 is not set
-# CONFIG_RTC_DS3231 is not set
-# CONFIG_RTC_EMULATION is not set
-# CONFIG_RTC_ISL1208 is not set
-# CONFIG_RTC_PCF8563 is not set
-# CONFIG_RTC_PT7C4338 is not set
-# CONFIG_RTC_RV3028 is not set
-# CONFIG_RTC_RV3029 is not set
-# CONFIG_RTC_RV8803 is not set
-# CONFIG_RTC_RX8010SJ is not set
-# CONFIG_RTC_RX8025 is not set
-# CONFIG_RTC_PL031 is not set
-# CONFIG_RTC_MV is not set
-# CONFIG_RTC_S35392A is not set
-CONFIG_RTC_MC146818=y
-# CONFIG_RTC_M41T62 is not set
-# CONFIG_RTC_STM32 is not set
-# CONFIG_RTC_ABX80X is not set
-# CONFIG_RTC_HT1380 is not set
-CONFIG_SCSI=y
-CONFIG_DM_SCSI=y
-CONFIG_SERIAL=y
-CONFIG_BAUDRATE=115200
-CONFIG_REQUIRE_SERIAL_CONSOLE=y
-# CONFIG_SPECIFY_CONSOLE_INDEX is not set
-CONFIG_SERIAL_PRESENT=y
-CONFIG_DM_SERIAL=y
-# CONFIG_SERIAL_RX_BUFFER is not set
-# CONFIG_SERIAL_PUTS is not set
-# CONFIG_SERIAL_SEARCH_ALL is not set
-# CONFIG_SERIAL_PROBE_ALL is not set
-# CONFIG_VPL_DM_SERIAL is not set
-# CONFIG_ALTERA_JTAG_UART is not set
-# CONFIG_ALTERA_UART is not set
-# CONFIG_ARC_SERIAL is not set
-# CONFIG_ATMEL_USART is not set
-# CONFIG_BCM6345_SERIAL is not set
-CONFIG_COREBOOT_SERIAL=y
-CONFIG_COREBOOT_SERIAL_FROM_DBG2=y
-# CONFIG_CORTINA_UART is not set
-# CONFIG_FSL_LINFLEXUART is not set
-# CONFIG_FSL_LPUART is not set
-# CONFIG_MVEBU_A3700_UART is not set
-# CONFIG_MCFUART is not set
-# CONFIG_NULLDEV_SERIAL is not set
-CONFIG_SYS_NS16550=y
-CONFIG_NS16550_DYNAMIC=y
-# CONFIG_SYS_NS16550_MEM32 is not set
-# CONFIG_SYS_NS16550_PORT_MAPPED is not set
-# CONFIG_PL01X_SERIAL is not set
-# CONFIG_ROCKCHIP_SERIAL is not set
-# CONFIG_XILINX_UARTLITE is not set
-# CONFIG_MSM_SERIAL is not set
-# CONFIG_MSM_GENI_SERIAL is not set
-# CONFIG_MXS_AUART_SERIAL is not set
-# CONFIG_OMAP_SERIAL is not set
-# CONFIG_SIFIVE_SERIAL is not set
-# CONFIG_ZYNQ_SERIAL is not set
-# CONFIG_MTK_SERIAL is not set
-# CONFIG_MT7620_SERIAL is not set
-# CONFIG_NPCM_SERIAL is not set
-# CONFIG_SMEM is not set
-
-#
-# Sound support
-#
-CONFIG_SOUND=y
-# CONFIG_I2S is not set
-# CONFIG_SOUND_DA7219 is not set
-CONFIG_SOUND_I8254=y
-# CONFIG_SOUND_INTEL_HDA is not set
-# CONFIG_SOUND_IVYBRIDGE is not set
-# CONFIG_SOUND_MAX98357A is not set
-# CONFIG_SOUND_RT5677 is not set
-
-#
-# SOC (System On Chip) specific Drivers
-#
-# CONFIG_SOC_DEVICE is not set
-# CONFIG_SOC_TI is not set
-# CONFIG_SPI is not set
-
-#
-# SPMI support
-#
-# CONFIG_SPMI is not set
-# CONFIG_SYSINFO is not set
-
-#
-# System reset device drivers
-#
-CONFIG_SYSRESET=y
-CONFIG_SYSRESET_CMD_RESET=y
-# CONFIG_POWEROFF_GPIO is not set
-# CONFIG_SYSRESET_GPIO is not set
-# CONFIG_SYSRESET_SYSCON is not set
-# CONFIG_SYSRESET_WATCHDOG is not set
-# CONFIG_SYSRESET_RESETCTL is not set
-CONFIG_SYSRESET_X86=y
-# CONFIG_SYSRESET_SPL_X86 is not set
-# CONFIG_SYSRESET_TPL_X86 is not set
-# CONFIG_SYSRESET_MPC83XX is not set
-# CONFIG_DM_THERMAL is not set
-
-#
-# Timer Support
-#
-CONFIG_TIMER=y
-# CONFIG_TIMER_EARLY is not set
-# CONFIG_ALTERA_TIMER is not set
-# CONFIG_AST_TIMER is not set
-# CONFIG_ATCPIT100_TIMER is not set
-# CONFIG_ATMEL_PIT_TIMER is not set
-# CONFIG_CADENCE_TTC_TIMER is not set
-# CONFIG_DESIGNWARE_APB_TIMER is not set
-# CONFIG_FTTMR010_TIMER is not set
-# CONFIG_GXP_TIMER is not set
-# CONFIG_MPC83XX_TIMER is not set
-# CONFIG_RENESAS_OSTM_TIMER is not set
-# CONFIG_NOMADIK_MTU_TIMER is not set
-# CONFIG_NPCM_TIMER is not set
-# CONFIG_OMAP_TIMER is not set
-# CONFIG_ORION_TIMER is not set
-# CONFIG_ROCKCHIP_TIMER is not set
-# CONFIG_SP804_TIMER is not set
-# CONFIG_STM32_TIMER is not set
-# CONFIG_TEGRA_TIMER is not set
-CONFIG_X86_TSC_TIMER=y
-CONFIG_X86_TSC_READ_BASE=y
-# CONFIG_MTK_TIMER is not set
-# CONFIG_MCHP_PIT64B_TIMER is not set
-# CONFIG_IMX_GPT_TIMER is not set
-# CONFIG_XILINX_TIMER is not set
-
-#
-# TPM support
-#
-CONFIG_USB=y
-CONFIG_DM_USB=y
-# CONFIG_DM_USB_GADGET is not set
-
-#
-# USB Host Controller Drivers
-#
-CONFIG_USB_HOST=y
-CONFIG_USB_XHCI_HCD=y
-# CONFIG_USB_XHCI_DWC3 is not set
-# CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set
-CONFIG_USB_XHCI_PCI=y
-# CONFIG_USB_XHCI_FSL is not set
-# CONFIG_USB_XHCI_BRCM is not set
-CONFIG_USB_EHCI_HCD=y
-# CONFIG_USB_EHCI_MSM is not set
-CONFIG_USB_EHCI_PCI=y
-# CONFIG_USB_EHCI_ZYNQ is not set
-# CONFIG_USB_EHCI_GENERIC is not set
-# CONFIG_USB_EHCI_FSL is not set
-# CONFIG_USB_OHCI_HCD is not set
-# CONFIG_USB_UHCI_HCD is not set
-# CONFIG_USB_DWC2 is not set
-# CONFIG_USB_R8A66597_HCD is not set
-# CONFIG_USB_ISP1760 is not set
-# CONFIG_USB_CDNS3 is not set
-# CONFIG_USB_DWC3 is not set
-
-#
-# Legacy MUSB Support
-#
-# CONFIG_USB_MUSB_HCD is not set
-# CONFIG_USB_MUSB_UDC is not set
-
-#
-# MUSB Controller Driver
-#
-# CONFIG_USB_MUSB_HOST is not set
-# CONFIG_USB_MUSB_PIO_ONLY is not set
-
-#
-# USB Phy
-#
-# CONFIG_TWL4030_USB is not set
-# CONFIG_ROCKCHIP_USB2_PHY is not set
-
-#
-# ULPI drivers
-#
-
-#
-# USB peripherals
-#
-CONFIG_USB_STORAGE=y
-CONFIG_USB_KEYBOARD=y
-# CONFIG_USB_ONBOARD_HUB is not set
-CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=1000
-CONFIG_USB_KEYBOARD_FN_KEYS=y
-CONFIG_SYS_USB_EVENT_POLL=y
-# CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE is not set
-# CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP is not set
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
-# CONFIG_USB_ETHER_ASIX88179 is not set
-# CONFIG_USB_ETHER_LAN75XX is not set
-# CONFIG_USB_ETHER_LAN78XX is not set
-# CONFIG_USB_ETHER_MCS7830 is not set
-# CONFIG_USB_ETHER_RTL8152 is not set
-CONFIG_USB_ETHER_SMSC95XX=y
-# CONFIG_USB_GADGET is not set
-# CONFIG_SPL_USB_GADGET is not set
-
-#
-# UFS Host Controller Support
-#
-# CONFIG_UFS is not set
-# CONFIG_TI_J721E_UFS is not set
-
-#
-# Graphics support
-#
-CONFIG_VIDEO=y
-# CONFIG_VIDEO_FONT_4X6 is not set
-CONFIG_VIDEO_FONT_8X16=y
-# CONFIG_VIDEO_FONT_SUN12X22 is not set
-# CONFIG_VIDEO_FONT_16X32 is not set
-CONFIG_VIDEO_LOGO=y
-CONFIG_BACKLIGHT=y
-CONFIG_VIDEO_PCI_DEFAULT_FB_SIZE=0x1000000
-# CONFIG_VIDEO_COPY is not set
-# CONFIG_VIDEO_DAMAGE is not set
-# CONFIG_BACKLIGHT_GPIO is not set
-CONFIG_VIDEO_BPP8=y
-CONFIG_VIDEO_BPP16=y
-CONFIG_VIDEO_BPP32=y
-CONFIG_VIDEO_ANSI=y
-# CONFIG_VIDEO_MIPI_DSI is not set
-CONFIG_CONSOLE_NORMAL=y
-# CONFIG_CONSOLE_ROTATION is not set
-# CONFIG_CONSOLE_TRUETYPE is not set
-CONFIG_SYS_WHITE_ON_BLACK=y
-# CONFIG_NO_FB_CLEAR is not set
-CONFIG_PANEL=y
-CONFIG_SIMPLE_PANEL=y
-# CONFIG_PANEL_HX8238D is not set
-
-#
-# TrueType Fonts
-#
-# CONFIG_VIDCONSOLE_AS_LCD is not set
-# CONFIG_VIDEO_BOCHS is not set
-CONFIG_VIDEO_COREBOOT=y
-# CONFIG_VIDEO_VESA is not set
-# CONFIG_VIDEO_LCD_ANX9804 is not set
-# CONFIG_ATMEL_LCD_BGR555 is not set
-# CONFIG_VIDEO_BCM2835 is not set
-# CONFIG_VIDEO_LCD_ENDEAVORU is not set
-# CONFIG_VIDEO_LCD_HIMAX_HX8394 is not set
-# CONFIG_VIDEO_LCD_ORISETECH_OTM8009A is not set
-# CONFIG_VIDEO_LCD_RAYDIUM_RM68200 is not set
-# CONFIG_VIDEO_LCD_RENESAS_R61307 is not set
-# CONFIG_VIDEO_LCD_RENESAS_R69328 is not set
-# CONFIG_VIDEO_LCD_SSD2828 is not set
-# CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set
-# CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set
-# CONFIG_VIDEO_MESON is not set
-# CONFIG_VIDEO_MVEBU is not set
-# CONFIG_I2C_EDID is not set
-# CONFIG_DISPLAY is not set
-# CONFIG_ATMEL_HLCD is not set
-# CONFIG_BACKLIGHT_LM3533 is not set
-# CONFIG_AM335X_LCD is not set
-# CONFIG_VIDEO_EXYNOS is not set
-# CONFIG_VIDEO_BROADWELL_IGD is not set
-# CONFIG_VIDEO_IVYBRIDGE_IGD is not set
-# CONFIG_VIDEO_ROCKCHIP is not set
-# CONFIG_VIDEO_ARM_MALIDP is not set
-# CONFIG_VIDEO_STM32 is not set
-# CONFIG_VIDEO_TIDSS is not set
-# CONFIG_VIDEO_TEGRA124 is not set
-# CONFIG_VIDEO_BRIDGE is not set
-# CONFIG_VIDEO_BRIDGE_SOLOMON_SSD2825 is not set
-# CONFIG_VIDEO_TEGRA20 is not set
-# CONFIG_VIDEO_DSI_TEGRA30 is not set
-# CONFIG_TEGRA_BACKLIGHT_PWM is not set
-# CONFIG_VIDEO_MXS is not set
-# CONFIG_VIDEO_SEPS525 is not set
-CONFIG_CONSOLE_SCROLL_LINES=5
-# CONFIG_VIDEO_SIMPLE is not set
-# CONFIG_VIDEO_DT_SIMPLEFB is not set
-# CONFIG_VIDEO_MCDE_SIMPLE is not set
-# CONFIG_OSD is not set
-# CONFIG_VIDEO_REMOVE is not set
-# CONFIG_SPLASH_SCREEN is not set
-CONFIG_VIDEO_LOGO_MAX_SIZE=0x100000
-CONFIG_VIDEO_BMP_RLE8=y
-# CONFIG_BMP_16BPP is not set
-# CONFIG_BMP_24BPP is not set
-# CONFIG_BMP_32BPP is not set
-
-#
-# VirtIO Drivers
-#
-# CONFIG_VIRTIO_MMIO is not set
-# CONFIG_VIRTIO_PCI is not set
-# CONFIG_VIRTIO_PCI_LEGACY is not set
-
-#
-# 1-Wire support
-#
-# CONFIG_W1 is not set
-
-#
-# 1-wire EEPROM support
-#
-# CONFIG_W1_EEPROM is not set
-
-#
-# Watchdog Timer Support
-#
-# CONFIG_WATCHDOG is not set
-CONFIG_WATCHDOG_TIMEOUT_MSECS=60000
-# CONFIG_IMX_WATCHDOG is not set
-# CONFIG_ULP_WATCHDOG is not set
-# CONFIG_WDT is not set
-# CONFIG_PHYS_TO_BUS is not set
-
-#
-# File systems
-#
-# CONFIG_FS_BTRFS is not set
-CONFIG_FS_CBFS=y
-CONFIG_FS_EXT4=y
-CONFIG_EXT4_WRITE=y
-CONFIG_FS_FAT=y
-CONFIG_FAT_WRITE=y
-CONFIG_FS_FAT_MAX_CLUSTSIZE=65536
-# CONFIG_FS_JFFS2 is not set
-# CONFIG_UBIFS_SILENCE_MSG is not set
-# CONFIG_UBIFS_SILENCE_DEBUG_DUMP is not set
-# CONFIG_FS_CRAMFS is not set
-# CONFIG_YAFFS2 is not set
-# CONFIG_FS_SQUASHFS is not set
-# CONFIG_FS_EROFS is not set
-
-#
-# Library routines
-#
-# CONFIG_ADDR_MAP is not set
-# CONFIG_SYS_TIMER_COUNTS_DOWN is not set
-CONFIG_PHYSMEM=y
-# CONFIG_BCH is not set
-# CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set
-CONFIG_CHARSET=y
-# CONFIG_DYNAMIC_CRC_TABLE is not set
-CONFIG_HAVE_ARCH_IOMAP=y
-CONFIG_HAVE_PRIVATE_LIBGCC=y
-CONFIG_LIB_UUID=y
-CONFIG_PRINTF=y
-CONFIG_SPRINTF=y
-CONFIG_STRTO=y
-CONFIG_USE_PRIVATE_LIBGCC=y
-CONFIG_SYS_HZ=1000
-# CONFIG_PANIC_HANG is not set
-CONFIG_REGEX=y
-CONFIG_LIB_RAND=y
-# CONFIG_LIB_HW_RAND is not set
-CONFIG_SUPPORT_ACPI=y
-CONFIG_ACPI=y
-# CONFIG_GENERATE_ACPI_TABLE is not set
-# CONFIG_BITREVERSE is not set
-# CONFIG_TRACE is not set
-# CONFIG_CIRCBUF is not set
-CONFIG_CMD_DHRYSTONE=y
-
-#
-# Security support
-#
-# CONFIG_AES is not set
-# CONFIG_ECDSA is not set
-CONFIG_RSA=y
-CONFIG_RSA_VERIFY=y
-# CONFIG_RSA_VERIFY_WITH_PKEY is not set
-CONFIG_RSA_SOFTWARE_EXP=y
-# CONFIG_ASYMMETRIC_KEY_TYPE is not set
-# CONFIG_TPM is not set
-
-#
-# Android Verified Boot
-#
-
-#
-# Hashing Support
-#
-# CONFIG_BLAKE2 is not set
-CONFIG_SHA1=y
-CONFIG_SHA256=y
-# CONFIG_SHA512 is not set
-# CONFIG_SHA384 is not set
-# CONFIG_SHA_HW_ACCEL is not set
-CONFIG_MD5=y
-CONFIG_CRC8=y
-CONFIG_CRC32=y
-
-#
-# Compression Support
-#
-# CONFIG_LZ4 is not set
-# CONFIG_LZMA is not set
-# CONFIG_LZO is not set
-# CONFIG_GZIP is not set
-# CONFIG_ZLIB_UNCOMPRESS is not set
-# CONFIG_BZIP2 is not set
-CONFIG_ZLIB=y
-# CONFIG_ZSTD is not set
-# CONFIG_VPL_LZMA is not set
-# CONFIG_SPL_GZIP is not set
-# CONFIG_ERRNO_STR is not set
-# CONFIG_HEXDUMP is not set
-# CONFIG_GETOPT is not set
-CONFIG_OF_LIBFDT=y
-CONFIG_OF_LIBFDT_ASSUME_MASK=0
-CONFIG_SYS_FDT_PAD=0x3000
-CONFIG_SMBIOS_PARSER=y
-# CONFIG_EFI is not set
-CONFIG_EFI_LOADER=y
-CONFIG_CMD_BOOTEFI_BOOTMGR=y
-CONFIG_EFI_VARIABLE_FILE_STORE=y
-# CONFIG_EFI_VARIABLE_NO_STORE is not set
-# CONFIG_EFI_VARIABLES_PRESEED is not set
-CONFIG_EFI_VAR_BUF_SIZE=65536
-CONFIG_EFI_GET_TIME=y
-# CONFIG_EFI_SET_TIME is not set
-# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set
-# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set
-# CONFIG_EFI_CAPSULE_ON_DISK is not set
-CONFIG_EFI_CAPSULE_MAX=15
-CONFIG_EFI_DEVICE_PATH_TO_TEXT=y
-CONFIG_EFI_DEVICE_PATH_UTIL=y
-CONFIG_EFI_DT_FIXUP=y
-CONFIG_EFI_LOADER_HII=y
-CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y
-CONFIG_EFI_UNICODE_CAPITALIZATION=y
-CONFIG_EFI_PLATFORM_LANG_CODES="en-US"
-CONFIG_EFI_HAVE_RUNTIME_RESET=y
-CONFIG_EFI_LOAD_FILE2_INITRD=y
-# CONFIG_EFI_SECURE_BOOT is not set
-CONFIG_EFI_ECPT=y
-CONFIG_EFI_EBBR_2_1_CONFORMANCE=y
-# CONFIG_OPTEE_LIB is not set
-# CONFIG_OPTEE_IMAGE is not set
-# CONFIG_BOOTM_OPTEE is not set
-# CONFIG_TEST_FDTDEC is not set
-CONFIG_LIB_DATE=y
-CONFIG_LIB_ELF=y
-CONFIG_LMB=y
-CONFIG_LMB_USE_MAX_REGIONS=y
-CONFIG_LMB_MAX_REGIONS=16
-# CONFIG_PHANDLE_CHECK_SEQ is not set
-
-#
-# FWU Multi Bank Updates
-#
-# CONFIG_POST is not set
-
-#
-# Unit tests
-#
-# CONFIG_UNIT_TEST is not set
-
-#
-# Tools options
-#
-CONFIG_MKIMAGE_DTC_PATH="dtc"
-CONFIG_TOOLS_CRC32=y
-CONFIG_TOOLS_LIBCRYPTO=y
-CONFIG_TOOLS_FIT=y
-CONFIG_TOOLS_FIT_FULL_CHECK=y
-CONFIG_TOOLS_FIT_PRINT=y
-CONFIG_TOOLS_FIT_RSASSA_PSS=y
-CONFIG_TOOLS_FIT_SIGNATURE=y
-CONFIG_TOOLS_FIT_SIGNATURE_MAX_SIZE=0x10000000
-CONFIG_TOOLS_FIT_VERBOSE=y
-CONFIG_TOOLS_MD5=y
-CONFIG_TOOLS_OF_LIBFDT=y
-CONFIG_TOOLS_SHA1=y
-CONFIG_TOOLS_SHA256=y
-CONFIG_TOOLS_SHA384=y
-CONFIG_TOOLS_SHA512=y
-# CONFIG_TOOLS_MKEFICAPSULE is not set
-# CONFIG_FSPI_CONF_HEADER is not set
-# CONFIG_TOOLS_MKFWUMDATA is not set
diff --git a/config/u-boot/qemu_x86_12mb/target.cfg b/config/u-boot/qemu_x86_12mb/target.cfg
deleted file mode 100644
index 216c7bdc..00000000
--- a/config/u-boot/qemu_x86_12mb/target.cfg
+++ /dev/null
@@ -1,3 +0,0 @@
-tree="default"
-xtree="default"
-xarch="i386-elf"
diff --git a/config/uefitool/patches/0001-common-filesystem-define-ACCESSPERMS-if-undefined.patch b/config/uefitool/patches/0001-common-filesystem-define-ACCESSPERMS-if-undefined.patch
new file mode 100644
index 00000000..8241cebe
--- /dev/null
+++ b/config/uefitool/patches/0001-common-filesystem-define-ACCESSPERMS-if-undefined.patch
@@ -0,0 +1,56 @@
+From 75437e2253fc70f4e3368c9d030415ce4ae52fa6 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Sun, 28 Jul 2024 16:04:30 +0100
+Subject: [PATCH 1/1] common/filesystem: define ACCESSPERMS if undefined
+
+Normally defined in sys/stat.h on various libc implementations,
+but musl libc doesn't seem to have it, leading to this build
+issue:
+
+common/filesystem.cpp:86:38: error: 'ACCESSPERMS' was not declared in this scope
+ 86 | return (mkdir(dir.toLocal8Bit(), ACCESSPERMS) == 0);
+
+ACCESSPERMS is typically defined as the result of bitwise OR:
+S_IRWXU | S_IRWXG | S_IRWXO
+
+This creates the chmod permission 0777, used on the mkdir() call.
+
+ACCESSPERMS is supported on GNU C Library, for compatibility with
+BSD libc implementations; the latter also implements ALLPERMS
+and DEFFILEMODE, which don't seem to be used by uefitool regardless.
+
+Do not define it on the Windows builds; only do it for the others,
+such as Linux.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ common/filesystem.cpp | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+diff --git a/common/filesystem.cpp b/common/filesystem.cpp
+index b2b8d65..af5e537 100644
+--- a/common/filesystem.cpp
++++ b/common/filesystem.cpp
+@@ -75,6 +75,12 @@ UString getAbsPath(const UString & path)
+ #else
+ #include <unistd.h>
+ #include <stdlib.h>
++
++/* musl libc does not define ACCESSPERMS */
++#ifndef ACCESSPERMS
++#define ACCESSPERMS (S_IRWXU | S_IRWXG | S_IRWXO) /* chmod permission: 0777 */
++#endif
++
+ bool isExistOnFs(const UString & path)
+ {
+ struct stat buf;
+@@ -103,4 +109,4 @@ UString getAbsPath(const UString & path) {
+ return UString(abs);
+ return path;
+ }
+-#endif
+\ No newline at end of file
++#endif
+--
+2.39.2
+
diff --git a/config/uefitool/target.cfg b/config/uefitool/target.cfg
index 98d5e03d..909568a7 100644
--- a/config/uefitool/target.cfg
+++ b/config/uefitool/target.cfg
@@ -1 +1,2 @@
cmakedir="UEFIExtract"
+btype="cmake"
diff --git a/config/vendor/3050micro/pkg.cfg b/config/vendor/3050micro/pkg.cfg
new file mode 100644
index 00000000..f1f7860b
--- /dev/null
+++ b/config/vendor/3050micro/pkg.cfg
@@ -0,0 +1,4 @@
+DL_hash="976bbb1e625f64df276d8343757d910c88b8a781f953bc2c41a7dd15184ec70d55f8081de2a0aaa83cddb8e73bdc2df6288fde6e0897e4928c48ca4bb30bea2d"
+DL_url="https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip"
+DL_url_bkup="https://web.archive.org/web/20230822134231/https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip"
+ME_bootguard="me11disreguard"
diff --git a/config/vendor/e6400/pkg.cfg b/config/vendor/e6400/pkg.cfg
new file mode 100644
index 00000000..5274f51b
--- /dev/null
+++ b/config/vendor/e6400/pkg.cfg
@@ -0,0 +1,5 @@
+E6400_VGA_DL_hash="6217d5fce2291d15bb0649fd2faaeb78e4c48962b07a2bea6af60466bfdc5f233af0d077c2c6e71dd96047bdbb1f612324cef0a5e728ba9a9ec5c69a4022cd8d"
+E6400_VGA_DL_url="https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe"
+E6400_VGA_DL_url_bkup="https://web.archive.org/web/20230506014903/https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe"
+E6400_VGA_offset="274451"
+E6400_VGA_romname="mod_21.bin"
diff --git a/config/vendor/haswell/pkg.cfg b/config/vendor/haswell/pkg.cfg
new file mode 100644
index 00000000..d43fab3c
--- /dev/null
+++ b/config/vendor/haswell/pkg.cfg
@@ -0,0 +1,3 @@
+DL_hash="f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998"
+DL_url="https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe"
+DL_url_bkup="https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe"
diff --git a/config/vendor/hp2170p/pkg.cfg b/config/vendor/hp2170p/pkg.cfg
new file mode 100644
index 00000000..71c4d637
--- /dev/null
+++ b/config/vendor/hp2170p/pkg.cfg
@@ -0,0 +1,6 @@
+DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+EC_hash="940e533b6a276c13a6e46a93795ca84b19877b05e82c0c1795b7fea9cbea63c28e606ef994352fc77c4fdfb2e0c31c5edeefa98b989e1990364dfc6417b25460"
+EC_url="https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96088.exe"
+EC_url_bkup="https://web.archive.org/web/20230909164345/https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96088.exe"
diff --git a/config/vendor/hp2560p/pkg.cfg b/config/vendor/hp2560p/pkg.cfg
new file mode 100644
index 00000000..21d00424
--- /dev/null
+++ b/config/vendor/hp2560p/pkg.cfg
@@ -0,0 +1,6 @@
+DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3"
+DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
+DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
+EC_hash="a602cc7627c569bc423a5857cf506fbc3bcd68cb6b43a7c1b99d12a569b4107c412748cf49605ef4d5b930eb14b6815c4d1b1dc20145fe9d707e445fc201cea2"
+EC_url="https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85526.exe"
+EC_url_bkup="https://web.archive.org/web/20230416125725/https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85526.exe"
diff --git a/config/vendor/hp2570p/pkg.cfg b/config/vendor/hp2570p/pkg.cfg
new file mode 100644
index 00000000..de7f768e
--- /dev/null
+++ b/config/vendor/hp2570p/pkg.cfg
@@ -0,0 +1,6 @@
+DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+EC_hash="61ed284bdf938c5f36ad3267263fb3963a6608339425bc41aaef3ab0cd98f07c998d816b0233735ca35dc6cb771257da3f09a40d5cfc96bb6388b4366348275e"
+EC_url="https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96085.exe"
+EC_url_bkup="https://web.archive.org/web/20230610174558/https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96085.exe"
diff --git a/config/vendor/hp8200sff/pkg.cfg b/config/vendor/hp8200sff/pkg.cfg
new file mode 100644
index 00000000..079bd0be
--- /dev/null
+++ b/config/vendor/hp8200sff/pkg.cfg
@@ -0,0 +1,3 @@
+DL_hash="8fcb691bf84dc1feefc3c84f7cc59eadaabb200477bb3ecba1b050f23f133b0a8c2539015a523f676544c2dff64599bcba7e844e8c31757b90d70bb4485b5664"
+DL_url="https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe"
+DL_url_bkup="https://web.archive.org/web/20220708171920/https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe"
diff --git a/config/vendor/hp820g2/pkg.cfg b/config/vendor/hp820g2/pkg.cfg
new file mode 100644
index 00000000..3a95b5ea
--- /dev/null
+++ b/config/vendor/hp820g2/pkg.cfg
@@ -0,0 +1,9 @@
+DL_hash="1ac05a3e4f46426eeb77f89c4aca25ed1ad64479d8fcba6a3ab63a944512bacbc5d148cc7b9c4ff4b8c90a1fb1de4776e46f14aca8021900e0df37246aa0b717"
+DL_url="https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe"
+DL_url_bkup="https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe"
+MRC_url="https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip"
+MRC_url_bkup="https://web.archive.org/web/20220310155922/https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip"
+MRC_hash="3ff1599c52539f0707a07a8664a84ce51cd3fed1569df4bb7aa6722fc8dec0af1754250333b6ca1a9794d970a4de7b29a5cf2499f5b61e4c3eab64d1314aaea9"
+MRC_board="samus"
+MRC_refcode_cbtree="coreboot413"
+MRC_refcode_gbe="131253"
diff --git a/config/vendor/hp8460pintel/pkg.cfg b/config/vendor/hp8460pintel/pkg.cfg
new file mode 100644
index 00000000..d818a00b
--- /dev/null
+++ b/config/vendor/hp8460pintel/pkg.cfg
@@ -0,0 +1,6 @@
+DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3"
+DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
+DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
+EC_hash="9be5511d7ba07a376583cbd0b7fa4d7dff87ebc94b78d489fd62a14cb7f61eac99670e6a10ce374fe8e3c4bdafabbd1edce7774c3a482c15c2d4207b74ea49ed"
+EC_url="https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85528.exe"
+EC_url_bkup="https://web.archive.org/web/20211231004901/https://ftp.ext.hp.com/pub/softpaq/sp85501-86000/sp85528.exe"
diff --git a/config/vendor/hp8470pintel/pkg.cfg b/config/vendor/hp8470pintel/pkg.cfg
new file mode 100644
index 00000000..3dce5557
--- /dev/null
+++ b/config/vendor/hp8470pintel/pkg.cfg
@@ -0,0 +1,6 @@
+DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+EC_hash="b95c9cf909ed537fb448e2be69eddcb57459efbaf0a979a73cd2bce90a7014b110f4dbbeecfd596c072636396b8f20c229c59ffe34e45500ce9edb000c6ccaf9"
+EC_url="https://ftp.hp.com/pub/softpaq/sp77501-78000/sp77818.exe"
+EC_url_bkup="https://web.archive.org/web/20230909173821/https://ftp.hp.com/pub/softpaq/sp77501-78000/sp77818.exe"
diff --git a/config/vendor/hp8560w/pkg.cfg b/config/vendor/hp8560w/pkg.cfg
new file mode 100644
index 00000000..b9dc94c5
--- /dev/null
+++ b/config/vendor/hp8560w/pkg.cfg
@@ -0,0 +1,6 @@
+DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3"
+DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
+DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
+EC_hash="8e2bc5dca1a1cf0cfc1ac9df74eb6fda333f8ae560019f8182a49d3a716d72938f6cde4aa5ee56942def08207d3ef95706653bd238768fd029da43e9a4fbcc67"
+EC_url="https://ftp.hp.com/pub/softpaq/sp78001-78500/sp78085.exe"
+EC_url_bkup="https://web.archive.org/web/20230402085323/https://ftp.hp.com/pub/softpaq/sp78001-78500/sp78085.exe"
diff --git a/config/vendor/hp9470m/pkg.cfg b/config/vendor/hp9470m/pkg.cfg
new file mode 100644
index 00000000..756e64bf
--- /dev/null
+++ b/config/vendor/hp9470m/pkg.cfg
@@ -0,0 +1,6 @@
+DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+EC_hash="563422bf5420da18b89439f28a38ea28a175f0ad3588f0f5ea39b08dfdd14c8d513cbf11c2125ec3869fc3b7222c7dc3d111415185ea9b73f41410b1b57f13bd"
+EC_url="https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96090.exe"
+EC_url_bkup="http://web.archive.org/web/20220504072602/https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96090.exe"
diff --git a/config/vendor/ivybridge/pkg.cfg b/config/vendor/ivybridge/pkg.cfg
new file mode 100644
index 00000000..92b1eb43
--- /dev/null
+++ b/config/vendor/ivybridge/pkg.cfg
@@ -0,0 +1,3 @@
+DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
diff --git a/config/vendor/sandybridge/pkg.cfg b/config/vendor/sandybridge/pkg.cfg
new file mode 100644
index 00000000..34add8d3
--- /dev/null
+++ b/config/vendor/sandybridge/pkg.cfg
@@ -0,0 +1,3 @@
+DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3"
+DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
+DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe"
diff --git a/config/vendor/sources b/config/vendor/sources
deleted file mode 100644
index 12bd6d8b..00000000
--- a/config/vendor/sources
+++ /dev/null
@@ -1,166 +0,0 @@
-# This file holds the download sources for various intel blobs
-# board shortnames are listed and enclosed by '{}' followed by an opening
-# and closing '{}' for all blobs available for the board.
-# The board shortname must be the name of the board minus the trailing rom size.
-# If you want to make additions, try to add a backup url for download links and
-# list hashes as sha1 sums.
-
-# NOTE: this file now defines checksums as sha512 (of the sha-2 family),
-# where previously we used 160-bit SHA-1 algorithm; SHA-1 is not secure,
-# having demonstrated collisions, so we have switched to using sha512sum
-
-{x230 x230t x230i t430 t530 w530}{
- DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
- DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
- DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-}
-
-{x220 x220t t420 t520 t420s}{
- DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
- DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
- DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
-}
-
-# NOTE: google's manifest for archives containing mrc.bin, used here:
-# https://web.archive.org/web/20210211071412/https://dl.google.com/dl/edgedl/chromeos/recovery/recovery.conf
-{t440plibremrc w541 dell9020sff-nri dell9020mt-nri}{
- DL_hash f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998
- DL_url https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
- DL_url_bkup https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
-}
-
-# broadwell mrc, and use me10 plus broadwell refcode
-{hp820g2}{
- DL_hash 1ac05a3e4f46426eeb77f89c4aca25ed1ad64479d8fcba6a3ab63a944512bacbc5d148cc7b9c4ff4b8c90a1fb1de4776e46f14aca8021900e0df37246aa0b717
- DL_url https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe
- DL_url_bkup https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe
- MRC_url https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip
- MRC_url_bkup https://web.archive.org/web/20220310155922/https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip
- MRC_hash 3ff1599c52539f0707a07a8664a84ce51cd3fed1569df4bb7aa6722fc8dec0af1754250333b6ca1a9794d970a4de7b29a5cf2499f5b61e4c3eab64d1314aaea9
- MRC_board samus
- MRC_refcode_cbtree coreboot413
- MRC_refcode_gbe 131253
-}
-
-{hp8200sff}{
- DL_hash 8fcb691bf84dc1feefc3c84f7cc59eadaabb200477bb3ecba1b050f23f133b0a8c2539015a523f676544c2dff64599bcba7e844e8c31757b90d70bb4485b5664
- DL_url https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe
- DL_url_bkup https://web.archive.org/web/20220708171920/https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe
-}
-
-{hp8300usdt hp8300cmt}{
- DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
- DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
- DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-}
-
-{hp2560p}{
- DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
- DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
- DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
-
- EC_hash a602cc7627c569bc423a5857cf506fbc3bcd68cb6b43a7c1b99d12a569b4107c412748cf49605ef4d5b930eb14b6815c4d1b1dc20145fe9d707e445fc201cea2
- EC_url https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85526.exe
- EC_url_bkup https://web.archive.org/web/20230416125725/https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85526.exe
-}
-
-{hp2570p}{
- DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
- DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
- DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-
- EC_hash 61ed284bdf938c5f36ad3267263fb3963a6608339425bc41aaef3ab0cd98f07c998d816b0233735ca35dc6cb771257da3f09a40d5cfc96bb6388b4366348275e
- EC_url https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96085.exe
- EC_url_bkup https://web.archive.org/web/20230610174558/https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96085.exe
-}
-
-{hp9470m}{
- DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
- DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
- DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-
- EC_hash 563422bf5420da18b89439f28a38ea28a175f0ad3588f0f5ea39b08dfdd14c8d513cbf11c2125ec3869fc3b7222c7dc3d111415185ea9b73f41410b1b57f13bd
- EC_url https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96090.exe
- EC_url_bkup http://web.archive.org/web/20220504072602/https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96090.exe
-}
-
-{hp2170p}{
- DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
- DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
- DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-
- EC_hash 940e533b6a276c13a6e46a93795ca84b19877b05e82c0c1795b7fea9cbea63c28e606ef994352fc77c4fdfb2e0c31c5edeefa98b989e1990364dfc6417b25460
- EC_url https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96088.exe
- EC_url_bkup https://web.archive.org/web/20230909164345/https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96088.exe
-}
-
-{t1650}{
- DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
- DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
- DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-
- SCH5545EC_DL_url https://dl.dell.com/FOLDER05065992M/1/T1650A28.exe
- SCH5545EC_DL_url_bkup https://web.archive.org/web/20230811151654/https://dl.dell.com/FOLDER05065992M/1/T1650A28.exe
- SCH5545EC_DL_hash 18261d0f7f27e9de3b0b5a25019b9a934ef1a61cd3f0140e34f38553695e91e671e227a8fa962774edceab5c7804d13ed9fe1c518c5643c7c8f15632f903a6c4
-}
-
-# 68SCF and 68SCE family ROM
-# for 8460p, 8460w, 6460b, 8560p, 6560b, 6360b
-# release notes: https://support.hp.com/soar-attachment/858/col37737-ob-206569-2-ob-206569-2_sp85528_releasedoc.html
-{hp8460pintel}{
- DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
- DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
- DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
-
- EC_hash 9be5511d7ba07a376583cbd0b7fa4d7dff87ebc94b78d489fd62a14cb7f61eac99670e6a10ce374fe8e3c4bdafabbd1edce7774c3a482c15c2d4207b74ea49ed
- EC_url https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85528.exe
- EC_url_bkup https://web.archive.org/web/20211231004901/https://ftp.ext.hp.com/pub/softpaq/sp85501-86000/sp85528.exe
-}
-
-# 68SVD family ROM
-# for 8560w
-# release notes: https://support.hp.com/soar-attachment/519/col44309-ob-185196-2-ob-185196-2_sp78085_releasedoc.html
-{hp8560w}{
- DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
- DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
- DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
-
- EC_hash 8e2bc5dca1a1cf0cfc1ac9df74eb6fda333f8ae560019f8182a49d3a716d72938f6cde4aa5ee56942def08207d3ef95706653bd238768fd029da43e9a4fbcc67
- EC_url https://ftp.hp.com/pub/softpaq/sp78001-78500/sp78085.exe
- EC_url_bkup https://web.archive.org/web/20230402085323/https://ftp.hp.com/pub/softpaq/sp78001-78500/sp78085.exe
-}
-
-# 68ICE or 68ICF family ROM
-# for 8470p, 8470w, 6470b, 8570p, 6570b
-# release notes: https://support.hp.com/soar-attachment/1021/col43350-ob-229442-2-ob-229442-2_sp96091_releasedoc.html
-{hp8470pintel}{
- DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
- DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
- DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-
- EC_hash b95c9cf909ed537fb448e2be69eddcb57459efbaf0a979a73cd2bce90a7014b110f4dbbeecfd596c072636396b8f20c229c59ffe34e45500ce9edb000c6ccaf9
- EC_url https://ftp.hp.com/pub/softpaq/sp77501-78000/sp77818.exe
- EC_url_bkup https://web.archive.org/web/20230909173821/https://ftp.hp.com/pub/softpaq/sp77501-78000/sp77818.exe
-}
-
-# nvidia vga option rom for dgpu models of Dell Latitude E6400
-# for downloading the nvidia rom to pciroms/pci10de,06eb.rom
-{e6400 e6400nvidia}{
- E6400_VGA_DL_hash 6217d5fce2291d15bb0649fd2faaeb78e4c48962b07a2bea6af60466bfdc5f233af0d077c2c6e71dd96047bdbb1f612324cef0a5e728ba9a9ec5c69a4022cd8d
- E6400_VGA_DL_url https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe
- E6400_VGA_DL_url_bkup https://web.archive.org/web/20230506014903/https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe
- E6400_VGA_offset 274451
- E6400_VGA_romname mod_21.bin
-}
-
-{e5420 e5520 e6420 e6520}{
- DL_hash 81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3
- DL_url https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
- DL_url_bkup https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe
-}
-
-{e6430 e6530 e5530}{
- DL_hash 4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c
- DL_url https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
- DL_url_bkup https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe
-}
diff --git a/config/vendor/t1650/pkg.cfg b/config/vendor/t1650/pkg.cfg
new file mode 100644
index 00000000..e4a49126
--- /dev/null
+++ b/config/vendor/t1650/pkg.cfg
@@ -0,0 +1,6 @@
+DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c"
+DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe"
+SCH5545EC_DL_url="https://dl.dell.com/FOLDER05065992M/1/T1650A28.exe"
+SCH5545EC_DL_url_bkup="https://web.archive.org/web/20230811151654/https://dl.dell.com/FOLDER05065992M/1/T1650A28.exe"
+SCH5545EC_DL_hash="18261d0f7f27e9de3b0b5a25019b9a934ef1a61cd3f0140e34f38553695e91e671e227a8fa962774edceab5c7804d13ed9fe1c518c5643c7c8f15632f903a6c4"
diff --git a/include/git.sh b/include/git.sh
index 04143540..2c43cd22 100755..100644
--- a/include/git.sh
+++ b/include/git.sh
@@ -1,130 +1,154 @@
# SPDX-License-Identifier: GPL-3.0-or-later
-# SPDX-FileCopyrightText: 2020,2021,2023,2024 Leah Rowe <leah@libreboot.org>
-# SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
+# Copyright (c) 2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
-eval "$(setvars "" _target rev _xm loc url bkup_url depend tree_depend xtree)"
+eval `setvars "" loc url bkup_url subfile subhash subrepo subrepo_bkup \
+ depend subfile_bkup repofail`
-fetch_project_trees()
+fetch_targets()
{
- _target="${target}"
- [ -d "src/${project}/${project}" ] || fetch_from_upstream
- fetch_config
- if [ -d "src/${project}/${tree}" ]; then
- printf "download/%s %s (%s): exists\n" \
- "${project}" "${tree}" "${_target}" 1>&2
- return 0
- fi
- prepare_new_tree
+ [ -n "$tree_depend" ] && [ "$tree_depend" != "$tree" ] && \
+ x_ ./mk -f "$project" "$tree_depend"
+ e "src/$project/$tree" d && return 0
+
+ printf "Creating %s tree %s\n" "$project" "$tree"
+ git_prep "$loc" "$loc" "$PWD/$configdir/$tree/patches" \
+ "src/$project/$tree" u; nuke "$project/$tree" "$project/$tree"
}
-fetch_from_upstream()
+fetch_project()
{
- [ -d "src/${project}/${project}" ] && return 0
+ eval `setvars "" xtree tree_depend`
+ eval `setcfg "config/git/$project/pkg.cfg"`
- x_ mkdir -p "src/${project}"
- fetch_project_repo "${project}"
-}
+ chkvars url
-fetch_config()
-{
- rm -f "${cfgsdir}/"*/seen || $err "fetch_config ${cfgsdir}: !rm seen"
- eval "$(setvars "" xtree tree_depend)"
- while true; do
- eval "$(setvars "" rev tree)"
- _xm="fetch_config ${project}/${_target}"
- load_target_config "${_target}"
- [ "${_target}" = "${tree}" ] && break
- _target="${tree}"
+ [ -n "$xtree" ] && x_ ./mk -f coreboot "$xtree"
+ [ -z "$depend" ] || for d in $depend ; do
+ printf "'%s' needs '%s'; grabbing '%s'\n" "$project" "$d" "$d"
+ x_ ./mk -f $d
done
- [ -n "$tree_depend" ] && [ "$tree_depend" != "$tree" ] && \
- x_ ./update trees -f "$project" "$tree_depend"; return 0
+ clone_project
+
+ for x in config/git/*; do
+ [ -d "$x" ] && nuke "${x##*/}" "src/${x##*/}" 2>/dev/null
+ done; return 0
}
-load_target_config()
+clone_project()
{
- [ -f "$cfgsdir/$1/target.cfg" ] || $err "$1: target.cfg missing"
- [ -f "${cfgsdir}/${1}/seen" ] && \
- $err "${_xm} check: infinite loop in tree definitions"
+ loc="$XBMK_CACHE/repo/$project" && singletree "$project" && \
+ loc="src/$project"
+ printf "Downloading project '%s' to '%s'\n" "$project" "$loc"
- . "$cfgsdir/$1/target.cfg" || $err "load_target_config !$cfgsdir/$1"
- touch "$cfgsdir/$1/seen" || $err "load_config $cfgsdir/$1: !mk seen"
+ e "$loc" d missing && remkdir "${tmpgit%/*}" && git_prep \
+ "$url" "$bkup_url" "$PWD/config/$project/patches" "$loc"; :
}
-prepare_new_tree()
+git_prep()
{
- printf "Creating %s tree %s (%s)\n" "$project" "$tree" "$_target"
+ _patchdir="$3"; _loc="$4" # $1 and $2 are gitrepo and gitrepo_backup
+
+ chkvars rev; tmpclone "$1" "$2" "$tmpgit" "$rev" "$_patchdir"
+ if singletree "$project" || [ $# -gt 4 ]; then
+ prep_submodules "$_loc"; fi
+
+ [ "$project" = "coreboot" ] && [ -n "$xtree" ] && [ $# -gt 2 ] && \
+ [ "$xtree" != "$tree" ] && link_crossgcc "$_loc"
+ [ "$XBMK_RELEASE" = "y" ] && \
+ [ "$_loc" != "$XBMK_CACHE/repo/$project" ] && rmgit "$tmpgit"
- cp -R "src/${project}/${project}" "${tmpgit}" || \
- $err "prepare_new_tree ${project}/${tree}: can't make tmpclone"
- git_prep "$PWD/$cfgsdir/$tree/patches" "src/$project/$tree" "update"
+ move_repo "$_loc"
}
-fetch_project_repo()
+prep_submodules()
{
- eval "$(setvars "" xtree tree_depend)"
-
- scan_config "${project}" "config/git"
- [ -z "${loc+x}" ] && $err "fetch_project_repo $project: loc not set"
- [ -z "${url+x}" ] && $err "fetch_project_repo $project: url not set"
+ [ -f "$mdir/module.list" ] && while read -r msrcdir; do
+ fetch_submodule "$msrcdir"
+ done < "$mdir/module.list"; return 0
+}
- clone_project
- [ -z "${depend}" ] || for d in ${depend} ; do
- x_ ./update trees -f ${d}
+fetch_submodule()
+{
+ mcfgdir="$mdir/${1##*/}"
+ eval `setvars "" subhash subrepo subrepo_bkup subfile subfile_bkup st`
+ [ ! -f "$mcfgdir/module.cfg" ] || . "$mcfgdir/module.cfg" || \
+ $err "! . $mcfgdir/module.cfg"
+
+ for xt in repo file; do
+ _seval="if [ -n \"\$sub$xt\" ] || [ -n \"\$sub${xt}_bkup\" ]"
+ eval "$_seval; then st=\"\$st \$xt\"; fi"
done
- rm -Rf "${tmpgit}" || $err "fetch_repo: !rm -Rf ${tmpgit}"
+ st="${st# }" && [ "$st" = "repo file" ] && $err "$mdir: repo+file"
+
+ [ -z "$st" ] && return 0 # subrepo/subfile not defined
+ chkvars "sub${st}" "sub${st}_bkup" "subhash"
+
+ [ "$st" = "file" ] && download "$subfile" "$subfile_bkup" \
+ "$tmpgit/$1" "$subhash" && return 0
+ rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'"
+ tmpclone "$subrepo" "$subrepo_bkup" "$tmpgit/$1" "$subhash" \
+ "$mdir/${1##*/}/patches"
}
-clone_project()
+livepull="n"
+tmpclone()
{
- loc="${loc#src/}"
- loc="src/${loc}"
- if [ -d "${loc}" ]; then
- printf "%s already exists, so skipping download\n" "$loc" 1>&2
- return 0
+ [ "$repofail" = "y" ] && \
+ printf "Cached clone failed; trying online.\n" 1>&2 && livepull="y"
+
+ repofail="n"
+
+ [ $# -lt 6 ] || rm -Rf "$3" || $err "git retry: !rm $3 ($1)"
+ repodir="$XBMK_CACHE/repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3"
+ mkdir -p "$XBMK_CACHE/repo" || $err "!rmdir $XBMK_CACHE/repo"
+
+ if [ "$livepull" = "y" ] && [ ! -d "$repodir" ]; then
+ git clone $1 "$repodir" || git clone $2 "$repodir" || \
+ $err "!clone $1 $2 $repodir $4 $5" #
+ elif [ -d "$repodir" ] && [ $# -lt 6 ]; then
+ git -C "$repodir" pull || sleep 3 || git -C "$repodir" pull \
+ || sleep 3 || git -C "$repodir" pull || :
fi
+ (
+ [ $# -gt 5 ] || git clone "$repodir" "$3" || $err "!clone $repodir $3"
+ git -C "$3" reset --hard "$4" || $err "!reset $1 $2 $3 $4 $5"
+ git_am_patches "$3" "$5"
+ ) || repofail="y"
+
+ [ "$repofail" = "y" ] && [ $# -lt 6 ] && tmpclone $@ retry
+ [ "$repofail" = "y" ] && $err "!clone $1 $2 $3 $4 $5"; :
+}
- git clone $url "$tmpgit" || git clone $bkup_url "$tmpgit" \
- || $err "clone_project: could not download ${project}"
- git_prep "$PWD/config/$project/patches" "$loc"
+git_am_patches()
+{
+ for p in "$2/"*; do
+ [ -L "$p" ] && continue; [ -e "$p" ] || continue
+ [ -d "$p" ] && git_am_patches "$1" "$p" && continue
+ [ ! -f "$p" ] || git -C "$1" am "$p" || $err "$1 $2: !am $p"
+ done; return 0
}
-git_prep()
+link_crossgcc()
{
- _patchdir="$1"
- _loc="$2"
-
- [ -z "${rev+x}" ] && $err "git_prep $_loc: rev not set"
- git -C "$tmpgit" reset --hard $rev || $err "git -C $_loc: !reset $rev"
- git_am_patches "$tmpgit" "$_patchdir" || $err "!am $_loc $_patchdir"
-
- if [ "$project" != "coreboot" ] || [ $# -gt 2 ]; then
- [ ! -f "$tmpgit/.gitmodules" ] || git -C "$tmpgit" submodule \
- update --init --checkout || $err "git_prep $_loc: !submod"
- if [ "$project" = "coreboot" ] && [ -n "$xtree" ] && \
- [ "$xtree" != "$tree" ]; then
- (
- cd "$tmpgit/util" || $err "prep $_loc: !cd $tmpgit/util"
- rm -Rf crossgcc || $err "prep $_loc: !rm xgcc"
- ln -s "../../$xtree/util/crossgcc" crossgcc || \
- $err "prep $_loc: can't create xgcc symlink"
- ) || $err "prep $_loc: can't create xgcc symlink"
- fi
- fi
+ (
+ x_ cd "$tmpgit/util" && x_ rm -Rf crossgcc
+ ln -s "../../$xtree/util/crossgcc" crossgcc || $err "$1: !xgcc link"
+ ) || $err "$1: !xgcc link"
+}
- [ "$_loc" = "${_loc%/*}" ] || x_ mkdir -p "${_loc%/*}"
- mv "$tmpgit" "$_loc" || $err "git_prep: !mv $tmpgit $_loc"
- [ -n "$xtree" ] && [ ! -d "src/coreboot/$xtree" ] && \
- x_ ./update project trees -f coreboot "$xtree"; return 0
+move_repo()
+{
+ [ "$1" = "${1%/*}" ] || x_ mkdir -p "${1%/*}"
+ mv "$tmpgit" "$1" || $err "git_prep: !mv $tmpgit $1"
}
-git_am_patches()
+# can delete from multi- and single-tree projects.
+# called from script/trees when downloading sources.
+nuke()
{
- for _patch in "$2/"*; do
- [ -L "$_patch" ] || [ ! -f "$_patch" ] || git -C "$1" am \
- "$_patch" || $err "git_am $1 $2: !git am $_patch"; continue
- done
- for _patches in "$2/"*; do
- [ ! -L "$_patches" ] && [ -d "$_patches" ] && \
- git_am_patches "$1" "$_patches"; continue
- done
+ e "config/${1%/}/nuke.list" f missing || while read -r nukefile; do
+ rmf="src/${2%/}/$nukefile" && [ -L "$rmf" ] && continue
+ e "$rmf" e missing || rm -Rf "$rmf" || $err "!rm $rmf, ${2%/}"
+ done < "config/${1%/}/nuke.list"; return 0
}
diff --git a/include/lib.sh b/include/lib.sh
new file mode 100644
index 00000000..c5df639c
--- /dev/null
+++ b/include/lib.sh
@@ -0,0 +1,223 @@
+# SPDX-License-Identifier: GPL-3.0-only
+# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
+# Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
+# Copyright (c) 2020-2024 Leah Rowe <leah@libreboot.org>
+
+export LC_COLLATE=C
+export LC_ALL=C
+
+_ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
+
+ifdtool="elf/ifdtool/default/ifdtool"
+cbfstool="elf/cbfstool/default/cbfstool"
+tmpgit="$PWD/tmp/gitclone"
+grubdata="config/data/grub"
+err="err_"
+
+err_()
+{
+ printf "ERROR %s: %s\n" "$0" "$1" 1>&2; exit 1
+}
+
+setvars()
+{
+ _setvars="" && [ $# -lt 2 ] && $err "setvars: too few arguments"
+ val="$1" && shift 1 && for var in $@; do
+ _setvars="$var=\"$val\"; $_setvars"
+ done; printf "%s\n" "${_setvars% }"
+}
+chkvars()
+{
+ for var in $@; do
+ eval "[ -n "\${$var+x}" ] || \$err \"$var unset\""
+ eval "[ -n "\$$var" ] || \$err \"$var unset\""
+ done; return 0
+}
+
+eval `setvars "" _nogit board xbmk_parent versiondate projectsite projectname \
+ aur_notice configdir datadir version relname`
+
+for fv in projectname projectsite version versiondate; do
+ eval "[ ! -f "$fv" ] || read -r $fv < \"$fv\" || :"
+done; chkvars projectname projectsite
+
+setcfg()
+{
+ [ $# -gt 1 ] && printf "e \"%s\" f missing && return %s;\n" "$1" "$2"
+ [ $# -gt 1 ] || \
+ printf "e \"%s\" f not && %s \"Missing config\";\n" "$1" "$err"
+ printf ". \"%s\" || %s \"Could not read config\";\n" "$1" "$err"
+}
+
+e()
+{
+ es_t="e" && [ $# -gt 1 ] && es_t="$2"
+ es2="already exists"
+ estr="[ -$es_t \"\$1\" ] || return 1"
+ [ $# -gt 2 ] && estr="[ -$es_t \"\$1\" ] && return 1" && es2="missing"
+
+ eval "$estr"; printf "%s %s\n" "$1" "$es2" 1>&2
+}
+
+install_packages()
+{
+ [ $# -lt 2 ] && $err "fewer than two arguments"
+ eval `setcfg "config/dependencies/$2"`
+
+ $pkg_add $pkglist || $err "Cannot install packages"
+
+ [ -n "$aur_notice" ] && \
+ printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; return 0
+}
+[ $# -gt 0 ] && [ "$1" = "dependencies" ] && install_packages $@ && exit 0
+
+id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)"
+[ "$(id -u)" != "0" ] || $err "this command as root is not permitted"
+
+[ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || unset TMPDIR
+[ -n "${TMPDIR+x}" ] && export TMPDIR="$TMPDIR"
+
+if [ -z "${TMPDIR+x}" ]; then
+ [ -f "lock" ] && $err "$PWD/lock exists. Is a build running?"
+ export TMPDIR="/tmp"
+ export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)"
+ touch lock || $err "cannot create 'lock' file"
+ xbmk_parent="y"
+fi
+
+# XBMK_CACHE is a directory, for caching downloads and git repositories
+[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$PWD/cache"
+[ -z "$XBMK_CACHE" ] && export XBMK_CACHE="$PWD/cache"
+[ -L "$XBMK_CACHE" ] && [ "$XBMK_CACHE" = "$PWD/cache" ] && \
+ $err "cachedir is default, $PWD/cache, but it exists and is a symlink"
+[ -L "$XBMK_CACHE" ] && export XBMK_CACHE="$PWD/cache"
+[ -f "$XBMK_CACHE" ] && $err "cachedir '$XBMK_CACHE' exists but it's a file"
+
+# if "y": a coreboot target won't be built if target.cfg says release="n"
+# (this is used to exclude certain build targets from releases)
+[ -z "${XBMK_RELEASE+x}" ] && export XBMK_RELEASE="n"
+[ "$XBMK_RELEASE" = "y" ] || export XBMK_RELEASE="n"
+
+[ -z "${XBMK_THREADS+x}" ] && export XBMK_THREADS=1
+expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \
+ 1>/dev/null 2>/dev/null || export XBMK_THREADS=1 # user gave a non-integer
+
+x_() {
+ [ $# -lt 1 ] || $@ || \
+ $err "Unhandled non-zero exit: $(echo "$@")"; return 0
+}
+
+[ -e ".git" ] || [ -f "version" ] || printf "unknown\n" > version || \
+ $err "Cannot generate unknown version file"
+[ -e ".git" ] || [ -f "versiondate" ] || printf "1716415872\n" > versiondate \
+ || $err "Cannot generate unknown versiondate file"
+
+version_="$version"
+[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
+ version="git-$(git rev-parse HEAD 2>&1)" || version="$version_"
+versiondate_="$versiondate"
+[ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
+ --pretty='%ct' HEAD)" || versiondate="$versiondate_"
+for p in projectname version versiondate projectsite; do
+ chkvars "$p"; eval "x_ printf \"%s\\n\" \"\$$p\" > $p"
+done
+relname="$projectname-$version"
+export LOCALVERSION="-$projectname-${version%%-*}"
+
+check_defconfig()
+{
+ [ -d "$1" ] || $err "Target '$1' not defined."
+ for x in "$1"/config/*; do
+ [ -f "$x" ] && printf "%s\n" "$x" && return 1
+ done; return 0
+}
+
+remkdir()
+{
+ rm -Rf "$1" || $err "remkdir: !rm -Rf \"$1\""
+ mkdir -p "$1" || $err "remkdir: !mkdir -p \"$1\""
+}
+
+mkrom_tarball()
+{
+ printf "%s\n" "$version" > "$1/version" || $err "$1 !version"
+ printf "%s\n" "$versiondate" > "$1/versiondate" || $err "$1 !vdate"
+ printf "%s\n" "$projectname" > "$1/projectname" || $err "$1 !pname"
+
+ mktarball "$1" "${1%/*}/${relname}_${1##*/}.tar.xz"; x_ rm -Rf "$1"; :
+}
+
+mktarball()
+{
+ [ "${2%/*}" = "$2" ] || \
+ mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\""
+ printf "\nCreating archive: %s\n\n" "$2"
+ tar -c "$1" | xz -T$XBMK_THREADS -9e > "$2" || $err "mktarball 2, $1"
+ mksha512sum "$2" "${2##*/}.sha512"
+}
+
+mksha512sum()
+{
+ (
+ [ "${1%/*}" != "$1" ] && x_ cd "${1%/*}"
+ sha512sum ./"${1##*/}" >> "$2" || $err "!sha512sum \"$1\" > \"$2\""
+ ) || $err "failed to create tarball checksum"
+}
+
+rmgit()
+{
+ (
+ cd "$1" || $err "!cd gitrepo $1"
+ find . -name ".git" -exec rm -Rf {} + || $err "!rm .git $1"
+ find . -name ".gitmodules" -exec rm -Rf {} + || $err "!rm .gitmod $1"
+ ) || $err "Cannot remove .git/.gitmodules in $1"
+}
+
+# return 0 if project is single-tree, otherwise 1
+# e.g. coreboot is multi-tree, so 1
+singletree()
+{
+ for targetfile in "config/${1}/"*/target.cfg; do
+ [ -e "$targetfile" ] && [ -f "$targetfile" ] && return 1; :
+ done; return 0
+}
+
+download()
+{
+ cached="$XBMK_CACHE/file/$4"
+ dl_fail="n" # 1 url, 2 url backup, 3 destination, 4 checksum
+ vendor_checksum "$4" "$cached" 2>/dev/null && dl_fail="y"
+ [ "$dl_fail" = "n" ] && e "$3" f && return 0
+ mkdir -p "${3%/*}" "$XBMK_CACHE/file" || \
+ $err "!mkdir '$3' '$XBMK_CACHE/file'"
+ for url in "$1" "$2"; do
+ [ "$dl_fail" = "n" ] && break
+ [ -z "$url" ] && continue
+ rm -f "$cached" || $err "!rm -f '$cached'"
+ curl --location --retry 3 -A "$_ua" "$url" -o "$cached" || \
+ wget --tries 3 -U "$_ua" "$url" -O "$cached" || continue
+ vendor_checksum "$4" "$cached" || dl_fail="n"
+ done; [ "$dl_fail" = "y" ] && $err "$1 $2 $3 $4: not downloaded"
+ [ "$cached" = "$3" ] || cp "$cached" "$3" || $err "!d cp $cached $3"; :
+}
+
+vendor_checksum()
+{
+ [ "$(sha512sum "$2" | awk '{print $1}')" != "$1" ] || return 1
+ printf "Bad checksum for file: %s\n" "$2" 1>&2; rm -f "$2" || :; :
+}
+
+cbfs()
+{
+ ccmd="add-payload" && [ $# -gt 3 ] && ccmd="add"
+ lzma="-c lzma" && [ $# -gt 3 ] && lzma="-t raw"
+ x_ "$cbfstool" "$1" $ccmd -f "$2" -n "$3" $lzma
+}
+
+mk()
+{
+ mk_flag="$1" || $err "No argument given"
+ shift 1 && for mk_arg in $@; do
+ ./mk $mk_flag $mk_arg || $err "./mk $mk_flag $mk_arg"; :
+ done; :
+}
diff --git a/include/mrc.sh b/include/mrc.sh
index 62d30a70..2e00d9f9 100755..100644
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -4,24 +4,21 @@
# Modifications in this version are Copyright 2021, 2023 and 2024 Leah Rowe.
# Original copyright detailed in repo: https://review.coreboot.org/coreboot/
-eval "$(setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL)"
+eval `setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL`
extract_mrc()
{
- [ -z "$MRC_board" ] && $err "extract_mrc $MRC_hash: MRC_board not set"
- [ -z "${CONFIG_MRC_FILE}" ] && \
- $err "extract_mrc $MRC_hash: CONFIG_MRC_FILE not set"
-
- SHELLBALL="chromeos-firmwareupdate-${MRC_board}"
+ chkvars "MRC_board" "CONFIG_MRC_FILE"
+ SHELLBALL="chromeos-firmwareupdate-$MRC_board"
(
- x_ cd "${appdir}"
+ x_ cd "$appdir"
extract_partition "${MRC_url##*/}"
- extract_archive "${SHELLBALL}" .
+ extract_archive "$SHELLBALL" .
) || $err "mrc download/extract failure"
- "${cbfstool}" "${appdir}/"bios.bin extract -n mrc.bin \
- -f "$_dest" -r RO_SECTION || $err "extract_mrc: cbfstool $_dest"
+ "$cbfstool" "$appdir/"bios.bin extract -n mrc.bin \
+ -f "$_dest" -r RO_SECTION || $err "extract_mrc: !$cbfstool $_dest"
[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && extract_refcode; return 0
}
@@ -32,29 +29,26 @@ extract_partition()
ROOTP=$( printf "unit\nB\nprint\nquit\n" | \
parted "${1%.zip}" 2>/dev/null | grep "ROOT-A" )
- START=$(( $( echo ${ROOTP} | cut -f2 -d\ | tr -d "B" ) ))
- SIZE=$(( $( echo ${ROOTP} | cut -f4 -d\ | tr -d "B" ) ))
+ START=$(( $( echo $ROOTP | cut -f2 -d\ | tr -d "B" ) ))
+ SIZE=$(( $( echo $ROOTP | cut -f4 -d\ | tr -d "B" ) ))
- dd if="${1%.zip}" of="root-a.ext2" bs=1024 \
- skip=$(( ${START} / 1024 )) count=$(( ${SIZE} / 1024 )) || \
- $err "extract_partition, dd ${1%.zip}, root-a.ext2"
+ dd if="${1%.zip}" of="root-a.ext2" bs=1024 skip=$(( $START / 1024 )) \
+ count=$(( $SIZE / 1024 )) || $err "ex dd ${1%.zip}, root-a.ext2"
- printf "cd /usr/sbin\ndump chromeos-firmwareupdate ${SHELLBALL}\nquit" \
+ printf "cd /usr/sbin\ndump chromeos-firmwareupdate $SHELLBALL\nquit" \
| debugfs "root-a.ext2" || $err "can't extract shellball"
}
extract_refcode()
{
_refdest="${CONFIG_REFCODE_BLOB_FILE##*../}"
- [ -f "$_refdest" ] && return 0
+ e "$_refdest" f && return 0
# cbfstool changed the attributes scheme for stage files,
# incompatible with older versions before coreboot 4.14,
# so we need coreboot 4.13 cbfstool for certain refcode files
- [ -n "$cbfstoolref" ] || \
- $err "extract_refcode $board: MRC_refcode_cbtree not set"
- mkdir -p "${_refdest%/*}" || \
- $err "extract_refcode $board: !mkdir -p ${_refdest%/*}"
+ chkvars cbfstoolref
+ mkdir -p "${_refdest%/*}" || $err "ref: !mkdir -p ${_refdest%/*}"
"$cbfstoolref" "$appdir/bios.bin" extract \
-m x86 -n fallback/refcode -f "$_refdest" -r RO_SECTION \
diff --git a/include/option.sh b/include/option.sh
deleted file mode 100755
index 26867772..00000000
--- a/include/option.sh
+++ /dev/null
@@ -1,188 +0,0 @@
-# SPDX-License-Identifier: GPL-3.0-only
-# SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
-# SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# SPDX-FileCopyrightText: 2020-2024 Leah Rowe <leah@libreboot.org>
-
-export LC_COLLATE=C
-export LC_ALL=C
-
-tmpdir_was_set="y"
-vendir="vendorfiles"
-appdir="${vendir}/app"
-cbdir="src/coreboot/default"
-cbcfgsdir="config/coreboot"
-ifdtool="cbutils/default/ifdtool"
-cbfstool="cbutils/default/cbfstool"
-grubcfgsdir="config/grub"
-layoutdir="/boot/grub/layouts"
-. "${grubcfgsdir}/modules.list"
-tmpgit="${PWD}/tmp/gitclone"
-err="err_"
-
-err_()
-{
- printf "ERROR %s: %s\n" "${0}" "${1}" 1>&2
- exit 1
-}
-
-setvars()
-{
- _setvars=""
- [ $# -lt 2 ] && $err "setvars: too few arguments"
- val="${1}" && shift 1
- for var in $@; do
- _setvars="${var}=\"${val}\"; ${_setvars}"
- done
- printf "%s\n" "${_setvars% }"
-}
-eval "$(setvars "" CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
- CONFIG_ME_BIN_PATH CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 versiondate \
- CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW2_OFFSET \
- CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_GBE_BIN_PATH tmpdir _nogit \
- CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE version \
- CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE _dest board boarddir lbmk_release \
- CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE threads projectname \
- relname)"
-
-# if "y": a coreboot target won't be built if target.cfg says release="n"
-# (this is used to exclude certain build targets from releases)
-set | grep LBMK_RELEASE 1>/dev/null 2>/dev/null || lbmk_release="n" || :
-[ -z "$lbmk_release" ] && lbmk_release="$LBMK_RELEASE"
-[ "$lbmk_release" = "n" ] || [ "$lbmk_release" = "y" ] || lbmk_release="n"
-export LBMK_RELEASE="$lbmk_release"
-
-set | grep TMPDIR 1>/dev/null 2>/dev/null || tmpdir_was_set="n"
-if [ "${tmpdir_was_set}" = "y" ]; then
- [ "${TMPDIR%_*}" = "/tmp/lbmk" ] || tmpdir_was_set="n"
-fi
-if [ "${tmpdir_was_set}" = "n" ]; then
- export TMPDIR="/tmp"
- tmpdir="$(mktemp -d -t lbmk_XXXXXXXX)"
- export TMPDIR="${tmpdir}"
-else
- export TMPDIR="${TMPDIR}"
- tmpdir="${TMPDIR}"
-fi
-
-set | grep LBMK_THREADS 1>/dev/null 2>/dev/null && threads="$LBMK_THREADS"
-[ -z "$threads" ] && threads=1
-expr "X$threads" : "X-\{0,1\}[0123456789][0123456789]*$" \
- 1>/dev/null 2>/dev/null || threads=1 # user specified a non-integer
-export LBMK_THREADS="$threads"
-
-x_() {
- [ $# -lt 1 ] || ${@} || $err "Unhandled non-zero exit: $@"; return 0
-}
-
-read -r projectname < projectname || :
-[ ! -f version ] || read -r version < version || :
-version_="${version}"
-[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \
- version="git-$(git rev-parse HEAD 2>&1)" || version="${version_}"
-[ ! -f versiondate ] || read -r versiondate < versiondate || :
-versiondate_="${versiondate}"
-[ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \
- --pretty='%ct' HEAD)" || versiondate="${versiondate_}"
-for p in projectname version versiondate; do
- eval "[ -n \"\$$p\" ] || $err \"$p unset\""
- eval "x_ printf \"%s\\n\" \"\$$p\" > $p"
-done
-relname="${projectname}-${version}"
-export LOCALVERSION="-${projectname}-${version%%-*}"
-
-items()
-{
- rval=1
- if [ ! -d "${1}" ]; then
- printf "items: directory '%s' doesn't exist" "${1}" 1>&2
- return 1
- fi
- for x in "${1}/"*; do
- # -e used because this is for files *or* directories
- [ -e "${x}" ] || continue
- [ "${x##*/}" = "build.list" ] && continue
- printf "%s\n" "${x##*/}" 2>/dev/null
- rval=0
- done
- return ${rval}
-}
-
-scan_config()
-{
- awkstr=" /\{.*${1}.*}{/ {flag=1;next} /\}/{flag=0} flag { print }"
- confdir="${2}"
- revfile="$(mktemp -t sources.XXXXXXXXXX)"
- cat "${confdir}/"* > "${revfile}" || \
- $err "scan_config ${confdir}: Cannot concatenate files"
- while read -r line ; do
- set ${line} 1>/dev/null 2>/dev/null || :
- if [ "${1%:}" = "depend" ]; then
- depend="${depend} ${2}"
- else
- eval "${1%:}=\"${2}\""
- fi
- done << EOF
- $(eval "awk '${awkstr}' \"${revfile}\"")
-EOF
- rm -f "$revfile" || $err "scan_config: Cannot remove tmpfile"
-}
-
-check_defconfig()
-{
- for x in "${1}"/config/*; do
- [ -f "${x}" ] && return 1
- done
-}
-
-handle_coreboot_utils()
-{
- for util in cbfstool ifdtool; do
- x_ ./update trees ${_f} "src/coreboot/${1}/util/${util}"
- [ -z "${mode}" ] && [ ! -f "cbutils/${1}/${util}" ] && \
- x_ mkdir -p "cbutils/${1}" && \
- x_ cp "src/coreboot/${1}/util/${util}/${util}" \
- "cbutils/${1}"
- [ -z "${mode}" ] || x_ rm -Rf "cbutils/${1}"
- done
-}
-
-remkdir()
-{
- rm -Rf "${1}" || $err "remkdir: !rm -Rf \"${1}\""
- mkdir -p "${1}" || $err "remkdir: !mkdir -p \"${1}\""
-}
-
-git_err()
-{
- printf "You need to set git name/email, like so:\n%s\n\n" "$1" 1>&2
- $err "Git name/email not configured"
-}
-
-mktar_release()
-{
- printf "%s\n" "${version}" > "${1}/version" || return 1
- printf "%s\n" "${versiondate}" > "${1}/versiondate" || return 1
- printf "%s\n" "${projectname}" > "${1}/projectname" || return 1
-
- mktarball "$1" "${1%/*}/${relname}_${1##*/}.tar.xz"
- x_ rm -Rf "$1"
-}
-
-mktarball()
-{
- [ "${2%/*}" = "${2}" ] || \
- mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\""
- printf "\nCreating archive: %s\n\n" "$2"
- tar -c "$1" | xz -T$threads -9e > "$2" || \
- $err "mktarball 2, $1"
- mksha512sum "${2}" "${2##*/}.sha512"
-}
-
-mksha512sum()
-{
- (
- [ "${1%/*}" != "${1}" ] && x_ cd "${1%/*}"
- sha512sum ./"${1##*/}" >> "${2}" || \
- $err "!sha512sum \"${1}\" > \"${2}\""
- ) || $err "failed to create tarball checksum"
-}
diff --git a/include/rom.sh b/include/rom.sh
new file mode 100644
index 00000000..1d7be098
--- /dev/null
+++ b/include/rom.sh
@@ -0,0 +1,188 @@
+#!/usr/bin/env sh
+# SPDX-License-Identifier: GPL-3.0-or-later
+# Copyright (c) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2021-2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
+# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
+# Copyright (c) 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
+# Copyright (c) 2023 Riku Viitanen <riku.viitanen@protonmail.com>
+
+mkserprog()
+{
+ [ "$_f" = "-d" ] && return 0 # dry run
+ basename -as .h "$serdir/"*.h > "$TMPDIR/ser" || $err "!mk $1 $TMPDIR"
+
+ while read -r sertarget; do
+ [ "$1" = "rp2040" ] && x_ cmake -DPICO_BOARD="$sertarget" \
+ -DPICO_SDK_PATH="$picosdk" -B "$sersrc/build" "$sersrc" \
+ && x_ cmake --build "$sersrc/build"
+ [ "$1" = "stm32" ] && x_ make -C "$sersrc" \
+ libopencm3-just-make BOARD=$sertarget && x_ make -C \
+ "$sersrc" BOARD=$sertarget; x_ mkdir -p "bin/serprog_$1"
+ x_ mv "$serx" "bin/serprog_$1/serprog_$sertarget.${serx##*.}"
+ done < "$TMPDIR/ser"
+
+ [ "$XBMK_RELEASE" = "y" ] && mkrom_tarball "bin/serprog_$1"; return 0
+}
+
+copyps1bios()
+{
+ x_ rm -Rf bin/playstation
+ x_ mkdir -p bin/playstation
+ x_ cp src/pcsx-redux/src/mips/openbios/openbios.bin bin/playstation
+
+ printf "MIT License\n\nCopyright (c) 2019-2024 PCSX-Redux authors\n\n" \
+ > bin/playstation/COPYING.txt || $err "!pcsx-redux copyright"
+ cat config/snippet/mit >>bin/playstation/COPYING.txt || $err "!pcsx MIT"
+}
+
+mkpayload_grub()
+{
+ eval `setvars "" grub_modules grub_install_modules`
+ $dry eval `setcfg "$grubdata/module/$tree"`
+ $dry x_ rm -f "$srcdir/grub.elf"; $dry \
+ "$srcdir/grub-mkstandalone" --grub-mkimage="$srcdir/grub-mkimage" \
+ -O i386-coreboot -o "$srcdir/grub.elf" -d "${srcdir}/grub-core/" \
+ --fonts= --themes= --locales= --modules="$grub_modules" \
+ --install-modules="$grub_install_modules" \
+ "/boot/grub/grub_default.cfg=${srcdir}/.config" \
+ "/boot/grub/grub.cfg=$grubdata/memdisk.cfg" \
+ "/background.png=$grubdata/background/background1280x800.png" || \
+ $err "$tree: cannot build grub.elf"; return 0
+}
+
+mkvendorfiles()
+{
+ [ -z "$mode" ] && $dry cook_coreboot_config
+ check_coreboot_utils "$tree"
+ printf "%s\n" "${version%%-*}" > "$srcdir/.coreboot-version" || \
+ $err "!mk $srcdir .coreboot-version"
+ [ -z "$mode" ] && [ "$target" != "$tree" ] && \
+ x_ ./vendor download $target; return 0
+}
+
+cook_coreboot_config()
+{
+ [ -f "$srcdir/.config" ] || return 0
+ printf "CONFIG_CCACHE=y\n" >> "$srcdir/.config" || \
+ $err "$srcdir/.config: Could not enable ccache"
+ make -C "$srcdir" oldconfig || $err "Could not cook $srcdir/.config"; :
+}
+
+check_coreboot_utils()
+{
+ for util in cbfstool ifdtool; do
+ [ "$badhash" = "y" ] && x_ rm -f "elf/$util/$1/$util"
+ e "elf/$util/$1/$util" f && continue
+
+ utilelfdir="elf/$util/$1"
+ utilsrcdir="src/coreboot/$1/util/$util"
+
+ utilmode="" && [ -n "$mode" ] && utilmode="clean"
+ x_ make -C "$utilsrcdir" $utilmode -j$XBMK_THREADS $makeargs
+ [ -z "$mode" ] && [ ! -f "$utilelfdir/$util" ] && \
+ x_ mkdir -p "$utilelfdir" && \
+ x_ cp "$utilsrcdir/$util" "elf/$util/$1"
+ [ -z "$mode" ] || x_ rm -Rf "$utilelfdir"; continue
+ done; return 0
+}
+
+mkcorebootbin()
+{
+ [ "$target" = "$tree" ] && return 0
+
+ tmprom="$TMPDIR/coreboot.rom"
+ $dry x_ cp "$srcdir/build/coreboot.rom" "$tmprom"
+
+ initmode="${defconfig##*/}"; displaymode="${initmode##*_}"
+ initmode="${initmode%%_*}"
+ [ -n "$displaymode" ] && displaymode="_$displaymode"
+ cbfstool="elf/cbfstool/$tree/cbfstool"
+
+ [ -n "$uboot_config" ] || uboot_config="default"
+ [ "$payload_uboot" = "y" ] || payload_seabios="y"
+ [ "$payload_grub" = "y" ] && payload_seabios="y"
+ [ "$payload_seabios" = "y" ] && [ "$payload_uboot" = "y" ] && \
+ $dry $err "$target: U-Boot and SeaBIOS/GRUB are both enabled."
+
+ [ -z "$grub_scan_disk" ] && grub_scan_disk="nvme ahci ata"
+
+ [ -n "$grubtree" ] || grubtree="default"
+ grubelf="elf/grub/$grubtree/payload/grub.elf"
+
+ [ "$payload_memtest" = "y" ] || payload_memtest="n"
+ [ "$(uname -m)" = "x86_64" ] || payload_memtest="n"
+ if $dry grep "CONFIG_PAYLOAD_NONE=y" "$defconfig"; then
+ [ "$payload_seabios" = "y" ] && pname="seabios" && \
+ $dry add_seabios
+ [ "$payload_uboot" = "y" ] && pname="uboot" && $dry add_uboot
+ else
+ pname="custom" && $dry cprom; :
+ fi; :
+}
+
+add_seabios()
+{
+ _seabioself="elf/seabios/default/$initmode/bios.bin.elf"
+
+ cbfs "$tmprom" "$_seabioself" "fallback/payload"
+ x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
+
+ _z="2"; [ "$initmode" = "vgarom" ] && _z="0"
+ x_ "$cbfstool" "$tmprom" add-int -i $_z -n etc/pci-optionrom-exec
+ x_ "$cbfstool" "$tmprom" add-int -i 0 -n etc/optionroms-checksum
+ [ "$initmode" = "libgfxinit" ] && \
+ cbfs "$tmprom" "$seavgabiosrom" vgaroms/seavgabios.bin raw
+
+ [ "$payload_memtest" = "y" ] && cbfs "$tmprom" \
+ "elf/memtest86plus/memtest.bin" img/memtest
+
+ [ "$payload_grub" = "y" ] && add_grub
+
+ cprom && [ "$payload_grub" = "y" ] && pname="seagrub" && mkseagrub; :
+}
+
+add_grub()
+{
+ cbfs "$tmprom" "$grubelf" "img/grub2"
+ printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \
+ > "$TMPDIR/tmpcfg" || $err "$target: !insert scandisk"
+ cbfs "$tmprom" "$TMPDIR/tmpcfg" scan.cfg raw
+}
+
+mkseagrub()
+{
+ cbfs "$tmprom" "$grubdata/bootorder" bootorder raw
+ for keymap in config/data/grub/keymap/*.gkb; do
+ [ -f "$keymap" ] && cprom "${keymap##*/}"; :
+ done; :
+}
+
+add_uboot()
+{
+ ubdir="elf/u-boot/$target/$uboot_config"
+ ubootelf="$ubdir/u-boot.elf" && [ ! -f "$ubootelf" ] && \
+ ubootelf="$ubdir/u-boot"
+ [ -f "$ubootelf" ] || $err "cb/$target: Can't find u-boot"
+
+ cbfs "$tmprom" "$ubootelf" "fallback/payload"; cprom
+}
+
+cprom()
+{
+ newrom="bin/$target/${pname}_${target}_$initmode$displaymode.rom"
+ [ $# -gt 0 ] && newrom="${newrom%.rom}_${1%.gkb}.rom"
+
+ x_ mkdir -p "bin/$target"
+ x_ cp "$tmprom" "$newrom" && [ $# -gt 0 ] && \
+ cbfs "$newrom" "config/data/grub/keymap/$1" keymap.gkb raw
+
+ [ "$XBMK_RELEASE" = "y" ] || return 0
+ $dry mksha512sum "$newrom" "vendorhashes"; $dry ./vendor inject \
+ -r "$newrom" -b "$target" -n nuke || $err "!nuke $newrom"
+}
+
+mkcoreboottar()
+{
+ [ "$target" = "$tree" ] && return 0; [ "$XBMK_RELEASE" = "y" ] && \
+ [ "$release" != "n" ] && $dry mkrom_tarball "bin/$target"; :
+}
diff --git a/include/vendor.sh b/include/vendor.sh
index 1904de8e..0f97a641 100755..100644
--- a/include/vendor.sh
+++ b/include/vendor.sh
@@ -1,172 +1,128 @@
# SPDX-License-Identifier: GPL-3.0-only
-# SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
-# SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# SPDX-FileCopyrightText: 2023-2024 Leah Rowe <leah@libreboot.org>
-
-_ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
-_7ztest="a"
-
-e6400_unpack="${PWD}/src/bios_extract/dell_inspiron_1100_unpacker.py"
-me7updateparser="${PWD}/util/me7_update_parser/me7_update_parser.py"
-pfs_extract="${PWD}/src/biosutilities/Dell_PFS_Extract.py"
-uefiextract="${PWD}/src/uefitool/uefiextract"
-nvmutil="util/nvmutil/nvm"
-
-eval "$(setvars "" _b _dl EC_url EC_url_bkup EC_hash DL_hash DL_url DL_url_bkup \
+# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com>
+# Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
+# Copyright (c) 2023-2024 Leah Rowe <leah@libreboot.org>
+
+e6400_unpack="$PWD/src/bios_extract/dell_inspiron_1100_unpacker.py"
+me7updateparser="$PWD/util/me7_update_parser/me7_update_parser.py"
+pfs_extract="$PWD/src/biosutilities/Dell_PFS_Extract.py"
+uefiextract="$PWD/elf/uefitool/uefiextract"
+vendir="vendorfiles"
+appdir="$vendir/app"
+cbcfgsdir="config/coreboot"
+
+cv="CONFIG_HAVE_ME_BIN CONFIG_ME_BIN_PATH CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \
+ CONFIG_SMSC_SCH5545_EC_FW_FILE CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 \
+ CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2_OFFSET \
+ CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_BOARD_DELL_E6400 \
+ CONFIG_HAVE_MRC CONFIG_MRC_FILE CONFIG_HAVE_REFCODE_BLOB \
+ CONFIG_REFCODE_BLOB_FILE CONFIG_GBE_BIN_PATH CONFIG_IFD_BIN_PATH"
+
+eval `setvars "" EC_url_bkup EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \
E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
- E6400_VGA_romname SCH5545EC_DL_url SCH5545EC_DL_url_bkup SCH5545EC_DL_hash \
- tree mecleaner kbc1126_ec_dump MRC_refcode_cbtree MRC_refcode_gbe new_mac \
- cbfstoolref release nukemode modifygbe rom archive)"
+ E6400_VGA_romname SCH5545EC_DL_url_bkup SCH5545EC_DL_hash _dest tree \
+ mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl SCH5545EC_DL_url \
+ archive EC_url boarddir rom cbdir DL_url nukemode cbfstoolref vrelease \
+ verify _7ztest ME_bootguard IFD_platform ifdprefix $cv`
vendor_download()
{
- set +u +e
- export PATH="${PATH}:/sbin"
-
- [ $# -gt 0 ] || $err "No argument given"
- board="${1}"
- boarddir="${cbcfgsdir}/${board}"
- _b="${board%%_*mb}" # shorthand (no duplication per rom size)
-
- check_defconfig "${boarddir}" && exit 0
- detect_firmware && exit 0
- scan_config "${_b}" "config/vendor"
-
- build_dependencies_download
- download_vendorfiles
+ [ $# -gt 0 ] || $err "No argument given"; export PATH="$PATH:/sbin"
+ board="$1"; readcfg && readkconfig && bootstrap && getfiles; :
}
-detect_firmware()
+readkconfig()
{
- _cfg_exists="n"
- for _chk_file in "${boarddir}/config/"*; do
- [ -f "${_chk_file}" ] && _cfg_exists="y" && break
- done
- [ "${_cfg_exists}" = "n" ] && return 1
-
- set -- "${boarddir}/config/"*
- . "${1}" 2>/dev/null
- . "${boarddir}/target.cfg" 2>/dev/null
-
- [ -z "$tree" ] && $err "detect_firmware $boarddir: tree undefined"
- cbdir="src/coreboot/$tree"
- cbfstool="cbutils/$tree/cbfstool"
+ check_defconfig "$boarddir" 1>"$TMPDIR/vendorcfg.list" && return 1
+
+ rm -f "$TMPDIR/tmpcbcfg" || $err "!rm -f \"$TMPDIR/tmpcbcfg\""
+ while read -r cbcfgfile; do
+ for cbc in $cv; do
+ rm -f "$TMPDIR/tmpcbcfg2" || \
+ $err "!rm $TMPDIR/tmpcbcfg2"
+ grep "$cbc" "$cbcfgfile" 1>"$TMPDIR/tmpcbcfg2" \
+ 2>/dev/null || :
+ [ -f "$TMPDIR/tmpcbcfg2" ] || continue
+ cat "$TMPDIR/tmpcbcfg2" >> "$TMPDIR/tmpcbcfg" || \
+ $err "!cat $TMPDIR/tmpcbcfg2"
+ done
+ done < "$TMPDIR/vendorcfg.list"
- mecleaner="${PWD}/${cbdir}/util/me_cleaner/me_cleaner.py"
- kbc1126_ec_dump="${PWD}/${cbdir}/util/kbc1126/kbc1126_ec_dump"
+ eval `setcfg "$TMPDIR/tmpcbcfg"`
for c in CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW; do
- eval "[ -z \"\${${c}}\" ] || return 1"
+ eval "[ \"\${$c}\" = \"/dev/null\" ] && continue"
+ eval "[ -z \"\${$c}\" ] && continue"
+ eval `setcfg "config/vendor/$vcfg/pkg.cfg"`; return 0
done
- printf "Vendor files not needed for: %s\n" "${board}" 1>&2
+ printf "Vendor files not needed for: %s\n" "$board" 1>&2; return 1
}
-build_dependencies_download()
+bootstrap()
{
- [ -d "${cbdir}" ] || x_ ./update trees -f coreboot ${cbdir##*/}
- for d in uefitool biosutilities bios_extract; do
- [ -d "src/${d}" ] && continue
- x_ ./update trees -f "${d}"
- done
- [ -f "${uefiextract}" ] || x_ ./update trees -b uefitool
- [ ! -d "${kbc1126_ec_dump%/*}" ] || [ -f "${kbc1126_ec_dump}" ] || x_ \
- make -C "${cbdir}/util/kbc1126"
+ x_ ./mk -f coreboot ${cbdir##*/}
+ mk -b uefitool biosutilities bios_extract
+ [ -d "${kbc1126_ec_dump%/*}" ] && x_ make -C "$cbdir/util/kbc1126"
[ -n "$MRC_refcode_cbtree" ] && \
- cbfstoolref="cbutils/$MRC_refcode_cbtree/cbfstool"
- [ -z "$cbfstoolref" ] || [ -f "$cbfstoolref" ] || \
- x_ ./update trees -b coreboot utils $MRC_refcode_cbtree
- [ -f "${cbfstool}" ] && [ -f "${ifdtool}" ] && return 0
- x_ ./update trees -b coreboot utils $tree
+ cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \
+ x_ ./mk -d coreboot $MRC_refcode_cbtree; return 0
}
-download_vendorfiles()
+getfiles()
{
- [ -z "${CONFIG_HAVE_ME_BIN}" ] || \
- fetch intel_me "$DL_url" "$DL_url_bkup" "$DL_hash" \
- "${CONFIG_ME_BIN_PATH}"
- [ -z "${CONFIG_INCLUDE_SMSC_SCH5545_EC_FW}" ] || \
- fetch sch5545ec "$SCH5545EC_DL_url" "$SCH5545EC_DL_url_bkup" \
- "$SCH5545EC_DL_hash" "$CONFIG_SMSC_SCH5545_EC_FW_FILE"
- [ -z "${CONFIG_KBC1126_FIRMWARE}" ] || \
- fetch kbc1126ec "$EC_url" "$EC_url_bkup" "$EC_hash" \
- "${CONFIG_KBC1126_FW1}"
- [ -z "${CONFIG_VGA_BIOS_FILE}" ] || \
- fetch "e6400vga" "$E6400_VGA_DL_url" "$E6400_VGA_DL_url_bkup" \
- "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
- [ -z "${CONFIG_HAVE_MRC}" ] && return 0
- fetch "mrc" "$MRC_url" "$MRC_url_bkup" "$MRC_hash" "$CONFIG_MRC_FILE"
+ [ -z "$CONFIG_HAVE_ME_BIN" ] || fetch intel_me "$DL_url" \
+ "$DL_url_bkup" "$DL_hash" "$CONFIG_ME_BIN_PATH"
+ [ -z "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" ] || fetch sch5545ec \
+ "$SCH5545EC_DL_url" "$SCH5545EC_DL_url_bkup" "$SCH5545EC_DL_hash" \
+ "$CONFIG_SMSC_SCH5545_EC_FW_FILE"
+ [ -z "$CONFIG_KBC1126_FIRMWARE" ] || fetch kbc1126ec "$EC_url" \
+ "$EC_url_bkup" "$EC_hash" "$CONFIG_KBC1126_FW1"
+ [ -z "$CONFIG_VGA_BIOS_FILE" ] || fetch e6400vga "$E6400_VGA_DL_url" \
+ "$E6400_VGA_DL_url_bkup" "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
+ [ -z "$CONFIG_HAVE_MRC" ] || fetch "mrc" "$MRC_url" "$MRC_url_bkup" \
+ "$MRC_hash" "$CONFIG_MRC_FILE"; return 0
}
fetch()
{
- dl_type="${1}"
- dl="${2}"
- dl_bkup="${3}"
- dlsum="${4}"
- [ "${5}" = "/dev/null" ] && return 0
- [ "${5# }" = "$5" ] || $err "fetch: space not allowed in _dest: '$5'"
- [ "${5#/}" = "$5" ] || $err "fetch: absolute path not allowed: '$5'"
- _dest="${5##*../}"
- _dl="${vendir}/cache/${dlsum}"
- dl_fail="n"
-
- x_ mkdir -p "${_dl%/*}"
-
- dl_fail="y"
- vendor_checksum "${dlsum}" "${_dl}" || dl_fail="n"
- for url in "${dl}" "${dl_bkup}"; do
- [ "${dl_fail}" = "n" ] && break
- [ -z "${url}" ] && continue
- x_ rm -f "${_dl}"
- curl --location --retry 3 -A "$_ua" "$url" -o "$_dl" || \
- wget --tries 3 -U "$_ua" "$url" -O "$_dl" || continue
- vendor_checksum "${dlsum}" "${_dl}" || dl_fail="n"
- done
- [ "${dl_fail}" = "y" ] && \
- $err "fetch ${dlsum}: matched file unavailable"
+ dl_type="$1"; dl="$2"; dl_bkup="$3"; dlsum="$4"; _dest="${5##*../}"
+ [ "$5" = "/dev/null" ] && return 0; _dl="$XBMK_CACHE/file/$dlsum"
- x_ rm -Rf "${_dl}_extracted"
- mkdirs "${_dest}" "extract_${dl_type}" || return 0
- eval "extract_${dl_type}"
+ download "$dl" "$dl_bkup" "$_dl" "$dlsum"
- [ -f "${_dest}" ] && return 0
- $err "extract_${dl_type} (fetch): missing file: '${_dest}'"
-}
+ rm -Rf "${_dl}_extracted" || $err "!rm -Rf ${_ul}_extracted"
+ e "$_dest" f && return 0
-vendor_checksum()
-{
- [ "$(sha512sum "$2" | awk '{print $1}')" != "$1" ] || return 1
- printf "Bad checksum for file: %s\n" "$2" 1>&2
- rm -f "$2" || :
-}
+ mkdir -p "${_dest%/*}" || $err "mkdirs: !mkdir -p ${_dest%/*}"
+ remkdir "$appdir"; extract_archive "$_dl" "$appdir" || \
+ [ "$dl_type" = "e6400vga" ] || $err "mkd $_dest $dl_type: !extract"
-mkdirs()
-{
- if [ -f "${1}" ]; then
- printf "mkdirs %s %s: already downloaded\n" "$1" "$2" 1>&2
- return 1
- fi
- mkdir -p "${1%/*}" || $err "mkdirs: !mkdir -p ${1%/*}"
- remkdir "${appdir}"
- extract_archive "${_dl}" "${appdir}" || \
- [ "${2}" = "extract_e6400vga" ] || \
- $err "mkdirs ${1} ${2}: !extract"
+ eval "extract_$dl_type"; set -u -e
+ e "$_dest" f missing && $err "!extract_$dl_type"; :
}
extract_intel_me()
{
- [ ! -f "$mecleaner" ] && \
- $err "extract_intel_me $cbdir: me_cleaner missing"
+ e "$mecleaner" f not && $err "$cbdir: me_cleaner missing"
+
+ _me="$PWD/$_dest"; cdir="$PWD/$appdir"
+ if [ "$ME_bootguard" = "me11disreguard" ]; then
+ # run mkukri's util to extract me.bin and disable bootguard
+ # for Dell OptiPlex 3050 Micro, using the deguard util.
+ extract_deguard_me "$cdir" "$_me"
+ return 0
+ fi
+ # All other ME setups are extracted with brute force and me_cleaner:
+
+ [ $# -gt 0 ] && _me="${1}" && cdir="$2"
- _me="${PWD}/${_dest}" # must always be an absolute path
- cdir="${PWD}/${appdir}" # must always be an absolute path
- [ $# -gt 0 ] && _me="${1}" && cdir="${2}"
- [ -f "${_me}" ] && return 0
+ e "$_me" f && return 0
- sdir="$(mktemp -d)"
- [ -z "$sdir" ] && return 0
+ sdir="$(mktemp -d)"; [ -z "$sdir" ] && return 0
mkdir -p "$sdir" || $err "extract_intel_me: !mkdir -p \"$sdir\""
+
+ set +u +e
(
[ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
cd "$cdir" || $err "extract_intel_me: !cd \"$cdir\""
@@ -174,301 +130,266 @@ extract_intel_me()
[ -f "$_me" ] && break
[ -L "$i" ] && continue
if [ -f "$i" ]; then
- "$mecleaner" -r -t -O "${sdir}/vendorfile" \
+ "$mecleaner" -r -t -O "$sdir/vendorfile" \
-M "$_me" "$i" && break
"$mecleaner" -r -t -O "$_me" "$i" && break
"$me7updateparser" -O "$_me" "$i" && break
_7ztest="${_7ztest}a"
extract_archive "$i" "$_7ztest" || continue
- extract_intel_me "$_me" "${cdir}/${_7ztest}"
+ extract_intel_me "$_me" "$cdir/$_7ztest"
elif [ -d "$i" ]; then
- extract_intel_me "$_me" "${cdir}/${i}"
+ extract_intel_me "$_me" "$cdir/$i"
else
continue
fi
- cdir="${1}"
- [ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
- cd "${cdir}" || :
+ cdir="$1"; [ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}"
+ cd "$cdir" || :
done
)
- rm -Rf "${sdir}" || $err "extract_intel_me: !rm -Rf ${sdir}"
+ rm -Rf "$sdir" || $err "extract_intel_me: !rm -Rf $sdir"
+}
+
+extract_deguard_me()
+{
+ x_ ./mk -f deguard
+ cp -R src/deguard "$1/disreguard" || \
+ $err "Cannot make temporary deguard clone in $1/disreguard"
+ if [ ! -e "$1/disreguard/.git" ]; then
+ git -C "$1/disreguard" init || $err "!init $1/disreguard"
+ git -C "$1/disreguard" add -A . || $err "!add $1/disreguard"
+ git -C "$1/disreguard" commit -m "tmp" || \
+ $err "!commit $1/disreguard"
+ fi
+ git -C "$1/disreguard" am "$PWD/config/data/deguard/appdir.patch" || \
+ $err "Cannot temporarily patch deguard clone in $1/disreguard"
+ (
+ cd "$1/disreguard" || $err "Cannot cd to '$1/disreguard'"
+ x_ ./RUNME.sh
+ ) || $err "$1/disreguard: RUNME.sh returned error status"
+ "$mecleaner" --whitelist MFS --truncate "$1/disreguard/me.bin" || \
+ $err "extract_intel_me: Can't truncate disreguarded ME"
+ cp "$cdir/disreguard/me.bin" "$2" || \
+ $err "extract_intel_me: Can't move disreguarded me.bin"
}
extract_archive()
{
- innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x "$1" \
- -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
+ innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \
+ "$1" -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1
}
extract_kbc1126ec()
{
- [ ! -f "$kbc1126_ec_dump" ] && \
- $err "extract_kbc1126ec $cbdir: kbc1126_ec_dump missing"
+ e "$kbc1126_ec_dump" f missing && $err "$cbdir: kbc1126 util missing"
(
- x_ cd "${appdir}/"
- mv Rompaq/68*.BIN ec.bin || :
- if [ ! -f ec.bin ]; then
+ x_ cd "$appdir/"; mv Rompaq/68*.BIN ec.bin || :
+ if [ ! -f "ec.bin" ]; then
unar -D ROM.CAB Rom.bin || unar -D Rom.CAB Rom.bin || \
unar -D 68*.CAB Rom.bin || $err "can't extract Rom.bin"
x_ mv Rom.bin ec.bin
fi
- [ -f ec.bin ] || $err "extract_kbc1126_ec ${board}: can't extract"
- "${kbc1126_ec_dump}" ec.bin || \
- $err "extract_kbc1126_ec ${board}: can't extract ecfw1/2.bin"
+ [ -f ec.bin ] || $err "extract_kbc1126_ec $board: can't extract"
+ "$kbc1126_ec_dump" ec.bin || $err "!1126ec $board extract ecfw"
) || $err "can't extract kbc1126 ec firmware"
- ec_ex="y"
- for i in 1 2; do
- [ -f "${appdir}/ec.bin.fw${i}" ] || ec_ex="n"
- done
- [ "${ec_ex}" = "y" ] || \
- $err "extract_kbc1126_ec ${board}: didn't extract ecfw1/2.bin"
- cp "${appdir}/"ec.bin.fw* "${_dest%/*}/" || \
- $err "extract_kbc1126_ec ${board}: can't copy ec binaries"
+
+ e "$appdir/ec.bin.fw1" f not && $err "$board: kbc1126ec fetch failed"
+ e "$appdir/ec.bin.fw2" f not && $err "$board: kbc1126ec fetch failed"
+
+ cp "$appdir/"ec.bin.fw* "${_dest%/*}/" || $err "!cp 1126ec $_dest"
}
extract_e6400vga()
{
- for v in E6400_VGA_offset E6400_VGA_romname; do
- eval "[ -z \"\$$v\" ] && $err \"extract_e6400vga: $v undefined\""
- done
+ set +u +e
+ chkvars E6400_VGA_offset E6400_VGA_romname
tail -c +$E6400_VGA_offset "$_dl" | gunzip > "$appdir/bios.bin" || :
(
- x_ cd "${appdir}"
+ x_ cd "$appdir"
[ -f "bios.bin" ] || $err "extract_e6400vga: can't extract bios.bin"
- "${e6400_unpack}" bios.bin || printf "TODO: fix dell extract util\n"
- [ -f "${E6400_VGA_romname}" ] || \
- $err "extract_e6400vga: can't extract vga rom from bios.bin"
+ "$e6400_unpack" bios.bin || printf "TODO: fix dell extract util\n"
) || $err "can't extract e6400 vga rom"
- cp "${appdir}/${E6400_VGA_romname}" "${_dest}" || \
- $err "extract_e6400vga ${board}: can't copy vga rom to ${_dest}"
+ cp "$appdir/$E6400_VGA_romname" "$_dest" || \
+ $err "extract_e6400vga $board: can't copy vga rom to $_dest"
}
extract_sch5545ec()
{
# full system ROM (UEFI), to extract with UEFIExtract:
- _bios="${_dl}_extracted/Firmware/1 ${dlsum} -- 1 System BIOS vA.28.bin"
+ _bios="${_dl}_extracted/Firmware/1 $dlsum -- 1 System BIOS vA.28.bin"
# this is the SCH5545 firmware, inside of the extracted UEFI ROM:
- _sch5545ec_fw="${_bios}.dump/4 7A9354D9-0468-444A-81CE-0BF617D890DF"
- _sch5545ec_fw="${_sch5545ec_fw}/54 D386BEB8-4B54-4E69-94F5-06091F67E0D3"
- _sch5545ec_fw="${_sch5545ec_fw}/0 Raw section/body.bin" # <-- this!
-
- # this makes the file defined by _sch5545ec_fw available to copy
- "${uefiextract}" "${_bios}" || \
- $err "extract_sch5545ec: cannot extract from uefi image"
- cp "${_sch5545ec_fw}" "${_dest}" || \
- $err "extract_sch5545ec: cannot copy sch5545ec firmware file"
+ _sch5545ec_fw="$_bios.dump/4 7A9354D9-0468-444A-81CE-0BF617D890DF"
+ _sch5545ec_fw="$_sch5545ec_fw/54 D386BEB8-4B54-4E69-94F5-06091F67E0D3"
+ _sch5545ec_fw="$_sch5545ec_fw/0 Raw section/body.bin" # <-- this!
+
+ "$uefiextract" "$_bios" || $err "sch5545 !extract"
+ cp "$_sch5545ec_fw" "$_dest" || $err "$_dest: !sch5545 copy"
}
vendor_inject()
{
- set +u +e
-
- [ $# -lt 1 ] && $err "No options specified."
- [ "${1}" = "listboards" ] && eval "items config/coreboot || :; exit 0"
-
- archive="${1}"
-
- while getopts n:r:b:m: option; do
- case "${option}" in
- n) nukemode="${OPTARG}" ;;
- r) rom=${OPTARG} ;;
- b) board=${OPTARG} ;;
- m) modifygbe=true
- new_mac=${OPTARG} ;;
+ set +u +e; [ $# -lt 1 ] && $err "No options specified."
+ [ "$1" = "listboards" ] && eval "ls -1 config/coreboot || :; exit 0"
+
+ archive="$1"; while getopts n:r:b:m: option; do
+ case "$option" in
+ n) nukemode="$OPTARG" ;;
+ r) rom="$OPTARG" ;;
+ b) board="$OPTARG" ;;
+ m) new_mac="$OPTARG"; chkvars new_mac ;;
*) : ;;
esac
done
- check_board
- build_dependencies_inject
- inject_vendorfiles
- [ "${nukemode}" = "nuke" ] && return 0
- printf "Friendly reminder (this is *not* an error message):\n"
- printf "Please ensure that the files were inserted correctly.\n"
+ check_board || return 0
+ [ "$nukemode" = "nuke" ] || x_ ./vendor download $board
+ [ "$vrelease" != "y" ] && patch_rom "$rom"
+ [ "$vrelease" = "y" ] && patch_release_roms; :
}
check_board()
{
- failcheck="n"
- check_release "${archive}" || failcheck="y"
- if [ "${failcheck}" = "y" ]; then
+ failcheck="y" && check_release "$archive" && failcheck="n"
+ if [ "$failcheck" = "y" ]; then
[ -f "$rom" ] || $err "check_board \"$rom\": invalid path"
[ -z "${rom+x}" ] && $err "check_board: no rom specified"
- [ -n "${board+x}" ] || board=$(detect_board "${rom}")
+ [ -n "${board+x}" ] || board="$(detect_board "$rom")"
else
- release="y"
- board=$(detect_board "${archive}")
+ vrelease="y"; board="$(detect_board "$archive")"
fi
-
- boarddir="${cbcfgsdir}/${board}"
- [ -d "$boarddir" ] || $err "check_board: board $board missing"
- [ -f "$boarddir/target.cfg" ] || \
- $err "check_board $board: target.cfg missing"
- . "$boarddir/target.cfg" 2>/dev/null
- [ -z "$tree" ] && $err "check_board $board: tree undefined"; return 0
+ readcfg || return 1; return 0
}
check_release()
{
- [ -f "${archive}" ] || return 1
+ [ -f "$archive" ] || return 1
[ "${archive##*.}" = "xz" ] || return 1
- printf "%s\n" "Release archive ${archive} detected"
+ printf "%s\n" "Release archive $archive detected"
}
# This function tries to determine the board from the filename of the rom.
# It will only succeed if the filename is not changed from the build/download
detect_board()
{
- path="${1}"
- filename=$(basename "${path}")
- case ${filename} in
- grub_*)
- board=$(echo "${filename}" | cut -d '_' -f2-3) ;;
+ path="$1"; filename="$(basename "$path")"
+ case "$filename" in
+ grub_*|seagrub_*|custom_*)
+ board="$(echo "$filename" | cut -d '_' -f2-3)" ;;
seabios_withgrub_*)
- board=$(echo "${filename}" | cut -d '_' -f3-4) ;;
- *.tar.xz)
- _stripped_prefix=${filename#*_}
+ board="$(echo "$filename" | cut -d '_' -f3-4)" ;;
+ *.tar.xz) _stripped_prefix="${filename#*_}"
board="${_stripped_prefix%.tar.xz}" ;;
- *)
- $err "detect_board $filename: could not detect board type"
- esac
- printf "%s\n" "${board}"
+ *) $err "detect_board $filename: could not detect board type"
+ esac; printf "%s\n" "$board"
}
-build_dependencies_inject()
+readcfg()
{
- cbdir="src/coreboot/$tree"
- cbfstool="cbutils/$tree/cbfstool"
- ifdtool="cbutils/$tree/ifdtool"
- [ -d "${cbdir}" ] || x_ ./update trees -f coreboot $tree
- if [ ! -f "${cbfstool}" ] || [ ! -f "${ifdtool}" ]; then
- x_ ./update trees -b coreboot utils $tree
- fi
- [ -z "$new_mac" ] || [ -f "$nvmutil" ] || x_ make -C util/nvmutil
- [ "$nukemode" = "nuke" ] || x_ ./vendor download $board; return 0
-}
+ if [ "$board" = "serprog_rp2040" ] || \
+ [ "$board" = "serprog_stm32" ]; then
+ return 1
+ fi; boarddir="$cbcfgsdir/$board"
+ eval `setcfg "$boarddir/target.cfg"`; chkvars vcfg tree
-inject_vendorfiles()
-{
- [ "${release}" != "y" ] && eval "patch_rom \"$rom\"; return 0"
- patch_release_roms
+ cbdir="src/coreboot/$tree"
+ cbfstool="elf/cbfstool/$tree/cbfstool"
+ mecleaner="$PWD/$cbdir/util/me_cleaner/me_cleaner.py"
+ kbc1126_ec_dump="$PWD/$cbdir/util/kbc1126/kbc1126_ec_dump"
+ cbfstool="elf/cbfstool/$tree/cbfstool"
+ ifdtool="elf/ifdtool/$tree/ifdtool"
+ [ -n "$IFD_platform" ] && ifdprefix="-p $IFD_platform"
+
+ x_ ./mk -d coreboot $tree
}
patch_release_roms()
{
- _tmpdir="tmp/romdir"
- remkdir "${_tmpdir}"
- tar -xf "${archive}" -C "${_tmpdir}" || \
- $err "patch_release_roms: !tar -xf \"$archive\" -C \"$_tmpdir\""
-
- for x in "${_tmpdir}"/bin/*/*.rom ; do
- printf "patching rom: %s\n" "$x"
- patch_rom "${x}"
+ remkdir "tmp/romdir"; tar -xf "$archive" -C "tmp/romdir" || \
+ $err "patch_release_roms: !tar -xf \"$archive\" -C \"tmp/romdir\""
+
+ for x in "tmp/romdir/bin/"*/*.rom ; do
+ patch_rom "$x"
done
(
- cd "${_tmpdir}/bin/"* || \
- $err "patch_release_roms: !cd ${_tmpdir}/bin/*"
+ cd "tmp/romdir/bin/"* || $err "patch roms: !cd tmp/romdir/bin/*"
# NOTE: For compatibility with older rom releases, defer to sha1
- [ "${nukemode}" = "nuke" ] || sha512sum --status -c vendorhashes || \
+ [ "$verify" != "y" ] || [ "$nukemode" = "nuke" ] || \
+ sha512sum --status -c vendorhashes || \
sha1sum --status -c vendorhashes || sha512sum --status -c \
blobhashes || sha1sum --status -c blobhashes || \
$err "patch_release_roms: ROMs did not match expected hashes"
) || $err "can't verify vendor hashes"
- [ "${modifygbe}" = "true" ] && \
- for x in "${_tmpdir}"/bin/*/*.rom ; do
- modify_gbe "${x}"
- done
-
- [ -d bin/release ] || x_ mkdir -p bin/release
- x_ mv "${_tmpdir}"/bin/* bin/release/
- x_ rm -Rf "${_tmpdir}"
+ [ -n "$new_mac" ] && for x in "tmp/romdir/bin/"*/*.rom ; do
+ [ -f "$x" ] && modify_gbe "$x"
+ done
- printf "Success! Your ROMs are in bin/release\n"
+ x_ mkdir -p bin/release
+ mv tmp/romdir/bin/* bin/release/ || $err "$board: !mv release roms"
}
patch_rom()
{
- rom="${1}"
-
- check_defconfig "$boarddir" && $err "patch_rom $boarddir: no configs"
-
- set -- "${boarddir}/config/"*
- . "${1}" 2>/dev/null
-
- [ "$CONFIG_HAVE_MRC" = "y" ] && \
- inject "mrc.bin" "${CONFIG_MRC_FILE}" "mrc" "0xfffa0000"
- [ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && \
- inject "fallback/refcode" "$CONFIG_REFCODE_BLOB_FILE" "stage"
- [ "${CONFIG_HAVE_ME_BIN}" = "y" ] && \
- inject "IFD" "${CONFIG_ME_BIN_PATH}" "me"
- [ "${CONFIG_KBC1126_FIRMWARE}" = "y" ] && \
- inject "ecfw1.bin" "$CONFIG_KBC1126_FW1" "raw" \
- "${CONFIG_KBC1126_FW1_OFFSET}" && \
- inject "ecfw2.bin" "$CONFIG_KBC1126_FW2" "raw" \
- "${CONFIG_KBC1126_FW2_OFFSET}"
+ rom="$1"
+ readkconfig || exit 0
+
+ [ "$CONFIG_HAVE_MRC" = "y" ] && inject "mrc.bin" "$CONFIG_MRC_FILE" \
+ "mrc" "0xfffa0000"
+ [ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && inject "fallback/refcode" \
+ "$CONFIG_REFCODE_BLOB_FILE" "stage"
+ [ "$CONFIG_HAVE_ME_BIN" = "y" ] && inject IFD "$CONFIG_ME_BIN_PATH" me
+ [ "$CONFIG_KBC1126_FIRMWARE" = "y" ] && inject ecfw1.bin \
+ "$CONFIG_KBC1126_FW1" raw "$CONFIG_KBC1126_FW1_OFFSET" && inject \
+ ecfw2.bin "$CONFIG_KBC1126_FW2" raw "$CONFIG_KBC1126_FW2_OFFSET"
[ -n "$CONFIG_VGA_BIOS_FILE" ] && [ -n "$CONFIG_VGA_BIOS_ID" ] && \
- inject "pci${CONFIG_VGA_BIOS_ID}.rom" \
- "${CONFIG_VGA_BIOS_FILE}" "optionrom"
- [ "${CONFIG_INCLUDE_SMSC_SCH5545_EC_FW}" = "y" ] && \
- [ -n "${CONFIG_SMSC_SCH5545_EC_FW_FILE}" ] && \
- inject "sch5545_ecfw.bin" "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
- [ "${modifygbe}" = "true" ] && ! [ "${release}" = "y" ] && \
- inject "IFD" "${CONFIG_GBE_BIN_PATH}" "GbE"
-
- printf "ROM image successfully patched: %s\n" "${rom}"
+ inject "pci$CONFIG_VGA_BIOS_ID.rom" "$CONFIG_VGA_BIOS_FILE" optionrom
+ [ "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" = "y" ] && \
+ [ -n "$CONFIG_SMSC_SCH5545_EC_FW_FILE" ] && \
+ inject sch5545_ecfw.bin "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw
+ [ -n "$new_mac" ] && [ "$vrelease" != "y" ] && modify_gbe "$rom"
+
+ printf "ROM image successfully patched: %s\n" "$rom"
}
inject()
{
- [ $# -lt 3 ] && \
- $err "inject $@, $rom: usage: inject name path type (offset)"
-
- eval "$(setvars "" cbfsname _dest _t _offset)"
- cbfsname="${1}"
- _dest="${2##*../}"
- _t="${3}"
- [ $# -gt 3 ] && _offset="-b ${4}" && [ -z "${4}" ] && \
- $err "inject $@, $rom: offset passed, but empty (not defined)"
+ [ $# -lt 3 ] && $err "$@, $rom: usage: inject name path type (offset)"
+ [ "$2" = "/dev/null" ] && return 0; verify="y"
- [ -z "${_dest}" ] && $err "inject $@, ${rom}: empty destination path"
- [ ! -f "${_dest}" ] && [ "${nukemode}" != "nuke" ] && \
- $err "inject_${dl_type}: file missing, ${_dest}"
+ eval `setvars "" cbfsname _dest _t _offset`
+ cbfsname="$1"; _dest="${2##*../}"; _t="$3"
- [ "$nukemode" = "nuke" ] || \
- printf "Inserting %s/%s in file: %s\n" "$cbfsname" "$_t" "$rom"
+ [ $# -gt 3 ] && _offset="-b $4" && [ -z "$4" ] && \
+ $err "inject $@, $rom: offset passed, but empty (not defined)"
- if [ "${_t}" = "GbE" ]; then
- x_ mkdir -p tmp
- cp "${_dest}" "tmp/gbe.bin" || \
- $err "inject: !cp \"${_dest}\" \"tmp/gbe.bin\""
- _dest="tmp/gbe.bin"
- "${nvmutil}" "${_dest}" setmac "${new_mac}" || \
- $err "inject ${_dest}: can't change mac address"
- fi
- if [ "${cbfsname}" = "IFD" ]; then
- if [ "${nukemode}" != "nuke" ]; then
- "$ifdtool" -i ${_t}:${_dest} "$rom" -O "$rom" || \
- $err "inject: can't insert $_t ($dest) into $rom"
- else
- "$ifdtool" --nuke $_t "$rom" -O "$rom" || \
- $err "inject $rom: can't nuke $_t in IFD"
- fi
- else
- if [ "${nukemode}" != "nuke" ]; then
- if [ "$_t" = "stage" ]; then # broadwell refcode
- "$cbfstool" "$rom" add-stage -f "$_dest" \
- -n "$cbfsname" -t stage -c lzma
- else
- "$cbfstool" "$rom" add -f "$_dest" \
- -n "$cbfsname" -t $_t $_offset || \
- $err "$rom: can't insert $_t file $_dest"
- fi
- else
- "$cbfstool" "$rom" remove -n "$cbfsname" || \
- $err "inject $rom: can't remove $cbfsname"
- fi
+ e "$_dest" f n && [ "$nukemode" != "nuke" ] && $err "!inject $dl_type"
+
+ if [ "$cbfsname" = "IFD" ]; then
+ [ "$nukemode" = "nuke" ] || "$ifdtool" $ifdprefix -i \
+ $_t:$_dest "$rom" -O "$rom" || \
+ $err "failed: inject '$_t' '$_dest' on '$rom'"
+ [ "$nukemode" != "nuke" ] || "$ifdtool" $ifdprefix --nuke $_t \
+ "$rom" -O "$rom" || $err "$rom: !nuke IFD/$_t"; return 0
+ elif [ "$nukemode" = "nuke" ]; then
+ "$cbfstool" "$rom" remove -n "$cbfsname" || \
+ $err "inject $rom: can't remove $cbfsname"; return 0
fi
+ [ "$_t" != "stage" ] || "$cbfstool" "$rom" add-stage -f \
+ "$_dest" -n "$cbfsname" -t stage -c lzma || $err "$rom: !add ref"
+ [ "$_t" = "stage" ] || "$cbfstool" "$rom" add -f "$_dest" \
+ -n "$cbfsname" -t $_t $_offset || $err "$rom !add $_t ($_dest)"; :
+}
+
+modify_gbe()
+{
+ chkvars CONFIG_GBE_BIN_PATH
+
+ e "${CONFIG_GBE_BIN_PATH##*../}" f n && $err "missing gbe file"
+ x_ make -C util/nvmutil
+
+ x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "$TMPDIR/gbe"
+ x_ "util/nvmutil/nvm" "$TMPDIR/gbe" setmac $new_mac
+ "$ifdtool" $ifdprefix -i GbE:"$TMPDIR/gbe" "$1" -O "$1" || \
+ $err "Cannot insert modified GbE region into target image."
}
diff --git a/mk b/mk
new file mode 120000
index 00000000..c795b054
--- /dev/null
+++ b/mk
@@ -0,0 +1 @@
+build \ No newline at end of file
diff --git a/projectsite b/projectsite
new file mode 100644
index 00000000..bb74f9d7
--- /dev/null
+++ b/projectsite
@@ -0,0 +1 @@
+https://libreboot.org/
diff --git a/script/roms b/script/roms
deleted file mode 100755
index ac3d28ef..00000000
--- a/script/roms
+++ /dev/null
@@ -1,475 +0,0 @@
-#!/usr/bin/env sh
-# SPDX-License-Identifier: GPL-3.0-or-later
-# SPDX-FileCopyrightText: 2014-2016,2020,2021,2023,2024 Leah Rowe <leah@libreboot.org>
-# SPDX-FileCopyrightText: 2021,2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
-# SPDX-FileCopyrightText: 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
-# SPDX-FileCopyrightText: 2023 Riku Viitanen <riku.viitanen@protonmail.com>
-
-set -u -e
-
-. "include/option.sh"
-
-seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin"
-grub_background="background1280x800.png"
-grubelf="elf/grub/grub.elf"
-cfgsdir="config/coreboot"
-pico_src_dir="src/pico-serprog"
-pico_sdk_dir="src/pico-sdk"
-stm32_src_dir="src/stm32-vserprog"
-
-# Disable all payloads by default.
-# target.cfg files have to specifically enable [a] payload(s)
-pv="payload_grub payload_grub_withseabios payload_seabios payload_memtest t"
-pv="${pv} payload_seabios_withgrub payload_seabios_grubonly payload_uboot memtest_bin"
-v="romdir cbrom initmode displaymode cbcfg targetdir tree keymaps release"
-v="${v} grub_timeout ubdir board grub_scan_disk uboot_config"
-eval "$(setvars "n" ${pv} serprog)"
-eval "$(setvars "" ${v} boards _displaymode _payload _keyboard all targets \
- serprog_boards_dir)"
-
-main()
-{
- while [ $# -gt 0 ]; do
- case ${1} in
- list)
- x_ items config/coreboot
- return 0 ;;
- serprog)
- serprog="y"
- shift 1; break ;;
- -d) _displaymode="${2}" ;;
- -p) _payload="${2}" ;;
- -k) _keyboard="${2}" ;;
- *)
- [ "${1}" = "all" ] && all="y"
- boards="${1} ${boards}"
- shift && continue ;;
- esac
- shift 2
- done
-
- if [ "$serprog" = "y" ]; then
- handle_serprog $@
- return 0
- else
- [ "${all}" != "y" ] || boards=$(items config/coreboot) || \
- $err "Cannot generate list of boards for building"
- for x in ${boards}; do
- handle_coreboot_target "$x"
- done
- fi
-
- bstr="directories"
- [ "$lbmk_release" = "y" ] && bstr="tarballs"
-
- [ -z "${targets}" ] && $err "No ROM images were compiled"
- printf "\nROM images available in these %s:\n" "$bstr"
- eval "printf \"${targets}\""
- printf "^^ ROM images available in these %s.\n\n" "$bstr"
-
- [ "$lbmk_release" = "y" ] && \
- printf "Always run the inject command on release images!\n"
- printf "DO NOT flash images from elf/ - please use bin/ instead.\n"
-}
-
-handle_serprog()
-{
- [ -z "${1+x}" ] && $err "bad command. Check $projectname docs."
- [ "$1" != "rp2040" ] && [ "$1" != "stm32" ] && $err "bad command"
- if [ "${1}" = "rp2040" ]; then
- serprog_boards_dir=${pico_sdk_dir}/src/boards/include/boards
- [ -d "$pico_src_dir" ] || x_ ./update trees -f "pico-serprog"
- elif [ "${1}" = "stm32" ]; then
- serprog_boards_dir=${stm32_src_dir}/boards
- [ -d "$stm32_src_dir" ] || x_ ./update trees -f "stm32-vserprog"
- fi
- x_ mkdir -p "bin/serprog_${1}"
-
- if [ $# -gt 1 ] && [ "${2}" = "list" ]; then
- print_serprog_boards ${serprog_boards_dir}
- return 0
- elif [ $# -gt 1 ]; then
- build_${1}_rom "${2}"
- else
- printf "Building all serprog targets\n"
- list_serprog_boards "${serprog_boards_dir}" | \
- while read -r board; do
- build_${1}_rom "${board}"
- done
- fi
-
- [ "$lbmk_release" = "y" ] && mktar_release "bin/serprog_$1"; return 0
-}
-
-build_rp2040_rom()
-{
- board=${1}
- printf "Building pico-serprog for %s\n" "${board}"
- x_ cmake -DPICO_BOARD="$board" -DPICO_SDK_PATH="$pico_sdk_dir" \
- -B "${pico_src_dir}/build" "${pico_src_dir}"
- x_ cmake --build "${pico_src_dir}/build"
- x_ mv ${pico_src_dir}/build/pico_serprog.uf2 \
- bin/serprog_rp2040/serprog_${board}.uf2
- printf "output to bin/serprog_rp2040/serprog_%s.uf2\n" "$board"
-}
-
-build_stm32_rom()
-{
- board=${1}
- printf "Building stm32-vserprog for %s\n" "${board}"
- x_ make -C $stm32_src_dir libopencm3-just-make BOARD=$board
- x_ make -C ${stm32_src_dir} BOARD=${board}
- x_ mv ${stm32_src_dir}/stm32-vserprog.hex \
- bin/serprog_stm32/serprog_${board}.hex
- printf "output to bin/serprog_stm32/serprog_%s.hex\n" "$board"
-}
-
-print_serprog_boards()
-{
- printf "Available boards:\n"
- list_serprog_boards "${1}"
-}
-
-list_serprog_boards()
-{
- basename -a -s .h "${1}/"*.h || $err "list_boards $1: can't list boards"
-}
-
-handle_coreboot_target()
-{
- eval "$(setvars "n" ${pv}) $(setvars "" ${v})"
- grub_background="background1280x800.png"
- board="$1"
-
- configure_target
- [ "$board" = "$tree" ] && return 0
- if [ "$lbmk_release" = "y" ] && [ "$release" = "n" ]; then
- printf "Target '%s' disabled for release.\n" "$board"
- return 0
- fi
-
- build_payloads
- build_target_mainboard
-
- [ -d "bin/${board}" ] || return 0
- [ "$lbmk_release" = "y" ] || targets="* bin/${board}\n${targets}"
- [ "$lbmk_release" = "y" ] || return 0
-
- targets="* bin/${relname}_$board.tar.xz\n$targets"
- mktar_release "bin/$board"
-}
-
-configure_target()
-{
- targetdir="${cfgsdir}/${board}"
- [ -f "${targetdir}/target.cfg" ] || \
- $err "Missing target.cfg for target: ${board}"
-
- # Override the above defaults using target.cfg
- . "${targetdir}/target.cfg"
-
- [ -z "${grub_scan_disk}" ] && grub_scan_disk="both"
- [ "$grub_scan_disk" != "both" ] && [ "$grub_scan_disk" != "ata" ] \
- && [ "${grub_scan_disk}" != "ahci" ] && \
- grub_scan_disk="both"
-
- [ -z "$tree" ] && $err "$board: tree not defined"
-
- [ "${payload_memtest}" != "y" ] && payload_memtest="n"
- [ "${payload_grub_withseabios}" = "y" ] && payload_grub="y"
- [ "${payload_grub_withseabios}" = "y" ] && \
- eval "$(setvars "y" payload_seabios payload_seabios_withgrub)"
- [ "$payload_seabios_withgrub" = "y" ] && payload_seabios="y"
- [ "$payload_seabios_grubonly" = "y" ] && payload_seabios="y"
- [ "$payload_seabios_grubonly" = "y" ] && payload_seabios_withgrub="y"
-
- # The reverse logic must not be applied. If SeaBIOS-with-GRUB works,
- # that doesn't mean GRUB-withSeaBIOS will. For example, the board
- # might have a graphics card whose vga rom coreboot doesn't execute
- [ "$payload_grub" != "y" ] && [ "$payload_seabios" != "y" ] && \
- [ "${payload_uboot}" != "y" ] && \
- for configfile in "${targetdir}/config/"*; do
- [ -e "${configfile}" ] || continue
- $err "target '${board}' defines no payload"
- done
-
- [ "$payload_uboot" != "n" ] && [ "$payload_uboot" != "y" ] && \
- payload_uboot="n"
- [ "$payload_uboot" = "y" ] && [ -z "$uboot_config" ] && \
- uboot_config="default"
-
- # Override all payload directives with cmdline args
- [ -z "${_payload}" ] && return 0
- printf "setting payload to: %s\n" "${_payload}"
- eval "$(setvars "n" payload_grub payload_memtest payload_seabios \
- payload_seabios_withgrub payload_uboot payload_grub_withseabios \
- payload_seabios_grubonly)"
- eval "payload_${_payload}=y"
-}
-
-build_payloads()
-{
- romdir="bin/${board}"
- cbdir="src/coreboot/${board}"
- [ "${board}" = "${tree}" ] || cbdir="src/coreboot/${tree}"
- cbfstool="cbutils/${tree}/cbfstool"
- cbrom="${cbdir}/build/coreboot.rom"
-
- [ -f "$cbfstool" ] || x_ ./update trees -b coreboot utils $tree
-
- memtest_bin="memtest86plus/build64/memtest.bin"
- [ "${payload_memtest}" != "y" ] || [ -f "src/${memtest_bin}" ] || \
- x_ ./update trees -b memtest86plus
-
- [ "$payload_seabios" = "y" ] && x_ ./update trees -b seabios
- if [ "$payload_grub" = "y" ] || [ "$payload_seabios_withgrub" = "y" ] \
- || [ "$payload_seabios_grubonly" = "y" ]; then build_grub_payload
- fi
- [ "${payload_uboot}" = "y" ] && build_uboot_payload; return 0
-}
-
-build_grub_payload()
-{
- x_ mkdir -p elf/grub
-
- for keymapfile in config/grub/keymap/*.gkb; do
- [ -f "${keymapfile}" ] || continue
-
- keymaps="${keymaps} ${keymapfile}"
- done
- [ -z "$_keyboard" ] || [ -f "$grubcfgsdir/keymap/$_keyboard.gkb" ] || \
- $err "build_grub_payload: $_keyboard layout not defined"
- [ -n "$_keyboard" ] && keymaps="${grubcfgsdir}/keymap/${_keyboard}.gkb"
- [ -f "$grubelf" ] && return 0
- [ -f "src/grub/grub-mkstandalone" ] || x_ ./update trees -b grub
-
- ./src/grub/grub-mkstandalone \
- --grub-mkimage="src/grub/grub-mkimage" \
- -O i386-coreboot \
- -o "elf/grub/grub.elf" \
- -d "src/grub/grub-core/" \
- --fonts= --themes= --locales= \
- --modules="${grub_modules}" \
- --install-modules="${grub_install_modules}" \
- "/boot/grub/grub.cfg=${grubcfgsdir}/config/grub_memdisk.cfg" \
- "/boot/grub/grub_default.cfg=${grubcfgsdir}/config/grub.cfg" || \
- $err "could not generate grub.elf"
-}
-
-build_uboot_payload()
-{
- x_ ./update trees -b u-boot ${board}
- ubdir="elf/u-boot/${board}/${uboot_config}"
- ubootelf="${ubdir}/u-boot.elf"
- [ ! -f "${ubootelf}" ] && [ -f "${ubdir}/u-boot" ] && \
- ubootelf="${ubdir}/u-boot"
- [ -f "${ubootelf}" ] && return 0
- $err "Can't find u-boot build for board, $board";
-}
-
-build_target_mainboard()
-{
- x_ rm -Rf "${romdir}"
-
- for x in "normal" "vgarom" "libgfxinit"; do
- initmode="${x}"
- hmode="vesafb"
- [ "${initmode}" = "vgarom" ] || hmode="corebootfb"
- modes="${hmode} txtmode"
- [ -z "${_displaymode}" ] || modes="${_displaymode}"
- for y in ${modes}; do
- displaymode="${y}"
- [ "${initmode}" = "normal" ] && \
- [ "$displaymode" != "txtmode" ] && continue
- cbcfg="${targetdir}/config/${initmode}_${displaymode}"
- [ "${initmode}" = "normal" ] && cbcfg="${cbcfg%_*}"
- build_roms "${cbcfg}"
- x_ rm -f "$cbrom"
- done
- done
-}
-
-# Main ROM building function. This calls all other functions below
-build_roms()
-{
- cbcfg="${1}"
- if [ ! -f "${cbcfg}" ]; then
- printf "'%s' does not exist. Skipping build for %s %s %s\n" \
- "$cbcfg" "$board" "$displaymode" "$initmode" 1>&2
- return 0
- fi
-
- x_ ./update trees -b coreboot ${board}
-
- _cbrom="elf/coreboot_nopayload_DO_NOT_FLASH"
- _cbrom="${_cbrom}/${board}/${initmode}_${displaymode}"
- [ "${initmode}" = "normal" ] && \
- _cbrom="${_cbrom%"_${displaymode}"}"
- _cbrom="${_cbrom}/coreboot.rom"
- cbrom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
- x_ cp "${_cbrom}" "${cbrom}"
-
- [ "${payload_memtest}" != "y" ] || \
- x_ "${cbfstool}" "${cbrom}" add-payload \
- -f "src/${memtest_bin}" -n img/memtest -c lzma
- [ "${payload_seabios}" = "y" ] && build_seabios_roms
- [ "$payload_grub" != "y" ] || x_ build_grub_roms "$cbrom" "grub"
- [ "${payload_uboot}" = "y" ] || return 0
- x_ cp "${_cbrom}" "${cbrom}"
- build_uboot_roms
-}
-
-build_seabios_roms()
-{
- if [ "${payload_seabios_withgrub}" = "y" ]; then
- t=$(mktemp -t coreboot_rom.XXXXXXXXXX)
- x_ cp "${cbrom}" "${t}"
- x_ build_grub_roms "${t}" "seabios_withgrub"
- else
- t=$(mkSeabiosRom "${cbrom}" "fallback/payload") || \
- $err "build_seabios_roms: cannot build tmprom"
- newrom="${romdir}/seabios_${board}_${initmode}_${displaymode}"
- [ "${initmode}" = "normal" ] && newrom="${romdir}/seabios" \
- && newrom="${newrom}_${board}_${initmode}"
- x_ moverom "${t}" "${newrom}.rom"
- fi
- x_ rm -f "${t}"
-}
-
-# Make separate ROM images with GRUB payload, for each supported keymap
-build_grub_roms()
-{
- tmprom="${1}"
- payload1="${2}" # allow values: grub, seabios, seabios_withgrub
-
- grub_cbfs="fallback/payload"
- if [ "$payload1" = "grub" ] && [ "$payload_grub_withseabios" = "y" ]
- then
- _tmpmvrom=$(mkSeabiosRom "$tmprom" "seabios.elf") || \
- $err "build_grub_roms 1 $board: can't build tmprom"
- x_ mv "$_tmpmvrom" "$tmprom"
- elif [ "$payload1" != "grub" ] && [ "$payload_seabios_withgrub" = "y" ]
- then
- grub_cbfs="img/grub2"
- _tmpmvrom=$(mkSeabiosRom "$tmprom" fallback/payload) || \
- $err "build_grub_roms 2 $board: can't build tmprom"
- x_ mv "$_tmpmvrom" "$tmprom"
- fi
-
- # we only need insert grub.elf once, for each coreboot config:
- x_ "${cbfstool}" "${tmprom}" add-payload -f "${grubelf}" \
- -n ${grub_cbfs} -c lzma
-
- # we only need insert background.png once, for each coreboot config:
- if [ "${displaymode}" = "vesafb" ] || \
- [ "${displaymode}" = "corebootfb" ]; then
- backgroundfile="config/grub/background/${grub_background}"
- "${cbfstool}" "${tmprom}" add -f ${backgroundfile} \
- -n background.png -t raw || \
- $err "insert background, ${backgroundfile}"
- fi
-
- tmpcfg=$(mktemp -t coreboot_rom.XXXXXXXXXX)
- printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" >"$tmpcfg" \
- || $err "set grub_scandisk, $grub_scan_disk, $tmpcfg"
- [ "${grub_scan_disk}" = "both" ] || \
- x_ "$cbfstool" "$tmprom" add -f "$tmpcfg" -n scan.cfg -t raw
- printf "set timeout=%s\n" "${grub_timeout}" > "${tmpcfg}" || \
- $err "set timeout, ${grub_timeout}, ${tmpcfg}"
- [ -z "${grub_timeout}" ] || x_ "${cbfstool}" "${tmprom}" add \
- -f "${tmpcfg}" -n timeout.cfg -t raw
- x_ rm -f "${tmpcfg}"
-
- for keymapfile in ${keymaps}; do
- [ -f "${keymapfile}" ] || continue
- keymap="${keymapfile##*/}"
- keymap="${keymap%.gkb}"
-
- tmpgrubrom="$(mktemp -t coreboot_rom.XXXXXXXXXX)"
- x_ cp "${tmprom}" "${tmpgrubrom}"
- x_ "$cbfstool" "$tmpgrubrom" add -f "$keymapfile" \
- -n keymap.gkb -t raw
-
- newrom="${romdir}/${payload1}_${board}_${initmode}_"
- newrom="${newrom}${displaymode}_${keymap}.rom"
- [ "${initmode}" = "normal" ] && \
- newrom="${romdir}/${payload1}_${board}_" && \
- newrom="${newrom}${initmode}_${keymap}.rom"
- x_ moverom "${tmpgrubrom}" "${newrom}"
- if [ "${payload_seabios_grubonly}" = "y" ]; then
- x_ "$cbfstool" "$tmpgrubrom" add \
- -f "config/grub/bootorder" -n bootorder -t raw
- x_ moverom "$tmpgrubrom" "${newrom%.rom}_grubfirst.rom"
- x_ "$cbfstool" "$tmpgrubrom" add-int -i 0 \
- -n etc/show-boot-menu
- x_ moverom "$tmpgrubrom" "${newrom%.rom}_grubonly.rom"
- fi
- x_ rm -f "${tmpgrubrom}"
- done
-}
-
-# make a rom in /tmp/ and then print the path of that ROM
-mkSeabiosRom() {
- _cbrom="${1}" # rom to insert seabios in. will not be touched
- # (a tmpfile will be made instead)
- _seabios_cbfs_path="${2}" # e.g. fallback/payload
- _seabioself="elf/seabios/default/${initmode}/bios.bin.elf"
- tmprom=$(mktemp -t coreboot_rom.XXXXXXXXXX)
-
- x_ cp "${_cbrom}" "${tmprom}"
- x_ "$cbfstool" "$tmprom" add-payload -f "$_seabioself" \
- -n "${_seabios_cbfs_path}" -c lzma
- x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup
-
- z="2"; [ "$initmode" = "vgarom" ] && z="0"
- x_ "$cbfstool" "$tmprom" add-int -i $z -n etc/pci-optionrom-exec
- x_ "$cbfstool" "$tmprom" add-int -i 0 -n etc/optionroms-checksum
- [ "$initmode" != "libgfxinit" ] || \
- x_ "$cbfstool" "$tmprom" add -f "$seavgabiosrom" \
- -n vgaroms/seavgabios.bin -t raw
-
- printf "%s\n" "${tmprom}"
-}
-
-build_uboot_roms()
-{
- tmprom=$(mkUbootRom "${cbrom}" "fallback/payload") || \
- $err "build_uboot_roms $board: could not create tmprom"
- newrom="${romdir}/uboot_payload_${board}_${initmode}_${displaymode}.rom"
- x_ moverom "${tmprom}" "${newrom}"
- x_ rm -f "${tmprom}"
-}
-
-# make a rom in /tmp/ and then print the path of that ROM
-mkUbootRom() {
- _cbrom="${1}"
- _uboot_cbfs_path="${2}"
-
- _ubdir="elf/u-boot/${board}/${uboot_config}"
- _ubootelf="${_ubdir}/u-boot.elf"
- [ -f "${_ubootelf}" ] || _ubootelf="${_ubdir}/u-boot"
- [ -f "$_ubootelf" ] || $err "mkUbootRom: $board: cant find u-boot"
-
- tmprom=$(mktemp -t coreboot_rom.XXXXXXXXXX)
-
- x_ cp "${_cbrom}" "${tmprom}"
- x_ "$cbfstool" "$tmprom" add-payload -f "$_ubootelf" \
- -n "${_uboot_cbfs_path}" -c lzma
-
- printf "%s\n" "${tmprom}"
-}
-
-moverom()
-{
- printf "Creating target image: %s\n" "$2"
-
- x_ mkdir -p "${2%/*}"
- x_ cp "$1" "$2"
- [ "$lbmk_release" = "y" ] || return 0
-
- mksha512sum "${2}" "vendorhashes"
- x_ ./vendor inject -r "${2}" -b "$board" -n nuke
-}
-
-main $@
diff --git a/script/trees b/script/trees
index 3b126e56..5be43dcc 100755
--- a/script/trees
+++ b/script/trees
@@ -1,24 +1,27 @@
#!/usr/bin/env sh
# SPDX-License-Identifier: GPL-3.0-or-later
-# SPDX-FileCopyrightText: 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
-# SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
-# SPDX-FileCopyrightText: 2023-2024 Leah Rowe <leah@libreboot.org>
+# Copyright (c) 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com>
+# Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
+# Copyright (c) 2023-2024 Leah Rowe <leah@libreboot.org>
set -u -e
-. "include/option.sh"
+. "include/lib.sh"
. "include/git.sh"
-eval "$(setvars "" xarch cfgsdir codedir config config_name xlang mode \
- elfdir listfile project target target_dir targets tree _f target1 \
- bootstrapargs autoconfargs cmakedir makeargs autogenargs xtree)"
+eval `setvars "" xarch srcdir premake cmakedir xlang mode makeargs elfdir cmd \
+ project target target_dir targets xtree _f release bootstrapargs mkhelper \
+ autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \
+ defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs`; badhash="n"
main()
{
- while getopts f:b:m:u:c:x:s:l:n: option; do
- _f="${1}"
- case "${1}" in
- -b) : ;;
+ while getopts f:b:m:u:c:x:s:l:n:d: option; do
+ [ -n "$_f" ] && $err "only one flag is permitted"
+ _f="$1" && [ "$_f" = "-d" ] && dry=":"
+ case "$1" in
+ -d) mode="" ;;
+ -b) mode="" ;;
-u) mode="oldconfig" ;;
-m) mode="menuconfig" ;;
-c) mode="distclean" ;;
@@ -27,237 +30,261 @@ main()
-s) mode="savedefconfig" ;;
-l) mode="olddefconfig" ;;
-n) mode="nconfig" ;;
- *) $err "Invalid option" ;;
+ *) $err "invalid option '-$option'" ;;
esac
- shift; project="${OPTARG#src/}"; shift
+ [ -z "${OPTARG+x}" ] && shift 1 && break
+ project="${OPTARG#src/}"; shift 2
done
[ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)"
- [ -z "$project" ] && $err "project name not specified"
- elfdir="elf/${project}"
- cfgsdir="config/${project}"
+ [ -z "$project" ] && mk $_f $(ls -1 config/git) && return 1
- remkdir "${tmpgit%/*}"
+ [ -f "config/git/$project/pkg.cfg" ] || $err "'$project' not defined"
- _cmd="build_projects"
- [ -f "config/${project}/build.list" ] && _cmd="build_targets"
- $_cmd $@
-}
+ for d in "elf" "config/data" "config" "src"; do
+ eval "${d#*/}dir=\"$d/$project\""
+ done; dest_dir="$elfdir"
+ listfile="$datadir/build.list"
+ [ -f "$listfile" ] || listfile="" # optional on all projects
-build_projects()
-{
- [ $# -gt 0 ] && x_ ./update trees $_f $@
+ mkhelpercfg="$datadir/mkhelper.cfg"
+ e "$mkhelpercfg" f missing && mkhelpercfg="$TMPDIR/mkhelper.cfg" && \
+ x_ touch "$mkhelpercfg"
- [ "$mode" = "fetch" ] && [ ! -f "CHANGELOG" ] && \
- eval "fetch_project_repo; return 0;"
+ targets="$@"; cmd="build_targets $targets"
+ singletree "$project" && cmd="build_project"
- load_project_config "$cfgsdir"
+ remkdir "${tmpgit%/*}"
+}
- codedir="src/${project}"
- [ -d "$codedir" ] || x_ ./update trees -f "$project"
+build_project()
+{
+ configure_project "$configdir" || return 0
+ [ ! -f "$listfile" ] || $dry elfcheck || return 0
[ "$mode" = "distclean" ] && mode="clean"
run_make_command || return 0
+
+ [ -n "$mode" ] || $dry copy_elf; return 0
}
build_targets()
{
- [ "$elfdir" = "elf/coreboot" ] && \
- elfdir="elf/coreboot_nopayload_DO_NOT_FLASH"
-
- [ -d "$cfgsdir" ] || $err "directory, $cfgsdir, does not exist"
+ [ -d "$configdir" ] || $err "directory, $configdir, does not exist"
+ [ $# -gt 0 ] || targets="$(ls -1 "$configdir")" || $err "!o $configdir"
- listfile="${cfgsdir}/build.list"
- [ -f "$listfile" ] || $err "list file, $listfile, does not exist"
-
- # Build for all targets if no argument is given
- [ $# -gt 0 ] && target1="$1"
- [ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && \
- shift 1
- targets=$(items "$cfgsdir") || \
- $err "Cannot get options for $cfgsdir"
- [ $# -gt 0 ] && targets=$@
-
- [ -z "$mode" ] && x_ mkdir -p "$elfdir"
- handle_targets
-}
-
-handle_targets()
-{
for x in $targets; do
- target="${x}"
- printf "Running 'make %s' for project '%s, target '%s''\n" \
- "$mode" "$project" "$target"
- [ "$project" != "coreboot" ] || [ -n "$mode" ] || \
- [ "$target1" = "utils" ] || \
- x_ ./vendor download $target
+ [ "$x" = "list" ] && x_ ls -1 "config/$project" && \
+ listfile="" && break
+ target="$x"
+ printf "'make %s', '%s', '%s'\n" "$mode" "$project" "$target"
x_ handle_defconfig
- done
-
- [ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
- [ -z "${mode}" ] && printf "Done! Check %s/\n\n" "$elfdir"; return 0
+ [ -n "$mode" ] || [ -z "$postmake" ] || $postmake || \
+ $err "$project/$target: !postmake: $postmake"; continue
+ done; return 0
}
handle_defconfig()
{
- handle_src_tree "$target" || return 0
+ target_dir="$configdir/$target"
+
+ [ -f "CHANGELOG" ] || fetch_project "$project"
+ configure_project "$target_dir" || return 0
+ x_ mkdir -p "$elfdir/$target"
- [ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && \
- eval "handle_coreboot_utils \"$tree\"; return 0"
+ chkvars tree; srcdir="src/$project/$tree"
- for y in "${target_dir}/config"/*; do
- [ -f "$y" ] || continue
- config="$y"
- config_name="${config#"${target_dir}/config/"}"
+ if [ "$mode" = "distclean" ] || [ "$mode" = "crossgcc-clean" ]; then
+ [ -d "$srcdir" ] || return 0
+ fi
+ [ -z "$mode" ] && $dry check_cross_compiler
- printf "handle/make/config %s %s: handling config %s\n" \
- "$project" "$target" "$config_name"
+ for y in "$target_dir/config"/*; do
+ [ "$_f" = "-d" ] || [ -f "$y" ] || continue
+ [ "$_f" = "-d" ] || defconfig="$y"
- [ -n "$mode" ] || check_config || continue
+ [ -n "$mode" ] || check_defconfig || continue
handle_makefile
- [ -n "$mode" ] || copy_elf
- done
+ [ -n "$mode" ] || $dry copy_elf
+ done; return 0
}
-handle_src_tree()
+configure_project()
{
- target_dir="${cfgsdir}/${target}"
- [ "$mode" = "fetch" ] && [ ! -f "CHANGELOG" ] && \
- eval "fetch_project_trees; return 1;"
-
- load_project_config "$target_dir"
-
- x_ mkdir -p "${elfdir}/${target}"
-
- [ -z "$tree" ] && $err "handle_src_tree $project/$tree: tree unset"
-
- codedir="src/${project}/${tree}"
+ eval `setvars "" xarch xlang build_depend autoconfargs xtree postmake \
+ tree_depend makeargs btype mkhelper bootstrapargs premake release \
+ cleanargs`
+ _tcfg="$1/target.cfg"; badhash="n"; [ -f "$_tcfg" ] || btype="auto"
+ [ -f "$datadir/mkhelper.cfg" ] && eval `setcfg "$datadir/mkhelper.cfg"`
+
+ while [ -f "$_tcfg" ] || [ "$cmd" != "build_project" ]; do
+ eval `setvars "" rev tree`; eval `setcfg "$_tcfg"`
+ printf "Loading %s config: %s\n" "$project" "$_tcfg"
+
+ [ "$_f" = "-d" ] && build_depend="" # dry run
+ [ "$cmd" = "build_project" ] && break
+ [ "$mode" = "fetch" ] || break
+
+ [ "${_tcfg%/*/target.cfg}" = "${_tcfg%"/$tree/target.cfg"}" ] \
+ && break; _tcfg="${_tcfg%/*/target.cfg}/$tree/target.cfg"
+ done
+ [ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ] && return 1
+ [ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1
+ [ -z "$mode" ] && build_dependencies
- if [ ! -d "$codedir" ]; then
- if [ "$mode" = "distclean" ] || \
- [ "$mode" = "crossgcc-clean" ]; then
- printf "Directory %s missing; skipping clean\n" \
- "$codedir" 1>&2
- return 1
- fi
- x_ ./update trees -f "$project" "$target"
- fi
+ mdir="$PWD/config/submodule/$project"
+ [ -n "$tree" ] && mdir="$mdir/$tree"
+ [ -f "CHANGELOG" ] || check_project_hashes
- [ "$target1" = "utils" ] && [ "$project" = "coreboot" ] && return 0
- [ -z "$mode" ] && check_cross_compiler; return 0
+ [ "$mode" = "fetch" ] || x_ ./mk -f "$project" $target
+ [ "$mode" = "fetch" ] || return 0
+ [ -f "CHANGELOG" ] && return 1; fetch_${cmd#build_}; return 1
}
-load_project_config()
+build_dependencies()
{
- eval "$(setvars "" xarch xlang tree bootstrapargs autoconfargs \
- xtree tree_depend)"
+ for bd in $build_depend; do
+ bd_p="${bd%%/*}"; bd_t="${bd##*/}"
+ [ -z "$bd_p" ] && $dry $err "$project/$tree: !bd '$bd'"
+ [ "${bd##*/}" = "$bd" ] && bd_t=""
+ [ -z "$bd_p" ] || $dry ./mk -b $bd_p $bd_t \
+ || $err "!mk $project/$tree $bd_p/$bd_t"; continue
+ done; return 0
+}
- [ -f "${1}/target.cfg" ] || return 0
- . "${1}/target.cfg" || \
- $err "load_project_config ${1}: cannot load target.cfg"; return 0
+check_project_hashes()
+{
+ mkdir -p "$XBMK_CACHE/hash" || $err "!mkdir '$XBMK_CACHE/hash'"
+ old_pjhash=""; [ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \
+ read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree"
+
+ x_ rm -f "$TMPDIR/project.list" "$TMPDIR/project.hash" \
+ "$TMPDIR/project.tmp"; x_ touch "$TMPDIR/project.tmp"
+ x_ touch "$TMPDIR/project.hash"
+
+ for rmchk in "$datadir" "$configdir/$tree" "$mdir"; do
+ [ -d "$rmchk" ] || continue
+ find "$rmchk" -type f -not -path "*/.git*/*" >> \
+ "$TMPDIR/project.tmp" || $err "!find $rmchk > project.tmp"
+ done; sort "$TMPDIR/project.tmp" > "$TMPDIR/project.list" || \
+ $err "!sort project tmp/list"
+
+ while read -r rmchk; do
+ [ ! -f "$rmchk" ] || sha512sum "$rmchk" | awk \
+ '{print $1}' >> "$TMPDIR/project.hash" || $err "!h $rmchk"
+ done < "$TMPDIR/project.list"
+
+ pjhash="$(sha512sum "$TMPDIR/project.hash" | awk '{print $1}')" || :
+ badhash="y" && [ "$pjhash" = "$old_pjhash" ] && badhash="n"
+ [ -f "$XBMK_CACHE/hash/$project$tree" ] || badhash="y"
+
+ printf "%s\n" "$pjhash" > "$XBMK_CACHE/hash/$project$tree" || \
+ $err "!mk $XBMK_CACHE/hash/$project$tree"
+
+ [ "$badhash" = "n" ] || rm -Rf "src/$project/$tree" \
+ "elf/$project/$tree" "elf/$project/$target" || \
+ $err "!rm $project $tree"; :
}
check_cross_compiler()
{
+ xgccargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS"
for _xarch in $xarch; do
- cbdir="src/coreboot/${tree}"
+ cbdir="src/coreboot/$tree"
[ "$project" != "coreboot" ] && cbdir="src/coreboot/default"
[ -n "$xtree" ] && cbdir="src/coreboot/$xtree"
- x_ ./update trees -f coreboot ${cbdir#src/coreboot/}
+ x_ ./mk -f coreboot ${cbdir#src/coreboot/}
- export PATH="${PWD}/${cbdir}/util/crossgcc/xgcc/bin:$PATH"
+ export PATH="$PWD/$cbdir/util/crossgcc/xgcc/bin:$PATH"
export CROSS_COMPILE="${xarch% *}-"
- [ -n "${xlang}" ] && export BUILD_LANGUAGES="$xlang"
+ [ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang"
- [ -d "${cbdir}/util/crossgcc/xgcc/${_xarch}/" ] && continue
- x_ make -C "$cbdir" crossgcc-${_xarch%-*} CPUS=$threads
- done
+ # sometimes buildgcc fails for like no reason. try twice.
+ make -C "$cbdir" crossgcc-${_xarch%-*} $xgccargs || \
+ make -C "$cbdir" crossgcc-${_xarch%-*} $xgccargs || \
+ $err "!mkxgcc $project/$xtree '${_xarch%-*}' '$xgccargs'"
+ done; return 0
}
-check_config()
+check_defconfig()
{
- [ -f "$config" ] || $err "check_config: ${project}/${target}: no config"
+ [ -f "$defconfig" ] || $dry $err "$project/$target: missing defconfig"
+ dest_dir="$elfdir/$target/${defconfig#"$target_dir/config/"}"
+
+ $dry elfcheck || return 1 # skip build if a previous one exists
+ $dry x_ mkdir -p "$dest_dir"
+}
- dest_dir="${elfdir}/${target}/${config_name}"
+elfcheck()
+{
# TODO: very hacky check. do it properly (based on build.list)
- for elftest in "${dest_dir}"/*; do
- [ -f "$elftest" ] || continue
- printf "Build already exists, so skipping build\n" 1>&2
- return 1
- done
- x_ mkdir -p "$dest_dir"
+ for elftest in "$dest_dir"/*; do
+ [ -e "$elftest" ] && e "$elftest" f && return 1
+ done; return 0
}
handle_makefile()
{
- x_ make clean -C "$codedir"
- x_ cp "$config" "${codedir}/.config"
- [ -n "$mode" ] || make -C "$codedir" silentoldconfig || \
- make -C "$codedir" oldconfig || :
+ $dry check_makefile "$srcdir" && x_ make -C "$srcdir" $cleanargs clean
+ [ -f "$defconfig" ] && x_ cp "$defconfig" "$srcdir/.config"
+ [ -n "$mode" ] || [ -n "$btype" ] || $dry make -C \
+ "$srcdir" silentoldconfig || make -C "$srcdir" oldconfig || :
- run_make_command || $err "handle_makefile $codedir: no makefile!"
+ run_make_command || $err "handle_makefile $srcdir: no makefile!"
- _copy=".config"
- [ "$mode" = "savedefconfig" ] && _copy="defconfig"
- [ "${mode%config}" = "$mode" ] || x_ cp "$codedir/$_copy" "$config"
+ _copy=".config" && [ "$mode" = "savedefconfig" ] && _copy="defconfig"
+ [ "${mode%config}" = "$mode" ] || \
+ $dry x_ cp "$srcdir/$_copy" "$defconfig"
- [ -e "${codedir}/.git" ] && [ "$project" = "u-boot" ] && \
- [ "$mode" = "distclean" ] && \
- x_ git -C "$codedir" clean -fdx; return 0
+ [ -e "$srcdir/.git" ] && [ "$project" = "u-boot" ] && \
+ [ "$mode" = "distclean" ] && $dry x_ git -C "$srcdir" $cleanargs clean -fdx; :
}
run_make_command()
{
- check_cmake "$codedir"
- [ -z "$mode" ] && check_autoconf "$codedir"
- check_makefile "$codedir" || return 1
-
- [ "$project" = "coreboot" ] && [ -z "$mode" ] && x_ \
- printf "%s\n" "${version%%-*}" > "$codedir/.coreboot-version"
+ [ -z "$premake" ] || [ -n "$mode" ] || $premake || $err "!$premake"
+ $dry check_cmake "$srcdir" && [ -z "$mode" ] && $dry check_autoconf \
+ "$srcdir"; $dry check_makefile "$srcdir" || return 1
- make $mode -j$threads $makeargs -C "$codedir" || \
- $err "run_make $codedir: !make $mode"
+ $dry make -C "$srcdir" $mode -j$XBMK_THREADS $makeargs || $err "!$mode"
+ [ -z "$mkhelper" ] || [ -n "$mode" ] || $mkhelper || $err "!$mkhelper"
- [ "$mode" != "clean" ] && return 0
- make -C "$codedir" distclean 2>/dev/null || :
+ [ "$mode" = "clean" ] && \
+ $dry make -C "$srcdir" $cleanargs distclean || :; :
}
check_cmake()
{
- [ -z "${cmakedir}" ] || \
- check_makefile "${1}" || \
- cmake -B "${1}" "${1}/${cmakedir}" || \
- check_makefile "${1}" || \
- $err "check_cmake ${1}: can't cmake ${cmakedir}"
- [ -z "${cmakedir}" ] || check_makefile "${1}" || \
- $err "check_cmake ${1}: could not generate Makefile"
- return 0
+ [ -z "$cmakedir" ] || $dry check_makefile "$1" || cmake -B "$1" \
+ "$1/$cmakedir" || $dry check_makefile "$1" || $err \
+ "$1: !cmk $cmakedir"
+ [ -z "$cmakedir" ] || $dry check_makefile "$1" || \
+ $err "check_cmake $1: can't generate Makefile"; return 0
}
check_autoconf()
{
(
- _cfgopt=""
- cd "${1}" || $err "!cd $1"
+ cd "$1" || $err "!cd $1"
[ -f "bootstrap" ] && x_ ./bootstrap $bootstrapargs
- [ -f "autogen.sh" ] && x_ ./autogen.sh ${autogenargs}
+ [ -f "autogen.sh" ] && x_ ./autogen.sh $autogenargs
[ -f "configure" ] && x_ ./configure $autoconfargs; return 0
) || $err "can't bootstrap project: $1"
}
check_makefile()
{
- [ -f "${1}/Makefile" ] || [ -f "${1}/makefile" ] || \
- [ -f "${1}/GNUmakefile" ] || return 1; return 0
+ [ -f "$1/Makefile" ] || [ -f "$1/makefile" ] || \
+ [ -f "$1/GNUmakefile" ] || return 1; return 0
}
copy_elf()
{
- while read -r f; do
- [ ! -f "${codedir}/$f" ] || \
- x_ cp "${codedir}/${f}" "$dest_dir"
- done < "$listfile"
- x_ make clean -C "$codedir"
+ [ -f "$listfile" ] && x_ mkdir -p "$dest_dir" && while read -r f; do
+ [ -f "$srcdir/$f" ] && x_ cp "$srcdir/$f" "$dest_dir"
+ done < "$listfile"; x_ make clean -C "$srcdir" $cleanargs
}
-main $@
+main $@ || exit 0
+. "$mkhelpercfg"
+$cmd
diff --git a/util/autoport/azalia.go b/util/autoport/azalia.go
deleted file mode 100644
index 6dd78b1e..00000000
--- a/util/autoport/azalia.go
+++ /dev/null
@@ -1,67 +0,0 @@
-package main
-
-import (
- "fmt"
- "sort"
-)
-
-type azalia struct {
-}
-
-func (i azalia) Scan(ctx Context, addr PCIDevData) {
- az := Create(ctx, "hda_verb.c")
- defer az.Close()
-
- Add_gpl(az)
- az.WriteString(
- `#include <device/azalia_device.h>
-
-const u32 cim_verb_data[] = {
-`)
-
- for _, codec := range ctx.InfoSource.GetAzaliaCodecs() {
- fmt.Fprintf(az, "\t0x%08x,\t/* Codec Vendor / Device ID: %s */\n",
- codec.VendorID, codec.Name)
- fmt.Fprintf(az, "\t0x%08x,\t/* Subsystem ID */\n",
- codec.SubsystemID)
- fmt.Fprintf(az, "\t%d,\t\t/* Number of 4 dword sets */\n",
- len(codec.PinConfig)+1)
- fmt.Fprintf(az, "\tAZALIA_SUBVENDOR(%d, 0x%08x),\n",
- codec.CodecNo, codec.SubsystemID)
-
- keys := []int{}
- for nid, _ := range codec.PinConfig {
- keys = append(keys, nid)
- }
-
- sort.Ints(keys)
-
- for _, nid := range keys {
- fmt.Fprintf(az, "\tAZALIA_PIN_CFG(%d, 0x%02x, 0x%08x),\n",
- codec.CodecNo, nid, codec.PinConfig[nid])
- }
- az.WriteString("\n");
- }
-
- az.WriteString(
- `};
-
-const u32 pc_beep_verbs[0] = {};
-
-AZALIA_ARRAY_SIZES;
-`)
-
- PutPCIDev(addr, "")
-}
-
-func init() {
- /* I82801GX/I945 */
- RegisterPCI(0x8086, 0x27d8, azalia{})
- /* BD82X6X/sandybridge */
- RegisterPCI(0x8086, 0x1c20, azalia{})
- /* C216/ivybridge */
- RegisterPCI(0x8086, 0x1e20, azalia{})
- /* Lynx Point */
- RegisterPCI(0x8086, 0x8c20, azalia{})
- RegisterPCI(0x8086, 0x9c20, azalia{})
-}
diff --git a/util/autoport/bd82x6x.go b/util/autoport/bd82x6x.go
deleted file mode 100644
index 8c418e30..00000000
--- a/util/autoport/bd82x6x.go
+++ /dev/null
@@ -1,337 +0,0 @@
-package main
-
-import "fmt"
-
-type bd82x6x struct {
- variant string
- node *DevTreeNode
-}
-
-func IsPCIeHotplug(ctx Context, port int) bool {
- portDev, ok := PCIMap[PCIAddr{Bus: 0, Dev: 0x1c, Func: port}]
- if !ok {
- return false
- }
- return (portDev.ConfigDump[0xdb] & (1 << 6)) != 0
-}
-
-func ich9GetFlashSize(ctx Context) {
- inteltool := ctx.InfoSource.GetInteltool()
- switch (inteltool.RCBA[0x3410] >> 10) & 3 {
- /* SPI. All boards I've seen with sandy/ivy use SPI. */
- case 3:
- ROMProtocol = "SPI"
- highflkb := uint32(0)
- for reg := uint16(0); reg < 5; reg++ {
- fl := (inteltool.RCBA[0x3854+4*reg] >> 16) & 0x1fff
- flkb := (fl + 1) << 2
- if flkb > highflkb {
- highflkb = flkb
- }
- }
- ROMSizeKB = int(highflkb)
- /* Shared with ME. Flashrom is unable to handle it. */
- FlashROMSupport = "n"
- }
-}
-
-func (b bd82x6x) GetGPIOHeader() string {
- return "southbridge/intel/bd82x6x/pch.h"
-}
-
-func (b bd82x6x) EnableGPE(in int) {
- b.node.Registers[fmt.Sprintf("gpi%d_routing", in)] = "2"
-}
-
-func (b bd82x6x) EncodeGPE(in int) int {
- return in + 0x10
-}
-
-func (b bd82x6x) DecodeGPE(in int) int {
- return in - 0x10
-}
-
-func (b bd82x6x) NeedRouteGPIOManually() {
- b.node.Comment += ", FIXME: set gpiX_routing for EC support"
-}
-
-func (b bd82x6x) Scan(ctx Context, addr PCIDevData) {
-
- SouthBridge = &b
-
- inteltool := ctx.InfoSource.GetInteltool()
- GPIO(ctx, inteltool)
-
- KconfigBool["SOUTHBRIDGE_INTEL_"+b.variant] = true
- KconfigBool["SERIRQ_CONTINUOUS_MODE"] = true
- KconfigInt["USBDEBUG_HCD_INDEX"] = 2
- KconfigComment["USBDEBUG_HCD_INDEX"] = "FIXME: check this"
- dmi := ctx.InfoSource.GetDMI()
- if dmi.Vendor == "LENOVO" {
- KconfigInt["DRAM_RESET_GATE_GPIO"] = 10
- } else {
- KconfigInt["DRAM_RESET_GATE_GPIO"] = 60
- }
- KconfigComment["DRAM_RESET_GATE_GPIO"] = "FIXME: check this"
-
- ich9GetFlashSize(ctx)
-
- DSDTDefines = append(DSDTDefines,
- DSDTDefine{
- Key: "BRIGHTNESS_UP",
- Value: "\\_SB.PCI0.GFX0.INCB",
- },
- DSDTDefine{
- Key: "BRIGHTNESS_DOWN",
- Value: "\\_SB.PCI0.GFX0.DECB",
- })
-
- /* SPI init */
- MainboardIncludes = append(MainboardIncludes, "southbridge/intel/bd82x6x/pch.h")
-
- FADT := ctx.InfoSource.GetACPI()["FACP"]
-
- pcieHotplugMap := "{ "
-
- for port := 0; port < 7; port++ {
- if IsPCIeHotplug(ctx, port) {
- pcieHotplugMap += "1, "
- } else {
- pcieHotplugMap += "0, "
- }
- }
-
- if IsPCIeHotplug(ctx, 7) {
- pcieHotplugMap += "1 }"
- } else {
- pcieHotplugMap += "0 }"
- }
-
- cur := DevTreeNode{
- Chip: "southbridge/intel/bd82x6x",
- Comment: "Intel Series 6 Cougar Point PCH",
-
- Registers: map[string]string{
- "sata_interface_speed_support": "0x3",
- "gen1_dec": FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x84:0x88]),
- "gen2_dec": FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x88:0x8c]),
- "gen3_dec": FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x8c:0x90]),
- "gen4_dec": FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x90:0x94]),
- "pcie_port_coalesce": "1",
- "pcie_hotplug_map": pcieHotplugMap,
-
- "sata_port_map": fmt.Sprintf("0x%x", PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 2}].ConfigDump[0x92]&0x3f),
-
- "docking_supported": (FormatBool((FADT[113] & (1 << 1)) != 0)),
- "spi_uvscc": fmt.Sprintf("0x%x", inteltool.RCBA[0x38c8]),
- "spi_lvscc": fmt.Sprintf("0x%x", inteltool.RCBA[0x38c4]&^(1<<23)),
- },
- PCISlots: []PCISlot{
- PCISlot{PCIAddr: PCIAddr{Dev: 0x14, Func: 0}, writeEmpty: false, alias: "xhci", additionalComment: "USB 3.0 Controller"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 0}, writeEmpty: true, alias: "mei1", additionalComment: "Management Engine Interface 1"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 1}, writeEmpty: true, alias: "mei2", additionalComment: "Management Engine Interface 2"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 2}, writeEmpty: true, alias: "me_ide_r", additionalComment: "Management Engine IDE-R"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 3}, writeEmpty: true, alias: "me_kt", additionalComment: "Management Engine KT"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x19, Func: 0}, writeEmpty: true, alias: "gbe", additionalComment: "Intel Gigabit Ethernet"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1a, Func: 0}, writeEmpty: true, alias: "ehci2", additionalComment: "USB2 EHCI #2"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1b, Func: 0}, writeEmpty: true, alias: "hda", additionalComment: "High Definition Audio"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 0}, writeEmpty: true, alias: "pcie_rp1", additionalComment: "PCIe Port #1"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 1}, writeEmpty: true, alias: "pcie_rp2", additionalComment: "PCIe Port #2"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 2}, writeEmpty: true, alias: "pcie_rp3", additionalComment: "PCIe Port #3"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 3}, writeEmpty: true, alias: "pcie_rp4", additionalComment: "PCIe Port #4"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 4}, writeEmpty: true, alias: "pcie_rp5", additionalComment: "PCIe Port #5"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 5}, writeEmpty: true, alias: "pcie_rp6", additionalComment: "PCIe Port #6"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 6}, writeEmpty: true, alias: "pcie_rp7", additionalComment: "PCIe Port #7"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 7}, writeEmpty: true, alias: "pcie_rp8", additionalComment: "PCIe Port #8"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1d, Func: 0}, writeEmpty: true, alias: "ehci1", additionalComment: "USB2 EHCI #1"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1e, Func: 0}, writeEmpty: true, alias: "pci_bridge", additionalComment: "PCI bridge"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 0}, writeEmpty: true, alias: "lpc", additionalComment: "LPC bridge"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 2}, writeEmpty: true, alias: "sata1", additionalComment: "SATA Controller 1"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 3}, writeEmpty: true, alias: "smbus", additionalComment: "SMBus"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 5}, writeEmpty: true, alias: "sata2", additionalComment: "SATA Controller 2"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 6}, writeEmpty: true, alias: "thermal", additionalComment: "Thermal"},
- },
- }
-
- b.node = &cur
-
- xhciDev, ok := PCIMap[PCIAddr{Bus: 0, Dev: 0x14, Func: 0}]
-
- if ok {
- cur.Registers["xhci_switchable_ports"] = FormatHexLE32(xhciDev.ConfigDump[0xd4:0xd8])
- cur.Registers["superspeed_capable_ports"] = FormatHexLE32(xhciDev.ConfigDump[0xdc:0xe0])
- cur.Registers["xhci_overcurrent_mapping"] = FormatHexLE32(xhciDev.ConfigDump[0xc0:0xc4])
- }
-
- PutPCIChip(addr, cur)
- PutPCIDevParent(addr, "", "lpc")
-
- DSDTIncludes = append(DSDTIncludes, DSDTInclude{
- File: "southbridge/intel/common/acpi/platform.asl",
- })
- DSDTIncludes = append(DSDTIncludes, DSDTInclude{
- File: "southbridge/intel/bd82x6x/acpi/globalnvs.asl",
- })
- DSDTIncludes = append(DSDTIncludes, DSDTInclude{
- File: "southbridge/intel/common/acpi/sleepstates.asl",
- })
- DSDTPCI0Includes = append(DSDTPCI0Includes, DSDTInclude{
- File: "southbridge/intel/bd82x6x/acpi/pch.asl",
- })
-
- AddBootBlockFile("early_init.c", "")
- AddROMStageFile("early_init.c", "")
-
- sb := Create(ctx, "early_init.c")
- defer sb.Close()
- Add_gpl(sb)
-
- sb.WriteString(`
-#include <bootblock_common.h>
-#include <device/pci_ops.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
-#include <southbridge/intel/bd82x6x/pch.h>
-
-`)
- sb.WriteString("const struct southbridge_usb_port mainboard_usb_ports[] = {\n")
-
- currentMap := map[uint32]int{
- 0x20000153: 0,
- 0x20000f57: 1,
- 0x2000055b: 2,
- 0x20000f51: 3,
- 0x2000094a: 4,
- 0x2000035f: 5,
- 0x20000f53: 6,
- 0x20000357: 7,
- 0x20000353: 8,
- }
-
- for port := uint(0); port < 14; port++ {
- var pinmask uint32
- OCPin := -1
- if port < 8 {
- pinmask = inteltool.RCBA[0x35a0]
- } else {
- pinmask = inteltool.RCBA[0x35a4]
- }
- for pin := uint(0); pin < 4; pin++ {
- if ((pinmask >> ((port % 8) + 8*pin)) & 1) != 0 {
- OCPin = int(pin)
- if port >= 8 {
- OCPin += 4
- }
- }
- }
- current, ok := currentMap[inteltool.RCBA[uint16(0x3500+4*port)]]
- comment := ""
- if !ok {
- comment = fmt.Sprintf("// FIXME: Unknown current: RCBA(0x%x)=0x%x", 0x3500+4*port, uint16(0x3500+4*port))
- }
- fmt.Fprintf(sb, "\t{ %d, %d, %d }, %s\n",
- ((inteltool.RCBA[0x359c]>>port)&1)^1,
- current,
- OCPin,
- comment)
- }
- sb.WriteString("};\n")
-
- guessedMap := GuessSPDMap(ctx)
-
- sb.WriteString(`
-void bootblock_mainboard_early_init(void)
-{
-`)
- RestorePCI16Simple(sb, addr, 0x82)
-
- RestorePCI16Simple(sb, addr, 0x80)
-
- sb.WriteString(`}
-
-/* FIXME: Put proper SPD map here. */
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
-`)
- for i, spd := range guessedMap {
- fmt.Fprintf(sb, "\tread_spd(&spd[%d], 0x%02x, id_only);\n", i, spd)
- }
- sb.WriteString("}\n")
-
- gnvs := Create(ctx, "acpi_tables.c")
- defer gnvs.Close()
-
- Add_gpl(gnvs)
- gnvs.WriteString(`#include <acpi/acpi_gnvs.h>
-#include <soc/nvs.h>
-
-/* FIXME: check this function. */
-void mainboard_fill_gnvs(struct global_nvs *gnvs)
-{
- /* The lid is open by default. */
- gnvs->lids = 1;
-
- /* Temperature at which OS will shutdown */
- gnvs->tcrt = 100;
- /* Temperature at which OS will throttle CPU */
- gnvs->tpsv = 90;
-}
-`)
-}
-
-func init() {
- /* BD82X6X LPC */
- for id := 0x1c40; id <= 0x1c5f; id++ {
- RegisterPCI(0x8086, uint16(id), bd82x6x{variant: "BD82X6X"})
- }
-
- /* C216 LPC */
- for id := 0x1e41; id <= 0x1e5f; id++ {
- RegisterPCI(0x8086, uint16(id), bd82x6x{variant: "C216"})
- }
-
- /* PCIe bridge */
- for _, id := range []uint16{
- 0x1c10, 0x1c12, 0x1c14, 0x1c16,
- 0x1c18, 0x1c1a, 0x1c1c, 0x1c1e,
- 0x1e10, 0x1e12, 0x1e14, 0x1e16,
- 0x1e18, 0x1e1a, 0x1e1c, 0x1e1e,
- 0x1e25, 0x244e, 0x2448,
- } {
- RegisterPCI(0x8086, id, GenericPCI{})
- }
-
- /* SMBus controller */
- RegisterPCI(0x8086, 0x1c22, GenericPCI{MissingParent: "smbus"})
- RegisterPCI(0x8086, 0x1e22, GenericPCI{MissingParent: "smbus"})
-
- /* SATA */
- for _, id := range []uint16{
- 0x1c00, 0x1c01, 0x1c02, 0x1c03,
- 0x1e00, 0x1e01, 0x1e02, 0x1e03,
- } {
- RegisterPCI(0x8086, id, GenericPCI{})
- }
-
- /* EHCI */
- for _, id := range []uint16{
- 0x1c26, 0x1c2d, 0x1e26, 0x1e2d,
- } {
- RegisterPCI(0x8086, id, GenericPCI{})
- }
-
- /* XHCI */
- RegisterPCI(0x8086, 0x1e31, GenericPCI{})
-
- /* ME and children */
- for _, id := range []uint16{
- 0x1c3a, 0x1c3b, 0x1c3c, 0x1c3d,
- 0x1e3a, 0x1e3b, 0x1e3c, 0x1e3d,
- } {
- RegisterPCI(0x8086, id, GenericPCI{})
- }
-
- /* Ethernet */
- RegisterPCI(0x8086, 0x1502, GenericPCI{})
- RegisterPCI(0x8086, 0x1503, GenericPCI{})
-
-}
diff --git a/util/autoport/description.md b/util/autoport/description.md
deleted file mode 100644
index 9a0e8d43..00000000
--- a/util/autoport/description.md
+++ /dev/null
@@ -1 +0,0 @@
-Automated porting coreboot to Sandy Bridge/Ivy Bridge platforms `Go`
diff --git a/util/autoport/ec_fixme.go b/util/autoport/ec_fixme.go
deleted file mode 100644
index 54f78ab4..00000000
--- a/util/autoport/ec_fixme.go
+++ /dev/null
@@ -1,91 +0,0 @@
-package main
-
-import "fmt"
-
-func FIXMEEC(ctx Context) {
- ap := Create(ctx, "acpi/platform.asl")
- defer ap.Close()
-
- hasKeyboard := ctx.InfoSource.HasPS2()
-
- sbGPE := GuessECGPE(ctx)
- var GPEUnsure bool
- if sbGPE < 0 {
- sbGPE = SouthBridge.EncodeGPE(1)
- GPEUnsure = true
- SouthBridge.NeedRouteGPIOManually()
- } else {
- GPEUnsure = false
- SouthBridge.EnableGPE(SouthBridge.DecodeGPE(sbGPE))
- }
-
- Add_gpl(ap)
- ap.WriteString(
- `Method(_WAK, 1)
-{
- /* FIXME: EC support */
- Return(Package() {0, 0})
-}
-
-Method(_PTS,1)
-{
- /* FIXME: EC support */
-}
-`)
-
- ecs := ctx.InfoSource.GetEC()
- MainboardIncludes = append(MainboardIncludes, "ec/acpi/ec.h")
- MainboardIncludes = append(MainboardIncludes, "console/console.h")
-
- MainboardInit +=
- ` /* FIXME: trim this down or remove if necessary */
- {
- int i;
- const u8 dmp[256] = {`
- for i := 0; i < 0x100; i++ {
- if (i & 0xf) == 0 {
- MainboardInit += fmt.Sprintf("\n\t\t\t/* %02x */ ", i)
- }
- MainboardInit += fmt.Sprintf("0x%02x,", ecs[i])
- if (i & 0xf) != 0xf {
- MainboardInit += " "
- }
- }
- MainboardInit += "\n\t\t};\n"
- MainboardInit += `
- printk(BIOS_DEBUG, "Replaying EC dump ...");
- for (i = 0; i < 256; i++)
- ec_write (i, dmp[i]);
- printk(BIOS_DEBUG, "done\n");
- }
-`
-
- KconfigBool["EC_ACPI"] = true
- si := Create(ctx, "acpi/superio.asl")
- defer si.Close()
-
- if hasKeyboard {
- Add_gpl(si)
- si.WriteString("#include <drivers/pc80/pc/ps2_controller.asl>\n")
- MainboardInit += fmt.Sprintf("\tpc_keyboard_init(NO_AUX_DEVICE);\n")
- MainboardIncludes = append(MainboardIncludes, "pc80/keyboard.h")
- }
-
- ec := Create(ctx, "acpi/ec.asl")
- defer ec.Close()
-
- Add_gpl(ec)
- ec.WriteString(`Device(EC)
-{
- Name (_HID, EISAID("PNP0C09"))
- Name (_UID, 0)
-`)
- if GPEUnsure {
- ec.WriteString("\t/* FIXME: Set GPE */\n")
- ec.WriteString("\t/* Name (_GPE, ?) */\n")
- } else {
- fmt.Fprintf(ec, "\tName (_GPE, %d)\n", sbGPE)
- }
- ec.WriteString("/* FIXME: EC support */\n")
- ec.WriteString("}\n")
-}
diff --git a/util/autoport/ec_lenovo.go b/util/autoport/ec_lenovo.go
deleted file mode 100644
index a34960ff..00000000
--- a/util/autoport/ec_lenovo.go
+++ /dev/null
@@ -1,245 +0,0 @@
-package main
-
-import "fmt"
-
-func LenovoEC(ctx Context) {
- ap := Create(ctx, "acpi/platform.asl")
- defer ap.Close()
-
- wakeGPE := 13
-
- sbGPE := GuessECGPE(ctx)
- var GPE int
- var GPEUnsure bool
- if sbGPE < 0 {
- sbGPE = SouthBridge.EncodeGPE(1)
- GPE = 1
- GPEUnsure = true
- SouthBridge.NeedRouteGPIOManually()
- } else {
- GPE = SouthBridge.DecodeGPE(sbGPE)
- GPEUnsure = false
- }
-
- SouthBridge.EnableGPE(wakeGPE)
- SouthBridge.EnableGPE(GPE)
-
- GPEDefine := DSDTDefine{
- Key: "THINKPAD_EC_GPE",
- }
-
- GPEDefine.Value = fmt.Sprintf("%d", sbGPE)
- if GPEUnsure {
- GPEDefine.Comment = "FIXME: Check this"
- }
-
- DSDTDefines = append(DSDTDefines,
- DSDTDefine{
- Key: "EC_LENOVO_H8_ME_WORKAROUND",
- Value: "1",
- }, GPEDefine)
-
- Add_gpl(ap)
- ap.WriteString(
- `Method(_WAK, 1)
-{
- /* ME may not be up yet. */
- Store(0, \_TZ.MEB1)
- Store(0, \_TZ.MEB2)
- Return(Package() {0, 0})
-}
-
-Method(_PTS,1)
-{
- \_SB.PCI0.LPCB.EC.RADI(0)
-}
-`)
-
- si := Create(ctx, "acpi/superio.asl")
- defer si.Close()
-
- Add_gpl(si)
- si.WriteString("#include <drivers/pc80/pc/ps2_controller.asl>\n")
-
- /* FIXME:XX Move this to ec/lenovo. */
- smi := Create(ctx, "smihandler.c")
- defer smi.Close()
-
- AddSMMFile("smihandler.c", "")
-
- Add_gpl(smi)
- smi.WriteString(
- `#include <arch/io.h>
-#include <console/console.h>
-#include <cpu/x86/smm.h>
-#include <ec/acpi/ec.h>
-#include <ec/lenovo/h8/h8.h>
-#include <delay.h>
-#include <` + SouthBridge.GetGPIOHeader() + ">\n\n")
-
- if GPEUnsure {
- smi.WriteString("/* FIXME: check this */\n")
- }
- fmt.Fprintf(smi, "#define GPE_EC_SCI %d\n", GPE)
-
- smi.WriteString("/* FIXME: check this */\n")
- fmt.Fprintf(smi, "#define GPE_EC_WAKE %d\n", wakeGPE)
-
- smi.WriteString(`
-static void mainboard_smi_handle_ec_sci(void)
-{
- u8 status = inb(EC_SC);
- u8 event;
-
- if (!(status & EC_SCI_EVT))
- return;
-
- event = ec_query();
- printk(BIOS_DEBUG, "EC event %#02x\n", event);
-}
-
-void mainboard_smi_gpi(u32 gpi_sts)
-{
- if (gpi_sts & (1 << GPE_EC_SCI))
- mainboard_smi_handle_ec_sci();
-}
-
-int mainboard_smi_apmc(u8 data)
-{
- switch (data) {
- case APM_CNT_ACPI_ENABLE:
- /* use 0x1600/0x1604 to prevent races with userspace */
- ec_set_ports(0x1604, 0x1600);
- /* route EC_SCI to SCI */
- gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI);
- /* discard all events, and enable attention */
- ec_write(0x80, 0x01);
- break;
- case APM_CNT_ACPI_DISABLE:
- /* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
- provide a EC query function */
- ec_set_ports(0x66, 0x62);
- /* route EC_SCI to SMI */
- gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI);
- /* discard all events, and enable attention */
- ec_write(0x80, 0x01);
- break;
- default:
- break;
- }
- return 0;
-}
-
-void mainboard_smi_sleep(u8 slp_typ)
-{
- if (slp_typ == 3) {
- u8 ec_wake = ec_read(0x32);
- /* If EC wake events are enabled, enable wake on EC WAKE GPE. */
- if (ec_wake & 0x14) {
- /* Redirect EC WAKE GPE to SCI. */
- gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
- }
- }
-}
-`)
-
- ec := Create(ctx, "acpi/ec.asl")
- defer ec.Close()
-
- Add_gpl(ec)
- ec.WriteString("#include <ec/lenovo/h8/acpi/ec.asl>\n")
-
- KconfigBool["EC_LENOVO_PMH7"] = true
- KconfigBool["EC_LENOVO_H8"] = true
-
- pmh := DevTreeNode{
- Chip: "ec/lenovo/pmh7",
- Registers: map[string]string{
- "backlight_enable": "true",
- "dock_event_enable": "true",
- },
- Children: []DevTreeNode{
- DevTreeNode{
- Chip: "pnp",
- Comment: "dummy",
- Dev: 0xff,
- Func: 1,
- },
- },
- }
- PutChip("lpc", pmh)
-
- ecs := ctx.InfoSource.GetEC()
- h8 := DevTreeNode{
- Chip: "ec/lenovo/h8",
- Children: []DevTreeNode{
- DevTreeNode{
- Chip: "pnp",
- Comment: "dummy",
- Dev: 0xff,
- Func: 2,
- IOs: map[uint16]uint16{
- 0x60: 0x62,
- 0x62: 0x66,
- 0x64: 0x1600,
- 0x66: 0x1604,
- },
- },
- },
- Comment: "FIXME: has_keyboard_backlight, has_power_management_beeps, has_uwb",
- Registers: map[string]string{
- "config0": FormatHex8(ecs[0]),
- "config1": FormatHex8(ecs[1]),
- "config2": FormatHex8(ecs[2]),
- "config3": FormatHex8(ecs[3]),
- "beepmask0": FormatHex8(ecs[4]),
- "beepmask1": FormatHex8(ecs[5]),
- },
- }
- for i := 0; i < 0x10; i++ {
- if ecs[0x10+i] != 0 {
- h8.Registers[fmt.Sprintf("event%x_enable", i)] = FormatHex8(ecs[0x10+i])
- }
- }
- PutChip("lpc", h8)
-
- eeprom := DevTreeNode{
- Chip: "drivers/i2c/at24rf08c",
- Comment: "eeprom, 8 virtual devices, same chip",
- Children: []DevTreeNode{
- DevTreeNode{
- Chip: "i2c",
- Dev: 0x54,
- },
- DevTreeNode{
- Chip: "i2c",
- Dev: 0x55,
- },
- DevTreeNode{
- Chip: "i2c",
- Dev: 0x56,
- },
- DevTreeNode{
- Chip: "i2c",
- Dev: 0x57,
- },
- DevTreeNode{
- Chip: "i2c",
- Dev: 0x5c,
- },
- DevTreeNode{
- Chip: "i2c",
- Dev: 0x5d,
- },
- DevTreeNode{
- Chip: "i2c",
- Dev: 0x5e,
- },
- DevTreeNode{
- Chip: "i2c",
- Dev: 0x5f,
- },
- },
- }
- PutChip("smbus", eeprom)
-}
diff --git a/util/autoport/ec_none.go b/util/autoport/ec_none.go
deleted file mode 100644
index bcb61bf0..00000000
--- a/util/autoport/ec_none.go
+++ /dev/null
@@ -1,24 +0,0 @@
-package main
-
-func NoEC(ctx Context) {
- ap := Create(ctx, "acpi/platform.asl")
- defer ap.Close()
-
- Add_gpl(ap)
- ap.WriteString(
- `Method(_WAK, 1)
-{
- Return(Package() {0, 0})
-}
-
-Method(_PTS, 1)
-{
-}
-`)
-
- si := Create(ctx, "acpi/superio.asl")
- defer si.Close()
-
- ec := Create(ctx, "acpi/ec.asl")
- defer ec.Close()
-}
diff --git a/util/autoport/go.mod b/util/autoport/go.mod
deleted file mode 100644
index 55a89cc9..00000000
--- a/util/autoport/go.mod
+++ /dev/null
@@ -1 +0,0 @@
-module autoport
diff --git a/util/autoport/gpio_common.go b/util/autoport/gpio_common.go
deleted file mode 100644
index a869dce4..00000000
--- a/util/autoport/gpio_common.go
+++ /dev/null
@@ -1,113 +0,0 @@
-/* code to generate common GPIO code for Intel 6/7/8 Series Chipset */
-
-package main
-
-import (
- "fmt"
- "os"
-)
-
-func writeGPIOSet(ctx Context, sb *os.File,
- val uint32, set uint, partno int, constraint uint32) {
-
- max := uint(32)
- if set == 3 {
- max = 12
- }
-
- bits := [6][2]string{
- {"GPIO_MODE_NATIVE", "GPIO_MODE_GPIO"},
- {"GPIO_DIR_OUTPUT", "GPIO_DIR_INPUT"},
- {"GPIO_LEVEL_LOW", "GPIO_LEVEL_HIGH"},
- {"GPIO_RESET_PWROK", "GPIO_RESET_RSMRST"},
- {"GPIO_NO_INVERT", "GPIO_INVERT"},
- {"GPIO_NO_BLINK", "GPIO_BLINK"},
- }
-
- for i := uint(0); i < max; i++ {
- if (constraint>>i)&1 == 1 {
- fmt.Fprintf(sb, " .gpio%d = %s,\n",
- (set-1)*32+i,
- bits[partno][(val>>i)&1])
- }
- }
-}
-
-func GPIO(ctx Context, inteltool InteltoolData) {
- var constraint uint32
- gpio := Create(ctx, "gpio.c")
- defer gpio.Close()
-
- AddBootBlockFile("gpio.c", "")
- AddROMStageFile("gpio.c", "")
-
- Add_gpl(gpio)
- gpio.WriteString("#include <southbridge/intel/common/gpio.h>\n\n")
-
- addresses := [3][6]int{
- {0x00, 0x04, 0x0c, 0x60, 0x2c, 0x18},
- {0x30, 0x34, 0x38, 0x64, -1, -1},
- {0x40, 0x44, 0x48, 0x68, -1, -1},
- }
-
- for set := 1; set <= 3; set++ {
- for partno, part := range []string{"mode", "direction", "level", "reset", "invert", "blink"} {
- addr := addresses[set-1][partno]
- if addr < 0 {
- continue
- }
- fmt.Fprintf(gpio, "static const struct pch_gpio_set%d pch_gpio_set%d_%s = {\n",
- set, set, part)
-
- constraint = 0xffffffff
- switch part {
- case "direction":
- /* Ignored on native mode */
- constraint = inteltool.GPIO[uint16(addresses[set-1][0])]
- case "level":
- /* Level doesn't matter for input */
- constraint = inteltool.GPIO[uint16(addresses[set-1][0])]
- constraint &^= inteltool.GPIO[uint16(addresses[set-1][1])]
- case "reset":
- /* Only show reset */
- constraint = inteltool.GPIO[uint16(addresses[set-1][3])]
- case "invert":
- /* Only on input and only show inverted GPIO */
- constraint = inteltool.GPIO[uint16(addresses[set-1][0])]
- constraint &= inteltool.GPIO[uint16(addresses[set-1][1])]
- constraint &= inteltool.GPIO[uint16(addresses[set-1][4])]
- case "blink":
- /* Only on output and only show blinking GPIO */
- constraint = inteltool.GPIO[uint16(addresses[set-1][0])]
- constraint &^= inteltool.GPIO[uint16(addresses[set-1][1])]
- constraint &= inteltool.GPIO[uint16(addresses[set-1][5])]
- }
- writeGPIOSet(ctx, gpio, inteltool.GPIO[uint16(addr)], uint(set), partno, constraint)
- gpio.WriteString("};\n\n")
- }
- }
-
- gpio.WriteString(`const struct pch_gpio_map mainboard_gpio_map = {
- .set1 = {
- .mode = &pch_gpio_set1_mode,
- .direction = &pch_gpio_set1_direction,
- .level = &pch_gpio_set1_level,
- .blink = &pch_gpio_set1_blink,
- .invert = &pch_gpio_set1_invert,
- .reset = &pch_gpio_set1_reset,
- },
- .set2 = {
- .mode = &pch_gpio_set2_mode,
- .direction = &pch_gpio_set2_direction,
- .level = &pch_gpio_set2_level,
- .reset = &pch_gpio_set2_reset,
- },
- .set3 = {
- .mode = &pch_gpio_set3_mode,
- .direction = &pch_gpio_set3_direction,
- .level = &pch_gpio_set3_level,
- .reset = &pch_gpio_set3_reset,
- },
-};
-`)
-}
diff --git a/util/autoport/haswell.go b/util/autoport/haswell.go
deleted file mode 100644
index 645b197a..00000000
--- a/util/autoport/haswell.go
+++ /dev/null
@@ -1,139 +0,0 @@
-package main
-
-import "fmt"
-
-type haswellmc struct {
- variant string
-}
-
-func divceil(a uint32, b uint32) uint32 {
- return (a + b - 1) / b
-}
-
-func getPanelCfg(inteltool InteltoolData, isULT bool) string {
- var refclk uint32
- var pwm_hz uint32
-
- if isULT {
- refclk = 24000000
- } else {
- refclk = 135000000
- }
- if (inteltool.IGD[0xc8254] >> 16) != 0 {
- pwm_hz = refclk / 128 / (inteltool.IGD[0xc8254] >> 16)
- } else {
- pwm_hz = 0
- }
-
- gpu_panel_power_up_delay := (inteltool.IGD[0xc7208] >> 16) & 0x1fff
- gpu_panel_power_backlight_on_delay := inteltool.IGD[0xc7208] & 0x1fff
- gpu_panel_power_down_delay := (inteltool.IGD[0xc720c] >> 16) & 0x1fff
- gpu_panel_power_backlight_off_delay := inteltool.IGD[0xc720c] & 0x1fff
- gpu_panel_power_cycle_delay := inteltool.IGD[0xc7210] & 0x1f
-
- return fmt.Sprintf(`{
- .up_delay_ms = %3d,
- .down_delay_ms = %3d,
- .cycle_delay_ms = %3d,
- .backlight_on_delay_ms = %3d,
- .backlight_off_delay_ms = %3d,
- .backlight_pwm_hz = %3d,
- }`,
- divceil(gpu_panel_power_up_delay, 10),
- divceil(gpu_panel_power_down_delay, 10),
- (gpu_panel_power_cycle_delay-1)*100,
- divceil(gpu_panel_power_backlight_on_delay, 10),
- divceil(gpu_panel_power_backlight_off_delay, 10),
- pwm_hz)
-}
-
-func (i haswellmc) Scan(ctx Context, addr PCIDevData) {
- inteltool := ctx.InfoSource.GetInteltool()
-
- isULT := (i.variant == "ULT")
- DevTree = DevTreeNode{
- Chip: "northbridge/intel/haswell",
- MissingParent: "northbridge",
- Comment: "FIXME: check ec_present, usb_xhci_on_resume, gfx",
- Registers: map[string]string{
- "gpu_dp_b_hotplug": FormatInt32((inteltool.IGD[0xc4030] >> 2) & 7),
- "gpu_dp_c_hotplug": FormatInt32((inteltool.IGD[0xc4030] >> 10) & 7),
- "gpu_dp_d_hotplug": FormatInt32((inteltool.IGD[0xc4030] >> 18) & 7),
- "panel_cfg": getPanelCfg(inteltool, isULT),
- "gpu_ddi_e_connected": FormatBool(((inteltool.IGD[0x64000] >> 4) & 1) == 0),
- "ec_present": "false",
- "usb_xhci_on_resume": "false",
- /* FIXME:XX hardcoded. */
- "gfx": "GMA_STATIC_DISPLAYS(0)",
- },
- Children: []DevTreeNode{
- {
- Chip: "cpu/intel/haswell",
- Children: []DevTreeNode{
- {
- Chip: "cpu_cluster",
- Dev: 0,
- Ops: "haswell_cpu_bus_ops",
- },
- },
- },
-
- {
- Chip: "domain",
- Dev: 0,
- Ops: "haswell_pci_domain_ops",
- PCIController: true,
- ChildPCIBus: 0,
- PCISlots: []PCISlot{
- PCISlot{PCIAddr: PCIAddr{Dev: 0x0, Func: 0}, writeEmpty: true, additionalComment: i.variant},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1, Func: 0}, writeEmpty: !isULT, additionalComment: "PCIe Bridge for discrete graphics"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x2, Func: 0}, writeEmpty: true, additionalComment: "Internal graphics"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x3, Func: 0}, writeEmpty: true, additionalComment: "Mini-HD audio"},
- },
- },
- },
- }
-
- if isULT {
- DevTree.Registers["dq_pins_interleaved"] = FormatBool(((inteltool.MCHBAR[0x2008] >> 10) & 1) == 0)
- }
-
- PutPCIDev(addr, "Host bridge")
-
- KconfigBool["NORTHBRIDGE_INTEL_HASWELL"] = true
- KconfigBool["HAVE_ACPI_TABLES"] = true
- KconfigBool["HAVE_ACPI_RESUME"] = true
-
- DSDTIncludes = append(DSDTIncludes, DSDTInclude{
- File: "cpu/intel/common/acpi/cpu.asl",
- })
-
- DSDTPCI0Includes = append(DSDTPCI0Includes, DSDTInclude{
- File: "northbridge/intel/haswell/acpi/hostbridge.asl",
- }, DSDTInclude{
- File: "drivers/intel/gma/acpi/default_brightness_levels.asl",
- Comment: "FIXME: remove this if the board doesn't have backlight",
- })
-}
-
-func init() {
- RegisterPCI(0x8086, 0x0c00, haswellmc{variant: "Desktop"})
- RegisterPCI(0x8086, 0x0c04, haswellmc{variant: "Mobile"})
- RegisterPCI(0x8086, 0x0a04, haswellmc{variant: "ULT"})
- RegisterPCI(0x8086, 0x0c08, haswellmc{variant: "Server"})
- RegisterPCI(0x8086, 0x0d00, haswellmc{variant: "Crystal Well Desktop"})
- RegisterPCI(0x8086, 0x0d04, haswellmc{variant: "Crystal Well Mobile"})
- RegisterPCI(0x8086, 0x0d08, haswellmc{variant: "Crystal Well Server"})
- for _, id := range []uint16{
- 0x0402, 0x0412, 0x0422, /* Desktop */
- 0x0406, 0x0416, 0x0426, /* Mobile */
- 0x040a, 0x041a, 0x042a, /* Server */
- 0x0a06, 0x0a16, 0x0a26, /* ULT */
- 0x0d16, 0x0d22, 0x0d26, 0x0d36, /* Mobile 4+3, GT3e */
- } {
- RegisterPCI(0x8086, id, GenericVGA{GenericPCI{Comment: "VGA controller"}})
- }
- /* CPU HD Audio */
- RegisterPCI(0x8086, 0x0a0c, GenericPCI{})
- RegisterPCI(0x8086, 0x0c0c, GenericPCI{})
-}
diff --git a/util/autoport/log_maker.go b/util/autoport/log_maker.go
deleted file mode 100644
index 2a524d38..00000000
--- a/util/autoport/log_maker.go
+++ /dev/null
@@ -1,190 +0,0 @@
-package main
-
-import (
- "errors"
- "fmt"
- "io"
- "io/ioutil"
- "log"
- "os"
- "os/exec"
- "strings"
- "bytes"
-)
-
-func TryRunAndSave(output string, name string, arg []string) error {
- cmd := exec.Command(name, arg...)
-
- f, err := os.Create(output)
- if err != nil {
- log.Fatal(err)
- }
-
- cmd.Stdout = f
- cmd.Stderr = f
-
- err = cmd.Start()
- if err != nil {
- return err
- }
- cmd.Wait()
- return nil
-}
-
-func RunAndSave(output string, name string, arg ...string) {
- err := TryRunAndSave(output, name, arg)
- if err == nil {
- return
- }
- idx := strings.LastIndex(name, "/")
- relname := name
- if idx >= 0 {
- relname = name[idx+1:]
- }
- relname = "./" + relname
- err = TryRunAndSave(output, relname, arg)
- if err != nil {
- log.Fatal(err)
- }
-}
-
-const MAXPROMPTRETRY = 3
-
-func PromptUser(prompt string, opts []string) (match string, err error) {
- for i := 1; i < MAXPROMPTRETRY; i++ {
- fmt.Printf("%s. (%s) Default:%s\n", prompt,
- strings.Join(opts, "/"), opts[0])
- var usrInput string
- fmt.Scanln(&usrInput)
-
- // Check for default entry
- if usrInput == "" {
- match = opts[0]
- return
- }
-
- for _, opt := range opts {
- if opt == usrInput {
- match = opt
- return
- }
- }
- }
- err = errors.New("max retries exceeded")
- fmt.Fprintln(os.Stderr, "ERROR: max retries exceeded")
- return
-}
-
-func MakeHDALogs(outDir string, cardName string) {
- SysDir := "/sys/class/sound/" + cardName + "/"
- files, _ := ioutil.ReadDir(SysDir)
- for _, f := range files {
- if (strings.HasPrefix(f.Name(), "hw") || strings.HasPrefix(f.Name(), "hdaudio")) && f.IsDir() {
- in, err := os.Open(SysDir + f.Name() + "/init_pin_configs")
- defer in.Close()
- if err != nil {
- log.Fatal(err)
- }
- out, err := os.Create(outDir + "/pin_" + strings.Replace(f.Name(), "hdaudio", "hw", -1))
- if err != nil {
- log.Fatal(err)
- }
- defer out.Close()
- io.Copy(out, in)
- }
- }
-
- ProcDir := "/proc/asound/" + cardName + "/"
- files, _ = ioutil.ReadDir(ProcDir)
- for _, f := range files {
- if strings.HasPrefix(f.Name(), "codec#") && !f.IsDir() {
- in, err := os.Open(ProcDir + f.Name())
- defer in.Close()
- if err != nil {
- log.Fatal(err)
- }
- out, err := os.Create(outDir + "/" + f.Name())
- if err != nil {
- log.Fatal(err)
- }
- defer out.Close()
- io.Copy(out, in)
- }
- }
-}
-
-func MakeLogs(outDir string) {
- os.MkdirAll(outDir, 0700)
- RunAndSave(outDir+"/lspci.log", "lspci", "-nnvvvxxxx")
- RunAndSave(outDir+"/dmidecode.log", "dmidecode")
- RunAndSave(outDir+"/acpidump.log", "acpidump")
-
- inteltoolArgs := "-a"
- opt, err := PromptUser("WARNING: The following tool MAY cause your system to hang when it attempts "+
- "to probe for graphics registers. Having the graphics registers will help create a better port. "+
- "Should autoport probe these registers?",
- []string{"y", "yes", "n", "no"})
-
- // Continue even if there is an error
-
- switch opt {
- case "y", "yes":
- inteltoolArgs += "f"
- }
-
- RunAndSave(outDir+"/inteltool.log", "../inteltool/inteltool", inteltoolArgs)
- RunAndSave(outDir+"/ectool.log", "../ectool/ectool", "-pd")
- RunAndSave(outDir+"/superiotool.log", "../superiotool/superiotool", "-ade")
-
- SysSound := "/sys/class/sound/"
- card := ""
- cards, _ := ioutil.ReadDir(SysSound)
- for _, f := range cards {
- if strings.HasPrefix(f.Name(), "card") {
- cid, err := ioutil.ReadFile(SysSound + f.Name() + "/id")
- if err == nil && bytes.Equal(cid, []byte("PCH\n")) {
- fmt.Fprintln(os.Stderr, "PCH sound card is", f.Name())
- card = f.Name()
- }
- }
- }
-
- if card != "" {
- MakeHDALogs(outDir, card)
- } else {
- fmt.Fprintln(os.Stderr, "HDAudio not found on PCH.")
- }
-
- for _, fname := range []string{"cpuinfo", "ioports"} {
- in, err := os.Open("/proc/" + fname)
- defer in.Close()
- if err != nil {
- log.Fatal(err)
- }
- out, err := os.Create(outDir + "/" + fname + ".log")
- if err != nil {
- log.Fatal(err)
- }
- defer out.Close()
- io.Copy(out, in)
- }
-
- out, err := os.Create(outDir + "/input_bustypes.log")
- if err != nil {
- log.Fatal(err)
- }
- defer out.Close()
-
- ClassInputDir := "/sys/class/input/"
- files, _ := ioutil.ReadDir(ClassInputDir)
- for _, f := range files {
- if strings.HasPrefix(f.Name(), "input") && !f.Mode().IsRegular() { /* Allow both dirs and symlinks. */
- in, err := os.Open(ClassInputDir + f.Name() + "/id/bustype")
- defer in.Close()
- if err != nil {
- log.Fatal(err)
- }
- io.Copy(out, in)
- }
- }
-}
diff --git a/util/autoport/log_reader.go b/util/autoport/log_reader.go
deleted file mode 100644
index b0518d25..00000000
--- a/util/autoport/log_reader.go
+++ /dev/null
@@ -1,417 +0,0 @@
-package main
-
-import (
- "bufio"
- "flag"
- "fmt"
- "log"
- "os"
- "regexp"
- "strconv"
- "strings"
-)
-
-type LogDevReader struct {
- InputDirectory string
- ACPITables map[string][]byte
- EC []byte
-}
-
-func isXDigit(x uint8) bool {
- if x >= '0' && x <= '9' {
- return true
- }
- if x >= 'a' && x <= 'f' {
- return true
- }
- if x >= 'A' && x <= 'F' {
- return true
- }
- return false
-}
-
-type HexLine struct {
- length uint
- values [16]byte
- start uint
-}
-
-func (l *LogDevReader) ReadHexLine(line string) (hex HexLine) {
- hex.start = 0
- line = strings.Trim(line, " ")
- fmt.Sscanf(line, "%x:", &hex.start)
- ll, _ := fmt.Sscanf(line, "%x: %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x", &hex.start,
- &hex.values[0], &hex.values[1], &hex.values[2],
- &hex.values[3], &hex.values[4], &hex.values[5],
- &hex.values[6], &hex.values[7], &hex.values[8],
- &hex.values[9], &hex.values[10], &hex.values[11],
- &hex.values[12], &hex.values[13], &hex.values[14],
- &hex.values[15])
- hex.length = uint(ll - 1)
- return
-}
-
-func (l *LogDevReader) AssignHexLine(inp string, target []byte) []byte {
- hex := l.ReadHexLine(inp)
- if hex.start+hex.length > uint(len(target)) {
- target = target[0 : hex.start+hex.length]
- }
- copy(target[hex.start:hex.start+hex.length], hex.values[0:hex.length])
- return target
-}
-
-func (l *LogDevReader) GetEC() []byte {
- if l.EC != nil {
- return l.EC
- }
- l.EC = make([]byte, 0x100, 0x100)
-
- file, err := os.Open(l.InputDirectory + "/ectool.log")
- if err != nil {
- log.Fatal(err)
- }
- defer file.Close()
-
- scanner := bufio.NewScanner(file)
-
- for scanner.Scan() {
- line := scanner.Text()
- if len(line) > 7 && isXDigit(line[0]) && isXDigit(line[1]) && line[2] == ':' {
- l.EC = l.AssignHexLine(line, l.EC)
- }
- }
-
- if err := scanner.Err(); err != nil {
- log.Fatal(err)
- }
-
- return l.EC
-}
-
-func (l *LogDevReader) GetACPI() (Tables map[string][]byte) {
- if l.ACPITables != nil {
- return l.ACPITables
- }
- l.ACPITables = Tables
-
- file, err := os.Open(l.InputDirectory + "/acpidump.log")
- if err != nil {
- log.Fatal(err)
- }
- defer file.Close()
-
- scanner := bufio.NewScanner(file)
-
- Tables = map[string][]byte{}
-
- curTable := ""
- for scanner.Scan() {
- line := scanner.Text()
- /* Only supports ACPI tables up to 0x100000 in size, FIXME if needed */
- is_hexline, _ := regexp.MatchString(" *[0-9A-Fa-f]{4,5}: ", line)
- switch {
- case len(line) >= 6 && line[5] == '@':
- curTable = line[0:4]
- Tables[curTable] = make([]byte, 0, 0x100000)
- case is_hexline:
- Tables[curTable] = l.AssignHexLine(line, Tables[curTable])
- }
- }
-
- if err := scanner.Err(); err != nil {
- log.Fatal(err)
- }
-
- return
-}
-
-func (l *LogDevReader) GetPCIList() (PCIList []PCIDevData) {
- file, err := os.Open(l.InputDirectory + "/lspci.log")
- if err != nil {
- log.Fatal(err)
- }
- defer file.Close()
-
- scanner := bufio.NewScanner(file)
-
- PCIList = []PCIDevData{}
-
- for scanner.Scan() {
- line := scanner.Text()
- switch {
- case !(len(line) < 7 || !isXDigit(line[0]) || !isXDigit(line[1]) || line[2] != ':' || !isXDigit(line[3]) || !isXDigit(line[4]) || line[5] != '.' || !isXDigit(line[6])):
- cur := PCIDevData{}
- fmt.Sscanf(line, "%x:%x.%x", &cur.Bus, &cur.Dev, &cur.Func)
- lc := strings.LastIndex(line, ":")
- li := strings.LastIndex(line[0:lc], "[")
- if li < 0 {
- continue
- }
- ven := 0
- dev := 0
- fmt.Sscanf(line[li+1:], "%x:%x", &ven, &dev)
- cur.PCIDevID = uint16(dev)
- cur.PCIVenID = uint16(ven)
- cur.ConfigDump = make([]byte, 0x100, 0x1000)
- PCIList = append(PCIList, cur)
- case len(line) > 7 && isXDigit(line[0]) && line[1] == '0' && line[2] == ':':
- start := 0
- fmt.Sscanf(line, "%x:", &start)
- cur := &PCIList[len(PCIList)-1]
- cur.ConfigDump = l.AssignHexLine(line, cur.ConfigDump)
- }
- }
-
- if err := scanner.Err(); err != nil {
- log.Fatal(err)
- }
-
- return
-}
-
-func (l *LogDevReader) GetInteltool() (ret InteltoolData) {
- file, err := os.Open(l.InputDirectory + "/inteltool.log")
- if err != nil {
- log.Fatal(err)
- }
- defer file.Close()
-
- scanner := bufio.NewScanner(file)
- paragraph := ""
- ret.GPIO = map[uint16]uint32{}
- ret.RCBA = map[uint16]uint32{}
- ret.IOBP = map[uint32]uint32{}
- ret.IGD = map[uint32]uint32{}
- ret.MCHBAR = map[uint16]uint32{}
- ret.PMBASE = map[uint16]uint32{}
- for scanner.Scan() {
- line := scanner.Text()
- switch {
- case len(line) > 7 && line[0] == '0' && line[1] == 'x' && line[6] == ':' && paragraph == "RCBA":
- addr, value := 0, 0
- fmt.Sscanf(line, "0x%x: 0x%x", &addr, &value)
- ret.RCBA[uint16(addr)] = uint32(value)
- case len(line) > 11 && line[0] == '0' && line[1] == 'x' && line[10] == ':' && paragraph == "IOBP":
- addr, value := 0, 0
- fmt.Sscanf(line, "0x%x: 0x%x", &addr, &value)
- ret.IOBP[uint32(addr)] = uint32(value)
- case len(line) > 9 && line[0] == '0' && line[1] == 'x' && line[8] == ':' && paragraph == "IGD":
- addr, value := 0, 0
- fmt.Sscanf(line, "0x%x: 0x%x", &addr, &value)
- ret.IGD[uint32(addr)] = uint32(value)
- case len(line) > 7 && line[0] == '0' && line[1] == 'x' && line[6] == ':' && paragraph == "MCHBAR":
- addr, value := 0, 0
- fmt.Sscanf(line, "0x%x: 0x%x", &addr, &value)
- ret.MCHBAR[uint16(addr)] = uint32(value)
- case strings.Contains(line, "DEFAULT"):
- continue
- case strings.Contains(line, "DIFF"):
- continue
- case strings.HasPrefix(line, "gpiobase"):
- addr, value := 0, 0
- fmt.Sscanf(line, "gpiobase+0x%x: 0x%x", &addr, &value)
- ret.GPIO[uint16(addr)] = uint32(value)
- case strings.HasPrefix(line, "pmbase"):
- addr, value := 0, 0
- fmt.Sscanf(line, "pmbase+0x%x: 0x%x", &addr, &value)
- ret.PMBASE[uint16(addr)] = uint32(value)
- case strings.HasPrefix(line, "============="):
- paragraph = strings.Trim(line, "= ")
- }
- }
-
- if err := scanner.Err(); err != nil {
- log.Fatal(err)
- }
- return
-}
-
-func (l *LogDevReader) GetDMI() (ret DMIData) {
- file, err := os.Open(l.InputDirectory + "/dmidecode.log")
- if err != nil {
- log.Fatal(err)
- }
- defer file.Close()
-
- scanner := bufio.NewScanner(file)
- paragraph := ""
- for scanner.Scan() {
- line := scanner.Text()
- if !strings.HasPrefix(line, "\t") {
- paragraph = strings.TrimSpace(line)
- continue
- }
- idx := strings.Index(line, ":")
- if idx < 0 {
- continue
- }
- name := strings.TrimSpace(line[0:idx])
- value := strings.TrimSpace(line[idx+1:])
- switch paragraph + ":" + name {
- case "System Information:Manufacturer":
- ret.Vendor = value
- case "System Information:Product Name":
- ret.Model = value
- case "System Information:Version":
- ret.Version = value
- case "Chassis Information:Type":
- ret.IsLaptop = (value == "Notebook" || value == "Laptop")
- }
- }
-
- if err := scanner.Err(); err != nil {
- log.Fatal(err)
- }
- return
-}
-
-func (l *LogDevReader) GetAzaliaCodecs() (ret []AzaliaCodec) {
- cardno := -1
- for i := 0; i < 10; i++ {
- pin, err := os.Open(l.InputDirectory + "/pin_hwC" + strconv.Itoa(i) + "D0")
- if err == nil {
- pin.Close()
- cardno = i
- break
- }
- }
- if cardno == -1 {
- return
- }
- for codecno := 0; codecno < 10; codecno++ {
- cur := AzaliaCodec{CodecNo: codecno, PinConfig: map[int]uint32{}}
- codec, err := os.Open(l.InputDirectory + "/codec#" + strconv.Itoa(codecno))
- if err != nil {
- continue
- }
- defer codec.Close()
- pin, err := os.Open(l.InputDirectory + "/pin_hwC" + strconv.Itoa(cardno) +
- "D" + strconv.Itoa(codecno))
- if err != nil {
- continue
- }
- defer pin.Close()
-
- scanner := bufio.NewScanner(codec)
- for scanner.Scan() {
- line := scanner.Text()
- if strings.HasPrefix(line, "Codec:") {
- fmt.Sscanf(line, "Codec: %s", &cur.Name)
- continue
- }
- if strings.HasPrefix(line, "Vendor Id:") {
- fmt.Sscanf(line, "Vendor Id: 0x%x", &cur.VendorID)
- continue
- }
- if strings.HasPrefix(line, "Subsystem Id:") {
- fmt.Sscanf(line, "Subsystem Id: 0x%x", &cur.SubsystemID)
- continue
- }
- }
-
- scanner = bufio.NewScanner(pin)
- for scanner.Scan() {
- line := scanner.Text()
- addr := 0
- val := uint32(0)
- fmt.Sscanf(line, "0x%x 0x%x", &addr, &val)
- cur.PinConfig[addr] = val
- }
- ret = append(ret, cur)
- }
- return
-}
-
-func (l *LogDevReader) GetIOPorts() []IOPorts {
- file, err := os.Open(l.InputDirectory + "/ioports.log")
- if err != nil {
- log.Fatal(err)
- }
- defer file.Close()
- scanner := bufio.NewScanner(file)
- ret := make([]IOPorts, 0, 100)
- for scanner.Scan() {
- line := scanner.Text()
- el := IOPorts{}
- fmt.Sscanf(line, " %x-%x : %s", &el.Start, &el.End, &el.Usage)
- ret = append(ret, el)
- }
-
- if err := scanner.Err(); err != nil {
- log.Fatal(err)
- }
- return ret
-
-}
-
-func (l *LogDevReader) GetCPUModel() (ret []uint32) {
- file, err := os.Open(l.InputDirectory + "/cpuinfo.log")
- if err != nil {
- log.Fatal(err)
- }
- defer file.Close()
-
- scanner := bufio.NewScanner(file)
- ret = make([]uint32, 0, 100)
- proc := 0
- for scanner.Scan() {
- line := scanner.Text()
- sep := strings.Index(line, ":")
- if sep < 0 {
- continue
- }
- key := strings.TrimSpace(line[0:sep])
- val := strings.TrimSpace(line[sep+1:])
-
- if key == "processor" {
- proc, _ := strconv.Atoi(val)
- if len(ret) <= proc {
- ret = ret[0 : proc+1]
- }
- continue
- }
- if key == "cpu family" {
- family, _ := strconv.Atoi(val)
- ret[proc] |= uint32(((family & 0xf) << 8) | ((family & 0xff0) << 16))
- }
- if key == "model" {
- model, _ := strconv.Atoi(val)
- ret[proc] |= uint32(((model & 0xf) << 4) | ((model & 0xf0) << 12))
- }
- if key == "stepping" {
- stepping, _ := strconv.Atoi(val)
- ret[proc] |= uint32(stepping & 0xf)
- }
- }
-
- if err := scanner.Err(); err != nil {
- log.Fatal(err)
- }
- return
-}
-
-func (l *LogDevReader) HasPS2() bool {
- file, err := os.Open(l.InputDirectory + "/input_bustypes.log")
- if err != nil {
- log.Fatal(err)
- }
- defer file.Close()
- scanner := bufio.NewScanner(file)
- for scanner.Scan() {
- line := scanner.Text()
- if strings.Index(line, "0011") >= 0 {
- return true
- }
- }
- return false
-}
-
-var FlagLogInput = flag.String("input_log", ".", "Input log directory")
-var FlagLogMkLogs = flag.Bool("make_logs", false, "Dump logs")
-
-func MakeLogReader() *LogDevReader {
- if *FlagLogMkLogs {
- MakeLogs(*FlagLogInput)
- }
- return &LogDevReader{InputDirectory: *FlagLogInput}
-}
diff --git a/util/autoport/lynxpoint.go b/util/autoport/lynxpoint.go
deleted file mode 100644
index 98a1ca82..00000000
--- a/util/autoport/lynxpoint.go
+++ /dev/null
@@ -1,490 +0,0 @@
-package main
-
-import "fmt"
-
-type LPVariant int
-
-const (
- LYNX_POINT_MOBILE LPVariant = iota
- LYNX_POINT_DESKTOP
- LYNX_POINT_SERVER
- LYNX_POINT_ULT
-)
-
-type lynxpoint struct {
- variant LPVariant
- node *DevTreeNode
-}
-
-func lpPchGetFlashSize(ctx Context) {
- inteltool := ctx.InfoSource.GetInteltool()
- /* In LP PCH, Boot BIOS Straps field in GCS has only one bit. */
- switch (inteltool.RCBA[0x3410] >> 10) & 1 {
- case 0:
- ROMProtocol = "SPI"
- highflkb := uint32(0)
- for reg := uint16(0); reg < 5; reg++ {
- fl := (inteltool.RCBA[0x3854+4*reg] >> 16) & 0x1fff
- flkb := (fl + 1) << 2
- if flkb > highflkb {
- highflkb = flkb
- }
- }
- ROMSizeKB = int(highflkb)
- FlashROMSupport = "y"
- }
-}
-
-func (b lynxpoint) GetGPIOHeader() string {
- return "southbridge/intel/lynxpoint/pch.h"
-}
-
-func (b lynxpoint) EnableGPE(in int) {
- if b.variant != LYNX_POINT_ULT {
- b.node.Registers[fmt.Sprintf("gpi%d_routing", in)] = "2"
- }
-}
-
-func (b lynxpoint) EncodeGPE(in int) int {
- return in + 0x10
-}
-
-func (b lynxpoint) DecodeGPE(in int) int {
- return in - 0x10
-}
-
-func (b lynxpoint) NeedRouteGPIOManually() {
- b.node.Comment += ", FIXME: set gpiX_routing for EC support"
-}
-
-func GetLptDesktopEHCISetting(loc_param uint32, txamp uint32) (string, int) {
- var port_pos string
- var port_length int
-
- if loc_param == 4 {
- port_pos = "USB_PORT_BACK_PANEL"
- if txamp <= 2 {
- port_length = 0x40
- } else if txamp >= 4 {
- port_length = 0x140
- } else {
- port_length = 0x110
- }
- } else {
- port_pos = "USB_PORT_FLEX"
- port_length = 0x40
- }
- return port_pos, port_length
-}
-
-func GetLptMobileEHCISetting(loc_param uint32, txamp uint32) (string, int) {
- var port_pos string
- var port_length int
-
- if loc_param == 4 {
- port_pos = "USB_PORT_DOCK"
- if txamp <= 1 {
- port_length = 0x40
- } else {
- port_length = 0x80
- }
- } else if loc_param == 6 {
- /* not internal, not dock, port_length >= 0x70 */
- port_pos = "USB_PORT_BACK_PANEL"
- if txamp <= 2 {
- port_length = 0x80
- } else {
- port_length = 0x110
- }
- } else {
- port_pos = "USB_PORT_BACK_PANEL"
- port_length = 0x40
- }
- return port_pos, port_length
-}
-
-func GetLptLPEHCISetting(loc_param uint32, txamp uint32) (string, int) {
- var port_pos string
- var port_length int
-
- if loc_param == 6 {
- /* back panel or mini pcie, length >= 0x70 */
- port_pos = "USB_PORT_MINI_PCIE"
- if txamp <= 2 {
- port_length = 0x80
- } else {
- port_length = 0x110
- }
- } else if loc_param == 4 {
- port_pos = "USB_PORT_DOCK"
- if txamp <= 1 {
- port_length = 0x40
- } else {
- port_length = 0x80
- }
- } else {
- port_pos = "USB_PORT_BACK_PANEL"
- port_length = 0x40
- }
- return port_pos, port_length
-}
-
-func (b lynxpoint) Scan(ctx Context, addr PCIDevData) {
-
- SouthBridge = &b
-
- inteltool := ctx.InfoSource.GetInteltool()
-
- isULT := (b.variant == LYNX_POINT_ULT)
-
- if isULT {
- Lynxpoint_LP_GPIO(ctx, inteltool)
- } else {
- GPIO(ctx, inteltool)
- }
-
- KconfigBool["SOUTHBRIDGE_INTEL_LYNXPOINT"] = true
- if isULT {
- KconfigBool["INTEL_LYNXPOINT_LP"] = true
- }
- KconfigBool["SERIRQ_CONTINUOUS_MODE"] = true
- if isULT {
- KconfigInt["USBDEBUG_HCD_INDEX"] = 1
- } else {
- KconfigInt["USBDEBUG_HCD_INDEX"] = 2
- KconfigComment["USBDEBUG_HCD_INDEX"] = "FIXME: check this"
- }
-
- if isULT {
- lpPchGetFlashSize(ctx)
- } else {
- ich9GetFlashSize(ctx)
- }
-
- FADT := ctx.InfoSource.GetACPI()["FACP"]
-
- sp0dtle_data := (inteltool.IOBP[0xea002750] >> 24) & 0xf
- sp0dtle_edge := (inteltool.IOBP[0xea002754] >> 16) & 0xf
- sp1dtle_data := (inteltool.IOBP[0xea002550] >> 24) & 0xf
- sp1dtle_edge := (inteltool.IOBP[0xea002554] >> 16) & 0xf
-
- if sp0dtle_data != sp0dtle_edge {
- fmt.Printf("Different SATA Gen3 port0 DTLE data and edge values are used.\n")
- }
-
- if sp1dtle_data != sp1dtle_edge {
- fmt.Printf("Different SATA Gen3 port1 DTLE data and edge values are used.\n")
- }
-
- cur := DevTreeNode{
- Chip: "southbridge/intel/lynxpoint",
- Comment: "Intel Series 8 Lynx Point PCH",
-
- /* alt_gp_smi_en is not generated because coreboot doesn't use SMI like OEM firmware */
- Registers: map[string]string{
- "gen1_dec": FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x84:0x88]),
- "gen2_dec": FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x88:0x8c]),
- "gen3_dec": FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x8c:0x90]),
- "gen4_dec": FormatHexLE32(PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 0}].ConfigDump[0x90:0x94]),
- "sata_port_map": fmt.Sprintf("0x%x", PCIMap[PCIAddr{Bus: 0, Dev: 0x1f, Func: 2}].ConfigDump[0x92]&0x3f),
- "docking_supported": (FormatBool((FADT[113] & (1 << 1)) != 0)),
- "sata_port0_gen3_dtle": fmt.Sprintf("0x%x", sp0dtle_data),
- "sata_port1_gen3_dtle": fmt.Sprintf("0x%x", sp1dtle_data),
- },
- PCISlots: []PCISlot{
- PCISlot{PCIAddr: PCIAddr{Dev: 0x13, Func: 0}, writeEmpty: isULT, additionalComment: "Smart Sound Audio DSP"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x14, Func: 0}, writeEmpty: true, additionalComment: "xHCI Controller"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 0}, writeEmpty: isULT, additionalComment: "Serial I/O DMA"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 1}, writeEmpty: isULT, additionalComment: "I2C0"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 2}, writeEmpty: isULT, additionalComment: "I2C1"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 3}, writeEmpty: isULT, additionalComment: "GSPI0"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 4}, writeEmpty: isULT, additionalComment: "GSPI1"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 5}, writeEmpty: isULT, additionalComment: "UART0"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x15, Func: 6}, writeEmpty: isULT, additionalComment: "UART1"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 0}, writeEmpty: true, additionalComment: "Management Engine Interface 1"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 1}, writeEmpty: true, additionalComment: "Management Engine Interface 2"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 2}, writeEmpty: true, additionalComment: "Management Engine IDE-R"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x16, Func: 3}, writeEmpty: true, additionalComment: "Management Engine KT"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x17, Func: 0}, writeEmpty: isULT, additionalComment: "SDIO"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x19, Func: 0}, writeEmpty: true, additionalComment: "Intel Gigabit Ethernet"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1a, Func: 0}, writeEmpty: !isULT, additionalComment: "USB2 EHCI #2"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1b, Func: 0}, writeEmpty: true, additionalComment: "High Definition Audio"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 0}, writeEmpty: true, additionalComment: "PCIe Port #1"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 1}, writeEmpty: true, additionalComment: "PCIe Port #2"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 2}, writeEmpty: true, additionalComment: "PCIe Port #3"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 3}, writeEmpty: true, additionalComment: "PCIe Port #4"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 4}, writeEmpty: true, additionalComment: "PCIe Port #5"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 5}, writeEmpty: true, additionalComment: "PCIe Port #6"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 6}, writeEmpty: !isULT, additionalComment: "PCIe Port #7"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1c, Func: 7}, writeEmpty: !isULT, additionalComment: "PCIe Port #8"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1d, Func: 0}, writeEmpty: true, additionalComment: "USB2 EHCI #1"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 0}, writeEmpty: true, additionalComment: "LPC bridge"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 2}, writeEmpty: true, additionalComment: "SATA Controller (AHCI)"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 3}, writeEmpty: true, additionalComment: "SMBus"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 5}, writeEmpty: !isULT, additionalComment: "SATA Controller (Legacy)"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1f, Func: 6}, writeEmpty: true, additionalComment: "Thermal"},
- },
- }
-
- if isULT {
- cur.Registers["gpe0_en_1"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x90])
- cur.Registers["gpe0_en_2"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x94])
- cur.Registers["gpe0_en_3"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x98])
- cur.Registers["gpe0_en_4"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x9c])
- } else {
- cur.Registers["gpe0_en_1"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x28])
- cur.Registers["gpe0_en_2"] = fmt.Sprintf("0x%x", inteltool.PMBASE[0x2c])
- }
-
- b.node = &cur
-
- PutPCIChip(addr, cur)
- PutPCIDevParent(addr, "", "lpc")
-
- DSDTIncludes = append(DSDTIncludes, DSDTInclude{
- File: "southbridge/intel/common/acpi/platform.asl",
- })
- DSDTIncludes = append(DSDTIncludes, DSDTInclude{
- File: "southbridge/intel/lynxpoint/acpi/globalnvs.asl",
- Comment: "global NVS and variables",
- })
- DSDTIncludes = append(DSDTIncludes, DSDTInclude{
- File: "southbridge/intel/common/acpi/sleepstates.asl",
- })
- DSDTPCI0Includes = append(DSDTPCI0Includes, DSDTInclude{
- File: "southbridge/intel/lynxpoint/acpi/pch.asl",
- })
-
- AddBootBlockFile("bootblock.c", "")
- bb := Create(ctx, "bootblock.c")
- defer bb.Close()
- Add_gpl(bb)
- bb.WriteString(`#include <southbridge/intel/lynxpoint/pch.h>
-
-/* FIXME: remove this if not needed */
-void mainboard_config_superio(void)
-{
-}
-`)
-
- sb := Create(ctx, "romstage.c")
- defer sb.Close()
- Add_gpl(sb)
- sb.WriteString(`#include <stdint.h>
-#include <northbridge/intel/haswell/haswell.h>
-#include <northbridge/intel/haswell/raminit.h>
-#include <southbridge/intel/lynxpoint/pch.h>
-
-void mainboard_config_rcba(void)
-{
-}
-
-/* FIXME: called after romstage_common, remove it if not used */
-void mb_late_romstage_setup(void)
-{
-}
-
-void mb_get_spd_map(struct spd_info *spdi)
-{
- /* FIXME: check this */
- spdi->addresses[0] = 0x50;
- spdi->addresses[1] = 0x51;
- spdi->addresses[2] = 0x52;
- spdi->addresses[3] = 0x53;
-}
-
-const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS] = {
- /* FIXME: Length and Location are computed from IOBP values, may be inaccurate */
- /* Length, Enable, OCn#, Location */
-`)
-
- pdo1 := PCIMap[PCIAddr{Bus: 0, Dev: 0x1d, Func: 0}].ConfigDump[0x64]
- ocmap1 := PCIMap[PCIAddr{Bus: 0, Dev: 0x1d, Func: 0}].ConfigDump[0x74:0x78]
-
- var pdo2 uint8
- var ocmap2 []uint8
- var nPorts uint
- if isULT {
- nPorts = 8
- } else {
- pdo2 = PCIMap[PCIAddr{Bus: 0, Dev: 0x1a, Func: 0}].ConfigDump[0x64]
- ocmap2 = PCIMap[PCIAddr{Bus: 0, Dev: 0x1a, Func: 0}].ConfigDump[0x74:0x78]
- nPorts = 14
- }
-
- xusb2pr := GetLE16(PCIMap[PCIAddr{Bus: 0, Dev: 0x14, Func: 0}].ConfigDump[0xd0:0xd4])
-
- for port := uint(0); port < nPorts; port++ {
- var port_oc int = -1
- var port_pos string
- var port_disable uint8
-
- if port < 8 {
- port_disable = ((pdo1 >> port) & (uint8(xusb2pr>>port) ^ 1)) & 1
- for oc := 0; oc < 4; oc++ {
- if (ocmap1[oc] & (1 << port)) != 0 {
- port_oc = oc
- break
- }
- }
- } else {
- port_disable = ((pdo2 >> (port - 8)) & (uint8(xusb2pr>>port) ^ 1)) & 1
- for oc := 0; oc < 4; oc++ {
- if (ocmap2[oc] & (1 << (port - 8))) != 0 {
- port_oc = oc + 4
- break
- }
- }
- }
-
- /* get USB2 port length and location from IOBP */
- port_iobp := inteltool.IOBP[0xe5004100+uint32(port)*0x100]
- loc_param := (port_iobp >> 8) & 7
- txamp := (port_iobp >> 11) & 7
- var port_length int
-
- if isULT {
- port_pos, port_length = GetLptLPEHCISetting(loc_param, txamp)
- } else if b.variant == LYNX_POINT_MOBILE {
- port_pos, port_length = GetLptMobileEHCISetting(loc_param, txamp)
- } else { /* desktop or server */
- port_pos, port_length = GetLptDesktopEHCISetting(loc_param, txamp)
- }
-
- if port_disable == 1 {
- port_pos = "USB_PORT_SKIP"
- }
-
- if port_oc == -1 {
- fmt.Fprintf(sb, "\t{ 0x%04x, %d, USB_OC_PIN_SKIP, %s },\n",
- port_length, (port_disable ^ 1), port_pos)
- } else {
- fmt.Fprintf(sb, "\t{ 0x%04x, %d, %d, %s },\n",
- port_length, (port_disable ^ 1), port_oc, port_pos)
- }
- }
-
- sb.WriteString(`};
-
-const struct usb3_port_config mainboard_usb3_ports[MAX_USB3_PORTS] = {
-`)
-
- xpdo := PCIMap[PCIAddr{Bus: 0, Dev: 0x14, Func: 0}].ConfigDump[0xe8]
- u3ocm := PCIMap[PCIAddr{Bus: 0, Dev: 0x14, Func: 0}].ConfigDump[0xc8:0xd0]
-
- if !isULT {
- nPorts = 6
- } else {
- nPorts = 4
- }
-
- for port := uint(0); port < nPorts; port++ {
- var port_oc int = -1
- port_disable := (xpdo >> port) & 1
- for oc := 0; oc < 8; oc++ {
- if (u3ocm[oc] & (1 << port)) != 0 {
- port_oc = oc
- break
- }
- }
- if port_oc == -1 {
- fmt.Fprintf(sb, "\t{ %d, USB_OC_PIN_SKIP },\n",
- (port_disable ^ 1))
- } else {
- fmt.Fprintf(sb, "\t{ %d, %d },\n",
- (port_disable ^ 1), port_oc)
- }
- }
-
- sb.WriteString(`};
-`)
-
-}
-
-func init() {
- for _, id := range []uint16{
- 0x8c41, 0x8c49, 0x8c4b, 0x8c4f,
- } {
- RegisterPCI(0x8086, uint16(id), lynxpoint{variant: LYNX_POINT_MOBILE})
- }
-
- for _, id := range []uint16{
- 0x8c42, 0x8c44, 0x8c46, 0x8c4a,
- 0x8c4c, 0x8c4e, 0x8c50, 0x8c5c,
- } {
- RegisterPCI(0x8086, uint16(id), lynxpoint{variant: LYNX_POINT_DESKTOP})
- }
-
- for _, id := range []uint16{
- 0x8c52, 0x8c54, 0x8c56,
- } {
- RegisterPCI(0x8086, uint16(id), lynxpoint{variant: LYNX_POINT_SERVER})
- }
-
- for _, id := range []uint16{
- 0x9c41, 0x9c43, 0x9c45,
- } {
- RegisterPCI(0x8086, uint16(id), lynxpoint{variant: LYNX_POINT_ULT})
- }
-
- /* PCIe bridge */
- for _, id := range []uint16{
- 0x8c10, 0x8c12, 0x8c14, 0x8c16, 0x8c18, 0x8c1a, 0x8c1c, 0x8c1e,
- 0x9c10, 0x9c12, 0x9c14, 0x9c16, 0x9c18, 0x9c1a,
- } {
- RegisterPCI(0x8086, id, GenericPCI{})
- }
-
- /* SMBus controller */
- RegisterPCI(0x8086, 0x8c22, GenericPCI{MissingParent: "smbus"})
- RegisterPCI(0x8086, 0x9c22, GenericPCI{MissingParent: "smbus"})
-
- /* SATA */
- for _, id := range []uint16{
- 0x8c00, 0x8c02, 0x8c04, 0x8c06, 0x8c08, 0x8c0e,
- 0x8c01, 0x8c03, 0x8c05, 0x8c07, 0x8c09, 0x8c0f,
- 0x9c03, 0x9c05, 0x9c07, 0x9c0f,
- } {
- RegisterPCI(0x8086, id, GenericPCI{})
- }
-
- /* EHCI */
- for _, id := range []uint16{
- 0x9c26, 0x8c26, 0x8c2d,
- } {
- RegisterPCI(0x8086, id, GenericPCI{})
- }
-
- /* XHCI */
- RegisterPCI(0x8086, 0x8c31, GenericPCI{})
- RegisterPCI(0x8086, 0x9c31, GenericPCI{})
-
- /* ME and children */
- for _, id := range []uint16{
- 0x8c3a, 0x8c3b, 0x8c3c, 0x8c3d,
- 0x9c3a, 0x9c3b, 0x9c3c, 0x9c3d,
- } {
- RegisterPCI(0x8086, id, GenericPCI{})
- }
-
- /* Ethernet */
- RegisterPCI(0x8086, 0x8c33, GenericPCI{})
-
- /* Thermal */
- RegisterPCI(0x8086, 0x8c24, GenericPCI{})
- RegisterPCI(0x8086, 0x9c24, GenericPCI{})
-
- /* LAN Controller on LP PCH (if EEPROM has 0x0000/0xffff in DID) */
- RegisterPCI(0x8086, 0x155a, GenericPCI{})
-
- /* SDIO */
- RegisterPCI(0x8086, 0x9c35, GenericPCI{})
-
- /* Smart Sound Technology Controller */
- RegisterPCI(0x8086, 0x9c36, GenericPCI{})
-
- /* Serial I/O */
- for id := uint16(0x9c60); id <= 0x9c66; id++ {
- RegisterPCI(0x8086, id, GenericPCI{})
- }
-}
diff --git a/util/autoport/lynxpoint_lp_gpio.go b/util/autoport/lynxpoint_lp_gpio.go
deleted file mode 100644
index fbc1686a..00000000
--- a/util/autoport/lynxpoint_lp_gpio.go
+++ /dev/null
@@ -1,252 +0,0 @@
-package main
-
-import (
- "fmt"
- "os"
- "strings"
-)
-
-const (
- PIRQI = 0
- PIRQJ = 1
- PIRQK = 2
- PIRQL = 3
- PIRQM = 4
- PIRQN = 5
- PIRQO = 6
- PIRQP = 7
- PIRQQ = 8
- PIRQR = 9
- PIRQS = 10
- PIRQT = 11
- PIRQU = 12
- PIRQV = 13
- PIRQW = 14
- PIRQX = 15
-)
-
-/* from sb/intel/lynxpoint/lp_gpio.c */
-func lp_gpio_to_pirq(gpioNum uint16) int {
- switch gpioNum {
- case 8:
- return PIRQI
- case 9:
- return PIRQJ
- case 10:
- return PIRQK
- case 13:
- return PIRQL
- case 14:
- return PIRQM
- case 45:
- return PIRQN
- case 46:
- return PIRQO
- case 47:
- return PIRQP
- case 48:
- return PIRQQ
- case 49:
- return PIRQR
- case 50:
- return PIRQS
- case 51:
- return PIRQT
- case 52:
- return PIRQU
- case 53:
- return PIRQV
- case 54:
- return PIRQW
- case 55:
- return PIRQX
- default:
- return -1
- }
-}
-
-func conf0str(conf0 uint32) string {
- if (conf0 & 1) == 0 {
- return "GPIO_MODE_NATIVE"
- } else {
- s := []string{"GPIO_MODE_GPIO"}
- var gpio_output bool
- if ((conf0 >> 2) & 1) == 1 {
- s = append(s, "GPIO_DIR_INPUT")
- gpio_output = false
- } else {
- s = append(s, "GPIO_DIR_OUTPUT")
- gpio_output = true
- }
- if ((conf0 >> 3) & 1) == 1 {
- s = append(s, "GPIO_INVERT")
- }
- if ((conf0 >> 4) & 1) == 1 {
- s = append(s, "GPIO_IRQ_LEVEL")
- }
- if gpio_output {
- if ((conf0 >> 31) & 1) == 1 {
- s = append(s, "GPO_LEVEL_HIGH")
- } else {
- s = append(s, "GPO_LEVEL_LOW")
- }
- }
- return strings.Join(s, " | ")
- }
-}
-
-func lpgpio_preset(conf0 uint32, owner uint32, route uint32, irqen uint32, pirq uint32) string {
- if conf0 == 0xd { /* 0b1101: MODE_GPIO | INPUT | INVERT */
- if owner == 0 { /* OWNER_ACPI */
- if irqen == 0 && pirq == 0 {
- if route == 0 { /* SCI */
- return "GPIO_ACPI_SCI"
- } else {
- return "GPIO_ACPI_SMI"
- }
- }
- return ""
- } else { /* OWNER_GPIO */
- if route == 0 && irqen == 0 && pirq != 0 {
- return "GPIO_INPUT_INVERT"
- }
- return ""
- }
- }
-
- if conf0 == 0x5 && owner == 1 { /* 0b101: MODE_GPIO | INPUT, OWNER_GPIO */
- if route == 0 && irqen == 0 {
- if pirq == 1 {
- return "GPIO_PIRQ"
- } else {
- return "GPIO_INPUT"
- }
- }
- return ""
- }
-
- if owner == 1 && irqen == 1 {
- if route == 0 && pirq == 0 {
- if conf0 == 0x5 { /* 0b00101 */
- return "GPIO_IRQ_EDGE"
- }
- if conf0 == 0x15 { /* 0b10101 */
- return "GPIO_IRQ_LEVEL"
- }
- }
- return ""
- }
- return ""
-}
-
-func gpio_str(conf0 uint32, conf1 uint32, owner uint32, route uint32, irqen uint32, reset uint32, blink uint32, pirq uint32) string {
- s := []string{}
- s = append(s, fmt.Sprintf(".conf0 = %s", conf0str(conf0)))
- if conf1 != 0 {
- s = append(s, fmt.Sprintf(".conf1 = 0x%x", conf1))
- }
- if owner != 0 {
- s = append(s, ".owner = GPIO_OWNER_GPIO")
- }
- if route != 0 {
- s = append(s, ".route = GPIO_ROUTE_SMI")
- }
- if irqen != 0 {
- s = append(s, ".irqen = GPIO_IRQ_ENABLE")
- }
- if reset != 0 {
- s = append(s, ".reset = GPIO_RESET_RSMRST")
- }
- if blink != 0 {
- s = append(s, ".blink = GPO_BLINK")
- }
- if pirq != 0 {
- s = append(s, ".pirq = GPIO_PIRQ_APIC_ROUTE")
- }
- return strings.Join(s, ", ")
-}
-
-/* start addresses of GPIO registers */
-const (
- GPIO_OWN = 0x0
- GPIPIRQ2IOXAPIC = 0x10
- GPO_BLINK = 0x18
- GPI_ROUT = 0x30
- GP_RST_SEL = 0x60
- GPI_IE = 0x90
- GPnCONFIGA = 0x100
- GPnCONFIGB = 0x104
-)
-
-func PrintLPGPIO(gpio *os.File, inteltool InteltoolData) {
- for gpioNum := uint16(0); gpioNum <= 94; gpioNum++ {
- if gpioNum < 10 {
- fmt.Fprintf(gpio, "\t[%d] = ", gpioNum)
- } else {
- fmt.Fprintf(gpio, "\t[%d] = ", gpioNum)
- }
- conf0 := inteltool.GPIO[GPnCONFIGA+gpioNum*8]
- conf1 := inteltool.GPIO[GPnCONFIGB+gpioNum*8]
- set := gpioNum / 32
- bit := gpioNum % 32
- /* owner only effective in GPIO mode */
- owner := (inteltool.GPIO[GPIO_OWN+set*4] >> bit) & 1
- route := (inteltool.GPIO[GPI_ROUT+set*4] >> bit) & 1
- irqen := (inteltool.GPIO[GPI_IE+set*4] >> bit) & 1
- reset := (inteltool.GPIO[GP_RST_SEL+set*4] >> bit) & 1
- var blink, pirq uint32
- /* blink only effective in GPIO output mode */
- if set == 0 {
- blink = (inteltool.GPIO[GPO_BLINK] >> bit) & 1
- } else {
- blink = 0
- }
- irqset := lp_gpio_to_pirq(gpioNum)
- if irqset >= 0 {
- pirq = (inteltool.GPIO[GPIPIRQ2IOXAPIC] >> uint(irqset)) & 1
- } else {
- pirq = 0
- }
-
- if (conf0 & 1) == 0 {
- fmt.Fprintf(gpio, "LP_GPIO_NATIVE,\n")
- } else if (conf0 & 4) == 0 {
- /* configured as output */
- if ((conf0 >> 31) & 1) == 0 {
- fmt.Fprintf(gpio, "LP_GPIO_OUT_LOW,\n")
- } else {
- fmt.Fprintf(gpio, "LP_GPIO_OUT_HIGH,\n")
- }
- } else if (conf1 & 4) != 0 {
- /* configured as input and sensing disabled */
- fmt.Fprintf(gpio, "LP_GPIO_UNUSED,\n")
- } else {
- is_preset := false
- if conf1 == 0 && reset == 0 && blink == 0 {
- preset := lpgpio_preset(conf0, owner, route, irqen, pirq)
- if preset != "" {
- fmt.Fprintf(gpio, "LP_%s,\n", preset)
- is_preset = true
- }
- }
- if !is_preset {
- fmt.Fprintf(gpio, "{ %s },\n", gpio_str(conf0, conf1, owner, route, irqen, reset, blink, pirq))
- }
- }
- }
-}
-
-func Lynxpoint_LP_GPIO(ctx Context, inteltool InteltoolData) {
- gpio := Create(ctx, "gpio.c")
- defer gpio.Close()
-
- AddROMStageFile("gpio.c", "")
-
- Add_gpl(gpio)
- gpio.WriteString(`#include <southbridge/intel/lynxpoint/lp_gpio.h>
-
-const struct pch_lp_gpio_map mainboard_lp_gpio_map[] = {
-`)
- PrintLPGPIO(gpio, inteltool)
- gpio.WriteString("\tLP_GPIO_END\n};\n")
-}
diff --git a/util/autoport/main.go b/util/autoport/main.go
deleted file mode 100644
index 3a2f0617..00000000
--- a/util/autoport/main.go
+++ /dev/null
@@ -1,915 +0,0 @@
-/* This is just an experiment. Full automatic porting
- is probably not possible but a lot can be automated. */
-package main
-
-import (
- "bytes"
- "flag"
- "fmt"
- "log"
- "os"
- "sort"
- "strings"
-)
-
-type PCIAddr struct {
- Bus int
- Dev int
- Func int
-}
-
-type PCIDevData struct {
- PCIAddr
- PCIVenID uint16
- PCIDevID uint16
- ConfigDump []uint8
-}
-
-type PCIDevice interface {
- Scan(ctx Context, addr PCIDevData)
-}
-
-type InteltoolData struct {
- GPIO map[uint16]uint32
- RCBA map[uint16]uint32
- IOBP map[uint32]uint32
- IGD map[uint32]uint32
- MCHBAR map[uint16]uint32
- PMBASE map[uint16]uint32
-}
-
-type DMIData struct {
- Vendor string
- Model string
- Version string
- IsLaptop bool
-}
-
-type AzaliaCodec struct {
- Name string
- VendorID uint32
- SubsystemID uint32
- CodecNo int
- PinConfig map[int]uint32
-}
-
-type DevReader interface {
- GetPCIList() []PCIDevData
- GetDMI() DMIData
- GetInteltool() InteltoolData
- GetAzaliaCodecs() []AzaliaCodec
- GetACPI() map[string][]byte
- GetCPUModel() []uint32
- GetEC() []byte
- GetIOPorts() []IOPorts
- HasPS2() bool
-}
-
-type IOPorts struct {
- Start uint16
- End uint16
- Usage string
-}
-
-type SouthBridger interface {
- GetGPIOHeader() string
- EncodeGPE(int) int
- DecodeGPE(int) int
- EnableGPE(int)
- NeedRouteGPIOManually()
-}
-
-var SouthBridge SouthBridger
-var BootBlockFiles map[string]string = map[string]string{}
-var ROMStageFiles map[string]string = map[string]string{}
-var RAMStageFiles map[string]string = map[string]string{}
-var SMMFiles map[string]string = map[string]string{}
-var MainboardInit string
-var MainboardEnable string
-var MainboardIncludes []string
-
-type Context struct {
- MoboID string
- KconfigName string
- Vendor string
- Model string
- BaseDirectory string
- InfoSource DevReader
- SaneVendor string
-}
-
-type IOAPICIRQ struct {
- APICID int
- IRQNO [4]int
-}
-
-var IOAPICIRQs map[PCIAddr]IOAPICIRQ = map[PCIAddr]IOAPICIRQ{}
-var KconfigBool map[string]bool = map[string]bool{}
-var KconfigComment map[string]string = map[string]string{}
-var KconfigString map[string]string = map[string]string{}
-var KconfigHex map[string]uint32 = map[string]uint32{}
-var KconfigInt map[string]int = map[string]int{}
-var ROMSizeKB = 0
-var ROMProtocol = ""
-var FlashROMSupport = ""
-
-func GetLE16(inp []byte) uint16 {
- return uint16(inp[0]) | (uint16(inp[1]) << 8)
-}
-
-func FormatHexLE16(inp []byte) string {
- return fmt.Sprintf("0x%04x", GetLE16(inp))
-}
-
-func FormatHex32(u uint32) string {
- return fmt.Sprintf("0x%08x", u)
-}
-
-func FormatHex8(u uint8) string {
- return fmt.Sprintf("0x%02x", u)
-}
-
-func FormatInt32(u uint32) string {
- return fmt.Sprintf("%d", u)
-}
-
-func FormatHexLE32(d []uint8) string {
- u := uint32(d[0]) | (uint32(d[1]) << 8) | (uint32(d[2]) << 16) | (uint32(d[3]) << 24)
- return FormatHex32(u)
-}
-
-func FormatBool(inp bool) string {
- if inp {
- return "1"
- } else {
- return "0"
- }
-}
-
-func sanitize(inp string) string {
- result := strings.ToLower(inp)
- result = strings.Replace(result, " ", "_", -1)
- result = strings.Replace(result, ",", "_", -1)
- result = strings.Replace(result, "-", "_", -1)
- for strings.HasSuffix(result, ".") {
- result = result[0 : len(result)-1]
- }
- return result
-}
-
-func AddBootBlockFile(Name string, Condition string) {
- BootBlockFiles[Name] = Condition
-}
-
-func AddROMStageFile(Name string, Condition string) {
- ROMStageFiles[Name] = Condition
-}
-
-func AddRAMStageFile(Name string, Condition string) {
- RAMStageFiles[Name] = Condition
-}
-
-func AddSMMFile(Name string, Condition string) {
- SMMFiles[Name] = Condition
-}
-
-func IsIOPortUsedBy(ctx Context, port uint16, name string) bool {
- for _, io := range ctx.InfoSource.GetIOPorts() {
- if io.Start <= port && port <= io.End && io.Usage == name {
- return true
- }
- }
- return false
-}
-
-var FlagOutDir = flag.String("coreboot_dir", ".", "Resulting coreboot directory")
-
-func writeMF(mf *os.File, files map[string]string, category string) {
- keys := []string{}
- for file, _ := range files {
- keys = append(keys, file)
- }
-
- sort.Strings(keys)
-
- for _, file := range keys {
- condition := files[file]
- if condition == "" {
- fmt.Fprintf(mf, "%s-y += %s\n", category, file)
- } else {
- fmt.Fprintf(mf, "%s-$(%s) += %s\n", category, condition, file)
- }
- }
-}
-
-func Create(ctx Context, name string) *os.File {
- li := strings.LastIndex(name, "/")
- if li > 0 {
- os.MkdirAll(ctx.BaseDirectory+"/"+name[0:li], 0700)
- }
- mf, err := os.Create(ctx.BaseDirectory + "/" + name)
- if err != nil {
- log.Fatal(err)
- }
- return mf
-}
-
-func Add_gpl(f *os.File) {
- fmt.Fprintln(f, "/* SPDX-License-Identifier: GPL-2.0-only */")
- fmt.Fprintln(f)
-}
-
-func RestorePCI16Simple(f *os.File, pcidev PCIDevData, addr uint16) {
- fmt.Fprintf(f, " pci_write_config16(PCI_DEV(%d, 0x%02x, %d), 0x%02x, 0x%02x%02x);\n",
- pcidev.Bus, pcidev.Dev, pcidev.Func, addr,
- pcidev.ConfigDump[addr+1],
- pcidev.ConfigDump[addr])
-}
-
-func RestorePCI32Simple(f *os.File, pcidev PCIDevData, addr uint16) {
- fmt.Fprintf(f, " pci_write_config32(PCI_DEV(%d, 0x%02x, %d), 0x%02x, 0x%02x%02x%02x%02x);\n",
- pcidev.Bus, pcidev.Dev, pcidev.Func, addr,
- pcidev.ConfigDump[addr+3],
- pcidev.ConfigDump[addr+2],
- pcidev.ConfigDump[addr+1],
- pcidev.ConfigDump[addr])
-}
-
-func RestoreRCBA32(f *os.File, inteltool InteltoolData, addr uint16) {
- fmt.Fprintf(f, "\tRCBA32(0x%04x) = 0x%08x;\n", addr, inteltool.RCBA[addr])
-}
-
-type PCISlot struct {
- PCIAddr
- alias string
- additionalComment string
- writeEmpty bool
-}
-
-type DevTreeNode struct {
- Bus int
- Dev int
- Func int
- Disabled bool
- Registers map[string]string
- IOs map[uint16]uint16
- Children []DevTreeNode
- PCISlots []PCISlot
- PCIController bool
- ChildPCIBus int
- MissingParent string
- SubVendor uint16
- SubSystem uint16
- Chip string
- Ops string
- Comment string
-}
-
-var DevTree DevTreeNode
-var MissingChildren map[string][]DevTreeNode = map[string][]DevTreeNode{}
-var unmatchedPCIChips map[PCIAddr]DevTreeNode = map[PCIAddr]DevTreeNode{}
-var unmatchedPCIDevices map[PCIAddr]DevTreeNode = map[PCIAddr]DevTreeNode{}
-
-func Offset(dt *os.File, offset int) {
- for i := 0; i < offset; i++ {
- fmt.Fprintf(dt, "\t")
- }
-}
-
-func MatchDev(dev *DevTreeNode) {
- for idx := range dev.Children {
- MatchDev(&dev.Children[idx])
- }
-
- for _, slot := range dev.PCISlots {
- slotChip, ok := unmatchedPCIChips[slot.PCIAddr]
-
- if !ok {
- continue
- }
-
- if slot.additionalComment != "" && slotChip.Comment != "" {
- slotChip.Comment = slot.additionalComment + " " + slotChip.Comment
- } else {
- slotChip.Comment = slot.additionalComment + slotChip.Comment
- }
-
- delete(unmatchedPCIChips, slot.PCIAddr)
- MatchDev(&slotChip)
- dev.Children = append(dev.Children, slotChip)
- }
-
- if dev.PCIController {
- for slot, slotDev := range unmatchedPCIChips {
- if slot.Bus == dev.ChildPCIBus {
- delete(unmatchedPCIChips, slot)
- MatchDev(&slotDev)
- dev.Children = append(dev.Children, slotDev)
- }
- }
- }
-
- for _, slot := range dev.PCISlots {
- slotDev, ok := unmatchedPCIDevices[slot.PCIAddr]
- if !ok {
- if slot.writeEmpty {
- dev.Children = append(dev.Children,
- DevTreeNode{
- Registers: map[string]string{},
- Chip: "pci",
- Bus: slot.Bus,
- Dev: slot.Dev,
- Func: slot.Func,
- Comment: slot.additionalComment,
- Disabled: true,
- },
- )
- }
- continue
- }
-
- if slot.additionalComment != "" && slotDev.Comment != "" {
- slotDev.Comment = slot.additionalComment + " " + slotDev.Comment
- } else {
- slotDev.Comment = slot.additionalComment + slotDev.Comment
- }
-
- MatchDev(&slotDev)
- dev.Children = append(dev.Children, slotDev)
- delete(unmatchedPCIDevices, slot.PCIAddr)
- }
-
- if dev.MissingParent != "" {
- for _, child := range MissingChildren[dev.MissingParent] {
- MatchDev(&child)
- dev.Children = append(dev.Children, child)
- }
- delete(MissingChildren, dev.MissingParent)
- }
-
- if dev.PCIController {
- for slot, slotDev := range unmatchedPCIDevices {
- if slot.Bus == dev.ChildPCIBus {
- MatchDev(&slotDev)
- dev.Children = append(dev.Children, slotDev)
- delete(unmatchedPCIDevices, slot)
- }
- }
- }
-}
-
-func writeOn(dt *os.File, dev DevTreeNode) {
- if dev.Disabled {
- fmt.Fprintf(dt, "off")
- } else {
- fmt.Fprintf(dt, "on")
- }
-}
-
-func WriteDev(dt *os.File, offset int, alias string, dev DevTreeNode) {
- Offset(dt, offset)
- switch dev.Chip {
- case "cpu_cluster", "lapic", "domain", "ioapic":
- fmt.Fprintf(dt, "device %s 0x%x ", dev.Chip, dev.Dev)
- writeOn(dt, dev)
- case "pci", "pnp":
- if alias != "" {
- fmt.Fprintf(dt, "device ref %s ", alias)
- } else {
- fmt.Fprintf(dt, "device %s %02x.%x ", dev.Chip, dev.Dev, dev.Func)
- }
- writeOn(dt, dev)
- case "i2c":
- fmt.Fprintf(dt, "device %s %02x ", dev.Chip, dev.Dev)
- writeOn(dt, dev)
- default:
- fmt.Fprintf(dt, "chip %s", dev.Chip)
- }
- if dev.Comment != "" {
- fmt.Fprintf(dt, " # %s", dev.Comment)
- }
- fmt.Fprintf(dt, "\n")
- if dev.Ops != "" {
- Offset(dt, offset+1)
- fmt.Fprintf(dt, "ops %s\n", dev.Ops)
- }
- if dev.Chip == "pci" && dev.SubSystem != 0 && dev.SubVendor != 0 {
- Offset(dt, offset+1)
- fmt.Fprintf(dt, "subsystemid 0x%04x 0x%04x\n", dev.SubVendor, dev.SubSystem)
- }
-
- ioapic, ok := IOAPICIRQs[PCIAddr{Bus: dev.Bus, Dev: dev.Dev, Func: dev.Func}]
- if dev.Chip == "pci" && ok {
- for pin, irq := range ioapic.IRQNO {
- if irq != 0 {
- Offset(dt, offset+1)
- fmt.Fprintf(dt, "ioapic_irq %d INT%c 0x%x\n", ioapic.APICID, 'A'+pin, irq)
- }
- }
- }
-
- keys := []string{}
- for reg, _ := range dev.Registers {
- keys = append(keys, reg)
- }
-
- sort.Strings(keys)
-
- for _, reg := range keys {
- val := dev.Registers[reg]
- Offset(dt, offset+1)
- fmt.Fprintf(dt, "register \"%s\" = \"%s\"\n", reg, val)
- }
-
- ios := []int{}
- for reg, _ := range dev.IOs {
- ios = append(ios, int(reg))
- }
-
- sort.Ints(ios)
-
- for _, reg := range ios {
- val := dev.IOs[uint16(reg)]
- Offset(dt, offset+1)
- fmt.Fprintf(dt, "io 0x%x = 0x%x\n", reg, val)
- }
-
- for _, child := range dev.Children {
- alias = ""
- for _, slot := range dev.PCISlots {
- if slot.PCIAddr.Bus == child.Bus &&
- slot.PCIAddr.Dev == child.Dev && slot.PCIAddr.Func == child.Func {
- alias = slot.alias
- }
- }
- WriteDev(dt, offset+1, alias, child)
- }
-
- Offset(dt, offset)
- fmt.Fprintf(dt, "end\n")
-}
-
-func PutChip(domain string, cur DevTreeNode) {
- MissingChildren[domain] = append(MissingChildren[domain], cur)
-}
-
-func PutPCIChip(addr PCIDevData, cur DevTreeNode) {
- unmatchedPCIChips[addr.PCIAddr] = cur
-}
-
-func PutPCIDevParent(addr PCIDevData, comment string, parent string) {
- cur := DevTreeNode{
- Registers: map[string]string{},
- Chip: "pci",
- Bus: addr.Bus,
- Dev: addr.Dev,
- Func: addr.Func,
- MissingParent: parent,
- Comment: comment,
- }
- if addr.ConfigDump[0xa] == 0x04 && addr.ConfigDump[0xb] == 0x06 {
- cur.PCIController = true
- cur.ChildPCIBus = int(addr.ConfigDump[0x19])
-
- loopCtr := 0
- for capPtr := addr.ConfigDump[0x34]; capPtr != 0; capPtr = addr.ConfigDump[capPtr+1] {
- /* Avoid hangs. There are only 0x100 different possible values for capPtr.
- If we iterate longer than that, we're in endless loop. */
- loopCtr++
- if loopCtr > 0x100 {
- break
- }
- if addr.ConfigDump[capPtr] == 0x0d {
- cur.SubVendor = GetLE16(addr.ConfigDump[capPtr+4 : capPtr+6])
- cur.SubSystem = GetLE16(addr.ConfigDump[capPtr+6 : capPtr+8])
- }
- }
- } else {
- cur.SubVendor = GetLE16(addr.ConfigDump[0x2c:0x2e])
- cur.SubSystem = GetLE16(addr.ConfigDump[0x2e:0x30])
- }
- unmatchedPCIDevices[addr.PCIAddr] = cur
-}
-
-func PutPCIDev(addr PCIDevData, comment string) {
- PutPCIDevParent(addr, comment, "")
-}
-
-type GenericPCI struct {
- Comment string
- Bus0Subdiv string
- MissingParent string
-}
-
-type GenericVGA struct {
- GenericPCI
-}
-
-type DSDTInclude struct {
- Comment string
- File string
-}
-
-type DSDTDefine struct {
- Key string
- Comment string
- Value string
-}
-
-var DSDTIncludes []DSDTInclude
-var DSDTPCI0Includes []DSDTInclude
-var DSDTDefines []DSDTDefine
-
-func (g GenericPCI) Scan(ctx Context, addr PCIDevData) {
- PutPCIDevParent(addr, g.Comment, g.MissingParent)
-}
-
-var IGDEnabled bool = false
-
-func (g GenericVGA) Scan(ctx Context, addr PCIDevData) {
- KconfigString["VGA_BIOS_ID"] = fmt.Sprintf("%04x,%04x",
- addr.PCIVenID,
- addr.PCIDevID)
- PutPCIDevParent(addr, g.Comment, g.MissingParent)
- IGDEnabled = true
-}
-
-func makeKconfigName(ctx Context) {
- kn := Create(ctx, "Kconfig.name")
- defer kn.Close()
-
- fmt.Fprintf(kn, "config %s\n\tbool \"%s\"\n", ctx.KconfigName, ctx.Model)
-}
-
-func makeComment(name string) string {
- cmt, ok := KconfigComment[name]
- if !ok {
- return ""
- }
- return " # " + cmt
-}
-
-func makeKconfig(ctx Context) {
- kc := Create(ctx, "Kconfig")
- defer kc.Close()
-
- fmt.Fprintf(kc, "if %s\n\n", ctx.KconfigName)
-
- fmt.Fprintf(kc, "config BOARD_SPECIFIC_OPTIONS\n\tdef_bool y\n")
- keys := []string{}
- for name, val := range KconfigBool {
- if val {
- keys = append(keys, name)
- }
- }
-
- sort.Strings(keys)
-
- for _, name := range keys {
- fmt.Fprintf(kc, "\tselect %s%s\n", name, makeComment(name))
- }
-
- keys = nil
- for name, val := range KconfigBool {
- if !val {
- keys = append(keys, name)
- }
- }
-
- sort.Strings(keys)
-
- for _, name := range keys {
- fmt.Fprintf(kc, `
-config %s%s
- bool
- default n
-`, name, makeComment(name))
- }
-
- keys = nil
- for name, _ := range KconfigString {
- keys = append(keys, name)
- }
-
- sort.Strings(keys)
-
- for _, name := range keys {
- fmt.Fprintf(kc, `
-config %s%s
- string
- default "%s"
-`, name, makeComment(name), KconfigString[name])
- }
-
- keys = nil
- for name, _ := range KconfigHex {
- keys = append(keys, name)
- }
-
- sort.Strings(keys)
-
- for _, name := range keys {
- fmt.Fprintf(kc, `
-config %s%s
- hex
- default 0x%x
-`, name, makeComment(name), KconfigHex[name])
- }
-
- keys = nil
- for name, _ := range KconfigInt {
- keys = append(keys, name)
- }
-
- sort.Strings(keys)
-
- for _, name := range keys {
- fmt.Fprintf(kc, `
-config %s%s
- int
- default %d
-`, name, makeComment(name), KconfigInt[name])
- }
-
- fmt.Fprintf(kc, "endif\n")
-}
-
-const MoboDir = "/src/mainboard/"
-
-func makeVendor(ctx Context) {
- vendor := ctx.Vendor
- vendorSane := ctx.SaneVendor
- vendorDir := *FlagOutDir + MoboDir + vendorSane
- vendorUpper := strings.ToUpper(vendorSane)
- kconfig := vendorDir + "/Kconfig"
- if _, err := os.Stat(kconfig); os.IsNotExist(err) {
- f, err := os.Create(kconfig)
- if err != nil {
- log.Fatal(err)
- }
- defer f.Close()
- f.WriteString(`if VENDOR_` + vendorUpper + `
-
-choice
- prompt "Mainboard model"
-
-source "src/mainboard/` + vendorSane + `/*/Kconfig.name"
-
-endchoice
-
-source "src/mainboard/` + vendorSane + `/*/Kconfig"
-
-config MAINBOARD_VENDOR
- string
- default "` + vendor + `"
-
-endif # VENDOR_` + vendorUpper + "\n")
- }
- kconfigName := vendorDir + "/Kconfig.name"
- if _, err := os.Stat(kconfigName); os.IsNotExist(err) {
- f, err := os.Create(kconfigName)
- if err != nil {
- log.Fatal(err)
- }
- defer f.Close()
- f.WriteString(`config VENDOR_` + vendorUpper + `
- bool "` + vendor + `"
-`)
- }
-
-}
-
-func GuessECGPE(ctx Context) int {
- /* FIXME:XX Use iasl -d and/or better parsing */
- dsdt := ctx.InfoSource.GetACPI()["DSDT"]
- idx := bytes.Index(dsdt, []byte{0x08, '_', 'G', 'P', 'E', 0x0a}) /* Name (_GPE, byte). */
- if idx > 0 {
- return int(dsdt[idx+6])
- }
- return -1
-}
-
-func GuessSPDMap(ctx Context) []uint8 {
- dmi := ctx.InfoSource.GetDMI()
-
- if dmi.Vendor == "LENOVO" {
- return []uint8{0x50, 0x52, 0x51, 0x53}
- }
- return []uint8{0x50, 0x51, 0x52, 0x53}
-}
-
-func main() {
- flag.Parse()
-
- ctx := Context{}
-
- ctx.InfoSource = MakeLogReader()
-
- dmi := ctx.InfoSource.GetDMI()
-
- ctx.Vendor = dmi.Vendor
-
- if dmi.Vendor == "LENOVO" {
- ctx.Model = dmi.Version
- } else {
- ctx.Model = dmi.Model
- }
-
- if dmi.IsLaptop {
- KconfigBool["SYSTEM_TYPE_LAPTOP"] = true
- }
- ctx.SaneVendor = sanitize(ctx.Vendor)
- for {
- last := ctx.SaneVendor
- for _, suf := range []string{"_inc", "_co", "_corp"} {
- ctx.SaneVendor = strings.TrimSuffix(ctx.SaneVendor, suf)
- }
- if last == ctx.SaneVendor {
- break
- }
- }
- ctx.MoboID = ctx.SaneVendor + "/" + sanitize(ctx.Model)
- ctx.KconfigName = "BOARD_" + strings.ToUpper(ctx.SaneVendor+"_"+sanitize(ctx.Model))
- ctx.BaseDirectory = *FlagOutDir + MoboDir + ctx.MoboID
- KconfigString["MAINBOARD_DIR"] = ctx.MoboID
- KconfigString["MAINBOARD_PART_NUMBER"] = ctx.Model
-
- os.MkdirAll(ctx.BaseDirectory, 0700)
-
- makeVendor(ctx)
-
- ScanRoot(ctx)
-
- if IGDEnabled {
- KconfigBool["MAINBOARD_HAS_LIBGFXINIT"] = true
- KconfigComment["MAINBOARD_HAS_LIBGFXINIT"] = "FIXME: check this"
- AddRAMStageFile("gma-mainboard.ads", "CONFIG_MAINBOARD_USE_LIBGFXINIT")
- }
-
- if len(BootBlockFiles) > 0 || len(ROMStageFiles) > 0 || len(RAMStageFiles) > 0 || len(SMMFiles) > 0 {
- mf := Create(ctx, "Makefile.mk")
- defer mf.Close()
- writeMF(mf, BootBlockFiles, "bootblock")
- writeMF(mf, ROMStageFiles, "romstage")
- writeMF(mf, RAMStageFiles, "ramstage")
- writeMF(mf, SMMFiles, "smm")
- }
-
- devtree := Create(ctx, "devicetree.cb")
- defer devtree.Close()
-
- MatchDev(&DevTree)
- WriteDev(devtree, 0, "", DevTree)
-
- if MainboardInit != "" || MainboardEnable != "" || MainboardIncludes != nil {
- mainboard := Create(ctx, "mainboard.c")
- defer mainboard.Close()
- Add_gpl(mainboard)
- mainboard.WriteString("#include <device/device.h>\n")
- for _, include := range MainboardIncludes {
- mainboard.WriteString("#include <" + include + ">\n")
- }
- mainboard.WriteString("\n")
- if MainboardInit != "" {
- mainboard.WriteString(`static void mainboard_init(struct device *dev)
-{
-` + MainboardInit + "}\n\n")
- }
- if MainboardInit != "" || MainboardEnable != "" {
- mainboard.WriteString("static void mainboard_enable(struct device *dev)\n{\n")
- if MainboardInit != "" {
- mainboard.WriteString("\tdev->ops->init = mainboard_init;\n\n")
- }
- mainboard.WriteString(MainboardEnable)
- mainboard.WriteString("}\n\n")
- mainboard.WriteString(`struct chip_operations mainboard_ops = {
- .enable_dev = mainboard_enable,
-};
-`)
- }
- }
-
- bi := Create(ctx, "board_info.txt")
- defer bi.Close()
-
- fixme := ""
-
- if dmi.IsLaptop {
- bi.WriteString("Category: laptop\n")
- } else {
- bi.WriteString("Category: desktop\n")
- fixme += "check category, "
- }
-
- missing := "ROM package, ROM socketed"
-
- if ROMProtocol != "" {
- fmt.Fprintf(bi, "ROM protocol: %s\n", ROMProtocol)
- } else {
- missing += ", ROM protocol"
- }
-
- if FlashROMSupport != "" {
- fmt.Fprintf(bi, "Flashrom support: %s\n", FlashROMSupport)
- } else {
- missing += ", Flashrom support"
- }
-
- missing += ", Release year"
-
- if fixme != "" {
- fmt.Fprintf(bi, "FIXME: %s, put %s\n", fixme, missing)
- } else {
- fmt.Fprintf(bi, "FIXME: put %s\n", missing)
- }
-
- if ROMSizeKB == 0 {
- KconfigBool["BOARD_ROMSIZE_KB_2048"] = true
- KconfigComment["BOARD_ROMSIZE_KB_2048"] = "FIXME: correct this"
- } else {
- KconfigBool[fmt.Sprintf("BOARD_ROMSIZE_KB_%d", ROMSizeKB)] = true
- }
-
- makeKconfig(ctx)
- makeKconfigName(ctx)
-
- dsdt := Create(ctx, "dsdt.asl")
- defer dsdt.Close()
-
- for _, define := range DSDTDefines {
- if define.Comment != "" {
- fmt.Fprintf(dsdt, "\t/* %s. */\n", define.Comment)
- }
- dsdt.WriteString("#define " + define.Key + " " + define.Value + "\n")
- }
-
- Add_gpl(dsdt)
- dsdt.WriteString(
- `
-#include <acpi/acpi.h>
-
-DefinitionBlock(
- "dsdt.aml",
- "DSDT",
- ACPI_DSDT_REV_2,
- OEM_ID,
- ACPI_TABLE_CREATOR,
- 0x20141018 /* OEM revision */
-)
-{
- #include <acpi/dsdt_top.asl>
- #include "acpi/platform.asl"
-`)
-
- for _, x := range DSDTIncludes {
- if x.Comment != "" {
- fmt.Fprintf(dsdt, "\t/* %s. */\n", x.Comment)
- }
- fmt.Fprintf(dsdt, "\t#include <%s>\n", x.File)
- }
-
- dsdt.WriteString(`
- Device (\_SB.PCI0)
- {
-`)
- for _, x := range DSDTPCI0Includes {
- if x.Comment != "" {
- fmt.Fprintf(dsdt, "\t/* %s. */\n", x.Comment)
- }
- fmt.Fprintf(dsdt, "\t\t#include <%s>\n", x.File)
- }
- dsdt.WriteString(
- ` }
-}
-`)
-
- if IGDEnabled {
- gma := Create(ctx, "gma-mainboard.ads")
- defer gma.Close()
-
- gma.WriteString(`-- SPDX-License-Identifier: GPL-2.0-or-later
-
-with HW.GFX.GMA;
-with HW.GFX.GMA.Display_Probing;
-
-use HW.GFX.GMA;
-use HW.GFX.GMA.Display_Probing;
-
-private package GMA.Mainboard is
-
- -- FIXME: check this
- ports : constant Port_List :=
- (DP1,
- DP2,
- DP3,
- HDMI1,
- HDMI2,
- HDMI3,
- Analog,
- LVDS,
- eDP);
-
-end GMA.Mainboard;
-`)
- }
-}
diff --git a/util/autoport/rce823.go b/util/autoport/rce823.go
deleted file mode 100644
index 7c921093..00000000
--- a/util/autoport/rce823.go
+++ /dev/null
@@ -1,39 +0,0 @@
-package main
-
-import "fmt"
-
-type rce823 struct {
- variant string
-}
-
-func (r rce823) Scan(ctx Context, addr PCIDevData) {
- if addr.Dev == 0 && addr.Func == 0 {
- cur := DevTreeNode{
- Chip: "drivers/ricoh/rce822",
- Comment: "Ricoh cardreader",
- Registers: map[string]string{
-
- "sdwppol": fmt.Sprintf("%d", (addr.ConfigDump[0xfb]&2)>>1),
- "disable_mask": fmt.Sprintf("0x%x", addr.ConfigDump[0xcb]),
- },
- PCISlots: []PCISlot{
- PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 0}, writeEmpty: false},
- PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 1}, writeEmpty: false},
- PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 2}, writeEmpty: false},
- PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 3}, writeEmpty: false},
- PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 4}, writeEmpty: false},
- PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 5}, writeEmpty: false},
- PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 6}, writeEmpty: false},
- PCISlot{PCIAddr: PCIAddr{Bus: addr.Bus, Dev: 0x0, Func: 7}, writeEmpty: false},
- },
- }
- PutPCIChip(addr, cur)
- }
- PutPCIDev(addr, "Ricoh SD card reader")
- KconfigBool["DRIVERS_RICOH_RCE822"] = true
-}
-
-func init() {
- RegisterPCI(0x1180, 0xe822, rce823{})
- RegisterPCI(0x1180, 0xe823, rce823{})
-}
diff --git a/util/autoport/readme.md b/util/autoport/readme.md
deleted file mode 100644
index b546120f..00000000
--- a/util/autoport/readme.md
+++ /dev/null
@@ -1,457 +0,0 @@
-# Porting coreboot using autoport
-
-## Supported platforms
-
-### Chipset
-For any Sandy Bridge or Ivy Bridge platform the generated result should
-be bootable, possibly with minor fixes.
-
-### EC / SuperIO
-EC support is likely to work on Intel-based thinkpads. Other laptops are
-likely to miss EC support. SuperIO support on desktops is more likely to
-work out of the box than any EC.
-
-## How to use autoport
-
-Enable as many devices as possible in the firmware setup of your system.
-This is useful to detect as many devices as possible and make the port
-more complete, as disabled devices cannot be detected.
-
-Boot into target machine under any Linux-based distribution and install
-the following tools on it:
-* `gcc`
-* `golang`
-* `lspci`
-* `dmidecode`
-* `acpidump` (part of `acpica` on some distros)
-
-Clone the coreboot tree and `cd` into it. For more detailed steps, refer
-to Rookie Guide, Lesson 1. Afterwards, run these commands:
-
- cd util/ectool
- make
- cd ../inteltool
- make
- cd ../superiotool
- make
- cd ../autoport
- go build
- sudo ./autoport --input_log=logs --make_logs --coreboot_dir=../..
-
- Note: in case you have problems getting gcc and golang on the target
- machine, you can compile the utilities on another computer and copy
- the binaries to the target machine. You will still need the other
- listed programs on the target machine, but you may place them in the
- same directory as autoport.
-
-Check for unknown detected PCI devices, e.g.:
-
- Unknown PCI device 8086:0085, assuming removable
-
-If autoport says `assuming removable`, you are fine. If it doesn't,
-you may want to add the relevant PCI IDs to autoport. Run `lspci -nn`
-and check which device this is using the PCI ID. Devices which are not
-part of the chipset, such as GPUs or network cards, can be considered
-removable, whereas devices inside the CPU or the PCH such as integrated
-GPUs and bus controllers (SATA, USB, LPC, SMBus...) are non-removable.
-
-Your board has now been added to the tree. However, do not flash it
-in its current state. It can brick your machine. Instead, keep this
-new port and the logs from `util/autoport/logs` somewhere safe. The
-following steps will back up your current firmware, which is always
-recommended, since coreboot may not boot on the first try.
-
-Disassemble your computer and find the flash chip(s). Since there could be
-more than one, this guide will refer to "flash chips" as one or more chips.
-Refer to <https://flashrom.org/Technology> as a reference. The flash chip is
-usually in a `SOIC-8` (2x4 pins, 200mil) or `SOIC-16` (2x8 pins) package. As
-it can be seen on flashrom's wiki, the former package is like any other 8-pin
-chip on the mainboard, but it is slightly larger. The latter package is much
-easier to locate. Always make sure it is a flash chip by looking up what its
-model, printed on it, refers to.
-
-There may be a smaller flash chip for the EC on some laptops, and other chips
-such as network cards may use similar flash chips. These should be left as-is.
-If in doubt, ask!
-
-Once located, use an external flasher to read the flash chips with `flashrom -r`.
-Verify with `flashrom -v` several times that reading is consistent. If it is not,
-troubleshoot your flashing setup. Save the results somewhere safe, preferably on
-media that cannot be easily overwritten and on several devices. You may need this
-later. The write process erases the flash chips first, and erased data on a flash
-chip is lost for a very long time, usually forever!
-
-Compile coreboot for your ported mainboard with some console enabled. The most
-common ones are EHCI debug, serial port and SPI flash console as a last resort.
-If your system is a laptop and has a dedicated video card, you may need to add
-a video BIOS (VBIOS) to coreboot to be able to see any video output. Desktop
-video cards, as well as some MXM video cards, have this VBIOS on a flash chip
-on the card's PCB, so this step is not necessary for them.
-
-Flash coreboot on the machine. On recent Intel chipsets, the flash space is split
-in several regions. Only the one known as "BIOS region" should be flashed. If
-there is only one flash chip present, this is best done by adding the `--ifd`
-and `-i bios` parameters flashrom has (from v1.0 onwards) to specify what flash
-descriptor region it should operate on. If the ME (Management Engine) region is
-not readable, which is the case on most systems, use the `--noverify-all`
-parameter as well.
-
-For systems with two flash chips, this is not so easy. It is probably better to
-ask in coreboot or flashrom communication channels, such as via IRC or on the
-mailing lists.
-
-Once flashed, try to boot. Anything is possible. If a log is generated, save it
-and use it to address any issues. See the next section for useful information.
-Find all the sections marked with `FIXME` and correct them.
-
-Send your work to review.coreboot.org. I mean it, your effort is very appreciated.
-Refer to Rookie Guide, Lesson 2 for instructions on how to submit a patch.
-
-## Manual fixes
-### SPD
-In order to initialize the RAM memory, coreboot needs to know its timings, which vary between
-modules. Socketed RAM has a small EEPROM chip, which is accessible via SMBus and contains the
-timing data. This data is usually known as SPD. Unfortunately, the SMBus addresses may not
-correlate with the RAM slots and cannot always be detected automatically. The address map is
-encoded in function `mainboard_get_spd` in `romstage.c`. By default, autoport uses the most
-common map `0x50, 0x51, 0x52, 0x53` on everything except for Lenovo systems, which are known
-to use `0x50, 0x52, 0x51, 0x53`. To detect the correct memory map, the easiest way is to boot
-on the vendor firmware with just one module in channel 0, slot 0, and check the SMBus address
-the EEPROM has. Under Linux, you can use these commands to see what is on SMBus:
-
- $ sudo modprobe i2c-dev
- $ sudo modprobe i2c-i801
- $ sudo i2cdetect -l
- i2c-0 i2c i915 gmbus ssc I2C adapter
- i2c-1 i2c i915 gmbus vga I2C adapter
- i2c-2 i2c i915 gmbus panel I2C adapter
- i2c-3 i2c i915 gmbus dpc I2C adapter
- i2c-4 i2c i915 gmbus dpb I2C adapter
- i2c-5 i2c i915 gmbus dpd I2C adapter
- i2c-6 i2c DPDDC-B I2C adapter
- i2c-7 i2c DPDDC-C I2C adapter
- i2c-8 i2c DPDDC-D I2C adapter
- i2c-9 smbus SMBus I801 adapter at 0400 SMBus adapter
-
- $ sudo i2cdetect 9
- WARNING! This program can confuse your I2C bus, cause data loss and worse!
- I will probe file /dev/i2c-9.
- I will probe address range 0x03-0x77.
- Continue? [Y/n] y
- 0 1 2 3 4 5 6 7 8 9 a b c d e f
- 00: -- -- -- -- -- 08 -- -- -- -- -- -- --
- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
- 20: -- -- -- -- 24 -- -- -- -- -- -- -- -- -- -- --
- 30: 30 31 -- -- -- -- -- -- -- -- -- -- -- -- -- --
- 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
- 50: 50 -- -- -- 54 55 56 57 -- -- -- -- 5c 5d 5e 5f
- 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
- 70: -- -- -- -- -- -- -- --
-
-Make sure to replace the `9` on the last command with the bus number for SMBus on
-your system. Here, there is a module at address `0x50`. Since only one module was
-installed on the first slot of the first channel, we know the first position of
-the SPD array must be `0x50`. After testing all the slots, your `mainboard_get_spd`
-should look similar to this:
-
- void mainboard_get_spd(spd_raw_data *spd) {
- read_spd(&spd[0], 0x50);
- read_spd(&spd[1], 0x51);
- read_spd(&spd[2], 0x52);
- read_spd(&spd[3], 0x53);
- }
-
-Note that there should be one line per memory slot on the mainboard.
-
-Note: slot labelling may be missing or unreliable. Use `inteltool` to see
-which slots have modules in them.
-
-This procedure is ideal, if your RAM is socketed. If you have soldered RAM,
-remove any socketed memory modules and check if any EEPROM appears on SMBus.
-If this is the case, you can proceed as if the RAM was socketed. However,
-you may have to guess some entries if there multiple EEPROMs appear.
-
-Most of the time, soldered RAM does not have an EEPROM. Instead, the SPD data is
-inside the main flash chip where the firmware is. If this is the case, you need
-to generate the SPD data to use with coreboot. Look at `inteltool.log`. There
-should be something like this:
-
- /* SPD matching current mode: */
- /* CH0S0 */
- 00: 92 11 0b 03 04 00 00 09 03 52 01 08 0a 00 80 00
- 10: 6e 78 6e 32 6e 11 18 81 20 08 3c 3c 00 f0 00 00
- 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 65 00
- 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6d 17
- 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- /* CH1S0 */
- 00: 92 11 0b 03 04 00 00 09 03 52 01 08 0a 00 80 00
- 10: 6e 78 6e 32 6e 11 18 81 20 08 3c 3c 00 f0 00 00
- 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 65 00
- 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6d 17
- 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
-
-This is not a full-fledged SPD dump, as it only lists
-the currently-used speed configuration, and lacks info
-such as a serial number, vendor and model. Use `xxd`
-to create a binary file with this SPD data:
-
- $ cat | xxd -r > spd.bin <<EOF
- 00: 92 11 0b 03 04 00 00 09 03 52 01 08 0a 00 80 00
- 10: 6e 78 6e 32 6e 11 18 81 20 08 3c 3c 00 f0 00 00
- 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 65 00
- 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6d 17
- 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- EOF (press Ctrl + D)
-
-Then, move the generated file into your mainboard's directory
-and hook it up to the build system by adding the following
-lines to `Makefile.mk`:
-
- cbfs-files-y += spd.bin
- spd.bin-file := spd.bin
- spd.bin-type := raw
-
-Now we need coreboot to use this SPD file. The following example
-shows a hybrid configuration, in which one module is soldered and
-the other one is socketed:
-
- void mainboard_get_spd(spd_raw_data *spd)
- {
- void *spd_file;
- size_t spd_file_len = 0;
- /* C0S0 is a soldered RAM with no real SPD. Use stored SPD. */
- spd_file = cbfs_boot_map_with_leak("spd.bin", CBFS_TYPE_RAW,
- &spd_file_len);
- if (spd_file && spd_file_len >= 128)
- memcpy(&spd[0], spd_file, 128);
-
- /* C1S0 is a physical slot. */
- read_spd(&spd[2], 0x52);
- }
-
-If several slots are soldered there are two ways to handle them:
-
-* If all use the same SPD data, use the same file for all the slots. Do
- not forget to copy the data on all the array elements that need it.
-* If they use different data, use several files.
-
-If memory initialization is not working, in particular write training (timB)
-on DIMM's second rank fails, try enabling rank 1 mirroring, which can't be
-detected by inteltool. It is described by SPD field "Address Mapping from Edge
-Connector to DRAM", byte `63` (`0x3f`). Bit 0 describes Rank 1 Mapping,
-0 = standard, 1 = mirrored; set it to 1. Bits 1-7 are reserved.
-
-### `board_info.txt`
-
-`board_info.txt` is a text file used in the board status page to list all
-the supported boards and their specifications. Most of the information
-cannot be detected by autoport. Common entries are:
-
-* `ROM package`, `ROM protocol` and `ROM socketed`:
- These refer to the flash chips you found earlier. You can visit
- <https://flashrom.org/Technology> for more information.
-
-* `Release year`: Use the power of Internet to find that information.
-* `Category`: This describes the type of mainboard you have.
- Valid categories are:
- * `desktop`. Desktops and workstations.
- * `server`. Servers.
- * `laptop`. Laptops, notebooks and netbooks.
- * `half`. Embedded / PC/104 / Half-size boards.
- * `mini`. Mini-ITX / Micro-ITX / Nano-ITX
- * `settop`. Set-top-boxes / Thin clients.
- * `eval`. Development / Evaluation Boards.
- * `sbc`. Single-Board computer.
- * `emulation`: Virtual machines and emulators. May require especial care
- as they often behave differently from real counterparts.
- * `misc`. Anything not fitting the categories above. Not recommended.
-
-* `Flashrom support`: This means whether the internal programmer is usable.
- If flashing coreboot internally works, this should be set to `y`. Else,
- feel free to investigate why it is not working.
-
-### `USBDEBUG_HCD_INDEX`
-
-Which controller the most easily accessible USB debug port is. On Intel,
-1 is for `00:1d.0` and 2 is for `00:1a.0` (yes, it's reversed). Refer to
-<https://www.coreboot.org/EHCI_Debug_Port> for more info.
-
-If you are able to use EHCI debug without setting the HCD index manually,
-this is correct.
-
-### `BOARD_ROMSIZE_KB_2048`
-
-This parameter refers to the total size of the flash chips coreboot will be in.
-This value must be correct for S3 resume to work properly. This parameter also
-defines the size of the generated coreboot image, but that is not a major issue
-since tools like `dd` can be used to cut fragments of a coreboot image to flash
-on smaller chips.
-
-This should be detected automatically, but it may not be detected properly in
-some cases. If it was not detected, put the correct total size here to serve
-as a sane default when configuring coreboot.
-
-### `DRAM_RESET_GATE_GPIO`
-
-When the computer is suspended to RAM (ACPI S3), the RAM reset signal must not
-reach the RAM modules. Otherwise, the computer will not resume and any opened
-programs will be lost. This is done by powering down a MOSFET, which disconnects
-the reset signal from the RAM modules. Most manufacturers put this gate on GPIO
-60 but Lenovo is known to put it on GPIO 10. If suspending and resuming works,
-this value is correct. This can also be determined from the board's schematics.
-
-## GNVS
-
-`mainboard_fill_gnvs` sets values in GNVS, which then ACPI makes use of for
-various power-related functions. Normally, there is no need to modify it
-on laptops (desktops have no "lid"!) but it makes sense to proofread it.
-
-## `gfx.ndid` and `gfx.did`
-
-Those describe which video outputs are declared in ACPI tables.
-Normally, there is no need to have these values, but if you miss some
-non-standard video output, you can declare it there. Bit 31 is set to
-indicate the presence of the output. Byte 1 is the type and byte 0 is
-used for disambigution so that ID composed of byte 1 and 0 is unique.
-
-Types are:
-* 1 = VGA
-* 2 = TV
-* 3 = DVI
-* 4 = LCD
-
-## `c*_acpower` and `c*_battery`
-
-Which mwait states to match to which ACPI levels. Normally, there is no
-need to modify anything unless your device has very special power saving
-requirements.
-
-## `install_intel_vga_int15_handler`
-
-This is used with the Intel VGA BIOS, which is not the default option.
-It is more error-prone than open-source graphics initialization, so do
-not bother with this until your mainboard boots. This is a function
-which takes four parameters:
-1. Which type of LCD panel is connected.
-2. Panel fit.
-3. Boot display.
-4. Display type.
-
-Refer to `src/drivers/intel/gma/int15.h` to see which values can be used.
-For desktops, there is no LCD panel directly connected to the Intel GPU,
-so the first parameter should be `GMA_INT15_ACTIVE_LFP_NONE`. On other
-mainboards, it depends.
-
-## CMOS options
-
-Due to the poor state of CMOS support in coreboot, autoport does not
-support it and this probably won't change until the format in the tree
-improves. If you really care about CMOS options:
-
-* Create files `cmos.layout` and `cmos.default`
-* Enable `HAVE_OPTION_TABLE` and `HAVE_CMOS_DEFAULT` in `Kconfig`
-
-## EC (lenovo)
-
-You need to set `has_keyboard_backlight` (backlit keyboard like X230),
-`has_power_management_beeps` (optional beeps when e.g. plugging the cord
-in) and `has_uwb` (third MiniPCIe slot) in accordance to functions available
-on your machine
-
-In rare cases autoport is unable to detect GPE. You can detect it from
-dmesg or ACPI tables. Look for line in dmesg like
-
- ACPI: EC: GPE = 0x11, I/O: command/status = 0x66, data = 0x62
-
-This means that GPE is `0x11` in ACPI notation. This is the correct
-value for `THINKPAD_EC_GPE`. To get the correct value for `GPE_EC_SCI`
-you need to substract `0x10`, so value for it is `1`.
-
-The pin used to wake the machine from EC is guessed. If your machine doesn't
-wake on lid open and pressing of Fn, change `GPE_EC_WAKE`.
-
-Keep `GPE_EC_WAKE` and `GPE_EC_SCI` in sync with `gpi*_routing`.
-`gpi*_routing` matching `GPE_EC_WAKE` or `GPE_EC_SCI` is set to `2`
-and all others are absent.
-
-If your dock has LPC wires or needs some special treatement you may
-need to add codes to initialize the dock and support code to
-DSDT. See the `init_dock()` for `x60`, `x200` or `x201`.
-
-## EC (generic laptop)
-
-Almost any laptop has an embedded controller. In a nutshell, it's a
-small, low-powered computer designed to be used on laptops. Exact
-functionality differs between machines. Its main functions include:
-
-* Control of power and rfkill to different component
-* Keyboard (PS/2) interface implementation
-* Battery, AC, LID and thermal information exporting
-* Hotkey support
-
-autoport automatically attempts to restore the dumped config but it
-may or may not work and may even lead to a hang or powerdown. If your
-machine stops at `Replaying EC dump ...` try commenting EC replay out
-
-autoport tries to detect if machine has PS/2 interface and if so calls
-`pc_keyboard_init` and exports relevant ACPI objects. If detection fails
-you may have to add them yourself
-
-ACPI methods `_PTS` (prepare to sleep) and `_WAK` (wake) are executed
-when transitioning to sleep or wake state respectively. You may need to
-add power-related calls there to either shutdown some components or to
-add a workaround to stop giving OS thermal info until next refresh.
-
-For exporting the battery/AC/LID/hotkey/thermal info you need to write
-`acpi/ec.asl`. For an easy example look into `apple/macbook21` or
-`packardbell/ms2290`. For information about needed methods consult
-relevant ACPI specs. Tracing which EC events can be done using
-[dynamic debug](https://wiki.ubuntu.com/Kernel/Reference/ACPITricksAndTips)
-
-EC GPE needs to be routed to SCI in order for OS in order to receive
-EC events like "hotkey X pressed" or "AC plugged". autoport attempts
-to detect GPE but in rare cases may fail. You can detect it from
-dmesg or ACPI tables. Look for line in dmesg like
-
- ACPI: EC: GPE = 0x11, I/O: command/status = 0x66, data = 0x62
-
-This means that GPE is `0x11` in ACPI notation. This is the correct
-value for `_GPE`.
-
-Keep GPE in sync with `gpi*_routing`.
-`gpi*_routing` matching `GPE - 0x10` is set to `2`
-and all others are absent. If EC has separate wake pin
-then this GPE needs to be routed as well
diff --git a/util/autoport/root.go b/util/autoport/root.go
deleted file mode 100644
index 7e9e8145..00000000
--- a/util/autoport/root.go
+++ /dev/null
@@ -1,47 +0,0 @@
-package main
-
-import "fmt"
-import "os"
-
-var supportedPCIDevices map[uint32]PCIDevice = map[uint32]PCIDevice{}
-var PCIMap map[PCIAddr]PCIDevData = map[PCIAddr]PCIDevData{}
-
-func ScanRoot(ctx Context) {
- for _, pciDev := range ctx.InfoSource.GetPCIList() {
- PCIMap[pciDev.PCIAddr] = pciDev
- }
- for _, pciDev := range ctx.InfoSource.GetPCIList() {
- vendevid := (uint32(pciDev.PCIDevID) << 16) | uint32(pciDev.PCIVenID)
-
- dev, ok := supportedPCIDevices[vendevid]
- if !ok {
- if pciDev.PCIAddr.Bus != 0 {
- fmt.Printf("Unknown PCI device %04x:%04x, assuming removable\n",
- pciDev.PCIVenID, pciDev.PCIDevID)
- continue
- }
- fmt.Printf("Unsupported PCI device %04x:%04x\n",
- pciDev.PCIVenID, pciDev.PCIDevID)
- dev = GenericPCI{Comment: fmt.Sprintf("Unsupported PCI device %04x:%04x",
- pciDev.PCIVenID, pciDev.PCIDevID)}
- }
- dev.Scan(ctx, pciDev)
- }
- if SouthBridge == nil {
- fmt.Println("Could not detect southbridge. Aborting!")
- os.Exit(1)
- }
- dmi := ctx.InfoSource.GetDMI()
- if !dmi.IsLaptop {
- NoEC(ctx)
- } else if dmi.Vendor == "LENOVO" {
- LenovoEC(ctx)
- } else {
- FIXMEEC(ctx)
- }
-}
-
-func RegisterPCI(VenID uint16, DevID uint16, dev PCIDevice) {
- vendevid := (uint32(DevID) << 16) | uint32(VenID)
- supportedPCIDevices[vendevid] = dev
-}
diff --git a/util/autoport/sandybridge.go b/util/autoport/sandybridge.go
deleted file mode 100644
index bd7f0f0c..00000000
--- a/util/autoport/sandybridge.go
+++ /dev/null
@@ -1,93 +0,0 @@
-package main
-
-import "fmt"
-
-type sandybridgemc struct {
-}
-
-func (i sandybridgemc) Scan(ctx Context, addr PCIDevData) {
- inteltool := ctx.InfoSource.GetInteltool()
-
- /* FIXME:XX Move this somewhere else. */
- MainboardIncludes = append(MainboardIncludes, "drivers/intel/gma/int15.h")
- MainboardEnable += (` /* FIXME: fix these values. */
- install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
- GMA_INT15_PANEL_FIT_DEFAULT,
- GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
-`)
-
- DevTree = DevTreeNode{
- Chip: "northbridge/intel/sandybridge",
- MissingParent: "northbridge",
- Comment: "FIXME: GPU registers may not always apply.",
- Registers: map[string]string{
- "gpu_dp_b_hotplug": FormatInt32((inteltool.IGD[0xc4030] >> 2) & 7),
- "gpu_dp_c_hotplug": FormatInt32((inteltool.IGD[0xc4030] >> 10) & 7),
- "gpu_dp_d_hotplug": FormatInt32((inteltool.IGD[0xc4030] >> 18) & 7),
- "gpu_panel_port_select": FormatInt32((inteltool.IGD[0xc7208] >> 30) & 3),
- "gpu_panel_power_up_delay": FormatInt32((inteltool.IGD[0xc7208] >> 16) & 0x1fff),
- "gpu_panel_power_backlight_on_delay": FormatInt32(inteltool.IGD[0xc7208] & 0x1fff),
- "gpu_panel_power_down_delay": FormatInt32((inteltool.IGD[0xc720c] >> 16) & 0x1fff),
- "gpu_panel_power_backlight_off_delay": FormatInt32(inteltool.IGD[0xc720c] & 0x1fff),
- "gpu_panel_power_cycle_delay": FormatInt32(inteltool.IGD[0xc7210] & 0xff),
- "gpu_cpu_backlight": FormatHex32(inteltool.IGD[0x48254]),
- "gpu_pch_backlight": FormatHex32((inteltool.IGD[0xc8254] >> 16) * 0x10001),
- "gfx": fmt.Sprintf("GMA_STATIC_DISPLAYS(%d)", (inteltool.IGD[0xc6200] >> 12) & 1),
- },
- Children: []DevTreeNode{
- {
- Chip: "domain",
- Dev: 0,
- PCIController: true,
- ChildPCIBus: 0,
- PCISlots: []PCISlot{
- PCISlot{PCIAddr: PCIAddr{Dev: 0x0, Func: 0}, writeEmpty: true, alias: "host_bridge", additionalComment: "Host bridge"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x1, Func: 0}, writeEmpty: true, alias: "peg10", additionalComment: "PEG"},
- PCISlot{PCIAddr: PCIAddr{Dev: 0x2, Func: 0}, writeEmpty: true, alias: "igd", additionalComment: "iGPU"},
- },
- },
- },
- }
-
- PutPCIDev(addr, "Host bridge")
-
- /* FIXME:XX some configs are unsupported. */
- KconfigBool["NORTHBRIDGE_INTEL_SANDYBRIDGE"] = true
- KconfigBool["USE_NATIVE_RAMINIT"] = true
- KconfigBool["INTEL_INT15"] = true
- KconfigBool["HAVE_ACPI_TABLES"] = true
- KconfigBool["HAVE_ACPI_RESUME"] = true
-
- DSDTIncludes = append(DSDTIncludes, DSDTInclude{
- File: "cpu/intel/common/acpi/cpu.asl",
- })
-
- DSDTPCI0Includes = append(DSDTPCI0Includes, DSDTInclude{
- File: "northbridge/intel/sandybridge/acpi/sandybridge.asl",
- }, DSDTInclude{
- File: "drivers/intel/gma/acpi/default_brightness_levels.asl",
- })
-}
-
-func init() {
- RegisterPCI(0x8086, 0x0100, sandybridgemc{})
- RegisterPCI(0x8086, 0x0104, sandybridgemc{})
- RegisterPCI(0x8086, 0x0150, sandybridgemc{})
- RegisterPCI(0x8086, 0x0154, sandybridgemc{})
- RegisterPCI(0x8086, 0x0158, sandybridgemc{})
- for _, id := range []uint16{
- 0x0102, 0x0106, 0x010a,
- 0x0112, 0x0116, 0x0122, 0x0126,
- 0x0152, 0x0156, 0x0162, 0x0166,
- } {
- RegisterPCI(0x8086, id, GenericVGA{GenericPCI{}})
- }
-
- /* PCIe bridge */
- for _, id := range []uint16{
- 0x0101, 0x0105, 0x0109, 0x010d,
- 0x0151, 0x0155, 0x0159, 0x015d,
- } {
- RegisterPCI(0x8086, id, GenericPCI{})
- }
-}