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Updated to coreboot revision:
8ce4c91c41da3f042979f92095149a85bc93227d
Up to date as of 18 September 2026.
crossgcc tarballs updated (subfiles), and their versions:
* update to acpica 20251212
* update to binutils 2.46.1
* update to gcc 15.2.0
* update to mpc 1.4.1
* update to nasm 3.02
submodules updated (git repos), and their new revisions:
* arm-trusted-firmware b5eaba47efc5e4e3029086d5c25eee0e8dbb0129
* fsp 98426bfd958eb7397c474ff5d440dc9a1d146215
* intel-microcode 927e65c8d5a6e4ec05cc74b1778283ab2284d0c1
* libgfxinit 6e74c703132a8b4af4354a5158f286dc8f2407ab
* libhwbase 61f7287f18b249408a79bf9ab5e72568965cca2c
* vboot 5c360ef458b0a013d8a6d47724bb0fffb5accbcf
Signed-off-by: Leah Rowe <leah@libreboot.org>
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this mitigates buggy video converters e.g. displayport
to hdmi, where sometimes the display doesn't come up.
sometimes you have to probe them twice. this is apparently
what linux does, according to nicholas chin's interpretation.
this is a really quick and dirty patch that worked for
Noisytoot on IRC, tested on their Dell OptiPlex 5050 SFF
which they are porting; the port otherwise works, and this
patch enables them to use their displayport adapter.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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The libgfxinit patch and other patches e.g. DDR2 fix, are
now provided in coreboot/default. The Latitude E6400 is now
using the newer coreboot revision from late July 2024.
Some other configs had to change because of this, relating to
the new way that Nicholas handles timing on LVDS displays
with the E6400 port; a default 96MHz clock is still used for
pixel reference clock, overridden with a value of 100MHz on
other GM45 machines, where 96MHz was previously hardcoded.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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