1 files changed, 63 insertions, 0 deletions
diff --git a/config/seabios/default/patches/0004-ahci-Only-reset-controller-on-CSM.patch b/config/seabios/default/patches/0004-ahci-Only-reset-controller-on-CSM.patch
new file mode 100644
index 00000000..43f2b8a9
--- /dev/null
+++ b/config/seabios/default/patches/0004-ahci-Only-reset-controller-on-CSM.patch
@@ -0,0 +1,63 @@
+From 5fe2215bc5196d836b54e1e5fb00b63fa096fda7 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Thu, 1 May 2025 15:46:54 +0100
+Subject: [PATCH 4/4] ahci: Only reset controller on CSM
+
+Please refer to this commit:
+
+commit 8863cbbd15a73b03153553c562f5b1fb939ad4d7
+Author: Gerd Hoffmann <kraxel@redhat.com>
+Date:   Thu Feb 6 12:10:21 2025 +0100
+
+    ahci: add controller reset
+
+This commit broke AHCI init on the Lenovo ThinkPad T420,
+when tested with SeaBIOS as a coreboot payload.
+
+Since the above commit was made with CSMs in mind, to make
+the AHCI driver work there, that change has been re-worked
+so as to only apply when a CSM is in use.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/hw/ahci.c | 17 ++++++++++++++---
+ 1 file changed, 14 insertions(+), 3 deletions(-)
+
+diff --git a/src/hw/ahci.c b/src/hw/ahci.c
+index 2285d33d..b09b198a 100644
+--- a/src/hw/ahci.c
++++ b/src/hw/ahci.c
+@@ -637,7 +637,7 @@ static void
+ ahci_controller_setup(struct pci_device *pci)
+ {
+     struct ahci_port_s *port;
+-    u32 pnr, max;
++    u32 val, pnr, max;
+ 
+     if (create_bounce_buf() < 0)
+         return;
+@@ -660,8 +660,19 @@ ahci_controller_setup(struct pci_device *pci)
+ 
+     pci_enable_busmaster(pci);
+ 
+-    ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_RESET);
+-    ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_AHCI_EN);
++    /* AHCI controller reset, but only for CSM. Commit 8863cbbd
++       introduced this universally, to make AHCI drivers work in
++       CSM mode, but it broke AHCI setup on the ThinkPad T420 when
++       SeaBIOS is used as a coreboot payload, hence the else clause: */
++    if (CONFIG_CSM) {
++        /* Enable AHCI controller after resetting its state */
++        ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_RESET);
++        ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_AHCI_EN);
++    } else {
++        /* Enable AHCI controller from its current state */
++        val = ahci_ctrl_readl(ctrl, HOST_CTL);
++        ahci_ctrl_writel(ctrl, HOST_CTL, val | HOST_CTL_AHCI_EN);
++    }
+ 
+     ctrl->caps = ahci_ctrl_readl(ctrl, HOST_CAP);
+     ctrl->ports = ahci_ctrl_readl(ctrl, HOST_PORTS_IMPL);
+-- 
+2.39.5
+