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-rw-r--r--config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch12
-rw-r--r--config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch6
-rw-r--r--config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch6
-rw-r--r--config/seabios/default/patches/0004-ahci-Only-reset-controller-on-CSM.patch63
-rw-r--r--config/seabios/default/target.cfg2
5 files changed, 76 insertions, 13 deletions
diff --git a/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch b/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
index 2c042776..dc1464bb 100644
--- a/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
+++ b/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch
@@ -1,7 +1,7 @@
-From 2aff8adc1dcd1315877fdb4ac4ef5e649c5b7d11 Mon Sep 17 00:00:00 2001
+From 04e972e14191f3a480e569e972c195ba8eb53a30 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Sat, 10 Feb 2024 21:23:33 +0200
-Subject: [PATCH 1/2] romfile: implement a generic loader
+Subject: [PATCH 1/4] romfile: implement a generic loader
romfile_loadfile_g:
Based on romfile_loadfile but more flexible. User has to supply pointer
@@ -18,7 +18,7 @@ Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
2 files changed, 22 insertions(+), 5 deletions(-)
diff --git a/src/romfile.c b/src/romfile.c
-index b598274edc09..8ccf5139ece8 100644
+index 8072a915..f4d5f82d 100644
--- a/src/romfile.c
+++ b/src/romfile.c
@@ -47,10 +47,12 @@ romfile_find(const char *name)
@@ -69,7 +69,7 @@ index b598274edc09..8ccf5139ece8 100644
}
diff --git a/src/romfile.h b/src/romfile.h
-index 3e0f820047dd..1b967d86551f 100644
+index ae2f4ac7..f62b2fee 100644
--- a/src/romfile.h
+++ b/src/romfile.h
@@ -13,6 +13,8 @@ struct romfile_s {
@@ -80,7 +80,7 @@ index 3e0f820047dd..1b967d86551f 100644
+ void *(*malloc_fn)(u32), int add_len);
void *romfile_loadfile(const char *name, int *psize);
u64 romfile_loadint(const char *name, u64 defval);
-
+ u32 romfile_loadbool(const char *name, u32 defval);
--
-2.43.0
+2.39.5
diff --git a/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch b/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch
index f05a34c2..5224d768 100644
--- a/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch
+++ b/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch
@@ -1,7 +1,7 @@
-From 1e7c443d069ef817c4e699bd6675efff4ebddb86 Mon Sep 17 00:00:00 2001
+From 270ac30b862c58c69455dbdace716044d29b20e2 Mon Sep 17 00:00:00 2001
From: Riku Viitanen <riku.viitanen@protonmail.com>
Date: Sat, 10 Feb 2024 21:38:17 +0200
-Subject: [PATCH 2/2] vgahooks, optionroms: implement mxm 3.0 interrupts
+Subject: [PATCH 2/4] vgahooks, optionroms: implement mxm 3.0 interrupts
VGAROMs on MXM graphics cards need certain int15h functions present.
@@ -184,5 +184,5 @@ index 00000000..f0c203af
+
+#endif // vgahooks.h
--
-2.43.0
+2.39.5
diff --git a/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
index bff93e9d..acde7f20 100644
--- a/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
+++ b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch
@@ -1,7 +1,7 @@
-From ebd8293eb1af20c204beb3aa1394865185e2f3f0 Mon Sep 17 00:00:00 2001
+From cc6b13ddea9086586d34621d0b82d820af5ae785 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 6 Jan 2025 18:49:58 +0000
-Subject: [PATCH 1/1] Print the Libreboot version in the SeaBIOS menu
+Subject: [PATCH 3/4] Print the Libreboot version in the SeaBIOS menu
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
@@ -9,7 +9,7 @@ Signed-off-by: Leah Rowe <leah@libreboot.org>
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/bootsplash.c b/src/bootsplash.c
-index 538b316d..8746098c 100644
+index 538b316d..9eed0b12 100644
--- a/src/bootsplash.c
+++ b/src/bootsplash.c
@@ -48,7 +48,7 @@ enable_vga_console(void)
diff --git a/config/seabios/default/patches/0004-ahci-Only-reset-controller-on-CSM.patch b/config/seabios/default/patches/0004-ahci-Only-reset-controller-on-CSM.patch
new file mode 100644
index 00000000..43f2b8a9
--- /dev/null
+++ b/config/seabios/default/patches/0004-ahci-Only-reset-controller-on-CSM.patch
@@ -0,0 +1,63 @@
+From 5fe2215bc5196d836b54e1e5fb00b63fa096fda7 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Thu, 1 May 2025 15:46:54 +0100
+Subject: [PATCH 4/4] ahci: Only reset controller on CSM
+
+Please refer to this commit:
+
+commit 8863cbbd15a73b03153553c562f5b1fb939ad4d7
+Author: Gerd Hoffmann <kraxel@redhat.com>
+Date: Thu Feb 6 12:10:21 2025 +0100
+
+ ahci: add controller reset
+
+This commit broke AHCI init on the Lenovo ThinkPad T420,
+when tested with SeaBIOS as a coreboot payload.
+
+Since the above commit was made with CSMs in mind, to make
+the AHCI driver work there, that change has been re-worked
+so as to only apply when a CSM is in use.
+
+Signed-off-by: Leah Rowe <leah@libreboot.org>
+---
+ src/hw/ahci.c | 17 ++++++++++++++---
+ 1 file changed, 14 insertions(+), 3 deletions(-)
+
+diff --git a/src/hw/ahci.c b/src/hw/ahci.c
+index 2285d33d..b09b198a 100644
+--- a/src/hw/ahci.c
++++ b/src/hw/ahci.c
+@@ -637,7 +637,7 @@ static void
+ ahci_controller_setup(struct pci_device *pci)
+ {
+ struct ahci_port_s *port;
+- u32 pnr, max;
++ u32 val, pnr, max;
+
+ if (create_bounce_buf() < 0)
+ return;
+@@ -660,8 +660,19 @@ ahci_controller_setup(struct pci_device *pci)
+
+ pci_enable_busmaster(pci);
+
+- ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_RESET);
+- ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_AHCI_EN);
++ /* AHCI controller reset, but only for CSM. Commit 8863cbbd
++ introduced this universally, to make AHCI drivers work in
++ CSM mode, but it broke AHCI setup on the ThinkPad T420 when
++ SeaBIOS is used as a coreboot payload, hence the else clause: */
++ if (CONFIG_CSM) {
++ /* Enable AHCI controller after resetting its state */
++ ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_RESET);
++ ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_AHCI_EN);
++ } else {
++ /* Enable AHCI controller from its current state */
++ val = ahci_ctrl_readl(ctrl, HOST_CTL);
++ ahci_ctrl_writel(ctrl, HOST_CTL, val | HOST_CTL_AHCI_EN);
++ }
+
+ ctrl->caps = ahci_ctrl_readl(ctrl, HOST_CAP);
+ ctrl->ports = ahci_ctrl_readl(ctrl, HOST_PORTS_IMPL);
+--
+2.39.5
+
diff --git a/config/seabios/default/target.cfg b/config/seabios/default/target.cfg
index 9ff1db3e..92b906f2 100644
--- a/config/seabios/default/target.cfg
+++ b/config/seabios/default/target.cfg
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-3.0-or-later
tree="default"
-rev="1602647f1be24fe63d11138d802e735c8e674e63"
+rev="9029a010ec413e6c3c0eb52c29c252a5b9a9f774"