NEW MAINBOARD: HP EliteBook 820 G2

This is of Broadwell platform, one generation above Haswell.

Of note: this uses HP Sure Start. Although the flash is 16MB,
our CBFS section (and IFD configuration) assumes 12MB flash,
so the final 4MB will be left unflashed on installation,
after blanking the private flash. The coreboot documents have
more information about this.

Some minor design changes in lbmk were made, to accomodate
this port:

Support for extracting refcode binaries added (pulled from
Google recovery images). The refcode file is an ELF that
initialises the MRC and the PCH. It is also responsible for
enabling or disabling the Intel GbE device, where Google
does not enable it, but lbmk modifies it per the instructions
on the coreboot documentation, so as to enable Intel GbE.

Google's recovery image stores the refcode as a stage file,
but coreboot changed the format (for CBFS files) after 4.13
so coreboot 4.13's cbfstool is used to extract refcode. This
realisation made me also change the script logic to use a
cbfstool and ifdtool version matching the coreboot tree, for
all parts of lbmk, whereas lbmk previously used only the
default tree for cbfstool/ifdtool, on insertion and deletion
of vendor files - it was 81dc20e744 that broke extraction of
refcode on google's recovery images, where google used an older
version of cbfstool to insert the files in their coreboot ROMs.
A further backported patch has been added, copying coreboot
revision f22f408956 which is a build fix from Nico Huber.

Iru Cai submitted an ACPI bugfix after the revision lbmk
currently uses, for coreboot/default, and this fix is
needed for rebooting to work on Linux 6.1 or higher. This
patch has been backported to lbmk, while it still uses the
same October 2023 revision of coreboot.

Broadwell MRC is inserted at the same offset as Haswell,
so I didn't need to tweak that.

Signed-off-by: Leah Rowe <leah@libreboot.org>

2 files changed, 42 insertions, 2 deletions

diff --git a/include/mrc.sh b/include/mrc.sh
index 6a9b0a12..32c68a83 100755
--- a/include/mrc.sh
+++ b/include/mrc.sh
@@ -1,11 +1,25 @@
 # SPDX-License-Identifier: GPL-2.0-only
 
 # Logic based on util/chromeos/crosfirmware.sh in coreboot cfc26ce278.
-# Modifications in this version are Copyright 2021 and 2023 Leah Rowe.
+# Modifications in this version are Copyright 2021, 2023 and 2024 Leah Rowe.
 # Original copyright detailed in repo: https://review.coreboot.org/coreboot/
 
 eval "$(setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL)"
 
+extract_ref()
+{
+	# refcode needed on broadwell, but not needed on haswell
+
+	# we check mrc twice, because each check only verifies one file,
+	# but refcode is downloaded alongside mrc. in cases where lbmk
+	# erred, downloading only mrc, we must ensure downloading refcode
+	[ -n "$CONFIG_MRC_FILE" ] || \
+		err "extract_ref $board: CONFIG_MRC_FILE not defined"
+
+	# the extract_mrc function actually downloads the refcode
+	fetch "mrc" "$MRC_url" "$MRC_url_bkup" "$MRC_hash" "$CONFIG_MRC_FILE"
+}
+
 extract_mrc()
 {
 	[ -z "$MRC_board" ] && err "extract_mrc $MRC_hash: MRC_board not set"
@@ -22,6 +36,8 @@ extract_mrc()
 
 	"${cbfstool}" "${appdir}/"bios.bin extract -n mrc.bin \
 	    -f "$_dest" -r RO_SECTION || err "extract_mrc: cbfstool $_dest"
+
+	[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && extract_refcode; return 0
 }
 
 extract_partition()
@@ -40,3 +56,26 @@ extract_partition()
 	printf "cd /usr/sbin\ndump chromeos-firmwareupdate ${SHELLBALL}\nquit" \
 	    | debugfs "root-a.ext2" || err "can't extract shellball"
 }
+
+extract_refcode()
+{
+	_refdest="${CONFIG_REFCODE_BLOB_FILE##*../}"
+	[ -f "$_refdest" ] && return 0
+
+	# cbfstool changed the attributes scheme for stage files,
+	# incompatible with older versions before coreboot 4.14,
+	# so we need coreboot 4.13 cbfstool for certain refcode files
+	[ -n "$cbfstoolref" ] || \
+		err "extract_refcode $board: MRC_refcode_cbtree not set"
+	mkdir -p "${_refdest%/*}" || \
+	    err "extract_refcode $board: !mkdir -p ${_refdest%/*}"
+
+	"$cbfstoolref" "$appdir/bios.bin" extract \
+	    -m x86 -n fallback/refcode -f "$_refdest" -r RO_SECTION \
+	    || err "extract_refcode $board: !cbfstoolref $_refdest"
+
+	# enable the Intel GbE device, if told by offset MRC_refcode_gbe
+	[ -z "$MRC_refcode_gbe" ] || dd if="config/ifd/hp820g2/1.bin" \
+	    of="$_refdest" bs=1 seek=$MRC_refcode_gbe count=1 conv=notrunc || \
+	    err "extract_refcode $_refdest: byte $MRC_refcode_gbe"; return 0
+}
diff --git a/include/option.sh b/include/option.sh
index c2f4fef5..2284fb0b 100755
--- a/include/option.sh
+++ b/include/option.sh
@@ -19,7 +19,8 @@ eval "$(setvars "" CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
     CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW2_OFFSET \
     CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_GBE_BIN_PATH \
     CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE \
-    CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE _dest board boarddir)"
+    CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE _dest board boarddir \
+    CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE)"
 
 items()
 {