diff options
| author | Riku Viitanen <riku.viitanen@protonmail.com> | 2025-09-27 10:53:05 +0300 |
|---|---|---|
| committer | Riku Viitanen <riku.viitanen@protonmail.com> | 2025-09-28 02:21:15 +0300 |
| commit | b4c3bafb0eb7de0cd836d66a1b675430645d8513 (patch) | |
| tree | 7e7c1f3e6a1784a7c74b7a4fa91d58dd932a5e72 /config/coreboot/x2e_n150/target.cfg | |
| parent | c9d6143e20fba08ff8a55712da2709d1f7f27681 (diff) | |
New mainboard: X2E_N150
Patch in Gerrit: https://review.coreboot.org/c/coreboot/+/89281
Not working: USB3 ports only work at USB2 speeds.
IFD:
Modified the original by:
- Removing Device Exp2 region (empty anyway)
- Enlarging the BIOS region to use this freed space
- Setting the HAP bit in PCHSTRP55 using a fork of
me_cleaner: https://github.com/XutaxKamay/me_cleaner
Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'config/coreboot/x2e_n150/target.cfg')
| -rw-r--r-- | config/coreboot/x2e_n150/target.cfg | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/config/coreboot/x2e_n150/target.cfg b/config/coreboot/x2e_n150/target.cfg new file mode 100644 index 00000000..2d576527 --- /dev/null +++ b/config/coreboot/x2e_n150/target.cfg @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +tree="default" +xarch="i386-elf" +payload_seabios="y" +payload_grub="y" +payload_memtest="y" +grub_scan_disk="nvme ahci" +grubtree="xhci" +vcfg="x2e_n150" +build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot" +IFD_platform="adl" +payload_uboot="amd64" |