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5 daysUse SeaBIOS 1.16.3 and enable debuggingLeah Rowe
This diff matches the setup currently used in coreboot. I'm eliminating as many differences as possible, while I test the SeaBIOS hanging issue on Dell Optiplex 3050 Micro. The actual SeaBIOS configs have also been modified, to match the coreboot config. Signed-off-by: Leah Rowe <leah@libreboot.org>
6 daysSwitch Dell 3050 Micro to newer coreboot revisionLeah Rowe
Specifically, use the same revision that Mate used in patchset 15. This will ensure that any issues are *not* caused by the coreboot revision; this is being done, because the old coreboot revision was from July, but patchset 15 from Mate is based on a September revision of coreboot. I've been eliminating as many variables as possible, trying to fix SeaBIOS payload on this machine, because it hangs in Libreboot, but not when building from gerrit directly, which means the coreboot revision may be a factor (since I'm using his patches on an older revision so upstream might have made some changes since then that the port relies on). For this, a new coreboot tree is used, called "dell7", referring to the fact that Kabylake is Intel's 7th generation. Signed-off-by: Leah Rowe <leah@libreboot.org>
6 daysUpdate dell 3050 patch to patch 15 (pwm fix)Leah Rowe
Use patchset 15 instead of 14: config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch Rebase the verb patch; patchset 15 modified the Makefile: config/coreboot/default/patches/0064-dell-optiplex_3050-add-hda_verb.c.patch We were using patchset 14 for the 3050 micro: https://review.coreboot.org/c/coreboot/+/82053/14 Now we use patchset 15: https://review.coreboot.org/c/coreboot/+/82053/15 Without this patch, the fans are always on a low setting, on the Dell OptiPlex 3050 Micro, even under stress conditions. With this patch, the fans change speed according to CPU temperature. I had to rebase my verb patch, because Mate modified the Makefile to add his sch5555 handler, on the same line where I add hda_verb. Mate tells me he will merge my verb and vbt patches into a further patchset later on. For now, I've simply rebased these patches on top of Mate's newer work; I've told him he can use them in his port. I'm probably going to now issue a new revision ROM image for Libreboot 20241008, so that users can get this fix sooner. Signed-off-by: Leah Rowe <leah@libreboot.org>
13 daysrom.sh: remove unnecessary logic from copyps1biosLeah Rowe
the .git directory never exists anyway, when doing a release, so the purpose this is intended is defeated by lbmk's design. individual headers say "pcsx-redux team" as copyright anyway, and the code for generating that COPYING file, with MIT license and correct years (matching the entire source code for the open bios) remains correct. a mitigation instead of this patch might be to maintain a hardcoded list of authors, and manually update it over time, but this is not required. however, it may be good practise for upstream to maintain such a file. perhaps i should contact them? Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-17use redundant mirrors for recent utils importsLeah Rowe
i mirrored riku's utils int, mxmdump and gpio-scripts to the codeberg and disroot libreboot sites. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-17remove end slashes on repos in config/git/Leah Rowe
Due to quirks in how caching works in lbmk, this may be error-prone. I'll properly address it in the next audit. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-17import Riku's int toolLeah Rowe
Riku used this for debugging, when adding the MXM support to the HP EliteBook 8560w port. It will be useful for other work that I have planned, so I'm archiving this too! Riku has a lot of useful code, that I meant to import ages ago. Once I'm done importing these in lbmk, I'll add backup repos. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-17import Riku's gpio-scriptsLeah Rowe
Based on hell's code, but parses inteltool logs. This will be useful for ports that I have planned, so I'd like this to be included with Libreboot releases. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-17import Riku's mxmdump utilityLeah Rowe
Used to dump MXM config for a given mainboard. We used this for the HP EliteBook 8560w. I meant to import this via config/git/ ages ago. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-17bump seabiosLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-16vendor.sh: Don't use x_ for image MAC address modLeah Rowe
The path might contain spaces and such, which breaks when using the x_ prefix. Call err instead. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-14bump flashprog revision to d128a0aLeah Rowe
This brings in the following important fix: commit d128a0ae87086b37c0e5d7a8d934bcdee173402f Author: Nicholas Chin <nic.c3.14@gmail.com> Date: Fri Sep 27 22:57:22 2024 -0600 flashchips: Remove unsupported erase blocks for Winbond W25X{16,32,64} This family of chips does not support the 0x52 (32 KiB block erase) and 0x60 (chip erase) opcodes according to their datasheet. The full list of changes this brings in is as follows: * d128a0a flashchips: Remove unsupported erase blocks for Winbond W25X{16,32,64} * c6a924a Don't mention writing when erasing only (-E) * dac4239 ch347_spi: Add 'spimode' parameter * 56d236b chipset_enable: Add some newer AMD code names * 3b9f152 chipset_enable: Probe AMD SPIBAR first and bail on ff * 522160f meson: Add ft4222_spi Nicholas Chin's patch fixes a bug on GM45 ThinkPads, where WX25 ICs (Winbond) could be read, but writes would fail in certain cases because flashchips.c provided incorrect block erase commands. This is unrelated to the --workaround-mx patch, for Macronix ICs. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-14vendor.sh: Handle error status on RUNME.shLeah Rowe
The deguard utility is executed within a subshell, and the subshell does not handle error status. This patch fixes that, so that the main shell also exits non-zero. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-13dependencies/fedora40: add python3-develLeah Rowe
I was build-testing gru_bob on an arm64 host, and got a build error when compiling U-Boot. Python.h missing - installing python3-devel fixes it. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-08Libreboot 20241008 release20241008Leah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-08build: actually build pcsx-redux bios on releaseLeah Rowe
I added support earlier, on rom.sh, but the main build script specifically defines which projects are to be compiled. I've modified it so that pcsx-redux (just the BIOS part) will also be compiled. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-08rom.sh: support making pcsx-redux bios releaseLeah Rowe
I also checked the copyright declarations in the directory src/mips/openbios where the PCSX-Redux BIOS is, gleaning all the copyright years: 2019-2024 at this time. The years will be updated as and when PCSX-Redux is updated in lbmk. Their BIOS is under MIT so I made lbmk generate an appropriate COPYING file alongside the binary, containing: Copyright (c) 2019-2024 PCSX-Redux authors Along with the actual text of the MIT license. With all of this, the PCSX-Redux BIOS can now be included in Libreboot releases. No actual tarball is created. The release script in lbmk simply copies the bin/ directory to ../roms I'm leaving the PCSX-Redux BIOS release uncompressed, because, and this will sound patronising because that is my precise intention: Windows users don't know how to do anything. If I provide a tarball to Windows users, they won't know what to do. Libreboot releases always go on rsync mirrors, which also have HTTP servers with indexing enabled, for browsing release files. I mention Windows users, because most people who use the PCSX Redux BIOS will probably use it on a PlayStation emulator, and most emulator users are on Windows. I can't really be bothered to provide it as a .zip archive, and it's only 512kb, so just provide it uncompressed in Libreboot releases! Releases were already possible under this scheme, so this patch really just adds the COPYING file. It's simply a courtesy to the PCSX-Redux developers, providing proper credit to them. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-07coreboot/dell3050micro: Add data.vbt fileLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-06Add verb patch for Dell OptiPlex 3050 MicroLeah Rowe
Thanks go to Nicholas Chin for helping me with this. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-06rom.sh: disable seabios-as-primary if grub is mainLeah Rowe
on 3050micro, we disable seabios as a primary payload, making grub a pribary payload instead. the way it worked, the roms were still named seagrub and the seabios rom would be compiled, but with the wrong path, so seabios wouldn't be executed; seabios would hang anyway, on this board. instead, engineer it in such a way as to disable seabios_ images on this board. also, rename seagrub_ to grub_. i normally only permit seagrub, and not grub, but i make an exception for 3050micro because we know grub works, but seabios currently hangs on this board (which means no bsd). Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-06dell3050micro: make GRUB the primary payloadLeah Rowe
SeaBIOS is known to hang on this board. It is being investigated. Add two variable options for target.cfg files: * seabiosname * grubname This string defines where it would be located in CBFS. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-05disable dram clear on dell 3050 microLeah Rowe
otherwise it takes ages to boot Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-053050micro: disable TPM to mitagate seabios hangingLeah Rowe
SeaBIOS hangs without this. Thanks go to Mate Kukri who suggested this workaround. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-05fix 3050 config (./mk -u coreboot)Leah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-05git.sh: fix error with cache re-downloadLeah Rowe
in some cases, on a fresh clone, the cached repo already exists but lbmk tries to download it again. work around this by checking that the directory exists; it's in the main if statement, so that the "else" still applies. as a result, the fallback to a live repo would un-fall back to doing git-pull if the cached directory exists exists. if it doesn't seem to make sense, it's because it doesn't. this whole function needs to be rewritten better. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-05Add config for Dell OptiPlex 3050 MicroLeah Rowe
This is using Mate Kukri's port, which was added in previous lbmk revisions. I've added an IFD that sets the HAP bit, and unlocks regions as standard. vcfg is set to 3050micro, which defines downloading of the MEv11 image and it will run deguard automatically. I made a small adjustment to vendor.sh, because the hotpatch logic for deguard uses -C in git, and when doing that, the specified directory path is relative to that Git repository; the .patch path has been adjusted accordingly. Also add 3rdparty/fsp to coreboot/default modules. This board requires the ifdtool option: -p sklkbl The -p option tells flashrom what quirks are present in a given IFD. We don't normally need this on other Libreboot targets that we currently support. The -p option was needed for creating this modified IFD, and it is therefore needed in the inject script. Therefore, an "IFD_platform" option is specified in a given board's target.cfg file. If this is set, another variable is set that makes -p be used. In this case, 3050's target.cfg says: IFD_platform="sklkbl" This option enables quirks for skylake/kabylake descriptors, as required when using ifdtool. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-10-04Add Dell OptiPlex 7010/9010 SFF supportLeah Rowe
Pretty much just copied the T1650 directory in config/, then changed the board to 9010 SFF in menuconfig. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-09-30add swig to fedora dependenciesLeah Rowe
needed when compiling u-boot Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-09-30Merge pull request 'config/coreboot: Add Dell Latitude E4300' (#236) from ↵Leah Rowe
nic3-14159/lbmk:e4300 into master Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/236
2024-09-27config/coreboot: Add Dell Latitude E4300Nicholas Chin
Add patches to convert the E6400 port into a GM45 Latitude variant and add the E4300 as another variant, and create a config for the E4300. Tested on my E6400 and E4300. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-09-26Add Sony PlayStation support to LibrebootLeah Rowe
I also added a "cleanargs" argument, similar to the makeargs argument, to work around a build error. This builds the PCSX-Redux PS1 BIOS. They reverse engineered the Sony PS1 BIOS and wrote a free one under MIT license. Run this: ./mk -b pcsx-redux The file will appear: bin/playstation/openbios.bin Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-09-25config/git: Import pcsx-reduxLeah Rowe
We don't need the entire emulator, but we will be using a specific part: src/mips/openbios third_party/uC-sdk submodule is included, because it contains the necessary header files when building open bios. I will be adding Sony Playstation support to Libreboot, alongside a new emulator project to be announced soon. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-09-24coreboot/default: Import mkukri's 3050 micro portLeah Rowe
Dell OptiPlex 3050 Micro I ran ./mk -u coreboot, to update existing configs after merging. Actualy IFD and coreboot configs will be done in the next revision. I've already added logic for handling deguard, in preparation for this. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-09-24Add deguard logic for Dell OptiPlex 3050 MicroLeah Rowe
Copy the downloaded deguard source code into appdir, and patch it to run as part of lbmk, instead of standalone. The archived one in src/ is not directly used; instead, the hotpatched version is used. This is because the standalone version already has download logic for the .zip file, but we already cache that file in cache/ and use that. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-09-24Add Mate Kukri's deguard utilityLeah Rowe
This program disables the Intel Boot Guard on Dell OptiPlex 3050 Micro, via Intel ME modification. Using this hack, you can run unsigned code on the ME. Mate disabled BootGuard this way. This will be used to add Dell OptiPlex 3050 Micro support in Libreboot. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-09-05Revert "vendor.sh: print extract errors to /dev/null"Leah Rowe
This reverts commit 72fa467cb79f7c42d61434e9ff2491e235ee37f5.
2024-08-31vendor.sh: print extract errors to /dev/nullLeah Rowe
the output isn't really super critical, because it pertains to files that would just result in a coreboot build error if they didn't extract, which would still allow me to know if a given extract function failed. however, the extract function shows a lot of error output because it literally bruteforces various extract methods, when dealing with vendor files. mitigate this by just printing the errors to /dev/null. this will prevent users from erroneously thinking that lbmk is operating under error condition, when it isn't. we do sometimes get questions about it on irc. fewer questions on irc is better. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-08-14Merge pull request 'Add remaining SNB/IVB Latitude ports' (#217) from ↵Leah Rowe
nic3-14159/lbmk:latitude-ports into master Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/217
2024-08-13config/coreboot: Fix INTEL_GMA_VBT_FILE in Latitude configsNicholas Chin
Commit 3ee4cc9ddec62276c374f8c7f0c0b3322cfaa9f6 (fix typo in dell latitude coreboot coreboot config) fixed a typo from ${VARIANT_DIR) to $(CONFIG_VARIANT_DIR). While this does work, since CONFIG_VARIANT_DIR is a valid variable, it is not technically correct, as the default VBT path set by coreboot's Kconfig files uses $(VARIANT_DIR), which is the same as CONFIG_VARIANT_DIR, but with quotes stripped out. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-08-13config/coreboot: Add config for Dell Latitude E6230Nicholas Chin
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-08-13config/coreboot: Add config for Dell Latitude E6330Nicholas Chin
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-08-13config/coreboot: Add config for Dell Latitude E6320Nicholas Chin
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-08-13config/coreboot: Add config for Dell Latitude E6220Nicholas Chin
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-08-12coreboot/x4x: fix build errorLeah Rowe
see relevant patch added in the diff set the clock on x4x boards to 96MHz like on GM45 fixes the following build error on x4x boards: hw-gfx-gma-plls.adb:465:46: error: "INTEL_GMA_DPLL_REF_FREQ" not declared in "Config" make: *** [Makefile:423: build/ramstage/libgfxinit/common/g45/hw-gfx-gma-plls.o] Error 1 Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-08-11coreboot/default: fix build issue with DDR2 fixLeah Rowe
some of my DDR2 checks were unnecessary, as nicholas pointed out on irc, because they were in places that only ran if DDR2 memory was used anyway. in another, valid place, I was checking the wrong variable for knowing what memory type is used. this patch fixes build errors in lbmk: src/northbridge/intel/gm45/raminit.c: In function 'dram_program_timings': src/northbridge/intel/gm45/raminit.c:1120:29: error: 'sysinfo' undeclared (first use in this function); did you mean 'sysinfo_t'? 1120 | if (sysinfo->spd_type == DDR2) | ^~~~~~~ | sysinfo_t src/northbridge/intel/gm45/raminit.c:1120:29: note: each undeclared identifier is reported only once for each function it appears in src/northbridge/intel/gm45/raminit.c: In function 'ddr2_odt_setup': src/northbridge/intel/gm45/raminit.c:1291:21: error: 'sysinfo' undeclared (first use in this function); did you mean 'sysinfo_t'? 1291 | if (sysinfo->spd_type == DDR2) { | ^~~~~~~ | sysinfo_t make: *** [Makefile:423: build/romstage/northbridge/intel/gm45/raminit.o] Error 1 Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-08-11fix typo in dell latitude coreboot coreboot configLeah Rowe
these configs were otherwise correct, but i typo'd a variable in them when manually rebasing the old configs, after switching to nicholas's new ports implemented as variants, where the old ones in lbmk were individual board ports for those same boards. Signed-off-by: Leah Rowe <info@minifree.org>
2024-08-11vendor.sh: use readkconfig on inject tooLeah Rowe
same as the last change. we must avoid use of make variables, in sh specifically, when handling these configuration files. Signed-off-by: Leah Rowe <info@minifree.org>
2024-08-11vendor.sh: don't load entire coreboot configsLeah Rowe
instead, only grep for the entries required, such as Intel ME paths. some variables in coreboot configs use $(), which is used in *make*, on the coreboot build system, and there refers to variables. here, we are sourcing them from sh, which treats this as a mini subshell to run a command; for example CONFIG_FOO would be executed, which is bad. The current logic still theoretically has this problem, with this patch, but the entries we scan from the configs do not currently have variable names in the strings. So: filter out just what we need, into a temporary config, when scanning for vendor files in coreboot configs, and use the temporary config. This fixes a build error when compiling for e5520_6mb. Signed-off-by: Leah Rowe <info@minifree.org>
2024-08-11lib.sh: more verbose error in x_Leah Rowe
part of the command was cut off in the output Signed-off-by: Leah Rowe <info@minifree.org>
2024-08-11flashprog: bump to 639d563 (2024-08-02)Leah Rowe
The workaround-mx patch was rebased on one section in spi.c, because that part in upstream added QPI support; in the newly rebase mx patch, the workaround_mx behaviour is only honoured if QPI (Quad SPI) is not in use. Quad SPI is not used in practise, on the machines where this workaround is intended (GM45 ThinkPads with Macronix chips). This imports the following upstream changes: * 639d563 README: Update flashprog.org URLs * cbbd601 README: Update dependency list and Linux package names * 79451f1 README: Rename "Packaging" -> "Source Packaging" * 5b4695c README: Dial laptop warning down a little * 7224085 udev rules: Add some more IDs * 448457a ch347_spi: Add CH347F ID and loop over the entries * e39549b ch347_spi: Search for compatible USB interface * dfd0647 ich_descriptors: Refactor component density handling * b2ad9fd ich_descriptors: Make use of SPI_ENGINE_PCH100 marker * 140e22f chipset_enable: Make use of SPI_ENGINE_PCH100 marker * 869f0e7 ichspi: Use `swseq_data' on ICH7 paths too * eeee91b ichspi: Replace all switch/case on `ich_generation' * ecba1d8 ichspi: Drop redundant bail-out cases in ich_set_bbar() * e8babf4 ichspi: Use a single check to enable hwseq for PCH100+ * fda324b ichspi: Introduce SPI_ENGINE_PCH100 marker * a1f6476 ichspi: Split ICH7 init out * 3f75d44 ich_descriptors: Remove `Dual Output Fast Read' for newer gens * 2862011 spi25: Try to set volatile quad-enable (QE) automatically * 4ac536b spi25_statusreg: Allow to write (non-)volatile bits specifically * b1d2bae dediprog: Fix and enable 4BA modes for SF600Plus-G2 * d0afeef dediprog: Disable 4BA modes for SF100 w/ protocol v2 * 1b1deda Implement QPI support * a1b7f35 dediprog: Implement multi-i/o reads * 008a44f dediprog: Split read/write command preparation by protocol * 4760b6e spi25: Implement multi-i/o reads * 0c9af0a spi25: Check quad-enable (QE) bit * 930d421 spi25: Introduce generic spi_prepare_io()/spi_finish_io() * 8d0f465 spi25: Extract 4BA preparations into new `spi25_prepare.c` * 044c9dc Add FT4222H support * fc7c13c linux_gpio2_spi: Implement multi i/o * 5fc3154 bitbang_spi: Implement multi-i/o * d16a911 bitbang_spi: Move API into its own header file * 226bb87 flashchips: Add missing QE-bit definitions * 4fa39c5 flashchips: Fill multi-i/o gaps in MX25U family * 5f50999 flashchips: Fill multi-i/o gaps in MX25R family * 46552c8 flashchips: Fill multi-i/o gaps in MX25L family * 96786d0 flashchips: Fill quad-i/o gaps in XM25Q family * a26a3c6 flashchips: Fill dual-i/o gaps in W25X family * 2133f59 flashchips: Fill quad-i/o gaps in W25Q family * 68573af flashchips: Split GD25Q127C and GD25Q128C * 4da971f flashchips: Fill quad-i/o gaps in GD25*Q families * f7e2d97 spi: Allow to define a quad-enable (QE) configuration bit * 1412d9f spi: Rework FEATURE_QPI * d518563 spi: Prepare for multi i/o and dummy bytes * bd72a47 spi25_statusreg: support reading/writing configuration register * 3d728e7 spi25_statusreg.c: support reading security register * a358b14 flashchips: Split W25Q64.W -> W25Q64DW | W25Q64FW/W25Q64JW...Q * 3127db1 manibuilder: Drop legacy flashrom tag collections * 619d9c0 manibuilder: Use `test_build.sh' * 6560bba manibuilder/almalinux: Install `diffutils' for new `test_build.sh' * c7b549e test_build.sh: Compare output for -L of Make and Meson builds * 72b30a0 test_build.sh: Don't try to run cross-compiled programs * 3d2f212 test_build.sh: Allow to override Make and Meson commands * 4eb9748 test_build.sh: Run tests for both Make and Meson builds * 8279457 manibuilder: Add Alpine Linux 3.18 & 3.19 images * 15e9b10 manibuilder/alpine: Install libjaylink-dev when available * b8b3593 manibuilder: Add images for Fedora 38..40 * 7b05f09 manibuilder: Add images for Ubuntu 24.04 "Noble Numbat" * 5e8b339 manibuilder/anita: Add NetBSD 10.0 i386 & amd64 images * 61da8c7 manibuilder/anita: Export library path for libusb * 39152af manibuilder: Set sourcearcade.org as default source * 20073e7 Properly clear erase-block selection when bigger block is chosen * 3824c8d ichspi: Allow all opcodes when the "opmenu" isn't locked * 0d4354e flashchips: Add W25Q32JV-.M Signed-off-by: Leah Rowe <leah@libreboot.org>