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do it in the macro. this way, if a given error is
present, it's not overridden. this enables easier
debugging.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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i renamed filename to fname, so that certain lines would
still fit within 80 characters without introducing a new
line break.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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split it into readGbe_part, for code clarity.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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handle it in a separate function, for clarity.
the main function just checks each part whether it
changed, and then passes control to writeGbe_part.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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Signed-off-by: Leah Rowe <leah@libreboot.org>
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use the ERR macro instead, so that an existing value
will not be overridden. this is useful for debugging.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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the current code is optimised for speed, but it's a bit
esoteric, so make it easier to understand.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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this has to do with memory allocation, not actual reading
of the gbe file into memory. split it up, for clarity.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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Signed-off-by: Leah Rowe <leah@libreboot.org>
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when nf and nr/nw are not the same, we know there
is an error condition, so defer to the following err()
call, but use ERR() there instead of hardcoding use
of ECANCELED.
this actually improves the error handling, by being
more verbose, while reducing the amount of logic.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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we only need to know the number of bytes written or
read under error conditions.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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Signed-off-by: Leah Rowe <leah@libreboot.org>
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This makes the argument handling easier to understand,
since other arguments are also handled in find_me
Signed-off-by: Leah Rowe <leah@libreboot.org>
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this is a special mode that skips FPTR checks, which is
needed on the topton x2e_n150
we currently set this, when MEclean="n", but we may want to
skip cleaning while still checking FPTR on some boards (in
a future lbmk revision)
Signed-off-by: Leah Rowe <leah@libreboot.org>
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Signed-off-by: Leah Rowe <leah@libreboot.org>
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from kittywitch/lbmk:x270-patch into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/405
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it is currently only initialised inside case
conditions. this is fine on most shells, but
some of them can be a bit buggy here.
initialise it empty and then override.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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idk why i made it 4
Signed-off-by: Leah Rowe <leah@libreboot.org>
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this is a hangover from an earlier work, where we
had some issues prior to merging.
as it is, the port is ready for a future release.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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Courtesy of Kat Inskip who ported this board.
Headphone output doesn't work at the moment, due to incorrect verb.
Intel VBT is also wrong. Both are taken from another board.
This will be amended later with the correct verb and VBT.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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latest coreboot rev as of literally today
this is in preparation for a thinkpad x270 port
using a WIP patch that was contributed
Signed-off-by: Leah Rowe <leah@libreboot.org>
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instead of SPS and disable ME HECI in devicetree' (#404) from noisytoot/supermicro-x11ssh-f into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/404
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this is the program I recently wrote, that generated
the submodule entries for the GRUB PO file fix
this utility is for reference only. i'll probably do
away with the fix at some point, replacing it with
my own git-based submodule repository, containing the
PO files. this would make things easier, and then
that repository would contain the utility instead.
i'm just putting this in lbmk for now, so that we
have it somewhere.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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Signed-off-by: Leah Rowe <leah@libreboot.org>
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Signed-off-by: Leah Rowe <leah@libreboot.org>
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Since we have redundant downloads for the ME image now, it's no longer
required.
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Since we always use me_cleaner, this speeds up boot time by preventing
coreboot from wasting a few seconds waiting for HECI.
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Using the same ME image as the 3050 Micro. This fixes the lack of a
backup download URL for the ME and speeds up boot time, since MRC
caching is working with ME (unlike SPS).
Unfortunately, since the MFS partition must be preserved, this does
mean we need a larger ME region than with me_cleaned SPS.
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Left over from the hyphen -> underscore renaming commit.
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the lack of redundancy in Intel ME downloading is a current
release blocker with this board, so set it to release=n for
now.
it is quite possible to use deguard on this board, which does
have redundant downloading when used with lbmk.
although the board doesn't have bootguard, it is still possible
to use deguard. you can configure the generic ME image that it
fetches, and reconfigure it for each machine.
i've asked ron to look into this, on their test board.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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i don't like hyphens in file names, because of how lbmk
has historically handled directories and files in the past;
i've removed a lot of eval statements, to the extent that
it's no longer likely to be a problem (it's barely used now),
but i previously had a problem with using hyphens in config
names.
this design flaw (in lbmk) was fixed ages ago, but i still
maintain this policy. since that time, i use hyphens only.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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nieldk/lbmk:master into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/402
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noisytoot/supermicro-x11ssh-f into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/403
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Surprisingly, SeaBIOS VGA output works (coreboot documentation says it
doesn't).
I'm using a static CMOS option table currently (like most other boards
supported in libreboot), but maybe it would be better to switch to the
CBFS file option table. The default option table enables
hyperthreading, overriding the compile-time setting.
I'm also using a ME/SPS image extracted from the official BIOS update
for this board. Unfortunately, https://www.supermicro.com/Bios/* is
excluded from crawlers in robots.txt so it's not in archive.org, so I
haven't been able to find a backup download URL. I also needed to set
the user-agent for fetching the update to "curl/8.6.0" because the
default user-agent override used by lbmk resulted in a 403 error.
deguard is not required (there's no bootguard on this board).
SPS does not implement CPU replacement detection which means that the
MRC cache does not work and RAM training needs to happen on every
boot. To avoid this it may be possible to run ME instead of SPS on
this board, but I tried both the ME image used on the OptiPlex 3050
Micro in libreboot and one from the ASRock C236 WSI and they both hung
at "[INFO ] POST: 0x92" (POSTCODE_FSP_MEMORY_INIT).
The memtest86+ build included with libreboot doesn't work with USB
keyboards and this board doesn't have a PS/2 port, which is annoying.
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The files it downloads are not versioned, and they could
change any time. GRUB has no way to deterministically grab
these.
I've removed GRUB's local for grabbing these, instead
mirroring them myself and checking hashes; no hashes seem
to have been provided by the upstream at Translation Project,
so I just used the hashes I had on the files it had, when
I downloaded them.
From now on, I can just re-download these and re-calculate
the hashes as desired, over time, when updating GRUB revisions.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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Signed-off-by: Leah Rowe <leah@libreboot.org>
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lucius1664/lbmk:master into master
Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/400
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I accidentally removed a bunch of links in a previous change,
that isn't pushed yet.
due to gitignore rules, files in config/submodule/ have to be
added manually using -f with the git add command. as a result,
i need to be very careful when making changes, especially
temporary changes.
lbmk wasn't downloading files properly, because upstreams weren't
defined. this patch fixes that.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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Signed-off-by: Leah Rowe <leah@libreboot.org>
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i accidentally picked an older version from Dell update
A16. this update uses A29.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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Signed-off-by: Leah Rowe <leah@libreboot.org>
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This brings the following changes from upstream:
* fcd716d9a2 mb/google/ocelot: Limit Power Limit when battery is missing
* d246e2ca7e tests/Makefile.common: Fix inverted USE_SYSTEM_CMOCKA condition
* e64507638e tests/lib/ux_locales-test: Avoid double quotes in CMUnitTest.name
* 4427a34b6b drivers/intel/fsp2_0: Fix string length handling in timestamp printing
* 40dbe0807d Documentation/mb: Add missing entry for starfighter_mtl
* f070e0add8 mb/starlabs/byte_adl: Fix WOL
* fc20f238f6 mb/starlabs/*: Select DRIVERS_EFI_FW_INFO
* 225e635ea1 soc/amd/common/block/spi: Operate on multiple SPI flashes
* b9bd924847 soc/amd/common/block/spi: Implement boot_device_spi_cs()
* d7d4b67c6a commonlib/mipi/cmd: Remove unnecessary 'const void *' cast
* 5af56ddf92 mb/google/skywalker: Implement lb_board() to pass LB_TAG_PANEL_POWEROFF
* d110cf4669 commonlib/mipi/cmd: Add mipi_panel_get_commands_len()
* 0ee48a475c drivers/mipi: Add power-off commands for TM_TL121BVMS07_00C
* a974b7668e soc/intel/*: Disable InternalGfx w/o iGPU to prevent FSP-M/S crash
* 18ffcafa61 mb/google/bluey/quartz: Adjust PS8820 init sequence
* 532543027a mb/siemens/{mc_ehl6,mc_ehl7}: Configure GPIO GPP_G5 (SD CD) pull-up
* d420e1fb87 mb/siemens/mc_ehl8: Switch from LPSS UART to legacy 8250 I/O UART
* 483c3e51ae mb/siemens/mc_ehl8: Configure I2C and SMB devices
* d810257008 mb/siemens/mc_ehl8: Configure PCIe root ports
* cf2c2555f4 mb/siemens/mc_ehl8: Add new board variant based on mc_ehl1
* a12663fd88 drivers/spi: Allow SoC to provide the SPI flash CS index
* cacc11de4f include/cpu/x86/msr.h: Update return types from int -> bool
* d5fb4becd5 mb/google/nissa/var/yavilla: Update DTT parameters
* 3b18467e8a payloads/ipxe: Unconditionally restore config files post-build
* 4374bbd37b payloads/ipxe: Update and use the stable version
* c0998983d0 ec/google/chromeec: Fix uninitialized buffer in cbi_get_uint32()
* 03b47f947f soc/mediatek: Add mtk_get_mipi_panel_data() API
* 8cfc71d9e0 libpayload: Pass panel power-off commands to payloads
* d94d4b8a25 mb/starlabs/starlite_adl: Add trace length for the card reader
* 0f450a8d9c mb/starlabs/starlite: Set card_reader fallback value to 0
* 94672e2b45 sb/intel/ibexpeak: Remove 6/7 series chipset PCI IDs
* 2fc8051679 util/autoport: Factor out getting sorted Kconfig option names
* 01d82febb2 util/autoport: Separate handling of Kconfig selects
* b7763a5973 mb/google/fatcat: Implement Google Rex touchscreen integration
* 3f5807ce10 mb/siemens/mc_ehl7: Deactivate SATA interface
* 5f76f78383 mb/siemens/mc_ehl7: Deactivate GbE and PSE GbE 0
* b5ad97a268 mb/google/nissa/var/gothrax: Add wifi sar table
* 7351e663d2 mb/google/nissa: Enable early EC SW sync & eSOL for gothrax/epic
* f9b917d391 soc/qualcomm/x1p42100: Relocate CBMEM top below XBL log
* a306987ae4 util/superiotool: Add experimental Nuvoton NPCD378 support
* 139f6c3e64 mb/google/brya/var/redrix: Configure cameras for Windows/Linux ACPI mode
* 3883118ed9 mb/google/brya/var/kano: Configure cameras for Windows/Linux ACPI mode
* ae7b75fb0d mb/lenovo/sklkbl_thinkpad/cfr.c: Fix X280 build error
* 7639118729 drivers/amd/opensil: Add hooks to populate CBMEM_ID_MEMINFO
* 23f0b0b313 util/xcompile/xcompile: Fix clang target parameter
* f712c965e4 payloads/edk2: Update default MrChromebox branch from 2508 to 2511
* b4917ed44d payloads/edk2: rework serial output configuration
* 282c27c95c arch/x86/acpi_bert_storage.c: Allow vendor specific BERT entries
* 00fbc08b76 Reapply "soc/mediatek/mt8196: Call fsp_init via boot state"
* e6c5ee6450 mb/google/hatch/var/kohaku: Add Samsung S-pen driver support
* b890ca0648 mb/google/brya/var/yaviks: select USE_MTCL only if CHROMEOS
* a8737c5f86 mb/google/cyan: Set CBFS_SIZE default to match IFD BIOS size
* 72af15f1de mb/google/zork: Fix missing comma in CFR object list
* 5db16ea6fc soc/intel/pantherlake: Fix incorrect use of logical OR for TDP selection
* 2c58e525e8 soc/intel/ptl: Add ACPI IOST support
* 52aeb078ce soc/intel/common/acpi: Add IOST device
* d62764df87 soc/intel/common/block/p2sb: Add SSDT function for SoC-specific features
* 96b4754c35 soc/intel: Add CPU ID support for Nova Lake
* b741e2274e acpi: Add enums for TPM2 start method
* 6fd865f409 drivers/amd/ftpm: Add fTPM driver for PSP emulated CRB TPMs
* c09352d58d soc/intel/pantherlake: Update PS1 threshold to the latest recommendations
* 093ae8eeaa mb/siemens/mc_ehl7: Enable reboot after HW Watchdog expiry
* ddf4748c22 mb/siemens/mc_ehl7: Deactivate RTC
* e8ac9ffcd9 mb/siemens/mc_ehl7: Add new board variant based on mc_ehl6
* 94e6e5cd0d mb/google/ocelot: Add option to enable VGA mode 12
* fbf0087918 mb/google/ocelot/var/ocicat: Use GPP_F10 for ISH
* f2788e963f device: Rename PCI_EXP_SEC_CAP_ID -> PCI_CAP_ID_SEC_PCIE
* e01baafbe2 include/cper.h: Add check information structures
* a6407000f1 mipi/panel: Add 'poweroff' field to panel_serializable_data
* b4fbc59c6f treewide: Move mipi_panel_parse_commands() to commonlib
* 1d2b399fd7 lib: Rename `fill_lb_framebuffer` to `get_lb_framebuffer`
* 5f86aba4b3 soc/intel/common: Enable high address support for MCHBAR in ACPI
* f00a2ff7b8 arch/x86/ioapic.c: Support 8-bit IOAPIC IDs
* 3c3fbbaabf arch/x86/acpi_bert_storage.c: Remove unused variable
* 9f4132712f soc/intel/alderlake: add chipsetinit support
* a5c0307e9c commonlib/device_tree: Add dt_add_reserved_memory_region helper
* a3a556f05d mb/google/fatcat/var/ruby: Add wifi SAR table
* 8bc1372f72 sb/intel/common/spi: Prevent transfers across 4KiB boundaries
* 95ad028274 drivers/smmstore: Use lookup_store() for memory-mapped reads
* c421847fe2 util/crossgcc: Fix GNAT detection for gnat-15
* 292d7b9d3d Revert "soc/mediatek/mt8196: Call fsp_init via boot state"
* e705c39009 libpayload/arch/arm64/mmu: Add CB_MEM_TAG to usedmem_ranges
* 18a986c5fe soc/amd/cmn/block/cpu/mca: Support MCA_SYND1 and MCA_SYND2
* c45e153dfb mb/google/bluey/var/quartz: Enable PS8820 support
* e303357cb9 soc/qualcomm/x1p42100: Call mainboard Type-C config hook
* f9efe53cb0 mb/google/bluey: Implement PS8820 retimer configuration
* 657bcd32d9 mb/google/bluey: Add Kconfig for PS8820 retimer support
* 17a52ce94e soc/qualcomm/x1p42100: Add mainboard USB Type-C config hook
* 16cb8d0d0c mb/google/bluey: Add power sequencing for USB-C1 retimer
* 5034f8629f soc/intel/common: Add spinlock protection to fast SPI flash operations
* ceaa41c9e4 drv/intel/mipi_camera: Verify SSDB only for camera sensors
* ede97ef9da mb/google/volteer: Add IPUA device and sensor names
* 65cbf312af mb/google/volteer: Convert MIPI camera cfg from static ASL to devicetree
* 2aca802e85 mb/google/brya/acpi/cnvi_bt_reset: Fix BT re-enumeration under Windows
* 524ad684af mb/google/brya/var/taeko: Fix SOF speaker topology selection
* 829b8be432 libpayload: Add bulk with timeout callback to USB
* f4fe5514fe mb/google/ocelot/var/kodkod: Update gpio settings for NC pins
* c7f0697867 coreboot_tables: Add new CBMEM ID to hold the PCI RB aperture info
* 3ded43722a soc/amd/cmn/block/acpi/ivrs: Use less PCI accesses
* 1da7c31810 include/cpu/x86/msr.h: Add MCA related MSRs
* 7deb82d744 mb/google/bluey: Configure QUPV3_0_SE3 and QUPV3_0_SE7 for USB-C0 and USB-C1 Retimer I2C access
* b00d2ad5c2 vc/intel/fsp/fsp2_0/pantherlake: Update PTL FSP headers to FSP 3442.07
* b7ad850fd6 mb/google/bluey: Add percentage symbol to battery level log
* ae48ff8c0b drivers/wwan/fm: Use _EVT method to enhance GPIO event handling
* 7ed7abbd92 acpigen_ps2_keybd: map screenlock
* 6b52f82df2 util/amdfwtool: Remove AMD_FW_GFXIMU_2 entry
* b9145e1588 util/amdfwtool: Remove duplicated AMD_TA_IKEK
* e393fd00a4 include/cper.h: Update cper_ia32x64_context_t
* 14a7a2315e soc/mediatek/mt8196: Call fsp_init via boot state
* 82f9c593ab payloads/libpayload: Add support for RISC-V 64-bit architecture
* 4decc72c23 drivers/intel/touch: Change ELAN device name for Google's Rex touch device
* 17b36286c8 mb/google/hatch/var/kindred: Drop VBT for KLED variant
* cf280eaa7f amdblocks/root_complex.h: Add new IOHC base addresses
* ba0483c94a soc/amd/common/Makefile.mk: Strip quotes from AMDFW_CONFIG_FILE
* b2b1eb3c5a soc/amd/common/block/smn: Add simple SMN I/O accessors
* f8c10eda36 mb/google/nissa/var/gothrax: Add Rayson parts to RAM ID table
* 0c26c4494d mainboard/google/bluey: Enable display clocks and MMCX power rail
* e1e7b9b203 soc/qualcomm/x1p42100: Add API to enable display clocks
* 02e6f2a214 soc/qualcomm/x1p42100: Add API to intialize RPMh resources for display
* dc162f84be soc/qualcomm/common: Add RPMh driver support
* 999dd8905a lib/bootmem: Replace conditional return with assert in bootmem_add_range_from
* eb814f3b12 lib/bootmem: Remove forward declaration of bootmem_range_string
* 6f394ce50d coreboot_tables: Update CB_MEM_TAG and LB_MEM_TAG values to 17
* 6966885290 mb/google/skywalker: Extend MIPI panel delay to meet T3 timing
* 273e84976b mb/asus/p8z77-v: Apply vendor PCH interrupt mapping
* 573c37a518 sio/nuvoton/common: Refactor nuvoton_pnp_*_config_state()
* 0c2a3002d9 mb/asrock/z87_extreme4: Temporarily refactor nuvoton_pnp_*_conf_state()
* 19deb55f02 mb/asrock/fatal1ty_z87_professional: Temporarily refactor nuvoton_pnp_*()
* 3d980dae22 mb/google/nissa/var/rull: Add 3 DDR modules to RAM id table
* 4030fc5f91 device/Kconfig: Gate early libgfxinit default on ChromeOS
* b8402a8dfc src/qualcomm/common: Remove display buffer region declarations
* 7896d94c76 soc/qualcomm/x1p42100: Avoid reserving display buffer region
* fe0e14d716 soc/qualcomm/x1p42100: Skip SHRM meta firmware load in ramdump mode
* 56013ce0ff mainboard/google/bluey: Skip SHRM firmware load/reset in ramdump mode
* b8680d53ac mb/google/ocelot/var/ocicat: Add fw_config definitions with UFSC
* c3ff1addde mb/google/ocelot/var/ocicat: Add WIFI SAR table
* 9b5d985838 mb/google/ocelot/var/ocicat: Update audio settings
* 091e8140ea spd/lp5: Add SPD for RS1G32LO5D2FDB-23BT
* bc240baba5 Documentation: Add method for GRUB2 to load seabios from drive
* 02c57577f3 superio/nuvoton: Add common ACPI ASL code
* 7273a5b932 mb/asus/p8x7x-series: Move CONFIG_SUPERIO_PNP_BASE to sio/nuvoton
* 40eca2934f soc/mediatek/common: Track firmware splash screen rendering completion
* 49d34a6f6c mb/google/skywalker: Add MIPI panel GPIOs via lb_gpio
* b354b49d58 libpayload: Increase SYSINFO_MAX_GPIOS to 10
* 25d159a7ec mb/google/skywalker: Use FW_CONFIG for storage and dual init support
* 4063a4c3f1 mb/google/skywalker: Create variant Mace
* a1e9cd3669 mb/google/bluey: Configure QUPV3_2_SE4 for ADSP I2C access
* 2b9653cf34 arch/x86/acpi_bert_storage.c: rename check -> proc_err_info
* a3236ef110 arch/x86/acpi_bert_storage.c: Fix array size calculation
* e3fc4a1f69 ec/starlabs/merlin: Reorganize Kconfig and guard options properly
* 4a07174d0e util/cbfstool: Fix RISC-V relocations
* d912ae91b0 mb/google/bluey: Configure GPIOs for USB camera
* a27a7f0c11 mb/google/trulo/var/kaladin: Decrease G2 touch stop delay time to 150 ms
* 3bebadd347 mb/google/bluey: Enable dynamic SoC calculation and log battery level
* bab8ca2bd0 ec/google/chromeec: Refactor Battery SoC calculation
* 02b3674198 ec/google/chromeec: Add SoC calculation from battery dynamic info
* 06c83d473b ec/google/chromeec: Add function to read battery state of charge
* 7c3d45d94f drivers/usb/intel_bluetooth: Correct S-state level for power resource
* 091ac10059 soc/intel/cnvi: Correct S-state level for CNVP
* 4631f94e51 drivers/usb/intel_bluetooth: Advertise D2 for S0W
* ea045bd322 soc/intel/cnvi: Re-enable Bluetooth on reset timeout
* ffac7d90da soc/intel/cnvi: Correct error values for _RST
* f24a2f35bf mb/asrock: Correct vendor name ASROCK to ASRock
* aeb9dcf2fa libpayload: Add new memory type CB_MEM_TAG
* c093b52c20 soc/mediatek: Correct BIAS_ON value to get bias ready
* 531c24cd0a Documentation: Fix typo in 'particularly'
* 331e93cbd2 libpayload/tests: Disable generation of lcov HTML
* 7d38a96c44 mb/google/skywalker: Create variant Vader
* 75333ea7c8 mb/google/bluey: Refactor is_pd_sync_required function
* 3f00ecb05c soc/intel/pantherlake: Add ChromeOS board-specific TDP setting
* 1dfa80f02c soc/intel/pantherlake: Add configurable TDP support
* dc68f5b265 soc/intel/pantherlake: Let common code set PL1 to TDP
* bb3f40627d util/autoport: Fix style issue in generated code
* 94b326469b mb/google/bluey: Increase FW_MAIN_A/B slot size to 8.5MB
* e6c3250912 mipi/panel: Remove pic_width and pic_height from dsc_config
* 456403d9ba soc/mediatek/mt8196: Stop using dsc_config.pic_width
* 7d50f63213 soc/mediatek: Drop mtk_ddp_soc_mode_set()
* 61c9450d62 soc/mediatek/common: Pass dsi_regs to mtk_dsi_cphy_timing()
* ba5b5ea406 soc/mediatek/mt8196: Move DPM and SPM initialization
* 206025754f libpayload/tests: Remove unrecognized flag --ignore-errors inconsistent
* 82c06da584 3rdparty/fsp: Update to upstream master
* c5eecee5e9 mb/google/rex: Add IPUA device and sensor names
* bceb2c83ad mb/{google/intel}: Fix/add missing MIPI camera SSDB lanes_used/link_used
* de4148888c tests: Disable generation of lcov HTML
* 188cd88ac7 soc/mediatek/mt8196: Correct MIPI register control
* 080ca011fe Documentation: Finalize 25.12 release notes
* 695041a9bf mb/starlabs/*: Increase size of SMMSTORE region to 512KB
* 975e48faaf mb/starlabs/starlite_adl: Add CFR option for charge LED brightness
* 951c28c1bf mb/starlabs/starfighter: Add CFR options for power/charge LED brightness
* ab2c69c4f3 mb/starlabs/starbook: Add CFR options for power/charge LED brightness
* 84ff3d3d12 ec/starlabs/merlin: Add charge LED brightness control
* ac170631d5 mb/starlabs/starlite: Fix ddr5 entry
* 0e217cf1d3 soc/mediatek/mt8196: Increase FRAMEBUFFER to 32MiB
* 003ea85115 soc/mediatek/mt8196: Support logo display on DISP_PATH_DUAL_MIPI path
* 7e7ba6fb11 security/lockdown/lockdown.c: option to lock COREBOOT and BOOTBLOCK
* 56a7ae4389 soc/mediatek/mt8196: Notify MCUPM to support MTE
* 7c7feca258 CBFS verification: support Top Swap redundancy
* 739808011a Makefile.mk: don't add bootblock after other files
* cbac0d7a25 Makefile.mk,cpu/intel/fit/Makefile.mk: introduce CBFS_REGIONS
* f773a0faac cpu/intel/fit/Makefile.mk: make FIT in TOPSWAP point at MCU in COREBOOT_TS
* fa80ab0146 src/Kconfig: add MAINBOARD_NEEDS_CMOS_OPTIONS
* 59d438f5c7 mb/google/bluey: Remove GSCVD region from Bluey and BlueyH variants
* 7c4d9e0862 mb/google/*: Update Kconfig names with all known board names
* 35be1ab679 configs: Build test ramstage zstd compressed
* 2d99da12a9 commonlib/bsd: Add zstd support
* 4ca5e9c8c6 rules.h: Add ENV_RAMSTAGE_LOADER
* 0421ef2cd8 util/cbfstool: Add zstd support
* 0302b2ee07 lib/xxhash: Move to commonlib/bsd
* 76e9635346 amdfwread: Parse and print directory sizes
* a3adf4898b mb/google/brya/var/pujjocento: Add 2 Micron modules to RAM id table
* d1e1003217 spd/lp5: Add SPD for MT62F2G32D4DS-031RFWT:C
* d528561130 mb/google/bluey: Use PMIC for off-mode detection
* 65833355ca tests: Disable gcov warnings
* 060d18f070 soc/mediatek/mt8196: Add DSI dual channel
Signed-off-by: Leah Rowe <leah@libreboot.org>
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Thank you Iru Cai for this coreboot port.
Signed-off-by: Leah Rowe <leah@libreboot.org>
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This reverts commit 2e6f6e25791afa38a2c3af781aab6198d37f5622.
This was a stupid revert. I don't remember why I even did it.
Better to make the releases *not* take up an extra 100MB per
source file, until I actually need these extra files.
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i did: ./mk -u u-boot
otherwise, building u-boot asks for user input
Signed-off-by: Leah Rowe <leah@libreboot.org>
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Signed-off-by: Leah Rowe <leah@libreboot.org>
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Signed-off-by: Leah Rowe <leah@libreboot.org>
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