diff options
Diffstat (limited to 'config')
343 files changed, 15199 insertions, 2314 deletions
diff --git a/config/coreboot/coreboot413/target.cfg b/config/coreboot/coreboot413/target.cfg index 5c2823e3..a0aae341 100644 --- a/config/coreboot/coreboot413/target.cfg +++ b/config/coreboot/coreboot413/target.cfg @@ -1,2 +1,4 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="coreboot413" rev="5c186c6777c9438ff4681929c9c25c98dee28bef" diff --git a/config/coreboot/d510mo/target.cfg b/config/coreboot/d510mo/target.cfg index bb79aee5..e6c6d033 100644 --- a/config/coreboot/d510mo/target.cfg +++ b/config/coreboot/d510mo/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" diff --git a/config/coreboot/d510mo_16mb/target.cfg b/config/coreboot/d510mo_16mb/target.cfg index 62768ec7..cbb93fc1 100644 --- a/config/coreboot/d510mo_16mb/target.cfg +++ b/config/coreboot/d510mo_16mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" diff --git a/config/coreboot/d945gclf_512kb/target.cfg b/config/coreboot/d945gclf_512kb/target.cfg index d2d78f7a..8bddc19c 100644 --- a/config/coreboot/d945gclf_512kb/target.cfg +++ b/config/coreboot/d945gclf_512kb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" diff --git a/config/coreboot/d945gclf_8mb/target.cfg b/config/coreboot/d945gclf_8mb/target.cfg index 0d97499e..447dc86b 100644 --- a/config/coreboot/d945gclf_8mb/target.cfg +++ b/config/coreboot/d945gclf_8mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" diff --git a/config/coreboot/default/patches/0052-Disable-compression-on-refcode-insertion.patch b/config/coreboot/default/patches/0052-Disable-compression-on-refcode-insertion.patch new file mode 100644 index 00000000..1c089279 --- /dev/null +++ b/config/coreboot/default/patches/0052-Disable-compression-on-refcode-insertion.patch @@ -0,0 +1,31 @@ +From 1e72e6df7f5d71fd41350e34d0a8bd5230349235 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Tue, 31 Dec 2024 14:42:24 +0000 +Subject: [PATCH 1/1] Disable compression on refcode insertion + +Compression is not reliably reproducible. In an lbmk release +context, this means we cannot rely on vendorfile insertion. + +Therefore, use uncompressed refcode. + +Signed-off-by: Leah Rowe <info@minifree.org> +--- + Makefile.mk | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/Makefile.mk b/Makefile.mk +index e9ad2ccbb2..6a96d45a83 100644 +--- a/Makefile.mk ++++ b/Makefile.mk +@@ -1364,7 +1364,7 @@ endif + cbfs-files-$(CONFIG_HAVE_REFCODE_BLOB) += $(CONFIG_CBFS_PREFIX)/refcode + $(CONFIG_CBFS_PREFIX)/refcode-file := $(REFCODE_BLOB) + $(CONFIG_CBFS_PREFIX)/refcode-type := stage +-$(CONFIG_CBFS_PREFIX)/refcode-compression := $(CBFS_COMPRESS_FLAG) ++$(CONFIG_CBFS_PREFIX)/refcode-compression := none + + cbfs-files-$(CONFIG_SEABIOS_VGA_COREBOOT) += vgaroms/seavgabios.bin + vgaroms/seavgabios.bin-file := $(CONFIG_PAYLOAD_VGABIOS_FILE) +-- +2.39.5 + diff --git a/config/coreboot/default/target.cfg b/config/coreboot/default/target.cfg index 3a773b43..9de01b28 100644 --- a/config/coreboot/default/target.cfg +++ b/config/coreboot/default/target.cfg @@ -1,2 +1,4 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" rev="97bc693abc482139774a656212935387d43df8e2" diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb index b0fee42b..f6ce2076 100644 --- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb @@ -86,6 +86,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -107,7 +108,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro" CONFIG_MAINBOARD_VERSION="1.0" @@ -142,11 +145,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" # CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_USE_PM_ACPI_TIMER=y # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set @@ -175,7 +179,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro" CONFIG_USE_LEGACY_8254_TIMER=y CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_DRIVERS_INTEL_WIFI=y @@ -183,7 +186,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin" CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y # CONFIG_DEBUG_SMI is not set @@ -192,8 +194,8 @@ CONFIG_HAVE_IFD_BIN=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y CONFIG_GFX_GMA_PANEL_1_ON_EDP=y @@ -237,8 +239,8 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 # SoC # CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" -CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd" -CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd" +CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" +CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" CONFIG_CBFS_MCACHE_SIZE=0x4000 CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 @@ -287,6 +289,7 @@ CONFIG_SOC_INTEL_KABYLAKE=y CONFIG_SKYLAKE_SOC_PCH_H=y CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y +CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 CONFIG_CBFS_CACHE_ALIGN=8 @@ -312,7 +315,7 @@ CONFIG_INTEL_CAR_NEM_ENHANCED=y # CONFIG_USE_INTEL_FSP_MP_INIT is not set CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y CONFIG_HAVE_HYPERTHREADING=y -CONFIG_FSP_HYPERTHREADING=y +# CONFIG_FSP_HYPERTHREADING is not set # CONFIG_INTEL_KEYLOCKER is not set # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set @@ -478,6 +481,7 @@ CONFIG_HAVE_ME_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_UDK_BASE=y CONFIG_UDK_2017_BINDING=y CONFIG_UDK_2013_VERSION=2013 @@ -485,6 +489,7 @@ CONFIG_UDK_2017_VERSION=2017 CONFIG_UDK_202005_VERSION=202005 CONFIG_UDK_202111_VERSION=202111 CONFIG_UDK_202302_VERSION=202302 +CONFIG_UDK_202305_VERSION=202305 CONFIG_UDK_VERSION=2017 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y @@ -570,6 +575,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -593,14 +599,12 @@ CONFIG_PLATFORM_USES_FSP2_0=y CONFIG_PLATFORM_USES_FSP2_X86_32=y CONFIG_HAVE_INTEL_FSP_REPO=y CONFIG_ADD_FSP_BINARIES=y -CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_FSP_S_CBFS="fsps.bin" CONFIG_FSP_M_CBFS="fspm.bin" CONFIG_FSP_FULL_FD=y CONFIG_FSP_T_RESERVED_SIZE=0x0 CONFIG_FSP_M_XIP=y CONFIG_HAVE_FSP_LOGO_SUPPORT=y -CONFIG_FSP_COMPRESS_FSP_S_LZ4=y CONFIG_SOC_INTEL_COMMON_FSP_RESET=y CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y @@ -624,6 +628,7 @@ CONFIG_DRIVERS_MC146818=y CONFIG_USE_PC_CMOS_ALTCENTURY=y CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 # CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_USB_ACPI=y CONFIG_DRIVERS_WIFI_GENERIC=y CONFIG_DRIVERS_MTK_WIFI=y # end of Generic Drivers diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode index 90202dc3..593237f1 100644 --- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode @@ -86,6 +86,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -107,7 +108,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro" CONFIG_MAINBOARD_VERSION="1.0" @@ -140,11 +143,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" # CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_USE_PM_ACPI_TIMER=y # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set @@ -173,7 +177,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro" CONFIG_USE_LEGACY_8254_TIMER=y CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_DRIVERS_INTEL_WIFI=y @@ -181,7 +184,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin" CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y # CONFIG_DEBUG_SMI is not set @@ -190,8 +192,8 @@ CONFIG_HAVE_IFD_BIN=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y CONFIG_GFX_GMA_PANEL_1_ON_EDP=y @@ -235,8 +237,8 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 # SoC # CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" -CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd" -CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd" +CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" +CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" CONFIG_CBFS_MCACHE_SIZE=0x4000 CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 @@ -285,6 +287,7 @@ CONFIG_SOC_INTEL_KABYLAKE=y CONFIG_SKYLAKE_SOC_PCH_H=y CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y +CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 CONFIG_CBFS_CACHE_ALIGN=8 @@ -310,7 +313,7 @@ CONFIG_INTEL_CAR_NEM_ENHANCED=y # CONFIG_USE_INTEL_FSP_MP_INIT is not set CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y CONFIG_HAVE_HYPERTHREADING=y -CONFIG_FSP_HYPERTHREADING=y +# CONFIG_FSP_HYPERTHREADING is not set # CONFIG_INTEL_KEYLOCKER is not set # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set # CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set @@ -476,6 +479,7 @@ CONFIG_HAVE_ME_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_UDK_BASE=y CONFIG_UDK_2017_BINDING=y CONFIG_UDK_2013_VERSION=2013 @@ -483,6 +487,7 @@ CONFIG_UDK_2017_VERSION=2017 CONFIG_UDK_202005_VERSION=202005 CONFIG_UDK_202111_VERSION=202111 CONFIG_UDK_202302_VERSION=202302 +CONFIG_UDK_202305_VERSION=202305 CONFIG_UDK_VERSION=2017 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y @@ -562,6 +567,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -585,14 +591,12 @@ CONFIG_PLATFORM_USES_FSP2_0=y CONFIG_PLATFORM_USES_FSP2_X86_32=y CONFIG_HAVE_INTEL_FSP_REPO=y CONFIG_ADD_FSP_BINARIES=y -CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_FSP_S_CBFS="fsps.bin" CONFIG_FSP_M_CBFS="fspm.bin" CONFIG_FSP_FULL_FD=y CONFIG_FSP_T_RESERVED_SIZE=0x0 CONFIG_FSP_M_XIP=y CONFIG_HAVE_FSP_LOGO_SUPPORT=y -CONFIG_FSP_COMPRESS_FSP_S_LZ4=y CONFIG_SOC_INTEL_COMMON_FSP_RESET=y CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y @@ -617,6 +621,7 @@ CONFIG_USE_PC_CMOS_ALTCENTURY=y CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 CONFIG_VGA=y # CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_USB_ACPI=y CONFIG_DRIVERS_WIFI_GENERIC=y CONFIG_DRIVERS_MTK_WIFI=y # end of Generic Drivers diff --git a/config/coreboot/dell3050micro_fsp_16mb/target.cfg b/config/coreboot/dell3050micro_fsp_16mb/target.cfg index 8ab796e4..b6e6c722 100644 --- a/config/coreboot/dell3050micro_fsp_16mb/target.cfg +++ b/config/coreboot/dell3050micro_fsp_16mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="next" xarch="i386-elf" payload_seabios="y" @@ -8,4 +10,5 @@ grubtree="xhci" vcfg="3050micro" build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot" IFD_platform="sklkbl" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" +release="n" # dell3050micro_vfsp_16mb is released instead diff --git a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb new file mode 100644 index 00000000..87918a5f --- /dev/null +++ b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb @@ -0,0 +1,816 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_LTO is not set +# CONFIG_IWYU is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_USE_OPTION_TABLE is not set +CONFIG_COMPRESS_RAMSTAGE_LZMA=y +# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_USE_QC_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_RAMSTAGE=y +# CONFIG_ASAN is not set +# CONFIG_NO_STAGE_CACHE is not set +CONFIG_TSEG_STAGE_CACHE=y +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_BOOTSPLASH_IMAGE is not set + +# +# Software Bill Of Materials (SBOM) +# +# CONFIG_SBOM is not set +# end of Software Bill Of Materials (SBOM) +# end of General setup + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +# CONFIG_VENDOR_ACER is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BOSTENTECH is not set +# CONFIG_VENDOR_BYTEDANCE is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_CLEVO is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set +CONFIG_VENDOR_DELL=y +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set +# CONFIG_VENDOR_EXAMPLE is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_INVENTEC is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set +# CONFIG_VENDOR_LENOVO is not set +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PINE64 is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PRODRIVE is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_STARLABS is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set +# CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set +CONFIG_BOARD_SPECIFIC_OPTIONS=y +CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="dell/optiplex_3050" +CONFIG_VGA_BIOS_ID="8086,0406" +CONFIG_DIMM_MAX=4 +CONFIG_DIMM_SPD_SIZE=512 +CONFIG_FMDFILE="" +# CONFIG_NO_POST is not set +CONFIG_MAINBOARD_VENDOR="Dell Inc." +CONFIG_CBFS_SIZE=0xEEE000 +CONFIG_CONSOLE_SERIAL=y +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840 +CONFIG_MAX_CPUS=16 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_IO=y +CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set +# CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" +# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro" +# CONFIG_CONSOLE_POST is not set +CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" +CONFIG_MAX_SOCKET=1 +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +CONFIG_USE_PM_ACPI_TIMER=y +# CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +CONFIG_BOARD_DELL_OPTIPLEX_3050=y +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set +# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set +# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set +# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set +# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set +# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set +# CONFIG_BOARD_DELL_PRECISION_T1650 is not set +# CONFIG_BOARD_DELL_XPS_8300 is not set +CONFIG_DCACHE_RAM_BASE=0xfef00000 +CONFIG_DCACHE_RAM_SIZE=0x40000 +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 +CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_USE_LEGACY_8254_TIMER=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_DRIVERS_INTEL_WIFI=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd" +CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin" +CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +# CONFIG_DEBUG_SMI is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set +CONFIG_HAVE_IFD_BIN=y +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="PNP0F13" +CONFIG_GFX_GMA_PANEL_1_PORT="eDP" +CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set +CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y +CONFIG_D3COLD_SUPPORT=y +CONFIG_GFX_GMA_PANEL_1_ON_EDP=y +CONFIG_DRIVERS_UART_8250IO=y +CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 +CONFIG_HEAP_SIZE=0x100000 +CONFIG_EC_GPE_SCI=0x50 +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +CONFIG_BOARD_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=16384 +CONFIG_ROM_SIZE=0x01000000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set +CONFIG_POWER_STATE_ON_AFTER_FAILURE=y +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 +# end of Mainboard + +# +# Chipset +# + +# +# SoC +# +CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" +CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" +CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" +CONFIG_CBFS_MCACHE_SIZE=0x4000 +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_SMM_TSEG_SIZE=0x800000 +CONFIG_SMM_RESERVED_SIZE=0x200000 +CONFIG_SMM_MODULE_STACK_SIZE=0x800 +CONFIG_ACPI_BERT_SIZE=0x0 +CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 +CONFIG_ACPI_CPU_STRING="CP%02X" +CONFIG_STACK_SIZE=0x2000 +CONFIG_IFD_CHIPSET="sklkbl" +CONFIG_IED_REGION_SIZE=0x400000 +CONFIG_MAX_ROOT_PORTS=24 +CONFIG_PCR_BASE_ADDRESS=0xfd000000 +CONFIG_CPU_BCLK_MHZ=100 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120 +CONFIG_CPU_XTAL_HZ=24000000 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2 +CONFIG_SOC_INTEL_I2C_DEV_MAX=6 +# CONFIG_ENABLE_SATA_TEST_MODE is not set +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" +CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" +CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 +CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 +CONFIG_INTEL_GMA_BCLV_WIDTH=16 +CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 +CONFIG_INTEL_GMA_BCLM_WIDTH=16 +CONFIG_FSP_PUBLISH_MBP_HOB=y +CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 +CONFIG_MAX_HECI_DEVICES=5 +CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_HAVE_PAM0_REGISTER=y +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000 +CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10 +CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 +CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 +CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y +CONFIG_SOC_INTEL_KABYLAKE=y +CONFIG_SKYLAKE_SOC_PCH_H=y +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y +CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y +CONFIG_FSP_T_LOCATION=0xfffe0000 +CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y +CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 +CONFIG_CBFS_CACHE_ALIGN=8 +CONFIG_SOC_INTEL_COMMON=y + +# +# Intel SoC Common Code for IP blocks +# +CONFIG_SOC_INTEL_COMMON_BLOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y +CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y +# CONFIG_USE_COREBOOT_MP_INIT is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y +CONFIG_INTEL_CAR_NEM_ENHANCED=y +# CONFIG_USE_INTEL_FSP_MP_INIT is not set +CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y +CONFIG_HAVE_HYPERTHREADING=y +# CONFIG_FSP_HYPERTHREADING is not set +# CONFIG_INTEL_KEYLOCKER is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y +CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" +CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" +CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" +CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" +CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" +CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" +CONFIG_SOC_INTEL_CSE_RW_FILE="" +CONFIG_SOC_INTEL_CSE_RW_VERSION="" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE="" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE="" +CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y +CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y +CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y +# CONFIG_SOC_INTEL_DISABLE_IGD is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y +CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y +# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 +CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y +CONFIG_SA_ENABLE_DPR=y +CONFIG_HAVE_CAPID_A_REGISTER=y +CONFIG_HAVE_BDSM_BGSM_REGISTER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y + +# +# Intel SoC Common PCH Code +# +CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y +CONFIG_SOC_INTEL_COMMON_PCH_BASE=y +CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y +CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y +CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y +CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y + +# +# Intel SoC Common coreboot stages and non-IP blocks +# +CONFIG_SOC_INTEL_COMMON_BASECODE=y +CONFIG_SOC_INTEL_COMMON_RESET=y +CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y +CONFIG_PAVP=y +# CONFIG_MMA is not set +CONFIG_SOC_INTEL_COMMON_NHLT=y +# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set + +# +# CPU +# +CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_PARALLEL_MP=y +CONFIG_PARALLEL_MP_AP_WORK=y +CONFIG_XAPIC_ONLY=y +# CONFIG_X2APIC_ONLY is not set +# CONFIG_X2APIC_RUNTIME is not set +# CONFIG_X2APIC_LATE_WORKAROUND is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_HAVE_SMI_HANDLER=y +CONFIG_SMM_TSEG=y +CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 +CONFIG_AP_STACK_SIZE=0x800 +CONFIG_SMP=y +CONFIG_SSE=y +CONFIG_SSE2=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# + +# +# Southbridge +# +# CONFIG_PCIEXP_HOTPLUG is not set +CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 +CONFIG_RCBA_LENGTH=0x4000 + +# +# Super I/O +# +CONFIG_SUPERIO_SMSC_SCH555x=y + +# +# Embedded Controllers +# + +# +# Intel Firmware +# +CONFIG_HAVE_ME_BIN=y +# CONFIG_STITCH_ME_BIN is not set +# CONFIG_CHECK_ME is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set +# CONFIG_USE_ME_CLEANER is not set +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 +CONFIG_UDK_BASE=y +CONFIG_UDK_2017_BINDING=y +CONFIG_UDK_2013_VERSION=2013 +CONFIG_UDK_2017_VERSION=2017 +CONFIG_UDK_202005_VERSION=202005 +CONFIG_UDK_202111_VERSION=202111 +CONFIG_UDK_202302_VERSION=202302 +CONFIG_UDK_202305_VERSION=202305 +CONFIG_UDK_VERSION=2017 +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_ARCH_ALL_STAGES_X86_32=y +CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_PC80_SYSTEM=y +CONFIG_HAVE_CMOS_DEFAULT=y +CONFIG_POSTCAR_STAGE=y +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_HAVE_CF9_RESET=y +CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +# CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 +# end of Chipset + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_LINEAR_FRAMEBUFFER=y +CONFIG_HAVE_FSP_GOP=y +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_RUN_FSP_GOP is not set +# CONFIG_NO_GFX_INIT is not set +CONFIG_NO_EARLY_GFX_INIT=y + +# +# Display +# +# CONFIG_VGA_TEXT_FRAMEBUFFER is not set +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_LINEAR_FRAMEBUFFER=y +# CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y +# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set +# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set +# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 +# end of Display + +CONFIG_PCI=y +CONFIG_ECAM_MMCONF_SUPPORT=y +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_ECAM_MMCONF_LENGTH=0x10000000 +CONFIG_PCI_ALLOW_BUS_MASTER=y +CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y +CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set +# CONFIG_EARLY_PCI_BRIDGE is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +# end of Devices + +# +# Generic Drivers +# +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +CONFIG_CACHE_MRC_SETTINGS=y +CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set +# CONFIG_SMMSTORE is not set +CONFIG_SPI_FLASH=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_DRIVERS_UART=y +# CONFIG_DRIVERS_UART_OXPCIE is not set +# CONFIG_VPD is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVERS_I2C_DESIGNWARE=y +# CONFIG_DRIVERS_I2C_MAX98396 is not set +# CONFIG_FSP_USE_REPO is not set +# CONFIG_DISPLAY_HOBS is not set +# CONFIG_DISPLAY_UPD_DATA is not set +# CONFIG_BMP_LOGO is not set +CONFIG_PLATFORM_USES_FSP2_0=y +CONFIG_PLATFORM_USES_FSP2_X86_32=y +CONFIG_HAVE_INTEL_FSP_REPO=y +CONFIG_ADD_FSP_BINARIES=y +CONFIG_FSP_S_CBFS="fsps.bin" +CONFIG_FSP_M_CBFS="fspm.bin" +# CONFIG_FSP_FULL_FD is not set +CONFIG_FSP_T_RESERVED_SIZE=0x0 +CONFIG_FSP_M_XIP=y +CONFIG_HAVE_FSP_LOGO_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_FSP_RESET=y +CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y +CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y +CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y +# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set +# CONFIG_BUILDING_WITH_DEBUG_FSP is not set +CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_GFX_GMA=y +CONFIG_GFX_GMA_DYN_CPU=y +CONFIG_GFX_GMA_GENERATION="Skylake" +CONFIG_GFX_GMA_PCH="Sunrise_Point" +CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" +CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set +CONFIG_DRIVERS_MC146818=y +CONFIG_USE_PC_CMOS_ALTCENTURY=y +CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +# CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_USB_ACPI=y +CONFIG_DRIVERS_WIFI_GENERIC=y +CONFIG_DRIVERS_MTK_WIFI=y +# end of Generic Drivers + +# +# Security +# + +# +# CBFS verification +# +# CONFIG_CBFS_VERIFICATION is not set +# end of CBFS verification + +# +# Verified Boot (vboot) +# +# end of Verified Boot (vboot) + +# +# Trusted Platform Module +# +CONFIG_NO_TPM=y +CONFIG_PCR_BOOT_MODE=1 +CONFIG_PCR_HWID=1 +CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 +CONFIG_PCR_RUNTIME_DATA=3 +# end of Trusted Platform Module + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set +# end of Memory initialization + +# CONFIG_STM is not set +# CONFIG_INTEL_CBNT_SUPPORT is not set +CONFIG_BOOTMEDIA_LOCK_NONE=y +# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_CHIP is not set +# CONFIG_BOOTMEDIA_SMM_BWP is not set +# end of Security + +CONFIG_ACPI_HAVE_PCAT_8259=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +CONFIG_ACPI_SOC_NVS=y +CONFIG_ACPI_CUSTOM_MADT=y +CONFIG_ACPI_NO_CUSTOM_MADT=y +CONFIG_ACPI_COMMON_MADT_LAPIC=y +CONFIG_ACPI_COMMON_MADT_IOAPIC=y +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_ACPI_LPIT=y +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y +CONFIG_RTC=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y + +# +# I/O mapped, 8250-compatible +# +CONFIG_TTYS0_BASE=0x3f8 + +# +# Serial port base address = 0x3f8 +# +# CONFIG_CONSOLE_SERIAL_921600 is not set +# CONFIG_CONSOLE_SERIAL_460800 is not set +# CONFIG_CONSOLE_SERIAL_230400 is not set +CONFIG_CONSOLE_SERIAL_115200=y +# CONFIG_CONSOLE_SERIAL_57600 is not set +# CONFIG_CONSOLE_SERIAL_38400 is not set +# CONFIG_CONSOLE_SERIAL_19200 is not set +# CONFIG_CONSOLE_SERIAL_9600 is not set +CONFIG_TTYS0_LCS=3 +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_SPI_FLASH is not set +# CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CMOS_POST is not set +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_POST_IO_PORT=0x80 +CONFIG_HWBASE_DEBUG_CB=y +# end of Console + +CONFIG_ACPI_S1_NOT_SUPPORTED=y +CONFIG_HAVE_ACPI_RESUME=y +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_HAVE_OPTION_TABLE=y +CONFIG_IOAPIC=y +CONFIG_ACPI_NHLT=y + +# +# System tables +# +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_BIOS_VENDOR="coreboot" +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" +# end of System tables + +# +# Payload +# +CONFIG_PAYLOAD_NONE=y +# end of Payload + +# +# Debugging +# + +# +# CPU Debug Settings +# +# CONFIG_DISPLAY_MTRRS is not set + +# +# Vendorcode Debug Settings +# + +# +# BLOB Debug Settings +# +# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set +# CONFIG_DISPLAY_FSP_HEADER is not set +# CONFIG_VERIFY_HOBS is not set +# CONFIG_DISPLAY_FSP_VERSION_INFO is not set +CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y +# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set + +# +# General Debug Settings +# +# CONFIG_GDB_STUB is not set +CONFIG_HAVE_DEBUG_GPIO=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set +# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set +# end of Debugging + +CONFIG_RAMSTAGE_ADA=y +CONFIG_RAMSTAGE_LIBHWBASE=y +CONFIG_HWBASE_DYNAMIC_MMIO=y +CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 +CONFIG_HWBASE_DIRECT_PCIDEV=y +CONFIG_DECOMPRESS_OFAST=y +CONFIG_WARNINGS_ARE_ERRORS=y +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode new file mode 100644 index 00000000..b55261a4 --- /dev/null +++ b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode @@ -0,0 +1,809 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_LTO is not set +# CONFIG_IWYU is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_USE_OPTION_TABLE is not set +CONFIG_COMPRESS_RAMSTAGE_LZMA=y +# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_USE_QC_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_RAMSTAGE=y +# CONFIG_ASAN is not set +# CONFIG_NO_STAGE_CACHE is not set +CONFIG_TSEG_STAGE_CACHE=y +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_BOOTSPLASH_IMAGE is not set + +# +# Software Bill Of Materials (SBOM) +# +# CONFIG_SBOM is not set +# end of Software Bill Of Materials (SBOM) +# end of General setup + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +# CONFIG_VENDOR_ACER is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BOSTENTECH is not set +# CONFIG_VENDOR_BYTEDANCE is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_CLEVO is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set +CONFIG_VENDOR_DELL=y +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set +# CONFIG_VENDOR_EXAMPLE is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_INVENTEC is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set +# CONFIG_VENDOR_LENOVO is not set +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PINE64 is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PRODRIVE is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_STARLABS is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set +# CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set +CONFIG_BOARD_SPECIFIC_OPTIONS=y +CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="dell/optiplex_3050" +CONFIG_VGA_BIOS_ID="8086,0406" +CONFIG_DIMM_MAX=4 +CONFIG_DIMM_SPD_SIZE=512 +CONFIG_FMDFILE="" +# CONFIG_NO_POST is not set +CONFIG_MAINBOARD_VENDOR="Dell Inc." +CONFIG_CBFS_SIZE=0xEEE000 +CONFIG_CONSOLE_SERIAL=y +CONFIG_MAX_CPUS=16 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_IO=y +CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set +# CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" +# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro" +# CONFIG_CONSOLE_POST is not set +CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" +CONFIG_MAX_SOCKET=1 +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +CONFIG_USE_PM_ACPI_TIMER=y +# CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +CONFIG_BOARD_DELL_OPTIPLEX_3050=y +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set +# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set +# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set +# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set +# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set +# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set +# CONFIG_BOARD_DELL_PRECISION_T1650 is not set +# CONFIG_BOARD_DELL_XPS_8300 is not set +CONFIG_DCACHE_RAM_BASE=0xfef00000 +CONFIG_DCACHE_RAM_SIZE=0x40000 +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 +CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_USE_LEGACY_8254_TIMER=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_DRIVERS_INTEL_WIFI=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd" +CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin" +CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +# CONFIG_DEBUG_SMI is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set +CONFIG_HAVE_IFD_BIN=y +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="PNP0F13" +CONFIG_GFX_GMA_PANEL_1_PORT="eDP" +CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set +CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y +CONFIG_D3COLD_SUPPORT=y +CONFIG_GFX_GMA_PANEL_1_ON_EDP=y +CONFIG_DRIVERS_UART_8250IO=y +CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 +CONFIG_HEAP_SIZE=0x100000 +CONFIG_EC_GPE_SCI=0x50 +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +CONFIG_BOARD_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=16384 +CONFIG_ROM_SIZE=0x01000000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set +CONFIG_POWER_STATE_ON_AFTER_FAILURE=y +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 +# end of Mainboard + +# +# Chipset +# + +# +# SoC +# +CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" +CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" +CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" +CONFIG_CBFS_MCACHE_SIZE=0x4000 +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_SMM_TSEG_SIZE=0x800000 +CONFIG_SMM_RESERVED_SIZE=0x200000 +CONFIG_SMM_MODULE_STACK_SIZE=0x800 +CONFIG_ACPI_BERT_SIZE=0x0 +CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 +CONFIG_ACPI_CPU_STRING="CP%02X" +CONFIG_STACK_SIZE=0x2000 +CONFIG_IFD_CHIPSET="sklkbl" +CONFIG_IED_REGION_SIZE=0x400000 +CONFIG_MAX_ROOT_PORTS=24 +CONFIG_PCR_BASE_ADDRESS=0xfd000000 +CONFIG_CPU_BCLK_MHZ=100 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120 +CONFIG_CPU_XTAL_HZ=24000000 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2 +CONFIG_SOC_INTEL_I2C_DEV_MAX=6 +# CONFIG_ENABLE_SATA_TEST_MODE is not set +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" +CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" +CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 +CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 +CONFIG_INTEL_GMA_BCLV_WIDTH=16 +CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 +CONFIG_INTEL_GMA_BCLM_WIDTH=16 +CONFIG_FSP_PUBLISH_MBP_HOB=y +CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 +CONFIG_MAX_HECI_DEVICES=5 +CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_HAVE_PAM0_REGISTER=y +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000 +CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10 +CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 +CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 +CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y +CONFIG_SOC_INTEL_KABYLAKE=y +CONFIG_SKYLAKE_SOC_PCH_H=y +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y +CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y +CONFIG_FSP_T_LOCATION=0xfffe0000 +CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y +CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 +CONFIG_CBFS_CACHE_ALIGN=8 +CONFIG_SOC_INTEL_COMMON=y + +# +# Intel SoC Common Code for IP blocks +# +CONFIG_SOC_INTEL_COMMON_BLOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y +CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y +# CONFIG_USE_COREBOOT_MP_INIT is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y +CONFIG_INTEL_CAR_NEM_ENHANCED=y +# CONFIG_USE_INTEL_FSP_MP_INIT is not set +CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y +CONFIG_HAVE_HYPERTHREADING=y +# CONFIG_FSP_HYPERTHREADING is not set +# CONFIG_INTEL_KEYLOCKER is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y +CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" +CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" +CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" +CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" +CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" +CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" +CONFIG_SOC_INTEL_CSE_RW_FILE="" +CONFIG_SOC_INTEL_CSE_RW_VERSION="" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE="" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE="" +CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y +CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y +CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y +# CONFIG_SOC_INTEL_DISABLE_IGD is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y +CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y +# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 +CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y +CONFIG_SA_ENABLE_DPR=y +CONFIG_HAVE_CAPID_A_REGISTER=y +CONFIG_HAVE_BDSM_BGSM_REGISTER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y + +# +# Intel SoC Common PCH Code +# +CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y +CONFIG_SOC_INTEL_COMMON_PCH_BASE=y +CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y +CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y +CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y +CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y + +# +# Intel SoC Common coreboot stages and non-IP blocks +# +CONFIG_SOC_INTEL_COMMON_BASECODE=y +CONFIG_SOC_INTEL_COMMON_RESET=y +CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y +CONFIG_PAVP=y +# CONFIG_MMA is not set +CONFIG_SOC_INTEL_COMMON_NHLT=y +# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set + +# +# CPU +# +CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_PARALLEL_MP=y +CONFIG_PARALLEL_MP_AP_WORK=y +CONFIG_XAPIC_ONLY=y +# CONFIG_X2APIC_ONLY is not set +# CONFIG_X2APIC_RUNTIME is not set +# CONFIG_X2APIC_LATE_WORKAROUND is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_HAVE_SMI_HANDLER=y +CONFIG_SMM_TSEG=y +CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 +CONFIG_AP_STACK_SIZE=0x800 +CONFIG_SMP=y +CONFIG_SSE=y +CONFIG_SSE2=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# + +# +# Southbridge +# +# CONFIG_PCIEXP_HOTPLUG is not set +CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 +CONFIG_RCBA_LENGTH=0x4000 + +# +# Super I/O +# +CONFIG_SUPERIO_SMSC_SCH555x=y + +# +# Embedded Controllers +# + +# +# Intel Firmware +# +CONFIG_HAVE_ME_BIN=y +# CONFIG_STITCH_ME_BIN is not set +# CONFIG_CHECK_ME is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set +# CONFIG_USE_ME_CLEANER is not set +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 +CONFIG_UDK_BASE=y +CONFIG_UDK_2017_BINDING=y +CONFIG_UDK_2013_VERSION=2013 +CONFIG_UDK_2017_VERSION=2017 +CONFIG_UDK_202005_VERSION=202005 +CONFIG_UDK_202111_VERSION=202111 +CONFIG_UDK_202302_VERSION=202302 +CONFIG_UDK_202305_VERSION=202305 +CONFIG_UDK_VERSION=2017 +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_ARCH_ALL_STAGES_X86_32=y +CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_PC80_SYSTEM=y +CONFIG_HAVE_CMOS_DEFAULT=y +CONFIG_POSTCAR_STAGE=y +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_HAVE_CF9_RESET=y +CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +# CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 +# end of Chipset + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_LINEAR_FRAMEBUFFER=y +CONFIG_HAVE_FSP_GOP=y +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_RUN_FSP_GOP is not set +# CONFIG_NO_GFX_INIT is not set +CONFIG_NO_EARLY_GFX_INIT=y + +# +# Display +# +CONFIG_VGA_TEXT_FRAMEBUFFER=y +# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 +# end of Display + +CONFIG_PCI=y +CONFIG_ECAM_MMCONF_SUPPORT=y +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_ECAM_MMCONF_LENGTH=0x10000000 +CONFIG_PCI_ALLOW_BUS_MASTER=y +CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y +CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set +# CONFIG_EARLY_PCI_BRIDGE is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +# end of Devices + +# +# Generic Drivers +# +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +CONFIG_CACHE_MRC_SETTINGS=y +CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set +# CONFIG_SMMSTORE is not set +CONFIG_SPI_FLASH=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_DRIVERS_UART=y +# CONFIG_DRIVERS_UART_OXPCIE is not set +# CONFIG_VPD is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVERS_I2C_DESIGNWARE=y +# CONFIG_DRIVERS_I2C_MAX98396 is not set +# CONFIG_FSP_USE_REPO is not set +# CONFIG_DISPLAY_HOBS is not set +# CONFIG_DISPLAY_UPD_DATA is not set +# CONFIG_BMP_LOGO is not set +CONFIG_PLATFORM_USES_FSP2_0=y +CONFIG_PLATFORM_USES_FSP2_X86_32=y +CONFIG_HAVE_INTEL_FSP_REPO=y +CONFIG_ADD_FSP_BINARIES=y +CONFIG_FSP_S_CBFS="fsps.bin" +CONFIG_FSP_M_CBFS="fspm.bin" +# CONFIG_FSP_FULL_FD is not set +CONFIG_FSP_T_RESERVED_SIZE=0x0 +CONFIG_FSP_M_XIP=y +CONFIG_HAVE_FSP_LOGO_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_FSP_RESET=y +CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y +CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y +CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y +# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set +# CONFIG_BUILDING_WITH_DEBUG_FSP is not set +CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_GFX_GMA=y +CONFIG_GFX_GMA_DYN_CPU=y +CONFIG_GFX_GMA_GENERATION="Skylake" +CONFIG_GFX_GMA_PCH="Sunrise_Point" +CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" +CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set +CONFIG_DRIVERS_MC146818=y +CONFIG_USE_PC_CMOS_ALTCENTURY=y +CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +CONFIG_VGA=y +# CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_USB_ACPI=y +CONFIG_DRIVERS_WIFI_GENERIC=y +CONFIG_DRIVERS_MTK_WIFI=y +# end of Generic Drivers + +# +# Security +# + +# +# CBFS verification +# +# CONFIG_CBFS_VERIFICATION is not set +# end of CBFS verification + +# +# Verified Boot (vboot) +# +# end of Verified Boot (vboot) + +# +# Trusted Platform Module +# +CONFIG_NO_TPM=y +CONFIG_PCR_BOOT_MODE=1 +CONFIG_PCR_HWID=1 +CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 +CONFIG_PCR_RUNTIME_DATA=3 +# end of Trusted Platform Module + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set +# end of Memory initialization + +# CONFIG_STM is not set +# CONFIG_INTEL_CBNT_SUPPORT is not set +CONFIG_BOOTMEDIA_LOCK_NONE=y +# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_CHIP is not set +# CONFIG_BOOTMEDIA_SMM_BWP is not set +# end of Security + +CONFIG_ACPI_HAVE_PCAT_8259=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +CONFIG_ACPI_SOC_NVS=y +CONFIG_ACPI_CUSTOM_MADT=y +CONFIG_ACPI_NO_CUSTOM_MADT=y +CONFIG_ACPI_COMMON_MADT_LAPIC=y +CONFIG_ACPI_COMMON_MADT_IOAPIC=y +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_ACPI_LPIT=y +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y +CONFIG_RTC=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y + +# +# I/O mapped, 8250-compatible +# +CONFIG_TTYS0_BASE=0x3f8 + +# +# Serial port base address = 0x3f8 +# +# CONFIG_CONSOLE_SERIAL_921600 is not set +# CONFIG_CONSOLE_SERIAL_460800 is not set +# CONFIG_CONSOLE_SERIAL_230400 is not set +CONFIG_CONSOLE_SERIAL_115200=y +# CONFIG_CONSOLE_SERIAL_57600 is not set +# CONFIG_CONSOLE_SERIAL_38400 is not set +# CONFIG_CONSOLE_SERIAL_19200 is not set +# CONFIG_CONSOLE_SERIAL_9600 is not set +CONFIG_TTYS0_LCS=3 +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_SPI_FLASH is not set +# CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CMOS_POST is not set +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_POST_IO_PORT=0x80 +CONFIG_HWBASE_DEBUG_CB=y +# end of Console + +CONFIG_ACPI_S1_NOT_SUPPORTED=y +CONFIG_HAVE_ACPI_RESUME=y +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_HAVE_OPTION_TABLE=y +CONFIG_IOAPIC=y +CONFIG_ACPI_NHLT=y + +# +# System tables +# +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_BIOS_VENDOR="coreboot" +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" +# end of System tables + +# +# Payload +# +CONFIG_PAYLOAD_NONE=y +# end of Payload + +# +# Debugging +# + +# +# CPU Debug Settings +# +# CONFIG_DISPLAY_MTRRS is not set + +# +# Vendorcode Debug Settings +# + +# +# BLOB Debug Settings +# +# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set +# CONFIG_DISPLAY_FSP_HEADER is not set +# CONFIG_VERIFY_HOBS is not set +# CONFIG_DISPLAY_FSP_VERSION_INFO is not set +CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y +# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set + +# +# General Debug Settings +# +# CONFIG_GDB_STUB is not set +CONFIG_HAVE_DEBUG_GPIO=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set +# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set +# end of Debugging + +CONFIG_RAMSTAGE_ADA=y +CONFIG_RAMSTAGE_LIBHWBASE=y +CONFIG_HWBASE_DYNAMIC_MMIO=y +CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 +CONFIG_HWBASE_DIRECT_PCIDEV=y +CONFIG_DECOMPRESS_OFAST=y +CONFIG_WARNINGS_ARE_ERRORS=y +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/dell3050micro_vfsp_16mb/target.cfg b/config/coreboot/dell3050micro_vfsp_16mb/target.cfg new file mode 100644 index 00000000..d08c4eb5 --- /dev/null +++ b/config/coreboot/dell3050micro_vfsp_16mb/target.cfg @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +tree="next" +xarch="i386-elf" +payload_seabios="y" +payload_grub="y" +payload_memtest="y" +grub_scan_disk="nvme ahci" +grubtree="xhci" +vcfg="3050micro" +build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot" +IFD_platform="sklkbl" +payload_uboot_amd64="y" diff --git a/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode b/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode index 05151e1f..6364bc56 100644 --- a/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode @@ -105,7 +105,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set # CONFIG_VENDOR_UP is not set -CONFIG_MAINBOARD_PART_NUMBER="Precision T1650" +CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 9010" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_workstations" CONFIG_VGA_BIOS_ID="8086,0106" diff --git a/config/coreboot/dell7010sff_12mb/target.cfg b/config/coreboot/dell7010sff_12mb/target.cfg index aa08547a..de6a8af8 100644 --- a/config/coreboot/dell7010sff_12mb/target.cfg +++ b/config/coreboot/dell7010sff_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci" grubtree="nvme" vcfg="t1650" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb index 87cbe2c8..8d9cb74b 100644 --- a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb @@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -108,7 +109,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/optiplex_780" @@ -142,11 +145,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" # CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set @@ -175,7 +179,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT" CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y @@ -183,7 +186,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y @@ -351,6 +353,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -436,6 +439,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode index c9881447..48210da8 100644 --- a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode @@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -108,7 +109,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/optiplex_780" @@ -140,11 +143,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" # CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set @@ -173,7 +177,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT" CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y @@ -181,7 +184,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y @@ -349,6 +351,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -432,6 +435,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell780mt_8mb/target.cfg b/config/coreboot/dell780mt_8mb/target.cfg index 50ea82b6..e2f4d8a3 100644 --- a/config/coreboot/dell780mt_8mb/target.cfg +++ b/config/coreboot/dell780mt_8mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="next" xarch="i386-elf" payload_seabios="y" @@ -6,4 +8,4 @@ payload_memtest="y" grub_scan_disk="nvme ahci ata" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb index cb297f87..cf288873 100644 --- a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb @@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -108,7 +109,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/optiplex_780" @@ -142,11 +145,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" # CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set @@ -175,7 +179,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT" CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y @@ -183,7 +186,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y @@ -351,6 +353,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -436,6 +439,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode index 5ce36d0d..39650339 100644 --- a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode @@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -108,7 +109,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 MT" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/optiplex_780" @@ -140,11 +143,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" # CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set @@ -173,7 +177,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT" CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y @@ -181,7 +184,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y @@ -349,6 +351,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -432,6 +435,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell780mt_truncate_8mb/target.cfg b/config/coreboot/dell780mt_truncate_8mb/target.cfg index 50ea82b6..e2f4d8a3 100644 --- a/config/coreboot/dell780mt_truncate_8mb/target.cfg +++ b/config/coreboot/dell780mt_truncate_8mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="next" xarch="i386-elf" payload_seabios="y" @@ -6,4 +8,4 @@ payload_memtest="y" grub_scan_disk="nvme ahci ata" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb index 54c0d66a..93a87b24 100644 --- a/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb @@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -108,7 +109,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/optiplex_780" @@ -142,11 +145,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" # CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set @@ -175,7 +179,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT" CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y @@ -183,7 +186,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y @@ -351,6 +353,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -436,6 +439,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode index 9d397cf8..e92c5b5b 100644 --- a/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode @@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -108,7 +109,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/optiplex_780" @@ -140,11 +143,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" # CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set @@ -173,7 +177,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT" CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y @@ -181,7 +184,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y @@ -349,6 +351,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -432,6 +435,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell780usff_8mb/target.cfg b/config/coreboot/dell780usff_8mb/target.cfg index 50ea82b6..e2f4d8a3 100644 --- a/config/coreboot/dell780usff_8mb/target.cfg +++ b/config/coreboot/dell780usff_8mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="next" xarch="i386-elf" payload_seabios="y" @@ -6,4 +8,4 @@ payload_memtest="y" grub_scan_disk="nvme ahci ata" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb index 362b09ea..80f35e59 100644 --- a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb @@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -108,7 +109,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/optiplex_780" @@ -142,11 +145,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" # CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set @@ -175,7 +179,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT" CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y @@ -183,7 +186,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y @@ -351,6 +353,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -436,6 +439,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode index 079e8982..3550d507 100644 --- a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode @@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -108,7 +109,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 780 USFF" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/optiplex_780" @@ -140,11 +143,12 @@ CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" # CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set @@ -173,7 +177,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 780 MT" CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y @@ -181,7 +184,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich10/ifd_8_truncate" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich10/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y @@ -349,6 +351,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -432,6 +435,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell780usff_truncate_8mb/target.cfg b/config/coreboot/dell780usff_truncate_8mb/target.cfg index 50ea82b6..e2f4d8a3 100644 --- a/config/coreboot/dell780usff_truncate_8mb/target.cfg +++ b/config/coreboot/dell780usff_truncate_8mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="next" xarch="i386-elf" payload_seabios="y" @@ -6,4 +8,4 @@ payload_memtest="y" grub_scan_disk="nvme ahci ata" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/dell9020mt_nri_12mb/target.cfg b/config/coreboot/dell9020mt_nri_12mb/target.cfg index 5be15ac2..96fbb9e3 100644 --- a/config/coreboot/dell9020mt_nri_12mb/target.cfg +++ b/config/coreboot/dell9020mt_nri_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci" grubtree="xhci" vcfg="haswell" build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/dell9020sff_nri_12mb/target.cfg b/config/coreboot/dell9020sff_nri_12mb/target.cfg index 5be15ac2..96fbb9e3 100644 --- a/config/coreboot/dell9020sff_nri_12mb/target.cfg +++ b/config/coreboot/dell9020sff_nri_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci" grubtree="xhci" vcfg="haswell" build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/e4300_4mb/target.cfg b/config/coreboot/e4300_4mb/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/e4300_4mb/target.cfg +++ b/config/coreboot/e4300_4mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg index 27291f4d..333030ce 100644 --- a/config/coreboot/e5420_6mb/target.cfg +++ b/config/coreboot/e5420_6mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg index 27291f4d..333030ce 100644 --- a/config/coreboot/e5520_6mb/target.cfg +++ b/config/coreboot/e5520_6mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg index c0b56379..6cbab731 100644 --- a/config/coreboot/e5530_12mb/target.cfg +++ b/config/coreboot/e5530_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/e6220_10mb/target.cfg b/config/coreboot/e6220_10mb/target.cfg index 27291f4d..333030ce 100644 --- a/config/coreboot/e6220_10mb/target.cfg +++ b/config/coreboot/e6220_10mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/e6230_12mb/target.cfg b/config/coreboot/e6230_12mb/target.cfg index 5bd85905..b491fdc8 100644 --- a/config/coreboot/e6230_12mb/target.cfg +++ b/config/coreboot/e6230_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -6,4 +8,4 @@ payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" payload_uboot_amd64="y" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/e6320_10mb/target.cfg b/config/coreboot/e6320_10mb/target.cfg index 27291f4d..333030ce 100644 --- a/config/coreboot/e6320_10mb/target.cfg +++ b/config/coreboot/e6320_10mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/e6330_12mb/target.cfg b/config/coreboot/e6330_12mb/target.cfg index c0b56379..6cbab731 100644 --- a/config/coreboot/e6330_12mb/target.cfg +++ b/config/coreboot/e6330_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg index a0b322d3..b999b10c 100644 --- a/config/coreboot/e6400_4mb/target.cfg +++ b/config/coreboot/e6400_4mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="e6400" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/e6400nvidia_4mb/target.cfg b/config/coreboot/e6400nvidia_4mb/target.cfg index 98eb8d3b..e87c8f32 100644 --- a/config/coreboot/e6400nvidia_4mb/target.cfg +++ b/config/coreboot/e6400nvidia_4mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg index 27291f4d..333030ce 100644 --- a/config/coreboot/e6420_10mb/target.cfg +++ b/config/coreboot/e6420_10mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg index c0b56379..6cbab731 100644 --- a/config/coreboot/e6430_12mb/target.cfg +++ b/config/coreboot/e6430_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg index 27291f4d..333030ce 100644 --- a/config/coreboot/e6520_10mb/target.cfg +++ b/config/coreboot/e6520_10mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg index c0b56379..6cbab731 100644 --- a/config/coreboot/e6530_12mb/target.cfg +++ b/config/coreboot/e6530_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/fam15h/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch b/config/coreboot/fam15h/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch index 2f95297d..b48e88cd 100644 --- a/config/coreboot/fam15h/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch +++ b/config/coreboot/fam15h/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch @@ -8,9 +8,6 @@ the original upstream died i decided to host it myself, on libreboot rsync, for use by mirrors. -this is also useful for GNU Boot, when downloading -acpica on coreboot 4.11_branch, for fam15h boards - this change is not necessary on other coreboot trees, which adhere to new coreboot policy (newer coreboot pulls acpica from github, which is fairly reliable) diff --git a/config/coreboot/fam15h/target.cfg b/config/coreboot/fam15h/target.cfg index 1056920a..1d4271e4 100644 --- a/config/coreboot/fam15h/target.cfg +++ b/config/coreboot/fam15h/target.cfg @@ -1,2 +1,4 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="fam15h" rev="1c13f8d85c7306213cd525308ee8973e5663a3f8" diff --git a/config/coreboot/g43t_am3/target.cfg b/config/coreboot/g43t_am3/target.cfg index 7bc27788..3379b716 100644 --- a/config/coreboot/g43t_am3/target.cfg +++ b/config/coreboot/g43t_am3/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_memtest="y" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/g43t_am3_16mb/target.cfg b/config/coreboot/g43t_am3_16mb/target.cfg index bef863ee..f2f0a52d 100644 --- a/config/coreboot/g43t_am3_16mb/target.cfg +++ b/config/coreboot/g43t_am3_16mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_memtest="y" release="n" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/ga_g41m_es2l/target.cfg b/config/coreboot/ga_g41m_es2l/target.cfg index 7f3d7886..3d046df2 100644 --- a/config/coreboot/ga_g41m_es2l/target.cfg +++ b/config/coreboot/ga_g41m_es2l/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" diff --git a/config/coreboot/gru_bob/target.cfg b/config/coreboot/gru_bob/target.cfg index 482ff306..e5866cb7 100644 --- a/config/coreboot/gru_bob/target.cfg +++ b/config/coreboot/gru_bob/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="aarch64-elf arm-eabi" payload_uboot="y" diff --git a/config/coreboot/gru_kevin/target.cfg b/config/coreboot/gru_kevin/target.cfg index 993bf617..81a93f27 100644 --- a/config/coreboot/gru_kevin/target.cfg +++ b/config/coreboot/gru_kevin/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="aarch64-elf arm-eabi" payload_uboot="y" diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg index f12beab7..e1cffa41 100644 --- a/config/coreboot/hp2170p_16mb/target.cfg +++ b/config/coreboot/hp2170p_16mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="hp2170p" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg index a3f8ba84..5715390e 100644 --- a/config/coreboot/hp2560p_8mb/target.cfg +++ b/config/coreboot/hp2560p_8mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="hp2560p" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg index d899d7d9..fb5d41e1 100644 --- a/config/coreboot/hp2570p_16mb/target.cfg +++ b/config/coreboot/hp2570p_16mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="hp2570p" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg index 8d18ae23..521ba0ec 100644 --- a/config/coreboot/hp8200sff_4mb/target.cfg +++ b/config/coreboot/hp8200sff_4mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci" grubtree="nvme" vcfg="hp8200sff" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg index 8d18ae23..521ba0ec 100644 --- a/config/coreboot/hp8200sff_8mb/target.cfg +++ b/config/coreboot/hp8200sff_8mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci" grubtree="nvme" vcfg="hp8200sff" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg index be150000..7fe45119 100644 --- a/config/coreboot/hp820g2_12mb/target.cfg +++ b/config/coreboot/hp820g2_12mb/target.cfg @@ -1,11 +1,12 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" -release="n" grub_scan_disk="nvme ahci" grubtree="xhci" vcfg="hp820g2" build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg index 7cbc8dad..5bd323c9 100644 --- a/config/coreboot/hp8300cmt_16mb/target.cfg +++ b/config/coreboot/hp8300cmt_16mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci" grubtree="nvme" vcfg="ivybridge" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg index c0b56379..6cbab731 100644 --- a/config/coreboot/hp8300usdt_16mb/target.cfg +++ b/config/coreboot/hp8300usdt_16mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg index 5897b9bc..d6179420 100644 --- a/config/coreboot/hp8460pintel_8mb/target.cfg +++ b/config/coreboot/hp8460pintel_8mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="hp8460pintel" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg index 72e64b8a..65828b25 100644 --- a/config/coreboot/hp8470pintel_16mb/target.cfg +++ b/config/coreboot/hp8470pintel_16mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="hp8470pintel" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/hp8560w_8mb/target.cfg b/config/coreboot/hp8560w_8mb/target.cfg index 7bad4889..d1eb695f 100644 --- a/config/coreboot/hp8560w_8mb/target.cfg +++ b/config/coreboot/hp8560w_8mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg index 4580be7b..e4dbdc93 100644 --- a/config/coreboot/hp9470m_16mb/target.cfg +++ b/config/coreboot/hp9470m_16mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="hp9470m" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/kcma_d8_16mb/target.cfg b/config/coreboot/kcma_d8_16mb/target.cfg index b0ab3d02..112c101f 100644 --- a/config/coreboot/kcma_d8_16mb/target.cfg +++ b/config/coreboot/kcma_d8_16mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="fam15h" xarch="i386-elf" payload_seabios="y" @@ -7,4 +9,4 @@ xlang="c" grub_scan_disk="nvme ahci" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/kcma_d8_2mb/target.cfg b/config/coreboot/kcma_d8_2mb/target.cfg index b0ab3d02..112c101f 100644 --- a/config/coreboot/kcma_d8_2mb/target.cfg +++ b/config/coreboot/kcma_d8_2mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="fam15h" xarch="i386-elf" payload_seabios="y" @@ -7,4 +9,4 @@ xlang="c" grub_scan_disk="nvme ahci" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/kfsn4_dre_1mb/target.cfg b/config/coreboot/kfsn4_dre_1mb/target.cfg index c5759ac8..a87ac1ad 100644 --- a/config/coreboot/kfsn4_dre_1mb/target.cfg +++ b/config/coreboot/kfsn4_dre_1mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="fam15h" xarch="i386-elf" payload_seabios="y" payload_memtest="y" xlang="c" build_depend="seabios/default memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/kfsn4_dre_2mb/target.cfg b/config/coreboot/kfsn4_dre_2mb/target.cfg index 94601104..17021b47 100644 --- a/config/coreboot/kfsn4_dre_2mb/target.cfg +++ b/config/coreboot/kfsn4_dre_2mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="fam15h" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" xlang="c" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/kgpe_d16_16mb/target.cfg b/config/coreboot/kgpe_d16_16mb/target.cfg index b0ab3d02..112c101f 100644 --- a/config/coreboot/kgpe_d16_16mb/target.cfg +++ b/config/coreboot/kgpe_d16_16mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="fam15h" xarch="i386-elf" payload_seabios="y" @@ -7,4 +9,4 @@ xlang="c" grub_scan_disk="nvme ahci" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/kgpe_d16_2mb/target.cfg b/config/coreboot/kgpe_d16_2mb/target.cfg index b0ab3d02..112c101f 100644 --- a/config/coreboot/kgpe_d16_2mb/target.cfg +++ b/config/coreboot/kgpe_d16_2mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="fam15h" xarch="i386-elf" payload_seabios="y" @@ -7,4 +9,4 @@ xlang="c" grub_scan_disk="nvme ahci" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg index 2661c6b2..c1e3a3c6 100644 --- a/config/coreboot/macbook11/target.cfg +++ b/config/coreboot/macbook11/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg index e37b6307..e0d1afbf 100644 --- a/config/coreboot/macbook11_16mb/target.cfg +++ b/config/coreboot/macbook11_16mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/macbook21/target.cfg +++ b/config/coreboot/macbook21/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/macbook21_16mb/target.cfg +++ b/config/coreboot/macbook21_16mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/next/patches/0001-mb-dell-OptiPlex-3050-Micro-port-Intel-KabyLake.patch b/config/coreboot/next/patches/0001-mb-dell-OptiPlex-3050-Micro-port-Intel-KabyLake.patch deleted file mode 100644 index 99bd2b69..00000000 --- a/config/coreboot/next/patches/0001-mb-dell-OptiPlex-3050-Micro-port-Intel-KabyLake.patch +++ /dev/null @@ -1,1541 +0,0 @@ -From 496cdb9ccfe8908ec0fe7f703ce6f25e5abf1c18 Mon Sep 17 00:00:00 2001 -From: Mate Kukri <kukri.mate@gmail.com> -Date: Thu, 24 Oct 2024 18:05:19 +0100 -Subject: [PATCH 1/5] mb/dell: OptiPlex 3050 Micro port (Intel KabyLake) - -- Boots Linux 6.11 (Debian) -- GRUB and SeaBIOS payloads work -- SMSC SCH5553 SIO/EC - + Serial port works - + PWM fan control works -- Realtek Gigabit LAN works -- WiFi slot works -- NVMe SSD slot works -- Extra: LPSS UART0 - + Stock FW sets undocumented power gating bit, RTC battery needs to - be pulled for it to work. - + Signals exposed on test points on the back of the board. - FIXME: add documentation about this -- Needs 'deguard' to bypass BootGuard - + See https://review.coreboot.org/plugins/gitiles/deguard -- Audio works -- All USB ports work -- Currently limited to the Micro form factor, but others are very - similar -- HDA verbs and VBT by Leah Rowe - -Change-Id: I8d443e39ee684a4eaa19c835a945cfe569c051e2 -Signed-off-by: Mate Kukri <kukri.mate@gmail.com> ---- - src/mainboard/dell/optiplex_3050/Kconfig | 37 ++ - src/mainboard/dell/optiplex_3050/Kconfig.name | 4 + - src/mainboard/dell/optiplex_3050/Makefile.mk | 12 + - src/mainboard/dell/optiplex_3050/acpi/ec.asl | 3 + - .../dell/optiplex_3050/acpi/superio.asl | 3 + - .../dell/optiplex_3050/board_info.txt | 7 + - src/mainboard/dell/optiplex_3050/bootblock.c | 107 ++++ - src/mainboard/dell/optiplex_3050/cmos.default | 5 + - src/mainboard/dell/optiplex_3050/cmos.layout | 54 ++ - src/mainboard/dell/optiplex_3050/data.vbt | Bin 0 -> 4300 bytes - .../dell/optiplex_3050/devicetree.cb | 103 ++++ - src/mainboard/dell/optiplex_3050/dsdt.asl | 27 + - .../dell/optiplex_3050/gma-mainboard.ads | 19 + - src/mainboard/dell/optiplex_3050/hda_verb.c | 90 +++ - .../dell/optiplex_3050/include/early_gpio.h | 11 + - .../dell/optiplex_3050/include/gpio.h | 241 +++++++++ - src/mainboard/dell/optiplex_3050/ramstage.c | 512 ++++++++++++++++++ - src/mainboard/dell/optiplex_3050/romstage.c | 18 + - src/mainboard/dell/optiplex_3050/sch5555_ec.c | 54 ++ - src/mainboard/dell/optiplex_3050/sch5555_ec.h | 10 + - 20 files changed, 1317 insertions(+) - create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig - create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig.name - create mode 100644 src/mainboard/dell/optiplex_3050/Makefile.mk - create mode 100644 src/mainboard/dell/optiplex_3050/acpi/ec.asl - create mode 100644 src/mainboard/dell/optiplex_3050/acpi/superio.asl - create mode 100644 src/mainboard/dell/optiplex_3050/board_info.txt - create mode 100644 src/mainboard/dell/optiplex_3050/bootblock.c - create mode 100644 src/mainboard/dell/optiplex_3050/cmos.default - create mode 100644 src/mainboard/dell/optiplex_3050/cmos.layout - create mode 100644 src/mainboard/dell/optiplex_3050/data.vbt - create mode 100644 src/mainboard/dell/optiplex_3050/devicetree.cb - create mode 100644 src/mainboard/dell/optiplex_3050/dsdt.asl - create mode 100644 src/mainboard/dell/optiplex_3050/gma-mainboard.ads - create mode 100644 src/mainboard/dell/optiplex_3050/hda_verb.c - create mode 100644 src/mainboard/dell/optiplex_3050/include/early_gpio.h - create mode 100644 src/mainboard/dell/optiplex_3050/include/gpio.h - create mode 100644 src/mainboard/dell/optiplex_3050/ramstage.c - create mode 100644 src/mainboard/dell/optiplex_3050/romstage.c - create mode 100644 src/mainboard/dell/optiplex_3050/sch5555_ec.c - create mode 100644 src/mainboard/dell/optiplex_3050/sch5555_ec.h - -diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig -new file mode 100644 -index 0000000000..6c8e72956e ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/Kconfig -@@ -0,0 +1,37 @@ -+## SPDX-License-Identifier: GPL-2.0-only -+ -+if BOARD_DELL_OPTIPLEX_3050 -+ -+config BOARD_SPECIFIC_OPTIONS -+ def_bool y -+ select BOARD_ROMSIZE_KB_16384 -+ select HAVE_ACPI_RESUME -+ select HAVE_ACPI_TABLES -+ select HAVE_CMOS_DEFAULT -+ select HAVE_OPTION_TABLE -+ select INTEL_GMA_ADD_VBT -+ select INTEL_GMA_HAVE_VBT -+ select MAINBOARD_HAS_LIBGFXINIT -+ select MAINBOARD_SUPPORTS_KABYLAKE_CPU -+ select MAINBOARD_SUPPORTS_SKYLAKE_CPU -+ select SKYLAKE_SOC_PCH_H -+ select SOC_INTEL_COMMON_BLOCK_HDA_VERB -+ select SOC_INTEL_KABYLAKE -+ select SUPERIO_SMSC_SCH555x -+ -+config CBFS_SIZE -+ default 0x900000 -+ -+config MAINBOARD_DIR -+ default "dell/optiplex_3050" -+ -+config MAINBOARD_PART_NUMBER -+ default "OptiPlex 3050 Micro" -+ -+config INTEL_GMA_VBT_FILE -+ default "src/mainboard/\$(MAINBOARDDIR)/data.vbt" -+ -+config DIMM_SPD_SIZE -+ default 512 # DDR4 -+ -+endif -diff --git a/src/mainboard/dell/optiplex_3050/Kconfig.name b/src/mainboard/dell/optiplex_3050/Kconfig.name -new file mode 100644 -index 0000000000..14eab7f52c ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/Kconfig.name -@@ -0,0 +1,4 @@ -+## SPDX-License-Identifier: GPL-2.0-only -+ -+config BOARD_DELL_OPTIPLEX_3050 -+ bool "OptiPlex 3050 Micro" -diff --git a/src/mainboard/dell/optiplex_3050/Makefile.mk b/src/mainboard/dell/optiplex_3050/Makefile.mk -new file mode 100644 -index 0000000000..0bd72fe691 ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/Makefile.mk -@@ -0,0 +1,12 @@ -+## SPDX-License-Identifier: GPL-2.0-only -+ -+bootblock-y += bootblock.c -+bootblock-y += sch5555_ec.c -+ -+romstage-y += romstage.c -+ -+ramstage-y += ramstage.c -+ramstage-y += sch5555_ec.c -+ramstage-y += hda_verb.c -+ -+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads -diff --git a/src/mainboard/dell/optiplex_3050/acpi/ec.asl b/src/mainboard/dell/optiplex_3050/acpi/ec.asl -new file mode 100644 -index 0000000000..16990d45f4 ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/acpi/ec.asl -@@ -0,0 +1,3 @@ -+/* SPDX-License-Identifier: CC-PDDC */ -+ -+/* Please update the license if adding licensable material. */ -diff --git a/src/mainboard/dell/optiplex_3050/acpi/superio.asl b/src/mainboard/dell/optiplex_3050/acpi/superio.asl -new file mode 100644 -index 0000000000..16990d45f4 ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/acpi/superio.asl -@@ -0,0 +1,3 @@ -+/* SPDX-License-Identifier: CC-PDDC */ -+ -+/* Please update the license if adding licensable material. */ -diff --git a/src/mainboard/dell/optiplex_3050/board_info.txt b/src/mainboard/dell/optiplex_3050/board_info.txt -new file mode 100644 -index 0000000000..47a4a3a4f3 ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/board_info.txt -@@ -0,0 +1,7 @@ -+Category: desktop -+Board URL: https://www.dell.com/support/kbdoc/en-uk/000124265/dell-optiplex-3050-system-guide -+ROM package: SOIC-8 -+ROM protocol: SPI -+ROM socketed: n -+Flashrom support: y -+Release year: 2017 -diff --git a/src/mainboard/dell/optiplex_3050/bootblock.c b/src/mainboard/dell/optiplex_3050/bootblock.c -new file mode 100644 -index 0000000000..10689c42a1 ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/bootblock.c -@@ -0,0 +1,107 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <bootblock_common.h> -+#include <device/pnp_ops.h> -+#include <soc/gpio.h> -+#include <superio/smsc/sch555x/sch555x.h> -+#include "include/early_gpio.h" -+#include "sch5555_ec.h" -+ -+struct ec_init_entry { -+ uint16_t addr; -+ uint8_t val; -+}; -+ -+static void bootblock_ec_init(void) -+{ -+ /* -+ * Early EC init -+ */ -+ -+ static const struct ec_init_entry init_table1[] = { -+ {0x08cc, 0x11}, {0x08d0, 0x11}, {0x088c, 0x10}, {0x0890, 0x10}, -+ {0x0894, 0x10}, {0x0898, 0x12}, {0x089c, 0x12}, {0x08a0, 0x10}, -+ {0x08a4, 0x12}, {0x08a8, 0x10}, {0x0820, 0x12}, {0x0824, 0x12}, -+ {0x0878, 0x12}, {0x0880, 0x12}, {0x0884, 0x12}, {0x08e0, 0x12}, -+ {0x08e4, 0x12}, {0x083c, 0x10}, {0x0840, 0x10}, {0x0844, 0x10}, -+ {0x0848, 0x10}, {0x084c, 0x10}, {0x0850, 0x10}, {0x0814, 0x11}, -+ }; -+ -+ for (size_t i = 0; i < ARRAY_SIZE(init_table1); ++i) -+ sch5555_mbox_write(2, init_table1[i].addr, init_table1[i].val); -+ -+ static const struct ec_init_entry init_table2[] = { -+ {0x0040, 0x00}, {0x00f8, 0x10}, {0x00f9, 0x00}, {0x00f0, 0x30}, -+ {0x00fa, 0x00}, {0x00fb, 0x00}, {0x00ea, 0x00}, {0x00eb, 0x00}, -+ {0x00ef, 0x7c}, {0x0005, 0x0f}, {0x0014, 0x01}, {0x0018, 0x2f}, -+ {0x0019, 0x2f}, {0x001a, 0x2f}, {0x001b, 0x2f}, {0x01d8, 0x01}, -+ {0x0040, 0x11}, -+ }; -+ -+ for (size_t i = 0; i < ARRAY_SIZE(init_table2); ++i) -+ sch5555_mbox_write(1, init_table2[i].addr, init_table2[i].val); -+ -+ sch5555_mbox_write(1, 0x000b, 0x01); -+ sch5555_mbox_write(4, 0x001a, 0x04); -+ sch5555_mbox_write(4, 0x0028, 0x18); -+ sch5555_mbox_write(4, 0x001a, 0x00); -+ sch5555_mbox_write(1, 0x000b, 0x03); -+ -+ /* -+ * Early HWM init -+ */ -+ -+ sch5555_mbox_read(1, 0xcb); -+ sch5555_mbox_read(1, 0xb8); -+ -+ static const struct ec_init_entry hwm_init_table[] = { -+ {0x02fc, 0xa0}, {0x02fd, 0x32}, {0x0005, 0x77}, {0x0019, 0x2f}, -+ {0x001a, 0x2f}, {0x008a, 0x33}, {0x008b, 0x33}, {0x008c, 0x33}, -+ {0x00ba, 0x10}, {0x00d1, 0xff}, {0x00d6, 0xff}, {0x00db, 0xff}, -+ {0x0048, 0x00}, {0x0049, 0x00}, {0x007a, 0x00}, {0x007b, 0x00}, -+ {0x007c, 0x00}, {0x0080, 0x00}, {0x0081, 0x00}, {0x0082, 0x00}, -+ {0x0083, 0xbb}, {0x0084, 0xb0}, {0x01a1, 0x88}, {0x01a4, 0x80}, -+ {0x0088, 0x00}, {0x0089, 0x00}, {0x00a0, 0x02}, {0x00a1, 0x02}, -+ {0x00a2, 0x02}, {0x00a4, 0x04}, {0x00a5, 0x04}, {0x00a6, 0x04}, -+ {0x00ab, 0x00}, {0x00ad, 0x3f}, {0x00b7, 0x07}, {0x0062, 0x50}, -+ {0x0000, 0x46}, {0x0000, 0x50}, {0x0000, 0x46}, {0x0000, 0x50}, -+ {0x0000, 0x46}, {0x0000, 0x98}, {0x0059, 0x98}, {0x0061, 0x7c}, -+ {0x01bc, 0x00}, {0x01bd, 0x00}, {0x01bb, 0x00}, {0x0085, 0xdd}, -+ {0x0086, 0xdd}, {0x0087, 0x07}, {0x0090, 0x82}, {0x0091, 0x5e}, -+ {0x0095, 0x5d}, {0x0096, 0xa9}, {0x0097, 0x00}, {0x009b, 0x00}, -+ {0x00ae, 0x86}, {0x00af, 0x86}, {0x00b3, 0x67}, {0x00c4, 0xff}, -+ {0x00c5, 0xff}, {0x00c9, 0xff}, {0x0040, 0x01}, {0x02fc, 0x00}, -+ {0x02b3, 0x9a}, {0x02b4, 0x05}, {0x02cc, 0x01}, {0x02d0, 0x4c}, -+ {0x02d2, 0x01}, {0x02db, 0x01}, {0x006f, 0x01}, {0x0070, 0x02}, -+ {0x0071, 0x03}, {0x018b, 0x03}, {0x018c, 0x03}, {0x0015, 0x33}, -+ {0x018b, 0x00}, {0x018c, 0x00}, {0x02f8, 0x5e}, {0x02f9, 0x01}, -+ }; -+ -+ for (size_t i = 0; i < ARRAY_SIZE(hwm_init_table); ++i) -+ sch5555_mbox_write(1, hwm_init_table[i].addr, hwm_init_table[i].val); -+} -+ -+ -+#define SCH555x_IOBASE 0x2e -+#define GLOBAL_DEV PNP_DEV(SCH555x_IOBASE, SCH555x_LDN_GLOBAL) -+#define SERIAL_DEV PNP_DEV(SCH555x_IOBASE, SCH555x_LDN_UART1) -+ -+void bootblock_mainboard_early_init(void) -+{ -+ gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table)); -+ -+ // Super I/O early init will map Runtime and EMI registers -+ sch555x_early_init(GLOBAL_DEV); -+ -+ // Changes LED color among a few other things -+ outb(1, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_PME_STS); -+ outb(1, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_PME_EN); -+ outb(0xf, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_LED); -+ outb(1, SCH555x_RUNTIME_IOBASE + SCH555x_RUNTIME_UNK1); -+ -+ // Perform bootblock EC initialization -+ bootblock_ec_init(); -+ -+ // Bootblock EC initialization is required for UART1 to work -+ sch555x_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -+} -diff --git a/src/mainboard/dell/optiplex_3050/cmos.default b/src/mainboard/dell/optiplex_3050/cmos.default -new file mode 100644 -index 0000000000..79961f43d8 ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/cmos.default -@@ -0,0 +1,5 @@ -+## SPDX-License-Identifier: GPL-2.0-only -+ -+boot_option=Fallback -+debug_level=Debug -+power_on_after_fail=Disable -diff --git a/src/mainboard/dell/optiplex_3050/cmos.layout b/src/mainboard/dell/optiplex_3050/cmos.layout -new file mode 100644 -index 0000000000..54a5147b7d ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/cmos.layout -@@ -0,0 +1,54 @@ -+## SPDX-License-Identifier: GPL-2.0-only -+ -+# ----------------------------------------------------------------- -+entries -+ -+#start-bit length config config-ID name -+ -+# ----------------------------------------------------------------- -+0 120 r 0 reserved_memory -+ -+# ----------------------------------------------------------------- -+# RTC_BOOT_BYTE (coreboot hardcoded) -+384 1 e 4 boot_option -+388 4 h 0 reboot_counter -+ -+# ----------------------------------------------------------------- -+# coreboot config options: console -+395 4 e 6 debug_level -+ -+# coreboot config options: southbridge -+409 2 e 7 power_on_after_fail -+ -+# coreboot config options: bootloader -+#Used by ChromeOS: -+416 128 r 0 vbnv -+ -+# coreboot config options: check sums -+984 16 h 0 check_sum -+ -+# ----------------------------------------------------------------- -+ -+enumerations -+ -+#ID value text -+1 0 Disable -+1 1 Enable -+4 0 Fallback -+4 1 Normal -+6 0 Emergency -+6 1 Alert -+6 2 Critical -+6 3 Error -+6 4 Warning -+6 5 Notice -+6 6 Info -+6 7 Debug -+6 8 Spew -+7 0 Disable -+7 1 Enable -+7 2 Keep -+# ----------------------------------------------------------------- -+checksums -+ -+checksum 392 415 984 -diff --git a/src/mainboard/dell/optiplex_3050/data.vbt b/src/mainboard/dell/optiplex_3050/data.vbt -new file mode 100644 -index 0000000000000000000000000000000000000000..6dc40cd99563bcd957ec2a9c4567e3b21e5d1d1f -GIT binary patch -literal 4300 -zcmeHJZ)_A*5TD(>zi)T1ds~!pU>y<RuF$e~N-bJsuXmJ|7P*63&uGGx+#w{DmbQ?B -ze^_HpNECA))Sw}xiC;|p(!}^ljU+}T!9QpeKH4uPN;EMM;}_tZeY@?IBiNH@l!V#L -zn>X`jfBW9Nd2eS$e@7qg=y|L+*|P~<Du4l>Ybk24rH<}xJ9eg%eaW32z1vbf_%+-P -zC$uXU01ASzM2Q>g;@$hkii6SZG3@E+#eVw*w9N;N1g6_?YiB3s;_)?@>DbVf-r9}P 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Intel SpeedStep -+ register "eist_enable" = "1" -+ -+ device domain 0 on -+ device ref igpu on -+ register "PrimaryDisplay" = "Display_iGFX" -+ end -+ -+ device ref south_xhci on -+ register "usb2_ports" = "{ -+ [0] = USB2_PORT_MID(OC0), // Front panel (blue) -+ [1] = USB2_PORT_MID(OC0), // Front panel (blue) -+ [2] = USB2_PORT_MID(OC3), // Back panel (black) -+ [3] = USB2_PORT_MID(OC2), // Back panel (blue) -+ [4] = USB2_PORT_MID(OC1), // Back panel (blue) -+ [6] = USB2_PORT_MID(OC1), // Back panel (black) -+ [8] = USB2_PORT_MID(OC_SKIP), // WiFi slot -+ }" -+ register "usb3_ports" = "{ -+ [0] = USB3_PORT_DEFAULT(OC0), // Front panel (blue) -+ [1] = USB3_PORT_DEFAULT(OC0), // Front panel (blue) -+ [2] = USB3_PORT_DEFAULT(OC2), // Back panel (blue) -+ [3] = USB3_PORT_DEFAULT(OC1), // Back panel (blue) -+ }" -+ end -+ -+ # ME interface is 'off' to avoid HECI reset delay due to HAP -+ device ref heci1 off end -+ -+ device ref sata on -+ register "SataSalpSupport" = "1" -+ register "SataPortsEnable[0]" = "1" -+ end -+ -+ # M.2 SSD -+ device ref pcie_rp21 on -+ register "PcieRpEnable[20]" = "1" -+ register "PcieRpClkReqSupport[20]" = "1" -+ register "PcieRpClkReqNumber[20]" = "3" -+ register "PcieRpAdvancedErrorReporting[20]" = "1" -+ register "PcieRpLtrEnable[20]" = "1" -+ register "PcieRpClkSrcNumber[20]" = "3" -+ register "PcieRpHotPlug[20]" = "1" -+ end -+ -+ # Realtek LAN -+ device ref pcie_rp5 on -+ register "PcieRpEnable[4]" = "1" -+ register "PcieRpClkReqSupport[4]" = "0" -+ register "PcieRpHotPlug[4]" = "0" -+ end -+ -+ # M.2 WiFi -+ device ref pcie_rp8 on -+ register "PcieRpEnable[7]" = "1" -+ register "PcieRpClkReqSupport[7]" = "0" -+ register "PcieRpHotPlug[7]" = "1" -+ end -+ -+ # UART0 is exposed on test points on the bottom of the board -+ device ref uart0 on -+ register "SerialIoDevMode[PchSerialIoIndexUart0]" = "PchSerialIoPci" -+ end -+ -+ device ref lpc_espi on -+ register "serirq_mode" = "SERIRQ_CONTINUOUS" -+ -+ # I/O decode for EMI/Runtime registers -+ register "gen1_dec" = "0x007c0a01" -+ -+ # SCH5553 -+ chip superio/smsc/sch555x -+ device pnp 2e.0 on # EMI -+ io 0x60 = 0xa00 -+ end -+ device pnp 2e.1 off end # 8042 -+ device pnp 2e.7 on # UART1 -+ io 0x60 = 0x3f8 -+ irq 0x0f = 2 -+ irq 0x70 = 4 -+ end -+ device pnp 2e.8 off end # UART2 -+ device pnp 2e.c on # LPC interface -+ io 0x60 = 0x2e -+ end -+ device pnp 2e.a on # Runtime registers -+ io 0x60 = 0xa40 -+ end -+ device pnp 2e.b off end # Floppy Controller -+ device pnp 2e.11 off end # Parallel Port -+ end -+ end -+ -+ device ref hda on end -+ -+ device ref smbus on end -+ end -+end -diff --git a/src/mainboard/dell/optiplex_3050/dsdt.asl b/src/mainboard/dell/optiplex_3050/dsdt.asl -new file mode 100644 -index 0000000000..9762f6ff74 ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/dsdt.asl -@@ -0,0 +1,27 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <acpi/acpi.h> -+DefinitionBlock( -+ "dsdt.aml", -+ "DSDT", -+ ACPI_DSDT_REV_2, -+ OEM_ID, -+ ACPI_TABLE_CREATOR, -+ 0x20110725 -+) -+{ -+ #include <acpi/dsdt_top.asl> -+ #include <soc/intel/common/block/acpi/acpi/globalnvs.asl> -+ #include <cpu/intel/common/acpi/cpu.asl> -+ -+ Scope (\_SB) -+ { -+ Device (PCI0) -+ { -+ #include <soc/intel/skylake/acpi/systemagent.asl> -+ #include <soc/intel/skylake/acpi/pch.asl> -+ } -+ } -+ -+ #include <southbridge/intel/common/acpi/sleepstates.asl> -+} -diff --git a/src/mainboard/dell/optiplex_3050/gma-mainboard.ads b/src/mainboard/dell/optiplex_3050/gma-mainboard.ads -new file mode 100644 -index 0000000000..cb4c22f285 ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/gma-mainboard.ads -@@ -0,0 +1,19 @@ -+-- SPDX-License-Identifier: GPL-2.0-or-later -+ -+with HW.GFX.GMA; -+with HW.GFX.GMA.Display_Probing; -+ -+use HW.GFX.GMA; -+use HW.GFX.GMA.Display_Probing; -+ -+private package GMA.Mainboard is -+ -+ ports : constant Port_List := -+ (HDMI1, -- External HDMI -+ DP2, -- External DP (native) -+ HDMI2, -- External DP (DP++) -+ DP3, -- Video I/O card: VGA (0PKGGG), DP (H64DC) -+ HDMI3, -- Video I/O card: VGA (0PKGGG), DP (H64DC) -+ others => Disabled); -+ -+end GMA.Mainboard; -diff --git a/src/mainboard/dell/optiplex_3050/hda_verb.c b/src/mainboard/dell/optiplex_3050/hda_verb.c -new file mode 100644 -index 0000000000..621e4f7a52 ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/hda_verb.c -@@ -0,0 +1,90 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <device/azalia_device.h> -+ -+const u32 cim_verb_data[] = { -+ /* coreboot specific header, codec 0 */ -+ 0x10ec0255, /* Realtek ALC3234 */ -+ 0x102807a3, /* Subsystem ID */ -+ 11, /* Number of entries */ -+ -+ /* Pin Widget Verb Table */ -+ -+ AZALIA_SUBVENDOR(0, 0x102807a3), -+ -+ AZALIA_PIN_CFG(0, 0x12, 0x40000000), // does not describe a jack or internal device -+ AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_DESC( -+ AZALIA_INTEGRATED, -+ AZALIA_INTERNAL, -+ AZALIA_SPEAKER, -+ AZALIA_OTHER_ANALOG, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_NO_JACK_PRESENCE_DETECT, -+ 5, 0 -+ )), -+ AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_FRONT, -+ AZALIA_LINE_OUT, -+ AZALIA_STEREO_MONO_1_8, -+ AZALIA_BLACK, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 2, 0 -+ )), -+ AZALIA_PIN_CFG(0, 0x1d, 0x4054c029), // does not describe a jack or internal device -+ AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x21, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_FRONT, -+ AZALIA_HP_OUT, -+ AZALIA_STEREO_MONO_1_8, -+ AZALIA_BLACK, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 5, 15 -+ )), -+ -+ /* coreboot specific header, codec 2 */ -+ 0x80862809, /* Intel Skylake HDMI */ -+ 0x80860101, /* Subsystem ID */ -+ 4, /* Number of entries */ -+ -+ /* Pin Widget Verb Table */ -+ -+ AZALIA_SUBVENDOR(2, 0x80860101), -+ -+ AZALIA_PIN_CFG(2, 0x05, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_DIGITAL_DISPLAY, -+ AZALIA_DIGITAL_OTHER_OUT, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 1, 0 -+ )), -+ AZALIA_PIN_CFG(2, 0x06, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_DIGITAL_DISPLAY, -+ AZALIA_DIGITAL_OTHER_OUT, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 1, 0 -+ )), -+ AZALIA_PIN_CFG(2, 0x07, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_DIGITAL_DISPLAY, -+ AZALIA_DIGITAL_OTHER_OUT, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 1, 0 -+ )), -+}; -+ -+const u32 pc_beep_verbs[] = {}; -+ -+AZALIA_ARRAY_SIZES; -diff --git a/src/mainboard/dell/optiplex_3050/include/early_gpio.h b/src/mainboard/dell/optiplex_3050/include/early_gpio.h -new file mode 100644 -index 0000000000..17a16371e3 ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/include/early_gpio.h -@@ -0,0 +1,11 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#ifndef __OPTIPLEX_3050_EARLY_GPIO_H__ -+#define __OPTIPLEX_3050_EARLY_GPIO_H__ -+ -+static const struct pad_config early_gpio_table[] = { -+ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), /* UART0_RXD */ -+ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), /* UART0_TXD */ -+}; -+ -+#endif -diff --git a/src/mainboard/dell/optiplex_3050/include/gpio.h b/src/mainboard/dell/optiplex_3050/include/gpio.h -new file mode 100644 -index 0000000000..83293c32a9 ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/include/gpio.h -@@ -0,0 +1,241 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#ifndef __OPTIPLEX_3050_GPIO_H__ -+#define __OPTIPLEX_3050_GPIO_H__ -+ -+static const struct pad_config gpio_table[] = { -+ -+ /* ------- GPIO Community 0 ------- */ -+ -+ /* ------- GPIO Group GPP_A ------- */ -+ PAD_CFG_NF(GPP_A0, UP_20K, PLTRST, NF1), /* RCIN# */ -+ PAD_CFG_NF(GPP_A1, UP_20K, PLTRST, NF1), /* LAD0 */ -+ PAD_CFG_NF(GPP_A2, UP_20K, PLTRST, NF1), /* LAD1 */ -+ PAD_CFG_NF(GPP_A3, UP_20K, PLTRST, NF1), /* LAD2 */ -+ PAD_CFG_NF(GPP_A4, UP_20K, PLTRST, NF1), /* LAD3 */ -+ PAD_CFG_NF(GPP_A5, NONE, PLTRST, NF1), /* LFRAME# */ -+ PAD_CFG_NF(GPP_A6, NONE, PLTRST, NF1), /* SERIRQ */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_A7, NONE, DEEP, OFF, ACPI), /* GPIO */ -+ PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1), /* CLKRUN# */ -+ PAD_CFG_NF(GPP_A9, NONE, PLTRST, NF1), /* CLKOUT_LPC0 */ -+ PAD_CFG_NF(GPP_A10, NONE, PLTRST, NF1), /* CLKOUT_LPC1 */ -+ PAD_CFG_NF(GPP_A11, UP_20K, DEEP, NF1), /* PME# */ -+ PAD_CFG_GPO(GPP_A12, 0, PLTRST), /* GPIO */ -+ PAD_CFG_NF(GPP_A13, NONE, PLTRST, NF1), /* SUSWARN#/SUSPWRDNACK */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_A14, NONE, PLTRST, OFF, ACPI), /* GPIO */ -+ PAD_CFG_NF(GPP_A15, UP_20K, PLTRST, NF1), /* SUS_ACK# */ -+ PAD_CFG_GPO(GPP_A16, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_A17, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_A18, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_A19, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_A20, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_A21, 1, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_A22, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_A23, 0, PLTRST), /* GPIO */ -+ -+ /* ------- GPIO Group GPP_B ------- */ -+ PAD_CFG_GPO(GPP_B0, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_B1, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_B2, 0, DEEP), /* GPIO */ -+ PAD_CFG_GPO(GPP_B3, 1, RSMRST), /* GPIO (ME_CNTL, B3 -> LOW => HDA_SDO -> HIGH) */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_B4, NONE, DEEP, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPO(GPP_B5, 1, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_B6, 1, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_B7, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_B8, NONE, PLTRST, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPO(GPP_B9, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_B10, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_B11, NONE, PLTRST, OFF, ACPI), /* GPIO */ -+ PAD_CFG_NF(GPP_B12, NONE, PLTRST, NF1), /* SLP_S0# */ -+ PAD_CFG_NF(GPP_B13, NONE, PLTRST, NF1), /* PLTRST# */ -+ PAD_CFG_NF(GPP_B14, DN_20K, PLTRST, NF1), /* SPKR */ -+ PAD_CFG_GPO(GPP_B15, 1, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_B16, 1, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_B17, 0, PLTRST), /* GPIO */ -+ PAD_CFG_NF(GPP_B18, DN_20K, DEEP, NF1), /* GSPIO_MOSI */ -+ PAD_CFG_GPO(GPP_B19, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_B20, 1, DEEP), /* GPIO */ -+ PAD_CFG_GPO(GPP_B21, 0, DEEP), /* GPIO */ -+ PAD_CFG_NF(GPP_B22, DN_20K, DEEP, NF1), /* GSPI1_MOSI */ -+ PAD_CFG_NF(GPP_B23, DN_20K, DEEP, NF2), /* PCHHOT# */ -+ -+ /* ------- GPIO Community 1 ------- */ -+ -+ /* ------- GPIO Group GPP_C ------- */ -+ PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), /* SMBCLK */ -+ PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), /* SMBDATA */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_C2, DN_20K, DEEP, OFF, ACPI), /* GPIO */ -+ PAD_CFG_NF(GPP_C3, NONE, PLTRST, NF1), /* SML0CLK */ -+ PAD_CFG_NF(GPP_C4, NONE, PLTRST, NF1), /* SML0DATA */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_C5, DN_20K, DEEP, OFF, ACPI), /* GPIO */ -+ PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* SML1CLK */ -+ PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* SML1DATA */ -+ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), /* UART0_RXD */ -+ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), /* UART0_TXD */ -+ PAD_CFG_GPO(GPP_C10, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_C11, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_C12, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_C13, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_C14, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_C15, 0, PLTRST), /* GPIO */ -+ PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1), /* I2C0_SDA */ -+ PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1), /* I2C0_SCL */ -+ PAD_CFG_GPO(GPP_C18, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_C19, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_C20, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_C21, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_C22, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT), /* GPIO */ -+ -+ /* ------- GPIO Group GPP_D ------- */ -+ PAD_CFG_GPO(GPP_D0, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D1, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D2, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D3, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D4, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_D5, NONE, DEEP, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPO(GPP_D6, 0, DEEP), /* GPIO */ -+ PAD_CFG_GPO(GPP_D7, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D8, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D9, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D10, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D11, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D12, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D13, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D14, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D15, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D16, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D17, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D18, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D19, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D20, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D21, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D22, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_D23, 0, PLTRST), /* GPIO */ -+ -+ /* ------- GPIO Group GPP_E ------- */ -+ PAD_CFG_NF(GPP_E0, NONE, DEEP, NF1), /* SATAXPCIE0 */ -+ PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1), /* SATAXPCIE1 */ -+ PAD_CFG_NF(GPP_E2, NONE, DEEP, NF1), /* SATAXPCIE2 */ -+ PAD_CFG_GPO(GPP_E3, 0, DEEP), /* GPIO */ -+ PAD_CFG_GPO(GPP_E4, 0, DEEP), /* GPIO */ -+ PAD_CFG_GPO(GPP_E5, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_E6, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_E7, NONE, DEEP, OFF, ACPI), /* GPIO */ -+ PAD_CFG_NF(GPP_E8, NONE, PLTRST, NF1), /* SATA_LED# */ -+ PAD_CFG_NF(GPP_E9, UP_20K, PLTRST, NF1), /* USB_OC0# */ -+ PAD_CFG_NF(GPP_E10, UP_20K, PLTRST, NF1), /* USB_OC1# */ -+ PAD_CFG_NF(GPP_E11, UP_20K, PLTRST, NF1), /* USB_OC2# */ -+ PAD_CFG_NF(GPP_E12, UP_20K, PLTRST, NF1), /* USB_OC3# */ -+ -+ /* ------- GPIO Group GPP_F ------- */ -+ PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1), /* SATAXPCIE3 */ -+ PAD_CFG_NF(GPP_F1, NONE, DEEP, NF1), /* SATAXPCIE4 */ -+ PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1), /* SATAXPCIE5 */ -+ PAD_CFG_NF(GPP_F3, NONE, DEEP, NF1), /* SATAXPCIE6 */ -+ PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1), /* SATAXPCIE7 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F5, NONE, PLTRST, OFF, ACPI), /* GPIO */ -+ PAD_CFG_NF(GPP_F6, NONE, RSMRST, NF1), /* SATA_DEVSLP4 */ -+ PAD_CFG_GPO(GPP_F7, 1, PLTRST), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F8, NONE, DEEP, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPO(GPP_F9, 0, RSMRST), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F10, NONE, DEEP, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F11, NONE, PLTRST, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F12, NONE, PLTRST, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPO(GPP_F13, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F14, NONE, DEEP, OFF, ACPI), /* GPIO */ -+ PAD_CFG_NF(GPP_F15, UP_20K, DEEP, NF1), /* USB_OC4# */ -+ PAD_CFG_NF(GPP_F16, UP_20K, DEEP, NF1), /* USB_OC5# */ -+ PAD_CFG_NF(GPP_F17, UP_20K, PLTRST, NF1), /* USB_OC6# */ -+ PAD_CFG_TERM_GPO(GPP_F18, 0, UP_20K, DEEP), /* GPIO */ -+ PAD_CFG_GPO(GPP_F19, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_F20, 1, DEEP), /* GPIO */ -+ PAD_CFG_GPO(GPP_F21, 1, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_F22, 1, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_F23, 1, RSMRST), /* GPIO */ -+ -+ /* ------- GPIO Group GPP_G ------- */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_G0, NONE, PLTRST, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_G1, NONE, PLTRST, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_G2, NONE, PLTRST, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_G3, NONE, PLTRST, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_G4, NONE, PLTRST, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_G5, NONE, PLTRST, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_G6, NONE, PLTRST, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_G7, NONE, PLTRST, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_G8, NONE, PLTRST, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPO(GPP_G9, 1, PLTRST), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_G10, NONE, DEEP, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_G11, NONE, DEEP, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPO(GPP_G12, 1, DEEP), /* GPIO */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_G13, NONE, DEEP, OFF, ACPI), /* GPIO */ -+ PAD_CFG_GPO(GPP_G14, 0, DEEP), /* GPIO */ -+ PAD_CFG_GPO(GPP_G15, 1, DEEP), /* GPIO */ -+ PAD_CFG_GPO(GPP_G16, 1, DEEP), /* GPIO */ -+ PAD_CFG_GPO(GPP_G17, 1, DEEP), /* GPIO */ -+ PAD_CFG_GPO(GPP_G18, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_G19, 1, DEEP), /* GPIO */ -+ PAD_CFG_GPO(GPP_G20, 1, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_G21, 0, DEEP), /* GPIO */ -+ PAD_CFG_GPO(GPP_G22, 0, DEEP), /* GPIO */ -+ PAD_CFG_GPO(GPP_G23, 0, PLTRST), /* GPIO */ -+ -+ /* ------- GPIO Group GPP_H ------- */ -+ PAD_CFG_GPO(GPP_H0, 0, DEEP), /* GPIO */ -+ PAD_CFG_GPO(GPP_H1, 1, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H2, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H3, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H4, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H5, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H6, 1, DEEP), /* GPIO */ -+ PAD_CFG_GPO(GPP_H7, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H8, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H9, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H10, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H11, 0, PLTRST), /* GPIO */ -+ PAD_CFG_TERM_GPO(GPP_H12, 1, DN_20K, DEEP), /* GPIO */ -+ PAD_CFG_GPO(GPP_H13, 1, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H14, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H15, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H16, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H17, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H18, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H19, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H20, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H21, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H22, 0, PLTRST), /* GPIO */ -+ PAD_CFG_GPO(GPP_H23, 0, PLTRST), /* GPIO */ -+ -+ /* ------- GPIO Community 2 ------- */ -+ -+ /* -------- GPIO Group GPD -------- */ -+ PAD_CFG_NF(GPD0, NONE, RSMRST, NF1), /* BATLOW# */ -+ PAD_CFG_GPO(GPD1, 0, PWROK), /* GPIO */ -+ PAD_CFG_NF(GPD2, NONE, RSMRST, NF1), /* LAN_WAKE# */ -+ PAD_CFG_NF(GPD3, UP_20K, RSMRST, NF1), /* PWRBTN# */ -+ PAD_CFG_NF(GPD4, NONE, RSMRST, NF1), /* SLP_S3# */ -+ PAD_CFG_NF(GPD5, NONE, RSMRST, NF1), /* SLP_S4# */ -+ PAD_CFG_NF(GPD6, NONE, RSMRST, NF1), /* SLP_A# */ -+ PAD_CFG_GPO(GPD7, 1, RSMRST), /* GPIO */ -+ PAD_CFG_NF(GPD8, NONE, RSMRST, NF1), /* SUSCLK */ -+ PAD_CFG_NF(GPD9, NONE, RSMRST, NF1), /* SLP_WLAN# */ -+ PAD_CFG_NF(GPD10, NONE, RSMRST, NF1), /* SLP_S5# */ -+ PAD_CFG_GPO(GPD11, 1, RSMRST), /* GPIO */ -+ -+ /* ------- GPIO Community 3 ------- */ -+ -+ /* ------- GPIO Group GPP_I ------- */ -+ PAD_CFG_NF(GPP_I0, NONE, PLTRST, NF1), /* DDPB_HPD0 */ -+ PAD_CFG_NF(GPP_I1, NONE, PLTRST, NF1), /* DDPC_HPD1 */ -+ PAD_CFG_NF(GPP_I2, NONE, PLTRST, NF1), /* DDPD_HPD2 */ -+ PAD_CFG_NF(GPP_I3, NONE, PLTRST, NF1), /* DDPE_HPD3 */ -+ PAD_CFG_NF(GPP_I4, NONE, PLTRST, NF1), /* EDP_HPD */ -+ PAD_CFG_NF(GPP_I5, NONE, PLTRST, NF1), /* DDPB_CTRLCLK */ -+ PAD_CFG_NF(GPP_I6, DN_20K, PLTRST, NF1), /* DDPB_CTRLDATA */ -+ PAD_CFG_NF(GPP_I7, NONE, PLTRST, NF1), /* DDPC_CTRLCLK */ -+ PAD_CFG_NF(GPP_I8, DN_20K, PLTRST, NF1), /* DDPC_CTRLDATA */ -+ PAD_CFG_NF(GPP_I9, NONE, PLTRST, NF1), /* DDPD_CTRLCLK */ -+ PAD_CFG_NF(GPP_I10, DN_20K, PLTRST, NF1), /* DDPD_CTRLDATA */ -+}; -+ -+#endif -diff --git a/src/mainboard/dell/optiplex_3050/ramstage.c b/src/mainboard/dell/optiplex_3050/ramstage.c -new file mode 100644 -index 0000000000..94778f60c9 ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/ramstage.c -@@ -0,0 +1,512 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <bootstate.h> -+#include <arch/cpuid.h> -+#include <cpu/x86/msr.h> -+#include <soc/gpio.h> -+#include <soc/ramstage.h> -+#include "include/gpio.h" -+#include "sch5555_ec.h" -+ -+void mainboard_silicon_init_params(FSP_SIL_UPD *params) -+{ -+ gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); -+} -+ -+#define FORM_FACTOR_MICRO 0 -+#define FORM_FACTOR_SFF 1 -+// Probably DT and MT -+#define FORM_FACTOR_UNK2 2 -+#define FORM_FACTOR_UNK3 3 -+ -+#define HWM_TAB_ADD_TEMP_TARGET 1 -+#define HWM_TAB_PKG_POWER_ANY 0xffff -+ -+struct hwm_tab_entry { -+ uint16_t addr; -+ uint8_t val; -+ uint8_t flags; -+ uint16_t pkg_power; -+}; -+ -+static const struct hwm_tab_entry HWM_TAB_MICRO_BASE[] = { -+ { 0x005, 0x33, 0, 0xffff }, -+ { 0x018, 0x2f, 0, 0xffff }, -+ { 0x019, 0x2f, 0, 0xffff }, -+ { 0x01a, 0x2f, 0, 0xffff }, -+ { 0x01b, 0x0f, 0, 0xffff }, -+ { 0x057, 0xff, 0, 0xffff }, -+ { 0x059, 0xff, 0, 0xffff }, -+ { 0x05b, 0xff, 0, 0xffff }, -+ { 0x05d, 0xff, 0, 0xffff }, -+ { 0x05f, 0xff, 0, 0xffff }, -+ { 0x061, 0xff, 0, 0xffff }, -+ { 0x06e, 0x00, 0, 0xffff }, -+ { 0x06f, 0x03, 0, 0xffff }, -+ { 0x070, 0x03, 0, 0xffff }, -+ { 0x071, 0x02, 0, 0xffff }, -+ { 0x072, 0x02, 0, 0xffff }, -+ { 0x073, 0x01, 0, 0xffff }, -+ { 0x074, 0x06, 0, 0xffff }, -+ { 0x075, 0x07, 0, 0xffff }, -+ { 0x080, 0x00, 0, 0xffff }, -+ { 0x081, 0x80, 0, 0xffff }, -+ { 0x082, 0x80, 0, 0xffff }, -+ { 0x083, 0xbb, 0, 0xffff }, -+ { 0x085, 0xf1, 0, 0xffff }, -+ { 0x086, 0x88, 0, 0xffff }, -+ { 0x087, 0x61, 0, 0xffff }, -+ { 0x088, 0x08, 0, 0xffff }, -+ { 0x089, 0x00, 0, 0xffff }, -+ { 0x08a, 0x73, 0, 0xffff }, -+ { 0x08b, 0x73, 0, 0xffff }, -+ { 0x08c, 0x73, 0, 0xffff }, -+ { 0x090, 0x6d, 0, 0xffff }, -+ { 0x091, 0x7e, 0, 0xffff }, -+ { 0x092, 0x66, 0, 0xffff }, -+ { 0x093, 0xa4, 0, 0xffff }, -+ { 0x094, 0x7c, 0, 0xffff }, -+ { 0x095, 0xa4, 0, 0xffff }, -+ { 0x096, 0xa4, 0, 0xffff }, -+ { 0x097, 0xa4, 0, 0xffff }, -+ { 0x098, 0xa4, 0, 0xffff }, -+ { 0x099, 0xa4, 0, 0xffff }, -+ { 0x09a, 0xa4, 0, 0xffff }, -+ { 0x09b, 0xa4, 0, 0xffff }, -+ { 0x0a0, 0x2e, 0, 0xffff }, -+ { 0x0a1, 0x00, 0, 0xffff }, -+ { 0x0a2, 0x00, 0, 0xffff }, -+ { 0x0ae, 0xa4, 0, 0xffff }, -+ { 0x0af, 0xa4, 0, 0xffff }, -+ { 0x0b0, 0xa4, 0, 0xffff }, -+ { 0x0b1, 0xa4, 0, 0xffff }, -+ { 0x0b2, 0xa4, 0, 0xffff }, -+ { 0x0b3, 0xa4, 0, 0xffff }, -+ { 0x0b6, 0x00, 0, 0xffff }, -+ { 0x0b7, 0x00, 0, 0xffff }, -+ { 0x0d1, 0xff, 0, 0xffff }, -+ { 0x0d6, 0xff, 0, 0xffff }, -+ { 0x0db, 0xff, 0, 0xffff }, -+ { 0x0ea, 0x5c, 0, 0xffff }, -+ { 0x0eb, 0x5c, 0, 0xffff }, -+ { 0x0ef, 0xff, 0, 0xffff }, -+ { 0x0f8, 0x15, 0, 0xffff }, -+ { 0x0f9, 0x00, 0, 0xffff }, -+ { 0x0f0, 0x30, 0, 0xffff }, -+ { 0x184, 0xff, 0, 0xffff }, -+ { 0x186, 0xff, 0, 0xffff }, -+ { 0x1a1, 0xce, 0, 0xffff }, -+ { 0x1a2, 0x0c, 0, 0xffff }, -+ { 0x1a3, 0x0c, 0, 0xffff }, -+ { 0x1a6, 0x00, 0, 0xffff }, -+ { 0x1a7, 0x00, 0, 0xffff }, -+ { 0x1a8, 0xa4, 0, 0xffff }, -+ { 0x1a9, 0xa4, 0, 0xffff }, -+ { 0x1ab, 0x2d, 0, 0xffff }, -+ { 0x1ac, 0x2d, 0, 0xffff }, -+ { 0x1b1, 0x00, 0, 0xffff }, -+ { 0x1bb, 0x00, 0, 0xffff }, -+ { 0x1bc, 0x00, 0, 0xffff }, -+ { 0x1bd, 0x00, 0, 0xffff }, -+ { 0x1be, 0x01, 0, 0xffff }, -+ { 0x1bf, 0x01, 0, 0xffff }, -+ { 0x1c0, 0x01, 0, 0xffff }, -+ { 0x1c1, 0x01, 0, 0xffff }, -+ { 0x1c2, 0x01, 0, 0xffff }, -+ { 0x280, 0x00, 0, 0xffff }, -+ { 0x281, 0x00, 0, 0xffff }, -+ { 0x282, 0x03, 0, 0xffff }, -+ { 0x283, 0x0a, 0, 0xffff }, -+ { 0x284, 0x80, 0, 0xffff }, -+ { 0x285, 0x03, 0, 0xffff }, -+ { 0x040, 0x01, 0, 0xffff }, -+}; -+ -+static const struct hwm_tab_entry HWM_TAB_MICRO_TEMP80[] = { -+ { 0x005, 0x33, 0, 0xffff }, -+ { 0x018, 0x2f, 0, 0xffff }, -+ { 0x019, 0x2f, 0, 0xffff }, -+ { 0x01a, 0x2f, 0, 0xffff }, -+ { 0x01b, 0x0f, 0, 0xffff }, -+ { 0x057, 0xff, 0, 0xffff }, -+ { 0x059, 0xff, 0, 0xffff }, -+ { 0x05b, 0xff, 0, 0xffff }, -+ { 0x05d, 0xff, 0, 0xffff }, -+ { 0x05f, 0xff, 0, 0xffff }, -+ { 0x061, 0xff, 0, 0xffff }, -+ { 0x06e, 0x00, 0, 0xffff }, -+ { 0x06f, 0x03, 0, 0xffff }, -+ { 0x070, 0x03, 0, 0xffff }, -+ { 0x071, 0x02, 0, 0xffff }, -+ { 0x072, 0x02, 0, 0xffff }, -+ { 0x073, 0x01, 0, 0xffff }, -+ { 0x074, 0x06, 0, 0xffff }, -+ { 0x075, 0x07, 0, 0xffff }, -+ { 0x080, 0x00, 0, 0xffff }, -+ { 0x081, 0x80, 0, 0xffff }, -+ { 0x082, 0x80, 0, 0xffff }, -+ { 0x083, 0xbb, 0, 0xffff }, -+ { 0x085, 0xf6, 0, 0xffff }, -+ { 0x086, 0x88, 0, 0xffff }, -+ { 0x087, 0x61, 0, 0xffff }, -+ { 0x088, 0x08, 0, 0xffff }, -+ { 0x089, 0x00, 0, 0xffff }, -+ { 0x08a, 0x73, 0, 0xffff }, -+ { 0x08b, 0x73, 0, 0xffff }, -+ { 0x08c, 0x73, 0, 0xffff }, -+ { 0x090, 0x6d, 0, 0xffff }, -+ { 0x091, 0x86, 0, 0xffff }, -+ { 0x092, 0x66, 0, 0xffff }, -+ { 0x093, 0xa4, 0, 0xffff }, -+ { 0x094, 0x7c, 0, 0xffff }, -+ { 0x095, 0xa4, 0, 0xffff }, -+ { 0x096, 0xa4, 0, 0xffff }, -+ { 0x097, 0xa4, 0, 0xffff }, -+ { 0x098, 0xa4, 0, 0xffff }, -+ { 0x099, 0xa4, 0, 0xffff }, -+ { 0x09a, 0xa4, 0, 0xffff }, -+ { 0x09b, 0xa4, 0, 0xffff }, -+ { 0x0a0, 0x2e, 0, 0xffff }, -+ { 0x0a1, 0x00, 0, 0xffff }, -+ { 0x0a2, 0x00, 0, 0xffff }, -+ { 0x0ae, 0xa4, 0, 0xffff }, -+ { 0x0af, 0xa4, 0, 0xffff }, -+ { 0x0b0, 0xa4, 0, 0xffff }, -+ { 0x0b1, 0xa4, 0, 0xffff }, -+ { 0x0b2, 0xa4, 0, 0xffff }, -+ { 0x0b3, 0xa4, 0, 0xffff }, -+ { 0x0b6, 0x00, 0, 0xffff }, -+ { 0x0b7, 0x00, 0, 0xffff }, -+ { 0x0d1, 0xff, 0, 0xffff }, -+ { 0x0d6, 0xff, 0, 0xffff }, -+ { 0x0db, 0xff, 0, 0xffff }, -+ { 0x0ea, 0x50, 0, 0xffff }, -+ { 0x0eb, 0x50, 0, 0xffff }, -+ { 0x0ef, 0xff, 0, 0xffff }, -+ { 0x0f8, 0x15, 0, 0xffff }, -+ { 0x0f9, 0x00, 0, 0xffff }, -+ { 0x0f0, 0x30, 0, 0xffff }, -+ { 0x184, 0xff, 0, 0xffff }, -+ { 0x186, 0xff, 0, 0xffff }, -+ { 0x1a1, 0xce, 0, 0xffff }, -+ { 0x1a2, 0x0c, 0, 0xffff }, -+ { 0x1a3, 0x0c, 0, 0xffff }, -+ { 0x1a6, 0x00, 0, 0xffff }, -+ { 0x1a7, 0x00, 0, 0xffff }, -+ { 0x1a8, 0xa4, 0, 0xffff }, -+ { 0x1a9, 0xa4, 0, 0xffff }, -+ { 0x1ab, 0x2d, 0, 0xffff }, -+ { 0x1ac, 0x2d, 0, 0xffff }, -+ { 0x1b1, 0x00, 0, 0xffff }, -+ { 0x1bb, 0x00, 0, 0xffff }, -+ { 0x1bc, 0x00, 0, 0xffff }, -+ { 0x1bd, 0x00, 0, 0xffff }, -+ { 0x1be, 0x01, 0, 0xffff }, -+ { 0x1bf, 0x01, 0, 0xffff }, -+ { 0x1c0, 0x01, 0, 0xffff }, -+ { 0x1c1, 0x01, 0, 0xffff }, -+ { 0x1c2, 0x01, 0, 0xffff }, -+ { 0x280, 0x00, 0, 0xffff }, -+ { 0x281, 0x00, 0, 0xffff }, -+ { 0x282, 0x03, 0, 0xffff }, -+ { 0x283, 0x0a, 0, 0xffff }, -+ { 0x284, 0x80, 0, 0xffff }, -+ { 0x285, 0x03, 0, 0xffff }, -+ { 0x040, 0x01, 0, 0xffff }, -+}; -+ -+static const struct hwm_tab_entry HWM_TAB_MICRO_EARLY_STEPPING[] = { -+ { 0x005, 0x33, 0, 0xffff }, -+ { 0x018, 0x2f, 0, 0xffff }, -+ { 0x019, 0x2f, 0, 0xffff }, -+ { 0x01a, 0x2f, 0, 0xffff }, -+ { 0x01b, 0x0f, 0, 0xffff }, -+ { 0x057, 0xff, 0, 0xffff }, -+ { 0x059, 0xff, 0, 0xffff }, -+ { 0x05b, 0xff, 0, 0xffff }, -+ { 0x05d, 0xff, 0, 0xffff }, -+ { 0x05f, 0xff, 0, 0xffff }, -+ { 0x061, 0xff, 0, 0xffff }, -+ { 0x06e, 0x01, 0, 0xffff }, -+ { 0x06f, 0x03, 0, 0xffff }, -+ { 0x070, 0x03, 0, 0xffff }, -+ { 0x071, 0x02, 0, 0xffff }, -+ { 0x072, 0x02, 0, 0xffff }, -+ { 0x073, 0x01, 0, 0xffff }, -+ { 0x074, 0x06, 0, 0xffff }, -+ { 0x075, 0x07, 0, 0xffff }, -+ { 0x080, 0x00, 0, 0xffff }, -+ { 0x081, 0x80, 0, 0xffff }, -+ { 0x082, 0x80, 0, 0xffff }, -+ { 0x083, 0xbb, 0, 0xffff }, -+ { 0x085, 0xfd, 0, 0xffff }, -+ { 0x086, 0x60, 0, 0xffff }, -+ { 0x087, 0x50, 0, 0xffff }, -+ { 0x088, 0x08, 0, 0xffff }, -+ { 0x089, 0x00, 0, 0xffff }, -+ { 0x08a, 0x73, 0, 0xffff }, -+ { 0x08b, 0x73, 0, 0xffff }, -+ { 0x08c, 0x73, 0, 0xffff }, -+ { 0x090, 0x6d, 0, 0xffff }, -+ { 0x091, 0x7a, 0, 0xffff }, -+ { 0x092, 0x6b, 0, 0xffff }, -+ { 0x093, 0xa4, 0, 0xffff }, -+ { 0x094, 0x78, 0, 0xffff }, -+ { 0x095, 0xa4, 0, 0xffff }, -+ { 0x096, 0xa4, 0, 0xffff }, -+ { 0x097, 0xa4, 0, 0xffff }, -+ { 0x098, 0xa4, 0, 0xffff }, -+ { 0x099, 0xa4, 0, 0xffff }, -+ { 0x09a, 0xa4, 0, 0xffff }, -+ { 0x09b, 0xa4, 0, 0xffff }, -+ { 0x0a0, 0x2e, 0, 0xffff }, -+ { 0x0a1, 0x00, 0, 0xffff }, -+ { 0x0a2, 0x00, 0, 0xffff }, -+ { 0x0ae, 0xa4, 0, 0xffff }, -+ { 0x0af, 0xa4, 0, 0xffff }, -+ { 0x0b0, 0xa4, 0, 0xffff }, -+ { 0x0b1, 0xa4, 0, 0xffff }, -+ { 0x0b2, 0xa4, 0, 0xffff }, -+ { 0x0b3, 0xa4, 0, 0xffff }, -+ { 0x0b6, 0x00, 0, 0xffff }, -+ { 0x0b7, 0x00, 0, 0xffff }, -+ { 0x0d1, 0xff, 0, 0xffff }, -+ { 0x0d6, 0xff, 0, 0xffff }, -+ { 0x0db, 0xff, 0, 0xffff }, -+ { 0x0ea, 0x64, 0, 0xffff }, -+ { 0x0eb, 0x64, 0, 0xffff }, -+ { 0x0ef, 0xff, 0, 0xffff }, -+ { 0x0f8, 0x15, 0, 0xffff }, -+ { 0x0f9, 0x00, 0, 0xffff }, -+ { 0x0f0, 0x30, 0, 0xffff }, -+ { 0x184, 0xff, 0, 0xffff }, -+ { 0x186, 0xff, 0, 0xffff }, -+ { 0x1a1, 0xce, 0, 0xffff }, -+ { 0x1a2, 0x0c, 0, 0xffff }, -+ { 0x1a3, 0x0c, 0, 0xffff }, -+ { 0x1a6, 0x00, 0, 0xffff }, -+ { 0x1a7, 0x00, 0, 0xffff }, -+ { 0x1a8, 0xa4, 0, 0xffff }, -+ { 0x1a9, 0xa4, 0, 0xffff }, -+ { 0x1ab, 0x2d, 0, 0xffff }, -+ { 0x1ac, 0x2d, 0, 0xffff }, -+ { 0x1b1, 0x00, 0, 0xffff }, -+ { 0x1bb, 0x00, 0, 0xffff }, -+ { 0x1bc, 0x00, 0, 0xffff }, -+ { 0x1bd, 0x00, 0, 0xffff }, -+ { 0x1be, 0x01, 0, 0xffff }, -+ { 0x1bf, 0x01, 0, 0xffff }, -+ { 0x1c0, 0x01, 0, 0xffff }, -+ { 0x1c1, 0x01, 0, 0xffff }, -+ { 0x1c2, 0x01, 0, 0xffff }, -+ { 0x280, 0x00, 0, 0xffff }, -+ { 0x281, 0x00, 0, 0xffff }, -+ { 0x282, 0x03, 0, 0xffff }, -+ { 0x283, 0x0a, 0, 0xffff }, -+ { 0x284, 0x80, 0, 0xffff }, -+ { 0x285, 0x03, 0, 0xffff }, -+ { 0x040, 0x01, 0, 0xffff }, -+}; -+ -+static const struct hwm_tab_entry HWM_TAB_SFF[] = { -+ { 0x019, 0x2f, 0, 0xffff }, -+ { 0x040, 0x01, 0, 0xffff }, -+ { 0x072, 0x03, 0, 0xffff }, -+ { 0x075, 0x06, 0, 0xffff }, -+ { 0x07c, 0x00, 0, 0xffff }, -+ { 0x080, 0x00, 0, 0xffff }, -+ { 0x081, 0x00, 0, 0xffff }, -+ { 0x083, 0xbb, 0, 0xffff }, -+ { 0x085, 0x59, 0, 0xffff }, -+ { 0x086, 0x6a, 0, 0xffff }, -+ { 0x087, 0xc0, 0, 0xffff }, -+ { 0x08a, 0x33, 0, 0xffff }, -+ { 0x090, 0x77, 0, 0xffff }, -+ { 0x091, 0x66, 0, 0xffff }, -+ { 0x092, 0x94, 0, 0xffff }, -+ { 0x093, 0x90, 0, 0xffff }, -+ { 0x094, 0x68, 0, 0xffff }, -+ { 0x096, 0xa4, 0, 0xffff }, -+ { 0x097, 0xa4, 0, 0xffff }, -+ { 0x098, 0xa4, 0, 0xffff }, -+ { 0x099, 0xa4, 0, 0xffff }, -+ { 0x09a, 0xa4, 0, 0xffff }, -+ { 0x09b, 0xa4, 0, 0xffff }, -+ { 0x0a0, 0x3e, 0, 0xffff }, -+ { 0x0ae, 0x86, 0, 0xffff }, -+ { 0x0af, 0x86, 0, 0xffff }, -+ { 0x0b0, 0xa4, 0, 0xffff }, -+ { 0x0b1, 0xa4, 0, 0xffff }, -+ { 0x0b2, 0x90, 0, 0xffff }, -+ { 0x0b6, 0x48, 0, 0xffff }, -+ { 0x0b7, 0x48, 0, 0xffff }, -+ { 0x0ea, 0x64, 0, 0xffff }, -+ { 0x0f0, 0x30, 0, 0xffff }, -+ { 0x1b1, 0x48, 0, 0xffff }, -+ { 0x1b8, 0x00, 0, 0xffff }, -+ { 0x1be, 0x95, 0, 0xffff }, -+ { 0x1c1, 0x90, 0, 0xffff }, -+ { 0x1c6, 0x00, 0, 0xffff }, -+ { 0x1c9, 0x00, 0, 0xffff }, -+ { 0x280, 0x68, 0, 0xffff }, -+ { 0x281, 0x10, 0, 0xffff }, -+ { 0x282, 0x03, 0, 0xffff }, -+ { 0x283, 0x0a, 0, 0xffff }, -+ { 0x284, 0x80, 0, 0xffff }, -+ { 0x285, 0x03, 0, 0xffff} -+}; -+ -+static const struct hwm_tab_entry HWM_TAB_MT[] = { -+ { 0x005, 0x33, 0, 0xffff }, -+ { 0x018, 0x2f, 0, 0xffff }, -+ { 0x019, 0x2f, 0, 0xffff }, -+ { 0x01a, 0x2f, 0, 0xffff }, -+ { 0x080, 0x00, 0, 0xffff }, -+ { 0x081, 0x00, 0, 0xffff }, -+ { 0x082, 0x80, 0, 0xffff }, -+ { 0x083, 0xbb, 0, 0xffff }, -+ { 0x085, 0xb9, 0, 0x0010 }, -+ { 0x086, 0xac, 0, 0x0010 }, -+ { 0x087, 0x87, 0, 0x0010 }, -+ { 0x08a, 0x51, 0, 0x0010 }, -+ { 0x08b, 0x39, 0, 0x0010 }, -+ { 0x090, 0x78, 0, 0xffff }, -+ { 0x091, 0x6a, 0, 0xffff }, -+ { 0x092, 0x8f, 0, 0xffff }, -+ { 0x094, 0x68, 0, 0xffff }, -+ { 0x095, 0x5b, 0, 0xffff }, -+ { 0x096, 0x92, 0, 0xffff }, -+ { 0x097, 0x86, 0, 0xffff }, -+ { 0x098, 0xa4, 0, 0xffff }, -+ { 0x09a, 0x8b, 0, 0xffff }, -+ { 0x0a0, 0x0a, 0, 0xffff }, -+ { 0x0a1, 0x26, 0, 0xffff }, -+ { 0x0a2, 0xd1, 0, 0xffff }, -+ { 0x0ae, 0x7c, 0, 0xffff }, -+ { 0x0af, 0x7c, 0, 0xffff }, -+ { 0x0b0, 0x9a, 0, 0xffff }, -+ { 0x0b3, 0x7c, 0, 0xffff }, -+ { 0x0b6, 0x08, 0, 0xffff }, -+ { 0x0b7, 0x00, 0, 0xffff }, -+ { 0x0ea, 0x64, 0, 0xffff }, -+ { 0x0ef, 0xff, 0, 0xffff }, -+ { 0x0f8, 0x15, 0, 0xffff }, -+ { 0x0f9, 0x00, 0, 0xffff }, -+ { 0x0f0, 0x30, 0, 0xffff }, -+ { 0x0fd, 0x01, 0, 0xffff }, -+ { 0x1a1, 0x99, 0, 0xffff }, -+ { 0x1a2, 0x00, 0, 0xffff }, -+ { 0x1a4, 0x00, 0, 0xffff }, -+ { 0x1b1, 0x00, 0, 0xffff }, -+ { 0x1be, 0x90, 0, 0xffff }, -+ { 0x280, 0xc4, 0, 0xffff }, -+ { 0x281, 0x09, 0, 0xffff }, -+ { 0x282, 0x0a, 0, 0xffff }, -+ { 0x283, 0x14, 0, 0xffff }, -+ { 0x284, 0x01, 0, 0xffff }, -+ { 0x285, 0x01, 0, 0xffff }, -+ { 0x288, 0x94, 0, 0xffff }, -+ { 0x289, 0x11, 0, 0xffff }, -+ { 0x28a, 0x0a, 0, 0xffff }, -+ { 0x28b, 0x14, 0, 0xffff }, -+ { 0x28c, 0x01, 0, 0xffff }, -+ { 0x28d, 0x01, 0, 0xffff }, -+ { 0x294, 0x24, 0, 0xffff }, -+}; -+ -+static uint8_t get_temp_target(void) -+{ -+ uint8_t val = rdmsr(0x1a2).lo >> 8 & 0xff; -+ if (!val) -+ val = 20; -+ return 0x95 - val; -+} -+ -+static uint16_t get_pkg_power(void) -+{ -+ const unsigned int pkg_power = rdmsr(0x614).lo & 0x7fff; -+ const unsigned int power_unit = 1 << (rdmsr(0x606).lo & 0xf); -+ if (pkg_power / power_unit > 65) -+ return 32; -+ else -+ return 16; -+} -+ -+static uint8_t get_core_cnt(void) -+{ -+ // Intel describes this CPUID field as: -+ // > Maximum number of addressable IDs for processor cores in the physical package -+ if (cpuid(0).eax >= 4) -+ return cpuid_ext(4, 0).eax >> 26; -+ return 0; -+} -+ -+static void apply_hwm_tab(const struct hwm_tab_entry *arr, size_t size) -+{ -+ uint8_t temp_target = get_temp_target(); -+ uint16_t pkg_power = get_pkg_power(); -+ -+ printk(BIOS_DEBUG, "Temp target = %#x\n", temp_target); -+ printk(BIOS_DEBUG, "Package power = %#x\n", pkg_power); -+ -+ for (size_t i = 0; i < size; ++i) { -+ // Skip entry if it doesn't apply for this package power -+ if (arr[i].pkg_power != pkg_power && -+ arr[i].pkg_power != HWM_TAB_PKG_POWER_ANY) -+ continue; -+ -+ uint8_t val = arr[i].val; -+ -+ // Add temp target to value if requested (current tables never do) -+ if (arr[i].flags & HWM_TAB_ADD_TEMP_TARGET) -+ val += temp_target; -+ -+ // Perform write -+ sch5555_mbox_write(1, arr[i].addr, val); -+ } -+} -+ -+static void sch5555_ec_hwm_init(void *arg) -+{ -+ uint8_t form_fac_id, saved_2fc, core_cnt; -+ -+ printk(BIOS_DEBUG, "OptiPlex 3050 late HWM init\n"); -+ -+ form_fac_id = gpio_get(GPP_G2) | gpio_get(GPP_G3) << 1; -+ printk(BIOS_DEBUG, "Form Factor ID = %#x\n", form_fac_id); -+ -+ saved_2fc = sch5555_mbox_read(1, 0x2fc); -+ sch5555_mbox_write(1, 0x2fc, 0xa0); -+ sch5555_mbox_write(1, 0x2fd, 0x32); -+ -+ switch (form_fac_id) { -+ case FORM_FACTOR_MICRO: -+ // CPU stepping <= 3 -+ if ((cpuid(1).eax & 0xf) <= 3) -+ apply_hwm_tab(HWM_TAB_MICRO_EARLY_STEPPING, ARRAY_SIZE(HWM_TAB_MICRO_EARLY_STEPPING)); -+ // Tjunction == 80 -+ else if ((rdmsr(0x1a2).lo >> 16 & 0xff) == 80) -+ apply_hwm_tab(HWM_TAB_MICRO_TEMP80, ARRAY_SIZE(HWM_TAB_MICRO_TEMP80)); -+ else -+ apply_hwm_tab(HWM_TAB_MICRO_BASE, ARRAY_SIZE(HWM_TAB_MICRO_BASE)); -+ break; -+ case FORM_FACTOR_SFF: -+ apply_hwm_tab(HWM_TAB_SFF, ARRAY_SIZE(HWM_TAB_SFF)); -+ break; -+ default: -+ apply_hwm_tab(HWM_TAB_MT, ARRAY_SIZE(HWM_TAB_MT)); -+ break; -+ } -+ -+ core_cnt = get_core_cnt(); -+ printk(BIOS_DEBUG, "CPU Core Count = %#x\n", core_cnt); -+ if (core_cnt > 2) { -+ sch5555_mbox_write(1, 0x9e, 0x30); -+ sch5555_mbox_write(1, 0xeb, sch5555_mbox_read(1, 0xea)); -+ } -+ -+ sch5555_mbox_write(1, 0x2fc, saved_2fc); -+ sch5555_mbox_read(1, 0xb8); -+} -+ -+BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL); -diff --git a/src/mainboard/dell/optiplex_3050/romstage.c b/src/mainboard/dell/optiplex_3050/romstage.c -new file mode 100644 -index 0000000000..501b254232 ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/romstage.c -@@ -0,0 +1,18 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <soc/romstage.h> -+#include <spd_bin.h> -+ -+void mainboard_memory_init_params(FSPM_UPD *mupd) -+{ -+ struct spd_block blk = { .addr_map = { 0x50, 0x52, } }; -+ get_spd_smbus(&blk); -+ dump_spd_info(&blk); -+ -+ FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; -+ mem_cfg->DqPinsInterleaved = true; -+ mem_cfg->CaVrefConfig = 2; -+ mem_cfg->MemorySpdDataLen = blk.len; -+ mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0]; -+ mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[1]; -+} -diff --git a/src/mainboard/dell/optiplex_3050/sch5555_ec.c b/src/mainboard/dell/optiplex_3050/sch5555_ec.c -new file mode 100644 -index 0000000000..1df5026531 ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/sch5555_ec.c -@@ -0,0 +1,54 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <arch/io.h> -+#include <device/pnp_ops.h> -+#include <superio/smsc/sch555x/sch555x.h> -+#include "sch5555_ec.h" -+ -+uint8_t sch5555_mbox_read(uint8_t addr1, uint16_t addr2) -+{ -+ // clear ec-to-host mailbox -+ uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1); -+ outb(tmp, SCH555x_EMI_IOBASE + 1); -+ -+ // send address -+ outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2); -+ outw((addr1 * 2) | 0x100, SCH555x_EMI_IOBASE + 4); -+ -+ outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2); -+ outl(addr2 << 16, SCH555x_EMI_IOBASE + 4); -+ -+ // send message to ec -+ outb(1, SCH555x_EMI_IOBASE); -+ -+ // wait for ack -+ for (size_t retry = 0; retry < 0xfff; ++retry) -+ if (inb(SCH555x_EMI_IOBASE + 1) & 1) -+ break; -+ -+ // read result -+ outw(4 | 0x8000, SCH555x_EMI_IOBASE + 2); -+ return inb(SCH555x_EMI_IOBASE + 4); -+} -+ -+void sch5555_mbox_write(uint8_t addr1, uint16_t addr2, uint8_t val) -+{ -+ // clear ec-to-host mailbox -+ uint8_t tmp = inb(SCH555x_EMI_IOBASE + 1); -+ outb(tmp, SCH555x_EMI_IOBASE + 1); -+ -+ // send address and value -+ outw(0 | 0x8001, SCH555x_EMI_IOBASE + 2); -+ outw((addr1 * 2) | 0x101, SCH555x_EMI_IOBASE + 4); -+ -+ outw(4 | 0x8002, SCH555x_EMI_IOBASE + 2); -+ outl(val | (addr2 << 16), SCH555x_EMI_IOBASE + 4); -+ -+ // send message to ec -+ outb(1, SCH555x_EMI_IOBASE); -+ -+ // wait for ack -+ for (size_t retry = 0; retry < 0xfff; ++retry) -+ if (inb(SCH555x_EMI_IOBASE + 1) & 1) -+ break; -+} -diff --git a/src/mainboard/dell/optiplex_3050/sch5555_ec.h b/src/mainboard/dell/optiplex_3050/sch5555_ec.h -new file mode 100644 -index 0000000000..9d262d5787 ---- /dev/null -+++ b/src/mainboard/dell/optiplex_3050/sch5555_ec.h -@@ -0,0 +1,10 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#ifndef __SCH5555_EC_H__ -+#define __SCH5555_EC_H__ -+ -+uint8_t sch5555_mbox_read(uint8_t addr1, uint16_t addr2); -+ -+void sch5555_mbox_write(uint8_t addr1, uint16_t addr2, uint8_t val); -+ -+#endif --- -2.39.5 - diff --git a/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch b/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch new file mode 100644 index 00000000..215a4e6d --- /dev/null +++ b/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch @@ -0,0 +1,94 @@ +From 0a28ea805e3dddfaa89e6c4255506a390bc7ce04 Mon Sep 17 00:00:00 2001 +From: Felix Singer <felixsinger@posteo.net> +Date: Wed, 26 Jun 2024 04:24:31 +0200 +Subject: [PATCH 01/11] soc/intel/skylake: configure usb acpi + +Change-Id: I53fc73046e4b107064fa8c3c617ba6d9b807b71d +Signed-off-by: Felix Singer <felixsinger@posteo.net> +--- + src/soc/intel/skylake/Kconfig | 1 + + src/soc/intel/skylake/chipset.cb | 56 +++++++++++++++++++++++++++++++- + 2 files changed, 56 insertions(+), 1 deletion(-) + +diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig +index 22017c848b..c24df2ef75 100644 +--- a/src/soc/intel/skylake/Kconfig ++++ b/src/soc/intel/skylake/Kconfig +@@ -10,6 +10,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE + select CPU_INTEL_COMMON + select CPU_INTEL_FIRMWARE_INTERFACE_TABLE + select CPU_SUPPORTS_PM_TIMER_EMULATION ++ select DRIVERS_USB_ACPI + select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2 + select FSP_COMPRESS_FSP_S_LZ4 + select FSP_M_XIP +diff --git a/src/soc/intel/skylake/chipset.cb b/src/soc/intel/skylake/chipset.cb +index 6538a1475b..dfb81d496e 100644 +--- a/src/soc/intel/skylake/chipset.cb ++++ b/src/soc/intel/skylake/chipset.cb +@@ -13,7 +13,61 @@ chip soc/intel/skylake + device pci 07.0 alias chap off end + device pci 08.0 alias gmm off end # Gaussian Mixture Model + device pci 13.0 alias ish off end # SensorHub +- device pci 14.0 alias south_xhci off ops usb_xhci_ops end ++ device pci 14.0 alias south_xhci off ops usb_xhci_ops ++ chip drivers/usb/acpi ++ register "type" = "UPC_TYPE_HUB" ++ device usb 0.0 alias xhci_root_hub off ++ chip drivers/usb/acpi ++ device usb 2.0 alias usb2_port1 off end ++ end ++ chip drivers/usb/acpi ++ device usb 2.1 alias usb2_port2 off end ++ end ++ chip drivers/usb/acpi ++ device usb 2.2 alias usb2_port3 off end ++ end ++ chip drivers/usb/acpi ++ device usb 2.3 alias usb2_port4 off end ++ end ++ chip drivers/usb/acpi ++ device usb 2.4 alias usb2_port5 off end ++ end ++ chip drivers/usb/acpi ++ device usb 2.5 alias usb2_port6 off end ++ end ++ chip drivers/usb/acpi ++ device usb 2.6 alias usb2_port7 off end ++ end ++ chip drivers/usb/acpi ++ device usb 2.7 alias usb2_port8 off end ++ end ++ chip drivers/usb/acpi ++ device usb 2.8 alias usb2_port9 off end ++ end ++ chip drivers/usb/acpi ++ device usb 2.9 alias usb2_port10 off end ++ end ++ chip drivers/usb/acpi ++ device usb 3.0 alias usb3_port1 off end ++ end ++ chip drivers/usb/acpi ++ device usb 3.1 alias usb3_port2 off end ++ end ++ chip drivers/usb/acpi ++ device usb 3.2 alias usb3_port3 off end ++ end ++ chip drivers/usb/acpi ++ device usb 3.3 alias usb3_port4 off end ++ end ++ chip drivers/usb/acpi ++ device usb 3.4 alias usb3_port5 off end ++ end ++ chip drivers/usb/acpi ++ device usb 3.5 alias usb3_port6 off end ++ end ++ end ++ end ++ end + device pci 14.1 alias south_xdci off ops usb_xdci_ops end + device pci 14.2 alias thermal off end + device pci 14.3 alias cio off end +-- +2.39.5 + diff --git a/config/coreboot/next/patches/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch b/config/coreboot/next/patches/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch new file mode 100644 index 00000000..f60aa74a --- /dev/null +++ b/config/coreboot/next/patches/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch @@ -0,0 +1,30 @@ +From aa6dd7aa4693bd9ce1fe7f35b9532e5411fc1098 Mon Sep 17 00:00:00 2001 +From: Mate Kukri <km@mkukri.xyz> +Date: Fri, 22 Nov 2024 21:26:48 +0000 +Subject: [PATCH 02/11] soc/intel/skylake: Enable 4E/4F PNP I/O ports in + bootblock + +Change-Id: I57c9d8a9513a268e2ca6a0abd1306cd038598173 +Signed-off-by: Mate Kukri <km@mkukri.xyz> +--- + src/soc/intel/skylake/bootblock/pch.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c +index df00bb85a9..beaece960b 100644 +--- a/src/soc/intel/skylake/bootblock/pch.c ++++ b/src/soc/intel/skylake/bootblock/pch.c +@@ -100,8 +100,8 @@ static void soc_config_pwrmbase(void) + + void pch_early_iorange_init(void) + { +- uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 | +- LPC_IOE_EC_62_66; ++ uint16_t io_enables = LPC_IOE_EC_4E_4F | LPC_IOE_SUPERIO_2E_2F | ++ LPC_IOE_KBC_60_64 | LPC_IOE_EC_62_66; + + const config_t *config = config_of_soc(); + +-- +2.39.5 + diff --git a/config/coreboot/next/patches/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch b/config/coreboot/next/patches/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch new file mode 100644 index 00000000..108f688d --- /dev/null +++ b/config/coreboot/next/patches/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch @@ -0,0 +1,2237 @@ +From 1652c22825d3001e77159aa539dfa49d2389c775 Mon Sep 17 00:00:00 2001 +From: Mate Kukri <km@mkukri.xyz> +Date: Tue, 31 Dec 2024 22:49:15 +0000 +Subject: [PATCH 03/11] mb/lenovo: Add ThinkPad T480 and ThinkPad T480s + +These machine have BootGuard fused and requires deguard to +boot coreboot. + +Known issues: +- Alpine Ridge Thunderbolt 3 controller does not work +- Some Fn+F{1-12} keys aren't handled correctly +- Nvidia dGPU is finicky + - Needs option ROM + - Power enable code is buggy + - Nouveau only works on linux 6.8-6.9 +- Headphone jack isn't detected as plugged in despite correct verbs + +Thanks to Leah Rowe for helping with the T480s. + +Signed-off-by: Mate Kukri <km@mkukri.xyz> +Change-Id: I19d421412c771c1f242f6ff39453f824fa866163 +--- + src/device/pci_rom.c | 4 +- + src/ec/lenovo/h8/acpi/ec.asl | 2 +- + src/ec/lenovo/h8/bluetooth.c | 6 +- + src/ec/lenovo/h8/wwan.c | 6 +- + src/mainboard/lenovo/sklkbl_thinkpad/Kconfig | 57 +++++ + .../lenovo/sklkbl_thinkpad/Kconfig.name | 7 + + .../lenovo/sklkbl_thinkpad/Makefile.mk | 73 +++++++ + .../lenovo/sklkbl_thinkpad/acpi/ec.asl | 12 ++ + .../lenovo/sklkbl_thinkpad/acpi/superio.asl | 3 + + .../lenovo/sklkbl_thinkpad/bootblock.c | 60 ++++++ + .../lenovo/sklkbl_thinkpad/devicetree.cb | 71 ++++++ + src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl | 33 +++ + src/mainboard/lenovo/sklkbl_thinkpad/ec.c | 153 +++++++++++++ + src/mainboard/lenovo/sklkbl_thinkpad/ec.h | 99 +++++++++ + src/mainboard/lenovo/sklkbl_thinkpad/gpio.h | 8 + + .../lenovo/sklkbl_thinkpad/ramstage.c | 105 +++++++++ + .../sklkbl_thinkpad/variants/t480/data.vbt | Bin 0 -> 4106 bytes + .../variants/t480/gma-mainboard.ads | 19 ++ + .../sklkbl_thinkpad/variants/t480/gpio.c | 203 ++++++++++++++++++ + .../sklkbl_thinkpad/variants/t480/hda_verb.c | 90 ++++++++ + .../variants/t480/memory_init_params.c | 20 ++ + .../variants/t480/overridetree.cb | 103 +++++++++ + .../sklkbl_thinkpad/variants/t480s/data.vbt | Bin 0 -> 4106 bytes + .../variants/t480s/gma-mainboard.ads | 19 ++ + .../sklkbl_thinkpad/variants/t480s/gpio.c | 199 +++++++++++++++++ + .../sklkbl_thinkpad/variants/t480s/hda_verb.c | 90 ++++++++ + .../variants/t480s/memory_init_params.c | 44 ++++ + .../variants/t480s/overridetree.cb | 103 +++++++++ + .../variants/t480s/spd/spd_0.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_1.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_10.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_11.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_12.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_13.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_14.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_15.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_16.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_17.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_18.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_19.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_2.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_20.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_3.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_4.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_5.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_6.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_7.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_8.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_9.bin | Bin 0 -> 512 bytes + 49 files changed, 1583 insertions(+), 6 deletions(-) + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ec.c + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ec.h + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/gpio.h + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_0.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_1.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_10.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_11.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_12.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_13.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_14.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_15.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_16.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_17.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_18.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_19.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_2.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_20.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_3.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_4.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_5.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_6.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_7.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_8.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_9.bin + +diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c +index d60720eb49..cc6b9b068a 100644 +--- a/src/device/pci_rom.c ++++ b/src/device/pci_rom.c +@@ -304,11 +304,13 @@ void pci_rom_ssdt(const struct device *device) + return; + } + ++#if 0 + const char *scope = acpi_device_path(device); + if (!scope) { + printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device)); + return; + } ++#endif + + /* Supports up to four devices. */ + if ((CBMEM_ID_ROM0 + ngfx) > CBMEM_ID_ROM3) { +@@ -336,7 +338,7 @@ void pci_rom_ssdt(const struct device *device) + memcpy(cbrom, rom, cbrom_length); + + /* write _ROM method */ +- acpigen_write_scope(scope); ++ acpigen_write_scope("\\_SB.PCI0.RP01.PEGP"); + acpigen_write_rom(cbrom, cbrom_length); + acpigen_pop_len(); /* pop scope */ + } +diff --git a/src/ec/lenovo/h8/acpi/ec.asl b/src/ec/lenovo/h8/acpi/ec.asl +index bc54d3b422..8f4a8e1986 100644 +--- a/src/ec/lenovo/h8/acpi/ec.asl ++++ b/src/ec/lenovo/h8/acpi/ec.asl +@@ -331,7 +331,7 @@ Device(EC) + #include "sleepbutton.asl" + #include "lid.asl" + #include "beep.asl" +-#include "thermal.asl" ++//#include "thermal.asl" + #include "systemstatus.asl" + #include "thinkpad.asl" + } +diff --git a/src/ec/lenovo/h8/bluetooth.c b/src/ec/lenovo/h8/bluetooth.c +index 16fc8dce39..be71a24ced 100644 +--- a/src/ec/lenovo/h8/bluetooth.c ++++ b/src/ec/lenovo/h8/bluetooth.c +@@ -1,6 +1,6 @@ + /* SPDX-License-Identifier: GPL-2.0-only */ + +-#include <southbridge/intel/common/gpio.h> ++// #include <southbridge/intel/common/gpio.h> + #include <console/console.h> + #include <device/device.h> + #include <ec/acpi/ec.h> +@@ -28,16 +28,18 @@ bool h8_has_bdc(const struct device *dev) + { + struct ec_lenovo_h8_config *conf = dev->chip_info; + +- if (!conf->has_bdc_detection) { ++ if (1 || !conf->has_bdc_detection) { + printk(BIOS_INFO, "H8: BDC detection not implemented. " + "Assuming BDC installed\n"); + return true; + } + ++#if 0 + if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) { + printk(BIOS_INFO, "H8: BDC installed\n"); + return true; + } ++#endif + + printk(BIOS_INFO, "H8: BDC not installed\n"); + return false; +diff --git a/src/ec/lenovo/h8/wwan.c b/src/ec/lenovo/h8/wwan.c +index 685886fcce..5cdcf77406 100644 +--- a/src/ec/lenovo/h8/wwan.c ++++ b/src/ec/lenovo/h8/wwan.c +@@ -1,6 +1,6 @@ + /* SPDX-License-Identifier: GPL-2.0-only */ + +-#include <southbridge/intel/common/gpio.h> ++// #include <southbridge/intel/common/gpio.h> + #include <console/console.h> + #include <device/device.h> + #include <ec/acpi/ec.h> +@@ -26,16 +26,18 @@ bool h8_has_wwan(const struct device *dev) + { + struct ec_lenovo_h8_config *conf = dev->chip_info; + +- if (!conf->has_wwan_detection) { ++ if (1 || !conf->has_wwan_detection) { + printk(BIOS_INFO, "H8: WWAN detection not implemented. " + "Assuming WWAN installed\n"); + return true; + } + ++#if 0 + if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) { + printk(BIOS_INFO, "H8: WWAN installed\n"); + return true; + } ++#endif + + printk(BIOS_INFO, "H8: WWAN not installed\n"); + return false; +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig +new file mode 100644 +index 0000000000..4998672943 +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig +@@ -0,0 +1,57 @@ ++# SPDX-License-Identifier: GPL-2.0-only ++ ++config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON ++ bool ++ select BOARD_ROMSIZE_KB_16384 ++ select EC_LENOVO_H8 ++ select EC_LENOVO_PMH7 ++ select H8_HAS_BAT_THRESHOLDS_IMPL ++ select H8_HAS_LEDLOGO ++ select H8_HAS_PRIMARY_FN_KEYS ++ select HAVE_ACPI_RESUME ++ select HAVE_ACPI_TABLES ++ select INTEL_GMA_HAVE_VBT ++ select INTEL_INT15 ++ select MAINBOARD_HAS_LIBGFXINIT ++ select MAINBOARD_HAS_TPM2 ++ select MAINBOARD_USES_IFD_GBE_REGION ++ select MEMORY_MAPPED_TPM ++ select SOC_INTEL_COMMON_BLOCK_HDA_VERB ++ select SOC_INTEL_KABYLAKE ++ select SPD_READ_BY_WORD ++ select SYSTEM_TYPE_LAPTOP ++ ++config BOARD_LENOVO_T480 ++ bool ++ select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON ++ ++config BOARD_LENOVO_T480S ++ bool ++ select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON ++ ++if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON ++ ++config MAINBOARD_DIR ++ default "lenovo/sklkbl_thinkpad" ++ ++config VARIANT_DIR ++ default "t480" if BOARD_LENOVO_T480 ++ default "t480s" if BOARD_LENOVO_T480S ++ ++config OVERRIDE_DEVICETREE ++ default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" ++ ++config MAINBOARD_PART_NUMBER ++ default "T480" if BOARD_LENOVO_T480 ++ default "T480s" if BOARD_LENOVO_T480S ++ ++config CBFS_SIZE ++ default 0x900000 ++ ++config DIMM_MAX ++ default 2 ++ ++config DIMM_SPD_SIZE ++ default 512 # DDR4 ++ ++endif +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name +new file mode 100644 +index 0000000000..abc273f387 +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name +@@ -0,0 +1,7 @@ ++# SPDX-License-Identifier: GPL-2.0-only ++ ++config BOARD_LENOVO_T480 ++ bool "ThinkPad T480" ++ ++config BOARD_LENOVO_T480S ++ bool "ThinkPad T480s" +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk +new file mode 100644 +index 0000000000..c308239177 +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk +@@ -0,0 +1,73 @@ ++## SPDX-License-Identifier: GPL-2.0-only ++ ++bootblock-y += bootblock.c ec.c ++ ++romstage-y += variants/$(VARIANT_DIR)/memory_init_params.c ++ ++ramstage-y += ramstage.c ec.c ++ramstage-y += variants/$(VARIANT_DIR)/gpio.c variants/$(VARIANT_DIR)/hda_verb.c ++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads ++ ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_0.bin ++spd_0.bin-file := variants/$(VARIANT_DIR)/spd/spd_0.bin ++spd_0.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_1.bin ++spd_1.bin-file := variants/$(VARIANT_DIR)/spd/spd_1.bin ++spd_1.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_2.bin ++spd_2.bin-file := variants/$(VARIANT_DIR)/spd/spd_2.bin ++spd_2.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_3.bin ++spd_3.bin-file := variants/$(VARIANT_DIR)/spd/spd_3.bin ++spd_3.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_4.bin ++spd_4.bin-file := variants/$(VARIANT_DIR)/spd/spd_4.bin ++spd_4.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_5.bin ++spd_5.bin-file := variants/$(VARIANT_DIR)/spd/spd_5.bin ++spd_5.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_6.bin ++spd_6.bin-file := variants/$(VARIANT_DIR)/spd/spd_6.bin ++spd_6.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_7.bin ++spd_7.bin-file := variants/$(VARIANT_DIR)/spd/spd_7.bin ++spd_7.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_8.bin ++spd_8.bin-file := variants/$(VARIANT_DIR)/spd/spd_8.bin ++spd_8.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_9.bin ++spd_9.bin-file := variants/$(VARIANT_DIR)/spd/spd_9.bin ++spd_9.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_10.bin ++spd_10.bin-file := variants/$(VARIANT_DIR)/spd/spd_10.bin ++spd_10.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_11.bin ++spd_11.bin-file := variants/$(VARIANT_DIR)/spd/spd_11.bin ++spd_11.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_12.bin ++spd_12.bin-file := variants/$(VARIANT_DIR)/spd/spd_12.bin ++spd_12.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_13.bin ++spd_13.bin-file := variants/$(VARIANT_DIR)/spd/spd_13.bin ++spd_13.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_14.bin ++spd_14.bin-file := variants/$(VARIANT_DIR)/spd/spd_14.bin ++spd_14.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_15.bin ++spd_15.bin-file := variants/$(VARIANT_DIR)/spd/spd_15.bin ++spd_15.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_16.bin ++spd_16.bin-file := variants/$(VARIANT_DIR)/spd/spd_16.bin ++spd_16.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_17.bin ++spd_17.bin-file := variants/$(VARIANT_DIR)/spd/spd_17.bin ++spd_17.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_18.bin ++spd_18.bin-file := variants/$(VARIANT_DIR)/spd/spd_18.bin ++spd_18.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_19.bin ++spd_19.bin-file := variants/$(VARIANT_DIR)/spd/spd_19.bin ++spd_19.bin-type := raw ++cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_20.bin ++spd_20.bin-file := variants/$(VARIANT_DIR)/spd/spd_20.bin ++spd_20.bin-type := raw +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl +new file mode 100644 +index 0000000000..3a949a2fca +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl +@@ -0,0 +1,12 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB ++#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB ++#define THINKPAD_EC_GPE 22 ++ ++Name(\TCRT, 100) ++Name(\TPSV, 90) ++Name(\FLVL, 0) ++ ++#include <ec/lenovo/h8/acpi/ec.asl> ++#include <ec/lenovo/h8/acpi/thinkpad_bat_thresholds_b0.asl> +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl +new file mode 100644 +index 0000000000..55b1db5b11 +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl +@@ -0,0 +1,3 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#include <drivers/pc80/pc/ps2_controller.asl> +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c +new file mode 100644 +index 0000000000..fb660dbdfa +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c +@@ -0,0 +1,60 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#include <arch/io.h> ++#include <bootblock_common.h> ++#include <device/pci.h> ++#include <soc/pci_devs.h> ++#include "ec.h" ++ ++static void configure_uart(uint16_t port, uint16_t iobase, uint8_t irqno) ++{ ++ microchip_pnp_enter_conf_state(port); ++ ++ // Select LPC I/F LDN ++ pnp_write(port, PNP_LDN_SELECT, LDN_LPCIF); ++ // Write UART BAR ++ pnp_write_le32(port, LPCIF_BAR_UART, (uint32_t) iobase << 16 | 0x8707); ++ // Set SIRQ4 to UART ++ pnp_write(port, LPCIF_SIRQ(irqno), LDN_UART); ++ ++ // Configure UART LDN ++ pnp_write(port, PNP_LDN_SELECT, LDN_UART); ++ pnp_write(port, UART_ACTIVATE, 0x01); ++ pnp_write(port, UART_CONFIG_SELECT, 0x00); ++ ++ microchip_pnp_exit_conf_state(port); ++ ++#ifdef CONFIG_BOARD_LENOVO_T480 ++ // Supply debug unlock key ++ debug_write_key(DEBUG_RW_KEY_IDX, debug_rw_key); ++ ++ // Use debug writes to set UART_TX and UART_RX GPIOs ++ debug_write_dword(0xf0c400 + 0x110, 0x00001000); ++ debug_write_dword(0xf0c400 + 0x114, 0x00001000); ++#endif ++} ++ ++ ++#define UART_PORT 0x3f8 ++#define UART_IRQ 4 ++ ++void bootblock_mainboard_early_init(void) ++{ ++ // Tell EC via BIOS Debug Port 1 that the world isn't on fire ++ ++ // Let the EC know that BIOS code is running ++ outb(0x11, 0x86); ++ outb(0x6e, 0x86); ++ ++ // Enable accesses to EC1 interface ++ ec0_write(0, ec0_read(0) | 0x20); ++ ++ // Reset LEDs to power on state ++ // (Without this warm reboot leaves LEDs off) ++ ec0_write(0x0c, 0x80); ++ ec0_write(0x0c, 0x07); ++ ec0_write(0x0c, 0x8a); ++ ++ // Setup debug UART ++ configure_uart(EC_CFG_PORT, UART_PORT, UART_IRQ); ++} +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb +new file mode 100644 +index 0000000000..c07d4d53ca +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb +@@ -0,0 +1,71 @@ ++# SPDX-License-Identifier: GPL-2.0-only ++ ++chip soc/intel/skylake ++ # IGD Displays ++ register "gfx" = "GMA_STATIC_DISPLAYS(0)" ++ ++ register "panel_cfg" = "{ ++ .up_delay_ms = 200, ++ .down_delay_ms = 50, ++ .cycle_delay_ms = 600, ++ .backlight_on_delay_ms = 1, ++ .backlight_off_delay_ms = 200, ++ .backlight_pwm_hz = 200, ++ }" ++ ++ # Power ++ register "PmConfigSlpS3MinAssert" = "2" # 50ms ++ register "PmConfigSlpS4MinAssert" = "1" # 1s ++ register "PmConfigSlpSusMinAssert" = "3" # 500ms ++ register "PmConfigSlpAMinAssert" = "3" # 2s ++ ++ device domain 0 on ++ device ref igpu on end ++ device ref sa_thermal on end ++ device ref thermal on end ++ device ref south_xhci on end ++ device ref lpc_espi on ++ register "serirq_mode" = "SERIRQ_CONTINUOUS" ++ ++ register "gen1_dec" = "0x007c1601" ++ register "gen2_dec" = "0x000c15e1" ++ ++ chip ec/lenovo/pmh7 ++ register "backlight_enable" = "true" ++ register "dock_event_enable" = "true" ++ device pnp ff.1 on end # dummy ++ end ++ ++ chip ec/lenovo/h8 ++ register "beepmask0" = "0x00" ++ register "beepmask1" = "0x86" ++ register "config0" = "0xa6" ++ register "config1" = "0x0d" ++ register "config2" = "0xa8" ++ register "config3" = "0xc4" ++ register "has_keyboard_backlight" = "1" ++ register "event2_enable" = "0xff" ++ register "event3_enable" = "0xff" ++ register "event4_enable" = "0xd0" ++ register "event5_enable" = "0x3c" ++ register "event7_enable" = "0x01" ++ register "event8_enable" = "0x7b" ++ register "event9_enable" = "0xff" ++ register "eventc_enable" = "0xff" ++ register "eventd_enable" = "0xff" ++ register "evente_enable" = "0x9d" ++ device pnp ff.2 on # dummy ++ io 0x60 = 0x62 ++ io 0x62 = 0x66 ++ io 0x64 = 0x1600 ++ io 0x66 = 0x1604 ++ end ++ end ++ ++ chip drivers/pc80/tpm ++ device pnp 0c31.0 on end ++ end ++ end ++ device ref hda on end ++ end ++end +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl +new file mode 100644 +index 0000000000..aa4d4de2a6 +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl +@@ -0,0 +1,33 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#include <acpi/acpi.h> ++DefinitionBlock( ++ "dsdt.aml", ++ "DSDT", ++ ACPI_DSDT_REV_2, ++ OEM_ID, ++ ACPI_TABLE_CREATOR, ++ 0x20110725 ++) ++{ ++ #include <acpi/dsdt_top.asl> ++ #include <soc/intel/common/block/acpi/acpi/globalnvs.asl> ++ #include <cpu/intel/common/acpi/cpu.asl> ++ ++ Device (\_SB.PCI0) ++ { ++ #include <soc/intel/skylake/acpi/systemagent.asl> ++ #include <soc/intel/skylake/acpi/pch.asl> ++ #include <drivers/intel/gma/acpi/default_brightness_levels.asl> ++ } ++ ++ Scope (\_SB.PCI0.RP01) ++ { ++ Device (PEGP) ++ { ++ Name (_ADR, Zero) ++ } ++ } ++ ++ #include <southbridge/intel/common/acpi/sleepstates.asl> ++} +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ec.c b/src/mainboard/lenovo/sklkbl_thinkpad/ec.c +new file mode 100644 +index 0000000000..adb6a60324 +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/ec.c +@@ -0,0 +1,153 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#include <arch/io.h> ++#include "ec.h" ++ ++#define MICROCHIP_CONFIGURATION_ENTRY_KEY 0x55 ++#define MICROCHIP_CONFIGURATION_EXIT_KEY 0xaa ++ ++void microchip_pnp_enter_conf_state(uint16_t port) ++{ ++ outb(MICROCHIP_CONFIGURATION_ENTRY_KEY, port); ++} ++ ++void microchip_pnp_exit_conf_state(uint16_t port) ++{ ++ outb(MICROCHIP_CONFIGURATION_EXIT_KEY, port); ++} ++ ++uint8_t pnp_read(uint16_t port, uint8_t index) ++{ ++ outb(index, port); ++ return inb(port + 1); ++} ++ ++uint32_t pnp_read_le32(uint16_t port, uint8_t index) ++{ ++ return (uint32_t) pnp_read(port, index) | ++ (uint32_t) pnp_read(port, index + 1) << 8 | ++ (uint32_t) pnp_read(port, index + 2) << 16 | ++ (uint32_t) pnp_read(port, index + 3) << 24; ++} ++ ++void pnp_write(uint16_t port, uint8_t index, uint8_t value) ++{ ++ outb(index, port); ++ outb(value, port + 1); ++} ++ ++void pnp_write_le32(uint16_t port, uint8_t index, uint32_t value) ++{ ++ pnp_write(port, index, value & 0xff); ++ pnp_write(port, index + 1, value >> 8 & 0xff); ++ pnp_write(port, index + 2, value >> 16 & 0xff); ++ pnp_write(port, index + 3, value >> 24 & 0xff); ++} ++ ++static void ecN_clear_out_queue(uint16_t cmd_port, uint16_t data_port) ++{ ++ while (inb(cmd_port) & EC_OBF) ++ inb(data_port); ++} ++ ++static void ecN_wait_to_send(uint16_t cmd_port, uint16_t data_port) ++{ ++ while (inb(cmd_port) & EC_IBF) ++ ; ++} ++ ++static void ecN_wait_to_recv(uint16_t cmd_port, uint16_t data_port) ++{ ++ while (!(inb(cmd_port) & EC_OBF)) ++ ; ++} ++ ++uint8_t ecN_read(uint16_t cmd_port, uint16_t data_port, uint8_t addr) ++{ ++ ecN_clear_out_queue(cmd_port, data_port); ++ ecN_wait_to_send(cmd_port, data_port); ++ outb(EC_READ, cmd_port); ++ ecN_wait_to_send(cmd_port, data_port); ++ outb(addr, data_port); ++ ecN_wait_to_recv(cmd_port, data_port); ++ return inb(data_port); ++} ++ ++void ecN_write(uint16_t cmd_port, uint16_t data_port, uint8_t addr, uint8_t val) ++{ ++ ecN_clear_out_queue(cmd_port, data_port); ++ ecN_wait_to_send(cmd_port, data_port); ++ outb(EC_WRITE, cmd_port); ++ ecN_wait_to_send(cmd_port, data_port); ++ outb(addr, data_port); ++ ecN_wait_to_send(cmd_port, data_port); ++ outb(val, data_port); ++} ++ ++uint8_t eeprom_read(uint16_t addr) ++{ ++ ecN_clear_out_queue(EC2_CMD, EC2_DATA); ++ ecN_wait_to_send(EC2_CMD, EC2_DATA); ++ outl(1, EC2_CMD); ++ ecN_wait_to_send(EC2_CMD, EC2_DATA); ++ outl(addr, EC2_DATA); ++ ecN_wait_to_recv(EC2_CMD, EC2_DATA); ++ return inl(EC2_DATA); ++} ++ ++void eeprom_write(uint16_t addr, uint8_t val) ++{ ++ ecN_clear_out_queue(EC2_CMD, EC2_DATA); ++ ecN_wait_to_send(EC2_CMD, EC2_DATA); ++ outl(2, EC2_CMD); ++ ecN_wait_to_send(EC2_CMD, EC2_DATA); ++ outl((uint32_t) addr | (uint32_t) val << 16, EC2_DATA); ++ ecN_wait_to_recv(EC2_CMD, EC2_DATA); ++ inl(EC2_DATA); ++} ++ ++uint16_t debug_loaded_keys(void) ++{ ++ return (uint16_t) ec0_read(0x87) << 8 | (uint16_t) ec0_read(0x86); ++} ++ ++static void debug_cmd(uint8_t cmd) ++{ ++ ec0_write(EC_DEBUG_CMD, cmd); ++ while (ec0_read(EC_DEBUG_CMD) & 0x80) ++ ; ++} ++ ++void debug_read_key(uint8_t i, uint8_t *key) ++{ ++ debug_cmd(0x80 | (i & 0xf)); ++ for (int j = 0; j < 8; ++j) ++ key[j] = ec0_read(0x3e + j); ++} ++ ++void debug_write_key(uint8_t i, const uint8_t *key) ++{ ++ for (int j = 0; j < 8; ++j) ++ ec0_write(0x3e + j, key[j]); ++ debug_cmd(0xc0 | (i & 0xf)); ++} ++ ++uint32_t debug_read_dword(uint32_t addr) ++{ ++ ecN_clear_out_queue(EC3_CMD, EC3_DATA); ++ ecN_wait_to_send(EC3_CMD, EC3_DATA); ++ outl(addr << 8 | 0xE2, EC3_DATA); ++ ecN_wait_to_recv(EC3_CMD, EC3_DATA); ++ return inl(EC3_DATA); ++} ++ ++void debug_write_dword(uint32_t addr, uint32_t val) ++{ ++ ecN_clear_out_queue(EC3_CMD, EC3_DATA); ++ ecN_wait_to_send(EC3_CMD, EC3_DATA); ++ outl(addr << 8 | 0xEA, EC3_DATA); ++ ecN_wait_to_send(EC3_CMD, EC3_DATA); ++ outl(val, EC3_DATA); ++} ++ ++const uint8_t debug_rw_key[8] = { 0x7a, 0x41, 0xb1, 0x49, 0xfe, 0x21, 0x01, 0xcf }; +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ec.h b/src/mainboard/lenovo/sklkbl_thinkpad/ec.h +new file mode 100644 +index 0000000000..d2963c8962 +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/ec.h +@@ -0,0 +1,99 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#ifndef SKLKBL_THINKPAD_EC_H ++#define SKLKBL_THINKPAD_EC_H ++ ++// EC configuration base address ++#define EC_CFG_PORT 0x4e ++ ++// Chip global registers ++#define PNP_LDN_SELECT 0x07 ++# define LDN_UART 0x07 ++# define LDN_LPCIF 0x0c ++#define EC_DEVICE_ID 0x20 ++#define EC_DEVICE_REV 0x21 ++ ++// LPC I/F registers ++#define LPCIF_SIRQ(i) (0x40 + (i)) ++ ++#define LPCIF_BAR_CFG 0x60 ++#define LPCIF_BAR_MAILBOX 0x64 ++#define LPCIF_BAR_8042 0x68 ++#define LPCIF_BAR_ACPI_EC0 0x6c ++#define LPCIF_BAR_ACPI_EC1 0x70 ++#define LPCIF_BAR_ACPI_EC2 0x74 ++#define LPCIF_BAR_ACPI_EC3 0x78 ++#define LPCIF_BAR_ACPI_PM0 0x7c ++#define LPCIF_BAR_UART 0x80 ++#define LPCIF_BAR_FAST_KYBD 0x84 ++#define LPCIF_BAR_EMBED_FLASH 0x88 ++#define LPCIF_BAR_GP_SPI 0x8c ++#define LPCIF_BAR_EMI 0x90 ++#define LPCIF_BAR_PMH7 0x94 ++#define LPCIF_BAR_PORT80_DBG0 0x98 ++#define LPCIF_BAR_PORT80_DBG1 0x9c ++#define LPCIF_BAR_RTC 0xa0 ++ ++// UART registers ++#define UART_ACTIVATE 0x30 ++#define UART_CONFIG_SELECT 0xf0 ++ ++void microchip_pnp_enter_conf_state(uint16_t port); ++void microchip_pnp_exit_conf_state(uint16_t port); ++uint8_t pnp_read(uint16_t port, uint8_t index); ++uint32_t pnp_read_le32(uint16_t port, uint8_t index); ++void pnp_write(uint16_t port, uint8_t index, uint8_t value); ++void pnp_write_le32(uint16_t port, uint8_t index, uint32_t value); ++ ++#define EC0_CMD 0x0066 ++#define EC0_DATA 0x0062 ++#define EC1_CMD 0x1604 ++#define EC1_DATA 0x1600 ++#define EC2_CMD 0x1634 ++#define EC2_DATA 0x1630 ++#define EC3_CMD 0x161c ++#define EC3_DATA 0x1618 ++ ++#define EC_OBF (1 << 0) ++#define EC_IBF (1 << 1) ++ ++#define EC_READ 0x80 ++#define EC_WRITE 0x81 ++ ++uint8_t ecN_read(uint16_t cmd_port, uint16_t data_port, uint8_t addr); ++ ++void ecN_write(uint16_t cmd_port, uint16_t data_port, uint8_t addr, uint8_t val); ++ ++// EC0 and EC1 mostly are useful with the READ/WRITE commands ++#define ec0_read(addr) ecN_read(EC0_CMD, EC0_DATA, addr) ++#define ec0_write(addr, val) ecN_write(EC0_CMD, EC0_DATA, addr, val) ++#define ec1_read(addr) ecN_read(EC1_CMD, EC1_DATA, addr) ++#define ec1_write(addr, val) ecN_write(EC1_CMD, EC1_DATA, addr, val) ++ ++// Read from the emulated EEPROM ++uint8_t eeprom_read(uint16_t addr); ++ ++// Write to the emulated EEPROM ++void eeprom_write(uint16_t addr, uint8_t val); ++ ++// Read loaded debug key mask ++uint16_t debug_loaded_keys(void); ++ ++// The following location (via either EC0 or EC1) can be used to interact with the debug interface ++#define EC_DEBUG_CMD 0x3d ++ ++void debug_read_key(uint8_t i, uint8_t *key); ++ ++void debug_write_key(uint8_t i, const uint8_t *key); ++ ++uint32_t debug_read_dword(uint32_t addr); ++ ++void debug_write_dword(uint32_t addr, uint32_t val); ++ ++// RW unlock key index ++#define DEBUG_RW_KEY_IDX 1 ++ ++// RW unlock key for EC version N24HT37W ++extern const uint8_t debug_rw_key[8]; ++ ++#endif +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/gpio.h b/src/mainboard/lenovo/sklkbl_thinkpad/gpio.h +new file mode 100644 +index 0000000000..d89ed712d4 +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/gpio.h +@@ -0,0 +1,8 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#ifndef GPIO_H ++#define GPIO_H ++ ++void variant_config_gpios(void); ++ ++#endif +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c +new file mode 100644 +index 0000000000..44c8578852 +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c +@@ -0,0 +1,105 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#include <arch/io.h> ++#include <device/device.h> ++#include <drivers/intel/gma/int15.h> ++#include <option.h> ++#include <soc/ramstage.h> ++#include "ec.h" ++#include "gpio.h" ++ ++#define GPIO_GPU_RST GPP_E22 // active low ++#define GPIO_1R8VIDEO_AON_ON GPP_E23 ++ ++#define GPIO_DGFX_PWRGD GPP_F3 ++ ++#define GPIO_DISCRETE_PRESENCE GPP_D9 // active low ++#define GPIO_DGFX_VRAM_ID0 GPP_D11 ++#define GPIO_DGFX_VRAM_ID1 GPP_D12 ++ ++void mainboard_silicon_init_params(FSP_SIL_UPD *params) ++{ ++ static const char * const dgfx_vram_id_str[] = { "1GB", "2GB", "4GB", "N/A" }; ++ ++ int dgfx_vram_id; ++ ++ // Setup GPIOs ++ variant_config_gpios(); ++ ++ // Detect and enable dGPU ++ if (gpio_get(GPIO_DISCRETE_PRESENCE) == 0) { // active low ++ dgfx_vram_id = gpio_get(GPIO_DGFX_VRAM_ID0) | gpio_get(GPIO_DGFX_VRAM_ID1) << 1; ++ printk(BIOS_DEBUG, "Discrete GPU present with %s VRAM\n", dgfx_vram_id_str[dgfx_vram_id]); ++ ++ // NOTE: i pulled this GPU enable sequence from thin air ++ // it sometimes works but is buggy and the GPU disappears in some cases so disabling it by default. ++ // also unrelated to this enable sequence the nouveau driver only works on 6.8-6.9 kernels ++ if (get_uint_option("dgpu_enable", 0)) { ++ printk(BIOS_DEBUG, "Enabling discrete GPU\n"); ++ gpio_set(GPIO_1R8VIDEO_AON_ON, 1); // Enable GPU power rail ++ while (!gpio_get(GPIO_DGFX_PWRGD)) // Wait for power good signal from GPU ++ ; ++ gpio_set(GPIO_GPU_RST, 1); // Release GPU from reset ++ } else { ++ printk(BIOS_DEBUG, "Discrete GPU will remain disabled\n"); ++ } ++ ++ } else { ++ printk(BIOS_DEBUG, "Discrete GPU not present\n"); ++ } ++} ++ ++static void dump_ec_cfg(uint16_t port) ++{ ++ microchip_pnp_enter_conf_state(port); ++ ++ // Device info ++ printk(BIOS_DEBUG, "Device id %02x\n", pnp_read(port, EC_DEVICE_ID)); ++ printk(BIOS_DEBUG, "Device rev %02x\n", pnp_read(port, EC_DEVICE_REV)); ++ ++ // Switch to LPCIF LDN ++ pnp_write(port, PNP_LDN_SELECT, LDN_LPCIF); ++ ++ // Dump SIRQs ++ for (int i = 0; i <= 15; i += 1) ++ printk(BIOS_DEBUG, "SIRQ%d = %02x\n", i, pnp_read(port, LPCIF_SIRQ(i))); ++ ++ // Dump BARs ++ printk(BIOS_DEBUG, "BAR CFG = %08x\n", pnp_read_le32(port, LPCIF_BAR_CFG)); ++ printk(BIOS_DEBUG, "BAR MAILBOX = %08x\n", pnp_read_le32(port, LPCIF_BAR_MAILBOX)); ++ printk(BIOS_DEBUG, "BAR 8042 = %08x\n", pnp_read_le32(port, LPCIF_BAR_8042)); ++ printk(BIOS_DEBUG, "BAR ACPI_EC0 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_EC0)); ++ printk(BIOS_DEBUG, "BAR ACPI_EC1 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_EC1)); ++ printk(BIOS_DEBUG, "BAR ACPI_EC2 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_EC2)); ++ printk(BIOS_DEBUG, "BAR ACPI_EC3 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_EC3)); ++ printk(BIOS_DEBUG, "BAR ACPI_PM0 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_PM0)); ++ printk(BIOS_DEBUG, "BAR UART = %08x\n", pnp_read_le32(port, LPCIF_BAR_UART)); ++ printk(BIOS_DEBUG, "BAR FAST_KYBD = %08x\n", pnp_read_le32(port, LPCIF_BAR_FAST_KYBD)); ++ printk(BIOS_DEBUG, "BAR EMBED_FLASH = %08x\n", pnp_read_le32(port, LPCIF_BAR_EMBED_FLASH)); ++ printk(BIOS_DEBUG, "BAR GP_SPI = %08x\n", pnp_read_le32(port, LPCIF_BAR_GP_SPI)); ++ printk(BIOS_DEBUG, "BAR EMI = %08x\n", pnp_read_le32(port, LPCIF_BAR_EMI)); ++ printk(BIOS_DEBUG, "BAR PMH7 = %08x\n", pnp_read_le32(port, LPCIF_BAR_PMH7)); ++ printk(BIOS_DEBUG, "BAR PORT80_DBG0 = %08x\n", pnp_read_le32(port, LPCIF_BAR_PORT80_DBG0)); ++ printk(BIOS_DEBUG, "BAR PORT80_DBG1 = %08x\n", pnp_read_le32(port, LPCIF_BAR_PORT80_DBG1)); ++ printk(BIOS_DEBUG, "BAR RTC = %08x\n", pnp_read_le32(port, LPCIF_BAR_RTC)); ++ ++ microchip_pnp_exit_conf_state(port); ++} ++ ++static void mainboard_enable(struct device *dev) ++{ ++ if (CONFIG(VGA_ROM_RUN)) ++ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, ++ GMA_INT15_PANEL_FIT_DEFAULT, ++ GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); ++} ++ ++static void mainboard_init(void *chip_info) ++{ ++ dump_ec_cfg(EC_CFG_PORT); ++} ++ ++struct chip_operations mainboard_ops = { ++ .enable_dev = mainboard_enable, ++ .init = mainboard_init, ++}; +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt +new file mode 100644 +index 0000000000000000000000000000000000000000..4db4202961d0be67b75f52b28f2111d5655595c3 +GIT binary patch +literal 4106 +zcmeHJU2GIp6h5=FKeKmc=rAo()>4l^U|XP_ZDGYy!|YE>mu}hZ4|PdQy1<TF-O}0? +zDF)LeX(GlTYoZ2xkUp4bc(Fbi;|s>bV0gipVB&+pHzmFpc`=IXxii}qiqH*)7}PU+ +z?woV)x!<09?wNbfhQa6n_IK}3M!Gw&OgS)sY2Q$LJ4F+z{-JneATkt9refXr6+8sr +zR{e1eASVcGl#mf_O&p%I^1;3af=xDeN0ZnydT=;zHOH-q=O;(UFda)^<j^52Z;c<A +zv~t)#xI2OzS7p&7!}%QUJu-688gD}mM%EbG*3`NU(Fiq%!p$v4=y8%;+qQ?>LXW8| +z-Vsanq!Y==Kq9plQ+*gu^hf&pJ9?tY{h01cbtR&SfsVM!_*!D4W5>papLuo?gRur| +zF$`lX;f2t48Dpd4V@(*z=dq95OkkfiVU53N<(gE+=U)KHEdU4}@R=aMjTTTOcb8-a +zC9IXSxZB*|#u~SlHnpsY25L#Sxy6ljl16gI)H0f>for?qaszCX;ESpG=pqROFWR~Z +zTqQzcH(berra`9K(R~0OJ_eeA<Ovbd&vdN3&y}qtJ`q3y6wpP2V}*{Dbi8b357>=> +z&R-)LYP^U3@%6h}+0)7m-mEOhOM92<j^WbYrTU_kNXz~GCDNT`I|IC3AsFzURKM6k +zQdYbOof5*Zq``6G)5LxcgKFZn#G8mi#5;*Qh*QM-i4PHv5FaHzLHru=Tg2yx{aFHb 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+HcmV?d00001 + +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads +new file mode 100644 +index 0000000000..fcfbd75a92 +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads +@@ -0,0 +1,19 @@ ++-- SPDX-License-Identifier: GPL-2.0-or-later ++ ++with HW.GFX.GMA; ++with HW.GFX.GMA.Display_Probing; ++ ++use HW.GFX.GMA; ++use HW.GFX.GMA.Display_Probing; ++ ++private package GMA.Mainboard is ++ ++ ports : constant Port_List := ++ (eDP, ++ DP1, ++ DP2, ++ HDMI1, ++ HDMI2, ++ others => Disabled); ++ ++end GMA.Mainboard; +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c +new file mode 100644 +index 0000000000..f7c29e1f39 +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c +@@ -0,0 +1,203 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#include <soc/gpio.h> ++#include "../../gpio.h" ++ ++/* FIXME: There are multiple GPIOs here that should be locked to prevent "TPM GPIO fail" style ++ * attacks. Unfortunately SKL/KBL GPIO locking *does not* work currently. */ ++ ++static const struct pad_config gpio_table[] = { ++ ++ /* ------- GPIO Community 0 ------- */ ++ ++ /* ------- GPIO Group GPP_A ------- */ ++ PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1), /* -KBRC */ ++ PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1), /* LPC_AD0 */ ++ PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1), /* LPC_AD1 */ ++ PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1), /* LPC_AD2 */ ++ PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1), /* LPC_AD3 */ ++ PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1), /* -LPC_FRAME */ ++ PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1), /* IRQSER */ ++ PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1), /* -TPM_IRQ */ ++ PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1), /* -CLKRUN */ ++ PAD_CFG_NF(GPP_A9, NATIVE, DEEP, NF1), /* LPCCLK_EC_24M */ ++ PAD_CFG_NF(GPP_A10, NATIVE, DEEP, NF1), /* LPCCLK_DEBUG_24M */ ++ PAD_NC(GPP_A11, NONE), ++ PAD_NC(GPP_A12, NONE), ++ PAD_CFG_NF(GPP_A13, NATIVE, DEEP, NF1), /* -SUSWARN */ ++ PAD_CFG_NF(GPP_A14, NATIVE, DEEP, NF1), /* -SUS_STAT */ ++ PAD_CFG_NF(GPP_A15, NATIVE, DEEP, NF1), /* -SUSWARN */ ++ PAD_NC(GPP_A16, NONE), ++ PAD_NC(GPP_A17, NONE), ++ PAD_NC(GPP_A18, NONE), ++ PAD_NC(GPP_A19, NONE), ++ PAD_NC(GPP_A20, NONE), ++ PAD_NC(GPP_A21, NONE), ++ PAD_NC(GPP_A22, NONE), ++ PAD_NC(GPP_A23, NONE), ++ ++ /* ------- GPIO Group GPP_B ------- */ ++ PAD_NC(GPP_B0, NONE), ++ PAD_NC(GPP_B1, NONE), ++ PAD_NC(GPP_B2, NONE), ++ PAD_NC(GPP_B3, NONE), ++ PAD_CFG_GPI_SCI(GPP_B4, NONE, DEEP, EDGE_SINGLE, INVERT), /* -TBT_PLUG_EVENT */ ++ PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1), /* -CLKREQ_PCIE0 */ ++ PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1), /* -CLKREQ_PCIE4 */ ++ PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), /* -CLKREQ_PCIE5 */ ++ PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1), /* -CLKREQ_PCIE6 */ ++ PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1), /* -CLKREQ_PCIE8 */ ++ PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1), /* -CLKREQ_PCIE10 */ ++ PAD_NC(GPP_B11, NONE), ++ PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), /* -PCH_SLP_S0 */ ++ PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), /* -PLTRST */ ++ PAD_CFG_NF(GPP_B14, NATIVE, DEEP, NF1), /* PCH_SPKR */ ++ PAD_CFG_GPO(GPP_B15, 1, DEEP), /* NFC_DLREQ */ ++ PAD_NC(GPP_B16, NONE), ++ PAD_NC(GPP_B17, NONE), ++ PAD_NC(GPP_B18, NONE), ++ PAD_NC(GPP_B19, NONE), ++ PAD_NC(GPP_B20, NONE), ++ PAD_NC(GPP_B21, NONE), ++ PAD_NC(GPP_B22, NONE), ++ PAD_NC(GPP_B23, NONE), ++ ++ /* ------- GPIO Community 1 ------- */ ++ ++ /* ------- GPIO Group GPP_C ------- */ ++ PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), /* SMB_CLK */ ++ PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), /* SMB_DATA */ ++ PAD_NC(GPP_C2, NONE), ++ PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), /* SML0_CLK */ ++ PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), /* SML0_DATA */ ++ PAD_NC(GPP_C5, NONE), ++ PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* EC_SCL2 */ ++ PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* EC_SDA2 */ ++ PAD_NC(GPP_C8, NONE), ++ PAD_NC(GPP_C9, NONE), ++ PAD_NC(GPP_C10, NONE), ++ PAD_NC(GPP_C11, NONE), ++ PAD_NC(GPP_C12, NONE), ++ PAD_NC(GPP_C13, NONE), ++ PAD_NC(GPP_C14, NONE), ++ PAD_NC(GPP_C15, NONE), ++ PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), /* I2C0_DATA */ ++ PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), /* I2C0_CLK */ ++ PAD_NC(GPP_C18, NONE), ++ PAD_NC(GPP_C19, NONE), ++ PAD_CFG_GPO(GPP_C20, 0, DEEP), /* EPRIVACY_ON */ ++ PAD_CFG_GPO(GPP_C21, 0, DEEP), /* TBT_FORCE_PWR */ ++ PAD_CFG_GPI_SCI(GPP_C22, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_SCI */ ++ PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_WAKE */ ++ ++ /* ------- GPIO Group GPP_D ------- */ ++ PAD_NC(GPP_D0, NONE), ++ PAD_NC(GPP_D1, NONE), ++ PAD_NC(GPP_D2, NONE), ++ PAD_NC(GPP_D3, NONE), ++ PAD_NC(GPP_D4, NONE), ++ PAD_NC(GPP_D5, NONE), ++ PAD_NC(GPP_D6, NONE), ++ PAD_NC(GPP_D7, NONE), ++ PAD_NC(GPP_D8, NONE), ++ PAD_CFG_GPI_TRIG_OWN(GPP_D9, UP_20K, DEEP, OFF, ACPI), /* -DISCRETE_PRESENCE */ ++ PAD_NC(GPP_D10, NONE), ++ PAD_CFG_GPI_TRIG_OWN(GPP_D11, UP_20K, DEEP, OFF, ACPI), /* DGFX_VRAM_ID0 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_D12, UP_20K, DEEP, OFF, ACPI), /* DGFX_VRAM_ID1 */ ++ PAD_NC(GPP_D13, NONE), ++ PAD_NC(GPP_D14, NONE), ++ PAD_NC(GPP_D15, NONE), ++ PAD_NC(GPP_D16, NONE), ++ PAD_CFG_GPO(GPP_D17, 0, DEEP), /* DDI_PRIORITY1 */ ++ PAD_NC(GPP_D18, NONE), ++ PAD_NC(GPP_D19, NONE), ++ PAD_NC(GPP_D20, NONE), ++ PAD_NC(GPP_D21, NONE), ++ PAD_CFG_GPI_TRIG_OWN(GPP_D22, UP_20K, DEEP, OFF, ACPI), /* -NFC_DTCT */ ++ PAD_NC(GPP_D23, NONE), ++ ++ /* ------- GPIO Group GPP_E ------- */ ++ PAD_NC(GPP_E0, NONE), ++ PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1), /* -WWAN_SATA_DTCT (always HIGH) */ ++ PAD_CFG_NF(GPP_E2, NONE, DEEP, NF1), /* -PE_DTCT */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_E3, NONE, DEEP, EDGE_SINGLE, ACPI), /* -TBT_PLUG_EVENT */ ++ PAD_CFG_GPO(GPP_E4, 1, DEEP), /* NFC_ON */ ++ PAD_NC(GPP_E5, NONE), ++ PAD_CFG_NF(GPP_E6, NONE, RSMRST, NF1), /* SATA2_DEVSLP */ ++ PAD_NC(GPP_E7, NONE), ++ PAD_NC(GPP_E8, NONE), ++ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), /* -USB_PORT0_OC0 (AON port) */ ++ PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1), /* -USB_PORT1_OC1 (regular port) */ ++ PAD_NC(GPP_E11, NONE), ++ PAD_CFG_GPI_APIC_HIGH(GPP_E12, NONE, DEEP), /* NFC_INT */ ++ PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1), /* DDIP1_HPD */ ++ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), /* DDIP2_HPD */ ++ PAD_NC(GPP_E15, NONE), ++ PAD_NC(GPP_E16, NONE), ++ PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1), /* EDP_HPD */ ++ PAD_NC(GPP_E18, NONE), ++ PAD_NC(GPP_E19, NONE), ++ PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1), /* DDIP2_CTRLCLK */ ++ PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1), /* DDIP2_CTRLDATA */ ++ PAD_CFG_TERM_GPO(GPP_E22, 0, UP_20K, RSMRST), /* -GPU_RST */ ++ PAD_CFG_TERM_GPO(GPP_E23, 0, UP_20K, RSMRST), /* 1R8VIDEO_AON_ON */ ++ ++ /* ------- GPIO Community 2 ------- */ ++ ++ /* -------- GPIO Group GPD -------- */ ++ PAD_CFG_NF(GPD0, NONE, PWROK, NF1), /* -BATLOW */ ++ PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1), /* AC_PRESENT */ ++ PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1), /* -LANWAKE */ ++ PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1), /* -PWRSW_EC */ ++ PAD_CFG_NF(GPD4, NONE, PWROK, NF1), /* -PCH_SLP_S3 */ ++ PAD_CFG_NF(GPD5, NONE, PWROK, NF1), /* -PCH_SLP_S4 */ ++ PAD_CFG_NF(GPD6, NONE, PWROK, NF1), /* -PCH_SLP_M */ ++ PAD_NC(GPD7, NONE), ++ PAD_CFG_NF(GPD8, NONE, PWROK, NF1), /* SUSCLK_32K */ ++ PAD_CFG_NF(GPD9, NONE, PWROK, NF1), /* -PCH_SLP_WLAN */ ++ PAD_CFG_NF(GPD10, NONE, PWROK, NF1), /* -PCH_SLP_S5 */ ++ PAD_CFG_NF(GPD11, NONE, PWROK, NF1), /* LANPHYPC */ ++ ++ /* ------- GPIO Community 3 ------- */ ++ ++ /* ------- GPIO Group GPP_F ------- */ ++ PAD_NC(GPP_F0, NONE), ++ PAD_CFG_GPI_TRIG_OWN(GPP_F1, NONE, DEEP, OFF, ACPI), /* GC6_FB_EN */ ++ PAD_CFG_GPO(GPP_F2, 1, DEEP), /* -GPU_EVENT */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F3, NONE, DEEP, OFF, ACPI), /* DGFX_PWRGD */ ++ PAD_CFG_GPO(GPP_F4, 1, DEEP), /* -WWAN_RESET */ ++ PAD_NC(GPP_F5, NONE), ++ PAD_CFG_GPI_TRIG_OWN(GPP_F6, UP_20K, DEEP, OFF, ACPI), /* -MIC_HW_EN (R961 to GND) */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F7, UP_20K, DEEP, OFF, ACPI), /* -INT_MIC_DTCT */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F8, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG0 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F9, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG1 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F10, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG2 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F11, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG3 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F12, UP_20K, DEEP, OFF, ACPI), /* PLANARID0 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F13, UP_20K, DEEP, OFF, ACPI), /* PLANARID1 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F14, UP_20K, DEEP, OFF, ACPI), /* PLANARID2 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F15, UP_20K, DEEP, OFF, ACPI), /* PLANARID3 */ ++ PAD_NC(GPP_F16, NONE), ++ PAD_NC(GPP_F17, NONE), ++ PAD_NC(GPP_F18, NONE), ++ PAD_NC(GPP_F19, NONE), ++ PAD_NC(GPP_F20, NONE), ++ PAD_NC(GPP_F21, NONE), ++ PAD_CFG_GPI_TRIG_OWN(GPP_F22, UP_20K, DEEP, OFF, ACPI), /* -INTRUDER_PCH */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F23, UP_20K, DEEP, OFF, ACPI), /* -SC_DTCT */ ++ ++ /* ------- GPIO Group GPP_G ------- */ ++ PAD_NC(GPP_G0, NONE), ++ PAD_NC(GPP_G1, NONE), ++ PAD_NC(GPP_G2, NONE), ++ PAD_NC(GPP_G3, NONE), ++ PAD_CFG_GPO(GPP_G4, 0, DEEP), /* TBT_RTD3_PWR_EN */ ++ PAD_CFG_GPO(GPP_G5, 0, DEEP), /* TBT_FORCE_USB_PWR */ ++ PAD_CFG_GPO(GPP_G6, 0, DEEP), /* -TBT_PERST */ ++ PAD_CFG_GPI_SCI(GPP_G7, NONE, DEEP, LEVEL, INVERT), /* -TBT_PCIE_WAKE */ ++}; ++ ++void variant_config_gpios(void) ++{ ++ gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); ++} +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c +new file mode 100644 +index 0000000000..3a951ce0da +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c +@@ -0,0 +1,90 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#include <device/azalia_device.h> ++ ++const u32 cim_verb_data[] = { ++ 0x10ec0257, // Vendor/Device ID: Realtek ALC257 ++ 0x17aa225d, // Subsystem ID ++ 11, ++ AZALIA_SUBVENDOR(0, 0x17aa225d), ++ ++ AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_DESC( ++ AZALIA_INTEGRATED, ++ AZALIA_INTERNAL, ++ AZALIA_MIC_IN, ++ AZALIA_OTHER_DIGITAL, ++ AZALIA_COLOR_UNKNOWN, ++ AZALIA_NO_JACK_PRESENCE_DETECT, ++ 2, 0 ++ )), ++ AZALIA_PIN_CFG(0, 0x13, 0x40000000), // does not describe a jack or internal device ++ AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_DESC( ++ AZALIA_INTEGRATED, ++ AZALIA_INTERNAL, ++ AZALIA_SPEAKER, ++ AZALIA_OTHER_ANALOG, ++ AZALIA_COLOR_UNKNOWN, ++ AZALIA_NO_JACK_PRESENCE_DETECT, ++ 1, 0 ++ )), ++ AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)), ++ AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_DESC( ++ AZALIA_JACK, ++ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, ++ AZALIA_MIC_IN, ++ AZALIA_STEREO_MONO_1_8, ++ AZALIA_BLACK, ++ AZALIA_JACK_PRESENCE_DETECT, ++ 3, 0 ++ )), ++ AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)), ++ AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)), ++ AZALIA_PIN_CFG(0, 0x1d, 0x40661b45), // does not describe a jack or internal device ++ AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)), ++ AZALIA_PIN_CFG(0, 0x21, AZALIA_PIN_DESC( ++ AZALIA_JACK, ++ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, ++ AZALIA_HP_OUT, ++ AZALIA_STEREO_MONO_1_8, ++ AZALIA_BLACK, ++ AZALIA_JACK_PRESENCE_DETECT, ++ 1, 15 ++ )), ++ ++ 0x8086280b, // Vendor/Device ID: Intel Kabylake HDMI ++ 0x80860101, // Subsystem ID ++ 4, ++ AZALIA_SUBVENDOR(2, 0x80860101), ++ ++ AZALIA_PIN_CFG(2, 0x05, AZALIA_PIN_DESC( ++ AZALIA_JACK, ++ AZALIA_DIGITAL_DISPLAY, ++ AZALIA_DIGITAL_OTHER_OUT, ++ AZALIA_OTHER_DIGITAL, ++ AZALIA_COLOR_UNKNOWN, ++ AZALIA_JACK_PRESENCE_DETECT, ++ 1, 0 ++ )), ++ AZALIA_PIN_CFG(2, 0x06, AZALIA_PIN_DESC( ++ AZALIA_JACK, ++ AZALIA_DIGITAL_DISPLAY, ++ AZALIA_DIGITAL_OTHER_OUT, ++ AZALIA_OTHER_DIGITAL, ++ AZALIA_COLOR_UNKNOWN, ++ AZALIA_JACK_PRESENCE_DETECT, ++ 2, 0 ++ )), ++ AZALIA_PIN_CFG(2, 0x07, AZALIA_PIN_DESC( ++ AZALIA_JACK, ++ AZALIA_DIGITAL_DISPLAY, ++ AZALIA_DIGITAL_OTHER_OUT, ++ AZALIA_OTHER_DIGITAL, ++ AZALIA_COLOR_UNKNOWN, ++ AZALIA_JACK_PRESENCE_DETECT, ++ 3, 0 ++ )), ++}; ++ ++const u32 pc_beep_verbs[] = {}; ++ ++AZALIA_ARRAY_SIZES; +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c +new file mode 100644 +index 0000000000..5252a402f9 +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c +@@ -0,0 +1,20 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#include <soc/romstage.h> ++#include <spd_bin.h> ++ ++void mainboard_memory_init_params(FSPM_UPD *mupd) ++{ ++ FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; ++ mem_cfg->DqPinsInterleaved = true; /* DDR_DQ in interleave mode */ ++ mem_cfg->CaVrefConfig = 2; /* VREF_CA to CH_A and VREF_DQ_B to CH_B */ ++ mem_cfg->MemorySpdDataLen = CONFIG_DIMM_SPD_SIZE; ++ ++ /* Get SPD for memory slots */ ++ struct spd_block blk = { .addr_map = { 0x50, 0x51, } }; ++ get_spd_smbus(&blk); ++ dump_spd_info(&blk); ++ ++ mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0]; ++ mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[1]; ++} +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb +new file mode 100644 +index 0000000000..bf66bd3a69 +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb +@@ -0,0 +1,103 @@ ++# SPDX-License-Identifier: GPL-2.0-only ++ ++chip soc/intel/skylake ++ device domain 0 on ++ device ref south_xhci on ++ register "usb2_ports" = "{ ++ [0] = USB2_PORT_MID(OC1), // USB-A ++ [1] = USB2_PORT_MID(OC0), // USB-A (always on) ++ [2] = USB2_PORT_MID(OC_SKIP), // JSC-1 (smartcard slot) ++ [3] = USB2_PORT_MID(OC_SKIP), // USB-C (charging port) ++ [4] = USB2_PORT_MID(OC_SKIP), // JCAM1 (IR camera) ++ [5] = USB2_PORT_MID(OC_SKIP), // JWWAN1 (M.2 WWAN USB) ++ [6] = USB2_PORT_MID(OC_SKIP), // JWLAN1 (M.2 WLAN USB) ++ [7] = USB2_PORT_MID(OC_SKIP), // JCAM1 (webcam) ++ [8] = USB2_PORT_MID(OC_SKIP), // JFPR1 (fingerprint reader) ++ [9] = USB2_PORT_MID(OC_SKIP), // JLCD1 (touch panel) ++ }" ++ register "usb3_ports" = "{ ++ [0] = USB3_PORT_DEFAULT(OC1), // USB-A ++ [1] = USB3_PORT_DEFAULT(OC0), // USB-A (always on) ++ [2] = USB3_PORT_DEFAULT(OC_SKIP), // RTS5344S (SD card reader) ++ [3] = USB3_PORT_DEFAULT(OC_SKIP), // USB-C (charging port) ++ }" ++ end ++ ++ device ref sata on ++ # SATA_2 - JHDD1 SATA SSD ++ register "SataPortsEnable[2]" = "1" ++ register "SataPortsDevSlp[2]" = "1" ++ end ++ ++ # PCIe controller 1 - 1x4 ++ # PCIE 1-4 - RP1 - dGPU - CLKOUT0 - CLKREQ0 ++ # ++ # PCIe controller 2 - 2x1+1x2 (lane reversal) ++ # PCIE 5 - GBE - GBE - CLKOUT1 - CLKREQ1 (clobbers RP8) ++ # PCIE 6 - RP7 - WLAN - CLKOUT2 - CLKREQ2 ++ # PCIE 7-8 - RP5 - WWAN - CLKOUT3 - CLKREQ3 ++ # ++ # PCIe controller 3 - 2x2 ++ # PCIE 9-10 - RP9 - TB3 - CLKOUT4 - CLKREQ4 ++ # PCIE 11-12 - RP11 - SSD - CLKOUT5 - CLKREQ5 ++ ++ # dGPU - x4 ++ device ref pcie_rp1 on ++ register "PcieRpEnable[0]" = "1" ++ register "PcieRpClkReqSupport[0]" = "1" ++ register "PcieRpClkReqNumber[0]" = "0" ++ register "PcieRpClkSrcNumber[0]" = "0" ++ register "PcieRpAdvancedErrorReporting[0]" = "1" ++ register "PcieRpLtrEnable[0]" = "1" ++ end ++ ++ # Ethernet (clobbers RP8) ++ device ref gbe on ++ register "LanClkReqSupported" = "1" ++ register "LanClkReqNumber" = "1" ++ register "EnableLanLtr" = "1" ++ register "EnableLanK1Off" = "1" ++ end ++ ++ # M.2 WLAN - x1 ++ device ref pcie_rp7 on ++ register "PcieRpEnable[6]" = "1" ++ register "PcieRpClkReqSupport[6]" = "1" ++ register "PcieRpClkReqNumber[6]" = "2" ++ register "PcieRpClkSrcNumber[6]" = "2" ++ register "PcieRpAdvancedErrorReporting[6]" = "1" ++ register "PcieRpLtrEnable[6]" = "1" ++ end ++ ++ # M.2 WWAN - x2 ++ device ref pcie_rp5 on ++ register "PcieRpEnable[4]" = "1" ++ register "PcieRpClkReqSupport[4]" = "1" ++ register "PcieRpClkReqNumber[4]" = "3" ++ register "PcieRpClkSrcNumber[4]" = "3" ++ register "PcieRpAdvancedErrorReporting[4]" = "1" ++ register "PcieRpLtrEnable[4]" = "1" ++ end ++ ++ # TB3 (Alpine Ridge LP) - x2 ++ device ref pcie_rp9 on ++ register "PcieRpEnable[8]" = "1" ++ register "PcieRpClkReqSupport[8]" = "1" ++ register "PcieRpClkReqNumber[8]" = "4" ++ register "PcieRpClkSrcNumber[8]" = "4" ++ register "PcieRpAdvancedErrorReporting[8]" = "1" ++ register "PcieRpLtrEnable[8]" = "1" ++ register "PcieRpHotPlug[8]" = "1" ++ end ++ ++ # M.2 2280 caddy - x2 ++ device ref pcie_rp11 on ++ register "PcieRpEnable[10]" = "1" ++ register "PcieRpClkReqSupport[10]" = "1" ++ register "PcieRpClkReqNumber[10]" = "5" ++ register "PcieRpClkSrcNumber[10]" = "5" ++ register "PcieRpAdvancedErrorReporting[10]" = "1" ++ register "PcieRpLtrEnable[10]" = "1" ++ end ++ end ++end +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt +new file mode 100644 +index 0000000000000000000000000000000000000000..47732e37d5b2bad4e674fd10eafa605d26f97840 +GIT binary patch +literal 4106 +zcmeHJUu+a*5TCu>yW9JAmoD2P<t%lC2CfC#y%tU^HSGOq>9tqx`iFWXCLD09R<E?S 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b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads +@@ -0,0 +1,19 @@ ++-- SPDX-License-Identifier: GPL-2.0-or-later ++ ++with HW.GFX.GMA; ++with HW.GFX.GMA.Display_Probing; ++ ++use HW.GFX.GMA; ++use HW.GFX.GMA.Display_Probing; ++ ++private package GMA.Mainboard is ++ ++ ports : constant Port_List := ++ (eDP, ++ DP1, ++ DP2, ++ HDMI1, ++ HDMI2, ++ others => Disabled); ++ ++end GMA.Mainboard; +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c +new file mode 100644 +index 0000000000..a98dd2bc4e +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c +@@ -0,0 +1,199 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#include <soc/gpio.h> ++#include "../../gpio.h" ++ ++static const struct pad_config gpio_table[] = { ++ /* ------- GPIO Community 0 ------- */ ++ ++ /* ------- GPIO Group GPP_A ------- */ ++ PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1), /* -KBRC */ ++ PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1), /* LPC_AD0 */ ++ PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1), /* LPC_AD1 */ ++ PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1), /* LPC_AD2 */ ++ PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1), /* LPC_AD3 */ ++ PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1), /* -LPC_FRAME */ ++ PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1), /* IRQSER */ ++ PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1), /* -TPM_IRQ */ ++ PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1), /* -CLKRUN */ ++ PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1), /* LPCCLK_EC_24M */ ++ PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1), /* LPCCLK_DEBUG_24M */ ++ PAD_NC(GPP_A11, NONE), ++ PAD_NC(GPP_A12, NONE), ++ PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1), /* -SUSWARN */ ++ PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1), /* -SUS_STAT */ ++ PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1), /* -SUSWARN */ ++ PAD_NC(GPP_A16, NONE), ++ PAD_NC(GPP_A17, NONE), ++ PAD_NC(GPP_A18, NONE), ++ PAD_NC(GPP_A19, NONE), ++ PAD_NC(GPP_A20, NONE), ++ PAD_NC(GPP_A21, NONE), ++ PAD_NC(GPP_A22, NONE), ++ PAD_NC(GPP_A23, NONE), ++ ++ /* ------- GPIO Group GPP_B ------- */ ++ PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1), ++ PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1), ++ PAD_NC(GPP_B2, NONE), ++ PAD_NC(GPP_B3, NONE), ++ PAD_CFG_GPI_SCI(GPP_B4, NONE, DEEP, EDGE_SINGLE, INVERT), /* -TBT_PLUG_EVENT */ ++ PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1), /* -CLKREQ_PCIE0 (dGPU) */ ++ PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1), /* -CLKREQ_PCIE3 (WWAN) */ ++ PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), /* -CLKREQ_PCIE4 (GBE) */ ++ PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1), /* -CLKREQ_PCIE5 (WLAN) */ ++ PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1), /* -CLKREQ_PCIE6 (TB3) */ ++ PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1), /* -CLKREQ_PCIE8 (SSD) */ ++ PAD_NC(GPP_B11, NONE), ++ PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), /* -PCH_SLP_S0 */ ++ PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), /* -PLTRST */ ++ PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1), /* PCH_SPKR */ ++ PAD_CFG_GPO(GPP_B15, 0, DEEP), /* NFC_DLREQ */ ++ PAD_NC(GPP_B16, NONE), ++ PAD_NC(GPP_B17, NONE), ++ PAD_NC(GPP_B18, NONE), ++ PAD_NC(GPP_B19, NONE), ++ PAD_NC(GPP_B20, NONE), ++ PAD_NC(GPP_B21, NONE), ++ PAD_NC(GPP_B22, NONE), ++ PAD_NC(GPP_B23, NONE), ++ ++ /* ------- GPIO Community 1 ------- */ ++ ++ /* ------- GPIO Group GPP_C ------- */ ++ PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), /* SMB_CLK */ ++ PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), /* SMB_DATA */ ++ PAD_CFG_GPO(GPP_C2, 1, DEEP), ++ PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), /* SML0_CLK */ ++ PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), /* SML0_DATA */ ++ PAD_NC(GPP_C5, NONE), ++ PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* EC_SCL2 */ ++ PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* EC_SDA2 */ ++ PAD_NC(GPP_C8, NONE), ++ PAD_NC(GPP_C9, NONE), ++ PAD_NC(GPP_C10, NONE), ++ PAD_NC(GPP_C11, NONE), ++ PAD_NC(GPP_C12, NONE), ++ PAD_NC(GPP_C13, NONE), ++ PAD_NC(GPP_C14, NONE), ++ PAD_NC(GPP_C15, NONE), ++ PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), /* I2C0_DATA */ ++ PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), /* I2C0_CLK */ ++ PAD_NC(GPP_C18, NONE), ++ PAD_NC(GPP_C19, NONE), ++ PAD_CFG_GPO(GPP_C20, 0, DEEP), /* EPRIVACY_ON */ ++ PAD_CFG_GPO(GPP_C21, 0, DEEP), /* TBT_FORCE_PWR */ ++ PAD_CFG_GPI_SCI(GPP_C22, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_SCI */ ++ PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_WAKE */ ++ ++ /* ------- GPIO Group GPP_D ------- */ ++ PAD_NC(GPP_D0, NONE), ++ PAD_NC(GPP_D1, NONE), ++ PAD_NC(GPP_D2, NONE), ++ PAD_NC(GPP_D3, NONE), ++ PAD_NC(GPP_D4, NONE), ++ PAD_NC(GPP_D5, NONE), ++ PAD_NC(GPP_D6, NONE), ++ PAD_NC(GPP_D7, NONE), ++ PAD_NC(GPP_D8, NONE), ++ PAD_CFG_GPI_TRIG_OWN(GPP_D9, UP_20K, DEEP, OFF, ACPI), /* -DISCRETE_PRESENCE */ ++ PAD_NC(GPP_D10, NONE), ++ PAD_CFG_GPI_TRIG_OWN(GPP_D11, UP_20K, DEEP, OFF, ACPI), /* DGFX_VRAM_ID0 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_D12, UP_20K, DEEP, OFF, ACPI), /* DGFX_VRAM_ID1 */ ++ PAD_NC(GPP_D13, NONE), ++ PAD_NC(GPP_D14, NONE), ++ PAD_NC(GPP_D15, NONE), ++ PAD_NC(GPP_D16, NONE), ++ PAD_CFG_GPO(GPP_D17, 0, DEEP), /* DDI_PRIORITY */ ++ PAD_NC(GPP_D18, NONE), ++ PAD_NC(GPP_D19, NONE), ++ PAD_NC(GPP_D20, NONE), ++ PAD_NC(GPP_D21, NONE), ++ PAD_CFG_GPI_TRIG_OWN(GPP_D22, UP_20K, DEEP, OFF, ACPI), /* -NFC_DTCT */ ++ PAD_NC(GPP_D23, NONE), ++ ++ /* ------- GPIO Group GPP_E ------- */ ++ PAD_CFG_GPO(GPP_E0, 1, DEEP), /* BDC_ON */ ++ PAD_NC(GPP_E1, NONE), ++ PAD_CFG_NF(GPP_E2, NONE, DEEP, NF1), /* -SATA2_DTCT */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_E3, NONE, DEEP, EDGE_SINGLE, ACPI), /* -TBT_PLUG_EVENT */ ++ PAD_CFG_GPO(GPP_E4, 1, DEEP), /* NFC_ON */ ++ PAD_NC(GPP_E5, NONE), ++ PAD_CFG_NF(GPP_E6, NONE, RSMRST, NF1), /* SATA2_DEVSLP */ ++ PAD_NC(GPP_E7, NONE), ++ PAD_NC(GPP_E8, NONE), ++ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), /* -USB_PORT0_OC0 */ ++ PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1), /* -USB_PORT1_OC1 */ ++ PAD_NC(GPP_E11, NONE), ++ PAD_CFG_GPI_APIC_HIGH(GPP_E12, NONE, DEEP), /* NFC_INT */ ++ PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1), /* DDIP1_HPD */ ++ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), /* DDIP2_HPD */ ++ PAD_NC(GPP_E15, NONE), ++ PAD_NC(GPP_E16, NONE), ++ PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1), /* EDP_HPD */ ++ PAD_NC(GPP_E18, NONE), ++ PAD_CFG_GPO(GPP_E19, 0, DEEP), ++ PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1), /* DDIP2_CTRLCLK */ ++ PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1), /* DDIP2_CTRLDATA */ ++ PAD_CFG_TERM_GPO(GPP_E22, 0, UP_20K, RSMRST), /* -GPU_RST */ ++ PAD_CFG_TERM_GPO(GPP_E23, 0, UP_20K, RSMRST), /* 1R8VIDEO_AON_ON */ ++ ++ /* ------- GPIO Community 2 ------- */ ++ ++ /* -------- GPIO Group GPD -------- */ ++ PAD_CFG_NF(GPD0, NONE, PWROK, NF1), /* -BATLOW */ ++ PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1), /* AC_PRESENT */ ++ PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1), /* -LANWAKE */ ++ PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1), /* -PWRSW_EC */ ++ PAD_CFG_NF(GPD4, NONE, PWROK, NF1), /* -PCH_SLP_S3 */ ++ PAD_CFG_NF(GPD5, NONE, PWROK, NF1), /* -PCH_SLP_S4 */ ++ PAD_CFG_NF(GPD6, NONE, PWROK, NF1), /* -PCH_SLP_M */ ++ PAD_NC(GPD7, NONE), ++ PAD_CFG_NF(GPD8, NONE, PWROK, NF1), /* SUSCLK_32K */ ++ PAD_CFG_NF(GPD9, NONE, PWROK, NF1), /* -PCH_SLP_WLAN */ ++ PAD_CFG_NF(GPD10, NONE, PWROK, NF1), /* -PCH_SLP_S5 */ ++ PAD_CFG_NF(GPD11, NONE, PWROK, NF1), /* LANPHYPC */ ++ ++ /* ------- GPIO Community 3 ------- */ ++ ++ /* ------- GPIO Group GPP_F ------- */ ++ PAD_CFG_GPO(GPP_F0, 0, DEEP), ++ PAD_CFG_GPI_TRIG_OWN(GPP_F1, NONE, DEEP, OFF, ACPI), /* GC6_FB_EN */ ++ PAD_CFG_GPO(GPP_F2, 1, DEEP), /* -GPU_EVENT */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F3, NONE, PLTRST, OFF, ACPI), /* DGFX_PWRGD */ ++ PAD_NC(GPP_F4, NONE), /* -WWAN_RESET */ ++ PAD_NC(GPP_F5, NONE), ++ PAD_CFG_GPI_TRIG_OWN(GPP_F6, UP_20K, DEEP, OFF, ACPI), /* -MIC_HW_EN (R37 to GND) */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F7, UP_20K, DEEP, OFF, ACPI), /* -INT_MIC_DTCT */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F8, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG0 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F9, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG1 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F10, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG2 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F11, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG3 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F12, UP_20K, DEEP, OFF, ACPI), /* PLANARID0 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F13, UP_20K, DEEP, OFF, ACPI), /* PLANARID1 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F14, UP_20K, DEEP, OFF, ACPI), /* PLANARID2 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F15, UP_20K, DEEP, OFF, ACPI), /* PLANARID3 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F16, UP_20K, DEEP, OFF, ACPI), /* MEMORYID0 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F17, UP_20K, DEEP, OFF, ACPI), /* MEMORYID1 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F18, UP_20K, DEEP, OFF, ACPI), /* MEMORYID2 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F19, UP_20K, DEEP, OFF, ACPI), /* MEMORYID3 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F20, UP_20K, DEEP, OFF, ACPI), /* MEMORYID4 */ ++ PAD_NC(GPP_F21, NONE), ++ PAD_CFG_GPI_TRIG_OWN(GPP_F22, UP_20K, DEEP, OFF, ACPI), /* -TAMPER_SW_DTCT */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F23, UP_20K, DEEP, OFF, ACPI), /* -SC_DTCT */ ++ ++ /* ------- GPIO Group GPP_G ------- */ ++ PAD_NC(GPP_G0, NONE), ++ PAD_NC(GPP_G1, NONE), ++ PAD_NC(GPP_G2, NONE), ++ PAD_NC(GPP_G3, NONE), ++ PAD_CFG_GPO(GPP_G4, 0, DEEP), /* TBT_RTD3_PWR_EN */ ++ PAD_CFG_GPO(GPP_G5, 0, DEEP), /* TBT_FORCE_USB_PWR */ ++ PAD_CFG_GPO(GPP_G6, 0, DEEP), /* -TBT_PERST */ ++ PAD_CFG_GPI_SCI(GPP_G7, NONE, DEEP, LEVEL, INVERT), /* -TBT_PCIE_WAKE */ ++}; ++ ++void variant_config_gpios(void) ++{ ++ gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); ++} +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c +new file mode 100644 +index 0000000000..b1d96c5a76 +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c +@@ -0,0 +1,90 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#include <device/azalia_device.h> ++ ++const u32 cim_verb_data[] = { ++ 0x10ec0257, // Vendor/Device ID: Realtek ALC257 ++ 0x17aa2258, // Subsystem ID ++ 11, ++ AZALIA_SUBVENDOR(0, 0x17aa2258), ++ ++ AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_DESC( ++ AZALIA_INTEGRATED, ++ AZALIA_INTERNAL, ++ AZALIA_MIC_IN, ++ AZALIA_OTHER_DIGITAL, ++ AZALIA_COLOR_UNKNOWN, ++ AZALIA_NO_JACK_PRESENCE_DETECT, ++ 2, 0 ++ )), ++ AZALIA_PIN_CFG(0, 0x13, 0x40000000), // does not describe a jack or internal device ++ AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_DESC( ++ AZALIA_INTEGRATED, ++ AZALIA_INTERNAL, ++ AZALIA_SPEAKER, ++ AZALIA_OTHER_ANALOG, ++ AZALIA_COLOR_UNKNOWN, ++ AZALIA_NO_JACK_PRESENCE_DETECT, ++ 1, 0 ++ )), ++ AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)), ++ AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_DESC( ++ AZALIA_JACK, ++ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, ++ AZALIA_MIC_IN, ++ AZALIA_STEREO_MONO_1_8, ++ AZALIA_BLACK, ++ AZALIA_JACK_PRESENCE_DETECT, ++ 3, 0 ++ )), ++ AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)), ++ AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)), ++ AZALIA_PIN_CFG(0, 0x1d, 0x40661b45), // does not describe a jack or internal device ++ AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)), ++ AZALIA_PIN_CFG(0, 0x21, AZALIA_PIN_DESC( ++ AZALIA_JACK, ++ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, ++ AZALIA_HP_OUT, ++ AZALIA_STEREO_MONO_1_8, ++ AZALIA_BLACK, ++ AZALIA_JACK_PRESENCE_DETECT, ++ 1, 15 ++ )), ++ ++ 0x8086280b, // Vendor/Device ID: Intel Kabylake HDMI ++ 0x80860101, // Subsystem ID ++ 4, ++ AZALIA_SUBVENDOR(2, 0x80860101), ++ ++ AZALIA_PIN_CFG(2, 0x05, AZALIA_PIN_DESC( ++ AZALIA_JACK, ++ AZALIA_DIGITAL_DISPLAY, ++ AZALIA_DIGITAL_OTHER_OUT, ++ AZALIA_OTHER_DIGITAL, ++ AZALIA_COLOR_UNKNOWN, ++ AZALIA_JACK_PRESENCE_DETECT, ++ 1, 0 ++ )), ++ AZALIA_PIN_CFG(2, 0x06, AZALIA_PIN_DESC( ++ AZALIA_JACK, ++ AZALIA_DIGITAL_DISPLAY, ++ AZALIA_DIGITAL_OTHER_OUT, ++ AZALIA_OTHER_DIGITAL, ++ AZALIA_COLOR_UNKNOWN, ++ AZALIA_JACK_PRESENCE_DETECT, ++ 1, 0 ++ )), ++ AZALIA_PIN_CFG(2, 0x07, AZALIA_PIN_DESC( ++ AZALIA_JACK, ++ AZALIA_DIGITAL_DISPLAY, ++ AZALIA_DIGITAL_OTHER_OUT, ++ AZALIA_OTHER_DIGITAL, ++ AZALIA_COLOR_UNKNOWN, ++ AZALIA_JACK_PRESENCE_DETECT, ++ 1, 0 ++ )), ++}; ++ ++const u32 pc_beep_verbs[] = {}; ++ ++AZALIA_ARRAY_SIZES; +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c +new file mode 100644 +index 0000000000..001e934b3a +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c +@@ -0,0 +1,44 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#include <cbfs.h> ++#include <gpio.h> ++#include <soc/gpio.h> ++#include <soc/romstage.h> ++#include <spd_bin.h> ++#include <stdio.h> ++ ++static const struct pad_config memory_id_gpio_table[] = { ++ PAD_CFG_GPI_TRIG_OWN(GPP_F16, UP_20K, DEEP, OFF, ACPI), /* MEMORYID0 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F17, UP_20K, DEEP, OFF, ACPI), /* MEMORYID1 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F18, UP_20K, DEEP, OFF, ACPI), /* MEMORYID2 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F19, UP_20K, DEEP, OFF, ACPI), /* MEMORYID3 */ ++ PAD_CFG_GPI_TRIG_OWN(GPP_F20, UP_20K, DEEP, OFF, ACPI), /* MEMORYID4 */ ++}; ++ ++void mainboard_memory_init_params(FSPM_UPD *mupd) ++{ ++ int spd_idx; ++ char spd_name[20]; ++ size_t spd_size; ++ ++ FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; ++ mem_cfg->DqPinsInterleaved = true; /* DDR_DQ in interleave mode */ ++ mem_cfg->CaVrefConfig = 2; /* VREF_CA to CH_A and VREF_DQ_B to CH_B */ ++ mem_cfg->MemorySpdDataLen = CONFIG_DIMM_SPD_SIZE; ++ ++ /* Get SPD for soldered RAM SPD (CH A) */ ++ gpio_configure_pads(memory_id_gpio_table, ARRAY_SIZE(memory_id_gpio_table)); ++ ++ spd_idx = gpio_get(GPP_F16) | gpio_get(GPP_F17) << 1 | gpio_get(GPP_F18) << 2 | ++ gpio_get(GPP_F19) << 3 | gpio_get(GPP_F20) << 4; ++ printk(BIOS_DEBUG, "Detected MEMORY_ID = %d\n", spd_idx); ++ snprintf(spd_name, sizeof(spd_name), "spd_%d.bin", spd_idx); ++ mem_cfg->MemorySpdPtr00 = (uintptr_t)cbfs_map(spd_name, &spd_size); ++ ++ /* Get SPD for memory slot (CH B) */ ++ struct spd_block blk = { .addr_map = { [1] = 0x51, } }; ++ get_spd_smbus(&blk); ++ dump_spd_info(&blk); ++ ++ mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[1]; ++} +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb +new file mode 100644 +index 0000000000..d4afca20c4 +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb +@@ -0,0 +1,103 @@ ++# SPDX-License-Identifier: GPL-2.0-only ++ ++chip soc/intel/skylake ++ device domain 0 on ++ device ref south_xhci on ++ register "usb2_ports" = "{ ++ [0] = USB2_PORT_MID(OC0), // JUSB1 (USB-A always on) ++ [1] = USB2_PORT_MID(OC1), // JUSB2 (USB-A) ++ [2] = USB2_PORT_MID(OC_SKIP), // JFPR (smartcard slot) ++ [3] = USB2_PORT_MID(OC_SKIP), // JUSBC (USB-C) ++ [4] = USB2_PORT_MID(OC_SKIP), // JCAM (IR camera) ++ [5] = USB2_PORT_MID(OC_SKIP), // JWWAN (M.2 WWAN USB) ++ [6] = USB2_PORT_MID(OC_SKIP), // JWLAN (M.2 WLAN USB) ++ [7] = USB2_PORT_MID(OC_SKIP), // JCAM (webcam) ++ [8] = USB2_PORT_MID(OC_SKIP), // JFPR (fingerprint reader) ++ [9] = USB2_PORT_MID(OC_SKIP), // JLCD (touch panel) ++ }" ++ register "usb3_ports" = "{ ++ [0] = USB3_PORT_DEFAULT(OC0), // JUSB1 (USB-A always on) ++ [1] = USB3_PORT_DEFAULT(OC1), // JUSB2 (USB-A) ++ [2] = USB3_PORT_DEFAULT(OC_SKIP), // JSD (SD card reader) ++ [3] = USB3_PORT_DEFAULT(OC_SKIP), // JUSBC (USB-C) ++ }" ++ end ++ ++ device ref sata on ++ # SATA_2 - Main M.2 SATA SSD ++ register "SataPortsEnable[2]" = "1" ++ register "SataPortsDevSlp[2]" = "1" ++ end ++ ++ # PCIe controller 1 - 1x2+2x1 ++ # PCIE 1-2 - RP1 - dGPU - CLKOUT0 - CLKREQ0 ++ # PCIE 4 - RP4 - WWAN - CLKOUT1 - CLKREQ1 ++ # ++ # PCIe controller 2 - 2x1+1x2 (lane reversal) ++ # PCIE 5 - GBE - GBE - CLKOUT2 - CLKREQ2 (clobbers RP8) ++ # PCIE 6 - RP7 - WLAN - CLKOUT3 - CLKREQ3 ++ # PCIE 7-8 - RP5 - TB3 - CLKOUT4 - CLKREQ4 ++ # ++ # PCIe controller 3 - 1x4 (lane reversal) ++ # PCIE 9-12 - RP9 - SSD - CLKOUT5 - CLKREQ5 ++ ++ # dGPU - x2 ++ device ref pcie_rp1 on ++ register "PcieRpEnable[0]" = "1" ++ register "PcieRpClkReqSupport[0]" = "1" ++ register "PcieRpClkReqNumber[0]" = "0" ++ register "PcieRpClkSrcNumber[0]" = "0" ++ register "PcieRpAdvancedErrorReporting[0]" = "1" ++ register "PcieRpLtrEnable[0]" = "1" ++ end ++ ++ # M.2 WWAN - x1 ++ device ref pcie_rp4 on ++ register "PcieRpEnable[3]" = "1" ++ register "PcieRpClkReqSupport[3]" = "1" ++ register "PcieRpClkReqNumber[3]" = "1" ++ register "PcieRpClkSrcNumber[3]" = "1" ++ register "PcieRpAdvancedErrorReporting[3]" = "1" ++ register "PcieRpLtrEnable[3]" = "1" ++ end ++ ++ # Ethernet (clobbers RP8) ++ device ref gbe on ++ register "LanClkReqSupported" = "1" ++ register "LanClkReqNumber" = "2" ++ register "EnableLanLtr" = "1" ++ register "EnableLanK1Off" = "1" ++ end ++ ++ # M.2 WLAN - x1 ++ device ref pcie_rp7 on ++ register "PcieRpEnable[6]" = "1" ++ register "PcieRpClkReqSupport[6]" = "1" ++ register "PcieRpClkReqNumber[6]" = "3" ++ register "PcieRpClkSrcNumber[6]" = "3" ++ register "PcieRpAdvancedErrorReporting[6]" = "1" ++ register "PcieRpLtrEnable[6]" = "1" ++ end ++ ++ # TB3 (Alpine Ridge LP) - x2 ++ device ref pcie_rp5 on ++ register "PcieRpEnable[4]" = "1" ++ register "PcieRpClkReqSupport[4]" = "1" ++ register "PcieRpClkReqNumber[4]" = "4" ++ register "PcieRpClkSrcNumber[4]" = "4" ++ register "PcieRpAdvancedErrorReporting[4]" = "1" ++ register "PcieRpLtrEnable[4]" = "1" ++ register "PcieRpHotPlug[4]" = "1" ++ end ++ ++ # M.2 2280 SSD - x2 ++ device ref pcie_rp9 on ++ register "PcieRpEnable[8]" = "1" ++ register "PcieRpClkReqSupport[8]" = "1" ++ register "PcieRpClkReqNumber[8]" = "5" ++ register "PcieRpClkSrcNumber[8]" = "5" ++ register "PcieRpAdvancedErrorReporting[8]" = "1" ++ register "PcieRpLtrEnable[8]" = "1" ++ end ++ end ++end +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_0.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_0.bin +new file mode 100644 +index 0000000000000000000000000000000000000000..86f39ddb55ea9fb58d5e5699637636ef597c734e +GIT binary patch +literal 512 +zcmY!u;9+)EWZ+<6U|?oq29gXMJYRrxPEL*>N67~+1r7#Qh7a1t+8`-(puhlu3{YAD +YT>%dM8_BI;nL`dsaHtp+rc($20I8n}l>h($ + +literal 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b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_5.bin +new file mode 100644 +index 0000000000000000000000000000000000000000..a64a5a93fb4aef4d5f63d79cb2582731b9ac5063 +GIT binary patch +literal 512 +NcmZQz7zHCa1ONg600961 + +literal 0 +HcmV?d00001 + +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_6.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_6.bin +new file mode 100644 +index 0000000000000000000000000000000000000000..a64a5a93fb4aef4d5f63d79cb2582731b9ac5063 +GIT binary patch +literal 512 +NcmZQz7zHCa1ONg600961 + +literal 0 +HcmV?d00001 + +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_7.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_7.bin +new file mode 100644 +index 0000000000000000000000000000000000000000..940f1e3cd8e5bd9ea32a82a14edcdcbc8132d8c7 +GIT binary patch +literal 512 +zcmY!u<Y8`AWZ+;(U|?osW&i><-XH%N8S?V-1R3%^a4B#wurjQW(9mG0U=XnZ$x{Q& +z0UPq1A)%L_QJxwGl4(Y*BAFWD+8T7AOcTeDU_*B^6OSleBX=`bLy)jxgN`d)<=|uh +E020*^DF6Tf + +literal 0 +HcmV?d00001 + +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_8.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_8.bin +new file mode 100644 +index 0000000000000000000000000000000000000000..30c84410d417ef7afa8705c93cdb64a9f4e915a0 +GIT binary patch +literal 512 +zcmY!u<Y9JIWZ+;(U|?oqW&i?q-XHZ040(BZf(&^dxD+@TSQ$QOn`kgpFo@WI<f#GX +zYz3L}{MzzRenxp}7)YiWinU~FgllWifig`TL)=Uajm%6uqI8Yijh&1X6cmgabe!NS +H2PXpn6CD!Q + +literal 0 +HcmV?d00001 + +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_9.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_9.bin +new file mode 100644 +index 0000000000000000000000000000000000000000..7facef55b93fe1f67411c00bab84862769461f63 +GIT binary patch +literal 512 +zcmY!u<Y8`AWZ+;(U|?osW&i?q-XHZ040(BZf(&^dxD+@TSQ%DGYiKZ3Fo@WI<f#GX +zYz3L}{F>W!enxp}7)YiWinU~FgllWifig`TLxK(6%}hL^bdB7N9Ss$Lz^FmT39fQ* +FG5`?&65ap+ + +literal 0 +HcmV?d00001 + +-- +2.39.5 + diff --git a/config/coreboot/next/patches/0002-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch b/config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch index 7e2ce1f3..77513b77 100644 --- a/config/coreboot/next/patches/0002-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch +++ b/config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch @@ -1,7 +1,7 @@ -From 53151be243024957386012a099ccf3858f830555 Mon Sep 17 00:00:00 2001 +From 2527c4a5131d7b33e43bbc03a94921e7e59b4b02 Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Mon, 30 Sep 2024 20:44:38 -0400 -Subject: [PATCH 2/5] mb/dell: Add Optiplex 780 MT (x4x/ICH10) +Subject: [PATCH 04/11] mb/dell: Add Optiplex 780 MT (x4x/ICH10) Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> diff --git a/config/coreboot/next/patches/0003-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch index afa778a5..d5896fdc 100644 --- a/config/coreboot/next/patches/0003-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch +++ b/config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch @@ -1,7 +1,7 @@ -From 50ae904625d6917c68ff8f8f50c280d79842142b Mon Sep 17 00:00:00 2001 +From 27b2f2bc24e5e860b87119c963e534fb0d3e55f2 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Sun, 19 Feb 2023 18:21:43 +0000 -Subject: [PATCH 3/5] util/ifdtool: add --nuke flag (all 0xFF on region) +Subject: [PATCH 05/11] util/ifdtool: add --nuke flag (all 0xFF on region) When this option is used, the region's contents are overwritten with all ones (0xFF). @@ -20,10 +20,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org> 1 file changed, 83 insertions(+), 31 deletions(-) diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c -index 36477eef66..3ebef74042 100644 +index 94105efe52..0706496af2 100644 --- a/util/ifdtool/ifdtool.c +++ b/util/ifdtool/ifdtool.c -@@ -2217,6 +2217,7 @@ static void print_usage(const char *name) +@@ -2230,6 +2230,7 @@ static void print_usage(const char *name) " tgl - Tiger Lake\n" " wbg - Wellsburg\n" " -S | --setpchstrap Write a PCH strap\n" @@ -31,7 +31,7 @@ index 36477eef66..3ebef74042 100644 " -V | --newvalue The new value to write into PCH strap specified by -S\n" " -v | --version: print the version\n" " -h | --help: print this help\n\n" -@@ -2225,6 +2226,60 @@ static void print_usage(const char *name) +@@ -2238,6 +2239,60 @@ static void print_usage(const char *name) "\n"); } @@ -92,15 +92,15 @@ index 36477eef66..3ebef74042 100644 int main(int argc, char *argv[]) { int opt, option_index = 0; -@@ -2232,6 +2287,7 @@ int main(int argc, char *argv[]) +@@ -2245,6 +2300,7 @@ int main(int argc, char *argv[]) int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0; int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0; int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0; + int mode_nuke = 0; int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0; - char *region_type_string = NULL, *region_fname = NULL; - const char *layout_fname = NULL; -@@ -2267,6 +2323,7 @@ int main(int argc, char *argv[]) + char *region_type_string = NULL, *region_fname = NULL, *layout_fname = NULL; + char *new_filename = NULL; +@@ -2279,6 +2335,7 @@ int main(int argc, char *argv[]) {"validate", 0, NULL, 't'}, {"setpchstrap", 1, NULL, 'S'}, {"newvalue", 1, NULL, 'V'}, @@ -108,7 +108,7 @@ index 36477eef66..3ebef74042 100644 {0, 0, 0, 0} }; -@@ -2316,35 +2373,8 @@ int main(int argc, char *argv[]) +@@ -2328,35 +2385,8 @@ int main(int argc, char *argv[]) region_fname++; // Descriptor, BIOS, ME, GbE, Platform // valid type? @@ -146,7 +146,7 @@ index 36477eef66..3ebef74042 100644 fprintf(stderr, "No such region type: '%s'\n\n", region_type_string); fprintf(stderr, "run '%s -h' for usage\n", argv[0]); -@@ -2521,6 +2551,22 @@ int main(int argc, char *argv[]) +@@ -2533,6 +2563,22 @@ int main(int argc, char *argv[]) case 't': mode_validate = 1; break; @@ -169,7 +169,7 @@ index 36477eef66..3ebef74042 100644 case 'v': print_version(); exit(EXIT_SUCCESS); -@@ -2540,7 +2586,8 @@ int main(int argc, char *argv[]) +@@ -2552,7 +2598,8 @@ int main(int argc, char *argv[]) if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject + mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 | mode_unlocked | mode_locked) + mode_altmedisable + mode_validate + @@ -179,7 +179,7 @@ index 36477eef66..3ebef74042 100644 fprintf(stderr, "You may not specify more than one mode.\n\n"); fprintf(stderr, "run '%s -h' for usage\n", argv[0]); exit(EXIT_FAILURE); -@@ -2549,7 +2596,8 @@ int main(int argc, char *argv[]) +@@ -2561,7 +2608,8 @@ int main(int argc, char *argv[]) if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject + mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 + mode_locked + mode_unlocked + mode_density + mode_altmedisable + @@ -189,7 +189,7 @@ index 36477eef66..3ebef74042 100644 fprintf(stderr, "You need to specify a mode.\n\n"); fprintf(stderr, "run '%s -h' for usage\n", argv[0]); exit(EXIT_FAILURE); -@@ -2662,6 +2710,10 @@ int main(int argc, char *argv[]) +@@ -2674,6 +2722,10 @@ int main(int argc, char *argv[]) write_image(new_filename, image, size); } diff --git a/config/coreboot/next/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch index ef561b42..3ff12724 100644 --- a/config/coreboot/next/patches/0004-Remove-warning-for-coreboot-images-built-without-a-p.patch +++ b/config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch @@ -1,7 +1,7 @@ -From 895f9a49fb73d000178d8422b9d0c7e0ef71ae03 Mon Sep 17 00:00:00 2001 +From 8230acfb9e1f692202b306ffb10fe89f783ab4e8 Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Fri, 12 May 2023 19:55:15 -0600 -Subject: [PATCH 4/5] Remove warning for coreboot images built without a +Subject: [PATCH 06/11] Remove warning for coreboot images built without a payload I added this in upstream to prevent people from accidentally flashing diff --git a/config/coreboot/next/patches/0005-mb-dell-optiplex_780-Add-USFF-variant.patch b/config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch index d63e2061..637b7266 100644 --- a/config/coreboot/next/patches/0005-mb-dell-optiplex_780-Add-USFF-variant.patch +++ b/config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch @@ -1,7 +1,7 @@ -From 0b26b89118b9bde0a722b9743b9871aa68f8ca38 Mon Sep 17 00:00:00 2001 +From 41b93b8786ba14830648cd166f86b6317d655359 Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Wed, 30 Oct 2024 20:55:25 -0600 -Subject: [PATCH 5/5] mb/dell/optiplex_780: Add USFF variant +Subject: [PATCH 07/11] mb/dell/optiplex_780: Add USFF variant Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> diff --git a/config/coreboot/next/patches/0008-dell-3050micro-disable-nvme-hotplug.patch b/config/coreboot/next/patches/0008-dell-3050micro-disable-nvme-hotplug.patch new file mode 100644 index 00000000..daeb0fa1 --- /dev/null +++ b/config/coreboot/next/patches/0008-dell-3050micro-disable-nvme-hotplug.patch @@ -0,0 +1,49 @@ +From c8192c52b2bfa93aeb6c6639476ca217e33c4313 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Wed, 11 Dec 2024 01:06:01 +0000 +Subject: [PATCH 08/11] dell/3050micro: disable nvme hotplug + +in my testing, when running my 3050micro for a few days, +the nvme would sometimes randomly rename. + +e.g. nvme0n1 renamed to nvme0n2 + +this might cause crashes in linux, if booting only from the +nvme. in my case, i was booting from mdraid (sata+nvme) and +every few days, the nvme would rename at least once, causing +my RAID to become unsynced. since i'm using RAID1, this was +OK and I could simply re-sync the array, but this is quite +precarious indeed. if you're using raid0, that will potentially +corrupt your RAID array indefinitely. + +this same issue manifested on the T480/T480 thinkpads, and +S3 resume would break because of that, when booting from nvme, +because the nvme would be "unplugged" and appear to linux as a +new device (the one that you booted from). + +the fix there was to disable hotplugging on that pci-e slot +for the nvme, so apply the same fix here for 3050 micro + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + src/mainboard/dell/optiplex_3050/devicetree.cb | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb +index 039709aa4a..0678ed1765 100644 +--- a/src/mainboard/dell/optiplex_3050/devicetree.cb ++++ b/src/mainboard/dell/optiplex_3050/devicetree.cb +@@ -45,7 +45,9 @@ chip soc/intel/skylake + register "PcieRpAdvancedErrorReporting[20]" = "1" + register "PcieRpLtrEnable[20]" = "1" + register "PcieRpClkSrcNumber[20]" = "3" +- register "PcieRpHotPlug[20]" = "1" ++# disable hotplug on nvme to prevent renaming e.g. nvme0n1 rename to nvme0n2, ++# which could cause crashes in linux if booting from nvme ++ register "PcieRpHotPlug[20]" = "0" + end + + # Realtek LAN +-- +2.39.5 + diff --git a/config/coreboot/next/patches/0009-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch b/config/coreboot/next/patches/0009-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch new file mode 100644 index 00000000..cd6cdb02 --- /dev/null +++ b/config/coreboot/next/patches/0009-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch @@ -0,0 +1,78 @@ +From 35295d97b08ee659b6770ce39003732a4bdfb6a0 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Wed, 18 Dec 2024 02:06:18 +0000 +Subject: [PATCH 09/11] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN + +This is used by lbmk to know where a tb.bin file goes, +when extracting and padding TBT.bin from Lenovo ThunderBolt +firmware updates on T480/T480s and other machines, grabbing +Lenovo update files. + +Not used in any builds, so it's not relevant for ./mk inject + +However, the ThunderBolt firmware is now auto-downloaded on +T480/T480s. This is not inserted, because it doesn't go in +the main flash, but the resulting ROM image can be flashed +on the TB controller's separate flash chip. + +Locations are as follows: + +vendorfiles/t480s/tb.bin +vendorfiles/t480/tb.bin + +This can be used for other affected ThinkPads when they're +added to Libreboot, but note that Lenovo provides different +TB firmware files for each machine. + +Since I assume it's the same TB controller on all of those +machines, I have to wonder: what difference is there between +the various TBT.bin files provided by Lenovo, and how do they +differ in terms of actual flashed configuration? + +We simply flash the padded TBT.bin when updating the firmware, +flashing externally. That's what this patch is for, so that +lbmk can auto-download them. + +Signed-off-by: Leah Rowe <info@minifree.org> +--- + src/mainboard/lenovo/Kconfig | 26 ++++++++++++++++++++++++++ + 1 file changed, 26 insertions(+) + +diff --git a/src/mainboard/lenovo/Kconfig b/src/mainboard/lenovo/Kconfig +index 2ffbaab85f..512b326381 100644 +--- a/src/mainboard/lenovo/Kconfig ++++ b/src/mainboard/lenovo/Kconfig +@@ -18,4 +18,30 @@ config MAINBOARD_FAMILY + string + default MAINBOARD_PART_NUMBER + ++config LENOVO_TBFW_BIN ++ string "Lenovo ThunderBolt firmware bin file" ++ default "" ++ help ++ ThunderBolt firmware for certain ThinkPad models e.g. T480. ++ Not used in the actual build. Libreboot's build system uses this ++ along with config/vendor/*/pkg.cfg entries defining a URL to the ++ Lenovo download link and hash. The resulting file when processed by ++ lbmk can be flashed to the ThunderBolt firmware's 25XX NOR device. ++ Earlier versions of this firmware had debug commands enabled that ++ sent logs to said flash IC, and it would quickly fill up, bricking ++ the ThunderBolt controller. With these updates, flashed externally, ++ you can fix the issue if present or otherwise prevent it. The benefit ++ here is that you then don't need to use Windows or a boot disk. You ++ can flash the TB firmware while flashing Libreboot firmware. Easy! ++ Look for these variables in lbmk: ++ TBFW_url TBFW_url_bkup TBFW_hash and look at how it handles that and ++ CONFIG_LENOVO_TBFW_BIN, in lbmk's include/vendor.sh file. ++ The path set by CONFIG_LENOVO_TBFW_BIN is used by lbmk when extracting ++ the firmware, putting it at that desired location. In this way, lbmk ++ can auto-download such firmware. E.g. ./mk -d coreboot t480_fsp_16mb ++ and it appears at vendorfiles/t480/tb.bin fully padded and everything! ++ ++ Just leave this blank if you don't care about this option. It's not ++ useful for every ThinkPad, only certain models. ++ + endif # VENDOR_LENOVO +-- +2.39.5 + diff --git a/config/coreboot/next/patches/0010-soc-intel-skylake-Don-t-compress-FSP-S.patch b/config/coreboot/next/patches/0010-soc-intel-skylake-Don-t-compress-FSP-S.patch new file mode 100644 index 00000000..228170eb --- /dev/null +++ b/config/coreboot/next/patches/0010-soc-intel-skylake-Don-t-compress-FSP-S.patch @@ -0,0 +1,36 @@ +From f08dbaacf747eb198bbc8f83e0220ca803f19116 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Thu, 26 Dec 2024 19:45:20 +0000 +Subject: [PATCH 10/11] soc/intel/skylake: Don't compress FSP-S + +Build systems like lbmk need to reproducibly insert +certain vendor files on release images. + +Compression isn't always reproducible, and making it +so costs a lot more time than simply disabling compression. + +With this change, the FSP-S module will now be inserted +without compression, which means that there will now be +about 40KB of extra space used in the flash. + +Signed-off-by: Leah Rowe <info@minifree.org> +--- + src/soc/intel/skylake/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig +index c24df2ef75..8e25f796ed 100644 +--- a/src/soc/intel/skylake/Kconfig ++++ b/src/soc/intel/skylake/Kconfig +@@ -12,7 +12,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE + select CPU_SUPPORTS_PM_TIMER_EMULATION + select DRIVERS_USB_ACPI + select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2 +- select FSP_COMPRESS_FSP_S_LZ4 ++# select FSP_COMPRESS_FSP_S_LZ4 + select FSP_M_XIP + select GENERIC_GPIO_LIB + select HAVE_FSP_GOP +-- +2.39.5 + diff --git a/config/coreboot/next/patches/0011-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch b/config/coreboot/next/patches/0011-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch new file mode 100644 index 00000000..7dae2d6a --- /dev/null +++ b/config/coreboot/next/patches/0011-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch @@ -0,0 +1,82 @@ +From 12ff6e798d1cefc5b888e6035e52bf6d70c9ca47 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Tue, 31 Dec 2024 01:40:42 +0000 +Subject: [PATCH 11/11] soc/intel/pmc: Hardcoded poweroff after power fail + +Coreboot can set the power state for power on after previous +power failure, based on the option table. On the ThinkPad T480, +we have no nvram and, due to coreboot's design, we therefore +have no option table, so the default setting is enabled. + +In my testing, this seems to be that the system will turn on +after a power failure. If your ThinkPad was previously in a state +where it wouldn't turn on when plugging in the power, it'd be fine. + +If your battery ran out later on, this would be triggered and +your ThinkPad would permanently turn on, when plugging in a charger, +and there is currently no way to configure this behaviour. + +We currently only use the common SoC PMC code on the ThinkPad +T480, T480s and the Dell OptiPlex 3050 Micro, at the time of +this patch, and it is desirable that the system be set to power +off after power fail anyway. + +In some cases, you might want the opposite, for example if you're +running a server. This will be documented on the website, for that +reason. + +Signed-off-by: Leah Rowe <info@minifree.org> +--- + src/soc/intel/common/block/pmc/pmclib.c | 36 +++---------------------- + 1 file changed, 4 insertions(+), 32 deletions(-) + +diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c +index 0fadd6e409..843581b285 100644 +--- a/src/soc/intel/common/block/pmc/pmclib.c ++++ b/src/soc/intel/common/block/pmc/pmclib.c +@@ -760,38 +760,10 @@ void pmc_clear_pmcon_sts(void) + + void pmc_set_power_failure_state(const bool target_on) + { +- const unsigned int state = get_uint_option("power_on_after_fail", +- CONFIG_MAINBOARD_POWER_FAILURE_STATE); +- +- /* +- * On the shutdown path (target_on == false), we only need to +- * update the register for MAINBOARD_POWER_STATE_PREVIOUS. For +- * all other cases, we don't write the register to avoid clob- +- * bering the value set on the boot path. This is necessary, +- * for instance, when we can't access the option backend in SMM. +- */ +- +- switch (state) { +- case MAINBOARD_POWER_STATE_OFF: +- if (!target_on) +- break; +- printk(BIOS_INFO, "Set power off after power failure.\n"); +- pmc_soc_set_afterg3_en(false); +- break; +- case MAINBOARD_POWER_STATE_ON: +- if (!target_on) +- break; +- printk(BIOS_INFO, "Set power on after power failure.\n"); +- pmc_soc_set_afterg3_en(true); +- break; +- case MAINBOARD_POWER_STATE_PREVIOUS: +- printk(BIOS_INFO, "Keep power state after power failure.\n"); +- pmc_soc_set_afterg3_en(target_on); +- break; +- default: +- printk(BIOS_WARNING, "Unknown power-failure state: %d\n", state); +- break; +- } ++ if (!target_on) ++ return; ++ printk(BIOS_INFO, "Set power off after power failure.\n"); ++ pmc_soc_set_afterg3_en(false); + } + + /* This function returns the highest assertion duration of the SLP_Sx assertion widths */ +-- +2.39.5 + diff --git a/config/coreboot/next/patches/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch b/config/coreboot/next/patches/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch new file mode 100644 index 00000000..5e4e6edb --- /dev/null +++ b/config/coreboot/next/patches/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch @@ -0,0 +1,32 @@ +From 916c7b027faba625b922e74e45e50f9ceab64a64 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Mon, 6 Jan 2025 01:16:01 +0000 +Subject: [PATCH 1/1] ec/dasharo: Comment EC_DASHARO_EC_FLASH_SIZE + +We don't use anything dasharo in Libreboot. + +This patch prevents the following config item appearing +in T480 and 3050 Micro configs: + +CONFIG_EC_DASHARO_EC_FLASH_SIZE=0x20000 + +Otherwise, make-oldconfig adds it automatically. + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + src/ec/dasharo/ec/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/src/ec/dasharo/ec/Kconfig b/src/ec/dasharo/ec/Kconfig +index 901d3ce514..071e37f95e 100644 +--- a/src/ec/dasharo/ec/Kconfig ++++ b/src/ec/dasharo/ec/Kconfig +@@ -28,4 +28,4 @@ config EC_DASHARO_EC_UPDATE_FILE + + config EC_DASHARO_EC_FLASH_SIZE + hex +- default 0x20000 ++ # default 0x20000 +-- +2.39.5 + diff --git a/config/coreboot/next/patches/0013-src-intel-skylake-Disable-stack-overflow-debug-optio.patch b/config/coreboot/next/patches/0013-src-intel-skylake-Disable-stack-overflow-debug-optio.patch new file mode 100644 index 00000000..84370089 --- /dev/null +++ b/config/coreboot/next/patches/0013-src-intel-skylake-Disable-stack-overflow-debug-optio.patch @@ -0,0 +1,61 @@ +From 00b6459a9b360b16529036d9b1e10c977228a7ff Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Mon, 6 Jan 2025 01:36:23 +0000 +Subject: [PATCH 1/1] src/intel/skylake: Disable stack overflow debug options + +The option was appearing in T480/3050micro configs of lbmk, +after updating on the coreboot/next uprev for 20241206 rev8: + +CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y + +I did some digging. See coreboot commit: + +commit 51cc2bacb6b07279b97e9934d079060475481fb6 +Author: Subrata Banik <subratabanik@google.com> +Date: Fri Dec 13 13:07:28 2024 +0530 + + soc/intel/pantherlake: Disable stack overflow debug options + +Well now: + +I'm disabling this behaviour on Skylake, for the same +behaviour, because I want as few behaviour changes in general, +as possible, for the rev8 release. + +According to Subrata's patch, which was for Pantherlake, +without this change, stack corruption can occur on verstage +and romstage early on. Please look at that coreboot patch, +referenced above, for clarity. + +I see no harm in disabling this option for Skylake, since +the behaviour that it otherwise enables was not present +before. + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + src/soc/intel/skylake/Kconfig | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig +index 8e25f796ed..7d324e15ea 100644 +--- a/src/soc/intel/skylake/Kconfig ++++ b/src/soc/intel/skylake/Kconfig +@@ -130,6 +130,15 @@ config DCACHE_RAM_SIZE + The size of the cache-as-ram region required during bootblock + and/or romstage. + ++# Override DEBUG Kconfig to avoid false alarm about stack overflow. ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS ++ bool ++ default n ++ ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES ++ bool ++ default n ++ + config DCACHE_BSP_STACK_SIZE + hex + default 0x20400 if FSP_USES_CB_STACK +-- +2.39.5 + diff --git a/config/coreboot/next/patches/0014-src-intel-x4x-Disable-stack-overflow-debug.patch b/config/coreboot/next/patches/0014-src-intel-x4x-Disable-stack-overflow-debug.patch new file mode 100644 index 00000000..e2eae2a9 --- /dev/null +++ b/config/coreboot/next/patches/0014-src-intel-x4x-Disable-stack-overflow-debug.patch @@ -0,0 +1,33 @@ +From 5671d54d347b110ffade5b8b6e2d052612a8716c Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Mon, 6 Jan 2025 01:53:53 +0000 +Subject: [PATCH 1/1] src/intel/x4x: Disable stack overflow debug + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + src/northbridge/intel/x4x/Kconfig | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig +index 097e11126c..7e4e14cf94 100644 +--- a/src/northbridge/intel/x4x/Kconfig ++++ b/src/northbridge/intel/x4x/Kconfig +@@ -28,6 +28,15 @@ config ECAM_MMCONF_BUS_NUMBER + int + default 256 + ++# Override DEBUG Kconfig to avoid false alarm about stack overflow. ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS ++ bool ++ default n ++ ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES ++ bool ++ default n ++ + # This number must be equal or lower than what's reported in ACPI PCI _CRS + config DOMAIN_RESOURCE_32BIT_LIMIT + default 0xfec00000 +-- +2.39.5 + diff --git a/config/coreboot/next/target.cfg b/config/coreboot/next/target.cfg index 80044097..1d01e623 100644 --- a/config/coreboot/next/target.cfg +++ b/config/coreboot/next/target.cfg @@ -1,2 +1,4 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="next" -rev="d28fedf4f2cb7e4475a6cdfcab37d64cc60bba1f" +rev="2f1e4e5e8515dd350cc9d68b48d32a5b6b02ae6a" diff --git a/config/coreboot/qemu_arm64_12mb/target.cfg b/config/coreboot/qemu_arm64_12mb/target.cfg index 980de84f..5d8f0db2 100644 --- a/config/coreboot/qemu_arm64_12mb/target.cfg +++ b/config/coreboot/qemu_arm64_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="aarch64-elf arm-eabi" payload_uboot="y" diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg index 218f2fd4..2074beca 100644 --- a/config/coreboot/qemu_x86_12mb/target.cfg +++ b/config/coreboot/qemu_x86_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_grub="y" diff --git a/config/coreboot/qemu_x86_64_12mb/target.cfg b/config/coreboot/qemu_x86_64_12mb/target.cfg index 5c1a733f..7855bd6f 100644 --- a/config/coreboot/qemu_x86_64_12mb/target.cfg +++ b/config/coreboot/qemu_x86_64_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_grub="y" diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/r400_16mb/target.cfg +++ b/config/coreboot/r400_16mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/r400_4mb/target.cfg +++ b/config/coreboot/r400_4mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg index ba490833..ef878ea1 100644 --- a/config/coreboot/r400_8mb/target.cfg +++ b/config/coreboot/r400_8mb/target.cfg @@ -1,6 +1,8 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/r500_4mb/target.cfg +++ b/config/coreboot/r500_4mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg index aa08547a..de6a8af8 100644 --- a/config/coreboot/t1650_12mb/target.cfg +++ b/config/coreboot/t1650_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci" grubtree="nvme" vcfg="t1650" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/t400_16mb/target.cfg +++ b/config/coreboot/t400_16mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/t400_4mb/target.cfg +++ b/config/coreboot/t400_4mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/t400_8mb/target.cfg +++ b/config/coreboot/t400_8mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg index 27291f4d..333030ce 100644 --- a/config/coreboot/t420_8mb/target.cfg +++ b/config/coreboot/t420_8mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg index 27291f4d..333030ce 100644 --- a/config/coreboot/t420s_8mb/target.cfg +++ b/config/coreboot/t420s_8mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg index c0b56379..6cbab731 100644 --- a/config/coreboot/t430_12mb/target.cfg +++ b/config/coreboot/t430_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg index 5be15ac2..96fbb9e3 100644 --- a/config/coreboot/t440plibremrc_12mb/target.cfg +++ b/config/coreboot/t440plibremrc_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci" grubtree="xhci" vcfg="haswell" build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb new file mode 100644 index 00000000..5191da57 --- /dev/null +++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb @@ -0,0 +1,855 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_LTO is not set +# CONFIG_IWYU is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +CONFIG_OPTION_BACKEND_NONE=y +CONFIG_COMPRESS_RAMSTAGE_LZMA=y +# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_USE_QC_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_RAMSTAGE=y +# CONFIG_ASAN is not set +# CONFIG_NO_STAGE_CACHE is not set +CONFIG_TSEG_STAGE_CACHE=y +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_BOOTSPLASH_IMAGE is not set + +# +# Software Bill Of Materials (SBOM) +# +# CONFIG_SBOM is not set +# end of Software Bill Of Materials (SBOM) +# end of General setup + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +# CONFIG_VENDOR_ACER is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BOSTENTECH is not set +# CONFIG_VENDOR_BYTEDANCE is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_CLEVO is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set +# CONFIG_VENDOR_DELL is not set +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set +# CONFIG_VENDOR_EXAMPLE is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_INVENTEC is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set +CONFIG_VENDOR_LENOVO=y +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PINE64 is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PRODRIVE is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_STARLABS is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set +# CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set +CONFIG_MAINBOARD_FAMILY="T480" +CONFIG_MAINBOARD_PART_NUMBER="T480" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad" +CONFIG_VGA_BIOS_ID="8086,0406" +CONFIG_DIMM_MAX=2 +CONFIG_DIMM_SPD_SIZE=512 +CONFIG_FMDFILE="" +# CONFIG_NO_POST is not set +CONFIG_MAINBOARD_VENDOR="LENOVO" +CONFIG_CBFS_SIZE=0xEEC000 +CONFIG_CONSOLE_SERIAL=y +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560 +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y +CONFIG_MAX_CPUS=8 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_IO=y +CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="t480" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set +# CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" +# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480" +# CONFIG_CONSOLE_POST is not set +CONFIG_MAX_SOCKET=1 +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +CONFIG_TPM_PIRQ=0x0 +CONFIG_USE_PM_ACPI_TIMER=y +CONFIG_DCACHE_RAM_BASE=0xfef00000 +CONFIG_DCACHE_RAM_SIZE=0x40000 +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 +CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_USE_LEGACY_8254_TIMER=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_DRIVERS_INTEL_WIFI=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16" +CONFIG_ME_BIN_PATH="../../../vendorfiles/t480/me.bin" +CONFIG_GBE_BIN_PATH="../../../config/ifd/t480/gbe" +CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +# CONFIG_DEBUG_SMI is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set +CONFIG_HAVE_IFD_BIN=y +# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set +# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set +# CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set +# CONFIG_BOARD_LENOVO_S230U is not set +CONFIG_BOARD_LENOVO_T480=y +# CONFIG_BOARD_LENOVO_T480S is not set +# CONFIG_BOARD_LENOVO_T400 is not set +# CONFIG_BOARD_LENOVO_T500 is not set +# CONFIG_BOARD_LENOVO_R400 is not set +# CONFIG_BOARD_LENOVO_R500 is not set +# CONFIG_BOARD_LENOVO_W500 is not set +# CONFIG_BOARD_LENOVO_T410 is not set +# CONFIG_BOARD_LENOVO_T420 is not set +# CONFIG_BOARD_LENOVO_T420S is not set +# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set +# CONFIG_BOARD_LENOVO_T430S is not set +# CONFIG_BOARD_LENOVO_T431S is not set +# CONFIG_BOARD_LENOVO_T520 is not set +# CONFIG_BOARD_LENOVO_W520 is not set +# CONFIG_BOARD_LENOVO_T530 is not set +# CONFIG_BOARD_LENOVO_W530 is not set +# CONFIG_BOARD_LENOVO_T60 is not set +# CONFIG_BOARD_LENOVO_Z61T is not set +# CONFIG_BOARD_LENOVO_R60 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set +# CONFIG_BOARD_LENOVO_X131E is not set +# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set +# CONFIG_BOARD_LENOVO_X200 is not set +# CONFIG_BOARD_LENOVO_X301 is not set +# CONFIG_BOARD_LENOVO_X201 is not set +# CONFIG_BOARD_LENOVO_X220 is not set +# CONFIG_BOARD_LENOVO_X220I is not set +# CONFIG_BOARD_LENOVO_X1 is not set +# CONFIG_BOARD_LENOVO_X230 is not set +# CONFIG_BOARD_LENOVO_X230T is not set +# CONFIG_BOARD_LENOVO_X230S is not set +# CONFIG_BOARD_LENOVO_X230_EDP is not set +# CONFIG_BOARD_LENOVO_X60 is not set +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="PNP0F13" +CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" +CONFIG_GFX_GMA_PANEL_1_PORT="eDP" +CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y +CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin" +CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set +CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y +CONFIG_D3COLD_SUPPORT=y +CONFIG_GFX_GMA_PANEL_1_ON_EDP=y +CONFIG_DRIVERS_UART_8250IO=y +CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 +CONFIG_HEAP_SIZE=0x100000 +CONFIG_EC_GPE_SCI=0x50 +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +CONFIG_BOARD_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=16384 +CONFIG_ROM_SIZE=0x01000000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set +CONFIG_POWER_STATE_ON_AFTER_FAILURE=y +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 +# end of Mainboard + +CONFIG_SYSTEM_TYPE_LAPTOP=y + +# +# Chipset +# + +# +# SoC +# +CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" +CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" +CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" +CONFIG_CBFS_MCACHE_SIZE=0x4000 +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_SMM_TSEG_SIZE=0x800000 +CONFIG_SMM_RESERVED_SIZE=0x200000 +CONFIG_SMM_MODULE_STACK_SIZE=0x800 +CONFIG_ACPI_BERT_SIZE=0x0 +CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 +CONFIG_ACPI_CPU_STRING="CP%02X" +CONFIG_STACK_SIZE=0x2000 +CONFIG_IFD_CHIPSET="sklkbl" +CONFIG_IED_REGION_SIZE=0x400000 +CONFIG_MAX_ROOT_PORTS=24 +CONFIG_PCR_BASE_ADDRESS=0xfd000000 +CONFIG_CPU_BCLK_MHZ=100 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120 +CONFIG_CPU_XTAL_HZ=24000000 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2 +CONFIG_SOC_INTEL_I2C_DEV_MAX=6 +# CONFIG_ENABLE_SATA_TEST_MODE is not set +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" +CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" +CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 +CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 +CONFIG_INTEL_GMA_BCLV_WIDTH=16 +CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 +CONFIG_INTEL_GMA_BCLM_WIDTH=16 +CONFIG_FSP_PUBLISH_MBP_HOB=y +CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 +CONFIG_MAX_HECI_DEVICES=5 +CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_HAVE_PAM0_REGISTER=y +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000 +CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10 +CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 +CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 +CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y +CONFIG_SOC_INTEL_KABYLAKE=y +CONFIG_FSP_T_LOCATION=0xfffe0000 +CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y +CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 +CONFIG_CBFS_CACHE_ALIGN=8 +CONFIG_SOC_INTEL_COMMON=y + +# +# Intel SoC Common Code for IP blocks +# +CONFIG_SOC_INTEL_COMMON_BLOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y +CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y +# CONFIG_USE_COREBOOT_MP_INIT is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y +CONFIG_INTEL_CAR_NEM_ENHANCED=y +# CONFIG_USE_INTEL_FSP_MP_INIT is not set +CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y +CONFIG_HAVE_HYPERTHREADING=y +# CONFIG_FSP_HYPERTHREADING is not set +# CONFIG_INTEL_KEYLOCKER is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y +CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" +CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" +CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" +CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" +CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" +CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" +CONFIG_SOC_INTEL_CSE_RW_FILE="" +CONFIG_SOC_INTEL_CSE_RW_VERSION="" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE="" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE="" +CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y +CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y +CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y +# CONFIG_SOC_INTEL_DISABLE_IGD is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y +CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y +# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 +CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y +CONFIG_SA_ENABLE_DPR=y +CONFIG_HAVE_CAPID_A_REGISTER=y +CONFIG_HAVE_BDSM_BGSM_REGISTER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y + +# +# Intel SoC Common PCH Code +# +CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y +CONFIG_SOC_INTEL_COMMON_PCH_BASE=y +CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y +CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y +CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y +CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y + +# +# Intel SoC Common coreboot stages and non-IP blocks +# +CONFIG_SOC_INTEL_COMMON_BASECODE=y +CONFIG_SOC_INTEL_COMMON_RESET=y +CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y +CONFIG_PAVP=y +# CONFIG_MMA is not set +CONFIG_SOC_INTEL_COMMON_NHLT=y +# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set + +# +# CPU +# +CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_PARALLEL_MP=y +CONFIG_PARALLEL_MP_AP_WORK=y +CONFIG_XAPIC_ONLY=y +# CONFIG_X2APIC_ONLY is not set +# CONFIG_X2APIC_RUNTIME is not set +# CONFIG_X2APIC_LATE_WORKAROUND is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_HAVE_SMI_HANDLER=y +CONFIG_SMM_TSEG=y +CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 +CONFIG_AP_STACK_SIZE=0x800 +CONFIG_SMP=y +CONFIG_SSE=y +CONFIG_SSE2=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# + +# +# Southbridge +# +# CONFIG_PCIEXP_HOTPLUG is not set +CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 +CONFIG_RCBA_LENGTH=0x4000 + +# +# Super I/O +# + +# +# Embedded Controllers +# +CONFIG_EC_ACPI=y +CONFIG_EC_LENOVO_H8=y +CONFIG_H8_BEEP_ON_DEATH=y +CONFIG_H8_FLASH_LEDS_ON_DEATH=y +# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set +# CONFIG_H8_FN_CTRL_SWAP is not set +CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_PRIMARY_FN_KEYS=y +CONFIG_H8_HAS_LEDLOGO=y +CONFIG_EC_LENOVO_PMH7=y + +# +# Intel Firmware +# +CONFIG_HAVE_ME_BIN=y +# CONFIG_STITCH_ME_BIN is not set +# CONFIG_CHECK_ME is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set +# CONFIG_USE_ME_CLEANER is not set +CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y +CONFIG_HAVE_GBE_BIN=y +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 +CONFIG_UDK_BASE=y +CONFIG_UDK_2017_BINDING=y +CONFIG_UDK_2013_VERSION=2013 +CONFIG_UDK_2017_VERSION=2017 +CONFIG_UDK_202005_VERSION=202005 +CONFIG_UDK_202111_VERSION=202111 +CONFIG_UDK_202302_VERSION=202302 +CONFIG_UDK_202305_VERSION=202305 +CONFIG_UDK_VERSION=2017 +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_ARCH_ALL_STAGES_X86_32=y +CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_PC80_SYSTEM=y +CONFIG_POSTCAR_STAGE=y +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_HAVE_CF9_RESET=y +CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +# CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 +# end of Chipset + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_LINEAR_FRAMEBUFFER=y +CONFIG_HAVE_FSP_GOP=y +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_RUN_FSP_GOP is not set +# CONFIG_NO_GFX_INIT is not set +CONFIG_NO_EARLY_GFX_INIT=y + +# +# Display +# +# CONFIG_VGA_TEXT_FRAMEBUFFER is not set +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_LINEAR_FRAMEBUFFER=y +# CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y +# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set +# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set +# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 +# end of Display + +CONFIG_PCI=y +CONFIG_ECAM_MMCONF_SUPPORT=y +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_ECAM_MMCONF_LENGTH=0x10000000 +CONFIG_PCI_ALLOW_BUS_MASTER=y +CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y +CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set +# CONFIG_EARLY_PCI_BRIDGE is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +# end of Devices + +# +# Generic Drivers +# +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +CONFIG_CACHE_MRC_SETTINGS=y +CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set +# CONFIG_SMMSTORE is not set +CONFIG_SPI_FLASH=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_DRIVERS_UART=y +# CONFIG_DRIVERS_UART_OXPCIE is not set +# CONFIG_VPD is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVERS_I2C_DESIGNWARE=y +# CONFIG_DRIVERS_I2C_MAX98396 is not set +CONFIG_FSP_USE_REPO=y +# CONFIG_DISPLAY_HOBS is not set +# CONFIG_DISPLAY_UPD_DATA is not set +# CONFIG_BMP_LOGO is not set +CONFIG_PLATFORM_USES_FSP2_0=y +CONFIG_PLATFORM_USES_FSP2_X86_32=y +CONFIG_HAVE_INTEL_FSP_REPO=y +CONFIG_ADD_FSP_BINARIES=y +CONFIG_FSP_S_CBFS="fsps.bin" +CONFIG_FSP_M_CBFS="fspm.bin" +CONFIG_FSP_FULL_FD=y +CONFIG_FSP_T_RESERVED_SIZE=0x0 +CONFIG_FSP_M_XIP=y +CONFIG_HAVE_FSP_LOGO_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_FSP_RESET=y +CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y +CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y +CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y +# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set +# CONFIG_BUILDING_WITH_DEBUG_FSP is not set +CONFIG_INTEL_INT15=y +CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_GFX_GMA=y +CONFIG_GFX_GMA_DYN_CPU=y +CONFIG_GFX_GMA_GENERATION="Skylake" +CONFIG_GFX_GMA_PCH="Sunrise_Point" +CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" +CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set +CONFIG_DRIVERS_MC146818=y +CONFIG_USE_PC_CMOS_ALTCENTURY=y +CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +CONFIG_MEMORY_MAPPED_TPM=y +CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_USB_ACPI=y +CONFIG_DRIVERS_WIFI_GENERIC=y +CONFIG_DRIVERS_MTK_WIFI=y +# end of Generic Drivers + +# +# Security +# + +# +# CBFS verification +# +# CONFIG_CBFS_VERIFICATION is not set +# end of CBFS verification + +# +# Verified Boot (vboot) +# +# end of Verified Boot (vboot) + +# +# Trusted Platform Module +# +CONFIG_NO_TPM=y +# CONFIG_TPM1 is not set +# CONFIG_TPM2 is not set +CONFIG_MAINBOARD_HAS_TPM2=y +CONFIG_PCR_BOOT_MODE=1 +CONFIG_PCR_HWID=1 +CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 +CONFIG_PCR_RUNTIME_DATA=3 +# end of Trusted Platform Module + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set +# end of Memory initialization + +# CONFIG_STM is not set +# CONFIG_INTEL_CBNT_SUPPORT is not set +CONFIG_BOOTMEDIA_LOCK_NONE=y +# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_CHIP is not set +# CONFIG_BOOTMEDIA_SMM_BWP is not set +# end of Security + +CONFIG_ACPI_HAVE_PCAT_8259=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +CONFIG_ACPI_SOC_NVS=y +CONFIG_ACPI_CUSTOM_MADT=y +CONFIG_ACPI_NO_CUSTOM_MADT=y +CONFIG_ACPI_COMMON_MADT_LAPIC=y +CONFIG_ACPI_COMMON_MADT_IOAPIC=y +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_ACPI_LPIT=y +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y +CONFIG_RTC=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y + +# +# I/O mapped, 8250-compatible +# +CONFIG_TTYS0_BASE=0x3f8 + +# +# Serial port base address = 0x3f8 +# +# CONFIG_CONSOLE_SERIAL_921600 is not set +# CONFIG_CONSOLE_SERIAL_460800 is not set +# CONFIG_CONSOLE_SERIAL_230400 is not set +CONFIG_CONSOLE_SERIAL_115200=y +# CONFIG_CONSOLE_SERIAL_57600 is not set +# CONFIG_CONSOLE_SERIAL_38400 is not set +# CONFIG_CONSOLE_SERIAL_19200 is not set +# CONFIG_CONSOLE_SERIAL_9600 is not set +CONFIG_TTYS0_LCS=3 +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_SPI_FLASH is not set +# CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CMOS_POST is not set +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_POST_IO_PORT=0x80 +CONFIG_HWBASE_DEBUG_CB=y +# end of Console + +CONFIG_ACPI_S1_NOT_SUPPORTED=y +CONFIG_HAVE_ACPI_RESUME=y +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_IOAPIC=y +CONFIG_ACPI_NHLT=y + +# +# System tables +# +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_BIOS_VENDOR="coreboot" +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" +# end of System tables + +# +# Payload +# +CONFIG_PAYLOAD_NONE=y +# end of Payload + +# +# Debugging +# + +# +# CPU Debug Settings +# +# CONFIG_DISPLAY_MTRRS is not set + +# +# Vendorcode Debug Settings +# + +# +# BLOB Debug Settings +# +# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set +# CONFIG_DISPLAY_FSP_HEADER is not set +# CONFIG_VERIFY_HOBS is not set +# CONFIG_DISPLAY_FSP_VERSION_INFO is not set +CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y +# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set + +# +# General Debug Settings +# +# CONFIG_GDB_STUB is not set +CONFIG_HAVE_DEBUG_GPIO=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set +# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set +# end of Debugging + +CONFIG_RAMSTAGE_ADA=y +CONFIG_RAMSTAGE_LIBHWBASE=y +CONFIG_SPD_READ_BY_WORD=y +CONFIG_HWBASE_DYNAMIC_MMIO=y +CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 +CONFIG_HWBASE_DIRECT_PCIDEV=y +CONFIG_DECOMPRESS_OFAST=y +CONFIG_WARNINGS_ARE_ERRORS=y +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode new file mode 100644 index 00000000..7596816a --- /dev/null +++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode @@ -0,0 +1,848 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_LTO is not set +# CONFIG_IWYU is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +CONFIG_OPTION_BACKEND_NONE=y +CONFIG_COMPRESS_RAMSTAGE_LZMA=y +# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_USE_QC_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_RAMSTAGE=y +# CONFIG_ASAN is not set +# CONFIG_NO_STAGE_CACHE is not set +CONFIG_TSEG_STAGE_CACHE=y +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_BOOTSPLASH_IMAGE is not set + +# +# Software Bill Of Materials (SBOM) +# +# CONFIG_SBOM is not set +# end of Software Bill Of Materials (SBOM) +# end of General setup + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +# CONFIG_VENDOR_ACER is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BOSTENTECH is not set +# CONFIG_VENDOR_BYTEDANCE is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_CLEVO is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set +# CONFIG_VENDOR_DELL is not set +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set +# CONFIG_VENDOR_EXAMPLE is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_INVENTEC is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set +CONFIG_VENDOR_LENOVO=y +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PINE64 is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PRODRIVE is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_STARLABS is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set +# CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set +CONFIG_MAINBOARD_FAMILY="T480" +CONFIG_MAINBOARD_PART_NUMBER="T480" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad" +CONFIG_VGA_BIOS_ID="8086,0406" +CONFIG_DIMM_MAX=2 +CONFIG_DIMM_SPD_SIZE=512 +CONFIG_FMDFILE="" +# CONFIG_NO_POST is not set +CONFIG_MAINBOARD_VENDOR="LENOVO" +CONFIG_CBFS_SIZE=0xEEC000 +CONFIG_CONSOLE_SERIAL=y +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y +CONFIG_MAX_CPUS=8 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_IO=y +CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="t480" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set +# CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" +# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480" +# CONFIG_CONSOLE_POST is not set +CONFIG_MAX_SOCKET=1 +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +CONFIG_TPM_PIRQ=0x0 +CONFIG_USE_PM_ACPI_TIMER=y +CONFIG_DCACHE_RAM_BASE=0xfef00000 +CONFIG_DCACHE_RAM_SIZE=0x40000 +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 +CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_USE_LEGACY_8254_TIMER=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_DRIVERS_INTEL_WIFI=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16" +CONFIG_ME_BIN_PATH="../../../vendorfiles/t480/me.bin" +CONFIG_GBE_BIN_PATH="../../../config/ifd/t480/gbe" +CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +# CONFIG_DEBUG_SMI is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set +CONFIG_HAVE_IFD_BIN=y +# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set +# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set +# CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set +# CONFIG_BOARD_LENOVO_S230U is not set +CONFIG_BOARD_LENOVO_T480=y +# CONFIG_BOARD_LENOVO_T480S is not set +# CONFIG_BOARD_LENOVO_T400 is not set +# CONFIG_BOARD_LENOVO_T500 is not set +# CONFIG_BOARD_LENOVO_R400 is not set +# CONFIG_BOARD_LENOVO_R500 is not set +# CONFIG_BOARD_LENOVO_W500 is not set +# CONFIG_BOARD_LENOVO_T410 is not set +# CONFIG_BOARD_LENOVO_T420 is not set +# CONFIG_BOARD_LENOVO_T420S is not set +# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set +# CONFIG_BOARD_LENOVO_T430S is not set +# CONFIG_BOARD_LENOVO_T431S is not set +# CONFIG_BOARD_LENOVO_T520 is not set +# CONFIG_BOARD_LENOVO_W520 is not set +# CONFIG_BOARD_LENOVO_T530 is not set +# CONFIG_BOARD_LENOVO_W530 is not set +# CONFIG_BOARD_LENOVO_T60 is not set +# CONFIG_BOARD_LENOVO_Z61T is not set +# CONFIG_BOARD_LENOVO_R60 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set +# CONFIG_BOARD_LENOVO_X131E is not set +# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set +# CONFIG_BOARD_LENOVO_X200 is not set +# CONFIG_BOARD_LENOVO_X301 is not set +# CONFIG_BOARD_LENOVO_X201 is not set +# CONFIG_BOARD_LENOVO_X220 is not set +# CONFIG_BOARD_LENOVO_X220I is not set +# CONFIG_BOARD_LENOVO_X1 is not set +# CONFIG_BOARD_LENOVO_X230 is not set +# CONFIG_BOARD_LENOVO_X230T is not set +# CONFIG_BOARD_LENOVO_X230S is not set +# CONFIG_BOARD_LENOVO_X230_EDP is not set +# CONFIG_BOARD_LENOVO_X60 is not set +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="PNP0F13" +CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" +CONFIG_GFX_GMA_PANEL_1_PORT="eDP" +CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y +CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin" +CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set +CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y +CONFIG_D3COLD_SUPPORT=y +CONFIG_GFX_GMA_PANEL_1_ON_EDP=y +CONFIG_DRIVERS_UART_8250IO=y +CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 +CONFIG_HEAP_SIZE=0x100000 +CONFIG_EC_GPE_SCI=0x50 +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +CONFIG_BOARD_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=16384 +CONFIG_ROM_SIZE=0x01000000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set +CONFIG_POWER_STATE_ON_AFTER_FAILURE=y +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 +# end of Mainboard + +CONFIG_SYSTEM_TYPE_LAPTOP=y + +# +# Chipset +# + +# +# SoC +# +CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" +CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" +CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" +CONFIG_CBFS_MCACHE_SIZE=0x4000 +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_SMM_TSEG_SIZE=0x800000 +CONFIG_SMM_RESERVED_SIZE=0x200000 +CONFIG_SMM_MODULE_STACK_SIZE=0x800 +CONFIG_ACPI_BERT_SIZE=0x0 +CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 +CONFIG_ACPI_CPU_STRING="CP%02X" +CONFIG_STACK_SIZE=0x2000 +CONFIG_IFD_CHIPSET="sklkbl" +CONFIG_IED_REGION_SIZE=0x400000 +CONFIG_MAX_ROOT_PORTS=24 +CONFIG_PCR_BASE_ADDRESS=0xfd000000 +CONFIG_CPU_BCLK_MHZ=100 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120 +CONFIG_CPU_XTAL_HZ=24000000 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2 +CONFIG_SOC_INTEL_I2C_DEV_MAX=6 +# CONFIG_ENABLE_SATA_TEST_MODE is not set +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" +CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" +CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 +CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 +CONFIG_INTEL_GMA_BCLV_WIDTH=16 +CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 +CONFIG_INTEL_GMA_BCLM_WIDTH=16 +CONFIG_FSP_PUBLISH_MBP_HOB=y +CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 +CONFIG_MAX_HECI_DEVICES=5 +CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_HAVE_PAM0_REGISTER=y +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000 +CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10 +CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 +CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 +CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y +CONFIG_SOC_INTEL_KABYLAKE=y +CONFIG_FSP_T_LOCATION=0xfffe0000 +CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y +CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 +CONFIG_CBFS_CACHE_ALIGN=8 +CONFIG_SOC_INTEL_COMMON=y + +# +# Intel SoC Common Code for IP blocks +# +CONFIG_SOC_INTEL_COMMON_BLOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y +CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y +# CONFIG_USE_COREBOOT_MP_INIT is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y +CONFIG_INTEL_CAR_NEM_ENHANCED=y +# CONFIG_USE_INTEL_FSP_MP_INIT is not set +CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y +CONFIG_HAVE_HYPERTHREADING=y +# CONFIG_FSP_HYPERTHREADING is not set +# CONFIG_INTEL_KEYLOCKER is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y +CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" +CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" +CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" +CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" +CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" +CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" +CONFIG_SOC_INTEL_CSE_RW_FILE="" +CONFIG_SOC_INTEL_CSE_RW_VERSION="" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE="" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE="" +CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y +CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y +CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y +# CONFIG_SOC_INTEL_DISABLE_IGD is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y +CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y +# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 +CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y +CONFIG_SA_ENABLE_DPR=y +CONFIG_HAVE_CAPID_A_REGISTER=y +CONFIG_HAVE_BDSM_BGSM_REGISTER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y + +# +# Intel SoC Common PCH Code +# +CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y +CONFIG_SOC_INTEL_COMMON_PCH_BASE=y +CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y +CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y +CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y +CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y + +# +# Intel SoC Common coreboot stages and non-IP blocks +# +CONFIG_SOC_INTEL_COMMON_BASECODE=y +CONFIG_SOC_INTEL_COMMON_RESET=y +CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y +CONFIG_PAVP=y +# CONFIG_MMA is not set +CONFIG_SOC_INTEL_COMMON_NHLT=y +# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set + +# +# CPU +# +CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_PARALLEL_MP=y +CONFIG_PARALLEL_MP_AP_WORK=y +CONFIG_XAPIC_ONLY=y +# CONFIG_X2APIC_ONLY is not set +# CONFIG_X2APIC_RUNTIME is not set +# CONFIG_X2APIC_LATE_WORKAROUND is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_HAVE_SMI_HANDLER=y +CONFIG_SMM_TSEG=y +CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 +CONFIG_AP_STACK_SIZE=0x800 +CONFIG_SMP=y +CONFIG_SSE=y +CONFIG_SSE2=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# + +# +# Southbridge +# +# CONFIG_PCIEXP_HOTPLUG is not set +CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 +CONFIG_RCBA_LENGTH=0x4000 + +# +# Super I/O +# + +# +# Embedded Controllers +# +CONFIG_EC_ACPI=y +CONFIG_EC_LENOVO_H8=y +CONFIG_H8_BEEP_ON_DEATH=y +CONFIG_H8_FLASH_LEDS_ON_DEATH=y +# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set +# CONFIG_H8_FN_CTRL_SWAP is not set +CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_PRIMARY_FN_KEYS=y +CONFIG_H8_HAS_LEDLOGO=y +CONFIG_EC_LENOVO_PMH7=y + +# +# Intel Firmware +# +CONFIG_HAVE_ME_BIN=y +# CONFIG_STITCH_ME_BIN is not set +# CONFIG_CHECK_ME is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set +# CONFIG_USE_ME_CLEANER is not set +CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y +CONFIG_HAVE_GBE_BIN=y +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 +CONFIG_UDK_BASE=y +CONFIG_UDK_2017_BINDING=y +CONFIG_UDK_2013_VERSION=2013 +CONFIG_UDK_2017_VERSION=2017 +CONFIG_UDK_202005_VERSION=202005 +CONFIG_UDK_202111_VERSION=202111 +CONFIG_UDK_202302_VERSION=202302 +CONFIG_UDK_202305_VERSION=202305 +CONFIG_UDK_VERSION=2017 +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_ARCH_ALL_STAGES_X86_32=y +CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_PC80_SYSTEM=y +CONFIG_POSTCAR_STAGE=y +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_HAVE_CF9_RESET=y +CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +# CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 +# end of Chipset + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_LINEAR_FRAMEBUFFER=y +CONFIG_HAVE_FSP_GOP=y +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_RUN_FSP_GOP is not set +# CONFIG_NO_GFX_INIT is not set +CONFIG_NO_EARLY_GFX_INIT=y + +# +# Display +# +CONFIG_VGA_TEXT_FRAMEBUFFER=y +# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 +# end of Display + +CONFIG_PCI=y +CONFIG_ECAM_MMCONF_SUPPORT=y +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_ECAM_MMCONF_LENGTH=0x10000000 +CONFIG_PCI_ALLOW_BUS_MASTER=y +CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y +CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set +# CONFIG_EARLY_PCI_BRIDGE is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +# end of Devices + +# +# Generic Drivers +# +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +CONFIG_CACHE_MRC_SETTINGS=y +CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set +# CONFIG_SMMSTORE is not set +CONFIG_SPI_FLASH=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_DRIVERS_UART=y +# CONFIG_DRIVERS_UART_OXPCIE is not set +# CONFIG_VPD is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVERS_I2C_DESIGNWARE=y +# CONFIG_DRIVERS_I2C_MAX98396 is not set +CONFIG_FSP_USE_REPO=y +# CONFIG_DISPLAY_HOBS is not set +# CONFIG_DISPLAY_UPD_DATA is not set +# CONFIG_BMP_LOGO is not set +CONFIG_PLATFORM_USES_FSP2_0=y +CONFIG_PLATFORM_USES_FSP2_X86_32=y +CONFIG_HAVE_INTEL_FSP_REPO=y +CONFIG_ADD_FSP_BINARIES=y +CONFIG_FSP_S_CBFS="fsps.bin" +CONFIG_FSP_M_CBFS="fspm.bin" +CONFIG_FSP_FULL_FD=y +CONFIG_FSP_T_RESERVED_SIZE=0x0 +CONFIG_FSP_M_XIP=y +CONFIG_HAVE_FSP_LOGO_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_FSP_RESET=y +CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y +CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y +CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y +# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set +# CONFIG_BUILDING_WITH_DEBUG_FSP is not set +CONFIG_INTEL_INT15=y +CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_GFX_GMA=y +CONFIG_GFX_GMA_DYN_CPU=y +CONFIG_GFX_GMA_GENERATION="Skylake" +CONFIG_GFX_GMA_PCH="Sunrise_Point" +CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" +CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set +CONFIG_DRIVERS_MC146818=y +CONFIG_USE_PC_CMOS_ALTCENTURY=y +CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +CONFIG_MEMORY_MAPPED_TPM=y +CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 +CONFIG_VGA=y +# CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_USB_ACPI=y +CONFIG_DRIVERS_WIFI_GENERIC=y +CONFIG_DRIVERS_MTK_WIFI=y +# end of Generic Drivers + +# +# Security +# + +# +# CBFS verification +# +# CONFIG_CBFS_VERIFICATION is not set +# end of CBFS verification + +# +# Verified Boot (vboot) +# +# end of Verified Boot (vboot) + +# +# Trusted Platform Module +# +CONFIG_NO_TPM=y +# CONFIG_TPM1 is not set +# CONFIG_TPM2 is not set +CONFIG_MAINBOARD_HAS_TPM2=y +CONFIG_PCR_BOOT_MODE=1 +CONFIG_PCR_HWID=1 +CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 +CONFIG_PCR_RUNTIME_DATA=3 +# end of Trusted Platform Module + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set +# end of Memory initialization + +# CONFIG_STM is not set +# CONFIG_INTEL_CBNT_SUPPORT is not set +CONFIG_BOOTMEDIA_LOCK_NONE=y +# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_CHIP is not set +# CONFIG_BOOTMEDIA_SMM_BWP is not set +# end of Security + +CONFIG_ACPI_HAVE_PCAT_8259=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +CONFIG_ACPI_SOC_NVS=y +CONFIG_ACPI_CUSTOM_MADT=y +CONFIG_ACPI_NO_CUSTOM_MADT=y +CONFIG_ACPI_COMMON_MADT_LAPIC=y +CONFIG_ACPI_COMMON_MADT_IOAPIC=y +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_ACPI_LPIT=y +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y +CONFIG_RTC=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y + +# +# I/O mapped, 8250-compatible +# +CONFIG_TTYS0_BASE=0x3f8 + +# +# Serial port base address = 0x3f8 +# +# CONFIG_CONSOLE_SERIAL_921600 is not set +# CONFIG_CONSOLE_SERIAL_460800 is not set +# CONFIG_CONSOLE_SERIAL_230400 is not set +CONFIG_CONSOLE_SERIAL_115200=y +# CONFIG_CONSOLE_SERIAL_57600 is not set +# CONFIG_CONSOLE_SERIAL_38400 is not set +# CONFIG_CONSOLE_SERIAL_19200 is not set +# CONFIG_CONSOLE_SERIAL_9600 is not set +CONFIG_TTYS0_LCS=3 +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_SPI_FLASH is not set +# CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CMOS_POST is not set +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_POST_IO_PORT=0x80 +CONFIG_HWBASE_DEBUG_CB=y +# end of Console + +CONFIG_ACPI_S1_NOT_SUPPORTED=y +CONFIG_HAVE_ACPI_RESUME=y +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_IOAPIC=y +CONFIG_ACPI_NHLT=y + +# +# System tables +# +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_BIOS_VENDOR="coreboot" +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" +# end of System tables + +# +# Payload +# +CONFIG_PAYLOAD_NONE=y +# end of Payload + +# +# Debugging +# + +# +# CPU Debug Settings +# +# CONFIG_DISPLAY_MTRRS is not set + +# +# Vendorcode Debug Settings +# + +# +# BLOB Debug Settings +# +# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set +# CONFIG_DISPLAY_FSP_HEADER is not set +# CONFIG_VERIFY_HOBS is not set +# CONFIG_DISPLAY_FSP_VERSION_INFO is not set +CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y +# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set + +# +# General Debug Settings +# +# CONFIG_GDB_STUB is not set +CONFIG_HAVE_DEBUG_GPIO=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set +# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set +# end of Debugging + +CONFIG_RAMSTAGE_ADA=y +CONFIG_RAMSTAGE_LIBHWBASE=y +CONFIG_SPD_READ_BY_WORD=y +CONFIG_HWBASE_DYNAMIC_MMIO=y +CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 +CONFIG_HWBASE_DIRECT_PCIDEV=y +CONFIG_DECOMPRESS_OFAST=y +CONFIG_WARNINGS_ARE_ERRORS=y +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/t480_fsp_16mb/target.cfg b/config/coreboot/t480_fsp_16mb/target.cfg new file mode 100644 index 00000000..d0ddd743 --- /dev/null +++ b/config/coreboot/t480_fsp_16mb/target.cfg @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +tree="next" +xarch="i386-elf" +payload_seabios="y" +payload_grub="y" +payload_memtest="y" +grub_scan_disk="nvme ahci" +grubtree="xhci" +vcfg="t480" +build_depend="seabios/default grub/xhci memtest86plus" +IFD_platform="sklkbl" +release="n" # t480_vfsp_16mb is released instead diff --git a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb new file mode 100644 index 00000000..5dea5962 --- /dev/null +++ b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb @@ -0,0 +1,855 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_LTO is not set +# CONFIG_IWYU is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +CONFIG_OPTION_BACKEND_NONE=y +CONFIG_COMPRESS_RAMSTAGE_LZMA=y +# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_USE_QC_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_RAMSTAGE=y +# CONFIG_ASAN is not set +# CONFIG_NO_STAGE_CACHE is not set +CONFIG_TSEG_STAGE_CACHE=y +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_BOOTSPLASH_IMAGE is not set + +# +# Software Bill Of Materials (SBOM) +# +# CONFIG_SBOM is not set +# end of Software Bill Of Materials (SBOM) +# end of General setup + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +# CONFIG_VENDOR_ACER is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BOSTENTECH is not set +# CONFIG_VENDOR_BYTEDANCE is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_CLEVO is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set +# CONFIG_VENDOR_DELL is not set +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set +# CONFIG_VENDOR_EXAMPLE is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_INVENTEC is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set +CONFIG_VENDOR_LENOVO=y +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PINE64 is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PRODRIVE is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_STARLABS is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set +# CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set +CONFIG_MAINBOARD_FAMILY="T480" +CONFIG_MAINBOARD_PART_NUMBER="T480" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad" +CONFIG_VGA_BIOS_ID="8086,0406" +CONFIG_DIMM_MAX=2 +CONFIG_DIMM_SPD_SIZE=512 +CONFIG_FMDFILE="" +# CONFIG_NO_POST is not set +CONFIG_MAINBOARD_VENDOR="LENOVO" +CONFIG_CBFS_SIZE=0xEEC000 +CONFIG_CONSOLE_SERIAL=y +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560 +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y +CONFIG_MAX_CPUS=8 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_IO=y +CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="t480" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set +# CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" +# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480" +# CONFIG_CONSOLE_POST is not set +CONFIG_MAX_SOCKET=1 +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +CONFIG_TPM_PIRQ=0x0 +CONFIG_USE_PM_ACPI_TIMER=y +CONFIG_DCACHE_RAM_BASE=0xfef00000 +CONFIG_DCACHE_RAM_SIZE=0x40000 +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 +CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_USE_LEGACY_8254_TIMER=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_DRIVERS_INTEL_WIFI=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16" +CONFIG_ME_BIN_PATH="../../../vendorfiles/t480/me.bin" +CONFIG_GBE_BIN_PATH="../../../config/ifd/t480/gbe" +CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +# CONFIG_DEBUG_SMI is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set +CONFIG_HAVE_IFD_BIN=y +# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set +# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set +# CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set +# CONFIG_BOARD_LENOVO_S230U is not set +CONFIG_BOARD_LENOVO_T480=y +# CONFIG_BOARD_LENOVO_T480S is not set +# CONFIG_BOARD_LENOVO_T400 is not set +# CONFIG_BOARD_LENOVO_T500 is not set +# CONFIG_BOARD_LENOVO_R400 is not set +# CONFIG_BOARD_LENOVO_R500 is not set +# CONFIG_BOARD_LENOVO_W500 is not set +# CONFIG_BOARD_LENOVO_T410 is not set +# CONFIG_BOARD_LENOVO_T420 is not set +# CONFIG_BOARD_LENOVO_T420S is not set +# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set +# CONFIG_BOARD_LENOVO_T430S is not set +# CONFIG_BOARD_LENOVO_T431S is not set +# CONFIG_BOARD_LENOVO_T520 is not set +# CONFIG_BOARD_LENOVO_W520 is not set +# CONFIG_BOARD_LENOVO_T530 is not set +# CONFIG_BOARD_LENOVO_W530 is not set +# CONFIG_BOARD_LENOVO_T60 is not set +# CONFIG_BOARD_LENOVO_Z61T is not set +# CONFIG_BOARD_LENOVO_R60 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set +# CONFIG_BOARD_LENOVO_X131E is not set +# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set +# CONFIG_BOARD_LENOVO_X200 is not set +# CONFIG_BOARD_LENOVO_X301 is not set +# CONFIG_BOARD_LENOVO_X201 is not set +# CONFIG_BOARD_LENOVO_X220 is not set +# CONFIG_BOARD_LENOVO_X220I is not set +# CONFIG_BOARD_LENOVO_X1 is not set +# CONFIG_BOARD_LENOVO_X230 is not set +# CONFIG_BOARD_LENOVO_X230T is not set +# CONFIG_BOARD_LENOVO_X230S is not set +# CONFIG_BOARD_LENOVO_X230_EDP is not set +# CONFIG_BOARD_LENOVO_X60 is not set +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="PNP0F13" +CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" +CONFIG_GFX_GMA_PANEL_1_PORT="eDP" +CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y +CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin" +CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set +CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y +CONFIG_D3COLD_SUPPORT=y +CONFIG_GFX_GMA_PANEL_1_ON_EDP=y +CONFIG_DRIVERS_UART_8250IO=y +CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 +CONFIG_HEAP_SIZE=0x100000 +CONFIG_EC_GPE_SCI=0x50 +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +CONFIG_BOARD_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=16384 +CONFIG_ROM_SIZE=0x01000000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set +CONFIG_POWER_STATE_ON_AFTER_FAILURE=y +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 +# end of Mainboard + +CONFIG_SYSTEM_TYPE_LAPTOP=y + +# +# Chipset +# + +# +# SoC +# +CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" +CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" +CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" +CONFIG_CBFS_MCACHE_SIZE=0x4000 +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_SMM_TSEG_SIZE=0x800000 +CONFIG_SMM_RESERVED_SIZE=0x200000 +CONFIG_SMM_MODULE_STACK_SIZE=0x800 +CONFIG_ACPI_BERT_SIZE=0x0 +CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 +CONFIG_ACPI_CPU_STRING="CP%02X" +CONFIG_STACK_SIZE=0x2000 +CONFIG_IFD_CHIPSET="sklkbl" +CONFIG_IED_REGION_SIZE=0x400000 +CONFIG_MAX_ROOT_PORTS=24 +CONFIG_PCR_BASE_ADDRESS=0xfd000000 +CONFIG_CPU_BCLK_MHZ=100 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120 +CONFIG_CPU_XTAL_HZ=24000000 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2 +CONFIG_SOC_INTEL_I2C_DEV_MAX=6 +# CONFIG_ENABLE_SATA_TEST_MODE is not set +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" +CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" +CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 +CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 +CONFIG_INTEL_GMA_BCLV_WIDTH=16 +CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 +CONFIG_INTEL_GMA_BCLM_WIDTH=16 +CONFIG_FSP_PUBLISH_MBP_HOB=y +CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 +CONFIG_MAX_HECI_DEVICES=5 +CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_HAVE_PAM0_REGISTER=y +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000 +CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10 +CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 +CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 +CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y +CONFIG_SOC_INTEL_KABYLAKE=y +CONFIG_FSP_T_LOCATION=0xfffe0000 +CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y +CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 +CONFIG_CBFS_CACHE_ALIGN=8 +CONFIG_SOC_INTEL_COMMON=y + +# +# Intel SoC Common Code for IP blocks +# +CONFIG_SOC_INTEL_COMMON_BLOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y +CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y +# CONFIG_USE_COREBOOT_MP_INIT is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y +CONFIG_INTEL_CAR_NEM_ENHANCED=y +# CONFIG_USE_INTEL_FSP_MP_INIT is not set +CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y +CONFIG_HAVE_HYPERTHREADING=y +# CONFIG_FSP_HYPERTHREADING is not set +# CONFIG_INTEL_KEYLOCKER is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y +CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" +CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" +CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" +CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" +CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" +CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" +CONFIG_SOC_INTEL_CSE_RW_FILE="" +CONFIG_SOC_INTEL_CSE_RW_VERSION="" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE="" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE="" +CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y +CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y +CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y +# CONFIG_SOC_INTEL_DISABLE_IGD is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y +CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y +# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 +CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y +CONFIG_SA_ENABLE_DPR=y +CONFIG_HAVE_CAPID_A_REGISTER=y +CONFIG_HAVE_BDSM_BGSM_REGISTER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y + +# +# Intel SoC Common PCH Code +# +CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y +CONFIG_SOC_INTEL_COMMON_PCH_BASE=y +CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y +CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y +CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y +CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y + +# +# Intel SoC Common coreboot stages and non-IP blocks +# +CONFIG_SOC_INTEL_COMMON_BASECODE=y +CONFIG_SOC_INTEL_COMMON_RESET=y +CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y +CONFIG_PAVP=y +# CONFIG_MMA is not set +CONFIG_SOC_INTEL_COMMON_NHLT=y +# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set + +# +# CPU +# +CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_PARALLEL_MP=y +CONFIG_PARALLEL_MP_AP_WORK=y +CONFIG_XAPIC_ONLY=y +# CONFIG_X2APIC_ONLY is not set +# CONFIG_X2APIC_RUNTIME is not set +# CONFIG_X2APIC_LATE_WORKAROUND is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_HAVE_SMI_HANDLER=y +CONFIG_SMM_TSEG=y +CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 +CONFIG_AP_STACK_SIZE=0x800 +CONFIG_SMP=y +CONFIG_SSE=y +CONFIG_SSE2=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# + +# +# Southbridge +# +# CONFIG_PCIEXP_HOTPLUG is not set +CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 +CONFIG_RCBA_LENGTH=0x4000 + +# +# Super I/O +# + +# +# Embedded Controllers +# +CONFIG_EC_ACPI=y +CONFIG_EC_LENOVO_H8=y +CONFIG_H8_BEEP_ON_DEATH=y +CONFIG_H8_FLASH_LEDS_ON_DEATH=y +# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set +# CONFIG_H8_FN_CTRL_SWAP is not set +CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_PRIMARY_FN_KEYS=y +CONFIG_H8_HAS_LEDLOGO=y +CONFIG_EC_LENOVO_PMH7=y + +# +# Intel Firmware +# +CONFIG_HAVE_ME_BIN=y +# CONFIG_STITCH_ME_BIN is not set +# CONFIG_CHECK_ME is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set +# CONFIG_USE_ME_CLEANER is not set +CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y +CONFIG_HAVE_GBE_BIN=y +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 +CONFIG_UDK_BASE=y +CONFIG_UDK_2017_BINDING=y +CONFIG_UDK_2013_VERSION=2013 +CONFIG_UDK_2017_VERSION=2017 +CONFIG_UDK_202005_VERSION=202005 +CONFIG_UDK_202111_VERSION=202111 +CONFIG_UDK_202302_VERSION=202302 +CONFIG_UDK_202305_VERSION=202305 +CONFIG_UDK_VERSION=2017 +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_ARCH_ALL_STAGES_X86_32=y +CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_PC80_SYSTEM=y +CONFIG_POSTCAR_STAGE=y +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_HAVE_CF9_RESET=y +CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +# CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 +# end of Chipset + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_LINEAR_FRAMEBUFFER=y +CONFIG_HAVE_FSP_GOP=y +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_RUN_FSP_GOP is not set +# CONFIG_NO_GFX_INIT is not set +CONFIG_NO_EARLY_GFX_INIT=y + +# +# Display +# +# CONFIG_VGA_TEXT_FRAMEBUFFER is not set +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_LINEAR_FRAMEBUFFER=y +# CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y +# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set +# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set +# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 +# end of Display + +CONFIG_PCI=y +CONFIG_ECAM_MMCONF_SUPPORT=y +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_ECAM_MMCONF_LENGTH=0x10000000 +CONFIG_PCI_ALLOW_BUS_MASTER=y +CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y +CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set +# CONFIG_EARLY_PCI_BRIDGE is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +# end of Devices + +# +# Generic Drivers +# +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +CONFIG_CACHE_MRC_SETTINGS=y +CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set +# CONFIG_SMMSTORE is not set +CONFIG_SPI_FLASH=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_DRIVERS_UART=y +# CONFIG_DRIVERS_UART_OXPCIE is not set +# CONFIG_VPD is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVERS_I2C_DESIGNWARE=y +# CONFIG_DRIVERS_I2C_MAX98396 is not set +# CONFIG_FSP_USE_REPO is not set +# CONFIG_DISPLAY_HOBS is not set +# CONFIG_DISPLAY_UPD_DATA is not set +# CONFIG_BMP_LOGO is not set +CONFIG_PLATFORM_USES_FSP2_0=y +CONFIG_PLATFORM_USES_FSP2_X86_32=y +CONFIG_HAVE_INTEL_FSP_REPO=y +CONFIG_ADD_FSP_BINARIES=y +CONFIG_FSP_S_CBFS="fsps.bin" +CONFIG_FSP_M_CBFS="fspm.bin" +# CONFIG_FSP_FULL_FD is not set +CONFIG_FSP_T_RESERVED_SIZE=0x0 +CONFIG_FSP_M_XIP=y +CONFIG_HAVE_FSP_LOGO_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_FSP_RESET=y +CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y +CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y +CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y +# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set +# CONFIG_BUILDING_WITH_DEBUG_FSP is not set +CONFIG_INTEL_INT15=y +CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_GFX_GMA=y +CONFIG_GFX_GMA_DYN_CPU=y +CONFIG_GFX_GMA_GENERATION="Skylake" +CONFIG_GFX_GMA_PCH="Sunrise_Point" +CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" +CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set +CONFIG_DRIVERS_MC146818=y +CONFIG_USE_PC_CMOS_ALTCENTURY=y +CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +CONFIG_MEMORY_MAPPED_TPM=y +CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_USB_ACPI=y +CONFIG_DRIVERS_WIFI_GENERIC=y +CONFIG_DRIVERS_MTK_WIFI=y +# end of Generic Drivers + +# +# Security +# + +# +# CBFS verification +# +# CONFIG_CBFS_VERIFICATION is not set +# end of CBFS verification + +# +# Verified Boot (vboot) +# +# end of Verified Boot (vboot) + +# +# Trusted Platform Module +# +CONFIG_NO_TPM=y +# CONFIG_TPM1 is not set +# CONFIG_TPM2 is not set +CONFIG_MAINBOARD_HAS_TPM2=y +CONFIG_PCR_BOOT_MODE=1 +CONFIG_PCR_HWID=1 +CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 +CONFIG_PCR_RUNTIME_DATA=3 +# end of Trusted Platform Module + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set +# end of Memory initialization + +# CONFIG_STM is not set +# CONFIG_INTEL_CBNT_SUPPORT is not set +CONFIG_BOOTMEDIA_LOCK_NONE=y +# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_CHIP is not set +# CONFIG_BOOTMEDIA_SMM_BWP is not set +# end of Security + +CONFIG_ACPI_HAVE_PCAT_8259=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +CONFIG_ACPI_SOC_NVS=y +CONFIG_ACPI_CUSTOM_MADT=y +CONFIG_ACPI_NO_CUSTOM_MADT=y +CONFIG_ACPI_COMMON_MADT_LAPIC=y +CONFIG_ACPI_COMMON_MADT_IOAPIC=y +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_ACPI_LPIT=y +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y +CONFIG_RTC=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y + +# +# I/O mapped, 8250-compatible +# +CONFIG_TTYS0_BASE=0x3f8 + +# +# Serial port base address = 0x3f8 +# +# CONFIG_CONSOLE_SERIAL_921600 is not set +# CONFIG_CONSOLE_SERIAL_460800 is not set +# CONFIG_CONSOLE_SERIAL_230400 is not set +CONFIG_CONSOLE_SERIAL_115200=y +# CONFIG_CONSOLE_SERIAL_57600 is not set +# CONFIG_CONSOLE_SERIAL_38400 is not set +# CONFIG_CONSOLE_SERIAL_19200 is not set +# CONFIG_CONSOLE_SERIAL_9600 is not set +CONFIG_TTYS0_LCS=3 +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_SPI_FLASH is not set +# CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CMOS_POST is not set +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_POST_IO_PORT=0x80 +CONFIG_HWBASE_DEBUG_CB=y +# end of Console + +CONFIG_ACPI_S1_NOT_SUPPORTED=y +CONFIG_HAVE_ACPI_RESUME=y +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_IOAPIC=y +CONFIG_ACPI_NHLT=y + +# +# System tables +# +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_BIOS_VENDOR="coreboot" +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" +# end of System tables + +# +# Payload +# +CONFIG_PAYLOAD_NONE=y +# end of Payload + +# +# Debugging +# + +# +# CPU Debug Settings +# +# CONFIG_DISPLAY_MTRRS is not set + +# +# Vendorcode Debug Settings +# + +# +# BLOB Debug Settings +# +# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set +# CONFIG_DISPLAY_FSP_HEADER is not set +# CONFIG_VERIFY_HOBS is not set +# CONFIG_DISPLAY_FSP_VERSION_INFO is not set +CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y +# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set + +# +# General Debug Settings +# +# CONFIG_GDB_STUB is not set +CONFIG_HAVE_DEBUG_GPIO=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set +# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set +# end of Debugging + +CONFIG_RAMSTAGE_ADA=y +CONFIG_RAMSTAGE_LIBHWBASE=y +CONFIG_SPD_READ_BY_WORD=y +CONFIG_HWBASE_DYNAMIC_MMIO=y +CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 +CONFIG_HWBASE_DIRECT_PCIDEV=y +CONFIG_DECOMPRESS_OFAST=y +CONFIG_WARNINGS_ARE_ERRORS=y +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode new file mode 100644 index 00000000..1aedc109 --- /dev/null +++ b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode @@ -0,0 +1,848 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_LTO is not set +# CONFIG_IWYU is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +CONFIG_OPTION_BACKEND_NONE=y +CONFIG_COMPRESS_RAMSTAGE_LZMA=y +# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_USE_QC_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_RAMSTAGE=y +# CONFIG_ASAN is not set +# CONFIG_NO_STAGE_CACHE is not set +CONFIG_TSEG_STAGE_CACHE=y +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_BOOTSPLASH_IMAGE is not set + +# +# Software Bill Of Materials (SBOM) +# +# CONFIG_SBOM is not set +# end of Software Bill Of Materials (SBOM) +# end of General setup + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +# CONFIG_VENDOR_ACER is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BOSTENTECH is not set +# CONFIG_VENDOR_BYTEDANCE is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_CLEVO is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set +# CONFIG_VENDOR_DELL is not set +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set +# CONFIG_VENDOR_EXAMPLE is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_INVENTEC is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set +CONFIG_VENDOR_LENOVO=y +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PINE64 is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PRODRIVE is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_STARLABS is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set +# CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set +CONFIG_MAINBOARD_FAMILY="T480" +CONFIG_MAINBOARD_PART_NUMBER="T480" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad" +CONFIG_VGA_BIOS_ID="8086,0406" +CONFIG_DIMM_MAX=2 +CONFIG_DIMM_SPD_SIZE=512 +CONFIG_FMDFILE="" +# CONFIG_NO_POST is not set +CONFIG_MAINBOARD_VENDOR="LENOVO" +CONFIG_CBFS_SIZE=0xEEC000 +CONFIG_CONSOLE_SERIAL=y +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y +CONFIG_MAX_CPUS=8 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_IO=y +CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="t480" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set +# CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" +# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480" +# CONFIG_CONSOLE_POST is not set +CONFIG_MAX_SOCKET=1 +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +CONFIG_TPM_PIRQ=0x0 +CONFIG_USE_PM_ACPI_TIMER=y +CONFIG_DCACHE_RAM_BASE=0xfef00000 +CONFIG_DCACHE_RAM_SIZE=0x40000 +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 +CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_USE_LEGACY_8254_TIMER=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_DRIVERS_INTEL_WIFI=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16" +CONFIG_ME_BIN_PATH="../../../vendorfiles/t480/me.bin" +CONFIG_GBE_BIN_PATH="../../../config/ifd/t480/gbe" +CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +# CONFIG_DEBUG_SMI is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set +CONFIG_HAVE_IFD_BIN=y +# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set +# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set +# CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set +# CONFIG_BOARD_LENOVO_S230U is not set +CONFIG_BOARD_LENOVO_T480=y +# CONFIG_BOARD_LENOVO_T480S is not set +# CONFIG_BOARD_LENOVO_T400 is not set +# CONFIG_BOARD_LENOVO_T500 is not set +# CONFIG_BOARD_LENOVO_R400 is not set +# CONFIG_BOARD_LENOVO_R500 is not set +# CONFIG_BOARD_LENOVO_W500 is not set +# CONFIG_BOARD_LENOVO_T410 is not set +# CONFIG_BOARD_LENOVO_T420 is not set +# CONFIG_BOARD_LENOVO_T420S is not set +# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set +# CONFIG_BOARD_LENOVO_T430S is not set +# CONFIG_BOARD_LENOVO_T431S is not set +# CONFIG_BOARD_LENOVO_T520 is not set +# CONFIG_BOARD_LENOVO_W520 is not set +# CONFIG_BOARD_LENOVO_T530 is not set +# CONFIG_BOARD_LENOVO_W530 is not set +# CONFIG_BOARD_LENOVO_T60 is not set +# CONFIG_BOARD_LENOVO_Z61T is not set +# CONFIG_BOARD_LENOVO_R60 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set +# CONFIG_BOARD_LENOVO_X131E is not set +# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set +# CONFIG_BOARD_LENOVO_X200 is not set +# CONFIG_BOARD_LENOVO_X301 is not set +# CONFIG_BOARD_LENOVO_X201 is not set +# CONFIG_BOARD_LENOVO_X220 is not set +# CONFIG_BOARD_LENOVO_X220I is not set +# CONFIG_BOARD_LENOVO_X1 is not set +# CONFIG_BOARD_LENOVO_X230 is not set +# CONFIG_BOARD_LENOVO_X230T is not set +# CONFIG_BOARD_LENOVO_X230S is not set +# CONFIG_BOARD_LENOVO_X230_EDP is not set +# CONFIG_BOARD_LENOVO_X60 is not set +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="PNP0F13" +CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" +CONFIG_GFX_GMA_PANEL_1_PORT="eDP" +CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y +CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin" +CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set +CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y +CONFIG_D3COLD_SUPPORT=y +CONFIG_GFX_GMA_PANEL_1_ON_EDP=y +CONFIG_DRIVERS_UART_8250IO=y +CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 +CONFIG_HEAP_SIZE=0x100000 +CONFIG_EC_GPE_SCI=0x50 +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +CONFIG_BOARD_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=16384 +CONFIG_ROM_SIZE=0x01000000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set +CONFIG_POWER_STATE_ON_AFTER_FAILURE=y +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 +# end of Mainboard + +CONFIG_SYSTEM_TYPE_LAPTOP=y + +# +# Chipset +# + +# +# SoC +# +CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" +CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" +CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" +CONFIG_CBFS_MCACHE_SIZE=0x4000 +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_SMM_TSEG_SIZE=0x800000 +CONFIG_SMM_RESERVED_SIZE=0x200000 +CONFIG_SMM_MODULE_STACK_SIZE=0x800 +CONFIG_ACPI_BERT_SIZE=0x0 +CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 +CONFIG_ACPI_CPU_STRING="CP%02X" +CONFIG_STACK_SIZE=0x2000 +CONFIG_IFD_CHIPSET="sklkbl" +CONFIG_IED_REGION_SIZE=0x400000 +CONFIG_MAX_ROOT_PORTS=24 +CONFIG_PCR_BASE_ADDRESS=0xfd000000 +CONFIG_CPU_BCLK_MHZ=100 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120 +CONFIG_CPU_XTAL_HZ=24000000 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2 +CONFIG_SOC_INTEL_I2C_DEV_MAX=6 +# CONFIG_ENABLE_SATA_TEST_MODE is not set +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" +CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" +CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 +CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 +CONFIG_INTEL_GMA_BCLV_WIDTH=16 +CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 +CONFIG_INTEL_GMA_BCLM_WIDTH=16 +CONFIG_FSP_PUBLISH_MBP_HOB=y +CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 +CONFIG_MAX_HECI_DEVICES=5 +CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_HAVE_PAM0_REGISTER=y +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000 +CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10 +CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 +CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 +CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y +CONFIG_SOC_INTEL_KABYLAKE=y +CONFIG_FSP_T_LOCATION=0xfffe0000 +CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y +CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 +CONFIG_CBFS_CACHE_ALIGN=8 +CONFIG_SOC_INTEL_COMMON=y + +# +# Intel SoC Common Code for IP blocks +# +CONFIG_SOC_INTEL_COMMON_BLOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y +CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y +# CONFIG_USE_COREBOOT_MP_INIT is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y +CONFIG_INTEL_CAR_NEM_ENHANCED=y +# CONFIG_USE_INTEL_FSP_MP_INIT is not set +CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y +CONFIG_HAVE_HYPERTHREADING=y +# CONFIG_FSP_HYPERTHREADING is not set +# CONFIG_INTEL_KEYLOCKER is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y +CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" +CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" +CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" +CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" +CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" +CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" +CONFIG_SOC_INTEL_CSE_RW_FILE="" +CONFIG_SOC_INTEL_CSE_RW_VERSION="" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE="" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE="" +CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y +CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y +CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y +# CONFIG_SOC_INTEL_DISABLE_IGD is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y +CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y +# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 +CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y +CONFIG_SA_ENABLE_DPR=y +CONFIG_HAVE_CAPID_A_REGISTER=y +CONFIG_HAVE_BDSM_BGSM_REGISTER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y + +# +# Intel SoC Common PCH Code +# +CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y +CONFIG_SOC_INTEL_COMMON_PCH_BASE=y +CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y +CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y +CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y +CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y + +# +# Intel SoC Common coreboot stages and non-IP blocks +# +CONFIG_SOC_INTEL_COMMON_BASECODE=y +CONFIG_SOC_INTEL_COMMON_RESET=y +CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y +CONFIG_PAVP=y +# CONFIG_MMA is not set +CONFIG_SOC_INTEL_COMMON_NHLT=y +# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set + +# +# CPU +# +CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_PARALLEL_MP=y +CONFIG_PARALLEL_MP_AP_WORK=y +CONFIG_XAPIC_ONLY=y +# CONFIG_X2APIC_ONLY is not set +# CONFIG_X2APIC_RUNTIME is not set +# CONFIG_X2APIC_LATE_WORKAROUND is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_HAVE_SMI_HANDLER=y +CONFIG_SMM_TSEG=y +CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 +CONFIG_AP_STACK_SIZE=0x800 +CONFIG_SMP=y +CONFIG_SSE=y +CONFIG_SSE2=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# + +# +# Southbridge +# +# CONFIG_PCIEXP_HOTPLUG is not set +CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 +CONFIG_RCBA_LENGTH=0x4000 + +# +# Super I/O +# + +# +# Embedded Controllers +# +CONFIG_EC_ACPI=y +CONFIG_EC_LENOVO_H8=y +CONFIG_H8_BEEP_ON_DEATH=y +CONFIG_H8_FLASH_LEDS_ON_DEATH=y +# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set +# CONFIG_H8_FN_CTRL_SWAP is not set +CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_PRIMARY_FN_KEYS=y +CONFIG_H8_HAS_LEDLOGO=y +CONFIG_EC_LENOVO_PMH7=y + +# +# Intel Firmware +# +CONFIG_HAVE_ME_BIN=y +# CONFIG_STITCH_ME_BIN is not set +# CONFIG_CHECK_ME is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set +# CONFIG_USE_ME_CLEANER is not set +CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y +CONFIG_HAVE_GBE_BIN=y +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 +CONFIG_UDK_BASE=y +CONFIG_UDK_2017_BINDING=y +CONFIG_UDK_2013_VERSION=2013 +CONFIG_UDK_2017_VERSION=2017 +CONFIG_UDK_202005_VERSION=202005 +CONFIG_UDK_202111_VERSION=202111 +CONFIG_UDK_202302_VERSION=202302 +CONFIG_UDK_202305_VERSION=202305 +CONFIG_UDK_VERSION=2017 +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_ARCH_ALL_STAGES_X86_32=y +CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_PC80_SYSTEM=y +CONFIG_POSTCAR_STAGE=y +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_HAVE_CF9_RESET=y +CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +# CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 +# end of Chipset + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_LINEAR_FRAMEBUFFER=y +CONFIG_HAVE_FSP_GOP=y +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_RUN_FSP_GOP is not set +# CONFIG_NO_GFX_INIT is not set +CONFIG_NO_EARLY_GFX_INIT=y + +# +# Display +# +CONFIG_VGA_TEXT_FRAMEBUFFER=y +# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 +# end of Display + +CONFIG_PCI=y +CONFIG_ECAM_MMCONF_SUPPORT=y +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_ECAM_MMCONF_LENGTH=0x10000000 +CONFIG_PCI_ALLOW_BUS_MASTER=y +CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y +CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set +# CONFIG_EARLY_PCI_BRIDGE is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +# end of Devices + +# +# Generic Drivers +# +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +CONFIG_CACHE_MRC_SETTINGS=y +CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set +# CONFIG_SMMSTORE is not set +CONFIG_SPI_FLASH=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_DRIVERS_UART=y +# CONFIG_DRIVERS_UART_OXPCIE is not set +# CONFIG_VPD is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVERS_I2C_DESIGNWARE=y +# CONFIG_DRIVERS_I2C_MAX98396 is not set +# CONFIG_FSP_USE_REPO is not set +# CONFIG_DISPLAY_HOBS is not set +# CONFIG_DISPLAY_UPD_DATA is not set +# CONFIG_BMP_LOGO is not set +CONFIG_PLATFORM_USES_FSP2_0=y +CONFIG_PLATFORM_USES_FSP2_X86_32=y +CONFIG_HAVE_INTEL_FSP_REPO=y +CONFIG_ADD_FSP_BINARIES=y +CONFIG_FSP_S_CBFS="fsps.bin" +CONFIG_FSP_M_CBFS="fspm.bin" +# CONFIG_FSP_FULL_FD is not set +CONFIG_FSP_T_RESERVED_SIZE=0x0 +CONFIG_FSP_M_XIP=y +CONFIG_HAVE_FSP_LOGO_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_FSP_RESET=y +CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y +CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y +CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y +# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set +# CONFIG_BUILDING_WITH_DEBUG_FSP is not set +CONFIG_INTEL_INT15=y +CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_GFX_GMA=y +CONFIG_GFX_GMA_DYN_CPU=y +CONFIG_GFX_GMA_GENERATION="Skylake" +CONFIG_GFX_GMA_PCH="Sunrise_Point" +CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" +CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set +CONFIG_DRIVERS_MC146818=y +CONFIG_USE_PC_CMOS_ALTCENTURY=y +CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +CONFIG_MEMORY_MAPPED_TPM=y +CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 +CONFIG_VGA=y +# CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_USB_ACPI=y +CONFIG_DRIVERS_WIFI_GENERIC=y +CONFIG_DRIVERS_MTK_WIFI=y +# end of Generic Drivers + +# +# Security +# + +# +# CBFS verification +# +# CONFIG_CBFS_VERIFICATION is not set +# end of CBFS verification + +# +# Verified Boot (vboot) +# +# end of Verified Boot (vboot) + +# +# Trusted Platform Module +# +CONFIG_NO_TPM=y +# CONFIG_TPM1 is not set +# CONFIG_TPM2 is not set +CONFIG_MAINBOARD_HAS_TPM2=y +CONFIG_PCR_BOOT_MODE=1 +CONFIG_PCR_HWID=1 +CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 +CONFIG_PCR_RUNTIME_DATA=3 +# end of Trusted Platform Module + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set +# end of Memory initialization + +# CONFIG_STM is not set +# CONFIG_INTEL_CBNT_SUPPORT is not set +CONFIG_BOOTMEDIA_LOCK_NONE=y +# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_CHIP is not set +# CONFIG_BOOTMEDIA_SMM_BWP is not set +# end of Security + +CONFIG_ACPI_HAVE_PCAT_8259=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +CONFIG_ACPI_SOC_NVS=y +CONFIG_ACPI_CUSTOM_MADT=y +CONFIG_ACPI_NO_CUSTOM_MADT=y +CONFIG_ACPI_COMMON_MADT_LAPIC=y +CONFIG_ACPI_COMMON_MADT_IOAPIC=y +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_ACPI_LPIT=y +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y +CONFIG_RTC=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y + +# +# I/O mapped, 8250-compatible +# +CONFIG_TTYS0_BASE=0x3f8 + +# +# Serial port base address = 0x3f8 +# +# CONFIG_CONSOLE_SERIAL_921600 is not set +# CONFIG_CONSOLE_SERIAL_460800 is not set +# CONFIG_CONSOLE_SERIAL_230400 is not set +CONFIG_CONSOLE_SERIAL_115200=y +# CONFIG_CONSOLE_SERIAL_57600 is not set +# CONFIG_CONSOLE_SERIAL_38400 is not set +# CONFIG_CONSOLE_SERIAL_19200 is not set +# CONFIG_CONSOLE_SERIAL_9600 is not set +CONFIG_TTYS0_LCS=3 +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_SPI_FLASH is not set +# CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CMOS_POST is not set +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_POST_IO_PORT=0x80 +CONFIG_HWBASE_DEBUG_CB=y +# end of Console + +CONFIG_ACPI_S1_NOT_SUPPORTED=y +CONFIG_HAVE_ACPI_RESUME=y +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_IOAPIC=y +CONFIG_ACPI_NHLT=y + +# +# System tables +# +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_BIOS_VENDOR="coreboot" +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" +# end of System tables + +# +# Payload +# +CONFIG_PAYLOAD_NONE=y +# end of Payload + +# +# Debugging +# + +# +# CPU Debug Settings +# +# CONFIG_DISPLAY_MTRRS is not set + +# +# Vendorcode Debug Settings +# + +# +# BLOB Debug Settings +# +# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set +# CONFIG_DISPLAY_FSP_HEADER is not set +# CONFIG_VERIFY_HOBS is not set +# CONFIG_DISPLAY_FSP_VERSION_INFO is not set +CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y +# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set + +# +# General Debug Settings +# +# CONFIG_GDB_STUB is not set +CONFIG_HAVE_DEBUG_GPIO=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set +# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set +# end of Debugging + +CONFIG_RAMSTAGE_ADA=y +CONFIG_RAMSTAGE_LIBHWBASE=y +CONFIG_SPD_READ_BY_WORD=y +CONFIG_HWBASE_DYNAMIC_MMIO=y +CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 +CONFIG_HWBASE_DIRECT_PCIDEV=y +CONFIG_DECOMPRESS_OFAST=y +CONFIG_WARNINGS_ARE_ERRORS=y +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/t480_vfsp_16mb/target.cfg b/config/coreboot/t480_vfsp_16mb/target.cfg new file mode 100644 index 00000000..9ac608b7 --- /dev/null +++ b/config/coreboot/t480_vfsp_16mb/target.cfg @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +tree="next" +xarch="i386-elf" +payload_seabios="y" +payload_grub="y" +payload_memtest="y" +grub_scan_disk="nvme ahci" +grubtree="xhci" +vcfg="t480" +build_depend="seabios/default grub/xhci memtest86plus" +IFD_platform="sklkbl" diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb new file mode 100644 index 00000000..2505b389 --- /dev/null +++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb @@ -0,0 +1,855 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_LTO is not set +# CONFIG_IWYU is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +CONFIG_OPTION_BACKEND_NONE=y +CONFIG_COMPRESS_RAMSTAGE_LZMA=y +# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_USE_QC_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_RAMSTAGE=y +# CONFIG_ASAN is not set +# CONFIG_NO_STAGE_CACHE is not set +CONFIG_TSEG_STAGE_CACHE=y +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_BOOTSPLASH_IMAGE is not set + +# +# Software Bill Of Materials (SBOM) +# +# CONFIG_SBOM is not set +# end of Software Bill Of Materials (SBOM) +# end of General setup + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +# CONFIG_VENDOR_ACER is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BOSTENTECH is not set +# CONFIG_VENDOR_BYTEDANCE is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_CLEVO is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set +# CONFIG_VENDOR_DELL is not set +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set +# CONFIG_VENDOR_EXAMPLE is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_INVENTEC is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set +CONFIG_VENDOR_LENOVO=y +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PINE64 is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PRODRIVE is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_STARLABS is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set +# CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set +CONFIG_MAINBOARD_FAMILY="T480S" +CONFIG_MAINBOARD_PART_NUMBER="T480S" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad" +CONFIG_VGA_BIOS_ID="8086,0406" +CONFIG_DIMM_MAX=2 +CONFIG_DIMM_SPD_SIZE=512 +CONFIG_FMDFILE="" +# CONFIG_NO_POST is not set +CONFIG_MAINBOARD_VENDOR="LENOVO" +CONFIG_CBFS_SIZE=0xEEC000 +CONFIG_CONSOLE_SERIAL=y +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560 +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y +CONFIG_MAX_CPUS=8 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_IO=y +CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="t480s" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set +# CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" +# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480S" +# CONFIG_CONSOLE_POST is not set +CONFIG_MAX_SOCKET=1 +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +CONFIG_TPM_PIRQ=0x0 +CONFIG_USE_PM_ACPI_TIMER=y +CONFIG_DCACHE_RAM_BASE=0xfef00000 +CONFIG_DCACHE_RAM_SIZE=0x40000 +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 +CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_USE_LEGACY_8254_TIMER=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_DRIVERS_INTEL_WIFI=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/t480s/ifd_16" +CONFIG_ME_BIN_PATH="../../../vendorfiles/t480s/me.bin" +CONFIG_GBE_BIN_PATH="../../../config/ifd/t480s/gbe" +CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +# CONFIG_DEBUG_SMI is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set +CONFIG_HAVE_IFD_BIN=y +# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set +# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set +# CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set +# CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +CONFIG_BOARD_LENOVO_T480S=y +# CONFIG_BOARD_LENOVO_T400 is not set +# CONFIG_BOARD_LENOVO_T500 is not set +# CONFIG_BOARD_LENOVO_R400 is not set +# CONFIG_BOARD_LENOVO_R500 is not set +# CONFIG_BOARD_LENOVO_W500 is not set +# CONFIG_BOARD_LENOVO_T410 is not set +# CONFIG_BOARD_LENOVO_T420 is not set +# CONFIG_BOARD_LENOVO_T420S is not set +# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set +# CONFIG_BOARD_LENOVO_T430S is not set +# CONFIG_BOARD_LENOVO_T431S is not set +# CONFIG_BOARD_LENOVO_T520 is not set +# CONFIG_BOARD_LENOVO_W520 is not set +# CONFIG_BOARD_LENOVO_T530 is not set +# CONFIG_BOARD_LENOVO_W530 is not set +# CONFIG_BOARD_LENOVO_T60 is not set +# CONFIG_BOARD_LENOVO_Z61T is not set +# CONFIG_BOARD_LENOVO_R60 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set +# CONFIG_BOARD_LENOVO_X131E is not set +# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set +# CONFIG_BOARD_LENOVO_X200 is not set +# CONFIG_BOARD_LENOVO_X301 is not set +# CONFIG_BOARD_LENOVO_X201 is not set +# CONFIG_BOARD_LENOVO_X220 is not set +# CONFIG_BOARD_LENOVO_X220I is not set +# CONFIG_BOARD_LENOVO_X1 is not set +# CONFIG_BOARD_LENOVO_X230 is not set +# CONFIG_BOARD_LENOVO_X230T is not set +# CONFIG_BOARD_LENOVO_X230S is not set +# CONFIG_BOARD_LENOVO_X230_EDP is not set +# CONFIG_BOARD_LENOVO_X60 is not set +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="PNP0F13" +CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" +CONFIG_GFX_GMA_PANEL_1_PORT="eDP" +CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y +CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin" +CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set +CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y +CONFIG_D3COLD_SUPPORT=y +CONFIG_GFX_GMA_PANEL_1_ON_EDP=y +CONFIG_DRIVERS_UART_8250IO=y +CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 +CONFIG_HEAP_SIZE=0x100000 +CONFIG_EC_GPE_SCI=0x50 +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +CONFIG_BOARD_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=16384 +CONFIG_ROM_SIZE=0x01000000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set +CONFIG_POWER_STATE_ON_AFTER_FAILURE=y +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 +# end of Mainboard + +CONFIG_SYSTEM_TYPE_LAPTOP=y + +# +# Chipset +# + +# +# SoC +# +CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" +CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" +CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" +CONFIG_CBFS_MCACHE_SIZE=0x4000 +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_SMM_TSEG_SIZE=0x800000 +CONFIG_SMM_RESERVED_SIZE=0x200000 +CONFIG_SMM_MODULE_STACK_SIZE=0x800 +CONFIG_ACPI_BERT_SIZE=0x0 +CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 +CONFIG_ACPI_CPU_STRING="CP%02X" +CONFIG_STACK_SIZE=0x2000 +CONFIG_IFD_CHIPSET="sklkbl" +CONFIG_IED_REGION_SIZE=0x400000 +CONFIG_MAX_ROOT_PORTS=24 +CONFIG_PCR_BASE_ADDRESS=0xfd000000 +CONFIG_CPU_BCLK_MHZ=100 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120 +CONFIG_CPU_XTAL_HZ=24000000 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2 +CONFIG_SOC_INTEL_I2C_DEV_MAX=6 +# CONFIG_ENABLE_SATA_TEST_MODE is not set +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" +CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" +CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 +CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 +CONFIG_INTEL_GMA_BCLV_WIDTH=16 +CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 +CONFIG_INTEL_GMA_BCLM_WIDTH=16 +CONFIG_FSP_PUBLISH_MBP_HOB=y +CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 +CONFIG_MAX_HECI_DEVICES=5 +CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_HAVE_PAM0_REGISTER=y +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000 +CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10 +CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 +CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 +CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y +CONFIG_SOC_INTEL_KABYLAKE=y +CONFIG_FSP_T_LOCATION=0xfffe0000 +CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y +CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 +CONFIG_CBFS_CACHE_ALIGN=8 +CONFIG_SOC_INTEL_COMMON=y + +# +# Intel SoC Common Code for IP blocks +# +CONFIG_SOC_INTEL_COMMON_BLOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y +CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y +# CONFIG_USE_COREBOOT_MP_INIT is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y +CONFIG_INTEL_CAR_NEM_ENHANCED=y +# CONFIG_USE_INTEL_FSP_MP_INIT is not set +CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y +CONFIG_HAVE_HYPERTHREADING=y +# CONFIG_FSP_HYPERTHREADING is not set +# CONFIG_INTEL_KEYLOCKER is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y +CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" +CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" +CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" +CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" +CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" +CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" +CONFIG_SOC_INTEL_CSE_RW_FILE="" +CONFIG_SOC_INTEL_CSE_RW_VERSION="" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE="" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE="" +CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y +CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y +CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y +# CONFIG_SOC_INTEL_DISABLE_IGD is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y +CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y +# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 +CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y +CONFIG_SA_ENABLE_DPR=y +CONFIG_HAVE_CAPID_A_REGISTER=y +CONFIG_HAVE_BDSM_BGSM_REGISTER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y + +# +# Intel SoC Common PCH Code +# +CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y +CONFIG_SOC_INTEL_COMMON_PCH_BASE=y +CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y +CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y +CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y +CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y + +# +# Intel SoC Common coreboot stages and non-IP blocks +# +CONFIG_SOC_INTEL_COMMON_BASECODE=y +CONFIG_SOC_INTEL_COMMON_RESET=y +CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y +CONFIG_PAVP=y +# CONFIG_MMA is not set +CONFIG_SOC_INTEL_COMMON_NHLT=y +# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set + +# +# CPU +# +CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_PARALLEL_MP=y +CONFIG_PARALLEL_MP_AP_WORK=y +CONFIG_XAPIC_ONLY=y +# CONFIG_X2APIC_ONLY is not set +# CONFIG_X2APIC_RUNTIME is not set +# CONFIG_X2APIC_LATE_WORKAROUND is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_HAVE_SMI_HANDLER=y +CONFIG_SMM_TSEG=y +CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 +CONFIG_AP_STACK_SIZE=0x800 +CONFIG_SMP=y +CONFIG_SSE=y +CONFIG_SSE2=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# + +# +# Southbridge +# +# CONFIG_PCIEXP_HOTPLUG is not set +CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 +CONFIG_RCBA_LENGTH=0x4000 + +# +# Super I/O +# + +# +# Embedded Controllers +# +CONFIG_EC_ACPI=y +CONFIG_EC_LENOVO_H8=y +CONFIG_H8_BEEP_ON_DEATH=y +CONFIG_H8_FLASH_LEDS_ON_DEATH=y +# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set +# CONFIG_H8_FN_CTRL_SWAP is not set +CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_PRIMARY_FN_KEYS=y +CONFIG_H8_HAS_LEDLOGO=y +CONFIG_EC_LENOVO_PMH7=y + +# +# Intel Firmware +# +CONFIG_HAVE_ME_BIN=y +# CONFIG_STITCH_ME_BIN is not set +# CONFIG_CHECK_ME is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set +# CONFIG_USE_ME_CLEANER is not set +CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y +CONFIG_HAVE_GBE_BIN=y +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 +CONFIG_UDK_BASE=y +CONFIG_UDK_2017_BINDING=y +CONFIG_UDK_2013_VERSION=2013 +CONFIG_UDK_2017_VERSION=2017 +CONFIG_UDK_202005_VERSION=202005 +CONFIG_UDK_202111_VERSION=202111 +CONFIG_UDK_202302_VERSION=202302 +CONFIG_UDK_202305_VERSION=202305 +CONFIG_UDK_VERSION=2017 +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_ARCH_ALL_STAGES_X86_32=y +CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_PC80_SYSTEM=y +CONFIG_POSTCAR_STAGE=y +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_HAVE_CF9_RESET=y +CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +# CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 +# end of Chipset + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_LINEAR_FRAMEBUFFER=y +CONFIG_HAVE_FSP_GOP=y +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_RUN_FSP_GOP is not set +# CONFIG_NO_GFX_INIT is not set +CONFIG_NO_EARLY_GFX_INIT=y + +# +# Display +# +# CONFIG_VGA_TEXT_FRAMEBUFFER is not set +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_LINEAR_FRAMEBUFFER=y +# CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y +# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set +# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set +# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 +# end of Display + +CONFIG_PCI=y +CONFIG_ECAM_MMCONF_SUPPORT=y +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_ECAM_MMCONF_LENGTH=0x10000000 +CONFIG_PCI_ALLOW_BUS_MASTER=y +CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y +CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set +# CONFIG_EARLY_PCI_BRIDGE is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +# end of Devices + +# +# Generic Drivers +# +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +CONFIG_CACHE_MRC_SETTINGS=y +CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set +# CONFIG_SMMSTORE is not set +CONFIG_SPI_FLASH=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_DRIVERS_UART=y +# CONFIG_DRIVERS_UART_OXPCIE is not set +# CONFIG_VPD is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVERS_I2C_DESIGNWARE=y +# CONFIG_DRIVERS_I2C_MAX98396 is not set +CONFIG_FSP_USE_REPO=y +# CONFIG_DISPLAY_HOBS is not set +# CONFIG_DISPLAY_UPD_DATA is not set +# CONFIG_BMP_LOGO is not set +CONFIG_PLATFORM_USES_FSP2_0=y +CONFIG_PLATFORM_USES_FSP2_X86_32=y +CONFIG_HAVE_INTEL_FSP_REPO=y +CONFIG_ADD_FSP_BINARIES=y +CONFIG_FSP_S_CBFS="fsps.bin" +CONFIG_FSP_M_CBFS="fspm.bin" +CONFIG_FSP_FULL_FD=y +CONFIG_FSP_T_RESERVED_SIZE=0x0 +CONFIG_FSP_M_XIP=y +CONFIG_HAVE_FSP_LOGO_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_FSP_RESET=y +CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y +CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y +CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y +# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set +# CONFIG_BUILDING_WITH_DEBUG_FSP is not set +CONFIG_INTEL_INT15=y +CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_GFX_GMA=y +CONFIG_GFX_GMA_DYN_CPU=y +CONFIG_GFX_GMA_GENERATION="Skylake" +CONFIG_GFX_GMA_PCH="Sunrise_Point" +CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" +CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set +CONFIG_DRIVERS_MC146818=y +CONFIG_USE_PC_CMOS_ALTCENTURY=y +CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +CONFIG_MEMORY_MAPPED_TPM=y +CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_USB_ACPI=y +CONFIG_DRIVERS_WIFI_GENERIC=y +CONFIG_DRIVERS_MTK_WIFI=y +# end of Generic Drivers + +# +# Security +# + +# +# CBFS verification +# +# CONFIG_CBFS_VERIFICATION is not set +# end of CBFS verification + +# +# Verified Boot (vboot) +# +# end of Verified Boot (vboot) + +# +# Trusted Platform Module +# +CONFIG_NO_TPM=y +# CONFIG_TPM1 is not set +# CONFIG_TPM2 is not set +CONFIG_MAINBOARD_HAS_TPM2=y +CONFIG_PCR_BOOT_MODE=1 +CONFIG_PCR_HWID=1 +CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 +CONFIG_PCR_RUNTIME_DATA=3 +# end of Trusted Platform Module + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set +# end of Memory initialization + +# CONFIG_STM is not set +# CONFIG_INTEL_CBNT_SUPPORT is not set +CONFIG_BOOTMEDIA_LOCK_NONE=y +# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_CHIP is not set +# CONFIG_BOOTMEDIA_SMM_BWP is not set +# end of Security + +CONFIG_ACPI_HAVE_PCAT_8259=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +CONFIG_ACPI_SOC_NVS=y +CONFIG_ACPI_CUSTOM_MADT=y +CONFIG_ACPI_NO_CUSTOM_MADT=y +CONFIG_ACPI_COMMON_MADT_LAPIC=y +CONFIG_ACPI_COMMON_MADT_IOAPIC=y +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_ACPI_LPIT=y +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y +CONFIG_RTC=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y + +# +# I/O mapped, 8250-compatible +# +CONFIG_TTYS0_BASE=0x3f8 + +# +# Serial port base address = 0x3f8 +# +# CONFIG_CONSOLE_SERIAL_921600 is not set +# CONFIG_CONSOLE_SERIAL_460800 is not set +# CONFIG_CONSOLE_SERIAL_230400 is not set +CONFIG_CONSOLE_SERIAL_115200=y +# CONFIG_CONSOLE_SERIAL_57600 is not set +# CONFIG_CONSOLE_SERIAL_38400 is not set +# CONFIG_CONSOLE_SERIAL_19200 is not set +# CONFIG_CONSOLE_SERIAL_9600 is not set +CONFIG_TTYS0_LCS=3 +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_SPI_FLASH is not set +# CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CMOS_POST is not set +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_POST_IO_PORT=0x80 +CONFIG_HWBASE_DEBUG_CB=y +# end of Console + +CONFIG_ACPI_S1_NOT_SUPPORTED=y +CONFIG_HAVE_ACPI_RESUME=y +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_IOAPIC=y +CONFIG_ACPI_NHLT=y + +# +# System tables +# +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_BIOS_VENDOR="coreboot" +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" +# end of System tables + +# +# Payload +# +CONFIG_PAYLOAD_NONE=y +# end of Payload + +# +# Debugging +# + +# +# CPU Debug Settings +# +# CONFIG_DISPLAY_MTRRS is not set + +# +# Vendorcode Debug Settings +# + +# +# BLOB Debug Settings +# +# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set +# CONFIG_DISPLAY_FSP_HEADER is not set +# CONFIG_VERIFY_HOBS is not set +# CONFIG_DISPLAY_FSP_VERSION_INFO is not set +CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y +# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set + +# +# General Debug Settings +# +# CONFIG_GDB_STUB is not set +CONFIG_HAVE_DEBUG_GPIO=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set +# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set +# end of Debugging + +CONFIG_RAMSTAGE_ADA=y +CONFIG_RAMSTAGE_LIBHWBASE=y +CONFIG_SPD_READ_BY_WORD=y +CONFIG_HWBASE_DYNAMIC_MMIO=y +CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 +CONFIG_HWBASE_DIRECT_PCIDEV=y +CONFIG_DECOMPRESS_OFAST=y +CONFIG_WARNINGS_ARE_ERRORS=y +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode new file mode 100644 index 00000000..407be629 --- /dev/null +++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode @@ -0,0 +1,848 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_LTO is not set +# CONFIG_IWYU is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +CONFIG_OPTION_BACKEND_NONE=y +CONFIG_COMPRESS_RAMSTAGE_LZMA=y +# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_USE_QC_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_RAMSTAGE=y +# CONFIG_ASAN is not set +# CONFIG_NO_STAGE_CACHE is not set +CONFIG_TSEG_STAGE_CACHE=y +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_BOOTSPLASH_IMAGE is not set + +# +# Software Bill Of Materials (SBOM) +# +# CONFIG_SBOM is not set +# end of Software Bill Of Materials (SBOM) +# end of General setup + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +# CONFIG_VENDOR_ACER is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BOSTENTECH is not set +# CONFIG_VENDOR_BYTEDANCE is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_CLEVO is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set +# CONFIG_VENDOR_DELL is not set +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set +# CONFIG_VENDOR_EXAMPLE is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_INVENTEC is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set +CONFIG_VENDOR_LENOVO=y +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PINE64 is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PRODRIVE is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_STARLABS is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set +# CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set +CONFIG_MAINBOARD_FAMILY="T480S" +CONFIG_MAINBOARD_PART_NUMBER="T480S" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad" +CONFIG_VGA_BIOS_ID="8086,0406" +CONFIG_DIMM_MAX=2 +CONFIG_DIMM_SPD_SIZE=512 +CONFIG_FMDFILE="" +# CONFIG_NO_POST is not set +CONFIG_MAINBOARD_VENDOR="LENOVO" +CONFIG_CBFS_SIZE=0xEEC000 +CONFIG_CONSOLE_SERIAL=y +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y +CONFIG_MAX_CPUS=8 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_IO=y +CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="t480s" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set +# CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" +# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480S" +# CONFIG_CONSOLE_POST is not set +CONFIG_MAX_SOCKET=1 +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +CONFIG_TPM_PIRQ=0x0 +CONFIG_USE_PM_ACPI_TIMER=y +CONFIG_DCACHE_RAM_BASE=0xfef00000 +CONFIG_DCACHE_RAM_SIZE=0x40000 +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 +CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_USE_LEGACY_8254_TIMER=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_DRIVERS_INTEL_WIFI=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/t480s/ifd_16" +CONFIG_ME_BIN_PATH="../../../vendorfiles/t480s/me.bin" +CONFIG_GBE_BIN_PATH="../../../config/ifd/t480s/gbe" +CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +# CONFIG_DEBUG_SMI is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set +CONFIG_HAVE_IFD_BIN=y +# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set +# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set +# CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set +# CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +CONFIG_BOARD_LENOVO_T480S=y +# CONFIG_BOARD_LENOVO_T400 is not set +# CONFIG_BOARD_LENOVO_T500 is not set +# CONFIG_BOARD_LENOVO_R400 is not set +# CONFIG_BOARD_LENOVO_R500 is not set +# CONFIG_BOARD_LENOVO_W500 is not set +# CONFIG_BOARD_LENOVO_T410 is not set +# CONFIG_BOARD_LENOVO_T420 is not set +# CONFIG_BOARD_LENOVO_T420S is not set +# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set +# CONFIG_BOARD_LENOVO_T430S is not set +# CONFIG_BOARD_LENOVO_T431S is not set +# CONFIG_BOARD_LENOVO_T520 is not set +# CONFIG_BOARD_LENOVO_W520 is not set +# CONFIG_BOARD_LENOVO_T530 is not set +# CONFIG_BOARD_LENOVO_W530 is not set +# CONFIG_BOARD_LENOVO_T60 is not set +# CONFIG_BOARD_LENOVO_Z61T is not set +# CONFIG_BOARD_LENOVO_R60 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set +# CONFIG_BOARD_LENOVO_X131E is not set +# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set +# CONFIG_BOARD_LENOVO_X200 is not set +# CONFIG_BOARD_LENOVO_X301 is not set +# CONFIG_BOARD_LENOVO_X201 is not set +# CONFIG_BOARD_LENOVO_X220 is not set +# CONFIG_BOARD_LENOVO_X220I is not set +# CONFIG_BOARD_LENOVO_X1 is not set +# CONFIG_BOARD_LENOVO_X230 is not set +# CONFIG_BOARD_LENOVO_X230T is not set +# CONFIG_BOARD_LENOVO_X230S is not set +# CONFIG_BOARD_LENOVO_X230_EDP is not set +# CONFIG_BOARD_LENOVO_X60 is not set +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="PNP0F13" +CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" +CONFIG_GFX_GMA_PANEL_1_PORT="eDP" +CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y +CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin" +CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set +CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y +CONFIG_D3COLD_SUPPORT=y +CONFIG_GFX_GMA_PANEL_1_ON_EDP=y +CONFIG_DRIVERS_UART_8250IO=y +CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 +CONFIG_HEAP_SIZE=0x100000 +CONFIG_EC_GPE_SCI=0x50 +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +CONFIG_BOARD_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=16384 +CONFIG_ROM_SIZE=0x01000000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set +CONFIG_POWER_STATE_ON_AFTER_FAILURE=y +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 +# end of Mainboard + +CONFIG_SYSTEM_TYPE_LAPTOP=y + +# +# Chipset +# + +# +# SoC +# +CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" +CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" +CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" +CONFIG_CBFS_MCACHE_SIZE=0x4000 +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_SMM_TSEG_SIZE=0x800000 +CONFIG_SMM_RESERVED_SIZE=0x200000 +CONFIG_SMM_MODULE_STACK_SIZE=0x800 +CONFIG_ACPI_BERT_SIZE=0x0 +CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 +CONFIG_ACPI_CPU_STRING="CP%02X" +CONFIG_STACK_SIZE=0x2000 +CONFIG_IFD_CHIPSET="sklkbl" +CONFIG_IED_REGION_SIZE=0x400000 +CONFIG_MAX_ROOT_PORTS=24 +CONFIG_PCR_BASE_ADDRESS=0xfd000000 +CONFIG_CPU_BCLK_MHZ=100 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120 +CONFIG_CPU_XTAL_HZ=24000000 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2 +CONFIG_SOC_INTEL_I2C_DEV_MAX=6 +# CONFIG_ENABLE_SATA_TEST_MODE is not set +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" +CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" +CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 +CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 +CONFIG_INTEL_GMA_BCLV_WIDTH=16 +CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 +CONFIG_INTEL_GMA_BCLM_WIDTH=16 +CONFIG_FSP_PUBLISH_MBP_HOB=y +CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 +CONFIG_MAX_HECI_DEVICES=5 +CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_HAVE_PAM0_REGISTER=y +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000 +CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10 +CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 +CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 +CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y +CONFIG_SOC_INTEL_KABYLAKE=y +CONFIG_FSP_T_LOCATION=0xfffe0000 +CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y +CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 +CONFIG_CBFS_CACHE_ALIGN=8 +CONFIG_SOC_INTEL_COMMON=y + +# +# Intel SoC Common Code for IP blocks +# +CONFIG_SOC_INTEL_COMMON_BLOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y +CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y +# CONFIG_USE_COREBOOT_MP_INIT is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y +CONFIG_INTEL_CAR_NEM_ENHANCED=y +# CONFIG_USE_INTEL_FSP_MP_INIT is not set +CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y +CONFIG_HAVE_HYPERTHREADING=y +# CONFIG_FSP_HYPERTHREADING is not set +# CONFIG_INTEL_KEYLOCKER is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y +CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" +CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" +CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" +CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" +CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" +CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" +CONFIG_SOC_INTEL_CSE_RW_FILE="" +CONFIG_SOC_INTEL_CSE_RW_VERSION="" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE="" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE="" +CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y +CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y +CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y +# CONFIG_SOC_INTEL_DISABLE_IGD is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y +CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y +# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 +CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y +CONFIG_SA_ENABLE_DPR=y +CONFIG_HAVE_CAPID_A_REGISTER=y +CONFIG_HAVE_BDSM_BGSM_REGISTER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y + +# +# Intel SoC Common PCH Code +# +CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y +CONFIG_SOC_INTEL_COMMON_PCH_BASE=y +CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y +CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y +CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y +CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y + +# +# Intel SoC Common coreboot stages and non-IP blocks +# +CONFIG_SOC_INTEL_COMMON_BASECODE=y +CONFIG_SOC_INTEL_COMMON_RESET=y +CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y +CONFIG_PAVP=y +# CONFIG_MMA is not set +CONFIG_SOC_INTEL_COMMON_NHLT=y +# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set + +# +# CPU +# +CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_PARALLEL_MP=y +CONFIG_PARALLEL_MP_AP_WORK=y +CONFIG_XAPIC_ONLY=y +# CONFIG_X2APIC_ONLY is not set +# CONFIG_X2APIC_RUNTIME is not set +# CONFIG_X2APIC_LATE_WORKAROUND is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_HAVE_SMI_HANDLER=y +CONFIG_SMM_TSEG=y +CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 +CONFIG_AP_STACK_SIZE=0x800 +CONFIG_SMP=y +CONFIG_SSE=y +CONFIG_SSE2=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# + +# +# Southbridge +# +# CONFIG_PCIEXP_HOTPLUG is not set +CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 +CONFIG_RCBA_LENGTH=0x4000 + +# +# Super I/O +# + +# +# Embedded Controllers +# +CONFIG_EC_ACPI=y +CONFIG_EC_LENOVO_H8=y +CONFIG_H8_BEEP_ON_DEATH=y +CONFIG_H8_FLASH_LEDS_ON_DEATH=y +# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set +# CONFIG_H8_FN_CTRL_SWAP is not set +CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_PRIMARY_FN_KEYS=y +CONFIG_H8_HAS_LEDLOGO=y +CONFIG_EC_LENOVO_PMH7=y + +# +# Intel Firmware +# +CONFIG_HAVE_ME_BIN=y +# CONFIG_STITCH_ME_BIN is not set +# CONFIG_CHECK_ME is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set +# CONFIG_USE_ME_CLEANER is not set +CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y +CONFIG_HAVE_GBE_BIN=y +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 +CONFIG_UDK_BASE=y +CONFIG_UDK_2017_BINDING=y +CONFIG_UDK_2013_VERSION=2013 +CONFIG_UDK_2017_VERSION=2017 +CONFIG_UDK_202005_VERSION=202005 +CONFIG_UDK_202111_VERSION=202111 +CONFIG_UDK_202302_VERSION=202302 +CONFIG_UDK_202305_VERSION=202305 +CONFIG_UDK_VERSION=2017 +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_ARCH_ALL_STAGES_X86_32=y +CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_PC80_SYSTEM=y +CONFIG_POSTCAR_STAGE=y +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_HAVE_CF9_RESET=y +CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +# CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 +# end of Chipset + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_LINEAR_FRAMEBUFFER=y +CONFIG_HAVE_FSP_GOP=y +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_RUN_FSP_GOP is not set +# CONFIG_NO_GFX_INIT is not set +CONFIG_NO_EARLY_GFX_INIT=y + +# +# Display +# +CONFIG_VGA_TEXT_FRAMEBUFFER=y +# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 +# end of Display + +CONFIG_PCI=y +CONFIG_ECAM_MMCONF_SUPPORT=y +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_ECAM_MMCONF_LENGTH=0x10000000 +CONFIG_PCI_ALLOW_BUS_MASTER=y +CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y +CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set +# CONFIG_EARLY_PCI_BRIDGE is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +# end of Devices + +# +# Generic Drivers +# +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +CONFIG_CACHE_MRC_SETTINGS=y +CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set +# CONFIG_SMMSTORE is not set +CONFIG_SPI_FLASH=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_DRIVERS_UART=y +# CONFIG_DRIVERS_UART_OXPCIE is not set +# CONFIG_VPD is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVERS_I2C_DESIGNWARE=y +# CONFIG_DRIVERS_I2C_MAX98396 is not set +CONFIG_FSP_USE_REPO=y +# CONFIG_DISPLAY_HOBS is not set +# CONFIG_DISPLAY_UPD_DATA is not set +# CONFIG_BMP_LOGO is not set +CONFIG_PLATFORM_USES_FSP2_0=y +CONFIG_PLATFORM_USES_FSP2_X86_32=y +CONFIG_HAVE_INTEL_FSP_REPO=y +CONFIG_ADD_FSP_BINARIES=y +CONFIG_FSP_S_CBFS="fsps.bin" +CONFIG_FSP_M_CBFS="fspm.bin" +CONFIG_FSP_FULL_FD=y +CONFIG_FSP_T_RESERVED_SIZE=0x0 +CONFIG_FSP_M_XIP=y +CONFIG_HAVE_FSP_LOGO_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_FSP_RESET=y +CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y +CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y +CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y +# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set +# CONFIG_BUILDING_WITH_DEBUG_FSP is not set +CONFIG_INTEL_INT15=y +CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_GFX_GMA=y +CONFIG_GFX_GMA_DYN_CPU=y +CONFIG_GFX_GMA_GENERATION="Skylake" +CONFIG_GFX_GMA_PCH="Sunrise_Point" +CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" +CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set +CONFIG_DRIVERS_MC146818=y +CONFIG_USE_PC_CMOS_ALTCENTURY=y +CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +CONFIG_MEMORY_MAPPED_TPM=y +CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 +CONFIG_VGA=y +# CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_USB_ACPI=y +CONFIG_DRIVERS_WIFI_GENERIC=y +CONFIG_DRIVERS_MTK_WIFI=y +# end of Generic Drivers + +# +# Security +# + +# +# CBFS verification +# +# CONFIG_CBFS_VERIFICATION is not set +# end of CBFS verification + +# +# Verified Boot (vboot) +# +# end of Verified Boot (vboot) + +# +# Trusted Platform Module +# +CONFIG_NO_TPM=y +# CONFIG_TPM1 is not set +# CONFIG_TPM2 is not set +CONFIG_MAINBOARD_HAS_TPM2=y +CONFIG_PCR_BOOT_MODE=1 +CONFIG_PCR_HWID=1 +CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 +CONFIG_PCR_RUNTIME_DATA=3 +# end of Trusted Platform Module + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set +# end of Memory initialization + +# CONFIG_STM is not set +# CONFIG_INTEL_CBNT_SUPPORT is not set +CONFIG_BOOTMEDIA_LOCK_NONE=y +# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_CHIP is not set +# CONFIG_BOOTMEDIA_SMM_BWP is not set +# end of Security + +CONFIG_ACPI_HAVE_PCAT_8259=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +CONFIG_ACPI_SOC_NVS=y +CONFIG_ACPI_CUSTOM_MADT=y +CONFIG_ACPI_NO_CUSTOM_MADT=y +CONFIG_ACPI_COMMON_MADT_LAPIC=y +CONFIG_ACPI_COMMON_MADT_IOAPIC=y +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_ACPI_LPIT=y +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y +CONFIG_RTC=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y + +# +# I/O mapped, 8250-compatible +# +CONFIG_TTYS0_BASE=0x3f8 + +# +# Serial port base address = 0x3f8 +# +# CONFIG_CONSOLE_SERIAL_921600 is not set +# CONFIG_CONSOLE_SERIAL_460800 is not set +# CONFIG_CONSOLE_SERIAL_230400 is not set +CONFIG_CONSOLE_SERIAL_115200=y +# CONFIG_CONSOLE_SERIAL_57600 is not set +# CONFIG_CONSOLE_SERIAL_38400 is not set +# CONFIG_CONSOLE_SERIAL_19200 is not set +# CONFIG_CONSOLE_SERIAL_9600 is not set +CONFIG_TTYS0_LCS=3 +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_SPI_FLASH is not set +# CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CMOS_POST is not set +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_POST_IO_PORT=0x80 +CONFIG_HWBASE_DEBUG_CB=y +# end of Console + +CONFIG_ACPI_S1_NOT_SUPPORTED=y +CONFIG_HAVE_ACPI_RESUME=y +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_IOAPIC=y +CONFIG_ACPI_NHLT=y + +# +# System tables +# +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_BIOS_VENDOR="coreboot" +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" +# end of System tables + +# +# Payload +# +CONFIG_PAYLOAD_NONE=y +# end of Payload + +# +# Debugging +# + +# +# CPU Debug Settings +# +# CONFIG_DISPLAY_MTRRS is not set + +# +# Vendorcode Debug Settings +# + +# +# BLOB Debug Settings +# +# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set +# CONFIG_DISPLAY_FSP_HEADER is not set +# CONFIG_VERIFY_HOBS is not set +# CONFIG_DISPLAY_FSP_VERSION_INFO is not set +CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y +# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set + +# +# General Debug Settings +# +# CONFIG_GDB_STUB is not set +CONFIG_HAVE_DEBUG_GPIO=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set +# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set +# end of Debugging + +CONFIG_RAMSTAGE_ADA=y +CONFIG_RAMSTAGE_LIBHWBASE=y +CONFIG_SPD_READ_BY_WORD=y +CONFIG_HWBASE_DYNAMIC_MMIO=y +CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 +CONFIG_HWBASE_DIRECT_PCIDEV=y +CONFIG_DECOMPRESS_OFAST=y +CONFIG_WARNINGS_ARE_ERRORS=y +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/t480s_fsp_16mb/target.cfg b/config/coreboot/t480s_fsp_16mb/target.cfg new file mode 100644 index 00000000..855b0c70 --- /dev/null +++ b/config/coreboot/t480s_fsp_16mb/target.cfg @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +tree="next" +xarch="i386-elf" +payload_seabios="y" +payload_grub="y" +payload_memtest="y" +grub_scan_disk="nvme ahci" +grubtree="xhci" +vcfg="t480s" +build_depend="seabios/default grub/xhci memtest86plus" +IFD_platform="sklkbl" +release="n" # t480s_vfsp_16mb is released instead diff --git a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb new file mode 100644 index 00000000..ee006e59 --- /dev/null +++ b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb @@ -0,0 +1,855 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_LTO is not set +# CONFIG_IWYU is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +CONFIG_OPTION_BACKEND_NONE=y +CONFIG_COMPRESS_RAMSTAGE_LZMA=y +# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_USE_QC_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_RAMSTAGE=y +# CONFIG_ASAN is not set +# CONFIG_NO_STAGE_CACHE is not set +CONFIG_TSEG_STAGE_CACHE=y +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_BOOTSPLASH_IMAGE is not set + +# +# Software Bill Of Materials (SBOM) +# +# CONFIG_SBOM is not set +# end of Software Bill Of Materials (SBOM) +# end of General setup + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +# CONFIG_VENDOR_ACER is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BOSTENTECH is not set +# CONFIG_VENDOR_BYTEDANCE is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_CLEVO is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set +# CONFIG_VENDOR_DELL is not set +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set +# CONFIG_VENDOR_EXAMPLE is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_INVENTEC is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set +CONFIG_VENDOR_LENOVO=y +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PINE64 is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PRODRIVE is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_STARLABS is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set +# CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set +CONFIG_MAINBOARD_FAMILY="T480S" +CONFIG_MAINBOARD_PART_NUMBER="T480S" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad" +CONFIG_VGA_BIOS_ID="8086,0406" +CONFIG_DIMM_MAX=2 +CONFIG_DIMM_SPD_SIZE=512 +CONFIG_FMDFILE="" +# CONFIG_NO_POST is not set +CONFIG_MAINBOARD_VENDOR="LENOVO" +CONFIG_CBFS_SIZE=0xEEC000 +CONFIG_CONSOLE_SERIAL=y +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560 +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y +CONFIG_MAX_CPUS=8 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_IO=y +CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="t480s" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set +# CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" +# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480S" +# CONFIG_CONSOLE_POST is not set +CONFIG_MAX_SOCKET=1 +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +CONFIG_TPM_PIRQ=0x0 +CONFIG_USE_PM_ACPI_TIMER=y +CONFIG_DCACHE_RAM_BASE=0xfef00000 +CONFIG_DCACHE_RAM_SIZE=0x40000 +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 +CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_USE_LEGACY_8254_TIMER=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_DRIVERS_INTEL_WIFI=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/t480s/ifd_16" +CONFIG_ME_BIN_PATH="../../../vendorfiles/t480s/me.bin" +CONFIG_GBE_BIN_PATH="../../../config/ifd/t480s/gbe" +CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +# CONFIG_DEBUG_SMI is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set +CONFIG_HAVE_IFD_BIN=y +# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set +# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set +# CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set +# CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +CONFIG_BOARD_LENOVO_T480S=y +# CONFIG_BOARD_LENOVO_T400 is not set +# CONFIG_BOARD_LENOVO_T500 is not set +# CONFIG_BOARD_LENOVO_R400 is not set +# CONFIG_BOARD_LENOVO_R500 is not set +# CONFIG_BOARD_LENOVO_W500 is not set +# CONFIG_BOARD_LENOVO_T410 is not set +# CONFIG_BOARD_LENOVO_T420 is not set +# CONFIG_BOARD_LENOVO_T420S is not set +# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set +# CONFIG_BOARD_LENOVO_T430S is not set +# CONFIG_BOARD_LENOVO_T431S is not set +# CONFIG_BOARD_LENOVO_T520 is not set +# CONFIG_BOARD_LENOVO_W520 is not set +# CONFIG_BOARD_LENOVO_T530 is not set +# CONFIG_BOARD_LENOVO_W530 is not set +# CONFIG_BOARD_LENOVO_T60 is not set +# CONFIG_BOARD_LENOVO_Z61T is not set +# CONFIG_BOARD_LENOVO_R60 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set +# CONFIG_BOARD_LENOVO_X131E is not set +# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set +# CONFIG_BOARD_LENOVO_X200 is not set +# CONFIG_BOARD_LENOVO_X301 is not set +# CONFIG_BOARD_LENOVO_X201 is not set +# CONFIG_BOARD_LENOVO_X220 is not set +# CONFIG_BOARD_LENOVO_X220I is not set +# CONFIG_BOARD_LENOVO_X1 is not set +# CONFIG_BOARD_LENOVO_X230 is not set +# CONFIG_BOARD_LENOVO_X230T is not set +# CONFIG_BOARD_LENOVO_X230S is not set +# CONFIG_BOARD_LENOVO_X230_EDP is not set +# CONFIG_BOARD_LENOVO_X60 is not set +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="PNP0F13" +CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" +CONFIG_GFX_GMA_PANEL_1_PORT="eDP" +CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y +CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin" +CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set +CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y +CONFIG_D3COLD_SUPPORT=y +CONFIG_GFX_GMA_PANEL_1_ON_EDP=y +CONFIG_DRIVERS_UART_8250IO=y +CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 +CONFIG_HEAP_SIZE=0x100000 +CONFIG_EC_GPE_SCI=0x50 +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +CONFIG_BOARD_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=16384 +CONFIG_ROM_SIZE=0x01000000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set +CONFIG_POWER_STATE_ON_AFTER_FAILURE=y +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 +# end of Mainboard + +CONFIG_SYSTEM_TYPE_LAPTOP=y + +# +# Chipset +# + +# +# SoC +# +CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" +CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" +CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" +CONFIG_CBFS_MCACHE_SIZE=0x4000 +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_SMM_TSEG_SIZE=0x800000 +CONFIG_SMM_RESERVED_SIZE=0x200000 +CONFIG_SMM_MODULE_STACK_SIZE=0x800 +CONFIG_ACPI_BERT_SIZE=0x0 +CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 +CONFIG_ACPI_CPU_STRING="CP%02X" +CONFIG_STACK_SIZE=0x2000 +CONFIG_IFD_CHIPSET="sklkbl" +CONFIG_IED_REGION_SIZE=0x400000 +CONFIG_MAX_ROOT_PORTS=24 +CONFIG_PCR_BASE_ADDRESS=0xfd000000 +CONFIG_CPU_BCLK_MHZ=100 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120 +CONFIG_CPU_XTAL_HZ=24000000 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2 +CONFIG_SOC_INTEL_I2C_DEV_MAX=6 +# CONFIG_ENABLE_SATA_TEST_MODE is not set +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" +CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" +CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 +CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 +CONFIG_INTEL_GMA_BCLV_WIDTH=16 +CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 +CONFIG_INTEL_GMA_BCLM_WIDTH=16 +CONFIG_FSP_PUBLISH_MBP_HOB=y +CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 +CONFIG_MAX_HECI_DEVICES=5 +CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_HAVE_PAM0_REGISTER=y +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000 +CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10 +CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 +CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 +CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y +CONFIG_SOC_INTEL_KABYLAKE=y +CONFIG_FSP_T_LOCATION=0xfffe0000 +CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y +CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 +CONFIG_CBFS_CACHE_ALIGN=8 +CONFIG_SOC_INTEL_COMMON=y + +# +# Intel SoC Common Code for IP blocks +# +CONFIG_SOC_INTEL_COMMON_BLOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y +CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y +# CONFIG_USE_COREBOOT_MP_INIT is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y +CONFIG_INTEL_CAR_NEM_ENHANCED=y +# CONFIG_USE_INTEL_FSP_MP_INIT is not set +CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y +CONFIG_HAVE_HYPERTHREADING=y +# CONFIG_FSP_HYPERTHREADING is not set +# CONFIG_INTEL_KEYLOCKER is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y +CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" +CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" +CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" +CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" +CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" +CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" +CONFIG_SOC_INTEL_CSE_RW_FILE="" +CONFIG_SOC_INTEL_CSE_RW_VERSION="" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE="" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE="" +CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y +CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y +CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y +# CONFIG_SOC_INTEL_DISABLE_IGD is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y +CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y +# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 +CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y +CONFIG_SA_ENABLE_DPR=y +CONFIG_HAVE_CAPID_A_REGISTER=y +CONFIG_HAVE_BDSM_BGSM_REGISTER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y + +# +# Intel SoC Common PCH Code +# +CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y +CONFIG_SOC_INTEL_COMMON_PCH_BASE=y +CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y +CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y +CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y +CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y + +# +# Intel SoC Common coreboot stages and non-IP blocks +# +CONFIG_SOC_INTEL_COMMON_BASECODE=y +CONFIG_SOC_INTEL_COMMON_RESET=y +CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y +CONFIG_PAVP=y +# CONFIG_MMA is not set +CONFIG_SOC_INTEL_COMMON_NHLT=y +# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set + +# +# CPU +# +CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_PARALLEL_MP=y +CONFIG_PARALLEL_MP_AP_WORK=y +CONFIG_XAPIC_ONLY=y +# CONFIG_X2APIC_ONLY is not set +# CONFIG_X2APIC_RUNTIME is not set +# CONFIG_X2APIC_LATE_WORKAROUND is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_HAVE_SMI_HANDLER=y +CONFIG_SMM_TSEG=y +CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 +CONFIG_AP_STACK_SIZE=0x800 +CONFIG_SMP=y +CONFIG_SSE=y +CONFIG_SSE2=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# + +# +# Southbridge +# +# CONFIG_PCIEXP_HOTPLUG is not set +CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 +CONFIG_RCBA_LENGTH=0x4000 + +# +# Super I/O +# + +# +# Embedded Controllers +# +CONFIG_EC_ACPI=y +CONFIG_EC_LENOVO_H8=y +CONFIG_H8_BEEP_ON_DEATH=y +CONFIG_H8_FLASH_LEDS_ON_DEATH=y +# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set +# CONFIG_H8_FN_CTRL_SWAP is not set +CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_PRIMARY_FN_KEYS=y +CONFIG_H8_HAS_LEDLOGO=y +CONFIG_EC_LENOVO_PMH7=y + +# +# Intel Firmware +# +CONFIG_HAVE_ME_BIN=y +# CONFIG_STITCH_ME_BIN is not set +# CONFIG_CHECK_ME is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set +# CONFIG_USE_ME_CLEANER is not set +CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y +CONFIG_HAVE_GBE_BIN=y +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 +CONFIG_UDK_BASE=y +CONFIG_UDK_2017_BINDING=y +CONFIG_UDK_2013_VERSION=2013 +CONFIG_UDK_2017_VERSION=2017 +CONFIG_UDK_202005_VERSION=202005 +CONFIG_UDK_202111_VERSION=202111 +CONFIG_UDK_202302_VERSION=202302 +CONFIG_UDK_202305_VERSION=202305 +CONFIG_UDK_VERSION=2017 +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_ARCH_ALL_STAGES_X86_32=y +CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_PC80_SYSTEM=y +CONFIG_POSTCAR_STAGE=y +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_HAVE_CF9_RESET=y +CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +# CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 +# end of Chipset + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_LINEAR_FRAMEBUFFER=y +CONFIG_HAVE_FSP_GOP=y +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_RUN_FSP_GOP is not set +# CONFIG_NO_GFX_INIT is not set +CONFIG_NO_EARLY_GFX_INIT=y + +# +# Display +# +# CONFIG_VGA_TEXT_FRAMEBUFFER is not set +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_LINEAR_FRAMEBUFFER=y +# CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y +# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set +# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set +# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 +# end of Display + +CONFIG_PCI=y +CONFIG_ECAM_MMCONF_SUPPORT=y +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_ECAM_MMCONF_LENGTH=0x10000000 +CONFIG_PCI_ALLOW_BUS_MASTER=y +CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y +CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set +# CONFIG_EARLY_PCI_BRIDGE is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +# end of Devices + +# +# Generic Drivers +# +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +CONFIG_CACHE_MRC_SETTINGS=y +CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set +# CONFIG_SMMSTORE is not set +CONFIG_SPI_FLASH=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_DRIVERS_UART=y +# CONFIG_DRIVERS_UART_OXPCIE is not set +# CONFIG_VPD is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVERS_I2C_DESIGNWARE=y +# CONFIG_DRIVERS_I2C_MAX98396 is not set +# CONFIG_FSP_USE_REPO is not set +# CONFIG_DISPLAY_HOBS is not set +# CONFIG_DISPLAY_UPD_DATA is not set +# CONFIG_BMP_LOGO is not set +CONFIG_PLATFORM_USES_FSP2_0=y +CONFIG_PLATFORM_USES_FSP2_X86_32=y +CONFIG_HAVE_INTEL_FSP_REPO=y +CONFIG_ADD_FSP_BINARIES=y +CONFIG_FSP_S_CBFS="fsps.bin" +CONFIG_FSP_M_CBFS="fspm.bin" +# CONFIG_FSP_FULL_FD is not set +CONFIG_FSP_T_RESERVED_SIZE=0x0 +CONFIG_FSP_M_XIP=y +CONFIG_HAVE_FSP_LOGO_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_FSP_RESET=y +CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y +CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y +CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y +# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set +# CONFIG_BUILDING_WITH_DEBUG_FSP is not set +CONFIG_INTEL_INT15=y +CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_GFX_GMA=y +CONFIG_GFX_GMA_DYN_CPU=y +CONFIG_GFX_GMA_GENERATION="Skylake" +CONFIG_GFX_GMA_PCH="Sunrise_Point" +CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" +CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set +CONFIG_DRIVERS_MC146818=y +CONFIG_USE_PC_CMOS_ALTCENTURY=y +CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +CONFIG_MEMORY_MAPPED_TPM=y +CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_USB_ACPI=y +CONFIG_DRIVERS_WIFI_GENERIC=y +CONFIG_DRIVERS_MTK_WIFI=y +# end of Generic Drivers + +# +# Security +# + +# +# CBFS verification +# +# CONFIG_CBFS_VERIFICATION is not set +# end of CBFS verification + +# +# Verified Boot (vboot) +# +# end of Verified Boot (vboot) + +# +# Trusted Platform Module +# +CONFIG_NO_TPM=y +# CONFIG_TPM1 is not set +# CONFIG_TPM2 is not set +CONFIG_MAINBOARD_HAS_TPM2=y +CONFIG_PCR_BOOT_MODE=1 +CONFIG_PCR_HWID=1 +CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 +CONFIG_PCR_RUNTIME_DATA=3 +# end of Trusted Platform Module + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set +# end of Memory initialization + +# CONFIG_STM is not set +# CONFIG_INTEL_CBNT_SUPPORT is not set +CONFIG_BOOTMEDIA_LOCK_NONE=y +# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_CHIP is not set +# CONFIG_BOOTMEDIA_SMM_BWP is not set +# end of Security + +CONFIG_ACPI_HAVE_PCAT_8259=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +CONFIG_ACPI_SOC_NVS=y +CONFIG_ACPI_CUSTOM_MADT=y +CONFIG_ACPI_NO_CUSTOM_MADT=y +CONFIG_ACPI_COMMON_MADT_LAPIC=y +CONFIG_ACPI_COMMON_MADT_IOAPIC=y +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_ACPI_LPIT=y +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y +CONFIG_RTC=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y + +# +# I/O mapped, 8250-compatible +# +CONFIG_TTYS0_BASE=0x3f8 + +# +# Serial port base address = 0x3f8 +# +# CONFIG_CONSOLE_SERIAL_921600 is not set +# CONFIG_CONSOLE_SERIAL_460800 is not set +# CONFIG_CONSOLE_SERIAL_230400 is not set +CONFIG_CONSOLE_SERIAL_115200=y +# CONFIG_CONSOLE_SERIAL_57600 is not set +# CONFIG_CONSOLE_SERIAL_38400 is not set +# CONFIG_CONSOLE_SERIAL_19200 is not set +# CONFIG_CONSOLE_SERIAL_9600 is not set +CONFIG_TTYS0_LCS=3 +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_SPI_FLASH is not set +# CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CMOS_POST is not set +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_POST_IO_PORT=0x80 +CONFIG_HWBASE_DEBUG_CB=y +# end of Console + +CONFIG_ACPI_S1_NOT_SUPPORTED=y +CONFIG_HAVE_ACPI_RESUME=y +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_IOAPIC=y +CONFIG_ACPI_NHLT=y + +# +# System tables +# +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_BIOS_VENDOR="coreboot" +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" +# end of System tables + +# +# Payload +# +CONFIG_PAYLOAD_NONE=y +# end of Payload + +# +# Debugging +# + +# +# CPU Debug Settings +# +# CONFIG_DISPLAY_MTRRS is not set + +# +# Vendorcode Debug Settings +# + +# +# BLOB Debug Settings +# +# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set +# CONFIG_DISPLAY_FSP_HEADER is not set +# CONFIG_VERIFY_HOBS is not set +# CONFIG_DISPLAY_FSP_VERSION_INFO is not set +CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y +# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set + +# +# General Debug Settings +# +# CONFIG_GDB_STUB is not set +CONFIG_HAVE_DEBUG_GPIO=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set +# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set +# end of Debugging + +CONFIG_RAMSTAGE_ADA=y +CONFIG_RAMSTAGE_LIBHWBASE=y +CONFIG_SPD_READ_BY_WORD=y +CONFIG_HWBASE_DYNAMIC_MMIO=y +CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 +CONFIG_HWBASE_DIRECT_PCIDEV=y +CONFIG_DECOMPRESS_OFAST=y +CONFIG_WARNINGS_ARE_ERRORS=y +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode new file mode 100644 index 00000000..30a69e6a --- /dev/null +++ b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode @@ -0,0 +1,848 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_LTO is not set +# CONFIG_IWYU is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +CONFIG_OPTION_BACKEND_NONE=y +CONFIG_COMPRESS_RAMSTAGE_LZMA=y +# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_USE_QC_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_RAMSTAGE=y +# CONFIG_ASAN is not set +# CONFIG_NO_STAGE_CACHE is not set +CONFIG_TSEG_STAGE_CACHE=y +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_BOOTSPLASH_IMAGE is not set + +# +# Software Bill Of Materials (SBOM) +# +# CONFIG_SBOM is not set +# end of Software Bill Of Materials (SBOM) +# end of General setup + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +# CONFIG_VENDOR_ACER is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BOSTENTECH is not set +# CONFIG_VENDOR_BYTEDANCE is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_CLEVO is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set +# CONFIG_VENDOR_DELL is not set +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set +# CONFIG_VENDOR_EXAMPLE is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_INVENTEC is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set +CONFIG_VENDOR_LENOVO=y +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PINE64 is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PRODRIVE is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_STARLABS is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set +# CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set +CONFIG_MAINBOARD_FAMILY="T480S" +CONFIG_MAINBOARD_PART_NUMBER="T480S" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad" +CONFIG_VGA_BIOS_ID="8086,0406" +CONFIG_DIMM_MAX=2 +CONFIG_DIMM_SPD_SIZE=512 +CONFIG_FMDFILE="" +# CONFIG_NO_POST is not set +CONFIG_MAINBOARD_VENDOR="LENOVO" +CONFIG_CBFS_SIZE=0xEEC000 +CONFIG_CONSOLE_SERIAL=y +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y +CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y +CONFIG_MAX_CPUS=8 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_IO=y +CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="t480s" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set +# CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" +# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480S" +# CONFIG_CONSOLE_POST is not set +CONFIG_MAX_SOCKET=1 +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +CONFIG_TPM_PIRQ=0x0 +CONFIG_USE_PM_ACPI_TIMER=y +CONFIG_DCACHE_RAM_BASE=0xfef00000 +CONFIG_DCACHE_RAM_SIZE=0x40000 +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 +CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_USE_LEGACY_8254_TIMER=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_DRIVERS_INTEL_WIFI=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/t480s/ifd_16" +CONFIG_ME_BIN_PATH="../../../vendorfiles/t480s/me.bin" +CONFIG_GBE_BIN_PATH="../../../config/ifd/t480s/gbe" +CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +# CONFIG_DEBUG_SMI is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set +CONFIG_HAVE_IFD_BIN=y +# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set +# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set +# CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set +# CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +CONFIG_BOARD_LENOVO_T480S=y +# CONFIG_BOARD_LENOVO_T400 is not set +# CONFIG_BOARD_LENOVO_T500 is not set +# CONFIG_BOARD_LENOVO_R400 is not set +# CONFIG_BOARD_LENOVO_R500 is not set +# CONFIG_BOARD_LENOVO_W500 is not set +# CONFIG_BOARD_LENOVO_T410 is not set +# CONFIG_BOARD_LENOVO_T420 is not set +# CONFIG_BOARD_LENOVO_T420S is not set +# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set +# CONFIG_BOARD_LENOVO_T430S is not set +# CONFIG_BOARD_LENOVO_T431S is not set +# CONFIG_BOARD_LENOVO_T520 is not set +# CONFIG_BOARD_LENOVO_W520 is not set +# CONFIG_BOARD_LENOVO_T530 is not set +# CONFIG_BOARD_LENOVO_W530 is not set +# CONFIG_BOARD_LENOVO_T60 is not set +# CONFIG_BOARD_LENOVO_Z61T is not set +# CONFIG_BOARD_LENOVO_R60 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set +# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set +# CONFIG_BOARD_LENOVO_X131E is not set +# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set +# CONFIG_BOARD_LENOVO_X200 is not set +# CONFIG_BOARD_LENOVO_X301 is not set +# CONFIG_BOARD_LENOVO_X201 is not set +# CONFIG_BOARD_LENOVO_X220 is not set +# CONFIG_BOARD_LENOVO_X220I is not set +# CONFIG_BOARD_LENOVO_X1 is not set +# CONFIG_BOARD_LENOVO_X230 is not set +# CONFIG_BOARD_LENOVO_X230T is not set +# CONFIG_BOARD_LENOVO_X230S is not set +# CONFIG_BOARD_LENOVO_X230_EDP is not set +# CONFIG_BOARD_LENOVO_X60 is not set +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="PNP0F13" +CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" +CONFIG_GFX_GMA_PANEL_1_PORT="eDP" +CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y +CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin" +CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set +CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y +CONFIG_D3COLD_SUPPORT=y +CONFIG_GFX_GMA_PANEL_1_ON_EDP=y +CONFIG_DRIVERS_UART_8250IO=y +CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 +CONFIG_HEAP_SIZE=0x100000 +CONFIG_EC_GPE_SCI=0x50 +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +CONFIG_BOARD_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set +CONFIG_COREBOOT_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=16384 +CONFIG_ROM_SIZE=0x01000000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set +CONFIG_POWER_STATE_ON_AFTER_FAILURE=y +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 +# end of Mainboard + +CONFIG_SYSTEM_TYPE_LAPTOP=y + +# +# Chipset +# + +# +# SoC +# +CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" +CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" +CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" +CONFIG_CBFS_MCACHE_SIZE=0x4000 +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_SMM_TSEG_SIZE=0x800000 +CONFIG_SMM_RESERVED_SIZE=0x200000 +CONFIG_SMM_MODULE_STACK_SIZE=0x800 +CONFIG_ACPI_BERT_SIZE=0x0 +CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 +CONFIG_ACPI_CPU_STRING="CP%02X" +CONFIG_STACK_SIZE=0x2000 +CONFIG_IFD_CHIPSET="sklkbl" +CONFIG_IED_REGION_SIZE=0x400000 +CONFIG_MAX_ROOT_PORTS=24 +CONFIG_PCR_BASE_ADDRESS=0xfd000000 +CONFIG_CPU_BCLK_MHZ=100 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120 +CONFIG_CPU_XTAL_HZ=24000000 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2 +CONFIG_SOC_INTEL_I2C_DEV_MAX=6 +# CONFIG_ENABLE_SATA_TEST_MODE is not set +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" +CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" +CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 +CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 +CONFIG_INTEL_GMA_BCLV_WIDTH=16 +CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 +CONFIG_INTEL_GMA_BCLM_WIDTH=16 +CONFIG_FSP_PUBLISH_MBP_HOB=y +CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 +CONFIG_MAX_HECI_DEVICES=5 +CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_HAVE_PAM0_REGISTER=y +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000 +CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10 +CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 +CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 +CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y +CONFIG_SOC_INTEL_KABYLAKE=y +CONFIG_FSP_T_LOCATION=0xfffe0000 +CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y +CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 +CONFIG_CBFS_CACHE_ALIGN=8 +CONFIG_SOC_INTEL_COMMON=y + +# +# Intel SoC Common Code for IP blocks +# +CONFIG_SOC_INTEL_COMMON_BLOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y +CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y +# CONFIG_USE_COREBOOT_MP_INIT is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y +CONFIG_INTEL_CAR_NEM_ENHANCED=y +# CONFIG_USE_INTEL_FSP_MP_INIT is not set +CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y +CONFIG_HAVE_HYPERTHREADING=y +# CONFIG_FSP_HYPERTHREADING is not set +# CONFIG_INTEL_KEYLOCKER is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set +# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y +CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" +CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" +CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" +CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" +CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" +CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" +CONFIG_SOC_INTEL_CSE_RW_FILE="" +CONFIG_SOC_INTEL_CSE_RW_VERSION="" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom" +CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE="" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy" +CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE="" +CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y +CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y +CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y +# CONFIG_SOC_INTEL_DISABLE_IGD is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y +CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y +CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y +# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 +CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y +CONFIG_SA_ENABLE_DPR=y +CONFIG_HAVE_CAPID_A_REGISTER=y +CONFIG_HAVE_BDSM_BGSM_REGISTER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y + +# +# Intel SoC Common PCH Code +# +CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y +CONFIG_SOC_INTEL_COMMON_PCH_BASE=y +CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y +CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y +CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y +CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y + +# +# Intel SoC Common coreboot stages and non-IP blocks +# +CONFIG_SOC_INTEL_COMMON_BASECODE=y +CONFIG_SOC_INTEL_COMMON_RESET=y +CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y +CONFIG_PAVP=y +# CONFIG_MMA is not set +CONFIG_SOC_INTEL_COMMON_NHLT=y +# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set + +# +# CPU +# +CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_PARALLEL_MP=y +CONFIG_PARALLEL_MP_AP_WORK=y +CONFIG_XAPIC_ONLY=y +# CONFIG_X2APIC_ONLY is not set +# CONFIG_X2APIC_RUNTIME is not set +# CONFIG_X2APIC_LATE_WORKAROUND is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_HAVE_SMI_HANDLER=y +CONFIG_SMM_TSEG=y +CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 +CONFIG_AP_STACK_SIZE=0x800 +CONFIG_SMP=y +CONFIG_SSE=y +CONFIG_SSE2=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# + +# +# Southbridge +# +# CONFIG_PCIEXP_HOTPLUG is not set +CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 +CONFIG_RCBA_LENGTH=0x4000 + +# +# Super I/O +# + +# +# Embedded Controllers +# +CONFIG_EC_ACPI=y +CONFIG_EC_LENOVO_H8=y +CONFIG_H8_BEEP_ON_DEATH=y +CONFIG_H8_FLASH_LEDS_ON_DEATH=y +# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set +# CONFIG_H8_FN_CTRL_SWAP is not set +CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_PRIMARY_FN_KEYS=y +CONFIG_H8_HAS_LEDLOGO=y +CONFIG_EC_LENOVO_PMH7=y + +# +# Intel Firmware +# +CONFIG_HAVE_ME_BIN=y +# CONFIG_STITCH_ME_BIN is not set +# CONFIG_CHECK_ME is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set +# CONFIG_USE_ME_CLEANER is not set +CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y +CONFIG_HAVE_GBE_BIN=y +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 +CONFIG_UDK_BASE=y +CONFIG_UDK_2017_BINDING=y +CONFIG_UDK_2013_VERSION=2013 +CONFIG_UDK_2017_VERSION=2017 +CONFIG_UDK_202005_VERSION=202005 +CONFIG_UDK_202111_VERSION=202111 +CONFIG_UDK_202302_VERSION=202302 +CONFIG_UDK_202305_VERSION=202305 +CONFIG_UDK_VERSION=2017 +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_ARCH_ALL_STAGES_X86_32=y +CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_PC80_SYSTEM=y +CONFIG_POSTCAR_STAGE=y +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_HAVE_CF9_RESET=y +CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +# CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 +# end of Chipset + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_LINEAR_FRAMEBUFFER=y +CONFIG_HAVE_FSP_GOP=y +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_RUN_FSP_GOP is not set +# CONFIG_NO_GFX_INIT is not set +CONFIG_NO_EARLY_GFX_INIT=y + +# +# Display +# +CONFIG_VGA_TEXT_FRAMEBUFFER=y +# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 +# end of Display + +CONFIG_PCI=y +CONFIG_ECAM_MMCONF_SUPPORT=y +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_ECAM_MMCONF_LENGTH=0x10000000 +CONFIG_PCI_ALLOW_BUS_MASTER=y +CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y +CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set +# CONFIG_EARLY_PCI_BRIDGE is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +# end of Devices + +# +# Generic Drivers +# +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +CONFIG_CACHE_MRC_SETTINGS=y +CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set +# CONFIG_SMMSTORE is not set +CONFIG_SPI_FLASH=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_DRIVERS_UART=y +# CONFIG_DRIVERS_UART_OXPCIE is not set +# CONFIG_VPD is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVERS_I2C_DESIGNWARE=y +# CONFIG_DRIVERS_I2C_MAX98396 is not set +# CONFIG_FSP_USE_REPO is not set +# CONFIG_DISPLAY_HOBS is not set +# CONFIG_DISPLAY_UPD_DATA is not set +# CONFIG_BMP_LOGO is not set +CONFIG_PLATFORM_USES_FSP2_0=y +CONFIG_PLATFORM_USES_FSP2_X86_32=y +CONFIG_HAVE_INTEL_FSP_REPO=y +CONFIG_ADD_FSP_BINARIES=y +CONFIG_FSP_S_CBFS="fsps.bin" +CONFIG_FSP_M_CBFS="fspm.bin" +# CONFIG_FSP_FULL_FD is not set +CONFIG_FSP_T_RESERVED_SIZE=0x0 +CONFIG_FSP_M_XIP=y +CONFIG_HAVE_FSP_LOGO_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_FSP_RESET=y +CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y +CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y +CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y +# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set +# CONFIG_BUILDING_WITH_DEBUG_FSP is not set +CONFIG_INTEL_INT15=y +CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_GFX_GMA=y +CONFIG_GFX_GMA_DYN_CPU=y +CONFIG_GFX_GMA_GENERATION="Skylake" +CONFIG_GFX_GMA_PCH="Sunrise_Point" +CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" +CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set +CONFIG_DRIVERS_MC146818=y +CONFIG_USE_PC_CMOS_ALTCENTURY=y +CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +CONFIG_MEMORY_MAPPED_TPM=y +CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 +CONFIG_VGA=y +# CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_USB_ACPI=y +CONFIG_DRIVERS_WIFI_GENERIC=y +CONFIG_DRIVERS_MTK_WIFI=y +# end of Generic Drivers + +# +# Security +# + +# +# CBFS verification +# +# CONFIG_CBFS_VERIFICATION is not set +# end of CBFS verification + +# +# Verified Boot (vboot) +# +# end of Verified Boot (vboot) + +# +# Trusted Platform Module +# +CONFIG_NO_TPM=y +# CONFIG_TPM1 is not set +# CONFIG_TPM2 is not set +CONFIG_MAINBOARD_HAS_TPM2=y +CONFIG_PCR_BOOT_MODE=1 +CONFIG_PCR_HWID=1 +CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 +CONFIG_PCR_RUNTIME_DATA=3 +# end of Trusted Platform Module + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set +# end of Memory initialization + +# CONFIG_STM is not set +# CONFIG_INTEL_CBNT_SUPPORT is not set +CONFIG_BOOTMEDIA_LOCK_NONE=y +# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_CHIP is not set +# CONFIG_BOOTMEDIA_SMM_BWP is not set +# end of Security + +CONFIG_ACPI_HAVE_PCAT_8259=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +CONFIG_ACPI_SOC_NVS=y +CONFIG_ACPI_CUSTOM_MADT=y +CONFIG_ACPI_NO_CUSTOM_MADT=y +CONFIG_ACPI_COMMON_MADT_LAPIC=y +CONFIG_ACPI_COMMON_MADT_IOAPIC=y +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_ACPI_LPIT=y +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y +CONFIG_RTC=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y + +# +# I/O mapped, 8250-compatible +# +CONFIG_TTYS0_BASE=0x3f8 + +# +# Serial port base address = 0x3f8 +# +# CONFIG_CONSOLE_SERIAL_921600 is not set +# CONFIG_CONSOLE_SERIAL_460800 is not set +# CONFIG_CONSOLE_SERIAL_230400 is not set +CONFIG_CONSOLE_SERIAL_115200=y +# CONFIG_CONSOLE_SERIAL_57600 is not set +# CONFIG_CONSOLE_SERIAL_38400 is not set +# CONFIG_CONSOLE_SERIAL_19200 is not set +# CONFIG_CONSOLE_SERIAL_9600 is not set +CONFIG_TTYS0_LCS=3 +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_SPI_FLASH is not set +# CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CMOS_POST is not set +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_POST_IO_PORT=0x80 +CONFIG_HWBASE_DEBUG_CB=y +# end of Console + +CONFIG_ACPI_S1_NOT_SUPPORTED=y +CONFIG_HAVE_ACPI_RESUME=y +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_IOAPIC=y +CONFIG_ACPI_NHLT=y + +# +# System tables +# +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_BIOS_VENDOR="coreboot" +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" +# end of System tables + +# +# Payload +# +CONFIG_PAYLOAD_NONE=y +# end of Payload + +# +# Debugging +# + +# +# CPU Debug Settings +# +# CONFIG_DISPLAY_MTRRS is not set + +# +# Vendorcode Debug Settings +# + +# +# BLOB Debug Settings +# +# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set +# CONFIG_DISPLAY_FSP_HEADER is not set +# CONFIG_VERIFY_HOBS is not set +# CONFIG_DISPLAY_FSP_VERSION_INFO is not set +CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y +# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set + +# +# General Debug Settings +# +# CONFIG_GDB_STUB is not set +CONFIG_HAVE_DEBUG_GPIO=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set +# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set +# end of Debugging + +CONFIG_RAMSTAGE_ADA=y +CONFIG_RAMSTAGE_LIBHWBASE=y +CONFIG_SPD_READ_BY_WORD=y +CONFIG_HWBASE_DYNAMIC_MMIO=y +CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 +CONFIG_HWBASE_DIRECT_PCIDEV=y +CONFIG_DECOMPRESS_OFAST=y +CONFIG_WARNINGS_ARE_ERRORS=y +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_RELOCATABLE_MODULES=y +CONFIG_GENERIC_GPIO_LIB=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/t480s_vfsp_16mb/target.cfg b/config/coreboot/t480s_vfsp_16mb/target.cfg new file mode 100644 index 00000000..a7d63ae1 --- /dev/null +++ b/config/coreboot/t480s_vfsp_16mb/target.cfg @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +tree="next" +xarch="i386-elf" +payload_seabios="y" +payload_grub="y" +payload_memtest="y" +grub_scan_disk="nvme ahci" +grubtree="xhci" +vcfg="t480s" +build_depend="seabios/default grub/xhci memtest86plus" +IFD_platform="sklkbl" diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/t500_16mb/target.cfg +++ b/config/coreboot/t500_16mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/t500_4mb/target.cfg +++ b/config/coreboot/t500_4mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/t500_8mb/target.cfg +++ b/config/coreboot/t500_8mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg index 27291f4d..333030ce 100644 --- a/config/coreboot/t520_8mb/target.cfg +++ b/config/coreboot/t520_8mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg index c0b56379..6cbab731 100644 --- a/config/coreboot/t530_12mb/target.cfg +++ b/config/coreboot/t530_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg index 2661c6b2..c1e3a3c6 100644 --- a/config/coreboot/t60_16mb_intelgpu/target.cfg +++ b/config/coreboot/t60_16mb_intelgpu/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg index 2661c6b2..c1e3a3c6 100644 --- a/config/coreboot/t60_intelgpu/target.cfg +++ b/config/coreboot/t60_intelgpu/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/w500_16mb/target.cfg +++ b/config/coreboot/w500_16mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/w500_4mb/target.cfg +++ b/config/coreboot/w500_4mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/w500_8mb/target.cfg +++ b/config/coreboot/w500_8mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg index c0b56379..6cbab731 100644 --- a/config/coreboot/w530_12mb/target.cfg +++ b/config/coreboot/w530_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg index 5be15ac2..96fbb9e3 100644 --- a/config/coreboot/w541_12mb/target.cfg +++ b/config/coreboot/w541_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -7,4 +9,4 @@ grub_scan_disk="nvme ahci" grubtree="xhci" vcfg="haswell" build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/x200_16mb/target.cfg +++ b/config/coreboot/x200_16mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/x200_4mb/target.cfg +++ b/config/coreboot/x200_4mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg index 0b81f02f..53a597b6 100644 --- a/config/coreboot/x200_8mb/target.cfg +++ b/config/coreboot/x200_8mb/target.cfg @@ -1,7 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg index 27291f4d..333030ce 100644 --- a/config/coreboot/x220_8mb/target.cfg +++ b/config/coreboot/x220_8mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg index c0b56379..6cbab731 100644 --- a/config/coreboot/x230_12mb/target.cfg +++ b/config/coreboot/x230_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg index c0b56379..6cbab731 100644 --- a/config/coreboot/x230_16mb/target.cfg +++ b/config/coreboot/x230_16mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg index c0b56379..6cbab731 100644 --- a/config/coreboot/x230t_12mb/target.cfg +++ b/config/coreboot/x230t_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg index c0b56379..6cbab731 100644 --- a/config/coreboot/x230t_16mb/target.cfg +++ b/config/coreboot/x230t_16mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg index a364653c..4d4a4c25 100644 --- a/config/coreboot/x301_16mb/target.cfg +++ b/config/coreboot/x301_16mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" release="n" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg index a364653c..4d4a4c25 100644 --- a/config/coreboot/x301_4mb/target.cfg +++ b/config/coreboot/x301_4mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" release="n" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg index a364653c..4d4a4c25 100644 --- a/config/coreboot/x301_8mb/target.cfg +++ b/config/coreboot/x301_8mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" @@ -5,4 +7,4 @@ payload_grub="y" payload_memtest="y" release="n" grub_scan_disk="ahci" -payload_uboot_amd64="y"
\ No newline at end of file +payload_uboot_amd64="y" diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg index 2661c6b2..c1e3a3c6 100644 --- a/config/coreboot/x60/target.cfg +++ b/config/coreboot/x60/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg index 2661c6b2..c1e3a3c6 100644 --- a/config/coreboot/x60_16mb/target.cfg +++ b/config/coreboot/x60_16mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xarch="i386-elf" payload_seabios="y" diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg index a218e0e7..624d4ec2 100644 --- a/config/data/coreboot/mkhelper.cfg +++ b/config/data/coreboot/mkhelper.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + . "include/rom.sh" makeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS" @@ -6,7 +8,7 @@ build_depend="seabios/default grub/default memtest86plus u-boot/amd64coreboot" seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin" pv="payload_uboot payload_seabios payload_memtest payload_grub" -pv="$pv payload_uboot_i386 payload_uboot_amd64" +pv="$pv payload_uboot_i386 payload_uboot_amd64 payload_grubsea" v="initmode ubootelf grub_scan_disk uboot_config grubtree grubelf pname" v="$v displaymode tmprom newrom" eval `setvars "n" $pv` diff --git a/config/data/deguard/appdir.patch b/config/data/deguard/appdir.patch deleted file mode 100644 index 722a6168..00000000 --- a/config/data/deguard/appdir.patch +++ /dev/null @@ -1,131 +0,0 @@ -From b978cbb651a4bdd84be4a92ae240c8ca99ef21eb Mon Sep 17 00:00:00 2001 -From: Leah Rowe <info@minifree.org> -Date: Tue, 24 Sep 2024 16:44:51 +0100 -Subject: [PATCH 1/1] Patch to integrate with lbmk - -Deguard is a standalone utility, but the way it works -doesn't integrate well with lbmk. - -Remove the download logic, because lbmk already downloads -the requisite zip file. - -Also not required, but nice, and included in this patch: - -Detect what python version is available, and make sure it's -python 3. - -Signed-off-by: Leah Rowe <info@minifree.org> ---- - RUNME.sh | 64 +++++++++++++++++++++++++++++++------------------------- - 1 file changed, 36 insertions(+), 28 deletions(-) - -diff --git a/RUNME.sh b/RUNME.sh -index 9809f89..7404ba6 100755 ---- a/RUNME.sh -+++ b/RUNME.sh -@@ -1,25 +1,33 @@ - #!/bin/sh - # SPDX-License-Identifier: GPL-2.0-only - -+# This version of deguard is patched to integrate with lbmk. -+# Do not run this version standalone. Please use src/deguard/ instead. -+ - set -e - --if [ ! -f "me.bin" ]; then -- wget "https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip" -- unzip "H110M-DGS(7.30)ROM.zip" H11MDGS7.30 -- rm "H110M-DGS(7.30)ROM.zip" -- dd if=H11MDGS7.30 of=me.bin skip=1 count=511 bs=4096 -- rm H11MDGS7.30 -+pyver="2" -+python="python3" -+which python3 || python="python" -+which $python || pyver="" -+[ -n "$pyver" ] && pyver="$($python --version | awk '{print $2}')" -+if [ "${pyver%%.*}" != "3" ]; then -+ printf "Wrong python version, or python missing. Must be python 3.\n" 1>&2 -+ exit 1 - fi - -+rm -f me.bin MFS.part -+dd if=../H11MDGS7.30 of=me.bin skip=1 count=511 bs=4096 -+ - dd if=me.bin of=MFS.part skip=168 count=100 bs=4096 - - # Extract file number 7 (fitc.cfg) --python3 MFSUtil.py -m MFS.part -x -i 7 -o fitc.cfg -+$python MFSUtil.py -m MFS.part -x -i 7 -o fitc.cfg - - # Remove /home/mca/eom --python3 MFSUtil.py -c fitc.cfg -r -f /home/mca/eom -o fitc.cfg -+$python MFSUtil.py -c fitc.cfg -r -f /home/mca/eom -o fitc.cfg - # Remove /home/bup/ct --python3 MFSUtil.py -c fitc.cfg -r -f /home/bup/ct -o fitc.cfg -+$python MFSUtil.py -c fitc.cfg -r -f /home/bup/ct -o fitc.cfg - - # list off files differing in optiplex 3050 fw vs donor - files=" -@@ -39,40 +47,40 @@ secureboot/pubkeyhash - - for i in $files - do -- python3 MFSUtil.py -c fitc.cfg -r -f /home/$i -o fitc.cfg -+ $python MFSUtil.py -c fitc.cfg -r -f /home/$i -o fitc.cfg - done - - # Add /home/mca/eom - dd if=/dev/zero of=eom count=1 bs=1 --python3 MFSUtil.py -c fitc.cfg --add eom --alignment 2 --mode ' --Irw-r-----' \ -+$python MFSUtil.py -c fitc.cfg --add eom --alignment 2 --mode ' --Irw-r-----' \ - --opt '?!-F' --uid 0 --gid 238 -f /home/mca/eom -o fitc.cfg - - # Add /home/bup/ct --python3 gen_shellcode.py -p H -v 11.6.0.1126 --fake-fpfs=fpfs/optiplex_3050 -o ct --python3 MFSUtil.py -c fitc.cfg --add ct --alignment 2 --mode ' ---rwxr-----' \ -+$python gen_shellcode.py -p H -v 11.6.0.1126 --fake-fpfs=fpfs/optiplex_3050 -o ct -+$python MFSUtil.py -c fitc.cfg --add ct --alignment 2 --mode ' ---rwxr-----' \ - --opt '?--F' --uid 3 --gid 351 -f /home/bup/ct -o fitc.cfg - - # Add dell files --python3 MFSUtil.py -c fitc.cfg --add data/emu_fuse_map --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=3 --gid=238 -f /home/bup/bup_sku/emu_fuse_map -o fitc.cfg --python3 MFSUtil.py -c fitc.cfg --add data/plat_n_sku --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=3 --gid=238 -f /home/bup/bup_sku/plat_n_sku -o fitc.cfg --python3 MFSUtil.py -c fitc.cfg --add data/fwuoemid --alignment 2 --mode=' ---rw-rw----' --opt='?--F' --uid=32 --gid=238 -f /home/fwupdate/fwuoemid -o fitc.cfg --python3 MFSUtil.py -c fitc.cfg --add data/prof0 --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=55 --gid=238 -f /home/icc/prof0 -o fitc.cfg --python3 MFSUtil.py -c fitc.cfg --add data/device_ports --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=73 --gid=238 -f /home/mctp/device_ports -o fitc.cfg --python3 MFSUtil.py -c fitc.cfg --add data/hdcp_ports --alignment 2 --mode=' -EIrw-r-----' --opt='?!-F' --uid=80 --gid=238 -f /home/pavp/hdcp_ports -o fitc.cfg --python3 MFSUtil.py -c fitc.cfg --add data/cfg_rules --alignment 2 --mode=' ---rw-rw----' --opt='-!MF' --uid=85 --gid=238 -f /home/policy/cfgmgr/cfg_rules -o fitc.cfg --python3 MFSUtil.py -c fitc.cfg --add data/bootpolres --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/bootpolres -o fitc.cfg --python3 MFSUtil.py -c fitc.cfg --add data/bootpoltype --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/bootpoltype -o fitc.cfg --python3 MFSUtil.py -c fitc.cfg --add data/enfpolicy --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/enfpolicy -o fitc.cfg --python3 MFSUtil.py -c fitc.cfg --add data/kmid --alignment 2 --mode=' ---rw-r-----' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/kmid -o fitc.cfg --python3 MFSUtil.py -c fitc.cfg --add data/pubkeyhash --alignment 2 --mode=' ---rw-rw-r--' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/pubkeyhash -o fitc.cfg -+$python MFSUtil.py -c fitc.cfg --add data/emu_fuse_map --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=3 --gid=238 -f /home/bup/bup_sku/emu_fuse_map -o fitc.cfg -+$python MFSUtil.py -c fitc.cfg --add data/plat_n_sku --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=3 --gid=238 -f /home/bup/bup_sku/plat_n_sku -o fitc.cfg -+$python MFSUtil.py -c fitc.cfg --add data/fwuoemid --alignment 2 --mode=' ---rw-rw----' --opt='?--F' --uid=32 --gid=238 -f /home/fwupdate/fwuoemid -o fitc.cfg -+$python MFSUtil.py -c fitc.cfg --add data/prof0 --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=55 --gid=238 -f /home/icc/prof0 -o fitc.cfg -+$python MFSUtil.py -c fitc.cfg --add data/device_ports --alignment 2 --mode=' ---rw-r-----' --opt='?--F' --uid=73 --gid=238 -f /home/mctp/device_ports -o fitc.cfg -+$python MFSUtil.py -c fitc.cfg --add data/hdcp_ports --alignment 2 --mode=' -EIrw-r-----' --opt='?!-F' --uid=80 --gid=238 -f /home/pavp/hdcp_ports -o fitc.cfg -+$python MFSUtil.py -c fitc.cfg --add data/cfg_rules --alignment 2 --mode=' ---rw-rw----' --opt='-!MF' --uid=85 --gid=238 -f /home/policy/cfgmgr/cfg_rules -o fitc.cfg -+$python MFSUtil.py -c fitc.cfg --add data/bootpolres --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/bootpolres -o fitc.cfg -+$python MFSUtil.py -c fitc.cfg --add data/bootpoltype --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/bootpoltype -o fitc.cfg -+$python MFSUtil.py -c fitc.cfg --add data/enfpolicy --alignment 2 --mode=' ---rw-rw----' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/enfpolicy -o fitc.cfg -+$python MFSUtil.py -c fitc.cfg --add data/kmid --alignment 2 --mode=' ---rw-r-----' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/kmid -o fitc.cfg -+$python MFSUtil.py -c fitc.cfg --add data/pubkeyhash --alignment 2 --mode=' ---rw-rw-r--' --opt='?-MF' --uid=3 --gid=238 -f /home/secureboot/pubkeyhash -o fitc.cfg - - # Delete file id 7 (fitc.cfg) from the MFS partition --python3 MFSUtil.py -m MFS.part -r -i 7 -o MFS.part -+$python MFSUtil.py -m MFS.part -r -i 7 -o MFS.part - # Delete file id 8 (home) from the MFS partition --python3 MFSUtil.py -m MFS.part -r -i 8 -o MFS.part -+$python MFSUtil.py -m MFS.part -r -i 8 -o MFS.part - - # Add the modified fitc.cfg into the MFS partition --python3 MFSUtil.py -m MFS.part -a fitc.cfg --deoptimize -i 7 -o MFS.part -+$python MFSUtil.py -m MFS.part -a fitc.cfg --deoptimize -i 7 -o MFS.part - - # Write - dd conv=notrunc if=MFS.part of=me.bin seek=168 count=100 bs=4096 --- -2.39.5 - diff --git a/config/data/grub/mkhelper.cfg b/config/data/grub/mkhelper.cfg index b75cf9d7..5d66f42f 100644 --- a/config/data/grub/mkhelper.cfg +++ b/config/data/grub/mkhelper.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + . "include/rom.sh" bootstrapargs="--gnulib-srcdir=gnulib/ --no-git" diff --git a/config/data/grub/module/default b/config/data/grub/module/default index 3555ad11..1ee5327f 100755 --- a/config/data/grub/module/default +++ b/config/data/grub/module/default @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + # Install modules (installed, but not automatically loaded) grub_install_modules=" \ hexdump \ diff --git a/config/data/grub/module/nvme b/config/data/grub/module/nvme index 503c61c8..a3a2847c 100755 --- a/config/data/grub/module/nvme +++ b/config/data/grub/module/nvme @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + # Install modules (installed, but not automatically loaded) grub_install_modules=" \ hexdump \ diff --git a/config/data/grub/module/xhci b/config/data/grub/module/xhci index 6235bbad..ee4d10f7 100755 --- a/config/data/grub/module/xhci +++ b/config/data/grub/module/xhci @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + # Install modules (installed, but not automatically loaded) grub_install_modules=" \ hexdump \ diff --git a/config/data/pcsx-redux/mkhelper.cfg b/config/data/pcsx-redux/mkhelper.cfg index 379ad032..af744685 100644 --- a/config/data/pcsx-redux/mkhelper.cfg +++ b/config/data/pcsx-redux/mkhelper.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + . "include/rom.sh" postmake="copyps1bios" diff --git a/config/data/pico-serprog/mkhelper.cfg b/config/data/pico-serprog/mkhelper.cfg index e424e2f4..f4733dd9 100644 --- a/config/data/pico-serprog/mkhelper.cfg +++ b/config/data/pico-serprog/mkhelper.cfg @@ -1,7 +1,10 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + . "include/rom.sh" sersrc="src/pico-serprog" serx="$sersrc/build/pico_serprog.uf2" picosdk="src/pico-sdk" serdir="$picosdk/src/boards/include/boards" -premake="mkserprog rp2040" +premake="mkserprog pico" +picotool="$PWD/src/picotool/xbmkbin" diff --git a/config/data/seabios/mkhelper.cfg b/config/data/seabios/mkhelper.cfg deleted file mode 100644 index e69de29b..00000000 --- a/config/data/seabios/mkhelper.cfg +++ /dev/null diff --git a/config/data/stm32-vserprog/mkhelper.cfg b/config/data/stm32-vserprog/mkhelper.cfg index 8f45d7fd..54b05caf 100644 --- a/config/data/stm32-vserprog/mkhelper.cfg +++ b/config/data/stm32-vserprog/mkhelper.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + . "include/rom.sh" sersrc="src/stm32-vserprog" diff --git a/config/deguard/patches/0001-t480s-delta.patch b/config/deguard/patches/0001-t480s-delta.patch new file mode 100644 index 00000000..741ee08d --- /dev/null +++ b/config/deguard/patches/0001-t480s-delta.patch @@ -0,0 +1,221 @@ +From 054a4ffdfef9a649f5668c379cb68b5342d02e3f Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Mon, 2 Dec 2024 01:59:43 +0000 +Subject: [PATCH 1/1] t480s delta + +thank you mkukri for guiding me through this + +Signed-off-by: Leah Rowe <info@minifree.org> +--- + .../thinkpad_t480s/home/bup/bup_sku/plat_n_sku | Bin 0 -> 4 bytes + data/delta/thinkpad_t480s/home/bup/mbp | Bin 0 -> 44 bytes + data/delta/thinkpad_t480s/home/gpio/csme_pins | 0 + data/delta/thinkpad_t480s/home/icc/dynregs | Bin 0 -> 28 bytes + data/delta/thinkpad_t480s/home/icc/header | Bin 0 -> 4 bytes + data/delta/thinkpad_t480s/home/icc/namestr | Bin 0 -> 48 bytes + data/delta/thinkpad_t480s/home/icc/prof1 | 0 + data/delta/thinkpad_t480s/home/icc/prof10 | 0 + data/delta/thinkpad_t480s/home/icc/prof2 | 0 + data/delta/thinkpad_t480s/home/icc/prof3 | 0 + data/delta/thinkpad_t480s/home/icc/prof4 | 0 + data/delta/thinkpad_t480s/home/icc/prof5 | 0 + data/delta/thinkpad_t480s/home/icc/prof6 | 0 + data/delta/thinkpad_t480s/home/icc/prof7 | 0 + data/delta/thinkpad_t480s/home/icc/prof8 | 0 + data/delta/thinkpad_t480s/home/icc/prof9 | 0 + data/delta/thinkpad_t480s/home/mca/eom | 1 + + data/delta/thinkpad_t480s/home/mca/ish_policy | Bin 0 -> 1 bytes + data/delta/thinkpad_t480s/home/mctp/device_ports | Bin 0 -> 4 bytes + .../thinkpad_t480s/home/policy/Bist/auto_config | Bin 0 -> 4 bytes + .../thinkpad_t480s/home/policy/cfgmgr/cfg_rules | Bin 0 -> 660 bytes + .../thinkpad_t480s/home/policy/hci/sysintid1 | 1 + + .../thinkpad_t480s/home/policy/hci/sysintid2 | 1 + + .../thinkpad_t480s/home/policy/hci/sysintid3 | 1 + + 24 files changed, 4 insertions(+) + create mode 100644 data/delta/thinkpad_t480s/home/bup/bup_sku/plat_n_sku + create mode 100644 data/delta/thinkpad_t480s/home/bup/mbp + create mode 100644 data/delta/thinkpad_t480s/home/gpio/csme_pins + create mode 100644 data/delta/thinkpad_t480s/home/icc/dynregs + create mode 100644 data/delta/thinkpad_t480s/home/icc/header + create mode 100644 data/delta/thinkpad_t480s/home/icc/namestr + create mode 100644 data/delta/thinkpad_t480s/home/icc/prof1 + create mode 100644 data/delta/thinkpad_t480s/home/icc/prof10 + create mode 100644 data/delta/thinkpad_t480s/home/icc/prof2 + create mode 100644 data/delta/thinkpad_t480s/home/icc/prof3 + create mode 100644 data/delta/thinkpad_t480s/home/icc/prof4 + create mode 100644 data/delta/thinkpad_t480s/home/icc/prof5 + create mode 100644 data/delta/thinkpad_t480s/home/icc/prof6 + create mode 100644 data/delta/thinkpad_t480s/home/icc/prof7 + create mode 100644 data/delta/thinkpad_t480s/home/icc/prof8 + create mode 100644 data/delta/thinkpad_t480s/home/icc/prof9 + create mode 100644 data/delta/thinkpad_t480s/home/mca/eom + create mode 100644 data/delta/thinkpad_t480s/home/mca/ish_policy + create mode 100644 data/delta/thinkpad_t480s/home/mctp/device_ports + create mode 100644 data/delta/thinkpad_t480s/home/policy/Bist/auto_config + create mode 100644 data/delta/thinkpad_t480s/home/policy/cfgmgr/cfg_rules + create mode 100644 data/delta/thinkpad_t480s/home/policy/hci/sysintid1 + create mode 100644 data/delta/thinkpad_t480s/home/policy/hci/sysintid2 + create mode 100644 data/delta/thinkpad_t480s/home/policy/hci/sysintid3 + +diff --git a/data/delta/thinkpad_t480s/home/bup/bup_sku/plat_n_sku b/data/delta/thinkpad_t480s/home/bup/bup_sku/plat_n_sku +new file mode 100644 +index 0000000000000000000000000000000000000000..d0514be7b35d1d6ca7a4e09603bf1ce50d764720 +GIT binary patch +literal 4 +LcmZQ(U}yjU0FVHL + +literal 0 +HcmV?d00001 + +diff --git a/data/delta/thinkpad_t480s/home/bup/mbp b/data/delta/thinkpad_t480s/home/bup/mbp +new file mode 100644 +index 0000000000000000000000000000000000000000..f5f419c14e67bb40eca97369288637203849b165 +GIT binary patch +literal 44 +tcmd;PWnf_BU}69PMph;UMP^|~MkXc(2O$ALMouOM=YW5WY>Z&}1^_We1G@kK + +literal 0 +HcmV?d00001 + +diff --git a/data/delta/thinkpad_t480s/home/gpio/csme_pins b/data/delta/thinkpad_t480s/home/gpio/csme_pins +new file mode 100644 +index 0000000..e69de29 +diff --git a/data/delta/thinkpad_t480s/home/icc/dynregs b/data/delta/thinkpad_t480s/home/icc/dynregs +new file mode 100644 +index 0000000000000000000000000000000000000000..912ab3579185250403dc1db1cb95ed24b1e7f2ab +GIT binary patch +literal 28 +icmb1PU}RuoU|?VpV7)W*<V*&8AX`m<@s5B|NErY;Qw3}Q + +literal 0 +HcmV?d00001 + +diff --git a/data/delta/thinkpad_t480s/home/icc/header b/data/delta/thinkpad_t480s/home/icc/header +new file mode 100644 +index 0000000000000000000000000000000000000000..4b75556082e2c00ea8a888450d05627b20f0ec61 +GIT binary patch +literal 4 +LcmZQ%U|<9Q00{sC + +literal 0 +HcmV?d00001 + +diff --git a/data/delta/thinkpad_t480s/home/icc/namestr b/data/delta/thinkpad_t480s/home/icc/namestr +new file mode 100644 +index 0000000000000000000000000000000000000000..b0f3735c08f70e800a5dcce8ba8a2ef5ac9b075e +GIT binary patch +literal 48 +ZcmeZC&C4&#XTSi#C5d?{iA5>s5&*Dj1*HH0 + +literal 0 +HcmV?d00001 + +diff --git a/data/delta/thinkpad_t480s/home/icc/prof1 b/data/delta/thinkpad_t480s/home/icc/prof1 +new file mode 100644 +index 0000000..e69de29 +diff --git a/data/delta/thinkpad_t480s/home/icc/prof10 b/data/delta/thinkpad_t480s/home/icc/prof10 +new file mode 100644 +index 0000000..e69de29 +diff --git a/data/delta/thinkpad_t480s/home/icc/prof2 b/data/delta/thinkpad_t480s/home/icc/prof2 +new file mode 100644 +index 0000000..e69de29 +diff --git a/data/delta/thinkpad_t480s/home/icc/prof3 b/data/delta/thinkpad_t480s/home/icc/prof3 +new file mode 100644 +index 0000000..e69de29 +diff --git a/data/delta/thinkpad_t480s/home/icc/prof4 b/data/delta/thinkpad_t480s/home/icc/prof4 +new file mode 100644 +index 0000000..e69de29 +diff --git a/data/delta/thinkpad_t480s/home/icc/prof5 b/data/delta/thinkpad_t480s/home/icc/prof5 +new file mode 100644 +index 0000000..e69de29 +diff --git a/data/delta/thinkpad_t480s/home/icc/prof6 b/data/delta/thinkpad_t480s/home/icc/prof6 +new file mode 100644 +index 0000000..e69de29 +diff --git a/data/delta/thinkpad_t480s/home/icc/prof7 b/data/delta/thinkpad_t480s/home/icc/prof7 +new file mode 100644 +index 0000000..e69de29 +diff --git a/data/delta/thinkpad_t480s/home/icc/prof8 b/data/delta/thinkpad_t480s/home/icc/prof8 +new file mode 100644 +index 0000000..e69de29 +diff --git a/data/delta/thinkpad_t480s/home/icc/prof9 b/data/delta/thinkpad_t480s/home/icc/prof9 +new file mode 100644 +index 0000000..e69de29 +diff --git a/data/delta/thinkpad_t480s/home/mca/eom b/data/delta/thinkpad_t480s/home/mca/eom +new file mode 100644 +index 0000000..6b2aaa7 +--- /dev/null ++++ b/data/delta/thinkpad_t480s/home/mca/eom +@@ -0,0 +1 @@ ++ +\ No newline at end of file +diff --git a/data/delta/thinkpad_t480s/home/mca/ish_policy b/data/delta/thinkpad_t480s/home/mca/ish_policy +new file mode 100644 +index 0000000000000000000000000000000000000000..f76dd238ade08917e6712764a16a22005a50573d +GIT binary patch +literal 1 +IcmZPo000310RR91 + +literal 0 +HcmV?d00001 + +diff --git a/data/delta/thinkpad_t480s/home/mctp/device_ports b/data/delta/thinkpad_t480s/home/mctp/device_ports +new file mode 100644 +index 0000000000000000000000000000000000000000..593f4708db84ac8fd0f5cc47c634f38c013fe9e4 +GIT binary patch +literal 4 +LcmZQzU|;|M00aO5 + +literal 0 +HcmV?d00001 + +diff --git a/data/delta/thinkpad_t480s/home/policy/Bist/auto_config b/data/delta/thinkpad_t480s/home/policy/Bist/auto_config +new file mode 100644 +index 0000000000000000000000000000000000000000..f66c9cf4c9672fa2832bce76f4082fd97b823506 +GIT binary patch +literal 4 +LcmZQ%U|;|M00;mA + +literal 0 +HcmV?d00001 + +diff --git a/data/delta/thinkpad_t480s/home/policy/cfgmgr/cfg_rules b/data/delta/thinkpad_t480s/home/policy/cfgmgr/cfg_rules +new file mode 100644 +index 0000000000000000000000000000000000000000..6243fe92703b15ca1f7f387ba5c4d899a79c569b +GIT binary patch +literal 660 +zcmY+=OHKk|5Cq^>K!kw6@D_P1@<u>igPOP^;RM`;4F~aZ-U6s51t}Jj`cnC)|Cu&3 +zOPGZhK{|6oBkY#;E<__NOnV=p5q3v=9~Iw=W3<os$56i)yfV5=pA<icQ?!3qn%*HZ +z^Z^;r2+N9dw4cd~3*sW}|5Bn6R;Imwq~pj6?K7X~ul0UarJJGbvPS#6b#Vj6j!ye; +z(%<X-wsr22ZTk0T^Y=_6?1lE39X!5I_bYpZb;UjSyz{<zAZLc+k$BAWK7S(pn|Lao +NiRa>X@rU?Rd<6FI7iRzf + +literal 0 +HcmV?d00001 + +diff --git a/data/delta/thinkpad_t480s/home/policy/hci/sysintid1 b/data/delta/thinkpad_t480s/home/policy/hci/sysintid1 +new file mode 100644 +index 0000000..b508e57 +--- /dev/null ++++ b/data/delta/thinkpad_t480s/home/policy/hci/sysintid1 +@@ -0,0 +1 @@ ++Z# +\ No newline at end of file +diff --git a/data/delta/thinkpad_t480s/home/policy/hci/sysintid2 b/data/delta/thinkpad_t480s/home/policy/hci/sysintid2 +new file mode 100644 +index 0000000..9611653 +--- /dev/null ++++ b/data/delta/thinkpad_t480s/home/policy/hci/sysintid2 +@@ -0,0 +1 @@ ++R˦ +\ No newline at end of file +diff --git a/data/delta/thinkpad_t480s/home/policy/hci/sysintid3 b/data/delta/thinkpad_t480s/home/policy/hci/sysintid3 +new file mode 100644 +index 0000000..7f55b1e +--- /dev/null ++++ b/data/delta/thinkpad_t480s/home/policy/hci/sysintid3 +@@ -0,0 +1 @@ ++6 +\ No newline at end of file +-- +2.39.5 + diff --git a/config/dependencies/arch b/config/dependencies/arch index 6a0f93b7..2b1b7157 100644 --- a/config/dependencies/arch +++ b/config/dependencies/arch @@ -1,12 +1,14 @@ -pkg_add="pacman -S --needed --noconfirm" +# SPDX-License-Identifier: GPL-3.0-or-later + +pkg_add="pacman -S --needed" pkglist=" \ acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \ -autogen base-devel bison cmake curl device-mapper doxygen \ +autogen base-devel bison cdrtools cmake curl device-mapper doxygen \ dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \ help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \ -ncurses openssl p7zip ccache \ +ncurses openssl p7zip ccache less libx86 \ pandoc parted pciutils perl perl-libwww python python-setuptools rsync \ -sharutils subversion swig texinfo ttf-dejavu unarchiver unzip wget xz zlib \ +sharutils subversion swig texinfo ttf-dejavu unarchiver unzip wget xz zlib mtools \ " aur_notice="bdf-unifont unifont cross-mipsel-linux-gnu-binutils cross-mipsel-linux-gnu-gcc" diff --git a/config/dependencies/debian b/config/dependencies/debian index 387cb288..00ccfc1a 100755 --- a/config/dependencies/debian +++ b/config/dependencies/debian @@ -1,16 +1,18 @@ -pkg_add="apt-get -y install" +# SPDX-License-Identifier: GPL-3.0-or-later + +pkg_add="apt-get install $reinstall" pkglist=" \ acpica-tools autoconf autogen automake autopoint autotools-dev bc \ binutils-arm-none-eabi bison build-essential cmake curl device-tree-compiler \ doxygen e2fsprogs efitools flex fonts-unifont gawk gcc-arm-linux-gnueabi \ gcc-arm-none-eabi gdb gettext git gnat help2man innoextract libdevmapper-dev \ libfdt-dev libfont-freetype-perl libfreetype-dev libftdi-dev libftdi1-dev libfuse-dev \ -libjaylink-dev libgnutls28-dev libgpiod-dev liblz4-tool liblzma-dev libncurses5-dev +libjaylink-dev libgnutls28-dev libgpiod-dev lz4 liblz4-dev liblzma-dev libncurses5-dev libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev libpython3-dev \ libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0 libusb-1.0-0-dev \ libusb-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted pciutils \ -perl pkg-config python3 python3-distutils python3-pkg-resources python3-pycryptodome \ +perl pkg-config python3 python3-distutils-extra python3-pkg-resources python3-pycryptodome \ python3-pyelftools python3-setuptools python-is-python3 sharutils swig unar \ unifont unifont-bin unzip uuid-dev wget xfonts-unifont zlib1g-dev ccache \ -g++-mipsel-linux-gnu make \ +g++-mipsel-linux-gnu make genisoimage mtools \ " diff --git a/config/dependencies/fedora38 b/config/dependencies/fedora38 index 8f672205..a34bbbf0 100755 --- a/config/dependencies/fedora38 +++ b/config/dependencies/fedora38 @@ -1,4 +1,6 @@ -pkg_add="dnf -y install" +# SPDX-License-Identifier: GPL-3.0-or-later + +pkg_add="dnf ${reinstall}install" pkglist=" \ acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc \ arm-none-eabi-gcc arm-none-eabi-newlib autogen bison bzip2 cmake curl \ diff --git a/config/dependencies/fedora40 b/config/dependencies/fedora40 index 6836b57b..3ca84aa0 100755 --- a/config/dependencies/fedora40 +++ b/config/dependencies/fedora40 @@ -1,4 +1,6 @@ -pkg_add="dnf -y install" +# SPDX-License-Identifier: GPL-3.0-or-later + +pkg_add="dnf ${reinstall}install" pkglist=" \ acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc \ arm-none-eabi-gcc arm-none-eabi-newlib autogen bison bzip2 cmake curl \ diff --git a/config/dependencies/fedora41 b/config/dependencies/fedora41 index 0650ba8e..e49a50b2 100755 --- a/config/dependencies/fedora41 +++ b/config/dependencies/fedora41 @@ -1,4 +1,6 @@ -pkg_add="dnf -y install" +# SPDX-License-Identifier: GPL-3.0-or-later + +pkg_add="dnf ${reinstall}install" pkglist=" \ acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-gcc-cs-c++ \ arm-none-eabi-gcc arm-none-eabi-newlib autogen bison bzip2 cmake curl \ @@ -8,6 +10,7 @@ innoextract intltool libftdi-devel libgpiod-devel libjaylink-devel \ libselinux-devel libusb1 libusb1-devel nasm ncurses-devel openssl-devel openssl-devel-engine \ p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \ python-unversioned-command python3 python3-setuptools rsync sharutils \ -subversion systemd-devel texinfo unar unifont unifont-fonts \ +subversion systemd-devel texinfo unar unifont unifont-fonts uuid-devel \ unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel \ +libuuid-devel gnutls-devel \ " diff --git a/config/dependencies/parabola b/config/dependencies/parabola index f598e491..eb7115f7 100644 --- a/config/dependencies/parabola +++ b/config/dependencies/parabola @@ -1,10 +1,12 @@ -pkg_add="pacman -S --needed --noconfirm" +# SPDX-License-Identifier: GPL-3.0-or-later + +pkg_add="pacman -S --needed" pkglist=" \ acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \ autogen base-devel bdf-unifont bison cmake curl device-mapper doxygen \ dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \ help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \ -ncurses openssl p7zip \ +ncurses openssl p7zip less libx86 \ pandoc parted pciutils perl perl-libwww python python-setuptools rsync \ sharutils subversion swig texinfo ttf-dejavu unarchiver unifont-utils unzip \ wget xz zlib ccache \ diff --git a/config/dependencies/trisquel b/config/dependencies/trisquel index a5e1fa13..fb364c28 100755 --- a/config/dependencies/trisquel +++ b/config/dependencies/trisquel @@ -1,16 +1,18 @@ -pkg_add="apt-get -y install" +# SPDX-License-Identifier: GPL-3.0-or-later + +pkg_add="apt-get install $reinstall" pkglist=" \ autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \ bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \ flex gawk gcc-arm-linux-gnueabi gcc-arm-none-eabi gdb gettext git gnat help2man \ innoextract libdevmapper-dev libfdt-dev libfont-freetype-perl libfreetype6-dev \ -libftdi-dev libfuse-dev libgnutls28-dev libgpiod-dev libjaylink-dev liblz4-tool \ -liblzma-dev libncurses5-dev ccache \ +libftdi-dev libfuse-dev libgnutls28-dev libgpiod-dev libjaylink-dev \ +liblzma-dev libncurses5-dev ccache lz4 liblz4-dev \ libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev \ libpython3-dev libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 \ libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \ pciutils perl pkg-config python3 python3-distutils python3-pkg-resources \ python3-pycryptodome python3-pyelftools python3-setuptools python-is-python3 \ sharutils swig fonts-unifont unar unifont unzip uuid-dev wget zlib1g-dev \ -g++-mipsel-linux-gnu make \ +g++-mipsel-linux-gnu make genisoimage mtools \ " diff --git a/config/dependencies/ubuntu2004 b/config/dependencies/ubuntu2004 index 8fe09aef..ce69a4d9 100755 --- a/config/dependencies/ubuntu2004 +++ b/config/dependencies/ubuntu2004 @@ -1,15 +1,17 @@ -pkg_add="apt-get -y install" +# SPDX-License-Identifier: GPL-3.0-or-later + +pkg_add="apt-get install $reinstall" pkglist=" \ autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \ bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \ flex gawk gcc-arm-linux-gnueabi gcc-arm-none-eabi gdb gettext git gnat help2man \ innoextract libdevmapper-dev libfdt-dev libfont-freetype-perl libfreetype6-dev \ -libftdi-dev libfuse-dev libgnutls28-dev liblz4-tool liblzma-dev libncurses5-dev \ +libftdi-dev libfuse-dev libgnutls28-dev lz4 liblz4-dev liblzma-dev libncurses5-dev \ libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev \ libpython3-dev libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 \ libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \ pciutils perl pkg-config python3 python3-distutils python3-pkg-resources \ python3-pycryptodome python3-pyelftools python3-setuptools python-is-python3 \ sharutils swig ttf-unifont unar unifont unzip uuid-dev wget zlib1g-dev ccache \ -g++-mipsel-linux-gnu make \ +g++-mipsel-linux-gnu make genisoimage mtools \ " diff --git a/config/dependencies/ubuntu2404 b/config/dependencies/ubuntu2404 index a93d0b49..b0633e69 100755 --- a/config/dependencies/ubuntu2404 +++ b/config/dependencies/ubuntu2404 @@ -1,15 +1,17 @@ -pkg_add="apt-get -y install" +# SPDX-License-Identifier: GPL-3.0-or-later + +pkg_add="apt-get install $reinstall" pkglist=" \ autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \ bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \ flex gawk gcc-arm-linux-gnueabi gcc-arm-none-eabi gdb gettext git gnat help2man \ innoextract libdevmapper-dev libfdt-dev libfont-freetype-perl libfreetype6-dev \ -libftdi-dev libfuse-dev libgnutls28-dev liblz4-tool liblzma-dev libncurses5-dev \ +libftdi-dev libfuse-dev libgnutls28-dev lz4 liblz4-dev liblzma-dev libncurses5-dev \ libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev \ libpython3-dev libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 \ libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \ pciutils perl pkg-config python3 python3-pkg-resources python3-pycryptodome \ python3-pyelftools python3-setuptools python-is-python3 sharutils swig \ fonts-unifont unar unifont unzip uuid-dev wget zlib1g-dev ccache \ -g++-mipsel-linux-gnu make \ +g++-mipsel-linux-gnu make genisoimage mtools \ " diff --git a/config/dependencies/void b/config/dependencies/void index 79a12328..a02d706e 100644 --- a/config/dependencies/void +++ b/config/dependencies/void @@ -1,4 +1,6 @@ -pkg_add="xbps-install -y" +# SPDX-License-Identifier: GPL-3.0-or-later + +pkg_add="xbps-install" pkglist=" \ acpica-utils autogen base-devel bison cmake \ cross-arm-none-eabi-binutils cross-arm-none-eabi-gcc \ @@ -8,5 +10,5 @@ freetype freetype-devel fuse gawk gcc-ada gdb gettext gettext-devel git \ help2man innoextract libftdi1 libpciaccess libusb nasm ncurses \ ncurses-devel openssl openssl-devel p7zip parted pciutils perl perl-LWP \ python python3 python3-setuptools rsync sharutils subversion texinfo \ -unar unzip wget xz zlib ccache +unar unzip wget xz zlib ccache \ " diff --git a/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch b/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch index fc3befb1..f7b9ad79 100644 --- a/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch +++ b/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch @@ -1,4 +1,4 @@ -From 9d8c79eecf760e4f963a0a7f29b577cd84962a2a Mon Sep 17 00:00:00 2001 +From 9d7b97a0f08a3f0f62c389aee61e92377d82d645 Mon Sep 17 00:00:00 2001 From: consts <grudnevkv@gmail.com> Date: Fri, 2 Mar 2018 07:03:37 +0000 Subject: [PATCH 1/1] Workaround for MX25 chips @@ -17,10 +17,10 @@ Change-Id: I43a306b67862b59c1dcd02729e189f3bf73f481b 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/cli_classic.c b/cli_classic.c -index ab5f8b1..2825033 100644 +index 26253dc..5a80394 100644 --- a/cli_classic.c +++ b/cli_classic.c -@@ -67,6 +67,7 @@ static void cli_classic_usage(const char *name) +@@ -68,6 +68,7 @@ static void cli_classic_usage(const char *name) " -o | --output <logfile> log output to <logfile>\n" " --flash-contents <ref-file> assume flash contents to be <ref-file>\n" " -L | --list-supported print supported devices\n" @@ -28,7 +28,7 @@ index ab5f8b1..2825033 100644 #if CONFIG_PRINT_WIKI == 1 " -z | --list-supported-wiki print supported devices in wiki syntax\n" #endif -@@ -262,6 +263,7 @@ int main(int argc, char *argv[]) +@@ -231,6 +232,7 @@ int flashprog_classic_main(int argc, char *argv[]) {"version", 0, NULL, 'R'}, {"output", 1, NULL, 'o'}, {"progress", 0, NULL, OPTION_PROGRESS}, @@ -36,9 +36,9 @@ index ab5f8b1..2825033 100644 {NULL, 0, NULL, 0}, }; -@@ -478,6 +480,9 @@ int main(int argc, char *argv[]) - cli_classic_abort_usage("No log filename specified.\n"); - } +@@ -357,6 +359,9 @@ int flashprog_classic_main(int argc, char *argv[]) + cli_classic_usage(argv[0]); + exit(0); break; + case 'm': /* --workaround-mx */ + workaround_mx = 1; @@ -47,12 +47,12 @@ index ab5f8b1..2825033 100644 show_progress = true; break; diff --git a/include/programmer.h b/include/programmer.h -index 873dc37..2007fd6 100644 +index 11d15a8..3b33d5a 100644 --- a/include/programmer.h +++ b/include/programmer.h -@@ -364,6 +364,7 @@ enum ich_chipset { - CHIPSET_GEMINI_LAKE, - CHIPSET_ELKHART_LAKE, +@@ -372,6 +372,7 @@ enum ich_chipset { + CHIPSET_LUNAR_LAKE, + CHIPSET_ARROW_LAKE, }; +extern int workaround_mx; /* workaround for MX25* chips, makes flash operations more reliable, less failures */ @@ -87,5 +87,5 @@ index 748ef99..9bbdee9 100644 readarr); } -- -2.39.2 +2.39.5 diff --git a/config/flashprog/target.cfg b/config/flashprog/target.cfg new file mode 100644 index 00000000..2d9243b7 --- /dev/null +++ b/config/flashprog/target.cfg @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +makeargs="WARNERROR=no" diff --git a/config/git/bios_extract/pkg.cfg b/config/git/bios_extract/pkg.cfg index e77bf0a5..8489f385 100644 --- a/config/git/bios_extract/pkg.cfg +++ b/config/git/bios_extract/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + rev="0a7bc1d71735ef97b00dfec0fd54a02fcc5d1bb0" url="https://review.coreboot.org/bios_extract" bkup_url="https://github.com/coreboot/bios_extract" diff --git a/config/git/biosutilities/pkg.cfg b/config/git/biosutilities/pkg.cfg index a1c02015..7b9ea9d6 100644 --- a/config/git/biosutilities/pkg.cfg +++ b/config/git/biosutilities/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + rev="03ae0cf0706ede5a2a15da0986c19c776d0e6b26" url="https://codeberg.org/libreboot/BIOSUtilities" bkup_url="https://github.com/platomav/BIOSUtilities" diff --git a/config/git/coreboot/pkg.cfg b/config/git/coreboot/pkg.cfg index f4ed31e8..2a23ee5c 100644 --- a/config/git/coreboot/pkg.cfg +++ b/config/git/coreboot/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + rev="HEAD" url="https://review.coreboot.org/coreboot" bkup_url="https://github.com/coreboot/coreboot.git" diff --git a/config/git/deguard/pkg.cfg b/config/git/deguard/pkg.cfg index 3da47380..300417ca 100644 --- a/config/git/deguard/pkg.cfg +++ b/config/git/deguard/pkg.cfg @@ -1,3 +1,5 @@ -rev="fc4c59ac35e6f38c195214d71340a6adade2689f" +# SPDX-License-Identifier: GPL-3.0-or-later + +rev="de176a7f20650b272a01efb633931a63128c1647" url="https://review.coreboot.org/deguard" bkup_url="https://codeberg.org/libreboot/deguard" diff --git a/config/git/docs/pkg.cfg b/config/git/docs/pkg.cfg index 9913ee5f..144292fd 100644 --- a/config/git/docs/pkg.cfg +++ b/config/git/docs/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + rev="e72d055915c3a9ffe739982946e101b146b2483c" url="https://codeberg.org/vimuser/untitled" bkup_url="https://notabug.org/untitled/untitled" diff --git a/config/git/flashprog/pkg.cfg b/config/git/flashprog/pkg.cfg index ff45c7b6..6cfbdb38 100644 --- a/config/git/flashprog/pkg.cfg +++ b/config/git/flashprog/pkg.cfg @@ -1,3 +1,5 @@ -rev="d128a0ae87086b37c0e5d7a8d934bcdee173402f" +# SPDX-License-Identifier: GPL-3.0-or-later + +rev="eb2c04185f8f471c768b742d66e4c552effdd9cb" url="https://review.sourcearcade.org/flashprog" bkup_url="https://github.com/SourceArcade/flashprog.git" diff --git a/config/git/gpio-scripts/pkg.cfg b/config/git/gpio-scripts/pkg.cfg index 60963e9d..be491070 100644 --- a/config/git/gpio-scripts/pkg.cfg +++ b/config/git/gpio-scripts/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + rev="be2de1233a70e3cf05ad17b008fd85c862b1ecf9" url="https://codeberg.org/libreboot/gpio-scripts" bkup_url="https://git.disroot.org/libreboot/gpio-scripts" diff --git a/config/git/grub/pkg.cfg b/config/git/grub/pkg.cfg index ed26a766..88bc45d8 100644 --- a/config/git/grub/pkg.cfg +++ b/config/git/grub/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + rev="HEAD" url="git://git.savannah.gnu.org/grub.git" bkup_url="https://codeberg.org/libreboot/grub" diff --git a/config/git/int/pkg.cfg b/config/git/int/pkg.cfg index d3c2958a..367acc9b 100644 --- a/config/git/int/pkg.cfg +++ b/config/git/int/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + rev="d1ac570549f00477d9ade21807f42f28a4864fcd" url="https://codeberg.org/libreboot/int" bkup_url="https://git.disroot.org/libreboot/int" diff --git a/config/git/memtest86plus/pkg.cfg b/config/git/memtest86plus/pkg.cfg index 4bf44294..07887ab7 100644 --- a/config/git/memtest86plus/pkg.cfg +++ b/config/git/memtest86plus/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + rev="5dcd424ea7afb857c1171e747ef064d98d26afeb" url="https://codeberg.org/libreboot/memtest86plus" bkup_url="https://github.com/memtest86plus/memtest86plus.git" diff --git a/config/git/mxmdump/pkg.cfg b/config/git/mxmdump/pkg.cfg index 19ede8d8..792a7cfd 100644 --- a/config/git/mxmdump/pkg.cfg +++ b/config/git/mxmdump/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + rev="ab3393c84fd3de01793bbfa2ec4caddfe0dc44f6" url="https://codeberg.org/libreboot/mxmdump" bkup_url="https://git.disroot.org/libreboot/mxmdump" diff --git a/config/git/pcsx-redux/pkg.cfg b/config/git/pcsx-redux/pkg.cfg index 0ae9a205..88443cb3 100644 --- a/config/git/pcsx-redux/pkg.cfg +++ b/config/git/pcsx-redux/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + rev="6ec5348058413619b290b069adbdae68180ce8c0" url="https://github.com/grumpycoders/pcsx-redux" bkup_url="https://codeberg.org/vimuser/pcsx-redux" diff --git a/config/git/pico-sdk/pkg.cfg b/config/git/pico-sdk/pkg.cfg index 68b5bca6..8af13d09 100644 --- a/config/git/pico-sdk/pkg.cfg +++ b/config/git/pico-sdk/pkg.cfg @@ -1,3 +1,5 @@ -rev="6a7db34ff63345a7badec79ebea3aaef1712f374" +# SPDX-License-Identifier: GPL-3.0-or-later + +rev="95ea6acad131124694cda1c162c52cd30e0aece0" url="https://codeberg.org/libreboot/pico-sdk" bkup_url="https://github.com/raspberrypi/pico-sdk" diff --git a/config/git/pico-serprog/pkg.cfg b/config/git/pico-serprog/pkg.cfg index 54c5fa44..3d3e0f19 100644 --- a/config/git/pico-serprog/pkg.cfg +++ b/config/git/pico-serprog/pkg.cfg @@ -1,4 +1,6 @@ -rev="e75e3a20e63269a5e3189bc2e49a6a81d45a636a" +# SPDX-License-Identifier: GPL-3.0-or-later + +rev="3ea792664ed29ca1ff3e2e78d1d16099684781bd" url="https://codeberg.org/libreboot/pico-serprog" bkup_url="https://git.disroot.org/libreboot/pico-serprog" -depend="pico-sdk" +depend="pico-sdk picotool" diff --git a/config/git/picotool/pkg.cfg b/config/git/picotool/pkg.cfg new file mode 100644 index 00000000..3711ce04 --- /dev/null +++ b/config/git/picotool/pkg.cfg @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +rev="df21059f7ca6f1babc7f1f3b92122cacffc85951" +url="https://github.com/raspberrypi/picotool" +bkup_url="https://codeberg.org/libreboot/picotool" diff --git a/config/git/seabios/pkg.cfg b/config/git/seabios/pkg.cfg index d8c6932b..0ee91a00 100644 --- a/config/git/seabios/pkg.cfg +++ b/config/git/seabios/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + rev="HEAD" url="https://review.coreboot.org/seabios" bkup_url="https://github.com/coreboot/seabios" diff --git a/config/git/stm32-vserprog/pkg.cfg b/config/git/stm32-vserprog/pkg.cfg index 9fb12c63..9fc1de0c 100644 --- a/config/git/stm32-vserprog/pkg.cfg +++ b/config/git/stm32-vserprog/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + rev="8fcf0a4d41800631b571fa7bbd1d8b251f0a2111" url="https://codeberg.org/libreboot/stm32-vserprog" bkup_url="https://git.disroot.org/libreboot/stm32-vserprog" diff --git a/config/git/u-boot/pkg.cfg b/config/git/u-boot/pkg.cfg index e65ad63a..ddccbc02 100644 --- a/config/git/u-boot/pkg.cfg +++ b/config/git/u-boot/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + rev="HEAD" url="https://source.denx.de/u-boot/u-boot.git" bkup_url="https://github.com/u-boot/u-boot.git" diff --git a/config/git/uefitool/pkg.cfg b/config/git/uefitool/pkg.cfg index 1602e6be..8b269666 100644 --- a/config/git/uefitool/pkg.cfg +++ b/config/git/uefitool/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + rev="4a41c33596e9bc3ae812e763965d91ac57553e02" url="https://codeberg.org/libreboot/UEFITool" bkup_url="https://github.com/LongSoft/UEFITool" diff --git a/config/grub/default/config/payload b/config/grub/default/config/payload index 05e64bbd..3f134f1d 100644 --- a/config/grub/default/config/payload +++ b/config/grub/default/config/payload @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -# Copyright (C) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org> +# Copyright (C) 2014-2016,2020-2021,2023-2025 Leah Rowe <leah@libreboot.org> # Copyright (C) 2015 Klemens Nanni <contact@autoboot.org> set prefix=(memdisk)/boot/grub @@ -143,16 +143,12 @@ menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o # grub device enumeration is very slow, so checks are hardcoded - # TODO: add more strings, based on what distros set up when - # the user select auto-partitioning on those installers - lvmvol="lvm/grubcrypt-bootvol lvm/grubcrypt-rootvol" - raidvol="md/0 md/1 md/2 md/3 md/4 md/5 md/6 md/7 md/8 md/9" - # in practise, doing multiple redundant checks is perfectly fast and + # in practise, doing multiple redundant checks is perfectly fast # TODO: optimize grub itself, and use */? here for everything - for vol in ${lvmvol} ${raidvol} ; do + for vol in ${raidvol} ; do try_bootcfg "${vol}" done @@ -164,6 +160,9 @@ menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o bootdev="${bootdev} (ahci${i},${part})" elif [ "${grub_disk}" = "ata" ]; then bootdev="${bootdev} (ata${i},${part})" + elif [ "${grub_disk}" = "nvme" ]; then + # TODO: do we care about other namesapces + bootdev="${bootdev} (nvme${i}n1,${part})" fi done done @@ -171,23 +170,37 @@ menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o set pager=0 echo -n "Attempting to unlock encrypted volumes" - for dev in ${bootdev} ${lvmvol} ${raidvol}; do + for dev in ${bootdev} ${raidvol}; do if cryptomount "${dev}" ; then break ; fi done set pager=1 echo + search_bootcfg crypto + + lvmvol="" + # after cryptomount, lvm volumes might be available + # using * is slow on some machines, but we use it here, + # just once. in so doing, we find every lvm volume + for vol in (*); do + if regexp ^lvm/ $vol; then + lvmvol="${lvmvol} ${vol}" + try_bootcfg "${vol}" + fi + done + + # user might have put luks inside lvm + set pager=0 + echo "Attempting to unlock encrypted LVMs" for vol in ${lvmvol}; do - try_bootcfg "${vol}" + cryptomount "$vol" done + set pager=1 + echo search_bootcfg crypto - for vol in lvm/* ; do - try_bootcfg "${vol}" - done - true # Prevent pager requiring to accept each line instead of whole screen } diff --git a/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch index 7aa0d568..391beaf1 100644 --- a/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch +++ b/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch @@ -1,4 +1,4 @@ -From 8b55c63ab6094bc9017eedd34bd7d0ae3c04cb9c Mon Sep 17 00:00:00 2001 +From 016f8655f5bed2b65c19e0e127b72ba3cfbcfb7d Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 31 Oct 2021 03:47:05 +0000 Subject: [PATCH 01/13] mitigate grub's missing characters for borders/arrow @@ -86,5 +86,5 @@ index 9c383e64a..8ec1dd1e8 100644 grub_term_highlight_color = old_color_highlight; geo->timeout_y = geo->first_entry_y + geo->num_entries -- -2.39.2 +2.39.5 diff --git a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch index 99082320..149b719d 100644 --- a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch +++ b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch @@ -1,4 +1,4 @@ -From 3b719f8153350f9bfac2cb889d37562cdf566cc8 Mon Sep 17 00:00:00 2001 +From d7f6f258ea14ec47d586eccbd0f5d96784e8bd15 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sat, 19 Nov 2022 16:30:24 +0000 Subject: [PATCH 02/13] say the name libreboot, in the grub menu @@ -8,7 +8,7 @@ Subject: [PATCH 02/13] say the name libreboot, in the grub menu 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c -index bd4431000..300f55fe1 100644 +index 04d058f55..b1cc8f236 100644 --- a/grub-core/normal/main.c +++ b/grub-core/normal/main.c @@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term, @@ -16,10 +16,10 @@ index bd4431000..300f55fe1 100644 grub_term_cls (term); - msg_formatted = grub_xasprintf (_("GNU GRUB version %s"), PACKAGE_VERSION); -+ msg_formatted = grub_xasprintf (_("Libreboot 20241008 release, based on coreboot. https://libreboot.org/")); ++ msg_formatted = grub_xasprintf (_("Libreboot 20241206, 8th revision (GRUB menu): https://libreboot.org/")); if (!msg_formatted) return; -- -2.39.2 +2.39.5 diff --git a/config/grub/default/patches/0003-Add-CC0-license.patch b/config/grub/default/patches/0003-Add-CC0-license.patch index 5795b05c..09c55867 100644 --- a/config/grub/default/patches/0003-Add-CC0-license.patch +++ b/config/grub/default/patches/0003-Add-CC0-license.patch @@ -1,4 +1,4 @@ -From 09cbe5c71236987605cd375c4f69c6a36401e81c Mon Sep 17 00:00:00 2001 +From 85a88ecf10e1dd5cef7244aedaf7db76e845045f Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 Subject: [PATCH 03/13] Add CC0 license @@ -10,10 +10,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index 0bf40caa6..4011e2d15 100644 +index de8c3aa8d..4a3be8568 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -470,7 +470,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e) +@@ -495,7 +495,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e) if (grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3") == 0 || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3+") == 0 @@ -38,5 +38,5 @@ index a42c20bd1..7157a30aa 100644 grub_util_error ("%s: incompatible license", filename); } -- -2.39.2 +2.39.5 diff --git a/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch index cb910c85..8277df92 100644 --- a/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch +++ b/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch @@ -1,4 +1,4 @@ -From fb7e3d852bf3658b6e3cf4725c40f2a3eaa56c5b Mon Sep 17 00:00:00 2001 +From bb12d671182c455c894979a8a5890f5f4baa02dc Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 Subject: [PATCH 04/13] Define GRUB_UINT32_MAX @@ -35,5 +35,5 @@ index 45079bf65..8c0b30395 100644 #define GRUB_PROPERLY_ALIGNED_ARRAY(name, size) grub_properly_aligned_t name[((size) + sizeof (grub_properly_aligned_t) - 1) / sizeof (grub_properly_aligned_t)] -- -2.39.2 +2.39.5 diff --git a/config/grub/default/patches/0005-Add-Argon2-algorithm.patch b/config/grub/default/patches/0005-Add-Argon2-algorithm.patch index 1adfdef7..452c0937 100644 --- a/config/grub/default/patches/0005-Add-Argon2-algorithm.patch +++ b/config/grub/default/patches/0005-Add-Argon2-algorithm.patch @@ -1,4 +1,4 @@ -From 9bc9e32ace3f103ff12aab063c8a250c8ba6a642 Mon Sep 17 00:00:00 2001 +From 216e1351e5957e0589d488427a6dfee246705d0d Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 Subject: [PATCH 05/13] Add Argon2 algorithm @@ -30,10 +30,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> create mode 100644 grub-core/lib/argon2/ref.c diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi -index 1276c5930..cd6fb0e1e 100644 +index 3ad8e3efa..d7c6232af 100644 --- a/docs/grub-dev.texi +++ b/docs/grub-dev.texi -@@ -503,11 +503,75 @@ GRUB includes some code from other projects, and it is sometimes necessary +@@ -503,12 +503,76 @@ GRUB includes some code from other projects, and it is sometimes necessary to update it. @menu @@ -41,6 +41,7 @@ index 1276c5930..cd6fb0e1e 100644 * Gnulib:: * jsmn:: * minilzo:: + * libtasn1:: @end menu +@node Argon2 @@ -110,7 +111,7 @@ index 1276c5930..cd6fb0e1e 100644 @section Gnulib diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index 705d73fab..452f11b20 100644 +index f70e02e69..f5f9b040c 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def @@ -1219,6 +1219,14 @@ module = { @@ -2607,5 +2608,5 @@ index 000000000..c933df80d + } +} -- -2.39.2 +2.39.5 diff --git a/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch index 6fb8fca2..33bc9417 100644 --- a/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch +++ b/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch @@ -1,4 +1,4 @@ -From 7090ad00b4c3b4a9af3d7e9df245aed5969da79d Mon Sep 17 00:00:00 2001 +From a2687cc594714ff33a4c50d40222c113768ed826 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 Subject: [PATCH 06/13] Error on missing Argon2id parameters @@ -9,10 +9,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c -index d5106402f..bc818ea69 100644 +index 8036d76ff..efae8ac65 100644 --- a/grub-core/disk/luks2.c +++ b/grub-core/disk/luks2.c -@@ -38,6 +38,7 @@ GRUB_MOD_LICENSE ("GPLv3+"); +@@ -39,6 +39,7 @@ GRUB_MOD_LICENSE ("GPLv3+"); enum grub_luks2_kdf_type { LUKS2_KDF_TYPE_ARGON2I, @@ -20,7 +20,7 @@ index d5106402f..bc818ea69 100644 LUKS2_KDF_TYPE_PBKDF2 }; typedef enum grub_luks2_kdf_type grub_luks2_kdf_type_t; -@@ -90,7 +91,7 @@ struct grub_luks2_keyslot +@@ -91,7 +92,7 @@ struct grub_luks2_keyslot grub_int64_t time; grub_int64_t memory; grub_int64_t cpus; @@ -29,7 +29,7 @@ index d5106402f..bc818ea69 100644 struct { const char *hash; -@@ -160,10 +161,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot) +@@ -161,10 +162,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot) return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing or invalid KDF"); else if (!grub_strcmp (type, "argon2i") || !grub_strcmp (type, "argon2id")) { @@ -45,7 +45,7 @@ index d5106402f..bc818ea69 100644 return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing Argon2i parameters"); } else if (!grub_strcmp (type, "pbkdf2")) -@@ -459,6 +461,7 @@ luks2_decrypt_key (grub_uint8_t *out_key, +@@ -460,6 +462,7 @@ luks2_decrypt_key (grub_uint8_t *out_key, switch (k->kdf.type) { case LUKS2_KDF_TYPE_ARGON2I: @@ -54,5 +54,5 @@ index d5106402f..bc818ea69 100644 goto err; case LUKS2_KDF_TYPE_PBKDF2: -- -2.39.2 +2.39.5 diff --git a/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch index 65d89c33..7d22cc74 100644 --- a/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch +++ b/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch @@ -1,4 +1,4 @@ -From 54bad25f08aab9bae2fbc2122aba9eb678549cc6 Mon Sep 17 00:00:00 2001 +From 2d1af8f5dfd1492ac95bcf7db4e6c789aa83018e Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 Subject: [PATCH 07/13] Compile with Argon2id support @@ -11,7 +11,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 3 files changed, 17 insertions(+), 4 deletions(-) diff --git a/Makefile.util.def b/Makefile.util.def -index 0f74a1680..5a15e5637 100644 +index 038253b37..2f19569c9 100644 --- a/Makefile.util.def +++ b/Makefile.util.def @@ -3,7 +3,7 @@ AutoGen definitions Makefile.tpl; @@ -35,7 +35,7 @@ index 0f74a1680..5a15e5637 100644 common = grub-core/disk/luks.c; common = grub-core/disk/luks2.c; diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index 452f11b20..5c1af8682 100644 +index f5f9b040c..f1f38d8d3 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def @@ -1242,7 +1242,7 @@ module = { @@ -48,18 +48,18 @@ index 452f11b20..5c1af8682 100644 module = { diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c -index bc818ea69..5b9eaa599 100644 +index efae8ac65..2e742f5be 100644 --- a/grub-core/disk/luks2.c +++ b/grub-core/disk/luks2.c -@@ -27,6 +27,7 @@ - #include <grub/partition.h> +@@ -28,6 +28,7 @@ #include <grub/i18n.h> + #include <grub/safemath.h> +#include <argon2.h> #include <base64.h> #include <json.h> -@@ -462,8 +463,16 @@ luks2_decrypt_key (grub_uint8_t *out_key, +@@ -463,8 +464,16 @@ luks2_decrypt_key (grub_uint8_t *out_key, { case LUKS2_KDF_TYPE_ARGON2I: case LUKS2_KDF_TYPE_ARGON2ID: @@ -79,5 +79,5 @@ index bc818ea69..5b9eaa599 100644 hash = grub_crypto_lookup_md_by_name (k->kdf.u.pbkdf2.hash); if (!hash) -- -2.39.2 +2.39.5 diff --git a/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch index 83c268ed..e73a7ccb 100644 --- a/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch +++ b/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch @@ -1,4 +1,4 @@ -From a04a61ac008379d14749b0a1c47a8c9641c9eed5 Mon Sep 17 00:00:00 2001 +From 67900e39bd45018b5611862b9438081c618b916f Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 Subject: [PATCH 08/13] Make grub-install work with Argon2 @@ -22,5 +22,5 @@ index 7dc5657bb..cf7315891 100644 have_cryptodisk = 1; } -- -2.39.2 +2.39.5 diff --git a/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch index 2a728537..d1973955 100644 --- a/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch +++ b/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch @@ -1,4 +1,4 @@ -From 68f1bf73366ee0da82676c076cd9f282f89a888b Mon Sep 17 00:00:00 2001 +From e8ae938700e715194e47d346c43aa4be23f1b4bf Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Mon, 30 Oct 2023 22:19:21 +0000 Subject: [PATCH 09/13] at_keyboard coreboot: force scancodes2+translate @@ -103,5 +103,5 @@ index f8a129eb7..8207225c2 100644 grub_dprintf ("atkeyb", "returned set %d\n", ps2_state.current_set); if (ps2_state.current_set == 2) -- -2.39.2 +2.39.5 diff --git a/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch index bd15fdd5..c9e41d8e 100644 --- a/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch +++ b/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch @@ -1,4 +1,4 @@ -From c0f2f1b156cbc6f89accf9ce827ae13e8a347969 Mon Sep 17 00:00:00 2001 +From dfd1639bb999e3dbbd346cc97f4bbaf32d129cd6 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Tue, 31 Oct 2023 10:33:28 +0000 Subject: [PATCH 10/13] keylayouts: don't print "Unknown key" message @@ -34,5 +34,5 @@ index aa3ba34f2..445fa0601 100644 } -- -2.39.2 +2.39.5 diff --git a/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch index 5031474a..72c51f8b 100644 --- a/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch +++ b/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch @@ -1,4 +1,4 @@ -From 34cab10d16b45938be82705bc8720c76f2aa1542 Mon Sep 17 00:00:00 2001 +From 8421c59fa62ce954dcba05ad04591c651d6dcf43 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 16:14:58 +0000 Subject: [PATCH 11/13] don't print missing prefix errors on the screen @@ -85,10 +85,10 @@ index 18de52562..2a0fea6c8 100644 } file = try_open_from_prefix (prefix, filename); diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index 4011e2d15..af3bd00d0 100644 +index 4a3be8568..6ae3d73f8 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -758,7 +758,7 @@ grub_dl_load (const char *name) +@@ -881,7 +881,7 @@ grub_dl_load (const char *name) return 0; if (! grub_dl_dir) { @@ -98,5 +98,5 @@ index 4011e2d15..af3bd00d0 100644 } -- -2.39.2 +2.39.5 diff --git a/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch index 9184e6fb..dab4318c 100644 --- a/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch +++ b/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch @@ -1,4 +1,4 @@ -From bf4fbc14d4d9a4612b70531b9678676571a46818 Mon Sep 17 00:00:00 2001 +From c377f3c025101da17252a43449cc58fdd44c44af Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 16:36:22 +0000 Subject: [PATCH 12/13] don't print error if module not found @@ -17,10 +17,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org> 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index af3bd00d0..21d0cedb1 100644 +index 6ae3d73f8..4c15027fe 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -486,7 +486,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e) +@@ -511,7 +511,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e) s = grub_dl_find_section (e, ".modname"); if (!s) @@ -30,5 +30,5 @@ index af3bd00d0..21d0cedb1 100644 mod->name = grub_strdup ((char *) e + s->sh_offset); if (! mod->name) -- -2.39.2 +2.39.5 diff --git a/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch index 1fc76bcd..c351a74a 100644 --- a/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch +++ b/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch @@ -1,4 +1,4 @@ -From e920aefcca3ad131d0f14d02955c3420fb99ee85 Mon Sep 17 00:00:00 2001 +From 664ce75106049547d7595fc021a0a1f9a69e585a Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 17:25:20 +0000 Subject: [PATCH 13/13] don't print empty error messages @@ -27,5 +27,5 @@ index 53c734de7..7cac53983 100644 } } -- -2.39.2 +2.39.5 diff --git a/config/grub/default/target.cfg b/config/grub/default/target.cfg index c546b1f9..8264d306 100644 --- a/config/grub/default/target.cfg +++ b/config/grub/default/target.cfg @@ -1,2 +1,4 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" -rev="b53ec06a1d6f22ffc1139cbfc0f292e4ca2da9cd" +rev="4dc6166571645780c459dde2cdc1b001a5ec844c" diff --git a/config/grub/nvme/config/payload b/config/grub/nvme/config/payload index 52b8dfd9..22dd8fe1 100644 --- a/config/grub/nvme/config/payload +++ b/config/grub/nvme/config/payload @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -# Copyright (C) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org> +# Copyright (C) 2014-2016,2020-2021,2023-2025 Leah Rowe <leah@libreboot.org> # Copyright (C) 2015 Klemens Nanni <contact@autoboot.org> set prefix=(memdisk)/boot/grub @@ -155,16 +155,12 @@ menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o # grub device enumeration is very slow, so checks are hardcoded - # TODO: add more strings, based on what distros set up when - # the user select auto-partitioning on those installers - lvmvol="lvm/grubcrypt-bootvol lvm/grubcrypt-rootvol" - raidvol="md/0 md/1 md/2 md/3 md/4 md/5 md/6 md/7 md/8 md/9" - # in practise, doing multiple redundant checks is perfectly fast and + # in practise, doing multiple redundant checks is perfectly fast # TODO: optimize grub itself, and use */? here for everything - for vol in ${lvmvol} ${raidvol} ; do + for vol in ${raidvol} ; do try_bootcfg "${vol}" done @@ -186,23 +182,37 @@ menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o set pager=0 echo -n "Attempting to unlock encrypted volumes" - for dev in ${bootdev} ${lvmvol} ${raidvol}; do + for dev in ${bootdev} ${raidvol}; do if cryptomount "${dev}" ; then break ; fi done set pager=1 echo + search_bootcfg crypto + + lvmvol="" + # after cryptomount, lvm volumes might be available + # using * is slow on some machines, but we use it here, + # just once. in so doing, we find every lvm volume + for vol in (*); do + if regexp ^lvm/ $vol; then + lvmvol="${lvmvol} ${vol}" + try_bootcfg "${vol}" + fi + done + + # user might have put luks inside lvm + set pager=0 + echo "Attempting to unlock encrypted LVMs" for vol in ${lvmvol}; do - try_bootcfg "${vol}" + cryptomount "$vol" done + set pager=1 + echo search_bootcfg crypto - for vol in lvm/* ; do - try_bootcfg "${vol}" - done - true # Prevent pager requiring to accept each line instead of whole screen } diff --git a/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch index b5ab0e5a..1421d21b 100644 --- a/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch +++ b/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch @@ -1,4 +1,4 @@ -From b89bf30d11fdc4fdc9bc5350621e73a2fc0d5b89 Mon Sep 17 00:00:00 2001 +From 07cd05c1756cdb18cf5e55d72e4002e271e8af12 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 31 Oct 2021 03:47:05 +0000 Subject: [PATCH 01/14] mitigate grub's missing characters for borders/arrow @@ -86,5 +86,5 @@ index 9c383e64a..8ec1dd1e8 100644 grub_term_highlight_color = old_color_highlight; geo->timeout_y = geo->first_entry_y + geo->num_entries -- -2.39.2 +2.39.5 diff --git a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch index d6bd2464..fd77218a 100644 --- a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch +++ b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch @@ -1,4 +1,4 @@ -From e074baff4a8ab3a6f8e397b49f6b3eade8728e02 Mon Sep 17 00:00:00 2001 +From c1617d04ac24544d578643863c545bb885444030 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sat, 19 Nov 2022 16:30:24 +0000 Subject: [PATCH 02/14] say the name libreboot, in the grub menu @@ -8,7 +8,7 @@ Subject: [PATCH 02/14] say the name libreboot, in the grub menu 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c -index bd4431000..300f55fe1 100644 +index 04d058f55..b1cc8f236 100644 --- a/grub-core/normal/main.c +++ b/grub-core/normal/main.c @@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term, @@ -16,10 +16,10 @@ index bd4431000..300f55fe1 100644 grub_term_cls (term); - msg_formatted = grub_xasprintf (_("GNU GRUB version %s"), PACKAGE_VERSION); -+ msg_formatted = grub_xasprintf (_("Libreboot 20241008 release, based on coreboot. https://libreboot.org/")); ++ msg_formatted = grub_xasprintf (_("Libreboot 20241206, 8th revision (GRUB menu): https://libreboot.org/")); if (!msg_formatted) return; -- -2.39.2 +2.39.5 diff --git a/config/grub/nvme/patches/0003-Add-CC0-license.patch b/config/grub/nvme/patches/0003-Add-CC0-license.patch index 6434ed21..e4704e6e 100644 --- a/config/grub/nvme/patches/0003-Add-CC0-license.patch +++ b/config/grub/nvme/patches/0003-Add-CC0-license.patch @@ -1,4 +1,4 @@ -From a62b61c5f3fda5a49e007095d79e654603c658d8 Mon Sep 17 00:00:00 2001 +From 4987b1725277f0e16895b7a67b8b2af9de3183ed Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 Subject: [PATCH 03/14] Add CC0 license @@ -10,10 +10,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index 0bf40caa6..4011e2d15 100644 +index de8c3aa8d..4a3be8568 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -470,7 +470,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e) +@@ -495,7 +495,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e) if (grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3") == 0 || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3+") == 0 @@ -38,5 +38,5 @@ index a42c20bd1..7157a30aa 100644 grub_util_error ("%s: incompatible license", filename); } -- -2.39.2 +2.39.5 diff --git a/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch index 310fe8bf..ff11241f 100644 --- a/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch +++ b/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch @@ -1,4 +1,4 @@ -From c8c80f05753c26b7d7f5e3c3993039c565194875 Mon Sep 17 00:00:00 2001 +From 6e3672bcba5075908f2a3b2ec235168bf2a4b1ed Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 Subject: [PATCH 04/14] Define GRUB_UINT32_MAX @@ -35,5 +35,5 @@ index 45079bf65..8c0b30395 100644 #define GRUB_PROPERLY_ALIGNED_ARRAY(name, size) grub_properly_aligned_t name[((size) + sizeof (grub_properly_aligned_t) - 1) / sizeof (grub_properly_aligned_t)] -- -2.39.2 +2.39.5 diff --git a/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch b/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch index b26e1f2c..1bdc0717 100644 --- a/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch +++ b/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch @@ -1,4 +1,4 @@ -From d171eb927e33f20627797cdca0dc81a3f3f478e0 Mon Sep 17 00:00:00 2001 +From ec94eb604358bd87236fc3cce9d14770c3595461 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 Subject: [PATCH 05/14] Add Argon2 algorithm @@ -30,10 +30,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> create mode 100644 grub-core/lib/argon2/ref.c diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi -index 1276c5930..cd6fb0e1e 100644 +index 3ad8e3efa..d7c6232af 100644 --- a/docs/grub-dev.texi +++ b/docs/grub-dev.texi -@@ -503,11 +503,75 @@ GRUB includes some code from other projects, and it is sometimes necessary +@@ -503,12 +503,76 @@ GRUB includes some code from other projects, and it is sometimes necessary to update it. @menu @@ -41,6 +41,7 @@ index 1276c5930..cd6fb0e1e 100644 * Gnulib:: * jsmn:: * minilzo:: + * libtasn1:: @end menu +@node Argon2 @@ -110,7 +111,7 @@ index 1276c5930..cd6fb0e1e 100644 @section Gnulib diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index 705d73fab..452f11b20 100644 +index f70e02e69..f5f9b040c 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def @@ -1219,6 +1219,14 @@ module = { @@ -2607,5 +2608,5 @@ index 000000000..c933df80d + } +} -- -2.39.2 +2.39.5 diff --git a/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch index 98a69414..ffacb5fa 100644 --- a/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch +++ b/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch @@ -1,4 +1,4 @@ -From 916de62553b3bcc4a565e1ea8f562031fb2a7b0f Mon Sep 17 00:00:00 2001 +From e02e392863dd30f40c538770c31268a8337433c5 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 Subject: [PATCH 06/14] Error on missing Argon2id parameters @@ -9,10 +9,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c -index d5106402f..bc818ea69 100644 +index 8036d76ff..efae8ac65 100644 --- a/grub-core/disk/luks2.c +++ b/grub-core/disk/luks2.c -@@ -38,6 +38,7 @@ GRUB_MOD_LICENSE ("GPLv3+"); +@@ -39,6 +39,7 @@ GRUB_MOD_LICENSE ("GPLv3+"); enum grub_luks2_kdf_type { LUKS2_KDF_TYPE_ARGON2I, @@ -20,7 +20,7 @@ index d5106402f..bc818ea69 100644 LUKS2_KDF_TYPE_PBKDF2 }; typedef enum grub_luks2_kdf_type grub_luks2_kdf_type_t; -@@ -90,7 +91,7 @@ struct grub_luks2_keyslot +@@ -91,7 +92,7 @@ struct grub_luks2_keyslot grub_int64_t time; grub_int64_t memory; grub_int64_t cpus; @@ -29,7 +29,7 @@ index d5106402f..bc818ea69 100644 struct { const char *hash; -@@ -160,10 +161,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot) +@@ -161,10 +162,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot) return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing or invalid KDF"); else if (!grub_strcmp (type, "argon2i") || !grub_strcmp (type, "argon2id")) { @@ -45,7 +45,7 @@ index d5106402f..bc818ea69 100644 return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing Argon2i parameters"); } else if (!grub_strcmp (type, "pbkdf2")) -@@ -459,6 +461,7 @@ luks2_decrypt_key (grub_uint8_t *out_key, +@@ -460,6 +462,7 @@ luks2_decrypt_key (grub_uint8_t *out_key, switch (k->kdf.type) { case LUKS2_KDF_TYPE_ARGON2I: @@ -54,5 +54,5 @@ index d5106402f..bc818ea69 100644 goto err; case LUKS2_KDF_TYPE_PBKDF2: -- -2.39.2 +2.39.5 diff --git a/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch index 487ab2a2..e34fd631 100644 --- a/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch +++ b/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch @@ -1,4 +1,4 @@ -From fa5deb59606422773ba8e77f3ab56226a10b116b Mon Sep 17 00:00:00 2001 +From 67a96fa1d99ebf28dbdaefbce57e6f3cba2f6bf3 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 Subject: [PATCH 07/14] Compile with Argon2id support @@ -11,7 +11,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 3 files changed, 17 insertions(+), 4 deletions(-) diff --git a/Makefile.util.def b/Makefile.util.def -index 0f74a1680..5a15e5637 100644 +index 038253b37..2f19569c9 100644 --- a/Makefile.util.def +++ b/Makefile.util.def @@ -3,7 +3,7 @@ AutoGen definitions Makefile.tpl; @@ -35,7 +35,7 @@ index 0f74a1680..5a15e5637 100644 common = grub-core/disk/luks.c; common = grub-core/disk/luks2.c; diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index 452f11b20..5c1af8682 100644 +index f5f9b040c..f1f38d8d3 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def @@ -1242,7 +1242,7 @@ module = { @@ -48,18 +48,18 @@ index 452f11b20..5c1af8682 100644 module = { diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c -index bc818ea69..5b9eaa599 100644 +index efae8ac65..2e742f5be 100644 --- a/grub-core/disk/luks2.c +++ b/grub-core/disk/luks2.c -@@ -27,6 +27,7 @@ - #include <grub/partition.h> +@@ -28,6 +28,7 @@ #include <grub/i18n.h> + #include <grub/safemath.h> +#include <argon2.h> #include <base64.h> #include <json.h> -@@ -462,8 +463,16 @@ luks2_decrypt_key (grub_uint8_t *out_key, +@@ -463,8 +464,16 @@ luks2_decrypt_key (grub_uint8_t *out_key, { case LUKS2_KDF_TYPE_ARGON2I: case LUKS2_KDF_TYPE_ARGON2ID: @@ -79,5 +79,5 @@ index bc818ea69..5b9eaa599 100644 hash = grub_crypto_lookup_md_by_name (k->kdf.u.pbkdf2.hash); if (!hash) -- -2.39.2 +2.39.5 diff --git a/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch index 327989fa..c1726631 100644 --- a/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch +++ b/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch @@ -1,4 +1,4 @@ -From dad12fd3307bd15e55f5ea483f174a1d3eaa45f5 Mon Sep 17 00:00:00 2001 +From de000f70873b61d62b0d561e0af5302e178c4e42 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 Subject: [PATCH 08/14] Make grub-install work with Argon2 @@ -22,5 +22,5 @@ index 7dc5657bb..cf7315891 100644 have_cryptodisk = 1; } -- -2.39.2 +2.39.5 diff --git a/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch index ddd3b85b..bc1fa260 100644 --- a/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch +++ b/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch @@ -1,4 +1,4 @@ -From 55d2ea1ebaa6b399736aa24393e08d007fde988c Mon Sep 17 00:00:00 2001 +From 5b239742565ed20fce545aa32952a37bbb45beb8 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Mon, 30 Oct 2023 22:19:21 +0000 Subject: [PATCH 09/14] at_keyboard coreboot: force scancodes2+translate @@ -103,5 +103,5 @@ index f8a129eb7..8207225c2 100644 grub_dprintf ("atkeyb", "returned set %d\n", ps2_state.current_set); if (ps2_state.current_set == 2) -- -2.39.2 +2.39.5 diff --git a/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch index ed3c1f4a..62c320ba 100644 --- a/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch +++ b/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch @@ -1,4 +1,4 @@ -From 4e89b0da7213b710bfb4d95a20e34b193f39e58c Mon Sep 17 00:00:00 2001 +From f8c3f597daf62a13f1c1169fddd78c833dd05cf1 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Tue, 31 Oct 2023 10:33:28 +0000 Subject: [PATCH 10/14] keylayouts: don't print "Unknown key" message @@ -34,5 +34,5 @@ index aa3ba34f2..445fa0601 100644 } -- -2.39.2 +2.39.5 diff --git a/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch index 77cb7a64..db720a76 100644 --- a/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch +++ b/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch @@ -1,4 +1,4 @@ -From d14c9af2656ee6b63b029ac28816f38d4ae26946 Mon Sep 17 00:00:00 2001 +From 27c79cf561fd5eef0c8eb5dda9f536cee3926b57 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 16:14:58 +0000 Subject: [PATCH 11/14] don't print missing prefix errors on the screen @@ -85,10 +85,10 @@ index 18de52562..2a0fea6c8 100644 } file = try_open_from_prefix (prefix, filename); diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index 4011e2d15..af3bd00d0 100644 +index 4a3be8568..6ae3d73f8 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -758,7 +758,7 @@ grub_dl_load (const char *name) +@@ -881,7 +881,7 @@ grub_dl_load (const char *name) return 0; if (! grub_dl_dir) { @@ -98,5 +98,5 @@ index 4011e2d15..af3bd00d0 100644 } -- -2.39.2 +2.39.5 diff --git a/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch index ada8288e..63e4b39c 100644 --- a/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch +++ b/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch @@ -1,4 +1,4 @@ -From d58c6298f62e70084a14aabc6c46b31d61f28152 Mon Sep 17 00:00:00 2001 +From 752ac0c09c7ac3f1ecc5d3d4d8410d424b433da2 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 16:36:22 +0000 Subject: [PATCH 12/14] don't print error if module not found @@ -17,10 +17,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org> 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index af3bd00d0..21d0cedb1 100644 +index 6ae3d73f8..4c15027fe 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -486,7 +486,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e) +@@ -511,7 +511,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e) s = grub_dl_find_section (e, ".modname"); if (!s) @@ -30,5 +30,5 @@ index af3bd00d0..21d0cedb1 100644 mod->name = grub_strdup ((char *) e + s->sh_offset); if (! mod->name) -- -2.39.2 +2.39.5 diff --git a/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch index f89977b4..bbc9410e 100644 --- a/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch +++ b/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch @@ -1,4 +1,4 @@ -From 031ee85c97452f6d1a5f341ff41c65aace5584c4 Mon Sep 17 00:00:00 2001 +From ac7a47b0a80a0f398c1250384fd5bc8c228c5d09 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 17:25:20 +0000 Subject: [PATCH 13/14] don't print empty error messages @@ -27,5 +27,5 @@ index 53c734de7..7cac53983 100644 } } -- -2.39.2 +2.39.5 diff --git a/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch index bfe28efd..3d7db82c 100644 --- a/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch +++ b/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch @@ -1,4 +1,4 @@ -From 246a626a369fc3730c6b5c21982fd89ed19c6fe0 Mon Sep 17 00:00:00 2001 +From 421a826c41882baafb2c5710959810657f24a52e Mon Sep 17 00:00:00 2001 From: Mate Kukri <km@mkukri.xyz> Date: Mon, 20 May 2024 11:43:35 +0100 Subject: [PATCH 14/14] Add native NVMe driver based on SeaBIOS @@ -31,12 +31,12 @@ index 43635d5ff..2c86dbbf6 100644 endif diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index 5c1af8682..02967d3ff 100644 +index f1f38d8d3..6f45989f8 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def -@@ -2614,3 +2614,9 @@ module = { - enable = efi; - depends = part_gpt; +@@ -2677,3 +2677,9 @@ module = { + cflags = '-Wno-uninitialized'; + cppflags = '-I$(srcdir)/lib/libtasn1-grub -I$(srcdir)/tests/asn1/'; }; + +module = { @@ -1070,5 +1070,5 @@ index fbf23df7f..186e76f0b 100644 struct grub_disk; -- -2.39.2 +2.39.5 diff --git a/config/grub/nvme/target.cfg b/config/grub/nvme/target.cfg index 9177dbd7..822d27b6 100644 --- a/config/grub/nvme/target.cfg +++ b/config/grub/nvme/target.cfg @@ -1,2 +1,4 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="nvme" -rev="b53ec06a1d6f22ffc1139cbfc0f292e4ca2da9cd" +rev="4dc6166571645780c459dde2cdc1b001a5ec844c" diff --git a/config/grub/xhci/config/payload b/config/grub/xhci/config/payload index 6a0fc250..d1f81fd3 100644 --- a/config/grub/xhci/config/payload +++ b/config/grub/xhci/config/payload @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -# Copyright (C) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org> +# Copyright (C) 2014-2016,2020-2021,2023-2025 Leah Rowe <leah@libreboot.org> # Copyright (C) 2015 Klemens Nanni <contact@autoboot.org> set prefix=(memdisk)/boot/grub @@ -156,16 +156,12 @@ menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o # grub device enumeration is very slow, so checks are hardcoded - # TODO: add more strings, based on what distros set up when - # the user select auto-partitioning on those installers - lvmvol="lvm/grubcrypt-bootvol lvm/grubcrypt-rootvol" - raidvol="md/0 md/1 md/2 md/3 md/4 md/5 md/6 md/7 md/8 md/9" - # in practise, doing multiple redundant checks is perfectly fast and + # in practise, doing multiple redundant checks is perfectly fast # TODO: optimize grub itself, and use */? here for everything - for vol in ${lvmvol} ${raidvol} ; do + for vol in ${raidvol} ; do try_bootcfg "${vol}" done @@ -187,23 +183,37 @@ menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o set pager=0 echo -n "Attempting to unlock encrypted volumes" - for dev in ${bootdev} ${lvmvol} ${raidvol}; do + for dev in ${bootdev} ${raidvol}; do if cryptomount "${dev}" ; then break ; fi done set pager=1 echo + search_bootcfg crypto + + lvmvol="" + # after cryptomount, lvm volumes might be available + # using * is slow on some machines, but we use it here, + # just once. in so doing, we find every lvm volume + for vol in (*); do + if regexp ^lvm/ $vol; then + lvmvol="${lvmvol} ${vol}" + try_bootcfg "${vol}" + fi + done + + # user might have put luks inside lvm + set pager=0 + echo "Attempting to unlock encrypted LVMs" for vol in ${lvmvol}; do - try_bootcfg "${vol}" + cryptomount "$vol" done + set pager=1 + echo search_bootcfg crypto - for vol in lvm/* ; do - try_bootcfg "${vol}" - done - true # Prevent pager requiring to accept each line instead of whole screen } diff --git a/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch index 0cc0cb34..d1ddc352 100644 --- a/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch +++ b/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch @@ -1,7 +1,7 @@ -From 1ee64f2373af3ad992993f9cf103a29df0359c3c Mon Sep 17 00:00:00 2001 +From 96e8baf58dcae1dbc016420ea1972d50f09f8f9b Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 31 Oct 2021 03:47:05 +0000 -Subject: [PATCH 01/22] mitigate grub's missing characters for borders/arrow +Subject: [PATCH 01/26] mitigate grub's missing characters for borders/arrow characters This cleans up the display on the main screen in GRUB. @@ -86,5 +86,5 @@ index 9c383e64a..8ec1dd1e8 100644 grub_term_highlight_color = old_color_highlight; geo->timeout_y = geo->first_entry_y + geo->num_entries -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch index bf2b5940..74970882 100644 --- a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch +++ b/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch @@ -1,14 +1,14 @@ -From 0e89a40423cdd6f8f20ad03d1c2f54ee7b5ea1b6 Mon Sep 17 00:00:00 2001 +From f23a77c22e61e466c081d2b81b968bac4812e6b6 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sat, 19 Nov 2022 16:30:24 +0000 -Subject: [PATCH 02/22] say the name libreboot, in the grub menu +Subject: [PATCH 02/26] say the name libreboot, in the grub menu --- grub-core/normal/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c -index bd4431000..300f55fe1 100644 +index 04d058f55..b1cc8f236 100644 --- a/grub-core/normal/main.c +++ b/grub-core/normal/main.c @@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term, @@ -16,10 +16,10 @@ index bd4431000..300f55fe1 100644 grub_term_cls (term); - msg_formatted = grub_xasprintf (_("GNU GRUB version %s"), PACKAGE_VERSION); -+ msg_formatted = grub_xasprintf (_("Libreboot 20241008 release, based on coreboot. https://libreboot.org/")); ++ msg_formatted = grub_xasprintf (_("Libreboot 20241206, 8th revision (GRUB menu): https://libreboot.org/")); if (!msg_formatted) return; -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0003-Add-CC0-license.patch b/config/grub/xhci/patches/0003-Add-CC0-license.patch index cf35c343..1903a465 100644 --- a/config/grub/xhci/patches/0003-Add-CC0-license.patch +++ b/config/grub/xhci/patches/0003-Add-CC0-license.patch @@ -1,7 +1,7 @@ -From c9be46c903d4aabc88fe4d9394d7a8e024868c32 Mon Sep 17 00:00:00 2001 +From 4e2ba04266f006369dc10b981803ba3a237f2ad8 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 03/22] Add CC0 license +Subject: [PATCH 03/26] Add CC0 license Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -10,10 +10,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index 0bf40caa6..4011e2d15 100644 +index de8c3aa8d..4a3be8568 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -470,7 +470,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e) +@@ -495,7 +495,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e) if (grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3") == 0 || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3+") == 0 @@ -38,5 +38,5 @@ index a42c20bd1..7157a30aa 100644 grub_util_error ("%s: incompatible license", filename); } -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch index 08566ba9..2adba78b 100644 --- a/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch +++ b/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch @@ -1,7 +1,7 @@ -From c988b6b3bb7567f9ed6bb0332b992577011970c2 Mon Sep 17 00:00:00 2001 +From c0b5c14042ee44e0e3ed814ebba3190b47514d82 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 04/22] Define GRUB_UINT32_MAX +Subject: [PATCH 04/26] Define GRUB_UINT32_MAX Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -35,5 +35,5 @@ index 45079bf65..8c0b30395 100644 #define GRUB_PROPERLY_ALIGNED_ARRAY(name, size) grub_properly_aligned_t name[((size) + sizeof (grub_properly_aligned_t) - 1) / sizeof (grub_properly_aligned_t)] -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch b/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch index 85a629c5..0db13c60 100644 --- a/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch +++ b/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch @@ -1,7 +1,7 @@ -From e2cfe7dcdb384ce5268a7c6e5cc8a6e8e01fc05f Mon Sep 17 00:00:00 2001 +From 46aa2f307de53b305045f7706b38a4e0d198875e Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 05/22] Add Argon2 algorithm +Subject: [PATCH 05/26] Add Argon2 algorithm Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -30,10 +30,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> create mode 100644 grub-core/lib/argon2/ref.c diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi -index 1276c5930..cd6fb0e1e 100644 +index 3ad8e3efa..d7c6232af 100644 --- a/docs/grub-dev.texi +++ b/docs/grub-dev.texi -@@ -503,11 +503,75 @@ GRUB includes some code from other projects, and it is sometimes necessary +@@ -503,12 +503,76 @@ GRUB includes some code from other projects, and it is sometimes necessary to update it. @menu @@ -41,6 +41,7 @@ index 1276c5930..cd6fb0e1e 100644 * Gnulib:: * jsmn:: * minilzo:: + * libtasn1:: @end menu +@node Argon2 @@ -110,7 +111,7 @@ index 1276c5930..cd6fb0e1e 100644 @section Gnulib diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index 705d73fab..452f11b20 100644 +index f70e02e69..f5f9b040c 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def @@ -1219,6 +1219,14 @@ module = { @@ -2607,5 +2608,5 @@ index 000000000..c933df80d + } +} -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch index 30de08cc..b9da0bec 100644 --- a/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch +++ b/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch @@ -1,7 +1,7 @@ -From 08a2fce70c6e988eb0112d5ad2787843910811bc Mon Sep 17 00:00:00 2001 +From c3a68f158725a858206c1fc91407b4993142a4a5 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 06/22] Error on missing Argon2id parameters +Subject: [PATCH 06/26] Error on missing Argon2id parameters Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -9,10 +9,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c -index d5106402f..bc818ea69 100644 +index 8036d76ff..efae8ac65 100644 --- a/grub-core/disk/luks2.c +++ b/grub-core/disk/luks2.c -@@ -38,6 +38,7 @@ GRUB_MOD_LICENSE ("GPLv3+"); +@@ -39,6 +39,7 @@ GRUB_MOD_LICENSE ("GPLv3+"); enum grub_luks2_kdf_type { LUKS2_KDF_TYPE_ARGON2I, @@ -20,7 +20,7 @@ index d5106402f..bc818ea69 100644 LUKS2_KDF_TYPE_PBKDF2 }; typedef enum grub_luks2_kdf_type grub_luks2_kdf_type_t; -@@ -90,7 +91,7 @@ struct grub_luks2_keyslot +@@ -91,7 +92,7 @@ struct grub_luks2_keyslot grub_int64_t time; grub_int64_t memory; grub_int64_t cpus; @@ -29,7 +29,7 @@ index d5106402f..bc818ea69 100644 struct { const char *hash; -@@ -160,10 +161,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot) +@@ -161,10 +162,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot) return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing or invalid KDF"); else if (!grub_strcmp (type, "argon2i") || !grub_strcmp (type, "argon2id")) { @@ -45,7 +45,7 @@ index d5106402f..bc818ea69 100644 return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing Argon2i parameters"); } else if (!grub_strcmp (type, "pbkdf2")) -@@ -459,6 +461,7 @@ luks2_decrypt_key (grub_uint8_t *out_key, +@@ -460,6 +462,7 @@ luks2_decrypt_key (grub_uint8_t *out_key, switch (k->kdf.type) { case LUKS2_KDF_TYPE_ARGON2I: @@ -54,5 +54,5 @@ index d5106402f..bc818ea69 100644 goto err; case LUKS2_KDF_TYPE_PBKDF2: -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch index 23f361dc..c6369367 100644 --- a/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch +++ b/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch @@ -1,7 +1,7 @@ -From 268da8d0ccce822ffa4c2d9d35fe717245daa726 Mon Sep 17 00:00:00 2001 +From 13f149fa5fe4e2ae0e95b3055584335beb9bdee8 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 07/22] Compile with Argon2id support +Subject: [PATCH 07/26] Compile with Argon2id support Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -11,7 +11,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 3 files changed, 17 insertions(+), 4 deletions(-) diff --git a/Makefile.util.def b/Makefile.util.def -index 0f74a1680..5a15e5637 100644 +index 038253b37..2f19569c9 100644 --- a/Makefile.util.def +++ b/Makefile.util.def @@ -3,7 +3,7 @@ AutoGen definitions Makefile.tpl; @@ -35,7 +35,7 @@ index 0f74a1680..5a15e5637 100644 common = grub-core/disk/luks.c; common = grub-core/disk/luks2.c; diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index 452f11b20..5c1af8682 100644 +index f5f9b040c..f1f38d8d3 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def @@ -1242,7 +1242,7 @@ module = { @@ -48,18 +48,18 @@ index 452f11b20..5c1af8682 100644 module = { diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c -index bc818ea69..5b9eaa599 100644 +index efae8ac65..2e742f5be 100644 --- a/grub-core/disk/luks2.c +++ b/grub-core/disk/luks2.c -@@ -27,6 +27,7 @@ - #include <grub/partition.h> +@@ -28,6 +28,7 @@ #include <grub/i18n.h> + #include <grub/safemath.h> +#include <argon2.h> #include <base64.h> #include <json.h> -@@ -462,8 +463,16 @@ luks2_decrypt_key (grub_uint8_t *out_key, +@@ -463,8 +464,16 @@ luks2_decrypt_key (grub_uint8_t *out_key, { case LUKS2_KDF_TYPE_ARGON2I: case LUKS2_KDF_TYPE_ARGON2ID: @@ -79,5 +79,5 @@ index bc818ea69..5b9eaa599 100644 hash = grub_crypto_lookup_md_by_name (k->kdf.u.pbkdf2.hash); if (!hash) -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch index ffdb306c..b0e36f9e 100644 --- a/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch +++ b/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch @@ -1,7 +1,7 @@ -From 5e540d3e4c01940c66425c4475a1cb6a35b188e8 Mon Sep 17 00:00:00 2001 +From 068442a692ab28298eab6bfd89a286c1d2ab91e0 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 08/22] Make grub-install work with Argon2 +Subject: [PATCH 08/26] Make grub-install work with Argon2 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -22,5 +22,5 @@ index 7dc5657bb..cf7315891 100644 have_cryptodisk = 1; } -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch index e4b26a38..9d7a9387 100644 --- a/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch +++ b/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch @@ -1,7 +1,7 @@ -From 9e9c69a74e5c14fd87ae56c8b9171a808d89742e Mon Sep 17 00:00:00 2001 +From 063d8d5fe39d2addca7806ca0a7c6f0544affa8f Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Mon, 30 Oct 2023 22:19:21 +0000 -Subject: [PATCH 09/22] at_keyboard coreboot: force scancodes2+translate +Subject: [PATCH 09/26] at_keyboard coreboot: force scancodes2+translate Scan code set 2 with translation should be assumed in every case, as the default starting position. @@ -103,5 +103,5 @@ index f8a129eb7..8207225c2 100644 grub_dprintf ("atkeyb", "returned set %d\n", ps2_state.current_set); if (ps2_state.current_set == 2) -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch index e8a3ce14..b116ea52 100644 --- a/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch +++ b/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch @@ -1,7 +1,7 @@ -From ccbcdb93af6747fe77094dfa9e114a034420bdd5 Mon Sep 17 00:00:00 2001 +From cb7d93059959eb921328bd285f18e363f0f44aec Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Tue, 31 Oct 2023 10:33:28 +0000 -Subject: [PATCH 10/22] keylayouts: don't print "Unknown key" message +Subject: [PATCH 10/26] keylayouts: don't print "Unknown key" message on keyboards with stuck keys, this results in GRUB just spewing it repeatedly, preventing use of GRUB. @@ -34,5 +34,5 @@ index aa3ba34f2..445fa0601 100644 } -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch index de68bb78..655e0005 100644 --- a/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch +++ b/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch @@ -1,7 +1,7 @@ -From 21a829a3a6f5e7d9028059df8057fdf8bce8fe06 Mon Sep 17 00:00:00 2001 +From 2ca7390361d1ff8ea18399b41e38436c8d506d60 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 16:14:58 +0000 -Subject: [PATCH 11/22] don't print missing prefix errors on the screen +Subject: [PATCH 11/26] don't print missing prefix errors on the screen we do actually set the prefix. this patch modifies grub to still set grub_errno and return accordingly, @@ -85,10 +85,10 @@ index 18de52562..2a0fea6c8 100644 } file = try_open_from_prefix (prefix, filename); diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index 4011e2d15..af3bd00d0 100644 +index 4a3be8568..6ae3d73f8 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -758,7 +758,7 @@ grub_dl_load (const char *name) +@@ -881,7 +881,7 @@ grub_dl_load (const char *name) return 0; if (! grub_dl_dir) { @@ -98,5 +98,5 @@ index 4011e2d15..af3bd00d0 100644 } -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch index 37f52e03..589dd4d7 100644 --- a/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch +++ b/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch @@ -1,7 +1,7 @@ -From edb8208100c523b5776f2cb0712fdc0c9065e517 Mon Sep 17 00:00:00 2001 +From 51b439fc0aea4ef2c52c80fa765d9bda992a8ac2 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 16:36:22 +0000 -Subject: [PATCH 12/22] don't print error if module not found +Subject: [PATCH 12/26] don't print error if module not found still set grub_errno accordingly, and otherwise behave the same. in libreboot, we remove a lot of @@ -17,10 +17,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org> 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index af3bd00d0..21d0cedb1 100644 +index 6ae3d73f8..4c15027fe 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -486,7 +486,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e) +@@ -511,7 +511,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e) s = grub_dl_find_section (e, ".modname"); if (!s) @@ -30,5 +30,5 @@ index af3bd00d0..21d0cedb1 100644 mod->name = grub_strdup ((char *) e + s->sh_offset); if (! mod->name) -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch index 74d8bade..7cd354e3 100644 --- a/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch +++ b/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch @@ -1,7 +1,7 @@ -From 65cb1871a3e125355df78a6d1d6f1bc7e356c4e8 Mon Sep 17 00:00:00 2001 +From 88c2d1618283c7f1c3b4adbce532789b0ca2447d Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 17:25:20 +0000 -Subject: [PATCH 13/22] don't print empty error messages +Subject: [PATCH 13/26] don't print empty error messages this is part two of the quest to kill the prefix error message. after i disabled prefix-related @@ -27,5 +27,5 @@ index 53c734de7..7cac53983 100644 } } -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch b/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch index 4c84b8c3..a35a16e9 100644 --- a/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch +++ b/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch @@ -1,7 +1,7 @@ -From 3273128b6dc6df83ef6b1d54d009a1ae26844bff Mon Sep 17 00:00:00 2001 +From 2472f3c2e465863c51a3cacf96ab910c015cfa8e Mon Sep 17 00:00:00 2001 From: Patrick Rudolph <patrick.rudolph@9elements.com> Date: Sun, 15 Nov 2020 19:00:27 +0100 -Subject: [PATCH 14/22] grub-core/bus/usb: Parse SuperSpeed companion +Subject: [PATCH 14/26] grub-core/bus/usb: Parse SuperSpeed companion descriptors Parse the SS_ENDPOINT_COMPANION descriptor, which is only present on USB 3.0 @@ -242,5 +242,5 @@ index aac5ab05a..bb2ab2e27 100644 { grub_uint8_t length; -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch b/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch index 937ff1af..84b81df7 100644 --- a/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch +++ b/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch @@ -1,7 +1,7 @@ -From 3b8f2defcda1a3b51ad0be8795a2338a0ed5ca59 Mon Sep 17 00:00:00 2001 +From 681a247209c83451cdebf6fc02cee6737a1921b6 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph <patrick.rudolph@9elements.com> -Date: Sun, 15 Nov 2020 19:47:06 +0100 -Subject: [PATCH 15/22] usb: Add enum for xHCI +Date: Mon, 7 Dec 2020 08:41:22 +0100 +Subject: [PATCH 15/26] usb: Add enum for xHCI Will be used in future patches. @@ -25,5 +25,5 @@ index 688c11f6d..ea6ee8c2c 100644 typedef int (*grub_usb_iterate_hook_t) (grub_usb_device_t dev, void *data); -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch b/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch index 8f6bb001..611db609 100644 --- a/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch +++ b/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch @@ -1,7 +1,7 @@ -From ba7ce6daec155bc3deac4e0c48d470afa024ab94 Mon Sep 17 00:00:00 2001 +From 8af01b2548f61a9197b9f931831ca397a7e7c9b3 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph <patrick.rudolph@9elements.com> -Date: Sun, 15 Nov 2020 19:48:03 +0100 -Subject: [PATCH 16/22] usbtrans: Set default maximum packet size +Date: Mon, 7 Dec 2020 08:41:23 +0100 +Subject: [PATCH 16/26] usbtrans: Set default maximum packet size Set the maximum packet size to 512 for SuperSpeed devices. @@ -29,5 +29,5 @@ index c5680b33a..c1080bb33 100644 max = 64; -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch b/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch index 60680bd0..05540fa6 100644 --- a/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch +++ b/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch @@ -1,7 +1,7 @@ -From c4cd7fbe3e2e8ff4cbe6d0db8c3356aeee614af5 Mon Sep 17 00:00:00 2001 +From 7a977001a1574c884c4f711686c2de01386b9230 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph <patrick.rudolph@9elements.com> Date: Sun, 15 Nov 2020 19:51:42 +0100 -Subject: [PATCH 17/22] grub-core/bus/usb: Add function pointer for +Subject: [PATCH 17/26] grub-core/bus/usb: Add function pointer for attach/detach events The xHCI code needs to be called for attaching or detaching a device. @@ -19,7 +19,7 @@ Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> 5 files changed, 29 insertions(+) diff --git a/grub-core/bus/usb/ehci.c b/grub-core/bus/usb/ehci.c -index 9abebc6bd..953b851c0 100644 +index 2db07c7c0..1ee056015 100644 --- a/grub-core/bus/usb/ehci.c +++ b/grub-core/bus/usb/ehci.c @@ -1812,6 +1812,8 @@ static struct grub_usb_controller_dev usb_controller = { @@ -117,5 +117,5 @@ index ea6ee8c2c..4dd179db2 100644 grub_uint64_t pending_reset; -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch b/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch index bc0f957f..a3eaba15 100644 --- a/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch +++ b/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch @@ -1,7 +1,7 @@ -From 1ab23afbfa7ae436741947c0b9bdacc434ad6153 Mon Sep 17 00:00:00 2001 +From e8a237ffb5bd3ba5258ce5c173b31424f3a39392 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph <patrick.rudolph@9elements.com> -Date: Sun, 15 Nov 2020 19:54:40 +0100 -Subject: [PATCH 18/22] grub-core/bus/usb/usbhub: Add new private fields for +Date: Mon, 7 Dec 2020 08:41:25 +0100 +Subject: [PATCH 18/26] grub-core/bus/usb/usbhub: Add new private fields for xHCI controller Store the root port number, the route, consisting out of the port ID @@ -73,5 +73,5 @@ index 4dd179db2..609faf7d0 100644 -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch b/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch index 02a24d5a..e6c0d474 100644 --- a/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch +++ b/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch @@ -1,7 +1,7 @@ -From 8c9e61e7b0f28a66d0f63c07b10fc6617a709010 Mon Sep 17 00:00:00 2001 +From badcc0d5ff1d4b194c93a530344788c4231d8789 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph <patrick.rudolph@9elements.com> -Date: Sun, 15 Nov 2020 19:59:25 +0100 -Subject: [PATCH 19/22] grub-core/bus/usb: Add xhci support +Date: Mon, 7 Dec 2020 08:41:26 +0100 +Subject: [PATCH 19/26] grub-core/bus/usb: Add xhci support Add support for xHCI USB controllers. The code is based on seabios implementation, but has been heavily @@ -41,13 +41,6 @@ TODO: * Test on USB3 hubs * Support for USB 3.1 and USB 3.2 controllers -Tested on qemu using coreboot and grub as payload: - -qemu-system-x86_64 -M q35 -bios $firmware -device qemu-xhci,id=xhci -accel kvm -m 1024M \ - -device usb-storage,drive=thumbdrive,bus=xhci.0,port=3 \ - -drive if=none,format=raw,id=thumbdrive,file=ubuntu-20.04.1-desktop-amd64.iso \ - -device usb-kbd,bus=xhci.0 - Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: sylv <sylv@sylv.io> --- @@ -74,7 +67,7 @@ index 43635d5ff..65016f856 100644 endif diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index 5c1af8682..9d59acd1e 100644 +index f1f38d8d3..fda723f0c 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def @@ -667,6 +667,13 @@ module = { @@ -2810,5 +2803,5 @@ index 609faf7d0..eb71fa1c7 100644 #endif /* GRUB_USB_H */ -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch b/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch index 735ef22d..01d7d008 100644 --- a/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch +++ b/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch @@ -1,7 +1,7 @@ -From 127961742cf7992f6989c6e89a18ab6d8f0b297f Mon Sep 17 00:00:00 2001 +From e4416b166e501777e53de387ac4329150483a160 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph <patrick.rudolph@9elements.com> -Date: Thu, 3 Dec 2020 13:44:55 +0100 -Subject: [PATCH 20/22] grub-core/bus/usb/usbhub: Add xHCI non root hub support +Date: Mon, 7 Dec 2020 08:41:27 +0100 +Subject: [PATCH 20/26] grub-core/bus/usb/usbhub: Add xHCI non root hub support Tested on Intel PCH C246, the USB3 hub can be configured by grub. @@ -123,5 +123,5 @@ index 039ebed65..d6c3f71dc 100644 #define GRUB_USB_FEATURE_ENDP_HALT 0x00 #define GRUB_USB_FEATURE_DEV_REMOTE_WU 0x01 -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch b/config/grub/xhci/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch new file mode 100644 index 00000000..d0874f85 --- /dev/null +++ b/config/grub/xhci/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch @@ -0,0 +1,26 @@ +From 8e6d5b598b3e21c905023b438110d71f487a2289 Mon Sep 17 00:00:00 2001 +From: Sven Anderson <sven@anderson.de> +Date: Sat, 28 May 2022 21:39:23 +0200 +Subject: [PATCH 21/26] xHCI: also accept SBRN 0x31 and 0x32 + +Signed-off-by: Sven Anderson <sven@anderson.de> +--- + grub-core/bus/usb/xhci-pci.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/grub-core/bus/usb/xhci-pci.c b/grub-core/bus/usb/xhci-pci.c +index a5bd3c97d..cde21f57a 100644 +--- a/grub-core/bus/usb/xhci-pci.c ++++ b/grub-core/bus/usb/xhci-pci.c +@@ -76,7 +76,7 @@ grub_xhci_pci_iter (grub_pci_device_t dev, grub_pci_id_t pciid, + /* Check Serial Bus Release Number */ + addr = grub_pci_make_address (dev, GRUB_XHCI_PCI_SBRN_REG); + release = grub_pci_read_byte (addr); +- if (release != 0x30) ++ if (release != 0x30 && release != 0x31 &&release != 0x32) + { + grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: Wrong SBRN: %0x\n", + release); +-- +2.39.5 + diff --git a/config/grub/xhci/patches/0022-xhci-fix-port-indexing.patch b/config/grub/xhci/patches/0022-xhci-fix-port-indexing.patch new file mode 100644 index 00000000..7e0bcb74 --- /dev/null +++ b/config/grub/xhci/patches/0022-xhci-fix-port-indexing.patch @@ -0,0 +1,43 @@ +From 32c6d97e2a80c2e74dd9daf74281a89d1a05faaa Mon Sep 17 00:00:00 2001 +From: Sven Anderson <sven@anderson.de> +Date: Mon, 13 Jan 2025 19:51:41 +0100 +Subject: [PATCH 22/26] xhci: fix port indexing + +--- + grub-core/bus/usb/xhci.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c +index f4591ffb5..dc89b9619 100644 +--- a/grub-core/bus/usb/xhci.c ++++ b/grub-core/bus/usb/xhci.c +@@ -2250,7 +2250,7 @@ grub_xhci_detect_dev (grub_usb_controller_t dev, int port, int *changed) + + *changed = 0; + grub_dprintf("xhci", "%s: dev=%p USB%d_%d port %d\n", __func__, dev, +- x->psids[port-1].major, x->psids[port-1].minor, port); ++ x->psids[port].major, x->psids[port].minor, port); + + /* On shutdown advertise all ports as disconnected. This will trigger + * a gracefull detatch. */ +@@ -2285,13 +2285,13 @@ grub_xhci_detect_dev (grub_usb_controller_t dev, int port, int *changed) + if (!(portsc & GRUB_XHCI_PORTSC_CCS)) + return GRUB_USB_SPEED_NONE; + +- for (grub_uint8_t i = 0; i < 16 && x->psids[port-1].psids[i].id > 0; i++) ++ for (grub_uint8_t i = 0; i < 16 && x->psids[port].psids[i].id > 0; i++) + { +- if (x->psids[port-1].psids[i].id == speed) ++ if (x->psids[port].psids[i].id == speed) + { + grub_dprintf("xhci", "%s: grub_usb_speed = %d\n", __func__, +- x->psids[port-1].psids[i].grub_usb_speed ); +- return x->psids[port-1].psids[i].grub_usb_speed; ++ x->psids[port].psids[i].grub_usb_speed ); ++ return x->psids[port].psids[i].grub_usb_speed; + } + } + +-- +2.39.5 + diff --git a/config/grub/xhci/patches/0023-xhci-workaround-z790-non-root-hub-speed-detection.patch b/config/grub/xhci/patches/0023-xhci-workaround-z790-non-root-hub-speed-detection.patch new file mode 100644 index 00000000..f07500fd --- /dev/null +++ b/config/grub/xhci/patches/0023-xhci-workaround-z790-non-root-hub-speed-detection.patch @@ -0,0 +1,28 @@ +From 70731c46da05311edb639ce1349bb6dd3279031e Mon Sep 17 00:00:00 2001 +From: Sven Anderson <sven@anderson.de> +Date: Mon, 13 Jan 2025 19:55:15 +0100 +Subject: [PATCH 23/26] xhci: workaround z790 non-root-hub speed detection + +--- + grub-core/bus/usb/xhci.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c +index dc89b9619..d13a7c39d 100644 +--- a/grub-core/bus/usb/xhci.c ++++ b/grub-core/bus/usb/xhci.c +@@ -2285,6 +2285,11 @@ grub_xhci_detect_dev (grub_usb_controller_t dev, int port, int *changed) + if (!(portsc & GRUB_XHCI_PORTSC_CCS)) + return GRUB_USB_SPEED_NONE; + ++ if (port == 4 || port == 12 && speed < XHCI_USB_HIGHSPEED) { // inital hub speed detection on Z790 is too low ++ grub_dprintf("xhci", "%s: setting internal hub speed to high\n", __func__); ++ return GRUB_USB_SPEED_HIGH; ++ } ++ + for (grub_uint8_t i = 0; i < 16 && x->psids[port].psids[i].id > 0; i++) + { + if (x->psids[port].psids[i].id == speed) +-- +2.39.5 + diff --git a/config/grub/xhci/patches/0024-xhci-configure-TT-for-non-root-hubs.patch b/config/grub/xhci/patches/0024-xhci-configure-TT-for-non-root-hubs.patch new file mode 100644 index 00000000..a605e210 --- /dev/null +++ b/config/grub/xhci/patches/0024-xhci-configure-TT-for-non-root-hubs.patch @@ -0,0 +1,98 @@ +From 233f7dd274ef2ccac7b1fc0f5cfdeb7c01aef58b Mon Sep 17 00:00:00 2001 +From: Sven Anderson <sven@anderson.de> +Date: Mon, 13 Jan 2025 20:26:32 +0100 +Subject: [PATCH 24/26] xhci: configure TT for non-root-hubs + +--- + grub-core/bus/usb/usbhub.c | 6 +++++ + grub-core/bus/usb/xhci.c | 45 +++++++++++++++++++++++++++++++++----- + include/grub/usb.h | 2 ++ + 3 files changed, 47 insertions(+), 6 deletions(-) + +diff --git a/grub-core/bus/usb/usbhub.c b/grub-core/bus/usb/usbhub.c +index e96505aa9..629b3ed53 100644 +--- a/grub-core/bus/usb/usbhub.c ++++ b/grub-core/bus/usb/usbhub.c +@@ -818,3 +818,9 @@ grub_usb_iterate (grub_usb_iterate_hook_t hook, void *hook_data) + + return 0; + } ++ ++grub_usb_device_t ++grub_usb_get_dev (int addr) ++{ ++ return grub_usb_devs[addr]; ++} +diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c +index d13a7c39d..8ad2a10f9 100644 +--- a/grub-core/bus/usb/xhci.c ++++ b/grub-core/bus/usb/xhci.c +@@ -623,13 +623,46 @@ grub_xhci_alloc_inctx(struct grub_xhci *x, int maxepid, + break; + } + +- /* Route is greater zero on devices that are connected to a non root hub */ +- if (dev->route) +- { +- /* FIXME: Implement this code for non SuperSpeed hub devices */ ++ /* Set routing string */ ++ slot->ctx[0] |= dev->route; ++ ++ /* Set root hub port number */ ++ slot->ctx[1] |= (dev->root_port + 1) << 16; ++ ++ if (dev->split_hubaddr && (dev->speed == GRUB_USB_SPEED_LOW || ++ dev->speed == GRUB_USB_SPEED_FULL)) { ++ ++ grub_usb_device_t hubdev = grub_usb_get_dev(dev->split_hubaddr); ++ ++ if (!hubdev || hubdev->descdev.class != GRUB_USB_CLASS_HUB) { ++ grub_dprintf("xhci", "Invalid hub device at addr %d!\n", dev->split_hubaddr); ++ return NULL; ++ } ++ ++ struct grub_xhci_priv *hub_priv = hubdev->xhci_priv; ++ if (!hub_priv) { ++ grub_dprintf("xhci", "Hub has no xhci_priv!\n"); ++ return NULL; ++ } ++ ++ if (hubdev->speed == GRUB_USB_SPEED_HIGH) { ++ /* Direct connection to high-speed hub - set up TT */ ++ grub_dprintf("xhci", "Direct high-speed hub connection - configuring TT with " ++ "hub slot %d port %d\n", hub_priv->slotid, dev->split_hubport); ++ slot->ctx[2] |= hub_priv->slotid; ++ slot->ctx[2] |= dev->split_hubport << 8; + } +- slot->ctx[0] |= dev->route; +- slot->ctx[1] |= (dev->root_port+1) << 16; ++ else { ++ /* Hub is not high-speed, inherit TT settings from parent */ ++ volatile struct grub_xhci_slotctx *hubslot; ++ grub_dprintf("xhci", "Non high-speed hub - inheriting TT settings from parent\n"); ++ hubslot = grub_dma_phys2virt(x->devs[hub_priv->slotid].ptr_low, x->devs_dma); ++ slot->ctx[2] = hubslot->ctx[2]; ++ } ++ } ++ ++ grub_dprintf("xhci", "Slot context: ctx[0]=0x%08x ctx[1]=0x%08x ctx[2]=0x%08x\n", ++ slot->ctx[0], slot->ctx[1], slot->ctx[2]); + + grub_arch_sync_dma_caches(in, size); + +diff --git a/include/grub/usb.h b/include/grub/usb.h +index eb71fa1c7..df97a60cc 100644 +--- a/include/grub/usb.h ++++ b/include/grub/usb.h +@@ -62,6 +62,8 @@ typedef int (*grub_usb_controller_iterate_hook_t) (grub_usb_controller_t dev, + /* Call HOOK with each device, until HOOK returns non-zero. */ + int grub_usb_iterate (grub_usb_iterate_hook_t hook, void *hook_data); + ++grub_usb_device_t grub_usb_get_dev (int addr); ++ + grub_usb_err_t grub_usb_device_initialize (grub_usb_device_t dev); + + grub_usb_err_t grub_usb_get_descriptor (grub_usb_device_t dev, +-- +2.39.5 + diff --git a/config/grub/xhci/patches/0021-Fix-compilation-on-x86_64.patch b/config/grub/xhci/patches/0025-Fix-compilation-on-x86_64.patch index 6a5f0502..e75cc5e9 100644 --- a/config/grub/xhci/patches/0021-Fix-compilation-on-x86_64.patch +++ b/config/grub/xhci/patches/0025-Fix-compilation-on-x86_64.patch @@ -1,7 +1,7 @@ -From 8d46c537d4df8c785af4b85644d311ba53af5964 Mon Sep 17 00:00:00 2001 +From 0441e7eff7950bfd47fc2f5533ce2c64b785dc1d Mon Sep 17 00:00:00 2001 From: Patrick Rudolph <patrick.rudolph@9elements.com> Date: Wed, 24 Feb 2021 08:25:41 +0100 -Subject: [PATCH 21/22] Fix compilation on x86_64 +Subject: [PATCH 25/26] Fix compilation on x86_64 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> --- @@ -9,7 +9,7 @@ Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c -index f4591ffb5..3495bb919 100644 +index 8ad2a10f9..ceb57c9b3 100644 --- a/grub-core/bus/usb/xhci.c +++ b/grub-core/bus/usb/xhci.c @@ -184,7 +184,7 @@ enum @@ -36,7 +36,7 @@ index f4591ffb5..3495bb919 100644 static inline grub_uint32_t grub_xhci_port_read (struct grub_xhci *x, grub_uint32_t port) { -@@ -664,7 +672,7 @@ static void xhci_process_events(struct grub_xhci *x) +@@ -697,7 +705,7 @@ static void xhci_process_events(struct grub_xhci *x) case ER_TRANSFER: case ER_COMMAND_COMPLETE: { @@ -45,7 +45,7 @@ index f4591ffb5..3495bb919 100644 struct grub_xhci_ring *ring = XHCI_RING(rtrb); volatile struct grub_xhci_trb *evt = &ring->evt; grub_uint32_t eidx = rtrb - ring->ring + 1; -@@ -697,9 +705,9 @@ static void xhci_process_events(struct grub_xhci *x) +@@ -730,9 +738,9 @@ static void xhci_process_events(struct grub_xhci *x) } grub_xhci_write32(&evts->nidx, nidx); volatile struct grub_xhci_ir *ir = x->ir; @@ -58,7 +58,7 @@ index f4591ffb5..3495bb919 100644 } } -@@ -800,7 +808,7 @@ static void xhci_trb_queue(volatile struct grub_xhci_ring *ring, +@@ -833,7 +841,7 @@ static void xhci_trb_queue(volatile struct grub_xhci_ring *ring, grub_uint32_t xferlen, grub_uint32_t flags) { grub_dprintf("xhci", "%s: ring %p data %llx len %d flags 0x%x remain 0x%x\n", __func__, @@ -67,7 +67,7 @@ index f4591ffb5..3495bb919 100644 if (xhci_ring_full(ring)) { -@@ -1907,7 +1915,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev, +@@ -1940,7 +1948,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev, if (transfer->type == GRUB_USB_TRANSACTION_TYPE_CONTROL) { volatile struct grub_usb_packet_setup *setupdata; @@ -76,7 +76,7 @@ index f4591ffb5..3495bb919 100644 grub_dprintf("xhci", "%s: CONTROLL TRANS req %d\n", __func__, setupdata->request); grub_dprintf("xhci", "%s: CONTROLL TRANS length %d\n", __func__, setupdata->length); -@@ -1974,7 +1982,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev, +@@ -2007,7 +2015,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev, /* Assume the ring has enough free space for all TRBs */ if (flags & TRB_TR_IDT && tr->size <= (int)sizeof(inline_data)) { @@ -86,5 +86,5 @@ index f4591ffb5..3495bb919 100644 } else -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/xhci/patches/0026-Add-native-NVMe-driver-based-on-SeaBIOS.patch index 82452f1c..36bbecd9 100644 --- a/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch +++ b/config/grub/xhci/patches/0026-Add-native-NVMe-driver-based-on-SeaBIOS.patch @@ -1,7 +1,7 @@ -From 394102db8f4de6782b628b29c59d2634f2c72674 Mon Sep 17 00:00:00 2001 +From 4440b01a702368c81520f630aa16852de55bb808 Mon Sep 17 00:00:00 2001 From: Mate Kukri <km@mkukri.xyz> Date: Mon, 20 May 2024 11:43:35 +0100 -Subject: [PATCH 22/22] Add native NVMe driver based on SeaBIOS +Subject: [PATCH 26/26] Add native NVMe driver based on SeaBIOS Tested to successfully boot Debian on QEMU and OptiPlex 3050. @@ -31,12 +31,12 @@ index 65016f856..7bc0866ba 100644 endif diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index 9d59acd1e..56076728b 100644 +index fda723f0c..367e4b5e6 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def -@@ -2621,3 +2621,9 @@ module = { - enable = efi; - depends = part_gpt; +@@ -2684,3 +2684,9 @@ module = { + cflags = '-Wno-uninitialized'; + cppflags = '-I$(srcdir)/lib/libtasn1-grub -I$(srcdir)/tests/asn1/'; }; + +module = { @@ -1070,5 +1070,5 @@ index fbf23df7f..186e76f0b 100644 struct grub_disk; -- -2.39.2 +2.39.5 diff --git a/config/grub/xhci/target.cfg b/config/grub/xhci/target.cfg index af33f65d..aca71fca 100644 --- a/config/grub/xhci/target.cfg +++ b/config/grub/xhci/target.cfg @@ -1,2 +1,4 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="xhci" -rev="b53ec06a1d6f22ffc1139cbfc0f292e4ca2da9cd" +rev="4dc6166571645780c459dde2cdc1b001a5ec844c" diff --git a/config/ifd/t480/gbe b/config/ifd/t480/gbe Binary files differnew file mode 100644 index 00000000..dfb2300d --- /dev/null +++ b/config/ifd/t480/gbe diff --git a/config/ifd/t480/ifd_16 b/config/ifd/t480/ifd_16 Binary files differnew file mode 100644 index 00000000..cdeaee4a --- /dev/null +++ b/config/ifd/t480/ifd_16 diff --git a/config/ifd/t480s/gbe b/config/ifd/t480s/gbe Binary files differnew file mode 100644 index 00000000..3b45d172 --- /dev/null +++ b/config/ifd/t480s/gbe diff --git a/config/ifd/t480s/ifd_16 b/config/ifd/t480s/ifd_16 Binary files differnew file mode 100644 index 00000000..dbbd99cb --- /dev/null +++ b/config/ifd/t480s/ifd_16 diff --git a/config/pcsx-redux/target.cfg b/config/pcsx-redux/target.cfg index 21dc4b2d..36e2a055 100644 --- a/config/pcsx-redux/target.cfg +++ b/config/pcsx-redux/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + makeargs="-f lbmkbofhmakefile" cleanargs="-f lbmkbofhmakefile" mkhelper="copyps1bios" diff --git a/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch new file mode 100644 index 00000000..5cf60763 --- /dev/null +++ b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch @@ -0,0 +1,26 @@ +From ebd8293eb1af20c204beb3aa1394865185e2f3f0 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Mon, 6 Jan 2025 18:49:58 +0000 +Subject: [PATCH 1/1] Print the Libreboot version in the SeaBIOS menu + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + src/bootsplash.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/src/bootsplash.c b/src/bootsplash.c +index 538b316d..8746098c 100644 +--- a/src/bootsplash.c ++++ b/src/bootsplash.c +@@ -48,7 +48,7 @@ enable_vga_console(void) + call16_int10(&br); + + // Write to screen. +- printf("SeaBIOS (version %s)\n", VERSION); ++ printf("Libreboot 20241206, 8th revision (SeaBIOS menu): https://libreboot.org/\n"); + display_uuid(); + } + +-- +2.39.5 + diff --git a/config/seabios/default/target.cfg b/config/seabios/default/target.cfg index f80b9db2..9ff1db3e 100644 --- a/config/seabios/default/target.cfg +++ b/config/seabios/default/target.cfg @@ -1,2 +1,4 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" -rev="62a1429ec1ec67f14c039d97627a6a7ef70a983c" +rev="1602647f1be24fe63d11138d802e735c8e674e63" diff --git a/config/submodule/coreboot/coreboot413/vboot/module.cfg b/config/submodule/coreboot/coreboot413/vboot/module.cfg index 34656ba9..79c98870 100644 --- a/config/submodule/coreboot/coreboot413/vboot/module.cfg +++ b/config/submodule/coreboot/coreboot413/vboot/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subrepo="https://review.coreboot.org/vboot.git" subrepo_bkup="https://github.com/coreboot/vboot" subhash="4c523ed10f25de872ac0513ebd6ca53d3970b9de" diff --git a/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg b/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg index 6dde459a..aec8ffba 100644 --- a/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg +++ b/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20230628.tar.gz" subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20230628.tar.gz" subhash="d726e69ebd8b8110690e3aff8d1919b43b0a2185efdeb9131ea8d89d321ca3a318a89c721ea740ae366f31ed3d1c11c2906f8807ee8a190e6f67fe5b2023cea4" diff --git a/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg index d7864542..ef9a598f 100644 --- a/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg +++ b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subrepo="https://review.coreboot.org/arm-trusted-firmware.git" subrepo_bkup="https://github.com/coreboot/arm-trusted-firmware" subhash="c5b8de86c8838d08d5d8c9d67c7a432817ee62b8" diff --git a/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg b/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg index 370a52ec..3473c884 100644 --- a/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg +++ b/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.42.tar.xz" subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.42.tar.xz" subhash="155f3ba14cd220102f4f29a4f1e5cfee3c48aa03b74603460d05afb73c70d6657a9d87eee6eb88bf13203fe6f31177a5c9addc04384e956e7da8069c8ecd20a6" diff --git a/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg b/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg index 1e4037e8..20942b4b 100644 --- a/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg +++ b/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.1.0/gcc-14.1.0.tar.xz" subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.1.0/gcc-14.1.0.tar.xz" subhash="e9e224f2b26646fcf038d28dfa08b94c623bc57941f99894a321d01c600f7c68aff6b8837fd25e73e540de1f8de5606e98694a62cdcdfb525ce768b3ef6879ea" diff --git a/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg index fe274faf..46b55c01 100644 --- a/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg +++ b/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz" subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz" subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2" diff --git a/config/submodule/coreboot/default/intel-microcode/module.cfg b/config/submodule/coreboot/default/intel-microcode/module.cfg index be106f7d..f7d6d283 100644 --- a/config/submodule/coreboot/default/intel-microcode/module.cfg +++ b/config/submodule/coreboot/default/intel-microcode/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subrepo="https://review.coreboot.org/intel-microcode.git" subrepo_bkup="https://github.com/coreboot/intel-microcode" subhash="5278dfcf98e89098326b3eb8a85d07120a8730f8" diff --git a/config/submodule/coreboot/default/libgfxinit/module.cfg b/config/submodule/coreboot/default/libgfxinit/module.cfg index 1ba41724..93383129 100644 --- a/config/submodule/coreboot/default/libgfxinit/module.cfg +++ b/config/submodule/coreboot/default/libgfxinit/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subrepo="https://review.coreboot.org/libgfxinit.git" subrepo_bkup="https://github.com/coreboot/libgfxinit" subhash="17cfc92f402493979783585b6581efbd98c0cf07" diff --git a/config/submodule/coreboot/default/libhwbase/module.cfg b/config/submodule/coreboot/default/libhwbase/module.cfg index 2937b8b7..4995e70f 100644 --- a/config/submodule/coreboot/default/libhwbase/module.cfg +++ b/config/submodule/coreboot/default/libhwbase/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subrepo="https://review.coreboot.org/libhwbase.git" subrepo_bkup="https://github.com/coreboot/libhwbase" subhash="584629b9f4771b7618951cec57df2ca3af9c6981" diff --git a/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg index f98b6444..9b6cc57a 100644 --- a/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg +++ b/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz" subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz" subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97" diff --git a/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg index 3419bc30..93cc1a05 100644 --- a/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg +++ b/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz" subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz" subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475" diff --git a/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg b/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg index c98cc71f..3895e2ef 100644 --- a/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg +++ b/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2" subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2" subhash="f28445d368debdf44219cc57df33800a8c0e49186cd60836d4adfec7700d53b801d34aa9fc9bfda74169843f33a1e8b465e11292582eb968bb9c3a26f54dd172" diff --git a/config/submodule/coreboot/default/vboot/module.cfg b/config/submodule/coreboot/default/vboot/module.cfg index 1dc4c904..32a10913 100644 --- a/config/submodule/coreboot/default/vboot/module.cfg +++ b/config/submodule/coreboot/default/vboot/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subrepo="https://review.coreboot.org/vboot.git" subrepo_bkup="https://github.com/coreboot/vboot" subhash="4b12d392e5b12de29c582df4e717b1228e9f1594" diff --git a/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg b/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg index e839b77e..50e6989e 100644 --- a/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg +++ b/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-20190703.tar.gz" subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix2-20190703.tar.gz" subhash="8445a6d354ce3bcbfb5159f4ec0312b1e910c0b1b2033a2300f892e4ac580abab4e3f5b4ded379f0036299359d307330511ab7053678cfd9031d7df4c365f555" diff --git a/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg index b549e139..6e86543f 100644 --- a/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg +++ b/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.32.tar.xz" subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.32.tar.xz" subhash="d326408f12a03d9a61a9de56584c2af12f81c2e50d2d7e835d51565df8314df01575724afa1e43bd0db45cfc9916b41519b67dfce03232aa4978704492a6994a" diff --git a/config/submodule/coreboot/fam15h/blobs/module.cfg b/config/submodule/coreboot/fam15h/blobs/module.cfg index 215caf4d..f649cab2 100644 --- a/config/submodule/coreboot/fam15h/blobs/module.cfg +++ b/config/submodule/coreboot/fam15h/blobs/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subrepo="https://review.coreboot.org/blobs.git" subrepo_bkup="https://github.com/coreboot/blobs" subhash="034b27818450428f70aa9316c8bd0d65bacd8ee8" diff --git a/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg index 6ce00577..1a111581 100644 --- a/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg +++ b/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-8.3.0/gcc-8.3.0.tar.xz" subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-8.3.0/gcc-8.3.0.tar.xz" subhash="1811337ae3add9680cec64968a2509d085b6dc5b6783fc1e8c295e3e47416196fd1a3ad8dfe7e10be2276b4f62c357659ce2902f239f60a8648548231b4b5802" diff --git a/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg index 7caf1845..08926b6a 100644 --- a/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg +++ b/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.1.2.tar.xz" subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.1.2.tar.xz" subhash="9f098281c0593b76ee174b722936952671fab1dae353ce3ed436a31fe2bc9d542eca752353f6645b7077c1f395ab4fdd355c58e08e2a801368f1375690eee2c6" diff --git a/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg b/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg index 34e77772..89cfabc7 100644 --- a/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg +++ b/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.1.0.tar.gz" subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.1.0.tar.gz" subhash="72d657958b07c7812dc9c7cbae093118ce0e454c68a585bfb0e2fa559f1bf7c5f49b93906f580ab3f1073e5b595d23c6494d4d76b765d16dde857a18dd239628" diff --git a/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg index e33b1804..c6ebf4de 100644 --- a/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg +++ b/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.0.2.tar.xz" subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.0.2.tar.xz" subhash="d583555d08863bf36c89b289ae26bae353d9a31f08ee3894520992d2c26e5683c4c9c193d7ad139632f71c0a476d85ea76182702a98bf08dde7b6f65a54f8b88" diff --git a/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg b/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg index fecb3cba..4c91ec05 100644 --- a/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg +++ b/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.14.02/nasm-2.14.02.tar.bz2" subfile_bkup="https://coreboot.org/releases/crossgcc-sources/nasm-2.14.02.tar.bz2" subhash="71e3d44736493b1a56d4230bc2e5519e858aaadde5d89a692f1472fad6755084460e36b42852707f4c862eff75d3f2c232aedcc4e61e9d9ffcc8c9ca6498292b" diff --git a/config/submodule/coreboot/fam15h/vboot/module.cfg b/config/submodule/coreboot/fam15h/vboot/module.cfg index 5fac75c3..b0897e4f 100644 --- a/config/submodule/coreboot/fam15h/vboot/module.cfg +++ b/config/submodule/coreboot/fam15h/vboot/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subrepo="https://review.coreboot.org/vboot.git" subrepo_bkup="https://github.com/coreboot/vboot" subhash="ecdca931ae0637d1a9498f64862939bd5bb99e0b" diff --git a/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg b/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg deleted file mode 100644 index 6dde459a..00000000 --- a/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg +++ /dev/null @@ -1,3 +0,0 @@ -subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20230628.tar.gz" -subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20230628.tar.gz" -subhash="d726e69ebd8b8110690e3aff8d1919b43b0a2185efdeb9131ea8d89d321ca3a318a89c721ea740ae366f31ed3d1c11c2906f8807ee8a190e6f67fe5b2023cea4" diff --git a/config/submodule/coreboot/next/acpica-unix-20241212.tar.gz/module.cfg b/config/submodule/coreboot/next/acpica-unix-20241212.tar.gz/module.cfg new file mode 100644 index 00000000..30baf001 --- /dev/null +++ b/config/submodule/coreboot/next/acpica-unix-20241212.tar.gz/module.cfg @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20241212.tar.gz" +subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20241212.tar.gz" +subhash="daa4243f927451ac18c337cf17c27849e68329b3f7eb25b8c3379fda9c6a484201b73d4ffccab89a0ae22cc5e432f141ba149015a003834b0515bdb3d4efe0a8" diff --git a/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg b/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg index f3e372a4..2117a540 100644 --- a/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg +++ b/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.43.1.tar.xz" subfile_bkup="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.43.1.tar.xz" subhash="20977ad17729141a2c26d358628f44a0944b84dcfefdec2ba029c2d02f40dfc41cc91c0631044560d2bd6f9a51e1f15846b4b311befbe14f1239f14ff7d57824" diff --git a/config/submodule/coreboot/next/fsp/module.cfg b/config/submodule/coreboot/next/fsp/module.cfg index 8042a059..a380ddda 100644 --- a/config/submodule/coreboot/next/fsp/module.cfg +++ b/config/submodule/coreboot/next/fsp/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subrepo="https://review.coreboot.org/fsp.git" subrepo_bkup="https://github.com/coreboot/fsp" -subhash="68328e297e195a6cfb1949b60d971c032a172ba3" +subhash="909cf43ad6ccebb6adee482bc0a4f098c32c9a6d" diff --git a/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg b/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg index 9a4892f5..4ef88d1d 100644 --- a/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg +++ b/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz" subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz" subhash="932bdef0cda94bacedf452ab17f103c0cb511ff2cec55e9112fc0328cbf1d803b42595728ea7b200e0a057c03e85626f937012e49a7515bc5dd256b2bf4bc396" diff --git a/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg index fe274faf..46b55c01 100644 --- a/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg +++ b/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz" subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz" subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2" diff --git a/config/submodule/coreboot/next/intel-microcode/module.cfg b/config/submodule/coreboot/next/intel-microcode/module.cfg index 8a364c43..ef649800 100644 --- a/config/submodule/coreboot/next/intel-microcode/module.cfg +++ b/config/submodule/coreboot/next/intel-microcode/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subrepo="https://review.coreboot.org/intel-microcode.git" subrepo_bkup="https://github.com/coreboot/intel-microcode" -subhash="129f82f7429c29976b15d6837d2f573cc6a02c26" +subhash="8ac9378a84879e81c503e09f344560b3dd7f72df" diff --git a/config/submodule/coreboot/next/libgfxinit/module.cfg b/config/submodule/coreboot/next/libgfxinit/module.cfg index 1ba41724..93383129 100644 --- a/config/submodule/coreboot/next/libgfxinit/module.cfg +++ b/config/submodule/coreboot/next/libgfxinit/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subrepo="https://review.coreboot.org/libgfxinit.git" subrepo_bkup="https://github.com/coreboot/libgfxinit" subhash="17cfc92f402493979783585b6581efbd98c0cf07" diff --git a/config/submodule/coreboot/next/libhwbase/module.cfg b/config/submodule/coreboot/next/libhwbase/module.cfg index 2937b8b7..4995e70f 100644 --- a/config/submodule/coreboot/next/libhwbase/module.cfg +++ b/config/submodule/coreboot/next/libhwbase/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subrepo="https://review.coreboot.org/libhwbase.git" subrepo_bkup="https://github.com/coreboot/libhwbase" subhash="584629b9f4771b7618951cec57df2ca3af9c6981" diff --git a/config/submodule/coreboot/next/module.list b/config/submodule/coreboot/next/module.list index 1cc88fd6..36f05dbe 100644 --- a/config/submodule/coreboot/next/module.list +++ b/config/submodule/coreboot/next/module.list @@ -9,4 +9,4 @@ util/crossgcc/tarballs/gmp-6.3.0.tar.xz util/crossgcc/tarballs/mpc-1.3.1.tar.gz util/crossgcc/tarballs/mpfr-4.2.1.tar.xz util/crossgcc/tarballs/nasm-2.16.03.tar.bz2 -util/crossgcc/tarballs/acpica-unix-20230628.tar.gz +util/crossgcc/tarballs/acpica-unix-20241212.tar.gz diff --git a/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg index f98b6444..9b6cc57a 100644 --- a/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg +++ b/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz" subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz" subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97" diff --git a/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg index 3419bc30..93cc1a05 100644 --- a/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg +++ b/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz" subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz" subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475" diff --git a/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg b/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg index c98cc71f..3895e2ef 100644 --- a/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg +++ b/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2" subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2" subhash="f28445d368debdf44219cc57df33800a8c0e49186cd60836d4adfec7700d53b801d34aa9fc9bfda74169843f33a1e8b465e11292582eb968bb9c3a26f54dd172" diff --git a/config/submodule/coreboot/next/vboot/module.cfg b/config/submodule/coreboot/next/vboot/module.cfg index 917d23fa..d13a1b29 100644 --- a/config/submodule/coreboot/next/vboot/module.cfg +++ b/config/submodule/coreboot/next/vboot/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subrepo="https://review.coreboot.org/vboot.git" subrepo_bkup="https://github.com/coreboot/vboot" -subhash="f1f70f46dc5482bb7c654e53ed58d4001e386df2" +subhash="3f94e2c7ed58c4e67d6e7dc6052ec615dbbb9bb4" diff --git a/config/submodule/docs/html/module.cfg b/config/submodule/docs/html/module.cfg index 1b13b25d..c9ff5c75 100644 --- a/config/submodule/docs/html/module.cfg +++ b/config/submodule/docs/html/module.cfg @@ -1,3 +1,5 @@ -subhash="cef9c80c01dbcbe62b0cd63e5ebf03133f16ac1b" +# SPDX-License-Identifier: GPL-3.0-or-later + +subhash="090e58d4f84125bdcf035efcadd1cd5c13a03c77" subrepo="https://codeberg.org/libreboot/lbwww" subrepo_bkup="https://git.disroot.org/libreboot/lbwww" diff --git a/config/submodule/docs/img/module.cfg b/config/submodule/docs/img/module.cfg index 87c99fc1..034de191 100644 --- a/config/submodule/docs/img/module.cfg +++ b/config/submodule/docs/img/module.cfg @@ -1,3 +1,5 @@ -subhash="bd92e319bde851d567240452bb89299050a24f3f" +# SPDX-License-Identifier: GPL-3.0-or-later + +subhash="2bf719e6542c3ffa6df0bdcb77ef1619cb2dce01" subrepo="https://codeberg.org/libreboot/lbwww-img" subrepo_bkup="https://git.disroot.org/libreboot/lbwww-img" diff --git a/config/submodule/docs/untitled/module.cfg b/config/submodule/docs/untitled/module.cfg index 35e950e7..3c14f225 100644 --- a/config/submodule/docs/untitled/module.cfg +++ b/config/submodule/docs/untitled/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subhash="d8e2043c1512eb1171c274559ce82e8093ef393f" subrepo="https://codeberg.org/vimuser/untitled-website" subrepo_bkup="https://notabug.org/untitled/untitled-website" diff --git a/config/submodule/grub/default/gnulib/module.cfg b/config/submodule/grub/default/gnulib/module.cfg index 6fd77871..eaf40b24 100644 --- a/config/submodule/grub/default/gnulib/module.cfg +++ b/config/submodule/grub/default/gnulib/module.cfg @@ -1,3 +1,5 @@ -subrepo="git://git.sv.gnu.org/gnulib" -subrepo_bkup="https://codeberg.org/libreboot/gnulib" +# SPDX-License-Identifier: GPL-3.0-or-later + +subrepo="https://codeberg.org/libreboot/gnulib" +subrepo_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup! subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b" diff --git a/config/submodule/grub/nvme/gnulib/module.cfg b/config/submodule/grub/nvme/gnulib/module.cfg index 6fd77871..eaf40b24 100644 --- a/config/submodule/grub/nvme/gnulib/module.cfg +++ b/config/submodule/grub/nvme/gnulib/module.cfg @@ -1,3 +1,5 @@ -subrepo="git://git.sv.gnu.org/gnulib" -subrepo_bkup="https://codeberg.org/libreboot/gnulib" +# SPDX-License-Identifier: GPL-3.0-or-later + +subrepo="https://codeberg.org/libreboot/gnulib" +subrepo_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup! subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b" diff --git a/config/submodule/grub/xhci/gnulib/module.cfg b/config/submodule/grub/xhci/gnulib/module.cfg index 6fd77871..eaf40b24 100644 --- a/config/submodule/grub/xhci/gnulib/module.cfg +++ b/config/submodule/grub/xhci/gnulib/module.cfg @@ -1,3 +1,5 @@ -subrepo="git://git.sv.gnu.org/gnulib" -subrepo_bkup="https://codeberg.org/libreboot/gnulib" +# SPDX-License-Identifier: GPL-3.0-or-later + +subrepo="https://codeberg.org/libreboot/gnulib" +subrepo_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup! subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b" diff --git a/config/submodule/pcsx-redux/uC-sdk/module.cfg b/config/submodule/pcsx-redux/uC-sdk/module.cfg index dd112407..f8f44850 100644 --- a/config/submodule/pcsx-redux/uC-sdk/module.cfg +++ b/config/submodule/pcsx-redux/uC-sdk/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subhash="7c6f1973a16893cf1f0868af6f8e60a028b933ad" subrepo="https://github.com/grumpycoders/uC-sdk.git" subrepo_bkup="https://codeberg.org/vimuser/uC-sdk" diff --git a/config/submodule/pico-sdk/tinyusb/module.cfg b/config/submodule/pico-sdk/tinyusb/module.cfg index 43b71534..988d68ba 100644 --- a/config/submodule/pico-sdk/tinyusb/module.cfg +++ b/config/submodule/pico-sdk/tinyusb/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subhash="86c416d4c0fb38432460b3e11b08b9de76941bf5" subrepo="https://codeberg.org/libreboot/tinyusb" subrepo_bkup="https://github.com/hathach/tinyusb.git" diff --git a/config/submodule/stm32-vserprog/libopencm3/module.cfg b/config/submodule/stm32-vserprog/libopencm3/module.cfg index 9fb3460b..069020cc 100644 --- a/config/submodule/stm32-vserprog/libopencm3/module.cfg +++ b/config/submodule/stm32-vserprog/libopencm3/module.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + subhash="458250dc6147dc807eec9e4d5a6caf38a699ecb1" subrepo="https://codeberg.org/libreboot/libopencm3" subrepo_bkup="https://github.com/libopencm3/libopencm3" diff --git a/config/u-boot/amd64coreboot/config/default b/config/u-boot/amd64coreboot/config/default index fdd0ccf2..d44de2d3 100644 --- a/config/u-boot/amd64coreboot/config/default +++ b/config/u-boot/amd64coreboot/config/default @@ -500,6 +500,7 @@ CONFIG_CMD_BOOTM=y CONFIG_CMD_BOOTDEV=y CONFIG_CMD_BOOTFLOW=y CONFIG_CMD_BOOTFLOW_FULL=y +CONFIG_CMD_BOOTFLOW_BOOTDELAY=8 CONFIG_CMD_BOOTMETH=y CONFIG_BOOTM_EFI=y CONFIG_BOOTM_ELF=y diff --git a/config/u-boot/amd64coreboot/target.cfg b/config/u-boot/amd64coreboot/target.cfg index 80e024ea..8b89408e 100644 --- a/config/u-boot/amd64coreboot/target.cfg +++ b/config/u-boot/amd64coreboot/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="x86_64" # test building with x86_64 hostcc by commenting these: # xtree="default" # coreboot tree containing crossgcc diff --git a/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch b/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch index 4ceeac59..32647ed0 100644 --- a/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch +++ b/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch @@ -1,4 +1,4 @@ -From f98475a64fcfe6ef710acb29391c33c17903e580 Mon Sep 17 00:00:00 2001 +From bc5204d0d28bb431186fd106f9a79f69bfad005d Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak <alpernebiyasak@gmail.com> Date: Fri, 8 Oct 2021 17:33:22 +0300 Subject: [PATCH] clk: rockchip: rk3399: Set hardcoded clock rates same as @@ -60,10 +60,10 @@ index d941a129f3e5..54035c0df1f3 100644 #define PWM_CLOCK_HZ PMU_PCLK_HZ diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c -index 67b2c05ec9ed..754b35c23197 100644 +index 24cefebd1b2a..6f874bd347e0 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c -@@ -54,10 +54,11 @@ struct pll_div { +@@ -53,10 +53,11 @@ struct pll_div { .fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\ .postdiv1 = _postdiv1, .postdiv2 = _postdiv2}; @@ -78,7 +78,7 @@ index 67b2c05ec9ed..754b35c23197 100644 #endif static const struct pll_div apll_l_1600_cfg = PLL_DIVISORS(1600 * MHz, 3, 1, 1); -@@ -682,7 +683,7 @@ static ulong rk3399_spi_set_clk(struct rockchip_cru *cru, ulong clk_id, uint hz) +@@ -681,7 +682,7 @@ static ulong rk3399_spi_set_clk(struct rockchip_cru *cru, ulong clk_id, uint hz) static ulong rk3399_vop_set_clk(struct rockchip_cru *cru, ulong clk_id, u32 hz) { struct pll_div vpll_config = {0}; @@ -87,7 +87,7 @@ index 67b2c05ec9ed..754b35c23197 100644 void *aclkreg_addr, *dclkreg_addr; u32 div; -@@ -1395,6 +1396,7 @@ static void rkclk_init(struct rockchip_cru *cru) +@@ -1394,6 +1395,7 @@ static void rkclk_init(struct rockchip_cru *cru) /* configure gpll cpll */ rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg); rkclk_set_pll(&cru->cpll_con[0], &cpll_init_cfg); diff --git a/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch b/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch index d5c6788a..bb264b00 100644 --- a/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch +++ b/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch @@ -1,4 +1,4 @@ -From 3e1e14e0b14539ca42db40488c7b1067eb01dea4 Mon Sep 17 00:00:00 2001 +From 03750188cbe305cd8383178a1ee476de2aa5953e Mon Sep 17 00:00:00 2001 From: Andre Przywara <andre.przywara@arm.com> Date: Mon, 10 Jan 2022 00:56:31 +0000 Subject: [PATCH 1/3] video: Add cursor support for video consoles @@ -156,13 +156,11 @@ index 8b5928dc5ebb..00c5ecb664b9 100644 char escape_buf[32]; char utf8_buf[5]; }; - -base-commit: 475aa8345a78396d39b42f96eccecd37ebe24e99 -- 2.45.2 -From 0dd4fb08993b01d36e491705b24063834dcb618e Mon Sep 17 00:00:00 2001 +From f63a54996fdaac7ff995e26fd4318a09a9c14dff Mon Sep 17 00:00:00 2001 From: Andre Przywara <andre.przywara@arm.com> Date: Mon, 10 Jan 2022 00:56:36 +0000 Subject: [PATCH 2/3] efi-selftest: Add international characters test @@ -201,7 +199,7 @@ index a3023c82567c..2f8d8d323c2b 100644 2.45.2 -From 13101947807bec7ceaf3231d94e943b9b29a7369 Mon Sep 17 00:00:00 2001 +From cc05aa26c43c35e9155d958400532005ae7eeede Mon Sep 17 00:00:00 2001 From: Andre Przywara <andre.przywara@arm.com> Date: Mon, 10 Jan 2022 00:56:37 +0000 Subject: [PATCH 3/3] efi_selftest: Add box drawing character selftest diff --git a/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch b/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch index 616efa0f..07a5fe8c 100644 --- a/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch +++ b/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch @@ -1,4 +1,4 @@ -From 3efc90a6ea3bb88b66af7f7096e8168c2cc34aa6 Mon Sep 17 00:00:00 2001 +From c3ae7d7f7af47e747f85f06662e26f434c25c891 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak <alpernebiyasak@gmail.com> Date: Fri, 18 Aug 2023 13:31:36 +0300 Subject: [PATCH 01/13] video: test: Split copy frame buffer check into a @@ -300,13 +300,11 @@ index 7dfbeb9555d1..14e6af5181f1 100644 return 0; } - -base-commit: 475aa8345a78396d39b42f96eccecd37ebe24e99 -- 2.45.2 -From 19c878635c1271c79a017ea3a860b9a2f1a3fed9 Mon Sep 17 00:00:00 2001 +From 575ebe8b5d9ae9c9818b4deb708f8a69f9f9a9b1 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak <alpernebiyasak@gmail.com> Date: Sun, 20 Aug 2023 17:46:46 +0300 Subject: [PATCH 02/13] video: test: Support checking copy frame buffer @@ -619,7 +617,7 @@ index 14e6af5181f1..50374cafc009 100644 2.45.2 -From 173f97f38d1c6621acd9f24f8956c3a7d808cdd7 Mon Sep 17 00:00:00 2001 +From d1fddc8cbe64a5532ddc43d0b1413ff7cc1bf618 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak <alpernebiyasak@gmail.com> Date: Fri, 18 Aug 2023 17:31:27 +0300 Subject: [PATCH 03/13] video: test: Test partial updates of hardware frame @@ -704,7 +702,7 @@ index 50374cafc009..4798f2205a99 100644 2.45.2 -From 11066af4f8d7a9c6b4729ce2647eb6251397423d Mon Sep 17 00:00:00 2001 +From 700a7cdc62fa08f425c05db2061f06c56d96d5b6 Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Fri, 10 Jun 2022 00:59:15 +0200 Subject: [PATCH 04/13] dm: video: Add damage tracking API @@ -725,15 +723,15 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-5-alpernebiyasak@gma Reviewed-by: Simon Glass <sjg@chromium.org> --- drivers/video/Kconfig | 13 ++++++++++++ - drivers/video/video-uclass.c | 40 +++++++++++++++++++++++++++++++++--- + drivers/video/video-uclass.c | 35 +++++++++++++++++++++++++++++++ include/video.h | 40 ++++++++++++++++++++++++++++++++++-- - 3 files changed, 88 insertions(+), 5 deletions(-) + 3 files changed, 86 insertions(+), 2 deletions(-) diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index 7808ae7919e0..7815b590481e 100644 +index 6e79694fd192..d7da655cea62 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig -@@ -92,6 +92,19 @@ config VIDEO_COPY +@@ -98,6 +98,19 @@ config VIDEO_COPY To use this, your video driver must set @copy_base in struct video_uc_plat. @@ -754,10 +752,10 @@ index 7808ae7919e0..7815b590481e 100644 bool "Generic PWM based Backlight Driver" depends on BACKLIGHT && DM_PWM diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index ff1382f4a43b..75ab5f5ba9d7 100644 +index a5aa8dd52954..b95f2dbc7703 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -346,9 +346,38 @@ void video_set_default_colors(struct udevice *dev, bool invert) +@@ -352,6 +352,34 @@ void video_set_default_colors(struct udevice *dev, bool invert) priv->colour_bg = video_index_to_colour(priv, back); } @@ -792,31 +790,10 @@ index ff1382f4a43b..75ab5f5ba9d7 100644 /* Flush video activity to the caches */ int video_sync(struct udevice *vid, bool force) { -+ struct video_priv *priv = dev_get_uclass_priv(vid); - struct video_ops *ops = video_get_ops(vid); - int ret; - -@@ -364,15 +393,12 @@ int video_sync(struct udevice *vid, bool force) - * out whether it exists? For now, ARM is safe. - */ - #if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) -- struct video_priv *priv = dev_get_uclass_priv(vid); -- - if (priv->flush_dcache) { - flush_dcache_range((ulong)priv->fb, - ALIGN((ulong)priv->fb + priv->fb_size, - CONFIG_SYS_CACHELINE_SIZE)); - } - #elif defined(CONFIG_VIDEO_SANDBOX_SDL) -- struct video_priv *priv = dev_get_uclass_priv(vid); - static ulong last_sync; - - if (force || get_timer(last_sync) > 100) { -@@ -380,6 +406,14 @@ int video_sync(struct udevice *vid, bool force) - last_sync = get_timer(0); - } +@@ -385,6 +413,13 @@ int video_sync(struct udevice *vid, bool force) #endif -+ + priv->last_sync = get_timer(0); + + if (IS_ENABLED(CONFIG_VIDEO_DAMAGE)) { + priv->damage.xstart = priv->xsize; + priv->damage.ystart = priv->ysize; @@ -828,7 +805,7 @@ index ff1382f4a43b..75ab5f5ba9d7 100644 } diff --git a/include/video.h b/include/video.h -index 4d8df9baaada..d2dabb66e9e6 100644 +index 4013a949983f..835d7734cb75 100644 --- a/include/video.h +++ b/include/video.h @@ -88,6 +88,11 @@ enum video_format { @@ -843,7 +820,7 @@ index 4d8df9baaada..d2dabb66e9e6 100644 * @line_length: Length of each frame buffer line, in bytes. This can be * set by the driver, but if not, the uclass will set it after * probing -@@ -115,6 +120,12 @@ struct video_priv { +@@ -116,6 +121,12 @@ struct video_priv { void *fb; int fb_size; void *copy_fb; @@ -856,7 +833,7 @@ index 4d8df9baaada..d2dabb66e9e6 100644 int line_length; u32 colour_fg; u32 colour_bg; -@@ -257,8 +268,9 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, +@@ -259,8 +270,9 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, * @return: 0 on success, error code otherwise * * Some frame buffers are cached or have a secondary frame buffer. This @@ -868,7 +845,7 @@ index 4d8df9baaada..d2dabb66e9e6 100644 */ int video_sync(struct udevice *vid, bool force); -@@ -378,6 +390,30 @@ static inline int video_sync_copy_all(struct udevice *dev) +@@ -380,6 +392,30 @@ static inline int video_sync_copy_all(struct udevice *dev) #endif @@ -903,7 +880,7 @@ index 4d8df9baaada..d2dabb66e9e6 100644 2.45.2 -From 5613cd630801ccb329895f62c27b8690a2cbf74c Mon Sep 17 00:00:00 2001 +From b84ee524454fbfebd71532532bf2e28ad97ef676 Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Fri, 10 Jun 2022 00:59:16 +0200 Subject: [PATCH 05/13] dm: video: Add damage notification on display fills @@ -922,10 +899,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-6-alpernebiyasak@gma 1 file changed, 4 insertions(+) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index 75ab5f5ba9d7..ca348101817a 100644 +index b95f2dbc7703..6906b2b83623 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -195,6 +195,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, +@@ -201,6 +201,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, if (ret) return ret; @@ -934,7 +911,7 @@ index 75ab5f5ba9d7..ca348101817a 100644 return 0; } -@@ -244,6 +246,8 @@ int video_fill(struct udevice *dev, u32 colour) +@@ -250,6 +252,8 @@ int video_fill(struct udevice *dev, u32 colour) if (ret) return ret; @@ -947,7 +924,7 @@ index 75ab5f5ba9d7..ca348101817a 100644 2.45.2 -From 4e29f9d2190f2ea390d5321192f5e71193d62f71 Mon Sep 17 00:00:00 2001 +From b18a1ef92e2a003771a4a846c592302c1e92bd83 Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Fri, 10 Jun 2022 00:59:17 +0200 Subject: [PATCH 06/13] vidconsole: Add damage notifications to all vidconsole @@ -1014,7 +991,7 @@ index 6f4194a18147..51ac8cc78e9d 100644 if (ret) return ret; diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c -index dc9698362741..5c4a98f6cad0 100644 +index a3f8c6352f83..f11dc3a0b075 100644 --- a/drivers/video/console_rotate.c +++ b/drivers/video/console_rotate.c @@ -36,6 +36,12 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) @@ -1056,7 +1033,7 @@ index dc9698362741..5c4a98f6cad0 100644 return VID_TO_POS(fontdata->width); } -@@ -122,6 +140,12 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) +@@ -121,6 +139,12 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) if (ret) return ret; @@ -1069,7 +1046,7 @@ index dc9698362741..5c4a98f6cad0 100644 return 0; } -@@ -143,6 +167,12 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -142,6 +166,12 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc, vidconsole_memmove(dev, dst, src, fontdata->height * vid_priv->line_length * count); @@ -1082,7 +1059,7 @@ index dc9698362741..5c4a98f6cad0 100644 return 0; } -@@ -176,6 +206,12 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp) +@@ -175,6 +205,12 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp) if (ret) return ret; @@ -1095,7 +1072,7 @@ index dc9698362741..5c4a98f6cad0 100644 return VID_TO_POS(fontdata->width); } -@@ -200,6 +236,12 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) +@@ -199,6 +235,12 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) if (ret) return ret; @@ -1108,7 +1085,7 @@ index dc9698362741..5c4a98f6cad0 100644 return 0; } -@@ -226,6 +268,12 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -225,6 +267,12 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc, dst += vid_priv->line_length; } @@ -1121,7 +1098,7 @@ index dc9698362741..5c4a98f6cad0 100644 return 0; } -@@ -258,6 +306,12 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp) +@@ -257,6 +305,12 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp) if (ret) return ret; @@ -1198,7 +1175,7 @@ index c435162d3f94..6a17f732fc26 100644 2.45.2 -From 11fa5d7c68878f629c8fff7dc28a76acaf1252ab Mon Sep 17 00:00:00 2001 +From 991d7e646de88fd019059679f659761072412e15 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak <alpernebiyasak@gmail.com> Date: Fri, 18 Aug 2023 17:55:08 +0300 Subject: [PATCH 07/13] video: test: Test video damage tracking via vidconsole @@ -1217,7 +1194,7 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-8-alpernebiyasak@gma 2 files changed, 57 insertions(+) diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig -index da8c1976d7bd..6bc20ec34169 100644 +index dc5fcdbd1c9e..5e5ad60ee057 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -319,6 +319,7 @@ CONFIG_USB_ETH_CDC=y @@ -1296,7 +1273,7 @@ index 4798f2205a99..119c43153165 100644 2.45.2 -From 80a32fe8f34466e6b86553018f47192a1fef3c6a Mon Sep 17 00:00:00 2001 +From f74688b9828f83306dea8553eafe61b5d81fbbe0 Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Fri, 10 Jun 2022 00:59:18 +0200 Subject: [PATCH 08/13] video: Add damage notification on bmp display @@ -1329,7 +1306,7 @@ index ad512d99a1b9..78de95607924 100644 2.45.2 -From 7afe761e51bfb0f24fd4547e8bec1826aaf2e6a0 Mon Sep 17 00:00:00 2001 +From 791b0accde45ada93fdf61773f8c7e69b934e55e Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Fri, 10 Jun 2022 00:59:19 +0200 Subject: [PATCH 09/13] efi_loader: GOP: Add damage notification on BLT @@ -1398,7 +1375,7 @@ index 41e12fa72460..1694e23dcc62 100644 2.45.2 -From 134415d6cbe38f7ab630f978a602b6e15929feea Mon Sep 17 00:00:00 2001 +From 1b0905d54711c6c170de575a36e66006b8a6583a Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Fri, 10 Jun 2022 00:59:20 +0200 Subject: [PATCH 10/13] video: Only dcache flush damaged lines @@ -1419,10 +1396,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-11-alpernebiyasak@gm 1 file changed, 38 insertions(+), 5 deletions(-) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index ca348101817a..add7a85b20fe 100644 +index 6906b2b83623..3f6572a124ea 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -378,6 +378,40 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height) +@@ -384,6 +384,40 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height) } #endif @@ -1463,7 +1440,7 @@ index ca348101817a..add7a85b20fe 100644 /* Flush video activity to the caches */ int video_sync(struct udevice *vid, bool force) { -@@ -397,11 +431,10 @@ int video_sync(struct udevice *vid, bool force) +@@ -407,11 +441,10 @@ int video_sync(struct udevice *vid, bool force) * out whether it exists? For now, ARM is safe. */ #if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) @@ -1477,13 +1454,13 @@ index ca348101817a..add7a85b20fe 100644 + if (IS_ENABLED(CONFIG_VIDEO_COPY)) + video_flush_dcache(vid, true); #elif defined(CONFIG_VIDEO_SANDBOX_SDL) - static ulong last_sync; - + sandbox_sdl_sync(priv->fb); + #endif -- 2.45.2 -From d3f1653a87d51c5ecf187b19ecb60a2f740fb8e2 Mon Sep 17 00:00:00 2001 +From 4c02e522cb00b84cfa61004c32b4e5ae28457c58 Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Fri, 10 Jun 2022 00:59:21 +0200 Subject: [PATCH 11/13] video: Use VIDEO_DAMAGE for VIDEO_COPY @@ -1526,7 +1503,7 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-12-alpernebiyasak@gm 11 files changed, 43 insertions(+), 247 deletions(-) diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig -index 6bc20ec34169..da8c1976d7bd 100644 +index 5e5ad60ee057..dc5fcdbd1c9e 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -319,7 +319,6 @@ CONFIG_USB_ETH_CDC=y @@ -1538,10 +1515,10 @@ index 6bc20ec34169..da8c1976d7bd 100644 CONFIG_CONSOLE_TRUETYPE=y CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index 7815b590481e..88c6f8e68976 100644 +index d7da655cea62..d6497819ea73 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig -@@ -83,11 +83,14 @@ config VIDEO_PCI_DEFAULT_FB_SIZE +@@ -89,11 +89,14 @@ config VIDEO_PCI_DEFAULT_FB_SIZE config VIDEO_COPY bool "Enable copying the frame buffer to a hardware copy" @@ -1556,7 +1533,7 @@ index 7815b590481e..88c6f8e68976 100644 To use this, your video driver must set @copy_base in struct video_uc_plat. -@@ -105,6 +108,8 @@ config VIDEO_DAMAGE +@@ -111,6 +114,8 @@ config VIDEO_DAMAGE regions of the frame buffer that were modified before, speeding up screen refreshes significantly. @@ -1608,7 +1585,7 @@ index 51ac8cc78e9d..07db613ac53c 100644 } diff --git a/drivers/video/console_rotate.c b/drivers/video/console_rotate.c -index 5c4a98f6cad0..9f8e1b92770c 100644 +index f11dc3a0b075..886b25dcfafc 100644 --- a/drivers/video/console_rotate.c +++ b/drivers/video/console_rotate.c @@ -21,7 +21,6 @@ static int console_set_row_1(struct udevice *dev, uint row, int clr) @@ -1661,7 +1638,7 @@ index 5c4a98f6cad0..9f8e1b92770c 100644 video_damage(dev->parent, vid_priv->xsize - y - fontdata->height, linenum - 1, -@@ -126,7 +115,7 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) +@@ -125,7 +114,7 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) struct video_fontdata *fontdata = priv->fontdata; void *start, *line, *dst, *end; int pixels = fontdata->height * vid_priv->xsize; @@ -1670,7 +1647,7 @@ index 5c4a98f6cad0..9f8e1b92770c 100644 int pbytes = VNBYTES(vid_priv->bpix); start = vid_priv->fb + vid_priv->ysize * vid_priv->line_length - -@@ -136,9 +125,6 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) +@@ -135,9 +124,6 @@ static int console_set_row_2(struct udevice *dev, uint row, int clr) for (i = 0; i < pixels; i++) fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); end = dst; @@ -1680,7 +1657,7 @@ index 5c4a98f6cad0..9f8e1b92770c 100644 video_damage(dev->parent, 0, -@@ -164,8 +150,7 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -163,8 +149,7 @@ static int console_move_rows_2(struct udevice *dev, uint rowdst, uint rowsrc, vid_priv->line_length; src = end - (rowsrc + count) * fontdata->height * vid_priv->line_length; @@ -1690,7 +1667,7 @@ index 5c4a98f6cad0..9f8e1b92770c 100644 video_damage(dev->parent, 0, -@@ -201,11 +186,6 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp) +@@ -200,11 +185,6 @@ static int console_putc_xy_2(struct udevice *dev, uint x_frac, uint y, int cp) if (ret) return ret; @@ -1702,7 +1679,7 @@ index 5c4a98f6cad0..9f8e1b92770c 100644 video_damage(dev->parent, x - fontdata->width + 1, linenum - fontdata->height + 1, -@@ -222,7 +202,7 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) +@@ -221,7 +201,7 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) struct video_fontdata *fontdata = priv->fontdata; int pbytes = VNBYTES(vid_priv->bpix); void *start, *dst, *line; @@ -1711,7 +1688,7 @@ index 5c4a98f6cad0..9f8e1b92770c 100644 start = vid_priv->fb + row * fontdata->height * pbytes; line = start; -@@ -232,9 +212,6 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) +@@ -231,9 +211,6 @@ static int console_set_row_3(struct udevice *dev, uint row, int clr) fill_pixel_and_goto_next(&dst, clr, pbytes, pbytes); line += vid_priv->line_length; } @@ -1721,7 +1698,7 @@ index 5c4a98f6cad0..9f8e1b92770c 100644 video_damage(dev->parent, row * fontdata->height, -@@ -254,16 +231,13 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc, +@@ -253,16 +230,13 @@ static int console_move_rows_3(struct udevice *dev, uint rowdst, uint rowsrc, int pbytes = VNBYTES(vid_priv->bpix); void *dst; void *src; @@ -1740,7 +1717,7 @@ index 5c4a98f6cad0..9f8e1b92770c 100644 src += vid_priv->line_length; dst += vid_priv->line_length; } -@@ -299,10 +273,6 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp) +@@ -298,10 +272,6 @@ static int console_putc_xy_3(struct udevice *dev, uint x_frac, uint y, int cp) line = start; ret = fill_char_horizontally(pfont, &line, vid_priv, fontdata, NORMAL_DIRECTION); @@ -1810,10 +1787,10 @@ index 6a17f732fc26..58dcd8e050c3 100644 return width_frac; diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c -index 80e7adf6a1a4..6dc5162804aa 100644 +index 8b2ef51f1b3b..bcc46a08cbbd 100644 --- a/drivers/video/vidconsole-uclass.c +++ b/drivers/video/vidconsole-uclass.c -@@ -759,22 +759,6 @@ UCLASS_DRIVER(vidconsole) = { +@@ -801,22 +801,6 @@ UCLASS_DRIVER(vidconsole) = { .per_device_auto = sizeof(struct vidconsole_priv), }; @@ -1837,10 +1814,10 @@ index 80e7adf6a1a4..6dc5162804aa 100644 { int ret; diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index add7a85b20fe..3b9b9fad0975 100644 +index 3f6572a124ea..845db1c9b6d3 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -152,7 +152,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, +@@ -158,7 +158,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, struct video_priv *priv = dev_get_uclass_priv(dev); void *start, *line; int pixels = xend - xstart; @@ -1849,7 +1826,7 @@ index add7a85b20fe..3b9b9fad0975 100644 start = priv->fb + ystart * priv->line_length; start += xstart * VNBYTES(priv->bpix); -@@ -191,9 +191,6 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, +@@ -197,9 +197,6 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, } line += priv->line_length; } @@ -1859,7 +1836,7 @@ index add7a85b20fe..3b9b9fad0975 100644 video_damage(dev, xstart, ystart, xend - xstart, yend - ystart); -@@ -217,7 +214,6 @@ int video_reserve_from_bloblist(struct video_handoff *ho) +@@ -223,7 +220,6 @@ int video_reserve_from_bloblist(struct video_handoff *ho) int video_fill(struct udevice *dev, u32 colour) { struct video_priv *priv = dev_get_uclass_priv(dev); @@ -1867,7 +1844,7 @@ index add7a85b20fe..3b9b9fad0975 100644 switch (priv->bpix) { case VIDEO_BPP16: -@@ -242,9 +238,6 @@ int video_fill(struct udevice *dev, u32 colour) +@@ -248,9 +244,6 @@ int video_fill(struct udevice *dev, u32 colour) memset(priv->fb, colour, priv->fb_size); break; } @@ -1877,7 +1854,7 @@ index add7a85b20fe..3b9b9fad0975 100644 video_damage(dev, 0, 0, priv->xsize, priv->ysize); -@@ -412,6 +405,27 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy) +@@ -418,6 +411,27 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy) } #endif @@ -1905,7 +1882,7 @@ index add7a85b20fe..3b9b9fad0975 100644 /* Flush video activity to the caches */ int video_sync(struct udevice *vid, bool force) { -@@ -419,6 +433,9 @@ int video_sync(struct udevice *vid, bool force) +@@ -425,6 +439,9 @@ int video_sync(struct udevice *vid, bool force) struct video_ops *ops = video_get_ops(vid); int ret; @@ -1915,7 +1892,7 @@ index add7a85b20fe..3b9b9fad0975 100644 if (ops && ops->video_sync) { ret = ops->video_sync(vid); if (ret) -@@ -502,69 +519,6 @@ int video_get_ysize(struct udevice *dev) +@@ -508,69 +525,6 @@ int video_get_ysize(struct udevice *dev) return priv->ysize; } @@ -2010,10 +1987,10 @@ index 78de95607924..1f267d45812c 100644 return video_sync(dev, false); } diff --git a/include/video.h b/include/video.h -index d2dabb66e9e6..44557457bf80 100644 +index 835d7734cb75..705076facfb5 100644 --- a/include/video.h +++ b/include/video.h -@@ -353,43 +353,6 @@ void video_set_default_colors(struct udevice *dev, bool invert); +@@ -355,43 +355,6 @@ void video_set_default_colors(struct udevice *dev, bool invert); */ int video_default_font_height(struct udevice *dev); @@ -2058,10 +2035,10 @@ index d2dabb66e9e6..44557457bf80 100644 /** * video_damage() - Notify the video subsystem about screen updates. diff --git a/include/video_console.h b/include/video_console.h -index 8b5928dc5ebb..8806d10f946d 100644 +index 00c5ecb664b9..ead0e05e4003 100644 --- a/include/video_console.h +++ b/include/video_console.h -@@ -529,56 +529,4 @@ void vidconsole_list_fonts(struct udevice *dev); +@@ -530,56 +530,4 @@ void vidconsole_list_fonts(struct udevice *dev); */ int vidconsole_get_font_size(struct udevice *dev, const char **name, uint *sizep); @@ -2143,7 +2120,7 @@ index 119c43153165..9b7bb51a3dd9 100644 2.45.2 -From d0b64a4e493b665d7abafc185d88f533ebc27f2f Mon Sep 17 00:00:00 2001 +From 174b8b118c02e7cadf9ad56462b481c91f4a3343 Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Tue, 3 Jan 2023 22:50:03 +0100 Subject: [PATCH 12/13] video: Always compile cache flushing code @@ -2168,10 +2145,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-13-alpernebiyasak@gm 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index 3b9b9fad0975..f050ed1f67cb 100644 +index 845db1c9b6d3..5416e0d9030b 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -377,6 +377,9 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy) +@@ -383,6 +383,9 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy) struct video_priv *priv = dev_get_uclass_priv(vid); ulong fb = use_copy ? (ulong)priv->copy_fb : (ulong)priv->fb; @@ -2181,9 +2158,9 @@ index 3b9b9fad0975..f050ed1f67cb 100644 if (!priv->flush_dcache) return; -@@ -442,17 +445,12 @@ int video_sync(struct udevice *vid, bool force) - return ret; - } +@@ -452,17 +455,12 @@ int video_sync(struct udevice *vid, bool force) + get_timer(priv->last_sync) < CONFIG_VIDEO_SYNC_MS) + return 0; - /* - * flush_dcache_range() is declared in common.h but it seems that some @@ -2198,14 +2175,14 @@ index 3b9b9fad0975..f050ed1f67cb 100644 -#elif defined(CONFIG_VIDEO_SANDBOX_SDL) + +#if defined(CONFIG_VIDEO_SANDBOX_SDL) - static ulong last_sync; - - if (force || get_timer(last_sync) > 100) { + sandbox_sdl_sync(priv->fb); + #endif + priv->last_sync = get_timer(0); -- 2.45.2 -From e6b053a9d59d0b4ea0936edee5be2fadf0b8efc2 Mon Sep 17 00:00:00 2001 +From 2a1af00665464023c38903eeb75a0c89099892fb Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Tue, 3 Jan 2023 22:50:04 +0100 Subject: [PATCH 13/13] video: Enable VIDEO_DAMAGE for drivers that need it @@ -2237,7 +2214,7 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-14-alpernebiyasak@gm 9 files changed, 16 insertions(+) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig -index ddf9414b08e7..3c9745065bab 100644 +index 17666814c52e..1ba0d2c1c8d7 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -863,6 +863,7 @@ config VIDEO_SUNXI @@ -2249,10 +2226,10 @@ index ddf9414b08e7..3c9745065bab 100644 default y ---help--- diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index 88c6f8e68976..06d3ed8a736e 100644 +index d6497819ea73..8fb69e0b16c2 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig -@@ -499,6 +499,7 @@ config VIDEO_LCD_ANX9804 +@@ -534,6 +534,7 @@ config VIDEO_LCD_ANX9804 config ATMEL_LCD bool "Atmel LCD panel support" @@ -2260,7 +2237,7 @@ index 88c6f8e68976..06d3ed8a736e 100644 depends on ARCH_AT91 config ATMEL_LCD_BGR555 -@@ -508,6 +509,7 @@ config ATMEL_LCD_BGR555 +@@ -543,6 +544,7 @@ config ATMEL_LCD_BGR555 config VIDEO_BCM2835 bool "Display support for BCM2835" @@ -2268,7 +2245,7 @@ index 88c6f8e68976..06d3ed8a736e 100644 help The graphics processor already sets up the display so this driver simply checks the resolution and then sets up the frame buffer with -@@ -671,6 +673,7 @@ source "drivers/video/meson/Kconfig" +@@ -706,6 +708,7 @@ source "drivers/video/meson/Kconfig" config VIDEO_MVEBU bool "Armada XP LCD controller" @@ -2276,7 +2253,7 @@ index 88c6f8e68976..06d3ed8a736e 100644 ---help--- Support for the LCD controller integrated in the Marvell Armada XP SoC. -@@ -705,6 +708,7 @@ config NXP_TDA19988 +@@ -740,6 +743,7 @@ config NXP_TDA19988 config ATMEL_HLCD bool "Enable ATMEL video support using HLCDC" @@ -2284,7 +2261,7 @@ index 88c6f8e68976..06d3ed8a736e 100644 help HLCDC supports video output to an attached LCD panel. -@@ -781,6 +785,7 @@ source "drivers/video/tidss/Kconfig" +@@ -816,6 +820,7 @@ source "drivers/video/tidss/Kconfig" config VIDEO_TEGRA124 bool "Enable video support on Tegra124" @@ -2292,7 +2269,7 @@ index 88c6f8e68976..06d3ed8a736e 100644 help Tegra124 supports many video output options including eDP and HDMI. At present only eDP is supported by U-Boot. This option -@@ -795,6 +800,7 @@ source "drivers/video/imx/Kconfig" +@@ -830,6 +835,7 @@ source "drivers/video/imx/Kconfig" config VIDEO_MXS bool "Enable video support on i.MX28/i.MX6UL/i.MX7 SoCs" @@ -2300,7 +2277,7 @@ index 88c6f8e68976..06d3ed8a736e 100644 help Enable framebuffer driver for i.MX28/i.MX6UL/i.MX7 processors -@@ -857,6 +863,7 @@ config VIDEO_DW_MIPI_DSI +@@ -892,6 +898,7 @@ config VIDEO_DW_MIPI_DSI config VIDEO_SIMPLE bool "Simple display driver for preconfigured display" @@ -2308,7 +2285,7 @@ index 88c6f8e68976..06d3ed8a736e 100644 help Enables a simple generic display driver which utilizes the simple-framebuffer devicetree bindings. -@@ -875,6 +882,7 @@ config VIDEO_DT_SIMPLEFB +@@ -910,6 +917,7 @@ config VIDEO_DT_SIMPLEFB config VIDEO_MCDE_SIMPLE bool "Simple driver for ST-Ericsson MCDE with preconfigured display" diff --git a/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch b/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch index e1a26bb4..fc3dea4d 100644 --- a/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch +++ b/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch @@ -1,4 +1,4 @@ -From ba34d29274c23c52be957ea040539dccbab09765 Mon Sep 17 00:00:00 2001 +From ec8f5b8e949995eb34b7e54b9f06894eb38d02b4 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak <alpernebiyasak@gmail.com> Date: Wed, 10 Jul 2024 17:37:56 +0300 Subject: [PATCH] HACK: Makefile: Ignore missing input files for binman images @@ -17,7 +17,7 @@ Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile -index 1c754ceb5953..fec8d9b2d2b1 100644 +index 34dd029d0cda..d5d89bd2e35c 100644 --- a/Makefile +++ b/Makefile @@ -1375,7 +1375,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \ diff --git a/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch b/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch index 73789811..45a6ab4a 100644 --- a/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch +++ b/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch @@ -1,4 +1,4 @@ -From 1107dc81b24743e77374f1b484a843d81fa0348a Mon Sep 17 00:00:00 2001 +From 9685041c19bcc61ca847a59e93c716d23df51898 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak <alpernebiyasak@gmail.com> Date: Wed, 10 Jul 2024 14:32:19 +0300 Subject: [PATCH] HACK: rk3399: gru: Remove assigned clock dt properties for @@ -18,10 +18,10 @@ Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> 1 file changed, 3 insertions(+) diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi -index 487dde38d86a..30cfb58aca12 100644 +index 6bdc892bd913..f4457c1b9b48 100644 --- a/arch/arm/dts/rk3399-gru-u-boot.dtsi +++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi -@@ -28,6 +28,9 @@ &cros_ec { +@@ -27,6 +27,9 @@ &cros_ec { &edp { rockchip,panel = <&edp_panel>; diff --git a/config/u-boot/default/patches/0006-Support-auto-boot-timeout-delay-bootflow-menu.patch b/config/u-boot/default/patches/0006-Support-auto-boot-timeout-delay-bootflow-menu.patch new file mode 100644 index 00000000..ffc7b581 --- /dev/null +++ b/config/u-boot/default/patches/0006-Support-auto-boot-timeout-delay-bootflow-menu.patch @@ -0,0 +1,302 @@ +From d9371422ac74ea73d1620f01300a7136a7649754 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Wed, 4 Dec 2024 06:52:39 +0000 +Subject: [PATCH 1/1] Support auto-boot timeout delay bootflow menu + +The bootflow menu cannot currently auto-boot a selected entry, +which means that the user must press enter to boot their system. +This can be a problem on headless setups; for example, it is not +currently feasible to set up a headless server with U-Boot, when +using it to boot via UEFI on a coreboot setup. + +This patch adds the following build-time configuration option: + +CONFIG_CMD_BOOTFLOW_BOOTDELAY + +This creates a timeout delay in the given number of seconds. +If an arrow key is press to navigate the menu, the timer is +disabled and the user must then press enter to boot the selected +option. When this happens, the timeout display is replaced by +the old message indicating that the user should press enter. + +The default boot delay is 30 seconds, and the timeout is enabled +by default. Setting it to zero will restore the old behaviour, +whereby no timeout is provided and the user must press enter. + +If a negative integer is provided, the timer will default to +zero. The timer value is further filtered by modulus of 100, +so that the maximum number of seconds allowed is 99 seconds. + +Signed-off-by: Leah Rowe <info@minifree.org> +--- + boot/bootflow_menu.c | 117 +++++++++++++++++++++++++++++++++++-- + cmd/Kconfig | 12 ++++ + doc/usage/cmd/bootflow.rst | 11 ++++ + include/bootflow.h | 10 +++- + 4 files changed, 143 insertions(+), 7 deletions(-) + +diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c +index 9d0dc352f9..172139b187 100644 +--- a/boot/bootflow_menu.c ++++ b/boot/bootflow_menu.c +@@ -30,7 +30,7 @@ struct menu_priv { + int num_bootflows; + }; + +-int bootflow_menu_new(struct expo **expp) ++int bootflow_menu_new(struct expo **expp, const char *prompt) + { + struct udevice *last_bootdev; + struct scene_obj_menu *menu; +@@ -54,7 +54,7 @@ int bootflow_menu_new(struct expo **expp) + return log_msg_ret("scn", ret); + + ret |= scene_txt_str(scn, "prompt", OBJ_PROMPT, STR_PROMPT, +- "UP and DOWN to choose, ENTER to select", NULL); ++ prompt, NULL); + + ret = scene_menu(scn, "main", OBJ_MENU, &menu); + ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100); +@@ -138,6 +138,29 @@ int bootflow_menu_new(struct expo **expp) + return 0; + } + ++int bootflow_menu_show_countdown(struct expo *exp, char *prompt, ++ char bootflow_delay) ++{ ++ char *i; ++ ++ if (prompt == NULL) ++ return 0; ++ if (strlen(prompt) < 2) ++ return 0; ++ ++ i = prompt + strlen(prompt) - 2; ++ ++ if (bootflow_delay >= 10) { ++ *(i) = 48 + (bootflow_delay / 10); ++ *(i + 1) = 48 + (bootflow_delay % 10); ++ } else { ++ *(i) = 48 + bootflow_delay; ++ *(i + 1) = ' '; ++ } ++ ++ return expo_render(exp); ++} ++ + int bootflow_menu_apply_theme(struct expo *exp, ofnode node) + { + struct menu_priv *priv = exp->priv; +@@ -184,14 +207,62 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode, + struct expo *exp; + uint sel_id; + bool done; +- int ret; ++ int i, ret; ++ ++ /* Auto-boot countdown */ ++ char bootflow_delay_secs, *prompt; ++ int bootflow_time, bootflow_delay; ++ bool skip_render_once = false; ++ bool bootflow_countdown = false; ++ ++ /* TODO: perhaps set based on defconfig? */ ++ /* WARNING: These two strings must be of the same length. */ ++ char promptChoice[] = "UP and DOWN to choose, ENTER to select"; ++ char promptTimeout[] = "UP and DOWN to choose. Auto-boot in "; ++/* ++ // Uncomment if the strings become configurable (defconfig): ++ // (to prevent buffer overflows) ++ char promptDefault[] = "UP and DOWN to choose, ENTER to select"; ++ if (promptTimeout = NULL) ++ promptTimeout = promptDefault; ++ if (promptChoice = NULL) ++ promptChoice = promptDefault; ++ if (strlen(promptChoice) < 2) ++ promptChoice = promptDefault; ++ if (strlen(promptTimeout) < 2) ++ promptTimeout = promptDefault; ++ if (strlen(promptChoice) != strlen(promptTimeout)) ++ promptChoice = promptTimeout; ++*/ ++ prompt = promptChoice; ++ ++ bootflow_delay_secs = 15; /* TODO: set based on defconfig. */ ++ ++#if defined(CONFIG_CMD_BOOTFLOW_BOOTDELAY) ++ /* If set to zero, the auto-boot timeout is disabled. */ ++ bootflow_delay_secs = CONFIG_CMD_BOOTFLOW_BOOTDELAY; ++#else ++ bootflow_delay_secs = 30; ++#endif ++ ++ if (bootflow_delay_secs < 0) ++ bootflow_delay_secs = 0; /* disable countdown if negative */ ++ bootflow_delay_secs %= 100; /* No higher than 99 seconds */ ++ ++ if (bootflow_delay_secs > 0) { ++ bootflow_countdown = true; /* enable auto-boot countdown */ ++ prompt = promptTimeout; ++ bootflow_time = 0; /* Time elapsed in milliseconds */ ++ bootflow_delay = ++ (int)bootflow_delay_secs * 1000; /* milliseconds */ ++ } + + cli_ch_init(cch); + + sel_bflow = NULL; + *bflowp = NULL; + +- ret = bootflow_menu_new(&exp); ++ ret = bootflow_menu_new(&exp, prompt); + if (ret) + return log_msg_ret("exp", ret); + +@@ -216,12 +287,20 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode, + if (text_mode) + expo_set_text_mode(exp, text_mode); + ++ if (bootflow_countdown) { ++ ret = bootflow_menu_show_countdown(exp, prompt, ++ bootflow_delay_secs); ++ skip_render_once = true; /* Don't print menu twice on start */ ++ } + done = false; + do { + struct expo_action act; + int ichar, key; + +- ret = expo_render(exp); ++ if (skip_render_once) ++ skip_render_once = false; ++ else ++ ret = expo_render(exp); + if (ret) + break; + +@@ -231,7 +310,23 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode, + schedule(); + mdelay(2); + ichar = cli_ch_process(cch, -ETIMEDOUT); ++ if (bootflow_countdown) { ++ bootflow_delay -= 2; ++ bootflow_time += 2; ++ if (bootflow_delay <= 0) ++ ichar='\n'; ++ if (bootflow_time < 1000) ++ continue; ++ bootflow_time = 0; ++ --bootflow_delay_secs; ++ ret = bootflow_menu_show_countdown(exp, ++ prompt, bootflow_delay_secs); ++ if (ret) ++ break; ++ } + } ++ if (ret) ++ break; + if (!ichar) { + ichar = getchar(); + ichar = cli_ch_process(cch, ichar); +@@ -265,6 +360,17 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode, + break; + } + } ++ if (bootflow_countdown) { ++ /* A key press interrupted the auto-boot timeout */ ++ bootflow_countdown = false; ++ if (strlen(prompt) == strlen(promptChoice)) { ++ /* "Auto-boot in" becomes "Press ENTER" */ ++ (void) memcpy(prompt, promptChoice, ++ strlen(promptChoice)); ++ ret = expo_render(exp); ++ skip_render_once = true; ++ } ++ } + } while (!done); + + if (ret) +@@ -272,7 +378,6 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode, + + if (sel_id) { + struct bootflow *bflow; +- int i; + + for (ret = bootflow_first_glob(&bflow), i = 0; !ret && i < 36; + ret = bootflow_next_glob(&bflow), i++) { +diff --git a/cmd/Kconfig b/cmd/Kconfig +index 978f44eda4..0303869625 100644 +--- a/cmd/Kconfig ++++ b/cmd/Kconfig +@@ -288,6 +288,7 @@ config CMD_BOOTDEV + config CMD_BOOTFLOW + bool "bootflow" + depends on BOOTSTD ++ select CMD_BOOTFLOW_BOOTDELAY + default y + help + Support scanning for bootflows available with the bootdevs. The +@@ -303,6 +304,17 @@ config CMD_BOOTFLOW_FULL + + This command is not necessary for bootstd to work. + ++config CMD_BOOTFLOW_BOOTDELAY ++ int "bootflow - delay in seconds before booting the first menu option" ++ depends on CMD_BOOTFLOW ++ default 30 ++ help ++ On the bootflow menu, wait for the defined number of seconds before ++ automatically booting. Unless interrupted, this will auto-boot the ++ first option in the generated list of boot options. ++ ++ Set this to zero if you wish to disable the auto-boot timeout. ++ + config CMD_BOOTMETH + bool "bootmeth" + depends on BOOTSTD +diff --git a/doc/usage/cmd/bootflow.rst b/doc/usage/cmd/bootflow.rst +index 5d41fe37a7..728f294274 100644 +--- a/doc/usage/cmd/bootflow.rst ++++ b/doc/usage/cmd/bootflow.rst +@@ -32,6 +32,17 @@ Note that `CONFIG_BOOTSTD_FULL` (which enables `CONFIG_CMD_BOOTFLOW_FULL) must + be enabled to obtain full functionality with this command. Otherwise, it only + supports `bootflow scan` which scans and boots the first available bootflow. + ++The `CONFIG_CMD_BOOTFLOW_BOOTDELAY` option can be set, defining (in seconds) the ++amount of time that U-Boot will wait; after this time passes, it will ++automatically boot the first item when generating a bootflow menu. If the value ++is set to zero, the timeout is disabled and the user must press enter; if it's ++negative, the timeout is disabled, and the maximum number of seconds is 99 ++seconds. If a value higher than 100 is provided, the value is changed to a ++modulus of 100 (remainder of the value divided by 100). ++ ++If the `CONFIG_BOOTFLOW_BOOTFLOW` option is undefined, the timeout will default ++to 30 seconds. ++ + bootflow scan + ~~~~~~~~~~~~~ + +diff --git a/include/bootflow.h b/include/bootflow.h +index 4d2fc7b69b..9f4245caa7 100644 +--- a/include/bootflow.h ++++ b/include/bootflow.h +@@ -452,7 +452,15 @@ int bootflow_iter_check_system(const struct bootflow_iter *iter); + * @expp: Returns the expo created + * Returns 0 on success, -ve on error + */ +-int bootflow_menu_new(struct expo **expp); ++int bootflow_menu_new(struct expo **expp, const char *prompt); ++ ++/** ++ * bootflow_menu_show_countdown() - Show countdown timer for auto-boot ++ * ++ * Returns the value of expo_render() ++ */ ++int bootflow_menu_show_countdown(struct expo *exp, char *prompt, ++ char bootflow_delay); + + /** + * bootflow_menu_apply_theme() - Apply a theme to a bootmenu +-- +2.39.5 + diff --git a/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch new file mode 100644 index 00000000..2f903cd7 --- /dev/null +++ b/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch @@ -0,0 +1,213 @@ +From 4ff0f509aa28eb8e85f1c0c9929c63996c646bb8 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Wed, 4 Dec 2024 18:20:19 +0000 +Subject: [PATCH 1/1] Libreboot branding/version on the bootflow menu + +Signed-off-by: Leah Rowe <info@minifree.org> +--- + boot/bootflow_menu.c | 2 +- + drivers/video/u_boot_logo.bmp | Bin 6932 -> 27350 bytes + 2 files changed, 1 insertion(+), 1 deletion(-) + +diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c +index 84831915a2..8e26ec2aef 100644 +--- a/boot/bootflow_menu.c ++++ b/boot/bootflow_menu.c +@@ -59,7 +59,7 @@ int bootflow_menu_new(struct expo **expp, const char *prompt) + ret = scene_menu(scn, "main", OBJ_MENU, &menu); + ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100); + ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE, +- "U-Boot - Boot Menu", NULL); ++ "Libreboot 20241206, 8th revision (U-Boot menu): https://libreboot.org/", NULL); + ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT); + + logo = video_get_u_boot_logo(); +diff --git a/drivers/video/u_boot_logo.bmp b/drivers/video/u_boot_logo.bmp +index 47f1e9b99789584d2f6dd71e954b51927b35d783..bc9ae001badb25bc900058c167a47247ef91dc7c 100644 +GIT binary patch +literal 27350 +zcmeI4X;4&Wy2qdHrW-_vf~Q+fvxtHMDuIZCglHm=fVhAxir~hgf>ENNF(W3?XpH+1 +zw}==uio$3#35sl^*F+S*+^So3t7fU1n$PoLKHXb0U#6y<|MQ++Xy|4+$n8^eeap7r +zKIil~zy3eV`@HYzCVj>4wvlMbK18wTU9&xO<R`XMCDHE#l?Umt2@lCAljLtD*%VHp +z6Rczowo=GcnJlK66y`gf!Y4%Gm<1$-#E>MXP)LkS)`eD*V$#TxIG3XQWs30+r8r5Z +zg_C89GDgvK|5-F+Vl2(^jiNcmI9lKvNArz|lx9q(#l}>MiIQplOqmi=acxsJNpBR8 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+zD%l{pscM?WJiC3Jd6aPz?5pUJ%)I%`%#Z)rb6X@$lcSuyh86dI(H=1FoHiwEG2R6$ +zm}UKXsD6rSlMi{`m5@3(+;i)t9u~=9mZ&7v+C%kMmYE{zO|ON>N#Vw=x*w^~EOV}? +z`s^&vog;GpNY9=BS=xNW@?%wJ?R$O_ZqWK;r}3^3fE~t5MIh3Q*N`Bj7_Te?u+{TI +zBwDi38i*~z{|rJfHW@Eo!ARu#)VrE`4NNfJ?S^2T@jf^dYm8UO5X2cTnS4{#Vnw}* +z-h-Z3*4}s5`>>EG>Ls@Kbv6tOjMv)U*V_?zUes%DIA)7_-|c<#<twn(^9szDVQq?x +wA@94_V)cG3+BniCF!%phCa^V`EuNoDjq0U&Do6FaK0m2mbu}=?pJWRCZ}IWH!~g&Q + +-- +2.39.5 + diff --git a/config/u-boot/default/patches/0008-change-the-logo-back-to-the-plain-libreboot-one.patch b/config/u-boot/default/patches/0008-change-the-logo-back-to-the-plain-libreboot-one.patch new file mode 100644 index 00000000..febc2372 --- /dev/null +++ b/config/u-boot/default/patches/0008-change-the-logo-back-to-the-plain-libreboot-one.patch @@ -0,0 +1,157 @@ +From d721edb391618fca096ec7f63a2fbc9df0af9231 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Tue, 17 Dec 2024 12:59:54 +0000 +Subject: [PATCH 1/1] change the logo back to the plain libreboot one + +Signed-off-by: Leah Rowe <info@minifree.org> +--- + drivers/video/u_boot_logo.bmp | Bin 27350 -> 27350 bytes + 1 file changed, 0 insertions(+), 0 deletions(-) + +diff --git a/drivers/video/u_boot_logo.bmp b/drivers/video/u_boot_logo.bmp +index bc9ae001badb25bc900058c167a47247ef91dc7c..c9262cd206cc3cf5297daa94b696fcf102fc22b5 100644 +GIT binary patch +literal 27350 +zcmeHQO>7&-6@I%EB~g@3*_3HXp(Kj3Xz^F1xI5%-k<?b5AGdL!IIdx*ZfpJcFSTSr +zQfdP=&;SXL0KNqA!D)S{6CWJF1yaC3d+?=zdov0YsFApE(VKxDdTP;Lia?zuxqsp= +zxt!S*2L%^c?%Ua!_r85I^XBc_8SdP%uik;mhPnWzF?FZ5bI@B!hh>0pu(|_>lkh&; +z7l(;p0^-4Gh=&s}6;45NBnRoSJY?eqC?o_ZCJ~4k3Cc6y0(tgDc&T&<UMe4kxfhSX +z%in$tjvRgkUODs{9DVtFaO~(C@WyxN;mu>m;l!IK;pAJV;PlD2;mqkD!jI3Kg|k0e +zfaS$=aN*oVxOn~&{N$a>aAkE3*6_Z$u?bgydJV2!y$08Rb{*dP`FrsG`yaqZAASTk +zZrp&IpWK97w?2j2w{OGUyLaK<y)WPkyx+fnAHMwZH}K%W19<rGAv}8Y2p&Iv3{Rds +zfu~<Tg=f#6!Sm<Ot2*fXb~Mn@fTjVyvvoAk(LhH7UTYu_@LB>5|L#00p<;R>!f`Zg +zJS!V6%ask~#``=ILc=&)#fN`|2|t5642c>*IonTjryiA!2s%Jvh(QfT3OYbE?2#5| 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+ +-- +2.39.5 + diff --git a/config/u-boot/default/patches/0009-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch b/config/u-boot/default/patches/0009-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch new file mode 100644 index 00000000..905b311c --- /dev/null +++ b/config/u-boot/default/patches/0009-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch @@ -0,0 +1,61 @@ +From 3c61a3257ad5799202cac64020d3b4af21b72de3 Mon Sep 17 00:00:00 2001 +From: Markus Volk <f_l_k@t-online.de> +Date: Wed, 30 Oct 2024 06:07:16 +0100 +Subject: [PATCH 1/1] scripts/dtc/pylibfdt/libfdt.i_shipped: Use + SWIG_AppendOutput +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Swig has changed language specific AppendOutput functions. The helper +macro SWIG_AppendOutput remains unchanged. Use that instead +of SWIG_Python_AppendOutput, which would require an extra parameter +since swig 4.3.0. + +/home/flk/poky/build-test/tmp/work/qemux86_64-poky-linux/u-boot/2024.10/git/arch/x86/cpu/u-boot-64.lds +| scripts/dtc/pylibfdt/libfdt_wrap.c: In function ‘_wrap_fdt_next_node’: +| scripts/dtc/pylibfdt/libfdt_wrap.c:5581:17: error: too few arguments to function ‘SWIG_Python_AppendOutput’ +| 5581 | resultobj = SWIG_Python_AppendOutput(resultobj, val); +| | ^~~~~~~~~~~~~~~~~~~~~~~~ + +Signed-off-by: Markus Volk <f_l_k@t-online.de> +Reported-by: Rudi Heitbaum <rudi@heitbaum.com> +Link: https://github.com/dgibson/dtc/pull/154 +--- + scripts/dtc/pylibfdt/libfdt.i_shipped | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/scripts/dtc/pylibfdt/libfdt.i_shipped b/scripts/dtc/pylibfdt/libfdt.i_shipped +index 56cc5d48f4..e4659489a9 100644 +--- a/scripts/dtc/pylibfdt/libfdt.i_shipped ++++ b/scripts/dtc/pylibfdt/libfdt.i_shipped +@@ -1037,7 +1037,7 @@ typedef uint32_t fdt32_t; + fdt_string(fdt1, fdt32_to_cpu($1->nameoff))); + buff = PyByteArray_FromStringAndSize( + (const char *)($1 + 1), fdt32_to_cpu($1->len)); +- resultobj = SWIG_Python_AppendOutput(resultobj, buff); ++ resultobj = SWIG_AppendOutput(resultobj, buff); + } + } + +@@ -1076,7 +1076,7 @@ typedef uint32_t fdt32_t; + + %typemap(argout) int *depth { + PyObject *val = Py_BuildValue("i", *arg$argnum); +- resultobj = SWIG_Python_AppendOutput(resultobj, val); ++ resultobj = SWIG_AppendOutput(resultobj, val); + } + + %apply int *depth { int *depth }; +@@ -1092,7 +1092,7 @@ typedef uint32_t fdt32_t; + if (PyTuple_GET_SIZE(resultobj) == 0) + resultobj = val; + else +- resultobj = SWIG_Python_AppendOutput(resultobj, val); ++ resultobj = SWIG_AppendOutput(resultobj, val); + } + } + +-- +2.39.5 + diff --git a/config/u-boot/default/target.cfg b/config/u-boot/default/target.cfg index 8d6af6d9..c0fb6209 100644 --- a/config/u-boot/default/target.cfg +++ b/config/u-boot/default/target.cfg @@ -1,2 +1,4 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" -rev="3f772959501c99fbe5aa0b22a36efe3478d1ae1c" # v2024.07 +rev="f919c3a889f0ec7d63a48b5d0ed064386b0980bd" # v2024.10 diff --git a/config/u-boot/gru_bob/config/default b/config/u-boot/gru_bob/config/default index da088ef0..bdd3ee98 100644 --- a/config/u-boot/gru_bob/config/default +++ b/config/u-boot/gru_bob/config/default @@ -1,12 +1,13 @@ # # Automatically generated file; DO NOT EDIT. -# U-Boot 2024.07 Configuration +# U-Boot 2024.10 Configuration # # -# Compiler: gcc (Debian 13.3.0-2) 13.3.0 +# Compiler: gcc (Debian 12.2.0-14) 12.2.0 # CONFIG_CREATE_ARCH_SYMLINK=y +CONFIG_SUPPORT_LITTLE_ENDIAN=y CONFIG_SYS_CACHE_SHIFT_6=y CONFIG_64BIT=y CONFIG_SYS_CACHELINE_SIZE=64 @@ -123,6 +124,7 @@ CONFIG_ARM64_SUPPORT_AARCH32=y # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_U8500 is not set # CONFIG_ARCH_VERSAL is not set +# CONFIG_ARCH_VERSAL2 is not set # CONFIG_ARCH_VERSAL_NET is not set # CONFIG_ARCH_VF610 is not set # CONFIG_ARCH_ZYNQ is not set @@ -162,6 +164,7 @@ CONFIG_ARM64_SUPPORT_AARCH32=y # CONFIG_TARGET_LS1046AQDS is not set # CONFIG_TARGET_LS1046ARDB is not set # CONFIG_TARGET_LS1046AFRWY is not set +# CONFIG_ARCH_SC5XX is not set # CONFIG_TARGET_SL28 is not set # CONFIG_TARGET_TEN64 is not set # CONFIG_ARCH_UNIPHIER is not set @@ -192,7 +195,7 @@ CONFIG_SPL_LDSCRIPT="arch/arm/cpu/armv8/u-boot-spl.lds" CONFIG_ENV_SOURCE_FILE="" CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SF_DEFAULT_MODE=0x0 -CONFIG_ENV_SIZE=0x8000 +CONFIG_ENV_SIZE=0x1f000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-bob" @@ -254,13 +257,13 @@ CONFIG_SPL_BSS_START_ADDR=0xff8e0000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_SPL_SYS_MALLOC_F=y CONFIG_ERR_PTR_OFFSET=0x0 CONFIG_SPL_SIZE_LIMIT=0x0 CONFIG_SPL=y CONFIG_PRE_CON_BUF_ADDR=0x0f200000 CONFIG_PRE_CON_BUF_SZ=4096 -CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_DEBUG_UART_BASE=0xff1a0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_BOARD_INIT=y @@ -286,6 +289,7 @@ CONFIG_ARMV8_SET_SMPEN=y CONFIG_PSCI_RESET=y # CONFIG_ARMV8_PSCI is not set # CONFIG_ARMV8_EA_EL3_FIRST is not set +# CONFIG_ARMV8_UDELAY_EVENT_STREAM is not set CONFIG_ARMV8_CRYPTO=y CONFIG_ARMV8_CE_SHA1=y CONFIG_ARMV8_CE_SHA256=y @@ -315,6 +319,7 @@ CONFIG_DEBUG_UART=y # Functionality shared between NXP SoCs # # CONFIG_NXP_ESBC is not set +CONFIG_SYS_LITTLE_ENDIAN=y # # General setup @@ -322,7 +327,7 @@ CONFIG_DEBUG_UART=y CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=130300 +CONFIG_GCC_VERSION=120200 CONFIG_CLANG_VERSION=0 CONFIG_CC_OPTIMIZE_FOR_SIZE=y # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set @@ -399,6 +404,7 @@ CONFIG_BOOTSTD_FULL=y CONFIG_BOOTSTD_DEFAULTS=y CONFIG_BOOTSTD_BOOTCOMMAND=y CONFIG_BOOTMETH_GLOBAL=y +# CONFIG_BOOTMETH_ANDROID is not set # CONFIG_BOOTMETH_CROS is not set CONFIG_BOOTMETH_EXTLINUX=y CONFIG_BOOTMETH_EXTLINUX_PXE=y @@ -427,7 +433,6 @@ CONFIG_SYS_BOOT_RAMDISK_HIGH=y # Boot timing # # CONFIG_BOOTSTAGE is not set -CONFIG_BOOTSTAGE_STASH_SIZE=0x1000 # CONFIG_SHOW_BOOT_PROGRESS is not set # CONFIG_SPL_SHOW_BOOT_PROGRESS is not set @@ -470,8 +475,10 @@ CONFIG_ARCH_FIXUP_FDT_MEMORY=y # CONFIG_USE_BOOTARGS is not set # CONFIG_BOOTARGS_SUBST is not set CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="bootflow scan -lb" -# CONFIG_USE_PREBOOT is not set +CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi" +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="usb start" +CONFIG_PREBOOT_DEFINED=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb" # CONFIG_SAVE_PREV_BL_FDT_ADDR is not set # CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR is not set @@ -532,7 +539,9 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y # # Start-up hooks # -# CONFIG_CYCLIC is not set +CONFIG_CYCLIC=y +# CONFIG_SPL_CYCLIC is not set +CONFIG_CYCLIC_MAX_CPU_TIME_US=5000 CONFIG_EVENT=y CONFIG_EVENT_DYNAMIC=y # CONFIG_EVENT_DEBUG is not set @@ -595,6 +604,7 @@ CONFIG_SPL_BINMAN_SYMBOLS=y CONFIG_SPL_BINMAN_UBOOT_SYMBOLS=y CONFIG_HANDOFF=y CONFIG_SPL_HANDOFF=y +# CONFIG_SPL_SOC_INIT is not set CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_BOOTROM_SUPPORT is not set # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set @@ -703,8 +713,10 @@ CONFIG_CMD_BOOTM=y CONFIG_CMD_BOOTDEV=y CONFIG_CMD_BOOTFLOW=y CONFIG_CMD_BOOTFLOW_FULL=y +CONFIG_CMD_BOOTFLOW_BOOTDELAY=8 CONFIG_CMD_BOOTMETH=y CONFIG_BOOTM_EFI=y +CONFIG_BOOTM_ELF=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTI=y CONFIG_BOOTM_LINUX=y @@ -729,7 +741,6 @@ CONFIG_CMD_FDT=y CONFIG_CMD_GO=y CONFIG_CMD_RUN=y CONFIG_CMD_IMI=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_XIMG=y CONFIG_SYS_XIMG_LEN=0x800000 # CONFIG_CMD_SPL is not set @@ -784,7 +795,6 @@ CONFIG_CMD_UNZIP=y # # Device access commands # -# CONFIG_CMD_ARMFLASH is not set # CONFIG_CMD_ADC is not set # CONFIG_CMD_BCB is not set # CONFIG_CMD_BIND is not set @@ -792,7 +802,6 @@ CONFIG_CMD_UNZIP=y # CONFIG_CMD_DEMO is not set # CONFIG_CMD_DFU is not set CONFIG_CMD_DM=y -# CONFIG_CMD_FPGAD is not set # CONFIG_CMD_FUSE is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_GPIO_READ is not set @@ -833,8 +842,6 @@ CONFIG_CMD_SF_TEST=y CONFIG_CMD_SPI=y CONFIG_DEFAULT_SPI_BUS=0 CONFIG_DEFAULT_SPI_MODE=0x0 -# CONFIG_CMD_TSI148 is not set -# CONFIG_CMD_UNIVERSE is not set CONFIG_CMD_USB=y # CONFIG_CMD_USB_SDP is not set # CONFIG_CMD_RKMTD is not set @@ -967,6 +974,7 @@ CONFIG_MTDPARTS_DEFAULT="" # # Debug commands # +CONFIG_CMD_CYCLIC=y # CONFIG_CMD_DIAG is not set # CONFIG_CMD_EVENT is not set CONFIG_CMD_LOG=y @@ -1010,6 +1018,7 @@ CONFIG_OF_UPSTREAM=y # CONFIG_OF_UPSTREAM_BUILD_VENDOR is not set CONFIG_OF_SEPARATE=y # CONFIG_OF_EMBED is not set +# CONFIG_OF_INITIAL_DTB_READONLY is not set # CONFIG_OF_BOARD is not set # CONFIG_OF_OMIT_DTB is not set CONFIG_DEVICE_TREE_INCLUDES="" @@ -1041,7 +1050,6 @@ CONFIG_ENV_IS_NOWHERE=y # CONFIG_ENV_IS_IN_MMC is not set # CONFIG_ENV_IS_IN_NAND is not set # CONFIG_ENV_IS_IN_NVRAM is not set -# CONFIG_ENV_IS_IN_ONENAND is not set # CONFIG_ENV_IS_IN_REMOTE is not set # CONFIG_ENV_IS_IN_SPI_FLASH is not set # CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set @@ -1122,6 +1130,7 @@ CONFIG_OFNODE_MULTI_TREE=y CONFIG_OFNODE_MULTI_TREE_MAX=4 CONFIG_BOUNCE_BUFFER=y CONFIG_ADC=y +# CONFIG_SPL_ADC is not set # CONFIG_ADC_EXYNOS is not set # CONFIG_ADC_SANDBOX is not set # CONFIG_SARADC_MESON is not set @@ -1180,6 +1189,7 @@ CONFIG_SPL_CLK=y # CONFIG_CLK_K210 is not set # CONFIG_CLK_MPC83XX is not set # CONFIG_CLK_XLNX_CLKWZRD is not set +# CONFIG_COMMON_CLK_ADI_SHARED is not set # CONFIG_CLK_AT91 is not set # CONFIG_CLK_RCAR is not set # CONFIG_CLK_RCAR_CPG_LIB is not set @@ -1297,7 +1307,6 @@ CONFIG_ROCKCHIP_GPIO=y # CONFIG_MPC8XX_GPIO is not set # CONFIG_NX_GPIO is not set # CONFIG_NOMADIK_GPIO is not set -# CONFIG_ZYNQMP_GPIO_MODEPIN is not set # CONFIG_SLG7XL45106_I2C_GPO is not set # CONFIG_FTGPIO010 is not set # CONFIG_ADP5585_GPIO is not set @@ -1327,6 +1336,7 @@ CONFIG_I2C_CROS_EC_TUNNEL=y # CONFIG_SYS_I2C_OCORES is not set CONFIG_SYS_I2C_ROCKCHIP=y # CONFIG_SYS_I2C_SOFT is not set +# CONFIG_SYS_I2C_S3C24X0 is not set # CONFIG_SYS_I2C_MV is not set # CONFIG_SYS_I2C_MVTWSI is not set # CONFIG_SYS_I2C_XILINX_XIIC is not set @@ -1438,6 +1448,7 @@ CONFIG_MMC_HW_PARTITIONING=y # CONFIG_SUPPORT_EMMC_RPMB is not set # CONFIG_SUPPORT_EMMC_BOOT is not set CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_SUPPORTS_TUNING=y CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y @@ -1484,6 +1495,7 @@ CONFIG_MTD=y # CONFIG_DM_MTD is not set # CONFIG_MTD_NOR_FLASH is not set # CONFIG_MTD_CONCAT is not set +# CONFIG_MTD_BLOCK is not set # CONFIG_SYS_MTDPARTS_RUNTIME is not set # CONFIG_FLASH_CFI_DRIVER is not set # CONFIG_HBMC_AM654 is not set @@ -1539,6 +1551,7 @@ CONFIG_SPI_FLASH_USE_4K_SECTORS=y # CONFIG_MV88E6352_SWITCH is not set CONFIG_PHYLIB=y # CONFIG_PHY_ADDR_ENABLE is not set +CONFIG_PHY_ANEG_TIMEOUT=4000 # CONFIG_B53_SWITCH is not set # CONFIG_MV88E61XX_SWITCH is not set # CONFIG_PHYLIB_10G is not set @@ -1588,6 +1601,7 @@ CONFIG_PHY_GIGE=y # CONFIG_BCMGENET is not set # CONFIG_BNXT_ETH is not set # CONFIG_CALXEDA_XGMAC is not set +# CONFIG_DWC_ETH_XGMAC is not set # CONFIG_DRIVER_DM9000 is not set # CONFIG_DWC_ETH_QOS is not set # CONFIG_EEPRO100 is not set @@ -1828,6 +1842,7 @@ CONFIG_RNG_ROCKCHIP=y # CONFIG_RNG_IPROC200 is not set # CONFIG_RNG_SMCCC_TRNG is not set # CONFIG_RNG_ARM_RNDR is not set +# CONFIG_RNG_EXYNOS is not set # # Real Time Clock @@ -1910,6 +1925,7 @@ CONFIG_SYS_NS16550_MEM32=y # SOC (System On Chip) specific Drivers # # CONFIG_SOC_DEVICE is not set +# CONFIG_SOC_QCOM is not set # CONFIG_SOC_SAMSUNG is not set # CONFIG_SOC_TI is not set CONFIG_SPI=y @@ -2037,6 +2053,7 @@ CONFIG_USB_DWC3=y # CONFIG_USB_DWC3_OMAP is not set CONFIG_USB_DWC3_GENERIC=y # CONFIG_SPL_USB_DWC3_GENERIC is not set +# CONFIG_USB_DWC3_AM62 is not set # CONFIG_USB_DWC3_LAYERSCAPE is not set # @@ -2119,6 +2136,8 @@ CONFIG_CONSOLE_NORMAL=y # CONFIG_CONSOLE_TRUETYPE is not set CONFIG_SYS_WHITE_ON_BLACK=y # CONFIG_NO_FB_CLEAR is not set +CONFIG_VIDEO_SYNC_MS=100 +CONFIG_VIDEO_SYNC_CYCLIC_MS=10 CONFIG_PANEL=y CONFIG_SIMPLE_PANEL=y # CONFIG_PANEL_HX8238D is not set @@ -2208,7 +2227,6 @@ CONFIG_VIDEO_BMP_RLE8=y # Watchdog Timer Support # # CONFIG_WATCHDOG is not set -CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 # CONFIG_IMX_WATCHDOG is not set # CONFIG_ULP_WATCHDOG is not set # CONFIG_WDT is not set @@ -2403,6 +2421,6 @@ CONFIG_TOOLS_SHA1=y CONFIG_TOOLS_SHA256=y CONFIG_TOOLS_SHA384=y CONFIG_TOOLS_SHA512=y -# CONFIG_TOOLS_MKEFICAPSULE is not set +CONFIG_TOOLS_MKEFICAPSULE=y # CONFIG_FSPI_CONF_HEADER is not set # CONFIG_TOOLS_MKFWUMDATA is not set diff --git a/config/u-boot/gru_bob/target.cfg b/config/u-boot/gru_bob/target.cfg index f7d4d7d9..e19603c2 100644 --- a/config/u-boot/gru_bob/target.cfg +++ b/config/u-boot/gru_bob/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xtree="default" xarch="aarch64-elf arm-eabi" diff --git a/config/u-boot/gru_kevin/config/default b/config/u-boot/gru_kevin/config/default index 1bf46d24..2a15b9bf 100644 --- a/config/u-boot/gru_kevin/config/default +++ b/config/u-boot/gru_kevin/config/default @@ -1,12 +1,13 @@ # # Automatically generated file; DO NOT EDIT. -# U-Boot 2024.07 Configuration +# U-Boot 2024.10 Configuration # # -# Compiler: gcc (Debian 13.3.0-2) 13.3.0 +# Compiler: gcc (Debian 12.2.0-14) 12.2.0 # CONFIG_CREATE_ARCH_SYMLINK=y +CONFIG_SUPPORT_LITTLE_ENDIAN=y CONFIG_SYS_CACHE_SHIFT_6=y CONFIG_64BIT=y CONFIG_SYS_CACHELINE_SIZE=64 @@ -123,6 +124,7 @@ CONFIG_ARM64_SUPPORT_AARCH32=y # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_U8500 is not set # CONFIG_ARCH_VERSAL is not set +# CONFIG_ARCH_VERSAL2 is not set # CONFIG_ARCH_VERSAL_NET is not set # CONFIG_ARCH_VF610 is not set # CONFIG_ARCH_ZYNQ is not set @@ -162,6 +164,7 @@ CONFIG_ARM64_SUPPORT_AARCH32=y # CONFIG_TARGET_LS1046AQDS is not set # CONFIG_TARGET_LS1046ARDB is not set # CONFIG_TARGET_LS1046AFRWY is not set +# CONFIG_ARCH_SC5XX is not set # CONFIG_TARGET_SL28 is not set # CONFIG_TARGET_TEN64 is not set # CONFIG_ARCH_UNIPHIER is not set @@ -192,7 +195,7 @@ CONFIG_SPL_LDSCRIPT="arch/arm/cpu/armv8/u-boot-spl.lds" CONFIG_ENV_SOURCE_FILE="" CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SF_DEFAULT_MODE=0x0 -CONFIG_ENV_SIZE=0x8000 +CONFIG_ENV_SIZE=0x1f000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-kevin" @@ -254,13 +257,13 @@ CONFIG_SPL_BSS_START_ADDR=0xff8e0000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_SPL_SYS_MALLOC_F=y CONFIG_ERR_PTR_OFFSET=0x0 CONFIG_SPL_SIZE_LIMIT=0x0 CONFIG_SPL=y CONFIG_PRE_CON_BUF_ADDR=0x0f200000 CONFIG_PRE_CON_BUF_SZ=4096 -CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_DEBUG_UART_BASE=0xff1a0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_BOARD_INIT=y @@ -286,6 +289,7 @@ CONFIG_ARMV8_SET_SMPEN=y CONFIG_PSCI_RESET=y # CONFIG_ARMV8_PSCI is not set # CONFIG_ARMV8_EA_EL3_FIRST is not set +# CONFIG_ARMV8_UDELAY_EVENT_STREAM is not set CONFIG_ARMV8_CRYPTO=y CONFIG_ARMV8_CE_SHA1=y CONFIG_ARMV8_CE_SHA256=y @@ -315,6 +319,7 @@ CONFIG_DEBUG_UART=y # Functionality shared between NXP SoCs # # CONFIG_NXP_ESBC is not set +CONFIG_SYS_LITTLE_ENDIAN=y # # General setup @@ -322,7 +327,7 @@ CONFIG_DEBUG_UART=y CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=130300 +CONFIG_GCC_VERSION=120200 CONFIG_CLANG_VERSION=0 CONFIG_CC_OPTIMIZE_FOR_SIZE=y # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set @@ -399,6 +404,7 @@ CONFIG_BOOTSTD_FULL=y CONFIG_BOOTSTD_DEFAULTS=y CONFIG_BOOTSTD_BOOTCOMMAND=y CONFIG_BOOTMETH_GLOBAL=y +# CONFIG_BOOTMETH_ANDROID is not set # CONFIG_BOOTMETH_CROS is not set CONFIG_BOOTMETH_EXTLINUX=y CONFIG_BOOTMETH_EXTLINUX_PXE=y @@ -427,7 +433,6 @@ CONFIG_SYS_BOOT_RAMDISK_HIGH=y # Boot timing # # CONFIG_BOOTSTAGE is not set -CONFIG_BOOTSTAGE_STASH_SIZE=0x1000 # CONFIG_SHOW_BOOT_PROGRESS is not set # CONFIG_SPL_SHOW_BOOT_PROGRESS is not set @@ -470,8 +475,10 @@ CONFIG_ARCH_FIXUP_FDT_MEMORY=y # CONFIG_USE_BOOTARGS is not set # CONFIG_BOOTARGS_SUBST is not set CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="bootflow scan -lb" -# CONFIG_USE_PREBOOT is not set +CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi" +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="usb start" +CONFIG_PREBOOT_DEFINED=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-kevin.dtb" # CONFIG_SAVE_PREV_BL_FDT_ADDR is not set # CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR is not set @@ -532,7 +539,9 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y # # Start-up hooks # -# CONFIG_CYCLIC is not set +CONFIG_CYCLIC=y +# CONFIG_SPL_CYCLIC is not set +CONFIG_CYCLIC_MAX_CPU_TIME_US=5000 CONFIG_EVENT=y CONFIG_EVENT_DYNAMIC=y # CONFIG_EVENT_DEBUG is not set @@ -595,6 +604,7 @@ CONFIG_SPL_BINMAN_SYMBOLS=y CONFIG_SPL_BINMAN_UBOOT_SYMBOLS=y CONFIG_HANDOFF=y CONFIG_SPL_HANDOFF=y +# CONFIG_SPL_SOC_INIT is not set CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_BOOTROM_SUPPORT is not set # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set @@ -703,8 +713,10 @@ CONFIG_CMD_BOOTM=y CONFIG_CMD_BOOTDEV=y CONFIG_CMD_BOOTFLOW=y CONFIG_CMD_BOOTFLOW_FULL=y +CONFIG_CMD_BOOTFLOW_BOOTDELAY=8 CONFIG_CMD_BOOTMETH=y CONFIG_BOOTM_EFI=y +CONFIG_BOOTM_ELF=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTI=y CONFIG_BOOTM_LINUX=y @@ -729,7 +741,6 @@ CONFIG_CMD_FDT=y CONFIG_CMD_GO=y CONFIG_CMD_RUN=y CONFIG_CMD_IMI=y -# CONFIG_CMD_IMLS is not set CONFIG_CMD_XIMG=y CONFIG_SYS_XIMG_LEN=0x800000 # CONFIG_CMD_SPL is not set @@ -784,7 +795,6 @@ CONFIG_CMD_UNZIP=y # # Device access commands # -# CONFIG_CMD_ARMFLASH is not set # CONFIG_CMD_ADC is not set # CONFIG_CMD_BCB is not set # CONFIG_CMD_BIND is not set @@ -792,7 +802,6 @@ CONFIG_CMD_UNZIP=y # CONFIG_CMD_DEMO is not set # CONFIG_CMD_DFU is not set CONFIG_CMD_DM=y -# CONFIG_CMD_FPGAD is not set # CONFIG_CMD_FUSE is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_GPIO_READ is not set @@ -833,8 +842,6 @@ CONFIG_CMD_SF_TEST=y CONFIG_CMD_SPI=y CONFIG_DEFAULT_SPI_BUS=0 CONFIG_DEFAULT_SPI_MODE=0x0 -# CONFIG_CMD_TSI148 is not set -# CONFIG_CMD_UNIVERSE is not set CONFIG_CMD_USB=y # CONFIG_CMD_USB_SDP is not set # CONFIG_CMD_RKMTD is not set @@ -967,6 +974,7 @@ CONFIG_MTDPARTS_DEFAULT="" # # Debug commands # +CONFIG_CMD_CYCLIC=y # CONFIG_CMD_DIAG is not set # CONFIG_CMD_EVENT is not set CONFIG_CMD_LOG=y @@ -1010,6 +1018,7 @@ CONFIG_OF_UPSTREAM=y # CONFIG_OF_UPSTREAM_BUILD_VENDOR is not set CONFIG_OF_SEPARATE=y # CONFIG_OF_EMBED is not set +# CONFIG_OF_INITIAL_DTB_READONLY is not set # CONFIG_OF_BOARD is not set # CONFIG_OF_OMIT_DTB is not set CONFIG_DEVICE_TREE_INCLUDES="" @@ -1041,7 +1050,6 @@ CONFIG_ENV_IS_NOWHERE=y # CONFIG_ENV_IS_IN_MMC is not set # CONFIG_ENV_IS_IN_NAND is not set # CONFIG_ENV_IS_IN_NVRAM is not set -# CONFIG_ENV_IS_IN_ONENAND is not set # CONFIG_ENV_IS_IN_REMOTE is not set # CONFIG_ENV_IS_IN_SPI_FLASH is not set # CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set @@ -1122,6 +1130,7 @@ CONFIG_OFNODE_MULTI_TREE=y CONFIG_OFNODE_MULTI_TREE_MAX=4 CONFIG_BOUNCE_BUFFER=y CONFIG_ADC=y +# CONFIG_SPL_ADC is not set # CONFIG_ADC_EXYNOS is not set # CONFIG_ADC_SANDBOX is not set # CONFIG_SARADC_MESON is not set @@ -1180,6 +1189,7 @@ CONFIG_SPL_CLK=y # CONFIG_CLK_K210 is not set # CONFIG_CLK_MPC83XX is not set # CONFIG_CLK_XLNX_CLKWZRD is not set +# CONFIG_COMMON_CLK_ADI_SHARED is not set # CONFIG_CLK_AT91 is not set # CONFIG_CLK_RCAR is not set # CONFIG_CLK_RCAR_CPG_LIB is not set @@ -1297,7 +1307,6 @@ CONFIG_ROCKCHIP_GPIO=y # CONFIG_MPC8XX_GPIO is not set # CONFIG_NX_GPIO is not set # CONFIG_NOMADIK_GPIO is not set -# CONFIG_ZYNQMP_GPIO_MODEPIN is not set # CONFIG_SLG7XL45106_I2C_GPO is not set # CONFIG_FTGPIO010 is not set # CONFIG_ADP5585_GPIO is not set @@ -1327,6 +1336,7 @@ CONFIG_I2C_CROS_EC_TUNNEL=y # CONFIG_SYS_I2C_OCORES is not set CONFIG_SYS_I2C_ROCKCHIP=y # CONFIG_SYS_I2C_SOFT is not set +# CONFIG_SYS_I2C_S3C24X0 is not set # CONFIG_SYS_I2C_MV is not set # CONFIG_SYS_I2C_MVTWSI is not set # CONFIG_SYS_I2C_XILINX_XIIC is not set @@ -1438,6 +1448,7 @@ CONFIG_MMC_HW_PARTITIONING=y # CONFIG_SUPPORT_EMMC_RPMB is not set # CONFIG_SUPPORT_EMMC_BOOT is not set CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_SUPPORTS_TUNING=y CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS400_ES_SUPPORT=y CONFIG_MMC_HS400_SUPPORT=y @@ -1484,6 +1495,7 @@ CONFIG_MTD=y # CONFIG_DM_MTD is not set # CONFIG_MTD_NOR_FLASH is not set # CONFIG_MTD_CONCAT is not set +# CONFIG_MTD_BLOCK is not set # CONFIG_SYS_MTDPARTS_RUNTIME is not set # CONFIG_FLASH_CFI_DRIVER is not set # CONFIG_HBMC_AM654 is not set @@ -1539,6 +1551,7 @@ CONFIG_SPI_FLASH_USE_4K_SECTORS=y # CONFIG_MV88E6352_SWITCH is not set CONFIG_PHYLIB=y # CONFIG_PHY_ADDR_ENABLE is not set +CONFIG_PHY_ANEG_TIMEOUT=4000 # CONFIG_B53_SWITCH is not set # CONFIG_MV88E61XX_SWITCH is not set # CONFIG_PHYLIB_10G is not set @@ -1588,6 +1601,7 @@ CONFIG_PHY_GIGE=y # CONFIG_BCMGENET is not set # CONFIG_BNXT_ETH is not set # CONFIG_CALXEDA_XGMAC is not set +# CONFIG_DWC_ETH_XGMAC is not set # CONFIG_DRIVER_DM9000 is not set # CONFIG_DWC_ETH_QOS is not set # CONFIG_EEPRO100 is not set @@ -1828,6 +1842,7 @@ CONFIG_RNG_ROCKCHIP=y # CONFIG_RNG_IPROC200 is not set # CONFIG_RNG_SMCCC_TRNG is not set # CONFIG_RNG_ARM_RNDR is not set +# CONFIG_RNG_EXYNOS is not set # # Real Time Clock @@ -1910,6 +1925,7 @@ CONFIG_SYS_NS16550_MEM32=y # SOC (System On Chip) specific Drivers # # CONFIG_SOC_DEVICE is not set +# CONFIG_SOC_QCOM is not set # CONFIG_SOC_SAMSUNG is not set # CONFIG_SOC_TI is not set CONFIG_SPI=y @@ -2037,6 +2053,7 @@ CONFIG_USB_DWC3=y # CONFIG_USB_DWC3_OMAP is not set CONFIG_USB_DWC3_GENERIC=y # CONFIG_SPL_USB_DWC3_GENERIC is not set +# CONFIG_USB_DWC3_AM62 is not set # CONFIG_USB_DWC3_LAYERSCAPE is not set # @@ -2119,6 +2136,8 @@ CONFIG_CONSOLE_NORMAL=y # CONFIG_CONSOLE_TRUETYPE is not set CONFIG_SYS_WHITE_ON_BLACK=y # CONFIG_NO_FB_CLEAR is not set +CONFIG_VIDEO_SYNC_MS=100 +CONFIG_VIDEO_SYNC_CYCLIC_MS=10 CONFIG_PANEL=y CONFIG_SIMPLE_PANEL=y # CONFIG_PANEL_HX8238D is not set @@ -2208,7 +2227,6 @@ CONFIG_VIDEO_BMP_RLE8=y # Watchdog Timer Support # # CONFIG_WATCHDOG is not set -CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 # CONFIG_IMX_WATCHDOG is not set # CONFIG_ULP_WATCHDOG is not set # CONFIG_WDT is not set @@ -2403,6 +2421,6 @@ CONFIG_TOOLS_SHA1=y CONFIG_TOOLS_SHA256=y CONFIG_TOOLS_SHA384=y CONFIG_TOOLS_SHA512=y -# CONFIG_TOOLS_MKEFICAPSULE is not set +CONFIG_TOOLS_MKEFICAPSULE=y # CONFIG_FSPI_CONF_HEADER is not set # CONFIG_TOOLS_MKFWUMDATA is not set diff --git a/config/u-boot/gru_kevin/target.cfg b/config/u-boot/gru_kevin/target.cfg index f7d4d7d9..e19603c2 100644 --- a/config/u-boot/gru_kevin/target.cfg +++ b/config/u-boot/gru_kevin/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xtree="default" xarch="aarch64-elf arm-eabi" diff --git a/config/u-boot/i386coreboot/config/default b/config/u-boot/i386coreboot/config/default index d01984d5..ba4fd18b 100644 --- a/config/u-boot/i386coreboot/config/default +++ b/config/u-boot/i386coreboot/config/default @@ -390,6 +390,7 @@ CONFIG_CMD_BOOTM=y CONFIG_CMD_BOOTDEV=y CONFIG_CMD_BOOTFLOW=y CONFIG_CMD_BOOTFLOW_FULL=y +CONFIG_CMD_BOOTFLOW_BOOTDELAY=8 CONFIG_CMD_BOOTMETH=y CONFIG_BOOTM_EFI=y CONFIG_BOOTM_ELF=y diff --git a/config/u-boot/i386coreboot/target.cfg b/config/u-boot/i386coreboot/target.cfg index cf3b36be..71cdde44 100644 --- a/config/u-boot/i386coreboot/target.cfg +++ b/config/u-boot/i386coreboot/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="x86" # test building with x86_64 hostcc by commenting these: # xtree="default" # coreboot tree containing crossgcc diff --git a/config/u-boot/qemu_arm64_12mb/config/default b/config/u-boot/qemu_arm64_12mb/config/default index 65c6e684..4824cc79 100644 --- a/config/u-boot/qemu_arm64_12mb/config/default +++ b/config/u-boot/qemu_arm64_12mb/config/default @@ -1,12 +1,13 @@ # # Automatically generated file; DO NOT EDIT. -# U-Boot 2024.07 Configuration +# U-Boot 2024.10 Configuration # # -# Compiler: gcc (Debian 13.3.0-2) 13.3.0 +# Compiler: gcc (Debian 12.2.0-14) 12.2.0 # CONFIG_CREATE_ARCH_SYMLINK=y +CONFIG_SUPPORT_LITTLE_ENDIAN=y CONFIG_SYS_CACHE_SHIFT_6=y CONFIG_64BIT=y CONFIG_SYS_CACHELINE_SIZE=64 @@ -113,6 +114,7 @@ CONFIG_ARCH_QEMU=y # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_U8500 is not set # CONFIG_ARCH_VERSAL is not set +# CONFIG_ARCH_VERSAL2 is not set # CONFIG_ARCH_VERSAL_NET is not set # CONFIG_ARCH_VF610 is not set # CONFIG_ARCH_ZYNQ is not set @@ -152,6 +154,7 @@ CONFIG_ARCH_QEMU=y # CONFIG_TARGET_LS1046AQDS is not set # CONFIG_TARGET_LS1046ARDB is not set # CONFIG_TARGET_LS1046AFRWY is not set +# CONFIG_ARCH_SC5XX is not set # CONFIG_TARGET_SL28 is not set # CONFIG_TARGET_TEN64 is not set # CONFIG_ARCH_UNIPHIER is not set @@ -188,10 +191,10 @@ CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000 CONFIG_SYS_MONITOR_LEN=0 # CONFIG_TARGET_QEMU_ARM_32BIT is not set CONFIG_TARGET_QEMU_ARM_64BIT=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_ERR_PTR_OFFSET=0x0 CONFIG_PRE_CON_BUF_ADDR=0x40100000 CONFIG_PRE_CON_BUF_SZ=4096 -CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_DEBUG_UART_BASE=0x9000000 CONFIG_DEBUG_UART_CLOCK=0 # CONFIG_DEBUG_UART_BOARD_INIT is not set @@ -210,6 +213,7 @@ CONFIG_SYS_CLK_FREQ=0 CONFIG_PSCI_RESET=y # CONFIG_ARMV8_PSCI is not set # CONFIG_ARMV8_EA_EL3_FIRST is not set +# CONFIG_ARMV8_UDELAY_EVENT_STREAM is not set CONFIG_ARMV8_CRYPTO=y CONFIG_ARMV8_CE_SHA1=y CONFIG_ARMV8_CE_SHA256=y @@ -241,6 +245,7 @@ CONFIG_AHCI=y # Functionality shared between NXP SoCs # # CONFIG_NXP_ESBC is not set +CONFIG_SYS_LITTLE_ENDIAN=y # # General setup @@ -248,7 +253,7 @@ CONFIG_AHCI=y CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=130300 +CONFIG_GCC_VERSION=120200 CONFIG_CLANG_VERSION=0 CONFIG_CC_OPTIMIZE_FOR_SIZE=y # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set @@ -314,11 +319,13 @@ CONFIG_BOOTSTD_FULL=y CONFIG_BOOTSTD_DEFAULTS=y CONFIG_BOOTSTD_BOOTCOMMAND=y CONFIG_BOOTMETH_GLOBAL=y +# CONFIG_BOOTMETH_ANDROID is not set # CONFIG_BOOTMETH_CROS is not set CONFIG_BOOTMETH_EXTLINUX=y CONFIG_BOOTMETH_EXTLINUX_PXE=y CONFIG_BOOTMETH_EFILOADER=y CONFIG_BOOTMETH_EFI_BOOTMGR=y +CONFIG_BOOTMETH_QFW=y CONFIG_BOOTMETH_VBE=y CONFIG_BOOTMETH_DISTRO=y CONFIG_BOOTMETH_VBE_REQUEST=y @@ -340,7 +347,6 @@ CONFIG_SYS_BOOT_RAMDISK_HIGH=y # Boot timing # # CONFIG_BOOTSTAGE is not set -CONFIG_BOOTSTAGE_STASH_SIZE=0x1000 # CONFIG_SHOW_BOOT_PROGRESS is not set # @@ -381,7 +387,7 @@ CONFIG_ARCH_FIXUP_FDT_MEMORY=y # CONFIG_USE_BOOTARGS is not set # CONFIG_BOOTARGS_SUBST is not set CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="bootflow scan -lb" +CONFIG_BOOTCOMMAND="bootflow scan -l; if bootflow menu; then cls; bootflow boot; fi" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="usb start" CONFIG_PREBOOT_DEFINED=y @@ -434,7 +440,9 @@ CONFIG_SYS_DEVICE_NULLDEV=y # # Start-up hooks # -# CONFIG_CYCLIC is not set +CONFIG_CYCLIC=y +# CONFIG_SPL_CYCLIC is not set +CONFIG_CYCLIC_MAX_CPU_TIME_US=5000 CONFIG_EVENT=y CONFIG_EVENT_DYNAMIC=y # CONFIG_EVENT_DEBUG is not set @@ -515,8 +523,10 @@ CONFIG_CMD_BOOTM=y CONFIG_CMD_BOOTDEV=y CONFIG_CMD_BOOTFLOW=y CONFIG_CMD_BOOTFLOW_FULL=y +CONFIG_CMD_BOOTFLOW_BOOTDELAY=8 CONFIG_CMD_BOOTMETH=y CONFIG_BOOTM_EFI=y +CONFIG_BOOTM_ELF=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTI=y CONFIG_BOOTM_LINUX=y @@ -600,7 +610,6 @@ CONFIG_CMD_UNZIP=y CONFIG_CMD_DFU=y CONFIG_CMD_DM=y CONFIG_CMD_FLASH=y -# CONFIG_CMD_FPGAD is not set # CONFIG_CMD_FUSE is not set # CONFIG_CMD_GPIO is not set # CONFIG_CMD_GPT is not set @@ -631,8 +640,6 @@ CONFIG_CMD_POWEROFF=y # CONFIG_CMD_SATA is not set CONFIG_CMD_SCSI=y # CONFIG_CMD_SDRAM is not set -# CONFIG_CMD_TSI148 is not set -# CONFIG_CMD_UNIVERSE is not set CONFIG_CMD_USB=y # CONFIG_CMD_USB_SDP is not set # CONFIG_CMD_RKMTD is not set @@ -680,12 +687,12 @@ CONFIG_NET_TFTP_VARS=y # CONFIG_CMD_RARP is not set # CONFIG_CMD_NFS is not set # CONFIG_SYS_DISABLE_AUTOLOAD is not set -# CONFIG_CMD_WGET is not set +CONFIG_CMD_WGET=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_CMD_CDP is not set # CONFIG_CMD_SNTP is not set -# CONFIG_CMD_DNS is not set +CONFIG_CMD_DNS=y # CONFIG_CMD_LINK_LOCAL is not set # CONFIG_CMD_ETHSW is not set CONFIG_CMD_PXE=y @@ -698,10 +705,11 @@ CONFIG_CMD_PXE=y # CONFIG_CMD_BMP is not set # CONFIG_CMD_BSP is not set CONFIG_CMD_BLOCK_CACHE=y +CONFIG_CMD_BLKMAP=y # CONFIG_CMD_CACHE is not set # CONFIG_CMD_CONITRACE is not set CONFIG_CMD_CLS=y -# CONFIG_CMD_EFIDEBUG is not set +CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_EFICONFIG=y # CONFIG_CMD_EXCEPTION is not set # CONFIG_CMD_INI is not set @@ -768,6 +776,7 @@ CONFIG_CMD_MTDPARTS=y # # Debug commands # +CONFIG_CMD_CYCLIC=y # CONFIG_CMD_DIAG is not set # CONFIG_CMD_EVENT is not set # CONFIG_CMD_LOG is not set @@ -797,6 +806,7 @@ CONFIG_OF_REAL=y # CONFIG_OF_UPSTREAM is not set CONFIG_OF_SEPARATE=y # CONFIG_OF_EMBED is not set +# CONFIG_OF_INITIAL_DTB_READONLY is not set CONFIG_OF_BOARD=y CONFIG_OF_HAS_PRIOR_STAGE=y CONFIG_OF_OMIT_DTB=y @@ -823,7 +833,6 @@ CONFIG_ENV_IS_NOWHERE=y # CONFIG_ENV_IS_IN_FLASH is not set # CONFIG_ENV_IS_IN_NAND is not set # CONFIG_ENV_IS_IN_NVRAM is not set -# CONFIG_ENV_IS_IN_ONENAND is not set # CONFIG_ENV_IS_IN_REMOTE is not set # CONFIG_SYS_REDUNDAND_ENVIRONMENT is not set # CONFIG_SYS_RELOC_GD_ENV_ADDR is not set @@ -862,7 +871,8 @@ CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64 # CONFIG_USE_NETMASK is not set # CONFIG_USE_ROOTPATH is not set # CONFIG_USE_SERVERIP is not set -# CONFIG_PROT_TCP is not set +CONFIG_PROT_TCP=y +# CONFIG_PROT_TCP_SACK is not set # CONFIG_IPV6 is not set CONFIG_SYS_RX_ETH_BUFFER=4 @@ -911,7 +921,7 @@ CONFIG_AHCI_PCI=y # CONFIG_BLK=y CONFIG_BLOCK_CACHE=y -# CONFIG_BLKMAP is not set +CONFIG_BLKMAP=y # CONFIG_EFI_MEDIA is not set # CONFIG_IDE is not set # CONFIG_LBA48 is not set @@ -939,6 +949,7 @@ CONFIG_BLOCK_CACHE=y # # CONFIG_CLK is not set # CONFIG_CLK_CCF is not set +# CONFIG_COMMON_CLK_ADI_SHARED is not set # CONFIG_CLK_RCAR is not set # CONFIG_CLK_RCAR_CPG_LIB is not set # CONFIG_CPU is not set @@ -1119,6 +1130,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y # CONFIG_MTD_CONCAT is not set +# CONFIG_MTD_BLOCK is not set CONFIG_SYS_MTDPARTS_RUNTIME=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_CFI_WIDTH_8BIT=y @@ -1180,6 +1192,7 @@ CONFIG_NETDEVICES=y # CONFIG_BCMGENET is not set # CONFIG_BNXT_ETH is not set # CONFIG_CALXEDA_XGMAC is not set +# CONFIG_DWC_ETH_XGMAC is not set # CONFIG_DRIVER_DM9000 is not set # CONFIG_DWC_ETH_QOS is not set CONFIG_E1000=y @@ -1315,6 +1328,7 @@ CONFIG_DM_RNG=y # CONFIG_RNG_SMCCC_TRNG is not set # CONFIG_RNG_ARM_RNDR is not set CONFIG_TPM_RNG=y +# CONFIG_RNG_EXYNOS is not set # # Real Time Clock @@ -1403,6 +1417,7 @@ CONFIG_PL01X_SERIAL=y # SOC (System On Chip) specific Drivers # # CONFIG_SOC_DEVICE is not set +# CONFIG_SOC_QCOM is not set # CONFIG_SOC_SAMSUNG is not set # CONFIG_SOC_TI is not set # CONFIG_SPI is not set @@ -1539,6 +1554,8 @@ CONFIG_CONSOLE_NORMAL=y # CONFIG_CONSOLE_TRUETYPE is not set CONFIG_SYS_WHITE_ON_BLACK=y # CONFIG_NO_FB_CLEAR is not set +CONFIG_VIDEO_SYNC_MS=100 +CONFIG_VIDEO_SYNC_CYCLIC_MS=10 CONFIG_PANEL=y # CONFIG_PANEL_HX8238D is not set @@ -1620,7 +1637,6 @@ CONFIG_VIRTIO_RNG=y # Watchdog Timer Support # # CONFIG_WATCHDOG is not set -CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 # CONFIG_IMX_WATCHDOG is not set # CONFIG_ULP_WATCHDOG is not set # CONFIG_WDT is not set @@ -1760,7 +1776,7 @@ CONFIG_EFI_LOAD_FILE2_INITRD=y # CONFIG_EFI_SECURE_BOOT is not set CONFIG_EFI_ECPT=y CONFIG_EFI_EBBR_2_1_CONFORMANCE=y -# CONFIG_EFI_HTTP_BOOT is not set +CONFIG_EFI_HTTP_BOOT=y # CONFIG_OPTEE_LIB is not set # CONFIG_OPTEE_IMAGE is not set # CONFIG_BOOTM_OPTEE is not set @@ -1798,6 +1814,6 @@ CONFIG_TOOLS_SHA1=y CONFIG_TOOLS_SHA256=y CONFIG_TOOLS_SHA384=y CONFIG_TOOLS_SHA512=y -# CONFIG_TOOLS_MKEFICAPSULE is not set +CONFIG_TOOLS_MKEFICAPSULE=y # CONFIG_FSPI_CONF_HEADER is not set # CONFIG_TOOLS_MKFWUMDATA is not set diff --git a/config/u-boot/qemu_arm64_12mb/target.cfg b/config/u-boot/qemu_arm64_12mb/target.cfg index f7d4d7d9..e19603c2 100644 --- a/config/u-boot/qemu_arm64_12mb/target.cfg +++ b/config/u-boot/qemu_arm64_12mb/target.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="default" xtree="default" xarch="aarch64-elf arm-eabi" diff --git a/config/u-boot/x86/patches/0004-Support-auto-boot-timeout-delay-bootflow-menu.patch b/config/u-boot/x86/patches/0004-Support-auto-boot-timeout-delay-bootflow-menu.patch new file mode 100644 index 00000000..ffc7b581 --- /dev/null +++ b/config/u-boot/x86/patches/0004-Support-auto-boot-timeout-delay-bootflow-menu.patch @@ -0,0 +1,302 @@ +From d9371422ac74ea73d1620f01300a7136a7649754 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Wed, 4 Dec 2024 06:52:39 +0000 +Subject: [PATCH 1/1] Support auto-boot timeout delay bootflow menu + +The bootflow menu cannot currently auto-boot a selected entry, +which means that the user must press enter to boot their system. +This can be a problem on headless setups; for example, it is not +currently feasible to set up a headless server with U-Boot, when +using it to boot via UEFI on a coreboot setup. + +This patch adds the following build-time configuration option: + +CONFIG_CMD_BOOTFLOW_BOOTDELAY + +This creates a timeout delay in the given number of seconds. +If an arrow key is press to navigate the menu, the timer is +disabled and the user must then press enter to boot the selected +option. When this happens, the timeout display is replaced by +the old message indicating that the user should press enter. + +The default boot delay is 30 seconds, and the timeout is enabled +by default. Setting it to zero will restore the old behaviour, +whereby no timeout is provided and the user must press enter. + +If a negative integer is provided, the timer will default to +zero. The timer value is further filtered by modulus of 100, +so that the maximum number of seconds allowed is 99 seconds. + +Signed-off-by: Leah Rowe <info@minifree.org> +--- + boot/bootflow_menu.c | 117 +++++++++++++++++++++++++++++++++++-- + cmd/Kconfig | 12 ++++ + doc/usage/cmd/bootflow.rst | 11 ++++ + include/bootflow.h | 10 +++- + 4 files changed, 143 insertions(+), 7 deletions(-) + +diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c +index 9d0dc352f9..172139b187 100644 +--- a/boot/bootflow_menu.c ++++ b/boot/bootflow_menu.c +@@ -30,7 +30,7 @@ struct menu_priv { + int num_bootflows; + }; + +-int bootflow_menu_new(struct expo **expp) ++int bootflow_menu_new(struct expo **expp, const char *prompt) + { + struct udevice *last_bootdev; + struct scene_obj_menu *menu; +@@ -54,7 +54,7 @@ int bootflow_menu_new(struct expo **expp) + return log_msg_ret("scn", ret); + + ret |= scene_txt_str(scn, "prompt", OBJ_PROMPT, STR_PROMPT, +- "UP and DOWN to choose, ENTER to select", NULL); ++ prompt, NULL); + + ret = scene_menu(scn, "main", OBJ_MENU, &menu); + ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100); +@@ -138,6 +138,29 @@ int bootflow_menu_new(struct expo **expp) + return 0; + } + ++int bootflow_menu_show_countdown(struct expo *exp, char *prompt, ++ char bootflow_delay) ++{ ++ char *i; ++ ++ if (prompt == NULL) ++ return 0; ++ if (strlen(prompt) < 2) ++ return 0; ++ ++ i = prompt + strlen(prompt) - 2; ++ ++ if (bootflow_delay >= 10) { ++ *(i) = 48 + (bootflow_delay / 10); ++ *(i + 1) = 48 + (bootflow_delay % 10); ++ } else { ++ *(i) = 48 + bootflow_delay; ++ *(i + 1) = ' '; ++ } ++ ++ return expo_render(exp); ++} ++ + int bootflow_menu_apply_theme(struct expo *exp, ofnode node) + { + struct menu_priv *priv = exp->priv; +@@ -184,14 +207,62 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode, + struct expo *exp; + uint sel_id; + bool done; +- int ret; ++ int i, ret; ++ ++ /* Auto-boot countdown */ ++ char bootflow_delay_secs, *prompt; ++ int bootflow_time, bootflow_delay; ++ bool skip_render_once = false; ++ bool bootflow_countdown = false; ++ ++ /* TODO: perhaps set based on defconfig? */ ++ /* WARNING: These two strings must be of the same length. */ ++ char promptChoice[] = "UP and DOWN to choose, ENTER to select"; ++ char promptTimeout[] = "UP and DOWN to choose. Auto-boot in "; ++/* ++ // Uncomment if the strings become configurable (defconfig): ++ // (to prevent buffer overflows) ++ char promptDefault[] = "UP and DOWN to choose, ENTER to select"; ++ if (promptTimeout = NULL) ++ promptTimeout = promptDefault; ++ if (promptChoice = NULL) ++ promptChoice = promptDefault; ++ if (strlen(promptChoice) < 2) ++ promptChoice = promptDefault; ++ if (strlen(promptTimeout) < 2) ++ promptTimeout = promptDefault; ++ if (strlen(promptChoice) != strlen(promptTimeout)) ++ promptChoice = promptTimeout; ++*/ ++ prompt = promptChoice; ++ ++ bootflow_delay_secs = 15; /* TODO: set based on defconfig. */ ++ ++#if defined(CONFIG_CMD_BOOTFLOW_BOOTDELAY) ++ /* If set to zero, the auto-boot timeout is disabled. */ ++ bootflow_delay_secs = CONFIG_CMD_BOOTFLOW_BOOTDELAY; ++#else ++ bootflow_delay_secs = 30; ++#endif ++ ++ if (bootflow_delay_secs < 0) ++ bootflow_delay_secs = 0; /* disable countdown if negative */ ++ bootflow_delay_secs %= 100; /* No higher than 99 seconds */ ++ ++ if (bootflow_delay_secs > 0) { ++ bootflow_countdown = true; /* enable auto-boot countdown */ ++ prompt = promptTimeout; ++ bootflow_time = 0; /* Time elapsed in milliseconds */ ++ bootflow_delay = ++ (int)bootflow_delay_secs * 1000; /* milliseconds */ ++ } + + cli_ch_init(cch); + + sel_bflow = NULL; + *bflowp = NULL; + +- ret = bootflow_menu_new(&exp); ++ ret = bootflow_menu_new(&exp, prompt); + if (ret) + return log_msg_ret("exp", ret); + +@@ -216,12 +287,20 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode, + if (text_mode) + expo_set_text_mode(exp, text_mode); + ++ if (bootflow_countdown) { ++ ret = bootflow_menu_show_countdown(exp, prompt, ++ bootflow_delay_secs); ++ skip_render_once = true; /* Don't print menu twice on start */ ++ } + done = false; + do { + struct expo_action act; + int ichar, key; + +- ret = expo_render(exp); ++ if (skip_render_once) ++ skip_render_once = false; ++ else ++ ret = expo_render(exp); + if (ret) + break; + +@@ -231,7 +310,23 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode, + schedule(); + mdelay(2); + ichar = cli_ch_process(cch, -ETIMEDOUT); ++ if (bootflow_countdown) { ++ bootflow_delay -= 2; ++ bootflow_time += 2; ++ if (bootflow_delay <= 0) ++ ichar='\n'; ++ if (bootflow_time < 1000) ++ continue; ++ bootflow_time = 0; ++ --bootflow_delay_secs; ++ ret = bootflow_menu_show_countdown(exp, ++ prompt, bootflow_delay_secs); ++ if (ret) ++ break; ++ } + } ++ if (ret) ++ break; + if (!ichar) { + ichar = getchar(); + ichar = cli_ch_process(cch, ichar); +@@ -265,6 +360,17 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode, + break; + } + } ++ if (bootflow_countdown) { ++ /* A key press interrupted the auto-boot timeout */ ++ bootflow_countdown = false; ++ if (strlen(prompt) == strlen(promptChoice)) { ++ /* "Auto-boot in" becomes "Press ENTER" */ ++ (void) memcpy(prompt, promptChoice, ++ strlen(promptChoice)); ++ ret = expo_render(exp); ++ skip_render_once = true; ++ } ++ } + } while (!done); + + if (ret) +@@ -272,7 +378,6 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode, + + if (sel_id) { + struct bootflow *bflow; +- int i; + + for (ret = bootflow_first_glob(&bflow), i = 0; !ret && i < 36; + ret = bootflow_next_glob(&bflow), i++) { +diff --git a/cmd/Kconfig b/cmd/Kconfig +index 978f44eda4..0303869625 100644 +--- a/cmd/Kconfig ++++ b/cmd/Kconfig +@@ -288,6 +288,7 @@ config CMD_BOOTDEV + config CMD_BOOTFLOW + bool "bootflow" + depends on BOOTSTD ++ select CMD_BOOTFLOW_BOOTDELAY + default y + help + Support scanning for bootflows available with the bootdevs. The +@@ -303,6 +304,17 @@ config CMD_BOOTFLOW_FULL + + This command is not necessary for bootstd to work. + ++config CMD_BOOTFLOW_BOOTDELAY ++ int "bootflow - delay in seconds before booting the first menu option" ++ depends on CMD_BOOTFLOW ++ default 30 ++ help ++ On the bootflow menu, wait for the defined number of seconds before ++ automatically booting. Unless interrupted, this will auto-boot the ++ first option in the generated list of boot options. ++ ++ Set this to zero if you wish to disable the auto-boot timeout. ++ + config CMD_BOOTMETH + bool "bootmeth" + depends on BOOTSTD +diff --git a/doc/usage/cmd/bootflow.rst b/doc/usage/cmd/bootflow.rst +index 5d41fe37a7..728f294274 100644 +--- a/doc/usage/cmd/bootflow.rst ++++ b/doc/usage/cmd/bootflow.rst +@@ -32,6 +32,17 @@ Note that `CONFIG_BOOTSTD_FULL` (which enables `CONFIG_CMD_BOOTFLOW_FULL) must + be enabled to obtain full functionality with this command. Otherwise, it only + supports `bootflow scan` which scans and boots the first available bootflow. + ++The `CONFIG_CMD_BOOTFLOW_BOOTDELAY` option can be set, defining (in seconds) the ++amount of time that U-Boot will wait; after this time passes, it will ++automatically boot the first item when generating a bootflow menu. If the value ++is set to zero, the timeout is disabled and the user must press enter; if it's ++negative, the timeout is disabled, and the maximum number of seconds is 99 ++seconds. If a value higher than 100 is provided, the value is changed to a ++modulus of 100 (remainder of the value divided by 100). ++ ++If the `CONFIG_BOOTFLOW_BOOTFLOW` option is undefined, the timeout will default ++to 30 seconds. ++ + bootflow scan + ~~~~~~~~~~~~~ + +diff --git a/include/bootflow.h b/include/bootflow.h +index 4d2fc7b69b..9f4245caa7 100644 +--- a/include/bootflow.h ++++ b/include/bootflow.h +@@ -452,7 +452,15 @@ int bootflow_iter_check_system(const struct bootflow_iter *iter); + * @expp: Returns the expo created + * Returns 0 on success, -ve on error + */ +-int bootflow_menu_new(struct expo **expp); ++int bootflow_menu_new(struct expo **expp, const char *prompt); ++ ++/** ++ * bootflow_menu_show_countdown() - Show countdown timer for auto-boot ++ * ++ * Returns the value of expo_render() ++ */ ++int bootflow_menu_show_countdown(struct expo *exp, char *prompt, ++ char bootflow_delay); + + /** + * bootflow_menu_apply_theme() - Apply a theme to a bootmenu +-- +2.39.5 + diff --git a/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch new file mode 100644 index 00000000..2f903cd7 --- /dev/null +++ b/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch @@ -0,0 +1,213 @@ +From 4ff0f509aa28eb8e85f1c0c9929c63996c646bb8 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Wed, 4 Dec 2024 18:20:19 +0000 +Subject: [PATCH 1/1] Libreboot branding/version on the bootflow menu + +Signed-off-by: Leah Rowe <info@minifree.org> +--- + boot/bootflow_menu.c | 2 +- + drivers/video/u_boot_logo.bmp | Bin 6932 -> 27350 bytes + 2 files changed, 1 insertion(+), 1 deletion(-) + +diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c +index 84831915a2..8e26ec2aef 100644 +--- a/boot/bootflow_menu.c ++++ b/boot/bootflow_menu.c +@@ -59,7 +59,7 @@ int bootflow_menu_new(struct expo **expp, const char *prompt) + ret = scene_menu(scn, "main", OBJ_MENU, &menu); + ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100); + ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE, +- "U-Boot - Boot Menu", NULL); ++ "Libreboot 20241206, 8th revision (U-Boot menu): https://libreboot.org/", NULL); + ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT); + + logo = video_get_u_boot_logo(); +diff --git a/drivers/video/u_boot_logo.bmp b/drivers/video/u_boot_logo.bmp +index 47f1e9b99789584d2f6dd71e954b51927b35d783..bc9ae001badb25bc900058c167a47247ef91dc7c 100644 +GIT binary patch +literal 27350 +zcmeI4X;4&Wy2qdHrW-_vf~Q+fvxtHMDuIZCglHm=fVhAxir~hgf>ENNF(W3?XpH+1 +zw}==uio$3#35sl^*F+S*+^So3t7fU1n$PoLKHXb0U#6y<|MQ++Xy|4+$n8^eeap7r +zKIil~zy3eV`@HYzCVj>4wvlMbK18wTU9&xO<R`XMCDHE#l?Umt2@lCAljLtD*%VHp +z6Rczowo=GcnJlK66y`gf!Y4%Gm<1$-#E>MXP)LkS)`eD*V$#TxIG3XQWs30+r8r5Z +zg_C89GDgvK|5-F+Vl2(^jiNcmI9lKvNArz|lx9q(#l}>MiIQplOqmi=acxsJNpBR8 +z<X4UUXCy_xPtyE6k`k*(TD*tCvSf-V1Ybb{P1_z#p*8PP#ICs%z9)&o_b#NcU!~F9 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+zm}UKXsD6rSlMi{`m5@3(+;i)t9u~=9mZ&7v+C%kMmYE{zO|ON>N#Vw=x*w^~EOV}? +z`s^&vog;GpNY9=BS=xNW@?%wJ?R$O_ZqWK;r}3^3fE~t5MIh3Q*N`Bj7_Te?u+{TI +zBwDi38i*~z{|rJfHW@Eo!ARu#)VrE`4NNfJ?S^2T@jf^dYm8UO5X2cTnS4{#Vnw}* +z-h-Z3*4}s5`>>EG>Ls@Kbv6tOjMv)U*V_?zUes%DIA)7_-|c<#<twn(^9szDVQq?x +wA@94_V)cG3+BniCF!%phCa^V`EuNoDjq0U&Do6FaK0m2mbu}=?pJWRCZ}IWH!~g&Q + +-- +2.39.5 + diff --git a/config/u-boot/x86/patches/0006-i-made-it-purple.patch b/config/u-boot/x86/patches/0006-i-made-it-purple.patch new file mode 100644 index 00000000..594a1b35 --- /dev/null +++ b/config/u-boot/x86/patches/0006-i-made-it-purple.patch @@ -0,0 +1,33 @@ +From 9c1ceb5a5b302275da146149001f4210a1d7fc86 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Wed, 4 Dec 2024 20:13:42 +0000 +Subject: [PATCH 1/1] i made it purple + +Signed-off-by: Leah Rowe <info@minifree.org> +--- + boot/expo.c | 7 ++----- + 1 file changed, 2 insertions(+), 5 deletions(-) + +diff --git a/boot/expo.c b/boot/expo.c +index ed01483f1d..04726d1c9a 100644 +--- a/boot/expo.c ++++ b/boot/expo.c +@@ -189,13 +189,10 @@ int expo_render(struct expo *exp) + struct udevice *dev = exp->display; + struct video_priv *vid_priv = dev_get_uclass_priv(dev); + struct scene *scn = NULL; +- enum colour_idx back; +- u32 colour; + int ret; + +- back = CONFIG_IS_ENABLED(SYS_WHITE_ON_BLACK) ? VID_BLACK : VID_WHITE; +- colour = video_index_to_colour(vid_priv, back); +- ret = video_fill(dev, colour); ++ /* sexy libreboot purple background */ ++ ret = video_fill(dev, 0x280b22); /* #280b22 in HTML RGB notation */ + if (ret) + return log_msg_ret("fill", ret); + +-- +2.39.5 + diff --git a/config/u-boot/x86/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch b/config/u-boot/x86/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch new file mode 100644 index 00000000..febc2372 --- /dev/null +++ b/config/u-boot/x86/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch @@ -0,0 +1,157 @@ +From d721edb391618fca096ec7f63a2fbc9df0af9231 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Tue, 17 Dec 2024 12:59:54 +0000 +Subject: [PATCH 1/1] change the logo back to the plain libreboot one + +Signed-off-by: Leah Rowe <info@minifree.org> +--- + drivers/video/u_boot_logo.bmp | Bin 27350 -> 27350 bytes + 1 file changed, 0 insertions(+), 0 deletions(-) + +diff --git a/drivers/video/u_boot_logo.bmp b/drivers/video/u_boot_logo.bmp +index bc9ae001badb25bc900058c167a47247ef91dc7c..c9262cd206cc3cf5297daa94b696fcf102fc22b5 100644 +GIT binary patch +literal 27350 +zcmeHQO>7&-6@I%EB~g@3*_3HXp(Kj3Xz^F1xI5%-k<?b5AGdL!IIdx*ZfpJcFSTSr +zQfdP=&;SXL0KNqA!D)S{6CWJF1yaC3d+?=zdov0YsFApE(VKxDdTP;Lia?zuxqsp= +zxt!S*2L%^c?%Ua!_r85I^XBc_8SdP%uik;mhPnWzF?FZ5bI@B!hh>0pu(|_>lkh&; +z7l(;p0^-4Gh=&s}6;45NBnRoSJY?eqC?o_ZCJ~4k3Cc6y0(tgDc&T&<UMe4kxfhSX +z%in$tjvRgkUODs{9DVtFaO~(C@WyxN;mu>m;l!IK;pAJV;PlD2;mqkD!jI3Kg|k0e +zfaS$=aN*oVxOn~&{N$a>aAkE3*6_Z$u?bgydJV2!y$08Rb{*dP`FrsG`yaqZAASTk +zZrp&IpWK97w?2j2w{OGUyLaK<y)WPkyx+fnAHMwZH}K%W19<rGAv}8Y2p&Iv3{Rds +zfu~<Tg=f#6!Sm<Ot2*fXb~Mn@fTjVyvvoAk(LhH7UTYu_@LB>5|L#00p<;R>!f`Zg +zJS!V6%ask~#``=ILc=&)#fN`|2|t5642c>*IonTjryiA!2s%Jvh(QfT3OYbE?2#5| +z*bZbQ4Phxl!^xwv{^3~-AYu_9-!-PSLNUZ(8|3+}!E~*b1r~cT&vSgRW~=jTT56sj +zt+m3e-=l_3%U10ssV-Vh-jp9u4b7A{{HeKSYBelHsabi#pkGxWn`V&bQ>vjBf}SXV +zmZ`61V`Mo)%gUSbY73O*NpA#Da_v(qST2VtS$R`j_gBSUZzRxhRR<BQ$1EKuk4l%c +z8kX~+@l>`jn@>&b>-I=m>uhs6KAn=p^avw^UPMP_ri$ZC_zk)VG{ci+DL>SDb+}(b +zbEUWAlVz0X!j2;CMj5M^uE(XPq<d-c1qLD!Di__h0aj4vLKN!b{BZ%5rIMJ9lJ_>% +z&)1b^qJ(|q0J)etzDq)kxVIHec<N5j7&*Xh1MdRqjcQI-9kgmf`5-yKs6Kwmr8pU% +zQDg&5O_rv~dvVNQ9xxxGEtWS7aw;g(F+<#V_^@Gsl2SzYcrNrpT2y^~6EO9pNXA$x +z)jesb<0Lts{!}9^B8oUjD5bR^iJ~p@{6SS+R!8i95!>p4X%(R~POd>cq+o>)k9HJZ +zS0Gjk>y<}n02+Fm1;%oQW;A)B$`O&;LFK+CEl`<~#0+`Nwbqk`L2?c5GJ&x^DHW!N +ziJn!0H4{-F_ZK*|9a}@wQ^nbAYN)@(2AQsvr!c1mYpR2>r%Fi3rxWqv9w+_@7pPe< +z(t!lGi*b7_4X%_>ek!Ucv#|x@R0AfBk~YD;4Nx?>g!1ulV|=_{Z9Zr(A;2!fVAKSU +z#pSY)XlQ{r%|6VKj_CRuIt%#@lFGAV-S%44Z$Dw5siA7)4lp#yQp)Y;`9L%tkH*I$ +z=J(CI0wuz6B;3eLXaY>XED2>9TRW+Ygj^zO3@&QzM<BAHJa2eEr^}<GP;OF-j_CoP +zM8kTty*NdO#jdoNid1c+ra;1%e|@SAu#-fbj&jieXRxrdM143w+k+e7mxR=Q-BBm; +z1&0lfgpDM*ajj_X+_p{5cwq<O$#Tpn*%2M|to2zbJnsmTF;jPA586ryMH*^28X9qF +zv^GLgh;>|4YW?;7Zp}V9mO`FU?9ue%n2729pIorBlBo6m!SlX`0ZV6sjk$_q$@-3^ +zELmjC-z=bIl-`_<@WE(oGMSml7m9))B7{n1B;r|W#Lt=jDeD_<j>RfR+T60L(dgb@ +zqOnb76>+hX2xdoAjh35JRl!b={)8HtwNgn-X;SMp&I!tJ+AV|=PQ(%9*_(8ymRldh +zoPzBh%_91)f{gCHQ_)WI`G*e{XfcvlVW;?TKF+^ybb1EAXlbci7&24EOq&C(S_J=K +zbTX036lMjn)FRSCa~baD@bw2nqshGB@KLmVGY0}=83%n_^u_`@)Oo-#U)0d(3}m}! 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+zs%m%OnE5y+x^hPi&aW?4`jy<@&;1?S_kc|_{@Gf<=9;1cJV)aZMp?9!R!|;AQaSCR +zYT8b_DIU)?*iuLN*q`p<{XD%6!#nrjo!jw_3cMqeKB65|Cf-kM0~~|q)V6L*(mb(A +z7m$v>Z}#VxFaLKY7E{j>{j=fa%YS_L^5s9TW3Bv8L{Dm*@Bio;(ZauBdxLXZ^i})< +z?=aEBUgx&*Z-_d+!UXY;JIiXz#C7<$o%$_Xi2kRAC~z(Q%FKV^NB*UXZrI2B>BjFd +h=Y>|w|C6Zk68;X)R-AjChtJK+<qqA3JjSNqzW{|XuQ>n! + +-- +2.39.5 + diff --git a/config/u-boot/x86/patches/0008-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch b/config/u-boot/x86/patches/0008-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch new file mode 100644 index 00000000..905b311c --- /dev/null +++ b/config/u-boot/x86/patches/0008-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch @@ -0,0 +1,61 @@ +From 3c61a3257ad5799202cac64020d3b4af21b72de3 Mon Sep 17 00:00:00 2001 +From: Markus Volk <f_l_k@t-online.de> +Date: Wed, 30 Oct 2024 06:07:16 +0100 +Subject: [PATCH 1/1] scripts/dtc/pylibfdt/libfdt.i_shipped: Use + SWIG_AppendOutput +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Swig has changed language specific AppendOutput functions. The helper +macro SWIG_AppendOutput remains unchanged. Use that instead +of SWIG_Python_AppendOutput, which would require an extra parameter +since swig 4.3.0. + +/home/flk/poky/build-test/tmp/work/qemux86_64-poky-linux/u-boot/2024.10/git/arch/x86/cpu/u-boot-64.lds +| scripts/dtc/pylibfdt/libfdt_wrap.c: In function ‘_wrap_fdt_next_node’: +| scripts/dtc/pylibfdt/libfdt_wrap.c:5581:17: error: too few arguments to function ‘SWIG_Python_AppendOutput’ +| 5581 | resultobj = SWIG_Python_AppendOutput(resultobj, val); +| | ^~~~~~~~~~~~~~~~~~~~~~~~ + +Signed-off-by: Markus Volk <f_l_k@t-online.de> +Reported-by: Rudi Heitbaum <rudi@heitbaum.com> +Link: https://github.com/dgibson/dtc/pull/154 +--- + scripts/dtc/pylibfdt/libfdt.i_shipped | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/scripts/dtc/pylibfdt/libfdt.i_shipped b/scripts/dtc/pylibfdt/libfdt.i_shipped +index 56cc5d48f4..e4659489a9 100644 +--- a/scripts/dtc/pylibfdt/libfdt.i_shipped ++++ b/scripts/dtc/pylibfdt/libfdt.i_shipped +@@ -1037,7 +1037,7 @@ typedef uint32_t fdt32_t; + fdt_string(fdt1, fdt32_to_cpu($1->nameoff))); + buff = PyByteArray_FromStringAndSize( + (const char *)($1 + 1), fdt32_to_cpu($1->len)); +- resultobj = SWIG_Python_AppendOutput(resultobj, buff); ++ resultobj = SWIG_AppendOutput(resultobj, buff); + } + } + +@@ -1076,7 +1076,7 @@ typedef uint32_t fdt32_t; + + %typemap(argout) int *depth { + PyObject *val = Py_BuildValue("i", *arg$argnum); +- resultobj = SWIG_Python_AppendOutput(resultobj, val); ++ resultobj = SWIG_AppendOutput(resultobj, val); + } + + %apply int *depth { int *depth }; +@@ -1092,7 +1092,7 @@ typedef uint32_t fdt32_t; + if (PyTuple_GET_SIZE(resultobj) == 0) + resultobj = val; + else +- resultobj = SWIG_Python_AppendOutput(resultobj, val); ++ resultobj = SWIG_AppendOutput(resultobj, val); + } + } + +-- +2.39.5 + diff --git a/config/u-boot/x86/target.cfg b/config/u-boot/x86/target.cfg index 2a547e87..bf19e4a5 100644 --- a/config/u-boot/x86/target.cfg +++ b/config/u-boot/x86/target.cfg @@ -1,2 +1,4 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="x86" rev="f919c3a889f0ec7d63a48b5d0ed064386b0980bd" # v2024.10 diff --git a/config/u-boot/x86_64/patches/0004-Support-auto-boot-timeout-delay-bootflow-menu.patch b/config/u-boot/x86_64/patches/0004-Support-auto-boot-timeout-delay-bootflow-menu.patch new file mode 100644 index 00000000..ffc7b581 --- /dev/null +++ b/config/u-boot/x86_64/patches/0004-Support-auto-boot-timeout-delay-bootflow-menu.patch @@ -0,0 +1,302 @@ +From d9371422ac74ea73d1620f01300a7136a7649754 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Wed, 4 Dec 2024 06:52:39 +0000 +Subject: [PATCH 1/1] Support auto-boot timeout delay bootflow menu + +The bootflow menu cannot currently auto-boot a selected entry, +which means that the user must press enter to boot their system. +This can be a problem on headless setups; for example, it is not +currently feasible to set up a headless server with U-Boot, when +using it to boot via UEFI on a coreboot setup. + +This patch adds the following build-time configuration option: + +CONFIG_CMD_BOOTFLOW_BOOTDELAY + +This creates a timeout delay in the given number of seconds. +If an arrow key is press to navigate the menu, the timer is +disabled and the user must then press enter to boot the selected +option. When this happens, the timeout display is replaced by +the old message indicating that the user should press enter. + +The default boot delay is 30 seconds, and the timeout is enabled +by default. Setting it to zero will restore the old behaviour, +whereby no timeout is provided and the user must press enter. + +If a negative integer is provided, the timer will default to +zero. The timer value is further filtered by modulus of 100, +so that the maximum number of seconds allowed is 99 seconds. + +Signed-off-by: Leah Rowe <info@minifree.org> +--- + boot/bootflow_menu.c | 117 +++++++++++++++++++++++++++++++++++-- + cmd/Kconfig | 12 ++++ + doc/usage/cmd/bootflow.rst | 11 ++++ + include/bootflow.h | 10 +++- + 4 files changed, 143 insertions(+), 7 deletions(-) + +diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c +index 9d0dc352f9..172139b187 100644 +--- a/boot/bootflow_menu.c ++++ b/boot/bootflow_menu.c +@@ -30,7 +30,7 @@ struct menu_priv { + int num_bootflows; + }; + +-int bootflow_menu_new(struct expo **expp) ++int bootflow_menu_new(struct expo **expp, const char *prompt) + { + struct udevice *last_bootdev; + struct scene_obj_menu *menu; +@@ -54,7 +54,7 @@ int bootflow_menu_new(struct expo **expp) + return log_msg_ret("scn", ret); + + ret |= scene_txt_str(scn, "prompt", OBJ_PROMPT, STR_PROMPT, +- "UP and DOWN to choose, ENTER to select", NULL); ++ prompt, NULL); + + ret = scene_menu(scn, "main", OBJ_MENU, &menu); + ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100); +@@ -138,6 +138,29 @@ int bootflow_menu_new(struct expo **expp) + return 0; + } + ++int bootflow_menu_show_countdown(struct expo *exp, char *prompt, ++ char bootflow_delay) ++{ ++ char *i; ++ ++ if (prompt == NULL) ++ return 0; ++ if (strlen(prompt) < 2) ++ return 0; ++ ++ i = prompt + strlen(prompt) - 2; ++ ++ if (bootflow_delay >= 10) { ++ *(i) = 48 + (bootflow_delay / 10); ++ *(i + 1) = 48 + (bootflow_delay % 10); ++ } else { ++ *(i) = 48 + bootflow_delay; ++ *(i + 1) = ' '; ++ } ++ ++ return expo_render(exp); ++} ++ + int bootflow_menu_apply_theme(struct expo *exp, ofnode node) + { + struct menu_priv *priv = exp->priv; +@@ -184,14 +207,62 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode, + struct expo *exp; + uint sel_id; + bool done; +- int ret; ++ int i, ret; ++ ++ /* Auto-boot countdown */ ++ char bootflow_delay_secs, *prompt; ++ int bootflow_time, bootflow_delay; ++ bool skip_render_once = false; ++ bool bootflow_countdown = false; ++ ++ /* TODO: perhaps set based on defconfig? */ ++ /* WARNING: These two strings must be of the same length. */ ++ char promptChoice[] = "UP and DOWN to choose, ENTER to select"; ++ char promptTimeout[] = "UP and DOWN to choose. Auto-boot in "; ++/* ++ // Uncomment if the strings become configurable (defconfig): ++ // (to prevent buffer overflows) ++ char promptDefault[] = "UP and DOWN to choose, ENTER to select"; ++ if (promptTimeout = NULL) ++ promptTimeout = promptDefault; ++ if (promptChoice = NULL) ++ promptChoice = promptDefault; ++ if (strlen(promptChoice) < 2) ++ promptChoice = promptDefault; ++ if (strlen(promptTimeout) < 2) ++ promptTimeout = promptDefault; ++ if (strlen(promptChoice) != strlen(promptTimeout)) ++ promptChoice = promptTimeout; ++*/ ++ prompt = promptChoice; ++ ++ bootflow_delay_secs = 15; /* TODO: set based on defconfig. */ ++ ++#if defined(CONFIG_CMD_BOOTFLOW_BOOTDELAY) ++ /* If set to zero, the auto-boot timeout is disabled. */ ++ bootflow_delay_secs = CONFIG_CMD_BOOTFLOW_BOOTDELAY; ++#else ++ bootflow_delay_secs = 30; ++#endif ++ ++ if (bootflow_delay_secs < 0) ++ bootflow_delay_secs = 0; /* disable countdown if negative */ ++ bootflow_delay_secs %= 100; /* No higher than 99 seconds */ ++ ++ if (bootflow_delay_secs > 0) { ++ bootflow_countdown = true; /* enable auto-boot countdown */ ++ prompt = promptTimeout; ++ bootflow_time = 0; /* Time elapsed in milliseconds */ ++ bootflow_delay = ++ (int)bootflow_delay_secs * 1000; /* milliseconds */ ++ } + + cli_ch_init(cch); + + sel_bflow = NULL; + *bflowp = NULL; + +- ret = bootflow_menu_new(&exp); ++ ret = bootflow_menu_new(&exp, prompt); + if (ret) + return log_msg_ret("exp", ret); + +@@ -216,12 +287,20 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode, + if (text_mode) + expo_set_text_mode(exp, text_mode); + ++ if (bootflow_countdown) { ++ ret = bootflow_menu_show_countdown(exp, prompt, ++ bootflow_delay_secs); ++ skip_render_once = true; /* Don't print menu twice on start */ ++ } + done = false; + do { + struct expo_action act; + int ichar, key; + +- ret = expo_render(exp); ++ if (skip_render_once) ++ skip_render_once = false; ++ else ++ ret = expo_render(exp); + if (ret) + break; + +@@ -231,7 +310,23 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode, + schedule(); + mdelay(2); + ichar = cli_ch_process(cch, -ETIMEDOUT); ++ if (bootflow_countdown) { ++ bootflow_delay -= 2; ++ bootflow_time += 2; ++ if (bootflow_delay <= 0) ++ ichar='\n'; ++ if (bootflow_time < 1000) ++ continue; ++ bootflow_time = 0; ++ --bootflow_delay_secs; ++ ret = bootflow_menu_show_countdown(exp, ++ prompt, bootflow_delay_secs); ++ if (ret) ++ break; ++ } + } ++ if (ret) ++ break; + if (!ichar) { + ichar = getchar(); + ichar = cli_ch_process(cch, ichar); +@@ -265,6 +360,17 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode, + break; + } + } ++ if (bootflow_countdown) { ++ /* A key press interrupted the auto-boot timeout */ ++ bootflow_countdown = false; ++ if (strlen(prompt) == strlen(promptChoice)) { ++ /* "Auto-boot in" becomes "Press ENTER" */ ++ (void) memcpy(prompt, promptChoice, ++ strlen(promptChoice)); ++ ret = expo_render(exp); ++ skip_render_once = true; ++ } ++ } + } while (!done); + + if (ret) +@@ -272,7 +378,6 @@ int bootflow_menu_run(struct bootstd_priv *std, bool text_mode, + + if (sel_id) { + struct bootflow *bflow; +- int i; + + for (ret = bootflow_first_glob(&bflow), i = 0; !ret && i < 36; + ret = bootflow_next_glob(&bflow), i++) { +diff --git a/cmd/Kconfig b/cmd/Kconfig +index 978f44eda4..0303869625 100644 +--- a/cmd/Kconfig ++++ b/cmd/Kconfig +@@ -288,6 +288,7 @@ config CMD_BOOTDEV + config CMD_BOOTFLOW + bool "bootflow" + depends on BOOTSTD ++ select CMD_BOOTFLOW_BOOTDELAY + default y + help + Support scanning for bootflows available with the bootdevs. The +@@ -303,6 +304,17 @@ config CMD_BOOTFLOW_FULL + + This command is not necessary for bootstd to work. + ++config CMD_BOOTFLOW_BOOTDELAY ++ int "bootflow - delay in seconds before booting the first menu option" ++ depends on CMD_BOOTFLOW ++ default 30 ++ help ++ On the bootflow menu, wait for the defined number of seconds before ++ automatically booting. Unless interrupted, this will auto-boot the ++ first option in the generated list of boot options. ++ ++ Set this to zero if you wish to disable the auto-boot timeout. ++ + config CMD_BOOTMETH + bool "bootmeth" + depends on BOOTSTD +diff --git a/doc/usage/cmd/bootflow.rst b/doc/usage/cmd/bootflow.rst +index 5d41fe37a7..728f294274 100644 +--- a/doc/usage/cmd/bootflow.rst ++++ b/doc/usage/cmd/bootflow.rst +@@ -32,6 +32,17 @@ Note that `CONFIG_BOOTSTD_FULL` (which enables `CONFIG_CMD_BOOTFLOW_FULL) must + be enabled to obtain full functionality with this command. Otherwise, it only + supports `bootflow scan` which scans and boots the first available bootflow. + ++The `CONFIG_CMD_BOOTFLOW_BOOTDELAY` option can be set, defining (in seconds) the ++amount of time that U-Boot will wait; after this time passes, it will ++automatically boot the first item when generating a bootflow menu. If the value ++is set to zero, the timeout is disabled and the user must press enter; if it's ++negative, the timeout is disabled, and the maximum number of seconds is 99 ++seconds. If a value higher than 100 is provided, the value is changed to a ++modulus of 100 (remainder of the value divided by 100). ++ ++If the `CONFIG_BOOTFLOW_BOOTFLOW` option is undefined, the timeout will default ++to 30 seconds. ++ + bootflow scan + ~~~~~~~~~~~~~ + +diff --git a/include/bootflow.h b/include/bootflow.h +index 4d2fc7b69b..9f4245caa7 100644 +--- a/include/bootflow.h ++++ b/include/bootflow.h +@@ -452,7 +452,15 @@ int bootflow_iter_check_system(const struct bootflow_iter *iter); + * @expp: Returns the expo created + * Returns 0 on success, -ve on error + */ +-int bootflow_menu_new(struct expo **expp); ++int bootflow_menu_new(struct expo **expp, const char *prompt); ++ ++/** ++ * bootflow_menu_show_countdown() - Show countdown timer for auto-boot ++ * ++ * Returns the value of expo_render() ++ */ ++int bootflow_menu_show_countdown(struct expo *exp, char *prompt, ++ char bootflow_delay); + + /** + * bootflow_menu_apply_theme() - Apply a theme to a bootmenu +-- +2.39.5 + diff --git a/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch new file mode 100644 index 00000000..2f903cd7 --- /dev/null +++ b/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch @@ -0,0 +1,213 @@ +From 4ff0f509aa28eb8e85f1c0c9929c63996c646bb8 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Wed, 4 Dec 2024 18:20:19 +0000 +Subject: [PATCH 1/1] Libreboot branding/version on the bootflow menu + +Signed-off-by: Leah Rowe <info@minifree.org> +--- + boot/bootflow_menu.c | 2 +- + drivers/video/u_boot_logo.bmp | Bin 6932 -> 27350 bytes + 2 files changed, 1 insertion(+), 1 deletion(-) + +diff --git a/boot/bootflow_menu.c b/boot/bootflow_menu.c +index 84831915a2..8e26ec2aef 100644 +--- a/boot/bootflow_menu.c ++++ b/boot/bootflow_menu.c +@@ -59,7 +59,7 @@ int bootflow_menu_new(struct expo **expp, const char *prompt) + ret = scene_menu(scn, "main", OBJ_MENU, &menu); + ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100); + ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE, +- "U-Boot - Boot Menu", NULL); ++ "Libreboot 20241206, 8th revision (U-Boot menu): https://libreboot.org/", NULL); + ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT); + + logo = video_get_u_boot_logo(); +diff --git a/drivers/video/u_boot_logo.bmp b/drivers/video/u_boot_logo.bmp +index 47f1e9b99789584d2f6dd71e954b51927b35d783..bc9ae001badb25bc900058c167a47247ef91dc7c 100644 +GIT binary patch +literal 27350 +zcmeI4X;4&Wy2qdHrW-_vf~Q+fvxtHMDuIZCglHm=fVhAxir~hgf>ENNF(W3?XpH+1 +zw}==uio$3#35sl^*F+S*+^So3t7fU1n$PoLKHXb0U#6y<|MQ++Xy|4+$n8^eeap7r +zKIil~zy3eV`@HYzCVj>4wvlMbK18wTU9&xO<R`XMCDHE#l?Umt2@lCAljLtD*%VHp +z6Rczowo=GcnJlK66y`gf!Y4%Gm<1$-#E>MXP)LkS)`eD*V$#TxIG3XQWs30+r8r5Z +zg_C89GDgvK|5-F+Vl2(^jiNcmI9lKvNArz|lx9q(#l}>MiIQplOqmi=acxsJNpBR8 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deletions(-) + +diff --git a/boot/expo.c b/boot/expo.c +index ed01483f1d..04726d1c9a 100644 +--- a/boot/expo.c ++++ b/boot/expo.c +@@ -189,13 +189,10 @@ int expo_render(struct expo *exp) + struct udevice *dev = exp->display; + struct video_priv *vid_priv = dev_get_uclass_priv(dev); + struct scene *scn = NULL; +- enum colour_idx back; +- u32 colour; + int ret; + +- back = CONFIG_IS_ENABLED(SYS_WHITE_ON_BLACK) ? VID_BLACK : VID_WHITE; +- colour = video_index_to_colour(vid_priv, back); +- ret = video_fill(dev, colour); ++ /* sexy libreboot purple background */ ++ ret = video_fill(dev, 0x280b22); /* #280b22 in HTML RGB notation */ + if (ret) + return log_msg_ret("fill", ret); + +-- +2.39.5 + diff --git a/config/u-boot/x86_64/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch b/config/u-boot/x86_64/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch new file mode 100644 index 00000000..febc2372 --- /dev/null +++ b/config/u-boot/x86_64/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch @@ -0,0 +1,157 @@ +From d721edb391618fca096ec7f63a2fbc9df0af9231 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Tue, 17 Dec 2024 12:59:54 +0000 +Subject: [PATCH 1/1] change the logo back to the plain libreboot one + +Signed-off-by: Leah Rowe <info@minifree.org> +--- + drivers/video/u_boot_logo.bmp | Bin 27350 -> 27350 bytes + 1 file changed, 0 insertions(+), 0 deletions(-) + +diff --git a/drivers/video/u_boot_logo.bmp b/drivers/video/u_boot_logo.bmp +index bc9ae001badb25bc900058c167a47247ef91dc7c..c9262cd206cc3cf5297daa94b696fcf102fc22b5 100644 +GIT binary patch +literal 27350 +zcmeHQO>7&-6@I%EB~g@3*_3HXp(Kj3Xz^F1xI5%-k<?b5AGdL!IIdx*ZfpJcFSTSr +zQfdP=&;SXL0KNqA!D)S{6CWJF1yaC3d+?=zdov0YsFApE(VKxDdTP;Lia?zuxqsp= +zxt!S*2L%^c?%Ua!_r85I^XBc_8SdP%uik;mhPnWzF?FZ5bI@B!hh>0pu(|_>lkh&; +z7l(;p0^-4Gh=&s}6;45NBnRoSJY?eqC?o_ZCJ~4k3Cc6y0(tgDc&T&<UMe4kxfhSX +z%in$tjvRgkUODs{9DVtFaO~(C@WyxN;mu>m;l!IK;pAJV;PlD2;mqkD!jI3Kg|k0e +zfaS$=aN*oVxOn~&{N$a>aAkE3*6_Z$u?bgydJV2!y$08Rb{*dP`FrsG`yaqZAASTk +zZrp&IpWK97w?2j2w{OGUyLaK<y)WPkyx+fnAHMwZH}K%W19<rGAv}8Y2p&Iv3{Rds +zfu~<Tg=f#6!Sm<Ot2*fXb~Mn@fTjVyvvoAk(LhH7UTYu_@LB>5|L#00p<;R>!f`Zg +zJS!V6%ask~#``=ILc=&)#fN`|2|t5642c>*IonTjryiA!2s%Jvh(QfT3OYbE?2#5| +z*bZbQ4Phxl!^xwv{^3~-AYu_9-!-PSLNUZ(8|3+}!E~*b1r~cT&vSgRW~=jTT56sj +zt+m3e-=l_3%U10ssV-Vh-jp9u4b7A{{HeKSYBelHsabi#pkGxWn`V&bQ>vjBf}SXV +zmZ`61V`Mo)%gUSbY73O*NpA#Da_v(qST2VtS$R`j_gBSUZzRxhRR<BQ$1EKuk4l%c +z8kX~+@l>`jn@>&b>-I=m>uhs6KAn=p^avw^UPMP_ri$ZC_zk)VG{ci+DL>SDb+}(b +zbEUWAlVz0X!j2;CMj5M^uE(XPq<d-c1qLD!Di__h0aj4vLKN!b{BZ%5rIMJ9lJ_>% +z&)1b^qJ(|q0J)etzDq)kxVIHec<N5j7&*Xh1MdRqjcQI-9kgmf`5-yKs6Kwmr8pU% +zQDg&5O_rv~dvVNQ9xxxGEtWS7aw;g(F+<#V_^@Gsl2SzYcrNrpT2y^~6EO9pNXA$x +z)jesb<0Lts{!}9^B8oUjD5bR^iJ~p@{6SS+R!8i95!>p4X%(R~POd>cq+o>)k9HJZ +zS0Gjk>y<}n02+Fm1;%oQW;A)B$`O&;LFK+CEl`<~#0+`Nwbqk`L2?c5GJ&x^DHW!N +ziJn!0H4{-F_ZK*|9a}@wQ^nbAYN)@(2AQsvr!c1mYpR2>r%Fi3rxWqv9w+_@7pPe< +z(t!lGi*b7_4X%_>ek!Ucv#|x@R0AfBk~YD;4Nx?>g!1ulV|=_{Z9Zr(A;2!fVAKSU +z#pSY)XlQ{r%|6VKj_CRuIt%#@lFGAV-S%44Z$Dw5siA7)4lp#yQp)Y;`9L%tkH*I$ +z=J(CI0wuz6B;3eLXaY>XED2>9TRW+Ygj^zO3@&QzM<BAHJa2eEr^}<GP;OF-j_CoP +zM8kTty*NdO#jdoNid1c+ra;1%e|@SAu#-fbj&jieXRxrdM143w+k+e7mxR=Q-BBm; +z1&0lfgpDM*ajj_X+_p{5cwq<O$#Tpn*%2M|to2zbJnsmTF;jPA586ryMH*^28X9qF +zv^GLgh;>|4YW?;7Zp}V9mO`FU?9ue%n2729pIorBlBo6m!SlX`0ZV6sjk$_q$@-3^ +zELmjC-z=bIl-`_<@WE(oGMSml7m9))B7{n1B;r|W#Lt=jDeD_<j>RfR+T60L(dgb@ +zqOnb76>+hX2xdoAjh35JRl!b={)8HtwNgn-X;SMp&I!tJ+AV|=PQ(%9*_(8ymRldh +zoPzBh%_91)f{gCHQ_)WI`G*e{XfcvlVW;?TKF+^ybb1EAXlbci7&24EOq&C(S_J=K +zbTX036lMjn)FRSCa~baD@bw2nqshGB@KLmVGY0}=83%n_^u_`@)Oo-#U)0d(3}m}! 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+zs%m%OnE5y+x^hPi&aW?4`jy<@&;1?S_kc|_{@Gf<=9;1cJV)aZMp?9!R!|;AQaSCR +zYT8b_DIU)?*iuLN*q`p<{XD%6!#nrjo!jw_3cMqeKB65|Cf-kM0~~|q)V6L*(mb(A +z7m$v>Z}#VxFaLKY7E{j>{j=fa%YS_L^5s9TW3Bv8L{Dm*@Bio;(ZauBdxLXZ^i})< +z?=aEBUgx&*Z-_d+!UXY;JIiXz#C7<$o%$_Xi2kRAC~z(Q%FKV^NB*UXZrI2B>BjFd +h=Y>|w|C6Zk68;X)R-AjChtJK+<qqA3JjSNqzW{|XuQ>n! + +-- +2.39.5 + diff --git a/config/u-boot/x86_64/patches/0008-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch b/config/u-boot/x86_64/patches/0008-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch new file mode 100644 index 00000000..905b311c --- /dev/null +++ b/config/u-boot/x86_64/patches/0008-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch @@ -0,0 +1,61 @@ +From 3c61a3257ad5799202cac64020d3b4af21b72de3 Mon Sep 17 00:00:00 2001 +From: Markus Volk <f_l_k@t-online.de> +Date: Wed, 30 Oct 2024 06:07:16 +0100 +Subject: [PATCH 1/1] scripts/dtc/pylibfdt/libfdt.i_shipped: Use + SWIG_AppendOutput +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Swig has changed language specific AppendOutput functions. The helper +macro SWIG_AppendOutput remains unchanged. Use that instead +of SWIG_Python_AppendOutput, which would require an extra parameter +since swig 4.3.0. + +/home/flk/poky/build-test/tmp/work/qemux86_64-poky-linux/u-boot/2024.10/git/arch/x86/cpu/u-boot-64.lds +| scripts/dtc/pylibfdt/libfdt_wrap.c: In function ‘_wrap_fdt_next_node’: +| scripts/dtc/pylibfdt/libfdt_wrap.c:5581:17: error: too few arguments to function ‘SWIG_Python_AppendOutput’ +| 5581 | resultobj = SWIG_Python_AppendOutput(resultobj, val); +| | ^~~~~~~~~~~~~~~~~~~~~~~~ + +Signed-off-by: Markus Volk <f_l_k@t-online.de> +Reported-by: Rudi Heitbaum <rudi@heitbaum.com> +Link: https://github.com/dgibson/dtc/pull/154 +--- + scripts/dtc/pylibfdt/libfdt.i_shipped | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/scripts/dtc/pylibfdt/libfdt.i_shipped b/scripts/dtc/pylibfdt/libfdt.i_shipped +index 56cc5d48f4..e4659489a9 100644 +--- a/scripts/dtc/pylibfdt/libfdt.i_shipped ++++ b/scripts/dtc/pylibfdt/libfdt.i_shipped +@@ -1037,7 +1037,7 @@ typedef uint32_t fdt32_t; + fdt_string(fdt1, fdt32_to_cpu($1->nameoff))); + buff = PyByteArray_FromStringAndSize( + (const char *)($1 + 1), fdt32_to_cpu($1->len)); +- resultobj = SWIG_Python_AppendOutput(resultobj, buff); ++ resultobj = SWIG_AppendOutput(resultobj, buff); + } + } + +@@ -1076,7 +1076,7 @@ typedef uint32_t fdt32_t; + + %typemap(argout) int *depth { + PyObject *val = Py_BuildValue("i", *arg$argnum); +- resultobj = SWIG_Python_AppendOutput(resultobj, val); ++ resultobj = SWIG_AppendOutput(resultobj, val); + } + + %apply int *depth { int *depth }; +@@ -1092,7 +1092,7 @@ typedef uint32_t fdt32_t; + if (PyTuple_GET_SIZE(resultobj) == 0) + resultobj = val; + else +- resultobj = SWIG_Python_AppendOutput(resultobj, val); ++ resultobj = SWIG_AppendOutput(resultobj, val); + } + } + +-- +2.39.5 + diff --git a/config/u-boot/x86_64/target.cfg b/config/u-boot/x86_64/target.cfg index 45e85c2e..a1e15d12 100644 --- a/config/u-boot/x86_64/target.cfg +++ b/config/u-boot/x86_64/target.cfg @@ -1,2 +1,4 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + tree="x86_64" rev="f919c3a889f0ec7d63a48b5d0ed064386b0980bd" # v2024.10 diff --git a/config/uefitool/target.cfg b/config/uefitool/target.cfg index 909568a7..ce1ff3af 100644 --- a/config/uefitool/target.cfg +++ b/config/uefitool/target.cfg @@ -1,2 +1,4 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + cmakedir="UEFIExtract" btype="cmake" diff --git a/config/vendor/3050micro/pkg.cfg b/config/vendor/3050micro/pkg.cfg index f1f7860b..497a27a6 100644 --- a/config/vendor/3050micro/pkg.cfg +++ b/config/vendor/3050micro/pkg.cfg @@ -1,4 +1,19 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + DL_hash="976bbb1e625f64df276d8343757d910c88b8a781f953bc2c41a7dd15184ec70d55f8081de2a0aaa83cddb8e73bdc2df6288fde6e0897e4928c48ca4bb30bea2d" DL_url="https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip" DL_url_bkup="https://web.archive.org/web/20230822134231/https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip" -ME_bootguard="me11disreguard" + +# for Fsp.fd, we don't rely on a download. Instead, +# we copy from coreboot.git. The file is defined +# by CONFIG_FSP_FD_PATH, split to CONFIG_FSP_M_FILE and CONFIG_FSP_S_FILE +# and inserted to CBFS with names CONFIG_FSP_S_CBFS and CONFIG_FSP_M_CBFS +# +FSPFD_hash="c500166a8553a80ba8db8b8185a896e0ae1562ea3c139e07acd9e7937baf8110ba743cc79b69db09a5f39c076d1d22bc45045223975f46aea2034ba82a6b0360" + +# We will use deguard to disable the Intel Boot Guard: +ME11bootguard="y" +ME11delta="optiplex_3050" # subdirectory under deguard's data/delta/ +ME11version="11.6.0.1126" +ME11sku="2M" +ME11pch="H" diff --git a/config/vendor/e6400/pkg.cfg b/config/vendor/e6400/pkg.cfg index 5274f51b..c5962480 100644 --- a/config/vendor/e6400/pkg.cfg +++ b/config/vendor/e6400/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + E6400_VGA_DL_hash="6217d5fce2291d15bb0649fd2faaeb78e4c48962b07a2bea6af60466bfdc5f233af0d077c2c6e71dd96047bdbb1f612324cef0a5e728ba9a9ec5c69a4022cd8d" E6400_VGA_DL_url="https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe" E6400_VGA_DL_url_bkup="https://web.archive.org/web/20230506014903/https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe" diff --git a/config/vendor/haswell/pkg.cfg b/config/vendor/haswell/pkg.cfg index d43fab3c..e9722a11 100644 --- a/config/vendor/haswell/pkg.cfg +++ b/config/vendor/haswell/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + DL_hash="f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998" DL_url="https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe" DL_url_bkup="https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe" diff --git a/config/vendor/hp2170p/pkg.cfg b/config/vendor/hp2170p/pkg.cfg index 71c4d637..77cbd08b 100644 --- a/config/vendor/hp2170p/pkg.cfg +++ b/config/vendor/hp2170p/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c" DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" diff --git a/config/vendor/hp2560p/pkg.cfg b/config/vendor/hp2560p/pkg.cfg index 21d00424..f7c7cd14 100644 --- a/config/vendor/hp2560p/pkg.cfg +++ b/config/vendor/hp2560p/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3" DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe" DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe" diff --git a/config/vendor/hp2570p/pkg.cfg b/config/vendor/hp2570p/pkg.cfg index de7f768e..9f1a85aa 100644 --- a/config/vendor/hp2570p/pkg.cfg +++ b/config/vendor/hp2570p/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c" DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" diff --git a/config/vendor/hp8200sff/pkg.cfg b/config/vendor/hp8200sff/pkg.cfg index 079bd0be..9d0a34de 100644 --- a/config/vendor/hp8200sff/pkg.cfg +++ b/config/vendor/hp8200sff/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + DL_hash="8fcb691bf84dc1feefc3c84f7cc59eadaabb200477bb3ecba1b050f23f133b0a8c2539015a523f676544c2dff64599bcba7e844e8c31757b90d70bb4485b5664" DL_url="https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe" DL_url_bkup="https://web.archive.org/web/20220708171920/https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe" diff --git a/config/vendor/hp820g2/pkg.cfg b/config/vendor/hp820g2/pkg.cfg index 3a95b5ea..89303ad3 100644 --- a/config/vendor/hp820g2/pkg.cfg +++ b/config/vendor/hp820g2/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + DL_hash="1ac05a3e4f46426eeb77f89c4aca25ed1ad64479d8fcba6a3ab63a944512bacbc5d148cc7b9c4ff4b8c90a1fb1de4776e46f14aca8021900e0df37246aa0b717" DL_url="https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe" DL_url_bkup="https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe" diff --git a/config/vendor/hp8460pintel/pkg.cfg b/config/vendor/hp8460pintel/pkg.cfg index d818a00b..1e1da34e 100644 --- a/config/vendor/hp8460pintel/pkg.cfg +++ b/config/vendor/hp8460pintel/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3" DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe" DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe" diff --git a/config/vendor/hp8470pintel/pkg.cfg b/config/vendor/hp8470pintel/pkg.cfg index 3dce5557..1170f56b 100644 --- a/config/vendor/hp8470pintel/pkg.cfg +++ b/config/vendor/hp8470pintel/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c" DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" diff --git a/config/vendor/hp8560w/pkg.cfg b/config/vendor/hp8560w/pkg.cfg index b9dc94c5..629d96d1 100644 --- a/config/vendor/hp8560w/pkg.cfg +++ b/config/vendor/hp8560w/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3" DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe" DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe" diff --git a/config/vendor/hp9470m/pkg.cfg b/config/vendor/hp9470m/pkg.cfg index 756e64bf..9cdb8143 100644 --- a/config/vendor/hp9470m/pkg.cfg +++ b/config/vendor/hp9470m/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c" DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" diff --git a/config/vendor/ivybridge/pkg.cfg b/config/vendor/ivybridge/pkg.cfg index 92b1eb43..d9b2200b 100644 --- a/config/vendor/ivybridge/pkg.cfg +++ b/config/vendor/ivybridge/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c" DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" diff --git a/config/vendor/sandybridge/pkg.cfg b/config/vendor/sandybridge/pkg.cfg index 34add8d3..bb022043 100644 --- a/config/vendor/sandybridge/pkg.cfg +++ b/config/vendor/sandybridge/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3" DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe" DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe" diff --git a/config/vendor/t1650/pkg.cfg b/config/vendor/t1650/pkg.cfg index e4a49126..f994b942 100644 --- a/config/vendor/t1650/pkg.cfg +++ b/config/vendor/t1650/pkg.cfg @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c" DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" diff --git a/config/vendor/t480/pkg.cfg b/config/vendor/t480/pkg.cfg new file mode 100644 index 00000000..3071f83d --- /dev/null +++ b/config/vendor/t480/pkg.cfg @@ -0,0 +1,29 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +# ME firmware (deguard will be used) +DL_hash="df735a24242792bf4150f30bf0bd4fdbdc0fb6bf0f897ea533df32567be8e084006d692fb6351677f8cc976878c5018667901dbd407b0a77805754f7c101497c" +DL_url="https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe" +DL_url_bkup="https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe" + +# for Fsp.fd, we don't rely on a download. Instead, +# we copy from coreboot.git. The file is defined +# by CONFIG_FSP_FD_PATH, split to CONFIG_FSP_M_FILE and CONFIG_FSP_S_FILE +# and inserted to CBFS with names CONFIG_FSP_S_CBFS and CONFIG_FSP_M_CBFS +# +FSPFD_hash="c500166a8553a80ba8db8b8185a896e0ae1562ea3c139e07acd9e7937baf8110ba743cc79b69db09a5f39c076d1d22bc45045223975f46aea2034ba82a6b0360" + +# We will use deguard to disable the Intel Boot Guard: +ME11bootguard="y" +ME11delta="thinkpad_t480" # subdirectory under deguard's data/delta/ +ME11version="11.6.0.1126" +ME11sku="2M" +ME11pch="LP" + +# ThunderBolt firmware +# (flashed on the 1MB chip, not main 16MB; not used by coreboot) +# (padded firmware will appear at vendorfiles/t480/tb.bin) +# +TBFW_url="https://download.lenovo.com/pccbbs/mobiles/n24th13w.exe" +TBFW_url_bkup="https://web.archive.org/web/20241004165955/https://download.lenovo.com/pccbbs/mobiles/n24th13w.exe" +TBFW_hash="906d916e8ae77e6d146c67c3113cd904e735a7f28cb2fc37e2284758ead5cda8dd4025c1c741fac9162b1eb01cff08fc39a0d4e79c5cec0515f1d3e6447d1323" +TBFW_size=1048576 # size in bytes, when padding, matching TBFW's flash IC diff --git a/config/vendor/t480s/pkg.cfg b/config/vendor/t480s/pkg.cfg new file mode 100644 index 00000000..a9e3e48b --- /dev/null +++ b/config/vendor/t480s/pkg.cfg @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +DL_hash="df735a24242792bf4150f30bf0bd4fdbdc0fb6bf0f897ea533df32567be8e084006d692fb6351677f8cc976878c5018667901dbd407b0a77805754f7c101497c" +DL_url="https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe" +DL_url_bkup="https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe" + +# for Fsp.fd, we don't rely on a download. Instead, +# we copy from coreboot.git. The file is defined +# by CONFIG_FSP_FD_PATH, split to CONFIG_FSP_M_FILE and CONFIG_FSP_S_FILE +# and inserted to CBFS with names CONFIG_FSP_S_CBFS and CONFIG_FSP_M_CBFS +# +FSPFD_hash="c500166a8553a80ba8db8b8185a896e0ae1562ea3c139e07acd9e7937baf8110ba743cc79b69db09a5f39c076d1d22bc45045223975f46aea2034ba82a6b0360" + +# We will use deguard to disable the Intel Boot Guard: +ME11bootguard="y" +ME11delta="thinkpad_t480s" # subdirectory under deguard's data/delta/ +ME11version="11.6.0.1126" +ME11sku="2M" +ME11pch="LP" + +# ThunderBolt firmware +# (flashed on the 1MB chip, not main 16MB; not used by coreboot) +# (padded firmware will appear at vendorfiles/t480s/tb.bin) +# +TBFW_url="https://download.lenovo.com/pccbbs/mobiles/n22th11w.exe" +TBFW_url_bkup="https://web.archive.org/web/20230319003752/https://download.lenovo.com/pccbbs/mobiles/n22th11w.exe" +TBFW_hash="ef8ec0a41d7faaa0ce514cfb6f8e7e10669c878eff69fbe1b821443b6218f5b31e1b910c8abceecf38d4b11a6e552d90f277c96c7a9c512d605c8b8aea9c1c0c" +TBFW_size=1048576 # size in bytes, when padding, matching TBFW's flash IC |