summaryrefslogtreecommitdiff
path: root/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
diff options
context:
space:
mode:
Diffstat (limited to 'config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb')
-rw-r--r--config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb8
1 files changed, 4 insertions, 4 deletions
diff --git a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
index 96fe0b73..8801b7cd 100644
--- a/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440pmrc_12mb/config/libgfxinit_corebootfb
@@ -145,9 +145,9 @@ CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DRIVERS_INTEL_WIFI=y
-CONFIG_IFD_BIN_PATH="../../config/ifd/t440p/ifd"
-CONFIG_ME_BIN_PATH="../../blobs/t440p/me.bin"
-CONFIG_GBE_BIN_PATH="../../config/ifd/t440p/gbe"
+CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd"
+CONFIG_ME_BIN_PATH="../../../blobs/t440p/me.bin"
+CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_ENABLE_DDR_2X_REFRESH is not set
CONFIG_PCIEXP_AER=y
@@ -261,7 +261,7 @@ CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_HAVE_MRC=y
-CONFIG_MRC_FILE="../../mrc/haswell/mrc.bin"
+CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000