diff options
Diffstat (limited to 'config/coreboot/default')
44 files changed, 108 insertions, 276 deletions
diff --git a/config/coreboot/default/nuke.list b/config/coreboot/default/nuke.list new file mode 100644 index 00000000..7e5ba3b5 --- /dev/null +++ b/config/coreboot/default/nuke.list @@ -0,0 +1,19 @@ +3rdparty/fsp/EagleStreamFspBinPkg +3rdparty/fsp/AlderLakeFspBinPkg +3rdparty/fsp/MeteorLakeFspBinPkg +3rdparty/fsp/IceLakeFspBinPkg +3rdparty/fsp/AmberLakeFspBinPkg +3rdparty/fsp/DenvertonNSFspBinPkg +3rdparty/fsp/TigerLakeFspBinPkg +3rdparty/fsp/CedarIslandFspBinPkg +3rdparty/fsp/ElkhartLakeFspBinPkg +3rdparty/fsp/CometLakeFspBinPkg +3rdparty/fsp/WhitleyFspBinPkg +3rdparty/fsp/ArrowLakeFspBinPkg +3rdparty/fsp/IdavilleFspBinPkg +3rdparty/fsp/BraswellFspBinPkg +3rdparty/fsp/CoffeeLakeFspBinPkg +3rdparty/fsp/RaptorLakeFspBinPkg +3rdparty/fsp/ApolloLakeFspBinPkg +3rdparty/fsp/SkylakeFspBinPkg +3rdparty/vboot/tests diff --git a/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch b/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch index 31c1bb30..d5a356e4 100644 --- a/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch +++ b/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch @@ -1,7 +1,7 @@ -From bd959c38f6ee21db1ff8f4fbb0675e38bfbe1147 Mon Sep 17 00:00:00 2001 +From 2a1f4af15aa785776498c17abd5d790e1507bd02 Mon Sep 17 00:00:00 2001 From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com> Date: Wed, 27 Oct 2021 13:36:01 +0200 -Subject: [PATCH 01/37] add c3 and clockgen to apple/macbook21 +Subject: [PATCH 01/41] add c3 and clockgen to apple/macbook21 --- src/mainboard/apple/macbook21/Kconfig | 1 + diff --git a/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch b/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch index 0c2b080f..95cf7cd9 100644 --- a/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch +++ b/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch @@ -1,7 +1,7 @@ -From e5eab4c8043b89a325b4a28bf7da456d68475144 Mon Sep 17 00:00:00 2001 +From 089da6f216a8f6c9deec3e6c8d9feb5bf2ff907b Mon Sep 17 00:00:00 2001 From: persmule <persmule@gmail.com> Date: Sun, 31 Oct 2021 23:33:26 +0000 -Subject: [PATCH 02/37] lenovo/t400: Enable all SATA ports +Subject: [PATCH 02/41] lenovo/t400: Enable all SATA ports There are 2 SATA ports on the chassis of t400(s), but at least one dock for t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its diff --git a/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch b/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch index 4ccde9a6..98bd1ebe 100644 --- a/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch +++ b/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch @@ -1,7 +1,7 @@ -From fd398cc10600cccce3dd4931651a5294ffebde9a Mon Sep 17 00:00:00 2001 +From ce328f1fa7e7cd90f31728eb1c1215bcb062acd6 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Mon, 3 Jan 2022 19:06:22 +0000 -Subject: [PATCH 03/37] lenovo/x230: set me_state=Disabled in cmos.default +Subject: [PATCH 03/41] lenovo/x230: set me_state=Disabled in cmos.default I only recently found out about this. It's possible to use me_cleaner to do the same thing, but some people might just flash coreboot and not do diff --git a/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch b/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch index 39319d58..4595d767 100644 --- a/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch +++ b/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch @@ -1,7 +1,7 @@ -From 74230d8123cb7c31afd084658720084b1a5ac5d9 Mon Sep 17 00:00:00 2001 +From a7aaa58404cb19e6d89a9c9c5a137f9629d6e140 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Wed, 2 Mar 2022 21:50:01 +0000 -Subject: [PATCH 04/37] set me_state=Disabled on all cmos.default files! +Subject: [PATCH 04/41] set me_state=Disabled on all cmos.default files! yeah. why the hell isn't this the default diff --git a/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch index 9c00ab79..5c193b84 100644 --- a/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch +++ b/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch @@ -1,7 +1,7 @@ -From f592ac32892d7f99fa2e68504bb147e5d06184ca Mon Sep 17 00:00:00 2001 +From 5a226a91554c70c1c5d56a3184abdea48ea43fbb Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Sun, 19 Feb 2023 18:21:43 +0000 -Subject: [PATCH 05/37] util/ifdtool: add --nuke flag (all 0xFF on region) +Subject: [PATCH 05/41] util/ifdtool: add --nuke flag (all 0xFF on region) When this option is used, the region's contents are overwritten with all ones (0xFF). diff --git a/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch b/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch index ee60c3c8..0929787d 100644 --- a/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch +++ b/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch @@ -1,7 +1,7 @@ -From 18069af7c0c6beedfadb615cca9127e82a0d8007 Mon Sep 17 00:00:00 2001 +From 0994cde09852b152039f478937875ada3b3933d8 Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Sat, 6 May 2023 15:53:41 -0600 -Subject: [PATCH 06/37] mb/dell/e6400: Enable 01.0 device in devicetree for +Subject: [PATCH 06/41] mb/dell/e6400: Enable 01.0 device in devicetree for dGPU models Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed diff --git a/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch index 525bd366..8e38a793 100644 --- a/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch +++ b/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch @@ -1,7 +1,7 @@ -From 9563c107a4b40e66b610d7205a21590c7c181c78 Mon Sep 17 00:00:00 2001 +From b8f173c3ef36873314d4718cf8a8cbe472c0a62b Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Fri, 12 May 2023 19:55:15 -0600 -Subject: [PATCH 07/37] Remove warning for coreboot images built without a +Subject: [PATCH 07/41] Remove warning for coreboot images built without a payload I added this in upstream to prevent people from accidentally flashing diff --git a/config/coreboot/default/patches/0008-HACK-Disable-coreboot-related-BL31-features.patch b/config/coreboot/default/patches/0008-HACK-Disable-coreboot-related-BL31-features.patch index bd2c56bd..7a66ec5c 100644 --- a/config/coreboot/default/patches/0008-HACK-Disable-coreboot-related-BL31-features.patch +++ b/config/coreboot/default/patches/0008-HACK-Disable-coreboot-related-BL31-features.patch @@ -1,7 +1,7 @@ -From 7f650a19d30fe6157b150c5248d6086007323d72 Mon Sep 17 00:00:00 2001 +From f9ac80501381f464f20b0dfb8b921cfd32267728 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak <alpernebiyasak@gmail.com> Date: Thu, 22 Jun 2023 16:44:27 +0300 -Subject: [PATCH 08/37] HACK: Disable coreboot related BL31 features +Subject: [PATCH 08/41] HACK: Disable coreboot related BL31 features I don't know why, but removing this BL31 make argument lets gru-kevin power off properly when shut down from Linux. Needs investigation. diff --git a/config/coreboot/default/patches/0009-dell-e6430-use-ME-Soft-Temporary-Disable.patch b/config/coreboot/default/patches/0009-dell-e6430-use-ME-Soft-Temporary-Disable.patch index ca3b6264..2fbd7b3d 100644 --- a/config/coreboot/default/patches/0009-dell-e6430-use-ME-Soft-Temporary-Disable.patch +++ b/config/coreboot/default/patches/0009-dell-e6430-use-ME-Soft-Temporary-Disable.patch @@ -1,7 +1,7 @@ -From 3f6f65ed6a435fe49534c8a0b5cb98c3eac71150 Mon Sep 17 00:00:00 2001 +From 8833d84c55c8fc1c49cf320c1825e89984555900 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 11:41:41 +0000 -Subject: [PATCH 09/37] dell/e6430: use ME Soft Temporary Disable +Subject: [PATCH 09/41] dell/e6430: use ME Soft Temporary Disable i overlooked this. it's set on other boards. diff --git a/config/coreboot/default/patches/0010-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch b/config/coreboot/default/patches/0010-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch index 2a7d5c17..dd8c94a4 100644 --- a/config/coreboot/default/patches/0010-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch +++ b/config/coreboot/default/patches/0010-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch @@ -1,7 +1,7 @@ -From b4d48233a8d829d7285501f662d999aad898be21 Mon Sep 17 00:00:00 2001 +From 40b9ffdb09eb40581ae2ea91a653192a6b7507ba Mon Sep 17 00:00:00 2001 From: Riku Viitanen <riku.viitanen@protonmail.com> Date: Sat, 23 Dec 2023 19:02:10 +0200 -Subject: [PATCH 10/37] mb/hp: Add Compaq Elite 8300 CMT port +Subject: [PATCH 10/41] mb/hp: Add Compaq Elite 8300 CMT port Based on autoport and Z220 SuperIO code. diff --git a/config/coreboot/default/patches/0011-nb-intel-haswell-make-IOMMU-a-runtime-option.patch b/config/coreboot/default/patches/0011-nb-intel-haswell-make-IOMMU-a-runtime-option.patch index f8c56155..41a5c4bb 100644 --- a/config/coreboot/default/patches/0011-nb-intel-haswell-make-IOMMU-a-runtime-option.patch +++ b/config/coreboot/default/patches/0011-nb-intel-haswell-make-IOMMU-a-runtime-option.patch @@ -1,7 +1,7 @@ -From a16ff494adb1f706d402a2e167d0d53c775d0897 Mon Sep 17 00:00:00 2001 +From 49c11dedc8c12c6868237109c49509729502cc45 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Sat, 2 Mar 2024 22:51:09 +0000 -Subject: [PATCH 11/37] nb/intel/haswell: make IOMMU a runtime option +Subject: [PATCH 11/41] nb/intel/haswell: make IOMMU a runtime option When I tested graphics cards on a coreboot port for Dell OptiPlex 9020 SFF, I could not use a graphics card unless diff --git a/config/coreboot/default/patches/0012-dell-optiplex_9020-Disable-IOMMU-by-default.patch b/config/coreboot/default/patches/0012-dell-optiplex_9020-Disable-IOMMU-by-default.patch index e578d22a..3ebe0c7a 100644 --- a/config/coreboot/default/patches/0012-dell-optiplex_9020-Disable-IOMMU-by-default.patch +++ b/config/coreboot/default/patches/0012-dell-optiplex_9020-Disable-IOMMU-by-default.patch @@ -1,7 +1,7 @@ -From 4b0536ce7cd55eedc52d13497bea59d91e8924d8 Mon Sep 17 00:00:00 2001 +From 49f11a79d59856b9dc2f81c436933ef22077adc6 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Sat, 2 Mar 2024 23:00:09 +0000 -Subject: [PATCH 12/37] dell/optiplex_9020: Disable IOMMU by default +Subject: [PATCH 12/41] dell/optiplex_9020: Disable IOMMU by default Needed to make graphics cards work. Turning it on is recommended if only using iGPU, otherwise leave it off diff --git a/config/coreboot/default/patches/0013-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch b/config/coreboot/default/patches/0013-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch index 89584d95..e28e65c5 100644 --- a/config/coreboot/default/patches/0013-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch +++ b/config/coreboot/default/patches/0013-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch @@ -1,7 +1,7 @@ -From c8329f84b2d06581dcbeecedc38b7c4715a9cba7 Mon Sep 17 00:00:00 2001 +From bf2779aa7dc40c8b671d231ca041c3532381b723 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Sat, 6 Apr 2024 01:22:47 +0100 -Subject: [PATCH 13/37] nb/haswell: Fully disable iGPU when dGPU is used +Subject: [PATCH 13/41] nb/haswell: Fully disable iGPU when dGPU is used My earlier patch disabled decode *and* disabled the iGPU itself, but a subsequent revision disabled only VGA decode. Upon revisiting, I diff --git a/config/coreboot/default/patches/0014-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch b/config/coreboot/default/patches/0014-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch index 70556090..fb00d0b5 100644 --- a/config/coreboot/default/patches/0014-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch +++ b/config/coreboot/default/patches/0014-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch @@ -1,7 +1,7 @@ -From 73dbf291631fdbae2d8e8a761c147523c8d9e65c Mon Sep 17 00:00:00 2001 +From 44ad334748c8c979a42ece4d3425879d3eb9a2b7 Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Fri, 3 May 2024 11:03:32 -0600 -Subject: [PATCH 14/37] ec/dell/mec5035: Add S3 suspend SMI handler +Subject: [PATCH 14/41] ec/dell/mec5035: Add S3 suspend SMI handler This is necessary for S3 resume to work on SNB and newer Dell Latitude laptops. If a command isn't sent, the EC cuts power to the DIMMs, diff --git a/config/coreboot/default/patches/0015-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch b/config/coreboot/default/patches/0015-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch index 9525b8ce..6f1792be 100644 --- a/config/coreboot/default/patches/0015-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch +++ b/config/coreboot/default/patches/0015-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch @@ -1,7 +1,7 @@ -From a507fe609a2e99c95218ec430916eaf4c3cb61d9 Mon Sep 17 00:00:00 2001 +From c9b30b3c93acc42b3c4de4f782dd47d519f81a8d Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Sat, 4 May 2024 02:00:53 +0100 -Subject: [PATCH 15/37] nb/haswell: lock policy regs when disabling IOMMU +Subject: [PATCH 15/41] nb/haswell: lock policy regs when disabling IOMMU Angel Pons told me I should do it. See comments here: https://review.coreboot.org/c/coreboot/+/81016 diff --git a/config/coreboot/default/patches/0016-nb-intel-gm45-Make-DDR2-raminit-work.patch b/config/coreboot/default/patches/0016-nb-intel-gm45-Make-DDR2-raminit-work.patch index 091a15c4..8b75181f 100644 --- a/config/coreboot/default/patches/0016-nb-intel-gm45-Make-DDR2-raminit-work.patch +++ b/config/coreboot/default/patches/0016-nb-intel-gm45-Make-DDR2-raminit-work.patch @@ -1,7 +1,7 @@ -From 9e0a6aa376db81f9409eda92b6783a8262c1fedb Mon Sep 17 00:00:00 2001 +From dc5084cfa9526d5ba4a450b4d30f7463d857ba5f Mon Sep 17 00:00:00 2001 From: Angel Pons <th3fanbus@gmail.com> Date: Mon, 10 May 2021 22:40:59 +0200 -Subject: [PATCH 16/37] nb/intel/gm45: Make DDR2 raminit work +Subject: [PATCH 16/41] nb/intel/gm45: Make DDR2 raminit work List of changes: - Update some timing and ODT values diff --git a/config/coreboot/default/patches/0017-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch b/config/coreboot/default/patches/0017-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch index 4ba74757..61aa4bff 100644 --- a/config/coreboot/default/patches/0017-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch +++ b/config/coreboot/default/patches/0017-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch @@ -1,7 +1,7 @@ -From 6acc310c1d695d47c148296da9da189de21d58be Mon Sep 17 00:00:00 2001 +From 1afeaab1f511e0fac478560d8da2d378858e2ac9 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Tue, 6 Aug 2024 00:50:24 +0100 -Subject: [PATCH 17/37] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards +Subject: [PATCH 17/41] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards We add this patch: diff --git a/config/coreboot/default/patches/0018-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch b/config/coreboot/default/patches/0018-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch index 1cf7c0ac..863ae505 100644 --- a/config/coreboot/default/patches/0018-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch +++ b/config/coreboot/default/patches/0018-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch @@ -1,7 +1,7 @@ -From 7461210ecc7c8e41f3f941bd5ce7943e5f66c711 Mon Sep 17 00:00:00 2001 +From 12d29915dcd43053b7e3a17e778db3627fbbadfb Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Mon, 20 May 2024 10:24:16 -0600 -Subject: [PATCH 18/37] mb/dell/e6400: Use 100 MHz reference clock for display +Subject: [PATCH 18/41] mb/dell/e6400: Use 100 MHz reference clock for display The E6400 uses a 100 MHz reference clock for spread spectrum support on LVDS, whereas libgfxinit previously assumed a 96 MHz input clock. For diff --git a/config/coreboot/default/patches/0019-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch b/config/coreboot/default/patches/0019-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch index 2edfaae3..b75f269c 100644 --- a/config/coreboot/default/patches/0019-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch +++ b/config/coreboot/default/patches/0019-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch @@ -1,7 +1,7 @@ -From a683dffd774dbbe25cc77c0f7d3853232c17c2bf Mon Sep 17 00:00:00 2001 +From 25af68c921f62046ea6e939cbe9c7c7936497e96 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Mon, 12 Aug 2024 02:15:24 +0100 -Subject: [PATCH 19/37] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ +Subject: [PATCH 19/41] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ set it to 96MHz. fixes the following build error when building for x4x boards e.g. gigabyte ga-g41m-es2l: diff --git a/config/coreboot/default/patches/0020-mb-dell-Convert-E6400-into-a-variant.patch b/config/coreboot/default/patches/0020-mb-dell-Convert-E6400-into-a-variant.patch index a0068142..6f45ba44 100644 --- a/config/coreboot/default/patches/0020-mb-dell-Convert-E6400-into-a-variant.patch +++ b/config/coreboot/default/patches/0020-mb-dell-Convert-E6400-into-a-variant.patch @@ -1,7 +1,7 @@ -From a48ba23bb4a24730fa49b5a10b56c9de873dea8a Mon Sep 17 00:00:00 2001 +From 6421e20fe009e981d6bc28cfd79e79ae2097c80d Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Thu, 26 Sep 2024 19:48:26 -0600 -Subject: [PATCH 20/37] mb/dell: Convert E6400 into a variant +Subject: [PATCH 20/41] mb/dell: Convert E6400 into a variant All the GM45 Dell Latitudes should be nearly identical, so convert the E6400 port into a variant so that future ports for the other systems can diff --git a/config/coreboot/default/patches/0021-mb-dell-gm45_latitudes-Add-E4300-variant.patch b/config/coreboot/default/patches/0021-mb-dell-gm45_latitudes-Add-E4300-variant.patch index af893982..557c00f6 100644 --- a/config/coreboot/default/patches/0021-mb-dell-gm45_latitudes-Add-E4300-variant.patch +++ b/config/coreboot/default/patches/0021-mb-dell-gm45_latitudes-Add-E4300-variant.patch @@ -1,7 +1,7 @@ -From b87e6774f0407ea48610c83ea54ab6a4b4a78a24 Mon Sep 17 00:00:00 2001 +From 0b5aa25828b0f91a5345c12dfabdc9a0f9b3765b Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Thu, 26 Sep 2024 19:51:25 -0600 -Subject: [PATCH 21/37] mb/dell/gm45_latitudes: Add E4300 variant +Subject: [PATCH 21/41] mb/dell/gm45_latitudes: Add E4300 variant Change-Id: I0f2059501b11be103187e3ce1a7c04ab85ae63d2 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> diff --git a/config/coreboot/default/patches/0022-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch b/config/coreboot/default/patches/0022-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch index bbdce358..16544078 100644 --- a/config/coreboot/default/patches/0022-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch +++ b/config/coreboot/default/patches/0022-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch @@ -1,7 +1,7 @@ -From 0bc9ca409793836dcdb386db97b7a9464d92a973 Mon Sep 17 00:00:00 2001 +From 2f07e367c9c5488722619a6a2efd5aa2fb634a05 Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Fri, 3 May 2024 16:31:12 -0600 -Subject: [PATCH 22/37] mb/dell: Add S3 SMI handler for Dell Latitudes +Subject: [PATCH 22/41] mb/dell: Add S3 SMI handler for Dell Latitudes Integrate the previously added mec5035_smi_sleep() function into mainboard code to fix S3 suspend on the SNB/IVB Latitudes and the E7240. @@ -12,19 +12,19 @@ the power LED while in S3. Without it, all LEDs turn off during S3. Change-Id: Ic0d887f75be13c3fb9f6df62153ac458895e0283 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> --- - src/mainboard/dell/e7240/smihandler.c | 9 +++++++++ src/mainboard/dell/gm45_latitude/smihandler.c | 9 +++++++++ + src/mainboard/dell/haswell_latitude/smihandler.c | 9 +++++++++ src/mainboard/dell/snb_ivb_latitude/smihandler.c | 9 +++++++++ 3 files changed, 27 insertions(+) - create mode 100644 src/mainboard/dell/e7240/smihandler.c create mode 100644 src/mainboard/dell/gm45_latitude/smihandler.c + create mode 100644 src/mainboard/dell/haswell_latitude/smihandler.c create mode 100644 src/mainboard/dell/snb_ivb_latitude/smihandler.c -diff --git a/src/mainboard/dell/e7240/smihandler.c b/src/mainboard/dell/e7240/smihandler.c +diff --git a/src/mainboard/dell/gm45_latitude/smihandler.c b/src/mainboard/dell/gm45_latitude/smihandler.c new file mode 100644 index 0000000000..00e55b51db --- /dev/null -+++ b/src/mainboard/dell/e7240/smihandler.c ++++ b/src/mainboard/dell/gm45_latitude/smihandler.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + @@ -35,11 +35,11 @@ index 0000000000..00e55b51db +{ + mec5035_smi_sleep(slp_typ); +} -diff --git a/src/mainboard/dell/gm45_latitude/smihandler.c b/src/mainboard/dell/gm45_latitude/smihandler.c +diff --git a/src/mainboard/dell/haswell_latitude/smihandler.c b/src/mainboard/dell/haswell_latitude/smihandler.c new file mode 100644 index 0000000000..00e55b51db --- /dev/null -+++ b/src/mainboard/dell/gm45_latitude/smihandler.c ++++ b/src/mainboard/dell/haswell_latitude/smihandler.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + diff --git a/config/coreboot/default/patches/0023-ec-dell-mec5035-Route-power-button-event-to-host.patch b/config/coreboot/default/patches/0023-ec-dell-mec5035-Route-power-button-event-to-host.patch index ab01c935..d4d3444a 100644 --- a/config/coreboot/default/patches/0023-ec-dell-mec5035-Route-power-button-event-to-host.patch +++ b/config/coreboot/default/patches/0023-ec-dell-mec5035-Route-power-button-event-to-host.patch @@ -1,7 +1,7 @@ -From d91dc168d6b8eca5e78aef9e48571d6edb156d45 Mon Sep 17 00:00:00 2001 +From ed8e485c5f719fbd0da34d2e883d002945134796 Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Tue, 18 Jun 2024 21:31:08 -0600 -Subject: [PATCH 23/37] ec/dell/mec5035: Route power button event to host +Subject: [PATCH 23/41] ec/dell/mec5035: Route power button event to host If command 0x3e with an argument of 1 isn't sent to the EC, pressing the power button results in the EC powering off the system without letting diff --git a/config/coreboot/default/patches/0024-Disable-compression-on-refcode-insertion.patch b/config/coreboot/default/patches/0024-Disable-compression-on-refcode-insertion.patch index c557e9d7..00de7f73 100644 --- a/config/coreboot/default/patches/0024-Disable-compression-on-refcode-insertion.patch +++ b/config/coreboot/default/patches/0024-Disable-compression-on-refcode-insertion.patch @@ -1,7 +1,7 @@ -From b6bd33b0430f72c2fce16a3b1e41927ef540923b Mon Sep 17 00:00:00 2001 +From 5d056590dd6f3899422546a16a59bec6402b96f6 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Tue, 31 Dec 2024 14:42:24 +0000 -Subject: [PATCH 24/37] Disable compression on refcode insertion +Subject: [PATCH 24/41] Disable compression on refcode insertion Compression is not reliably reproducible. In an lbmk release context, this means we cannot rely on vendorfile insertion. @@ -14,7 +14,7 @@ Signed-off-by: Leah Rowe <info@minifree.org> 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile.mk b/Makefile.mk -index 3969bfbd05..15346569f8 100644 +index 218e388bb5..a2163c4644 100644 --- a/Makefile.mk +++ b/Makefile.mk @@ -1392,7 +1392,7 @@ endif diff --git a/config/coreboot/default/patches/0025-nb-intel-Disable-stack-overflow-debug-options.patch b/config/coreboot/default/patches/0025-nb-intel-Disable-stack-overflow-debug-options.patch index 696be518..935ad553 100644 --- a/config/coreboot/default/patches/0025-nb-intel-Disable-stack-overflow-debug-options.patch +++ b/config/coreboot/default/patches/0025-nb-intel-Disable-stack-overflow-debug-options.patch @@ -1,7 +1,7 @@ -From fc4c65f3bb807b9fc766745a70f92729b0b8d99e Mon Sep 17 00:00:00 2001 +From 0b4bce08857e886b15277099cb1a53fe31ddfece Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Mon, 21 Apr 2025 02:58:47 +0100 -Subject: [PATCH 25/37] nb/intel/*: Disable stack overflow debug options +Subject: [PATCH 25/41] nb/intel/*: Disable stack overflow debug options Signed-off-by: Leah Rowe <leah@libreboot.org> --- diff --git a/config/coreboot/default/patches/0026-soc-intel-skylake-configure-usb-acpi.patch b/config/coreboot/default/patches/0026-soc-intel-skylake-configure-usb-acpi.patch index c411c18b..d77fb756 100644 --- a/config/coreboot/default/patches/0026-soc-intel-skylake-configure-usb-acpi.patch +++ b/config/coreboot/default/patches/0026-soc-intel-skylake-configure-usb-acpi.patch @@ -1,7 +1,7 @@ -From 14002b2575d73d3edbc72584502a463e6802cba6 Mon Sep 17 00:00:00 2001 +From 0287b792fced5752eef4e14d7bc95a21b318e64d Mon Sep 17 00:00:00 2001 From: Felix Singer <felixsinger@posteo.net> Date: Wed, 26 Jun 2024 04:24:31 +0200 -Subject: [PATCH 26/37] soc/intel/skylake: configure usb acpi +Subject: [PATCH 26/41] soc/intel/skylake: configure usb acpi Change-Id: I53fc73046e4b107064fa8c3c617ba6d9b807b71d Signed-off-by: Felix Singer <felixsinger@posteo.net> diff --git a/config/coreboot/default/patches/0027-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch b/config/coreboot/default/patches/0027-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch index 9d75cec6..e090016e 100644 --- a/config/coreboot/default/patches/0027-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch +++ b/config/coreboot/default/patches/0027-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch @@ -1,7 +1,7 @@ -From 3bb65b7f2a02ecb93e15ae037da38ad8f812747b Mon Sep 17 00:00:00 2001 +From 6b623421531a04d0d615889b0710dd82a800c0bd Mon Sep 17 00:00:00 2001 From: Mate Kukri <km@mkukri.xyz> Date: Fri, 22 Nov 2024 21:26:48 +0000 -Subject: [PATCH 27/37] soc/intel/skylake: Enable 4E/4F PNP I/O ports in +Subject: [PATCH 27/41] soc/intel/skylake: Enable 4E/4F PNP I/O ports in bootblock Change-Id: I57c9d8a9513a268e2ca6a0abd1306cd038598173 diff --git a/config/coreboot/default/patches/0028-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch b/config/coreboot/default/patches/0028-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch index df71dc47..3b40298f 100644 --- a/config/coreboot/default/patches/0028-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch +++ b/config/coreboot/default/patches/0028-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch @@ -1,7 +1,7 @@ -From b515ba5b0cd02dc1771f27eaa716582b0827a638 Mon Sep 17 00:00:00 2001 +From a2f4492e8680d96f328846e3eba85d5aebec8d09 Mon Sep 17 00:00:00 2001 From: Mate Kukri <km@mkukri.xyz> Date: Tue, 31 Dec 2024 22:49:15 +0000 -Subject: [PATCH 28/37] mb/lenovo: Add ThinkPad T480 and ThinkPad T480s +Subject: [PATCH 28/41] mb/lenovo: Add ThinkPad T480 and ThinkPad T480s These machine have BootGuard fused and requires deguard to boot coreboot. diff --git a/config/coreboot/default/patches/0029-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch b/config/coreboot/default/patches/0029-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch index eb9263b9..bb1dc948 100644 --- a/config/coreboot/default/patches/0029-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch +++ b/config/coreboot/default/patches/0029-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch @@ -1,7 +1,7 @@ -From 75cc0ea09234064318046624845b0afc5afb0ce5 Mon Sep 17 00:00:00 2001 +From 3505474eebdb54c566dfff79286689f1ba4fbb67 Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Mon, 30 Sep 2024 20:44:38 -0400 -Subject: [PATCH 29/37] mb/dell: Add Optiplex 780 MT (x4x/ICH10) +Subject: [PATCH 29/41] mb/dell: Add Optiplex 780 MT (x4x/ICH10) Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> diff --git a/config/coreboot/default/patches/0030-mb-dell-optiplex_780-Add-USFF-variant.patch b/config/coreboot/default/patches/0030-mb-dell-optiplex_780-Add-USFF-variant.patch index 8ce7471b..68bf39e9 100644 --- a/config/coreboot/default/patches/0030-mb-dell-optiplex_780-Add-USFF-variant.patch +++ b/config/coreboot/default/patches/0030-mb-dell-optiplex_780-Add-USFF-variant.patch @@ -1,7 +1,7 @@ -From 6725ec0bb976c61cbe87e61bf0e8b02e38d14de9 Mon Sep 17 00:00:00 2001 +From 77f7b454580edf756c22b38dd78a855fa5b0977f Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Wed, 30 Oct 2024 20:55:25 -0600 -Subject: [PATCH 30/37] mb/dell/optiplex_780: Add USFF variant +Subject: [PATCH 30/41] mb/dell/optiplex_780: Add USFF variant Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> diff --git a/config/coreboot/default/patches/0031-dell-3050micro-disable-nvme-hotplug.patch b/config/coreboot/default/patches/0031-dell-3050micro-disable-nvme-hotplug.patch index c154a9a1..66a36d35 100644 --- a/config/coreboot/default/patches/0031-dell-3050micro-disable-nvme-hotplug.patch +++ b/config/coreboot/default/patches/0031-dell-3050micro-disable-nvme-hotplug.patch @@ -1,7 +1,7 @@ -From 4ffaddc37d30d39f25faeaef73046a6e2ce525e8 Mon Sep 17 00:00:00 2001 +From cf5f29a8cfed97bb7fb5dee2d7539e57b169661e Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Wed, 11 Dec 2024 01:06:01 +0000 -Subject: [PATCH 31/37] dell/3050micro: disable nvme hotplug +Subject: [PATCH 31/41] dell/3050micro: disable nvme hotplug in my testing, when running my 3050micro for a few days, the nvme would sometimes randomly rename. @@ -30,10 +30,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org> 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb -index da11085ab6..2a97306c5d 100644 +index 0d2adff74a..829acacab3 100644 --- a/src/mainboard/dell/optiplex_3050/devicetree.cb +++ b/src/mainboard/dell/optiplex_3050/devicetree.cb -@@ -45,7 +45,9 @@ chip soc/intel/skylake +@@ -44,7 +44,9 @@ chip soc/intel/skylake register "PcieRpAdvancedErrorReporting[20]" = "1" register "PcieRpLtrEnable[20]" = "true" register "PcieRpClkSrcNumber[20]" = "3" diff --git a/config/coreboot/default/patches/0032-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch b/config/coreboot/default/patches/0032-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch index e60c102f..dd566a37 100644 --- a/config/coreboot/default/patches/0032-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch +++ b/config/coreboot/default/patches/0032-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch @@ -1,7 +1,7 @@ -From 5d8930edfa1d9537ba80e24c0cf8f0c9e4e9ec72 Mon Sep 17 00:00:00 2001 +From 17791a403c7887c9b48eab578e3bf977d9ba84a3 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Wed, 18 Dec 2024 02:06:18 +0000 -Subject: [PATCH 32/37] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN +Subject: [PATCH 32/41] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN This is used by lbmk to know where a tb.bin file goes, when extracting and padding TBT.bin from Lenovo ThunderBolt diff --git a/config/coreboot/default/patches/0033-soc-intel-skylake-Don-t-compress-FSP-S.patch b/config/coreboot/default/patches/0033-soc-intel-skylake-Don-t-compress-FSP-S.patch index a7ab5a96..f1defb5d 100644 --- a/config/coreboot/default/patches/0033-soc-intel-skylake-Don-t-compress-FSP-S.patch +++ b/config/coreboot/default/patches/0033-soc-intel-skylake-Don-t-compress-FSP-S.patch @@ -1,7 +1,7 @@ -From 49cee334bc7fe9a78b9355b5256a37984bac385a Mon Sep 17 00:00:00 2001 +From 2c1616af49bbc353b0946bcedf077d69d79ba293 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Thu, 26 Dec 2024 19:45:20 +0000 -Subject: [PATCH 33/37] soc/intel/skylake: Don't compress FSP-S +Subject: [PATCH 33/41] soc/intel/skylake: Don't compress FSP-S Build systems like lbmk need to reproducibly insert certain vendor files on release images. diff --git a/config/coreboot/default/patches/0034-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch b/config/coreboot/default/patches/0034-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch index ceee75c4..215a95f1 100644 --- a/config/coreboot/default/patches/0034-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch +++ b/config/coreboot/default/patches/0034-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch @@ -1,7 +1,7 @@ -From 09740dc9d43a8dc24b7416b70476796515af6581 Mon Sep 17 00:00:00 2001 +From 4e269cb66361a5b102f582e41ce8c70a0df3f60f Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Tue, 31 Dec 2024 01:40:42 +0000 -Subject: [PATCH 34/37] soc/intel/pmc: Hardcoded poweroff after power fail +Subject: [PATCH 34/41] soc/intel/pmc: Hardcoded poweroff after power fail Coreboot can set the power state for power on after previous power failure, based on the option table. On the ThinkPad T480, diff --git a/config/coreboot/default/patches/0035-src-intel-skylake-Disable-stack-overflow-debug-optio.patch b/config/coreboot/default/patches/0035-src-intel-skylake-Disable-stack-overflow-debug-optio.patch index eb5f0028..70ea1b6d 100644 --- a/config/coreboot/default/patches/0035-src-intel-skylake-Disable-stack-overflow-debug-optio.patch +++ b/config/coreboot/default/patches/0035-src-intel-skylake-Disable-stack-overflow-debug-optio.patch @@ -1,7 +1,7 @@ -From 18f4e970ebda43dd538f74398aea463a67040dd3 Mon Sep 17 00:00:00 2001 +From 1f13ade55375d32a65eb5e9cf327f7060353a225 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Mon, 6 Jan 2025 01:36:23 +0000 -Subject: [PATCH 35/37] src/intel/skylake: Disable stack overflow debug options +Subject: [PATCH 35/41] src/intel/skylake: Disable stack overflow debug options The option was appearing in T480/3050micro configs of lbmk, after updating on the coreboot/next uprev for 20241206 rev8: diff --git a/config/coreboot/default/patches/0036-src-intel-x4x-Disable-stack-overflow-debug.patch b/config/coreboot/default/patches/0036-src-intel-x4x-Disable-stack-overflow-debug.patch index 2e06ad79..303955a4 100644 --- a/config/coreboot/default/patches/0036-src-intel-x4x-Disable-stack-overflow-debug.patch +++ b/config/coreboot/default/patches/0036-src-intel-x4x-Disable-stack-overflow-debug.patch @@ -1,7 +1,7 @@ -From 8dcd86c34d92b9b17bcfe4c7c61793042dc97268 Mon Sep 17 00:00:00 2001 +From 5f34838af23fd4b6dccbab1f60b931fca7762e01 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Mon, 6 Jan 2025 01:53:53 +0000 -Subject: [PATCH 36/37] src/intel/x4x: Disable stack overflow debug +Subject: [PATCH 36/41] src/intel/x4x: Disable stack overflow debug Signed-off-by: Leah Rowe <leah@libreboot.org> --- diff --git a/config/coreboot/default/patches/0037-Conditional-TBFW-setting-for-T480-T480S.patch b/config/coreboot/default/patches/0037-Conditional-TBFW-setting-for-T480-T480S.patch index 7bca06a7..fbe70b0d 100644 --- a/config/coreboot/default/patches/0037-Conditional-TBFW-setting-for-T480-T480S.patch +++ b/config/coreboot/default/patches/0037-Conditional-TBFW-setting-for-T480-T480S.patch @@ -1,7 +1,7 @@ -From 9b547c2029611793f895117a807fa2d2c22a5332 Mon Sep 17 00:00:00 2001 +From 3b6c8e02eba287727b3abc96ffe5612f28c27df3 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Mon, 21 Apr 2025 05:14:45 +0100 -Subject: [PATCH 37/37] Conditional TBFW setting for T480/T480S +Subject: [PATCH 37/41] Conditional TBFW setting for T480/T480S Otherwise, other boards will define it, which might trigger the vendor download script, and diff --git a/config/coreboot/default/patches/0038-do-not-break-building-other-thinkpads-with-the-hacks.patch b/config/coreboot/default/patches/0038-do-not-break-building-other-thinkpads-with-the-hacks.patch index 87cde056..8447cfab 100644 --- a/config/coreboot/default/patches/0038-do-not-break-building-other-thinkpads-with-the-hacks.patch +++ b/config/coreboot/default/patches/0038-do-not-break-building-other-thinkpads-with-the-hacks.patch @@ -1,8 +1,8 @@ -From 49204919e885dca2be45ffbaf2f5af62109ec3a7 Mon Sep 17 00:00:00 2001 +From 99086eb3298b01aa9b3c68d78c399261866321d5 Mon Sep 17 00:00:00 2001 From: gaspar-ilom <gasparilom@riseup.net> Date: Thu, 6 Mar 2025 23:00:00 +0000 -Subject: [PATCH 1/1] do not break building other thinkpads with the hacks for - the t480/s made Mate Kukri +Subject: [PATCH 38/41] do not break building other thinkpads with the hacks + for the t480/s made Mate Kukri still not fixing things properly but at least it should now be possible to build older thinkpads without regressions. prior, some code was just commented or unreachable. now we make this explicit with preprocessor directives. diff --git a/config/coreboot/default/patches/0039-hp-8300cmt-remove-xhci_overcurrent_mapping.patch b/config/coreboot/default/patches/0039-hp-8300cmt-remove-xhci_overcurrent_mapping.patch index c80f3341..4dc78bdc 100644 --- a/config/coreboot/default/patches/0039-hp-8300cmt-remove-xhci_overcurrent_mapping.patch +++ b/config/coreboot/default/patches/0039-hp-8300cmt-remove-xhci_overcurrent_mapping.patch @@ -1,7 +1,7 @@ -From b313c1d4bae17fc6eb3a8217c503187d1cd5453d Mon Sep 17 00:00:00 2001 +From 521518c2b9fe32f77937cbd4ff1942f148b1c0f3 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Tue, 22 Apr 2025 10:21:59 +0100 -Subject: [PATCH 1/1] hp/8300cmt: remove xhci_overcurrent_mapping +Subject: [PATCH 39/41] hp/8300cmt: remove xhci_overcurrent_mapping No longer needed, as per the following commit: diff --git a/config/coreboot/default/patches/0040-Fix-build-with-GCC-15-as-host-compiler.patch b/config/coreboot/default/patches/0040-Fix-build-with-GCC-15-as-host-compiler.patch deleted file mode 100644 index a7b28f2e..00000000 --- a/config/coreboot/default/patches/0040-Fix-build-with-GCC-15-as-host-compiler.patch +++ /dev/null @@ -1,62 +0,0 @@ -From 281151d85240bd8a60545b6415e0f44ce6a2af33 Mon Sep 17 00:00:00 2001 -From: Alper Nebi Yasak <alpernebiyasak@gmail.com> -Date: Tue, 29 Apr 2025 17:31:13 +0300 -Subject: [PATCH] WIP: Fix build with GCC 15 as host compiler - -GCC 15 now considers the unterminated-string-initialization warning as -part of -Werror by default. Coreboot compiles host utilities with the -system compiler, which results in getting this error in some files. - -Mark a hexadecimal translation table in cbfstool code as "nonstring" to -avoid the warning-turned-error. - -The bios log prefixes are non-null-terminated as well, but I couldn't -figure out how to mark them as non-strings. Temporarily disable the -warning with a pragma to avoid the error. That pragma causes an error on -GCC 14, so disable pragma warnings along with it to avoid that as well. - -Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> ---- - src/commonlib/include/commonlib/loglevel.h | 4 ++++ - util/cbfstool/common.c | 2 +- - 2 files changed, 5 insertions(+), 1 deletion(-) - -diff --git a/src/commonlib/include/commonlib/loglevel.h b/src/commonlib/include/commonlib/loglevel.h -index 79fbcfc6d92b..31438c945ff5 100644 ---- a/src/commonlib/include/commonlib/loglevel.h -+++ b/src/commonlib/include/commonlib/loglevel.h -@@ -163,6 +163,9 @@ - * When printing logs, lines should be printed with the following prefixes in - * front of them according to the BIOS_LOG_PREFIX_PATTERN printf() pattern. - */ -+#pragma GCC diagnostic push -+#pragma GCC diagnostic ignored "-Wpragmas" -+#pragma GCC diagnostic ignored "-Wunterminated-string-initialization" - #define BIOS_LOG_PREFIX_PATTERN "[%.5s] " - #define BIOS_LOG_PREFIX_MAX_LEVEL BIOS_SPEW - static const char bios_log_prefix[BIOS_LOG_PREFIX_MAX_LEVEL + 1][5] = { -@@ -177,6 +180,7 @@ static const char bios_log_prefix[BIOS_LOG_PREFIX_MAX_LEVEL + 1][5] = { - [BIOS_DEBUG] = "DEBUG", - [BIOS_SPEW] = "SPEW ", - }; -+#pragma GCC diagnostic pop - - /* - * When printing to terminals supporting ANSI escape sequences, the following -diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c -index 7154bc9d5425..cb08c9e8ec11 100644 ---- a/util/cbfstool/common.c -+++ b/util/cbfstool/common.c -@@ -192,7 +192,7 @@ uint64_t intfiletype(const char *name) - - char *bintohex(uint8_t *data, size_t len) - { -- static const char translate[16] = "0123456789abcdef"; -+ static const char translate[16] __attribute__((__nonstring__)) = "0123456789abcdef"; - - char *result = malloc(len * 2 + 1); - if (result == NULL) - --- -2.49.0 - diff --git a/config/coreboot/default/patches/0041-crossgcc-gmp-Add-upstream-fix-for-GCC-15.patch b/config/coreboot/default/patches/0041-crossgcc-gmp-Add-upstream-fix-for-GCC-15.patch deleted file mode 100644 index 1d0b6072..00000000 --- a/config/coreboot/default/patches/0041-crossgcc-gmp-Add-upstream-fix-for-GCC-15.patch +++ /dev/null @@ -1,71 +0,0 @@ -From ee3925486f3567b9fe45cb98a88b9acc64991127 Mon Sep 17 00:00:00 2001 -From: Leah Rowe <leah@libreboot.org> -Date: Tue, 29 Apr 2025 21:15:22 +0100 -Subject: [PATCH 1/1] crossgcc/gmp: Add upstream fix for GCC 15 - -See: -https://gmplib.org/list-archives/gmp-devel/2025-January/006279.html - -by default, upstream GCC-15 now defaults to -std=c23, instead -of -std=c17, which can cause some build issues. - -GMP has this patch on their mailing list for GCC-15 (see link). - -Signed-off-by: Leah Rowe <leah@libreboot.org> ---- - .../gmp-6.3.0_acinclude-m4-fix-std-c23.patch | 43 +++++++++++++++++++ - 1 file changed, 43 insertions(+) - create mode 100644 util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch - -diff --git a/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch -new file mode 100644 -index 0000000000..b884b62df7 ---- /dev/null -+++ b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23.patch -@@ -0,0 +1,43 @@ -+From b1b61bc8ab19659f0fb8c0f87edcd79ae1bfef7e Mon Sep 17 00:00:00 2001 -+From: Rudi Heitbaum <rudi@heitbaum.com> -+Date: Wed, 22 Jan 2025 02:34:09 +0100 -+Subject: [PATCH 1/1] acinclude.m4: fix -std=c23 build failure -+ -+Add prototype to configure test function as c23 removes unprototyped -+functions. -+ -+gcc-15 switched to -std=c23 by default: -+ -+ https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=55e3bd376b2214e200fa76d12b67ff259b06c212 -+ -+As a result `configure` fails with: -+ conftest.c: In function 'f': -+ conftest.c:12:48: error: too many arguments to function 'g'; expected 0, have 6 -+ 12 | for(i=0;i<1;i++){if(e(got,got,9,d[i].n)==0)h();g(i,d[i].src,d[i].n,got,d[i].want,9);if(d[i].n)h();}} -+ | ^ ~ -+ conftest.c:7:6: note: declared here -+ 7 | void g(){} -+ | ^ -+ -+Link: https://gmplib.org/list-archives/gmp-bugs/2024-November/005550.html -+Signed-off-by: Rudi Heitbaum <rudi@heitbaum.com> -+--- -+ acinclude.m4 | 2 +- -+ 1 file changed, 1 insertion(+), 1 deletion(-) -+ -+diff --git a/acinclude.m4 b/acinclude.m4 -+index 9cf9483..1eed843 100644 -+--- a/acinclude.m4 -++++ b/acinclude.m4 -+@@ -609,7 +609,7 @@ GMP_PROG_CC_WORKS_PART([$1], [long long reliability test 1], -+ -+ #if defined (__GNUC__) && ! defined (__cplusplus) -+ typedef unsigned long long t1;typedef t1*t2; -+-void g(){} -++void g(int,const t1 *,t1,t1 *,const t1 *,int){} -+ void h(){} -+ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0) -+ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;} -+-- -+2.39.5 -+ --- -2.39.5 - diff --git a/config/coreboot/default/patches/0042-further-gcc-15-fix-for-compiling-gmp.patch b/config/coreboot/default/patches/0042-further-gcc-15-fix-for-compiling-gmp.patch deleted file mode 100644 index a2f5c982..00000000 --- a/config/coreboot/default/patches/0042-further-gcc-15-fix-for-compiling-gmp.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 983835d1470dde4559d9ee58c60e65c0bb3873c2 Mon Sep 17 00:00:00 2001 -From: Leah Rowe <leah@libreboot.org> -Date: Tue, 29 Apr 2025 23:13:42 +0100 -Subject: [PATCH 1/1] further gcc-15 fix for compiling gmp - -same as the previous fix, but we needed to apply -the exact same change to the configure file, in -the appropriate place. - -Signed-off-by: Leah Rowe <leah@libreboot.org> ---- - ...6.3.0_acinclude-m4-fix-std-c23-extra.patch | 30 +++++++++++++++++++ - 1 file changed, 30 insertions(+) - create mode 100644 util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch - -diff --git a/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch -new file mode 100644 -index 0000000000..bee0159abf ---- /dev/null -+++ b/util/crossgcc/patches/gmp-6.3.0_acinclude-m4-fix-std-c23-extra.patch -@@ -0,0 +1,30 @@ -+From f1da82325f91ccf8f3a251c0f94388acf091c1fe Mon Sep 17 00:00:00 2001 -+From: Leah Rowe <leah@libreboot.org> -+Date: Tue, 29 Apr 2025 23:11:25 +0100 -+Subject: [PATCH 1/1] further gcc-15 -std=23 mitigation -+ -+the same fix as in the previous revision, also needs -+to be applied here. this make the coreboot build process -+pass, when compiling gmp. -+ -+Signed-off-by: Leah Rowe <leah@libreboot.org> -+--- -+ configure | 2 +- -+ 1 file changed, 1 insertion(+), 1 deletion(-) -+ -+diff --git a/configure b/configure -+index 7910aa0..bd4342d 100755 -+--- a/configure -++++ b/configure -+@@ -6568,7 +6568,7 @@ if test "$gmp_prog_cc_works" = yes; then -+ -+ #if defined (__GNUC__) && ! defined (__cplusplus) -+ typedef unsigned long long t1;typedef t1*t2; -+-void g(){} -++void g(int,const t1 *,t1,t1 *,const t1 *,int){} -+ void h(){} -+ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0) -+ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;} -+-- -+2.39.5 -+ --- -2.39.5 - diff --git a/config/coreboot/default/target.cfg b/config/coreboot/default/target.cfg index 2494c0b6..c84cd896 100644 --- a/config/coreboot/default/target.cfg +++ b/config/coreboot/default/target.cfg @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-3.0-or-later tree="default" -rev="c247f62749b967143e58c33aa0e5e234711a628f" +rev="812d0e2f626dfea7e7deb960a8dc08ff0e026bc1" |