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Diffstat (limited to 'config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch')
-rw-r--r--config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch559
1 files changed, 524 insertions, 35 deletions
diff --git a/config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch b/config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch
index b09dac46..a808fb3f 100644
--- a/config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch
+++ b/config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch
@@ -1,13 +1,12 @@
-From 76a22c32d673f7e9afe66424512035586433a78c Mon Sep 17 00:00:00 2001
+From 66896f156eaade2c01636ac445cfd47afa6a32cc Mon Sep 17 00:00:00 2001
From: Mate Kukri <kukri.mate@gmail.com>
-Date: Sun, 14 Jul 2024 14:24:12 +0100
-Subject: [PATCH 1/1] [WIP] OptiPlex 3050 Micro port
+Date: Thu, 24 Oct 2024 18:05:19 +0100
+Subject: [PATCH 61/65] [WIP] OptiPlex 3050 Micro port
- Boots Linux
- SMSC SCH5553 SIO/EC
- + Early EC init + HWM init implemented
- + Console on serial port tested
- + TODO: late HWM init for fan control (fan runs at low speed now)
+ + Serial port works
+ + PWM fan control works
- Realtek Gigabit LAN works
- WiFi slot works
- NVMe SSD slot works
@@ -27,25 +26,25 @@ Subject: [PATCH 1/1] [WIP] OptiPlex 3050 Micro port
Change-Id: I8d443e39ee684a4eaa19c835a945cfe569c051e2
Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
---
- src/mainboard/dell/optiplex_3050/Kconfig | 34 +++
+ src/mainboard/dell/optiplex_3050/Kconfig | 32 ++
src/mainboard/dell/optiplex_3050/Kconfig.name | 4 +
src/mainboard/dell/optiplex_3050/Makefile.mk | 9 +
src/mainboard/dell/optiplex_3050/acpi/ec.asl | 3 +
.../dell/optiplex_3050/acpi/superio.asl | 3 +
.../dell/optiplex_3050/board_info.txt | 7 +
- src/mainboard/dell/optiplex_3050/bootblock.c | 107 ++++++++
+ src/mainboard/dell/optiplex_3050/bootblock.c | 107 ++++
src/mainboard/dell/optiplex_3050/cmos.default | 5 +
- src/mainboard/dell/optiplex_3050/cmos.layout | 54 ++++
- .../dell/optiplex_3050/devicetree.cb | 123 +++++++++
- src/mainboard/dell/optiplex_3050/dsdt.asl | 27 ++
- .../dell/optiplex_3050/gma-mainboard.ads | 19 ++
+ src/mainboard/dell/optiplex_3050/cmos.layout | 54 ++
+ .../dell/optiplex_3050/devicetree.cb | 119 ++++
+ src/mainboard/dell/optiplex_3050/dsdt.asl | 27 +
+ .../dell/optiplex_3050/gma-mainboard.ads | 19 +
.../dell/optiplex_3050/include/early_gpio.h | 11 +
- .../dell/optiplex_3050/include/gpio.h | 241 ++++++++++++++++++
- src/mainboard/dell/optiplex_3050/ramstage.c | 17 ++
- src/mainboard/dell/optiplex_3050/romstage.c | 26 ++
- src/mainboard/dell/optiplex_3050/sch5555_ec.c | 54 ++++
+ .../dell/optiplex_3050/include/gpio.h | 241 ++++++++
+ src/mainboard/dell/optiplex_3050/ramstage.c | 513 ++++++++++++++++++
+ src/mainboard/dell/optiplex_3050/romstage.c | 26 +
+ src/mainboard/dell/optiplex_3050/sch5555_ec.c | 54 ++
src/mainboard/dell/optiplex_3050/sch5555_ec.h | 10 +
- 18 files changed, 754 insertions(+)
+ 18 files changed, 1244 insertions(+)
create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig
create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig.name
create mode 100644 src/mainboard/dell/optiplex_3050/Makefile.mk
@@ -67,10 +66,10 @@ Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig
new file mode 100644
-index 0000000000..763acda0b2
+index 0000000000..2f0dccb98d
--- /dev/null
+++ b/src/mainboard/dell/optiplex_3050/Kconfig
-@@ -0,0 +1,34 @@
+@@ -0,0 +1,32 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+if BOARD_DELL_OPTIPLEX_3050
@@ -84,10 +83,8 @@ index 0000000000..763acda0b2
+ select HAVE_OPTION_TABLE
+ # select INTEL_GMA_HAVE_VBT
+ select MAINBOARD_HAS_LIBGFXINIT
-+ select MAINBOARD_HAS_TPM2
+ select MAINBOARD_SUPPORTS_KABYLAKE_CPU
+ select MAINBOARD_SUPPORTS_SKYLAKE_CPU
-+ select MEMORY_MAPPED_TPM
+ select SKYLAKE_SOC_PCH_H
+ select SOC_INTEL_KABYLAKE
+ select SUPERIO_SMSC_SCH555x
@@ -117,7 +114,7 @@ index 0000000000..14eab7f52c
+ bool "OptiPlex 3050 Micro"
diff --git a/src/mainboard/dell/optiplex_3050/Makefile.mk b/src/mainboard/dell/optiplex_3050/Makefile.mk
new file mode 100644
-index 0000000000..c078124332
+index 0000000000..d50ea40879
--- /dev/null
+++ b/src/mainboard/dell/optiplex_3050/Makefile.mk
@@ -0,0 +1,9 @@
@@ -128,7 +125,7 @@ index 0000000000..c078124332
+
+romstage-y += romstage.c
+
-+ramstage-y += ramstage.c
++ramstage-y += ramstage.c sch5555_ec.c
+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
diff --git a/src/mainboard/dell/optiplex_3050/acpi/ec.asl b/src/mainboard/dell/optiplex_3050/acpi/ec.asl
new file mode 100644
@@ -347,10 +344,10 @@ index 0000000000..54a5147b7d
+checksum 392 415 984
diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb
new file mode 100644
-index 0000000000..49b2d7f603
+index 0000000000..eb731fe48f
--- /dev/null
+++ b/src/mainboard/dell/optiplex_3050/devicetree.cb
-@@ -0,0 +1,123 @@
+@@ -0,0 +1,119 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+chip soc/intel/skylake
@@ -461,10 +458,6 @@ index 0000000000..49b2d7f603
+ device pnp 2e.b off end # Floppy Controller
+ device pnp 2e.11 off end # Parallel Port
+ end
-+
-+ chip drivers/pc80/tpm
-+ device pnp 0c31.0 on end
-+ end
+ end
+
+ device ref hda on
@@ -798,27 +791,523 @@ index 0000000000..83293c32a9
+#endif
diff --git a/src/mainboard/dell/optiplex_3050/ramstage.c b/src/mainboard/dell/optiplex_3050/ramstage.c
new file mode 100644
-index 0000000000..0badd89620
+index 0000000000..5cf2c81e50
--- /dev/null
+++ b/src/mainboard/dell/optiplex_3050/ramstage.c
-@@ -0,0 +1,17 @@
+@@ -0,0 +1,513 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
++#include <bootstate.h>
++#include <arch/cpuid.h>
++#include <cpu/x86/msr.h>
++#include <soc/gpio.h>
+#include <soc/ramstage.h>
+#include "include/gpio.h"
++#include "sch5555_ec.h"
+
+void mainboard_silicon_init_params(FSP_SIL_UPD *params)
+{
+ gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
+}
+
-+static void init_mainboard(void *chip_info)
++#define FORM_FACTOR_MICRO 0
++#define FORM_FACTOR_SFF 1
++// NOTE: one of these is MT, but 2 and 3 both get the same table anyways
++#define FORM_FACTOR_UNK2 2
++#define FORM_FACTOR_UNK3 3
++
++#define HWM_TAB_ADD_TEMP_TARGET 1
++#define HWM_TAB_PKG_POWER_ANY 0xffff
++
++struct hwm_tab_entry {
++ uint16_t addr;
++ uint8_t val;
++ uint8_t flags;
++ uint16_t pkg_power;
++};
++
++static const struct hwm_tab_entry HWM_TAB_MICRO_BASE[] = {
++ { 0x005, 0x33, 0, 0xffff },
++ { 0x018, 0x2f, 0, 0xffff },
++ { 0x019, 0x2f, 0, 0xffff },
++ { 0x01a, 0x2f, 0, 0xffff },
++ { 0x01b, 0x0f, 0, 0xffff },
++ { 0x057, 0xff, 0, 0xffff },
++ { 0x059, 0xff, 0, 0xffff },
++ { 0x05b, 0xff, 0, 0xffff },
++ { 0x05d, 0xff, 0, 0xffff },
++ { 0x05f, 0xff, 0, 0xffff },
++ { 0x061, 0xff, 0, 0xffff },
++ { 0x06e, 0x00, 0, 0xffff },
++ { 0x06f, 0x03, 0, 0xffff },
++ { 0x070, 0x03, 0, 0xffff },
++ { 0x071, 0x02, 0, 0xffff },
++ { 0x072, 0x02, 0, 0xffff },
++ { 0x073, 0x01, 0, 0xffff },
++ { 0x074, 0x06, 0, 0xffff },
++ { 0x075, 0x07, 0, 0xffff },
++ { 0x080, 0x00, 0, 0xffff },
++ { 0x081, 0x80, 0, 0xffff },
++ { 0x082, 0x80, 0, 0xffff },
++ { 0x083, 0xbb, 0, 0xffff },
++ { 0x085, 0xf1, 0, 0xffff },
++ { 0x086, 0x88, 0, 0xffff },
++ { 0x087, 0x61, 0, 0xffff },
++ { 0x088, 0x08, 0, 0xffff },
++ { 0x089, 0x00, 0, 0xffff },
++ { 0x08a, 0x73, 0, 0xffff },
++ { 0x08b, 0x73, 0, 0xffff },
++ { 0x08c, 0x73, 0, 0xffff },
++ { 0x090, 0x6d, 0, 0xffff },
++ { 0x091, 0x7e, 0, 0xffff },
++ { 0x092, 0x66, 0, 0xffff },
++ { 0x093, 0xa4, 0, 0xffff },
++ { 0x094, 0x7c, 0, 0xffff },
++ { 0x095, 0xa4, 0, 0xffff },
++ { 0x096, 0xa4, 0, 0xffff },
++ { 0x097, 0xa4, 0, 0xffff },
++ { 0x098, 0xa4, 0, 0xffff },
++ { 0x099, 0xa4, 0, 0xffff },
++ { 0x09a, 0xa4, 0, 0xffff },
++ { 0x09b, 0xa4, 0, 0xffff },
++ { 0x0a0, 0x2e, 0, 0xffff },
++ { 0x0a1, 0x00, 0, 0xffff },
++ { 0x0a2, 0x00, 0, 0xffff },
++ { 0x0ae, 0xa4, 0, 0xffff },
++ { 0x0af, 0xa4, 0, 0xffff },
++ { 0x0b0, 0xa4, 0, 0xffff },
++ { 0x0b1, 0xa4, 0, 0xffff },
++ { 0x0b2, 0xa4, 0, 0xffff },
++ { 0x0b3, 0xa4, 0, 0xffff },
++ { 0x0b6, 0x00, 0, 0xffff },
++ { 0x0b7, 0x00, 0, 0xffff },
++ { 0x0d1, 0xff, 0, 0xffff },
++ { 0x0d6, 0xff, 0, 0xffff },
++ { 0x0db, 0xff, 0, 0xffff },
++ { 0x0ea, 0x5c, 0, 0xffff },
++ { 0x0eb, 0x5c, 0, 0xffff },
++ { 0x0ef, 0xff, 0, 0xffff },
++ { 0x0f8, 0x15, 0, 0xffff },
++ { 0x0f9, 0x00, 0, 0xffff },
++ { 0x0f0, 0x30, 0, 0xffff },
++ { 0x184, 0xff, 0, 0xffff },
++ { 0x186, 0xff, 0, 0xffff },
++ { 0x1a1, 0xce, 0, 0xffff },
++ { 0x1a2, 0x0c, 0, 0xffff },
++ { 0x1a3, 0x0c, 0, 0xffff },
++ { 0x1a6, 0x00, 0, 0xffff },
++ { 0x1a7, 0x00, 0, 0xffff },
++ { 0x1a8, 0xa4, 0, 0xffff },
++ { 0x1a9, 0xa4, 0, 0xffff },
++ { 0x1ab, 0x2d, 0, 0xffff },
++ { 0x1ac, 0x2d, 0, 0xffff },
++ { 0x1b1, 0x00, 0, 0xffff },
++ { 0x1bb, 0x00, 0, 0xffff },
++ { 0x1bc, 0x00, 0, 0xffff },
++ { 0x1bd, 0x00, 0, 0xffff },
++ { 0x1be, 0x01, 0, 0xffff },
++ { 0x1bf, 0x01, 0, 0xffff },
++ { 0x1c0, 0x01, 0, 0xffff },
++ { 0x1c1, 0x01, 0, 0xffff },
++ { 0x1c2, 0x01, 0, 0xffff },
++ { 0x280, 0x00, 0, 0xffff },
++ { 0x281, 0x00, 0, 0xffff },
++ { 0x282, 0x03, 0, 0xffff },
++ { 0x283, 0x0a, 0, 0xffff },
++ { 0x284, 0x80, 0, 0xffff },
++ { 0x285, 0x03, 0, 0xffff },
++ { 0x040, 0x01, 0, 0xffff },
++};
++
++static const struct hwm_tab_entry HWM_TAB_MICRO_TEMP80[] = {
++ { 0x005, 0x33, 0, 0xffff },
++ { 0x018, 0x2f, 0, 0xffff },
++ { 0x019, 0x2f, 0, 0xffff },
++ { 0x01a, 0x2f, 0, 0xffff },
++ { 0x01b, 0x0f, 0, 0xffff },
++ { 0x057, 0xff, 0, 0xffff },
++ { 0x059, 0xff, 0, 0xffff },
++ { 0x05b, 0xff, 0, 0xffff },
++ { 0x05d, 0xff, 0, 0xffff },
++ { 0x05f, 0xff, 0, 0xffff },
++ { 0x061, 0xff, 0, 0xffff },
++ { 0x06e, 0x00, 0, 0xffff },
++ { 0x06f, 0x03, 0, 0xffff },
++ { 0x070, 0x03, 0, 0xffff },
++ { 0x071, 0x02, 0, 0xffff },
++ { 0x072, 0x02, 0, 0xffff },
++ { 0x073, 0x01, 0, 0xffff },
++ { 0x074, 0x06, 0, 0xffff },
++ { 0x075, 0x07, 0, 0xffff },
++ { 0x080, 0x00, 0, 0xffff },
++ { 0x081, 0x80, 0, 0xffff },
++ { 0x082, 0x80, 0, 0xffff },
++ { 0x083, 0xbb, 0, 0xffff },
++ { 0x085, 0xf6, 0, 0xffff },
++ { 0x086, 0x88, 0, 0xffff },
++ { 0x087, 0x61, 0, 0xffff },
++ { 0x088, 0x08, 0, 0xffff },
++ { 0x089, 0x00, 0, 0xffff },
++ { 0x08a, 0x73, 0, 0xffff },
++ { 0x08b, 0x73, 0, 0xffff },
++ { 0x08c, 0x73, 0, 0xffff },
++ { 0x090, 0x6d, 0, 0xffff },
++ { 0x091, 0x86, 0, 0xffff },
++ { 0x092, 0x66, 0, 0xffff },
++ { 0x093, 0xa4, 0, 0xffff },
++ { 0x094, 0x7c, 0, 0xffff },
++ { 0x095, 0xa4, 0, 0xffff },
++ { 0x096, 0xa4, 0, 0xffff },
++ { 0x097, 0xa4, 0, 0xffff },
++ { 0x098, 0xa4, 0, 0xffff },
++ { 0x099, 0xa4, 0, 0xffff },
++ { 0x09a, 0xa4, 0, 0xffff },
++ { 0x09b, 0xa4, 0, 0xffff },
++ { 0x0a0, 0x2e, 0, 0xffff },
++ { 0x0a1, 0x00, 0, 0xffff },
++ { 0x0a2, 0x00, 0, 0xffff },
++ { 0x0ae, 0xa4, 0, 0xffff },
++ { 0x0af, 0xa4, 0, 0xffff },
++ { 0x0b0, 0xa4, 0, 0xffff },
++ { 0x0b1, 0xa4, 0, 0xffff },
++ { 0x0b2, 0xa4, 0, 0xffff },
++ { 0x0b3, 0xa4, 0, 0xffff },
++ { 0x0b6, 0x00, 0, 0xffff },
++ { 0x0b7, 0x00, 0, 0xffff },
++ { 0x0d1, 0xff, 0, 0xffff },
++ { 0x0d6, 0xff, 0, 0xffff },
++ { 0x0db, 0xff, 0, 0xffff },
++ { 0x0ea, 0x50, 0, 0xffff },
++ { 0x0eb, 0x50, 0, 0xffff },
++ { 0x0ef, 0xff, 0, 0xffff },
++ { 0x0f8, 0x15, 0, 0xffff },
++ { 0x0f9, 0x00, 0, 0xffff },
++ { 0x0f0, 0x30, 0, 0xffff },
++ { 0x184, 0xff, 0, 0xffff },
++ { 0x186, 0xff, 0, 0xffff },
++ { 0x1a1, 0xce, 0, 0xffff },
++ { 0x1a2, 0x0c, 0, 0xffff },
++ { 0x1a3, 0x0c, 0, 0xffff },
++ { 0x1a6, 0x00, 0, 0xffff },
++ { 0x1a7, 0x00, 0, 0xffff },
++ { 0x1a8, 0xa4, 0, 0xffff },
++ { 0x1a9, 0xa4, 0, 0xffff },
++ { 0x1ab, 0x2d, 0, 0xffff },
++ { 0x1ac, 0x2d, 0, 0xffff },
++ { 0x1b1, 0x00, 0, 0xffff },
++ { 0x1bb, 0x00, 0, 0xffff },
++ { 0x1bc, 0x00, 0, 0xffff },
++ { 0x1bd, 0x00, 0, 0xffff },
++ { 0x1be, 0x01, 0, 0xffff },
++ { 0x1bf, 0x01, 0, 0xffff },
++ { 0x1c0, 0x01, 0, 0xffff },
++ { 0x1c1, 0x01, 0, 0xffff },
++ { 0x1c2, 0x01, 0, 0xffff },
++ { 0x280, 0x00, 0, 0xffff },
++ { 0x281, 0x00, 0, 0xffff },
++ { 0x282, 0x03, 0, 0xffff },
++ { 0x283, 0x0a, 0, 0xffff },
++ { 0x284, 0x80, 0, 0xffff },
++ { 0x285, 0x03, 0, 0xffff },
++ { 0x040, 0x01, 0, 0xffff },
++};
++
++static const struct hwm_tab_entry HWM_TAB_MICRO_EARLY_STEPPING[] = {
++ { 0x005, 0x33, 0, 0xffff },
++ { 0x018, 0x2f, 0, 0xffff },
++ { 0x019, 0x2f, 0, 0xffff },
++ { 0x01a, 0x2f, 0, 0xffff },
++ { 0x01b, 0x0f, 0, 0xffff },
++ { 0x057, 0xff, 0, 0xffff },
++ { 0x059, 0xff, 0, 0xffff },
++ { 0x05b, 0xff, 0, 0xffff },
++ { 0x05d, 0xff, 0, 0xffff },
++ { 0x05f, 0xff, 0, 0xffff },
++ { 0x061, 0xff, 0, 0xffff },
++ { 0x06e, 0x01, 0, 0xffff },
++ { 0x06f, 0x03, 0, 0xffff },
++ { 0x070, 0x03, 0, 0xffff },
++ { 0x071, 0x02, 0, 0xffff },
++ { 0x072, 0x02, 0, 0xffff },
++ { 0x073, 0x01, 0, 0xffff },
++ { 0x074, 0x06, 0, 0xffff },
++ { 0x075, 0x07, 0, 0xffff },
++ { 0x080, 0x00, 0, 0xffff },
++ { 0x081, 0x80, 0, 0xffff },
++ { 0x082, 0x80, 0, 0xffff },
++ { 0x083, 0xbb, 0, 0xffff },
++ { 0x085, 0xfd, 0, 0xffff },
++ { 0x086, 0x60, 0, 0xffff },
++ { 0x087, 0x50, 0, 0xffff },
++ { 0x088, 0x08, 0, 0xffff },
++ { 0x089, 0x00, 0, 0xffff },
++ { 0x08a, 0x73, 0, 0xffff },
++ { 0x08b, 0x73, 0, 0xffff },
++ { 0x08c, 0x73, 0, 0xffff },
++ { 0x090, 0x6d, 0, 0xffff },
++ { 0x091, 0x7a, 0, 0xffff },
++ { 0x092, 0x6b, 0, 0xffff },
++ { 0x093, 0xa4, 0, 0xffff },
++ { 0x094, 0x78, 0, 0xffff },
++ { 0x095, 0xa4, 0, 0xffff },
++ { 0x096, 0xa4, 0, 0xffff },
++ { 0x097, 0xa4, 0, 0xffff },
++ { 0x098, 0xa4, 0, 0xffff },
++ { 0x099, 0xa4, 0, 0xffff },
++ { 0x09a, 0xa4, 0, 0xffff },
++ { 0x09b, 0xa4, 0, 0xffff },
++ { 0x0a0, 0x2e, 0, 0xffff },
++ { 0x0a1, 0x00, 0, 0xffff },
++ { 0x0a2, 0x00, 0, 0xffff },
++ { 0x0ae, 0xa4, 0, 0xffff },
++ { 0x0af, 0xa4, 0, 0xffff },
++ { 0x0b0, 0xa4, 0, 0xffff },
++ { 0x0b1, 0xa4, 0, 0xffff },
++ { 0x0b2, 0xa4, 0, 0xffff },
++ { 0x0b3, 0xa4, 0, 0xffff },
++ { 0x0b6, 0x00, 0, 0xffff },
++ { 0x0b7, 0x00, 0, 0xffff },
++ { 0x0d1, 0xff, 0, 0xffff },
++ { 0x0d6, 0xff, 0, 0xffff },
++ { 0x0db, 0xff, 0, 0xffff },
++ { 0x0ea, 0x64, 0, 0xffff },
++ { 0x0eb, 0x64, 0, 0xffff },
++ { 0x0ef, 0xff, 0, 0xffff },
++ { 0x0f8, 0x15, 0, 0xffff },
++ { 0x0f9, 0x00, 0, 0xffff },
++ { 0x0f0, 0x30, 0, 0xffff },
++ { 0x184, 0xff, 0, 0xffff },
++ { 0x186, 0xff, 0, 0xffff },
++ { 0x1a1, 0xce, 0, 0xffff },
++ { 0x1a2, 0x0c, 0, 0xffff },
++ { 0x1a3, 0x0c, 0, 0xffff },
++ { 0x1a6, 0x00, 0, 0xffff },
++ { 0x1a7, 0x00, 0, 0xffff },
++ { 0x1a8, 0xa4, 0, 0xffff },
++ { 0x1a9, 0xa4, 0, 0xffff },
++ { 0x1ab, 0x2d, 0, 0xffff },
++ { 0x1ac, 0x2d, 0, 0xffff },
++ { 0x1b1, 0x00, 0, 0xffff },
++ { 0x1bb, 0x00, 0, 0xffff },
++ { 0x1bc, 0x00, 0, 0xffff },
++ { 0x1bd, 0x00, 0, 0xffff },
++ { 0x1be, 0x01, 0, 0xffff },
++ { 0x1bf, 0x01, 0, 0xffff },
++ { 0x1c0, 0x01, 0, 0xffff },
++ { 0x1c1, 0x01, 0, 0xffff },
++ { 0x1c2, 0x01, 0, 0xffff },
++ { 0x280, 0x00, 0, 0xffff },
++ { 0x281, 0x00, 0, 0xffff },
++ { 0x282, 0x03, 0, 0xffff },
++ { 0x283, 0x0a, 0, 0xffff },
++ { 0x284, 0x80, 0, 0xffff },
++ { 0x285, 0x03, 0, 0xffff },
++ { 0x040, 0x01, 0, 0xffff },
++};
++
++static const struct hwm_tab_entry HWM_TAB_SFF[] = {
++ { 0x019, 0x2f, 0, 0xffff },
++ { 0x040, 0x01, 0, 0xffff },
++ { 0x072, 0x03, 0, 0xffff },
++ { 0x075, 0x06, 0, 0xffff },
++ { 0x07c, 0x00, 0, 0xffff },
++ { 0x080, 0x00, 0, 0xffff },
++ { 0x081, 0x00, 0, 0xffff },
++ { 0x083, 0xbb, 0, 0xffff },
++ { 0x085, 0x59, 0, 0xffff },
++ { 0x086, 0x6a, 0, 0xffff },
++ { 0x087, 0xc0, 0, 0xffff },
++ { 0x08a, 0x33, 0, 0xffff },
++ { 0x090, 0x77, 0, 0xffff },
++ { 0x091, 0x66, 0, 0xffff },
++ { 0x092, 0x94, 0, 0xffff },
++ { 0x093, 0x90, 0, 0xffff },
++ { 0x094, 0x68, 0, 0xffff },
++ { 0x096, 0xa4, 0, 0xffff },
++ { 0x097, 0xa4, 0, 0xffff },
++ { 0x098, 0xa4, 0, 0xffff },
++ { 0x099, 0xa4, 0, 0xffff },
++ { 0x09a, 0xa4, 0, 0xffff },
++ { 0x09b, 0xa4, 0, 0xffff },
++ { 0x0a0, 0x3e, 0, 0xffff },
++ { 0x0ae, 0x86, 0, 0xffff },
++ { 0x0af, 0x86, 0, 0xffff },
++ { 0x0b0, 0xa4, 0, 0xffff },
++ { 0x0b1, 0xa4, 0, 0xffff },
++ { 0x0b2, 0x90, 0, 0xffff },
++ { 0x0b6, 0x48, 0, 0xffff },
++ { 0x0b7, 0x48, 0, 0xffff },
++ { 0x0ea, 0x64, 0, 0xffff },
++ { 0x0f0, 0x30, 0, 0xffff },
++ { 0x1b1, 0x48, 0, 0xffff },
++ { 0x1b8, 0x00, 0, 0xffff },
++ { 0x1be, 0x95, 0, 0xffff },
++ { 0x1c1, 0x90, 0, 0xffff },
++ { 0x1c6, 0x00, 0, 0xffff },
++ { 0x1c9, 0x00, 0, 0xffff },
++ { 0x280, 0x68, 0, 0xffff },
++ { 0x281, 0x10, 0, 0xffff },
++ { 0x282, 0x03, 0, 0xffff },
++ { 0x283, 0x0a, 0, 0xffff },
++ { 0x284, 0x80, 0, 0xffff },
++ { 0x285, 0x03, 0, 0xffff}
++};
++
++static const struct hwm_tab_entry HWM_TAB_MT[] = {
++ { 0x005, 0x33, 0, 0xffff },
++ { 0x018, 0x2f, 0, 0xffff },
++ { 0x019, 0x2f, 0, 0xffff },
++ { 0x01a, 0x2f, 0, 0xffff },
++ { 0x080, 0x00, 0, 0xffff },
++ { 0x081, 0x00, 0, 0xffff },
++ { 0x082, 0x80, 0, 0xffff },
++ { 0x083, 0xbb, 0, 0xffff },
++ { 0x085, 0xb9, 0, 0x0010 },
++ { 0x086, 0xac, 0, 0x0010 },
++ { 0x087, 0x87, 0, 0x0010 },
++ { 0x08a, 0x51, 0, 0x0010 },
++ { 0x08b, 0x39, 0, 0x0010 },
++ { 0x090, 0x78, 0, 0xffff },
++ { 0x091, 0x6a, 0, 0xffff },
++ { 0x092, 0x8f, 0, 0xffff },
++ { 0x094, 0x68, 0, 0xffff },
++ { 0x095, 0x5b, 0, 0xffff },
++ { 0x096, 0x92, 0, 0xffff },
++ { 0x097, 0x86, 0, 0xffff },
++ { 0x098, 0xa4, 0, 0xffff },
++ { 0x09a, 0x8b, 0, 0xffff },
++ { 0x0a0, 0x0a, 0, 0xffff },
++ { 0x0a1, 0x26, 0, 0xffff },
++ { 0x0a2, 0xd1, 0, 0xffff },
++ { 0x0ae, 0x7c, 0, 0xffff },
++ { 0x0af, 0x7c, 0, 0xffff },
++ { 0x0b0, 0x9a, 0, 0xffff },
++ { 0x0b3, 0x7c, 0, 0xffff },
++ { 0x0b6, 0x08, 0, 0xffff },
++ { 0x0b7, 0x00, 0, 0xffff },
++ { 0x0ea, 0x64, 0, 0xffff },
++ { 0x0ef, 0xff, 0, 0xffff },
++ { 0x0f8, 0x15, 0, 0xffff },
++ { 0x0f9, 0x00, 0, 0xffff },
++ { 0x0f0, 0x30, 0, 0xffff },
++ { 0x0fd, 0x01, 0, 0xffff },
++ { 0x1a1, 0x99, 0, 0xffff },
++ { 0x1a2, 0x00, 0, 0xffff },
++ { 0x1a4, 0x00, 0, 0xffff },
++ { 0x1b1, 0x00, 0, 0xffff },
++ { 0x1be, 0x90, 0, 0xffff },
++ { 0x280, 0xc4, 0, 0xffff },
++ { 0x281, 0x09, 0, 0xffff },
++ { 0x282, 0x0a, 0, 0xffff },
++ { 0x283, 0x14, 0, 0xffff },
++ { 0x284, 0x01, 0, 0xffff },
++ { 0x285, 0x01, 0, 0xffff },
++ { 0x288, 0x94, 0, 0xffff },
++ { 0x289, 0x11, 0, 0xffff },
++ { 0x28a, 0x0a, 0, 0xffff },
++ { 0x28b, 0x14, 0, 0xffff },
++ { 0x28c, 0x01, 0, 0xffff },
++ { 0x28d, 0x01, 0, 0xffff },
++ { 0x294, 0x24, 0, 0xffff },
++};
++
++static uint8_t get_temp_target(void)
+{
++ uint8_t val = rdmsr(0x1a2).lo >> 8 & 0xff;
++ if (!val)
++ val = 20;
++ return 0x95 - val;
+}
+
-+struct chip_operations mainboard_ops = {
-+ .init = init_mainboard,
-+};
++static uint16_t get_pkg_power(void)
++{
++ const unsigned int pkg_power = rdmsr(0x614).lo & 0x7fff;
++ const unsigned int power_unit = 1 << (rdmsr(0x606).lo & 0xf);
++ if (pkg_power / power_unit > 65)
++ return 32;
++ else
++ return 16;
++}
++
++static uint8_t get_core_cnt(void)
++{
++ // Intel describes this CPUID field as:
++ // > Maximum number of addressable IDs for processor cores in the physical package
++ if (cpuid(0).eax >= 4)
++ return cpuid_ext(4, 0).eax >> 26;
++ return 0;
++}
++
++static void apply_hwm_tab(const struct hwm_tab_entry *arr, size_t size)
++{
++ uint8_t temp_target = get_temp_target();
++ uint16_t pkg_power = get_pkg_power();
++
++ printk(BIOS_DEBUG, "Temp target = %#x\n", temp_target);
++ printk(BIOS_DEBUG, "Package power = %#x\n", pkg_power);
++
++ for (size_t i = 0; i < size; ++i) {
++ // Skip entry if it doesn't apply for this package power
++ if (arr[i].pkg_power != pkg_power &&
++ arr[i].pkg_power != HWM_TAB_PKG_POWER_ANY)
++ continue;
++
++ uint8_t val = arr[i].val;
++
++ // Add temp target to value if requested (current tables never do)
++ if (arr[i].flags & HWM_TAB_ADD_TEMP_TARGET)
++ val += temp_target;
++
++ // Perform write
++ sch5555_mbox_write(1, arr[i].addr, val);
++
++ }
++}
++
++static void sch5555_ec_hwm_init(void *arg)
++{
++ uint8_t form_fac_id, saved_2fc, core_cnt;
++
++ printk(BIOS_DEBUG, "OptiPlex 3050 late HWM init\n");
++
++ form_fac_id = gpio_get(GPP_G2) | gpio_get(GPP_G3) << 1;
++ printk(BIOS_DEBUG, "Form Factor ID = %#x\n", form_fac_id);
++
++ saved_2fc = sch5555_mbox_read(1, 0x2fc);
++ sch5555_mbox_write(1, 0x2fc, 0xa0);
++ sch5555_mbox_write(1, 0x2fd, 0x32);
++
++ switch (form_fac_id) {
++ case FORM_FACTOR_MICRO:
++ // CPU stepping <= 3
++ if ((cpuid(1).eax & 0xf) <= 3)
++ apply_hwm_tab(HWM_TAB_MICRO_EARLY_STEPPING, ARRAY_SIZE(HWM_TAB_MICRO_EARLY_STEPPING));
++ // Tjunction == 80
++ else if ((rdmsr(0x1a2).lo >> 16 & 0xff) == 80)
++ apply_hwm_tab(HWM_TAB_MICRO_TEMP80, ARRAY_SIZE(HWM_TAB_MICRO_TEMP80));
++ else
++ apply_hwm_tab(HWM_TAB_MICRO_BASE, ARRAY_SIZE(HWM_TAB_MICRO_BASE));
++ break;
++ case FORM_FACTOR_SFF:
++ apply_hwm_tab(HWM_TAB_SFF, ARRAY_SIZE(HWM_TAB_SFF));
++ break;
++ default:
++ apply_hwm_tab(HWM_TAB_MT, ARRAY_SIZE(HWM_TAB_MT));
++ break;
++ }
++
++ core_cnt = get_core_cnt();
++ printk(BIOS_DEBUG, "CPU Core Count = %#x\n", core_cnt);
++ if (get_core_cnt() > 2) {
++ sch5555_mbox_write(1, 0x9e, 0x30);
++ sch5555_mbox_write(1, 0xeb, sch5555_mbox_read(1, 0xea));
++ }
++
++ sch5555_mbox_write(1, 0x2fc, saved_2fc);
++ sch5555_mbox_read(1, 0xb8);
++}
++
++BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL);
diff --git a/src/mainboard/dell/optiplex_3050/romstage.c b/src/mainboard/dell/optiplex_3050/romstage.c
new file mode 100644
index 0000000000..a4734e5d61
generated by cgit v1.2.1 (git 2.18.0) at 2024-11-01 09:25:43 +0000