diff options
Diffstat (limited to 'config/coreboot/default/patches/0036-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch')
| -rw-r--r-- | config/coreboot/default/patches/0036-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch | 818 |
1 files changed, 0 insertions, 818 deletions
diff --git a/config/coreboot/default/patches/0036-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch b/config/coreboot/default/patches/0036-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch deleted file mode 100644 index 6ce09e6f..00000000 --- a/config/coreboot/default/patches/0036-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch +++ /dev/null @@ -1,818 +0,0 @@ -From 757b8965ccdd8ecd0eeec33aee3685dd9a33d34e Mon Sep 17 00:00:00 2001 -From: Riku Viitanen <riku.viitanen@protonmail.com> -Date: Sat, 23 Dec 2023 23:09:46 +0200 -Subject: [PATCH] mb/hp: Add Compaq Elite 8300 CMT port - -Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com> ---- - .../hp/compaq_elite_8300_cmt/Kconfig | 38 ++++ - .../hp/compaq_elite_8300_cmt/Kconfig.name | 2 + - .../hp/compaq_elite_8300_cmt/Makefile.inc | 7 + - .../hp/compaq_elite_8300_cmt/acpi/ec.asl | 1 + - .../compaq_elite_8300_cmt/acpi/platform.asl | 10 + - .../hp/compaq_elite_8300_cmt/acpi/superio.asl | 29 +++ - .../hp/compaq_elite_8300_cmt/acpi_tables.c | 12 ++ - .../hp/compaq_elite_8300_cmt/board_info.txt | 5 + - .../hp/compaq_elite_8300_cmt/cmos.default | 7 + - .../hp/compaq_elite_8300_cmt/cmos.layout | 74 +++++++ - .../hp/compaq_elite_8300_cmt/devicetree.cb | 161 +++++++++++++++ - .../hp/compaq_elite_8300_cmt/dsdt.asl | 26 +++ - .../hp/compaq_elite_8300_cmt/early_init.c | 41 ++++ - .../compaq_elite_8300_cmt/gma-mainboard.ads | 17 ++ - src/mainboard/hp/compaq_elite_8300_cmt/gpio.c | 191 ++++++++++++++++++ - .../hp/compaq_elite_8300_cmt/hda_verb.c | 33 +++ - .../hp/compaq_elite_8300_cmt/mainboard.c | 16 ++ - 17 files changed, 670 insertions(+) - create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Kconfig - create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name - create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Makefile.inc - create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl - create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl - create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl - create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c - create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt - create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/cmos.default - create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout - create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb - create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl - create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/early_init.c - create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads - create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/gpio.c - create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c - create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c - -diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig -new file mode 100644 -index 0000000000..d3a5c3b389 ---- /dev/null -+++ b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig -@@ -0,0 +1,38 @@ -+if BOARD_HP_COMPAQ_ELITE_8300_CMT -+ -+config BOARD_SPECIFIC_OPTIONS -+ def_bool y -+ select BOARD_ROMSIZE_KB_16384 -+ select HAVE_ACPI_RESUME -+ select HAVE_ACPI_TABLES -+ select HAVE_CMOS_DEFAULT -+ select HAVE_OPTION_TABLE -+ select INTEL_INT15 -+ select MAINBOARD_HAS_TPM1 -+ select MAINBOARD_HAS_LIBGFXINIT -+ select MAINBOARD_USES_IFD_GBE_REGION -+ select MEMORY_MAPPED_TPM -+ select NORTHBRIDGE_INTEL_SANDYBRIDGE -+ select SERIRQ_CONTINUOUS_MODE -+ select SOUTHBRIDGE_INTEL_C216 -+ select SUPERIO_NUVOTON_NPCD378 -+ select USE_NATIVE_RAMINIT -+ -+config CBFS_SIZE -+ default 0x570000 -+ -+config MAINBOARD_DIR -+ default "hp/compaq_elite_8300_cmt" -+ -+config MAINBOARD_PART_NUMBER -+ default "HP Compaq Elite 8300 CMT" -+ -+config VGA_BIOS_ID -+ default "8086,0152" -+ -+config DRAM_RESET_GATE_GPIO -+ default 60 -+ -+config USBDEBUG_HCD_INDEX # FIXME: check this -+ default 2 -+endif -diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name -new file mode 100644 -index 0000000000..bd399b1e76 ---- /dev/null -+++ b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name -@@ -0,0 +1,2 @@ -+config BOARD_HP_COMPAQ_ELITE_8300_CMT -+ bool "Compaq Elite 8300 CMT" -diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.inc b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.inc -new file mode 100644 -index 0000000000..fb492d3583 ---- /dev/null -+++ b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.inc -@@ -0,0 +1,7 @@ -+## SPDX-License-Identifier: GPL-2.0-only -+ -+bootblock-y += early_init.c -+bootblock-y += gpio.c -+romstage-y += early_init.c -+romstage-y += gpio.c -+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads -diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl -new file mode 100644 -index 0000000000..73fa78ef14 ---- /dev/null -+++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl -@@ -0,0 +1 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl -new file mode 100644 -index 0000000000..aff432b6f4 ---- /dev/null -+++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl -@@ -0,0 +1,10 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+Method(_WAK, 1) -+{ -+ Return(Package() {0, 0}) -+} -+ -+Method(_PTS, 1) -+{ -+} -diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl -new file mode 100644 -index 0000000000..54f8e3fe95 ---- /dev/null -+++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl -@@ -0,0 +1,29 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+/* Copied over from compaq_8200_elite_sff/acpi/superio.asl */ -+ -+#include <superio/nuvoton/npcd378/acpi/superio.asl> -+ -+Scope (\_GPE) -+{ -+ Method (_L0D, 0, NotSerialized) -+ { -+ Notify (\_SB.PCI0.EHC1, 0x02) -+ Notify (\_SB.PCI0.EHC2, 0x02) -+ //FIXME: Add GBE device -+ //Notify (\_SB.PCI0.GBE, 0x02) -+ } -+ -+ Method (_L09, 0, NotSerialized) -+ { -+ Notify (\_SB.PCI0.RP01, 0x02) -+ Notify (\_SB.PCI0.RP02, 0x02) -+ Notify (\_SB.PCI0.RP03, 0x02) -+ Notify (\_SB.PCI0.RP04, 0x02) -+ Notify (\_SB.PCI0.RP05, 0x02) -+ Notify (\_SB.PCI0.RP06, 0x02) -+ Notify (\_SB.PCI0.RP07, 0x02) -+ Notify (\_SB.PCI0.RP08, 0x02) -+ Notify (\_SB.PCI0.PEGP, 0x02) -+ } -+} -diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c b/src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c -new file mode 100644 -index 0000000000..8f4f83b826 ---- /dev/null -+++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c -@@ -0,0 +1,12 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <acpi/acpi_gnvs.h> -+#include <soc/nvs.h> -+ -+void mainboard_fill_gnvs(struct global_nvs *gnvs) -+{ -+ /* Temperature at which OS will shutdown */ -+ gnvs->tcrt = 100; -+ /* Temperature at which OS will throttle CPU */ -+ gnvs->tpsv = 90; -+} -diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt b/src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt -new file mode 100644 -index 0000000000..16c29e82d8 ---- /dev/null -+++ b/src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt -@@ -0,0 +1,5 @@ -+Category: desktop -+ROM protocol: SPI -+ROM socketed: n -+Flashrom support: y -+Release year: 2012 -diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/cmos.default b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.default -new file mode 100644 -index 0000000000..6d27a79c66 ---- /dev/null -+++ b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.default -@@ -0,0 +1,7 @@ -+boot_option=Fallback -+debug_level=Debug -+power_on_after_fail=Enable -+nmi=Enable -+sata_mode=AHCI -+gfx_uma_size=32M -+psu_fan_lvl=3 -diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout -new file mode 100644 -index 0000000000..1fc83b1a55 ---- /dev/null -+++ b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout -@@ -0,0 +1,74 @@ -+## SPDX-License-Identifier: GPL-2.0-only -+ -+# ----------------------------------------------------------------- -+entries -+ -+# ----------------------------------------------------------------- -+0 120 r 0 reserved_memory -+ -+# ----------------------------------------------------------------- -+# RTC_BOOT_BYTE (coreboot hardcoded) -+384 1 e 4 boot_option -+388 4 h 0 reboot_counter -+ -+# ----------------------------------------------------------------- -+# coreboot config options: console -+395 4 e 6 debug_level -+400 3 h 0 psu_fan_lvl -+ -+# coreboot config options: southbridge -+408 1 e 1 nmi -+409 2 e 7 power_on_after_fail -+ -+421 1 e 9 sata_mode -+ -+# coreboot config options: northbridge -+432 3 e 11 gfx_uma_size -+ -+448 128 r 0 vbnv -+ -+# SandyBridge MRC Scrambler Seed values -+896 32 r 0 mrc_scrambler_seed -+928 32 r 0 mrc_scrambler_seed_s3 -+960 16 r 0 mrc_scrambler_seed_chk -+ -+# coreboot config options: check sums -+984 16 h 0 check_sum -+ -+# ----------------------------------------------------------------- -+ -+enumerations -+ -+#ID value text -+1 0 Disable -+1 1 Enable -+2 0 Enable -+2 1 Disable -+4 0 Fallback -+4 1 Normal -+6 0 Emergency -+6 1 Alert -+6 2 Critical -+6 3 Error -+6 4 Warning -+6 5 Notice -+6 6 Info -+6 7 Debug -+6 8 Spew -+7 0 Disable -+7 1 Enable -+7 2 Keep -+9 0 AHCI -+9 1 IDE -+11 0 32M -+11 1 64M -+11 2 96M -+11 3 128M -+11 4 160M -+11 5 192M -+11 6 224M -+ -+# ----------------------------------------------------------------- -+checksums -+ -+checksum 392 415 984 -diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb -new file mode 100644 -index 0000000000..f4efabd792 ---- /dev/null -+++ b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb -@@ -0,0 +1,161 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+ -+chip northbridge/intel/sandybridge -+ register "gfx.use_spread_spectrum_clock" = "0" -+ register "gpu_dp_b_hotplug" = "0" -+ register "gpu_dp_c_hotplug" = "0" -+ register "gpu_dp_d_hotplug" = "0" -+ # BTX mainboard: Reversed mapping -+ register "spd_addresses" = "{0x53, 0x52, 0x51, 0x50}" -+ device domain 0 on -+ subsystemid 0x103c 0x3396 inherit -+ -+ device ref host_bridge on end # Host bridge Host bridge -+ device ref peg10 on end # PEG -+ device ref igd on end # iGPU -+ -+ chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH -+ register "docking_supported" = "0" -+ register "gen1_dec" = "0x00fc0a01" -+ register "gen2_dec" = "0x00fc0801" -+ register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }" -+ register "pcie_port_coalesce" = "1" -+ register "sata_interface_speed_support" = "0x3" -+ register "sata_port_map" = "0x1f" -+ register "spi_lvscc" = "0x2005" -+ register "spi_uvscc" = "0x2005" -+ register "superspeed_capable_ports" = "0x0000000f" -+ register "xhci_overcurrent_mapping" = "0x00000c03" -+ register "xhci_switchable_ports" = "0x0000000f" -+ -+ device ref xhci on end # USB 3.0 Controller -+ device ref mei1 off end # Management Engine Interface 1 -+ device ref mei2 off end -+ device ref me_ide_r off end -+ device ref me_kt off end -+ device ref gbe on end # Intel Gigabit Ethernet -+ device ref ehci1 on end # USB2 EHCI #1 -+ device ref ehci2 on end # USB2 EHCI #2 -+ device ref hda on end # High Definition Audio -+ device ref sata1 on end # SATA Controller 1 -+ device ref sata2 off end # SATA Controller 2 -+ device ref smbus on end # SMBus -+ -+ device ref pcie_rp1 on end -+ device ref pcie_rp2 on end -+ device ref pcie_rp3 on end -+ device ref pcie_rp4 on end -+ device ref pcie_rp5 on end -+ device ref pcie_rp5 on end -+ device ref pcie_rp7 on end -+ device ref pcie_rp8 on end -+ -+ device ref pci_bridge on end -+ device ref lpc on # LPC bridge -+ chip superio/common # copied from Z220 -+ device pnp 2e.ff on # passes SIO base addr to SSDT gen -+ chip superio/nuvoton/npcd378 -+ device pnp 2e.0 off end # Floppy -+ device pnp 2e.1 on # Parallel port -+ # global -+ -+ # serialice: Vendor writes: -+ irq 0x14 = 0x9c -+ irq 0x1c = 0xa8 -+ irq 0x1d = 0x08 -+ irq 0x22 = 0x3f -+ irq 0x1a = 0xb0 -+ # dumped from superiotool: -+ irq 0x1b = 0x1e -+ irq 0x27 = 0x08 -+ irq 0x2a = 0x20 -+ irq 0x2d = 0x01 -+ # parallel port -+ io 0x60 = 0x378 -+ irq 0x70 = 0x07 -+ drq 0x74 = 0x01 -+ end -+ device pnp 2e.2 off # COM1 -+ io 0x60 = 0x2f8 -+ irq 0x70 = 3 -+ end -+ device pnp 2e.3 on # COM2, IR -+ io 0x60 = 0x3f8 -+ irq 0x70 = 4 -+ end -+ device pnp 2e.4 on # LED control -+ io 0x60 = 0x600 -+ # IOBASE[0h] = bit0 LED red / green -+ # IOBASE[0h] = bit1-4 LED PWM duty cycle -+ # IOBASE[1h] = bit6 SWCC -+ -+ io 0x62 = 0x610 -+ # IOBASE [0h] = GPES -+ # IOBASE [1h] = GPEE -+ # IOBASE [4h:7h] = 32bit upcounter at 1Mhz -+ # IOBASE [8h:bh] = GPS -+ # IOBASE [ch:fh] = GPE -+ end -+ device pnp 2e.5 on # Mouse -+ irq 0x70 = 0xc -+ end -+ device pnp 2e.6 on # Keyboard -+ io 0x60 = 0x0060 -+ io 0x62 = 0x0064 -+ irq 0x70 = 0x01 -+ # serialice: Vendor writes: -+ drq 0xf0 = 0x40 -+ end -+ device pnp 2e.7 on # WDT ? -+ io 0x60 = 0x620 -+ end -+ device pnp 2e.8 on # HWM -+ io 0x60 = 0x800 -+ # IOBASE[0h:feh] HWM page -+ # IOBASE[ffh] bit0-bit3 page selector -+ -+ drq 0xf0 = 0x20 -+ drq 0xf1 = 0x01 -+ drq 0xf2 = 0x40 -+ drq 0xf3 = 0x01 -+ -+ drq 0xf4 = 0x66 -+ drq 0xf5 = 0x67 -+ drq 0xf6 = 0x66 -+ drq 0xf7 = 0x01 -+ end -+ device pnp 2e.f on # GPIO OD ? -+ drq 0xf1 = 0x97 -+ drq 0xf2 = 0x01 -+ drq 0xf5 = 0x08 -+ drq 0xfe = 0x80 -+ end -+ device pnp 2e.15 on # BUS ? -+ io 0x60 = 0x0680 -+ io 0x62 = 0x0690 -+ end -+ device pnp 2e.1c on # Suspend Control ? -+ io 0x60 = 0x640 -+ # writing to IOBASE[5h] -+ # 0x0: Power off -+ # 0x9: Power off and bricked until CMOS battery removed -+ end -+ device pnp 2e.1e on # GPIO ? -+ io 0x60 = 0x660 -+ drq 0xf4 = 0x01 -+ # skip the following, as it -+ # looks like remapped registers -+ #drq 0xf5 = 0x06 -+ #drq 0xf6 = 0x60 -+ #drq 0xfe = 0x03 -+ end -+ end -+ end -+ end -+ chip drivers/pc80/tpm -+ device pnp 4e.0 on end # TPM module -+ end -+ end -+ end -+ end -+end -diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl b/src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl -new file mode 100644 -index 0000000000..e8e2b3a3e5 ---- /dev/null -+++ b/src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl -@@ -0,0 +1,26 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <acpi/acpi.h> -+ -+DefinitionBlock( -+ "dsdt.aml", -+ "DSDT", -+ ACPI_DSDT_REV_2, -+ OEM_ID, -+ ACPI_TABLE_CREATOR, -+ 0x20141018 /* OEM revision */ -+) -+{ -+ #include <acpi/dsdt_top.asl> -+ #include "acpi/platform.asl" -+ #include <cpu/intel/common/acpi/cpu.asl> -+ #include <southbridge/intel/common/acpi/platform.asl> -+ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> -+ #include <southbridge/intel/common/acpi/sleepstates.asl> -+ -+ Device (\_SB.PCI0) -+ { -+ #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> -+ #include <southbridge/intel/bd82x6x/acpi/pch.asl> -+ } -+} -diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c b/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c -new file mode 100644 -index 0000000000..f6b9c0a106 ---- /dev/null -+++ b/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c -@@ -0,0 +1,41 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <bootblock_common.h> -+#include <superio/nuvoton/npcd378/npcd378.h> -+#include <superio/nuvoton/common/nuvoton.h> -+#include <northbridge/intel/sandybridge/raminit_native.h> -+#include <southbridge/intel/bd82x6x/pch.h> -+ -+#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2) -+ -+const struct southbridge_usb_port mainboard_usb_ports[] = { -+ { 1, 0, 0 }, -+ { 1, 0, 0 }, -+ { 1, 0, 1 }, -+ { 1, 0, 1 }, -+ { 1, 0, 2 }, -+ { 1, 0, 2 }, -+ { 1, 0, 3 }, -+ { 1, 0, 3 }, -+ { 1, 0, 4 }, -+ { 1, 0, 4 }, -+ { 1, 0, 6 }, -+ { 1, 0, 5 }, -+ { 1, 0, 5 }, -+ { 1, 0, 6 }, -+}; -+ -+void bootblock_mainboard_early_init(void) -+{ -+ if (CONFIG(CONSOLE_SERIAL)) -+ nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -+} -+ -+void mainboard_get_spd(spd_raw_data *spd, bool id_only) -+{ -+ /* BTX mainboard: Reversed mapping */ -+ read_spd(&spd[3], 0x50, id_only); -+ read_spd(&spd[2], 0x51, id_only); -+ read_spd(&spd[1], 0x52, id_only); -+ read_spd(&spd[0], 0x53, id_only); -+} -diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads b/src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads -new file mode 100644 -index 0000000000..686f7d44db ---- /dev/null -+++ b/src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads -@@ -0,0 +1,17 @@ -+-- SPDX-License-Identifier: GPL-2.0-or-later -+ -+with HW.GFX.GMA; -+with HW.GFX.GMA.Display_Probing; -+ -+use HW.GFX.GMA; -+use HW.GFX.GMA.Display_Probing; -+ -+private package GMA.Mainboard is -+ -+ ports : constant Port_List := -+ (DP2, -+ HDMI2, -+ Analog, -+ others => Disabled); -+ -+end GMA.Mainboard; -diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/gpio.c b/src/mainboard/hp/compaq_elite_8300_cmt/gpio.c -new file mode 100644 -index 0000000000..2ae852ae51 ---- /dev/null -+++ b/src/mainboard/hp/compaq_elite_8300_cmt/gpio.c -@@ -0,0 +1,191 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <southbridge/intel/common/gpio.h> -+ -+static const struct pch_gpio_set1 pch_gpio_set1_mode = { -+ .gpio0 = GPIO_MODE_GPIO, -+ .gpio1 = GPIO_MODE_GPIO, -+ .gpio2 = GPIO_MODE_NATIVE, -+ .gpio3 = GPIO_MODE_NATIVE, -+ .gpio4 = GPIO_MODE_NATIVE, -+ .gpio5 = GPIO_MODE_NATIVE, -+ .gpio6 = GPIO_MODE_GPIO, -+ .gpio7 = GPIO_MODE_GPIO, -+ .gpio8 = GPIO_MODE_GPIO, -+ .gpio9 = GPIO_MODE_NATIVE, -+ .gpio10 = GPIO_MODE_NATIVE, -+ .gpio11 = GPIO_MODE_GPIO, -+ .gpio12 = GPIO_MODE_NATIVE, -+ .gpio13 = GPIO_MODE_GPIO, -+ .gpio14 = GPIO_MODE_NATIVE, -+ .gpio15 = GPIO_MODE_GPIO, -+ .gpio16 = GPIO_MODE_GPIO, -+ .gpio17 = GPIO_MODE_GPIO, -+ .gpio18 = GPIO_MODE_NATIVE, -+ .gpio19 = GPIO_MODE_NATIVE, -+ .gpio20 = GPIO_MODE_NATIVE, -+ .gpio21 = GPIO_MODE_GPIO, -+ .gpio22 = GPIO_MODE_GPIO, -+ .gpio23 = GPIO_MODE_NATIVE, -+ .gpio24 = GPIO_MODE_GPIO, -+ .gpio25 = GPIO_MODE_NATIVE, -+ .gpio26 = GPIO_MODE_NATIVE, -+ .gpio27 = GPIO_MODE_GPIO, -+ .gpio28 = GPIO_MODE_GPIO, -+ .gpio29 = GPIO_MODE_GPIO, -+ .gpio30 = GPIO_MODE_NATIVE, -+ .gpio31 = GPIO_MODE_GPIO, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_direction = { -+ .gpio0 = GPIO_DIR_INPUT, -+ .gpio1 = GPIO_DIR_INPUT, -+ .gpio6 = GPIO_DIR_INPUT, -+ .gpio7 = GPIO_DIR_INPUT, -+ .gpio8 = GPIO_DIR_INPUT, -+ .gpio11 = GPIO_DIR_INPUT, -+ .gpio13 = GPIO_DIR_INPUT, -+ .gpio15 = GPIO_DIR_OUTPUT, -+ .gpio16 = GPIO_DIR_INPUT, -+ .gpio17 = GPIO_DIR_OUTPUT, -+ .gpio21 = GPIO_DIR_INPUT, -+ .gpio22 = GPIO_DIR_INPUT, -+ .gpio24 = GPIO_DIR_INPUT, -+ .gpio27 = GPIO_DIR_INPUT, -+ .gpio28 = GPIO_DIR_OUTPUT, -+ .gpio29 = GPIO_DIR_OUTPUT, -+ .gpio31 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_level = { -+ .gpio15 = GPIO_LEVEL_LOW, -+ .gpio17 = GPIO_LEVEL_LOW, -+ .gpio28 = GPIO_LEVEL_LOW, -+ .gpio29 = GPIO_LEVEL_HIGH, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_reset = { -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_invert = { -+ .gpio0 = GPIO_INVERT, -+ .gpio1 = GPIO_INVERT, -+ .gpio6 = GPIO_INVERT, -+ .gpio11 = GPIO_INVERT, -+ .gpio13 = GPIO_INVERT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_blink = { -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_mode = { -+ .gpio32 = GPIO_MODE_GPIO, -+ .gpio33 = GPIO_MODE_GPIO, -+ .gpio34 = GPIO_MODE_GPIO, -+ .gpio35 = GPIO_MODE_GPIO, -+ .gpio36 = GPIO_MODE_GPIO, -+ .gpio37 = GPIO_MODE_GPIO, -+ .gpio38 = GPIO_MODE_GPIO, -+ .gpio39 = GPIO_MODE_GPIO, -+ .gpio40 = GPIO_MODE_NATIVE, -+ .gpio41 = GPIO_MODE_NATIVE, -+ .gpio42 = GPIO_MODE_NATIVE, -+ .gpio43 = GPIO_MODE_GPIO, -+ .gpio44 = GPIO_MODE_NATIVE, -+ .gpio45 = GPIO_MODE_NATIVE, -+ .gpio46 = GPIO_MODE_GPIO, -+ .gpio47 = GPIO_MODE_NATIVE, -+ .gpio48 = GPIO_MODE_GPIO, -+ .gpio49 = GPIO_MODE_GPIO, -+ .gpio50 = GPIO_MODE_NATIVE, -+ .gpio51 = GPIO_MODE_NATIVE, -+ .gpio52 = GPIO_MODE_NATIVE, -+ .gpio53 = GPIO_MODE_NATIVE, -+ .gpio54 = GPIO_MODE_GPIO, -+ .gpio55 = GPIO_MODE_NATIVE, -+ .gpio56 = GPIO_MODE_NATIVE, -+ .gpio57 = GPIO_MODE_GPIO, -+ .gpio58 = GPIO_MODE_NATIVE, -+ .gpio59 = GPIO_MODE_NATIVE, -+ .gpio60 = GPIO_MODE_NATIVE, -+ .gpio61 = GPIO_MODE_GPIO, -+ .gpio62 = GPIO_MODE_NATIVE, -+ .gpio63 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_direction = { -+ .gpio32 = GPIO_DIR_INPUT, -+ .gpio33 = GPIO_DIR_INPUT, -+ .gpio34 = GPIO_DIR_INPUT, -+ .gpio35 = GPIO_DIR_INPUT, -+ .gpio36 = GPIO_DIR_INPUT, -+ .gpio37 = GPIO_DIR_INPUT, -+ .gpio38 = GPIO_DIR_INPUT, -+ .gpio39 = GPIO_DIR_INPUT, -+ .gpio43 = GPIO_DIR_INPUT, -+ .gpio46 = GPIO_DIR_INPUT, -+ .gpio48 = GPIO_DIR_INPUT, -+ .gpio49 = GPIO_DIR_INPUT, -+ .gpio54 = GPIO_DIR_INPUT, -+ .gpio57 = GPIO_DIR_INPUT, -+ .gpio61 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_level = { -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_reset = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_mode = { -+ .gpio64 = GPIO_MODE_NATIVE, -+ .gpio65 = GPIO_MODE_NATIVE, -+ .gpio66 = GPIO_MODE_NATIVE, -+ .gpio67 = GPIO_MODE_NATIVE, -+ .gpio68 = GPIO_MODE_GPIO, -+ .gpio69 = GPIO_MODE_GPIO, -+ .gpio70 = GPIO_MODE_GPIO, -+ .gpio71 = GPIO_MODE_GPIO, -+ .gpio72 = GPIO_MODE_GPIO, -+ .gpio73 = GPIO_MODE_NATIVE, -+ .gpio74 = GPIO_MODE_NATIVE, -+ .gpio75 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_direction = { -+ .gpio68 = GPIO_DIR_INPUT, -+ .gpio69 = GPIO_DIR_INPUT, -+ .gpio70 = GPIO_DIR_INPUT, -+ .gpio71 = GPIO_DIR_OUTPUT, -+ .gpio72 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_level = { -+ .gpio71 = GPIO_LEVEL_LOW, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_reset = { -+}; -+ -+const struct pch_gpio_map mainboard_gpio_map = { -+ .set1 = { -+ .mode = &pch_gpio_set1_mode, -+ .direction = &pch_gpio_set1_direction, -+ .level = &pch_gpio_set1_level, -+ .blink = &pch_gpio_set1_blink, -+ .invert = &pch_gpio_set1_invert, -+ .reset = &pch_gpio_set1_reset, -+ }, -+ .set2 = { -+ .mode = &pch_gpio_set2_mode, -+ .direction = &pch_gpio_set2_direction, -+ .level = &pch_gpio_set2_level, -+ .reset = &pch_gpio_set2_reset, -+ }, -+ .set3 = { -+ .mode = &pch_gpio_set3_mode, -+ .direction = &pch_gpio_set3_direction, -+ .level = &pch_gpio_set3_level, -+ .reset = &pch_gpio_set3_reset, -+ }, -+}; -diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c b/src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c -new file mode 100644 -index 0000000000..a1eafcda68 ---- /dev/null -+++ b/src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c -@@ -0,0 +1,33 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <device/azalia_device.h> -+ -+const u32 cim_verb_data[] = { -+ 0x10ec0221, /* Codec Vendor / Device ID: Realtek */ -+ 0x103c3396, /* Subsystem ID */ -+ 11, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(0, 0x103c3396), -+ AZALIA_PIN_CFG(0, 0x12, 0x411111f0), -+ AZALIA_PIN_CFG(0, 0x14, 0x01014020), -+ AZALIA_PIN_CFG(0, 0x17, 0x90170110), -+ AZALIA_PIN_CFG(0, 0x18, 0x411111f0), -+ AZALIA_PIN_CFG(0, 0x19, 0x411111f0), -+ AZALIA_PIN_CFG(0, 0x1a, 0x02a11c3f), -+ AZALIA_PIN_CFG(0, 0x1b, 0x01813c30), -+ AZALIA_PIN_CFG(0, 0x1d, 0x415901f0), -+ AZALIA_PIN_CFG(0, 0x1e, 0x411111f0), -+ AZALIA_PIN_CFG(0, 0x21, 0x0221102f), -+ -+ 0x80862806, /* Codec Vendor / Device ID: Intel */ -+ 0x80860101, /* Subsystem ID */ -+ 4, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(3, 0x80860101), -+ AZALIA_PIN_CFG(3, 0x05, 0x58560010), -+ AZALIA_PIN_CFG(3, 0x06, 0x18560020), -+ AZALIA_PIN_CFG(3, 0x07, 0x58560030), -+ -+}; -+ -+const u32 pc_beep_verbs[0] = {}; -+ -+AZALIA_ARRAY_SIZES; -diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c b/src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c -new file mode 100644 -index 0000000000..8dbd95ef96 ---- /dev/null -+++ b/src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c -@@ -0,0 +1,16 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <device/device.h> -+#include <drivers/intel/gma/int15.h> -+#include <southbridge/intel/bd82x6x/pch.h> -+ -+static void mainboard_enable(struct device *dev) -+{ -+ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE, -+ GMA_INT15_PANEL_FIT_DEFAULT, -+ GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); -+} -+ -+struct chip_operations mainboard_ops = { -+ .enable_dev = mainboard_enable, -+}; --- -2.43.0 - |