diff options
877 files changed, 47244 insertions, 25487 deletions
@@ -24,6 +24,8 @@ /push /version /versiondate +/.version +/.versiondate /vendorfiles/ *me.bin *sch5545ec.bin @@ -42,3 +44,4 @@ /r /e /xbmkpath/ +/xbmkwd/ @@ -1,123 +1,57 @@ Libreboot ========= -Find libreboot documentation at <https://libreboot.org/> - -The `libreboot` project provides -[libre](https://libreboot.org/freedom-status.html) *boot -firmware* that initializes the hardware (e.g. memory controller, CPU, -peripherals) on specific Intel/AMD x86 and ARM targets, which -then starts a bootloader for your operating system. Linux/BSD are -well-supported. It replaces proprietary BIOS/UEFI firmware. Help is available -via [\#libreboot IRC](https://web.libera.chat/#libreboot) -on [Libera](https://libera.chat/) IRC. - -Why use Libreboot? -================== - -Why should you use *libreboot*? ----------------------------- - -Libreboot gives you freedoms that you otherwise can't get with most other -boot firmware. It's extremely powerful and configurable for many use cases. - -You have rights. The right to privacy, freedom of thought, freedom of speech -and the right to read. In this context, Libreboot gives you these rights. -Your freedom matters. -[Right to repair](https://vid.puffyan.us/watch?v=Npd_xDuNi9k) matters. -Many people use proprietary (non-libre) -boot firmware, even if they use [a libre OS](https://www.openbsd.org/). -Proprietary firmware often contains backdoors (more info on the FAQ), and it -and can be buggy. The libreboot project was founded in December 2013, -with the express purpose of making coreboot firmware accessible for -non-technical users. - -The `libreboot` project uses [coreboot](https://www.coreboot.org/) for [hardware -initialisation](https://doc.coreboot.org/getting_started/architecture.html). -Coreboot is notoriously difficult to install for most non-technical users; it -handles only basic initialization and jumps to a separate -[payload](https://doc.coreboot.org/payloads.html) program (e.g. -[GRUB](https://www.gnu.org/software/grub/), -[Tianocore](https://www.tianocore.org/)), which must also be configured. -*The libreboot software solves this problem*; it is a *coreboot distribution* with -an automated build system (named *lbmk*) that builds complete *ROM images*, for -more robust installation. Documentation is provided. - -How does Libreboot differ from coreboot? -======================================== - -In the same way that *Debian* is a GNU+Linux distribution, `libreboot` is -a *coreboot distribution*. If you want to build a ROM image from scratch, you -otherwise have to perform expert-level configuration of coreboot, GRUB and -whatever other software you need, to prepare the ROM image. With *libreboot*, -you can literally download from Git or a source archive, and run `make`, and it -will build entire ROM images. An automated build system, named `lbmk` -(Libreboot MaKe), builds these ROM images automatically, without any user input -or intervention required. Configuration has already been performed in advance. - -If you were to build regular coreboot, without using libreboot's automated -build system, it would require a lot more intervention and decent technical -knowledge to produce a working configuration. - -Regular binary releases of `libreboot` provide these -ROM images pre-compiled, and you can simply install them, with no special -knowledge or skill except the ability to follow installation instructions -and run commands BSD/Linux. - -Project goals -============= - -- *Support as much hardware as possible!* Libreboot aims to eventually - have *maintainers* for every board supported by coreboot, at every - point in time. -- *Make coreboot easy to use*. Coreboot is notoriously difficult - to install, due to an overall lack of user-focused documentation - and support. Most people will simply give up before attempting to - install coreboot. Libreboot's automated build system and user-friendly - installation instructions solves this problem. - -Libreboot attempts to bridge this divide by providing a build system -automating much of the coreboot image creation and customization. -Secondly, the project produces documentation aimed at non-technical users. -Thirdly, the project attempts to provide excellent user support via IRC. - -Libreboot already comes with a payload (GRUB), flashprog and other -needed parts. Everything is fully integrated, in a way where most of -the complicated steps that are otherwise required, are instead done -for the user in advance. - -You can download ROM images for your libreboot system and install -them without having to build anything from source. If, however, you are -interested in building your own image, the build system makes it relatively -easy to do so. - -Not a coreboot fork! --------------------- - -Libreboot is *not a fork of coreboot*. Every so often, the project -re-bases on the latest version of coreboot, with the number of custom -patches in use minimized. Tested, *stable* (static) releases are then provided -in Libreboot, based on specific coreboot revisions. - -How to help -=========== +Documentation: [libreboot.org](https://libreboot.org)\ +Support: [\#libreboot](https://web.libera.chat/#libreboot) on + [Libera](https://libera.chat/) IRC + +Libreboot provides +[libre](https://libreboot.org/freedom-status.html) +boot firmware on +[supported motherboards](https://libreboot.org/docs/install/#which-systems-are-supported-by-libreboot). It replaces proprietary vendor BIOS/UEFI implementations, by +* Using coreboot to initialize the hardware (e.g. memory controller, CPU, etc.) while + minimizing unwanted functionality (e.g. backdoors such as the Intel Management Engine) +* ... which runs a payload such as SeaBIOS, GRUB, or U-Boot +* ... which loads your operating system's boot loader (BSD and Linux-based + [systems](systems) are supported). + +Why use Libreboot, and what is coreboot? +---------------------------------------- + +A lot of users who use libre operating systems still use proprietary boot +firmware, which often contain backdoors and bugs, hampering +[user freedom](https://writefreesoftware.org) and +[right to repair](https://www.eff.org/issues/right-to-repair). + +[coreboot](https://coreboot.org) provides libre boot firmware by initializing +the hardware then running a payload. However, coreboot is notoriously difficult +to configure and install for most non-technical users, requiring detailed +technical knowledge of hardware. + +Libreboot solves this by being **a coreboot distribution** (in the same way +that Alpine Linux is a Linux distribution). It provides a fully automated build +system that downloads and compiles pre-configured ROM images for supported +motherboards, so end-users could easily fetch images to flash onto their +devices. + +Libreboot also produces documentation aimed at non-technical users and +excellent user support via IRC. + +Contribute +---------- You can check bugs listed on the [bug tracker](https://codeberg.org/libreboot/lbmk/issues). -If you spot a bug and have a fix, the website has instructions for how to send -patches, and you can also report it. Also, this entire website is -written in Markdown and hosted in a [separate -repository](https://codeberg.org/libreboot/lbwww) where you can send patches. +You may use Codeberg pull requests to send patches with bug fixes or other +improvements. This repository hosts the code for the main build system. +The website lives in [a separate repository](https://codeberg.org/libreboot/lbwww). -Any and all development discussion and user support are all done on the IRC -channel. More information is on <https://libreboot.org/contact.html>. +Development is also done on the IRC channel. -LICENSE FOR THIS README -======================= +License for this README +----------------------- -It's just a README file. This README file is released under the terms of the -Creative Commons Zero license, version 1.0 of the license, which you can -read here: +It's just a README file. It is released under +[Creative Commons Zero, version 1.0](https://creativecommons.org/publicdomain/zero/1.0/legalcode.txt). -<https://creativecommons.org/publicdomain/zero/1.0/legalcode.txt> @@ -1,130 +0,0 @@ -#!/usr/bin/env sh -# SPDX-License-Identifier: GPL-3.0-or-later -# Copyright (c) 2020-2025 Leah Rowe <leah@libreboot.org> -# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com> - -set -u -e - -if [ "./${0##*/}" != "${0}" ] || [ ! -f "build" ] || [ -L "build" ]; then - printf "You must run this in the proper work directory.\n" 1>&2 - exit 1 -fi - -. "include/lib.sh" -. "include/vendor.sh" -. "include/mrc.sh" - -eval "`setvars "" vdir src_dirname srcdir mode xp ser`" -err="fail" - -main() -{ - [ $# -lt 1 ] && $err "bad command" - spath="script/$1"; shcmd="shift 1" - [ "${1#-*}" != "$1" ] && spath="script/trees" && shcmd=":" - - for g in "command -v git" "git config --global user.name" \ - "git config --global user.email" "git_init"; do - eval "$g 1>/dev/null 2>/dev/null || $err \"Unconfigured: $g\"" - done - - case "${spath#script/}" in - version) printf "%s\nWebsite: %s\n" "$relname" "$projectsite" ;; - release) shift 1; mkrelease "$@" ;; - inject) shift 1; vendor_inject "$@" ;; - download) shift 1; vendor_download "$@" ;; - roms) - [ $# -gt 1 ] && [ "$2" = "serprog" ] && \ - mk -b stm32-vserprog pico-serprog && return 0 - shift 1; x_ ./mk -b coreboot "$@" ;; - *) - [ -f "$spath" ] || $err "bad command" - $shcmd; "$spath" "$@" || $err "excmd: $spath $(echo "$@")" ;; - esac - set -u -e # some commands disable them. turn them on! -} - -git_init() -{ - [ -L ".git" ] && return 1 - [ -e ".git" ] && return 0 - eval "`setvars "$(date -Rud @$versiondate)" cdate _nogit`" - - git init || return 1 - git add -A . || return 1 - git commit -m "$projectname $version" --date "$cdate" \ - --author="xbmk <xbmk@example.com>" || return 1 - git tag -a "$version" -m "$projectname $version" || return 1 -} - -mkrelease() -{ - export XBMK_RELEASE="y" - - vdir="release" - while getopts d:m: option; do - [ -z "$OPTARG" ] && $err "empty argument not allowed" - case "$option" in - d) vdir="$OPTARG" ;; - m) mode="$OPTARG" ;; - *) $err "invalid option '-$option'" ;; - esac - done - - vdir="$vdir/$version" - src_dirname="${relname}_src" - srcdir="$vdir/$src_dirname" - - [ -e "$vdir" ] && $err "already exists: \"$vdir\"" - mkdir -p "$vdir" || $err "mkvdir: !mkdir -p \"$vdir\"" - git clone . "$srcdir" || $err "mkdir: !gitclone \"$srcdir\"" - touch "$srcdir/lock" || $err "can't make lock file in $srcdir/" - - build_release - - printf "\n\nDONE! Check release files under %s\n" "$vdir" -} - -build_release() -{ - ( - cd "$srcdir" || $err "$vdir: !cd \"$srcdir\"" - ./mk -f; x_ rm -Rf tmp; rmgit . - x_ mv src/docs docs - ) || $err "can't create release files" - - git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \ - --abbrev-commit > "$srcdir/CHANGELOG" || $err "!gitlog $srcdir" - rm -f "$srcdir/lock" || $err "can't remove lock file in $srcdir" - - ( - cd "${srcdir%/*}" || $err "$vdir: mktarball \"$srcdir\"" - mktarball "${srcdir##*/}" "${srcdir##*/}.tar.xz" || $err "$vdir: mksrc" - ) || $err "can't create src tarball" - [ "$mode" = "src" ] && return 0 - - touch "$srcdir/lock" || $err "can't make lock file in $srcdir/" - ( - cd "$srcdir" || $err "$vdir: 2 !cd \"$srcdir\"" - mk -b coreboot pico-serprog stm32-vserprog pcsx-redux - x_ mv bin ../roms - ) || $err "can't build rom images" - - rm -Rf "$srcdir" || $err "!rm -Rf $srcdir" -} - -fail() -{ - tmp_cleanup || printf "WARNING: can't rm tmpfiles: %s\n" "$TMPDIR" 1>&2 - err_ "${1}" -} - -tmp_cleanup() -{ - [ "$xbmk_parent" = "y" ] || return 0 - [ "$TMPDIR" = "/tmp" ] || rm -Rf "$TMPDIR" || return 1 - rm -f lock || return 1 -} - -main "$@" -tmp_cleanup || err_ "can't rm TMPDIR upon non-zero exit: $TMPDIR" diff --git a/config/coreboot/coreboot413/patches/0001-cbfstool-Make-use-of-spurious-null-termination.patch b/config/coreboot/coreboot413/patches/0001-cbfstool-Make-use-of-spurious-null-termination.patch deleted file mode 100644 index dfc684e1..00000000 --- a/config/coreboot/coreboot413/patches/0001-cbfstool-Make-use-of-spurious-null-termination.patch +++ /dev/null @@ -1,56 +0,0 @@ -From f22f408956bf02609a96b7d72fb3321da159bfc6 Mon Sep 17 00:00:00 2001 -From: Nico Huber <nico.huber@secunet.com> -Date: Tue, 22 Jun 2021 13:49:44 +0000 -Subject: [PATCH 1/1] cbfstool: Make use of spurious null-termination - -The null-termination of `filetypes` was added after the code was -written, obviously resulting in NULL dereferences. As some more -code has grown around the termination, it's hard to revert the -regression, so let's update the code that still used the array -length. - -This fixes commit 7f5f9331d1 (util/cbfstool: fix buffer over-read) -which actually did fix something, but only one path while it broke -two others. We should be careful with fixes, they can always break -something else. Especially when a dumb tool triggered the patching -it seems likely that fewer people looked into related code. - -Change-Id: If2ece1f5ad62952ed2e57769702e318ba5468f0c -Signed-off-by: Nico Huber <nico.huber@secunet.com> -Reviewed-on: https://review.coreboot.org/c/coreboot/+/55763 -Tested-by: build bot (Jenkins) <no-reply@coreboot.org> -Reviewed-by: Julius Werner <jwerner@chromium.org> ---- - util/cbfstool/common.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c -index e2ed38ffc4..539d0baccf 100644 ---- a/util/cbfstool/common.c -+++ b/util/cbfstool/common.c -@@ -168,10 +168,10 @@ void print_supported_architectures(void) - - void print_supported_filetypes(void) - { -- int i, number = ARRAY_SIZE(filetypes); -+ int i; - -- for (i=0; i<number; i++) { -- printf(" %s%c", filetypes[i].name, (i==(number-1))?'\n':','); -+ for (i=0; filetypes[i].name; i++) { -+ printf(" %s%c", filetypes[i].name, filetypes[i + 1].name ? ',' : '\n'); - if ((i%8) == 7) - printf("\n"); - } -@@ -180,7 +180,7 @@ void print_supported_filetypes(void) - uint64_t intfiletype(const char *name) - { - size_t i; -- for (i = 0; i < (sizeof(filetypes) / sizeof(struct typedesc_t)); i++) -+ for (i = 0; filetypes[i].name; i++) - if (strcmp(filetypes[i].name, name) == 0) - return filetypes[i].type; - return -1; --- -2.39.2 - diff --git a/config/coreboot/coreboot413/target.cfg b/config/coreboot/coreboot413/target.cfg deleted file mode 100644 index a0aae341..00000000 --- a/config/coreboot/coreboot413/target.cfg +++ /dev/null @@ -1,4 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -tree="coreboot413" -rev="5c186c6777c9438ff4681929c9c25c98dee28bef" diff --git a/config/coreboot/d510mo/config/libgfxinit_txtmode b/config/coreboot/d510mo/config/libgfxinit_txtmode index 34c747c2..9c10d98d 100644 --- a/config/coreboot/d510mo/config/libgfxinit_txtmode +++ b/config/coreboot/d510mo/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set CONFIG_VENDOR_INTEL=y # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_INTEL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="D510MO" CONFIG_MAINBOARD_VERSION="1.0" @@ -120,24 +129,26 @@ CONFIG_MAX_CPUS=4 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=256 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -147,7 +158,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y @@ -182,6 +192,7 @@ CONFIG_BOARD_INTEL_D510MO=y # CONFIG_BOARD_INTEL_DQ67SW is not set # CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set # CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set +# CONFIG_BOARD_INTEL_FROST_CREEK is not set # CONFIG_BOARD_INTEL_GLKRVP is not set # CONFIG_BOARD_INTEL_HARCUVAR is not set # CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set @@ -197,6 +208,12 @@ CONFIG_BOARD_INTEL_D510MO=y # CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set # CONFIG_BOARD_INTEL_MTLRVP4ES_P_EXT_EC is not set # CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set + +# +# Ptlrvp +# +# CONFIG_BOARD_INTEL_PTLRVP is not set +# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC is not set # CONFIG_BOARD_INTEL_SKLSDLBRK is not set # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set # CONFIG_BOARD_INTEL_STRAGO is not set @@ -204,7 +221,6 @@ CONFIG_BOARD_INTEL_D510MO=y # CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set # CONFIG_BOARD_INTEL_WTM2 is not set # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO" CONFIG_PCIEXP_HOTPLUG_BUSES=32 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 @@ -256,8 +272,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x80000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -272,6 +289,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -355,6 +373,7 @@ CONFIG_SUPERIO_WINBOND_W83627THG=y # # Embedded Controllers # +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -379,6 +398,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -395,6 +417,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # Display # CONFIG_VGA_TEXT_FRAMEBUFFER=y +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -427,7 +450,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -445,6 +471,7 @@ CONFIG_SPI_FLASH_ISSI=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -594,7 +621,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -608,6 +634,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode index 85f39cd7..98148df2 100644 --- a/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/d510mo_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set CONFIG_VENDOR_INTEL=y # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_INTEL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="D510MO" CONFIG_MAINBOARD_VERSION="1.0" @@ -120,24 +129,26 @@ CONFIG_MAX_CPUS=4 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=256 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -147,7 +158,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y @@ -182,6 +192,7 @@ CONFIG_BOARD_INTEL_D510MO=y # CONFIG_BOARD_INTEL_DQ67SW is not set # CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set # CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set +# CONFIG_BOARD_INTEL_FROST_CREEK is not set # CONFIG_BOARD_INTEL_GLKRVP is not set # CONFIG_BOARD_INTEL_HARCUVAR is not set # CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set @@ -197,6 +208,12 @@ CONFIG_BOARD_INTEL_D510MO=y # CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set # CONFIG_BOARD_INTEL_MTLRVP4ES_P_EXT_EC is not set # CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set + +# +# Ptlrvp +# +# CONFIG_BOARD_INTEL_PTLRVP is not set +# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC is not set # CONFIG_BOARD_INTEL_SKLSDLBRK is not set # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set # CONFIG_BOARD_INTEL_STRAGO is not set @@ -204,7 +221,6 @@ CONFIG_BOARD_INTEL_D510MO=y # CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set # CONFIG_BOARD_INTEL_WTM2 is not set # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO" CONFIG_PCIEXP_HOTPLUG_BUSES=32 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 @@ -256,8 +272,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x80000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -272,6 +289,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -355,6 +373,7 @@ CONFIG_SUPERIO_WINBOND_W83627THG=y # # Embedded Controllers # +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -379,6 +398,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -395,6 +417,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # Display # CONFIG_VGA_TEXT_FRAMEBUFFER=y +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -427,7 +450,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -445,6 +471,7 @@ CONFIG_SPI_FLASH_ISSI=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -594,7 +621,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -608,6 +634,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode b/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode index d019ca59..8020fbc2 100644 --- a/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode +++ b/config/coreboot/d945gclf_512kb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set CONFIG_VENDOR_INTEL=y # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_INTEL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="D945GCLF" CONFIG_MAINBOARD_VERSION="1.0" @@ -120,25 +129,27 @@ CONFIG_MAX_CPUS=4 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set CONFIG_IRQ_SLOT_COUNT=18 -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -148,7 +159,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y @@ -183,6 +193,7 @@ CONFIG_BOARD_INTEL_D945GCLF=y # CONFIG_BOARD_INTEL_DQ67SW is not set # CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set # CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set +# CONFIG_BOARD_INTEL_FROST_CREEK is not set # CONFIG_BOARD_INTEL_GLKRVP is not set # CONFIG_BOARD_INTEL_HARCUVAR is not set # CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set @@ -198,6 +209,12 @@ CONFIG_BOARD_INTEL_D945GCLF=y # CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set # CONFIG_BOARD_INTEL_MTLRVP4ES_P_EXT_EC is not set # CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set + +# +# Ptlrvp +# +# CONFIG_BOARD_INTEL_PTLRVP is not set +# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC is not set # CONFIG_BOARD_INTEL_SKLSDLBRK is not set # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set # CONFIG_BOARD_INTEL_STRAGO is not set @@ -205,7 +222,6 @@ CONFIG_BOARD_INTEL_D945GCLF=y # CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set # CONFIG_BOARD_INTEL_WTM2 is not set # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF" CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" CONFIG_D3COLD_SUPPORT=y @@ -255,8 +271,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -271,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -354,6 +372,7 @@ CONFIG_SUPERIO_SMSC_LPC47M15X=y # # Embedded Controllers # +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -378,6 +397,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -394,6 +416,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # Display # CONFIG_VGA_TEXT_FRAMEBUFFER=y +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -422,7 +445,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -440,6 +466,7 @@ CONFIG_SPI_FLASH_ISSI=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -592,7 +619,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -607,6 +633,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode b/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode index e3aa695c..0e44adc4 100644 --- a/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/d945gclf_8mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set CONFIG_VENDOR_INTEL=y # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_INTEL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="D945GCLF" CONFIG_MAINBOARD_VERSION="1.0" @@ -120,25 +129,27 @@ CONFIG_MAX_CPUS=4 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set CONFIG_IRQ_SLOT_COUNT=18 -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Intel" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -148,7 +159,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y @@ -183,6 +193,7 @@ CONFIG_BOARD_INTEL_D945GCLF=y # CONFIG_BOARD_INTEL_DQ67SW is not set # CONFIG_BOARD_INTEL_ELKHARTLAKE_CRB is not set # CONFIG_BOARD_INTEL_EMERALDLAKE2 is not set +# CONFIG_BOARD_INTEL_FROST_CREEK is not set # CONFIG_BOARD_INTEL_GLKRVP is not set # CONFIG_BOARD_INTEL_HARCUVAR is not set # CONFIG_BOARD_INTEL_JASPERLAKE_RVP is not set @@ -198,6 +209,12 @@ CONFIG_BOARD_INTEL_D945GCLF=y # CONFIG_BOARD_INTEL_MTLRVP_P_EXT_EC is not set # CONFIG_BOARD_INTEL_MTLRVP4ES_P_EXT_EC is not set # CONFIG_BOARD_INTEL_MTLRVP_P_MCHP is not set + +# +# Ptlrvp +# +# CONFIG_BOARD_INTEL_PTLRVP is not set +# CONFIG_BOARD_INTEL_PTLRVP_CHROMEEC is not set # CONFIG_BOARD_INTEL_SKLSDLBRK is not set # CONFIG_BOARD_INTEL_SHADOWMOUNTAIN is not set # CONFIG_BOARD_INTEL_STRAGO is not set @@ -205,7 +222,6 @@ CONFIG_BOARD_INTEL_D945GCLF=y # CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set # CONFIG_BOARD_INTEL_WTM2 is not set # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D945GCLF" CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" CONFIG_D3COLD_SUPPORT=y @@ -255,8 +271,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -271,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -354,6 +372,7 @@ CONFIG_SUPERIO_SMSC_LPC47M15X=y # # Embedded Controllers # +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -378,6 +397,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -394,6 +416,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # Display # CONFIG_VGA_TEXT_FRAMEBUFFER=y +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -422,7 +445,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -440,6 +466,7 @@ CONFIG_SPI_FLASH_ISSI=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -592,7 +619,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -607,6 +633,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/default/nuke.list b/config/coreboot/default/nuke.list new file mode 100644 index 00000000..e6c247d2 --- /dev/null +++ b/config/coreboot/default/nuke.list @@ -0,0 +1,18 @@ +3rdparty/fsp/EagleStreamFspBinPkg +3rdparty/fsp/MeteorLakeFspBinPkg +3rdparty/fsp/IceLakeFspBinPkg +3rdparty/fsp/AmberLakeFspBinPkg +3rdparty/fsp/DenvertonNSFspBinPkg +3rdparty/fsp/TigerLakeFspBinPkg +3rdparty/fsp/CedarIslandFspBinPkg +3rdparty/fsp/ElkhartLakeFspBinPkg +3rdparty/fsp/CometLakeFspBinPkg +3rdparty/fsp/WhitleyFspBinPkg +3rdparty/fsp/ArrowLakeFspBinPkg +3rdparty/fsp/IdavilleFspBinPkg +3rdparty/fsp/BraswellFspBinPkg +3rdparty/fsp/CoffeeLakeFspBinPkg +3rdparty/fsp/RaptorLakeFspBinPkg +3rdparty/fsp/ApolloLakeFspBinPkg +3rdparty/fsp/SkylakeFspBinPkg +3rdparty/vboot/tests diff --git a/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch b/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch index da4ab420..04e896d9 100644 --- a/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch +++ b/config/coreboot/default/patches/0001-add-c3-and-clockgen-to-apple-macbook21.patch @@ -1,7 +1,7 @@ -From f625e31ee3abb867e775ab0cb724550825699c36 Mon Sep 17 00:00:00 2001 +From 7436b357fbe12233f3fbc5d360f296e6e15d3c2d Mon Sep 17 00:00:00 2001 From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com> Date: Wed, 27 Oct 2021 13:36:01 +0200 -Subject: [PATCH 01/51] add c3 and clockgen to apple/macbook21 +Subject: [PATCH 01/40] add c3 and clockgen to apple/macbook21 --- src/mainboard/apple/macbook21/Kconfig | 1 + @@ -64,5 +64,5 @@ index fd86e939b9..263fbabcd1 100644 end end -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch b/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch index ee605e58..2040cbc2 100644 --- a/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch +++ b/config/coreboot/default/patches/0002-lenovo-t400-Enable-all-SATA-ports.patch @@ -1,7 +1,7 @@ -From 8821f229d4fe48153ec7a45e0e04c3b2a3cd8c7c Mon Sep 17 00:00:00 2001 +From 7d2e54028f5558f0ccea5ecd8f5f812e28597a47 Mon Sep 17 00:00:00 2001 From: persmule <persmule@gmail.com> Date: Sun, 31 Oct 2021 23:33:26 +0000 -Subject: [PATCH 02/51] lenovo/t400: Enable all SATA ports +Subject: [PATCH 02/40] lenovo/t400: Enable all SATA ports There are 2 SATA ports on the chassis of t400(s), but at least one dock for t400 contains a port for (P/S)ATA device, and t400s has a eSATA port on its @@ -15,7 +15,7 @@ This patch unmasked all SATA ports found within t400s with factory firmware. 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/lenovo/t400/devicetree.cb b/src/mainboard/lenovo/t400/devicetree.cb -index 259c3e1b21..3d007533a4 100644 +index 9e056772e9..9361f330d2 100644 --- a/src/mainboard/lenovo/t400/devicetree.cb +++ b/src/mainboard/lenovo/t400/devicetree.cb @@ -46,8 +46,8 @@ chip northbridge/intel/gm45 @@ -30,5 +30,5 @@ index 259c3e1b21..3d007533a4 100644 register "sata_traffic_monitor" = "0" -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch b/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch index a4b430fe..89294d6f 100644 --- a/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch +++ b/config/coreboot/default/patches/0003-lenovo-x230-set-me_state-Disabled-in-cmos.default.patch @@ -1,7 +1,7 @@ -From 0298639b6e80c8950fbb4484180b7195883ab8c1 Mon Sep 17 00:00:00 2001 +From 61051fbf9f1da48932930b512527626d1cf5bfbd Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Mon, 3 Jan 2022 19:06:22 +0000 -Subject: [PATCH 03/51] lenovo/x230: set me_state=Disabled in cmos.default +Subject: [PATCH 03/40] lenovo/x230: set me_state=Disabled in cmos.default I only recently found out about this. It's possible to use me_cleaner to do the same thing, but some people might just flash coreboot and not do @@ -33,5 +33,5 @@ index 732e214b32..8454f0eac0 100644 -me_state=Normal +me_state=Disabled -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch b/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch index 71695404..7b2ceabd 100644 --- a/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch +++ b/config/coreboot/default/patches/0004-set-me_state-Disabled-on-all-cmos.default-files.patch @@ -1,7 +1,7 @@ -From c697c90ace86edfe724c86bd6a680cf0ae0e4b58 Mon Sep 17 00:00:00 2001 +From be0124d69fef77370eff57cfdfb2d6eae4b0cec3 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Wed, 2 Mar 2022 21:50:01 +0000 -Subject: [PATCH 04/51] set me_state=Disabled on all cmos.default files! +Subject: [PATCH 04/40] set me_state=Disabled on all cmos.default files! yeah. why the hell isn't this the default @@ -120,5 +120,5 @@ index d61046df6b..8c793fd1c3 100644 -me_state=Enable +me_state=Disabled -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch index b7b514cd..314c6932 100644 --- a/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch +++ b/config/coreboot/default/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch @@ -1,7 +1,7 @@ -From d2f579b82921c2c35e4cf756db0ca476fbadfac1 Mon Sep 17 00:00:00 2001 +From d97018fc490daf106582b0b7885a497cc2daba5a Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Sun, 19 Feb 2023 18:21:43 +0000 -Subject: [PATCH 05/51] util/ifdtool: add --nuke flag (all 0xFF on region) +Subject: [PATCH 05/40] util/ifdtool: add --nuke flag (all 0xFF on region) When this option is used, the region's contents are overwritten with all ones (0xFF). @@ -20,10 +20,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org> 1 file changed, 83 insertions(+), 31 deletions(-) diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c -index 32b2081d93..1473cf058b 100644 +index b21a89c0e1..fc91d4c239 100644 --- a/util/ifdtool/ifdtool.c +++ b/util/ifdtool/ifdtool.c -@@ -2204,6 +2204,7 @@ static void print_usage(const char *name) +@@ -2230,6 +2230,7 @@ static void print_usage(const char *name) " tgl - Tiger Lake\n" " wbg - Wellsburg\n" " -S | --setpchstrap Write a PCH strap\n" @@ -31,7 +31,7 @@ index 32b2081d93..1473cf058b 100644 " -V | --newvalue The new value to write into PCH strap specified by -S\n" " -v | --version: print the version\n" " -h | --help: print this help\n\n" -@@ -2212,6 +2213,60 @@ static void print_usage(const char *name) +@@ -2238,6 +2239,60 @@ static void print_usage(const char *name) "\n"); } @@ -92,15 +92,15 @@ index 32b2081d93..1473cf058b 100644 int main(int argc, char *argv[]) { int opt, option_index = 0; -@@ -2219,6 +2274,7 @@ int main(int argc, char *argv[]) +@@ -2245,6 +2300,7 @@ int main(int argc, char *argv[]) int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0; int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0; int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0; + int mode_nuke = 0; int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0; - char *region_type_string = NULL, *region_fname = NULL; - const char *layout_fname = NULL; -@@ -2254,6 +2310,7 @@ int main(int argc, char *argv[]) + char *region_type_string = NULL, *region_fname = NULL, *layout_fname = NULL; + char *new_filename = NULL; +@@ -2279,6 +2335,7 @@ int main(int argc, char *argv[]) {"validate", 0, NULL, 't'}, {"setpchstrap", 1, NULL, 'S'}, {"newvalue", 1, NULL, 'V'}, @@ -108,7 +108,7 @@ index 32b2081d93..1473cf058b 100644 {0, 0, 0, 0} }; -@@ -2303,35 +2360,8 @@ int main(int argc, char *argv[]) +@@ -2328,35 +2385,8 @@ int main(int argc, char *argv[]) region_fname++; // Descriptor, BIOS, ME, GbE, Platform // valid type? @@ -146,7 +146,7 @@ index 32b2081d93..1473cf058b 100644 fprintf(stderr, "No such region type: '%s'\n\n", region_type_string); fprintf(stderr, "run '%s -h' for usage\n", argv[0]); -@@ -2508,6 +2538,22 @@ int main(int argc, char *argv[]) +@@ -2533,6 +2563,22 @@ int main(int argc, char *argv[]) case 't': mode_validate = 1; break; @@ -169,7 +169,7 @@ index 32b2081d93..1473cf058b 100644 case 'v': print_version(); exit(EXIT_SUCCESS); -@@ -2524,7 +2570,8 @@ int main(int argc, char *argv[]) +@@ -2552,7 +2598,8 @@ int main(int argc, char *argv[]) if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject + mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 | mode_unlocked | mode_locked) + mode_altmedisable + mode_validate + @@ -179,7 +179,7 @@ index 32b2081d93..1473cf058b 100644 fprintf(stderr, "You may not specify more than one mode.\n\n"); fprintf(stderr, "run '%s -h' for usage\n", argv[0]); exit(EXIT_FAILURE); -@@ -2533,7 +2580,8 @@ int main(int argc, char *argv[]) +@@ -2561,7 +2608,8 @@ int main(int argc, char *argv[]) if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject + mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 + mode_locked + mode_unlocked + mode_density + mode_altmedisable + @@ -189,7 +189,7 @@ index 32b2081d93..1473cf058b 100644 fprintf(stderr, "You need to specify a mode.\n\n"); fprintf(stderr, "run '%s -h' for usage\n", argv[0]); exit(EXIT_FAILURE); -@@ -2646,6 +2694,10 @@ int main(int argc, char *argv[]) +@@ -2674,6 +2722,10 @@ int main(int argc, char *argv[]) write_image(new_filename, image, size); } @@ -201,5 +201,5 @@ index 32b2081d93..1473cf058b 100644 struct fpsba *fpsba = find_fpsba(image, size); struct fmsba *fmsba = find_fmsba(image, size); -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch b/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch index 71f2f22d..104df923 100644 --- a/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch +++ b/config/coreboot/default/patches/0006-mb-dell-e6400-Enable-01.0-device-in-devicetree-for-d.patch @@ -1,20 +1,20 @@ -From a5bc59037dabd95b6595c5aaf38b83da2a91de54 Mon Sep 17 00:00:00 2001 +From 1acdf1d0ff0c7a7ab5f2a0d7e5b57e21bdfaa1ae Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Sat, 6 May 2023 15:53:41 -0600 -Subject: [PATCH 06/51] mb/dell/e6400: Enable 01.0 device in devicetree for +Subject: [PATCH 06/40] mb/dell/e6400: Enable 01.0 device in devicetree for dGPU models Change-Id: I9b8e5d3cd1e1f64dc87b682b1e045b6342924aed Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> --- - src/mainboard/dell/e6400/devicetree.cb | 2 +- + src/mainboard/dell/gm45_latitude/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/src/mainboard/dell/e6400/devicetree.cb b/src/mainboard/dell/e6400/devicetree.cb -index bb954cbd7b..e9f3915d17 100644 ---- a/src/mainboard/dell/e6400/devicetree.cb -+++ b/src/mainboard/dell/e6400/devicetree.cb -@@ -19,7 +19,7 @@ chip northbridge/intel/gm45 +diff --git a/src/mainboard/dell/gm45_latitude/devicetree.cb b/src/mainboard/dell/gm45_latitude/devicetree.cb +index 5919803be2..76dae87153 100644 +--- a/src/mainboard/dell/gm45_latitude/devicetree.cb ++++ b/src/mainboard/dell/gm45_latitude/devicetree.cb +@@ -18,7 +18,7 @@ chip northbridge/intel/gm45 ops gm45_pci_domain_ops device pci 00.0 on end # host bridge @@ -24,5 +24,5 @@ index bb954cbd7b..e9f3915d17 100644 device pci 02.1 on end # Display device pci 03.0 on end # ME -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch index fa364ca1..e8c0f449 100644 --- a/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch +++ b/config/coreboot/default/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch @@ -1,7 +1,7 @@ -From f883599a362f1383f3712b72516f76187d0a9cbe Mon Sep 17 00:00:00 2001 +From aab9296997bd88a86bbb40079a9caf504db81cea Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Fri, 12 May 2023 19:55:15 -0600 -Subject: [PATCH 07/51] Remove warning for coreboot images built without a +Subject: [PATCH 07/40] Remove warning for coreboot images built without a payload I added this in upstream to prevent people from accidentally flashing @@ -35,5 +35,5 @@ index 5f988dac1b..516133880f 100644 -.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload +.PHONY: clean-payloads distclean-payloads print-repo-info-payloads -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0018-HACK-Disable-coreboot-related-BL31-features.patch b/config/coreboot/default/patches/0008-HACK-Disable-coreboot-related-BL31-features.patch index 9592215d..66043dc3 100644 --- a/config/coreboot/default/patches/0018-HACK-Disable-coreboot-related-BL31-features.patch +++ b/config/coreboot/default/patches/0008-HACK-Disable-coreboot-related-BL31-features.patch @@ -1,7 +1,7 @@ -From ec27f5414c78d493ec7be4cd055ac877ce9ea178 Mon Sep 17 00:00:00 2001 +From 319a77d9eeaaf1e344a380b1b449e6a56b3dc92c Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak <alpernebiyasak@gmail.com> Date: Thu, 22 Jun 2023 16:44:27 +0300 -Subject: [PATCH 18/51] HACK: Disable coreboot related BL31 features +Subject: [PATCH 08/40] HACK: Disable coreboot related BL31 features I don't know why, but removing this BL31 make argument lets gru-kevin power off properly when shut down from Linux. Needs investigation. @@ -10,10 +10,10 @@ power off properly when shut down from Linux. Needs investigation. 1 file changed, 3 deletions(-) diff --git a/src/arch/arm64/Makefile.mk b/src/arch/arm64/Makefile.mk -index cb43897efd..a9e5ff399a 100644 +index f54c6d22fc..b075abfd42 100644 --- a/src/arch/arm64/Makefile.mk +++ b/src/arch/arm64/Makefile.mk -@@ -173,9 +173,6 @@ BL31_MAKEARGS += LOG_LEVEL=40 +@@ -162,9 +162,6 @@ BL31_MAKEARGS += LOG_LEVEL=40 # Always enable crash reporting, even on a release build BL31_MAKEARGS += CRASH_REPORTING=1 @@ -24,5 +24,5 @@ index cb43897efd..a9e5ff399a 100644 BL31_MAKEARGS += BUILD_PLAT="$(BL31_BUILD)" -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0008-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch b/config/coreboot/default/patches/0008-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch deleted file mode 100644 index 48b9d21e..00000000 --- a/config/coreboot/default/patches/0008-mb-dell-Add-Latitude-E6530-Ivy-Bridge.patch +++ /dev/null @@ -1,430 +0,0 @@ -From 40545928c415c27d3a30748e4bfdee7f9d8f82f9 Mon Sep 17 00:00:00 2001 -From: Nicholas Chin <nic.c3.14@gmail.com> -Date: Sat, 19 Aug 2023 16:19:10 -0600 -Subject: [PATCH 08/51] mb/dell: Add Latitude E6530 (Ivy Bridge) - -Mainboard is QALA0/LA-7761P (UMA). The version with a Nvidia dGPU was -not tested. I do not physically have this system; someone with physical -access to one sent me the output of autoport which I then modified to -produce this port. - -I was also sent the vbios obtained using intel_bios_dumper while running -version A22 of the vendor firmware, which I then processed using -`intelvbttool --inoprom vbios.bin --outvbt data.vbt` to obtain data.vbt. - -This was originally tested and found to be working as a standalone board -port in Libreboot, though this variant based port in upstream coreboot -has not been tested. - -This can be internally flashed by sending a command to the EC, which -causes the EC to pull the FDO pin low and the firmware to skip setting -up any chipset based write protections [1]. The EC is the SMSC MEC5055, -which seems to be compatible with the existing MEC5035 code. - -[1] https://gitlab.com/nic3-14159/dell-flash-unlock - -Change-Id: I9fcd73416018574f8934962f92c8222d0101cb71 -Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> ---- - src/mainboard/dell/snb_ivb_latitude/Kconfig | 8 + - .../dell/snb_ivb_latitude/Kconfig.name | 3 + - .../snb_ivb_latitude/variants/e6530/data.vbt | Bin 0 -> 4280 bytes - .../variants/e6530/early_init.c | 14 ++ - .../snb_ivb_latitude/variants/e6530/gpio.c | 192 ++++++++++++++++++ - .../variants/e6530/hda_verb.c | 32 +++ - .../variants/e6530/overridetree.cb | 37 ++++ - 7 files changed, 286 insertions(+) - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/data.vbt - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/gpio.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6530/overridetree.cb - -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig -index be9ac37845..03377275f0 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig -@@ -23,6 +23,12 @@ config BOARD_DELL_LATITUDE_E6430 - select MAINBOARD_USES_IFD_GBE_REGION - select SOUTHBRIDGE_INTEL_C216 - -+config BOARD_DELL_LATITUDE_E6530 -+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON -+ select BOARD_ROMSIZE_KB_12288 -+ select MAINBOARD_USES_IFD_GBE_REGION -+ select SOUTHBRIDGE_INTEL_C216 -+ - if BOARD_DELL_SNB_IVB_LATITUDE_COMMON - - config DRAM_RESET_GATE_GPIO -@@ -33,6 +39,7 @@ config MAINBOARD_DIR - - config MAINBOARD_PART_NUMBER - default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430 -+ default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530 - - config OVERRIDE_DEVICETREE - default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" -@@ -42,6 +49,7 @@ config USBDEBUG_HCD_INDEX - - config VARIANT_DIR - default "e6430" if BOARD_DELL_LATITUDE_E6430 -+ default "e6530" if BOARD_DELL_LATITUDE_E6530 - - config VGA_BIOS_ID - default "8086,0166" -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -index 183252630a..d89185d670 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -@@ -2,3 +2,6 @@ - - config BOARD_DELL_LATITUDE_E6430 - bool "Latitude E6430" -+ -+config BOARD_DELL_LATITUDE_E6530 -+ bool "Latitude E6530" -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/data.vbt -new file mode 100644 -index 0000000000000000000000000000000000000000..af64a913d521fe240ce30e114e90fe75d3841bbc -GIT binary patch -literal 4280 -zcmdT{U2GiH75-*te`aTAcGqJQY$rA+e`ZbWcy_TDH@NC}cbl$*NjAn^RtPm->J7GV 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-zth4PnnWL*s%}k43fbe34>yaZ_2@Kj<UGt)`2G5>K>)nIBR-xB@+1PQ2*c$lV?Z13o -zbX%CHpm`!1Z4$d28~9k{rfu-0w@xg6{q!u2{)Dm_))4RK$?#7P*t7V+g_9d<V!MD` -zaj`t-?uy6zsjzp<-IdM6g(XhQX2iF<+p?Kmw6?a+f^VMex*PuetNfqf+4_FpD%8TW -eZvUbDHC^NLu5~gtzg|!EqSkX2ep9pg!tpEeo1jDh - -literal 0 -HcmV?d00001 - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c -new file mode 100644 -index 0000000000..ff83db095b ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/early_init.c -@@ -0,0 +1,14 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <bootblock_common.h> -+#include <device/pci_ops.h> -+#include <ec/dell/mec5035/mec5035.h> -+#include <southbridge/intel/bd82x6x/pch.h> -+ -+void bootblock_mainboard_early_init(void) -+{ -+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN -+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN -+ | COMB_LPC_EN | COMA_LPC_EN); -+ mec5035_early_init(); -+} -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/gpio.c -new file mode 100644 -index 0000000000..777570765a ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/gpio.c -@@ -0,0 +1,192 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <southbridge/intel/common/gpio.h> -+ -+static const struct pch_gpio_set1 pch_gpio_set1_mode = { -+ .gpio0 = GPIO_MODE_GPIO, -+ .gpio1 = GPIO_MODE_GPIO, -+ .gpio2 = GPIO_MODE_GPIO, -+ .gpio3 = GPIO_MODE_GPIO, -+ .gpio4 = GPIO_MODE_GPIO, -+ .gpio5 = GPIO_MODE_NATIVE, -+ .gpio6 = GPIO_MODE_GPIO, -+ .gpio7 = GPIO_MODE_GPIO, -+ .gpio8 = GPIO_MODE_GPIO, -+ .gpio9 = GPIO_MODE_NATIVE, -+ .gpio10 = GPIO_MODE_NATIVE, -+ .gpio11 = GPIO_MODE_NATIVE, -+ .gpio12 = GPIO_MODE_NATIVE, -+ .gpio13 = GPIO_MODE_GPIO, -+ .gpio14 = GPIO_MODE_GPIO, -+ .gpio15 = GPIO_MODE_GPIO, -+ .gpio16 = GPIO_MODE_GPIO, -+ .gpio17 = GPIO_MODE_GPIO, -+ .gpio18 = GPIO_MODE_NATIVE, -+ .gpio19 = GPIO_MODE_GPIO, -+ .gpio20 = GPIO_MODE_NATIVE, -+ .gpio21 = GPIO_MODE_GPIO, -+ .gpio22 = GPIO_MODE_GPIO, -+ .gpio23 = GPIO_MODE_NATIVE, -+ .gpio24 = GPIO_MODE_GPIO, -+ .gpio25 = GPIO_MODE_NATIVE, -+ .gpio26 = GPIO_MODE_NATIVE, -+ .gpio27 = GPIO_MODE_GPIO, -+ .gpio28 = GPIO_MODE_GPIO, -+ .gpio29 = GPIO_MODE_GPIO, -+ .gpio30 = GPIO_MODE_NATIVE, -+ .gpio31 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_direction = { -+ .gpio0 = GPIO_DIR_INPUT, -+ .gpio1 = GPIO_DIR_INPUT, -+ .gpio2 = GPIO_DIR_INPUT, -+ .gpio3 = GPIO_DIR_INPUT, -+ .gpio4 = GPIO_DIR_INPUT, -+ .gpio6 = GPIO_DIR_INPUT, -+ .gpio7 = GPIO_DIR_INPUT, -+ .gpio8 = GPIO_DIR_INPUT, -+ .gpio13 = GPIO_DIR_INPUT, -+ .gpio14 = GPIO_DIR_INPUT, -+ .gpio15 = GPIO_DIR_INPUT, -+ .gpio16 = GPIO_DIR_INPUT, -+ .gpio17 = GPIO_DIR_INPUT, -+ .gpio19 = GPIO_DIR_INPUT, -+ .gpio21 = GPIO_DIR_INPUT, -+ .gpio22 = GPIO_DIR_INPUT, -+ .gpio24 = GPIO_DIR_INPUT, -+ .gpio27 = GPIO_DIR_INPUT, -+ .gpio28 = GPIO_DIR_OUTPUT, -+ .gpio29 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_level = { -+ .gpio28 = GPIO_LEVEL_LOW, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_reset = { -+ .gpio30 = GPIO_RESET_RSMRST, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_invert = { -+ .gpio0 = GPIO_INVERT, -+ .gpio8 = GPIO_INVERT, -+ .gpio13 = GPIO_INVERT, -+ .gpio14 = GPIO_INVERT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_blink = { -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_mode = { -+ .gpio32 = GPIO_MODE_NATIVE, -+ .gpio33 = GPIO_MODE_GPIO, -+ .gpio34 = GPIO_MODE_GPIO, -+ .gpio35 = GPIO_MODE_GPIO, -+ .gpio36 = GPIO_MODE_GPIO, -+ .gpio37 = GPIO_MODE_GPIO, -+ .gpio38 = GPIO_MODE_GPIO, -+ .gpio39 = GPIO_MODE_GPIO, -+ .gpio40 = GPIO_MODE_NATIVE, -+ .gpio41 = GPIO_MODE_NATIVE, -+ .gpio42 = GPIO_MODE_NATIVE, -+ .gpio43 = GPIO_MODE_NATIVE, -+ .gpio44 = GPIO_MODE_NATIVE, -+ .gpio45 = GPIO_MODE_GPIO, -+ .gpio46 = GPIO_MODE_NATIVE, -+ .gpio47 = GPIO_MODE_NATIVE, -+ .gpio48 = GPIO_MODE_GPIO, -+ .gpio49 = GPIO_MODE_GPIO, -+ .gpio50 = GPIO_MODE_NATIVE, -+ .gpio51 = GPIO_MODE_GPIO, -+ .gpio52 = GPIO_MODE_GPIO, -+ .gpio53 = GPIO_MODE_NATIVE, -+ .gpio54 = GPIO_MODE_GPIO, -+ .gpio55 = GPIO_MODE_NATIVE, -+ .gpio56 = GPIO_MODE_NATIVE, -+ .gpio57 = GPIO_MODE_GPIO, -+ .gpio58 = GPIO_MODE_NATIVE, -+ .gpio59 = GPIO_MODE_NATIVE, -+ .gpio60 = GPIO_MODE_GPIO, -+ .gpio61 = GPIO_MODE_NATIVE, -+ .gpio62 = GPIO_MODE_NATIVE, -+ .gpio63 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_direction = { -+ .gpio33 = GPIO_DIR_INPUT, -+ .gpio34 = GPIO_DIR_OUTPUT, -+ .gpio35 = GPIO_DIR_INPUT, -+ .gpio36 = GPIO_DIR_INPUT, -+ .gpio37 = GPIO_DIR_INPUT, -+ .gpio38 = GPIO_DIR_INPUT, -+ .gpio39 = GPIO_DIR_INPUT, -+ .gpio45 = GPIO_DIR_OUTPUT, -+ .gpio48 = GPIO_DIR_INPUT, -+ .gpio49 = GPIO_DIR_INPUT, -+ .gpio51 = GPIO_DIR_INPUT, -+ .gpio52 = GPIO_DIR_INPUT, -+ .gpio54 = GPIO_DIR_INPUT, -+ .gpio57 = GPIO_DIR_INPUT, -+ .gpio60 = GPIO_DIR_OUTPUT, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_level = { -+ .gpio34 = GPIO_LEVEL_HIGH, -+ .gpio45 = GPIO_LEVEL_LOW, -+ .gpio60 = GPIO_LEVEL_HIGH, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_reset = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_mode = { -+ .gpio64 = GPIO_MODE_NATIVE, -+ .gpio65 = GPIO_MODE_NATIVE, -+ .gpio66 = GPIO_MODE_NATIVE, -+ .gpio67 = GPIO_MODE_NATIVE, -+ .gpio68 = GPIO_MODE_GPIO, -+ .gpio69 = GPIO_MODE_GPIO, -+ .gpio70 = GPIO_MODE_GPIO, -+ .gpio71 = GPIO_MODE_GPIO, -+ .gpio72 = GPIO_MODE_NATIVE, -+ .gpio73 = GPIO_MODE_NATIVE, -+ .gpio74 = GPIO_MODE_NATIVE, -+ .gpio75 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_direction = { -+ .gpio68 = GPIO_DIR_INPUT, -+ .gpio69 = GPIO_DIR_INPUT, -+ .gpio70 = GPIO_DIR_INPUT, -+ .gpio71 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_level = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_reset = { -+}; -+ -+const struct pch_gpio_map mainboard_gpio_map = { -+ .set1 = { -+ .mode = &pch_gpio_set1_mode, -+ .direction = &pch_gpio_set1_direction, -+ .level = &pch_gpio_set1_level, -+ .blink = &pch_gpio_set1_blink, -+ .invert = &pch_gpio_set1_invert, -+ .reset = &pch_gpio_set1_reset, -+ }, -+ .set2 = { -+ .mode = &pch_gpio_set2_mode, -+ .direction = &pch_gpio_set2_direction, -+ .level = &pch_gpio_set2_level, -+ .reset = &pch_gpio_set2_reset, -+ }, -+ .set3 = { -+ .mode = &pch_gpio_set3_mode, -+ .direction = &pch_gpio_set3_direction, -+ .level = &pch_gpio_set3_level, -+ .reset = &pch_gpio_set3_reset, -+ }, -+}; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c -new file mode 100644 -index 0000000000..3ebccff81d ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/hda_verb.c -@@ -0,0 +1,32 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <device/azalia_device.h> -+ -+const u32 cim_verb_data[] = { -+ 0x111d76df, /* Codec Vendor / Device ID: IDT */ -+ 0x10280535, /* Subsystem ID */ -+ 11, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(0, 0x10280535), -+ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020), -+ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f), -+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110), -+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050), -+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), -+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3), -+ AZALIA_PIN_CFG(0, 0x11, 0xd5a30130), -+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x20, 0x400000f0), -+ -+ 0x80862806, /* Codec Vendor / Device ID: Intel */ -+ 0x80860101, /* Subsystem ID */ -+ 4, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(3, 0x80860101), -+ AZALIA_PIN_CFG(3, 0x05, 0x18560010), -+ AZALIA_PIN_CFG(3, 0x06, 0x18560020), -+ AZALIA_PIN_CFG(3, 0x07, 0x18560030), -+}; -+ -+const u32 pc_beep_verbs[0] = {}; -+ -+AZALIA_ARRAY_SIZES; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6530/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/overridetree.cb -new file mode 100644 -index 0000000000..8b9c82fba4 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6530/overridetree.cb -@@ -0,0 +1,37 @@ -+## SPDX-License-Identifier: GPL-2.0-or-later -+ -+chip northbridge/intel/sandybridge -+ device domain 0 on -+ subsystemid 0x1028 0x0535 inherit -+ -+ device ref igd on -+ register "gpu_cpu_backlight" = "0x00000251" -+ register "gpu_pch_backlight" = "0x13121312" -+ end -+ -+ chip southbridge/intel/bd82x6x -+ register "usb_port_config" = "{ -+ { 1, 1, 0 }, -+ { 1, 1, 0 }, -+ { 1, 1, 1 }, -+ { 1, 1, 1 }, -+ { 1, 1, 2 }, -+ { 1, 1, 2 }, -+ { 1, 0, 3 }, -+ { 1, 1, 3 }, -+ { 1, 1, 4 }, -+ { 1, 1, 4 }, -+ { 1, 1, 5 }, -+ { 1, 1, 5 }, -+ { 1, 2, 6 }, -+ { 1, 2, 6 }, -+ }" -+ -+ device ref xhci on -+ register "superspeed_capable_ports" = "0x0000000f" -+ register "xhci_overcurrent_mapping" = "0x00000c03" -+ register "xhci_switchable_ports" = "0x0000000f" -+ end -+ end -+ end -+end --- -2.39.5 - diff --git a/config/coreboot/default/patches/0019-dell-e6430-use-ME-Soft-Temporary-Disable.patch b/config/coreboot/default/patches/0009-dell-e6430-use-ME-Soft-Temporary-Disable.patch index b3d2d12c..5ffd4431 100644 --- a/config/coreboot/default/patches/0019-dell-e6430-use-ME-Soft-Temporary-Disable.patch +++ b/config/coreboot/default/patches/0009-dell-e6430-use-ME-Soft-Temporary-Disable.patch @@ -1,7 +1,7 @@ -From a15b59616e00c43c05d7853080859d4aefe26c5d Mon Sep 17 00:00:00 2001 +From d9066d7f51d5742ae8ed1c7ab096ee857358cc48 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 11:41:41 +0000 -Subject: [PATCH 19/51] dell/e6430: use ME Soft Temporary Disable +Subject: [PATCH 09/40] dell/e6430: use ME Soft Temporary Disable i overlooked this. it's set on other boards. @@ -26,5 +26,5 @@ index 2a5b30f2b7..279415dfd1 100644 -me_state=Normal +me_state=Disabled -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0009-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch b/config/coreboot/default/patches/0009-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch deleted file mode 100644 index a2a13166..00000000 --- a/config/coreboot/default/patches/0009-mb-dell-Add-Latitude-E5530-Ivy-Bridge.patch +++ /dev/null @@ -1,430 +0,0 @@ -From 423e2e28618b08a4107aea0a2fbc1096f5a8be02 Mon Sep 17 00:00:00 2001 -From: Nicholas Chin <nic.c3.14@gmail.com> -Date: Wed, 31 Jan 2024 22:57:07 -0700 -Subject: [PATCH 09/51] mb/dell: Add Latitude E5530 (Ivy Bridge) - -Mainboard is QXW10/LA-7902P (UMA). I do not physically have this board; -someone with physical access to one sent me the output of autoport which -I then modified to produce this port. I was also sent the VBT binary, -which was obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running -version A21 of the vendor firmware. - -This was originally tested and found to be working as a standalone board -port in Libreboot, but this variant based port in upstream coreboot has -not been tested. - -This can be internally flashed by sending a command to the EC, which -causes the EC to pull the FDO pin low and the firmware to skip setting -up any chipset based write protections [1]. The EC is the SMSC MEC5055, -which seems to be compatible with the existing MEC5035 code. - -Change-Id: Idaf6618df70aa19d8e60b2263088737712dec5f0 -Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> ---- - src/mainboard/dell/snb_ivb_latitude/Kconfig | 7 + - .../dell/snb_ivb_latitude/Kconfig.name | 3 + - .../snb_ivb_latitude/variants/e5530/data.vbt | Bin 0 -> 6144 bytes - .../variants/e5530/early_init.c | 14 ++ - .../snb_ivb_latitude/variants/e5530/gpio.c | 194 ++++++++++++++++++ - .../variants/e5530/hda_verb.c | 32 +++ - .../variants/e5530/overridetree.cb | 39 ++++ - 7 files changed, 289 insertions(+) - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/data.vbt - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/gpio.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5530/overridetree.cb - -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig -index 03377275f0..183a67bec3 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig -@@ -17,6 +17,11 @@ config BOARD_DELL_SNB_IVB_LATITUDE_COMMON - select SYSTEM_TYPE_LAPTOP - select USE_NATIVE_RAMINIT - -+config BOARD_DELL_LATITUDE_E5530 -+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON -+ select BOARD_ROMSIZE_KB_12288 -+ select SOUTHBRIDGE_INTEL_C216 -+ - config BOARD_DELL_LATITUDE_E6430 - select BOARD_DELL_SNB_IVB_LATITUDE_COMMON - select BOARD_ROMSIZE_KB_12288 -@@ -38,6 +43,7 @@ config MAINBOARD_DIR - default "dell/snb_ivb_latitude" - - config MAINBOARD_PART_NUMBER -+ default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530 - default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430 - default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530 - -@@ -48,6 +54,7 @@ config USBDEBUG_HCD_INDEX - default 2 - - config VARIANT_DIR -+ default "e5530" if BOARD_DELL_LATITUDE_E5530 - default "e6430" if BOARD_DELL_LATITUDE_E6430 - default "e6530" if BOARD_DELL_LATITUDE_E6530 - -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -index d89185d670..c15ef4028f 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -@@ -1,5 +1,8 @@ - ## SPDX-License-Identifier: GPL-2.0-only - -+config BOARD_DELL_LATITUDE_E5530 -+ bool "Latitude E5530" -+ - config BOARD_DELL_LATITUDE_E6430 - bool "Latitude E6430" - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/data.vbt -new file mode 100644 -index 0000000000000000000000000000000000000000..3c54b70be7856a6420d001112d7f17f8bab46ed3 -GIT binary patch -literal 6144 -zcmeHKU2Gdg5dO}0w$JA~+qs02q)iz56C9e5vuQ#oL0l3O+%|395Q2peO{y4(2uX0t -zuMja1N)bPb1cE+5)fYsCK!89MFQAGChyWpk5PuR<K|G+sLmxmOR4}u5=Rg`mj70g7 -zvgdDic6N4dW^QKhynd)>kS^cR)3#-(r*-?zo-O^C(kLvv8XM<+Y3tdt^YY!P?!oTe -zJ^ed-x6w0Lh5fN#jsv5TWE#mtd*_yky}9xDK(kOwLt+C7_AQAd#iwr=o0`gvQZ`{x -z6ZeT`x^^;8+a~jSa^o~PF@8J6N5;o#dhCwebaM;!_oisw1#O9K={qQM<@Oeu$lXeN -z#wJGcW4Y<2)-A{Bot(NoKX%>qdnw-AOi9bKT9Z~HL5|7PJDHz4kGlEx143q+26EH6 -z{4KfB^9;?<fTOaiNPy%=@LovL&q<^d1Qdi+Xex9SvIM^ZLq%9cP{A1rE>#dw(WfA; -zBCR3@pCS1a;A|CZW1h7H*l#mW{%y{bf)9ofiz!EHzyiac@{RpMzz>O-<~{hx5tw%b -z3ZJWD4_g-`iF`tUJb}+Vfe;XI1T2Y4_Y!iVk<<T4ce(^PWKh<?N^a`t+}vgNr25iZ -z`!fTBL)ojYF5G?3y|eW=`9>MLB9et&!A7LDDE7&5ye#|hn%s#IWgagDEPNHHMUhb- -ztc9t?uz{bD#kh#kpsE;AO-wWHV?4olPStRPag^~k<737bjBgm<GlC%vRgBe)4U9I% -zg^XUtcE**A5ylOSn;A2V2N;hso?--U#>t|ufS}_`LGs2bcSKCVBh4s0>G7ZR_@NWx -zkph}GhP}~YR?roT!61GqzQ?gBsuv3jY}UXbmr|alv^VxUqbz5<`5=!hhpaa*7DK~4 -zP4ad6dhH!>nYpc4{J&G-w{UiWo$zXnTz{tAq0|?c_`QJ7pKmCwIpe7Uix$P?9}v*1 -z(aVR6OkMkQ6oM}*UC@j78!~>7=OZCVYXeu|u0SiI4}w$uw6&0P09LF%Hp}O&IA3gl -z4@ap0NfAe+q(ZVm{Bwe*Do~kbCc$Q!x7b3Sk9tLgVmsR<Q4H=9Nl;mmf2xpY<*d*- -z`yI_BR#`La=Oxxt#qgS`3pER^nh^CZ%*qlq2N9@uSAtz-C7AhduB_U|{>#oOrY`tq -z%|?L!zRd2-$V6^@$H<Mj3MXf#F<J+^8%<X2{tnmQTI*aK*ageBrm9^|<Ked3j_s;% -zva<(Dob)BOwdcj8Z67UhYUAjbk==Of9W#D7k!DJobLx$$fXD_wuZyD&Kk-$EIY~S` -zan1ANbFUW8hZ0pUw5)y??*}!;chdgq|0X5;s;m`@YdY{zs4z#z8e;13T6b4tC7gy$ -zTwszEQhk0!U$`3=Qi)ZbY^*|bAyvF>@ml^iaX;uzoVB3JA(|h9tcNKXHdA43N0|18 -z&3$2QE=)(l=6qQDAWT1oO-<KoblR+&{kk@!)1A8ch^`&b>2=+FU)Mg<35IDJ+8Tp; -z40F)Xt}$rVFdsLxLk7KRn4cKhmj<a3vp%A&kI>eLd38j)HbM_Y%!3i_aD?8An8za8 -z@d(AD=Gv&%5;e{}p%i?_q(T*^IwzEx*Eu1wKHV9=lVUvjqv!B@cWER!2fe%`IqO?q -z!=Wf4kzGUaLX8`m#*P^uL?%M#6qc9Qu(YT|ZMb#7UzCc_(DkQYEG<G&Q*QkX`CS`I -z8cwQnl8A#CMH~W79L&{2*Jof_MD5t{bPTAszWUa20yPzD=*wW8)wHSu?avDhffu^! -zL>Q#%k_O0@^DN5S@MXi$D;acJ>#cTV-(U@Offv4ACp4hO4$Ll!WO)s3P4=t9vpWBC -zSckhlcD?xUuX=Gx96Dx{IsQ23r&;o1*+^Cp2RA3nd$A-RIHP2Q7uitC>c67FIR*5} -zB3a%B!?6K=TJ$W+SJv@*9Lms{mTvWmU4Zanj_Z*lSqOGISzYp?yawOqLhVhRt#-E6 -zd)YW~h&meh-5prIE}Cr&7f?MMi&cqTt_^%Fa?>k(=`9jVoIf@}{g+WX#TpWuc+!2v -zPG^>A|NZ2GlGsKdGqN{7>Fr7+Hc_^3z}uBhC4?nzOQ*!QyVugGjkK_~$bvtfY`h79 -z9rOI3;Mt}9)_G{zXTAPw`8T@6=Ut0r9R5;0#Zy|#8F;v4^UAmqft3iXL|`QXD-l?U -Jz~2*rUjdP?m;3+# - -literal 0 -HcmV?d00001 - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c -new file mode 100644 -index 0000000000..ff83db095b ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/early_init.c -@@ -0,0 +1,14 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <bootblock_common.h> -+#include <device/pci_ops.h> -+#include <ec/dell/mec5035/mec5035.h> -+#include <southbridge/intel/bd82x6x/pch.h> -+ -+void bootblock_mainboard_early_init(void) -+{ -+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN -+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN -+ | COMB_LPC_EN | COMA_LPC_EN); -+ mec5035_early_init(); -+} -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/gpio.c -new file mode 100644 -index 0000000000..0599f13921 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/gpio.c -@@ -0,0 +1,194 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <southbridge/intel/common/gpio.h> -+ -+static const struct pch_gpio_set1 pch_gpio_set1_mode = { -+ .gpio0 = GPIO_MODE_GPIO, -+ .gpio1 = GPIO_MODE_GPIO, -+ .gpio2 = GPIO_MODE_GPIO, -+ .gpio3 = GPIO_MODE_GPIO, -+ .gpio4 = GPIO_MODE_GPIO, -+ .gpio5 = GPIO_MODE_NATIVE, -+ .gpio6 = GPIO_MODE_GPIO, -+ .gpio7 = GPIO_MODE_GPIO, -+ .gpio8 = GPIO_MODE_GPIO, -+ .gpio9 = GPIO_MODE_NATIVE, -+ .gpio10 = GPIO_MODE_NATIVE, -+ .gpio11 = GPIO_MODE_NATIVE, -+ .gpio12 = GPIO_MODE_GPIO, -+ .gpio13 = GPIO_MODE_GPIO, -+ .gpio14 = GPIO_MODE_GPIO, -+ .gpio15 = GPIO_MODE_GPIO, -+ .gpio16 = GPIO_MODE_GPIO, -+ .gpio17 = GPIO_MODE_GPIO, -+ .gpio18 = GPIO_MODE_NATIVE, -+ .gpio19 = GPIO_MODE_GPIO, -+ .gpio20 = GPIO_MODE_NATIVE, -+ .gpio21 = GPIO_MODE_GPIO, -+ .gpio22 = GPIO_MODE_GPIO, -+ .gpio23 = GPIO_MODE_NATIVE, -+ .gpio24 = GPIO_MODE_GPIO, -+ .gpio25 = GPIO_MODE_NATIVE, -+ .gpio26 = GPIO_MODE_NATIVE, -+ .gpio27 = GPIO_MODE_GPIO, -+ .gpio28 = GPIO_MODE_GPIO, -+ .gpio29 = GPIO_MODE_GPIO, -+ .gpio30 = GPIO_MODE_NATIVE, -+ .gpio31 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_direction = { -+ .gpio0 = GPIO_DIR_INPUT, -+ .gpio1 = GPIO_DIR_INPUT, -+ .gpio2 = GPIO_DIR_INPUT, -+ .gpio3 = GPIO_DIR_INPUT, -+ .gpio4 = GPIO_DIR_INPUT, -+ .gpio6 = GPIO_DIR_INPUT, -+ .gpio7 = GPIO_DIR_INPUT, -+ .gpio8 = GPIO_DIR_INPUT, -+ .gpio12 = GPIO_DIR_OUTPUT, -+ .gpio13 = GPIO_DIR_INPUT, -+ .gpio14 = GPIO_DIR_INPUT, -+ .gpio15 = GPIO_DIR_INPUT, -+ .gpio16 = GPIO_DIR_INPUT, -+ .gpio17 = GPIO_DIR_INPUT, -+ .gpio19 = GPIO_DIR_INPUT, -+ .gpio21 = GPIO_DIR_INPUT, -+ .gpio22 = GPIO_DIR_INPUT, -+ .gpio24 = GPIO_DIR_INPUT, -+ .gpio27 = GPIO_DIR_INPUT, -+ .gpio28 = GPIO_DIR_OUTPUT, -+ .gpio29 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_level = { -+ .gpio12 = GPIO_LEVEL_HIGH, -+ .gpio28 = GPIO_LEVEL_LOW, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_reset = { -+ .gpio30 = GPIO_RESET_RSMRST, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_invert = { -+ .gpio0 = GPIO_INVERT, -+ .gpio8 = GPIO_INVERT, -+ .gpio13 = GPIO_INVERT, -+ .gpio14 = GPIO_INVERT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_blink = { -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_mode = { -+ .gpio32 = GPIO_MODE_NATIVE, -+ .gpio33 = GPIO_MODE_GPIO, -+ .gpio34 = GPIO_MODE_GPIO, -+ .gpio35 = GPIO_MODE_GPIO, -+ .gpio36 = GPIO_MODE_GPIO, -+ .gpio37 = GPIO_MODE_GPIO, -+ .gpio38 = GPIO_MODE_GPIO, -+ .gpio39 = GPIO_MODE_GPIO, -+ .gpio40 = GPIO_MODE_NATIVE, -+ .gpio41 = GPIO_MODE_NATIVE, -+ .gpio42 = GPIO_MODE_NATIVE, -+ .gpio43 = GPIO_MODE_NATIVE, -+ .gpio44 = GPIO_MODE_NATIVE, -+ .gpio45 = GPIO_MODE_GPIO, -+ .gpio46 = GPIO_MODE_NATIVE, -+ .gpio47 = GPIO_MODE_NATIVE, -+ .gpio48 = GPIO_MODE_GPIO, -+ .gpio49 = GPIO_MODE_GPIO, -+ .gpio50 = GPIO_MODE_NATIVE, -+ .gpio51 = GPIO_MODE_GPIO, -+ .gpio52 = GPIO_MODE_GPIO, -+ .gpio53 = GPIO_MODE_GPIO, -+ .gpio54 = GPIO_MODE_GPIO, -+ .gpio55 = GPIO_MODE_NATIVE, -+ .gpio56 = GPIO_MODE_NATIVE, -+ .gpio57 = GPIO_MODE_GPIO, -+ .gpio58 = GPIO_MODE_NATIVE, -+ .gpio59 = GPIO_MODE_NATIVE, -+ .gpio60 = GPIO_MODE_GPIO, -+ .gpio61 = GPIO_MODE_NATIVE, -+ .gpio62 = GPIO_MODE_NATIVE, -+ .gpio63 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_direction = { -+ .gpio33 = GPIO_DIR_INPUT, -+ .gpio34 = GPIO_DIR_INPUT, -+ .gpio35 = GPIO_DIR_INPUT, -+ .gpio36 = GPIO_DIR_INPUT, -+ .gpio37 = GPIO_DIR_INPUT, -+ .gpio38 = GPIO_DIR_INPUT, -+ .gpio39 = GPIO_DIR_INPUT, -+ .gpio45 = GPIO_DIR_INPUT, -+ .gpio48 = GPIO_DIR_INPUT, -+ .gpio49 = GPIO_DIR_INPUT, -+ .gpio51 = GPIO_DIR_INPUT, -+ .gpio52 = GPIO_DIR_INPUT, -+ .gpio53 = GPIO_DIR_INPUT, -+ .gpio54 = GPIO_DIR_INPUT, -+ .gpio57 = GPIO_DIR_INPUT, -+ .gpio60 = GPIO_DIR_OUTPUT, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_level = { -+ .gpio60 = GPIO_LEVEL_HIGH, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_reset = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_mode = { -+ .gpio64 = GPIO_MODE_NATIVE, -+ .gpio65 = GPIO_MODE_NATIVE, -+ .gpio66 = GPIO_MODE_NATIVE, -+ .gpio67 = GPIO_MODE_NATIVE, -+ .gpio68 = GPIO_MODE_GPIO, -+ .gpio69 = GPIO_MODE_GPIO, -+ .gpio70 = GPIO_MODE_GPIO, -+ .gpio71 = GPIO_MODE_GPIO, -+ .gpio72 = GPIO_MODE_NATIVE, -+ .gpio73 = GPIO_MODE_NATIVE, -+ .gpio74 = GPIO_MODE_GPIO, -+ .gpio75 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_direction = { -+ .gpio68 = GPIO_DIR_INPUT, -+ .gpio69 = GPIO_DIR_INPUT, -+ .gpio70 = GPIO_DIR_INPUT, -+ .gpio71 = GPIO_DIR_INPUT, -+ .gpio74 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_level = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_reset = { -+}; -+ -+const struct pch_gpio_map mainboard_gpio_map = { -+ .set1 = { -+ .mode = &pch_gpio_set1_mode, -+ .direction = &pch_gpio_set1_direction, -+ .level = &pch_gpio_set1_level, -+ .blink = &pch_gpio_set1_blink, -+ .invert = &pch_gpio_set1_invert, -+ .reset = &pch_gpio_set1_reset, -+ }, -+ .set2 = { -+ .mode = &pch_gpio_set2_mode, -+ .direction = &pch_gpio_set2_direction, -+ .level = &pch_gpio_set2_level, -+ .reset = &pch_gpio_set2_reset, -+ }, -+ .set3 = { -+ .mode = &pch_gpio_set3_mode, -+ .direction = &pch_gpio_set3_direction, -+ .level = &pch_gpio_set3_level, -+ .reset = &pch_gpio_set3_reset, -+ }, -+}; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c -new file mode 100644 -index 0000000000..3e89a6d75f ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/hda_verb.c -@@ -0,0 +1,32 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <device/azalia_device.h> -+ -+const u32 cim_verb_data[] = { -+ 0x111d76df, /* Codec Vendor / Device ID: IDT */ -+ 0x1028053d, /* Subsystem ID */ -+ 11, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(0, 0x1028053d), -+ AZALIA_PIN_CFG(0, 0x0a, 0x04a11020), -+ AZALIA_PIN_CFG(0, 0x0b, 0x0421101f), -+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110), -+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050), -+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), -+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3), -+ AZALIA_PIN_CFG(0, 0x11, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x20, 0xd5a301a0), -+ -+ 0x80862806, /* Codec Vendor / Device ID: Intel */ -+ 0x80860101, /* Subsystem ID */ -+ 4, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(3, 0x80860101), -+ AZALIA_PIN_CFG(3, 0x05, 0x18560010), -+ AZALIA_PIN_CFG(3, 0x06, 0x18560020), -+ AZALIA_PIN_CFG(3, 0x07, 0x18560030), -+}; -+ -+const u32 pc_beep_verbs[0] = {}; -+ -+AZALIA_ARRAY_SIZES; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5530/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/overridetree.cb -new file mode 100644 -index 0000000000..85c448d010 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5530/overridetree.cb -@@ -0,0 +1,39 @@ -+## SPDX-License-Identifier: GPL-2.0-or-later -+ -+chip northbridge/intel/sandybridge -+ device domain 0 on -+ subsystemid 0x1028 0x053d inherit -+ -+ device ref igd on -+ register "gpu_cpu_backlight" = "0x00000000" -+ register "gpu_pch_backlight" = "0x03d003d0" -+ end -+ -+ chip southbridge/intel/bd82x6x -+ register "usb_port_config" = "{ -+ { 1, 1, 0 }, -+ { 1, 1, 0 }, -+ { 1, 1, 1 }, -+ { 1, 1, 1 }, -+ { 1, 1, 2 }, -+ { 1, 1, 2 }, -+ { 1, 1, 3 }, -+ { 1, 0, 3 }, -+ { 1, 2, 4 }, -+ { 1, 1, 4 }, -+ { 1, 1, 5 }, -+ { 1, 1, 5 }, -+ { 1, 0, 6 }, -+ { 1, 1, 6 }, -+ }" -+ -+ device ref xhci on -+ register "superspeed_capable_ports" = "0x0000000f" -+ register "xhci_overcurrent_mapping" = "0x00000c03" -+ register "xhci_switchable_ports" = "0x0000000f" -+ end -+ device ref gbe off end -+ device ref pcie_rp7 on end # BCM5761 Ethernet -+ end -+ end -+end --- -2.39.5 - diff --git a/config/coreboot/default/patches/0010-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch b/config/coreboot/default/patches/0010-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch deleted file mode 100644 index 80b2c147..00000000 --- a/config/coreboot/default/patches/0010-mb-dell-Add-Latitude-E6420-Sandy-Bridge.patch +++ /dev/null @@ -1,435 +0,0 @@ -From 200668a694f1c534a94a0bc8996416e246fe91b0 Mon Sep 17 00:00:00 2001 -From: Nicholas Chin <nic.c3.14@gmail.com> -Date: Sun, 26 Nov 2023 17:08:52 -0700 -Subject: [PATCH 10/51] mb/dell: Add Latitude E6420 (Sandy Bridge) - -Mainboard is PAL50/LA-6591P (UMA). The version with an Nvidia dGPU was -not tested. I do not physically have this system; someone with physical -access to one sent me the output of autoport which I then modified to -produce this port. I was also sent the VBT binary, which was obtained -from `/sys/kernel/debug/dri/0/i915_vbt` while running version A25 of the -vendor firmware. - -This was originally tested and found to be working as a standalone board -port in Libreboot, but this variant based port in upstream coreboot has -not been tested. - -This can be internally flashed by sending a command to the EC, which -causes the EC to pull the FDO pin low and the firmware to skip setting -up any chipset based write protections [1]. The EC is the SMSC MEC5055, -which seems to be compatible with the existing MEC5035 code. - -[1] https://gitlab.com/nic3-14159/dell-flash-unlock - -Change-Id: Ic48d9ea58172a5b13958c8afebcb19c8929c4394 -Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> ---- - src/mainboard/dell/snb_ivb_latitude/Kconfig | 13 +- - .../dell/snb_ivb_latitude/Kconfig.name | 3 + - .../snb_ivb_latitude/variants/e6420/data.vbt | Bin 0 -> 6144 bytes - .../variants/e6420/early_init.c | 14 ++ - .../snb_ivb_latitude/variants/e6420/gpio.c | 191 ++++++++++++++++++ - .../variants/e6420/hda_verb.c | 32 +++ - .../variants/e6420/overridetree.cb | 35 ++++ - 7 files changed, 287 insertions(+), 1 deletion(-) - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/data.vbt - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/early_init.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/gpio.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6420/overridetree.cb - -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig -index 183a67bec3..d2786970ee 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig -@@ -17,6 +17,12 @@ config BOARD_DELL_SNB_IVB_LATITUDE_COMMON - select SYSTEM_TYPE_LAPTOP - select USE_NATIVE_RAMINIT - -+config BOARD_DELL_LATITUDE_E6420 -+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON -+ select BOARD_ROMSIZE_KB_10240 -+ select MAINBOARD_USES_IFD_GBE_REGION -+ select SOUTHBRIDGE_INTEL_BD82X6X -+ - config BOARD_DELL_LATITUDE_E5530 - select BOARD_DELL_SNB_IVB_LATITUDE_COMMON - select BOARD_ROMSIZE_KB_12288 -@@ -43,6 +49,7 @@ config MAINBOARD_DIR - default "dell/snb_ivb_latitude" - - config MAINBOARD_PART_NUMBER -+ default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420 - default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530 - default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430 - default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530 -@@ -54,11 +61,15 @@ config USBDEBUG_HCD_INDEX - default 2 - - config VARIANT_DIR -+ default "e6420" if BOARD_DELL_LATITUDE_E6420 - default "e5530" if BOARD_DELL_LATITUDE_E5530 - default "e6430" if BOARD_DELL_LATITUDE_E6430 - default "e6530" if BOARD_DELL_LATITUDE_E6530 - - config VGA_BIOS_ID -- default "8086,0166" -+ default "8086,0166" if BOARD_DELL_LATITUDE_E5530 -+ default "8086,0126" if BOARD_DELL_LATITUDE_E6420 -+ default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \ -+ || BOARD_DELL_LATITUDE_E6530 - - endif -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -index c15ef4028f..257d428a70 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -@@ -1,5 +1,8 @@ - ## SPDX-License-Identifier: GPL-2.0-only - -+config BOARD_DELL_LATITUDE_E6420 -+ bool "Latitude E6420" -+ - config BOARD_DELL_LATITUDE_E5530 - bool "Latitude E5530" - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/data.vbt -new file mode 100644 -index 0000000000000000000000000000000000000000..d3662eea1bc78b60be6d0bd2cc38bb46b654afbd -GIT binary patch -literal 6144 -zcmeHKeQZ-z6hE);wSBvNZ|mO1=*HLC2BQN8uVX6{N9eY)75ORymb$R8!YYuAZEgeE -zKk|S@Fen*n41W-viAF;r%)~^EkpLz-B{2q##)LmGAtoY;7*Qhv_1yPbw$TC$2}G0K -z=6Ao&x#ym9?z!i_&TOh(kLzky2cN8MTpny#R<;VU4Rkn?rBIz(YL~BBw<%b&zGhSH -z$~AQ>@D0d=Xx6RE0BwSxspWdrW9y<FZGD@&x3_JL;p$p!;!BVdcKLkht0=-%(Jj&T -z_GkyztZ%>#t7^)^(T-R<7W?O6ZTI%A+j=`<Jw3Q%dk6N!da<_?7oyiU3)^<~_TiSk -zE$y+=RK3PGQ`gzmXYPRBx>C|f*UP9{h|4>ANrAe~?ymV*)83AaT#FuTjP=C2cg5P~ -zt4w78r$t#300cWY_k)mevmAmFI3&oBfytoAAPQiYK$XEIgHwV@5-gJ-Q-*p8yfTDj -zaDz=1Y!X1B3`OpQ&Ik}bM|0xHn0gYNZw0rT=7AXS2in-q8K^?)0|el+Z6geW7i7MM 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SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <bootblock_common.h> -+#include <device/pci_ops.h> -+#include <ec/dell/mec5035/mec5035.h> -+#include <southbridge/intel/bd82x6x/pch.h> -+ -+void bootblock_mainboard_early_init(void) -+{ -+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN -+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN -+ | COMB_LPC_EN | COMA_LPC_EN); -+ mec5035_early_init(); -+} -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/gpio.c -new file mode 100644 -index 0000000000..943c743f48 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/gpio.c -@@ -0,0 +1,191 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <southbridge/intel/common/gpio.h> -+ -+static const struct pch_gpio_set1 pch_gpio_set1_mode = { -+ .gpio0 = GPIO_MODE_GPIO, -+ .gpio1 = GPIO_MODE_NATIVE, -+ .gpio2 = GPIO_MODE_GPIO, -+ .gpio3 = GPIO_MODE_NATIVE, -+ .gpio4 = GPIO_MODE_GPIO, -+ .gpio5 = GPIO_MODE_NATIVE, -+ .gpio6 = GPIO_MODE_GPIO, -+ .gpio7 = GPIO_MODE_GPIO, -+ .gpio8 = GPIO_MODE_GPIO, -+ .gpio9 = GPIO_MODE_NATIVE, -+ .gpio10 = GPIO_MODE_NATIVE, -+ .gpio11 = GPIO_MODE_NATIVE, -+ .gpio12 = GPIO_MODE_NATIVE, -+ .gpio13 = GPIO_MODE_GPIO, -+ .gpio14 = GPIO_MODE_GPIO, -+ .gpio15 = GPIO_MODE_GPIO, -+ .gpio16 = GPIO_MODE_GPIO, -+ .gpio17 = GPIO_MODE_GPIO, -+ .gpio18 = GPIO_MODE_NATIVE, -+ .gpio19 = GPIO_MODE_GPIO, -+ .gpio20 = GPIO_MODE_NATIVE, -+ .gpio21 = GPIO_MODE_GPIO, -+ .gpio22 = GPIO_MODE_GPIO, -+ .gpio23 = GPIO_MODE_NATIVE, -+ .gpio24 = GPIO_MODE_GPIO, -+ .gpio25 = GPIO_MODE_NATIVE, -+ .gpio26 = GPIO_MODE_NATIVE, -+ .gpio27 = GPIO_MODE_GPIO, -+ .gpio28 = GPIO_MODE_GPIO, -+ .gpio29 = GPIO_MODE_GPIO, -+ .gpio30 = GPIO_MODE_GPIO, -+ .gpio31 = GPIO_MODE_GPIO, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_direction = { -+ .gpio0 = GPIO_DIR_INPUT, -+ .gpio2 = GPIO_DIR_INPUT, -+ .gpio4 = GPIO_DIR_INPUT, -+ .gpio6 = GPIO_DIR_INPUT, -+ .gpio7 = GPIO_DIR_INPUT, -+ .gpio8 = GPIO_DIR_INPUT, -+ .gpio13 = GPIO_DIR_INPUT, -+ .gpio14 = GPIO_DIR_INPUT, -+ .gpio15 = GPIO_DIR_INPUT, -+ .gpio16 = GPIO_DIR_INPUT, -+ .gpio17 = GPIO_DIR_INPUT, -+ .gpio19 = GPIO_DIR_INPUT, -+ .gpio21 = GPIO_DIR_INPUT, -+ .gpio22 = GPIO_DIR_INPUT, -+ .gpio24 = GPIO_DIR_INPUT, -+ .gpio27 = GPIO_DIR_INPUT, -+ .gpio28 = GPIO_DIR_INPUT, -+ .gpio29 = GPIO_DIR_INPUT, -+ .gpio30 = GPIO_DIR_OUTPUT, -+ .gpio31 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_level = { -+ .gpio30 = GPIO_LEVEL_HIGH, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_reset = { -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_invert = { -+ .gpio0 = GPIO_INVERT, -+ .gpio8 = GPIO_INVERT, -+ .gpio14 = GPIO_INVERT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_blink = { -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_mode = { -+ .gpio32 = GPIO_MODE_NATIVE, -+ .gpio33 = GPIO_MODE_GPIO, -+ .gpio34 = GPIO_MODE_GPIO, -+ .gpio35 = GPIO_MODE_GPIO, -+ .gpio36 = GPIO_MODE_GPIO, -+ .gpio37 = GPIO_MODE_GPIO, -+ .gpio38 = GPIO_MODE_GPIO, -+ .gpio39 = GPIO_MODE_GPIO, -+ .gpio40 = GPIO_MODE_NATIVE, -+ .gpio41 = GPIO_MODE_NATIVE, -+ .gpio42 = GPIO_MODE_NATIVE, -+ .gpio43 = GPIO_MODE_NATIVE, -+ .gpio44 = GPIO_MODE_NATIVE, -+ .gpio45 = GPIO_MODE_GPIO, -+ .gpio46 = GPIO_MODE_NATIVE, -+ .gpio47 = GPIO_MODE_NATIVE, -+ .gpio48 = GPIO_MODE_GPIO, -+ .gpio49 = GPIO_MODE_GPIO, -+ .gpio50 = GPIO_MODE_NATIVE, -+ .gpio51 = GPIO_MODE_GPIO, -+ .gpio52 = GPIO_MODE_GPIO, -+ .gpio53 = GPIO_MODE_NATIVE, -+ .gpio54 = GPIO_MODE_GPIO, -+ .gpio55 = GPIO_MODE_NATIVE, -+ .gpio56 = GPIO_MODE_NATIVE, -+ .gpio57 = GPIO_MODE_GPIO, -+ .gpio58 = GPIO_MODE_NATIVE, -+ .gpio59 = GPIO_MODE_NATIVE, -+ .gpio60 = GPIO_MODE_GPIO, -+ .gpio61 = GPIO_MODE_NATIVE, -+ .gpio62 = GPIO_MODE_NATIVE, -+ .gpio63 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_direction = { -+ .gpio33 = GPIO_DIR_INPUT, -+ .gpio34 = GPIO_DIR_OUTPUT, -+ .gpio35 = GPIO_DIR_INPUT, -+ .gpio36 = GPIO_DIR_INPUT, -+ .gpio37 = GPIO_DIR_INPUT, -+ .gpio38 = GPIO_DIR_INPUT, -+ .gpio39 = GPIO_DIR_INPUT, -+ .gpio45 = GPIO_DIR_OUTPUT, -+ .gpio48 = GPIO_DIR_INPUT, -+ .gpio49 = GPIO_DIR_OUTPUT, -+ .gpio51 = GPIO_DIR_INPUT, -+ .gpio52 = GPIO_DIR_INPUT, -+ .gpio54 = GPIO_DIR_INPUT, -+ .gpio57 = GPIO_DIR_INPUT, -+ .gpio60 = GPIO_DIR_OUTPUT, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_level = { -+ .gpio34 = GPIO_LEVEL_HIGH, -+ .gpio45 = GPIO_LEVEL_LOW, -+ .gpio49 = GPIO_LEVEL_LOW, -+ .gpio60 = GPIO_LEVEL_HIGH, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_reset = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_mode = { -+ .gpio64 = GPIO_MODE_NATIVE, -+ .gpio65 = GPIO_MODE_NATIVE, -+ .gpio66 = GPIO_MODE_NATIVE, -+ .gpio67 = GPIO_MODE_NATIVE, -+ .gpio68 = GPIO_MODE_GPIO, -+ .gpio69 = GPIO_MODE_GPIO, -+ .gpio70 = GPIO_MODE_GPIO, -+ .gpio71 = GPIO_MODE_GPIO, -+ .gpio72 = GPIO_MODE_NATIVE, -+ .gpio73 = GPIO_MODE_NATIVE, -+ .gpio74 = GPIO_MODE_NATIVE, -+ .gpio75 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_direction = { -+ .gpio68 = GPIO_DIR_INPUT, -+ .gpio69 = GPIO_DIR_INPUT, -+ .gpio70 = GPIO_DIR_INPUT, -+ .gpio71 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_level = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_reset = { -+}; -+ -+const struct pch_gpio_map mainboard_gpio_map = { -+ .set1 = { -+ .mode = &pch_gpio_set1_mode, -+ .direction = &pch_gpio_set1_direction, -+ .level = &pch_gpio_set1_level, -+ .blink = &pch_gpio_set1_blink, -+ .invert = &pch_gpio_set1_invert, -+ .reset = &pch_gpio_set1_reset, -+ }, -+ .set2 = { -+ .mode = &pch_gpio_set2_mode, -+ .direction = &pch_gpio_set2_direction, -+ .level = &pch_gpio_set2_level, -+ .reset = &pch_gpio_set2_reset, -+ }, -+ .set3 = { -+ .mode = &pch_gpio_set3_mode, -+ .direction = &pch_gpio_set3_direction, -+ .level = &pch_gpio_set3_level, -+ .reset = &pch_gpio_set3_reset, -+ }, -+}; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c -new file mode 100644 -index 0000000000..ede8445aaf ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/hda_verb.c -@@ -0,0 +1,32 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <device/azalia_device.h> -+ -+const u32 cim_verb_data[] = { -+ 0x111d76e7, /* Codec Vendor / Device ID: IDT */ -+ 0x10280493, /* Subsystem ID */ -+ 11, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(0, 0x10280493), -+ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020), -+ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f), -+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110), -+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050), -+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), -+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3), -+ AZALIA_PIN_CFG(0, 0x11, 0xd5a30130), -+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x20, 0x400000f0), -+ -+ 0x80862805, /* Codec Vendor / Device ID: Intel */ -+ 0x80860101, /* Subsystem ID */ -+ 4, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(3, 0x80860101), -+ AZALIA_PIN_CFG(3, 0x05, 0x18560010), -+ AZALIA_PIN_CFG(3, 0x06, 0x18560020), -+ AZALIA_PIN_CFG(3, 0x07, 0x18560030), -+}; -+ -+const u32 pc_beep_verbs[0] = {}; -+ -+AZALIA_ARRAY_SIZES; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6420/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/overridetree.cb -new file mode 100644 -index 0000000000..3012a3177f ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6420/overridetree.cb -@@ -0,0 +1,35 @@ -+## SPDX-License-Identifier: GPL-2.0-or-later -+ -+chip northbridge/intel/sandybridge -+ device domain 0 on -+ subsystemid 0x1028 0x0493 inherit -+ -+ device ref igd on -+ register "gpu_cpu_backlight" = "0x0000054f" -+ register "gpu_pch_backlight" = "0x13121312" -+ end -+ -+ chip southbridge/intel/bd82x6x -+ register "usb_port_config" = "{ -+ { 1, 1, 0 }, -+ { 1, 1, 0 }, -+ { 1, 1, 1 }, -+ { 1, 1, 1 }, -+ { 1, 0, 2 }, -+ { 1, 1, 2 }, -+ { 1, 1, 3 }, -+ { 1, 1, 3 }, -+ { 1, 1, 5 }, -+ { 1, 1, 5 }, -+ { 1, 1, 7 }, -+ { 1, 1, 6 }, -+ { 1, 0, 6 }, -+ { 1, 0, 7 }, -+ }" -+ -+ device ref sata1 on -+ register "sata_port_map" = "0x3b" -+ end -+ end -+ end -+end --- -2.39.5 - diff --git a/config/coreboot/default/patches/0020-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch b/config/coreboot/default/patches/0010-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch index 46e38925..f093db5c 100644 --- a/config/coreboot/default/patches/0020-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch +++ b/config/coreboot/default/patches/0010-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch @@ -1,7 +1,7 @@ -From 440ebbe1e10911dc3d8c53cf9eecb5519c2ecd67 Mon Sep 17 00:00:00 2001 +From 922357b7d5b0b5304b0d4296b2f03961a17288a6 Mon Sep 17 00:00:00 2001 From: Riku Viitanen <riku.viitanen@protonmail.com> Date: Sat, 23 Dec 2023 19:02:10 +0200 -Subject: [PATCH 20/51] mb/hp: Add Compaq Elite 8300 CMT port +Subject: [PATCH 10/40] mb/hp: Add Compaq Elite 8300 CMT port Based on autoport and Z220 SuperIO code. @@ -868,5 +868,5 @@ index 0000000000..8dbd95ef96 + .enable_dev = mainboard_enable, +}; -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0011-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch b/config/coreboot/default/patches/0011-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch deleted file mode 100644 index 2b378406..00000000 --- a/config/coreboot/default/patches/0011-mb-dell-Add-Latitude-E6520-Sandy-Bridge.patch +++ /dev/null @@ -1,449 +0,0 @@ -From 53abe363f2fa038080a976f2d3a2c63ee8da9022 Mon Sep 17 00:00:00 2001 -From: Nicholas Chin <nic.c3.14@gmail.com> -Date: Wed, 31 Jan 2024 22:07:25 -0700 -Subject: [PATCH 11/51] mb/dell: Add Latitude E6520 (Sandy Bridge) - -Mainboard is PAL60/LA-6562P (UMA). The version with an Nvidia dGPU was -not tested. I do not physically have this system; someone with physical -access to one sent me the output of autoport which I then modified to -produce this port. I was also sent the VBT binary, which was obtained -from `/sys/kernel/debug/dri/0/i915_vbt` while running version A08 of the -vendor firmware. - -This was originally tested and found to be working as a standalone board -port in Libreboot, but this variant based port in upstream coreboot has -not been tested. - -This can be internally flashed by sending a command to the EC, which -causes the EC to pull the FDO pin low and the firmware to skip setting -up any chipset based write protections [1]. The EC is the SMSC MEC5055, -which seems to be compatible with the existing MEC5035 code. - -[1] https://gitlab.com/nic3-14159/dell-flash-unlock - -Change-Id: Ibdd40cc15642b8d404159d5962670ccc4167a9ec -Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> ---- - src/mainboard/dell/snb_ivb_latitude/Kconfig | 9 + - .../dell/snb_ivb_latitude/Kconfig.name | 3 + - .../snb_ivb_latitude/variants/e6520/data.vbt | Bin 0 -> 6144 bytes - .../variants/e6520/early_init.c | 31 +++ - .../snb_ivb_latitude/variants/e6520/gpio.c | 190 ++++++++++++++++++ - .../variants/e6520/hda_verb.c | 32 +++ - .../variants/e6520/overridetree.cb | 35 ++++ - 7 files changed, 300 insertions(+) - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/data.vbt - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/gpio.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6520/overridetree.cb - -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig -index d2786970ee..72bdc96c0a 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig -@@ -23,6 +23,12 @@ config BOARD_DELL_LATITUDE_E6420 - select MAINBOARD_USES_IFD_GBE_REGION - select SOUTHBRIDGE_INTEL_BD82X6X - -+config BOARD_DELL_LATITUDE_E6520 -+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON -+ select BOARD_ROMSIZE_KB_10240 -+ select MAINBOARD_USES_IFD_GBE_REGION -+ select SOUTHBRIDGE_INTEL_BD82X6X -+ - config BOARD_DELL_LATITUDE_E5530 - select BOARD_DELL_SNB_IVB_LATITUDE_COMMON - select BOARD_ROMSIZE_KB_12288 -@@ -50,6 +56,7 @@ config MAINBOARD_DIR - - config MAINBOARD_PART_NUMBER - default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420 -+ default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520 - default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530 - default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430 - default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530 -@@ -62,11 +69,13 @@ config USBDEBUG_HCD_INDEX - - config VARIANT_DIR - default "e6420" if BOARD_DELL_LATITUDE_E6420 -+ default "e6520" if BOARD_DELL_LATITUDE_E6520 - default "e5530" if BOARD_DELL_LATITUDE_E5530 - default "e6430" if BOARD_DELL_LATITUDE_E6430 - default "e6530" if BOARD_DELL_LATITUDE_E6530 - - config VGA_BIOS_ID -+ default "8086,0116" if BOARD_DELL_LATITUDE_E6520 - default "8086,0166" if BOARD_DELL_LATITUDE_E5530 - default "8086,0126" if BOARD_DELL_LATITUDE_E6420 - default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \ -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -index 257d428a70..c7665ac263 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -@@ -3,6 +3,9 @@ - config BOARD_DELL_LATITUDE_E6420 - bool "Latitude E6420" - -+config BOARD_DELL_LATITUDE_E6520 -+ bool "Latitude E6520" -+ - config BOARD_DELL_LATITUDE_E5530 - bool "Latitude E5530" - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/data.vbt -new file mode 100644 -index 0000000000000000000000000000000000000000..0ef16ee7cb482d2cb91ea80c3f419759355f7ba0 -GIT binary patch -literal 6144 -zcmeHKZ){Ul6hE);wSB#PZ|mL$bQ^!}HW(eF@H)0JafGfbqsZ9G21{L7Sg{or$5uN) -z_QgG55e!O(8p8*oBhhF`l$n^QF%rN;rzFNqqcPzFCd5QSB1Y7RKt1=pmTk1aFo9^Y -z+x+gi_nvdlJ@?#m&wZWW=G#bH>ze$J`&!oe*Q|E0r!)d89LYY8b$aowZEoG-uiIF+ -z#n;$ezm6V<nGnvtc?lrGaf)1_);!W0?uqnojdw-1MQM|dwy`OcF?M@A)KgVV*N2}7 -zcXx+--0R}IwzW3-+`f2k?^Av5V7MpRO-q(9rn_R1@Xlz2Ztdy`$Gf6^w6~|bKi!!7 -z9;xq*^~bxmZQn^<^<`+2s=BdSM%VW2#FguN<FO^QuDhGIFquBu677q|cSj>jWFixQ -z)4V8f0Gt`D`+>9Fr~tnJ76EJ`5D_F1cn-`0$RgN9unI6kfYkzIiO?W`ON4+34lv1_ -zNdPDkq1cf$p8^EW;TS*O$CdzNo#1fbIG_Oi0T(ti0jwyt0le_p_HlvX^CFvr)>$b> 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-z=`LA0Ad@39{XkZ}kjXbP{YzHtS!70*yy%LcnJ#cz4u%*Wq!^d*AVMZdr&l=#Qgik~ -ze2l)cX+!kF9EaFhY;0^Uo_#VNC?7K2Tf=ZR1y5);b!mCGG?<cc#M0rtHKYeKi%BE? -z@Y6|P8fx#li}c`Uv24UGyZaM0To;Ep<_AWZA1t~bFgI)uf}&Eq=L_Cs89=>wnT0Vx -z-jp>o1ffJNommZ4?=TIPlePIw0hgQ706f*tBC`#pg>9&zRHe>J2%RxBTrOc6Adh9E -ziJr`?VQH!N!_GkoKaoq|+3$^Ae0#sUxXlmM1Huq~g<=Ls?ILv+nQcH%PQedGOlH=Q -z77rMcJlH4Mkc#U2(IDv>rsm1aHpsdL_RdT^i_ACcQUMIJcSus}*(?CIiy^#^=t=g1 -z+*^Zbh30&^#_bKclSy9pL$<B~pK8m*sLpIdnHM@W$nA7Ea@Z`x27K?aNK<@lCW(2L -zb@kB3H8kKy4W3Hu)NN|kd!DL^o#iR9a{QYV-Wl&r&hmIFX{ezkIV<4zFiVUQ@K>ao -z00DnFy~Uek!JRwhVX!of0)$Sa*X^S~LMQH0<E(UUx}L=|;Kgw(r(4q=nD)T52c|tR -O?SW|zOncy=dEg(6JAK&z - -literal 0 -HcmV?d00001 - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c -new file mode 100644 -index 0000000000..b6415a428b ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/early_init.c -@@ -0,0 +1,31 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <bootblock_common.h> -+#include <device/pci_ops.h> -+#include <ec/dell/mec5035/mec5035.h> -+#include <southbridge/intel/bd82x6x/pch.h> -+ -+const struct southbridge_usb_port mainboard_usb_ports[] = { -+ { 1, 1, 0 }, -+ { 1, 1, 0 }, -+ { 1, 1, 1 }, -+ { 1, 1, 1 }, -+ { 1, 0, 2 }, -+ { 1, 1, 2 }, -+ { 1, 0, 3 }, -+ { 1, 0, 3 }, -+ { 1, 1, 5 }, -+ { 1, 1, 5 }, -+ { 1, 1, 7 }, -+ { 1, 1, 6 }, -+ { 1, 0, 6 }, -+ { 1, 0, 7 }, -+}; -+ -+void bootblock_mainboard_early_init(void) -+{ -+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN -+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN -+ | COMB_LPC_EN | COMA_LPC_EN); -+ mec5035_early_init(); -+} -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/gpio.c -new file mode 100644 -index 0000000000..61f01816c4 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/gpio.c -@@ -0,0 +1,190 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <southbridge/intel/common/gpio.h> -+ -+static const struct pch_gpio_set1 pch_gpio_set1_mode = { -+ .gpio0 = GPIO_MODE_GPIO, -+ .gpio1 = GPIO_MODE_NATIVE, -+ .gpio2 = GPIO_MODE_GPIO, -+ .gpio3 = GPIO_MODE_NATIVE, -+ .gpio4 = GPIO_MODE_GPIO, -+ .gpio5 = GPIO_MODE_NATIVE, -+ .gpio6 = GPIO_MODE_GPIO, -+ .gpio7 = GPIO_MODE_GPIO, -+ .gpio8 = GPIO_MODE_GPIO, -+ .gpio9 = GPIO_MODE_NATIVE, -+ .gpio10 = GPIO_MODE_NATIVE, -+ .gpio11 = GPIO_MODE_NATIVE, -+ .gpio12 = GPIO_MODE_NATIVE, -+ .gpio13 = GPIO_MODE_GPIO, -+ .gpio14 = GPIO_MODE_GPIO, -+ .gpio15 = GPIO_MODE_GPIO, -+ .gpio16 = GPIO_MODE_GPIO, -+ .gpio17 = GPIO_MODE_GPIO, -+ .gpio18 = GPIO_MODE_NATIVE, -+ .gpio19 = GPIO_MODE_GPIO, -+ .gpio20 = GPIO_MODE_NATIVE, -+ .gpio21 = GPIO_MODE_GPIO, -+ .gpio22 = GPIO_MODE_GPIO, -+ .gpio23 = GPIO_MODE_NATIVE, -+ .gpio24 = GPIO_MODE_GPIO, -+ .gpio25 = GPIO_MODE_NATIVE, -+ .gpio26 = GPIO_MODE_NATIVE, -+ .gpio27 = GPIO_MODE_GPIO, -+ .gpio28 = GPIO_MODE_GPIO, -+ .gpio29 = GPIO_MODE_GPIO, -+ .gpio30 = GPIO_MODE_GPIO, -+ .gpio31 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_direction = { -+ .gpio0 = GPIO_DIR_INPUT, -+ .gpio2 = GPIO_DIR_INPUT, -+ .gpio4 = GPIO_DIR_INPUT, -+ .gpio6 = GPIO_DIR_INPUT, -+ .gpio7 = GPIO_DIR_INPUT, -+ .gpio8 = GPIO_DIR_INPUT, -+ .gpio13 = GPIO_DIR_INPUT, -+ .gpio14 = GPIO_DIR_INPUT, -+ .gpio15 = GPIO_DIR_INPUT, -+ .gpio16 = GPIO_DIR_INPUT, -+ .gpio17 = GPIO_DIR_INPUT, -+ .gpio19 = GPIO_DIR_INPUT, -+ .gpio21 = GPIO_DIR_INPUT, -+ .gpio22 = GPIO_DIR_INPUT, -+ .gpio24 = GPIO_DIR_INPUT, -+ .gpio27 = GPIO_DIR_INPUT, -+ .gpio28 = GPIO_DIR_INPUT, -+ .gpio29 = GPIO_DIR_INPUT, -+ .gpio30 = GPIO_DIR_OUTPUT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_level = { -+ .gpio30 = GPIO_LEVEL_HIGH, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_reset = { -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_invert = { -+ .gpio0 = GPIO_INVERT, -+ .gpio8 = GPIO_INVERT, -+ .gpio14 = GPIO_INVERT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_blink = { -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_mode = { -+ .gpio32 = GPIO_MODE_NATIVE, -+ .gpio33 = GPIO_MODE_GPIO, -+ .gpio34 = GPIO_MODE_GPIO, -+ .gpio35 = GPIO_MODE_GPIO, -+ .gpio36 = GPIO_MODE_GPIO, -+ .gpio37 = GPIO_MODE_GPIO, -+ .gpio38 = GPIO_MODE_GPIO, -+ .gpio39 = GPIO_MODE_GPIO, -+ .gpio40 = GPIO_MODE_NATIVE, -+ .gpio41 = GPIO_MODE_NATIVE, -+ .gpio42 = GPIO_MODE_NATIVE, -+ .gpio43 = GPIO_MODE_NATIVE, -+ .gpio44 = GPIO_MODE_NATIVE, -+ .gpio45 = GPIO_MODE_GPIO, -+ .gpio46 = GPIO_MODE_NATIVE, -+ .gpio47 = GPIO_MODE_NATIVE, -+ .gpio48 = GPIO_MODE_GPIO, -+ .gpio49 = GPIO_MODE_GPIO, -+ .gpio50 = GPIO_MODE_NATIVE, -+ .gpio51 = GPIO_MODE_GPIO, -+ .gpio52 = GPIO_MODE_GPIO, -+ .gpio53 = GPIO_MODE_NATIVE, -+ .gpio54 = GPIO_MODE_GPIO, -+ .gpio55 = GPIO_MODE_NATIVE, -+ .gpio56 = GPIO_MODE_NATIVE, -+ .gpio57 = GPIO_MODE_GPIO, -+ .gpio58 = GPIO_MODE_NATIVE, -+ .gpio59 = GPIO_MODE_NATIVE, -+ .gpio60 = GPIO_MODE_GPIO, -+ .gpio61 = GPIO_MODE_NATIVE, -+ .gpio62 = GPIO_MODE_NATIVE, -+ .gpio63 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_direction = { -+ .gpio33 = GPIO_DIR_INPUT, -+ .gpio34 = GPIO_DIR_OUTPUT, -+ .gpio35 = GPIO_DIR_INPUT, -+ .gpio36 = GPIO_DIR_INPUT, -+ .gpio37 = GPIO_DIR_INPUT, -+ .gpio38 = GPIO_DIR_INPUT, -+ .gpio39 = GPIO_DIR_INPUT, -+ .gpio45 = GPIO_DIR_OUTPUT, -+ .gpio48 = GPIO_DIR_INPUT, -+ .gpio49 = GPIO_DIR_OUTPUT, -+ .gpio51 = GPIO_DIR_INPUT, -+ .gpio52 = GPIO_DIR_INPUT, -+ .gpio54 = GPIO_DIR_INPUT, -+ .gpio57 = GPIO_DIR_INPUT, -+ .gpio60 = GPIO_DIR_OUTPUT, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_level = { -+ .gpio34 = GPIO_LEVEL_HIGH, -+ .gpio45 = GPIO_LEVEL_LOW, -+ .gpio49 = GPIO_LEVEL_LOW, -+ .gpio60 = GPIO_LEVEL_HIGH, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_reset = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_mode = { -+ .gpio64 = GPIO_MODE_NATIVE, -+ .gpio65 = GPIO_MODE_NATIVE, -+ .gpio66 = GPIO_MODE_NATIVE, -+ .gpio67 = GPIO_MODE_NATIVE, -+ .gpio68 = GPIO_MODE_GPIO, -+ .gpio69 = GPIO_MODE_GPIO, -+ .gpio70 = GPIO_MODE_GPIO, -+ .gpio71 = GPIO_MODE_GPIO, -+ .gpio72 = GPIO_MODE_NATIVE, -+ .gpio73 = GPIO_MODE_NATIVE, -+ .gpio74 = GPIO_MODE_NATIVE, -+ .gpio75 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_direction = { -+ .gpio68 = GPIO_DIR_INPUT, -+ .gpio69 = GPIO_DIR_INPUT, -+ .gpio70 = GPIO_DIR_INPUT, -+ .gpio71 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_level = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_reset = { -+}; -+ -+const struct pch_gpio_map mainboard_gpio_map = { -+ .set1 = { -+ .mode = &pch_gpio_set1_mode, -+ .direction = &pch_gpio_set1_direction, -+ .level = &pch_gpio_set1_level, -+ .blink = &pch_gpio_set1_blink, -+ .invert = &pch_gpio_set1_invert, -+ .reset = &pch_gpio_set1_reset, -+ }, -+ .set2 = { -+ .mode = &pch_gpio_set2_mode, -+ .direction = &pch_gpio_set2_direction, -+ .level = &pch_gpio_set2_level, -+ .reset = &pch_gpio_set2_reset, -+ }, -+ .set3 = { -+ .mode = &pch_gpio_set3_mode, -+ .direction = &pch_gpio_set3_direction, -+ .level = &pch_gpio_set3_level, -+ .reset = &pch_gpio_set3_reset, -+ }, -+}; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c -new file mode 100644 -index 0000000000..ae376691e7 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/hda_verb.c -@@ -0,0 +1,32 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <device/azalia_device.h> -+ -+const u32 cim_verb_data[] = { -+ 0x111d76e7, /* Codec Vendor / Device ID: IDT */ -+ 0x10280494, /* Subsystem ID */ -+ 11, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(0, 0x10280494), -+ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020), -+ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f), -+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110), -+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050), -+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), -+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3), -+ AZALIA_PIN_CFG(0, 0x11, 0x400000f2), -+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x20, 0x400000f0), -+ -+ 0x80862805, /* Codec Vendor / Device ID: Intel */ -+ 0x80860101, /* Subsystem ID */ -+ 4, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(3, 0x80860101), -+ AZALIA_PIN_CFG(3, 0x05, 0x18560010), -+ AZALIA_PIN_CFG(3, 0x06, 0x18560020), -+ AZALIA_PIN_CFG(3, 0x07, 0x18560030), -+}; -+ -+const u32 pc_beep_verbs[0] = {}; -+ -+AZALIA_ARRAY_SIZES; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6520/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/overridetree.cb -new file mode 100644 -index 0000000000..f90f2dee1f ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6520/overridetree.cb -@@ -0,0 +1,35 @@ -+## SPDX-License-Identifier: GPL-2.0-or-later -+ -+chip northbridge/intel/sandybridge -+ device domain 0 on -+ subsystemid 0x1028 0x0494 inherit -+ -+ device ref igd on -+ register "gpu_cpu_backlight" = "0x00001312" -+ register "gpu_pch_backlight" = "0x13121312" -+ end -+ -+ chip southbridge/intel/bd82x6x -+ register "usb_port_config" = "{ -+ { 1, 1, 0 }, -+ { 1, 1, 0 }, -+ { 1, 1, 1 }, -+ { 1, 1, 1 }, -+ { 1, 0, 2 }, -+ { 1, 1, 2 }, -+ { 1, 1, 3 }, -+ { 1, 1, 3 }, -+ { 1, 1, 5 }, -+ { 1, 1, 5 }, -+ { 1, 1, 7 }, -+ { 1, 1, 6 }, -+ { 1, 0, 6 }, -+ { 1, 0, 7 }, -+ }" -+ -+ device ref sata1 on -+ register "sata_port_map" = "0x3b" -+ end -+ end -+ end -+end --- -2.39.5 - diff --git a/config/coreboot/default/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch b/config/coreboot/default/patches/0011-nb-intel-haswell-make-IOMMU-a-runtime-option.patch index b3305e58..4c773248 100644 --- a/config/coreboot/default/patches/0021-nb-intel-haswell-make-IOMMU-a-runtime-option.patch +++ b/config/coreboot/default/patches/0011-nb-intel-haswell-make-IOMMU-a-runtime-option.patch @@ -1,7 +1,7 @@ -From 4c7577314f19e934d690c4cce3642fe693400c07 Mon Sep 17 00:00:00 2001 +From 41256272a7637426c9e68fd633ceb1c108f183c9 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Sat, 2 Mar 2024 22:51:09 +0000 -Subject: [PATCH 21/51] nb/intel/haswell: make IOMMU a runtime option +Subject: [PATCH 11/40] nb/intel/haswell: make IOMMU a runtime option When I tested graphics cards on a coreboot port for Dell OptiPlex 9020 SFF, I could not use a graphics card unless @@ -288,5 +288,5 @@ index e47deb5da6..1a7e0b1076 100644 if (capid0_a & VTD_DISABLE) return; -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch b/config/coreboot/default/patches/0012-dell-optiplex_9020-Disable-IOMMU-by-default.patch index f18f119e..24b769cd 100644 --- a/config/coreboot/default/patches/0022-dell-optiplex_9020-Disable-IOMMU-by-default.patch +++ b/config/coreboot/default/patches/0012-dell-optiplex_9020-Disable-IOMMU-by-default.patch @@ -1,7 +1,7 @@ -From b5695d0f0dc44ed1eb1feac008e601040feda55d Mon Sep 17 00:00:00 2001 +From b243452bf1ed7c9aee1e6685091e98f52d7229c7 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Sat, 2 Mar 2024 23:00:09 +0000 -Subject: [PATCH 22/51] dell/optiplex_9020: Disable IOMMU by default +Subject: [PATCH 12/40] dell/optiplex_9020: Disable IOMMU by default Needed to make graphics cards work. Turning it on is recommended if only using iGPU, otherwise leave it off @@ -25,5 +25,5 @@ index 8000eea8c0..0700f971ee 100644 -iommu=Enable +iommu=Disable -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0012-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch b/config/coreboot/default/patches/0012-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch deleted file mode 100644 index 4fd3bba2..00000000 --- a/config/coreboot/default/patches/0012-mb-dell-Add-Latitude-E5520-Sandy-Bridge.patch +++ /dev/null @@ -1,442 +0,0 @@ -From 3f8eade6150f582129332f6347e9a685f8a7b500 Mon Sep 17 00:00:00 2001 -From: Nicholas Chin <nic.c3.14@gmail.com> -Date: Wed, 7 Feb 2024 10:23:38 -0700 -Subject: [PATCH 12/51] mb/dell: Add Latitude E5520 (Sandy Bridge) - -Mainboard is Krug 15". I do not physically have this system; someone -with physical access to one sent me the output of autoport which I then -modified to produce this port. I was also sent the VBT binary, which was -obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running version -A14 of the vendor firmware. - -This was originally tested and found to be working as a standalone -board port in Libreboot, but this variant based port in upstream -coreboot has not been tested. - -This can be internally flashed by sending a command to the EC, which -causes the EC to pull the FDO pin low and the firmware to skip setting -up any chipset based write protections [1]. The EC is the SMSC MEC5055, -which seems to be compatible with the existing MEC5035 code. - -[1] https://gitlab.com/nic3-14159/dell-flash-unlock - -Change-Id: Ic9bfc028d4b8ae01ccc019157bb53e7764671134 -Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> ---- - src/mainboard/dell/snb_ivb_latitude/Kconfig | 10 +- - .../dell/snb_ivb_latitude/Kconfig.name | 3 + - .../snb_ivb_latitude/variants/e5520/data.vbt | Bin 0 -> 6144 bytes - .../variants/e5520/early_init.c | 14 ++ - .../snb_ivb_latitude/variants/e5520/gpio.c | 195 ++++++++++++++++++ - .../variants/e5520/hda_verb.c | 32 +++ - .../variants/e5520/overridetree.cb | 39 ++++ - 7 files changed, 292 insertions(+), 1 deletion(-) - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/data.vbt - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/gpio.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5520/overridetree.cb - -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig -index 72bdc96c0a..4e94a7ef80 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig -@@ -17,6 +17,11 @@ config BOARD_DELL_SNB_IVB_LATITUDE_COMMON - select SYSTEM_TYPE_LAPTOP - select USE_NATIVE_RAMINIT - -+config BOARD_DELL_LATITUDE_E5520 -+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON -+ select BOARD_ROMSIZE_KB_6144 -+ select SOUTHBRIDGE_INTEL_BD82X6X -+ - config BOARD_DELL_LATITUDE_E6420 - select BOARD_DELL_SNB_IVB_LATITUDE_COMMON - select BOARD_ROMSIZE_KB_10240 -@@ -55,6 +60,7 @@ config MAINBOARD_DIR - default "dell/snb_ivb_latitude" - - config MAINBOARD_PART_NUMBER -+ default "Latitude E5520" if BOARD_DELL_LATITUDE_E5520 - default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420 - default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520 - default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530 -@@ -68,6 +74,7 @@ config USBDEBUG_HCD_INDEX - default 2 - - config VARIANT_DIR -+ default "e5520" if BOARD_DELL_LATITUDE_E5520 - default "e6420" if BOARD_DELL_LATITUDE_E6420 - default "e6520" if BOARD_DELL_LATITUDE_E6520 - default "e5530" if BOARD_DELL_LATITUDE_E5530 -@@ -77,7 +84,8 @@ config VARIANT_DIR - config VGA_BIOS_ID - default "8086,0116" if BOARD_DELL_LATITUDE_E6520 - default "8086,0166" if BOARD_DELL_LATITUDE_E5530 -- default "8086,0126" if BOARD_DELL_LATITUDE_E6420 -+ default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \ -+ || BOARD_DELL_LATITUDE_E5520 - default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \ - || BOARD_DELL_LATITUDE_E6530 - -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -index c7665ac263..7976691f21 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -@@ -1,5 +1,8 @@ - ## SPDX-License-Identifier: GPL-2.0-only - -+config BOARD_DELL_LATITUDE_E5520 -+ bool "Latitude E5520" -+ - config BOARD_DELL_LATITUDE_E6420 - bool "Latitude E6420" - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/data.vbt -new file mode 100644 -index 0000000000000000000000000000000000000000..b511e75262e37fa123d674e9a7b21a8dfe427729 -GIT binary patch -literal 6144 -zcmeHKZ){Ul6hE);wSBvNZ|mL$bmQOM2BTvXUI!}^N9ejTij1vnu+)Wx6<c9(Y_%K6 -zzOV-@f<ehpWB5RHBpMBgG7}RuMuM2=l*E{6G$wq&gqTQ3#E2RZsOP@dvW*rP7>Fjj -z&F`Lj?>YC}bI(2Z+}C+6zKyiGrosQXuW7A+&1%<rN+Y1ck(}dLrx)Ma#^x>lnvFGE -zeD#gB>*#Tq4&j^|7Xcz1r^pp*)g#T}u1Me3ct>Pgls5Qi3!6e2W0%`a-Ic|3efWuR -zXJ@#}wJyGMTXTcY<%@TBKh@(3hP$Gjv}E}rx-%9D_eLXhYe!c&-VyDg-Cdo1>Biji -zNNsnlFW#|jdoOj?mZ43m>cVO%UE9@*E7x|%V~c4`XD4l9GCi~@+7pfMibfX8L?!^I -zc~Rg1I5SxH1DAEZ0{jA41jrJBh#-l;b6^%g7QrThRe)&%tQH_!ggOD7A_PRRgGuI0 -z0zi=n#rCB66d-sO$M~^6wgeb$2fH1|0R`v}xUiWCU`4SF;Dyh&j|mK&6WJWJ&Pq9I -zVgmFQfh+)vE}(KWwHA|Oh3fSkss|;2E(2i}s1?gRRV%8!K7U={vHD=s#+Fd)W^M1j -z{R4$??VSvEWpgT=vCM&1-U$bI6CB~IV3Z$$Vv7o!EDnev4j~R(MHsazZ~^fLLKGF4 -zEfQFOa3dZ?1Q1P#&4?!vyAk^k&m&$z3?WV+-b0*1j37o4=MX<3E+eiYge(Ht2umAW -zOPDmU>UL{flI9u|@JtVvfp#o8ek?VfVV9YP5(%pnZX~{PKq4WoWGmV8t$=Ri@{zLQ -zNYYt4<$0Ry&qIoG;7s-t333)Nu8opN{NG!)&!I@eO(cVx8vBVEBvotJ7%yNl$7iQ_ -zI=xk30+V$ff`F6<wRoF(TK%j9nsr#H23umU%)_7jNOl%*FPU567qbg;4gtp711nj2 -z#+kHw`v4|5cA+`UMIvAl;slnH1nl0v=xH<al>1}ljxDE1dcda^&!do|r^eJkI?aC- -zEQMSfm?<w*Unzumkj_w5>VYL6W4=aCiy4rk%xq~5LV?bi|GL2$G7li<%c7yd;6T34 -zQBN5huZ3~6`ChGkpb$Bg5ITb#2iK-qs|1`=sl6Dhn(Lj&8Agt?S{sTDmmtRj7Jm_1 -zFnt{w&FdFkWS3bl>OeL?eO+*i{)9G!cSI-InGt|U0eEYmRCOHm7|I;#LO8ksRIeJ# -zGe+jTwPg4C4TYuN(9zULV3k+hI$YuPo=%N8oZ#u_4S!3Xelt6N0BmuC`hCNeg+&97 -z6*!>)uHvr%2004GZv?!_-y&|TRmil=9D%Q`1aXBsnD^gov3*UZI34&1_vn(B=T4kZ -z_A>ClXVIBNaS^hd&^DrU6VgZMYeadMkdFxcktn|ra-Gl;n^I{bt86rCQ=YMry*B!$ -zP5ID9KDE)GZOY#^VwPyRq^y+48j0?ZlzxdkC()CV@`*&wO7vGr;qjA3rb}gIwM-gi -zx>HsT$mEDj-<OpyWb%zn|B@A3Hkp<!FT5;hrt_SZiy?*wDaIu{h>%Ir=@rh7)SR;b -zAEWQGv_X1)wq0y5Ha0c~&psIsln<Hiu3;#Lf;%*eI<@?p8cfMJV(IYi8q$NA#iS8` -z_~|4t4b^wtMSAeFST^F8-Tm<zu8D&j^8=&I4;I}Im>aeSK~X8*^Z9SE44_`P#KIUL -zf6^N2f>5HCPWM3N+f0MyWOV^kz~!-wVc4MRXOY>4Jsxd1RyBKEMzNf{RKhesKFdbq -zJ(*d<l2Y#n?E?~iBA39P?~Pr2d#}5=#Sfl-VGzGUF$4U2KcqCIVlwkC(&7PQk_X!a -z8}3Jgq-&U*Co|h1>l)ZQGyW_x->i#;FvQ*=Nv&nG0N5@D@jjv_Q}K}6MP?1A6`JGe -zDwj9pN+x;T4>`I9e5x(uqdK#OGB31ikk@Xv=dxLb4fx(;ktX@rOb~M~?dYQQYiPia -z8r;jUQ?sd2@3||-cb2Eb%JFYfxHsONoaJ^eqoKN{<g9?-%`7oWz+aJS0tEc!^d@hD -z1-I{%hr!Y?0uVZpUbl__37xn@jkD6Z>3SATgBQlEoN7&ZV9Eni9+>jLln16fFy(=V -H=7E0zE^L4Z - -literal 0 -HcmV?d00001 - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c -new file mode 100644 -index 0000000000..ff83db095b ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/early_init.c -@@ -0,0 +1,14 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <bootblock_common.h> -+#include <device/pci_ops.h> -+#include <ec/dell/mec5035/mec5035.h> -+#include <southbridge/intel/bd82x6x/pch.h> -+ -+void bootblock_mainboard_early_init(void) -+{ -+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN -+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN -+ | COMB_LPC_EN | COMA_LPC_EN); -+ mec5035_early_init(); -+} -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/gpio.c -new file mode 100644 -index 0000000000..f76b93d9f0 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/gpio.c -@@ -0,0 +1,195 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <southbridge/intel/common/gpio.h> -+ -+static const struct pch_gpio_set1 pch_gpio_set1_mode = { -+ .gpio0 = GPIO_MODE_GPIO, -+ .gpio1 = GPIO_MODE_NATIVE, -+ .gpio2 = GPIO_MODE_GPIO, -+ .gpio3 = GPIO_MODE_GPIO, -+ .gpio4 = GPIO_MODE_GPIO, -+ .gpio5 = GPIO_MODE_NATIVE, -+ .gpio6 = GPIO_MODE_GPIO, -+ .gpio7 = GPIO_MODE_GPIO, -+ .gpio8 = GPIO_MODE_GPIO, -+ .gpio9 = GPIO_MODE_NATIVE, -+ .gpio10 = GPIO_MODE_NATIVE, -+ .gpio11 = GPIO_MODE_NATIVE, -+ .gpio12 = GPIO_MODE_GPIO, -+ .gpio13 = GPIO_MODE_GPIO, -+ .gpio14 = GPIO_MODE_GPIO, -+ .gpio15 = GPIO_MODE_GPIO, -+ .gpio16 = GPIO_MODE_NATIVE, -+ .gpio17 = GPIO_MODE_GPIO, -+ .gpio18 = GPIO_MODE_NATIVE, -+ .gpio19 = GPIO_MODE_GPIO, -+ .gpio20 = GPIO_MODE_NATIVE, -+ .gpio21 = GPIO_MODE_GPIO, -+ .gpio22 = GPIO_MODE_GPIO, -+ .gpio23 = GPIO_MODE_NATIVE, -+ .gpio24 = GPIO_MODE_GPIO, -+ .gpio25 = GPIO_MODE_NATIVE, -+ .gpio26 = GPIO_MODE_NATIVE, -+ .gpio27 = GPIO_MODE_GPIO, -+ .gpio28 = GPIO_MODE_GPIO, -+ .gpio29 = GPIO_MODE_GPIO, -+ .gpio30 = GPIO_MODE_GPIO, -+ .gpio31 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_direction = { -+ .gpio0 = GPIO_DIR_INPUT, -+ .gpio2 = GPIO_DIR_INPUT, -+ .gpio3 = GPIO_DIR_INPUT, -+ .gpio4 = GPIO_DIR_INPUT, -+ .gpio6 = GPIO_DIR_INPUT, -+ .gpio7 = GPIO_DIR_INPUT, -+ .gpio8 = GPIO_DIR_INPUT, -+ .gpio12 = GPIO_DIR_OUTPUT, -+ .gpio13 = GPIO_DIR_INPUT, -+ .gpio14 = GPIO_DIR_INPUT, -+ .gpio15 = GPIO_DIR_INPUT, -+ .gpio17 = GPIO_DIR_INPUT, -+ .gpio19 = GPIO_DIR_INPUT, -+ .gpio21 = GPIO_DIR_INPUT, -+ .gpio22 = GPIO_DIR_INPUT, -+ .gpio24 = GPIO_DIR_INPUT, -+ .gpio27 = GPIO_DIR_INPUT, -+ .gpio28 = GPIO_DIR_INPUT, -+ .gpio29 = GPIO_DIR_INPUT, -+ .gpio30 = GPIO_DIR_OUTPUT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_level = { -+ .gpio12 = GPIO_LEVEL_HIGH, -+ .gpio30 = GPIO_LEVEL_HIGH, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_reset = { -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_invert = { -+ .gpio0 = GPIO_INVERT, -+ .gpio8 = GPIO_INVERT, -+ .gpio14 = GPIO_INVERT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_blink = { -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_mode = { -+ .gpio32 = GPIO_MODE_NATIVE, -+ .gpio33 = GPIO_MODE_GPIO, -+ .gpio34 = GPIO_MODE_GPIO, -+ .gpio35 = GPIO_MODE_GPIO, -+ .gpio36 = GPIO_MODE_GPIO, -+ .gpio37 = GPIO_MODE_GPIO, -+ .gpio38 = GPIO_MODE_GPIO, -+ .gpio39 = GPIO_MODE_GPIO, -+ .gpio40 = GPIO_MODE_NATIVE, -+ .gpio41 = GPIO_MODE_NATIVE, -+ .gpio42 = GPIO_MODE_NATIVE, -+ .gpio43 = GPIO_MODE_NATIVE, -+ .gpio44 = GPIO_MODE_NATIVE, -+ .gpio45 = GPIO_MODE_NATIVE, -+ .gpio46 = GPIO_MODE_GPIO, -+ .gpio47 = GPIO_MODE_NATIVE, -+ .gpio48 = GPIO_MODE_GPIO, -+ .gpio49 = GPIO_MODE_NATIVE, -+ .gpio50 = GPIO_MODE_GPIO, -+ .gpio51 = GPIO_MODE_GPIO, -+ .gpio52 = GPIO_MODE_GPIO, -+ .gpio53 = GPIO_MODE_GPIO, -+ .gpio54 = GPIO_MODE_GPIO, -+ .gpio55 = GPIO_MODE_GPIO, -+ .gpio56 = GPIO_MODE_GPIO, -+ .gpio57 = GPIO_MODE_GPIO, -+ .gpio58 = GPIO_MODE_NATIVE, -+ .gpio59 = GPIO_MODE_NATIVE, -+ .gpio60 = GPIO_MODE_GPIO, -+ .gpio61 = GPIO_MODE_NATIVE, -+ .gpio62 = GPIO_MODE_NATIVE, -+ .gpio63 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_direction = { -+ .gpio33 = GPIO_DIR_INPUT, -+ .gpio34 = GPIO_DIR_OUTPUT, -+ .gpio35 = GPIO_DIR_INPUT, -+ .gpio36 = GPIO_DIR_INPUT, -+ .gpio37 = GPIO_DIR_OUTPUT, -+ .gpio38 = GPIO_DIR_INPUT, -+ .gpio39 = GPIO_DIR_INPUT, -+ .gpio46 = GPIO_DIR_OUTPUT, -+ .gpio48 = GPIO_DIR_INPUT, -+ .gpio50 = GPIO_DIR_OUTPUT, -+ .gpio51 = GPIO_DIR_OUTPUT, -+ .gpio52 = GPIO_DIR_INPUT, -+ .gpio53 = GPIO_DIR_INPUT, -+ .gpio54 = GPIO_DIR_INPUT, -+ .gpio55 = GPIO_DIR_OUTPUT, -+ .gpio56 = GPIO_DIR_INPUT, -+ .gpio57 = GPIO_DIR_INPUT, -+ .gpio60 = GPIO_DIR_OUTPUT, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_level = { -+ .gpio34 = GPIO_LEVEL_LOW, -+ .gpio37 = GPIO_LEVEL_LOW, -+ .gpio46 = GPIO_LEVEL_HIGH, -+ .gpio50 = GPIO_LEVEL_HIGH, -+ .gpio51 = GPIO_LEVEL_LOW, -+ .gpio55 = GPIO_LEVEL_LOW, -+ .gpio60 = GPIO_LEVEL_HIGH, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_reset = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_mode = { -+ .gpio64 = GPIO_MODE_NATIVE, -+ .gpio65 = GPIO_MODE_NATIVE, -+ .gpio66 = GPIO_MODE_NATIVE, -+ .gpio67 = GPIO_MODE_NATIVE, -+ .gpio68 = GPIO_MODE_NATIVE, -+ .gpio69 = GPIO_MODE_NATIVE, -+ .gpio70 = GPIO_MODE_NATIVE, -+ .gpio71 = GPIO_MODE_NATIVE, -+ .gpio72 = GPIO_MODE_NATIVE, -+ .gpio73 = GPIO_MODE_NATIVE, -+ .gpio74 = GPIO_MODE_GPIO, -+ .gpio75 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_direction = { -+ .gpio74 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_level = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_reset = { -+}; -+ -+const struct pch_gpio_map mainboard_gpio_map = { -+ .set1 = { -+ .mode = &pch_gpio_set1_mode, -+ .direction = &pch_gpio_set1_direction, -+ .level = &pch_gpio_set1_level, -+ .blink = &pch_gpio_set1_blink, -+ .invert = &pch_gpio_set1_invert, -+ .reset = &pch_gpio_set1_reset, -+ }, -+ .set2 = { -+ .mode = &pch_gpio_set2_mode, -+ .direction = &pch_gpio_set2_direction, -+ .level = &pch_gpio_set2_level, -+ .reset = &pch_gpio_set2_reset, -+ }, -+ .set3 = { -+ .mode = &pch_gpio_set3_mode, -+ .direction = &pch_gpio_set3_direction, -+ .level = &pch_gpio_set3_level, -+ .reset = &pch_gpio_set3_reset, -+ }, -+}; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c -new file mode 100644 -index 0000000000..1373975352 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/hda_verb.c -@@ -0,0 +1,32 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <device/azalia_device.h> -+ -+const u32 cim_verb_data[] = { -+ 0x111d76e7, /* Codec Vendor / Device ID: IDT */ -+ 0x1028049a, /* Subsystem ID */ -+ 11, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(0, 0x1028049a), -+ AZALIA_PIN_CFG(0, 0x0a, 0x04a11020), -+ AZALIA_PIN_CFG(0, 0x0b, 0x0421101f), -+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110), -+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050), -+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), -+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3), -+ AZALIA_PIN_CFG(0, 0x11, 0xd5a301a0), -+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x20, 0x400000f0), -+ -+ 0x80862805, /* Codec Vendor / Device ID: Intel */ -+ 0x80860101, /* Subsystem ID */ -+ 4, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(3, 0x80860101), -+ AZALIA_PIN_CFG(3, 0x05, 0x18560010), -+ AZALIA_PIN_CFG(3, 0x06, 0x18560020), -+ AZALIA_PIN_CFG(3, 0x07, 0x18560030), -+}; -+ -+const u32 pc_beep_verbs[0] = {}; -+ -+AZALIA_ARRAY_SIZES; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5520/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/overridetree.cb -new file mode 100644 -index 0000000000..479d1b696e ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5520/overridetree.cb -@@ -0,0 +1,39 @@ -+## SPDX-License-Identifier: GPL-2.0-or-later -+ -+chip northbridge/intel/sandybridge -+ device domain 0 on -+ subsystemid 0x1028 0x049a inherit -+ -+ device ref igd on -+ register "gpu_cpu_backlight" = "0x00000218" -+ register "gpu_pch_backlight" = "0x13121312" -+ end -+ -+ chip southbridge/intel/bd82x6x -+ register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 1, 0 }" -+ register "usb_port_config" = "{ -+ { 1, 1, 0 }, -+ { 1, 1, 0 }, -+ { 1, 1, 1 }, -+ { 1, 1, 1 }, -+ { 1, 1, 2 }, -+ { 1, 1, 2 }, -+ { 1, 1, 3 }, -+ { 1, 1, 3 }, -+ { 1, 1, 5 }, -+ { 1, 1, 5 }, -+ { 1, 1, 7 }, -+ { 1, 1, 6 }, -+ { 1, 1, 6 }, -+ { 1, 1, 7 }, -+ }" -+ -+ device ref gbe off end -+ device ref pcie_rp4 off end -+ device ref pcie_rp7 on end # Broadcom BCM5761 Gigabit Ethernet -+ device ref sata1 on -+ register "sata_port_map" = "0x3b" -+ end -+ end -+ end -+end --- -2.39.5 - diff --git a/config/coreboot/default/patches/0013-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch b/config/coreboot/default/patches/0013-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch deleted file mode 100644 index 5944535f..00000000 --- a/config/coreboot/default/patches/0013-mb-dell-Add-Latitude-E5420-Sandy-Bridge.patch +++ /dev/null @@ -1,442 +0,0 @@ -From bbcd6a7f09ee99f3b26b0931f1dcd70970242ee8 Mon Sep 17 00:00:00 2001 -From: Nicholas Chin <nic.c3.14@gmail.com> -Date: Mon, 4 Mar 2024 18:05:43 -0700 -Subject: [PATCH 13/51] mb/dell: Add Latitude E5420 (Sandy Bridge) - -Mainboard is Krug 14". I do not physically have this system; someone -with physical access to one sent me the output of autoport which I then -modified to produce this port. I was also sent the VBT binary, which was -obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running version -A02 of the vendor firmware. - -This was originally tested and found to be working as a standalone board -port in Libreboot, but this variant based port in upstream coreboot has -not been tested. - -This can be internally flashed by sending a command to the EC, which -causes the EC to pull the FDO pin low and the firmware to skip setting -up any chipset based write protections [1]. The EC is the SMSC MEC5055, -which seems to be compatible with the existing MEC5035 code. - -[1] https://gitlab.com/nic3-14159/dell-flash-unlock - -Change-Id: I0283653156083768e1fd451bcf539b4e028589f4 -Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> ---- - src/mainboard/dell/snb_ivb_latitude/Kconfig | 10 +- - .../dell/snb_ivb_latitude/Kconfig.name | 3 + - .../snb_ivb_latitude/variants/e5420/data.vbt | Bin 0 -> 6144 bytes - .../variants/e5420/early_init.c | 14 ++ - .../snb_ivb_latitude/variants/e5420/gpio.c | 195 ++++++++++++++++++ - .../variants/e5420/hda_verb.c | 32 +++ - .../variants/e5420/overridetree.cb | 39 ++++ - 7 files changed, 292 insertions(+), 1 deletion(-) - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/data.vbt - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/gpio.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e5420/overridetree.cb - -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig -index 4e94a7ef80..e6a21ffb99 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig -@@ -17,6 +17,11 @@ config BOARD_DELL_SNB_IVB_LATITUDE_COMMON - select SYSTEM_TYPE_LAPTOP - select USE_NATIVE_RAMINIT - -+config BOARD_DELL_LATITUDE_E5420 -+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON -+ select BOARD_ROMSIZE_KB_6144 -+ select SOUTHBRIDGE_INTEL_BD82X6X -+ - config BOARD_DELL_LATITUDE_E5520 - select BOARD_DELL_SNB_IVB_LATITUDE_COMMON - select BOARD_ROMSIZE_KB_6144 -@@ -60,6 +65,7 @@ config MAINBOARD_DIR - default "dell/snb_ivb_latitude" - - config MAINBOARD_PART_NUMBER -+ default "Latitude E5420" if BOARD_DELL_LATITUDE_E5420 - default "Latitude E5520" if BOARD_DELL_LATITUDE_E5520 - default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420 - default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520 -@@ -74,6 +80,7 @@ config USBDEBUG_HCD_INDEX - default 2 - - config VARIANT_DIR -+ default "e5420" if BOARD_DELL_LATITUDE_E5420 - default "e5520" if BOARD_DELL_LATITUDE_E5520 - default "e6420" if BOARD_DELL_LATITUDE_E6420 - default "e6520" if BOARD_DELL_LATITUDE_E6520 -@@ -82,7 +89,8 @@ config VARIANT_DIR - default "e6530" if BOARD_DELL_LATITUDE_E6530 - - config VGA_BIOS_ID -- default "8086,0116" if BOARD_DELL_LATITUDE_E6520 -+ default "8086,0116" if BOARD_DELL_LATITUDE_E6520 \ -+ || BOARD_DELL_LATITUDE_E5420 - default "8086,0166" if BOARD_DELL_LATITUDE_E5530 - default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \ - || BOARD_DELL_LATITUDE_E5520 -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -index 7976691f21..a3fa2b1837 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -@@ -1,5 +1,8 @@ - ## SPDX-License-Identifier: GPL-2.0-only - -+config BOARD_DELL_LATITUDE_E5420 -+ bool "Latitude E5420" -+ - config BOARD_DELL_LATITUDE_E5520 - bool "Latitude E5520" - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/data.vbt -new file mode 100644 -index 0000000000000000000000000000000000000000..98b82fe6110fd295b5749041ec7f8c084ace5f57 -GIT binary patch -literal 6144 -zcmeHKeQZ-z6hE);wSBvNZ!2$ObQ^;MgV6zl*Rhp}BXnCCMZU^_r7jRwT!kfLo8?3H -zk9)u(7?cb(hChhTM57@QFfmbMB!G!dNsO6BW5OSp5EGF^jHnTTdhUBI+h`e+1ft1q -z^SfW?+;h)4_uO+|XEfEV$91)<gOArWE)OnSTD}Ug6?8a~vz+SmQn!4~y3N7b^|hPp -zR<5aEfv-b8M00Lk251!oO|8(YA6XaeXzkt-Z)@Ee!_{@z#Fro^?DqN4SGjRIu8KYp -zZEufuU@5MM@7jv%h;75FS}ezKv?JDzCH}d%tE)A-GuDb*+B%}~w%88r>}c;!*XQ5O -z)OU7u$J@4U+lk)#GSW%c%c)v`%R6?`w)LIyu6bD7-j0o&X9qUMcEsYlW3BU4rZRvt -zqAUpjf*qXuLCCsU0YM2I5@gB1WKd)f1+Yt?%HWd0DZxYumP(K<LxTif8A39+!KMl} -z31FHG)7?qk5g>e?=ER{f^&}W<0k@mxff(?6+Stw+s6y%k1mM$cLk#^FWWI*9bE1GY -z&VY9?WC1u#23^3^UYw5?H0x2S2gN`x18Fko6_x(#MKyuCU_<D!mEp$qO_An}#@>DV -zdkf*li41yW3p$*0Oo3+63kO6S91*KwP#l2i4jnc)JkUirL^$k}VbH0;CBh#BS=OLf -zW-yE3BRon75gG{_2~QIC5cUzCC%i)FCmbidM>tIwAPf>N5Pl?FC0r*+Sq!oXj!keQ -zVKcyK>TL+gc7oLco$28+FpeeXkEP}_Sea=mk#IWUR^m$!BogvszLPu83FJm0k6K<l -z$#$~YiXtY*GpHp#@FvHJ1UnBD*H%d+{_j24XE4nmBa*?5mOWiold28s3}>*}<HaeO -z+1|-8g2)FCfkDZIdb-Ub);z0#;XEbPfGe?A72!{DAUg|$m+Z~(i@h9j4gtm611ni( -z#u>ACcP}M4exU`*MKVwl5+t6JBpTkmm}xWflKUe~7}`!#%z#gAo{NxUrpDAndYktu -zI0}VLU`J7^xmF1AFiz5S^uzp*DPI$%$qq!(ikh0kP+(GKzF|@N?Y%_#Vp@M+xHr$F -z=%+18z`-fT%z)9-TS$~Dh@2yeN7!UIt0h`fWxUu`JvA_ra*8P48l%7KR0&c1;0R75 -z4f0oz(xQ3MWqz5>qW5M4tZWExHs8<H(e1G@4km@5wEzOOP^x<l`YmA|eKs6j3wl8B -z%C%;uygh%<#kGZ{fymL+OlV0!-*T!V5IB>X@p!@CBU=7e{5^Jl{s7by`po-AJqM2l -znk(=^0bHkF0rUw7)^7j;$=_UIs8`6P6b-;vPDZ#U9L)W1_PAYRDP9k~;5$stt5ZiV -zD0>;i-?OlYY2}P9WVnfGos4xee2r=EGWHR}ADH$VV>cO=xU?!4TjIi)OMBYI_PX#b -zm-eBHed5BOT-x6*W>;{IqAga~G6lCQT93k>Q}CpsomJR*1%FjEkv?fuT%c-8RklXO -zU8;6KWk*zeU)4TW+1D!mrE0EhHZfbBeN{4S7X@Pig%};A99QTdA~wZruL*8y?K!jP -zG5R*k=);S}Zn<T;W!Mxt`(!+z7_r@3LVpf|FESauM&4}+wqzXfba-zG>A}on(uzNF -zyu>BcjA})C@bg%<;+Eh2;Sz4heFFCbZ@C{FrXMIbYzu>?Bi-|vZ}JSFU%JA>7$7et -z0Yo%CnOVZm#ZA}4kWZOn15};h5*#OM3b+6vHzgruMP>=5MNJK1y42{YgveP-!j%#( -z0rGe@8t%!=66Ti%K4|Gx=o7gFp83wQ;+s3H7+r^SKlpp3KKcr!3@|n;NCH_=qL=3T -zq3WH?en`b+W-HR-fnrhw*9aZ%M}lHX7@H?E>!6wv_&YQFEHdA$%Z1R--yub>=c@p? -z6@7Fc$&>sAxwiz{BE$1kb$K9Co=ozlA973y^i(^BM|EZ$$^y`0KyHiMJ%O*XbfEX1 -ziZaH>W(1pWL0bo|T!x__N$^$DpmxI=bL6WUK3JGyn?rw-qC4ZA$yGjIB}N(=ldD2O -zAJ@bxp<qR-3lIv<!P~SE8r*#_Ckl?$0|1fZ>2>n}u*mUIYFd>}O_wuwBD^r9<#=!0 -X1LGbT_rSOZ#yv3ZfpHH!G!Og(1Xg~J - -literal 0 -HcmV?d00001 - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c -new file mode 100644 -index 0000000000..ff83db095b ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/early_init.c -@@ -0,0 +1,14 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <bootblock_common.h> -+#include <device/pci_ops.h> -+#include <ec/dell/mec5035/mec5035.h> -+#include <southbridge/intel/bd82x6x/pch.h> -+ -+void bootblock_mainboard_early_init(void) -+{ -+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN -+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN -+ | COMB_LPC_EN | COMA_LPC_EN); -+ mec5035_early_init(); -+} -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/gpio.c -new file mode 100644 -index 0000000000..f76b93d9f0 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/gpio.c -@@ -0,0 +1,195 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <southbridge/intel/common/gpio.h> -+ -+static const struct pch_gpio_set1 pch_gpio_set1_mode = { -+ .gpio0 = GPIO_MODE_GPIO, -+ .gpio1 = GPIO_MODE_NATIVE, -+ .gpio2 = GPIO_MODE_GPIO, -+ .gpio3 = GPIO_MODE_GPIO, -+ .gpio4 = GPIO_MODE_GPIO, -+ .gpio5 = GPIO_MODE_NATIVE, -+ .gpio6 = GPIO_MODE_GPIO, -+ .gpio7 = GPIO_MODE_GPIO, -+ .gpio8 = GPIO_MODE_GPIO, -+ .gpio9 = GPIO_MODE_NATIVE, -+ .gpio10 = GPIO_MODE_NATIVE, -+ .gpio11 = GPIO_MODE_NATIVE, -+ .gpio12 = GPIO_MODE_GPIO, -+ .gpio13 = GPIO_MODE_GPIO, -+ .gpio14 = GPIO_MODE_GPIO, -+ .gpio15 = GPIO_MODE_GPIO, -+ .gpio16 = GPIO_MODE_NATIVE, -+ .gpio17 = GPIO_MODE_GPIO, -+ .gpio18 = GPIO_MODE_NATIVE, -+ .gpio19 = GPIO_MODE_GPIO, -+ .gpio20 = GPIO_MODE_NATIVE, -+ .gpio21 = GPIO_MODE_GPIO, -+ .gpio22 = GPIO_MODE_GPIO, -+ .gpio23 = GPIO_MODE_NATIVE, -+ .gpio24 = GPIO_MODE_GPIO, -+ .gpio25 = GPIO_MODE_NATIVE, -+ .gpio26 = GPIO_MODE_NATIVE, -+ .gpio27 = GPIO_MODE_GPIO, -+ .gpio28 = GPIO_MODE_GPIO, -+ .gpio29 = GPIO_MODE_GPIO, -+ .gpio30 = GPIO_MODE_GPIO, -+ .gpio31 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_direction = { -+ .gpio0 = GPIO_DIR_INPUT, -+ .gpio2 = GPIO_DIR_INPUT, -+ .gpio3 = GPIO_DIR_INPUT, -+ .gpio4 = GPIO_DIR_INPUT, -+ .gpio6 = GPIO_DIR_INPUT, -+ .gpio7 = GPIO_DIR_INPUT, -+ .gpio8 = GPIO_DIR_INPUT, -+ .gpio12 = GPIO_DIR_OUTPUT, -+ .gpio13 = GPIO_DIR_INPUT, -+ .gpio14 = GPIO_DIR_INPUT, -+ .gpio15 = GPIO_DIR_INPUT, -+ .gpio17 = GPIO_DIR_INPUT, -+ .gpio19 = GPIO_DIR_INPUT, -+ .gpio21 = GPIO_DIR_INPUT, -+ .gpio22 = GPIO_DIR_INPUT, -+ .gpio24 = GPIO_DIR_INPUT, -+ .gpio27 = GPIO_DIR_INPUT, -+ .gpio28 = GPIO_DIR_INPUT, -+ .gpio29 = GPIO_DIR_INPUT, -+ .gpio30 = GPIO_DIR_OUTPUT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_level = { -+ .gpio12 = GPIO_LEVEL_HIGH, -+ .gpio30 = GPIO_LEVEL_HIGH, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_reset = { -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_invert = { -+ .gpio0 = GPIO_INVERT, -+ .gpio8 = GPIO_INVERT, -+ .gpio14 = GPIO_INVERT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_blink = { -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_mode = { -+ .gpio32 = GPIO_MODE_NATIVE, -+ .gpio33 = GPIO_MODE_GPIO, -+ .gpio34 = GPIO_MODE_GPIO, -+ .gpio35 = GPIO_MODE_GPIO, -+ .gpio36 = GPIO_MODE_GPIO, -+ .gpio37 = GPIO_MODE_GPIO, -+ .gpio38 = GPIO_MODE_GPIO, -+ .gpio39 = GPIO_MODE_GPIO, -+ .gpio40 = GPIO_MODE_NATIVE, -+ .gpio41 = GPIO_MODE_NATIVE, -+ .gpio42 = GPIO_MODE_NATIVE, -+ .gpio43 = GPIO_MODE_NATIVE, -+ .gpio44 = GPIO_MODE_NATIVE, -+ .gpio45 = GPIO_MODE_NATIVE, -+ .gpio46 = GPIO_MODE_GPIO, -+ .gpio47 = GPIO_MODE_NATIVE, -+ .gpio48 = GPIO_MODE_GPIO, -+ .gpio49 = GPIO_MODE_NATIVE, -+ .gpio50 = GPIO_MODE_GPIO, -+ .gpio51 = GPIO_MODE_GPIO, -+ .gpio52 = GPIO_MODE_GPIO, -+ .gpio53 = GPIO_MODE_GPIO, -+ .gpio54 = GPIO_MODE_GPIO, -+ .gpio55 = GPIO_MODE_GPIO, -+ .gpio56 = GPIO_MODE_GPIO, -+ .gpio57 = GPIO_MODE_GPIO, -+ .gpio58 = GPIO_MODE_NATIVE, -+ .gpio59 = GPIO_MODE_NATIVE, -+ .gpio60 = GPIO_MODE_GPIO, -+ .gpio61 = GPIO_MODE_NATIVE, -+ .gpio62 = GPIO_MODE_NATIVE, -+ .gpio63 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_direction = { -+ .gpio33 = GPIO_DIR_INPUT, -+ .gpio34 = GPIO_DIR_OUTPUT, -+ .gpio35 = GPIO_DIR_INPUT, -+ .gpio36 = GPIO_DIR_INPUT, -+ .gpio37 = GPIO_DIR_OUTPUT, -+ .gpio38 = GPIO_DIR_INPUT, -+ .gpio39 = GPIO_DIR_INPUT, -+ .gpio46 = GPIO_DIR_OUTPUT, -+ .gpio48 = GPIO_DIR_INPUT, -+ .gpio50 = GPIO_DIR_OUTPUT, -+ .gpio51 = GPIO_DIR_OUTPUT, -+ .gpio52 = GPIO_DIR_INPUT, -+ .gpio53 = GPIO_DIR_INPUT, -+ .gpio54 = GPIO_DIR_INPUT, -+ .gpio55 = GPIO_DIR_OUTPUT, -+ .gpio56 = GPIO_DIR_INPUT, -+ .gpio57 = GPIO_DIR_INPUT, -+ .gpio60 = GPIO_DIR_OUTPUT, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_level = { -+ .gpio34 = GPIO_LEVEL_LOW, -+ .gpio37 = GPIO_LEVEL_LOW, -+ .gpio46 = GPIO_LEVEL_HIGH, -+ .gpio50 = GPIO_LEVEL_HIGH, -+ .gpio51 = GPIO_LEVEL_LOW, -+ .gpio55 = GPIO_LEVEL_LOW, -+ .gpio60 = GPIO_LEVEL_HIGH, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_reset = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_mode = { -+ .gpio64 = GPIO_MODE_NATIVE, -+ .gpio65 = GPIO_MODE_NATIVE, -+ .gpio66 = GPIO_MODE_NATIVE, -+ .gpio67 = GPIO_MODE_NATIVE, -+ .gpio68 = GPIO_MODE_NATIVE, -+ .gpio69 = GPIO_MODE_NATIVE, -+ .gpio70 = GPIO_MODE_NATIVE, -+ .gpio71 = GPIO_MODE_NATIVE, -+ .gpio72 = GPIO_MODE_NATIVE, -+ .gpio73 = GPIO_MODE_NATIVE, -+ .gpio74 = GPIO_MODE_GPIO, -+ .gpio75 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_direction = { -+ .gpio74 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_level = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_reset = { -+}; -+ -+const struct pch_gpio_map mainboard_gpio_map = { -+ .set1 = { -+ .mode = &pch_gpio_set1_mode, -+ .direction = &pch_gpio_set1_direction, -+ .level = &pch_gpio_set1_level, -+ .blink = &pch_gpio_set1_blink, -+ .invert = &pch_gpio_set1_invert, -+ .reset = &pch_gpio_set1_reset, -+ }, -+ .set2 = { -+ .mode = &pch_gpio_set2_mode, -+ .direction = &pch_gpio_set2_direction, -+ .level = &pch_gpio_set2_level, -+ .reset = &pch_gpio_set2_reset, -+ }, -+ .set3 = { -+ .mode = &pch_gpio_set3_mode, -+ .direction = &pch_gpio_set3_direction, -+ .level = &pch_gpio_set3_level, -+ .reset = &pch_gpio_set3_reset, -+ }, -+}; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c -new file mode 100644 -index 0000000000..0bc6c35a63 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/hda_verb.c -@@ -0,0 +1,32 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <device/azalia_device.h> -+ -+const u32 cim_verb_data[] = { -+ 0x111d76e7, /* Codec Vendor / Device ID: IDT */ -+ 0x1028049b, /* Subsystem ID */ -+ 11, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(0, 0x1028049b), -+ AZALIA_PIN_CFG(0, 0x0a, 0x04a11020), -+ AZALIA_PIN_CFG(0, 0x0b, 0x0421101f), -+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110), -+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050), -+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), -+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3), -+ AZALIA_PIN_CFG(0, 0x11, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x20, 0xd5a30130), -+ -+ 0x80862805, /* Codec Vendor / Device ID: Intel */ -+ 0x80860101, /* Subsystem ID */ -+ 4, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(3, 0x80860101), -+ AZALIA_PIN_CFG(3, 0x05, 0x18560010), -+ AZALIA_PIN_CFG(3, 0x06, 0x18560020), -+ AZALIA_PIN_CFG(3, 0x07, 0x18560030), -+}; -+ -+const u32 pc_beep_verbs[0] = {}; -+ -+AZALIA_ARRAY_SIZES; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e5420/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/overridetree.cb -new file mode 100644 -index 0000000000..3f55bfd49d ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e5420/overridetree.cb -@@ -0,0 +1,39 @@ -+## SPDX-License-Identifier: GPL-2.0-or-later -+ -+chip northbridge/intel/sandybridge -+ device domain 0 on -+ subsystemid 0x1028 0x049b inherit -+ -+ device ref igd on -+ register "gpu_cpu_backlight" = "0x00000c31" -+ register "gpu_pch_backlight" = "0x13121312" -+ end -+ -+ chip southbridge/intel/bd82x6x -+ register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 1, 0 }" -+ register "usb_port_config" = "{ -+ { 1, 1, 0 }, -+ { 1, 1, 0 }, -+ { 1, 1, 1 }, -+ { 1, 1, 1 }, -+ { 1, 1, 2 }, -+ { 1, 1, 2 }, -+ { 1, 1, 3 }, -+ { 1, 1, 3 }, -+ { 1, 1, 5 }, -+ { 1, 1, 5 }, -+ { 1, 1, 7 }, -+ { 1, 1, 6 }, -+ { 1, 1, 6 }, -+ { 1, 1, 7 }, -+ }" -+ -+ device ref gbe off end -+ device ref pcie_rp4 off end -+ device ref pcie_rp7 on end # Broadcom BCM5761 Gigabit Ethernet -+ device ref sata1 on -+ register "sata_port_map" = "0x3b" -+ end -+ end -+ end -+end --- -2.39.5 - diff --git a/config/coreboot/default/patches/0023-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch b/config/coreboot/default/patches/0013-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch index f9d80b9f..447693aa 100644 --- a/config/coreboot/default/patches/0023-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch +++ b/config/coreboot/default/patches/0013-nb-haswell-Fully-disable-iGPU-when-dGPU-is-used.patch @@ -1,7 +1,7 @@ -From d86824305f11bc684f1e91e3826158b8c7d7e0ee Mon Sep 17 00:00:00 2001 +From 215661dbe631c21a2533cc93bdd1e9f82aa9601e Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Sat, 6 Apr 2024 01:22:47 +0100 -Subject: [PATCH 23/51] nb/haswell: Fully disable iGPU when dGPU is used +Subject: [PATCH 13/40] nb/haswell: Fully disable iGPU when dGPU is used My earlier patch disabled decode *and* disabled the iGPU itself, but a subsequent revision disabled only VGA decode. Upon revisiting, I @@ -47,5 +47,5 @@ index f7fad3183d..1b188e92e1 100644 static struct device_operations gma_func0_ops = { -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0025-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch b/config/coreboot/default/patches/0014-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch index ed620a3e..bfbddae1 100644 --- a/config/coreboot/default/patches/0025-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch +++ b/config/coreboot/default/patches/0014-ec-dell-mec5035-Add-S3-suspend-SMI-handler.patch @@ -1,7 +1,7 @@ -From 2fdd5bbb2bbec76c3c2238c4cd471b9b63073942 Mon Sep 17 00:00:00 2001 +From aadef041f002b9f0504fcc67df39654680d67bdd Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Fri, 3 May 2024 11:03:32 -0600 -Subject: [PATCH 25/51] ec/dell/mec5035: Add S3 suspend SMI handler +Subject: [PATCH 14/40] ec/dell/mec5035: Add S3 suspend SMI handler This is necessary for S3 resume to work on SNB and newer Dell Latitude laptops. If a command isn't sent, the EC cuts power to the DIMMs, @@ -143,5 +143,5 @@ index 0000000000..958733bf97 + } +} -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0014-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch b/config/coreboot/default/patches/0014-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch deleted file mode 100644 index e8c46203..00000000 --- a/config/coreboot/default/patches/0014-mb-dell-Add-Latitude-E6320-Sandy-Bridge.patch +++ /dev/null @@ -1,435 +0,0 @@ -From cd6e699649459fa5ff2623018ccf3585eb3d3821 Mon Sep 17 00:00:00 2001 -From: Nicholas Chin <nic.c3.14@gmail.com> -Date: Wed, 7 Feb 2024 15:23:46 -0700 -Subject: [PATCH 14/51] mb/dell: Add Latitude E6320 (Sandy Bridge) - -Mainboard is PAL70/LA-6611P. I do not physically have this system; -someone with physical access to one sent me the output of autoport which -I then modified to produce this port. I was also sent the VBT binary, -which was obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running -version A22 of the vendor firmware. This port has not been tested. - -The EC is the SMSC MEC5055, which seems to be compatible with the -existing MEC5035 code. As with the other Dell systems with this EC, this -board is assumed to be internally flashable using an EC command that -tells it to pull the FDO pin low on the next boot, which also tells the -vendor firmware to disable all write protections to the flash [1]. - -[1] https://gitlab.com/nic3-14159/dell-flash-unlock - -Change-Id: I5905f8c6a8dbad56e03bdeedc2179600d0c4ba46 -Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> ---- - src/mainboard/dell/snb_ivb_latitude/Kconfig | 11 +- - .../dell/snb_ivb_latitude/Kconfig.name | 3 + - .../snb_ivb_latitude/variants/e6320/data.vbt | Bin 0 -> 6144 bytes - .../variants/e6320/early_init.c | 17 ++ - .../snb_ivb_latitude/variants/e6320/gpio.c | 190 ++++++++++++++++++ - .../variants/e6320/hda_verb.c | 32 +++ - .../variants/e6320/overridetree.cb | 35 ++++ - 7 files changed, 287 insertions(+), 1 deletion(-) - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/data.vbt - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/gpio.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6320/overridetree.cb - -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig -index e6a21ffb99..84ffe1d33a 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig -@@ -27,6 +27,12 @@ config BOARD_DELL_LATITUDE_E5520 - select BOARD_ROMSIZE_KB_6144 - select SOUTHBRIDGE_INTEL_BD82X6X - -+config BOARD_DELL_LATITUDE_E6320 -+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON -+ select BOARD_ROMSIZE_KB_10240 -+ select MAINBOARD_USES_IFD_GBE_REGION -+ select SOUTHBRIDGE_INTEL_BD82X6X -+ - config BOARD_DELL_LATITUDE_E6420 - select BOARD_DELL_SNB_IVB_LATITUDE_COMMON - select BOARD_ROMSIZE_KB_10240 -@@ -67,6 +73,7 @@ config MAINBOARD_DIR - config MAINBOARD_PART_NUMBER - default "Latitude E5420" if BOARD_DELL_LATITUDE_E5420 - default "Latitude E5520" if BOARD_DELL_LATITUDE_E5520 -+ default "Latitude E6320" if BOARD_DELL_LATITUDE_E6320 - default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420 - default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520 - default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530 -@@ -82,6 +89,7 @@ config USBDEBUG_HCD_INDEX - config VARIANT_DIR - default "e5420" if BOARD_DELL_LATITUDE_E5420 - default "e5520" if BOARD_DELL_LATITUDE_E5520 -+ default "e6320" if BOARD_DELL_LATITUDE_E6320 - default "e6420" if BOARD_DELL_LATITUDE_E6420 - default "e6520" if BOARD_DELL_LATITUDE_E6520 - default "e5530" if BOARD_DELL_LATITUDE_E5530 -@@ -93,7 +101,8 @@ config VGA_BIOS_ID - || BOARD_DELL_LATITUDE_E5420 - default "8086,0166" if BOARD_DELL_LATITUDE_E5530 - default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \ -- || BOARD_DELL_LATITUDE_E5520 -+ || BOARD_DELL_LATITUDE_E5520 \ -+ || BOARD_DELL_LATITUDE_E6320 - default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \ - || BOARD_DELL_LATITUDE_E6530 - -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -index a3fa2b1837..ef6a1329a9 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -@@ -6,6 +6,9 @@ config BOARD_DELL_LATITUDE_E5420 - config BOARD_DELL_LATITUDE_E5520 - bool "Latitude E5520" - -+config BOARD_DELL_LATITUDE_E6320 -+ bool "Latitude E6320" -+ - config BOARD_DELL_LATITUDE_E6420 - bool "Latitude E6420" - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/data.vbt -new file mode 100644 -index 0000000000000000000000000000000000000000..471a9e29da639dd496f3ecebd5d0754a9045c00b -GIT binary patch -literal 6144 -zcmeHKeP|p-6#wn*-rZ(yH@R-odPzTgZEU>S#_pv}j2iKhT+^%8_DtJw21|4GP8*0x -zyw;EYW49Xozz<Rt@ek1mic(N32r8oZ0U9lcR8a)~s33wLV8yCftLK~DJJWb)8w-j; -z=J?H<nfK<+n>TOX?48xuwV5_`Zb)3w)w?dSc1`nTL|NF_SMw&<<)v%g#!cH2otrzi -zb*<mneJMSLdC1iK_7#v-6w7R}+t1&W8P4wBo*&F!lcNn?)F-EqWZV#oQEb%`x-4^5 -zW@sogOik1`n9Wc#r82|0A!=-0LD!FFGrMwG+CDg($q(js(#Y`8?s79ubEJD@ba#I6 -znjO0++P#czvh8NBR?)iQUA%txNPhHO>Kq!PUMaJadUHE-`5SWCb4_6i;5Aj(6hQGK -zcq^2uUt5sS5YSMiL+CJcs0#cVOdTN|K@D>?tkF=dqenwjM^Z-^K2z~&z+xRs!o^Jx -zkUGd?>QtXw8V(I09OiMb0DZy>`=tO^#BCssw{}bkOnj=#Ic!~!6!J*{`jbEv5O4)- -zg-UBlIa$c9Pg4C;0_-wq3t+dbZfn1wBi@zhNnWx()w{Vb-G8OC_m*478gTrX3U*a1 -zHr@y<Lcbct?Wzy^)OH+FC$S`8V@n`{QN~@2dxJU-1ucBe_>rOO78dFPXES1q3mHj9 -zFXKwa)r^}Mw=nKzJjj?}>}NdBc$G29IK=pr@de`u;}}D$5~yYbw&Hlf=OF0X?I=Y$ -z$D`mgy>}U$hl}G6m&PmXveHnY5DenC!g~=E3i?HIrEpyk>_(-IsVtEqUEoqxrDFdq -zrYwhOv0o^NgW$OKN}=$7Z-w5*Vuv?T3~uuFGwP92?Qr8n0iQp=u*7rep9Q8dW#?ZI -zFly1ww^^l*+YC6t16l_{g}tVVpVZ0fDk%5+`|+*688vr-<Lw_SRc^+avHI{BCpdYb -z70yLEI0-45%t;z||GKzov+|VFW6hab&NAG9FD+h6sBu$cX`r0eJ%T`kvK4+(wT`0= -z$fxKG+om?Ge1-EhbNc*Xjy1opKZSaiv-EL~GvOa&&bx~z##3W;F2{b=<HQ4!<1CFk -z17i)$X+`=C=0udOPOx3$IjzopqwQzLr*jT4C)(jmj2>uYP8$M=#caX6OWA1Ez395U -z%x<yAs)6-Ascr5<x*>CIZibyRlE~I0-ianVaz~q|EMlL7hc1U5w?}Kekws6fyy@`e -z4NdX%L#2`A#c_N4ftGmuwbDo=incwf=WnBJk6)fYz%6Cmy>HwK$Y|iP`Y7sgjDPhQ -zR|wv367k}1g)-G@kXq(X;{Bjt998b9{cpD9zGhOQ5%$4OSMtc2(<dx@0O}7_G+$WF -zLYyaPtFT6d*e&Q$VLd0r%Yr@=*7rjEDyT7JwT8sSA<BiU8$)7mh@K2tFNMULA^I|8 -z{Sp#>gO(fCMTS^w(6xrO#}IcK^sHgMZis^heP>uIf6|z=%Cy#)Vxvjdo7U~7*k{rU -zruB{~J}~KL(+X9Kxz*-5M>NNGSaIfXi19({d4mrk?K50@R0%Wn*PP9d(MMIzI2~RX -z)(4h&8(YL@UyKJ*)4o${n5ZGd(hDf+)cv8sSBxWen|f*u<-sgt(u+U-bkd}Tj+5@9 -zJosfSdvPo8zGnluemJg=E7A{=N<Rc#KYYEg?^p`+_?~aU(kEmFus{DshA~iA(onLY -zvIfpBJt;KWP4n8&`n1##c($WnDo|=?rlHBz&}36&HPWwp8op_i8c-**(TSd{Y{SZ? -z_=^K$27e+q;^vRNU3~a=cd;V{%O=iuo*&xwXyg19${Ap0yO@a|N-<e^7iIClF{vUn -z&4$y_V7MA)=E=%7n63u!J9FY$RK8hXHDE%%Lx$ZgX902-<9r|4lkx>QwFch>PUO1w -z=6JffnB-kQ)VLb>sSZdDrI@U2!?HLA9Mlek!*k>;&jx<)xfnBiY^I6DRt*l*`n8ly -zu!h)b?sRV1==Nf*Cw9&&i7n^9Nts>wk>adaY&E5OdW*A?iI}v+E6GGlsR<+#%jpl^ -zGz<Q^vpj>qhDjj3zr60Bgh=l{NzJp$x#fCR%*8!ZR?fC&JuvHmSr5#5VAcb(9+>sO -IzvhA80TAzedH?_b - -literal 0 -HcmV?d00001 - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c -new file mode 100644 -index 0000000000..b0c4638858 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/early_init.c -@@ -0,0 +1,17 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <bootblock_common.h> -+#include <device/pci_ops.h> -+#include <ec/dell/mec5035/mec5035.h> -+#include <southbridge/intel/bd82x6x/pch.h> -+ -+const struct southbridge_usb_port mainboard_usb_ports[] = { -+}; -+ -+void bootblock_mainboard_early_init(void) -+{ -+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN -+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN -+ | COMB_LPC_EN | COMA_LPC_EN); -+ mec5035_early_init(); -+} -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/gpio.c -new file mode 100644 -index 0000000000..61f01816c4 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/gpio.c -@@ -0,0 +1,190 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <southbridge/intel/common/gpio.h> -+ -+static const struct pch_gpio_set1 pch_gpio_set1_mode = { -+ .gpio0 = GPIO_MODE_GPIO, -+ .gpio1 = GPIO_MODE_NATIVE, -+ .gpio2 = GPIO_MODE_GPIO, -+ .gpio3 = GPIO_MODE_NATIVE, -+ .gpio4 = GPIO_MODE_GPIO, -+ .gpio5 = GPIO_MODE_NATIVE, -+ .gpio6 = GPIO_MODE_GPIO, -+ .gpio7 = GPIO_MODE_GPIO, -+ .gpio8 = GPIO_MODE_GPIO, -+ .gpio9 = GPIO_MODE_NATIVE, -+ .gpio10 = GPIO_MODE_NATIVE, -+ .gpio11 = GPIO_MODE_NATIVE, -+ .gpio12 = GPIO_MODE_NATIVE, -+ .gpio13 = GPIO_MODE_GPIO, -+ .gpio14 = GPIO_MODE_GPIO, -+ .gpio15 = GPIO_MODE_GPIO, -+ .gpio16 = GPIO_MODE_GPIO, -+ .gpio17 = GPIO_MODE_GPIO, -+ .gpio18 = GPIO_MODE_NATIVE, -+ .gpio19 = GPIO_MODE_GPIO, -+ .gpio20 = GPIO_MODE_NATIVE, -+ .gpio21 = GPIO_MODE_GPIO, -+ .gpio22 = GPIO_MODE_GPIO, -+ .gpio23 = GPIO_MODE_NATIVE, -+ .gpio24 = GPIO_MODE_GPIO, -+ .gpio25 = GPIO_MODE_NATIVE, -+ .gpio26 = GPIO_MODE_NATIVE, -+ .gpio27 = GPIO_MODE_GPIO, -+ .gpio28 = GPIO_MODE_GPIO, -+ .gpio29 = GPIO_MODE_GPIO, -+ .gpio30 = GPIO_MODE_GPIO, -+ .gpio31 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_direction = { -+ .gpio0 = GPIO_DIR_INPUT, -+ .gpio2 = GPIO_DIR_INPUT, -+ .gpio4 = GPIO_DIR_INPUT, -+ .gpio6 = GPIO_DIR_INPUT, -+ .gpio7 = GPIO_DIR_INPUT, -+ .gpio8 = GPIO_DIR_INPUT, -+ .gpio13 = GPIO_DIR_INPUT, -+ .gpio14 = GPIO_DIR_INPUT, -+ .gpio15 = GPIO_DIR_INPUT, -+ .gpio16 = GPIO_DIR_INPUT, -+ .gpio17 = GPIO_DIR_INPUT, -+ .gpio19 = GPIO_DIR_INPUT, -+ .gpio21 = GPIO_DIR_INPUT, -+ .gpio22 = GPIO_DIR_INPUT, -+ .gpio24 = GPIO_DIR_INPUT, -+ .gpio27 = GPIO_DIR_INPUT, -+ .gpio28 = GPIO_DIR_INPUT, -+ .gpio29 = GPIO_DIR_INPUT, -+ .gpio30 = GPIO_DIR_OUTPUT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_level = { -+ .gpio30 = GPIO_LEVEL_HIGH, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_reset = { -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_invert = { -+ .gpio0 = GPIO_INVERT, -+ .gpio8 = GPIO_INVERT, -+ .gpio14 = GPIO_INVERT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_blink = { -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_mode = { -+ .gpio32 = GPIO_MODE_NATIVE, -+ .gpio33 = GPIO_MODE_GPIO, -+ .gpio34 = GPIO_MODE_GPIO, -+ .gpio35 = GPIO_MODE_GPIO, -+ .gpio36 = GPIO_MODE_GPIO, -+ .gpio37 = GPIO_MODE_GPIO, -+ .gpio38 = GPIO_MODE_GPIO, -+ .gpio39 = GPIO_MODE_GPIO, -+ .gpio40 = GPIO_MODE_NATIVE, -+ .gpio41 = GPIO_MODE_NATIVE, -+ .gpio42 = GPIO_MODE_NATIVE, -+ .gpio43 = GPIO_MODE_NATIVE, -+ .gpio44 = GPIO_MODE_NATIVE, -+ .gpio45 = GPIO_MODE_GPIO, -+ .gpio46 = GPIO_MODE_NATIVE, -+ .gpio47 = GPIO_MODE_NATIVE, -+ .gpio48 = GPIO_MODE_GPIO, -+ .gpio49 = GPIO_MODE_GPIO, -+ .gpio50 = GPIO_MODE_NATIVE, -+ .gpio51 = GPIO_MODE_GPIO, -+ .gpio52 = GPIO_MODE_GPIO, -+ .gpio53 = GPIO_MODE_NATIVE, -+ .gpio54 = GPIO_MODE_GPIO, -+ .gpio55 = GPIO_MODE_NATIVE, -+ .gpio56 = GPIO_MODE_NATIVE, -+ .gpio57 = GPIO_MODE_GPIO, -+ .gpio58 = GPIO_MODE_NATIVE, -+ .gpio59 = GPIO_MODE_NATIVE, -+ .gpio60 = GPIO_MODE_GPIO, -+ .gpio61 = GPIO_MODE_NATIVE, -+ .gpio62 = GPIO_MODE_NATIVE, -+ .gpio63 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_direction = { -+ .gpio33 = GPIO_DIR_INPUT, -+ .gpio34 = GPIO_DIR_OUTPUT, -+ .gpio35 = GPIO_DIR_INPUT, -+ .gpio36 = GPIO_DIR_INPUT, -+ .gpio37 = GPIO_DIR_INPUT, -+ .gpio38 = GPIO_DIR_INPUT, -+ .gpio39 = GPIO_DIR_INPUT, -+ .gpio45 = GPIO_DIR_OUTPUT, -+ .gpio48 = GPIO_DIR_INPUT, -+ .gpio49 = GPIO_DIR_OUTPUT, -+ .gpio51 = GPIO_DIR_INPUT, -+ .gpio52 = GPIO_DIR_INPUT, -+ .gpio54 = GPIO_DIR_INPUT, -+ .gpio57 = GPIO_DIR_INPUT, -+ .gpio60 = GPIO_DIR_OUTPUT, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_level = { -+ .gpio34 = GPIO_LEVEL_HIGH, -+ .gpio45 = GPIO_LEVEL_LOW, -+ .gpio49 = GPIO_LEVEL_LOW, -+ .gpio60 = GPIO_LEVEL_HIGH, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_reset = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_mode = { -+ .gpio64 = GPIO_MODE_NATIVE, -+ .gpio65 = GPIO_MODE_NATIVE, -+ .gpio66 = GPIO_MODE_NATIVE, -+ .gpio67 = GPIO_MODE_NATIVE, -+ .gpio68 = GPIO_MODE_GPIO, -+ .gpio69 = GPIO_MODE_GPIO, -+ .gpio70 = GPIO_MODE_GPIO, -+ .gpio71 = GPIO_MODE_GPIO, -+ .gpio72 = GPIO_MODE_NATIVE, -+ .gpio73 = GPIO_MODE_NATIVE, -+ .gpio74 = GPIO_MODE_NATIVE, -+ .gpio75 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_direction = { -+ .gpio68 = GPIO_DIR_INPUT, -+ .gpio69 = GPIO_DIR_INPUT, -+ .gpio70 = GPIO_DIR_INPUT, -+ .gpio71 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_level = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_reset = { -+}; -+ -+const struct pch_gpio_map mainboard_gpio_map = { -+ .set1 = { -+ .mode = &pch_gpio_set1_mode, -+ .direction = &pch_gpio_set1_direction, -+ .level = &pch_gpio_set1_level, -+ .blink = &pch_gpio_set1_blink, -+ .invert = &pch_gpio_set1_invert, -+ .reset = &pch_gpio_set1_reset, -+ }, -+ .set2 = { -+ .mode = &pch_gpio_set2_mode, -+ .direction = &pch_gpio_set2_direction, -+ .level = &pch_gpio_set2_level, -+ .reset = &pch_gpio_set2_reset, -+ }, -+ .set3 = { -+ .mode = &pch_gpio_set3_mode, -+ .direction = &pch_gpio_set3_direction, -+ .level = &pch_gpio_set3_level, -+ .reset = &pch_gpio_set3_reset, -+ }, -+}; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c -new file mode 100644 -index 0000000000..2e3f7fa697 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/hda_verb.c -@@ -0,0 +1,32 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <device/azalia_device.h> -+ -+const u32 cim_verb_data[] = { -+ 0x111d76e7, /* Codec Vendor / Device ID: IDT */ -+ 0x10280492, /* Subsystem ID */ -+ 11, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(0, 0x10280492), -+ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020), -+ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f), -+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110), -+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050), -+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), -+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3), -+ AZALIA_PIN_CFG(0, 0x11, 0xd5a30130), -+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x20, 0x400000f0), -+ -+ 0x80862805, /* Codec Vendor / Device ID: Intel */ -+ 0x80860101, /* Subsystem ID */ -+ 4, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(3, 0x80860101), -+ AZALIA_PIN_CFG(3, 0x05, 0x18560010), -+ AZALIA_PIN_CFG(3, 0x06, 0x18560020), -+ AZALIA_PIN_CFG(3, 0x07, 0x18560030), -+}; -+ -+const u32 pc_beep_verbs[0] = {}; -+ -+AZALIA_ARRAY_SIZES; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6320/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/overridetree.cb -new file mode 100644 -index 0000000000..3bfe6b57ed ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6320/overridetree.cb -@@ -0,0 +1,35 @@ -+## SPDX-License-Identifier: GPL-2.0-or-later -+ -+chip northbridge/intel/sandybridge -+ device domain 0 on -+ subsystemid 0x1028 0x0492 inherit -+ -+ device ref igd on -+ register "gpu_cpu_backlight" = "0x00000622" -+ register "gpu_pch_backlight" = "0x13121312" -+ end -+ -+ chip southbridge/intel/bd82x6x -+ register "usb_port_config" = "{ -+ { 1, 1, 0 }, -+ { 1, 0, 0 }, -+ { 1, 1, 1 }, -+ { 1, 0, 1 }, -+ { 1, 1, 2 }, -+ { 1, 1, 2 }, -+ { 1, 1, 3 }, -+ { 1, 1, 3 }, -+ { 1, 0, 5 }, -+ { 1, 0, 5 }, -+ { 1, 1, 7 }, -+ { 1, 1, 6 }, -+ { 1, 0, 6 }, -+ { 1, 0, 7 }, -+ }" -+ -+ device ref sata1 on -+ register "sata_port_map" = "0x3b" -+ end -+ end -+ end -+end --- -2.39.5 - diff --git a/config/coreboot/default/patches/0015-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch b/config/coreboot/default/patches/0015-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch deleted file mode 100644 index e2be42c9..00000000 --- a/config/coreboot/default/patches/0015-mb-dell-Add-Latitude-E6220-Sandy-Bridge.patch +++ /dev/null @@ -1,438 +0,0 @@ -From a32431d5f7574ffa6391221c7740f1739203eaa7 Mon Sep 17 00:00:00 2001 -From: Nicholas Chin <nic.c3.14@gmail.com> -Date: Fri, 8 Mar 2024 09:27:36 -0700 -Subject: [PATCH 15/51] mb/dell: Add Latitude E6220 (Sandy Bridge) - -Mainboard is codenamed Vida. I do not physically have this system; -someone with physical access to one sent me the output of autoport which -I then modified to produce this port. The VBT was obtained using -intelvbttool while running version A14 (latest available version) of the -vendor firmware. - -Tested and found to boot as part of a libreboot build based on upstream -coreboot commit b7341da191 with additional patches, though these do not -appear to affect SNB/IVB. The base E6430 patch was tested against -coreboot main. - -The EC is the SMSC MEC5055, which seems to be compatible with the -existing MEC5035 code. As with the other Dell systems with this EC, this -board is assumed to be internally flashable using an EC command that -tells it to pull the FDO pin low on the next boot, which also tells the -vendor firmware to disable all write protections to the flash [1]. - -[1] https://gitlab.com/nic3-14159/dell-flash-unlock - -Change-Id: I570023b0837521b75aac6d5652c74030c06b8a4c -Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> ---- - src/mainboard/dell/snb_ivb_latitude/Kconfig | 9 + - .../dell/snb_ivb_latitude/Kconfig.name | 3 + - .../snb_ivb_latitude/variants/e6220/data.vbt | Bin 0 -> 3985 bytes - .../variants/e6220/early_init.c | 14 ++ - .../snb_ivb_latitude/variants/e6220/gpio.c | 192 ++++++++++++++++++ - .../variants/e6220/hda_verb.c | 32 +++ - .../variants/e6220/overridetree.cb | 37 ++++ - 7 files changed, 287 insertions(+) - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/data.vbt - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/gpio.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6220/overridetree.cb - -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig -index 84ffe1d33a..baa83baa41 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig -@@ -27,6 +27,12 @@ config BOARD_DELL_LATITUDE_E5520 - select BOARD_ROMSIZE_KB_6144 - select SOUTHBRIDGE_INTEL_BD82X6X - -+config BOARD_DELL_LATITUDE_E6220 -+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON -+ select BOARD_ROMSIZE_KB_10240 -+ select MAINBOARD_USES_IFD_GBE_REGION -+ select SOUTHBRIDGE_INTEL_BD82X6X -+ - config BOARD_DELL_LATITUDE_E6320 - select BOARD_DELL_SNB_IVB_LATITUDE_COMMON - select BOARD_ROMSIZE_KB_10240 -@@ -73,6 +79,7 @@ config MAINBOARD_DIR - config MAINBOARD_PART_NUMBER - default "Latitude E5420" if BOARD_DELL_LATITUDE_E5420 - default "Latitude E5520" if BOARD_DELL_LATITUDE_E5520 -+ default "Latitude E6220" if BOARD_DELL_LATITUDE_E6220 - default "Latitude E6320" if BOARD_DELL_LATITUDE_E6320 - default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420 - default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520 -@@ -89,6 +96,7 @@ config USBDEBUG_HCD_INDEX - config VARIANT_DIR - default "e5420" if BOARD_DELL_LATITUDE_E5420 - default "e5520" if BOARD_DELL_LATITUDE_E5520 -+ default "e6220" if BOARD_DELL_LATITUDE_E6220 - default "e6320" if BOARD_DELL_LATITUDE_E6320 - default "e6420" if BOARD_DELL_LATITUDE_E6420 - default "e6520" if BOARD_DELL_LATITUDE_E6520 -@@ -102,6 +110,7 @@ config VGA_BIOS_ID - default "8086,0166" if BOARD_DELL_LATITUDE_E5530 - default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \ - || BOARD_DELL_LATITUDE_E5520 \ -+ || BOARD_DELL_LATITUDE_E6220 \ - || BOARD_DELL_LATITUDE_E6320 - default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \ - || BOARD_DELL_LATITUDE_E6530 -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -index ef6a1329a9..349ee7f79e 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -@@ -6,6 +6,9 @@ config BOARD_DELL_LATITUDE_E5420 - config BOARD_DELL_LATITUDE_E5520 - bool "Latitude E5520" - -+config BOARD_DELL_LATITUDE_E6220 -+ bool "Latitude E6220" -+ - config BOARD_DELL_LATITUDE_E6320 - bool "Latitude E6320" - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/data.vbt -new file mode 100644 -index 0000000000000000000000000000000000000000..548075a74500b5d159108089ee29cff802d07db7 -GIT binary patch -literal 3985 -zcmdT{eP|p-6#wn*-rZ(yH@R-odPzTgZQ6LXjonL|7&YQ0xu#d`$C=h}21|4GP8*0x -zyjE@hv0Dv(P?c0g{G(_DMJZ@22r8oZ0U9lcR8a)~s33wOSg|T<^?b8?XBzL?#)6`A -z{N~Nfd-LYan>TOv7WZ{+rcIq264!S1u1&02-MpSC3mf}u-r~BvbgkXEX=|c$bLZBs -zbsM{{q9-s1nVR3f2C|A`nJsqvC7UwC+1=angV`H%w4sao<P?&OTVpYbtz1OwGuLN^ -zhBCv{M16zV3^h|KGn^Zu#@6L@%V;*UGnb`pgTtBpU~UJE3=i!tH{%>fx<^KL=Lc`x -zzLTQeOW7vdZsuwwtsUOU>vxajM=zqzp&{y(GCQa@w<DLoHJ81}6s7=PS9MJR6hDG@ -zLaF+#1qlrS4OKdX4nv2kz^}p75z-OVFk8cF4b?h&G(>eIb%fzF6`uwy)UhaB+ynus -zBRr-~^|__t=m5fD9tR81r@XLV3UEc-2I6>o`;@@MXS$rj)&)r+pA?|K2vh+9SHM=N -zw3d{Uh1~iK)juV`E`v4?cFU@^_DehBU5TFLmFrTyoBPuJ*ExIdxO1!lC!eceSG8i} -z&A<Zmt5Mvo`mkSZ$5C|>ivl*T2}Cf;*vEJvsN-nR!WWDm8M<y^zAkV9BgVLlk!18T -zu4CN5*u}VmaUbIm#suRa;|0cRj7i2(#%GK#8OIsFFtjRxYDQoSP8NI)g09_;Qlzsy -z3O>^Zmcltu96wMRudvHXLxn;xh~EqEM^Gr}m&=vHbwRKjl{%)fM2d8tOI4MM{l!dK -z4$)%2P!LDJaqX2t;s4$Wy@Q1gZ=x97<n3qFBc<Bm#;F26e|~<6=hD9lOk>K<zaU`L -zqML8CN*#9@aDs=m4ulGOO%*?>lhsvF9`g6&TYocZ_JQN=A1hUE#+kAD@E9jJd7%}~ -zMLIYMDVoel8h1}$+_YJF%DJ&-O)X~`ZoroouO-yDsj)OrPU{{+ph4LJKdD;Bi3a3T -zbe?Tf8&<r^`I<R>elW+H+t;5$y~|nhq{o@?k1^-Hg%jhcu{xJyzvgk`0m*Te#GQe$ -z2IjOP{U&oF$`&WsuJN2!=fTnT^W)PwhnW-Ya3)3%H!`OUfy6?#V9r%+wCY}TU0!Cl -z*kjeex}MZl_aWVoxhXfp&Ur~>>k;onlO4II%~KY!FT|r)!;agdwcf~rXIAVwc6CEj -zJpE{CBzZ;L-gdYp9)G<w5{aU1kLvl`XxrnL=MQj88F%j+w*oR6c&t8(di=t_dW<Us -z?>C8f@wZ%=YBfkLb0_gZP%us?_tgG3TXJ7BDbWb~V23Mt{QT(?mOc#ihbo#YtY#rD -z7PLiJBSP#J^tiB|7vdE`p9|}IA$}9o7_wSJ;))RELe^~|u{T6dhpd-F;;j&U6|#N} -z3BN(h4C``3tTE^&!`fqrdks2dSZ^5Oh(X^Omdc+rCapBB)uz~J(k-TSw<-3U^rC6K -zYl;s|`q{KX)nazFdEs%*@f}l~SsY?~kb2(WgGl=fm!43<O#L+%@MH9Gl`~Gq=7;rx -zMc&31@YxsRfz-6`>>4I&2(k1$iaK?FYVZ}~h~1{1T|;>=%b4`yk3XF>siEVHyC@HS -z8OvVW%DeB`K&~H7>f?&^gQU_A0oM<l8+N5oZ4)iV>;p0b*k61j!x*S5X(-unS`9rZ -zG}=vb+R*x})DSq-Q7;uJwKLPuG`Ej6G}#nch4dSqhHo0B2Gq%HbgCyS+pwZ3{?fph -z!Jo*Dxcw7v7a#rIU2IRmVn4KE$x~88+a7J4zd|_!%xo9z$+P;Q6qA*AQ5FvzlPW^f -zY&aJUhO1#_o~&$x>1qJKGpC+K<(u_&1197<WZ2zu79e*q&i9c$DPNGYYw%s_L~d?x -zj;EW8N#6BCjjMs5>VVWxipk10ERAEpLG3^|JWI~<Y~c5vi!sB;W|~-R<=`-_TSLhN -zYlyAlPUkfn-CnHq)Xv2vv1R->DYG*_Qk)fwt)g^KZ*f*K5tEj9C7Ea`HGyPe8U4wd -nX2Iz@%Q6UTm;}-X%j^D0i1fiT)I6)4TdrsMY}`L(<y7krryzQ} - -literal 0 -HcmV?d00001 - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c -new file mode 100644 -index 0000000000..ff83db095b ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/early_init.c -@@ -0,0 +1,14 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <bootblock_common.h> -+#include <device/pci_ops.h> -+#include <ec/dell/mec5035/mec5035.h> -+#include <southbridge/intel/bd82x6x/pch.h> -+ -+void bootblock_mainboard_early_init(void) -+{ -+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN -+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN -+ | COMB_LPC_EN | COMA_LPC_EN); -+ mec5035_early_init(); -+} -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/gpio.c -new file mode 100644 -index 0000000000..2306e4cf0a ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/gpio.c -@@ -0,0 +1,192 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <southbridge/intel/common/gpio.h> -+ -+static const struct pch_gpio_set1 pch_gpio_set1_mode = { -+ .gpio0 = GPIO_MODE_GPIO, -+ .gpio1 = GPIO_MODE_GPIO, -+ .gpio2 = GPIO_MODE_GPIO, -+ .gpio3 = GPIO_MODE_NATIVE, -+ .gpio4 = GPIO_MODE_GPIO, -+ .gpio5 = GPIO_MODE_NATIVE, -+ .gpio6 = GPIO_MODE_GPIO, -+ .gpio7 = GPIO_MODE_GPIO, -+ .gpio8 = GPIO_MODE_GPIO, -+ .gpio9 = GPIO_MODE_NATIVE, -+ .gpio10 = GPIO_MODE_NATIVE, -+ .gpio11 = GPIO_MODE_NATIVE, -+ .gpio12 = GPIO_MODE_NATIVE, -+ .gpio13 = GPIO_MODE_GPIO, -+ .gpio14 = GPIO_MODE_GPIO, -+ .gpio15 = GPIO_MODE_GPIO, -+ .gpio16 = GPIO_MODE_GPIO, -+ .gpio17 = GPIO_MODE_GPIO, -+ .gpio18 = GPIO_MODE_NATIVE, -+ .gpio19 = GPIO_MODE_GPIO, -+ .gpio20 = GPIO_MODE_NATIVE, -+ .gpio21 = GPIO_MODE_GPIO, -+ .gpio22 = GPIO_MODE_GPIO, -+ .gpio23 = GPIO_MODE_NATIVE, -+ .gpio24 = GPIO_MODE_GPIO, -+ .gpio25 = GPIO_MODE_NATIVE, -+ .gpio26 = GPIO_MODE_NATIVE, -+ .gpio27 = GPIO_MODE_GPIO, -+ .gpio28 = GPIO_MODE_GPIO, -+ .gpio29 = GPIO_MODE_GPIO, -+ .gpio30 = GPIO_MODE_GPIO, -+ .gpio31 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_direction = { -+ .gpio0 = GPIO_DIR_INPUT, -+ .gpio1 = GPIO_DIR_INPUT, -+ .gpio2 = GPIO_DIR_INPUT, -+ .gpio4 = GPIO_DIR_INPUT, -+ .gpio6 = GPIO_DIR_INPUT, -+ .gpio7 = GPIO_DIR_INPUT, -+ .gpio8 = GPIO_DIR_INPUT, -+ .gpio13 = GPIO_DIR_INPUT, -+ .gpio14 = GPIO_DIR_INPUT, -+ .gpio15 = GPIO_DIR_INPUT, -+ .gpio16 = GPIO_DIR_INPUT, -+ .gpio17 = GPIO_DIR_INPUT, -+ .gpio19 = GPIO_DIR_INPUT, -+ .gpio21 = GPIO_DIR_INPUT, -+ .gpio22 = GPIO_DIR_INPUT, -+ .gpio24 = GPIO_DIR_INPUT, -+ .gpio27 = GPIO_DIR_INPUT, -+ .gpio28 = GPIO_DIR_INPUT, -+ .gpio29 = GPIO_DIR_INPUT, -+ .gpio30 = GPIO_DIR_OUTPUT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_level = { -+ .gpio30 = GPIO_LEVEL_HIGH, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_reset = { -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_invert = { -+ .gpio0 = GPIO_INVERT, -+ .gpio1 = GPIO_INVERT, -+ .gpio8 = GPIO_INVERT, -+ .gpio14 = GPIO_INVERT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_blink = { -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_mode = { -+ .gpio32 = GPIO_MODE_NATIVE, -+ .gpio33 = GPIO_MODE_GPIO, -+ .gpio34 = GPIO_MODE_GPIO, -+ .gpio35 = GPIO_MODE_GPIO, -+ .gpio36 = GPIO_MODE_GPIO, -+ .gpio37 = GPIO_MODE_GPIO, -+ .gpio38 = GPIO_MODE_GPIO, -+ .gpio39 = GPIO_MODE_GPIO, -+ .gpio40 = GPIO_MODE_NATIVE, -+ .gpio41 = GPIO_MODE_NATIVE, -+ .gpio42 = GPIO_MODE_NATIVE, -+ .gpio43 = GPIO_MODE_NATIVE, -+ .gpio44 = GPIO_MODE_NATIVE, -+ .gpio45 = GPIO_MODE_GPIO, -+ .gpio46 = GPIO_MODE_NATIVE, -+ .gpio47 = GPIO_MODE_NATIVE, -+ .gpio48 = GPIO_MODE_GPIO, -+ .gpio49 = GPIO_MODE_GPIO, -+ .gpio50 = GPIO_MODE_NATIVE, -+ .gpio51 = GPIO_MODE_GPIO, -+ .gpio52 = GPIO_MODE_GPIO, -+ .gpio53 = GPIO_MODE_NATIVE, -+ .gpio54 = GPIO_MODE_GPIO, -+ .gpio55 = GPIO_MODE_NATIVE, -+ .gpio56 = GPIO_MODE_NATIVE, -+ .gpio57 = GPIO_MODE_GPIO, -+ .gpio58 = GPIO_MODE_NATIVE, -+ .gpio59 = GPIO_MODE_NATIVE, -+ .gpio60 = GPIO_MODE_GPIO, -+ .gpio61 = GPIO_MODE_NATIVE, -+ .gpio62 = GPIO_MODE_NATIVE, -+ .gpio63 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_direction = { -+ .gpio33 = GPIO_DIR_INPUT, -+ .gpio34 = GPIO_DIR_OUTPUT, -+ .gpio35 = GPIO_DIR_INPUT, -+ .gpio36 = GPIO_DIR_INPUT, -+ .gpio37 = GPIO_DIR_INPUT, -+ .gpio38 = GPIO_DIR_INPUT, -+ .gpio39 = GPIO_DIR_INPUT, -+ .gpio45 = GPIO_DIR_OUTPUT, -+ .gpio48 = GPIO_DIR_INPUT, -+ .gpio49 = GPIO_DIR_OUTPUT, -+ .gpio51 = GPIO_DIR_INPUT, -+ .gpio52 = GPIO_DIR_INPUT, -+ .gpio54 = GPIO_DIR_INPUT, -+ .gpio57 = GPIO_DIR_INPUT, -+ .gpio60 = GPIO_DIR_OUTPUT, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_level = { -+ .gpio34 = GPIO_LEVEL_HIGH, -+ .gpio45 = GPIO_LEVEL_LOW, -+ .gpio49 = GPIO_LEVEL_LOW, -+ .gpio60 = GPIO_LEVEL_HIGH, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_reset = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_mode = { -+ .gpio64 = GPIO_MODE_NATIVE, -+ .gpio65 = GPIO_MODE_NATIVE, -+ .gpio66 = GPIO_MODE_NATIVE, -+ .gpio67 = GPIO_MODE_NATIVE, -+ .gpio68 = GPIO_MODE_GPIO, -+ .gpio69 = GPIO_MODE_GPIO, -+ .gpio70 = GPIO_MODE_GPIO, -+ .gpio71 = GPIO_MODE_GPIO, -+ .gpio72 = GPIO_MODE_NATIVE, -+ .gpio73 = GPIO_MODE_NATIVE, -+ .gpio74 = GPIO_MODE_NATIVE, -+ .gpio75 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_direction = { -+ .gpio68 = GPIO_DIR_INPUT, -+ .gpio69 = GPIO_DIR_INPUT, -+ .gpio70 = GPIO_DIR_INPUT, -+ .gpio71 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_level = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_reset = { -+}; -+ -+const struct pch_gpio_map mainboard_gpio_map = { -+ .set1 = { -+ .mode = &pch_gpio_set1_mode, -+ .direction = &pch_gpio_set1_direction, -+ .level = &pch_gpio_set1_level, -+ .blink = &pch_gpio_set1_blink, -+ .invert = &pch_gpio_set1_invert, -+ .reset = &pch_gpio_set1_reset, -+ }, -+ .set2 = { -+ .mode = &pch_gpio_set2_mode, -+ .direction = &pch_gpio_set2_direction, -+ .level = &pch_gpio_set2_level, -+ .reset = &pch_gpio_set2_reset, -+ }, -+ .set3 = { -+ .mode = &pch_gpio_set3_mode, -+ .direction = &pch_gpio_set3_direction, -+ .level = &pch_gpio_set3_level, -+ .reset = &pch_gpio_set3_reset, -+ }, -+}; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c -new file mode 100644 -index 0000000000..0c69f0bd0e ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/hda_verb.c -@@ -0,0 +1,32 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <device/azalia_device.h> -+ -+const u32 cim_verb_data[] = { -+ 0x111d76e7, /* Codec Vendor / Device ID: IDT */ -+ 0x102804a9, /* Subsystem ID */ -+ 11, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(0, 0x102804a9), -+ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020), -+ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f), -+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110), -+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050), -+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), -+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3), -+ AZALIA_PIN_CFG(0, 0x11, 0xd5a30130), -+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x20, 0x400000f0), -+ -+ 0x80862805, /* Codec Vendor / Device ID: Intel */ -+ 0x80860101, /* Subsystem ID */ -+ 4, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(3, 0x80860101), -+ AZALIA_PIN_CFG(3, 0x05, 0x18560010), -+ AZALIA_PIN_CFG(3, 0x06, 0x18560020), -+ AZALIA_PIN_CFG(3, 0x07, 0x18560030), -+}; -+ -+const u32 pc_beep_verbs[0] = {}; -+ -+AZALIA_ARRAY_SIZES; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6220/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/overridetree.cb -new file mode 100644 -index 0000000000..9faf27e27b ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6220/overridetree.cb -@@ -0,0 +1,37 @@ -+## SPDX-License-Identifier: GPL-2.0-or-later -+ -+chip northbridge/intel/sandybridge -+ device domain 0 on -+ subsystemid 0x1028 0x04a9 inherit -+ -+ device ref igd on -+ register "gpu_cpu_backlight" = "0x0000046a" -+ register "gpu_pch_backlight" = "0x13121312" -+ end -+ -+ chip southbridge/intel/bd82x6x -+ register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }" -+ register "usb_port_config" = "{ -+ { 1, 1, 0 }, -+ { 1, 0, 0 }, -+ { 1, 1, 1 }, -+ { 1, 0, 1 }, -+ { 1, 1, 2 }, -+ { 1, 1, 2 }, -+ { 1, 1, 3 }, -+ { 1, 1, 3 }, -+ { 1, 0, 5 }, -+ { 1, 0, 5 }, -+ { 1, 1, 7 }, -+ { 1, 1, 6 }, -+ { 1, 0, 6 }, -+ { 1, 0, 7 }, -+ }" -+ -+ device ref pcie_rp4 off end -+ device ref sata1 on -+ register "sata_port_map" = "0x3b" -+ end -+ end -+ end -+end --- -2.39.5 - diff --git a/config/coreboot/default/patches/0026-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch b/config/coreboot/default/patches/0015-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch index fe9034b0..c1ae05be 100644 --- a/config/coreboot/default/patches/0026-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch +++ b/config/coreboot/default/patches/0015-nb-haswell-lock-policy-regs-when-disabling-IOMMU.patch @@ -1,7 +1,7 @@ -From ce7d65790b9b8656ebbaa0ca715adff6a9c25588 Mon Sep 17 00:00:00 2001 +From 4a24221fc735117e521cbd7e08d71b6e6a061517 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Sat, 4 May 2024 02:00:53 +0100 -Subject: [PATCH 26/51] nb/haswell: lock policy regs when disabling IOMMU +Subject: [PATCH 15/40] nb/haswell: lock policy regs when disabling IOMMU Angel Pons told me I should do it. See comments here: https://review.coreboot.org/c/coreboot/+/81016 @@ -51,5 +51,5 @@ index 1a7e0b1076..e9506ee830 100644 /* Set L3HIT2PEND_DIS, lock GFXVTBAR policy config registers */ u32 reg32; -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0016-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch b/config/coreboot/default/patches/0016-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch deleted file mode 100644 index 7d2133ef..00000000 --- a/config/coreboot/default/patches/0016-mb-dell-Add-Latitude-E6330-Ivy-Bridge.patch +++ /dev/null @@ -1,436 +0,0 @@ -From 0889cc6b6f62cba616feff5ae8558be31f298069 Mon Sep 17 00:00:00 2001 -From: Nicholas Chin <nic.c3.14@gmail.com> -Date: Fri, 8 Mar 2024 09:33:03 -0700 -Subject: [PATCH 16/51] mb/dell: Add Latitude E6330 (Ivy Bridge) - -Mainboard is QAL70/LA-7741P. I do not physically have this system; -someone with physical access to one sent me the output of autoport which -I then modified to produce this port. I was also sent the VBT binary, -which was obtained from `/sys/kernel/debug/dri/0/i915_vbt` while running -version A21 of the vendor firmware. This port has not been tested. - -The EC is the SMSC MEC5055, which seems to be compatible with the -existing MEC5035 code. As with the other Dell systems with this EC, this -board is assumed to be internally flashable using an EC command that -tells it to pull the FDO pin low on the next boot, which also tells the -vendor firmware to disable all write protections to the flash [1]. - -[1] https://gitlab.com/nic3-14159/dell-flash-unlock - -Change-Id: I827826e9ff8a9a534c50250458b399104478e06c -Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> ---- - src/mainboard/dell/snb_ivb_latitude/Kconfig | 11 +- - .../dell/snb_ivb_latitude/Kconfig.name | 3 + - .../snb_ivb_latitude/variants/e6330/data.vbt | Bin 0 -> 6144 bytes - .../variants/e6330/early_init.c | 14 ++ - .../snb_ivb_latitude/variants/e6330/gpio.c | 192 ++++++++++++++++++ - .../variants/e6330/hda_verb.c | 32 +++ - .../variants/e6330/overridetree.cb | 37 ++++ - 7 files changed, 288 insertions(+), 1 deletion(-) - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/data.vbt - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/gpio.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb - -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig -index baa83baa41..49bf225fe2 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig -@@ -56,6 +56,12 @@ config BOARD_DELL_LATITUDE_E5530 - select BOARD_ROMSIZE_KB_12288 - select SOUTHBRIDGE_INTEL_C216 - -+config BOARD_DELL_LATITUDE_E6330 -+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON -+ select BOARD_ROMSIZE_KB_12288 -+ select MAINBOARD_USES_IFD_GBE_REGION -+ select SOUTHBRIDGE_INTEL_C216 -+ - config BOARD_DELL_LATITUDE_E6430 - select BOARD_DELL_SNB_IVB_LATITUDE_COMMON - select BOARD_ROMSIZE_KB_12288 -@@ -84,6 +90,7 @@ config MAINBOARD_PART_NUMBER - default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420 - default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520 - default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530 -+ default "Latitude E6330" if BOARD_DELL_LATITUDE_E6330 - default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430 - default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530 - -@@ -101,13 +108,15 @@ config VARIANT_DIR - default "e6420" if BOARD_DELL_LATITUDE_E6420 - default "e6520" if BOARD_DELL_LATITUDE_E6520 - default "e5530" if BOARD_DELL_LATITUDE_E5530 -+ default "e6330" if BOARD_DELL_LATITUDE_E6330 - default "e6430" if BOARD_DELL_LATITUDE_E6430 - default "e6530" if BOARD_DELL_LATITUDE_E6530 - - config VGA_BIOS_ID - default "8086,0116" if BOARD_DELL_LATITUDE_E6520 \ - || BOARD_DELL_LATITUDE_E5420 -- default "8086,0166" if BOARD_DELL_LATITUDE_E5530 -+ default "8086,0166" if BOARD_DELL_LATITUDE_E5530 \ -+ || BOARD_DELL_LATITUDE_E6330 - default "8086,0126" if BOARD_DELL_LATITUDE_E6420 \ - || BOARD_DELL_LATITUDE_E5520 \ - || BOARD_DELL_LATITUDE_E6220 \ -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -index 349ee7f79e..d6fc8eb224 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -@@ -21,6 +21,9 @@ config BOARD_DELL_LATITUDE_E6520 - config BOARD_DELL_LATITUDE_E5530 - bool "Latitude E5530" - -+config BOARD_DELL_LATITUDE_E6330 -+ bool "Latitude E6330" -+ - config BOARD_DELL_LATITUDE_E6430 - bool "Latitude E6430" - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/data.vbt -new file mode 100644 -index 0000000000000000000000000000000000000000..18856746656058651c571ecbb3708e0543b19d62 -GIT binary patch -literal 6144 -zcmeHKU2GiH75-*tc6WAmW_LYygMSkDB*E^Q*zv5f7dLg)@$NQV2a{}!yImnfyvQ4D -z;n-$v0!RpNi<_o@ktI-@2a590stC0zRi%iRR%stvi&hAs3R<K}X~hFddB_6@s8W`5 -zXJ!q~E{TOme<a`8@BW;7?l<?GIp@yo&H2<M-FZ0GKbBAR-Ekx}HvVOrhK1*2?{QsU -zQe#K%JeC=q96gpAKa#$keu^D99ee*0FfB=@F_0J<9-Ch-&BZ5r1T6`{$;1%Fm+qfk -zTr5pfAz@KB*NGlFzEGx2aqh%IxkQOuX*`{wy~+KQo+-}XSE7aaxko77OBtFgoh;4K -z(#-7f<x+WxmKSK)vQFgtt^L+?s+Z<V57E7|^TqOPX{mn0n<VLl#Yf7s_suL*Jl#VB -zmSyz~ScwEVTc-3vd2v6D&dt$;&{?91(o(5>vNXNl&<qW@AghW5NPYw#ha~-b0Dc7_ -z6}t(eHgpwn6<HNi1Vcp^p-07-iXve~MTs!0A_ku!`4nKciajxJYXsOYuuT4N%smA! -zPazgl&bNRSrvAz|_6r3+B;r1=!7D;RUUw8Ke+vNt7E3`(BA-woPvJFBK^3Gzfh4Nk -zOX!J0PJNB)Mk&Z_i?S2ez+iItz=)m79LydX&rM9`3wPaJ`T92=Uv0;g-!<4*M6z%+ -z*omwb#VI+CU&%iFS{_DGS;sE}7G4juqRMCww!+k6=+abJj4v>Dsr*z_6HAP5GJeST -znX2JD;{xLa#;c6KGychVn-L6YXkv6Qx)}Y8&ok1DI~ZSM6dCt39%QUAzRh@o@gqjy -zL0qZ&DhN8ZR3xu$a$Cd{oasU3DNp{CCl6f~PYlq!Hte;Ia0^wn8Vut7>Wl1)s`^E- -z1DhGx<x<9D%6jd%)5>zr8&7h}dMJ3~YBe;)!vVf-T&?{PoMvvRR{!67;Xhz^g^loX -zja+*c-KJJoxbsm3pTE4THs`cgD{Pt+ga3en-i$P#9Wsra(oqRMr;H$4{gxr)9eF(x -zg0v@a7aj}rA^Kf#sNb*>at^>P)5li%ycOq*4e;3~RUj$i1e8=rHi&<Y^Hc>Y_gP4= -zxz9^%q0dLXqC&Bq<&sDScZwvatjRxB=rcJJiYb?w#4Iy2KTk1F6T>T}E@(DNGa>5R -z7&Yv)JdHrRI};pfsKLVj=FE=U*=*T4#ncVktknoGelT||SDY`+9WI_IZE<i@7SnC8 -zN6~Gyo=&><wpzE~>`_>@wb<-RI-lu(_~Oy_Zo6={Cdq!uw(fmyz_u^cB&~5IS7g`U -zdUC}N$J5-C)|`CfUO+?xptr@*hJW$ZhBZk%JaMh_<8!ZGj)z*WU9fcg2`>dT##_?q -z=Ksx}uxo3jTHTq%E1}97UECE@r}nt3I=3R(HOL7jNg>teSM-g$aU#`3jk}#qh;D?6 -zw=CYuA2#mS+vU%0P&u8RCn4)$8VH-2uy#01%VG0WSX&Fz`LMYj)?N<NyJ1t)wHBQY -z=;pYt<#l>gH_zzWS)G2Pn=k3wYdU|DnWmxbG$>`5lZJMWL92%O14BD!(C-cNFNXFH -zgVc!G9?@=&(4mNVcSJiLq3=b^rz6@k5qdFVUW{m$A{2|7d!kxz)VSrcQt@4sDoq^f -z98hXm=YS~qbf<kwigD|YevaR}^`7Jy^x~4_g75ka=c0r}VJF2aEv{=ilPf-mNQBNI -zEMK3YKB+`*xOu>iR|LbzHLa*mLXlH${^b4c9%>9%)HO-?LA1gT0mlz!M}8&;(;^x| -z*H2<VyY>2;juB|7F+k?y(_2~3@STqQ@f^sqD2c8g3x>ciM%siMq~;pKwfE57kw2K@ -z!-ZN0QTVOP@aA5@fEGKjy2+D`t?2KzpPyRQ`JcmHJoc(<#h<UT;@W$t_d{|;S>vyF -zewtgef*II~y;k>*B!+(8*blXsY-~kcJa9zG2yfcMCt+|-0ex$pY`h1<*#rEv=~*<+ -ztV``Um!q33-Aap9fUshX^N~GS2@X3^U9+MwgYQ74^?~6&yU^#oY#cvC9R_}P2d<wN -zJvOE)Xr7A2n#3x14}2_g(YN^0+oYDbb#|V{ze3pzGb9FiF#6Ra&L}bT(ZOvswS7RY -zxLjWFRwWXHR5&={t;%K+Vkd6NX2iF<SF)LXv@y472OmG!_W%Ni*ZDuev-S0%b!dfW -wz4{IL!+uT9t2XI4@_L@?Ri*bc_<n8A+wHaowmq=zfo%_LdtloGpN<DU00~N<ApigX - -literal 0 -HcmV?d00001 - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c -new file mode 100644 -index 0000000000..ff83db095b ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/early_init.c -@@ -0,0 +1,14 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <bootblock_common.h> -+#include <device/pci_ops.h> -+#include <ec/dell/mec5035/mec5035.h> -+#include <southbridge/intel/bd82x6x/pch.h> -+ -+void bootblock_mainboard_early_init(void) -+{ -+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN -+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN -+ | COMB_LPC_EN | COMA_LPC_EN); -+ mec5035_early_init(); -+} -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/gpio.c -new file mode 100644 -index 0000000000..777570765a ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/gpio.c -@@ -0,0 +1,192 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <southbridge/intel/common/gpio.h> -+ -+static const struct pch_gpio_set1 pch_gpio_set1_mode = { -+ .gpio0 = GPIO_MODE_GPIO, -+ .gpio1 = GPIO_MODE_GPIO, -+ .gpio2 = GPIO_MODE_GPIO, -+ .gpio3 = GPIO_MODE_GPIO, -+ .gpio4 = GPIO_MODE_GPIO, -+ .gpio5 = GPIO_MODE_NATIVE, -+ .gpio6 = GPIO_MODE_GPIO, -+ .gpio7 = GPIO_MODE_GPIO, -+ .gpio8 = GPIO_MODE_GPIO, -+ .gpio9 = GPIO_MODE_NATIVE, -+ .gpio10 = GPIO_MODE_NATIVE, -+ .gpio11 = GPIO_MODE_NATIVE, -+ .gpio12 = GPIO_MODE_NATIVE, -+ .gpio13 = GPIO_MODE_GPIO, -+ .gpio14 = GPIO_MODE_GPIO, -+ .gpio15 = GPIO_MODE_GPIO, -+ .gpio16 = GPIO_MODE_GPIO, -+ .gpio17 = GPIO_MODE_GPIO, -+ .gpio18 = GPIO_MODE_NATIVE, -+ .gpio19 = GPIO_MODE_GPIO, -+ .gpio20 = GPIO_MODE_NATIVE, -+ .gpio21 = GPIO_MODE_GPIO, -+ .gpio22 = GPIO_MODE_GPIO, -+ .gpio23 = GPIO_MODE_NATIVE, -+ .gpio24 = GPIO_MODE_GPIO, -+ .gpio25 = GPIO_MODE_NATIVE, -+ .gpio26 = GPIO_MODE_NATIVE, -+ .gpio27 = GPIO_MODE_GPIO, -+ .gpio28 = GPIO_MODE_GPIO, -+ .gpio29 = GPIO_MODE_GPIO, -+ .gpio30 = GPIO_MODE_NATIVE, -+ .gpio31 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_direction = { -+ .gpio0 = GPIO_DIR_INPUT, -+ .gpio1 = GPIO_DIR_INPUT, -+ .gpio2 = GPIO_DIR_INPUT, -+ .gpio3 = GPIO_DIR_INPUT, -+ .gpio4 = GPIO_DIR_INPUT, -+ .gpio6 = GPIO_DIR_INPUT, -+ .gpio7 = GPIO_DIR_INPUT, -+ .gpio8 = GPIO_DIR_INPUT, -+ .gpio13 = GPIO_DIR_INPUT, -+ .gpio14 = GPIO_DIR_INPUT, -+ .gpio15 = GPIO_DIR_INPUT, -+ .gpio16 = GPIO_DIR_INPUT, -+ .gpio17 = GPIO_DIR_INPUT, -+ .gpio19 = GPIO_DIR_INPUT, -+ .gpio21 = GPIO_DIR_INPUT, -+ .gpio22 = GPIO_DIR_INPUT, -+ .gpio24 = GPIO_DIR_INPUT, -+ .gpio27 = GPIO_DIR_INPUT, -+ .gpio28 = GPIO_DIR_OUTPUT, -+ .gpio29 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_level = { -+ .gpio28 = GPIO_LEVEL_LOW, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_reset = { -+ .gpio30 = GPIO_RESET_RSMRST, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_invert = { -+ .gpio0 = GPIO_INVERT, -+ .gpio8 = GPIO_INVERT, -+ .gpio13 = GPIO_INVERT, -+ .gpio14 = GPIO_INVERT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_blink = { -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_mode = { -+ .gpio32 = GPIO_MODE_NATIVE, -+ .gpio33 = GPIO_MODE_GPIO, -+ .gpio34 = GPIO_MODE_GPIO, -+ .gpio35 = GPIO_MODE_GPIO, -+ .gpio36 = GPIO_MODE_GPIO, -+ .gpio37 = GPIO_MODE_GPIO, -+ .gpio38 = GPIO_MODE_GPIO, -+ .gpio39 = GPIO_MODE_GPIO, -+ .gpio40 = GPIO_MODE_NATIVE, -+ .gpio41 = GPIO_MODE_NATIVE, -+ .gpio42 = GPIO_MODE_NATIVE, -+ .gpio43 = GPIO_MODE_NATIVE, -+ .gpio44 = GPIO_MODE_NATIVE, -+ .gpio45 = GPIO_MODE_GPIO, -+ .gpio46 = GPIO_MODE_NATIVE, -+ .gpio47 = GPIO_MODE_NATIVE, -+ .gpio48 = GPIO_MODE_GPIO, -+ .gpio49 = GPIO_MODE_GPIO, -+ .gpio50 = GPIO_MODE_NATIVE, -+ .gpio51 = GPIO_MODE_GPIO, -+ .gpio52 = GPIO_MODE_GPIO, -+ .gpio53 = GPIO_MODE_NATIVE, -+ .gpio54 = GPIO_MODE_GPIO, -+ .gpio55 = GPIO_MODE_NATIVE, -+ .gpio56 = GPIO_MODE_NATIVE, -+ .gpio57 = GPIO_MODE_GPIO, -+ .gpio58 = GPIO_MODE_NATIVE, -+ .gpio59 = GPIO_MODE_NATIVE, -+ .gpio60 = GPIO_MODE_GPIO, -+ .gpio61 = GPIO_MODE_NATIVE, -+ .gpio62 = GPIO_MODE_NATIVE, -+ .gpio63 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_direction = { -+ .gpio33 = GPIO_DIR_INPUT, -+ .gpio34 = GPIO_DIR_OUTPUT, -+ .gpio35 = GPIO_DIR_INPUT, -+ .gpio36 = GPIO_DIR_INPUT, -+ .gpio37 = GPIO_DIR_INPUT, -+ .gpio38 = GPIO_DIR_INPUT, -+ .gpio39 = GPIO_DIR_INPUT, -+ .gpio45 = GPIO_DIR_OUTPUT, -+ .gpio48 = GPIO_DIR_INPUT, -+ .gpio49 = GPIO_DIR_INPUT, -+ .gpio51 = GPIO_DIR_INPUT, -+ .gpio52 = GPIO_DIR_INPUT, -+ .gpio54 = GPIO_DIR_INPUT, -+ .gpio57 = GPIO_DIR_INPUT, -+ .gpio60 = GPIO_DIR_OUTPUT, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_level = { -+ .gpio34 = GPIO_LEVEL_HIGH, -+ .gpio45 = GPIO_LEVEL_LOW, -+ .gpio60 = GPIO_LEVEL_HIGH, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_reset = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_mode = { -+ .gpio64 = GPIO_MODE_NATIVE, -+ .gpio65 = GPIO_MODE_NATIVE, -+ .gpio66 = GPIO_MODE_NATIVE, -+ .gpio67 = GPIO_MODE_NATIVE, -+ .gpio68 = GPIO_MODE_GPIO, -+ .gpio69 = GPIO_MODE_GPIO, -+ .gpio70 = GPIO_MODE_GPIO, -+ .gpio71 = GPIO_MODE_GPIO, -+ .gpio72 = GPIO_MODE_NATIVE, -+ .gpio73 = GPIO_MODE_NATIVE, -+ .gpio74 = GPIO_MODE_NATIVE, -+ .gpio75 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_direction = { -+ .gpio68 = GPIO_DIR_INPUT, -+ .gpio69 = GPIO_DIR_INPUT, -+ .gpio70 = GPIO_DIR_INPUT, -+ .gpio71 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_level = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_reset = { -+}; -+ -+const struct pch_gpio_map mainboard_gpio_map = { -+ .set1 = { -+ .mode = &pch_gpio_set1_mode, -+ .direction = &pch_gpio_set1_direction, -+ .level = &pch_gpio_set1_level, -+ .blink = &pch_gpio_set1_blink, -+ .invert = &pch_gpio_set1_invert, -+ .reset = &pch_gpio_set1_reset, -+ }, -+ .set2 = { -+ .mode = &pch_gpio_set2_mode, -+ .direction = &pch_gpio_set2_direction, -+ .level = &pch_gpio_set2_level, -+ .reset = &pch_gpio_set2_reset, -+ }, -+ .set3 = { -+ .mode = &pch_gpio_set3_mode, -+ .direction = &pch_gpio_set3_direction, -+ .level = &pch_gpio_set3_level, -+ .reset = &pch_gpio_set3_reset, -+ }, -+}; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c -new file mode 100644 -index 0000000000..804733b172 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/hda_verb.c -@@ -0,0 +1,32 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <device/azalia_device.h> -+ -+const u32 cim_verb_data[] = { -+ 0x111d76df, /* Codec Vendor / Device ID: IDT */ -+ 0x10280533, /* Subsystem ID */ -+ 11, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(0, 0x10280533), -+ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020), -+ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f), -+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110), -+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050), -+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), -+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3), -+ AZALIA_PIN_CFG(0, 0x11, 0xd5a30130), -+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x20, 0x400000f0), -+ -+ 0x80862806, /* Codec Vendor / Device ID: Intel */ -+ 0x80860101, /* Subsystem ID */ -+ 4, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(3, 0x80860101), -+ AZALIA_PIN_CFG(3, 0x05, 0x18560010), -+ AZALIA_PIN_CFG(3, 0x06, 0x18560020), -+ AZALIA_PIN_CFG(3, 0x07, 0x18560030), -+}; -+ -+const u32 pc_beep_verbs[0] = {}; -+ -+AZALIA_ARRAY_SIZES; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb -new file mode 100644 -index 0000000000..4125159367 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6330/overridetree.cb -@@ -0,0 +1,37 @@ -+## SPDX-License-Identifier: GPL-2.0-or-later -+ -+chip northbridge/intel/sandybridge -+ device domain 0 on -+ subsystemid 0x1028 0x0533 inherit -+ -+ device ref igd on -+ register "gpu_cpu_backlight" = "0x00001312" -+ register "gpu_pch_backlight" = "0x13121312" -+ end -+ -+ chip southbridge/intel/bd82x6x -+ register "usb_port_config" = "{ -+ { 1, 2, 0 }, -+ { 1, 0, 0 }, -+ { 1, 0, 1 }, -+ { 1, 1, 1 }, -+ { 1, 1, 2 }, -+ { 1, 1, 2 }, -+ { 1, 2, 3 }, -+ { 1, 2, 3 }, -+ { 1, 2, 4 }, -+ { 1, 1, 4 }, -+ { 1, 1, 5 }, -+ { 1, 1, 5 }, -+ { 1, 2, 6 }, -+ { 1, 0, 6 }, -+ }" -+ -+ device ref xhci on -+ register "superspeed_capable_ports" = "0x0000000f" -+ register "xhci_overcurrent_mapping" = "0x00000c03" -+ register "xhci_switchable_ports" = "0x0000000f" -+ end -+ end -+ end -+end --- -2.39.5 - diff --git a/config/coreboot/default/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch b/config/coreboot/default/patches/0016-nb-intel-gm45-Make-DDR2-raminit-work.patch index 28fc679f..7537c1a6 100644 --- a/config/coreboot/default/patches/0027-nb-intel-gm45-Make-DDR2-raminit-work.patch +++ b/config/coreboot/default/patches/0016-nb-intel-gm45-Make-DDR2-raminit-work.patch @@ -1,7 +1,7 @@ -From c6181fe0c8b58cb5a4523d5763fc5fcdf61b3f10 Mon Sep 17 00:00:00 2001 +From 20921eb7165b23e7b78e4c4126ff5bab8725404b Mon Sep 17 00:00:00 2001 From: Angel Pons <th3fanbus@gmail.com> Date: Mon, 10 May 2021 22:40:59 +0200 -Subject: [PATCH 27/51] nb/intel/gm45: Make DDR2 raminit work +Subject: [PATCH 16/40] nb/intel/gm45: Make DDR2 raminit work List of changes: - Update some timing and ODT values @@ -219,5 +219,5 @@ index aef863f05a..b74765fd9c 100644 + mchbar_clrsetbits32(0x4d0, 0x3f << 20, magic_comp[1] << 20); } -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0017-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch b/config/coreboot/default/patches/0017-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch deleted file mode 100644 index 412b8471..00000000 --- a/config/coreboot/default/patches/0017-mb-dell-Add-Latitude-E6230-Ivy-Bridge.patch +++ /dev/null @@ -1,440 +0,0 @@ -From 84d7f3201eb4492acd7d290a02d19c4850c85791 Mon Sep 17 00:00:00 2001 -From: Nicholas Chin <nic.c3.14@gmail.com> -Date: Thu, 26 Oct 2017 21:26:43 +0800 -Subject: [PATCH 17/51] mb/dell: Add Latitude E6230 (Ivy Bridge) - -This was adapted from CB:22693 from Iru Cai, which was based on -autoport. I do not physically have this system. Someone with physical -access to an E6230 running version A11 of the vendor firmware sent me -the VBT after running the command `intelvbttool --inlegacy --outvbt -data.vbt`. This new version of the port has not yet been tested. - -The EC is the SMSC MEC5055, which seems to be compatible with the -existing MEC5035 code. As with the other Dell systems with this EC, this -board is assumed to be internally flashable using an EC command that -tells it to pull the FDO pin low on the next boot, which also tells the -vendor firmware to disable all write protections to the flash [1]. - -[1] https://gitlab.com/nic3-14159/dell-flash-unlock - -Original-Change-Id: I8cdc01e902e670310628809416290045c2102340 -Change-Id: I32927beea7c29b96a851ab77ed15b0160f16d369 -Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> ---- - src/mainboard/dell/snb_ivb_latitude/Kconfig | 11 +- - .../dell/snb_ivb_latitude/Kconfig.name | 3 + - .../snb_ivb_latitude/variants/e6230/data.vbt | Bin 0 -> 4280 bytes - .../variants/e6230/early_init.c | 12 ++ - .../snb_ivb_latitude/variants/e6230/gpio.c | 193 ++++++++++++++++++ - .../variants/e6230/hda_verb.c | 32 +++ - .../variants/e6230/overridetree.cb | 40 ++++ - 7 files changed, 290 insertions(+), 1 deletion(-) - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/data.vbt - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/gpio.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c - create mode 100644 src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb - -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig b/src/mainboard/dell/snb_ivb_latitude/Kconfig -index 49bf225fe2..f6e097930b 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig -@@ -56,6 +56,12 @@ config BOARD_DELL_LATITUDE_E5530 - select BOARD_ROMSIZE_KB_12288 - select SOUTHBRIDGE_INTEL_C216 - -+config BOARD_DELL_LATITUDE_E6230 -+ select BOARD_DELL_SNB_IVB_LATITUDE_COMMON -+ select BOARD_ROMSIZE_KB_12288 -+ select MAINBOARD_USES_IFD_GBE_REGION -+ select SOUTHBRIDGE_INTEL_C216 -+ - config BOARD_DELL_LATITUDE_E6330 - select BOARD_DELL_SNB_IVB_LATITUDE_COMMON - select BOARD_ROMSIZE_KB_12288 -@@ -90,6 +96,7 @@ config MAINBOARD_PART_NUMBER - default "Latitude E6420" if BOARD_DELL_LATITUDE_E6420 - default "Latitude E6520" if BOARD_DELL_LATITUDE_E6520 - default "Latitude E5530" if BOARD_DELL_LATITUDE_E5530 -+ default "Latitude E6230" if BOARD_DELL_LATITUDE_E6230 - default "Latitude E6330" if BOARD_DELL_LATITUDE_E6330 - default "Latitude E6430" if BOARD_DELL_LATITUDE_E6430 - default "Latitude E6530" if BOARD_DELL_LATITUDE_E6530 -@@ -108,6 +115,7 @@ config VARIANT_DIR - default "e6420" if BOARD_DELL_LATITUDE_E6420 - default "e6520" if BOARD_DELL_LATITUDE_E6520 - default "e5530" if BOARD_DELL_LATITUDE_E5530 -+ default "e6230" if BOARD_DELL_LATITUDE_E6230 - default "e6330" if BOARD_DELL_LATITUDE_E6330 - default "e6430" if BOARD_DELL_LATITUDE_E6430 - default "e6530" if BOARD_DELL_LATITUDE_E6530 -@@ -121,7 +129,8 @@ config VGA_BIOS_ID - || BOARD_DELL_LATITUDE_E5520 \ - || BOARD_DELL_LATITUDE_E6220 \ - || BOARD_DELL_LATITUDE_E6320 -- default "8086,0166" if BOARD_DELL_LATITUDE_E6430 \ -+ default "8086,0166" if BOARD_DELL_LATITUDE_E6230 \ -+ || BOARD_DELL_LATITUDE_E6430 \ - || BOARD_DELL_LATITUDE_E6530 - - endif -diff --git a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -index d6fc8eb224..cb7bbd5cdb 100644 ---- a/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -+++ b/src/mainboard/dell/snb_ivb_latitude/Kconfig.name -@@ -21,6 +21,9 @@ config BOARD_DELL_LATITUDE_E6520 - config BOARD_DELL_LATITUDE_E5530 - bool "Latitude E5530" - -+config BOARD_DELL_LATITUDE_E6230 -+ bool "Latitude E6230" -+ - config BOARD_DELL_LATITUDE_E6330 - bool "Latitude E6330" - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/data.vbt b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/data.vbt -new file mode 100644 -index 0000000000000000000000000000000000000000..45ce8f435eea647a0bddaab3fd1e9282c87afc66 -GIT binary patch -literal 4280 -zcmdT{Yiu0V75-*tAG5PFyX&zDekA7P<*tbx&o1`j23L%CmvkLWvN7(mLa6alZ?J`9 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-zt*M!5u?i4YtZ+WECo6$LJF06|G-mMZskGiV*lQJf-ItB+hltI<?{5E<^P=0rL<P+g -z(P)!c<?MlvMK0O~UwZ4*;x|ms(&&#Vn_-4{KM#g~a=;$N2QD7mSX0{t<cf>sId@e& -z-cN<SWA3VKCN6g3lx#+PySpWu*+pw}>vr(fgI)K*zkikg6TDJi?^}ghc*U*%A%EGg -Y$$8Z}9a~<{Q@y10T!W`-d%n2+Kj)*Kg#Z8m - -literal 0 -HcmV?d00001 - -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c -new file mode 100644 -index 0000000000..24c1b32467 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/early_init.c -@@ -0,0 +1,12 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <bootblock_common.h> -+#include <device/pci_ops.h> -+#include <ec/dell/mec5035/mec5035.h> -+#include <southbridge/intel/bd82x6x/pch.h> -+ -+void bootblock_mainboard_early_init(void) -+{ -+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN); -+ mec5035_early_init(); -+} -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/gpio.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/gpio.c -new file mode 100644 -index 0000000000..c07e4b1c56 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/gpio.c -@@ -0,0 +1,193 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <southbridge/intel/common/gpio.h> -+ -+static const struct pch_gpio_set1 pch_gpio_set1_mode = { -+ .gpio0 = GPIO_MODE_GPIO, -+ .gpio1 = GPIO_MODE_GPIO, -+ .gpio2 = GPIO_MODE_GPIO, -+ .gpio3 = GPIO_MODE_GPIO, -+ .gpio4 = GPIO_MODE_GPIO, -+ .gpio5 = GPIO_MODE_NATIVE, -+ .gpio6 = GPIO_MODE_GPIO, -+ .gpio7 = GPIO_MODE_GPIO, -+ .gpio8 = GPIO_MODE_GPIO, -+ .gpio9 = GPIO_MODE_NATIVE, -+ .gpio10 = GPIO_MODE_NATIVE, -+ .gpio11 = GPIO_MODE_NATIVE, -+ .gpio12 = GPIO_MODE_NATIVE, -+ .gpio13 = GPIO_MODE_GPIO, -+ .gpio14 = GPIO_MODE_GPIO, -+ .gpio15 = GPIO_MODE_GPIO, -+ .gpio16 = GPIO_MODE_GPIO, -+ .gpio17 = GPIO_MODE_GPIO, -+ .gpio18 = GPIO_MODE_NATIVE, -+ .gpio19 = GPIO_MODE_GPIO, -+ .gpio20 = GPIO_MODE_NATIVE, -+ .gpio21 = GPIO_MODE_GPIO, -+ .gpio22 = GPIO_MODE_GPIO, -+ .gpio23 = GPIO_MODE_NATIVE, -+ .gpio24 = GPIO_MODE_GPIO, -+ .gpio25 = GPIO_MODE_NATIVE, -+ .gpio26 = GPIO_MODE_NATIVE, -+ .gpio27 = GPIO_MODE_GPIO, -+ .gpio28 = GPIO_MODE_GPIO, -+ .gpio29 = GPIO_MODE_GPIO, -+ .gpio30 = GPIO_MODE_NATIVE, -+ .gpio31 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_direction = { -+ .gpio0 = GPIO_DIR_INPUT, -+ .gpio1 = GPIO_DIR_INPUT, -+ .gpio2 = GPIO_DIR_INPUT, -+ .gpio3 = GPIO_DIR_INPUT, -+ .gpio4 = GPIO_DIR_INPUT, -+ .gpio6 = GPIO_DIR_INPUT, -+ .gpio7 = GPIO_DIR_INPUT, -+ .gpio8 = GPIO_DIR_INPUT, -+ .gpio13 = GPIO_DIR_INPUT, -+ .gpio14 = GPIO_DIR_INPUT, -+ .gpio15 = GPIO_DIR_INPUT, -+ .gpio16 = GPIO_DIR_INPUT, -+ .gpio17 = GPIO_DIR_OUTPUT, -+ .gpio19 = GPIO_DIR_INPUT, -+ .gpio21 = GPIO_DIR_INPUT, -+ .gpio22 = GPIO_DIR_INPUT, -+ .gpio24 = GPIO_DIR_INPUT, -+ .gpio27 = GPIO_DIR_INPUT, -+ .gpio28 = GPIO_DIR_OUTPUT, -+ .gpio29 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_level = { -+ .gpio17 = GPIO_LEVEL_HIGH, -+ .gpio28 = GPIO_LEVEL_LOW, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_reset = { -+ .gpio30 = GPIO_RESET_RSMRST, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_invert = { -+ .gpio0 = GPIO_INVERT, -+ .gpio8 = GPIO_INVERT, -+ .gpio13 = GPIO_INVERT, -+ .gpio14 = GPIO_INVERT, -+}; -+ -+static const struct pch_gpio_set1 pch_gpio_set1_blink = { -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_mode = { -+ .gpio32 = GPIO_MODE_NATIVE, -+ .gpio33 = GPIO_MODE_GPIO, -+ .gpio34 = GPIO_MODE_GPIO, -+ .gpio35 = GPIO_MODE_GPIO, -+ .gpio36 = GPIO_MODE_GPIO, -+ .gpio37 = GPIO_MODE_GPIO, -+ .gpio38 = GPIO_MODE_GPIO, -+ .gpio39 = GPIO_MODE_GPIO, -+ .gpio40 = GPIO_MODE_NATIVE, -+ .gpio41 = GPIO_MODE_NATIVE, -+ .gpio42 = GPIO_MODE_NATIVE, -+ .gpio43 = GPIO_MODE_NATIVE, -+ .gpio44 = GPIO_MODE_NATIVE, -+ .gpio45 = GPIO_MODE_GPIO, -+ .gpio46 = GPIO_MODE_NATIVE, -+ .gpio47 = GPIO_MODE_NATIVE, -+ .gpio48 = GPIO_MODE_GPIO, -+ .gpio49 = GPIO_MODE_GPIO, -+ .gpio50 = GPIO_MODE_NATIVE, -+ .gpio51 = GPIO_MODE_GPIO, -+ .gpio52 = GPIO_MODE_GPIO, -+ .gpio53 = GPIO_MODE_NATIVE, -+ .gpio54 = GPIO_MODE_GPIO, -+ .gpio55 = GPIO_MODE_NATIVE, -+ .gpio56 = GPIO_MODE_NATIVE, -+ .gpio57 = GPIO_MODE_GPIO, -+ .gpio58 = GPIO_MODE_NATIVE, -+ .gpio59 = GPIO_MODE_NATIVE, -+ .gpio60 = GPIO_MODE_GPIO, -+ .gpio61 = GPIO_MODE_NATIVE, -+ .gpio62 = GPIO_MODE_NATIVE, -+ .gpio63 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_direction = { -+ .gpio33 = GPIO_DIR_INPUT, -+ .gpio34 = GPIO_DIR_OUTPUT, -+ .gpio35 = GPIO_DIR_INPUT, -+ .gpio36 = GPIO_DIR_INPUT, -+ .gpio37 = GPIO_DIR_INPUT, -+ .gpio38 = GPIO_DIR_INPUT, -+ .gpio39 = GPIO_DIR_INPUT, -+ .gpio45 = GPIO_DIR_OUTPUT, -+ .gpio48 = GPIO_DIR_INPUT, -+ .gpio49 = GPIO_DIR_INPUT, -+ .gpio51 = GPIO_DIR_INPUT, -+ .gpio52 = GPIO_DIR_INPUT, -+ .gpio54 = GPIO_DIR_INPUT, -+ .gpio57 = GPIO_DIR_INPUT, -+ .gpio60 = GPIO_DIR_OUTPUT, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_level = { -+ .gpio34 = GPIO_LEVEL_HIGH, -+ .gpio45 = GPIO_LEVEL_LOW, -+ .gpio60 = GPIO_LEVEL_HIGH, -+}; -+ -+static const struct pch_gpio_set2 pch_gpio_set2_reset = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_mode = { -+ .gpio64 = GPIO_MODE_NATIVE, -+ .gpio65 = GPIO_MODE_NATIVE, -+ .gpio66 = GPIO_MODE_NATIVE, -+ .gpio67 = GPIO_MODE_NATIVE, -+ .gpio68 = GPIO_MODE_GPIO, -+ .gpio69 = GPIO_MODE_GPIO, -+ .gpio70 = GPIO_MODE_GPIO, -+ .gpio71 = GPIO_MODE_GPIO, -+ .gpio72 = GPIO_MODE_NATIVE, -+ .gpio73 = GPIO_MODE_NATIVE, -+ .gpio74 = GPIO_MODE_NATIVE, -+ .gpio75 = GPIO_MODE_NATIVE, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_direction = { -+ .gpio68 = GPIO_DIR_INPUT, -+ .gpio69 = GPIO_DIR_INPUT, -+ .gpio70 = GPIO_DIR_INPUT, -+ .gpio71 = GPIO_DIR_INPUT, -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_level = { -+}; -+ -+static const struct pch_gpio_set3 pch_gpio_set3_reset = { -+}; -+ -+const struct pch_gpio_map mainboard_gpio_map = { -+ .set1 = { -+ .mode = &pch_gpio_set1_mode, -+ .direction = &pch_gpio_set1_direction, -+ .level = &pch_gpio_set1_level, -+ .blink = &pch_gpio_set1_blink, -+ .invert = &pch_gpio_set1_invert, -+ .reset = &pch_gpio_set1_reset, -+ }, -+ .set2 = { -+ .mode = &pch_gpio_set2_mode, -+ .direction = &pch_gpio_set2_direction, -+ .level = &pch_gpio_set2_level, -+ .reset = &pch_gpio_set2_reset, -+ }, -+ .set3 = { -+ .mode = &pch_gpio_set3_mode, -+ .direction = &pch_gpio_set3_direction, -+ .level = &pch_gpio_set3_level, -+ .reset = &pch_gpio_set3_reset, -+ }, -+}; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c -new file mode 100644 -index 0000000000..f6876f9e09 ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/hda_verb.c -@@ -0,0 +1,32 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <device/azalia_device.h> -+ -+const u32 cim_verb_data[] = { -+ 0x111d76df, /* Codec Vendor / Device ID: IDT */ -+ 0x10280532, /* Subsystem ID */ -+ 11, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(0, 0x10280532), -+ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020), -+ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f), -+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110), -+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050), -+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e), -+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3), -+ AZALIA_PIN_CFG(0, 0x11, 0xd5a30130), -+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0), -+ AZALIA_PIN_CFG(0, 0x20, 0x400000f0), -+ -+ 0x80862806, /* Codec Vendor / Device ID: Intel */ -+ 0x80860101, /* Subsystem ID */ -+ 4, /* Number of 4 dword sets */ -+ AZALIA_SUBVENDOR(3, 0x80860101), -+ AZALIA_PIN_CFG(3, 0x05, 0x18560010), -+ AZALIA_PIN_CFG(3, 0x06, 0x18560020), -+ AZALIA_PIN_CFG(3, 0x07, 0x18560030), -+}; -+ -+const u32 pc_beep_verbs[0] = {}; -+ -+AZALIA_ARRAY_SIZES; -diff --git a/src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb -new file mode 100644 -index 0000000000..3a0fa720da ---- /dev/null -+++ b/src/mainboard/dell/snb_ivb_latitude/variants/e6230/overridetree.cb -@@ -0,0 +1,40 @@ -+## SPDX-License-Identifier: GPL-2.0-or-later -+ -+chip northbridge/intel/sandybridge -+ device domain 0 on -+ subsystemid 0x1028 0x0532 inherit -+ -+ device ref igd on -+ register "gpu_cpu_backlight" = "0x000009e9" -+ register "gpu_pch_backlight" = "0x13121312" -+ end -+ -+ chip southbridge/intel/bd82x6x -+ register "usb_port_config" = "{ -+ { 1, 1, 0 }, -+ { 1, 1, 0 }, -+ { 1, 0, 1 }, -+ { 1, 2, 1 }, -+ { 1, 0, 2 }, -+ { 1, 0, 2 }, -+ { 1, 0, 3 }, -+ { 1, 1, 3 }, -+ { 1, 2, 4 }, -+ { 1, 1, 4 }, -+ { 1, 1, 5 }, -+ { 1, 1, 5 }, -+ { 1, 2, 6 }, -+ { 1, 0, 6 }, -+ }" -+ -+ device ref xhci on -+ register "superspeed_capable_ports" = "0x0000000f" -+ register "xhci_overcurrent_mapping" = "0x00000c03" -+ register "xhci_switchable_ports" = "0x0000000f" -+ end -+ device ref sata1 on -+ register "sata_port_map" = "0x31" -+ end -+ end -+ end -+end --- -2.39.5 - diff --git a/config/coreboot/default/patches/0028-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch b/config/coreboot/default/patches/0017-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch index 92e59129..808d90d6 100644 --- a/config/coreboot/default/patches/0028-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch +++ b/config/coreboot/default/patches/0017-nb-gm45-Fix-Angel-s-DDR2-RCOMP-fix-on-DDR3-boards.patch @@ -1,7 +1,7 @@ -From b6f75374fa38e0b097c9eadb4916112707cb6747 Mon Sep 17 00:00:00 2001 +From b5fe5366a03f934df87c5537b12f006ccee0d695 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Tue, 6 Aug 2024 00:50:24 +0100 -Subject: [PATCH 28/51] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards +Subject: [PATCH 17/40] nb/gm45: Fix Angel's DDR2 RCOMP fix on DDR3 boards We add this patch: @@ -236,5 +236,5 @@ index b74765fd9c..5d4505e063 100644 + } } -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0029-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch b/config/coreboot/default/patches/0018-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch index e31cb64c..b537346e 100644 --- a/config/coreboot/default/patches/0029-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch +++ b/config/coreboot/default/patches/0018-mb-dell-e6400-Use-100-MHz-reference-clock-for-displa.patch @@ -1,7 +1,7 @@ -From d3045b3dcebd94b78df2129cd81a20adf215e46a Mon Sep 17 00:00:00 2001 +From c075c12d5549cc6cfaa4fbb6bb3abd5e17503b04 Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Mon, 20 May 2024 10:24:16 -0600 -Subject: [PATCH 29/51] mb/dell/e6400: Use 100 MHz reference clock for display +Subject: [PATCH 18/40] mb/dell/e6400: Use 100 MHz reference clock for display The E6400 uses a 100 MHz reference clock for spread spectrum support on LVDS, whereas libgfxinit previously assumed a 96 MHz input clock. For @@ -14,26 +14,25 @@ display in the pre-OS graphics environment provided by libgfxinit. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> --- - src/mainboard/dell/e6400/Kconfig | 3 +++ - src/northbridge/intel/gm45/Kconfig | 4 ++++ - 2 files changed, 7 insertions(+) + src/mainboard/dell/gm45_latitude/Kconfig | 2 ++ + src/northbridge/intel/gm45/Kconfig | 4 ++++ + 2 files changed, 6 insertions(+) -diff --git a/src/mainboard/dell/e6400/Kconfig b/src/mainboard/dell/e6400/Kconfig -index 417d95fd5d..6fe1b1c456 100644 ---- a/src/mainboard/dell/e6400/Kconfig -+++ b/src/mainboard/dell/e6400/Kconfig -@@ -19,6 +19,9 @@ config BOARD_SPECIFIC_OPTIONS - select INTEL_GMA_HAVE_VBT - select EC_DELL_MEC5035 +diff --git a/src/mainboard/dell/gm45_latitude/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig +index 98ad18849c..4b026be2ba 100644 +--- a/src/mainboard/dell/gm45_latitude/Kconfig ++++ b/src/mainboard/dell/gm45_latitude/Kconfig +@@ -21,6 +21,8 @@ config BOARD_DELL_E6400 + select BOARD_DELL_GM45_LATITUDE_COMMON + if BOARD_DELL_GM45_LATITUDE_COMMON +config INTEL_GMA_DPLL_REF_FREQ + default 100000000 -+ - config MAINBOARD_DIR - default "dell/e6400" + config MAINBOARD_DIR + default "dell/gm45_latitude" diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig -index 8059e7ee80..5df5a93296 100644 +index fef0d735b3..fc5df8b11a 100644 --- a/src/northbridge/intel/gm45/Kconfig +++ b/src/northbridge/intel/gm45/Kconfig @@ -14,6 +14,10 @@ config NORTHBRIDGE_INTEL_GM45 @@ -48,5 +47,5 @@ index 8059e7ee80..5df5a93296 100644 select VBOOT_STARTS_IN_BOOTBLOCK -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0047-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch b/config/coreboot/default/patches/0019-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch index 988ae4e6..cd1c919f 100644 --- a/config/coreboot/default/patches/0047-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch +++ b/config/coreboot/default/patches/0019-nb-x4x-define-INTEL_GMA_DPLL_REF_FREQ.patch @@ -1,7 +1,7 @@ -From 53f2d47ee6ebaa8d47b076a6c2a1514c91247b95 Mon Sep 17 00:00:00 2001 +From 5833266cabd5dd38596b20d3353eb7b105ffd235 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Mon, 12 Aug 2024 02:15:24 +0100 -Subject: [PATCH 47/51] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ +Subject: [PATCH 19/40] nb/x4x: define INTEL_GMA_DPLL_REF_FREQ set it to 96MHz. fixes the following build error when building for x4x boards e.g. gigabyte ga-g41m-es2l: @@ -33,7 +33,7 @@ Signed-off-by: Leah Rowe <info@minifree.org> 1 file changed, 4 insertions(+) diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig -index 9af063819b..93ba575b95 100644 +index 097e11126c..6430319f6a 100644 --- a/src/northbridge/intel/x4x/Kconfig +++ b/src/northbridge/intel/x4x/Kconfig @@ -14,6 +14,10 @@ config NORTHBRIDGE_INTEL_X4X @@ -48,5 +48,5 @@ index 9af063819b..93ba575b95 100644 default 0x100000 if !SOUTHBRIDGE_INTEL_I82801GX -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0049-mb-dell-gm45_latitudes-Add-E4300-variant.patch b/config/coreboot/default/patches/0020-mb-dell-gm45_latitudes-Add-E4300-variant.patch index 2cdcd499..3b2d59ce 100644 --- a/config/coreboot/default/patches/0049-mb-dell-gm45_latitudes-Add-E4300-variant.patch +++ b/config/coreboot/default/patches/0020-mb-dell-gm45_latitudes-Add-E4300-variant.patch @@ -1,7 +1,7 @@ -From ac8ac2543e3ebbc05f79f37d1460cde532a7ee1c Mon Sep 17 00:00:00 2001 +From 75620139fe2bd6898d51dd7bd02e1031369feeec Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Thu, 26 Sep 2024 19:51:25 -0600 -Subject: [PATCH 49/51] mb/dell/gm45_latitudes: Add E4300 variant +Subject: [PATCH 20/40] mb/dell/gm45_latitudes: Add E4300 variant Change-Id: I0f2059501b11be103187e3ce1a7c04ab85ae63d2 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> @@ -21,10 +21,10 @@ Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> create mode 100644 src/mainboard/dell/gm45_latitude/variants/e4300/overridetree.cb diff --git a/src/mainboard/dell/gm45_latitude/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig -index ba76fb6e8c..144f9bcdf0 100644 +index 4b026be2ba..9f0f56e304 100644 --- a/src/mainboard/dell/gm45_latitude/Kconfig +++ b/src/mainboard/dell/gm45_latitude/Kconfig -@@ -21,6 +21,9 @@ config BOARD_DELL_GM45_LATITUDE_COMMON +@@ -20,6 +20,9 @@ config BOARD_DELL_GM45_LATITUDE_COMMON config BOARD_DELL_E6400 select BOARD_DELL_GM45_LATITUDE_COMMON @@ -32,9 +32,9 @@ index ba76fb6e8c..144f9bcdf0 100644 + select BOARD_DELL_GM45_LATITUDE_COMMON + if BOARD_DELL_GM45_LATITUDE_COMMON - config INTEL_GMA_DPLL_REF_FREQ -@@ -31,12 +34,14 @@ config MAINBOARD_DIR + default 100000000 +@@ -29,12 +32,14 @@ config MAINBOARD_DIR config MAINBOARD_PART_NUMBER default "Latitude E6400" if BOARD_DELL_E6400 @@ -328,5 +328,5 @@ index 0000000000..20dfa245fb + end +end -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0050-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch b/config/coreboot/default/patches/0021-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch index 71cc67c1..dcd75bb6 100644 --- a/config/coreboot/default/patches/0050-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch +++ b/config/coreboot/default/patches/0021-mb-dell-Add-S3-SMI-handler-for-Dell-Latitudes.patch @@ -1,7 +1,7 @@ -From 5e8b899654c31fe771e4b1e96c74c93d4509c3b2 Mon Sep 17 00:00:00 2001 +From 26862554523e08ea1d1cd18cfd09e3434b12e2a3 Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Fri, 3 May 2024 16:31:12 -0600 -Subject: [PATCH 50/51] mb/dell: Add S3 SMI handler for Dell Latitudes +Subject: [PATCH 21/40] mb/dell: Add S3 SMI handler for Dell Latitudes Integrate the previously added mec5035_smi_sleep() function into mainboard code to fix S3 suspend on the SNB/IVB Latitudes and the E7240. @@ -12,19 +12,19 @@ the power LED while in S3. Without it, all LEDs turn off during S3. Change-Id: Ic0d887f75be13c3fb9f6df62153ac458895e0283 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> --- - src/mainboard/dell/e7240/smihandler.c | 9 +++++++++ src/mainboard/dell/gm45_latitude/smihandler.c | 9 +++++++++ + src/mainboard/dell/haswell_latitude/smihandler.c | 9 +++++++++ src/mainboard/dell/snb_ivb_latitude/smihandler.c | 9 +++++++++ 3 files changed, 27 insertions(+) - create mode 100644 src/mainboard/dell/e7240/smihandler.c create mode 100644 src/mainboard/dell/gm45_latitude/smihandler.c + create mode 100644 src/mainboard/dell/haswell_latitude/smihandler.c create mode 100644 src/mainboard/dell/snb_ivb_latitude/smihandler.c -diff --git a/src/mainboard/dell/e7240/smihandler.c b/src/mainboard/dell/e7240/smihandler.c +diff --git a/src/mainboard/dell/gm45_latitude/smihandler.c b/src/mainboard/dell/gm45_latitude/smihandler.c new file mode 100644 index 0000000000..00e55b51db --- /dev/null -+++ b/src/mainboard/dell/e7240/smihandler.c ++++ b/src/mainboard/dell/gm45_latitude/smihandler.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + @@ -35,11 +35,11 @@ index 0000000000..00e55b51db +{ + mec5035_smi_sleep(slp_typ); +} -diff --git a/src/mainboard/dell/gm45_latitude/smihandler.c b/src/mainboard/dell/gm45_latitude/smihandler.c +diff --git a/src/mainboard/dell/haswell_latitude/smihandler.c b/src/mainboard/dell/haswell_latitude/smihandler.c new file mode 100644 index 0000000000..00e55b51db --- /dev/null -+++ b/src/mainboard/dell/gm45_latitude/smihandler.c ++++ b/src/mainboard/dell/haswell_latitude/smihandler.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + @@ -66,5 +66,5 @@ index 0000000000..00e55b51db + mec5035_smi_sleep(slp_typ); +} -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0051-ec-dell-mec5035-Route-power-button-event-to-host.patch b/config/coreboot/default/patches/0022-ec-dell-mec5035-Route-power-button-event-to-host.patch index 65f90e2c..ab85a389 100644 --- a/config/coreboot/default/patches/0051-ec-dell-mec5035-Route-power-button-event-to-host.patch +++ b/config/coreboot/default/patches/0022-ec-dell-mec5035-Route-power-button-event-to-host.patch @@ -1,7 +1,7 @@ -From 1a342c20b8705bbea02d27a73e383ee2808f2558 Mon Sep 17 00:00:00 2001 +From 849f0aba544d135e2028092862e5f030813c868e Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Tue, 18 Jun 2024 21:31:08 -0600 -Subject: [PATCH 51/51] ec/dell/mec5035: Route power button event to host +Subject: [PATCH 22/40] ec/dell/mec5035: Route power button event to host If command 0x3e with an argument of 1 isn't sent to the EC, pressing the power button results in the EC powering off the system without letting @@ -88,5 +88,5 @@ index 8d4fded28b..51422598c4 100644 void mec5035_sleep_enable(void); -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0052-Disable-compression-on-refcode-insertion.patch b/config/coreboot/default/patches/0023-Disable-compression-on-refcode-insertion.patch index 1c089279..17e630e3 100644 --- a/config/coreboot/default/patches/0052-Disable-compression-on-refcode-insertion.patch +++ b/config/coreboot/default/patches/0023-Disable-compression-on-refcode-insertion.patch @@ -1,7 +1,7 @@ -From 1e72e6df7f5d71fd41350e34d0a8bd5230349235 Mon Sep 17 00:00:00 2001 +From 89ecd79ab46f56c65c0b5720d1c84b12698a02b4 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Tue, 31 Dec 2024 14:42:24 +0000 -Subject: [PATCH 1/1] Disable compression on refcode insertion +Subject: [PATCH 23/40] Disable compression on refcode insertion Compression is not reliably reproducible. In an lbmk release context, this means we cannot rely on vendorfile insertion. @@ -14,10 +14,10 @@ Signed-off-by: Leah Rowe <info@minifree.org> 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile.mk b/Makefile.mk -index e9ad2ccbb2..6a96d45a83 100644 +index 218e388bb5..a2163c4644 100644 --- a/Makefile.mk +++ b/Makefile.mk -@@ -1364,7 +1364,7 @@ endif +@@ -1392,7 +1392,7 @@ endif cbfs-files-$(CONFIG_HAVE_REFCODE_BLOB) += $(CONFIG_CBFS_PREFIX)/refcode $(CONFIG_CBFS_PREFIX)/refcode-file := $(REFCODE_BLOB) $(CONFIG_CBFS_PREFIX)/refcode-type := stage @@ -27,5 +27,5 @@ index e9ad2ccbb2..6a96d45a83 100644 cbfs-files-$(CONFIG_SEABIOS_VGA_COREBOOT) += vgaroms/seavgabios.bin vgaroms/seavgabios.bin-file := $(CONFIG_PAYLOAD_VGABIOS_FILE) -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0024-ec-dell-mec5035-Replace-defines-with-enums.patch b/config/coreboot/default/patches/0024-ec-dell-mec5035-Replace-defines-with-enums.patch deleted file mode 100644 index 6c1118bb..00000000 --- a/config/coreboot/default/patches/0024-ec-dell-mec5035-Replace-defines-with-enums.patch +++ /dev/null @@ -1,91 +0,0 @@ -From a1566875789469ebd91e472301be4b359aac0a4c Mon Sep 17 00:00:00 2001 -From: Nicholas Chin <nic.c3.14@gmail.com> -Date: Tue, 28 May 2024 17:23:21 -0600 -Subject: [PATCH 24/51] ec/dell/mec5035: Replace defines with enums - -Instead of using defines for command IDs and argument values, use enums -to provide more type safety. This also has the effect of moving the -command IDs to a more central location instead of defines spread out -throughout the header. - -Change-Id: I788531e8b70e79541213853f177326d217235ef2 -Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> -Reviewed-on: https://review.coreboot.org/c/coreboot/+/82998 -Tested-by: build bot (Jenkins) <no-reply@coreboot.org> -Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> ---- - src/ec/dell/mec5035/mec5035.c | 10 +++++----- - src/ec/dell/mec5035/mec5035.h | 20 ++++++++++++-------- - 2 files changed, 17 insertions(+), 13 deletions(-) - -diff --git a/src/ec/dell/mec5035/mec5035.c b/src/ec/dell/mec5035/mec5035.c -index 68b6b2f7fb..dffbb7960c 100644 ---- a/src/ec/dell/mec5035/mec5035.c -+++ b/src/ec/dell/mec5035/mec5035.c -@@ -66,17 +66,17 @@ static enum cb_err write_mailbox_regs(const u8 *data, u8 start, u8 count) - return CB_SUCCESS; - } - --static void ec_command(u8 cmd) -+static void ec_command(enum mec5035_cmd cmd) - { - outb(0, MAILBOX_INDEX); -- outb(cmd, MAILBOX_DATA); -+ outb((u8)cmd, MAILBOX_DATA); - wait_ec(); - } - --u8 mec5035_mouse_touchpad(u8 setting) -+u8 mec5035_mouse_touchpad(enum ec_mouse_setting setting) - { -- u8 buf[15] = {0}; -- write_mailbox_regs(&setting, 2, 1); -+ u8 buf[15] = {(u8)setting}; -+ write_mailbox_regs(buf, 2, 1); - ec_command(CMD_MOUSE_TP); - /* The vendor firmware reads 15 bytes starting at index 1, presumably - to get some sort of return code. Though I don't know for sure if -diff --git a/src/ec/dell/mec5035/mec5035.h b/src/ec/dell/mec5035/mec5035.h -index fa15a9d621..32f791cb01 100644 ---- a/src/ec/dell/mec5035/mec5035.h -+++ b/src/ec/dell/mec5035/mec5035.h -@@ -7,16 +7,20 @@ - - #define NUM_REGISTERS 32 - -+enum mec5035_cmd { -+ CMD_MOUSE_TP = 0x1a, -+ CMD_RADIO_CTRL = 0x2b, -+ CMD_CPU_OK = 0xc2, -+}; -+ - /* Touchpad (TP) and mouse related. The EC seems to - default to 0 which results in the TP not working. */ --#define CMD_MOUSE_TP 0x1a --#define SERIAL_MOUSE 0 /* Disable TP, force use of a serial mouse */ --#define PS2_MOUSE 1 /* Disable TP when using a PS/2 mouse */ --#define TP_PS2_MOUSE 2 /* Leave TP enabled when using a PS/2 mouse */ -- --#define CMD_CPU_OK 0xc2 -+enum ec_mouse_setting { -+ SERIAL_MOUSE = 0, /* Disable TP, force use of a serial mouse */ -+ PS2_MOUSE, /* Disable TP when using a PS/2 mouse */ -+ TP_PS2_MOUSE /* Leave TP enabled when using a PS/2 mouse */ -+}; - --#define CMD_RADIO_CTRL 0x2b - #define RADIO_CTRL_NUM_ARGS 3 - enum ec_radio_dev { - RADIO_WLAN = 0, -@@ -29,7 +33,7 @@ enum ec_radio_state { - RADIO_ON - }; - --u8 mec5035_mouse_touchpad(u8 setting); -+u8 mec5035_mouse_touchpad(enum ec_mouse_setting setting); - void mec5035_cpu_ok(void); - void mec5035_early_init(void); - void mec5035_control_radio(enum ec_radio_dev device, enum ec_radio_state state); --- -2.39.5 - diff --git a/config/coreboot/default/patches/0024-nb-intel-Disable-stack-overflow-debug-options.patch b/config/coreboot/default/patches/0024-nb-intel-Disable-stack-overflow-debug-options.patch new file mode 100644 index 00000000..cc9504e9 --- /dev/null +++ b/config/coreboot/default/patches/0024-nb-intel-Disable-stack-overflow-debug-options.patch @@ -0,0 +1,187 @@ +From df60dac9dbaf0c71008dbead7dc1a8c8881c5e33 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Mon, 21 Apr 2025 02:58:47 +0100 +Subject: [PATCH 24/40] nb/intel/*: Disable stack overflow debug options + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + src/northbridge/intel/e7505/Kconfig | 9 +++++++++ + src/northbridge/intel/gm45/Kconfig | 9 +++++++++ + src/northbridge/intel/haswell/Kconfig | 9 +++++++++ + src/northbridge/intel/i440bx/Kconfig | 13 +++++++++++++ + src/northbridge/intel/i945/Kconfig | 9 +++++++++ + src/northbridge/intel/ironlake/Kconfig | 9 +++++++++ + src/northbridge/intel/pineview/Kconfig | 9 +++++++++ + src/northbridge/intel/sandybridge/Kconfig | 9 +++++++++ + src/northbridge/intel/x4x/Kconfig | 9 +++++++++ + 9 files changed, 85 insertions(+) + +diff --git a/src/northbridge/intel/e7505/Kconfig b/src/northbridge/intel/e7505/Kconfig +index 039a7396f8..ddcb986f10 100644 +--- a/src/northbridge/intel/e7505/Kconfig ++++ b/src/northbridge/intel/e7505/Kconfig +@@ -7,3 +7,12 @@ config NORTHBRIDGE_INTEL_E7505 + select NO_CBFS_MCACHE + select SMM_TSEG + select NEED_SMALL_2MB_PAGE_TABLES ++ ++# Override DEBUG Kconfig to avoid false alarm about stack overflow. ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS ++ bool ++ default n ++ ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES ++ bool ++ default n +diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig +index fc5df8b11a..95e3644b73 100644 +--- a/src/northbridge/intel/gm45/Kconfig ++++ b/src/northbridge/intel/gm45/Kconfig +@@ -58,4 +58,13 @@ config FIXED_DMIBAR_MMIO_BASE + config FIXED_EPBAR_MMIO_BASE + default 0xfed19000 + ++# Override DEBUG Kconfig to avoid false alarm about stack overflow. ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS ++ bool ++ default n ++ ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES ++ bool ++ default n ++ + endif +diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig +index 6191cb6ccf..0f5b5c7241 100644 +--- a/src/northbridge/intel/haswell/Kconfig ++++ b/src/northbridge/intel/haswell/Kconfig +@@ -10,6 +10,15 @@ config NORTHBRIDGE_INTEL_HASWELL + + if NORTHBRIDGE_INTEL_HASWELL + ++# Override DEBUG Kconfig to avoid false alarm about stack overflow. ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS ++ bool ++ default n ++ ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES ++ bool ++ default n ++ + config USE_NATIVE_RAMINIT + bool "[NOT COMPLETE] Use native raminit" + default n +diff --git a/src/northbridge/intel/i440bx/Kconfig b/src/northbridge/intel/i440bx/Kconfig +index dbb2d7436b..5e9418b6a9 100644 +--- a/src/northbridge/intel/i440bx/Kconfig ++++ b/src/northbridge/intel/i440bx/Kconfig +@@ -19,3 +19,16 @@ config SDRAMPWR_4DIMM + If your board has 4 DIMM slots, you must use select this option, in + your Kconfig file of the board. On boards with 3 DIMM slots, + do _not_ select this option. ++ ++if NORTHBRIDGE_INTEL_I440BX ++ ++# Override DEBUG Kconfig to avoid false alarm about stack overflow. ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS ++ bool ++ default n ++ ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES ++ bool ++ default n ++ ++endif +diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig +index 32eff1a611..9479d75c07 100644 +--- a/src/northbridge/intel/i945/Kconfig ++++ b/src/northbridge/intel/i945/Kconfig +@@ -89,4 +89,13 @@ config FIXED_DMIBAR_MMIO_BASE + config FIXED_EPBAR_MMIO_BASE + default 0xfed19000 + ++# Override DEBUG Kconfig to avoid false alarm about stack overflow. ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS ++ bool ++ default n ++ ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES ++ bool ++ default n ++ + endif +diff --git a/src/northbridge/intel/ironlake/Kconfig b/src/northbridge/intel/ironlake/Kconfig +index 2bafebf92e..16b81705bb 100644 +--- a/src/northbridge/intel/ironlake/Kconfig ++++ b/src/northbridge/intel/ironlake/Kconfig +@@ -63,4 +63,13 @@ config FIXED_DMIBAR_MMIO_BASE + config FIXED_EPBAR_MMIO_BASE + default 0xfed19000 + ++# Override DEBUG Kconfig to avoid false alarm about stack overflow. ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS ++ bool ++ default n ++ ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES ++ bool ++ default n ++ + endif +diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig +index 59cfcd5e0a..a3ad8d3425 100644 +--- a/src/northbridge/intel/pineview/Kconfig ++++ b/src/northbridge/intel/pineview/Kconfig +@@ -42,4 +42,13 @@ config FIXED_EPBAR_MMIO_BASE + config DOMAIN_RESOURCE_32BIT_LIMIT + default 0xfec00000 + ++# Override DEBUG Kconfig to avoid false alarm about stack overflow. ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS ++ bool ++ default n ++ ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES ++ bool ++ default n ++ + endif +diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig +index 973eed8bbd..6387cf926d 100644 +--- a/src/northbridge/intel/sandybridge/Kconfig ++++ b/src/northbridge/intel/sandybridge/Kconfig +@@ -208,4 +208,13 @@ config IGD_DEFAULT_UMA_INDEX + default 2 if IGD_DEFAULT_UMA_SIZE_96MB + default 3 if IGD_DEFAULT_UMA_SIZE_128MB + ++# Override DEBUG Kconfig to avoid false alarm about stack overflow. ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS ++ bool ++ default n ++ ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES ++ bool ++ default n ++ + endif +diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig +index 6430319f6a..1803ef5733 100644 +--- a/src/northbridge/intel/x4x/Kconfig ++++ b/src/northbridge/intel/x4x/Kconfig +@@ -53,4 +53,13 @@ config FIXED_DMIBAR_MMIO_BASE + config FIXED_EPBAR_MMIO_BASE + default 0xfed19000 + ++# Override DEBUG Kconfig to avoid false alarm about stack overflow. ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS ++ bool ++ default n ++ ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES ++ bool ++ default n ++ + endif +-- +2.47.3 + diff --git a/config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch b/config/coreboot/default/patches/0025-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch index 77513b77..70bb9ae9 100644 --- a/config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch +++ b/config/coreboot/default/patches/0025-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch @@ -1,7 +1,7 @@ -From 2527c4a5131d7b33e43bbc03a94921e7e59b4b02 Mon Sep 17 00:00:00 2001 +From c3af549f5b6431475f3d180eb3b3041d9bfc5d81 Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Mon, 30 Sep 2024 20:44:38 -0400 -Subject: [PATCH 04/11] mb/dell: Add Optiplex 780 MT (x4x/ICH10) +Subject: [PATCH 25/40] mb/dell: Add Optiplex 780 MT (x4x/ICH10) Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> @@ -704,5 +704,5 @@ index 0000000000..555b1c1f5c + end +end -- -2.39.5 +2.47.3 diff --git a/config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch b/config/coreboot/default/patches/0026-mb-dell-optiplex_780-Add-USFF-variant.patch index 637b7266..231e303e 100644 --- a/config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch +++ b/config/coreboot/default/patches/0026-mb-dell-optiplex_780-Add-USFF-variant.patch @@ -1,7 +1,7 @@ -From 41b93b8786ba14830648cd166f86b6317d655359 Mon Sep 17 00:00:00 2001 +From bb14741af8e4a16d3d098d79fb8df0c3a45e6ccb Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Wed, 30 Oct 2024 20:55:25 -0600 -Subject: [PATCH 07/11] mb/dell/optiplex_780: Add USFF variant +Subject: [PATCH 26/40] mb/dell/optiplex_780: Add USFF variant Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> @@ -322,5 +322,5 @@ index 0000000000..555b1c1f5c + end +end -- -2.39.5 +2.47.3 diff --git a/config/coreboot/next/patches/0014-src-intel-x4x-Disable-stack-overflow-debug.patch b/config/coreboot/default/patches/0027-src-intel-x4x-Disable-stack-overflow-debug.patch index e2eae2a9..94186a30 100644 --- a/config/coreboot/next/patches/0014-src-intel-x4x-Disable-stack-overflow-debug.patch +++ b/config/coreboot/default/patches/0027-src-intel-x4x-Disable-stack-overflow-debug.patch @@ -1,7 +1,7 @@ -From 5671d54d347b110ffade5b8b6e2d052612a8716c Mon Sep 17 00:00:00 2001 +From 1685de1beee49456e9f6f578ca6e37219fe7dfff Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Mon, 6 Jan 2025 01:53:53 +0000 -Subject: [PATCH 1/1] src/intel/x4x: Disable stack overflow debug +Subject: [PATCH 27/40] src/intel/x4x: Disable stack overflow debug Signed-off-by: Leah Rowe <leah@libreboot.org> --- @@ -9,10 +9,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org> 1 file changed, 9 insertions(+) diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig -index 097e11126c..7e4e14cf94 100644 +index 1803ef5733..7129aabf72 100644 --- a/src/northbridge/intel/x4x/Kconfig +++ b/src/northbridge/intel/x4x/Kconfig -@@ -28,6 +28,15 @@ config ECAM_MMCONF_BUS_NUMBER +@@ -32,6 +32,15 @@ config ECAM_MMCONF_BUS_NUMBER int default 256 @@ -29,5 +29,5 @@ index 097e11126c..7e4e14cf94 100644 config DOMAIN_RESOURCE_32BIT_LIMIT default 0xfec00000 -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0028-hp-8300cmt-remove-xhci_overcurrent_mapping.patch b/config/coreboot/default/patches/0028-hp-8300cmt-remove-xhci_overcurrent_mapping.patch new file mode 100644 index 00000000..c42b3cf0 --- /dev/null +++ b/config/coreboot/default/patches/0028-hp-8300cmt-remove-xhci_overcurrent_mapping.patch @@ -0,0 +1,42 @@ +From 6f54ed4b0622c7772561760ea4b435bd236ac834 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Tue, 22 Apr 2025 10:21:59 +0100 +Subject: [PATCH 28/40] hp/8300cmt: remove xhci_overcurrent_mapping + +No longer needed, as per the following commit: + +commit a3d1e6c4806e6c0e2e744be3a03fce12f21778d1 +Author: Keith Hui <buurin@gmail.com> +Date: Tue Dec 31 18:19:31 2024 -0500 + + sb/intel/bd82x6x: Apply EHCI mapping to xhci_overcurrent_mapping + +Removing this from the devicetree also allows the +board to compile, otherwise an error is thrown: + +build/mainboard/hp/compaq_elite_8300_cmt/static.c:147:10: error: 'const struct southbridge_intel_bd82x6x_config' has no member named 'xhci_overcurrent_mapping' + 147 | .xhci_overcurrent_mapping = 0x00000c03, + | ^~~~~~~~~~~~~~~~~~~~~~~~ +build/mainboard/hp/compaq_elite_8300_cmt/static.c:147:37: error: excess elements in struct initializer [-Werror] + 147 | .xhci_overcurrent_mapping = 0x00000c03, + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb +index 3d21739b72..3a0b6d5c59 100644 +--- a/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb ++++ b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb +@@ -25,7 +25,6 @@ chip northbridge/intel/sandybridge + register "spi_lvscc" = "0x2005" + register "spi_uvscc" = "0x2005" + register "superspeed_capable_ports" = "0x0000000f" +- register "xhci_overcurrent_mapping" = "0x00000c03" + register "xhci_switchable_ports" = "0x0000000f" + register "usb_port_config" = "{ + { 1, 0, 0 }, +-- +2.47.3 + diff --git a/config/coreboot/next/patches/0008-dell-3050micro-disable-nvme-hotplug.patch b/config/coreboot/default/patches/0029-dell-3050micro-disable-nvme-hotplug.patch index daeb0fa1..4b036e02 100644 --- a/config/coreboot/next/patches/0008-dell-3050micro-disable-nvme-hotplug.patch +++ b/config/coreboot/default/patches/0029-dell-3050micro-disable-nvme-hotplug.patch @@ -1,7 +1,7 @@ -From c8192c52b2bfa93aeb6c6639476ca217e33c4313 Mon Sep 17 00:00:00 2001 +From 17c67799604e0e29192415e97293d71deb457cb2 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Wed, 11 Dec 2024 01:06:01 +0000 -Subject: [PATCH 08/11] dell/3050micro: disable nvme hotplug +Subject: [PATCH 29/40] dell/3050micro: disable nvme hotplug in my testing, when running my 3050micro for a few days, the nvme would sometimes randomly rename. @@ -30,12 +30,12 @@ Signed-off-by: Leah Rowe <leah@libreboot.org> 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb -index 039709aa4a..0678ed1765 100644 +index 0d2adff74a..829acacab3 100644 --- a/src/mainboard/dell/optiplex_3050/devicetree.cb +++ b/src/mainboard/dell/optiplex_3050/devicetree.cb -@@ -45,7 +45,9 @@ chip soc/intel/skylake +@@ -44,7 +44,9 @@ chip soc/intel/skylake register "PcieRpAdvancedErrorReporting[20]" = "1" - register "PcieRpLtrEnable[20]" = "1" + register "PcieRpLtrEnable[20]" = "true" register "PcieRpClkSrcNumber[20]" = "3" - register "PcieRpHotPlug[20]" = "1" +# disable hotplug on nvme to prevent renaming e.g. nvme0n1 rename to nvme0n2, @@ -45,5 +45,5 @@ index 039709aa4a..0678ed1765 100644 # Realtek LAN -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0030-haswell-NRI-Initialise-MPLL.patch b/config/coreboot/default/patches/0030-haswell-NRI-Initialise-MPLL.patch deleted file mode 100644 index a1cf9b75..00000000 --- a/config/coreboot/default/patches/0030-haswell-NRI-Initialise-MPLL.patch +++ /dev/null @@ -1,348 +0,0 @@ -From 0966980e52286985fcd0fac6325bdd99f35ebcb8 Mon Sep 17 00:00:00 2001 -From: Angel Pons <th3fanbus@gmail.com> -Date: Thu, 11 Apr 2024 17:25:07 +0200 -Subject: [PATCH 30/51] haswell NRI: Initialise MPLL - -Add code to initialise the MPLL (Memory PLL). The procedure is similar -to the one for Sandy/Ivy Bridge, but it is not worth factoring out. - -Change-Id: I978c352de68f6d8cecc76f4ae3c12daaf4be9ed6 -Signed-off-by: Angel Pons <th3fanbus@gmail.com> ---- - .../intel/haswell/native_raminit/Makefile.mk | 2 + - .../intel/haswell/native_raminit/init_mpll.c | 210 ++++++++++++++++++ - .../haswell/native_raminit/io_comp_control.c | 22 ++ - .../haswell/native_raminit/raminit_main.c | 3 +- - .../haswell/native_raminit/raminit_native.h | 11 + - .../intel/haswell/registers/mchbar.h | 3 + - 6 files changed, 250 insertions(+), 1 deletion(-) - create mode 100644 src/northbridge/intel/haswell/native_raminit/init_mpll.c - create mode 100644 src/northbridge/intel/haswell/native_raminit/io_comp_control.c - -diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -index ebf7abc6ec..c125d84f0b 100644 ---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk -+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -@@ -1,5 +1,7 @@ - ## SPDX-License-Identifier: GPL-2.0-or-later - -+romstage-y += init_mpll.c -+romstage-y += io_comp_control.c - romstage-y += raminit_main.c - romstage-y += raminit_native.c - romstage-y += spd_bitmunching.c -diff --git a/src/northbridge/intel/haswell/native_raminit/init_mpll.c b/src/northbridge/intel/haswell/native_raminit/init_mpll.c -new file mode 100644 -index 0000000000..1f3f2c29a9 ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/init_mpll.c -@@ -0,0 +1,210 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <commonlib/bsd/clamp.h> -+#include <console/console.h> -+#include <delay.h> -+#include <device/pci_ops.h> -+#include <northbridge/intel/haswell/haswell.h> -+#include <types.h> -+ -+#include "raminit_native.h" -+ -+static uint32_t get_mem_multiplier(const struct sysinfo *ctrl) -+{ -+ const uint32_t mult = NS2MHZ_DIV256 / (ctrl->tCK * ctrl->base_freq); -+ -+ if (ctrl->base_freq == 100) -+ return clamp_u32(7, mult, 12); -+ -+ if (ctrl->base_freq == 133) -+ return clamp_u32(3, mult, 10); -+ -+ die("Unsupported base frequency\n"); -+} -+ -+static void normalize_tck(struct sysinfo *ctrl, const bool pll_ref100) -+{ -+ /** TODO: Haswell supports up to DDR3-2600 **/ -+ if (ctrl->tCK <= TCK_1200MHZ) { -+ ctrl->tCK = TCK_1200MHZ; -+ ctrl->base_freq = 133; -+ ctrl->mem_clock_mhz = 1200; -+ -+ } else if (ctrl->tCK <= TCK_1100MHZ) { -+ ctrl->tCK = TCK_1100MHZ; -+ ctrl->base_freq = 100; -+ ctrl->mem_clock_mhz = 1100; -+ -+ } else if (ctrl->tCK <= TCK_1066MHZ) { -+ ctrl->tCK = TCK_1066MHZ; -+ ctrl->base_freq = 133; -+ ctrl->mem_clock_mhz = 1066; -+ -+ } else if (ctrl->tCK <= TCK_1000MHZ) { -+ ctrl->tCK = TCK_1000MHZ; -+ ctrl->base_freq = 100; -+ ctrl->mem_clock_mhz = 1000; -+ -+ } else if (ctrl->tCK <= TCK_933MHZ) { -+ ctrl->tCK = TCK_933MHZ; -+ ctrl->base_freq = 133; -+ ctrl->mem_clock_mhz = 933; -+ -+ } else if (ctrl->tCK <= TCK_900MHZ) { -+ ctrl->tCK = TCK_900MHZ; -+ ctrl->base_freq = 100; -+ ctrl->mem_clock_mhz = 900; -+ -+ } else if (ctrl->tCK <= TCK_800MHZ) { -+ ctrl->tCK = TCK_800MHZ; -+ ctrl->base_freq = 133; -+ ctrl->mem_clock_mhz = 800; -+ -+ } else if (ctrl->tCK <= TCK_700MHZ) { -+ ctrl->tCK = TCK_700MHZ; -+ ctrl->base_freq = 100; -+ ctrl->mem_clock_mhz = 700; -+ -+ } else if (ctrl->tCK <= TCK_666MHZ) { -+ ctrl->tCK = TCK_666MHZ; -+ ctrl->base_freq = 133; -+ ctrl->mem_clock_mhz = 666; -+ -+ } else if (ctrl->tCK <= TCK_533MHZ) { -+ ctrl->tCK = TCK_533MHZ; -+ ctrl->base_freq = 133; -+ ctrl->mem_clock_mhz = 533; -+ -+ } else if (ctrl->tCK <= TCK_400MHZ) { -+ ctrl->tCK = TCK_400MHZ; -+ ctrl->base_freq = 133; -+ ctrl->mem_clock_mhz = 400; -+ -+ } else { -+ ctrl->tCK = 0; -+ ctrl->base_freq = 1; -+ ctrl->mem_clock_mhz = 0; -+ return; -+ } -+ if (!pll_ref100 && ctrl->base_freq == 100) { -+ /* Skip unsupported frequency */ -+ ctrl->tCK++; -+ normalize_tck(ctrl, pll_ref100); -+ } -+} -+ -+#define MIN_CAS 4 -+#define MAX_CAS 24 -+ -+static uint8_t find_compatible_cas(struct sysinfo *ctrl) -+{ -+ printk(RAM_DEBUG, "With tCK %u, try CAS: ", ctrl->tCK); -+ const uint8_t cas_lower = MAX(MIN_CAS, DIV_ROUND_UP(ctrl->tAA, ctrl->tCK)); -+ const uint8_t cas_upper = MIN(MAX_CAS, 19); /* JEDEC MR0 limit */ -+ -+ if (!(ctrl->cas_supported >> (cas_lower - MIN_CAS))) { -+ printk(RAM_DEBUG, "DIMMs do not support CAS >= %u\n", cas_lower); -+ ctrl->tCK++; -+ return 0; -+ } -+ for (uint8_t cas = cas_lower; cas <= cas_upper; cas++) { -+ printk(RAM_DEBUG, "%u ", cas); -+ if (ctrl->cas_supported & BIT(cas - MIN_CAS)) { -+ printk(RAM_DEBUG, "OK\n"); -+ return cas; -+ } -+ } -+ return 0; -+} -+ -+static enum raminit_status find_cas_tck(struct sysinfo *ctrl) -+{ -+ /** TODO: Honor all possible PLL_REF100_CFG values **/ -+ uint8_t pll_ref100 = (pci_read_config32(HOST_BRIDGE, CAPID0_B) >> 21) & 0x7; -+ printk(RAM_DEBUG, "PLL_REF100_CFG value: 0x%x\n", pll_ref100); -+ printk(RAM_DEBUG, "100MHz reference clock support: %s\n", pll_ref100 ? "yes" : "no"); -+ -+ uint8_t selected_cas; -+ while (true) { -+ /* Round tCK up so that it is a multiple of either 133 or 100 MHz */ -+ normalize_tck(ctrl, pll_ref100); -+ if (!ctrl->tCK) { -+ printk(BIOS_ERR, "Couldn't find compatible clock / CAS settings\n"); -+ return RAMINIT_STATUS_MPLL_INIT_FAILURE; -+ } -+ selected_cas = find_compatible_cas(ctrl); -+ if (selected_cas) -+ break; -+ -+ ctrl->tCK++; -+ } -+ printk(BIOS_DEBUG, "Found compatible clock / CAS settings\n"); -+ printk(BIOS_DEBUG, "Selected DRAM frequency: %u MHz\n", NS2MHZ_DIV256 / ctrl->tCK); -+ printk(BIOS_DEBUG, "Selected CAS latency : %uT\n", selected_cas); -+ ctrl->multiplier = get_mem_multiplier(ctrl); -+ return RAMINIT_STATUS_SUCCESS; -+} -+ -+enum raminit_status initialise_mpll(struct sysinfo *ctrl) -+{ -+ if (ctrl->tCK > TCK_400MHZ) { -+ printk(BIOS_ERR, "tCK is too slow. Increasing to 400 MHz as last resort\n"); -+ ctrl->tCK = TCK_400MHZ; -+ } -+ while (true) { -+ if (!ctrl->qclkps) { -+ const enum raminit_status status = find_cas_tck(ctrl); -+ if (status) -+ return status; -+ } -+ -+ /* -+ * Unlike previous generations, Haswell's MPLL won't shut down if the -+ * requested frequency isn't supported. But we cannot reinitialize it. -+ * Another different thing: MPLL registers are 4-bit instead of 8-bit. -+ */ -+ -+ /** FIXME: Obtain current clock frequency if we want to skip this **/ -+ //if (mchbar_read32(MC_BIOS_DATA) != 0) -+ // break; -+ -+ uint32_t mc_bios_req = ctrl->multiplier; -+ if (ctrl->base_freq == 100) { -+ /* Use 100 MHz reference clock */ -+ mc_bios_req |= BIT(4); -+ } -+ mc_bios_req |= BIT(31); -+ printk(RAM_DEBUG, "MC_BIOS_REQ = 0x%08x\n", mc_bios_req); -+ printk(BIOS_DEBUG, "MPLL busy... "); -+ mchbar_write32(MC_BIOS_REQ, mc_bios_req); -+ -+ for (unsigned int i = 0; i <= 5000; i++) { -+ if (!(mchbar_read32(MC_BIOS_REQ) & BIT(31))) { -+ printk(BIOS_DEBUG, "done in %u us\n", i); -+ break; -+ } -+ udelay(1); -+ } -+ if (mchbar_read32(MC_BIOS_REQ) & BIT(31)) -+ printk(BIOS_DEBUG, "did not lock\n"); -+ -+ /* Verify locked frequency */ -+ const uint32_t mc_bios_data = mchbar_read32(MC_BIOS_DATA); -+ printk(RAM_DEBUG, "MC_BIOS_DATA = 0x%08x\n", mc_bios_data); -+ if ((mc_bios_data & 0xf) >= ctrl->multiplier) -+ break; -+ -+ printk(BIOS_DEBUG, "Retrying at a lower frequency\n\n"); -+ ctrl->tCK++; -+ } -+ if (!ctrl->mem_clock_mhz) { -+ printk(BIOS_ERR, "Could not program MPLL frequency\n"); -+ return RAMINIT_STATUS_MPLL_INIT_FAILURE; -+ } -+ printk(BIOS_DEBUG, "MPLL frequency is set to: %u MHz ", ctrl->mem_clock_mhz); -+ ctrl->mem_clock_fs = 1000000000 / ctrl->mem_clock_mhz; -+ printk(BIOS_DEBUG, "(period: %u femtoseconds)\n", ctrl->mem_clock_fs); -+ ctrl->qclkps = ctrl->mem_clock_fs / 2000; -+ printk(BIOS_DEBUG, "Quadrature clock period: %u picoseconds\n", ctrl->qclkps); -+ return wait_for_first_rcomp(); -+} -diff --git a/src/northbridge/intel/haswell/native_raminit/io_comp_control.c b/src/northbridge/intel/haswell/native_raminit/io_comp_control.c -new file mode 100644 -index 0000000000..d45b608dd3 ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/io_comp_control.c -@@ -0,0 +1,22 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <commonlib/bsd/clamp.h> -+#include <console/console.h> -+#include <northbridge/intel/haswell/haswell.h> -+#include <timer.h> -+#include <types.h> -+ -+#include "raminit_native.h" -+ -+enum raminit_status wait_for_first_rcomp(void) -+{ -+ struct stopwatch timer; -+ stopwatch_init_msecs_expire(&timer, 2000); -+ do { -+ if (mchbar_read32(RCOMP_TIMER) & BIT(16)) -+ return RAMINIT_STATUS_SUCCESS; -+ -+ } while (!stopwatch_expired(&timer)); -+ printk(BIOS_ERR, "Timed out waiting for RCOMP to complete\n"); -+ return RAMINIT_STATUS_POLL_TIMEOUT; -+} -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -index 19ec5859ac..bf745e943f 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -@@ -19,7 +19,8 @@ struct task_entry { - }; - - static const struct task_entry cold_boot[] = { -- { collect_spd_info, true, "PROCSPD", }, -+ { collect_spd_info, true, "PROCSPD", }, -+ { initialise_mpll, true, "INITMPLL", }, - }; - - /* Return a generic stepping value to make stepping checks simpler */ -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -index 8078c9c386..15a1550424 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -@@ -24,6 +24,8 @@ enum raminit_status { - RAMINIT_STATUS_SUCCESS = 0, - RAMINIT_STATUS_NO_MEMORY_INSTALLED, - RAMINIT_STATUS_UNSUPPORTED_MEMORY, -+ RAMINIT_STATUS_MPLL_INIT_FAILURE, -+ RAMINIT_STATUS_POLL_TIMEOUT, - RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/ - }; - -@@ -83,10 +85,19 @@ struct sysinfo { - uint8_t rankmap[NUM_CHANNELS]; - uint8_t rank_mirrored[NUM_CHANNELS]; - uint32_t channel_size_mb[NUM_CHANNELS]; -+ -+ uint8_t base_freq; /* Memory base frequency, either 100 or 133 MHz */ -+ uint32_t multiplier; -+ uint32_t mem_clock_mhz; -+ uint32_t mem_clock_fs; /* Memory clock period in femtoseconds */ -+ uint32_t qclkps; /* Quadrature clock period in picoseconds */ - }; - - void raminit_main(enum raminit_boot_mode bootmode); - - enum raminit_status collect_spd_info(struct sysinfo *ctrl); -+enum raminit_status initialise_mpll(struct sysinfo *ctrl); -+ -+enum raminit_status wait_for_first_rcomp(void); - - #endif -diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h -index 5610e7089a..45f8174995 100644 ---- a/src/northbridge/intel/haswell/registers/mchbar.h -+++ b/src/northbridge/intel/haswell/registers/mchbar.h -@@ -13,6 +13,8 @@ - #define MC_INIT_STATE_G 0x5030 - #define MRC_REVISION 0x5034 /* MRC Revision */ - -+#define RCOMP_TIMER 0x5084 -+ - #define MC_LOCK 0x50fc /* Memory Controller Lock register */ - - #define GFXVTBAR 0x5400 /* Base address for IGD */ -@@ -61,6 +63,7 @@ - - #define BIOS_RESET_CPL 0x5da8 /* 8-bit */ - -+#define MC_BIOS_REQ 0x5e00 /* Memory frequency request register */ - #define MC_BIOS_DATA 0x5e04 /* Miscellaneous information for BIOS */ - #define SAPMCTL 0x5f00 - --- -2.39.5 - diff --git a/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch b/config/coreboot/default/patches/0030-soc-intel-skylake-configure-usb-acpi.patch index 215a4e6d..8a328251 100644 --- a/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch +++ b/config/coreboot/default/patches/0030-soc-intel-skylake-configure-usb-acpi.patch @@ -1,7 +1,7 @@ -From 0a28ea805e3dddfaa89e6c4255506a390bc7ce04 Mon Sep 17 00:00:00 2001 +From 819fe0e89e426d3d875cf8ab4d2de439ba716848 Mon Sep 17 00:00:00 2001 From: Felix Singer <felixsinger@posteo.net> Date: Wed, 26 Jun 2024 04:24:31 +0200 -Subject: [PATCH 01/11] soc/intel/skylake: configure usb acpi +Subject: [PATCH 30/40] soc/intel/skylake: configure usb acpi Change-Id: I53fc73046e4b107064fa8c3c617ba6d9b807b71d Signed-off-by: Felix Singer <felixsinger@posteo.net> @@ -11,7 +11,7 @@ Signed-off-by: Felix Singer <felixsinger@posteo.net> 2 files changed, 56 insertions(+), 1 deletion(-) diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig -index 22017c848b..c24df2ef75 100644 +index 4ad33496b2..9191ed0ff8 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -10,6 +10,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE @@ -90,5 +90,5 @@ index 6538a1475b..dfb81d496e 100644 device pci 14.2 alias thermal off end device pci 14.3 alias cio off end -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0031-haswell-NRI-Post-process-selected-timings.patch b/config/coreboot/default/patches/0031-haswell-NRI-Post-process-selected-timings.patch deleted file mode 100644 index 426cef35..00000000 --- a/config/coreboot/default/patches/0031-haswell-NRI-Post-process-selected-timings.patch +++ /dev/null @@ -1,249 +0,0 @@ -From 1dc22174b9b28b9ea9af59183ffd5d86d19a2721 Mon Sep 17 00:00:00 2001 -From: Angel Pons <th3fanbus@gmail.com> -Date: Sat, 7 May 2022 16:29:55 +0200 -Subject: [PATCH 31/51] haswell NRI: Post-process selected timings - -Once the MPLL has been initialised, convert the timings from the SPD to -be in DCLKs, which is what the hardware expects. In addition, calculate -the values for tREFI and tXP. - -Change-Id: Id02caf858f75b9e08016762b3aefda282b274386 -Signed-off-by: Angel Pons <th3fanbus@gmail.com> ---- - .../intel/haswell/native_raminit/Makefile.mk | 1 + - .../haswell/native_raminit/lookup_timings.c | 62 +++++++++++ - .../haswell/native_raminit/raminit_main.c | 1 + - .../haswell/native_raminit/raminit_native.h | 8 ++ - .../haswell/native_raminit/spd_bitmunching.c | 100 ++++++++++++++++++ - 5 files changed, 172 insertions(+) - create mode 100644 src/northbridge/intel/haswell/native_raminit/lookup_timings.c - -diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -index c125d84f0b..2769e0bbb4 100644 ---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk -+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -@@ -1,5 +1,6 @@ - ## SPDX-License-Identifier: GPL-2.0-or-later - -+romstage-y += lookup_timings.c - romstage-y += init_mpll.c - romstage-y += io_comp_control.c - romstage-y += raminit_main.c -diff --git a/src/northbridge/intel/haswell/native_raminit/lookup_timings.c b/src/northbridge/intel/haswell/native_raminit/lookup_timings.c -new file mode 100644 -index 0000000000..8b81c7c341 ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/lookup_timings.c -@@ -0,0 +1,62 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <commonlib/bsd/clamp.h> -+#include <types.h> -+ -+#include "raminit_native.h" -+ -+struct timing_lookup { -+ uint32_t clock; -+ uint32_t value; -+}; -+ -+static uint32_t lookup_timing( -+ const uint32_t mem_clock_mhz, -+ const struct timing_lookup *const lookup, -+ const size_t length) -+{ -+ /* Fall back to the last index */ -+ size_t i; -+ for (i = 0; i < length - 1; i++) { -+ /* Account for imprecise frequency values */ -+ if ((mem_clock_mhz - 5) <= lookup[i].clock) -+ break; -+ } -+ return lookup[i].value; -+} -+ -+static const uint32_t fmax = UINT32_MAX; -+ -+uint8_t get_tCWL(const uint32_t mem_clock_mhz) -+{ -+ const struct timing_lookup lut[] = { -+ { 400, 5 }, -+ { 533, 6 }, -+ { 666, 7 }, -+ { 800, 8 }, -+ { 933, 9 }, -+ { 1066, 10 }, -+ { 1200, 11 }, -+ { fmax, 12 }, -+ }; -+ return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut)); -+} -+ -+/* tREFI = 7800 ns * DDR MHz */ -+uint32_t get_tREFI(const uint32_t mem_clock_mhz) -+{ -+ return (mem_clock_mhz * 7800) / 1000; -+} -+ -+uint32_t get_tXP(const uint32_t mem_clock_mhz) -+{ -+ const struct timing_lookup lut[] = { -+ { 400, 3 }, -+ { 666, 4 }, -+ { 800, 5 }, -+ { 933, 6 }, -+ { 1066, 7 }, -+ { fmax, 8 }, -+ }; -+ return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut)); -+} -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -index bf745e943f..2fea658415 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -@@ -21,6 +21,7 @@ struct task_entry { - static const struct task_entry cold_boot[] = { - { collect_spd_info, true, "PROCSPD", }, - { initialise_mpll, true, "INITMPLL", }, -+ { convert_timings, true, "CONVTIM", }, - }; - - /* Return a generic stepping value to make stepping checks simpler */ -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -index 15a1550424..e0ebd3a2a7 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -@@ -79,6 +79,9 @@ struct sysinfo { - uint32_t tCWL; - uint32_t tCMD; - -+ uint32_t tREFI; -+ uint32_t tXP; -+ - uint8_t lanes; /* 8 or 9 */ - uint8_t chanmap; - uint8_t dpc[NUM_CHANNELS]; /* DIMMs per channel */ -@@ -97,7 +100,12 @@ void raminit_main(enum raminit_boot_mode bootmode); - - enum raminit_status collect_spd_info(struct sysinfo *ctrl); - enum raminit_status initialise_mpll(struct sysinfo *ctrl); -+enum raminit_status convert_timings(struct sysinfo *ctrl); - - enum raminit_status wait_for_first_rcomp(void); - -+uint8_t get_tCWL(uint32_t mem_clock_mhz); -+uint32_t get_tREFI(uint32_t mem_clock_mhz); -+uint32_t get_tXP(uint32_t mem_clock_mhz); -+ - #endif -diff --git a/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c b/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c -index eff993800b..4f7fe46494 100644 ---- a/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c -+++ b/src/northbridge/intel/haswell/native_raminit/spd_bitmunching.c -@@ -204,3 +204,103 @@ enum raminit_status collect_spd_info(struct sysinfo *ctrl) - get_spd_data(ctrl); - return find_common_spd_parameters(ctrl); - } -+ -+#define MIN_CWL 5 -+#define MAX_CWL 12 -+ -+/* Except for tCK, hardware expects all timing values in DCLKs, not nanoseconds */ -+enum raminit_status convert_timings(struct sysinfo *ctrl) -+{ -+ /* -+ * Obtain all required timing values, in DCLKs. -+ */ -+ -+ /* Convert primary timings from nanoseconds to DCLKs */ -+ ctrl->tAA = DIV_ROUND_UP(ctrl->tAA, ctrl->tCK); -+ ctrl->tWR = DIV_ROUND_UP(ctrl->tWR, ctrl->tCK); -+ ctrl->tRCD = DIV_ROUND_UP(ctrl->tRCD, ctrl->tCK); -+ ctrl->tRRD = DIV_ROUND_UP(ctrl->tRRD, ctrl->tCK); -+ ctrl->tRP = DIV_ROUND_UP(ctrl->tRP, ctrl->tCK); -+ ctrl->tRAS = DIV_ROUND_UP(ctrl->tRAS, ctrl->tCK); -+ ctrl->tRC = DIV_ROUND_UP(ctrl->tRC, ctrl->tCK); -+ ctrl->tRFC = DIV_ROUND_UP(ctrl->tRFC, ctrl->tCK); -+ ctrl->tWTR = DIV_ROUND_UP(ctrl->tWTR, ctrl->tCK); -+ ctrl->tRTP = DIV_ROUND_UP(ctrl->tRTP, ctrl->tCK); -+ ctrl->tFAW = DIV_ROUND_UP(ctrl->tFAW, ctrl->tCK); -+ ctrl->tCWL = DIV_ROUND_UP(ctrl->tCWL, ctrl->tCK); -+ ctrl->tCMD = DIV_ROUND_UP(ctrl->tCMD, ctrl->tCK); -+ -+ /* Constrain primary timings to hardware limits */ -+ /** TODO: complain when clamping? **/ -+ ctrl->tAA = clamp_u32(4, ctrl->tAA, 24); -+ ctrl->tWR = clamp_u32(5, ctrl->tWR, 16); -+ ctrl->tRCD = clamp_u32(4, ctrl->tRCD, 20); -+ ctrl->tRRD = clamp_u32(4, ctrl->tRRD, 65535); -+ ctrl->tRP = clamp_u32(4, ctrl->tRP, 15); -+ ctrl->tRAS = clamp_u32(10, ctrl->tRAS, 40); -+ ctrl->tRC = clamp_u32(1, ctrl->tRC, 4095); -+ ctrl->tRFC = clamp_u32(1, ctrl->tRFC, 511); -+ ctrl->tWTR = clamp_u32(4, ctrl->tWTR, 10); -+ ctrl->tRTP = clamp_u32(4, ctrl->tRTP, 15); -+ ctrl->tFAW = clamp_u32(10, ctrl->tFAW, 54); -+ -+ /** TODO: Honor tREFI from XMP **/ -+ ctrl->tREFI = get_tREFI(ctrl->mem_clock_mhz); -+ ctrl->tXP = get_tXP(ctrl->mem_clock_mhz); -+ -+ /* -+ * Check some values, and adjust them if necessary. -+ */ -+ -+ /* If tWR cannot be written into DDR3 MR0, adjust it */ -+ switch (ctrl->tWR) { -+ case 9: -+ case 11: -+ case 13: -+ case 15: -+ ctrl->tWR++; -+ } -+ -+ /* If tCWL is not supported or unspecified, look up a reasonable default */ -+ if (ctrl->tCWL < MIN_CWL || ctrl->tCWL > MAX_CWL) -+ ctrl->tCWL = get_tCWL(ctrl->mem_clock_mhz); -+ -+ /* This is needed to support ODT properly on 2DPC */ -+ if (ctrl->tAA - ctrl->tCWL > 4) -+ ctrl->tCWL = ctrl->tAA - 4; -+ -+ /* If tCMD is invalid, use a guesstimate default */ -+ if (!ctrl->tCMD) { -+ ctrl->tCMD = MAX(ctrl->dpc[0], ctrl->dpc[1]); -+ printk(RAM_DEBUG, "tCMD was zero, picking a guesstimate value\n"); -+ } -+ ctrl->tCMD = clamp_u32(1, ctrl->tCMD, 3); -+ -+ /* -+ * Print final timings. -+ */ -+ -+ /* tCK is special */ -+ printk(BIOS_DEBUG, "Selected tCK : %u ps\n", ctrl->tCK * 1000 / 256); -+ -+ /* Primary timings */ -+ printk(BIOS_DEBUG, "Selected tAA : %uT\n", ctrl->tAA); -+ printk(BIOS_DEBUG, "Selected tWR : %uT\n", ctrl->tWR); -+ printk(BIOS_DEBUG, "Selected tRCD : %uT\n", ctrl->tRCD); -+ printk(BIOS_DEBUG, "Selected tRRD : %uT\n", ctrl->tRRD); -+ printk(BIOS_DEBUG, "Selected tRP : %uT\n", ctrl->tRP); -+ printk(BIOS_DEBUG, "Selected tRAS : %uT\n", ctrl->tRAS); -+ printk(BIOS_DEBUG, "Selected tRC : %uT\n", ctrl->tRC); -+ printk(BIOS_DEBUG, "Selected tRFC : %uT\n", ctrl->tRFC); -+ printk(BIOS_DEBUG, "Selected tWTR : %uT\n", ctrl->tWTR); -+ printk(BIOS_DEBUG, "Selected tRTP : %uT\n", ctrl->tRTP); -+ printk(BIOS_DEBUG, "Selected tFAW : %uT\n", ctrl->tFAW); -+ printk(BIOS_DEBUG, "Selected tCWL : %uT\n", ctrl->tCWL); -+ printk(BIOS_DEBUG, "Selected tCMD : %uT\n", ctrl->tCMD); -+ -+ /* Derived timings */ -+ printk(BIOS_DEBUG, "Selected tREFI : %uT\n", ctrl->tREFI); -+ printk(BIOS_DEBUG, "Selected tXP : %uT\n", ctrl->tXP); -+ -+ return RAMINIT_STATUS_SUCCESS; -+} --- -2.39.5 - diff --git a/config/coreboot/next/patches/0013-src-intel-skylake-Disable-stack-overflow-debug-optio.patch b/config/coreboot/default/patches/0031-src-intel-skylake-Disable-stack-overflow-debug-optio.patch index 84370089..916e54dc 100644 --- a/config/coreboot/next/patches/0013-src-intel-skylake-Disable-stack-overflow-debug-optio.patch +++ b/config/coreboot/default/patches/0031-src-intel-skylake-Disable-stack-overflow-debug-optio.patch @@ -1,7 +1,7 @@ -From 00b6459a9b360b16529036d9b1e10c977228a7ff Mon Sep 17 00:00:00 2001 +From 7194444fbddcf6567d0c82f0986e5deeacaea680 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Mon, 6 Jan 2025 01:36:23 +0000 -Subject: [PATCH 1/1] src/intel/skylake: Disable stack overflow debug options +Subject: [PATCH 31/40] src/intel/skylake: Disable stack overflow debug options The option was appearing in T480/3050micro configs of lbmk, after updating on the coreboot/next uprev for 20241206 rev8: @@ -37,10 +37,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org> 1 file changed, 9 insertions(+) diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig -index 8e25f796ed..7d324e15ea 100644 +index 9191ed0ff8..493a2d835a 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig -@@ -130,6 +130,15 @@ config DCACHE_RAM_SIZE +@@ -129,6 +129,15 @@ config DCACHE_RAM_SIZE The size of the cache-as-ram region required during bootblock and/or romstage. @@ -57,5 +57,5 @@ index 8e25f796ed..7d324e15ea 100644 hex default 0x20400 if FSP_USES_CB_STACK -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0032-haswell-NRI-Configure-initial-MC-settings.patch b/config/coreboot/default/patches/0032-haswell-NRI-Configure-initial-MC-settings.patch deleted file mode 100644 index e16f4e3d..00000000 --- a/config/coreboot/default/patches/0032-haswell-NRI-Configure-initial-MC-settings.patch +++ /dev/null @@ -1,1594 +0,0 @@ -From a4f5deb78c2d4132bf857c57ffd53684f942ba62 Mon Sep 17 00:00:00 2001 -From: Angel Pons <th3fanbus@gmail.com> -Date: Sat, 7 May 2022 17:22:07 +0200 -Subject: [PATCH 32/51] haswell NRI: Configure initial MC settings - -Program initial memory controller settings. Many of these values will be -adjusted later during training. - -Change-Id: If33846b51cb1bab5d0458fe626e13afb1bdc900e -Signed-off-by: Angel Pons <th3fanbus@gmail.com> ---- - .../intel/haswell/native_raminit/Makefile.mk | 2 + - .../haswell/native_raminit/configure_mc.c | 822 ++++++++++++++++++ - .../haswell/native_raminit/raminit_main.c | 2 + - .../haswell/native_raminit/raminit_native.h | 101 +++ - .../haswell/native_raminit/reg_structs.h | 405 +++++++++ - .../haswell/native_raminit/timings_refresh.c | 13 + - .../intel/haswell/registers/mchbar.h | 94 ++ - 7 files changed, 1439 insertions(+) - create mode 100644 src/northbridge/intel/haswell/native_raminit/configure_mc.c - create mode 100644 src/northbridge/intel/haswell/native_raminit/reg_structs.h - create mode 100644 src/northbridge/intel/haswell/native_raminit/timings_refresh.c - -diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -index 2769e0bbb4..fc55277a65 100644 ---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk -+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -@@ -1,8 +1,10 @@ - ## SPDX-License-Identifier: GPL-2.0-or-later - -+romstage-y += configure_mc.c - romstage-y += lookup_timings.c - romstage-y += init_mpll.c - romstage-y += io_comp_control.c - romstage-y += raminit_main.c - romstage-y += raminit_native.c - romstage-y += spd_bitmunching.c -+romstage-y += timings_refresh.c -diff --git a/src/northbridge/intel/haswell/native_raminit/configure_mc.c b/src/northbridge/intel/haswell/native_raminit/configure_mc.c -new file mode 100644 -index 0000000000..88249725a7 ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/configure_mc.c -@@ -0,0 +1,822 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <assert.h> -+#include <commonlib/bsd/clamp.h> -+#include <console/console.h> -+#include <delay.h> -+#include <lib.h> -+#include <northbridge/intel/haswell/haswell.h> -+#include <string.h> -+#include <types.h> -+ -+#include "raminit_native.h" -+ -+static void program_misc_control(struct sysinfo *ctrl) -+{ -+ if (!is_hsw_ult()) -+ return; -+ -+ const union ddr_scram_misc_control_reg ddr_scram_misc_ctrl = { -+ .ddr_no_ch_interleave = !ctrl->dq_pins_interleaved, -+ .lpddr_mode = ctrl->lpddr, -+ .cke_mapping_ch0 = ctrl->lpddr ? ctrl->lpddr_cke_rank_map[0] : 0, -+ .cke_mapping_ch1 = ctrl->lpddr ? ctrl->lpddr_cke_rank_map[1] : 0, -+ }; -+ mchbar_write32(DDR_SCRAM_MISC_CONTROL, ddr_scram_misc_ctrl.raw); -+} -+ -+static void program_mrc_revision(void) -+{ -+ mchbar_write32(MRC_REVISION, 0x01090000); /* MRC 1.9.0 Build 0 */ -+} -+ -+static void program_ranks_used(struct sysinfo *ctrl) -+{ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ mchbar_write8(MC_INIT_STATE_ch(channel), ctrl->rankmap[channel]); -+ if (!does_ch_exist(ctrl, channel)) { -+ mchbar_write32(DDR_CLK_ch_RANKS_USED(channel), 0); -+ mchbar_write32(DDR_CTL_ch_CTL_RANKS_USED(channel), 0); -+ mchbar_write32(DDR_CKE_ch_CTL_RANKS_USED(channel), 0); -+ continue; -+ } -+ uint32_t clk_ranks_used = ctrl->rankmap[channel]; -+ if (ctrl->lpddr) { -+ /* With LPDDR, the clock usage goes by group instead */ -+ clk_ranks_used = 0; -+ for (uint8_t group = 0; group < NUM_GROUPS; group++) { -+ if (ctrl->dq_byte_map[channel][CT_ITERATION_CLOCK][group]) -+ clk_ranks_used |= BIT(group); -+ } -+ } -+ mchbar_write32(DDR_CLK_ch_RANKS_USED(channel), clk_ranks_used); -+ -+ uint32_t ctl_ranks_used = ctrl->rankmap[channel]; -+ if (is_hsw_ult()) { -+ /* Set ODT disable bits */ -+ /** TODO: May need to do this after JEDEC reset/init **/ -+ if (ctrl->lpddr && ctrl->lpddr_dram_odt) -+ ctl_ranks_used |= 2 << 4; /* ODT is used on rank 0 */ -+ else -+ ctl_ranks_used |= 3 << 4; -+ } -+ mchbar_write32(DDR_CTL_ch_CTL_RANKS_USED(channel), ctl_ranks_used); -+ -+ uint32_t cke_ranks_used = ctrl->rankmap[channel]; -+ if (ctrl->lpddr) { -+ /* Use CKE-to-rank mapping for LPDDR */ -+ const uint8_t cke_rank_map = ctrl->lpddr_cke_rank_map[channel]; -+ cke_ranks_used = 0; -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ /* ULT only has 2 ranks per channel */ -+ if (rank >= 2) -+ break; -+ -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ for (uint8_t cke = 0; cke < 4; cke++) { -+ if (rank == ((cke_rank_map >> cke) & 1)) -+ cke_ranks_used |= BIT(cke); -+ } -+ } -+ } -+ mchbar_write32(DDR_CKE_ch_CTL_RANKS_USED(channel), cke_ranks_used); -+ } -+} -+ -+static const uint8_t rxb_trad[2][5][4] = { -+ { /* Vdd low */ -+ /* 1067 MT/s, 1333 MT/s, 1600 MT/s, 1867 MT/s, 2133 MT/s, */ -+ {4, 3, 3, 2}, {4, 4, 3, 2}, {5, 4, 3, 3}, {5, 4, 4, 3}, {5, 4, 4, 3}, -+ }, -+ { /* Vdd hi */ -+ /* 1067 MT/s, 1333 MT/s, 1600 MT/s, 1867 MT/s, 2133 MT/s, */ -+ {4, 3, 3, 2}, {4, 4, 3, 2}, {5, 4, 3, 3}, {5, 4, 4, 3}, {4, 4, 3, 3}, -+ }, -+}; -+ -+static const uint8_t rxb_ultx[2][3][4] = { -+ { /* Vdd low */ -+ /* 1067 MT/s, 1333 MT/s, 1600 MT/s, */ -+ {5, 6, 6, 5}, {5, 6, 6, 5}, {4, 6, 6, 6}, -+ }, -+ { /* Vdd hi */ -+ /* 1067 MT/s, 1333 MT/s, 1600 MT/s, */ -+ {7, 6, 6, 5}, {7, 6, 6, 5}, {7, 6, 6, 6}, -+ }, -+}; -+ -+uint8_t get_rx_bias(const struct sysinfo *ctrl) -+{ -+ const bool is_ult = is_hsw_ult(); -+ const bool vddhi = ctrl->vdd_mv > 1350; -+ const uint8_t max_rxf = is_ult ? ARRAY_SIZE(rxb_ultx[0]) : ARRAY_SIZE(rxb_trad[0]); -+ const uint8_t ref_clk = ctrl->base_freq == 133 ? 4 : 6; -+ const uint8_t rx_f = clamp_s8(0, ctrl->multiplier - ref_clk, max_rxf - 1); -+ const uint8_t rx_cb = mchbar_read32(DDR_CLK_CB_STATUS) & 0x3; -+ if (is_ult) -+ return rxb_ultx[vddhi][rx_f][rx_cb]; -+ else -+ return rxb_trad[vddhi][rx_f][rx_cb]; -+} -+ -+static void program_ddr_data(struct sysinfo *ctrl, const bool dis_odt_static, const bool vddhi) -+{ -+ const bool is_ult = is_hsw_ult(); -+ -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ if (!does_rank_exist(ctrl, rank)) -+ continue; -+ -+ const union ddr_data_rx_train_rank_reg rx_train = { -+ .rcven = 64, -+ .dqs_p = 32, -+ .dqs_n = 32, -+ }; -+ mchbar_write32(DDR_DATA_RX_TRAIN_RANK(rank), rx_train.raw); -+ mchbar_write32(DDR_DATA_RX_PER_BIT_RANK(rank), 0x88888888); -+ -+ const union ddr_data_tx_train_rank_reg tx_train = { -+ .tx_eq = TXEQFULLDRV | 11, -+ .dq_delay = 96, -+ .dqs_delay = 64, -+ }; -+ mchbar_write32(DDR_DATA_TX_TRAIN_RANK(rank), tx_train.raw); -+ mchbar_write32(DDR_DATA_TX_PER_BIT_RANK(rank), 0x88888888); -+ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ ctrl->tx_dq[channel][rank][byte] = tx_train.dq_delay; -+ ctrl->txdqs[channel][rank][byte] = tx_train.dqs_delay; -+ ctrl->tx_eq[channel][rank][byte] = tx_train.tx_eq; -+ -+ ctrl->rcven[channel][rank][byte] = rx_train.rcven; -+ ctrl->rxdqsp[channel][rank][byte] = rx_train.dqs_p; -+ ctrl->rxdqsn[channel][rank][byte] = rx_train.dqs_n; -+ ctrl->rx_eq[channel][rank][byte] = rx_train.rx_eq; -+ } -+ } -+ } -+ mchbar_write32(DDR_DATA_TX_XTALK, 0); -+ mchbar_write32(DDR_DATA_RX_OFFSET_VDQ, 0x88888888); -+ mchbar_write32(DDR_DATA_OFFSET_TRAIN, 0); -+ mchbar_write32(DDR_DATA_OFFSET_COMP, 0); -+ -+ const union ddr_data_control_0_reg data_control_0 = { -+ .internal_clocks_on = !is_ult, -+ .data_vccddq_hi = vddhi, -+ .disable_odt_static = dis_odt_static, -+ .lpddr_mode = ctrl->lpddr, -+ .odt_samp_extend_en = ctrl->lpddr, -+ .early_rleak_en = ctrl->lpddr && ctrl->stepping >= STEPPING_C0, -+ }; -+ mchbar_write32(DDR_DATA_CONTROL_0, data_control_0.raw); -+ -+ const union ddr_data_control_1_reg data_control_1 = { -+ .dll_mask = 1, -+ .rx_bias_ctl = get_rx_bias(ctrl), -+ .odt_delay = -2, -+ .odt_duration = 7, -+ .sense_amp_delay = -2, -+ .sense_amp_duration = 7, -+ }; -+ mchbar_write32(DDR_DATA_CONTROL_1, data_control_1.raw); -+ -+ clear_data_offset_train_all(ctrl); -+ -+ /* Stagger byte turn-on to reduce dI/dT */ -+ const uint8_t byte_stagger[] = { 0, 4, 1, 5, 2, 6, 3, 7, 8 }; -+ const uint8_t latency = 2 * ctrl->tAA - 6; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ union ddr_data_control_2_reg data_control_2 = { -+ .raw = 0, -+ }; -+ if (is_ult) { -+ data_control_2.rx_dqs_amp_offset = 8; -+ data_control_2.rx_clk_stg_num = 0x1f; -+ data_control_2.leaker_comp = ctrl->lpddr ? 3 : 0; -+ } -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ const uint8_t stg = latency * byte_stagger[byte] / ctrl->lanes; -+ data_control_2.rx_stagger_ctl = stg & 0x1f; -+ mchbar_write32(DQ_CONTROL_2(channel, byte), data_control_2.raw); -+ ctrl->data_offset_comp[channel][byte] = 0; -+ ctrl->dq_control_1[channel][byte] = data_control_1.raw; -+ ctrl->dq_control_2[channel][byte] = data_control_2.raw; -+ } -+ ctrl->dq_control_0[channel] = data_control_0.raw; -+ } -+} -+ -+static void program_vsshi_control(struct sysinfo *ctrl, const uint16_t vsshi_mv) -+{ -+ const uint32_t vsshi_control_reg = is_hsw_ult() ? 0x366c : 0x306c; -+ const union ddr_comp_vsshi_control_reg ddr_vsshi_control = { -+ .vsshi_target = (vsshi_mv * 192) / ctrl->vdd_mv - 20, -+ .hi_bw_divider = 1, -+ .lo_bw_divider = 1, -+ .bw_error = 2, -+ .panic_driver_en = 1, -+ .panic_voltage = 24 / 8, /* Voltage in 8mV steps */ -+ .gain_boost = 1, -+ }; -+ mchbar_write32(vsshi_control_reg, ddr_vsshi_control.raw); -+ mchbar_write32(DDR_COMP_VSSHI_CONTROL, ddr_vsshi_control.raw); -+} -+ -+static void calc_vt_slope_code(const uint16_t slope, uint8_t *best_a, uint8_t *best_b) -+{ -+ const int16_t coding[] = {0, -125, -62, -31, 250, 125, 62, 31}; -+ *best_a = 0; -+ *best_b = 0; -+ int16_t best_err = slope; -+ for (uint8_t b = 0; b < ARRAY_SIZE(coding); b++) { -+ for (uint8_t a = b; a < ARRAY_SIZE(coding); a++) { -+ int16_t error = slope - (coding[a] + coding[b]); -+ if (error < 0) -+ error = -error; -+ -+ if (error < best_err) { -+ best_err = error; -+ *best_a = a; -+ *best_b = b; -+ } -+ } -+ } -+} -+ -+static void program_dimm_vref(struct sysinfo *ctrl, const uint16_t vccio_mv, const bool vddhi) -+{ -+ const bool is_ult = is_hsw_ult(); -+ -+ /* Static values for ULT */ -+ uint8_t vt_slope_a = 4; -+ uint8_t vt_slope_b = 0; -+ if (!is_ult) { -+ /* On non-ULT, compute best slope code */ -+ const uint16_t vt_slope = 1500 * vccio_mv / ctrl->vdd_mv - 1000; -+ calc_vt_slope_code(vt_slope, &vt_slope_a, &vt_slope_b); -+ } -+ const union ddr_data_vref_control_reg ddr_vref_control = { -+ .hi_bw_divider = is_ult ? 0 : 3, -+ .lo_bw_divider = 3, -+ .sample_divider = is_ult ? 1 : 3, -+ .slow_bw_error = 1, -+ .hi_bw_enable = 1, -+ .vt_slope_b = vt_slope_b, -+ .vt_slope_a = vt_slope_a, -+ .vt_offset = 0, -+ }; -+ mchbar_write32(is_ult ? 0xf68 : 0xf6c, ddr_vref_control.raw); /* Use CH1 byte 7 */ -+ -+ const union ddr_data_vref_adjust_reg ddr_vref_adjust = { -+ .en_dimm_vref_ca = 1, -+ .en_dimm_vref_ch0 = 1, -+ .en_dimm_vref_ch1 = 1, -+ .vccddq_hi_qnnn_h = vddhi, -+ .hi_z_timer_ctrl = 3, -+ }; -+ ctrl->dimm_vref = ddr_vref_adjust; -+ mchbar_write32(DDR_DATA_VREF_ADJUST, ddr_vref_adjust.raw); -+} -+ -+static uint32_t pi_code(const uint32_t code) -+{ -+ return code << 21 | code << 14 | code << 7 | code << 0; -+} -+ -+static void program_ddr_ca(struct sysinfo *ctrl, const bool vddhi) -+{ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ const union ddr_clk_controls_reg ddr_clk_controls = { -+ .dll_mask = 1, -+ .vccddq_hi = vddhi, -+ .lpddr_mode = ctrl->lpddr, -+ }; -+ mchbar_write32(DDR_CLK_ch_CONTROLS(channel), ddr_clk_controls.raw); -+ -+ const union ddr_cmd_controls_reg ddr_cmd_controls = { -+ .dll_mask = 1, -+ .vccddq_hi = vddhi, -+ .lpddr_mode = ctrl->lpddr, -+ .early_weak_drive = 3, -+ .cmd_tx_eq = 1, -+ }; -+ mchbar_write32(DDR_CMD_ch_CONTROLS(channel), ddr_cmd_controls.raw); -+ -+ const union ddr_cke_ctl_controls_reg ddr_cke_controls = { -+ .dll_mask = 1, -+ .vccddq_hi = vddhi, -+ .lpddr_mode = ctrl->lpddr, -+ .early_weak_drive = 3, -+ .cmd_tx_eq = 1, -+ .ctl_tx_eq = 1, -+ .ctl_sr_drv = 2, -+ }; -+ mchbar_write32(DDR_CKE_ch_CTL_CONTROLS(channel), ddr_cke_controls.raw); -+ -+ const union ddr_cke_ctl_controls_reg ddr_ctl_controls = { -+ .dll_mask = 1, -+ .vccddq_hi = vddhi, -+ .lpddr_mode = ctrl->lpddr, -+ .ctl_tx_eq = 1, -+ .ctl_sr_drv = 2, -+ .la_drv_en_ovrd = 1, /* Must be set on ULT */ -+ }; -+ mchbar_write32(DDR_CTL_ch_CTL_CONTROLS(channel), ddr_ctl_controls.raw); -+ -+ const uint8_t cmd_pi = ctrl->lpddr ? 96 : 64; -+ mchbar_write32(DDR_CMD_ch_PI_CODING(channel), pi_code(cmd_pi)); -+ mchbar_write32(DDR_CKE_ch_CMD_PI_CODING(channel), pi_code(cmd_pi)); -+ mchbar_write32(DDR_CKE_CTL_ch_CTL_PI_CODING(channel), pi_code(64)); -+ mchbar_write32(DDR_CLK_ch_PI_CODING(channel), pi_code(64)); -+ -+ mchbar_write32(DDR_CMD_ch_COMP_OFFSET(channel), 0); -+ mchbar_write32(DDR_CLK_ch_COMP_OFFSET(channel), 0); -+ mchbar_write32(DDR_CKE_CTL_ch_CTL_COMP_OFFSET(channel), 0); -+ -+ for (uint8_t group = 0; group < NUM_GROUPS; group++) { -+ ctrl->cke_cmd_pi_code[channel][group] = cmd_pi; -+ ctrl->cmd_north_pi_code[channel][group] = cmd_pi; -+ ctrl->cmd_south_pi_code[channel][group] = cmd_pi; -+ } -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ ctrl->clk_pi_code[channel][rank] = 64; -+ ctrl->ctl_pi_code[channel][rank] = 64; -+ } -+ } -+} -+ -+enum { -+ RCOMP_RD_ODT = 0, -+ RCOMP_WR_DS_DQ, -+ RCOMP_WR_DS_CMD, -+ RCOMP_WR_DS_CTL, -+ RCOMP_WR_DS_CLK, -+ RCOMP_MAX_CODES, -+}; -+ -+struct rcomp_info { -+ uint8_t resistor; -+ uint8_t sz_steps; -+ uint8_t target_r; -+ int8_t result; -+}; -+ -+static void program_rcomp_vref(struct sysinfo *ctrl, const bool dis_odt_static) -+{ -+ const bool is_ult = is_hsw_ult(); -+ /* -+ * +-------------------------------+ -+ * | Rcomp resistor values in ohms | -+ * +-----------+------+------+-----+ -+ * | Ball name | Trad | ULTX | Use | -+ * +-----------+------+------+-----+ -+ * | SM_RCOMP0 | 100 | 200 | CMD | -+ * | SM_RCOMP1 | 75 | 120 | DQ | -+ * | SM_RCOMP2 | 100 | 100 | ODT | -+ * +-----------+------+------+-----+ -+ */ -+ struct rcomp_info rcomp_cfg[RCOMP_MAX_CODES] = { -+ [RCOMP_RD_ODT] = { -+ .resistor = 50, -+ .sz_steps = 96, -+ .target_r = 50, -+ }, -+ [RCOMP_WR_DS_DQ] = { -+ .resistor = 25, -+ .sz_steps = 64, -+ .target_r = 33, -+ }, -+ [RCOMP_WR_DS_CMD] = { -+ .resistor = 20, -+ .sz_steps = 64, -+ .target_r = 20, -+ }, -+ [RCOMP_WR_DS_CTL] = { -+ .resistor = 20, -+ .sz_steps = 64, -+ .target_r = 20, -+ }, -+ [RCOMP_WR_DS_CLK] = { -+ .resistor = 25, -+ .sz_steps = 64, -+ .target_r = 29, -+ }, -+ }; -+ if (is_ult) { -+ rcomp_cfg[RCOMP_WR_DS_DQ].resistor = 40; -+ rcomp_cfg[RCOMP_WR_DS_DQ].target_r = 40; -+ rcomp_cfg[RCOMP_WR_DS_CLK].resistor = 40; -+ } else if (ctrl->dpc[0] == 2 || ctrl->dpc[1] == 2) { -+ rcomp_cfg[RCOMP_RD_ODT].target_r = 60; -+ } -+ for (uint8_t i = 0; i < RCOMP_MAX_CODES; i++) { -+ struct rcomp_info *const r = &rcomp_cfg[i]; -+ const int32_t div = 2 * (r->resistor + r->target_r); -+ assert(div); -+ const int32_t vref = (r->sz_steps * (r->resistor - r->target_r)) / div; -+ -+ /* DqOdt is 5 bits wide, the other Rcomp targets are 4 bits wide */ -+ const int8_t comp_limit = i == RCOMP_RD_ODT ? 16 : 8; -+ r->result = clamp_s32(-comp_limit, vref, comp_limit - 1); -+ } -+ const union ddr_comp_ctl_0_reg ddr_comp_ctl_0 = { -+ .disable_odt_static = dis_odt_static, -+ .dq_drv_vref = rcomp_cfg[RCOMP_WR_DS_DQ].result, -+ .dq_odt_vref = rcomp_cfg[RCOMP_RD_ODT].result, -+ .cmd_drv_vref = rcomp_cfg[RCOMP_WR_DS_CMD].result, -+ .ctl_drv_vref = rcomp_cfg[RCOMP_WR_DS_CTL].result, -+ .clk_drv_vref = rcomp_cfg[RCOMP_WR_DS_CLK].result, -+ }; -+ ctrl->comp_ctl_0 = ddr_comp_ctl_0; -+ mchbar_write32(DDR_COMP_CTL_0, ctrl->comp_ctl_0.raw); -+} -+ -+enum { -+ SCOMP_DQ = 0, -+ SCOMP_CMD, -+ SCOMP_CTL, -+ SCOMP_CLK, -+ SCOMP_MAX_CODES, -+}; -+ -+static void program_slew_rates(struct sysinfo *ctrl, const bool vddhi) -+{ -+ const uint8_t min_cycle_delay[SCOMP_MAX_CODES] = { 46, 70, 70, 46 }; -+ uint8_t buffer_stage_delay_ps[SCOMP_MAX_CODES] = { 59, 53, 53, 53 }; -+ uint16_t comp_slew_rate_codes[SCOMP_MAX_CODES]; -+ -+ /* CMD Slew Rate = 1.8 for 2N */ -+ if (ctrl->tCMD == 2) -+ buffer_stage_delay_ps[SCOMP_CMD] = 89; -+ -+ /* CMD Slew Rate = 4 V/ns for double-pumped CMD bus */ -+ if (ctrl->lpddr) -+ buffer_stage_delay_ps[SCOMP_CMD] = 63; -+ -+ for (uint8_t i = 0; i < SCOMP_MAX_CODES; i++) { -+ uint16_t stages = DIV_ROUND_CLOSEST(ctrl->qclkps, buffer_stage_delay_ps[i]); -+ if (stages < 5) -+ stages = 5; -+ -+ bool dll_pc = buffer_stage_delay_ps[i] < min_cycle_delay[i] || stages > 16; -+ -+ /* Lock DLL... */ -+ if (dll_pc) -+ comp_slew_rate_codes[i] = stages / 2 - 1; /* to a phase */ -+ else -+ comp_slew_rate_codes[i] = (stages - 1) | BIT(4); /* to a cycle */ -+ } -+ union ddr_comp_ctl_1_reg ddr_comp_ctl_1 = { -+ .dq_scomp = comp_slew_rate_codes[SCOMP_DQ], -+ .cmd_scomp = comp_slew_rate_codes[SCOMP_CMD], -+ .ctl_scomp = comp_slew_rate_codes[SCOMP_CTL], -+ .clk_scomp = comp_slew_rate_codes[SCOMP_CLK], -+ .vccddq_hi = vddhi, -+ }; -+ ctrl->comp_ctl_1 = ddr_comp_ctl_1; -+ mchbar_write32(DDR_COMP_CTL_1, ctrl->comp_ctl_1.raw); -+} -+ -+static uint32_t ln_x100(const uint32_t input_x100) -+{ -+ uint32_t val = input_x100; -+ uint32_t ret = 0; -+ while (val > 271) { -+ val = (val * 1000) / 2718; -+ ret += 100; -+ } -+ return ret + (-16 * val * val + 11578 * val - 978860) / 10000; -+} -+ -+static uint32_t compute_vsshi_vref(struct sysinfo *ctrl, const uint32_t vsshi_tgt, bool up) -+{ -+ const uint32_t delta = 15; -+ const uint32_t c_die_vsshi = 2000; -+ const uint32_t r_cmd_ref = 100 * 10; -+ const uint32_t offset = up ? 64 : 0; -+ const uint32_t ln_vsshi = ln_x100((100 * vsshi_tgt) / (vsshi_tgt - delta)); -+ const uint32_t r_target = (ctrl->qclkps * 2000) / (c_die_vsshi * ln_vsshi); -+ const uint32_t r_dividend = 128 * (up ? r_cmd_ref : r_target); -+ return r_dividend / (r_cmd_ref + r_target) - offset; -+} -+ -+static void program_vsshi(struct sysinfo *ctrl, const uint16_t vccio_mv, const uint16_t vsshi) -+{ -+ const uint16_t vsshi_down = vsshi + 24; /* Panic threshold of 24 mV */ -+ const uint16_t vsshi_up = vccio_mv - vsshi_down; -+ const union ddr_comp_vsshi_reg ddr_comp_vsshi = { -+ .panic_drv_down_vref = compute_vsshi_vref(ctrl, vsshi_down, false), -+ .panic_drv_up_vref = compute_vsshi_vref(ctrl, vsshi_up, true), -+ .vt_offset = 128 * 450 / vccio_mv / 2, -+ .vt_slope_a = 4, -+ }; -+ mchbar_write32(DDR_COMP_VSSHI, ddr_comp_vsshi.raw); -+} -+ -+static void program_misc(struct sysinfo *ctrl) -+{ -+ ctrl->misc_control_0.raw = mchbar_read32(DDR_SCRAM_MISC_CONTROL); -+ ctrl->misc_control_0.weaklock_latency = 12; -+ ctrl->misc_control_0.wl_sleep_cycles = 5; -+ ctrl->misc_control_0.wl_wake_cycles = 2; -+ mchbar_write32(DDR_SCRAM_MISC_CONTROL, ctrl->misc_control_0.raw); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ /* Keep scrambling disabled for training */ -+ mchbar_write32(DDR_SCRAMBLE_ch(channel), 0); -+ } -+} -+ -+/* Very weird, application-specific function */ -+static void override_comp(uint32_t value, uint32_t width, uint32_t shift, uint32_t offset) -+{ -+ const uint32_t mask = (1 << width) - 1; -+ uint32_t reg32 = mchbar_read32(offset); -+ reg32 &= ~(mask << shift); -+ reg32 |= (value << shift); -+ mchbar_write32(offset, reg32); -+} -+ -+static void program_ls_comp(struct sysinfo *ctrl) -+{ -+ /* Disable periodic COMP */ -+ const union pcu_comp_reg m_comp = { -+ .comp_disable = 1, -+ .comp_interval = COMP_INT, -+ .comp_force = 1, -+ }; -+ mchbar_write32(M_COMP, m_comp.raw); -+ udelay(10); -+ -+ /* Override level shifter compensation */ -+ const uint32_t ls_comp = 2; -+ override_comp(ls_comp, 3, 28, DDR_DATA_RCOMP_DATA_1); -+ override_comp(ls_comp, 3, 24, DDR_CMD_COMP); -+ override_comp(ls_comp, 3, 24, DDR_CKE_CTL_COMP); -+ override_comp(ls_comp, 3, 23, DDR_CLK_COMP); -+ override_comp(ls_comp, 3, 28, DDR_COMP_DATA_COMP_1); -+ override_comp(ls_comp, 3, 24, DDR_COMP_CMD_COMP); -+ override_comp(ls_comp, 4, 24, DDR_COMP_CTL_COMP); -+ override_comp(ls_comp, 4, 23, DDR_COMP_CLK_COMP); -+ override_comp(ls_comp, 3, 24, DDR_COMP_OVERRIDE); -+ -+ /* Manually update the COMP values */ -+ union ddr_scram_misc_control_reg ddr_scram_misc_ctrl = ctrl->misc_control_0; -+ ddr_scram_misc_ctrl.force_comp_update = 1; -+ mchbar_write32(DDR_SCRAM_MISC_CONTROL, ddr_scram_misc_ctrl.raw); -+ -+ /* Use a fixed offset between ODT Up/Dn */ -+ const union ddr_comp_data_comp_1_reg data_comp_1 = { -+ .raw = mchbar_read32(DDR_COMP_DATA_COMP_1), -+ }; -+ const uint32_t odt_offset = data_comp_1.rcomp_odt_down - data_comp_1.rcomp_odt_up; -+ ctrl->comp_ctl_0.odt_up_down_off = odt_offset; -+ ctrl->comp_ctl_0.fixed_odt_offset = 1; -+ mchbar_write32(DDR_COMP_CTL_0, ctrl->comp_ctl_0.raw); -+} -+ -+/** TODO: Deduplicate PCODE stuff, it's already implemented in CPU code **/ -+static bool pcode_ready(void) -+{ -+ const unsigned int delay_step = 10; -+ for (unsigned int i = 0; i < 1000; i += delay_step) { -+ if (!(mchbar_read32(BIOS_MAILBOX_INTERFACE) & MAILBOX_RUN_BUSY)) -+ return true; -+ -+ udelay(delay_step); -+ }; -+ return false; -+} -+ -+static uint32_t pcode_mailbox_read(const uint32_t command) -+{ -+ if (!pcode_ready()) { -+ printk(BIOS_ERR, "PCODE: mailbox timeout on wait ready\n"); -+ return 0; -+ } -+ mchbar_write32(BIOS_MAILBOX_INTERFACE, command | MAILBOX_RUN_BUSY); -+ if (!pcode_ready()) { -+ printk(BIOS_ERR, "PCODE: mailbox timeout on completion\n"); -+ return 0; -+ } -+ return mchbar_read32(BIOS_MAILBOX_DATA); -+} -+ -+static int pcode_mailbox_write(const uint32_t command, const uint32_t data) -+{ -+ if (!pcode_ready()) { -+ printk(BIOS_ERR, "PCODE: mailbox timeout on wait ready\n"); -+ return -1; -+ } -+ mchbar_write32(BIOS_MAILBOX_DATA, data); -+ mchbar_write32(BIOS_MAILBOX_INTERFACE, command | MAILBOX_RUN_BUSY); -+ if (!pcode_ready()) { -+ printk(BIOS_ERR, "PCODE: mailbox timeout on completion\n"); -+ return -1; -+ } -+ return 0; -+} -+ -+static void enable_2x_refresh(struct sysinfo *ctrl) -+{ -+ if (!CONFIG(ENABLE_DDR_2X_REFRESH)) -+ return; -+ -+ printk(BIOS_DEBUG, "Enabling 2x Refresh\n"); -+ const bool asr = ctrl->flags.asr; -+ const bool lpddr = ctrl->lpddr; -+ -+ /* Mutually exclusive */ -+ assert(!asr || !lpddr); -+ if (!asr) { -+ uint32_t reg32 = pcode_mailbox_read(MAILBOX_BIOS_CMD_READ_DDR_2X_REFRESH); -+ if (!(reg32 & BIT(31))) { /** TODO: What to do if this is locked? **/ -+ reg32 |= BIT(0); /* Enable 2x refresh */ -+ reg32 |= BIT(31); /* Lock */ -+ -+ if (lpddr) -+ reg32 |= 4 << 1; /* LPDDR MR4 1/2 tREFI */ -+ -+ if (pcode_mailbox_write(MAILBOX_BIOS_CMD_WRITE_DDR_2X_REFRESH, reg32)) -+ printk(BIOS_ERR, "Could not enable Mailbox 2x Refresh\n"); -+ } -+ if (!lpddr) -+ return; -+ } -+ assert(asr || lpddr); -+ uint16_t refi_reduction = 50; -+ if (lpddr) { -+ refi_reduction = 97; -+ mchbar_clrbits32(PCU_DDR_PTM_CTL, 1 << 7); /* DISABLE_DRAM_TS */ -+ } -+ /** TODO: Remember why this is only done on cold boots **/ -+ if (ctrl->bootmode == BOOTMODE_COLD) { -+ ctrl->tREFI *= refi_reduction; -+ ctrl->tREFI /= 100; -+ } -+} -+ -+static void set_pcu_ddr_voltage(const uint16_t vdd_mv) -+{ -+ /** TODO: Handle other voltages? **/ -+ uint32_t pcu_ddr_voltage; -+ switch (vdd_mv) { -+ case 1200: -+ pcu_ddr_voltage = 3; -+ break; -+ case 1350: -+ pcu_ddr_voltage = 1; -+ break; -+ default: -+ case 1500: -+ pcu_ddr_voltage = 0; -+ break; -+ } -+ /* Set bits 0..2 */ -+ mchbar_write32(PCU_DDR_VOLTAGE, pcu_ddr_voltage); -+} -+ -+static void program_scheduler(struct sysinfo *ctrl) -+{ -+ /* -+ * ZQ calibration needs to be serialized for LPDDR3. Otherwise, -+ * the processor issues LPDDR3 ZQ calibration in parallel when -+ * exiting Package C7 or deeper. This causes problems for dual -+ * and quad die packages since all ranks share the same ZQ pin. -+ * -+ * Erratum HSM94: LPDDR3 ZQ Calibration Following Deep Package -+ * C-state Exit May Lead to Unpredictable System Behavior -+ */ -+ const union mcscheds_cbit_reg mcscheds_cbit = { -+ .dis_write_gap = 1, -+ .dis_odt = is_hsw_ult() && !(ctrl->lpddr && ctrl->lpddr_dram_odt), -+ .serialize_zq = ctrl->lpddr, -+ }; -+ mchbar_write32(MCSCHEDS_CBIT, mcscheds_cbit.raw); -+ mchbar_write32(MCMNTS_SC_WDBWM, 0x553c3038); -+ if (ctrl->lpddr) { -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ union mcmain_command_rate_limit_reg cmd_rate_limit = { -+ .raw = mchbar_read32(COMMAND_RATE_LIMIT_ch(channel)), -+ }; -+ cmd_rate_limit.enable_cmd_limit = 1; -+ cmd_rate_limit.cmd_rate_limit = 3; -+ mchbar_write32(COMMAND_RATE_LIMIT_ch(channel), cmd_rate_limit.raw); -+ } -+ } -+} -+ -+static uint8_t biggest_channel(const struct sysinfo *const ctrl) -+{ -+ _Static_assert(NUM_CHANNELS == 2, "Code assumes exactly two channels"); -+ return !!(ctrl->channel_size_mb[0] < ctrl->channel_size_mb[1]); -+} -+ -+static void dram_zones(struct sysinfo *ctrl) -+{ -+ /** TODO: Activate channel hash here, if enabled **/ -+ const uint8_t biggest = biggest_channel(ctrl); -+ const uint8_t smaller = !biggest; -+ -+ /** TODO: Use stacked mode if Memory Trace is enabled **/ -+ const union mad_chnl_reg mad_channel = { -+ .ch_a = biggest, -+ .ch_b = smaller, -+ .ch_c = 2, -+ .lpddr_mode = ctrl->lpddr, -+ }; -+ mchbar_write32(MAD_CHNL, mad_channel.raw); -+ -+ const uint8_t channel_b_zone_size = ctrl->channel_size_mb[smaller] / 256; -+ const union mad_zr_reg mad_zr = { -+ .ch_b_double = channel_b_zone_size * 2, -+ .ch_b_single = channel_b_zone_size, -+ }; -+ mchbar_write32(MAD_ZR, mad_zr.raw); -+} -+ -+static uint8_t biggest_dimm(const struct raminit_dimm_info *dimms) -+{ -+ _Static_assert(NUM_SLOTS <= 2, "Code assumes at most two DIMMs per channel."); -+ if (NUM_SLOTS == 1) -+ return 0; -+ -+ return !!(dimms[0].data.size_mb < dimms[1].data.size_mb); -+} -+ -+static void dram_dimm_mapping(struct sysinfo *ctrl) -+{ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) { -+ const union mad_dimm_reg mad_dimm = { -+ .rank_interleave = 1, -+ .enh_interleave = 1, -+ }; -+ mchbar_write32(MAD_DIMM(channel), mad_dimm.raw); -+ continue; -+ } -+ const uint8_t biggest = biggest_dimm(ctrl->dimms[channel]); -+ const uint8_t smaller = !biggest; -+ const struct dimm_attr_ddr3_st *dimm_a = &ctrl->dimms[channel][biggest].data; -+ const struct dimm_attr_ddr3_st *dimm_b = &ctrl->dimms[channel][smaller].data; -+ union mad_dimm_reg mad_dimm = { -+ .dimm_a_size = dimm_a->size_mb / 256, -+ .dimm_b_size = dimm_b->size_mb / 256, -+ .dimm_a_sel = biggest, -+ .dimm_a_ranks = dimm_a->ranks == 2, -+ .dimm_b_ranks = dimm_b->ranks == 2, -+ .dimm_a_width = dimm_a->width == 16, -+ .dimm_b_width = dimm_b->width == 16, -+ .rank_interleave = 1, -+ .enh_interleave = 1, -+ .ecc_mode = 0, /* Do not enable ECC yet */ -+ }; -+ if (is_hsw_ult()) -+ mad_dimm.dimm_b_width = mad_dimm.dimm_a_width; -+ -+ mchbar_write32(MAD_DIMM(channel), mad_dimm.raw); -+ if (ctrl->lpddr) -+ die("%s: Missing LPDDR support (LPDDR_MR_PARAMS)\n", __func__); -+ } -+} -+ -+enum raminit_status configure_mc(struct sysinfo *ctrl) -+{ -+ const uint16_t vccio_mv = 1000; -+ const uint16_t vsshi_mv = ctrl->vdd_mv - 950; -+ const bool dis_odt_static = is_hsw_ult(); /* Disable static ODT legs on ULT */ -+ const bool vddhi = ctrl->vdd_mv > 1350; -+ -+ program_misc_control(ctrl); -+ program_mrc_revision(); -+ program_ranks_used(ctrl); -+ program_ddr_data(ctrl, dis_odt_static, vddhi); -+ program_vsshi_control(ctrl, vsshi_mv); -+ program_dimm_vref(ctrl, vccio_mv, vddhi); -+ program_ddr_ca(ctrl, vddhi); -+ program_rcomp_vref(ctrl, dis_odt_static); -+ program_slew_rates(ctrl, vddhi); -+ program_vsshi(ctrl, vccio_mv, vsshi_mv); -+ program_misc(ctrl); -+ program_ls_comp(ctrl); -+ enable_2x_refresh(ctrl); -+ set_pcu_ddr_voltage(ctrl->vdd_mv); -+ configure_timings(ctrl); -+ configure_refresh(ctrl); -+ program_scheduler(ctrl); -+ dram_zones(ctrl); -+ dram_dimm_mapping(ctrl); -+ -+ return RAMINIT_STATUS_SUCCESS; -+} -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -index 2fea658415..fcc981ad04 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -@@ -22,6 +22,7 @@ static const struct task_entry cold_boot[] = { - { collect_spd_info, true, "PROCSPD", }, - { initialise_mpll, true, "INITMPLL", }, - { convert_timings, true, "CONVTIM", }, -+ { configure_mc, true, "CONFMC", }, - }; - - /* Return a generic stepping value to make stepping checks simpler */ -@@ -53,6 +54,7 @@ static void initialize_ctrl(struct sysinfo *ctrl) - - ctrl->cpu = cpu_get_cpuid(); - ctrl->stepping = get_stepping(ctrl->cpu); -+ ctrl->vdd_mv = is_hsw_ult() ? 1350 : 1500; /** FIXME: Hardcoded, does it matter? **/ - ctrl->dq_pins_interleaved = cfg->dq_pins_interleaved; - ctrl->bootmode = bootmode; - } -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -index e0ebd3a2a7..fffa6d5450 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -@@ -3,16 +3,41 @@ - #ifndef HASWELL_RAMINIT_NATIVE_H - #define HASWELL_RAMINIT_NATIVE_H - -+#include <assert.h> - #include <device/dram/ddr3.h> - #include <northbridge/intel/haswell/haswell.h> -+#include <string.h> -+#include <types.h> -+ -+#include "reg_structs.h" - - /** TODO (Angel): Remove this after in-review patches are submitted **/ - #define SPD_LEN SPD_SIZE_MAX_DDR3 - -+/* Each channel has 4 ranks, spread across 2 slots */ -+#define NUM_SLOTRANKS 4 -+ -+#define NUM_GROUPS 2 -+ - /* 8 data lanes + 1 ECC lane */ - #define NUM_LANES 9 - #define NUM_LANES_NO_ECC 8 - -+#define COMP_INT 10 -+ -+/* Always use 12 legs for emphasis (not trained) */ -+#define TXEQFULLDRV (3 << 4) -+ -+enum command_training_iteration { -+ CT_ITERATION_CLOCK = 0, -+ CT_ITERATION_CMD_NORTH, -+ CT_ITERATION_CMD_SOUTH, -+ CT_ITERATION_CKE, -+ CT_ITERATION_CTL, -+ CT_ITERATION_CMD_VREF, -+ MAX_CT_ITERATION, -+}; -+ - enum raminit_boot_mode { - BOOTMODE_COLD, - BOOTMODE_WARM, -@@ -58,6 +83,9 @@ struct sysinfo { - * LPDDR-specific functions have stubs which will halt upon execution. - */ - bool lpddr; -+ bool lpddr_dram_odt; -+ uint8_t lpddr_cke_rank_map[NUM_CHANNELS]; -+ uint8_t dq_byte_map[NUM_CHANNELS][MAX_CT_ITERATION][2]; - - struct raminit_dimm_info dimms[NUM_CHANNELS][NUM_SLOTS]; - union dimm_flags_ddr3_st flags; -@@ -94,16 +122,89 @@ struct sysinfo { - uint32_t mem_clock_mhz; - uint32_t mem_clock_fs; /* Memory clock period in femtoseconds */ - uint32_t qclkps; /* Quadrature clock period in picoseconds */ -+ -+ uint16_t vdd_mv; -+ -+ union ddr_scram_misc_control_reg misc_control_0; -+ -+ union ddr_comp_ctl_0_reg comp_ctl_0; -+ union ddr_comp_ctl_1_reg comp_ctl_1; -+ -+ union ddr_data_vref_adjust_reg dimm_vref; -+ -+ uint32_t data_offset_train[NUM_CHANNELS][NUM_LANES]; -+ uint32_t data_offset_comp[NUM_CHANNELS][NUM_LANES]; -+ -+ uint32_t dq_control_0[NUM_CHANNELS]; -+ uint32_t dq_control_1[NUM_CHANNELS][NUM_LANES]; -+ uint32_t dq_control_2[NUM_CHANNELS][NUM_LANES]; -+ -+ uint16_t tx_dq[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES]; -+ uint16_t txdqs[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES]; -+ uint8_t tx_eq[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES]; -+ -+ uint16_t rcven[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES]; -+ uint8_t rx_eq[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES]; -+ uint8_t rxdqsp[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES]; -+ uint8_t rxdqsn[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES]; -+ int8_t rxvref[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES]; -+ -+ uint8_t clk_pi_code[NUM_CHANNELS][NUM_SLOTRANKS]; -+ uint8_t ctl_pi_code[NUM_CHANNELS][NUM_SLOTRANKS]; -+ uint8_t cke_pi_code[NUM_CHANNELS][NUM_SLOTRANKS]; -+ -+ uint8_t cke_cmd_pi_code[NUM_CHANNELS][NUM_GROUPS]; -+ uint8_t cmd_north_pi_code[NUM_CHANNELS][NUM_GROUPS]; -+ uint8_t cmd_south_pi_code[NUM_CHANNELS][NUM_GROUPS]; - }; - -+static inline bool is_hsw_ult(void) -+{ -+ return CONFIG(INTEL_LYNXPOINT_LP); -+} -+ -+static inline bool rank_in_mask(uint8_t rank, uint8_t rankmask) -+{ -+ assert(rank < NUM_SLOTRANKS); -+ return !!(BIT(rank) & rankmask); -+} -+ -+static inline bool does_ch_exist(const struct sysinfo *ctrl, uint8_t channel) -+{ -+ return !!ctrl->dpc[channel]; -+} -+ -+static inline bool does_rank_exist(const struct sysinfo *ctrl, uint8_t rank) -+{ -+ return rank_in_mask(rank, ctrl->rankmap[0] | ctrl->rankmap[1]); -+} -+ -+static inline bool rank_in_ch(const struct sysinfo *ctrl, uint8_t rank, uint8_t channel) -+{ -+ assert(channel < NUM_CHANNELS); -+ return rank_in_mask(rank, ctrl->rankmap[channel]); -+} -+ -+/** TODO: Handling of data_offset_train could be improved, also coupled with reg updates **/ -+static inline void clear_data_offset_train_all(struct sysinfo *ctrl) -+{ -+ memset(ctrl->data_offset_train, 0, sizeof(ctrl->data_offset_train)); -+} -+ - void raminit_main(enum raminit_boot_mode bootmode); - - enum raminit_status collect_spd_info(struct sysinfo *ctrl); - enum raminit_status initialise_mpll(struct sysinfo *ctrl); - enum raminit_status convert_timings(struct sysinfo *ctrl); -+enum raminit_status configure_mc(struct sysinfo *ctrl); -+ -+void configure_timings(struct sysinfo *ctrl); -+void configure_refresh(struct sysinfo *ctrl); - - enum raminit_status wait_for_first_rcomp(void); - -+uint8_t get_rx_bias(const struct sysinfo *ctrl); -+ - uint8_t get_tCWL(uint32_t mem_clock_mhz); - uint32_t get_tREFI(uint32_t mem_clock_mhz); - uint32_t get_tXP(uint32_t mem_clock_mhz); -diff --git a/src/northbridge/intel/haswell/native_raminit/reg_structs.h b/src/northbridge/intel/haswell/native_raminit/reg_structs.h -new file mode 100644 -index 0000000000..d11cda4b3d ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/reg_structs.h -@@ -0,0 +1,405 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#ifndef HASWELL_RAMINIT_REG_STRUCTS_H -+#define HASWELL_RAMINIT_REG_STRUCTS_H -+ -+union ddr_data_rx_train_rank_reg { -+ struct __packed { -+ uint32_t rcven : 9; // Bits 8:0 -+ uint32_t dqs_p : 6; // Bits 14:9 -+ uint32_t rx_eq : 5; // Bits 19:15 -+ uint32_t dqs_n : 6; // Bits 25:20 -+ int32_t vref : 6; // Bits 31:26 -+ }; -+ uint32_t raw; -+}; -+ -+union ddr_data_tx_train_rank_reg { -+ struct __packed { -+ uint32_t dq_delay : 9; // Bits 8:0 -+ uint32_t dqs_delay : 9; // Bits 17:9 -+ uint32_t : 2; // Bits 19:18 -+ uint32_t tx_eq : 6; // Bits 25:20 -+ uint32_t : 6; // Bits 31:26 -+ }; -+ uint32_t raw; -+}; -+ -+union ddr_data_control_0_reg { -+ struct __packed { -+ uint32_t rx_training_mode : 1; // Bits 0:0 -+ uint32_t wl_training_mode : 1; // Bits 1:1 -+ uint32_t rl_training_mode : 1; // Bits 2:2 -+ uint32_t samp_train_mode : 1; // Bits 3:3 -+ uint32_t tx_on : 1; // Bits 4:4 -+ uint32_t rf_on : 1; // Bits 5:5 -+ uint32_t rx_pi_on : 1; // Bits 6:6 -+ uint32_t tx_pi_on : 1; // Bits 7:7 -+ uint32_t internal_clocks_on : 1; // Bits 8:8 -+ uint32_t repeater_clocks_on : 1; // Bits 9:9 -+ uint32_t tx_disable : 1; // Bits 10:10 -+ uint32_t rx_disable : 1; // Bits 11:11 -+ uint32_t tx_long : 1; // Bits 12:12 -+ uint32_t rx_dqs_ctle : 2; // Bits 14:13 -+ uint32_t rx_read_pointer : 3; // Bits 17:15 -+ uint32_t driver_segment_enable : 1; // Bits 18:18 -+ uint32_t data_vccddq_hi : 1; // Bits 19:19 -+ uint32_t read_rf_rd : 1; // Bits 20:20 -+ uint32_t read_rf_wr : 1; // Bits 21:21 -+ uint32_t read_rf_rank : 2; // Bits 23:22 -+ uint32_t force_odt_on : 1; // Bits 24:24 -+ uint32_t odt_samp_off : 1; // Bits 25:25 -+ uint32_t disable_odt_static : 1; // Bits 26:26 -+ uint32_t ddr_cr_force_odt_on : 1; // Bits 27:27 -+ uint32_t lpddr_mode : 1; // Bits 28:28 -+ uint32_t en_read_preamble : 1; // Bits 29:29 -+ uint32_t odt_samp_extend_en : 1; // Bits 30:30 -+ uint32_t early_rleak_en : 1; // Bits 31:31 -+ }; -+ uint32_t raw; -+}; -+ -+union ddr_data_control_1_reg { -+ struct __packed { -+ int32_t ref_pi : 4; // Bits 3:0 -+ uint32_t dll_mask : 2; // Bits 5:4 -+ uint32_t dll_weaklock : 1; // Bits 6:6 -+ uint32_t sdll_segment_disable : 3; // Bits 9:7 -+ uint32_t rx_bias_ctl : 3; // Bits 12:10 -+ int32_t odt_delay : 4; // Bits 16:13 -+ uint32_t odt_duration : 3; // Bits 19:17 -+ int32_t sense_amp_delay : 4; // Bits 23:20 -+ uint32_t sense_amp_duration : 3; // Bits 26:24 -+ uint32_t burst_end_odt_delay : 3; // Bits 29:27 *** TODO: Check Broadwell *** -+ uint32_t lpddr_long_odt_en : 1; // Bits 30:30 -+ uint32_t : 1; // Bits 31:31 -+ }; -+ uint32_t raw; -+}; -+ -+/* NOTE: Bits 31:19 are only valid for Broadwell onwards */ -+union ddr_data_control_2_reg { -+ struct __packed { -+ uint32_t rx_stagger_ctl : 5; // Bits 4:0 -+ uint32_t force_bias_on : 1; // Bits 5:5 -+ uint32_t force_rx_on : 1; // Bits 6:6 -+ uint32_t leaker_comp : 2; // Bits 8:7 -+ uint32_t rx_dqs_amp_offset : 4; // Bits 12:9 -+ uint32_t rx_clk_stg_num : 5; // Bits 17:13 -+ uint32_t wl_long_delay : 1; // Bits 18:18 -+ uint32_t enable_vref_pwrdn : 1; // Bits 19:19 -+ uint32_t ddr4_mode : 1; // Bits 20:20 -+ uint32_t en_vddq_odt : 1; // Bits 21:21 -+ uint32_t en_vtt_odt : 1; // Bits 22:22 -+ uint32_t en_const_z_eq_tx : 1; // Bits 23:23 -+ uint32_t tx_eq_dis : 1; // Bits 24:24 -+ uint32_t rx_vref_prog_mfc : 1; // Bits 25:25 -+ uint32_t cben : 3; // Bits 28:26 -+ uint32_t tx_deskew_disable : 1; // Bits 29:29 -+ uint32_t rx_deskew_disable : 1; // Bits 30:30 -+ uint32_t dq_slew_dly_byp : 1; // Bits 31:31 -+ }; -+ uint32_t raw; -+}; -+ -+union ddr_comp_data_comp_1_reg { -+ struct __packed { -+ uint32_t rcomp_odt_up : 6; // Bits 5:0 -+ uint32_t : 3; // Bits 8:6 -+ uint32_t rcomp_odt_down : 6; // Bits 14:9 -+ uint32_t : 1; // Bits 15:15 -+ uint32_t panic_drv_down : 6; // Bits 21:16 -+ uint32_t panic_drv_up : 6; // Bits 27:22 -+ uint32_t ls_comp : 3; // Bits 30:28 -+ uint32_t : 1; // Bits 31:31 -+ }; -+ uint32_t raw; -+}; -+ -+union ddr_comp_ctl_0_reg { -+ struct __packed { -+ uint32_t : 3; // Bits 2:0 -+ uint32_t disable_odt_static : 1; // Bits 3:3 -+ uint32_t odt_up_down_off : 6; // Bits 9:4 -+ uint32_t fixed_odt_offset : 1; // Bits 10:10 -+ int32_t dq_drv_vref : 4; // Bits 14:11 -+ int32_t dq_odt_vref : 5; // Bits 19:15 -+ int32_t cmd_drv_vref : 4; // Bits 23:20 -+ int32_t ctl_drv_vref : 4; // Bits 27:24 -+ int32_t clk_drv_vref : 4; // Bits 31:28 -+ }; -+ uint32_t raw; -+}; -+ -+union ddr_comp_ctl_1_reg { -+ struct __packed { -+ uint32_t dq_scomp : 5; // Bits 4:0 -+ uint32_t cmd_scomp : 5; // Bits 9:5 -+ uint32_t ctl_scomp : 5; // Bits 14:10 -+ uint32_t clk_scomp : 5; // Bits 19:15 -+ uint32_t tco_cmd_offset : 4; // Bits 23:20 -+ uint32_t comp_clk_on : 1; // Bits 24:24 -+ uint32_t vccddq_hi : 1; // Bits 25:25 -+ uint32_t : 3; // Bits 28:26 -+ uint32_t dis_quick_comp : 1; // Bits 29:29 -+ uint32_t sin_step : 1; // Bits 30:30 -+ uint32_t sin_step_adv : 1; // Bits 31:31 -+ }; -+ uint32_t raw; -+}; -+ -+union ddr_data_vref_adjust_reg { -+ struct __packed { -+ int32_t ca_vref_ctrl : 7;// Bits 6:0 -+ int32_t ch1_vref_ctrl : 7;// Bits 13:7 -+ int32_t ch0_vref_ctrl : 7;// Bits 20:14 -+ uint32_t en_dimm_vref_ca : 1;// Bits 21:21 -+ uint32_t en_dimm_vref_ch1 : 1;// Bits 22:22 -+ uint32_t en_dimm_vref_ch0 : 1;// Bits 23:23 -+ uint32_t hi_z_timer_ctrl : 2;// Bits 25:24 -+ uint32_t vccddq_hi_qnnn_h : 1;// Bits 26:26 -+ uint32_t : 2;// Bits 28:27 -+ uint32_t ca_slow_bw : 1;// Bits 29:29 -+ uint32_t ch0_slow_bw : 1;// Bits 30:30 -+ uint32_t ch1_slow_bw : 1;// Bits 31:31 -+ }; -+ uint32_t raw; -+}; -+ -+union ddr_data_vref_control_reg { -+ struct __packed { -+ uint32_t hi_bw_divider : 2; // Bits 1:0 -+ uint32_t lo_bw_divider : 2; // Bits 3:2 -+ uint32_t sample_divider : 3; // Bits 6:4 -+ uint32_t open_loop : 1; // Bits 7:7 -+ uint32_t slow_bw_error : 2; // Bits 9:8 -+ uint32_t hi_bw_enable : 1; // Bits 10:10 -+ uint32_t : 1; // Bits 11:11 -+ uint32_t vt_slope_b : 3; // Bits 14:12 -+ uint32_t vt_slope_a : 3; // Bits 17:15 -+ uint32_t vt_offset : 3; // Bits 20:18 -+ uint32_t sel_code : 3; // Bits 23:21 -+ uint32_t output_code : 8; // Bits 31:24 -+ }; -+ uint32_t raw; -+}; -+ -+union ddr_comp_vsshi_reg { -+ struct __packed { -+ uint32_t panic_drv_down_vref : 6; // Bits 5:0 -+ uint32_t panic_drv_up_vref : 6; // Bits 11:6 -+ uint32_t vt_offset : 5; // Bits 16:12 -+ uint32_t vt_slope_a : 3; // Bits 19:17 -+ uint32_t vt_slope_b : 3; // Bits 22:20 -+ uint32_t : 9; // Bits 31:23 -+ }; -+ uint32_t raw; -+}; -+ -+union ddr_comp_vsshi_control_reg { -+ struct __packed { -+ uint32_t vsshi_target : 6; // Bits 5:0 -+ uint32_t hi_bw_divider : 2; // Bits 7:6 -+ uint32_t lo_bw_divider : 2; // Bits 9:8 -+ uint32_t sample_divider : 3; // Bits 12:10 -+ uint32_t open_loop : 1; // Bits 13:13 -+ uint32_t bw_error : 2; // Bits 15:14 -+ uint32_t panic_driver_en : 1; // Bits 16:16 -+ uint32_t : 1; // Bits 17:17 -+ uint32_t panic_voltage : 4; // Bits 21:18 -+ uint32_t gain_boost : 1; // Bits 22:22 -+ uint32_t sel_code : 1; // Bits 23:23 -+ uint32_t output_code : 8; // Bits 31:24 -+ }; -+ uint32_t raw; -+}; -+ -+union ddr_clk_controls_reg { -+ struct __packed { -+ uint32_t ref_pi : 4; // Bits 3:0 -+ uint32_t dll_mask : 2; // Bits 5:4 -+ uint32_t : 1; // Bits 6:6 -+ uint32_t tx_on : 1; // Bits 7:7 -+ uint32_t internal_clocks_on : 1; // Bits 8:8 -+ uint32_t repeater_clocks_on : 1; // Bits 9:9 -+ uint32_t io_lb_ctl : 2; // Bits 11:10 -+ uint32_t odt_mode : 1; // Bits 12:12 -+ uint32_t : 8; // Bits 20:13 -+ uint32_t rx_vref : 6; // Bits 26:21 -+ uint32_t vccddq_hi : 1; // Bits 27:27 -+ uint32_t dll_weaklock : 1; // Bits 28:28 -+ uint32_t lpddr_mode : 1; // Bits 29:29 -+ uint32_t : 2; // Bits 31:30 -+ }; -+ uint32_t raw; -+}; -+ -+union ddr_cmd_controls_reg { -+ struct __packed { -+ int32_t ref_pi : 4; // Bits 3:0 -+ uint32_t dll_mask : 2; // Bits 5:4 -+ uint32_t : 1; // Bits 6:6 -+ uint32_t tx_on : 1; // Bits 7:7 -+ uint32_t internal_clocks_on : 1; // Bits 8:8 -+ uint32_t repeater_clocks_on : 1; // Bits 9:9 -+ uint32_t io_lb_ctl : 2; // Bits 11:10 -+ uint32_t odt_mode : 1; // Bits 12:12 -+ uint32_t cmd_tx_eq : 2; // Bits 14:13 -+ uint32_t early_weak_drive : 2; // Bits 16:15 -+ uint32_t : 4; // Bits 20:17 -+ int32_t rx_vref : 6; // Bits 26:21 -+ uint32_t vccddq_hi : 1; // Bits 27:27 -+ uint32_t dll_weaklock : 1; // Bits 28:28 -+ uint32_t lpddr_mode : 1; // Bits 29:29 -+ uint32_t lpddr_ca_a_dis : 1; // Bits 30:30 -+ uint32_t lpddr_ca_b_dis : 1; // Bits 31:31 -+ }; -+ uint32_t raw; -+}; -+ -+/* Same register definition for CKE and CTL fubs */ -+union ddr_cke_ctl_controls_reg { -+ struct __packed { -+ int32_t ref_pi : 4; // Bits 3:0 -+ uint32_t dll_mask : 2; // Bits 5:4 -+ uint32_t : 1; // Bits 6:6 -+ uint32_t tx_on : 1; // Bits 7:7 -+ uint32_t internal_clocks_on : 1; // Bits 8:8 -+ uint32_t repeater_clocks_on : 1; // Bits 9:9 -+ uint32_t io_lb_ctl : 2; // Bits 11:10 -+ uint32_t odt_mode : 1; // Bits 12:12 -+ uint32_t cmd_tx_eq : 2; // Bits 14:13 -+ uint32_t early_weak_drive : 2; // Bits 16:15 -+ uint32_t ctl_tx_eq : 2; // Bits 18:17 -+ uint32_t ctl_sr_drv : 2; // Bits 20:19 -+ int32_t rx_vref : 6; // Bits 26:21 -+ uint32_t vccddq_hi : 1; // Bits 27:27 -+ uint32_t dll_weaklock : 1; // Bits 28:28 -+ uint32_t lpddr_mode : 1; // Bits 29:29 -+ uint32_t la_drv_en_ovrd : 1; // Bits 30:30 -+ uint32_t lpddr_ca_a_dis : 1; // Bits 31:31 -+ }; -+ uint32_t raw; -+}; -+ -+union ddr_scram_misc_control_reg { -+ struct __packed { -+ uint32_t wl_wake_cycles : 2; // Bits 1:0 -+ uint32_t wl_sleep_cycles : 3; // Bits 4:2 -+ uint32_t force_comp_update : 1; // Bits 5:5 -+ uint32_t weaklock_latency : 4; // Bits 9:6 -+ uint32_t ddr_no_ch_interleave : 1; // Bits 10:10 -+ uint32_t lpddr_mode : 1; // Bits 11:11 -+ uint32_t cke_mapping_ch0 : 4; // Bits 15:12 -+ uint32_t cke_mapping_ch1 : 4; // Bits 19:16 -+ uint32_t : 12; // Bits 31:20 -+ }; -+ uint32_t raw; -+}; -+ -+union mcscheds_cbit_reg { -+ struct __packed { -+ uint32_t dis_opp_cas : 1; // Bits 0:0 -+ uint32_t dis_opp_is_cas : 1; // Bits 1:1 -+ uint32_t dis_opp_ras : 1; // Bits 2:2 -+ uint32_t dis_opp_is_ras : 1; // Bits 3:3 -+ uint32_t dis_1c_byp : 1; // Bits 4:4 -+ uint32_t dis_2c_byp : 1; // Bits 5:5 -+ uint32_t dis_deprd_opt : 1; // Bits 6:6 -+ uint32_t dis_pt_it : 1; // Bits 7:7 -+ uint32_t dis_prcnt_ring : 1; // Bits 8:8 -+ uint32_t dis_prcnt_sa : 1; // Bits 9:9 -+ uint32_t dis_blkr_ph : 1; // Bits 10:10 -+ uint32_t dis_blkr_pe : 1; // Bits 11:11 -+ uint32_t dis_blkr_pm : 1; // Bits 12:12 -+ uint32_t dis_odt : 1; // Bits 13:13 -+ uint32_t oe_always_off : 1; // Bits 14:14 -+ uint32_t : 1; // Bits 15:15 -+ uint32_t dis_aom : 1; // Bits 16:16 -+ uint32_t block_rpq : 1; // Bits 17:17 -+ uint32_t block_wpq : 1; // Bits 18:18 -+ uint32_t invert_align : 1; // Bits 19:19 -+ uint32_t dis_write_gap : 1; // Bits 20:20 -+ uint32_t dis_zq : 1; // Bits 21:21 -+ uint32_t dis_tt : 1; // Bits 22:22 -+ uint32_t dis_opp_ref : 1; // Bits 23:23 -+ uint32_t long_zq : 1; // Bits 24:24 -+ uint32_t dis_srx_zq : 1; // Bits 25:25 -+ uint32_t serialize_zq : 1; // Bits 26:26 -+ uint32_t zq_fast_exec : 1; // Bits 27:27 -+ uint32_t dis_drive_nop : 1; // Bits 28:28 -+ uint32_t pres_wdb_ent : 1; // Bits 29:29 -+ uint32_t dis_clk_gate : 1; // Bits 30:30 -+ uint32_t : 1; // Bits 31:31 -+ }; -+ uint32_t raw; -+}; -+ -+union mcmain_command_rate_limit_reg { -+ struct __packed { -+ uint32_t enable_cmd_limit : 1; // Bits 0:0 -+ uint32_t cmd_rate_limit : 3; // Bits 3:1 -+ uint32_t reset_on_command : 4; // Bits 7:4 -+ uint32_t reset_delay : 4; // Bits 11:8 -+ uint32_t ck_to_cke_delay : 2; // Bits 13:12 -+ uint32_t : 17; // Bits 30:14 -+ uint32_t init_mrw_2n_cs : 1; // Bits 31:31 -+ }; -+ uint32_t raw; -+}; -+ -+union mad_chnl_reg { -+ struct __packed { -+ uint32_t ch_a : 2; // Bits 1:0 -+ uint32_t ch_b : 2; // Bits 3:2 -+ uint32_t ch_c : 2; // Bits 5:4 -+ uint32_t stacked_mode : 1; // Bits 6:6 -+ uint32_t stkd_mode_bits : 3; // Bits 9:7 -+ uint32_t lpddr_mode : 1; // Bits 10:10 -+ uint32_t : 21; // Bits 31:11 -+ }; -+ uint32_t raw; -+}; -+ -+union mad_dimm_reg { -+ struct __packed { -+ uint32_t dimm_a_size : 8; // Bits 7:0 -+ uint32_t dimm_b_size : 8; // Bits 15:8 -+ uint32_t dimm_a_sel : 1; // Bits 16:16 -+ uint32_t dimm_a_ranks : 1; // Bits 17:17 -+ uint32_t dimm_b_ranks : 1; // Bits 18:18 -+ uint32_t dimm_a_width : 1; // Bits 19:19 -+ uint32_t dimm_b_width : 1; // Bits 20:20 -+ uint32_t rank_interleave : 1; // Bits 21:21 -+ uint32_t enh_interleave : 1; // Bits 22:22 -+ uint32_t : 1; // Bits 23:23 -+ uint32_t ecc_mode : 2; // Bits 25:24 -+ uint32_t hori_mode : 1; // Bits 26:26 -+ uint32_t hori_address : 3; // Bits 29:27 -+ uint32_t : 2; // Bits 31:30 -+ }; -+ uint32_t raw; -+}; -+ -+union mad_zr_reg { -+ struct __packed { -+ uint32_t : 16; // Bits 15:0 -+ uint32_t ch_b_double : 8; // Bits 23:16 -+ uint32_t ch_b_single : 8; // Bits 31:24 -+ }; -+ uint32_t raw; -+}; -+ -+/* Same definition for P_COMP, M_COMP, D_COMP */ -+union pcu_comp_reg { -+ struct __packed { -+ uint32_t comp_disable : 1; // Bits 0:0 -+ uint32_t comp_interval : 4; // Bits 4:1 -+ uint32_t : 3; // Bits 7:5 -+ uint32_t comp_force : 1; // Bits 8:8 -+ uint32_t : 23; // Bits 31:9 -+ }; -+ uint32_t raw; -+}; -+ -+#endif -diff --git a/src/northbridge/intel/haswell/native_raminit/timings_refresh.c b/src/northbridge/intel/haswell/native_raminit/timings_refresh.c -new file mode 100644 -index 0000000000..a9d960f31b ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/timings_refresh.c -@@ -0,0 +1,13 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include "raminit_native.h" -+ -+void configure_timings(struct sysinfo *ctrl) -+{ -+ /** TODO: Stub **/ -+} -+ -+void configure_refresh(struct sysinfo *ctrl) -+{ -+ /** TODO: Stub **/ -+} -diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h -index 45f8174995..4c3f399b5d 100644 ---- a/src/northbridge/intel/haswell/registers/mchbar.h -+++ b/src/northbridge/intel/haswell/registers/mchbar.h -@@ -7,9 +7,98 @@ - #define NUM_CHANNELS 2 - #define NUM_SLOTS 2 - -+/* Indexed register helper macros */ -+#define _DDRIO_C_R_B(r, ch, rank, byte) ((r) + 0x100 * (ch) + 0x4 * (rank) + 0x200 * (byte)) -+#define _MCMAIN_C_X(r, ch, x) ((r) + 0x400 * (ch) + 0x4 * (x)) -+#define _MCMAIN_C(r, ch) ((r) + 0x400 * (ch)) -+ - /* Register definitions */ -+ -+/* DDR DATA per-channel per-bytelane */ -+#define DQ_CONTROL_2(ch, byte) _DDRIO_C_R_B(0x0064, ch, 0, byte) -+ -+/* DDR CKE per-channel */ -+#define DDR_CKE_ch_CMD_COMP_OFFSET(ch) _DDRIO_C_R_B(0x1204, ch, 0, 0) -+#define DDR_CKE_ch_CMD_PI_CODING(ch) _DDRIO_C_R_B(0x1208, ch, 0, 0) -+ -+#define DDR_CKE_ch_CTL_CONTROLS(ch) _DDRIO_C_R_B(0x121c, ch, 0, 0) -+#define DDR_CKE_ch_CTL_RANKS_USED(ch) _DDRIO_C_R_B(0x1220, ch, 0, 0) -+ -+/* DDR CTL per-channel */ -+#define DDR_CTL_ch_CTL_CONTROLS(ch) _DDRIO_C_R_B(0x1c1c, ch, 0, 0) -+#define DDR_CTL_ch_CTL_RANKS_USED(ch) _DDRIO_C_R_B(0x1c20, ch, 0, 0) -+ -+/* DDR CLK per-channel */ -+#define DDR_CLK_ch_RANKS_USED(ch) _DDRIO_C_R_B(0x1800, ch, 0, 0) -+#define DDR_CLK_ch_COMP_OFFSET(ch) _DDRIO_C_R_B(0x1808, ch, 0, 0) -+#define DDR_CLK_ch_PI_CODING(ch) _DDRIO_C_R_B(0x180c, ch, 0, 0) -+#define DDR_CLK_ch_CONTROLS(ch) _DDRIO_C_R_B(0x1810, ch, 0, 0) -+ -+/* DDR Scrambler */ -+#define DDR_SCRAMBLE_ch(ch) (0x2000 + 4 * (ch)) -+#define DDR_SCRAM_MISC_CONTROL 0x2008 -+ -+/* DDR CMDN/CMDS per-channel (writes go to both CMDN and CMDS fubs) */ -+#define DDR_CMD_ch_COMP_OFFSET(ch) _DDRIO_C_R_B(0x3204, ch, 0, 0) -+#define DDR_CMD_ch_PI_CODING(ch) _DDRIO_C_R_B(0x3208, ch, 0, 0) -+#define DDR_CMD_ch_CONTROLS(ch) _DDRIO_C_R_B(0x320c, ch, 0, 0) -+ -+/* DDR CKE/CTL per-channel (writes go to both CKE and CTL fubs) */ -+#define DDR_CKE_CTL_ch_CTL_COMP_OFFSET(ch) _DDRIO_C_R_B(0x3414, ch, 0, 0) -+#define DDR_CKE_CTL_ch_CTL_PI_CODING(ch) _DDRIO_C_R_B(0x3418, ch, 0, 0) -+ -+/* DDR DATA broadcast */ -+#define DDR_DATA_RX_TRAIN_RANK(rank) _DDRIO_C_R_B(0x3600, 0, rank, 0) -+#define DDR_DATA_RX_PER_BIT_RANK(rank) _DDRIO_C_R_B(0x3610, 0, rank, 0) -+#define DDR_DATA_TX_TRAIN_RANK(rank) _DDRIO_C_R_B(0x3620, 0, rank, 0) -+#define DDR_DATA_TX_PER_BIT_RANK(rank) _DDRIO_C_R_B(0x3630, 0, rank, 0) -+ -+#define DDR_DATA_RCOMP_DATA_1 0x3644 -+#define DDR_DATA_TX_XTALK 0x3648 -+#define DDR_DATA_RX_OFFSET_VDQ 0x364c -+#define DDR_DATA_OFFSET_COMP 0x365c -+#define DDR_DATA_CONTROL_1 0x3660 -+ -+#define DDR_DATA_OFFSET_TRAIN 0x3670 -+#define DDR_DATA_CONTROL_0 0x3674 -+#define DDR_DATA_VREF_ADJUST 0x3678 -+ -+/* DDR CMD broadcast */ -+#define DDR_CMD_COMP 0x3700 -+ -+/* DDR CKE/CTL broadcast */ -+#define DDR_CKE_CTL_COMP 0x3810 -+ -+/* DDR CLK broadcast */ -+#define DDR_CLK_COMP 0x3904 -+#define DDR_CLK_CONTROLS 0x3910 -+#define DDR_CLK_CB_STATUS 0x3918 -+ -+/* DDR COMP (global) */ -+#define DDR_COMP_DATA_COMP_1 0x3a04 -+#define DDR_COMP_CMD_COMP 0x3a08 -+#define DDR_COMP_CTL_COMP 0x3a0c -+#define DDR_COMP_CLK_COMP 0x3a10 -+#define DDR_COMP_CTL_0 0x3a14 -+#define DDR_COMP_CTL_1 0x3a18 -+#define DDR_COMP_VSSHI 0x3a1c -+#define DDR_COMP_OVERRIDE 0x3a20 -+#define DDR_COMP_VSSHI_CONTROL 0x3a24 -+ -+/* MCMAIN per-channel */ -+#define COMMAND_RATE_LIMIT_ch(ch) _MCMAIN_C(0x4010, ch) -+ -+#define MC_INIT_STATE_ch(ch) _MCMAIN_C(0x42a0, ch) -+ -+/* MCMAIN broadcast */ -+#define MCSCHEDS_CBIT 0x4c20 -+ -+#define MCMNTS_SC_WDBWM 0x4f8c -+ -+/* MCDECS */ - #define MAD_CHNL 0x5000 /* Address Decoder Channel Configuration */ - #define MAD_DIMM(ch) (0x5004 + (ch) * 4) -+#define MAD_ZR 0x5014 - #define MC_INIT_STATE_G 0x5030 - #define MRC_REVISION 0x5034 /* MRC Revision */ - -@@ -28,6 +117,8 @@ - - #define PCU_DDR_PTM_CTL 0x5880 - -+#define PCU_DDR_VOLTAGE 0x58a4 -+ - /* Some power MSRs are also represented in MCHBAR */ - #define MCH_PKG_POWER_LIMIT_LO 0x59a0 - #define MCH_PKG_POWER_LIMIT_HI 0x59a4 -@@ -48,6 +139,8 @@ - #define MAILBOX_BIOS_CMD_FSM_MEASURE_INTVL 0x909 - #define MAILBOX_BIOS_CMD_READ_PCH_POWER 0xa - #define MAILBOX_BIOS_CMD_READ_PCH_POWER_EXT 0xb -+#define MAILBOX_BIOS_CMD_READ_DDR_2X_REFRESH 0x17 -+#define MAILBOX_BIOS_CMD_WRITE_DDR_2X_REFRESH 0x18 - #define MAILBOX_BIOS_CMD_READ_C9C10_VOLTAGE 0x26 - #define MAILBOX_BIOS_CMD_WRITE_C9C10_VOLTAGE 0x27 - -@@ -66,6 +159,7 @@ - #define MC_BIOS_REQ 0x5e00 /* Memory frequency request register */ - #define MC_BIOS_DATA 0x5e04 /* Miscellaneous information for BIOS */ - #define SAPMCTL 0x5f00 -+#define M_COMP 0x5f08 - - #define HDAUDRID 0x6008 - #define UMAGFXCTL 0x6020 --- -2.39.5 - diff --git a/config/coreboot/next/patches/0010-soc-intel-skylake-Don-t-compress-FSP-S.patch b/config/coreboot/default/patches/0032-soc-intel-skylake-Don-t-compress-FSP-S.patch index 228170eb..cd1ed452 100644 --- a/config/coreboot/next/patches/0010-soc-intel-skylake-Don-t-compress-FSP-S.patch +++ b/config/coreboot/default/patches/0032-soc-intel-skylake-Don-t-compress-FSP-S.patch @@ -1,7 +1,7 @@ -From f08dbaacf747eb198bbc8f83e0220ca803f19116 Mon Sep 17 00:00:00 2001 +From 81360b8c28293856e964934d1f356b1312b39ff2 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Thu, 26 Dec 2024 19:45:20 +0000 -Subject: [PATCH 10/11] soc/intel/skylake: Don't compress FSP-S +Subject: [PATCH 32/40] soc/intel/skylake: Don't compress FSP-S Build systems like lbmk need to reproducibly insert certain vendor files on release images. @@ -19,7 +19,7 @@ Signed-off-by: Leah Rowe <info@minifree.org> 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig -index c24df2ef75..8e25f796ed 100644 +index 493a2d835a..42af82a5d8 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -12,7 +12,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE @@ -32,5 +32,5 @@ index c24df2ef75..8e25f796ed 100644 select GENERIC_GPIO_LIB select HAVE_FSP_GOP -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0033-haswell-NRI-Add-timings-refresh-programming.patch b/config/coreboot/default/patches/0033-haswell-NRI-Add-timings-refresh-programming.patch deleted file mode 100644 index 3ec3b57b..00000000 --- a/config/coreboot/default/patches/0033-haswell-NRI-Add-timings-refresh-programming.patch +++ /dev/null @@ -1,541 +0,0 @@ -From 8f94c0428eea2145a97de943b093dee29001c4f9 Mon Sep 17 00:00:00 2001 -From: Angel Pons <th3fanbus@gmail.com> -Date: Sat, 7 May 2022 20:59:58 +0200 -Subject: [PATCH 33/51] haswell NRI: Add timings/refresh programming - -Program the registers with timing and refresh parameters. - -Change-Id: Id2ea339d2c9ea8b56c71d6e88ec76949653ff5c2 -Signed-off-by: Angel Pons <th3fanbus@gmail.com> ---- - .../haswell/native_raminit/lookup_timings.c | 102 ++++++++ - .../haswell/native_raminit/raminit_native.h | 14 ++ - .../haswell/native_raminit/reg_structs.h | 93 +++++++ - .../haswell/native_raminit/timings_refresh.c | 233 +++++++++++++++++- - .../intel/haswell/registers/mchbar.h | 12 + - 5 files changed, 452 insertions(+), 2 deletions(-) - -diff --git a/src/northbridge/intel/haswell/native_raminit/lookup_timings.c b/src/northbridge/intel/haswell/native_raminit/lookup_timings.c -index 8b81c7c341..b8d6c1ef40 100644 ---- a/src/northbridge/intel/haswell/native_raminit/lookup_timings.c -+++ b/src/northbridge/intel/haswell/native_raminit/lookup_timings.c -@@ -60,3 +60,105 @@ uint32_t get_tXP(const uint32_t mem_clock_mhz) - }; - return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut)); - } -+ -+static uint32_t get_lpddr_tCKE(const uint32_t mem_clock_mhz) -+{ -+ const struct timing_lookup lut[] = { -+ { 533, 4 }, -+ { 666, 5 }, -+ { fmax, 6 }, -+ }; -+ return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut)); -+} -+ -+static uint32_t get_ddr_tCKE(const uint32_t mem_clock_mhz) -+{ -+ const struct timing_lookup lut[] = { -+ { 533, 3 }, -+ { 800, 4 }, -+ { 933, 5 }, -+ { 1200, 6 }, -+ { fmax, 7 }, -+ }; -+ return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut)); -+} -+ -+uint32_t get_tCKE(const uint32_t mem_clock_mhz, const bool lpddr) -+{ -+ return lpddr ? get_lpddr_tCKE(mem_clock_mhz) : get_ddr_tCKE(mem_clock_mhz); -+} -+ -+uint32_t get_tXPDLL(const uint32_t mem_clock_mhz) -+{ -+ const struct timing_lookup lut[] = { -+ { 400, 10 }, -+ { 533, 13 }, -+ { 666, 16 }, -+ { 800, 20 }, -+ { 933, 23 }, -+ { 1066, 26 }, -+ { 1200, 29 }, -+ { fmax, 32 }, -+ }; -+ return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut)); -+} -+ -+uint32_t get_tAONPD(const uint32_t mem_clock_mhz) -+{ -+ const struct timing_lookup lut[] = { -+ { 400, 4 }, -+ { 533, 5 }, -+ { 666, 6 }, -+ { 800, 7 }, /* SNB had 8 */ -+ { 933, 8 }, -+ { 1066, 10 }, -+ { 1200, 11 }, -+ { fmax, 12 }, -+ }; -+ return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut)); -+} -+ -+uint32_t get_tMOD(const uint32_t mem_clock_mhz) -+{ -+ const struct timing_lookup lut[] = { -+ { 800, 12 }, -+ { 933, 14 }, -+ { 1066, 16 }, -+ { 1200, 18 }, -+ { fmax, 20 }, -+ }; -+ return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut)); -+} -+ -+uint32_t get_tXS_offset(const uint32_t mem_clock_mhz) -+{ -+ return DIV_ROUND_UP(mem_clock_mhz, 100); -+} -+ -+static uint32_t get_lpddr_tZQOPER(const uint32_t mem_clock_mhz) -+{ -+ return (mem_clock_mhz * 360) / 1000; -+} -+ -+static uint32_t get_ddr_tZQOPER(const uint32_t mem_clock_mhz) -+{ -+ const struct timing_lookup lut[] = { -+ { 800, 256 }, -+ { 933, 299 }, -+ { 1066, 342 }, -+ { 1200, 384 }, -+ { fmax, 427 }, -+ }; -+ return lookup_timing(mem_clock_mhz, lut, ARRAY_SIZE(lut)); -+} -+ -+/* tZQOPER defines the period required for ZQCL after SR exit */ -+uint32_t get_tZQOPER(const uint32_t mem_clock_mhz, const bool lpddr) -+{ -+ return lpddr ? get_lpddr_tZQOPER(mem_clock_mhz) : get_ddr_tZQOPER(mem_clock_mhz); -+} -+ -+uint32_t get_tZQCS(const uint32_t mem_clock_mhz, const bool lpddr) -+{ -+ return DIV_ROUND_UP(get_tZQOPER(mem_clock_mhz, lpddr), 4); -+} -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -index fffa6d5450..5915a2bab0 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -@@ -156,6 +156,12 @@ struct sysinfo { - uint8_t cke_cmd_pi_code[NUM_CHANNELS][NUM_GROUPS]; - uint8_t cmd_north_pi_code[NUM_CHANNELS][NUM_GROUPS]; - uint8_t cmd_south_pi_code[NUM_CHANNELS][NUM_GROUPS]; -+ -+ union tc_bank_reg tc_bank[NUM_CHANNELS]; -+ union tc_bank_rank_a_reg tc_bankrank_a[NUM_CHANNELS]; -+ union tc_bank_rank_b_reg tc_bankrank_b[NUM_CHANNELS]; -+ union tc_bank_rank_c_reg tc_bankrank_c[NUM_CHANNELS]; -+ union tc_bank_rank_d_reg tc_bankrank_d[NUM_CHANNELS]; - }; - - static inline bool is_hsw_ult(void) -@@ -201,6 +207,14 @@ enum raminit_status configure_mc(struct sysinfo *ctrl); - void configure_timings(struct sysinfo *ctrl); - void configure_refresh(struct sysinfo *ctrl); - -+uint32_t get_tCKE(uint32_t mem_clock_mhz, bool lpddr); -+uint32_t get_tXPDLL(uint32_t mem_clock_mhz); -+uint32_t get_tAONPD(uint32_t mem_clock_mhz); -+uint32_t get_tMOD(uint32_t mem_clock_mhz); -+uint32_t get_tXS_offset(uint32_t mem_clock_mhz); -+uint32_t get_tZQOPER(uint32_t mem_clock_mhz, bool lpddr); -+uint32_t get_tZQCS(uint32_t mem_clock_mhz, bool lpddr); -+ - enum raminit_status wait_for_first_rcomp(void); - - uint8_t get_rx_bias(const struct sysinfo *ctrl); -diff --git a/src/northbridge/intel/haswell/native_raminit/reg_structs.h b/src/northbridge/intel/haswell/native_raminit/reg_structs.h -index d11cda4b3d..70487e1640 100644 ---- a/src/northbridge/intel/haswell/native_raminit/reg_structs.h -+++ b/src/northbridge/intel/haswell/native_raminit/reg_structs.h -@@ -335,6 +335,99 @@ union mcscheds_cbit_reg { - uint32_t raw; - }; - -+union tc_bank_reg { -+ struct __packed { -+ uint32_t tRCD : 5; // Bits 4:0 -+ uint32_t tRP : 5; // Bits 9:5 -+ uint32_t tRAS : 6; // Bits 15:10 -+ uint32_t tRDPRE : 4; // Bits 19:16 -+ uint32_t tWRPRE : 6; // Bits 25:20 -+ uint32_t tRRD : 4; // Bits 29:26 -+ uint32_t tRPab_ext : 2; // Bits 31:30 -+ }; -+ uint32_t raw; -+}; -+ -+union tc_bank_rank_a_reg { -+ struct __packed { -+ uint32_t tCKE : 4; // Bits 3:0 -+ uint32_t tFAW : 8; // Bits 11:4 -+ uint32_t tRDRD_sr : 3; // Bits 14:12 -+ uint32_t tRDRD_dr : 4; // Bits 18:15 -+ uint32_t tRDRD_dd : 4; // Bits 22:19 -+ uint32_t tRDPDEN : 5; // Bits 27:23 -+ uint32_t : 1; // Bits 28:28 -+ uint32_t cmd_3st_dis : 1; // Bits 29:29 -+ uint32_t cmd_stretch : 2; // Bits 31:30 -+ }; -+ uint32_t raw; -+}; -+ -+union tc_bank_rank_b_reg { -+ struct __packed { -+ uint32_t tWRRD_sr : 6; // Bits 5:0 -+ uint32_t tWRRD_dr : 4; // Bits 9:6 -+ uint32_t tWRRD_dd : 4; // Bits 13:10 -+ uint32_t tWRWR_sr : 3; // Bits 16:14 -+ uint32_t tWRWR_dr : 4; // Bits 20:17 -+ uint32_t tWRWR_dd : 4; // Bits 24:21 -+ uint32_t tWRPDEN : 6; // Bits 30:25 -+ uint32_t dec_wrd : 1; // Bits 31:31 -+ }; -+ uint32_t raw; -+}; -+ -+union tc_bank_rank_c_reg { -+ struct __packed { -+ uint32_t tXPDLL : 6; // Bits 5:0 -+ uint32_t tXP : 4; // Bits 9:6 -+ uint32_t tAONPD : 4; // Bits 13:10 -+ uint32_t tRDWR_sr : 5; // Bits 18:14 -+ uint32_t tRDWR_dr : 5; // Bits 23:19 -+ uint32_t tRDWR_dd : 5; // Bits 28:24 -+ uint32_t : 3; // Bits 31:29 -+ }; -+ uint32_t raw; -+}; -+ -+/* NOTE: Non-ULT only implements the lower 21 bits (odt_write_delay is 2 bits) */ -+union tc_bank_rank_d_reg { -+ struct __packed { -+ uint32_t tAA : 5; // Bits 4:0 -+ uint32_t tCWL : 5; // Bits 9:5 -+ uint32_t tCPDED : 2; // Bits 11:10 -+ uint32_t tPRPDEN : 2; // Bits 13:12 -+ uint32_t odt_read_delay : 3; // Bits 16:14 -+ uint32_t odt_read_duration : 2; // Bits 18:17 -+ uint32_t odt_write_duration : 3; // Bits 21:19 -+ uint32_t odt_write_delay : 3; // Bits 24:22 -+ uint32_t odt_always_rank_0 : 1; // Bits 25:25 -+ uint32_t cmd_delay : 2; // Bits 27:26 -+ uint32_t : 4; // Bits 31:28 -+ }; -+ uint32_t raw; -+}; -+ -+union tc_rftp_reg { -+ struct __packed { -+ uint32_t tREFI : 16; // Bits 15:0 -+ uint32_t tRFC : 9; // Bits 24:16 -+ uint32_t tREFIx9 : 7; // Bits 31:25 -+ }; -+ uint32_t raw; -+}; -+ -+union tc_srftp_reg { -+ struct __packed { -+ uint32_t tXSDLL : 12; // Bits 11:0 -+ uint32_t tXS_offset : 4; // Bits 15:12 -+ uint32_t tZQOPER : 10; // Bits 25:16 -+ uint32_t : 2; // Bits 27:26 -+ uint32_t tMOD : 4; // Bits 31:28 -+ }; -+ uint32_t raw; -+}; -+ - union mcmain_command_rate_limit_reg { - struct __packed { - uint32_t enable_cmd_limit : 1; // Bits 0:0 -diff --git a/src/northbridge/intel/haswell/native_raminit/timings_refresh.c b/src/northbridge/intel/haswell/native_raminit/timings_refresh.c -index a9d960f31b..54fee0121d 100644 ---- a/src/northbridge/intel/haswell/native_raminit/timings_refresh.c -+++ b/src/northbridge/intel/haswell/native_raminit/timings_refresh.c -@@ -1,13 +1,242 @@ - /* SPDX-License-Identifier: GPL-2.0-or-later */ - -+#include <assert.h> -+#include <commonlib/bsd/clamp.h> -+#include <console/console.h> -+#include <delay.h> -+#include <device/pci_ops.h> -+#include <northbridge/intel/haswell/haswell.h> -+ - #include "raminit_native.h" - -+#define BL 8 /* Burst length */ -+#define tCCD 4 -+#define tRPRE 1 -+#define tWPRE 1 -+#define tDLLK 512 -+ -+static bool is_sodimm(const enum spd_dimm_type_ddr3 type) -+{ -+ return type == SPD_DDR3_DIMM_TYPE_SO_DIMM || type == SPD_DDR3_DIMM_TYPE_72B_SO_UDIMM; -+} -+ -+static uint8_t get_odt_stretch(const struct sysinfo *const ctrl) -+{ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ /* Only stretch with 2 DIMMs per channel */ -+ if (ctrl->dpc[channel] != 2) -+ continue; -+ -+ const struct raminit_dimm_info *dimms = ctrl->dimms[channel]; -+ -+ /* Only stretch when using SO-DIMMs */ -+ if (!is_sodimm(dimms[0].data.dimm_type) || !is_sodimm(dimms[1].data.dimm_type)) -+ continue; -+ -+ /* Only stretch with mismatched card types */ -+ if (dimms[0].data.reference_card == dimms[1].data.reference_card) -+ continue; -+ -+ /* Stretch if one SO-DIMM is card F */ -+ for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) { -+ if (dimms[slot].data.reference_card == 5) -+ return 1; -+ } -+ } -+ return 0; -+} -+ -+static union tc_bank_reg make_tc_bank(struct sysinfo *const ctrl) -+{ -+ return (union tc_bank_reg) { -+ .tRCD = ctrl->tRCD, -+ .tRP = ctrl->tRP, -+ .tRAS = ctrl->tRAS, -+ .tRDPRE = ctrl->tRTP, -+ .tWRPRE = 4 + ctrl->tCWL + ctrl->tWR, -+ .tRRD = ctrl->tRRD, -+ .tRPab_ext = 0, /** TODO: For LPDDR, this is ctrl->tRPab - ctrl->tRP **/ -+ }; -+} -+ -+static union tc_bank_rank_a_reg make_tc_bankrank_a(struct sysinfo *ctrl, uint8_t odt_stretch) -+{ -+ /* Use 3N mode for DDR during training, but always use 1N mode for LPDDR */ -+ const uint32_t tCMD = ctrl->lpddr ? 0 : 3; -+ const uint32_t tRDRD_drdd = BL / 2 + 1 + tRPRE + odt_stretch + !!ctrl->lpddr; -+ -+ return (union tc_bank_rank_a_reg) { -+ .tCKE = get_tCKE(ctrl->mem_clock_mhz, ctrl->lpddr), -+ .tFAW = ctrl->tFAW, -+ .tRDRD_sr = tCCD, -+ .tRDRD_dr = tRDRD_drdd, -+ .tRDRD_dd = tRDRD_drdd, -+ .tRDPDEN = ctrl->tAA + BL / 2 + 1, -+ .cmd_3st_dis = 1, /* Disable command tri-state before training */ -+ .cmd_stretch = tCMD, -+ }; -+} -+ -+static union tc_bank_rank_b_reg make_tc_bankrank_b(struct sysinfo *const ctrl) -+{ -+ const uint8_t tWRRD_drdd = ctrl->tCWL - ctrl->tAA + BL / 2 + 2 + tRPRE; -+ const uint8_t tWRWR_drdd = BL / 2 + 2 + tWPRE; -+ -+ return (union tc_bank_rank_b_reg) { -+ .tWRRD_sr = tCCD + ctrl->tCWL + ctrl->tWTR + 2, -+ .tWRRD_dr = ctrl->lpddr ? 8 : tWRRD_drdd, -+ .tWRRD_dd = ctrl->lpddr ? 8 : tWRRD_drdd, -+ .tWRWR_sr = tCCD, -+ .tWRWR_dr = tWRWR_drdd, -+ .tWRWR_dd = tWRWR_drdd, -+ .tWRPDEN = ctrl->tWR + ctrl->tCWL + BL / 2, -+ .dec_wrd = ctrl->tCWL >= 6, -+ }; -+} -+ -+static uint32_t get_tRDWR_sr(const struct sysinfo *ctrl) -+{ -+ if (ctrl->lpddr) { -+ const uint32_t tdqsck_max = DIV_ROUND_UP(5500, ctrl->qclkps * 2); -+ return ctrl->tAA - ctrl->tCWL + tCCD + tWPRE + tdqsck_max + 1; -+ } else { -+ const bool fast_clock = ctrl->mem_clock_mhz > 666; -+ return ctrl->tAA - ctrl->tCWL + tCCD + tWPRE + 2 + fast_clock; -+ } -+} -+ -+static union tc_bank_rank_c_reg make_tc_bankrank_c(struct sysinfo *ctrl, uint8_t odt_stretch) -+{ -+ const uint32_t tRDWR_sr = get_tRDWR_sr(ctrl); -+ const uint32_t tRDWR_drdd = tRDWR_sr + odt_stretch; -+ -+ return (union tc_bank_rank_c_reg) { -+ .tXPDLL = get_tXPDLL(ctrl->mem_clock_mhz), -+ .tXP = MAX(ctrl->tXP, 7), /* Use a higher tXP for training */ -+ .tAONPD = get_tAONPD(ctrl->mem_clock_mhz), -+ .tRDWR_sr = tRDWR_sr, -+ .tRDWR_dr = tRDWR_drdd, -+ .tRDWR_dd = tRDWR_drdd, -+ }; -+} -+ -+static union tc_bank_rank_d_reg make_tc_bankrank_d(struct sysinfo *ctrl, uint8_t odt_stretch) -+{ -+ const uint32_t odt_rd_delay = ctrl->tAA - ctrl->tCWL; -+ if (!ctrl->lpddr) { -+ return (union tc_bank_rank_d_reg) { -+ .tAA = ctrl->tAA, -+ .tCWL = ctrl->tCWL, -+ .tCPDED = 1, -+ .tPRPDEN = 1, -+ .odt_read_delay = odt_rd_delay, -+ .odt_read_duration = odt_stretch, -+ }; -+ } -+ -+ /* tCWL has 1 extra clock because of tDQSS, subtract it here */ -+ const uint32_t tCWL_lpddr = ctrl->tCWL - 1; -+ const uint32_t odt_wr_delay = tCWL_lpddr + DIV_ROUND_UP(3500, ctrl->qclkps * 2); -+ const uint32_t odt_wr_duration = DIV_ROUND_UP(3500 - 1750, ctrl->qclkps * 2) + 1; -+ -+ return (union tc_bank_rank_d_reg) { -+ .tAA = ctrl->tAA, -+ .tCWL = tCWL_lpddr, -+ .tCPDED = 2, /* Required by JEDEC LPDDR3 spec */ -+ .tPRPDEN = 1, -+ .odt_read_delay = odt_rd_delay, -+ .odt_read_duration = odt_stretch, -+ .odt_write_delay = odt_wr_delay, -+ .odt_write_duration = odt_wr_duration, -+ .odt_always_rank_0 = ctrl->lpddr_dram_odt -+ }; -+} -+ -+/* ZQCS period values, in (tREFI * 128) units */ -+#define ZQCS_PERIOD_DDR3 128 /* tREFI * 128 = 7.8 us * 128 = 1ms */ -+#define ZQCS_PERIOD_LPDDR3 256 /* tREFI * 128 = 3.9 us * 128 = 0.5ms */ -+ -+static uint32_t make_tc_zqcal(const struct sysinfo *const ctrl) -+{ -+ const uint32_t zqcs_period = ctrl->lpddr ? ZQCS_PERIOD_LPDDR3 : ZQCS_PERIOD_DDR3; -+ const uint32_t tZQCS = get_tZQCS(ctrl->mem_clock_mhz, ctrl->lpddr); -+ return tZQCS << (is_hsw_ult() ? 10 : 8) | zqcs_period; -+} -+ -+static union tc_rftp_reg make_tc_rftp(const struct sysinfo *const ctrl) -+{ -+ /* -+ * The tREFIx9 field should be programmed to minimum of 8.9 * tREFI (to allow -+ * for possible delays from ZQ or isoc) and tRASmax (70us) divided by 1024. -+ */ -+ return (union tc_rftp_reg) { -+ .tREFI = ctrl->tREFI, -+ .tRFC = ctrl->tRFC, -+ .tREFIx9 = ctrl->tREFI * 89 / 10240, -+ }; -+} -+ -+static union tc_srftp_reg make_tc_srftp(const struct sysinfo *const ctrl) -+{ -+ return (union tc_srftp_reg) { -+ .tXSDLL = tDLLK, -+ .tXS_offset = get_tXS_offset(ctrl->mem_clock_mhz), -+ .tZQOPER = get_tZQOPER(ctrl->mem_clock_mhz, ctrl->lpddr), -+ .tMOD = get_tMOD(ctrl->mem_clock_mhz) - 8, -+ }; -+} -+ - void configure_timings(struct sysinfo *ctrl) - { -- /** TODO: Stub **/ -+ if (ctrl->lpddr) -+ die("%s: Missing support for LPDDR\n", __func__); -+ -+ const uint8_t odt_stretch = get_odt_stretch(ctrl); -+ const union tc_bank_reg tc_bank = make_tc_bank(ctrl); -+ const union tc_bank_rank_a_reg tc_bank_rank_a = make_tc_bankrank_a(ctrl, odt_stretch); -+ const union tc_bank_rank_b_reg tc_bank_rank_b = make_tc_bankrank_b(ctrl); -+ const union tc_bank_rank_c_reg tc_bank_rank_c = make_tc_bankrank_c(ctrl, odt_stretch); -+ const union tc_bank_rank_d_reg tc_bank_rank_d = make_tc_bankrank_d(ctrl, odt_stretch); -+ -+ const uint8_t wr_delay = tc_bank_rank_b.dec_wrd + 1; -+ uint8_t sc_wr_add_delay = 0; -+ sc_wr_add_delay |= wr_delay << 0; -+ sc_wr_add_delay |= wr_delay << 2; -+ sc_wr_add_delay |= wr_delay << 4; -+ sc_wr_add_delay |= wr_delay << 6; -+ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ ctrl->tc_bank[channel] = tc_bank; -+ ctrl->tc_bankrank_a[channel] = tc_bank_rank_a; -+ ctrl->tc_bankrank_b[channel] = tc_bank_rank_b; -+ ctrl->tc_bankrank_c[channel] = tc_bank_rank_c; -+ ctrl->tc_bankrank_d[channel] = tc_bank_rank_d; -+ -+ mchbar_write32(TC_BANK_ch(channel), ctrl->tc_bank[channel].raw); -+ mchbar_write32(TC_BANK_RANK_A_ch(channel), ctrl->tc_bankrank_a[channel].raw); -+ mchbar_write32(TC_BANK_RANK_B_ch(channel), ctrl->tc_bankrank_b[channel].raw); -+ mchbar_write32(TC_BANK_RANK_C_ch(channel), ctrl->tc_bankrank_c[channel].raw); -+ mchbar_write32(TC_BANK_RANK_D_ch(channel), ctrl->tc_bankrank_d[channel].raw); -+ mchbar_write8(SC_WR_ADD_DELAY_ch(channel), sc_wr_add_delay); -+ } - } - - void configure_refresh(struct sysinfo *ctrl) - { -- /** TODO: Stub **/ -+ const union tc_srftp_reg tc_srftp = make_tc_srftp(ctrl); -+ const union tc_rftp_reg tc_rftp = make_tc_rftp(ctrl); -+ const uint32_t tc_zqcal = make_tc_zqcal(ctrl); -+ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ mchbar_setbits32(TC_RFP_ch(channel), 0xff); -+ mchbar_write32(TC_RFTP_ch(channel), tc_rftp.raw); -+ mchbar_write32(TC_SRFTP_ch(channel), tc_srftp.raw); -+ mchbar_write32(TC_ZQCAL_ch(channel), tc_zqcal); -+ } - } -diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h -index 4c3f399b5d..2acc5cbbc8 100644 ---- a/src/northbridge/intel/haswell/registers/mchbar.h -+++ b/src/northbridge/intel/haswell/registers/mchbar.h -@@ -86,9 +86,21 @@ - #define DDR_COMP_VSSHI_CONTROL 0x3a24 - - /* MCMAIN per-channel */ -+#define TC_BANK_ch(ch) _MCMAIN_C(0x4000, ch) -+#define TC_BANK_RANK_A_ch(ch) _MCMAIN_C(0x4004, ch) -+#define TC_BANK_RANK_B_ch(ch) _MCMAIN_C(0x4008, ch) -+#define TC_BANK_RANK_C_ch(ch) _MCMAIN_C(0x400c, ch) - #define COMMAND_RATE_LIMIT_ch(ch) _MCMAIN_C(0x4010, ch) -+#define TC_BANK_RANK_D_ch(ch) _MCMAIN_C(0x4014, ch) -+#define SC_ROUNDT_LAT_ch(ch) _MCMAIN_C(0x4024, ch) - -+#define SC_WR_ADD_DELAY_ch(ch) _MCMAIN_C(0x40d0, ch) -+ -+#define TC_ZQCAL_ch(ch) _MCMAIN_C(0x4290, ch) -+#define TC_RFP_ch(ch) _MCMAIN_C(0x4294, ch) -+#define TC_RFTP_ch(ch) _MCMAIN_C(0x4298, ch) - #define MC_INIT_STATE_ch(ch) _MCMAIN_C(0x42a0, ch) -+#define TC_SRFTP_ch(ch) _MCMAIN_C(0x42a4, ch) - - /* MCMAIN broadcast */ - #define MCSCHEDS_CBIT 0x4c20 --- -2.39.5 - diff --git a/config/coreboot/next/patches/0009-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch b/config/coreboot/default/patches/0033-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch index cd6cdb02..487b32a2 100644 --- a/config/coreboot/next/patches/0009-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch +++ b/config/coreboot/default/patches/0033-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch @@ -1,7 +1,7 @@ -From 35295d97b08ee659b6770ce39003732a4bdfb6a0 Mon Sep 17 00:00:00 2001 +From 25ff99ff021312387734a10836232a5f3a2d2a12 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Wed, 18 Dec 2024 02:06:18 +0000 -Subject: [PATCH 09/11] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN +Subject: [PATCH 33/40] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN This is used by lbmk to know where a tb.bin file goes, when extracting and padding TBT.bin from Lenovo ThunderBolt @@ -74,5 +74,5 @@ index 2ffbaab85f..512b326381 100644 + endif # VENDOR_LENOVO -- -2.39.5 +2.47.3 diff --git a/config/coreboot/default/patches/0034-Conditional-TBFW-setting-for-T480-T480S.patch b/config/coreboot/default/patches/0034-Conditional-TBFW-setting-for-T480-T480S.patch new file mode 100644 index 00000000..1aeae433 --- /dev/null +++ b/config/coreboot/default/patches/0034-Conditional-TBFW-setting-for-T480-T480S.patch @@ -0,0 +1,37 @@ +From 57630265c7ba2429a8215757330348733c087db3 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Mon, 21 Apr 2025 05:14:45 +0100 +Subject: [PATCH 34/40] Conditional TBFW setting for T480/T480S + +Otherwise, other boards will define it, which +might trigger the vendor download script, and +lead to a non-zero exit. + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + src/mainboard/lenovo/Kconfig | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/src/mainboard/lenovo/Kconfig b/src/mainboard/lenovo/Kconfig +index 512b326381..3d3490b35d 100644 +--- a/src/mainboard/lenovo/Kconfig ++++ b/src/mainboard/lenovo/Kconfig +@@ -18,6 +18,8 @@ config MAINBOARD_FAMILY + string + default MAINBOARD_PART_NUMBER + ++if BOARD_LENOVO_T480 || BOARD_LENOVO_T480S ++ + config LENOVO_TBFW_BIN + string "Lenovo ThunderBolt firmware bin file" + default "" +@@ -44,4 +46,6 @@ config LENOVO_TBFW_BIN + Just leave this blank if you don't care about this option. It's not + useful for every ThinkPad, only certain models. + ++endif # BOARD LENOVO_T480 || BOARD_LENOVO_T480S ++ + endif # VENDOR_LENOVO +-- +2.47.3 + diff --git a/config/coreboot/default/patches/0034-haswell-NRI-Program-memory-map.patch b/config/coreboot/default/patches/0034-haswell-NRI-Program-memory-map.patch deleted file mode 100644 index bb3ed03d..00000000 --- a/config/coreboot/default/patches/0034-haswell-NRI-Program-memory-map.patch +++ /dev/null @@ -1,263 +0,0 @@ -From ded914f236f76715aa43cb439a3de7df9a3dfa11 Mon Sep 17 00:00:00 2001 -From: Angel Pons <th3fanbus@gmail.com> -Date: Sat, 7 May 2022 21:24:50 +0200 -Subject: [PATCH 34/51] haswell NRI: Program memory map - -This is very similar to Sandy/Ivy Bridge, except that there's several -registers to program in GDXCBAR. One of these GDXCBAR registers has a -lock bit that must be set in order for the memory controller to allow -normal access to DRAM. And it took me four months to realize this one -bit was the only reason why native raminit did not work. - -Change-Id: I3af73a018a7ba948701a542e661e7fefd57591fe -Signed-off-by: Angel Pons <th3fanbus@gmail.com> ---- - .../intel/haswell/native_raminit/Makefile.mk | 1 + - .../intel/haswell/native_raminit/memory_map.c | 183 ++++++++++++++++++ - .../haswell/native_raminit/raminit_main.c | 1 + - .../haswell/native_raminit/raminit_native.h | 1 + - .../intel/haswell/registers/host_bridge.h | 2 + - 5 files changed, 188 insertions(+) - create mode 100644 src/northbridge/intel/haswell/native_raminit/memory_map.c - -diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -index fc55277a65..37d527e972 100644 ---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk -+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -@@ -4,6 +4,7 @@ romstage-y += configure_mc.c - romstage-y += lookup_timings.c - romstage-y += init_mpll.c - romstage-y += io_comp_control.c -+romstage-y += memory_map.c - romstage-y += raminit_main.c - romstage-y += raminit_native.c - romstage-y += spd_bitmunching.c -diff --git a/src/northbridge/intel/haswell/native_raminit/memory_map.c b/src/northbridge/intel/haswell/native_raminit/memory_map.c -new file mode 100644 -index 0000000000..e3aded2b37 ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/memory_map.c -@@ -0,0 +1,183 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <device/pci_ops.h> -+#include <northbridge/intel/haswell/haswell.h> -+#include <southbridge/intel/lynxpoint/me.h> -+#include <types.h> -+ -+#include "raminit_native.h" -+ -+/* GDXCBAR */ -+#define MPCOHTRK_GDXC_MOT_ADDRESS_LO 0x10 -+#define MPCOHTRK_GDXC_MOT_ADDRESS_HI 0x14 -+#define MPCOHTRK_GDXC_MOT_REGION 0x18 -+ -+#define MPCOHTRK_GDXC_OCLA_ADDRESS_LO 0x20 -+#define MPCOHTRK_GDXC_OCLA_ADDRESS_HI 0x24 -+#define MPCOHTRK_GDXC_OCLA_REGION 0x28 -+ -+/* This lock bit made me lose what little sanity I had left. - Angel Pons */ -+#define MPCOHTRK_GDXC_OCLA_ADDRESS_HI_LOCK BIT(2) -+ -+static inline uint32_t gdxcbar_read32(const uintptr_t offset) -+{ -+ return read32p((mchbar_read32(GDXCBAR) & ~1) + offset); -+} -+ -+static inline void gdxcbar_write32(const uintptr_t offset, const uint32_t value) -+{ -+ write32p((mchbar_read32(GDXCBAR) & ~1) + offset, value); -+} -+ -+static inline void gdxcbar_clrsetbits32(const uintptr_t offset, uint32_t clear, uint32_t set) -+{ -+ const uintptr_t address = (mchbar_read32(GDXCBAR) & ~1) + offset; -+ clrsetbits32((void *)address, clear, set); -+} -+ -+#define gdxcbar_setbits32(offset, set) gdxcbar_clrsetbits32(offset, 0, set) -+#define gdxcbar_clrbits32(offset, clear) gdxcbar_clrsetbits32(offset, clear, 0) -+ -+/* All values stored in here (except the bool) are specified in MiB */ -+struct memory_map_data { -+ uint32_t dpr_size; -+ uint32_t tseg_size; -+ uint32_t gtt_size; -+ uint32_t gms_size; -+ uint32_t me_stolen_size; -+ uint32_t mmio_size; -+ uint32_t touud; -+ uint32_t remaplimit; -+ uint32_t remapbase; -+ uint32_t tom; -+ uint32_t tom_minus_me; -+ uint32_t tolud; -+ uint32_t bdsm_base; -+ uint32_t gtt_base; -+ uint32_t tseg_base; -+ bool reclaim_possible; -+}; -+ -+static void compute_memory_map(struct memory_map_data *map) -+{ -+ map->tom_minus_me = map->tom - map->me_stolen_size; -+ -+ /* -+ * MMIO size will actually be slightly smaller than computed, -+ * but matches what MRC does and is more MTRR-friendly given -+ * that TSEG is treated as WB, but SMRR makes TSEG UC anyway. -+ */ -+ const uint32_t mmio_size = MIN(map->tom_minus_me, 4096) / 2; -+ map->gtt_base = ALIGN_DOWN(mmio_size, map->tseg_size); -+ map->tseg_base = map->gtt_base - map->tseg_size; -+ map->bdsm_base = map->gtt_base + map->gtt_size; -+ map->tolud = map->bdsm_base + map->gms_size; -+ map->reclaim_possible = map->tom_minus_me > map->tolud; -+ -+ if (map->reclaim_possible) { -+ map->remapbase = MAX(4096, map->tom_minus_me); -+ map->touud = MIN(4096, map->tom_minus_me) + map->remapbase - map->tolud; -+ map->remaplimit = map->touud - 1; -+ } else { -+ map->remapbase = 0; -+ map->remaplimit = 0; -+ map->touud = map->tom_minus_me; -+ } -+} -+ -+static void display_memory_map(const struct memory_map_data *map) -+{ -+ if (!CONFIG(DEBUG_RAM_SETUP)) -+ return; -+ -+ printk(BIOS_DEBUG, "============ MEMORY MAP ============\n"); -+ printk(BIOS_DEBUG, "\n"); -+ printk(BIOS_DEBUG, "dpr_size = %u MiB\n", map->dpr_size); -+ printk(BIOS_DEBUG, "tseg_size = %u MiB\n", map->tseg_size); -+ printk(BIOS_DEBUG, "gtt_size = %u MiB\n", map->gtt_size); -+ printk(BIOS_DEBUG, "gms_size = %u MiB\n", map->gms_size); -+ printk(BIOS_DEBUG, "me_stolen_size = %u MiB\n", map->me_stolen_size); -+ printk(BIOS_DEBUG, "\n"); -+ printk(BIOS_DEBUG, "touud = %u MiB\n", map->touud); -+ printk(BIOS_DEBUG, "remaplimit = %u MiB\n", map->remaplimit); -+ printk(BIOS_DEBUG, "remapbase = %u MiB\n", map->remapbase); -+ printk(BIOS_DEBUG, "tom = %u MiB\n", map->tom); -+ printk(BIOS_DEBUG, "tom_minus_me = %u MiB\n", map->tom_minus_me); -+ printk(BIOS_DEBUG, "tolud = %u MiB\n", map->tolud); -+ printk(BIOS_DEBUG, "bdsm_base = %u MiB\n", map->bdsm_base); -+ printk(BIOS_DEBUG, "gtt_base = %u MiB\n", map->gtt_base); -+ printk(BIOS_DEBUG, "tseg_base = %u MiB\n", map->tseg_base); -+ printk(BIOS_DEBUG, "\n"); -+ printk(BIOS_DEBUG, "reclaim_possible = %s\n", map->reclaim_possible ? "Yes" : "No"); -+} -+ -+static void map_write_reg64(const uint16_t reg, const uint64_t size) -+{ -+ const uint64_t value = size << 20; -+ pci_write_config32(HOST_BRIDGE, reg + 4, value >> 32); -+ pci_write_config32(HOST_BRIDGE, reg + 0, value >> 0); -+} -+ -+static void map_write_reg32(const uint16_t reg, const uint32_t size) -+{ -+ const uint32_t value = size << 20; -+ pci_write_config32(HOST_BRIDGE, reg, value); -+} -+ -+static void program_memory_map(const struct memory_map_data *map) -+{ -+ map_write_reg64(TOUUD, map->touud); -+ map_write_reg64(TOM, map->tom); -+ if (map->reclaim_possible) { -+ map_write_reg64(REMAPBASE, map->remapbase); -+ map_write_reg64(REMAPLIMIT, map->remaplimit); -+ } -+ if (map->me_stolen_size) { -+ map_write_reg64(MESEG_LIMIT, 0x80000 - map->me_stolen_size); -+ map_write_reg64(MESEG_BASE, map->tom_minus_me); -+ pci_or_config32(HOST_BRIDGE, MESEG_LIMIT, ME_STLEN_EN); -+ } -+ map_write_reg32(TOLUD, map->tolud); -+ map_write_reg32(BDSM, map->bdsm_base); -+ map_write_reg32(BGSM, map->gtt_base); -+ map_write_reg32(TSEG, map->tseg_base); -+ -+ const uint32_t dpr_reg = map->tseg_base << 20 | map->dpr_size << 4; -+ pci_write_config32(HOST_BRIDGE, DPR, dpr_reg); -+ -+ const uint16_t gfx_stolen_size = GGC_IGD_MEM_IN_32MB_UNITS(map->gms_size / 32); -+ const uint16_t ggc = map->gtt_size << 8 | gfx_stolen_size; -+ pci_write_config16(HOST_BRIDGE, GGC, ggc); -+ -+ /** TODO: Do not hardcode these? GDXC has weird alignment requirements, though. **/ -+ gdxcbar_write32(MPCOHTRK_GDXC_MOT_ADDRESS_LO, 0); -+ gdxcbar_write32(MPCOHTRK_GDXC_MOT_ADDRESS_HI, 0); -+ gdxcbar_write32(MPCOHTRK_GDXC_MOT_REGION, 0); -+ -+ gdxcbar_write32(MPCOHTRK_GDXC_OCLA_ADDRESS_LO, 0); -+ gdxcbar_write32(MPCOHTRK_GDXC_OCLA_ADDRESS_HI, 0); -+ gdxcbar_write32(MPCOHTRK_GDXC_OCLA_REGION, 0); -+ -+ gdxcbar_setbits32(MPCOHTRK_GDXC_OCLA_ADDRESS_HI, MPCOHTRK_GDXC_OCLA_ADDRESS_HI_LOCK); -+} -+ -+enum raminit_status configure_memory_map(struct sysinfo *ctrl) -+{ -+ struct memory_map_data memory_map = { -+ .tom = ctrl->channel_size_mb[0] + ctrl->channel_size_mb[1], -+ .dpr_size = CONFIG_INTEL_TXT_DPR_SIZE, -+ .tseg_size = CONFIG_SMM_TSEG_SIZE >> 20, -+ .me_stolen_size = intel_early_me_uma_size(), -+ }; -+ /** FIXME: MRC hardcodes iGPU parameters, but we should not **/ -+ const bool igpu_on = pci_read_config32(HOST_BRIDGE, DEVEN) & DEVEN_D2EN; -+ if (CONFIG(ONBOARD_VGA_IS_PRIMARY) || igpu_on) { -+ memory_map.gtt_size = 2; -+ memory_map.gms_size = 64; -+ pci_or_config32(HOST_BRIDGE, DEVEN, DEVEN_D2EN); -+ } -+ compute_memory_map(&memory_map); -+ display_memory_map(&memory_map); -+ program_memory_map(&memory_map); -+ return 0; -+} -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -index fcc981ad04..559dfc3a4e 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -@@ -23,6 +23,7 @@ static const struct task_entry cold_boot[] = { - { initialise_mpll, true, "INITMPLL", }, - { convert_timings, true, "CONVTIM", }, - { configure_mc, true, "CONFMC", }, -+ { configure_memory_map, true, "MEMMAP", }, - }; - - /* Return a generic stepping value to make stepping checks simpler */ -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -index 5915a2bab0..8f937c4ccd 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -@@ -203,6 +203,7 @@ enum raminit_status collect_spd_info(struct sysinfo *ctrl); - enum raminit_status initialise_mpll(struct sysinfo *ctrl); - enum raminit_status convert_timings(struct sysinfo *ctrl); - enum raminit_status configure_mc(struct sysinfo *ctrl); -+enum raminit_status configure_memory_map(struct sysinfo *ctrl); - - void configure_timings(struct sysinfo *ctrl); - void configure_refresh(struct sysinfo *ctrl); -diff --git a/src/northbridge/intel/haswell/registers/host_bridge.h b/src/northbridge/intel/haswell/registers/host_bridge.h -index 1ee0ab2890..0228cf6bb9 100644 ---- a/src/northbridge/intel/haswell/registers/host_bridge.h -+++ b/src/northbridge/intel/haswell/registers/host_bridge.h -@@ -34,6 +34,8 @@ - - #define MESEG_BASE 0x70 /* Management Engine Base */ - #define MESEG_LIMIT 0x78 /* Management Engine Limit */ -+#define MELCK (1 << 10) /* ME Range Lock */ -+#define ME_STLEN_EN (1 << 11) /* ME Stolen Memory Enable */ - - #define PAM0 0x80 - #define PAM1 0x81 --- -2.39.5 - diff --git a/config/coreboot/default/patches/0035-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch b/config/coreboot/default/patches/0035-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch deleted file mode 100644 index 29bdec9f..00000000 --- a/config/coreboot/default/patches/0035-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch +++ /dev/null @@ -1,1036 +0,0 @@ -From db2b383a8ee5a4fc45c9ce0003ae45f25ed51f86 Mon Sep 17 00:00:00 2001 -From: Angel Pons <th3fanbus@gmail.com> -Date: Sat, 7 May 2022 21:49:40 +0200 -Subject: [PATCH 35/51] haswell NRI: Add DDR3 JEDEC reset and init - -Implement JEDEC reset and init sequence for DDR3. The MRS commands are -issued through the REUT (Robust Electrical Unified Testing) hardware. - -Change-Id: I2a0c066537021b587599228086727cb1e041bff5 -Signed-off-by: Angel Pons <th3fanbus@gmail.com> ---- - .../intel/haswell/native_raminit/Makefile.mk | 3 + - .../intel/haswell/native_raminit/ddr3.c | 217 ++++++++++++++++++ - .../haswell/native_raminit/io_comp_control.c | 19 ++ - .../haswell/native_raminit/jedec_reset.c | 120 ++++++++++ - .../haswell/native_raminit/raminit_main.c | 2 + - .../haswell/native_raminit/raminit_native.h | 99 ++++++++ - .../haswell/native_raminit/reg_structs.h | 154 +++++++++++++ - .../intel/haswell/native_raminit/reut.c | 196 ++++++++++++++++ - .../intel/haswell/registers/mchbar.h | 21 ++ - src/southbridge/intel/lynxpoint/pch.h | 2 + - 10 files changed, 833 insertions(+) - create mode 100644 src/northbridge/intel/haswell/native_raminit/ddr3.c - create mode 100644 src/northbridge/intel/haswell/native_raminit/jedec_reset.c - create mode 100644 src/northbridge/intel/haswell/native_raminit/reut.c - -diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -index 37d527e972..e9212df9e6 100644 ---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk -+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -@@ -1,11 +1,14 @@ - ## SPDX-License-Identifier: GPL-2.0-or-later - - romstage-y += configure_mc.c -+romstage-y += ddr3.c -+romstage-y += jedec_reset.c - romstage-y += lookup_timings.c - romstage-y += init_mpll.c - romstage-y += io_comp_control.c - romstage-y += memory_map.c - romstage-y += raminit_main.c - romstage-y += raminit_native.c -+romstage-y += reut.c - romstage-y += spd_bitmunching.c - romstage-y += timings_refresh.c -diff --git a/src/northbridge/intel/haswell/native_raminit/ddr3.c b/src/northbridge/intel/haswell/native_raminit/ddr3.c -new file mode 100644 -index 0000000000..6ddb11488b ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/ddr3.c -@@ -0,0 +1,217 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <assert.h> -+#include <console/console.h> -+#include <northbridge/intel/haswell/haswell.h> -+#include <types.h> -+ -+#include "raminit_native.h" -+ -+#define DDR3_RTTNOM(a, b, c) (((a) << 9) | ((b) << 6) | ((c) << 2)) -+ -+uint16_t encode_ddr3_rttnom(const uint32_t rttnom) -+{ -+ switch (rttnom) { -+ case 0: return DDR3_RTTNOM(0, 0, 0); /* RttNom is disabled */ -+ case 20: return DDR3_RTTNOM(1, 0, 0); /* RZQ/12 */ -+ case 30: return DDR3_RTTNOM(1, 0, 1); /* RZQ/8 */ -+ case 40: return DDR3_RTTNOM(0, 1, 1); /* RZQ/6 */ -+ case 60: return DDR3_RTTNOM(0, 0, 1); /* RZQ/4 */ -+ case 120: return DDR3_RTTNOM(0, 1, 0); /* RZQ/2 */ -+ } -+ printk(BIOS_ERR, "%s: Invalid rtt_nom value %u\n", __func__, rttnom); -+ return 0; -+} -+ -+static const uint8_t jedec_wr_t[12] = { 1, 2, 3, 4, 5, 5, 6, 6, 7, 7, 0, 0 }; -+ -+static void ddr3_program_mr0(struct sysinfo *ctrl, const uint8_t dll_reset) -+{ -+ assert(ctrl->tWR >= 5 && ctrl->tWR <= 16); -+ assert(ctrl->tAA >= 4); -+ const uint8_t jedec_cas = ctrl->tAA - 4; -+ const union { -+ struct __packed { -+ uint16_t burst_length : 2; // Bits 1:0 -+ uint16_t cas_latency_msb : 1; // Bits 2:2 -+ uint16_t read_burst_type : 1; // Bits 3:3 -+ uint16_t cas_latency_low : 3; // Bits 6:4 -+ uint16_t test_mode : 1; // Bits 7:7 -+ uint16_t dll_reset : 1; // Bits 8:8 -+ uint16_t write_recovery : 3; // Bits 11:9 -+ uint16_t precharge_pd_dll : 1; // Bits 12:12 -+ uint16_t : 3; // Bits 15:13 -+ }; -+ uint16_t raw; -+ } mr0reg = { -+ .burst_length = 0, -+ .cas_latency_msb = !!(jedec_cas & BIT(3)), -+ .read_burst_type = 0, -+ .cas_latency_low = jedec_cas & 0x7, -+ .dll_reset = 1, -+ .write_recovery = jedec_wr_t[ctrl->tWR - 5], -+ .precharge_pd_dll = 0, -+ }; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) { -+ if (!rank_in_ch(ctrl, slot + slot, channel)) -+ continue; -+ -+ if (!ctrl->restore_mrs) -+ ctrl->mr0[channel][slot] = mr0reg.raw; -+ } -+ reut_issue_mrs_all(ctrl, channel, 0, ctrl->mr0[channel]); -+ } -+} -+ -+void ddr3_program_mr1(struct sysinfo *ctrl, const uint8_t wl_mode, const uint8_t q_off) -+{ -+ /* -+ * JESD79-3F (JEDEC DDR3 spec) refers to bit 0 of MR1 as 'DLL Enable'. -+ * However, its encoding is weird, and 'DLL Disable' makes more sense. -+ * -+ * Moreover, bit 5 is part of ODIC (Output Driver Impedance Control), -+ * but all encodings where MR1 bit 5 is 1 are reserved. Thus, omit it. -+ */ -+ union { -+ struct __packed { -+ uint16_t dll_disable : 1; // Bits 0:0 -+ uint16_t od_impedance_ctl : 1; // Bits 1:1 -+ uint16_t odt_rtt_nom_low : 1; // Bits 2:2 -+ uint16_t additive_latency : 2; // Bits 4:3 -+ uint16_t : 1; // Bits 5:5 -+ uint16_t odt_rtt_nom_mid : 1; // Bits 6:6 -+ uint16_t write_level_mode : 1; // Bits 7:7 -+ uint16_t : 1; // Bits 8:8 -+ uint16_t odt_rtt_nom_high : 1; // Bits 9:9 -+ uint16_t : 1; // Bits 10:10 -+ uint16_t t_dqs : 1; // Bits 11:11 -+ uint16_t q_off : 1; // Bits 12:12 -+ uint16_t : 3; // Bits 15:13 -+ }; -+ uint16_t raw; -+ } mr1reg = { -+ .dll_disable = 0, -+ .od_impedance_ctl = 1, /* RZQ/7 */ -+ .additive_latency = 0, -+ .write_level_mode = wl_mode, -+ .t_dqs = 0, -+ .q_off = q_off, -+ }; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ mr1reg.raw &= ~RTTNOM_MASK; -+ mr1reg.raw |= encode_ddr3_rttnom(ctrl->dpc[channel] == 2 ? 60 : 0); -+ for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) { -+ if (!rank_in_ch(ctrl, slot + slot, channel)) -+ continue; -+ -+ if (!ctrl->restore_mrs) -+ ctrl->mr1[channel][slot] = mr1reg.raw; -+ } -+ reut_issue_mrs_all(ctrl, channel, 1, ctrl->mr1[channel]); -+ } -+} -+ -+enum { -+ RTT_WR_OFF = 0, -+ RTT_WR_60 = 1, -+ RTT_WR_120 = 2, -+}; -+ -+static void ddr3_program_mr2(struct sysinfo *ctrl) -+{ -+ assert(ctrl->tCWL >= 5); -+ const bool dimm_srt = ctrl->flags.ext_temp_refresh && !ctrl->flags.asr; -+ -+ const union { -+ struct __packed { -+ uint16_t partial_array_sr : 3; // Bits 0:2 -+ uint16_t cas_write_latency : 3; // Bits 5:3 -+ uint16_t auto_self_refresh : 1; // Bits 6:6 -+ uint16_t self_refresh_temp : 1; // Bits 7:7 -+ uint16_t : 1; // Bits 8:8 -+ uint16_t odt_rtt_wr : 2; // Bits 10:9 -+ uint16_t : 5; // Bits 15:11 -+ }; -+ uint16_t raw; -+ } mr2reg = { -+ .partial_array_sr = 0, -+ .cas_write_latency = ctrl->tCWL - 5, -+ .auto_self_refresh = ctrl->flags.asr, -+ .self_refresh_temp = dimm_srt, -+ .odt_rtt_wr = is_hsw_ult() ? RTT_WR_120 : RTT_WR_60, -+ }; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) { -+ if (!rank_in_ch(ctrl, slot + slot, channel)) -+ continue; -+ -+ if (!ctrl->restore_mrs) -+ ctrl->mr2[channel][slot] = mr2reg.raw; -+ } -+ /* MR2 shadow register is similar but not identical to MR2 */ -+ if (!ctrl->restore_mrs) { -+ union tc_mr2_shadow_reg tc_mr2_shadow = { -+ .raw = mr2reg.raw & 0x073f, -+ }; -+ for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) { -+ if (!rank_in_ch(ctrl, slot + slot, channel)) -+ continue; -+ -+ if (dimm_srt) -+ tc_mr2_shadow.srt_available |= BIT(slot); -+ -+ if (ctrl->rank_mirrored[channel] & BIT(slot + slot + 1)) -+ tc_mr2_shadow.addr_bit_swizzle |= BIT(slot); -+ } -+ mchbar_write32(TC_MR2_SHADOW_ch(channel), tc_mr2_shadow.raw); -+ } -+ reut_issue_mrs_all(ctrl, channel, 2, ctrl->mr2[channel]); -+ } -+} -+ -+static void ddr3_program_mr3(struct sysinfo *ctrl, const uint8_t mpr_mode) -+{ -+ const union { -+ struct __packed { -+ uint16_t mpr_loc : 2; // Bits 1:0 -+ uint16_t mpr_mode : 1; // Bits 2:2 -+ uint16_t : 13; // Bits 15:3 -+ }; -+ uint16_t raw; -+ } mr3reg = { -+ .mpr_loc = 0, -+ .mpr_mode = mpr_mode, -+ }; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) { -+ if (!rank_in_ch(ctrl, slot + slot, channel)) -+ continue; -+ -+ if (!ctrl->restore_mrs) -+ ctrl->mr3[channel][slot] = mr3reg.raw; -+ } -+ reut_issue_mrs_all(ctrl, channel, 3, ctrl->mr3[channel]); -+ } -+} -+ -+enum raminit_status ddr3_jedec_init(struct sysinfo *ctrl) -+{ -+ ddr3_program_mr2(ctrl); -+ ddr3_program_mr3(ctrl, 0); -+ ddr3_program_mr1(ctrl, 0, 0); -+ ddr3_program_mr0(ctrl, 1); -+ return reut_issue_zq(ctrl, ctrl->chanmap, ZQ_INIT); -+} -diff --git a/src/northbridge/intel/haswell/native_raminit/io_comp_control.c b/src/northbridge/intel/haswell/native_raminit/io_comp_control.c -index d45b608dd3..8a55fd81b2 100644 ---- a/src/northbridge/intel/haswell/native_raminit/io_comp_control.c -+++ b/src/northbridge/intel/haswell/native_raminit/io_comp_control.c -@@ -8,6 +8,25 @@ - - #include "raminit_native.h" - -+enum raminit_status io_reset(void) -+{ -+ union mc_init_state_g_reg mc_init_state_g = { -+ .raw = mchbar_read32(MC_INIT_STATE_G), -+ }; -+ mc_init_state_g.reset_io = 1; -+ mchbar_write32(MC_INIT_STATE_G, mc_init_state_g.raw); -+ struct stopwatch timer; -+ stopwatch_init_msecs_expire(&timer, 2000); -+ do { -+ mc_init_state_g.raw = mchbar_read32(MC_INIT_STATE_G); -+ if (mc_init_state_g.reset_io == 0) -+ return RAMINIT_STATUS_SUCCESS; -+ -+ } while (!stopwatch_expired(&timer)); -+ printk(BIOS_ERR, "Timed out waiting for DDR I/O reset to complete\n"); -+ return RAMINIT_STATUS_POLL_TIMEOUT; -+} -+ - enum raminit_status wait_for_first_rcomp(void) - { - struct stopwatch timer; -diff --git a/src/northbridge/intel/haswell/native_raminit/jedec_reset.c b/src/northbridge/intel/haswell/native_raminit/jedec_reset.c -new file mode 100644 -index 0000000000..de0f676758 ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/jedec_reset.c -@@ -0,0 +1,120 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <console/console.h> -+#include <delay.h> -+#include <northbridge/intel/haswell/haswell.h> -+#include <southbridge/intel/lynxpoint/pch.h> -+#include <types.h> -+#include <timer.h> -+ -+#include "raminit_native.h" -+ -+static void assert_reset(const bool do_reset) -+{ -+ if (is_hsw_ult()) { -+ uint32_t pm_cfg2 = RCBA32(PM_CFG2); -+ if (do_reset) -+ pm_cfg2 &= ~PM_CFG2_DRAM_RESET_CTL; -+ else -+ pm_cfg2 |= PM_CFG2_DRAM_RESET_CTL; -+ RCBA32(PM_CFG2) = pm_cfg2; -+ } else { -+ union mc_init_state_g_reg mc_init_state_g = { -+ .raw = mchbar_read32(MC_INIT_STATE_G), -+ }; -+ mc_init_state_g.ddr_not_reset = !do_reset; -+ mchbar_write32(MC_INIT_STATE_G, mc_init_state_g.raw); -+ } -+} -+ -+/* -+ * Perform JEDEC reset. -+ * -+ * If RTT_NOM is to be enabled in MR1, the ODT input signal must be -+ * statically held low in our system since RTT_NOM is always enabled. -+ */ -+static void jedec_reset(struct sysinfo *ctrl) -+{ -+ if (is_hsw_ult()) -+ assert_reset(false); -+ -+ union mc_init_state_g_reg mc_init_state_g = { -+ .ddr_not_reset = 1, -+ .safe_self_refresh = 1, -+ }; -+ mchbar_write32(MC_INIT_STATE_G, mc_init_state_g.raw); -+ -+ union reut_misc_cke_ctrl_reg reut_misc_cke_ctrl = { -+ .cke_override = 0xf, -+ .cke_on = 0, -+ }; -+ mchbar_write32(REUT_MISC_CKE_CTRL, reut_misc_cke_ctrl.raw); -+ -+ assert_reset(true); -+ -+ /** TODO: check and switch DDR3 voltage here (mainboard-specific) **/ -+ -+ udelay(200); -+ -+ assert_reset(false); -+ -+ udelay(500); -+ -+ mc_init_state_g.dclk_enable = 1; -+ mchbar_write32(MC_INIT_STATE_G, mc_init_state_g.raw); -+ -+ /* Delay at least 20 nanoseconds for tCKSRX */ -+ tick_delay(1); -+ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ reut_misc_cke_ctrl.cke_on = ctrl->rankmap[channel]; -+ mchbar_write32(REUT_ch_MISC_CKE_CTRL(channel), reut_misc_cke_ctrl.raw); -+ } -+ -+ /* -+ * Wait minimum of reset CKE exit time, tXPR. -+ * Spec says MAX(tXS, 5 tCK). 5 tCK is 10 ns. -+ */ -+ tick_delay(1); -+} -+ -+enum raminit_status do_jedec_init(struct sysinfo *ctrl) -+{ -+ /* Never do a JEDEC reset in S3 resume */ -+ if (ctrl->bootmode == BOOTMODE_S3) -+ return RAMINIT_STATUS_SUCCESS; -+ -+ enum raminit_status status = io_reset(); -+ if (status) -+ return status; -+ -+ status = wait_for_first_rcomp(); -+ if (status) -+ return status; -+ -+ /* Force ODT low (JEDEC spec) */ -+ const union reut_misc_odt_ctrl_reg reut_misc_odt_ctrl = { -+ .odt_override = 0xf, -+ .odt_on = 0, -+ }; -+ mchbar_write32(REUT_MISC_ODT_CTRL, reut_misc_odt_ctrl.raw); -+ -+ /* -+ * Note: Haswell MRC does not clear ODT override for LPDDR3. However, -+ * Broadwell MRC does. Hell suspects this difference is important, as -+ * there is an erratum in the specification update for Broadwell: -+ * -+ * Erratum BDM74: LPDDR3 Memory Training May Cause Platform Boot Failure -+ */ -+ if (ctrl->lpddr) -+ die("%s: LPDDR-specific JEDEC init not implemented\n", __func__); -+ -+ jedec_reset(ctrl); -+ status = ddr3_jedec_init(ctrl); -+ if (!status) -+ ctrl->restore_mrs = true; -+ -+ /* Release ODT override */ -+ mchbar_write32(REUT_MISC_ODT_CTRL, 0); -+ return status; -+} -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -index 559dfc3a4e..94b268468c 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -@@ -24,6 +24,7 @@ static const struct task_entry cold_boot[] = { - { convert_timings, true, "CONVTIM", }, - { configure_mc, true, "CONFMC", }, - { configure_memory_map, true, "MEMMAP", }, -+ { do_jedec_init, true, "JEDECINIT", }, - }; - - /* Return a generic stepping value to make stepping checks simpler */ -@@ -57,6 +58,7 @@ static void initialize_ctrl(struct sysinfo *ctrl) - ctrl->stepping = get_stepping(ctrl->cpu); - ctrl->vdd_mv = is_hsw_ult() ? 1350 : 1500; /** FIXME: Hardcoded, does it matter? **/ - ctrl->dq_pins_interleaved = cfg->dq_pins_interleaved; -+ ctrl->restore_mrs = false; - ctrl->bootmode = bootmode; - } - -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -index 8f937c4ccd..759d755d6d 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -@@ -28,6 +28,30 @@ - /* Always use 12 legs for emphasis (not trained) */ - #define TXEQFULLDRV (3 << 4) - -+/* DDR3 mode register bits */ -+#define MR0_DLL_RESET BIT(8) -+ -+#define MR1_WL_ENABLE BIT(7) -+#define MR1_QOFF_ENABLE BIT(12) /* If set, output buffers disabled */ -+ -+#define RTTNOM_MASK (BIT(9) | BIT(6) | BIT(2)) -+ -+/* ZQ calibration types */ -+enum { -+ ZQ_INIT, /* DDR3: ZQCL with tZQinit, LPDDR3: ZQ Init with tZQinit */ -+ ZQ_LONG, /* DDR3: ZQCL with tZQoper, LPDDR3: ZQ Long with tZQCL */ -+ ZQ_SHORT, /* DDR3: ZQCS with tZQCS, LPDDR3: ZQ Short with tZQCS */ -+ ZQ_RESET, /* DDR3: not used, LPDDR3: ZQ Reset with tZQreset */ -+}; -+ -+/* REUT initialisation modes */ -+enum { -+ REUT_MODE_IDLE = 0, -+ REUT_MODE_TEST = 1, -+ REUT_MODE_MRS = 2, -+ REUT_MODE_NOP = 3, /* Normal operation mode */ -+}; -+ - enum command_training_iteration { - CT_ITERATION_CLOCK = 0, - CT_ITERATION_CMD_NORTH, -@@ -51,6 +75,7 @@ enum raminit_status { - RAMINIT_STATUS_UNSUPPORTED_MEMORY, - RAMINIT_STATUS_MPLL_INIT_FAILURE, - RAMINIT_STATUS_POLL_TIMEOUT, -+ RAMINIT_STATUS_REUT_ERROR, - RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/ - }; - -@@ -73,6 +98,7 @@ struct sysinfo { - uint32_t cpu; /* CPUID value */ - - bool dq_pins_interleaved; -+ bool restore_mrs; - - /** TODO: ECC support untested **/ - bool is_ecc; -@@ -162,6 +188,11 @@ struct sysinfo { - union tc_bank_rank_b_reg tc_bankrank_b[NUM_CHANNELS]; - union tc_bank_rank_c_reg tc_bankrank_c[NUM_CHANNELS]; - union tc_bank_rank_d_reg tc_bankrank_d[NUM_CHANNELS]; -+ -+ uint16_t mr0[NUM_CHANNELS][NUM_SLOTS]; -+ uint16_t mr1[NUM_CHANNELS][NUM_SLOTS]; -+ uint16_t mr2[NUM_CHANNELS][NUM_SLOTS]; -+ uint16_t mr3[NUM_CHANNELS][NUM_SLOTS]; - }; - - static inline bool is_hsw_ult(void) -@@ -197,6 +228,53 @@ static inline void clear_data_offset_train_all(struct sysinfo *ctrl) - memset(ctrl->data_offset_train, 0, sizeof(ctrl->data_offset_train)); - } - -+/* Number of ticks to wait in units of 69.841279 ns (citation needed) */ -+static inline void tick_delay(const uint32_t delay) -+{ -+ /* Just perform reads to a random register */ -+ for (uint32_t start = 0; start <= delay; start++) -+ mchbar_read32(REUT_ERR_DATA_STATUS); -+} -+ -+/* -+ * 64-bit MCHBAR registers need to be accessed atomically. If one uses -+ * two 32-bit ops instead, there will be problems with the REUT's CADB -+ * (Command Address Data Buffer): hardware automatically advances the -+ * pointer into the register file after a write to the input register. -+ */ -+static inline uint64_t mchbar_read64(const uintptr_t x) -+{ -+ const uint64_t *offset = (uint64_t *)(CONFIG_FIXED_MCHBAR_MMIO_BASE + x); -+ uint64_t mmxsave, v; -+ asm volatile ( -+ "\n\t movq %%mm0, %0" -+ "\n\t movq %2, %%mm0" -+ "\n\t movq %%mm0, %1" -+ "\n\t movq %3, %%mm0" -+ "\n\t emms" -+ : "=m"(mmxsave), -+ "=m"(v) -+ : "m"(offset[0]), -+ "m"(mmxsave)); -+ return v; -+} -+ -+static inline void mchbar_write64(const uintptr_t x, const uint64_t v) -+{ -+ const uint64_t *offset = (uint64_t *)(CONFIG_FIXED_MCHBAR_MMIO_BASE + x); -+ uint64_t mmxsave; -+ asm volatile ( -+ "\n\t movq %%mm0, %0" -+ "\n\t movq %2, %%mm0" -+ "\n\t movq %%mm0, %1" -+ "\n\t movq %3, %%mm0" -+ "\n\t emms" -+ : "=m"(mmxsave) -+ : "m"(offset[0]), -+ "m"(v), -+ "m"(mmxsave)); -+} -+ - void raminit_main(enum raminit_boot_mode bootmode); - - enum raminit_status collect_spd_info(struct sysinfo *ctrl); -@@ -204,6 +282,7 @@ enum raminit_status initialise_mpll(struct sysinfo *ctrl); - enum raminit_status convert_timings(struct sysinfo *ctrl); - enum raminit_status configure_mc(struct sysinfo *ctrl); - enum raminit_status configure_memory_map(struct sysinfo *ctrl); -+enum raminit_status do_jedec_init(struct sysinfo *ctrl); - - void configure_timings(struct sysinfo *ctrl); - void configure_refresh(struct sysinfo *ctrl); -@@ -216,8 +295,28 @@ uint32_t get_tXS_offset(uint32_t mem_clock_mhz); - uint32_t get_tZQOPER(uint32_t mem_clock_mhz, bool lpddr); - uint32_t get_tZQCS(uint32_t mem_clock_mhz, bool lpddr); - -+enum raminit_status io_reset(void); - enum raminit_status wait_for_first_rcomp(void); - -+uint16_t encode_ddr3_rttnom(uint32_t rttnom); -+void ddr3_program_mr1(struct sysinfo *ctrl, uint8_t wl_mode, uint8_t q_off); -+enum raminit_status ddr3_jedec_init(struct sysinfo *ctrl); -+ -+void reut_issue_mrs( -+ struct sysinfo *ctrl, -+ uint8_t channel, -+ uint8_t rankmask, -+ uint8_t mr, -+ uint16_t val); -+ -+void reut_issue_mrs_all( -+ struct sysinfo *ctrl, -+ uint8_t channel, -+ uint8_t mr, -+ const uint16_t val[NUM_SLOTS]); -+ -+enum raminit_status reut_issue_zq(struct sysinfo *ctrl, uint8_t chanmask, uint8_t zq_type); -+ - uint8_t get_rx_bias(const struct sysinfo *ctrl); - - uint8_t get_tCWL(uint32_t mem_clock_mhz); -diff --git a/src/northbridge/intel/haswell/native_raminit/reg_structs.h b/src/northbridge/intel/haswell/native_raminit/reg_structs.h -index 70487e1640..9929f617fe 100644 ---- a/src/northbridge/intel/haswell/native_raminit/reg_structs.h -+++ b/src/northbridge/intel/haswell/native_raminit/reg_structs.h -@@ -335,6 +335,127 @@ union mcscheds_cbit_reg { - uint32_t raw; - }; - -+union reut_pat_cadb_prog_reg { -+ struct __packed { -+ uint32_t addr : 16; // Bits 15:0 -+ uint32_t : 8; // Bits 23:16 -+ uint32_t bank : 3; // Bits 26:24 -+ uint32_t : 5; // Bits 31:27 -+ uint32_t cs : 4; // Bits 35:32 -+ uint32_t : 4; // Bits 39:36 -+ uint32_t cmd : 3; // Bits 42:40 -+ uint32_t : 5; // Bits 47:43 -+ uint32_t odt : 4; // Bits 51:48 -+ uint32_t : 4; // Bits 55:52 -+ uint32_t cke : 4; // Bits 59:56 -+ uint32_t : 4; // Bits 63:60 -+ }; -+ uint64_t raw; -+ uint32_t raw32[2]; -+}; -+ -+union reut_pat_cadb_mrs_reg { -+ struct __packed { -+ uint32_t delay_gap : 3; // Bits 2:0 -+ uint32_t : 5; // Bits 7:3 -+ uint32_t start_ptr : 3; // Bits 10:8 -+ uint32_t : 5; // Bits 15:11 -+ uint32_t end_ptr : 3; // Bits 18:16 -+ uint32_t : 5; // Bits 23:19 -+ uint32_t curr_ptr : 3; // Bits 26:24 -+ uint32_t : 5; // Bits 31:27 -+ }; -+ uint32_t raw; -+}; -+ -+union reut_seq_cfg_reg { -+ struct __packed { -+ uint32_t : 3; // Bits 2:0 -+ uint32_t stop_base_seq_on_wrap_trigger : 1; // Bits 3:3 -+ uint32_t : 1; // Bits 4:4 -+ uint32_t address_update_rate_mode : 1; // Bits 5:5 -+ uint32_t : 1; // Bits 6:6 -+ uint32_t enable_dummy_reads : 1; // Bits 7:7 -+ uint32_t : 2; // Bits 9:8 -+ uint32_t enable_constant_write_strobe : 1; // Bits 10:10 -+ uint32_t global_control : 1; // Bits 11:11 -+ uint32_t initialization_mode : 2; // Bits 13:12 -+ uint32_t : 2; // Bits 15:14 -+ uint32_t early_steppings_loop_count : 5; // Bits 20:16 *** Not on C0 *** -+ uint32_t : 3; // Bits 23:21 -+ uint32_t subsequence_start_pointer : 3; // Bits 26:24 -+ uint32_t : 1; // Bits 27:27 -+ uint32_t subsequence_end_pointer : 3; // Bits 30:28 -+ uint32_t : 1; // Bits 31:31 -+ uint32_t start_test_delay : 10; // Bits 41:32 -+ uint32_t : 22; // Bits 63:42 -+ }; -+ uint64_t raw; -+ uint32_t raw32[2]; -+}; -+ -+union reut_seq_ctl_reg { -+ struct __packed { -+ uint32_t start_test : 1; // Bits 0:0 -+ uint32_t stop_test : 1; // Bits 1:1 -+ uint32_t clear_errors : 1; // Bits 2:2 -+ uint32_t : 1; // Bits 3:3 -+ uint32_t stop_on_error : 1; // Bits 4:4 -+ uint32_t : 27; // Bits 31:5 -+ }; -+ uint32_t raw; -+}; -+ -+union reut_global_err_reg { -+ struct __packed { -+ uint32_t ch_error : 2; // Bits 1:0 -+ uint32_t : 14; // Bits 15:2 -+ uint32_t ch_test_done : 2; // Bits 17:16 -+ uint32_t : 14; // Bits 31:18 -+ }; -+ uint32_t raw; -+}; -+ -+union reut_misc_cke_ctrl_reg { -+ struct __packed { -+ uint32_t cke_override : 4; // Bits 3:0 -+ uint32_t : 4; // Bits 7:4 -+ uint32_t cke_en_start_test_sync : 1; // Bits 8:8 -+ uint32_t : 7; // Bits 15:9 -+ uint32_t cke_on : 4; // Bits 19:16 -+ uint32_t : 12; // Bits 31:20 -+ }; -+ uint32_t raw; -+}; -+ -+union reut_misc_odt_ctrl_reg { -+ struct __packed { -+ uint32_t odt_override : 4; // Bits 3:0 -+ uint32_t : 12; // Bits 15:4 -+ uint32_t odt_on : 4; // Bits 19:16 -+ uint32_t : 11; // Bits 30:20 -+ uint32_t mpr_train_ddr_on : 1; // Bits 31:31 -+ }; -+ uint32_t raw; -+}; -+ -+union mcscheds_dft_misc_reg { -+ struct __packed { -+ uint32_t wdar : 1; // Bits 0:0 -+ uint32_t safe_mask_sel : 3; // Bits 3:1 -+ uint32_t force_rcv_en : 1; // Bits 4:4 -+ uint32_t : 3; // Bits 7:5 -+ uint32_t ddr_qualifier : 2; // Bits 9:8 -+ uint32_t qualifier_length : 2; // Bits 11:10 -+ uint32_t wdb_block_en : 1; // Bits 12:12 -+ uint32_t rt_dft_read_ptr : 4; // Bits 16:13 -+ uint32_t rt_dft_read_enable : 1; // Bits 17:17 -+ uint32_t rt_dft_read_sel_addr : 1; // Bits 18:18 -+ uint32_t : 13; // Bits 31:19 -+ }; -+ uint32_t raw; -+}; -+ - union tc_bank_reg { - struct __packed { - uint32_t tRCD : 5; // Bits 4:0 -@@ -428,6 +549,18 @@ union tc_srftp_reg { - uint32_t raw; - }; - -+union tc_mr2_shadow_reg { -+ struct __packed { -+ uint32_t mr2_shadow_low : 6; // Bits 5:0 -+ uint32_t srt_available : 2; // Bits 7:6 -+ uint32_t mr2_shadow_high : 3; // Bits 10:8 -+ uint32_t : 3; // Bits 13:11 -+ uint32_t addr_bit_swizzle : 2; // Bits 15:14 -+ uint32_t : 16; // Bits 31:16 -+ }; -+ uint32_t raw; -+}; -+ - union mcmain_command_rate_limit_reg { - struct __packed { - uint32_t enable_cmd_limit : 1; // Bits 0:0 -@@ -483,6 +616,27 @@ union mad_zr_reg { - uint32_t raw; - }; - -+union mc_init_state_g_reg { -+ struct __packed { -+ uint32_t pu_mrc_done : 1; // Bits 0:0 -+ uint32_t ddr_not_reset : 1; // Bits 1:1 -+ uint32_t : 1; // Bits 2:2 -+ uint32_t refresh_enable : 1; // Bits 3:3 -+ uint32_t : 1; // Bits 4:4 -+ uint32_t mc_init_done_ack : 1; // Bits 5:5 -+ uint32_t : 1; // Bits 6:6 -+ uint32_t mrc_done : 1; // Bits 7:7 -+ uint32_t safe_self_refresh : 1; // Bits 8:8 -+ uint32_t : 1; // Bits 9:9 -+ uint32_t hvm_gate_ddr_reset : 1; // Bits 10:10 -+ uint32_t : 11; // Bits 21:11 -+ uint32_t dclk_enable : 1; // Bits 22:22 -+ uint32_t reset_io : 1; // Bits 23:23 -+ uint32_t : 8; // Bits 31:24 -+ }; -+ uint32_t raw; -+}; -+ - /* Same definition for P_COMP, M_COMP, D_COMP */ - union pcu_comp_reg { - struct __packed { -diff --git a/src/northbridge/intel/haswell/native_raminit/reut.c b/src/northbridge/intel/haswell/native_raminit/reut.c -new file mode 100644 -index 0000000000..31019f74a1 ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/reut.c -@@ -0,0 +1,196 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <console/console.h> -+#include <delay.h> -+#include <northbridge/intel/haswell/haswell.h> -+#include <timer.h> -+#include <types.h> -+ -+#include "raminit_native.h" -+ -+enum { -+ CADB_CMD_MRS = 0, -+ CADB_CMD_REF = 1, -+ CADB_CMD_PRE = 2, -+ CADB_CMD_ACT = 3, -+ CADB_CMD_WR = 4, -+ CADB_CMD_RD = 5, -+ CADB_CMD_ZQ = 6, -+ CADB_CMD_NOP = 7, -+}; -+ -+/* -+ * DDR3 rank mirror swaps the following pins: A3<->A4, A5<->A6, A7<->A8, BA0<->BA1 -+ * -+ * Note that the swapped bits are contiguous. We can use some XOR magic to swap the bits. -+ * Address lanes are at bits 0..15 and bank selects are at bits 24..26 on the REUT register. -+ */ -+#define MIRROR_BITS (BIT(24) | BIT(7) | BIT(5) | BIT(3)) -+static uint64_t cadb_prog_rank_mirror(const uint64_t cadb_prog) -+{ -+ /* First XOR: find which pairs of bits are different (need swapping) */ -+ const uint64_t tmp64 = (cadb_prog ^ (cadb_prog >> 1)) & MIRROR_BITS; -+ -+ /* Second XOR: invert the pairs of bits that have different values */ -+ return cadb_prog ^ (tmp64 | tmp64 << 1); -+} -+ -+static enum raminit_status reut_write_cadb_cmd( -+ struct sysinfo *ctrl, -+ const uint8_t channel, -+ const uint8_t rankmask, -+ const uint8_t cmd, -+ const uint8_t bank, -+ const uint16_t valarr[NUM_SLOTRANKS], -+ const uint8_t delay) -+{ -+ union mcscheds_dft_misc_reg dft_misc = { -+ .raw = mchbar_read32(MCSCHEDS_DFT_MISC), -+ }; -+ dft_misc.ddr_qualifier = 0; -+ mchbar_write32(MCSCHEDS_DFT_MISC, dft_misc.raw); -+ -+ /* Pointer will be dynamically incremented after a write to CADB_PROG register */ -+ mchbar_write8(REUT_ch_PAT_CADB_WRITE_PTR(channel), 0); -+ -+ uint8_t count = 0; -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ if (!(ctrl->rankmap[channel] & BIT(rank) & rankmask)) -+ continue; -+ -+ union reut_pat_cadb_prog_reg reut_cadb_prog = { -+ .addr = valarr[rank], -+ .bank = bank, -+ .cs = ~BIT(rank), /* CS is active low */ -+ .cmd = cmd, -+ .cke = 0xf, -+ }; -+ if (ctrl->rank_mirrored[channel] & BIT(rank)) -+ reut_cadb_prog.raw = cadb_prog_rank_mirror(reut_cadb_prog.raw); -+ -+ mchbar_write64(REUT_ch_PAT_CADB_PROG(channel), reut_cadb_prog.raw); -+ count++; -+ } -+ if (!count) { -+ printk(BIOS_ERR, "%s: rankmask is invalid\n", __func__); -+ return RAMINIT_STATUS_UNSPECIFIED_ERROR; /** FIXME: Is this needed? **/ -+ } -+ const union reut_pat_cadb_mrs_reg reut_cadb_mrs = { -+ .delay_gap = delay ? delay : 3, -+ .end_ptr = count - 1, -+ }; -+ mchbar_write32(REUT_ch_PAT_CADB_MRS(channel), reut_cadb_mrs.raw); -+ -+ const uint32_t reut_seq_cfg_save = mchbar_read32(REUT_ch_SEQ_CFG(channel)); -+ union reut_seq_cfg_reg reut_seq_cfg = { -+ .raw = reut_seq_cfg_save, -+ }; -+ reut_seq_cfg.global_control = 0; -+ reut_seq_cfg.initialization_mode = REUT_MODE_MRS; -+ mchbar_write32(REUT_ch_SEQ_CFG(channel), reut_seq_cfg.raw); -+ mchbar_write32(REUT_ch_SEQ_CTL(channel), (union reut_seq_ctl_reg) { -+ .start_test = 1, -+ .clear_errors = 1, -+ }.raw); -+ enum raminit_status status = RAMINIT_STATUS_SUCCESS; -+ union reut_global_err_reg reut_global_err; -+ struct stopwatch timer; -+ stopwatch_init_msecs_expire(&timer, 100); -+ do { -+ reut_global_err.raw = mchbar_read32(REUT_GLOBAL_ERR); -+ if (reut_global_err.ch_error & BIT(channel)) { -+ printk(BIOS_ERR, "Unexpected REUT error for channel %u\n", channel); -+ status = RAMINIT_STATUS_REUT_ERROR; -+ break; -+ } -+ if (stopwatch_expired(&timer)) { -+ printk(BIOS_ERR, "%s: REUT timed out!\n", __func__); -+ status = RAMINIT_STATUS_POLL_TIMEOUT; -+ break; -+ } -+ } while (!(reut_global_err.ch_test_done & BIT(channel))); -+ mchbar_write32(REUT_ch_SEQ_CTL(channel), (union reut_seq_ctl_reg) { -+ .clear_errors = 1, -+ }.raw); -+ mchbar_write32(REUT_ch_SEQ_CFG(channel), reut_seq_cfg_save); -+ return status; -+} -+ -+static enum raminit_status reut_write_cadb_cmd_all( -+ struct sysinfo *ctrl, -+ const uint8_t channel, -+ const uint8_t rankmask, -+ const uint8_t cmd, -+ const uint8_t bank, -+ const uint16_t val, -+ const uint8_t delay) -+{ -+ const uint16_t valarr[NUM_SLOTRANKS] = { val, val, val, val }; -+ return reut_write_cadb_cmd(ctrl, channel, rankmask, cmd, bank, valarr, delay); -+} -+ -+void reut_issue_mrs( -+ struct sysinfo *ctrl, -+ const uint8_t channel, -+ const uint8_t rankmask, -+ const uint8_t mr, -+ const uint16_t val) -+{ -+ reut_write_cadb_cmd_all(ctrl, channel, rankmask, CADB_CMD_MRS, mr, val, 0); -+} -+ -+void reut_issue_mrs_all( -+ struct sysinfo *ctrl, -+ const uint8_t channel, -+ const uint8_t mr, -+ const uint16_t val[NUM_SLOTS]) -+{ -+ const uint16_t valarr[NUM_SLOTRANKS] = { val[0], val[0], val[1], val[1] }; -+ reut_write_cadb_cmd(ctrl, channel, 0xf, CADB_CMD_MRS, mr, valarr, 0); -+} -+ -+enum raminit_status reut_issue_zq(struct sysinfo *ctrl, uint8_t chanmask, uint8_t zq_type) -+{ -+ /** TODO: Issuing ZQ commands differs for LPDDR **/ -+ if (ctrl->lpddr) -+ die("%s: LPDDR not yet supported in ZQ calibration\n", __func__); -+ -+ __maybe_unused uint8_t opcode; /* NOTE: Only used for LPDDR */ -+ uint16_t zq = 0; -+ switch (zq_type) { -+ case ZQ_INIT: -+ zq = BIT(10); -+ opcode = 0xff; -+ break; -+ case ZQ_LONG: -+ zq = BIT(10); -+ opcode = 0xab; -+ break; -+ case ZQ_SHORT: -+ opcode = 0x56; -+ break; -+ case ZQ_RESET: -+ opcode = 0xc3; -+ break; -+ default: -+ die("%s: ZQ type %u is invalid\n", __func__, zq_type); -+ } -+ -+ /* ZQCS on single-channel needs a longer delay */ -+ const uint8_t delay = zq_type == ZQ_SHORT && (!ctrl->dpc[0] || !ctrl->dpc[1]) ? 7 : 1; -+ enum raminit_status status = RAMINIT_STATUS_SUCCESS; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!(BIT(channel) & chanmask) || !does_ch_exist(ctrl, channel)) -+ continue; -+ -+ status = reut_write_cadb_cmd_all(ctrl, channel, 0xf, CADB_CMD_ZQ, 0, zq, delay); -+ if (status) -+ break; -+ } -+ -+ /* Wait a bit after ZQ INIT and ZQCL commands */ -+ if (zq) -+ udelay(1); -+ -+ return status; -+} -diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h -index 2acc5cbbc8..4fc78a7f43 100644 ---- a/src/northbridge/intel/haswell/registers/mchbar.h -+++ b/src/northbridge/intel/haswell/registers/mchbar.h -@@ -96,15 +96,36 @@ - - #define SC_WR_ADD_DELAY_ch(ch) _MCMAIN_C(0x40d0, ch) - -+#define REUT_ch_MISC_CKE_CTRL(ch) _MCMAIN_C(0x4190, ch) -+ -+#define REUT_ch_PAT_CADB_MRS(ch) _MCMAIN_C(0x419c, ch) -+ -+#define REUT_ch_PAT_CADB_WRITE_PTR(ch) _MCMAIN_C(0x41bc, ch) -+#define REUT_ch_PAT_CADB_PROG(ch) _MCMAIN_C(0x41c0, ch) -+ - #define TC_ZQCAL_ch(ch) _MCMAIN_C(0x4290, ch) - #define TC_RFP_ch(ch) _MCMAIN_C(0x4294, ch) - #define TC_RFTP_ch(ch) _MCMAIN_C(0x4298, ch) -+#define TC_MR2_SHADOW_ch(ch) _MCMAIN_C(0x429c, ch) - #define MC_INIT_STATE_ch(ch) _MCMAIN_C(0x42a0, ch) - #define TC_SRFTP_ch(ch) _MCMAIN_C(0x42a4, ch) - -+#define REUT_GLOBAL_ERR 0x4804 -+ -+#define REUT_ch_SEQ_CFG(ch) (0x48a8 + 8 * (ch)) -+ -+#define REUT_ch_SEQ_CTL(ch) (0x48b8 + 4 * (ch)) -+ - /* MCMAIN broadcast */ - #define MCSCHEDS_CBIT 0x4c20 - -+#define MCSCHEDS_DFT_MISC 0x4c30 -+ -+#define REUT_ERR_DATA_STATUS 0x4ce0 -+ -+#define REUT_MISC_CKE_CTRL 0x4d90 -+#define REUT_MISC_ODT_CTRL 0x4d94 -+ - #define MCMNTS_SC_WDBWM 0x4f8c - - /* MCDECS */ -diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h -index 07f4b9dc16..5b3696347c 100644 ---- a/src/southbridge/intel/lynxpoint/pch.h -+++ b/src/southbridge/intel/lynxpoint/pch.h -@@ -586,6 +586,8 @@ void mainboard_config_rcba(void); - #define ACPIIRQEN 0x31e0 /* 32bit */ - #define OIC 0x31fe /* 16bit */ - #define PRSTS 0x3310 /* 32bit */ -+#define PM_CFG2 0x333c /* 32bit */ -+#define PM_CFG2_DRAM_RESET_CTL (1 << 26) /* ULT only */ - #define PMSYNC_CONFIG 0x33c4 /* 32bit */ - #define PMSYNC_CONFIG2 0x33cc /* 32bit */ - #define SOFT_RESET_CTRL 0x38f4 --- -2.39.5 - diff --git a/config/coreboot/default/patches/0035-mb-topton-adl-Add-TWL-variant-X2E_N150.patch b/config/coreboot/default/patches/0035-mb-topton-adl-Add-TWL-variant-X2E_N150.patch new file mode 100644 index 00000000..1edd0d27 --- /dev/null +++ b/config/coreboot/default/patches/0035-mb-topton-adl-Add-TWL-variant-X2E_N150.patch @@ -0,0 +1,106 @@ +From 0a98ff0cbd20484ced53b15f16f8b77d881ffb9e Mon Sep 17 00:00:00 2001 +From: Riku Viitanen <riku.viitanen@protonmail.com> +Date: Thu, 25 Sep 2025 22:45:37 +0300 +Subject: [PATCH 35/40] mb/topton/adl: Add TWL variant (X2E_N150) + +Seems to be the same board but with a Twin Lake processor. +VBT extracted from vendor firmware. This makes HDMI and +DisplayPort work. + +Change-Id: I1018042802cbb8010888847226a2117fd9dfaeb0 +Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com> +--- + src/mainboard/topton/adl/Kconfig | 12 +++++++++--- + src/mainboard/topton/adl/Kconfig.name | 3 +++ + src/mainboard/topton/adl/data_twl.vbt | Bin 0 -> 9216 bytes + 3 files changed, 12 insertions(+), 3 deletions(-) + create mode 100644 src/mainboard/topton/adl/data_twl.vbt + +diff --git a/src/mainboard/topton/adl/Kconfig b/src/mainboard/topton/adl/Kconfig +index ffdfae1eee..331e1d624d 100644 +--- a/src/mainboard/topton/adl/Kconfig ++++ b/src/mainboard/topton/adl/Kconfig +@@ -1,6 +1,6 @@ + ## SPDX-License-Identifier: GPL-2.0-or-later + +-if BOARD_TOPTON_X2F_N100 ++if BOARD_TOPTON_X2F_N100 || BOARD_TOPTON_X2E_N150 + + config BOARD_SPECIFIC_OPTIONS + def_bool y +@@ -12,6 +12,7 @@ config BOARD_SPECIFIC_OPTIONS + select SUPERIO_ITE_IT8625E + select DRIVERS_UART_8250IO + select SOC_INTEL_ALDERLAKE_PCH_N ++ select SOC_INTEL_TWINLAKE if BOARD_TOPTON_X2E_N150 + select INTEL_GMA_HAVE_VBT + select SOC_INTEL_COMMON_BLOCK_HDA_VERB + select HAVE_INTEL_PTT +@@ -20,7 +21,12 @@ config BOARD_SPECIFIC_OPTIONS + config MAINBOARD_DIR + default "topton/adl" + ++config INTEL_GMA_VBT_FILE ++ default "src/mainboard/\$(MAINBOARDDIR)/data.vbt" if BOARD_TOPTON_X2F_N100 ++ default "src/mainboard/\$(MAINBOARDDIR)/data_twl.vbt" if BOARD_TOPTON_X2E_N150 ++ + config MAINBOARD_PART_NUMBER +- default "X2F_N100" ++ default "X2F_N100" if BOARD_TOPTON_X2F_N100 ++ default "X2E_N150" if BOARD_TOPTON_X2E_N150 + +-endif # BOARD_TOPTON_X2F_N100 ++endif # BOARD_TOPTON_X2F_N100 || BOARD_TOPTON_X2E_N150 +diff --git a/src/mainboard/topton/adl/Kconfig.name b/src/mainboard/topton/adl/Kconfig.name +index 5b8b5ff602..db0eef29be 100644 +--- a/src/mainboard/topton/adl/Kconfig.name ++++ b/src/mainboard/topton/adl/Kconfig.name +@@ -2,3 +2,6 @@ + + config BOARD_TOPTON_X2F_N100 + bool "X2F_N100" ++ ++config BOARD_TOPTON_X2E_N150 ++ bool "X2E_N150" +diff --git a/src/mainboard/topton/adl/data_twl.vbt b/src/mainboard/topton/adl/data_twl.vbt +new file mode 100644 +index 0000000000000000000000000000000000000000..05fbd5807365b3343e55ecedbd12fabb8a3199e9 +GIT binary patch +literal 9216 +zcmeHML2MgE6#cVnZ(QS$EeWj~+AvA0;DjbwJ8eiKOI^oKsN1BmoiuVKP~6mpM!1bh +zQ<Ng4E+U6qkoHnYD<ljO5(<}a;EYcw2q9TTAPykqMyWV})EjNgpV_rtrwuVJg{InX +z{oV2WH*f#{GdnZ8yKlUIj0T261F@mNv4M^VMM;7J%`Is>-Yxy%k<p1zU@S1vKQt0N +zMuF^r-<#KN03-?7<?<?uH+*h3mG;Ei=<xL9R65laN}Ydgb~-~N!7vS+KAlRZW=_qf +zl5}+Z#Q<e|wa)$vQ|Tl<e&Ot7YNn4OiGpbAJ<!>GfKuNJT}pSCPw^f^OP{x=@8F?Y +zXJ{ZeG8_pH1;)Z7$LUCnhQgzP(b0k7{-KjJ5*s-Z?hlU*gle4?Aq1y07iXqkJu^!^ +z!8Yo{>vV8l?lKKd&ty7jAf2W$hB;4Tsq?9sH&V&YS|=mQfx|`sh!g5^fCVPE`#}a9 +zsHlL)`xD_Z5wN|-v938@Q^cwq64R22!kSk4V-#wPQx09BB@^Ooa4i9{41s33Sk2r< +zK0;0ZS^b&{U!7sNmrWe<2^=R^;wVES?xKmSE&7)*aR%uczZ&8$o4D-&c5Imgt&)#j +zgz<fD;_3k;j?*h~oECB4nmE=BB?lQ3$FhWR@J>P8uj_HJ4#(k}A8x&g7&B1>2or#( +ziF#Md@5Pn7>QZ(mOru^zeFybj)b~+8Lj4T&3)C-BzefEI^=H&yQ2#*v6Lnh>DFxmU +z59?S!aef1(d!$e(MzK{(u6j6%x1#9q&+q23oB$|%*suhW@fW~f4DlZ4N5b|@r<kvC +zLcZoES*U+BOZQ0K236&8v;n}XwleU58Su1#Aa+-fESXZSY#+C4!Ya|WKgriD$BYZ_ +zu(;sj=bJ>vv%T&)C=`C!rs;HbkL*aa7_FOnF5%qI$}TF#h0PhVbrihu-PEHslo*T| +z99(Q}+MFS|3)BF#D(;0IgTdW%N#t7rWUzycG5B%K+c*lP9TuaYs7eOcR3;b&He@B& +zoV~FshB+E-lvVi-2BNcNyjq4&yXID-jjd{YvFroU*#ZwPRa&mXha-noWpdf4s<|?Q +z1bnyS8n;)I$yb`km!i<54C-cIuuSTFpM|belZUrD^=zWCNmZ!X7nn(#zKutr)l?IO +z$FF5G%X^WbowYLhLg$OFD{G&xVmw@J%jTo=ElT9d&Ju$NPp~p(vKj`ZU0q4cClz;; +zj{)w3h=YkS+~=6YJcxihK*nIFRYY;45wa1wQ*kLl*2?ff$NLc(w3=Q%9@rq?cvK60 +zn)~(M4mI9U?h6s>I0HC9+Wfv~Qz4;2eL|LTPs)TxA+wTeXfQGnIdv|TK7Q(K>M{7k +zf_m6eC_L{a($N)=;!6+j$o8psiXaG2p_YVgTOUN(ob({-SSOoheg7o<Hi)1wZoN-H +z1d_0yya(4sTz(9}aJcMPC#-%m@}j*{A+S)Atx+_5FNXM^pS$_AZa8tE2d5$(X9hk= +z7L#h83x&hHC)jk%yv&<V;B0cOyY%eg2JBeY!5fL+4-Vf{>tGLoy;J9W`0zO4@q-WH +z{1Fq+)|Jb-v$Fl~kFcA>_$}1`^HRBIDoYZV-fPCLpwhO*{~d}sCBEO<;&E8+TN$u2 +zU}eC{fRzC&16BsC4E&E7==)gM4KGasXo8NfuM)6I_LyJ%*vCx(^#cGZ0`Y(bal{hi +z4KBA`zl{K!O5Cu3Z?s$S#hJuI(eSwX3BIqkFA@bZh*7W|KFgxyP?>GcPKk`RMw?t= +z(|=;NRT76qw6#{)@^b>Hk|L<cvTXBJ*lrCI7`HExLD12cCbSuE88y7#k9h*Rlm!JS +zayFIx%%M#`DS%dE*p_X3F?QoqB(vGF1hV!#iNF<@7h90ic*bTn7K19SfE%J{OENU7 +z5#L66$)SB;Ez3(5AL-E>aVNGa=cOUUd~sv!9nfp*sPOaZ+xVs0fuGXx2U0!y!oLUb +SeEwbkJq|WZn<bBL2L1wR4t_2G + +literal 0 +HcmV?d00001 + +-- +2.47.3 + diff --git a/config/coreboot/default/patches/0036-haswell-NRI-Add-pre-training-steps.patch b/config/coreboot/default/patches/0036-haswell-NRI-Add-pre-training-steps.patch deleted file mode 100644 index 1b58a1f1..00000000 --- a/config/coreboot/default/patches/0036-haswell-NRI-Add-pre-training-steps.patch +++ /dev/null @@ -1,392 +0,0 @@ -From 19bc8d27c8f52b205df218d5917ae67ac4646024 Mon Sep 17 00:00:00 2001 -From: Angel Pons <th3fanbus@gmail.com> -Date: Sat, 7 May 2022 23:12:18 +0200 -Subject: [PATCH 36/51] haswell NRI: Add pre-training steps - -Implement pre-training steps, which consist of enabling ECC I/O and -filling the WDB (Write Data Buffer, stores test patterns) through a -magic LDAT port. - -Change-Id: Ie2e09e3b218c4569ed8de5c5e1b05d491032e0f1 -Signed-off-by: Angel Pons <th3fanbus@gmail.com> ---- - .../intel/haswell/native_raminit/Makefile.mk | 1 + - .../haswell/native_raminit/raminit_main.c | 35 ++++ - .../haswell/native_raminit/raminit_native.h | 24 +++ - .../haswell/native_raminit/reg_structs.h | 45 +++++ - .../intel/haswell/native_raminit/setup_wdb.c | 159 ++++++++++++++++++ - .../intel/haswell/registers/mchbar.h | 9 + - 6 files changed, 273 insertions(+) - create mode 100644 src/northbridge/intel/haswell/native_raminit/setup_wdb.c - -diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -index e9212df9e6..8d7d4e4db0 100644 ---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk -+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -@@ -10,5 +10,6 @@ romstage-y += memory_map.c - romstage-y += raminit_main.c - romstage-y += raminit_native.c - romstage-y += reut.c -+romstage-y += setup_wdb.c - romstage-y += spd_bitmunching.c - romstage-y += timings_refresh.c -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -index 94b268468c..5e4674957d 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -@@ -3,6 +3,7 @@ - #include <assert.h> - #include <console/console.h> - #include <cpu/intel/haswell/haswell.h> -+#include <delay.h> - #include <device/pci_ops.h> - #include <northbridge/intel/haswell/chip.h> - #include <northbridge/intel/haswell/haswell.h> -@@ -12,6 +13,39 @@ - - #include "raminit_native.h" - -+static enum raminit_status pre_training(struct sysinfo *ctrl) -+{ -+ /* Skip on S3 resume */ -+ if (ctrl->bootmode == BOOTMODE_S3) -+ return RAMINIT_STATUS_SUCCESS; -+ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) { -+ if (!rank_in_ch(ctrl, slot + slot, channel)) -+ continue; -+ -+ printk(RAM_DEBUG, "C%uS%u:\n", channel, slot); -+ printk(RAM_DEBUG, "\tMR0: 0x%04x\n", ctrl->mr0[channel][slot]); -+ printk(RAM_DEBUG, "\tMR1: 0x%04x\n", ctrl->mr1[channel][slot]); -+ printk(RAM_DEBUG, "\tMR2: 0x%04x\n", ctrl->mr2[channel][slot]); -+ printk(RAM_DEBUG, "\tMR3: 0x%04x\n", ctrl->mr3[channel][slot]); -+ printk(RAM_DEBUG, "\n"); -+ } -+ if (ctrl->is_ecc) { -+ union mad_dimm_reg mad_dimm = { -+ .raw = mchbar_read32(MAD_DIMM(channel)), -+ }; -+ /* Enable ECC I/O */ -+ mad_dimm.ecc_mode = 1; -+ mchbar_write32(MAD_DIMM(channel), mad_dimm.raw); -+ /* Wait 4 usec after enabling the ECC I/O, needed by HW */ -+ udelay(4); -+ } -+ } -+ setup_wdb(ctrl); -+ return RAMINIT_STATUS_SUCCESS; -+} -+ - struct task_entry { - enum raminit_status (*task)(struct sysinfo *); - bool is_enabled; -@@ -25,6 +59,7 @@ static const struct task_entry cold_boot[] = { - { configure_mc, true, "CONFMC", }, - { configure_memory_map, true, "MEMMAP", }, - { do_jedec_init, true, "JEDECINIT", }, -+ { pre_training, true, "PRETRAIN", }, - }; - - /* Return a generic stepping value to make stepping checks simpler */ -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -index 759d755d6d..4d9487d79c 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -@@ -36,6 +36,13 @@ - - #define RTTNOM_MASK (BIT(9) | BIT(6) | BIT(2)) - -+#define BASIC_VA_PAT_SPREAD_8 0x01010101 -+ -+#define WDB_CACHE_LINE_SIZE 8 -+ -+#define NUM_WDB_CL_MUX_SEEDS 3 -+#define NUM_CADB_MUX_SEEDS 3 -+ - /* ZQ calibration types */ - enum { - ZQ_INIT, /* DDR3: ZQCL with tZQinit, LPDDR3: ZQ Init with tZQinit */ -@@ -317,6 +324,23 @@ void reut_issue_mrs_all( - - enum raminit_status reut_issue_zq(struct sysinfo *ctrl, uint8_t chanmask, uint8_t zq_type); - -+void write_wdb_fixed_pat( -+ const struct sysinfo *ctrl, -+ const uint8_t patterns[], -+ const uint8_t pat_mask[], -+ uint8_t spread, -+ uint16_t start); -+ -+void write_wdb_va_pat( -+ const struct sysinfo *ctrl, -+ uint32_t agg_mask, -+ uint32_t vic_mask, -+ uint8_t vic_rot, -+ uint16_t start); -+ -+void program_wdb_lfsr(const struct sysinfo *ctrl, bool cleanup); -+void setup_wdb(const struct sysinfo *ctrl); -+ - uint8_t get_rx_bias(const struct sysinfo *ctrl); - - uint8_t get_tCWL(uint32_t mem_clock_mhz); -diff --git a/src/northbridge/intel/haswell/native_raminit/reg_structs.h b/src/northbridge/intel/haswell/native_raminit/reg_structs.h -index 9929f617fe..7aa8d8c8b2 100644 ---- a/src/northbridge/intel/haswell/native_raminit/reg_structs.h -+++ b/src/northbridge/intel/haswell/native_raminit/reg_structs.h -@@ -335,6 +335,18 @@ union mcscheds_cbit_reg { - uint32_t raw; - }; - -+union reut_pat_cl_mux_lmn_reg { -+ struct __packed { -+ uint32_t l_data_select : 1; // Bits 0:0 -+ uint32_t en_sweep_freq : 1; // Bits 1:1 -+ uint32_t : 6; // Bits 7:2 -+ uint32_t l_counter : 8; // Bits 15:8 -+ uint32_t m_counter : 8; // Bits 23:16 -+ uint32_t n_counter : 8; // Bits 31:24 -+ }; -+ uint32_t raw; -+}; -+ - union reut_pat_cadb_prog_reg { - struct __packed { - uint32_t addr : 16; // Bits 15:0 -@@ -439,6 +451,39 @@ union reut_misc_odt_ctrl_reg { - uint32_t raw; - }; - -+union ldat_pdat_reg { -+ struct __packed { -+ uint32_t fast_addr : 12; // Bits 11:0 -+ uint32_t : 4; // Bits 15:12 -+ uint32_t addr_en : 1; // Bits 16:16 -+ uint32_t seq_en : 1; // Bits 17:17 -+ uint32_t pol_0 : 1; // Bits 18:18 -+ uint32_t pol_1 : 1; // Bits 19:19 -+ uint32_t cmd_a : 4; // Bits 23:20 -+ uint32_t cmd_b : 4; // Bits 27:24 -+ uint32_t cmd_c : 4; // Bits 31:28 -+ }; -+ uint32_t raw; -+}; -+ -+union ldat_sdat_reg { -+ struct __packed { -+ uint32_t bank_sel : 4; // Bits 3:0 -+ uint32_t : 1; // Bits 4:4 -+ uint32_t array_sel : 5; // Bits 9:5 -+ uint32_t cmp : 1; // Bits 10:10 -+ uint32_t replicate : 1; // Bits 11:11 -+ uint32_t dword : 4; // Bits 15:12 -+ uint32_t mode : 2; // Bits 17:16 -+ uint32_t mpmap : 6; // Bits 23:18 -+ uint32_t mpb_offset : 4; // Bits 27:24 -+ uint32_t stage_en : 1; // Bits 28:28 -+ uint32_t shadow : 2; // Bits 30:29 -+ uint32_t : 1; // Bits 31:31 -+ }; -+ uint32_t raw; -+}; -+ - union mcscheds_dft_misc_reg { - struct __packed { - uint32_t wdar : 1; // Bits 0:0 -diff --git a/src/northbridge/intel/haswell/native_raminit/setup_wdb.c b/src/northbridge/intel/haswell/native_raminit/setup_wdb.c -new file mode 100644 -index 0000000000..ec37c48415 ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/setup_wdb.c -@@ -0,0 +1,159 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <northbridge/intel/haswell/haswell.h> -+#include <types.h> -+ -+#include "raminit_native.h" -+ -+static void ldat_write_cacheline( -+ const struct sysinfo *const ctrl, -+ const uint8_t chunk, -+ const uint16_t start, -+ const uint64_t data) -+{ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ /* -+ * Do not do a 64-bit write here. The register is not aligned -+ * to a 64-bit boundary, which could potentially cause issues. -+ */ -+ mchbar_write32(QCLK_ch_LDAT_DATA_IN_x(channel, 0), data & UINT32_MAX); -+ mchbar_write32(QCLK_ch_LDAT_DATA_IN_x(channel, 1), data >> 32); -+ /* -+ * Set REPLICATE = 0 as you don't want to replicate the data. -+ * Set BANK_SEL to the chunk you want to write the 64 bits to. -+ * Set ARRAY_SEL = 0 (the MC WDB) and MODE = 1. -+ */ -+ const union ldat_sdat_reg ldat_sdat = { -+ .bank_sel = chunk, -+ .mode = 1, -+ }; -+ mchbar_write32(QCLK_ch_LDAT_SDAT(channel), ldat_sdat.raw); -+ /* -+ * Finally, write the PDAT register indicating which cacheline -+ * of the WDB you want to write to by setting FAST_ADDR field -+ * to one of the 64 cache lines. Also set CMD_B in the PDAT -+ * register to 4'b1000, indicating that this is a LDAT write. -+ */ -+ const union ldat_pdat_reg ldat_pdat = { -+ .fast_addr = MIN(start, 0xfff), -+ .cmd_b = 8, -+ }; -+ mchbar_write32(QCLK_ch_LDAT_PDAT(channel), ldat_pdat.raw); -+ } -+} -+ -+static void clear_ldat_mode(const struct sysinfo *const ctrl) -+{ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) -+ mchbar_write32(QCLK_ch_LDAT_SDAT(channel), 0); -+} -+ -+void write_wdb_fixed_pat( -+ const struct sysinfo *const ctrl, -+ const uint8_t patterns[], -+ const uint8_t pat_mask[], -+ const uint8_t spread, -+ const uint16_t start) -+{ -+ for (uint8_t chunk = 0; chunk < WDB_CACHE_LINE_SIZE; chunk++) { -+ uint64_t data = 0; -+ for (uint8_t b = 0; b < 64; b++) { -+ const uint8_t beff = b % spread; -+ const uint8_t burst = patterns[pat_mask[beff]]; -+ if (burst & BIT(chunk)) -+ data |= 1ULL << b; -+ } -+ ldat_write_cacheline(ctrl, chunk, start, data); -+ } -+ clear_ldat_mode(ctrl); -+} -+ -+static inline uint32_t rol_u32(const uint32_t val) -+{ -+ return (val << 1) | ((val >> 31) & 1); -+} -+ -+void write_wdb_va_pat( -+ const struct sysinfo *const ctrl, -+ const uint32_t agg_mask, -+ const uint32_t vic_mask, -+ const uint8_t vic_rot, -+ const uint16_t start) -+{ -+ static const uint8_t va_mask_to_compressed[4] = {0xaa, 0xc0, 0xcc, 0xf0}; -+ uint32_t v_mask = vic_mask; -+ uint32_t a_mask = agg_mask; -+ for (uint8_t v = 0; v < vic_rot; v++) { -+ uint8_t compressed[32] = {0}; -+ /* Iterate through all 32 bits and create a compressed version of cacheline */ -+ for (uint8_t b = 0; b < ARRAY_SIZE(compressed); b++) { -+ const uint8_t vic = !!(v_mask & BIT(b)); -+ const uint8_t agg = !!(a_mask & BIT(b)); -+ const uint8_t index = !vic << 1 | agg << 0; -+ compressed[b] = va_mask_to_compressed[index]; -+ } -+ for (uint8_t chunk = 0; chunk < WDB_CACHE_LINE_SIZE; chunk++) { -+ uint32_t data = 0; -+ for (uint8_t b = 0; b < ARRAY_SIZE(compressed); b++) -+ data |= !!(compressed[b] & BIT(chunk)) << b; -+ -+ const uint64_t data64 = (uint64_t)data << 32 | data; -+ ldat_write_cacheline(ctrl, chunk, start + v, data64); -+ } -+ v_mask = rol_u32(v_mask); -+ a_mask = rol_u32(a_mask); -+ } -+ clear_ldat_mode(ctrl); -+} -+ -+void program_wdb_lfsr(const struct sysinfo *ctrl, const bool cleanup) -+{ -+ /* Cleanup LFSR seeds are sequential */ -+ const uint32_t cleanup_seeds[NUM_WDB_CL_MUX_SEEDS] = { 0xaaaaaa, 0xcccccc, 0xf0f0f0 }; -+ const uint32_t regular_seeds[NUM_WDB_CL_MUX_SEEDS] = { 0xa10ca1, 0xef0d08, 0xad0a1e }; -+ const uint32_t *seeds = cleanup ? cleanup_seeds : regular_seeds; -+ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ for (uint8_t i = 0; i < NUM_WDB_CL_MUX_SEEDS; i++) { -+ mchbar_write32(REUT_ch_PAT_WDB_CL_MUX_RD_x(channel, i), seeds[i]); -+ mchbar_write32(REUT_ch_PAT_WDB_CL_MUX_WR_x(channel, i), seeds[i]); -+ } -+ } -+} -+ -+void setup_wdb(const struct sysinfo *ctrl) -+{ -+ const uint32_t amask[9] = { -+ 0x86186186, 0x18618618, 0x30c30c30, -+ 0xa28a28a2, 0x8a28a28a, 0x14514514, -+ 0x28a28a28, 0x92492492, 0x24924924, -+ }; -+ const uint32_t vmask = 0x41041041; -+ -+ /* Fill first 8 entries with simple 2-LFSR VA pattern */ -+ write_wdb_va_pat(ctrl, 0, BASIC_VA_PAT_SPREAD_8, 8, 0); -+ -+ /* Fill next 54 entries with 3-LFSR VA pattern */ -+ for (uint8_t a = 0; a < ARRAY_SIZE(amask); a++) -+ write_wdb_va_pat(ctrl, amask[a], vmask, 6, 8 + a * 6); -+ -+ program_wdb_lfsr(ctrl, false); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ const union reut_pat_cl_mux_lmn_reg wdb_cl_mux_lmn = { -+ .en_sweep_freq = 1, -+ .l_counter = 1, -+ .m_counter = 1, -+ .n_counter = 10, -+ }; -+ mchbar_write32(REUT_ch_PAT_WDB_CL_MUX_LMN(channel), wdb_cl_mux_lmn.raw); -+ } -+} -diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h -index 4fc78a7f43..f8408e51a0 100644 ---- a/src/northbridge/intel/haswell/registers/mchbar.h -+++ b/src/northbridge/intel/haswell/registers/mchbar.h -@@ -94,6 +94,11 @@ - #define TC_BANK_RANK_D_ch(ch) _MCMAIN_C(0x4014, ch) - #define SC_ROUNDT_LAT_ch(ch) _MCMAIN_C(0x4024, ch) - -+#define REUT_ch_PAT_WDB_CL_MUX_WR_x(ch, x) _MCMAIN_C_X(0x4048, ch, x) /* x in 0 .. 2 */ -+#define REUT_ch_PAT_WDB_CL_MUX_RD_x(ch, x) _MCMAIN_C_X(0x4054, ch, x) /* x in 0 .. 2 */ -+ -+#define REUT_ch_PAT_WDB_CL_MUX_LMN(ch) _MCMAIN_C(0x4078, ch) -+ - #define SC_WR_ADD_DELAY_ch(ch) _MCMAIN_C(0x40d0, ch) - - #define REUT_ch_MISC_CKE_CTRL(ch) _MCMAIN_C(0x4190, ch) -@@ -110,6 +115,10 @@ - #define MC_INIT_STATE_ch(ch) _MCMAIN_C(0x42a0, ch) - #define TC_SRFTP_ch(ch) _MCMAIN_C(0x42a4, ch) - -+#define QCLK_ch_LDAT_PDAT(ch) _MCMAIN_C(0x42d0, ch) -+#define QCLK_ch_LDAT_SDAT(ch) _MCMAIN_C(0x42d4, ch) -+#define QCLK_ch_LDAT_DATA_IN_x(ch, x) _MCMAIN_C_X(0x42dc, ch, x) /* x in 0 .. 1 */ -+ - #define REUT_GLOBAL_ERR 0x4804 - - #define REUT_ch_SEQ_CFG(ch) (0x48a8 + 8 * (ch)) --- -2.39.5 - diff --git a/config/coreboot/default/patches/0036-soc-intel-alderlake-Disable-MRC_CACHE_USING_MRC_VERS.patch b/config/coreboot/default/patches/0036-soc-intel-alderlake-Disable-MRC_CACHE_USING_MRC_VERS.patch new file mode 100644 index 00000000..565be85a --- /dev/null +++ b/config/coreboot/default/patches/0036-soc-intel-alderlake-Disable-MRC_CACHE_USING_MRC_VERS.patch @@ -0,0 +1,30 @@ +From 8e191c71f11de4cb3d08fe585537f15043cacb1b Mon Sep 17 00:00:00 2001 +From: Riku Viitanen <riku.viitanen@protonmail.com> +Date: Sat, 27 Sep 2025 23:30:46 +0300 +Subject: [PATCH 36/40] soc/intel/alderlake: Disable + MRC_CACHE_USING_MRC_VERSION + +There's some issue with building against the FSP headers in src/vendorcode. +Headers in 3rdparty/fsp work, but since FspProducerDataHeaer.h is missing +from there, we need to disable MRC_CACHE_USING_MRC_VERSION by force. + +Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com> +--- + src/soc/intel/alderlake/Kconfig | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig +index 51bdf98b9d..739faa3808 100644 +--- a/src/soc/intel/alderlake/Kconfig ++++ b/src/soc/intel/alderlake/Kconfig +@@ -34,7 +34,6 @@ config SOC_INTEL_ALDERLAKE + select INTEL_GMA_VERSION_2 + select INTEL_TXT_LIB + select MP_SERVICES_PPI_V2 +- select MRC_CACHE_USING_MRC_VERSION if (SOC_INTEL_ALDERLAKE_PCH_N || SOC_INTEL_RAPTORLAKE) && !FSP_USE_REPO + select MRC_SETTINGS_PROTECT + select PARALLEL_MP_AP_WORK + select PLATFORM_USES_FSP2_2 +-- +2.47.3 + diff --git a/config/coreboot/default/patches/0037-Subject-PATCH-1-1-Add-a-p-option-skip-FPTR-checks.patch b/config/coreboot/default/patches/0037-Subject-PATCH-1-1-Add-a-p-option-skip-FPTR-checks.patch new file mode 100644 index 00000000..8cff0c56 --- /dev/null +++ b/config/coreboot/default/patches/0037-Subject-PATCH-1-1-Add-a-p-option-skip-FPTR-checks.patch @@ -0,0 +1,76 @@ +From 8ab86ffd25fc013790c260e564c8b770c13a5342 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Sun, 28 Sep 2025 03:17:50 +0100 +Subject: [PATCH 37/40] Subject: [PATCH 1/1] Add a -p option (skip FPTR checks) + +if you pass -k (keep fptr modules), don't use -r, don't +use -t, you can essentially just use me_cleaner to +extract a ME image without changing it. this is useful +when for example, you just want to set the HAP bit. + +however, me_cleaner still performs a FPTR check. + +on some newer ME versions, it's always invalid according +to me_cleaner, because for example it doesn't handle +ME16 very well yet. + +this patch adds an option to override the FPTR check + +either pass -p or --pass-fptr + +NOTE: we probably won't use this on coreboot's me_cleaner, +which is the corna version. we only need it on the newer +me_cleaner versions for e.g. ME16, on certain setups. +still, it's best to have the patch here too, just in case. + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + util/me_cleaner/me_cleaner.py | 14 ++++++++++---- + 1 file changed, 10 insertions(+), 4 deletions(-) + +diff --git a/util/me_cleaner/me_cleaner.py b/util/me_cleaner/me_cleaner.py +index fae5e56732..228bac899f 100755 +--- a/util/me_cleaner/me_cleaner.py ++++ b/util/me_cleaner/me_cleaner.py +@@ -246,8 +246,10 @@ def check_partition_signature(f, offset): + return "{:#x}".format(decrypted_sig).endswith(sha256.hexdigest()) # FIXME + + +-def print_check_partition_signature(f, offset): +- if check_partition_signature(f, offset): ++def print_check_partition_signature(f, offset, pass_fptr): ++ if pass_fptr: ++ print("Skipping FPTR checks because the user told us to") ++ elif check_partition_signature(f, offset): + print("VALID") + else: + print("INVALID!!") +@@ -486,6 +488,8 @@ if __name__ == "__main__": + "--extract-me)", action="store_true") + parser.add_argument("-k", "--keep-modules", help="don't remove the FTPR " + "modules, even when possible", action="store_true") ++ parser.add_argument("-p", "--pass-fptr", help="skip FTPR signature checks" ++ "regardless of other operations", action="store_true") + bw_list.add_argument("-w", "--whitelist", metavar="whitelist", + help="Comma separated list of additional partitions " + "to keep in the final image. This can be used to " +@@ -871,12 +875,14 @@ if __name__ == "__main__": + print("Checking the FTPR RSA signature of the extracted ME " + "image... ", end="") + print_check_partition_signature(mef_copy, +- ftpr_offset + ftpr_mn2_offset) ++ ftpr_offset + ftpr_mn2_offset, ++ args.pass_fptr) + mef_copy.close() + + if not me6_ignition: + print("Checking the FTPR RSA signature... ", end="") +- print_check_partition_signature(mef, ftpr_offset + ftpr_mn2_offset) ++ print_check_partition_signature(mef, ftpr_offset + ftpr_mn2_offset, ++ args.pass_fptr) + + f.close() + +-- +2.47.3 + diff --git a/config/coreboot/default/patches/0037-haswell-NRI-Add-REUT-I-O-test-library.patch b/config/coreboot/default/patches/0037-haswell-NRI-Add-REUT-I-O-test-library.patch deleted file mode 100644 index eaafcde3..00000000 --- a/config/coreboot/default/patches/0037-haswell-NRI-Add-REUT-I-O-test-library.patch +++ /dev/null @@ -1,1130 +0,0 @@ -From 460a092b22c9800c5ee9d8c4198e8b241664693f Mon Sep 17 00:00:00 2001 -From: Angel Pons <th3fanbus@gmail.com> -Date: Sun, 8 May 2022 00:11:29 +0200 -Subject: [PATCH 37/51] haswell NRI: Add REUT I/O test library - -Implement a library to run I/O tests using the REUT hardware. - -Change-Id: Id7b207cd0a3989ddd23c88c6b1f0cfa79d2c861f -Signed-off-by: Angel Pons <th3fanbus@gmail.com> ---- - .../intel/haswell/native_raminit/Makefile.mk | 1 + - .../haswell/native_raminit/raminit_native.h | 110 +++ - .../haswell/native_raminit/reg_structs.h | 121 +++ - .../intel/haswell/native_raminit/testing_io.c | 744 ++++++++++++++++++ - .../intel/haswell/registers/mchbar.h | 30 + - 5 files changed, 1006 insertions(+) - create mode 100644 src/northbridge/intel/haswell/native_raminit/testing_io.c - -diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -index 8d7d4e4db0..6e1b365602 100644 ---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk -+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -@@ -12,4 +12,5 @@ romstage-y += raminit_native.c - romstage-y += reut.c - romstage-y += setup_wdb.c - romstage-y += spd_bitmunching.c -+romstage-y += testing_io.c - romstage-y += timings_refresh.c -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -index 4d9487d79c..f029e7f076 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -@@ -59,6 +59,88 @@ enum { - REUT_MODE_NOP = 3, /* Normal operation mode */ - }; - -+/* REUT error counter control */ -+enum { -+ COUNT_ERRORS_PER_CHANNEL = 0, -+ COUNT_ERRORS_PER_LANE = 1, -+ COUNT_ERRORS_PER_BYTE_GROUP = 2, -+ COUNT_ERRORS_PER_CHUNK = 3, -+}; -+ -+enum wdb_dq_pattern { -+ BASIC_VA = 0, -+ SEGMENT_WDB, -+ CADB, -+ TURN_AROUND, -+ LMN_VA, -+ TURN_AROUND_WR, -+ TURN_AROUND_ODT, -+ RD_RD_TA, -+ RD_RD_TA_ALL, -+}; -+ -+enum reut_cmd_pat { -+ PAT_WR_RD, -+ PAT_WR, -+ PAT_RD, -+ PAT_RD_WR_TA, -+ PAT_WR_RD_TA, -+ PAT_ODT_TA, -+}; -+ -+/* REUT subsequence types (B = Base, O = Offset) */ -+enum { -+ SUBSEQ_B_RD = 0 << 22, -+ SUBSEQ_B_WR = 1 << 22, -+ SUBSEQ_B_RD_WR = 2 << 22, -+ SUBSEQ_B_WR_RD = 3 << 22, -+ SUBSEQ_O_RD = 4 << 22, -+ SUBSEQ_O_WR = 5 << 22, -+}; -+ -+/* REUT mux control */ -+enum { -+ REUT_MUX_LMN = 0, -+ REUT_MUX_BTBUFFER = 1, -+ REUT_MUX_LFSR = 2, -+}; -+ -+/* Increment scale */ -+enum { -+ SCALE_LOGARITHM = 0, -+ SCALE_LINEAR = 1, -+}; -+ -+enum test_stop { -+ NSOE = 0, /* Never stop on error */ -+ NTHSOE = 1, /* Stop on the nth error (we use n = 1) */ -+ ABGSOE = 2, /* Stop on all byte groups error */ -+ ALSOE = 3, /* Stop on all lanes error */ -+}; -+ -+struct wdb_pat { -+ uint32_t start_ptr; /* Starting pointer in WDB */ -+ uint32_t stop_ptr; /* Stopping pointer in WDB */ -+ uint16_t inc_rate; /* How quickly the WDB walks through cachelines */ -+ uint8_t dq_pattern; /* DQ pattern to use (see enum wdb_dq_pattern above) */ -+}; -+ -+struct reut_pole { -+ uint16_t start; -+ uint16_t stop; -+ uint16_t order; -+ uint32_t inc_rate; -+ uint16_t inc_val; -+ bool wrap_trigger; -+}; -+ -+struct reut_box { -+ struct reut_pole rank; -+ struct reut_pole bank; -+ struct reut_pole row; -+ struct reut_pole col; -+}; -+ - enum command_training_iteration { - CT_ITERATION_CLOCK = 0, - CT_ITERATION_CMD_NORTH, -@@ -200,6 +282,10 @@ struct sysinfo { - uint16_t mr1[NUM_CHANNELS][NUM_SLOTS]; - uint16_t mr2[NUM_CHANNELS][NUM_SLOTS]; - uint16_t mr3[NUM_CHANNELS][NUM_SLOTS]; -+ -+ uint8_t dq_pat; -+ -+ uint8_t dq_pat_lc; - }; - - static inline bool is_hsw_ult(void) -@@ -341,6 +427,30 @@ void write_wdb_va_pat( - void program_wdb_lfsr(const struct sysinfo *ctrl, bool cleanup); - void setup_wdb(const struct sysinfo *ctrl); - -+void program_seq_addr(uint8_t channel, const struct reut_box *reut_addr, bool log_seq_addr); -+void program_loop_count(const struct sysinfo *ctrl, uint8_t channel, uint8_t lc_exp); -+ -+void setup_io_test( -+ struct sysinfo *ctrl, -+ uint8_t chanmask, -+ enum reut_cmd_pat cmd_pat, -+ uint16_t num_cl, -+ uint8_t lc, -+ const struct reut_box *reut_addr, -+ enum test_stop soe, -+ const struct wdb_pat *pat, -+ uint8_t en_cadb, -+ uint8_t subseq_wait); -+ -+void setup_io_test_cadb(struct sysinfo *ctrl, uint8_t chanmask, uint8_t lc, enum test_stop soe); -+void setup_io_test_basic_va(struct sysinfo *ctrl, uint8_t chm, uint8_t lc, enum test_stop soe); -+void setup_io_test_mpr(struct sysinfo *ctrl, uint8_t chanmask, uint8_t lc, enum test_stop soe); -+ -+uint8_t select_reut_ranks(struct sysinfo *ctrl, uint8_t channel, uint8_t rankmask); -+ -+void run_mpr_io_test(bool clear_errors); -+uint8_t run_io_test(struct sysinfo *ctrl, uint8_t chanmask, uint8_t dq_pat, bool clear_errors); -+ - uint8_t get_rx_bias(const struct sysinfo *ctrl); - - uint8_t get_tCWL(uint32_t mem_clock_mhz); -diff --git a/src/northbridge/intel/haswell/native_raminit/reg_structs.h b/src/northbridge/intel/haswell/native_raminit/reg_structs.h -index 7aa8d8c8b2..b943259b91 100644 ---- a/src/northbridge/intel/haswell/native_raminit/reg_structs.h -+++ b/src/northbridge/intel/haswell/native_raminit/reg_structs.h -@@ -347,6 +347,54 @@ union reut_pat_cl_mux_lmn_reg { - uint32_t raw; - }; - -+union reut_err_ctl_reg { -+ struct __packed { -+ uint32_t stop_on_nth_error : 6; // Bits 5:0 -+ uint32_t : 6; // Bits 11:6 -+ uint32_t stop_on_error_control : 2; // Bits 13:12 -+ uint32_t : 2; // Bits 15:14 -+ uint32_t selective_err_enable_chunk : 8; // Bits 23:16 -+ uint32_t selective_err_enable_cacheline : 8; // Bits 31:24 -+ }; -+ uint32_t raw; -+}; -+ -+union reut_pat_cadb_mux_ctrl_reg { -+ struct __packed { -+ uint32_t mux_0_ctrl : 2; // Bits 1:0 -+ uint32_t : 2; // Bits 3:2 -+ uint32_t mux_1_ctrl : 2; // Bits 5:4 -+ uint32_t : 2; // Bits 7:6 -+ uint32_t mux_2_ctrl : 2; // Bits 9:8 -+ uint32_t : 6; // Bits 15:10 -+ uint32_t sel_mux_0_ctrl : 2; // Bits 17:16 -+ uint32_t : 2; // Bits 19:18 -+ uint32_t sel_mux_1_ctrl : 2; // Bits 21:20 -+ uint32_t : 2; // Bits 23:22 -+ uint32_t sel_mux_2_ctrl : 2; // Bits 25:24 -+ uint32_t : 6; // Bits 31:26 -+ }; -+ uint32_t raw; -+}; -+ -+union reut_pat_wdb_cl_mux_cfg_reg { -+ struct __packed { -+ uint32_t mux_0_control : 2; // Bits 1:0 -+ uint32_t : 1; // Bits 2:2 -+ uint32_t mux_1_control : 2; // Bits 4:3 -+ uint32_t : 1; // Bits 5:5 -+ uint32_t mux_2_control : 2; // Bits 7:6 -+ uint32_t : 6; // Bits 13:8 -+ uint32_t ecc_replace_byte_ctl : 1; // Bits 14:14 -+ uint32_t ecc_data_source_sel : 1; // Bits 15:15 -+ uint32_t save_lfsr_seed_rate : 6; // Bits 21:16 -+ uint32_t : 2; // Bits 23:22 -+ uint32_t reload_lfsr_seed_rate : 3; // Bits 26:24 -+ uint32_t : 5; // Bits 31:27 -+ }; -+ uint32_t raw; -+}; -+ - union reut_pat_cadb_prog_reg { - struct __packed { - uint32_t addr : 16; // Bits 15:0 -@@ -366,6 +414,19 @@ union reut_pat_cadb_prog_reg { - uint32_t raw32[2]; - }; - -+union reut_pat_wdb_cl_ctrl_reg { -+ struct __packed { -+ uint32_t inc_rate : 5; // Bits 4:0 -+ uint32_t inc_scale : 1; // Bits 5:5 -+ uint32_t : 2; // Bits 7:6 -+ uint32_t start_ptr : 6; // Bits 13:8 -+ uint32_t : 2; // Bits 15:14 -+ uint32_t end_ptr : 6; // Bits 21:16 -+ uint32_t : 10; // Bits 31:22 -+ }; -+ uint32_t raw; -+}; -+ - union reut_pat_cadb_mrs_reg { - struct __packed { - uint32_t delay_gap : 3; // Bits 2:0 -@@ -406,6 +467,66 @@ union reut_seq_cfg_reg { - uint32_t raw32[2]; - }; - -+union reut_seq_base_addr_reg { -+ struct __packed { -+ uint32_t : 3; // Bits 2:0 -+ uint32_t col_addr : 8; // Bits 10:3 -+ uint32_t : 13; // Bits 23:11 -+ uint32_t row_addr : 16; // Bits 39:24 -+ uint32_t : 8; // Bits 47:40 -+ uint32_t bank_addr : 3; // Bits 50:48 -+ uint32_t : 5; // Bits 55:51 -+ uint32_t rank_addr : 3; // Bits 58:56 -+ uint32_t : 5; // Bits 63:59 -+ }; -+ uint32_t raw32[2]; -+ uint64_t raw; -+}; -+ -+union reut_seq_misc_ctl_reg { -+ struct __packed { -+ uint32_t col_addr_order : 2; // Bits 1:0 -+ uint32_t row_addr_order : 2; // Bits 3:2 -+ uint32_t bank_addr_order : 2; // Bits 5:4 -+ uint32_t rank_addr_order : 2; // Bits 7:6 -+ uint32_t : 5; // Bits 12:8 -+ uint32_t addr_invert_rate : 3; // Bits 15:13 -+ uint32_t : 4; // Bits 19:16 -+ uint32_t col_addr_invert_en : 1; // Bits 20:20 -+ uint32_t row_addr_invert_en : 1; // Bits 21:21 -+ uint32_t bank_addr_invert_en : 1; // Bits 22:22 -+ uint32_t rank_addr_invert_en : 1; // Bits 23:23 -+ uint32_t col_wrap_trigger_en : 1; // Bits 24:24 -+ uint32_t row_wrap_trigger_en : 1; // Bits 25:25 -+ uint32_t bank_wrap_trigger_en : 1; // Bits 26:26 -+ uint32_t rank_wrap_trigger_en : 1; // Bits 27:27 -+ uint32_t col_wrap_carry_en : 1; // Bits 28:28 -+ uint32_t row_wrap_carry_en : 1; // Bits 29:29 -+ uint32_t bank_wrap_carry_en : 1; // Bits 30:30 -+ uint32_t rank_wrap_carry_en : 1; // Bits 31:31 -+ }; -+ uint32_t raw; -+}; -+ -+union reut_seq_addr_inc_ctl_reg { -+ struct __packed { -+ uint32_t : 3; // Bits 2:0 -+ uint32_t col_addr_increment : 8; // Bits 10:3 -+ uint32_t : 1; // Bits 11:11 -+ uint32_t col_addr_update : 8; // Bits 19:12 -+ uint32_t row_addr_increment : 12; // Bits 31:20 -+ uint32_t row_addr_update : 6; // Bits 37:32 -+ uint32_t bank_addr_increment : 3; // Bits 40:38 -+ uint32_t : 3; // Bits 43:41 -+ uint32_t bank_addr_update : 8; // Bits 53:44 -+ uint32_t rank_addr_increment : 3; // Bits 54:52 -+ uint32_t : 1; // Bits 55:55 -+ uint32_t rank_addr_update : 8; // Bits 63:56 -+ }; -+ uint64_t raw; -+ uint32_t raw32[2]; -+}; -+ - union reut_seq_ctl_reg { - struct __packed { - uint32_t start_test : 1; // Bits 0:0 -diff --git a/src/northbridge/intel/haswell/native_raminit/testing_io.c b/src/northbridge/intel/haswell/native_raminit/testing_io.c -new file mode 100644 -index 0000000000..2632c238f8 ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/testing_io.c -@@ -0,0 +1,744 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <console/console.h> -+#include <delay.h> -+#include <lib.h> -+#include <northbridge/intel/haswell/haswell.h> -+#include <timer.h> -+#include <types.h> -+ -+#include "raminit_native.h" -+ -+static void set_cadb_patterns(const uint8_t channel, const uint16_t seeds[NUM_CADB_MUX_SEEDS]) -+{ -+ for (uint8_t i = 0; i < NUM_CADB_MUX_SEEDS; i++) -+ mchbar_write32(REUT_ch_PAT_CADB_MUX_x(channel, i), seeds[i]); -+} -+ -+static void setup_cadb( -+ struct sysinfo *ctrl, -+ const uint8_t channel, -+ const uint8_t vic_spread, -+ const uint8_t vic_bit) -+{ -+ const bool lmn_en = false; -+ -+ /* -+ * Currently, always start writing at CADB row 0. -+ * Could add a start point parameter in the future. -+ */ -+ mchbar_write8(REUT_ch_PAT_CADB_WRITE_PTR(channel), 0); -+ const uint8_t num_cadb_rows = 8; -+ for (uint8_t row = 0; row < num_cadb_rows; row++) { -+ const uint8_t lfsr0 = (row >> 0) & 1; -+ const uint8_t lfsr1 = (row >> 1) & 1; -+ uint64_t reg64 = 0; -+ for (uint8_t bit = 0; bit < 22; bit++) { -+ uint8_t bremap; -+ if (bit >= 19) { -+ /* (bremap in 40 .. 42) => CADB data control */ -+ bremap = bit + 21; -+ } else if (bit >= 16) { -+ /* (bremap in 24 .. 26) => CADB data bank */ -+ bremap = bit + 8; -+ } else { -+ /* (bremap in 0 .. 15) => CADB data address */ -+ bremap = bit; -+ } -+ const uint8_t fine = bit % vic_spread; -+ reg64 |= ((uint64_t)(fine == vic_bit ? lfsr0 : lfsr1)) << bremap; -+ } -+ /* -+ * Write row. CADB pointer is auto incremented after every write. This must be -+ * a single 64-bit write, otherwise the CADB pointer will auto-increment twice. -+ */ -+ mchbar_write64(REUT_ch_PAT_CADB_PROG(channel), reg64); -+ } -+ const union reut_pat_cadb_mux_ctrl_reg cadb_mux_ctrl = { -+ .mux_0_ctrl = lmn_en ? REUT_MUX_LMN : REUT_MUX_LFSR, -+ .mux_1_ctrl = REUT_MUX_LFSR, -+ .mux_2_ctrl = REUT_MUX_LFSR, -+ }; -+ mchbar_write32(REUT_ch_PAT_CADB_MUX_CTRL(channel), cadb_mux_ctrl.raw); -+ const union reut_pat_cl_mux_lmn_reg cadb_cl_mux_lmn = { -+ .en_sweep_freq = 1, -+ .l_counter = 1, -+ .m_counter = 1, -+ .n_counter = 6, -+ }; -+ mchbar_write32(REUT_ch_PAT_CADB_CL_MUX_LMN(channel), cadb_cl_mux_lmn.raw); -+ const uint16_t cadb_mux_seeds[NUM_CADB_MUX_SEEDS] = { 0x0ea1, 0xbeef, 0xdead }; -+ set_cadb_patterns(channel, cadb_mux_seeds); -+} -+ -+static uint32_t calc_rate(const uint32_t rate, const uint32_t lim, const uint8_t scale_bit) -+{ -+ return rate > lim ? log2_ceil(rate - 1) : BIT(scale_bit) | rate; -+} -+ -+void program_seq_addr( -+ const uint8_t channel, -+ const struct reut_box *reut_addr, -+ const bool log_seq_addr) -+{ -+ const int loglevel = log_seq_addr ? BIOS_ERR : BIOS_NEVER; -+ const uint32_t div = 8; -+ union reut_seq_base_addr_reg reut_seq_addr_start = { -+ .col_addr = reut_addr->col.start / div, -+ .row_addr = reut_addr->row.start, -+ .bank_addr = reut_addr->bank.start, -+ .rank_addr = reut_addr->rank.start, -+ }; -+ mchbar_write64(REUT_ch_SEQ_ADDR_START(channel), reut_seq_addr_start.raw); -+ reut_seq_addr_start.raw = mchbar_read64(REUT_ch_SEQ_ADDR_START(channel)); -+ printk(loglevel, "\tStart column: %u\n", reut_seq_addr_start.col_addr); -+ printk(loglevel, "\tStart row: %u\n", reut_seq_addr_start.row_addr); -+ printk(loglevel, "\tStart bank: %u\n", reut_seq_addr_start.bank_addr); -+ printk(loglevel, "\tStart rank: %u\n", reut_seq_addr_start.rank_addr); -+ printk(loglevel, "\n"); -+ -+ union reut_seq_base_addr_reg reut_seq_addr_stop = { -+ .col_addr = reut_addr->col.stop / div, -+ .row_addr = reut_addr->row.stop, -+ .bank_addr = reut_addr->bank.stop, -+ .rank_addr = reut_addr->rank.stop, -+ }; -+ mchbar_write64(REUT_ch_SEQ_ADDR_WRAP(channel), reut_seq_addr_stop.raw); -+ reut_seq_addr_stop.raw = mchbar_read64(REUT_ch_SEQ_ADDR_WRAP(channel)); -+ printk(loglevel, "\tStop column: %u\n", reut_seq_addr_stop.col_addr); -+ printk(loglevel, "\tStop row: %u\n", reut_seq_addr_stop.row_addr); -+ printk(loglevel, "\tStop bank: %u\n", reut_seq_addr_stop.bank_addr); -+ printk(loglevel, "\tStop rank: %u\n", reut_seq_addr_stop.rank_addr); -+ printk(loglevel, "\n"); -+ -+ union reut_seq_misc_ctl_reg reut_seq_misc_ctl = { -+ .col_wrap_trigger_en = reut_addr->col.wrap_trigger, -+ .row_wrap_trigger_en = reut_addr->row.wrap_trigger, -+ .bank_wrap_trigger_en = reut_addr->bank.wrap_trigger, -+ .rank_wrap_trigger_en = reut_addr->rank.wrap_trigger, -+ }; -+ mchbar_write32(REUT_ch_SEQ_MISC_CTL(channel), reut_seq_misc_ctl.raw); -+ printk(loglevel, "\tWrap column: %u\n", reut_addr->col.wrap_trigger); -+ printk(loglevel, "\tWrap row: %u\n", reut_addr->row.wrap_trigger); -+ printk(loglevel, "\tWrap bank: %u\n", reut_addr->bank.wrap_trigger); -+ printk(loglevel, "\tWrap rank: %u\n", reut_addr->rank.wrap_trigger); -+ printk(loglevel, "\n"); -+ -+ union reut_seq_addr_inc_ctl_reg reut_seq_addr_inc_ctl = { -+ .col_addr_update = calc_rate(reut_addr->col.inc_rate, 31, 7), -+ .row_addr_update = calc_rate(reut_addr->row.inc_rate, 15, 5), -+ .bank_addr_update = calc_rate(reut_addr->bank.inc_rate, 31, 7), -+ .rank_addr_update = calc_rate(reut_addr->rank.inc_rate, 31, 7), -+ .col_addr_increment = reut_addr->col.inc_val, -+ .row_addr_increment = reut_addr->row.inc_val, -+ .bank_addr_increment = reut_addr->bank.inc_val, -+ .rank_addr_increment = reut_addr->rank.inc_val, -+ }; -+ printk(loglevel, "\tUpdRate column: %u\n", reut_addr->col.inc_rate); -+ printk(loglevel, "\tUpdRate row: %u\n", reut_addr->row.inc_rate); -+ printk(loglevel, "\tUpdRate bank: %u\n", reut_addr->bank.inc_rate); -+ printk(loglevel, "\tUpdRate rank: %u\n", reut_addr->rank.inc_rate); -+ printk(loglevel, "\n"); -+ printk(loglevel, "\tUpdRateCR column: %u\n", reut_seq_addr_inc_ctl.col_addr_update); -+ printk(loglevel, "\tUpdRateCR row: %u\n", reut_seq_addr_inc_ctl.row_addr_update); -+ printk(loglevel, "\tUpdRateCR bank: %u\n", reut_seq_addr_inc_ctl.bank_addr_update); -+ printk(loglevel, "\tUpdRateCR rank: %u\n", reut_seq_addr_inc_ctl.rank_addr_update); -+ printk(loglevel, "\n"); -+ printk(loglevel, "\tUpdInc column: %u\n", reut_seq_addr_inc_ctl.col_addr_increment); -+ printk(loglevel, "\tUpdInc row: %u\n", reut_seq_addr_inc_ctl.row_addr_increment); -+ printk(loglevel, "\tUpdInc bank: %u\n", reut_seq_addr_inc_ctl.bank_addr_increment); -+ printk(loglevel, "\tUpdInc rank: %u\n", reut_seq_addr_inc_ctl.rank_addr_increment); -+ printk(loglevel, "\n"); -+ mchbar_write64(REUT_ch_SEQ_ADDR_INC_CTL(channel), reut_seq_addr_inc_ctl.raw); -+} -+ -+/* -+ * Early steppings take exponential (base 2) loopcount values, -+ * but later steppings take linear loopcount values elsewhere. -+ * Address the differences in register offset and format here. -+ */ -+void program_loop_count(const struct sysinfo *ctrl, const uint8_t channel, const uint8_t lc_exp) -+{ -+ if (ctrl->stepping >= STEPPING_C0) { -+ const uint32_t loopcount = lc_exp >= 32 ? 0 : BIT(lc_exp); -+ mchbar_write32(HSW_REUT_ch_SEQ_LOOP_COUNT(channel), loopcount); -+ } else { -+ const uint8_t loopcount = lc_exp >= 32 ? 0 : lc_exp + 1; -+ union reut_seq_cfg_reg reut_seq_cfg = { -+ .raw = mchbar_read64(REUT_ch_SEQ_CFG(channel)), -+ }; -+ reut_seq_cfg.early_steppings_loop_count = loopcount; -+ mchbar_write64(REUT_ch_SEQ_CFG(channel), reut_seq_cfg.raw); -+ } -+} -+ -+static inline void write_subseq(const uint8_t channel, const uint8_t idx, const uint32_t ssq) -+{ -+ mchbar_write32(REUT_ch_SUBSEQ_x_CTL(channel, idx), ssq); -+} -+ -+static void program_subseq( -+ struct sysinfo *const ctrl, -+ const uint8_t channel, -+ const enum reut_cmd_pat cmd_pat, -+ const uint32_t ss_a, -+ const uint32_t ss_b) -+{ -+ switch (cmd_pat) { -+ case PAT_WR_RD_TA: -+ write_subseq(channel, 0, ss_a | SUBSEQ_B_WR); -+ for (uint8_t i = 1; i < 7; i++) -+ write_subseq(channel, i, ss_b | SUBSEQ_B_RD_WR); -+ -+ write_subseq(channel, 7, ss_a | SUBSEQ_B_RD); -+ break; -+ case PAT_RD_WR_TA: -+ write_subseq(channel, 0, ss_b | SUBSEQ_B_WR_RD); -+ break; -+ case PAT_ODT_TA: -+ write_subseq(channel, 0, ss_a | SUBSEQ_B_WR); -+ write_subseq(channel, 1, ss_b | SUBSEQ_B_RD_WR); -+ write_subseq(channel, 2, ss_a | SUBSEQ_B_RD); -+ write_subseq(channel, 3, ss_b | SUBSEQ_B_WR_RD); -+ break; -+ default: -+ write_subseq(channel, 0, ss_a | SUBSEQ_B_WR); -+ write_subseq(channel, 1, ss_a | SUBSEQ_B_RD); -+ break; -+ } -+} -+ -+void setup_io_test( -+ struct sysinfo *ctrl, -+ const uint8_t chanmask, -+ const enum reut_cmd_pat cmd_pat, -+ const uint16_t num_cl, -+ const uint8_t lc, -+ const struct reut_box *const reut_addr, -+ const enum test_stop soe, -+ const struct wdb_pat *const pat, -+ const uint8_t en_cadb, -+ const uint8_t subseq_wait) -+{ -+ if (!chanmask) { -+ printk(BIOS_ERR, "\n%s: chanmask is invalid\n", __func__); -+ return; -+ } -+ -+ /* -+ * Prepare variables needed for both channels. -+ * Check for the cases where this MUST be 1: when -+ * we manually walk through subseq ODT and TA Wr. -+ */ -+ uint8_t lc_exp = MAX(lc - log2_ceil(num_cl), 0); -+ if (cmd_pat == PAT_WR_RD_TA || cmd_pat == PAT_ODT_TA) -+ lc_exp = 0; -+ -+ uint8_t num_clcr; -+ if (num_cl > 127) { -+ /* Assume exponential number */ -+ num_clcr = log2_ceil(num_cl); -+ } else { -+ /* Set number of cache lines as linear number */ -+ num_clcr = num_cl | BIT(7); -+ } -+ -+ const uint16_t num_cl2 = 2 * num_cl; -+ uint8_t num_cl2cr; -+ if (num_cl2 > 127) { -+ /* Assume exponential number */ -+ num_cl2cr = log2_ceil(num_cl2); -+ } else { -+ /* Set number of cache lines as linear number */ -+ num_cl2cr = num_cl2 | BIT(7); -+ } -+ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!(chanmask & BIT(channel))) { -+ union reut_seq_cfg_reg reut_seq_cfg = { -+ .raw = mchbar_read64(REUT_ch_SEQ_CFG(channel)), -+ }; -+ reut_seq_cfg.global_control = 0; -+ mchbar_write64(REUT_ch_SEQ_CFG(channel), reut_seq_cfg.raw); -+ continue; -+ } -+ -+ /* -+ * Program CADB -+ */ -+ mchbar_write8(REUT_ch_MISC_PAT_CADB_CTRL(channel), !!en_cadb); -+ if (en_cadb) -+ setup_cadb(ctrl, channel, 7, 8); -+ -+ /* -+ * Program sequence -+ */ -+ uint8_t subseq_start = 0; -+ uint8_t subseq_end = 0; -+ switch (cmd_pat) { -+ case PAT_WR_RD: -+ subseq_end = 1; -+ break; -+ case PAT_WR: -+ break; -+ case PAT_RD: -+ subseq_start = 1; -+ subseq_end = 1; -+ break; -+ case PAT_RD_WR_TA: -+ break; -+ case PAT_WR_RD_TA: -+ subseq_end = 7; -+ break; -+ case PAT_ODT_TA: -+ subseq_end = 3; -+ break; -+ default: -+ die("\n%s: Pattern type %u is invalid\n", __func__, cmd_pat); -+ } -+ const union reut_seq_cfg_reg reut_seq_cfg = { -+ .global_control = 1, -+ .initialization_mode = REUT_MODE_TEST, -+ .subsequence_start_pointer = subseq_start, -+ .subsequence_end_pointer = subseq_end, -+ .start_test_delay = 2, -+ }; -+ mchbar_write64(REUT_ch_SEQ_CFG(channel), reut_seq_cfg.raw); -+ program_loop_count(ctrl, channel, lc_exp); -+ mchbar_write32(REUT_ch_SEQ_CTL(channel), (union reut_seq_ctl_reg) { -+ .clear_errors = 1, -+ }.raw); -+ -+ /* -+ * Program subsequences -+ */ -+ uint32_t subseq_a = 0; -+ -+ /* Number of cachelines and scale */ -+ subseq_a |= (num_clcr & 0x00ff) << 0; -+ subseq_a |= (subseq_wait & 0x3fff) << 8; -+ -+ /* Reset current base address to start */ -+ subseq_a |= BIT(27); -+ -+ uint32_t subseq_b = 0; -+ -+ /* Number of cachelines and scale */ -+ subseq_b |= (num_cl2cr & 0x00ff) << 0; -+ subseq_b |= (subseq_wait & 0x3fff) << 8; -+ -+ /* Reset current base address to start */ -+ subseq_b |= BIT(27); -+ -+ program_subseq(ctrl, channel, cmd_pat, subseq_a, subseq_b); -+ -+ /* Program sequence address */ -+ program_seq_addr(channel, reut_addr, false); -+ -+ /* Program WDB */ -+ const bool is_linear = pat->inc_rate < 32; -+ mchbar_write32(REUT_ch_WDB_CL_CTRL(channel), (union reut_pat_wdb_cl_ctrl_reg) { -+ .start_ptr = pat->start_ptr, -+ .end_ptr = pat->stop_ptr, -+ .inc_rate = is_linear ? pat->inc_rate : log2_ceil(pat->inc_rate), -+ .inc_scale = is_linear, -+ }.raw); -+ -+ /* Enable LMN in LMN or CADB modes, used to create lots of supply noise */ -+ const bool use_lmn = pat->dq_pattern == LMN_VA || pat->dq_pattern == CADB; -+ union reut_pat_wdb_cl_mux_cfg_reg pat_wdb_cl_mux_cfg = { -+ .mux_0_control = use_lmn ? REUT_MUX_LMN : REUT_MUX_LFSR, -+ .mux_1_control = REUT_MUX_LFSR, -+ .mux_2_control = REUT_MUX_LFSR, -+ .ecc_data_source_sel = 1, -+ }; -+ -+ /* Program LFSR save/restore, too complex unless everything is power of 2 */ -+ if (cmd_pat == PAT_ODT_TA || cmd_pat == PAT_WR_RD_TA) { -+ pat_wdb_cl_mux_cfg.reload_lfsr_seed_rate = log2_ceil(num_cl) + 1; -+ pat_wdb_cl_mux_cfg.save_lfsr_seed_rate = 1; -+ } -+ mchbar_write32(REUT_ch_PAT_WDB_CL_MUX_CFG(channel), pat_wdb_cl_mux_cfg.raw); -+ -+ /* Inversion mask is not used */ -+ mchbar_write32(REUT_ch_PAT_WDB_INV(channel), 0); -+ -+ /* Program error checking */ -+ const union reut_err_ctl_reg reut_err_ctl = { -+ .selective_err_enable_cacheline = 0xff, -+ .selective_err_enable_chunk = 0xff, -+ .stop_on_error_control = soe, -+ .stop_on_nth_error = 1, -+ }; -+ mchbar_write32(REUT_ch_ERR_CONTROL(channel), reut_err_ctl.raw); -+ mchbar_write64(REUT_ch_ERR_DATA_MASK(channel), 0); -+ mchbar_write8(REUT_ch_ERR_ECC_MASK(channel), 0); -+ } -+ -+ /* Always do a ZQ short before the beginning of a test */ -+ reut_issue_zq(ctrl, chanmask, ZQ_SHORT); -+} -+ -+void setup_io_test_cadb( -+ struct sysinfo *ctrl, -+ const uint8_t chanmask, -+ const uint8_t lc, -+ const enum test_stop soe) -+{ -+ const struct reut_box reut_addr = { -+ .rank = { -+ .start = 0, -+ .stop = 0, -+ .inc_rate = 32, -+ .inc_val = 1, -+ }, -+ .bank = { -+ .start = 0, -+ .stop = 7, -+ .inc_rate = 3, -+ .inc_val = 1, -+ }, -+ .row = { -+ .start = 0, -+ .stop = 2047, -+ .inc_rate = 3, -+ .inc_val = 73, -+ }, -+ .col = { -+ .start = 0, -+ .stop = 1023, -+ .inc_rate = 0, -+ .inc_val = 53, -+ }, -+ }; -+ const struct wdb_pat pattern = { -+ .start_ptr = 0, -+ .stop_ptr = 9, -+ .inc_rate = 4, -+ .dq_pattern = CADB, -+ }; -+ setup_io_test( -+ ctrl, -+ chanmask, -+ PAT_WR_RD, -+ 128, -+ lc, -+ &reut_addr, -+ soe, -+ &pattern, -+ 1, -+ 0); -+ -+ ctrl->dq_pat_lc = MAX(lc - 2 - 3, 0) + 1; -+ ctrl->dq_pat = CADB; -+} -+ -+void setup_io_test_basic_va( -+ struct sysinfo *ctrl, -+ const uint8_t chanmask, -+ const uint8_t lc, -+ const enum test_stop soe) -+{ -+ const uint32_t spread = 8; -+ const struct reut_box reut_addr = { -+ .rank = { -+ .start = 0, -+ .stop = 0, -+ .inc_rate = 32, -+ .inc_val = 1, -+ }, -+ .col = { -+ .start = 0, -+ .stop = 1023, -+ .inc_rate = 0, -+ .inc_val = 1, -+ }, -+ }; -+ const struct wdb_pat pattern = { -+ .start_ptr = 0, -+ .stop_ptr = spread - 1, -+ .inc_rate = 4, -+ .dq_pattern = BASIC_VA, -+ }; -+ setup_io_test( -+ ctrl, -+ chanmask, -+ PAT_WR_RD, -+ 128, -+ lc, -+ &reut_addr, -+ soe, -+ &pattern, -+ 0, -+ 0); -+ -+ ctrl->dq_pat_lc = MAX(lc - 8, 0) + 1; -+ ctrl->dq_pat = BASIC_VA; -+} -+ -+void setup_io_test_mpr( -+ struct sysinfo *ctrl, -+ const uint8_t chanmask, -+ const uint8_t lc, -+ const enum test_stop soe) -+{ -+ const struct reut_box reut_addr_ddr = { -+ .rank = { -+ .start = 0, -+ .stop = 0, -+ .inc_rate = 32, -+ .inc_val = 1, -+ }, -+ .col = { -+ .start = 0, -+ .stop = 1023, -+ .inc_rate = 0, -+ .inc_val = 1, -+ }, -+ }; -+ const struct reut_box reut_addr_lpddr = { -+ .bank = { -+ .start = 4, -+ .stop = 4, -+ .inc_rate = 0, -+ .inc_val = 0, -+ }, -+ }; -+ const struct wdb_pat pattern = { -+ .start_ptr = 0, -+ .stop_ptr = 9, -+ .inc_rate = 4, -+ .dq_pattern = BASIC_VA, -+ }; -+ setup_io_test( -+ ctrl, -+ chanmask, -+ PAT_RD, -+ 128, -+ lc, -+ ctrl->lpddr ? &reut_addr_lpddr : &reut_addr_ddr, -+ soe, -+ &pattern, -+ 0, -+ 0); -+ -+ ctrl->dq_pat_lc = 1; -+ ctrl->dq_pat = BASIC_VA; -+} -+ -+uint8_t select_reut_ranks(struct sysinfo *ctrl, const uint8_t channel, uint8_t rankmask) -+{ -+ rankmask &= ctrl->rankmap[channel]; -+ -+ uint8_t rank_count = 0; -+ uint32_t rank_log_to_phys = 0; -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ if (!rank_in_mask(rank, rankmask)) -+ continue; -+ -+ rank_log_to_phys |= rank << (4 * rank_count); -+ rank_count++; -+ } -+ mchbar_write32(REUT_ch_RANK_LOG_TO_PHYS(channel), rank_log_to_phys); -+ -+ union reut_seq_cfg_reg reut_seq_cfg = { -+ .raw = mchbar_read64(REUT_ch_SEQ_CFG(channel)), -+ }; -+ if (!rank_count) { -+ reut_seq_cfg.global_control = 0; -+ mchbar_write64(REUT_ch_SEQ_CFG(channel), reut_seq_cfg.raw); -+ return 0; -+ } -+ union reut_seq_base_addr_reg reut_seq_addr_stop = { -+ .raw = mchbar_read64(REUT_ch_SEQ_ADDR_WRAP(channel)), -+ }; -+ reut_seq_addr_stop.rank_addr = rank_count - 1; -+ mchbar_write64(REUT_ch_SEQ_ADDR_WRAP(channel), reut_seq_addr_stop.raw); -+ -+ reut_seq_cfg.global_control = 1; -+ mchbar_write64(REUT_ch_SEQ_CFG(channel), reut_seq_cfg.raw); -+ return BIT(channel); -+} -+ -+void run_mpr_io_test(const bool clear_errors) -+{ -+ io_reset(); -+ mchbar_write32(REUT_GLOBAL_CTL, (union reut_seq_ctl_reg) { -+ .start_test = 1, -+ .clear_errors = clear_errors, -+ }.raw); -+ tick_delay(2); -+ io_reset(); -+ tick_delay(2); -+ mchbar_write32(REUT_GLOBAL_CTL, (union reut_seq_ctl_reg) { -+ .stop_test = 1, -+ }.raw); -+} -+ -+static uint8_t get_num_tests(const uint8_t dq_pat) -+{ -+ switch (dq_pat) { -+ case SEGMENT_WDB: return 4; -+ case CADB: return 7; -+ case TURN_AROUND_WR: return 8; -+ case TURN_AROUND_ODT: return 4; -+ case RD_RD_TA: return 2; -+ case RD_RD_TA_ALL: return 8; -+ default: return 1; -+ } -+} -+ -+uint8_t run_io_test( -+ struct sysinfo *const ctrl, -+ const uint8_t chanmask, -+ const uint8_t dq_pat, -+ const bool clear_errors) -+{ -+ /* SEGMENT_WDB only runs 4 tests */ -+ const uint8_t segment_wdb_lc[4] = { 0, 0, 4, 2 }; -+ const union reut_pat_wdb_cl_ctrl_reg pat_wdb_cl[4] = { -+ [0] = { -+ .start_ptr = 0, -+ .end_ptr = 9, -+ .inc_rate = 25, -+ .inc_scale = SCALE_LINEAR, -+ }, -+ [1] = { -+ .start_ptr = 0, -+ .end_ptr = 9, -+ .inc_rate = 25, -+ .inc_scale = SCALE_LINEAR, -+ }, -+ [2] = { -+ .start_ptr = 10, -+ .end_ptr = 63, -+ .inc_rate = 19, -+ .inc_scale = SCALE_LINEAR, -+ }, -+ [3] = { -+ .start_ptr = 10, -+ .end_ptr = 63, -+ .inc_rate = 10, -+ .inc_scale = SCALE_LINEAR, -+ }, -+ }; -+ const bool is_turnaround = dq_pat == RD_RD_TA || dq_pat == RD_RD_TA_ALL; -+ const uint8_t num_tests = get_num_tests(dq_pat); -+ union tc_bank_rank_a_reg tc_bank_rank_a[NUM_CHANNELS] = { 0 }; -+ if (is_turnaround) { -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!(chanmask & BIT(channel))) -+ continue; -+ -+ tc_bank_rank_a[channel].raw = ctrl->tc_bankrank_a[channel].raw; -+ } -+ } -+ for (uint8_t t = 0; t < num_tests; t++) { -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!(chanmask & BIT(channel))) -+ continue; -+ -+ if (dq_pat == SEGMENT_WDB) { -+ mchbar_write32(REUT_ch_WDB_CL_CTRL(channel), pat_wdb_cl[t].raw); -+ /* -+ * Skip programming LFSR save/restore. Too complex -+ * unless power of 2. Program desired loopcount. -+ */ -+ const uint8_t pat_lc = ctrl->dq_pat_lc + segment_wdb_lc[t]; -+ program_loop_count(ctrl, channel, pat_lc); -+ } else if (dq_pat == CADB) { -+ setup_cadb(ctrl, channel, num_tests, t); -+ } else if (dq_pat == TURN_AROUND_WR || dq_pat == TURN_AROUND_ODT) { -+ union reut_seq_cfg_reg reut_seq_cfg = { -+ .raw = mchbar_read64(REUT_ch_SEQ_CFG(channel)), -+ }; -+ reut_seq_cfg.subsequence_start_pointer = t; -+ reut_seq_cfg.subsequence_end_pointer = t; -+ mchbar_write64(REUT_ch_SEQ_CFG(channel), reut_seq_cfg.raw); -+ union reut_seq_addr_inc_ctl_reg addr_inc_ctl = { -+ .raw = mchbar_read64(REUT_ch_SEQ_ADDR_INC_CTL(channel)), -+ }; -+ uint8_t ta_inc_rate = 1; -+ if (dq_pat == TURN_AROUND_WR && (t == 0 || t == 7)) -+ ta_inc_rate = 0; -+ else if (dq_pat == TURN_AROUND_ODT && (t == 0 || t == 2)) -+ ta_inc_rate = 0; -+ -+ /* Program increment rate as linear value */ -+ addr_inc_ctl.rank_addr_update = BIT(7) | ta_inc_rate; -+ addr_inc_ctl.col_addr_update = BIT(7) | ta_inc_rate; -+ mchbar_write64(REUT_ch_SEQ_ADDR_INC_CTL(channel), -+ addr_inc_ctl.raw); -+ } else if (dq_pat == RD_RD_TA) { -+ tc_bank_rank_a[channel].tRDRD_sr = (t == 0) ? 4 : 5; -+ mchbar_write32(TC_BANK_RANK_A_ch(channel), -+ tc_bank_rank_a[channel].raw); -+ } else if (dq_pat == RD_RD_TA_ALL) { -+ /* -+ * Program tRDRD for SR and DR. Run 8 tests, covering -+ * tRDRD_sr = 4, 5, 6, 7 and tRDRD_dr = min, +1, +2, +3 -+ */ -+ const uint32_t tRDRD_dr = ctrl->tc_bankrank_a[channel].tRDRD_dr; -+ tc_bank_rank_a[channel].tRDRD_sr = (t % 4) + 4; -+ tc_bank_rank_a[channel].tRDRD_dr = (t % 4) + tRDRD_dr; -+ mchbar_write32(TC_BANK_RANK_A_ch(channel), -+ tc_bank_rank_a[channel].raw); -+ -+ /* Program linear rank increment rate */ -+ union reut_seq_addr_inc_ctl_reg addr_inc_ctl = { -+ .raw = mchbar_read64(REUT_ch_SEQ_ADDR_INC_CTL(channel)), -+ }; -+ addr_inc_ctl.rank_addr_update = BIT(7) | (t / 4) ? 0 : 31; -+ mchbar_write64(REUT_ch_SEQ_ADDR_INC_CTL(channel), -+ addr_inc_ctl.raw); -+ } -+ } -+ bool test_soe = false; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!(chanmask & BIT(channel))) -+ continue; -+ -+ const union reut_err_ctl_reg reut_err_ctl = { -+ .raw = mchbar_read32(REUT_ch_ERR_CONTROL(channel)), -+ }; -+ const uint8_t soe = reut_err_ctl.stop_on_error_control; -+ if (soe != NSOE) { -+ test_soe = true; -+ break; -+ } -+ } -+ io_reset(); -+ mchbar_write32(REUT_GLOBAL_CTL, (union reut_seq_ctl_reg) { -+ .start_test = 1, -+ .clear_errors = clear_errors && t == 0, -+ }.raw); -+ struct mono_time prev, curr; -+ timer_monotonic_get(&prev); -+ union reut_global_err_reg global_err; -+ do { -+ global_err.raw = mchbar_read32(REUT_GLOBAL_ERR); -+ /** TODO: Clean up this mess **/ -+ timer_monotonic_get(&curr); -+ if (mono_time_diff_microseconds(&prev, &curr) > 1000 * 1000) { -+ mchbar_write32(REUT_GLOBAL_CTL, (union reut_seq_ctl_reg) { -+ .stop_test = 1, -+ }.raw); -+ printk(BIOS_ERR, "REUT timed out, ch_done: %x\n", -+ global_err.ch_test_done); -+ break; -+ } -+ } while ((global_err.ch_test_done & chanmask) != chanmask); -+ if (test_soe && global_err.ch_error & chanmask) -+ break; -+ } -+ if (is_turnaround) { -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!(chanmask & BIT(channel))) -+ continue; -+ -+ mchbar_write32(TC_BANK_RANK_A_ch(channel), -+ ctrl->tc_bankrank_a[channel].raw); -+ } -+ } -+ return ((union reut_global_err_reg)mchbar_read32(REUT_GLOBAL_ERR)).ch_error; -+} -diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h -index f8408e51a0..817a9f8bf8 100644 ---- a/src/northbridge/intel/haswell/registers/mchbar.h -+++ b/src/northbridge/intel/haswell/registers/mchbar.h -@@ -94,20 +94,35 @@ - #define TC_BANK_RANK_D_ch(ch) _MCMAIN_C(0x4014, ch) - #define SC_ROUNDT_LAT_ch(ch) _MCMAIN_C(0x4024, ch) - -+#define REUT_ch_PAT_WDB_CL_MUX_CFG(ch) _MCMAIN_C(0x4040, ch) -+ - #define REUT_ch_PAT_WDB_CL_MUX_WR_x(ch, x) _MCMAIN_C_X(0x4048, ch, x) /* x in 0 .. 2 */ - #define REUT_ch_PAT_WDB_CL_MUX_RD_x(ch, x) _MCMAIN_C_X(0x4054, ch, x) /* x in 0 .. 2 */ - - #define REUT_ch_PAT_WDB_CL_MUX_LMN(ch) _MCMAIN_C(0x4078, ch) - -+#define REUT_ch_PAT_WDB_INV(ch) _MCMAIN_C(0x4084, ch) -+ -+#define REUT_ch_ERR_CONTROL(ch) _MCMAIN_C(0x4098, ch) -+#define REUT_ch_ERR_ECC_MASK(ch) _MCMAIN_C(0x409c, ch) -+ - #define SC_WR_ADD_DELAY_ch(ch) _MCMAIN_C(0x40d0, ch) - -+#define REUT_ch_ERR_DATA_MASK(ch) _MCMAIN_C(0x40d8, ch) -+ - #define REUT_ch_MISC_CKE_CTRL(ch) _MCMAIN_C(0x4190, ch) - -+#define REUT_ch_MISC_PAT_CADB_CTRL(ch) _MCMAIN_C(0x4198, ch) - #define REUT_ch_PAT_CADB_MRS(ch) _MCMAIN_C(0x419c, ch) -+#define REUT_ch_PAT_CADB_MUX_CTRL(ch) _MCMAIN_C(0x41a0, ch) -+#define REUT_ch_PAT_CADB_MUX_x(ch, x) _MCMAIN_C_X(0x41a4, ch, x) /* x in 0 .. 2 */ - -+#define REUT_ch_PAT_CADB_CL_MUX_LMN(ch) _MCMAIN_C(0x41b0, ch) - #define REUT_ch_PAT_CADB_WRITE_PTR(ch) _MCMAIN_C(0x41bc, ch) - #define REUT_ch_PAT_CADB_PROG(ch) _MCMAIN_C(0x41c0, ch) - -+#define REUT_ch_WDB_CL_CTRL(ch) _MCMAIN_C(0x4200, ch) -+ - #define TC_ZQCAL_ch(ch) _MCMAIN_C(0x4290, ch) - #define TC_RFP_ch(ch) _MCMAIN_C(0x4294, ch) - #define TC_RFTP_ch(ch) _MCMAIN_C(0x4298, ch) -@@ -119,12 +134,27 @@ - #define QCLK_ch_LDAT_SDAT(ch) _MCMAIN_C(0x42d4, ch) - #define QCLK_ch_LDAT_DATA_IN_x(ch, x) _MCMAIN_C_X(0x42dc, ch, x) /* x in 0 .. 1 */ - -+#define REUT_GLOBAL_CTL 0x4800 - #define REUT_GLOBAL_ERR 0x4804 - -+#define REUT_ch_SUBSEQ_x_CTL(ch, x) (0x4808 + 40 * (ch) + 4 * (x)) -+ - #define REUT_ch_SEQ_CFG(ch) (0x48a8 + 8 * (ch)) - - #define REUT_ch_SEQ_CTL(ch) (0x48b8 + 4 * (ch)) - -+#define REUT_ch_SEQ_ADDR_START(ch) (0x48d8 + 8 * (ch)) -+ -+#define REUT_ch_SEQ_ADDR_WRAP(ch) (0x48e8 + 8 * (ch)) -+ -+#define REUT_ch_SEQ_MISC_CTL(ch) (0x4908 + 4 * (ch)) -+ -+#define REUT_ch_SEQ_ADDR_INC_CTL(ch) (0x4910 + 8 * (ch)) -+ -+#define REUT_ch_RANK_LOG_TO_PHYS(ch) (0x4930 + 4 * (ch)) /* 4 bits per rank */ -+ -+#define HSW_REUT_ch_SEQ_LOOP_COUNT(ch) (0x4980 + 4 * (ch)) /* *** only on C0 *** */ -+ - /* MCMAIN broadcast */ - #define MCSCHEDS_CBIT 0x4c20 - --- -2.39.5 - diff --git a/config/coreboot/default/patches/0038-haswell-NRI-Add-range-tracking-library.patch b/config/coreboot/default/patches/0038-haswell-NRI-Add-range-tracking-library.patch deleted file mode 100644 index 45fdc951..00000000 --- a/config/coreboot/default/patches/0038-haswell-NRI-Add-range-tracking-library.patch +++ /dev/null @@ -1,222 +0,0 @@ -From 36b206a88281796458e6ebc30fe34a7c51c86548 Mon Sep 17 00:00:00 2001 -From: Angel Pons <th3fanbus@gmail.com> -Date: Sun, 8 May 2022 00:56:00 +0200 -Subject: [PATCH 38/51] haswell NRI: Add range tracking library - -Implement a small library used to keep track of passing ranges. This -will be used by 1D training algorithms when margining some parameter. - -Change-Id: I8718e85165160afd7c0c8e730b5ce6c9c00f8a60 -Signed-off-by: Angel Pons <th3fanbus@gmail.com> ---- - .../intel/haswell/native_raminit/Makefile.mk | 1 + - .../intel/haswell/native_raminit/ranges.c | 109 ++++++++++++++++++ - .../intel/haswell/native_raminit/ranges.h | 68 +++++++++++ - 3 files changed, 178 insertions(+) - create mode 100644 src/northbridge/intel/haswell/native_raminit/ranges.c - create mode 100644 src/northbridge/intel/haswell/native_raminit/ranges.h - -diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -index 6e1b365602..2da950771d 100644 ---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk -+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -@@ -9,6 +9,7 @@ romstage-y += io_comp_control.c - romstage-y += memory_map.c - romstage-y += raminit_main.c - romstage-y += raminit_native.c -+romstage-y += ranges.c - romstage-y += reut.c - romstage-y += setup_wdb.c - romstage-y += spd_bitmunching.c -diff --git a/src/northbridge/intel/haswell/native_raminit/ranges.c b/src/northbridge/intel/haswell/native_raminit/ranges.c -new file mode 100644 -index 0000000000..cdebc1fa66 ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/ranges.c -@@ -0,0 +1,109 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <types.h> -+ -+#include "ranges.h" -+ -+void linear_record_pass( -+ struct linear_train_data *const data, -+ const bool pass, -+ const int32_t value, -+ const int32_t start, -+ const int32_t step) -+{ -+ /* If this is the first time, initialize all values */ -+ if (value == start) { -+ /* -+ * If value passed, create a zero-length region for the current value, -+ * which may be extended as long as the successive values are passing. -+ * -+ * Otherwise, create a zero-length range for the preceding value. This -+ * range cannot be extended by other passing values, which is desired. -+ */ -+ data->current.start = start - (pass ? 0 : step); -+ data->current.end = data->current.start; -+ data->largest = data->current; -+ } else if (pass) { -+ /* If this pass is not contiguous, it belongs to a new region */ -+ if (data->current.end != (value - step)) -+ data->current.start = value; -+ -+ /* Update end of current region */ -+ data->current.end = value; -+ -+ /* Update largest region */ -+ if (range_width(data->current) > range_width(data->largest)) -+ data->largest = data->current; -+ } -+} -+ -+void phase_record_pass( -+ struct phase_train_data *const data, -+ const bool pass, -+ const int32_t value, -+ const int32_t start, -+ const int32_t step) -+{ -+ /* If this is the first time, initialize all values */ -+ if (value == start) { -+ /* -+ * If value passed, create a zero-length region for the current value, -+ * which may be extended as long as the successive values are passing. -+ * -+ * Otherwise, create a zero-length range for the preceding value. This -+ * range cannot be extended by other passing values, which is desired. -+ */ -+ data->current.start = start - (pass ? 0 : step); -+ data->current.end = data->current.start; -+ data->largest = data->current; -+ data->initial = data->current; -+ return; -+ } -+ if (!pass) -+ return; -+ -+ /* Update initial region */ -+ if (data->initial.end == (value - step)) -+ data->initial.end = value; -+ -+ /* If this pass is not contiguous, it belongs to a new region */ -+ if (data->current.end != (value - step)) -+ data->current.start = value; -+ -+ /* Update end of current region */ -+ data->current.end = value; -+ -+ /* Update largest region */ -+ if (range_width(data->current) > range_width(data->largest)) -+ data->largest = data->current; -+} -+ -+void phase_append_initial_to_current( -+ struct phase_train_data *const data, -+ const int32_t start, -+ const int32_t step) -+{ -+ /* If initial region is valid and does not overlap, append it */ -+ if (data->initial.start == start && data->initial.end != data->current.end) -+ data->current.end += step + range_width(data->initial); -+ -+ /* Update largest region */ -+ if (range_width(data->current) > range_width(data->largest)) -+ data->largest = data->current; -+} -+ -+void phase_append_current_to_initial( -+ struct phase_train_data *const data, -+ const int32_t start, -+ const int32_t step) -+{ -+ /* If initial region is valid and does not overlap, append it */ -+ if (data->initial.start == start && data->initial.end != data->current.end) { -+ data->initial.start -= (step + range_width(data->current)); -+ data->current = data->initial; -+ } -+ -+ /* Update largest region */ -+ if (range_width(data->current) > range_width(data->largest)) -+ data->largest = data->current; -+} -diff --git a/src/northbridge/intel/haswell/native_raminit/ranges.h b/src/northbridge/intel/haswell/native_raminit/ranges.h -new file mode 100644 -index 0000000000..235392df96 ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/ranges.h -@@ -0,0 +1,68 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#ifndef HASWELL_RAMINIT_RANGES_H -+#define HASWELL_RAMINIT_RANGES_H -+ -+#include <types.h> -+ -+/* -+ * Many algorithms shmoo some parameter to determine the largest passing -+ * range. Provide a common implementation to avoid redundant boilerplate. -+ */ -+struct passing_range { -+ int32_t start; -+ int32_t end; -+}; -+ -+/* Structure for linear parameters, such as roundtrip delays */ -+struct linear_train_data { -+ struct passing_range current; -+ struct passing_range largest; -+}; -+ -+/* -+ * Phase ranges are "circular": the first and last indices are contiguous. -+ * To correctly determine the largest passing range, one has to combine -+ * the initial range and the current range when processing the last index. -+ */ -+struct phase_train_data { -+ struct passing_range initial; -+ struct passing_range current; -+ struct passing_range largest; -+}; -+ -+static inline int32_t range_width(const struct passing_range range) -+{ -+ return range.end - range.start; -+} -+ -+static inline int32_t range_center(const struct passing_range range) -+{ -+ return range.start + range_width(range) / 2; -+} -+ -+void linear_record_pass( -+ struct linear_train_data *data, -+ bool pass, -+ int32_t value, -+ int32_t start, -+ int32_t step); -+ -+void phase_record_pass( -+ struct phase_train_data *data, -+ bool pass, -+ int32_t value, -+ int32_t start, -+ int32_t step); -+ -+void phase_append_initial_to_current( -+ struct phase_train_data *data, -+ int32_t start, -+ int32_t step); -+ -+void phase_append_current_to_initial( -+ struct phase_train_data *data, -+ int32_t start, -+ int32_t step); -+ -+#endif --- -2.39.5 - diff --git a/config/coreboot/default/patches/0038-soc-intel-alderlake-Don-t-compress-FSP-S.patch b/config/coreboot/default/patches/0038-soc-intel-alderlake-Don-t-compress-FSP-S.patch new file mode 100644 index 00000000..545f2076 --- /dev/null +++ b/config/coreboot/default/patches/0038-soc-intel-alderlake-Don-t-compress-FSP-S.patch @@ -0,0 +1,35 @@ +From c36ed52f7573563a9eaeeedd6e6c0ee75973a39d Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Sat, 4 Oct 2025 21:57:43 +0100 +Subject: [PATCH 38/40] soc/intel/alderlake: Don't compress FSP-S + +Build systems like lbmk need to reproducibly insert +certain vendor files on release images. + +Compression isn't always reproducible, and making it +so costs a lot more time than simply disabling compression. + +With this change, FSP-S uses slightly more space inside +the flash, but it's not that much. + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + src/soc/intel/alderlake/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig +index 739faa3808..1f6a1dca7d 100644 +--- a/src/soc/intel/alderlake/Kconfig ++++ b/src/soc/intel/alderlake/Kconfig +@@ -14,7 +14,7 @@ config SOC_INTEL_ALDERLAKE + select DISPLAY_FSP_VERSION_INFO + select DRIVERS_USB_ACPI + select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2 +- select FSP_COMPRESS_FSP_S_LZ4 ++# select FSP_COMPRESS_FSP_S_LZ4 + select FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW + select FSP_M_XIP + select FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN +-- +2.47.3 + diff --git a/config/coreboot/default/patches/0039-alderlake-don-t-require-full-fsp-repo-for-fd-path.patch b/config/coreboot/default/patches/0039-alderlake-don-t-require-full-fsp-repo-for-fd-path.patch new file mode 100644 index 00000000..ed7d98e0 --- /dev/null +++ b/config/coreboot/default/patches/0039-alderlake-don-t-require-full-fsp-repo-for-fd-path.patch @@ -0,0 +1,33 @@ +From e564490781b0b829da43534c6c2a1b26aeb3282f Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Sat, 4 Oct 2025 22:20:11 +0100 +Subject: [PATCH 39/40] alderlake: don't require full fsp repo for fd path + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + src/soc/intel/alderlake/Kconfig | 9 ++++++++- + 1 file changed, 8 insertions(+), 1 deletion(-) + +diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig +index 1f6a1dca7d..3979d9e162 100644 +--- a/src/soc/intel/alderlake/Kconfig ++++ b/src/soc/intel/alderlake/Kconfig +@@ -415,7 +415,14 @@ config FSP_HEADER_PATH + + config FSP_FD_PATH + string +- depends on FSP_USE_REPO ++# dependency removed for lbmk purposes, so that the path is present ++# in the config regardless of whether it's used. this is for ./mk -d ++# on alderlake boards, which is used by lbmk to manually split fsp, ++# even though the result is identical to what coreboot produces, because ++# this enables lbmk to strip the fsp in release archives, and re-insert ++# for compliance reasons (due to technicalities in intel's licensing), ++# and to enable lbmk's advanced checksum verification of vendor files ++# depends on FSP_USE_REPO + default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeP/FSP.fd" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE + default "3rdparty/fsp/RaptorLakeFspBinPkg/IoT/RaptorLakeS/FSP.fd" if FSP_TYPE_IOT && SOC_INTEL_RAPTORLAKE_PCH_S + default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeP/Fsp.fd" if FSP_TYPE_IOT && SOC_INTEL_ALDERLAKE_PCH_P +-- +2.47.3 + diff --git a/config/coreboot/default/patches/0039-haswell-NRI-Add-library-to-change-margins.patch b/config/coreboot/default/patches/0039-haswell-NRI-Add-library-to-change-margins.patch deleted file mode 100644 index 401433ac..00000000 --- a/config/coreboot/default/patches/0039-haswell-NRI-Add-library-to-change-margins.patch +++ /dev/null @@ -1,294 +0,0 @@ -From 926b1af1033c26ad231587fd3a4506efb4b0d8a3 Mon Sep 17 00:00:00 2001 -From: Angel Pons <th3fanbus@gmail.com> -Date: Sun, 8 May 2022 01:11:03 +0200 -Subject: [PATCH 39/51] haswell NRI: Add library to change margins - -Implement a library to change Rx/Tx margins. It will be expanded later. - -Change-Id: I0b55aba428d8b4d4e16d2fbdec57235ce3ce8adf -Signed-off-by: Angel Pons <th3fanbus@gmail.com> ---- - .../intel/haswell/native_raminit/Makefile.mk | 1 + - .../haswell/native_raminit/change_margin.c | 154 ++++++++++++++++++ - .../haswell/native_raminit/raminit_native.h | 50 ++++++ - .../intel/haswell/registers/mchbar.h | 9 + - 4 files changed, 214 insertions(+) - create mode 100644 src/northbridge/intel/haswell/native_raminit/change_margin.c - -diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -index 2da950771d..ebe9e9b762 100644 ---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk -+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -@@ -1,5 +1,6 @@ - ## SPDX-License-Identifier: GPL-2.0-or-later - -+romstage-y += change_margin.c - romstage-y += configure_mc.c - romstage-y += ddr3.c - romstage-y += jedec_reset.c -diff --git a/src/northbridge/intel/haswell/native_raminit/change_margin.c b/src/northbridge/intel/haswell/native_raminit/change_margin.c -new file mode 100644 -index 0000000000..055c666eee ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/change_margin.c -@@ -0,0 +1,154 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <commonlib/bsd/clamp.h> -+#include <console/console.h> -+#include <delay.h> -+#include <northbridge/intel/haswell/haswell.h> -+#include <timer.h> -+ -+#include "raminit_native.h" -+ -+void update_rxt( -+ struct sysinfo *ctrl, -+ const uint8_t channel, -+ const uint8_t rank, -+ const uint8_t byte, -+ const enum rxt_subfield subfield, -+ const int32_t value) -+{ -+ union ddr_data_rx_train_rank_reg rxt = { -+ .rcven = ctrl->rcven[channel][rank][byte], -+ .dqs_p = ctrl->rxdqsp[channel][rank][byte], -+ .rx_eq = ctrl->rx_eq[channel][rank][byte], -+ .dqs_n = ctrl->rxdqsn[channel][rank][byte], -+ .vref = ctrl->rxvref[channel][rank][byte], -+ }; -+ int32_t new_value; -+ switch (subfield) { -+ case RXT_RCVEN: -+ new_value = clamp_s32(0, value, 511); -+ rxt.rcven = new_value; -+ break; -+ case RXT_RXDQS_P: -+ new_value = clamp_s32(0, value, 63); -+ rxt.dqs_p = new_value; -+ break; -+ case RXT_RX_EQ: -+ new_value = clamp_s32(0, value, 31); -+ rxt.rx_eq = new_value; -+ break; -+ case RXT_RXDQS_N: -+ new_value = clamp_s32(0, value, 63); -+ rxt.dqs_n = new_value; -+ break; -+ case RXT_RX_VREF: -+ new_value = clamp_s32(-32, value, 31); -+ rxt.vref = new_value; -+ break; -+ case RXT_RXDQS_BOTH: -+ new_value = clamp_s32(0, value, 63); -+ rxt.dqs_p = new_value; -+ rxt.dqs_n = new_value; -+ break; -+ case RXT_RESTORE: -+ new_value = value; -+ break; -+ default: -+ die("%s: Unhandled subfield index %u\n", __func__, subfield); -+ } -+ -+ if (new_value != value) { -+ printk(BIOS_ERR, "%s: Overflow for subfield %u: %d ---> %d\n", -+ __func__, subfield, value, new_value); -+ } -+ mchbar_write32(RX_TRAIN_ch_r_b(channel, rank, byte), rxt.raw); -+ download_regfile(ctrl, channel, false, rank, REG_FILE_USE_RANK, byte, true, false); -+} -+ -+void update_txt( -+ struct sysinfo *ctrl, -+ const uint8_t channel, -+ const uint8_t rank, -+ const uint8_t byte, -+ const enum txt_subfield subfield, -+ const int32_t value) -+{ -+ union ddr_data_tx_train_rank_reg txt = { -+ .dq_delay = ctrl->tx_dq[channel][rank][byte], -+ .dqs_delay = ctrl->txdqs[channel][rank][byte], -+ .tx_eq = ctrl->tx_eq[channel][rank][byte], -+ }; -+ int32_t new_value; -+ switch (subfield) { -+ case TXT_TX_DQ: -+ new_value = clamp_s32(0, value, 511); -+ txt.dq_delay = new_value; -+ break; -+ case TXT_TXDQS: -+ new_value = clamp_s32(0, value, 511); -+ txt.dqs_delay = new_value; -+ break; -+ case TXT_TX_EQ: -+ new_value = clamp_s32(0, value, 63); -+ txt.tx_eq = new_value; -+ break; -+ case TXT_DQDQS_OFF: -+ new_value = value; -+ txt.dqs_delay += new_value; -+ txt.dq_delay += new_value; -+ break; -+ case TXT_RESTORE: -+ new_value = value; -+ break; -+ default: -+ die("%s: Unhandled subfield index %u\n", __func__, subfield); -+ } -+ if (new_value != value) { -+ printk(BIOS_ERR, "%s: Overflow for subfield %u: %d ---> %d\n", -+ __func__, subfield, value, new_value); -+ } -+ mchbar_write32(TX_TRAIN_ch_r_b(channel, rank, byte), txt.raw); -+ download_regfile(ctrl, channel, false, rank, REG_FILE_USE_RANK, byte, false, true); -+} -+ -+void download_regfile( -+ struct sysinfo *ctrl, -+ const uint8_t channel, -+ const bool multicast, -+ const uint8_t rank, -+ const enum regfile_mode regfile, -+ const uint8_t byte, -+ const bool read_rf_rd, -+ const bool read_rf_wr) -+{ -+ union reut_seq_base_addr_reg reut_seq_base_addr; -+ switch (regfile) { -+ case REG_FILE_USE_START: -+ reut_seq_base_addr.raw = mchbar_read64(REUT_ch_SEQ_ADDR_START(channel)); -+ break; -+ case REG_FILE_USE_CURRENT: -+ reut_seq_base_addr.raw = mchbar_read64(REUT_ch_SEQ_ADDR_CURRENT(channel)); -+ break; -+ case REG_FILE_USE_RANK: -+ reut_seq_base_addr.raw = 0; -+ if (rank >= NUM_SLOTRANKS) -+ die("%s: bad rank %u\n", __func__, rank); -+ break; -+ default: -+ die("%s: Invalid regfile param %u\n", __func__, regfile); -+ } -+ uint8_t phys_rank = rank; -+ if (reut_seq_base_addr.raw != 0) { -+ /* Map REUT logical rank to physical rank */ -+ const uint32_t log_to_phys = mchbar_read32(REUT_ch_RANK_LOG_TO_PHYS(channel)); -+ phys_rank = log_to_phys >> (reut_seq_base_addr.rank_addr * 4) & 0x3; -+ } -+ uint32_t reg = multicast ? DDR_DATA_ch_CONTROL_0(channel) : DQ_CONTROL_0(channel, byte); -+ union ddr_data_control_0_reg ddr_data_control_0 = { -+ .raw = mchbar_read32(reg), -+ }; -+ ddr_data_control_0.read_rf_rd = read_rf_rd; -+ ddr_data_control_0.read_rf_wr = read_rf_wr; -+ ddr_data_control_0.read_rf_rank = phys_rank; -+ mchbar_write32(reg, ddr_data_control_0.raw); -+} -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -index f029e7f076..8707257b27 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -@@ -118,6 +118,30 @@ enum test_stop { - ALSOE = 3, /* Stop on all lanes error */ - }; - -+enum rxt_subfield { -+ RXT_RCVEN = 0, -+ RXT_RXDQS_P = 1, -+ RXT_RX_EQ = 2, -+ RXT_RXDQS_N = 3, -+ RXT_RX_VREF = 4, -+ RXT_RXDQS_BOTH = 5, -+ RXT_RESTORE = 255, -+}; -+ -+enum txt_subfield { -+ TXT_TX_DQ = 0, -+ TXT_TXDQS = 1, -+ TXT_TX_EQ = 2, -+ TXT_DQDQS_OFF = 3, -+ TXT_RESTORE = 255, -+}; -+ -+enum regfile_mode { -+ REG_FILE_USE_RANK, /* Used when changing parameters for each rank */ -+ REG_FILE_USE_START, /* Used when changing parameters before the test */ -+ REG_FILE_USE_CURRENT, /* Used when changing parameters after the test */ -+}; -+ - struct wdb_pat { - uint32_t start_ptr; /* Starting pointer in WDB */ - uint32_t stop_ptr; /* Stopping pointer in WDB */ -@@ -451,6 +475,32 @@ uint8_t select_reut_ranks(struct sysinfo *ctrl, uint8_t channel, uint8_t rankmas - void run_mpr_io_test(bool clear_errors); - uint8_t run_io_test(struct sysinfo *ctrl, uint8_t chanmask, uint8_t dq_pat, bool clear_errors); - -+void update_rxt( -+ struct sysinfo *ctrl, -+ uint8_t channel, -+ uint8_t rank, -+ uint8_t byte, -+ enum rxt_subfield subfield, -+ int32_t value); -+ -+void update_txt( -+ struct sysinfo *ctrl, -+ uint8_t channel, -+ uint8_t rank, -+ uint8_t byte, -+ enum txt_subfield subfield, -+ int32_t value); -+ -+void download_regfile( -+ struct sysinfo *ctrl, -+ uint8_t channel, -+ bool multicast, -+ uint8_t rank, -+ enum regfile_mode regfile, -+ uint8_t byte, -+ bool read_rf_rd, -+ bool read_rf_wr); -+ - uint8_t get_rx_bias(const struct sysinfo *ctrl); - - uint8_t get_tCWL(uint32_t mem_clock_mhz); -diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h -index 817a9f8bf8..a81559bb1e 100644 ---- a/src/northbridge/intel/haswell/registers/mchbar.h -+++ b/src/northbridge/intel/haswell/registers/mchbar.h -@@ -15,7 +15,11 @@ - /* Register definitions */ - - /* DDR DATA per-channel per-bytelane */ -+#define RX_TRAIN_ch_r_b(ch, rank, byte) _DDRIO_C_R_B(0x0000, ch, rank, byte) -+#define TX_TRAIN_ch_r_b(ch, rank, byte) _DDRIO_C_R_B(0x0020, ch, rank, byte) -+ - #define DQ_CONTROL_2(ch, byte) _DDRIO_C_R_B(0x0064, ch, 0, byte) -+#define DQ_CONTROL_0(ch, byte) _DDRIO_C_R_B(0x0074, ch, 0, byte) - - /* DDR CKE per-channel */ - #define DDR_CKE_ch_CMD_COMP_OFFSET(ch) _DDRIO_C_R_B(0x1204, ch, 0, 0) -@@ -38,6 +42,9 @@ - #define DDR_SCRAMBLE_ch(ch) (0x2000 + 4 * (ch)) - #define DDR_SCRAM_MISC_CONTROL 0x2008 - -+/* DDR DATA per-channel multicast */ -+#define DDR_DATA_ch_CONTROL_0(ch) _DDRIO_C_R_B(0x3074, ch, 0, 0) -+ - /* DDR CMDN/CMDS per-channel (writes go to both CMDN and CMDS fubs) */ - #define DDR_CMD_ch_COMP_OFFSET(ch) _DDRIO_C_R_B(0x3204, ch, 0, 0) - #define DDR_CMD_ch_PI_CODING(ch) _DDRIO_C_R_B(0x3208, ch, 0, 0) -@@ -147,6 +154,8 @@ - - #define REUT_ch_SEQ_ADDR_WRAP(ch) (0x48e8 + 8 * (ch)) - -+#define REUT_ch_SEQ_ADDR_CURRENT(ch) (0x48f8 + 8 * (ch)) -+ - #define REUT_ch_SEQ_MISC_CTL(ch) (0x4908 + 4 * (ch)) - - #define REUT_ch_SEQ_ADDR_INC_CTL(ch) (0x4910 + 8 * (ch)) --- -2.39.5 - diff --git a/config/coreboot/default/patches/0040-Haswell-NRI-Implement-SMBIOS-type-16-17.patch b/config/coreboot/default/patches/0040-Haswell-NRI-Implement-SMBIOS-type-16-17.patch new file mode 100644 index 00000000..4fdf2476 --- /dev/null +++ b/config/coreboot/default/patches/0040-Haswell-NRI-Implement-SMBIOS-type-16-17.patch @@ -0,0 +1,184 @@ +From 0fdb23e899e31b17a774ae9151410b11ccf13022 Mon Sep 17 00:00:00 2001 +From: Ron Nazarov <ron@noisytoot.org> +Date: Tue, 30 Sep 2025 22:36:53 +0100 +Subject: [PATCH 40/40] Haswell NRI: Implement SMBIOS type 16/17 + +Based on the implementation from Ivy/Sandy Bridge NRI. + +Tested on a Dell OptiPlex 9020 SFF with libreboot. + +Change-Id: I5e153258f9f88726f54c98baac0b1788a839f934 +Signed-off-by: Ron Nazarov <ron@noisytoot.org> +--- + .../haswell/native_raminit/raminit_main.c | 6 +- + .../haswell/native_raminit/raminit_native.c | 83 +++++++++++++++++-- + .../haswell/native_raminit/raminit_native.h | 2 +- + 3 files changed, 81 insertions(+), 10 deletions(-) + +diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c +index 84db33ebdf..328f777ee1 100644 +--- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c ++++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c +@@ -245,7 +245,7 @@ static enum raminit_status try_raminit( + return status; + } + +-void raminit_main(const enum raminit_boot_mode bootmode) ++const struct sysinfo *raminit_main(const enum raminit_boot_mode bootmode) + { + /* + * The mighty_ctrl struct. Will happily nuke the pre-RAM stack +@@ -261,7 +261,7 @@ void raminit_main(const enum raminit_boot_mode bootmode) + if (bootmode != BOOTMODE_COLD) { + status = try_raminit(&mighty_ctrl, fast_boot, ARRAY_SIZE(fast_boot)); + if (status == RAMINIT_STATUS_SUCCESS) +- return; ++ return &mighty_ctrl; + } + + /** TODO: Try more than once **/ +@@ -269,4 +269,6 @@ void raminit_main(const enum raminit_boot_mode bootmode) + + if (status != RAMINIT_STATUS_SUCCESS) + die("Memory initialization was met with utmost failure and misery\n"); ++ ++ return &mighty_ctrl; + } +diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c +index 3ad8ce29e7..73532592e8 100644 +--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c ++++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c +@@ -16,6 +16,73 @@ + + #include "raminit_native.h" + ++static uint8_t nb_get_ecc_type(const uint32_t capid0_a) ++{ ++ return capid0_a & CAPID_ECCDIS ? MEMORY_ARRAY_ECC_NONE : MEMORY_ARRAY_ECC_SINGLE_BIT; ++} ++ ++static uint16_t nb_slots_per_channel(const uint32_t capid0_a) ++{ ++ return !(capid0_a & CAPID_DDPCD) + 1; ++} ++ ++static uint16_t nb_number_of_channels(const uint32_t capid0_a) ++{ ++ return !(capid0_a & CAPID_PDCD) + 1; ++} ++ ++static uint32_t nb_max_chan_capacity_mib(const uint32_t capid0_a) ++{ ++ uint32_t ddrsz; ++ ++ /* Values from documentation, which assume two DIMMs per channel */ ++ switch (CAPID_DDRSZ(capid0_a)) { ++ case 1: ++ ddrsz = 8192; ++ break; ++ case 2: ++ ddrsz = 2048; ++ break; ++ case 3: ++ ddrsz = 512; ++ break; ++ default: ++ ddrsz = 16384; ++ break; ++ } ++ ++ /* Account for the maximum number of DIMMs per channel */ ++ return (ddrsz / 2) * nb_slots_per_channel(capid0_a); ++} ++ ++/* Fill cbmem with information for SMBIOS type 16 and type 17 */ ++static void setup_sdram_meminfo(const struct sysinfo *ctrl) ++{ ++ const u16 ddr_freq = (1000 << 8) / ctrl->tCK; ++ ++ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { ++ for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) { ++ enum cb_err ret = spd_add_smbios17(channel, slot, ddr_freq, ++ &ctrl->dimms[channel][slot].data); ++ if (ret != CB_SUCCESS) ++ printk(BIOS_ERR, "RAMINIT: Failed to add SMBIOS17\n"); ++ } ++ } ++ ++ /* The 'spd_add_smbios17' function allocates this CBMEM area */ ++ struct memory_info *m = cbmem_find(CBMEM_ID_MEMINFO); ++ if (!m) ++ return; ++ ++ const uint32_t capid0_a = pci_read_config32(HOST_BRIDGE, CAPID0_A); ++ ++ const uint16_t channels = nb_number_of_channels(capid0_a); ++ ++ m->ecc_type = nb_get_ecc_type(capid0_a); ++ m->max_capacity_mib = channels * nb_max_chan_capacity_mib(capid0_a); ++ m->number_of_devices = channels * nb_slots_per_channel(capid0_a); ++} ++ + static void wait_txt_clear(void) + { + const struct cpuid_result cpuid = cpuid_ext(1, 0); +@@ -90,7 +157,8 @@ static void raminit_reset(void) + static enum raminit_boot_mode do_actual_raminit( + const bool s3resume, + const bool cpu_replaced, +- const enum raminit_boot_mode orig_bootmode) ++ const enum raminit_boot_mode orig_bootmode, ++ const struct sysinfo **ctrl) + { + struct mrc_data md = prepare_mrc_cache(); + +@@ -158,7 +226,7 @@ static enum raminit_boot_mode do_actual_raminit( + * And now, the actual memory initialization thing. + */ + printk(RAM_DEBUG, "\nStarting native raminit\n"); +- raminit_main(bootmode); ++ *ctrl = raminit_main(bootmode); + + return bootmode; + } +@@ -176,8 +244,9 @@ void perform_raminit(const int s3resume) + wait_txt_clear(); + wrmsr(0x2e6, (msr_t) {.lo = 0, .hi = 0}); + ++ const struct sysinfo *ctrl; + const enum raminit_boot_mode bootmode = +- do_actual_raminit(s3resume, cpu_replaced, orig_bootmode); ++ do_actual_raminit(s3resume, cpu_replaced, orig_bootmode, &ctrl); + + /** TODO: report_memory_config **/ + +@@ -204,9 +273,9 @@ void perform_raminit(const int s3resume) + system_reset(); + } + +- /* Save training data on non-S3 resumes */ +- if (!s3resume) ++ /* Save training data and set up SMBIOS type 16/17 on non-S3 resumes */ ++ if (!s3resume) { + save_mrc_data(); +- +- /** TODO: setup_sdram_meminfo **/ ++ setup_sdram_meminfo(ctrl); ++ } + } +diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h +index b9e84a11df..1401feedc5 100644 +--- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h ++++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h +@@ -476,7 +476,7 @@ static inline void mchbar_write64(const uintptr_t x, const uint64_t v) + "m"(mmxsave)); + } + +-void raminit_main(enum raminit_boot_mode bootmode); ++const struct sysinfo *raminit_main(enum raminit_boot_mode bootmode); + + enum raminit_status collect_spd_info(struct sysinfo *ctrl); + enum raminit_status initialise_mpll(struct sysinfo *ctrl); +-- +2.47.3 + diff --git a/config/coreboot/default/patches/0040-haswell-NRI-Add-RcvEn-training.patch b/config/coreboot/default/patches/0040-haswell-NRI-Add-RcvEn-training.patch deleted file mode 100644 index a40ffa69..00000000 --- a/config/coreboot/default/patches/0040-haswell-NRI-Add-RcvEn-training.patch +++ /dev/null @@ -1,708 +0,0 @@ -From 61435822eb1d65b919bec45076737ce4ea91e1b1 Mon Sep 17 00:00:00 2001 -From: Angel Pons <th3fanbus@gmail.com> -Date: Sun, 8 May 2022 00:05:41 +0200 -Subject: [PATCH 40/51] haswell NRI: Add RcvEn training - -Implement the RcvEn (Receive Enable) calibration procedure. - -Change-Id: Ifbfa520f3e0486c56d0988ce67af2ddb9cf29888 -Signed-off-by: Angel Pons <th3fanbus@gmail.com> ---- - .../intel/haswell/native_raminit/Makefile.mk | 1 + - .../haswell/native_raminit/raminit_main.c | 1 + - .../haswell/native_raminit/raminit_native.h | 14 + - .../haswell/native_raminit/reg_structs.h | 13 + - .../native_raminit/train_receive_enable.c | 561 ++++++++++++++++++ - .../intel/haswell/registers/mchbar.h | 3 + - 6 files changed, 593 insertions(+) - create mode 100644 src/northbridge/intel/haswell/native_raminit/train_receive_enable.c - -diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -index ebe9e9b762..e2fbfb4211 100644 ---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk -+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -@@ -16,3 +16,4 @@ romstage-y += setup_wdb.c - romstage-y += spd_bitmunching.c - romstage-y += testing_io.c - romstage-y += timings_refresh.c -+romstage-y += train_receive_enable.c -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -index 5e4674957d..7d444659c3 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -@@ -60,6 +60,7 @@ static const struct task_entry cold_boot[] = { - { configure_memory_map, true, "MEMMAP", }, - { do_jedec_init, true, "JEDECINIT", }, - { pre_training, true, "PRETRAIN", }, -+ { train_receive_enable, true, "RCVET", }, - }; - - /* Return a generic stepping value to make stepping checks simpler */ -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -index 8707257b27..eaaaedad1e 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -@@ -43,6 +43,9 @@ - #define NUM_WDB_CL_MUX_SEEDS 3 - #define NUM_CADB_MUX_SEEDS 3 - -+/* Specified in PI ticks. 64 PI ticks == 1 qclk */ -+#define tDQSCK_DRIFT 64 -+ - /* ZQ calibration types */ - enum { - ZQ_INIT, /* DDR3: ZQCL with tZQinit, LPDDR3: ZQ Init with tZQinit */ -@@ -189,6 +192,7 @@ enum raminit_status { - RAMINIT_STATUS_MPLL_INIT_FAILURE, - RAMINIT_STATUS_POLL_TIMEOUT, - RAMINIT_STATUS_REUT_ERROR, -+ RAMINIT_STATUS_RCVEN_FAILURE, - RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/ - }; - -@@ -271,6 +275,10 @@ struct sysinfo { - - union ddr_data_vref_adjust_reg dimm_vref; - -+ uint8_t io_latency[NUM_CHANNELS][NUM_SLOTRANKS]; -+ uint8_t rt_latency[NUM_CHANNELS][NUM_SLOTRANKS]; -+ uint32_t rt_io_comp[NUM_CHANNELS]; -+ - uint32_t data_offset_train[NUM_CHANNELS][NUM_LANES]; - uint32_t data_offset_comp[NUM_CHANNELS][NUM_LANES]; - -@@ -345,6 +353,11 @@ static inline void clear_data_offset_train_all(struct sysinfo *ctrl) - memset(ctrl->data_offset_train, 0, sizeof(ctrl->data_offset_train)); - } - -+static inline uint32_t get_data_train_feedback(const uint8_t channel, const uint8_t byte) -+{ -+ return mchbar_read32(DDR_DATA_TRAIN_FEEDBACK(channel, byte)); -+} -+ - /* Number of ticks to wait in units of 69.841279 ns (citation needed) */ - static inline void tick_delay(const uint32_t delay) - { -@@ -400,6 +413,7 @@ enum raminit_status convert_timings(struct sysinfo *ctrl); - enum raminit_status configure_mc(struct sysinfo *ctrl); - enum raminit_status configure_memory_map(struct sysinfo *ctrl); - enum raminit_status do_jedec_init(struct sysinfo *ctrl); -+enum raminit_status train_receive_enable(struct sysinfo *ctrl); - - void configure_timings(struct sysinfo *ctrl); - void configure_refresh(struct sysinfo *ctrl); -diff --git a/src/northbridge/intel/haswell/native_raminit/reg_structs.h b/src/northbridge/intel/haswell/native_raminit/reg_structs.h -index b943259b91..b099f4bb82 100644 ---- a/src/northbridge/intel/haswell/native_raminit/reg_structs.h -+++ b/src/northbridge/intel/haswell/native_raminit/reg_structs.h -@@ -297,6 +297,19 @@ union ddr_scram_misc_control_reg { - uint32_t raw; - }; - -+union sc_io_latency_reg { -+ struct __packed { -+ uint32_t iolat_rank0 : 4; // Bits 3:0 -+ uint32_t iolat_rank1 : 4; // Bits 7:4 -+ uint32_t iolat_rank2 : 4; // Bits 11:8 -+ uint32_t iolat_rank3 : 4; // Bits 15:12 -+ uint32_t rt_iocomp : 6; // Bits 21:16 -+ uint32_t : 9; // Bits 30:22 -+ uint32_t dis_rt_clk_gate : 1; // Bits 31:31 -+ }; -+ uint32_t raw; -+}; -+ - union mcscheds_cbit_reg { - struct __packed { - uint32_t dis_opp_cas : 1; // Bits 0:0 -diff --git a/src/northbridge/intel/haswell/native_raminit/train_receive_enable.c b/src/northbridge/intel/haswell/native_raminit/train_receive_enable.c -new file mode 100644 -index 0000000000..576c6bc21e ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/train_receive_enable.c -@@ -0,0 +1,561 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <console/console.h> -+#include <northbridge/intel/haswell/haswell.h> -+#include <types.h> -+ -+#include "raminit_native.h" -+#include "ranges.h" -+ -+#define RCVEN_PLOT RAM_DEBUG -+ -+static enum raminit_status change_rcven_timing(struct sysinfo *ctrl, const uint8_t channel) -+{ -+ int16_t max_rcven = -4096; -+ int16_t min_rcven = 4096; -+ int16_t max_rcven_rank[NUM_SLOTRANKS]; -+ int16_t min_rcven_rank[NUM_SLOTRANKS]; -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ max_rcven_rank[rank] = max_rcven; -+ min_rcven_rank[rank] = min_rcven; -+ } -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ int16_t new_rcven = ctrl->rcven[channel][rank][byte]; -+ new_rcven -= ctrl->io_latency[channel][rank] * 64; -+ if (max_rcven_rank[rank] < new_rcven) -+ max_rcven_rank[rank] = new_rcven; -+ -+ if (min_rcven_rank[rank] > new_rcven) -+ min_rcven_rank[rank] = new_rcven; -+ } -+ if (max_rcven < max_rcven_rank[rank]) -+ max_rcven = max_rcven_rank[rank]; -+ -+ if (min_rcven > min_rcven_rank[rank]) -+ min_rcven = min_rcven_rank[rank]; -+ } -+ -+ /* -+ * Determine how far we are from the ideal center point for RcvEn timing. -+ * (PiIdeal - AveRcvEn) / 64 is the ideal number of cycles we should have -+ * for IO latency. command training will reduce this by 64, so plan for -+ * that now in the ideal value. Round to closest integer. -+ */ -+ const int16_t rre_pi_ideal = 256 + 64; -+ const int16_t pi_reserve = 64; -+ const int16_t rcven_center = (max_rcven + min_rcven) / 2; -+ const int8_t iolat_target = DIV_ROUND_CLOSEST(rre_pi_ideal - rcven_center, 64); -+ -+ int8_t io_g_offset = 0; -+ int8_t io_lat[NUM_SLOTRANKS] = { 0 }; -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ io_lat[rank] = iolat_target; -+ -+ /* Check for RcvEn underflow/overflow */ -+ const int16_t rcven_lower = 64 * io_lat[rank] + min_rcven_rank[rank]; -+ if (rcven_lower < pi_reserve) -+ io_lat[rank] += DIV_ROUND_UP(pi_reserve - rcven_lower, 64); -+ -+ const int16_t rcven_upper = 64 * io_lat[rank] + max_rcven_rank[rank]; -+ if (rcven_upper > 511 - pi_reserve) -+ io_lat[rank] -= DIV_ROUND_UP(rcven_upper - (511 - pi_reserve), 64); -+ -+ /* Check for IO latency over/underflow */ -+ if (io_lat[rank] - io_g_offset > 14) -+ io_g_offset = io_lat[rank] - 14; -+ -+ if (io_lat[rank] - io_g_offset < 1) -+ io_g_offset = io_lat[rank] - 1; -+ -+ const int8_t cycle_offset = io_lat[rank] - ctrl->io_latency[channel][rank]; -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ ctrl->rcven[channel][rank][byte] += 64 * cycle_offset; -+ update_rxt(ctrl, channel, rank, byte, RXT_RESTORE, 0); -+ } -+ } -+ -+ /* Calculate new IO comp latency */ -+ union sc_io_latency_reg sc_io_lat = { -+ .raw = mchbar_read32(SC_IO_LATENCY_ch(channel)), -+ }; -+ -+ /* Check if we are underflowing or overflowing this field */ -+ if (io_g_offset < 0 && sc_io_lat.rt_iocomp < -io_g_offset) { -+ printk(BIOS_ERR, "%s: IO COMP underflow\n", __func__); -+ printk(BIOS_ERR, "io_g_offset: %d\n", io_g_offset); -+ printk(BIOS_ERR, "rt_iocomp: %u\n", sc_io_lat.rt_iocomp); -+ return RAMINIT_STATUS_RCVEN_FAILURE; -+ } -+ if (io_g_offset > 0 && io_g_offset > 0x3f - sc_io_lat.rt_iocomp) { -+ printk(BIOS_ERR, "%s: IO COMP overflow\n", __func__); -+ printk(BIOS_ERR, "io_g_offset: %d\n", io_g_offset); -+ printk(BIOS_ERR, "rt_iocomp: %u\n", sc_io_lat.rt_iocomp); -+ return RAMINIT_STATUS_RCVEN_FAILURE; -+ } -+ sc_io_lat.rt_iocomp += io_g_offset; -+ ctrl->rt_io_comp[channel] = sc_io_lat.rt_iocomp; -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ if (ctrl->rankmap[channel] & BIT(rank)) -+ ctrl->io_latency[channel][rank] = io_lat[rank] - io_g_offset; -+ -+ const uint8_t shift = rank * 4; -+ sc_io_lat.raw &= ~(0xf << shift); -+ sc_io_lat.raw |= ctrl->io_latency[channel][rank] << shift; -+ } -+ mchbar_write32(SC_IO_LATENCY_ch(channel), sc_io_lat.raw); -+ return RAMINIT_STATUS_SUCCESS; -+} -+ -+#define RL_START (256 + 24) -+#define RL_STOP (384 + 24) -+#define RL_STEP 8 -+ -+#define RE_NUM_SAMPLES 6 -+ -+static enum raminit_status verify_high_region(const int32_t center, const int32_t lwidth) -+{ -+ if (center > RL_STOP) { -+ /* Check if center of high was found where it should be */ -+ printk(BIOS_ERR, "RcvEn: Center of high (%d) higher than expected\n", center); -+ return RAMINIT_STATUS_RCVEN_FAILURE; -+ } -+ if (lwidth <= 32) { -+ /* Check if width is large enough */ -+ printk(BIOS_ERR, "RcvEn: Width of high region (%d) too small\n", lwidth); -+ return RAMINIT_STATUS_RCVEN_FAILURE; -+ } -+ if (lwidth >= 96) { -+ /* Since we're calibrating a phase, a too large region is a problem */ -+ printk(BIOS_ERR, "RcvEn: Width of high region (%d) too large\n", lwidth); -+ return RAMINIT_STATUS_RCVEN_FAILURE; -+ } -+ return RAMINIT_STATUS_SUCCESS; -+} -+ -+static void program_io_latency(struct sysinfo *ctrl, const uint8_t channel, const uint8_t rank) -+{ -+ const uint8_t shift = rank * 4; -+ const uint8_t iolat = ctrl->io_latency[channel][rank]; -+ mchbar_clrsetbits32(SC_IO_LATENCY_ch(channel), 0xf << shift, iolat << shift); -+} -+ -+static void program_rl_delays(struct sysinfo *ctrl, const uint8_t rank, const uint16_t rl_delay) -+{ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) -+ update_rxt(ctrl, channel, rank, byte, RXT_RCVEN, rl_delay); -+ } -+} -+ -+static bool sample_dqs(const uint8_t channel, const uint8_t byte) -+{ -+ return (get_data_train_feedback(channel, byte) & 0x1ff) >= BIT(RE_NUM_SAMPLES - 1); -+} -+ -+enum raminit_status train_receive_enable(struct sysinfo *ctrl) -+{ -+ const struct reut_box reut_addr = { -+ .col = { -+ .start = 0, -+ .stop = 1023, -+ .inc_rate = 0, -+ .inc_val = 1, -+ }, -+ }; -+ const struct wdb_pat wdb_pattern = { -+ .start_ptr = 0, -+ .stop_ptr = 9, -+ .inc_rate = 32, -+ .dq_pattern = BASIC_VA, -+ }; -+ -+ const uint16_t bytemask = BIT(ctrl->lanes) - 1; -+ const uint8_t fine_step = 1; -+ -+ const uint8_t rt_delta = is_hsw_ult() ? 4 : 2; -+ const uint8_t rt_io_comp = 21 + rt_delta; -+ const uint8_t rt_latency = 16 + rt_delta; -+ setup_io_test( -+ ctrl, -+ ctrl->chanmap, -+ PAT_RD, -+ 2, -+ RE_NUM_SAMPLES + 1, -+ &reut_addr, -+ 0, -+ &wdb_pattern, -+ 0, -+ 8); -+ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ union ddr_data_control_2_reg data_control_2 = { -+ .raw = ctrl->dq_control_2[channel][byte], -+ }; -+ data_control_2.force_rx_on = 1; -+ mchbar_write32(DQ_CONTROL_2(channel, byte), data_control_2.raw); -+ } -+ union ddr_data_control_0_reg data_control_0 = { -+ .raw = ctrl->dq_control_0[channel], -+ }; -+ if (ctrl->lpddr) { -+ /** -+ * W/A for b4618574 - @todo: remove for HSW ULT C0 -+ * Can't have force_odt_on together with leaker, disable LPDDR -+ * mode during this training step. lpddr_mode is restored -+ * at the end of this function from the host structure. -+ */ -+ data_control_0.lpddr_mode = 0; -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw); -+ } -+ data_control_0.force_odt_on = 1; -+ data_control_0.rl_training_mode = 1; -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw); -+ mchbar_write32(SC_IO_LATENCY_ch(channel), (union sc_io_latency_reg) { -+ .rt_iocomp = rt_io_comp, -+ }.raw); -+ } -+ enum raminit_status status = RAMINIT_STATUS_SUCCESS; -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ if (!does_rank_exist(ctrl, rank)) -+ continue; -+ -+ /* -+ * Set initial roundtrip latency values. Assume -4 QCLK for worst board -+ * layout. This is calculated as HW_ROUNDT_LAT_DEFAULT_VALUE plus: -+ * -+ * DDR3: Default + (2 * tAA) + 4 QCLK + PI_CLK + N-mode value * 2 -+ * LPDDR3: Default + (2 * tAA) + 4 QCLK + PI_CLK + tDQSCK_max -+ * -+ * N-mode is 3 during training mode. Both channels use the same timings. -+ */ -+ /** TODO: differs for LPDDR **/ -+ const uint32_t tmp = MAX(ctrl->multiplier, 4) + 5 + 2 * ctrl->tAA; -+ const uint32_t initial_rt_latency = MIN(rt_latency + tmp, 0x3f); -+ -+ uint8_t chanmask = 0; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ chanmask |= select_reut_ranks(ctrl, channel, BIT(rank)); -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ ctrl->io_latency[channel][rank] = 0; -+ mchbar_write8(SC_ROUNDT_LAT_ch(channel) + rank, initial_rt_latency); -+ ctrl->rt_latency[channel][rank] = initial_rt_latency; -+ } -+ -+ printk(BIOS_DEBUG, "Rank %u\n", rank); -+ printk(BIOS_DEBUG, "Steps 1 and 2: Find middle of high region\n"); -+ printk(RCVEN_PLOT, "Byte"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(RCVEN_PLOT, "\t"); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) -+ printk(RCVEN_PLOT, "%u ", byte); -+ } -+ printk(RCVEN_PLOT, "\nRcvEn\n"); -+ struct phase_train_data region_data[NUM_CHANNELS][NUM_LANES] = { 0 }; -+ for (uint16_t rl_delay = RL_START; rl_delay < RL_STOP; rl_delay += RL_STEP) { -+ printk(RCVEN_PLOT, " % 3d", rl_delay); -+ program_rl_delays(ctrl, rank, rl_delay); -+ run_io_test(ctrl, chanmask, BASIC_VA, true); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(RCVEN_PLOT, "\t"); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ const bool high = sample_dqs(channel, byte); -+ printk(RCVEN_PLOT, high ? ". " : "# "); -+ phase_record_pass( -+ ®ion_data[channel][byte], -+ high, -+ rl_delay, -+ RL_START, -+ RL_STEP); -+ } -+ } -+ printk(RCVEN_PLOT, "\n"); -+ } -+ printk(RCVEN_PLOT, "\n"); -+ printk(BIOS_DEBUG, "Update RcvEn timing to be in the center of high region\n"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(BIOS_DEBUG, "C%u.R%u: \tLeft\tRight\tWidth\tCenter\n", -+ channel, rank); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ struct phase_train_data *const curr_data = -+ ®ion_data[channel][byte]; -+ phase_append_current_to_initial(curr_data, RL_START, RL_STEP); -+ const int32_t lwidth = range_width(curr_data->largest); -+ const int32_t center = range_center(curr_data->largest); -+ printk(BIOS_DEBUG, " B%u: \t%d\t%d\t%d\t%d\n", -+ byte, -+ curr_data->largest.start, -+ curr_data->largest.end, -+ lwidth, -+ center); -+ -+ status = verify_high_region(center, lwidth); -+ if (status) { -+ printk(BIOS_ERR, -+ "RcvEn problems on channel %u, byte %u\n", -+ channel, byte); -+ goto clean_up; -+ } -+ ctrl->rcven[channel][rank][byte] = center; -+ update_rxt(ctrl, channel, rank, byte, RXT_RESTORE, 0); -+ } -+ printk(BIOS_DEBUG, "\n"); -+ } -+ -+ printk(BIOS_DEBUG, "Step 3: Quarter preamble - Walk backwards\n"); -+ printk(RCVEN_PLOT, "Byte"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(RCVEN_PLOT, "\t"); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) -+ printk(RCVEN_PLOT, "%u ", byte); -+ } -+ printk(RCVEN_PLOT, "\nIOLAT\n"); -+ bool done = false; -+ while (!done) { -+ run_io_test(ctrl, chanmask, BASIC_VA, true); -+ done = true; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(RCVEN_PLOT, " %2u\t", ctrl->io_latency[channel][rank]); -+ uint16_t highs = 0; -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ const bool high = sample_dqs(channel, byte); -+ printk(RCVEN_PLOT, high ? "H " : "L "); -+ if (high) -+ highs |= BIT(byte); -+ } -+ if (!highs) -+ continue; -+ -+ done = false; -+ -+ /* If all bytes sample high, adjust timing globally */ -+ if (highs == bytemask && ctrl->io_latency[channel][rank] < 14) { -+ ctrl->io_latency[channel][rank] += 2; -+ ctrl->io_latency[channel][rank] %= 16; -+ program_io_latency(ctrl, channel, rank); -+ continue; -+ } -+ -+ /* Otherwise, adjust individual bytes */ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ if (!(highs & BIT(byte))) -+ continue; -+ -+ if (ctrl->rcven[channel][rank][byte] < 128) { -+ printk(BIOS_ERR, -+ "RcvEn underflow: walking backwards\n"); -+ printk(BIOS_ERR, -+ "For channel %u, rank %u, byte %u\n", -+ channel, rank, byte); -+ status = RAMINIT_STATUS_RCVEN_FAILURE; -+ goto clean_up; -+ } -+ ctrl->rcven[channel][rank][byte] -= 128; -+ update_rxt(ctrl, channel, rank, byte, RXT_RESTORE, 0); -+ } -+ } -+ printk(RCVEN_PLOT, "\n"); -+ } -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(BIOS_DEBUG, "\nC%u: Preamble\n", channel); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ printk(BIOS_DEBUG, -+ " B%u: %u\n", byte, ctrl->rcven[channel][rank][byte]); -+ } -+ } -+ printk(BIOS_DEBUG, "\n"); -+ -+ printk(BIOS_DEBUG, "Step 4: Add 1 qclk\n"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ ctrl->rcven[channel][rank][byte] += 64; -+ update_rxt(ctrl, channel, rank, byte, RXT_RESTORE, 0); -+ } -+ } -+ printk(BIOS_DEBUG, "\n"); -+ -+ printk(BIOS_DEBUG, "Step 5: Walk forward to find rising edge\n"); -+ printk(RCVEN_PLOT, "Byte"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(RCVEN_PLOT, "\t"); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) -+ printk(RCVEN_PLOT, "%u ", byte); -+ } -+ printk(RCVEN_PLOT, "\n inc\n"); -+ uint16_t ch_result[NUM_CHANNELS] = { 0 }; -+ uint8_t inc_preamble[NUM_CHANNELS][NUM_LANES] = { 0 }; -+ for (uint8_t inc = 0; inc < 64; inc += fine_step) { -+ printk(RCVEN_PLOT, " %2u\t", inc); -+ run_io_test(ctrl, chanmask, BASIC_VA, true); -+ done = true; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ if (ch_result[channel] & BIT(byte)) { -+ /* Skip bytes that are already done */ -+ printk(RCVEN_PLOT, ". "); -+ continue; -+ } -+ const bool pass = sample_dqs(channel, byte); -+ printk(RCVEN_PLOT, pass ? ". " : "# "); -+ if (pass) { -+ ch_result[channel] |= BIT(byte); -+ continue; -+ } -+ ctrl->rcven[channel][rank][byte] += fine_step; -+ update_rxt(ctrl, channel, rank, byte, RXT_RESTORE, 0); -+ inc_preamble[channel][byte] = inc; -+ } -+ printk(RCVEN_PLOT, "\t"); -+ if (ch_result[channel] != bytemask) -+ done = false; -+ } -+ printk(RCVEN_PLOT, "\n"); -+ if (done) -+ break; -+ } -+ printk(BIOS_DEBUG, "\n"); -+ if (!done) { -+ printk(BIOS_ERR, "Error: Preamble edge not found for all bytes\n"); -+ printk(BIOS_ERR, "The final RcvEn results are as follows:\n"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(BIOS_ERR, "Channel %u Rank %u: preamble\n", -+ channel, rank); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ printk(BIOS_ERR, " Byte %u: %u%s\n", byte, -+ ctrl->rcven[channel][rank][byte], -+ (ch_result[channel] ^ bytemask) & BIT(byte) -+ ? "" -+ : " *** Check this byte! ***"); -+ } -+ } -+ status = RAMINIT_STATUS_RCVEN_FAILURE; -+ goto clean_up; -+ } -+ -+ printk(BIOS_DEBUG, "Step 6: center on preamble and clean up rank\n"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(BIOS_DEBUG, "C%u: Preamble increment\n", channel); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ /* -+ * For Traditional, pull in RcvEn by 64. For ULT, take the DQS -+ * drift into account to the specified guardband: tDQSCK_DRIFT. -+ */ -+ ctrl->rcven[channel][rank][byte] -= tDQSCK_DRIFT; -+ update_rxt(ctrl, channel, rank, byte, RXT_RESTORE, 0); -+ printk(BIOS_DEBUG, " B%u: %u %u\n", byte, -+ ctrl->rcven[channel][rank][byte], -+ inc_preamble[channel][byte]); -+ } -+ printk(BIOS_DEBUG, "\n"); -+ } -+ printk(BIOS_DEBUG, "\n"); -+ } -+ -+clean_up: -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ if (ctrl->lpddr) { -+ /** -+ * W/A for b4618574 - @todo: remove for HSW ULT C0 -+ * Can't have force_odt_on together with leaker, disable LPDDR mode for -+ * this training step. This write will disable force_odt_on while still -+ * keeping LPDDR mode disabled. Second write will restore LPDDR mode. -+ */ -+ union ddr_data_control_0_reg data_control_0 = { -+ .raw = ctrl->dq_control_0[channel], -+ }; -+ data_control_0.lpddr_mode = 0; -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw); -+ } -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), ctrl->dq_control_0[channel]); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ mchbar_write32(DQ_CONTROL_2(channel, byte), -+ ctrl->dq_control_2[channel][byte]); -+ } -+ } -+ io_reset(); -+ if (status) -+ return status; -+ -+ printk(BIOS_DEBUG, "Step 7: Sync IO latency across all ranks\n"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ status = change_rcven_timing(ctrl, channel); -+ if (status) -+ return status; -+ } -+ printk(BIOS_DEBUG, "\nFinal Receive Enable and IO latency settings:\n"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ const union sc_io_latency_reg sc_io_latency = { -+ .raw = mchbar_read32(SC_IO_LATENCY_ch(channel)), -+ }; -+ printk(BIOS_DEBUG, " C%u.R%u: IOLAT = %u rt_iocomp = %u\n", channel, -+ rank, ctrl->io_latency[channel][rank], sc_io_latency.rt_iocomp); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ printk(BIOS_DEBUG, " B%u: %u\n", byte, -+ ctrl->rcven[channel][rank][byte]); -+ } -+ printk(BIOS_DEBUG, "\n"); -+ } -+ } -+ return status; -+} -diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h -index a81559bb1e..9172d4f2b0 100644 ---- a/src/northbridge/intel/haswell/registers/mchbar.h -+++ b/src/northbridge/intel/haswell/registers/mchbar.h -@@ -18,6 +18,8 @@ - #define RX_TRAIN_ch_r_b(ch, rank, byte) _DDRIO_C_R_B(0x0000, ch, rank, byte) - #define TX_TRAIN_ch_r_b(ch, rank, byte) _DDRIO_C_R_B(0x0020, ch, rank, byte) - -+#define DDR_DATA_TRAIN_FEEDBACK(ch, byte) _DDRIO_C_R_B(0x0054, ch, 0, byte) -+ - #define DQ_CONTROL_2(ch, byte) _DDRIO_C_R_B(0x0064, ch, 0, byte) - #define DQ_CONTROL_0(ch, byte) _DDRIO_C_R_B(0x0074, ch, 0, byte) - -@@ -100,6 +102,7 @@ - #define COMMAND_RATE_LIMIT_ch(ch) _MCMAIN_C(0x4010, ch) - #define TC_BANK_RANK_D_ch(ch) _MCMAIN_C(0x4014, ch) - #define SC_ROUNDT_LAT_ch(ch) _MCMAIN_C(0x4024, ch) -+#define SC_IO_LATENCY_ch(ch) _MCMAIN_C(0x4028, ch) - - #define REUT_ch_PAT_WDB_CL_MUX_CFG(ch) _MCMAIN_C(0x4040, ch) - --- -2.39.5 - diff --git a/config/coreboot/default/patches/0041-haswell-NRI-Add-function-to-change-margins.patch b/config/coreboot/default/patches/0041-haswell-NRI-Add-function-to-change-margins.patch deleted file mode 100644 index 296dbed6..00000000 --- a/config/coreboot/default/patches/0041-haswell-NRI-Add-function-to-change-margins.patch +++ /dev/null @@ -1,272 +0,0 @@ -From fc6c3edf561dd11eeb2ebe7f4cb93542e664935a Mon Sep 17 00:00:00 2001 -From: Angel Pons <th3fanbus@gmail.com> -Date: Sun, 8 May 2022 11:58:59 +0200 -Subject: [PATCH 41/51] haswell NRI: Add function to change margins - -Implement a function to change margin parameters. Haswell provides a -register to apply an offset to margin parameters during training, so -make use of it. There are other margin parameters that have not been -implemented yet, as they are not needed for now and special handling -is needed to provide offset training functionality. - -Change-Id: I5392380e13de3c44e77b7bc9f3b819e2661d1e2d -Signed-off-by: Angel Pons <th3fanbus@gmail.com> ---- - .../haswell/native_raminit/change_margin.c | 136 ++++++++++++++++++ - .../haswell/native_raminit/raminit_native.h | 39 +++++ - .../haswell/native_raminit/reg_structs.h | 12 ++ - .../intel/haswell/registers/mchbar.h | 1 + - 4 files changed, 188 insertions(+) - -diff --git a/src/northbridge/intel/haswell/native_raminit/change_margin.c b/src/northbridge/intel/haswell/native_raminit/change_margin.c -index 055c666eee..299c44a6b0 100644 ---- a/src/northbridge/intel/haswell/native_raminit/change_margin.c -+++ b/src/northbridge/intel/haswell/native_raminit/change_margin.c -@@ -1,5 +1,6 @@ - /* SPDX-License-Identifier: GPL-2.0-or-later */ - -+#include <assert.h> - #include <commonlib/bsd/clamp.h> - #include <console/console.h> - #include <delay.h> -@@ -152,3 +153,138 @@ void download_regfile( - ddr_data_control_0.read_rf_rank = phys_rank; - mchbar_write32(reg, ddr_data_control_0.raw); - } -+ -+static void update_data_offset_train( -+ struct sysinfo *ctrl, -+ const uint8_t param, -+ const uint8_t en_multicast, -+ const uint8_t channel_in, -+ const uint8_t rank, -+ const uint8_t byte_in, -+ const bool update_ctrl, -+ const enum regfile_mode regfile, -+ const uint32_t value) -+{ -+ bool is_rd = false; -+ bool is_wr = false; -+ switch (param) { -+ case RdT: -+ case RdV: -+ case RcvEna: -+ is_rd = true; -+ break; -+ case WrT: -+ case WrDqsT: -+ is_wr = true; -+ break; -+ default: -+ die("%s: Invalid margin parameter %u\n", __func__, param); -+ } -+ if (en_multicast) { -+ mchbar_write32(DDR_DATA_OFFSET_TRAIN, value); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ download_regfile(ctrl, channel, true, rank, regfile, 0, is_rd, is_wr); -+ if (update_ctrl) { -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) -+ ctrl->data_offset_train[channel][byte] = value; -+ } -+ } -+ } else { -+ mchbar_write32(DDR_DATA_OFFSET_TRAIN_ch_b(channel_in, byte_in), value); -+ download_regfile(ctrl, channel_in, false, rank, regfile, byte_in, is_rd, is_wr); -+ if (update_ctrl) -+ ctrl->data_offset_train[channel_in][byte_in] = value; -+ } -+} -+ -+static uint32_t get_max_margin(const enum margin_parameter param) -+{ -+ switch (param) { -+ case RcvEna: -+ case RdT: -+ case WrT: -+ case WrDqsT: -+ return MAX_POSSIBLE_TIME; -+ case RdV: -+ return MAX_POSSIBLE_VREF; -+ default: -+ die("%s: Invalid margin parameter %u\n", __func__, param); -+ } -+} -+ -+void change_margin( -+ struct sysinfo *ctrl, -+ const enum margin_parameter param, -+ const int32_t value0, -+ const bool en_multicast, -+ const uint8_t channel, -+ const uint8_t rank, -+ const uint8_t byte, -+ const bool update_ctrl, -+ const enum regfile_mode regfile) -+{ -+ /** FIXME: Remove this **/ -+ if (rank == 0xff) -+ die("%s: rank is 0xff\n", __func__); -+ -+ if (!en_multicast && !does_ch_exist(ctrl, channel)) -+ die("%s: Tried to change margin of empty channel %u\n", __func__, channel); -+ -+ const uint32_t max_value = get_max_margin(param); -+ const int32_t v0 = clamp_s32(-max_value, value0, max_value); -+ -+ union ddr_data_offset_train_reg ddr_data_offset_train = { -+ .raw = en_multicast ? 0 : ctrl->data_offset_train[channel][byte], -+ }; -+ bool update_offset_train = false; -+ switch (param) { -+ case RcvEna: -+ ddr_data_offset_train.rcven = v0; -+ update_offset_train = true; -+ break; -+ case RdT: -+ ddr_data_offset_train.rx_dqs = v0; -+ update_offset_train = true; -+ break; -+ case WrT: -+ ddr_data_offset_train.tx_dq = v0; -+ update_offset_train = true; -+ break; -+ case WrDqsT: -+ ddr_data_offset_train.tx_dqs = v0; -+ update_offset_train = true; -+ break; -+ case RdV: -+ ddr_data_offset_train.vref = v0; -+ update_offset_train = true; -+ break; -+ default: -+ die("%s: Invalid margin parameter %u\n", __func__, param); -+ } -+ if (update_offset_train) { -+ update_data_offset_train( -+ ctrl, -+ param, -+ en_multicast, -+ channel, -+ rank, -+ byte, -+ update_ctrl, -+ regfile, -+ ddr_data_offset_train.raw); -+ } -+} -+ -+void change_1d_margin_multicast( -+ struct sysinfo *ctrl, -+ const enum margin_parameter param, -+ const int32_t value0, -+ const uint8_t rank, -+ const bool update_ctrl, -+ const enum regfile_mode regfile) -+{ -+ change_margin(ctrl, param, value0, true, 0, rank, 0, update_ctrl, regfile); -+} -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -index eaaaedad1e..1c8473056b 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -@@ -36,6 +36,18 @@ - - #define RTTNOM_MASK (BIT(9) | BIT(6) | BIT(2)) - -+/* Margin parameter limits */ -+#define MAX_POSSIBLE_TIME 31 -+#define MAX_POSSIBLE_VREF 54 -+ -+#define MAX_POSSIBLE_BOTH MAX_POSSIBLE_VREF -+ -+#define MIN_TIME (-MAX_POSSIBLE_TIME) -+#define MAX_TIME (MAX_POSSIBLE_TIME) -+ -+#define MIN_VREF (-MAX_POSSIBLE_VREF) -+#define MAX_VREF (MAX_POSSIBLE_VREF) -+ - #define BASIC_VA_PAT_SPREAD_8 0x01010101 - - #define WDB_CACHE_LINE_SIZE 8 -@@ -46,6 +58,14 @@ - /* Specified in PI ticks. 64 PI ticks == 1 qclk */ - #define tDQSCK_DRIFT 64 - -+enum margin_parameter { -+ RcvEna, -+ RdT, -+ WrT, -+ WrDqsT, -+ RdV, -+}; -+ - /* ZQ calibration types */ - enum { - ZQ_INIT, /* DDR3: ZQCL with tZQinit, LPDDR3: ZQ Init with tZQinit */ -@@ -515,6 +535,25 @@ void download_regfile( - bool read_rf_rd, - bool read_rf_wr); - -+void change_margin( -+ struct sysinfo *ctrl, -+ const enum margin_parameter param, -+ const int32_t value0, -+ const bool en_multicast, -+ const uint8_t channel, -+ const uint8_t rank, -+ const uint8_t byte, -+ const bool update_ctrl, -+ const enum regfile_mode regfile); -+ -+void change_1d_margin_multicast( -+ struct sysinfo *ctrl, -+ const enum margin_parameter param, -+ const int32_t value0, -+ const uint8_t rank, -+ const bool update_ctrl, -+ const enum regfile_mode regfile); -+ - uint8_t get_rx_bias(const struct sysinfo *ctrl); - - uint8_t get_tCWL(uint32_t mem_clock_mhz); -diff --git a/src/northbridge/intel/haswell/native_raminit/reg_structs.h b/src/northbridge/intel/haswell/native_raminit/reg_structs.h -index b099f4bb82..a0e36ed082 100644 ---- a/src/northbridge/intel/haswell/native_raminit/reg_structs.h -+++ b/src/northbridge/intel/haswell/native_raminit/reg_structs.h -@@ -25,6 +25,18 @@ union ddr_data_tx_train_rank_reg { - uint32_t raw; - }; - -+union ddr_data_offset_train_reg { -+ struct __packed { -+ int32_t rcven : 6; // Bits 5:0 -+ int32_t rx_dqs : 6; // Bits 11:6 -+ int32_t tx_dq : 6; // Bits 17:12 -+ int32_t tx_dqs : 6; // Bits 23:18 -+ int32_t vref : 7; // Bits 30:24 -+ int32_t : 1; // Bits 31:31 -+ }; -+ uint32_t raw; -+}; -+ - union ddr_data_control_0_reg { - struct __packed { - uint32_t rx_training_mode : 1; // Bits 0:0 -diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h -index 9172d4f2b0..0acafbc826 100644 ---- a/src/northbridge/intel/haswell/registers/mchbar.h -+++ b/src/northbridge/intel/haswell/registers/mchbar.h -@@ -21,6 +21,7 @@ - #define DDR_DATA_TRAIN_FEEDBACK(ch, byte) _DDRIO_C_R_B(0x0054, ch, 0, byte) - - #define DQ_CONTROL_2(ch, byte) _DDRIO_C_R_B(0x0064, ch, 0, byte) -+#define DDR_DATA_OFFSET_TRAIN_ch_b(ch, byte) _DDRIO_C_R_B(0x0070, ch, 0, byte) - #define DQ_CONTROL_0(ch, byte) _DDRIO_C_R_B(0x0074, ch, 0, byte) - - /* DDR CKE per-channel */ --- -2.39.5 - diff --git a/config/coreboot/default/patches/0041-soc-alderlake-disable-stack-overflow-debug-option.patch b/config/coreboot/default/patches/0041-soc-alderlake-disable-stack-overflow-debug-option.patch new file mode 100644 index 00000000..979eff9b --- /dev/null +++ b/config/coreboot/default/patches/0041-soc-alderlake-disable-stack-overflow-debug-option.patch @@ -0,0 +1,46 @@ +From 9936228e74ef8bccbf6adb8640040901d395cda0 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Mon, 6 Oct 2025 04:47:06 +0100 +Subject: [PATCH 1/1] soc/alderlake: disable stack overflow debug option + +same as on other boards. based on this commit: + +commit 51cc2bacb6b07279b97e9934d079060475481fb6 +Author: Subrata Banik <subratabanik@google.com> +Author: Subrata Banik <subratabanik@google.com> +Date: Fri Dec 13 13:07:28 2024 +0530 + + soc/intel/pantherlake: Disable stack overflow debug options + +yeah, i've been replicating this change per platform. + +we do alderlake now in libreboot, so let's set that here too. + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + src/soc/intel/alderlake/Kconfig | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig +index 3979d9e162..a47a27dfaf 100644 +--- a/src/soc/intel/alderlake/Kconfig ++++ b/src/soc/intel/alderlake/Kconfig +@@ -329,6 +329,15 @@ config SOC_INTEL_UFS_CLK_FREQ_HZ + int + default 19200000 + ++# Override DEBUG Kconfig to avoid false alarm about stack overflow. ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS ++ bool ++ default n ++ ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES ++ bool ++ default n ++ + config DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ + int + default 133 +-- +2.47.3 + diff --git a/config/coreboot/default/patches/0042-haswell-NRI-Add-read-MPR-training.patch b/config/coreboot/default/patches/0042-haswell-NRI-Add-read-MPR-training.patch deleted file mode 100644 index f2ccb7ad..00000000 --- a/config/coreboot/default/patches/0042-haswell-NRI-Add-read-MPR-training.patch +++ /dev/null @@ -1,332 +0,0 @@ -From 8f07ea076572dd3371dca7b3dbd5ff9c9b332c55 Mon Sep 17 00:00:00 2001 -From: Angel Pons <th3fanbus@gmail.com> -Date: Sun, 8 May 2022 11:35:49 +0200 -Subject: [PATCH 42/51] haswell NRI: Add read MPR training - -Implement read training using DDR3 MPR (Multi-Purpose Register). - -Change-Id: Id17cb2c4c399ac9bcc937b595b58f863c152461b -Signed-off-by: Angel Pons <th3fanbus@gmail.com> ---- - .../intel/haswell/native_raminit/Makefile.mk | 1 + - .../haswell/native_raminit/raminit_main.c | 1 + - .../haswell/native_raminit/raminit_native.h | 4 + - .../haswell/native_raminit/train_read_mpr.c | 241 ++++++++++++++++++ - .../intel/haswell/registers/mchbar.h | 2 +- - 5 files changed, 248 insertions(+), 1 deletion(-) - create mode 100644 src/northbridge/intel/haswell/native_raminit/train_read_mpr.c - -diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -index e2fbfb4211..c442be0728 100644 ---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk -+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -@@ -16,4 +16,5 @@ romstage-y += setup_wdb.c - romstage-y += spd_bitmunching.c - romstage-y += testing_io.c - romstage-y += timings_refresh.c -+romstage-y += train_read_mpr.c - romstage-y += train_receive_enable.c -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -index 7d444659c3..264d1468f5 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -@@ -61,6 +61,7 @@ static const struct task_entry cold_boot[] = { - { do_jedec_init, true, "JEDECINIT", }, - { pre_training, true, "PRETRAIN", }, - { train_receive_enable, true, "RCVET", }, -+ { train_read_mpr, true, "RDMPRT", }, - }; - - /* Return a generic stepping value to make stepping checks simpler */ -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -index 1c8473056b..7a486479ea 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -@@ -28,6 +28,8 @@ - /* Always use 12 legs for emphasis (not trained) */ - #define TXEQFULLDRV (3 << 4) - -+#define LOOPCOUNT_INFINITE 0xff -+ - /* DDR3 mode register bits */ - #define MR0_DLL_RESET BIT(8) - -@@ -213,6 +215,7 @@ enum raminit_status { - RAMINIT_STATUS_POLL_TIMEOUT, - RAMINIT_STATUS_REUT_ERROR, - RAMINIT_STATUS_RCVEN_FAILURE, -+ RAMINIT_STATUS_RMPR_FAILURE, - RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/ - }; - -@@ -434,6 +437,7 @@ enum raminit_status configure_mc(struct sysinfo *ctrl); - enum raminit_status configure_memory_map(struct sysinfo *ctrl); - enum raminit_status do_jedec_init(struct sysinfo *ctrl); - enum raminit_status train_receive_enable(struct sysinfo *ctrl); -+enum raminit_status train_read_mpr(struct sysinfo *ctrl); - - void configure_timings(struct sysinfo *ctrl); - void configure_refresh(struct sysinfo *ctrl); -diff --git a/src/northbridge/intel/haswell/native_raminit/train_read_mpr.c b/src/northbridge/intel/haswell/native_raminit/train_read_mpr.c -new file mode 100644 -index 0000000000..ade1e36148 ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/train_read_mpr.c -@@ -0,0 +1,241 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <commonlib/bsd/clamp.h> -+#include <console/console.h> -+#include <delay.h> -+#include <northbridge/intel/haswell/haswell.h> -+#include <types.h> -+ -+#include "raminit_native.h" -+#include "ranges.h" -+ -+#define RMPR_START (-32) -+#define RMPR_STOP (32) -+#define RMPR_STEP 1 -+ -+#define RMPR_MIN_WIDTH 12 -+ -+#define RMPR_PLOT RAM_DEBUG -+ -+/* -+ * Clear rx_training_mode. For LPDDR, we first need to disable odt_samp_extend_en, -+ * then disable rx_training_mode, and finally re-enable odt_samp_extend_en. -+ */ -+static void clear_rx_training_mode(struct sysinfo *ctrl, const uint8_t channel) -+{ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) -+ mchbar_write32(DQ_CONTROL_2(channel, byte), ctrl->dq_control_2[channel][byte]); -+ -+ if (ctrl->lpddr) { -+ union ddr_data_control_0_reg data_control_0 = { -+ .raw = mchbar_read32(DDR_DATA_ch_CONTROL_0(channel)), -+ }; -+ data_control_0.odt_samp_extend_en = 0; -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw); -+ tick_delay(1); -+ data_control_0.rx_training_mode = 0; -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw); -+ tick_delay(1); -+ } -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), ctrl->dq_control_0[channel]); -+} -+ -+static void set_rxdqs_edges_to_midpoint(struct sysinfo *ctrl) -+{ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) -+ update_rxt(ctrl, channel, rank, byte, RXT_RXDQS_BOTH, 32); -+ } -+ } -+} -+ -+static void enter_mpr_train_ddr_mode(struct sysinfo *ctrl, const uint8_t rank) -+{ -+ /* Program MR3 and mask RAS/WE to prevent scheduler from issuing non-read commands */ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ if (!ctrl->lpddr) -+ reut_issue_mrs(ctrl, channel, BIT(rank), 3, 1 << 2); -+ -+ union reut_misc_odt_ctrl_reg reut_misc_odt_ctrl = { -+ .raw = mchbar_read32(REUT_ch_MISC_ODT_CTRL(channel)), -+ }; -+ reut_misc_odt_ctrl.mpr_train_ddr_on = 1; -+ mchbar_write32(REUT_ch_MISC_ODT_CTRL(channel), reut_misc_odt_ctrl.raw); -+ } -+} -+ -+static void leave_mpr_train_ddr_mode(struct sysinfo *ctrl, const uint8_t rank) -+{ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ /* -+ * The mpr_train_ddr_on bit will force a special command. -+ * Therefore, clear it before issuing the MRS command. -+ */ -+ union reut_misc_odt_ctrl_reg reut_misc_odt_ctrl = { -+ .raw = mchbar_read32(REUT_ch_MISC_ODT_CTRL(channel)), -+ }; -+ reut_misc_odt_ctrl.mpr_train_ddr_on = 0; -+ mchbar_write32(REUT_ch_MISC_ODT_CTRL(channel), reut_misc_odt_ctrl.raw); -+ if (!ctrl->lpddr) -+ reut_issue_mrs(ctrl, channel, BIT(rank), 3, 0 << 2); -+ } -+} -+ -+enum raminit_status train_read_mpr(struct sysinfo *ctrl) -+{ -+ set_rxdqs_edges_to_midpoint(ctrl); -+ clear_data_offset_train_all(ctrl); -+ setup_io_test_mpr(ctrl, ctrl->chanmap, LOOPCOUNT_INFINITE, NSOE); -+ enum raminit_status status = RAMINIT_STATUS_SUCCESS; -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ if (!does_rank_exist(ctrl, rank)) -+ continue; -+ -+ printk(BIOS_DEBUG, "Rank %u\n", rank); -+ printk(RMPR_PLOT, "Channel"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(RMPR_PLOT, "\t%u\t\t", channel); -+ } -+ printk(RMPR_PLOT, "\nByte"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(RMPR_PLOT, "\t"); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) -+ printk(RMPR_PLOT, "%u ", byte); -+ } -+ enter_mpr_train_ddr_mode(ctrl, rank); -+ struct linear_train_data region_data[NUM_CHANNELS][NUM_LANES] = { 0 }; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) -+ select_reut_ranks(ctrl, channel, BIT(rank)); -+ -+ printk(RMPR_PLOT, "\nDqsDelay\n"); -+ int8_t dqs_delay; -+ for (dqs_delay = RMPR_START; dqs_delay < RMPR_STOP; dqs_delay += RMPR_STEP) { -+ printk(RMPR_PLOT, "% 5d", dqs_delay); -+ const enum regfile_mode regfile = REG_FILE_USE_START; -+ /* Looks like MRC uses rank 0 here, but it feels wrong */ -+ change_1d_margin_multicast(ctrl, RdT, dqs_delay, rank, false, regfile); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ union ddr_data_control_2_reg data_control_2 = { -+ .raw = ctrl->dq_control_2[channel][byte], -+ }; -+ data_control_2.force_bias_on = 1; -+ data_control_2.force_rx_on = 1; -+ data_control_2.leaker_comp = 0; -+ mchbar_write32(DQ_CONTROL_2(channel, byte), -+ data_control_2.raw); -+ } -+ union ddr_data_control_0_reg data_control_0 = { -+ .raw = ctrl->dq_control_0[channel], -+ }; -+ data_control_0.rx_training_mode = 1; -+ data_control_0.force_odt_on = !ctrl->lpddr; -+ data_control_0.en_read_preamble = 0; -+ data_control_0.odt_samp_extend_en = ctrl->lpddr; -+ const uint32_t reg_offset = DDR_DATA_ch_CONTROL_0(channel); -+ mchbar_write32(reg_offset, data_control_0.raw); -+ } -+ run_mpr_io_test(false); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(RMPR_PLOT, "\t"); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ uint32_t fb = get_data_train_feedback(channel, byte); -+ const bool pass = fb == 1; -+ printk(RMPR_PLOT, pass ? ". " : "# "); -+ linear_record_pass( -+ ®ion_data[channel][byte], -+ pass, -+ dqs_delay, -+ RMPR_START, -+ RMPR_STEP); -+ } -+ } -+ printk(RMPR_PLOT, "\n"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ clear_rx_training_mode(ctrl, channel); -+ } -+ io_reset(); -+ } -+ printk(RMPR_PLOT, "\n"); -+ leave_mpr_train_ddr_mode(ctrl, rank); -+ clear_data_offset_train_all(ctrl); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(BIOS_DEBUG, "C%u.R%u: \tLeft\tRight\tWidth\tCenter\tRxDqsPN\n", -+ channel, rank); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ struct linear_train_data *data = ®ion_data[channel][byte]; -+ const int32_t lwidth = range_width(data->largest); -+ if (lwidth <= RMPR_MIN_WIDTH) { -+ printk(BIOS_ERR, -+ "Bad eye (lwidth %d <= min %d) for byte %u\n", -+ lwidth, RMPR_MIN_WIDTH, byte); -+ status = RAMINIT_STATUS_RMPR_FAILURE; -+ } -+ /* -+ * The MPR center may not be ideal on certain platforms for -+ * unknown reasons. If so, adjust it with a magical number. -+ * For Haswell, the magical number is zero. Hell knows why. -+ */ -+ const int32_t center = range_center(data->largest); -+ ctrl->rxdqsp[channel][rank][byte] = center - RMPR_START; -+ ctrl->rxdqsn[channel][rank][byte] = center - RMPR_START; -+ printk(BIOS_DEBUG, " B%u: \t%d\t%d\t%d\t%d\t%u\n", byte, -+ data->largest.start, data->largest.end, lwidth, -+ center, ctrl->rxdqsp[channel][rank][byte]); -+ } -+ printk(BIOS_DEBUG, "\n"); -+ } -+ } -+ -+ /* -+ * Now program the DQS center values on populated ranks. data is taken from -+ * the host struct. We need to do it after all ranks are trained, because we -+ * need to keep the same DQS value on all ranks during the training procedure. -+ */ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) -+ update_rxt(ctrl, channel, rank, byte, RXT_RESTORE, 0); -+ } -+ } -+ change_1d_margin_multicast(ctrl, RdT, 0, 0, false, REG_FILE_USE_CURRENT); -+ io_reset(); -+ return status; -+} -diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h -index 0acafbc826..6a31d3a32c 100644 ---- a/src/northbridge/intel/haswell/registers/mchbar.h -+++ b/src/northbridge/intel/haswell/registers/mchbar.h -@@ -122,7 +122,7 @@ - #define REUT_ch_ERR_DATA_MASK(ch) _MCMAIN_C(0x40d8, ch) - - #define REUT_ch_MISC_CKE_CTRL(ch) _MCMAIN_C(0x4190, ch) -- -+#define REUT_ch_MISC_ODT_CTRL(ch) _MCMAIN_C(0x4194, ch) - #define REUT_ch_MISC_PAT_CADB_CTRL(ch) _MCMAIN_C(0x4198, ch) - #define REUT_ch_PAT_CADB_MRS(ch) _MCMAIN_C(0x419c, ch) - #define REUT_ch_PAT_CADB_MUX_CTRL(ch) _MCMAIN_C(0x41a0, ch) --- -2.39.5 - diff --git a/config/coreboot/default/patches/0043-haswell-NRI-Add-write-leveling.patch b/config/coreboot/default/patches/0043-haswell-NRI-Add-write-leveling.patch deleted file mode 100644 index 0202ed1b..00000000 --- a/config/coreboot/default/patches/0043-haswell-NRI-Add-write-leveling.patch +++ /dev/null @@ -1,689 +0,0 @@ -From 6df4b7eb0512c24a5f53bc92e81ad6cf42cd28a7 Mon Sep 17 00:00:00 2001 -From: Angel Pons <th3fanbus@gmail.com> -Date: Sun, 8 May 2022 12:56:04 +0200 -Subject: [PATCH 43/51] haswell NRI: Add write leveling - -Implement JEDEC write leveling, which is done in two steps. The first -step uses the JEDEC procedure to do "fine" write leveling, i.e. align -the DQS phase to the clock signal. The second step performs a regular -read-write test to correct "coarse" cycle errors. - -Change-Id: I27678523fe22c38173a688e2a4751c259a20f009 -Signed-off-by: Angel Pons <th3fanbus@gmail.com> ---- - .../intel/haswell/native_raminit/Makefile.mk | 1 + - .../haswell/native_raminit/raminit_main.c | 1 + - .../haswell/native_raminit/raminit_native.h | 10 + - .../train_jedec_write_leveling.c | 581 ++++++++++++++++++ - .../intel/haswell/registers/mchbar.h | 2 + - 5 files changed, 595 insertions(+) - create mode 100644 src/northbridge/intel/haswell/native_raminit/train_jedec_write_leveling.c - -diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -index c442be0728..40c2f5e014 100644 ---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk -+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -@@ -16,5 +16,6 @@ romstage-y += setup_wdb.c - romstage-y += spd_bitmunching.c - romstage-y += testing_io.c - romstage-y += timings_refresh.c -+romstage-y += train_jedec_write_leveling.c - romstage-y += train_read_mpr.c - romstage-y += train_receive_enable.c -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -index 264d1468f5..1ff23be615 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -@@ -62,6 +62,7 @@ static const struct task_entry cold_boot[] = { - { pre_training, true, "PRETRAIN", }, - { train_receive_enable, true, "RCVET", }, - { train_read_mpr, true, "RDMPRT", }, -+ { train_jedec_write_leveling, true, "JWRL", }, - }; - - /* Return a generic stepping value to make stepping checks simpler */ -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -index 7a486479ea..d6b11b9d3c 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -@@ -60,6 +60,9 @@ - /* Specified in PI ticks. 64 PI ticks == 1 qclk */ - #define tDQSCK_DRIFT 64 - -+/* Maximum additional latency */ -+#define MAX_ADD_DELAY 2 -+ - enum margin_parameter { - RcvEna, - RdT, -@@ -216,6 +219,7 @@ enum raminit_status { - RAMINIT_STATUS_REUT_ERROR, - RAMINIT_STATUS_RCVEN_FAILURE, - RAMINIT_STATUS_RMPR_FAILURE, -+ RAMINIT_STATUS_JWRL_FAILURE, - RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/ - }; - -@@ -381,6 +385,11 @@ static inline uint32_t get_data_train_feedback(const uint8_t channel, const uint - return mchbar_read32(DDR_DATA_TRAIN_FEEDBACK(channel, byte)); - } - -+static inline uint16_t get_byte_group_errors(const uint8_t channel) -+{ -+ return mchbar_read32(4 + REUT_ch_ERR_MISC_STATUS(channel)) & 0x1ff; -+} -+ - /* Number of ticks to wait in units of 69.841279 ns (citation needed) */ - static inline void tick_delay(const uint32_t delay) - { -@@ -438,6 +447,7 @@ enum raminit_status configure_memory_map(struct sysinfo *ctrl); - enum raminit_status do_jedec_init(struct sysinfo *ctrl); - enum raminit_status train_receive_enable(struct sysinfo *ctrl); - enum raminit_status train_read_mpr(struct sysinfo *ctrl); -+enum raminit_status train_jedec_write_leveling(struct sysinfo *ctrl); - - void configure_timings(struct sysinfo *ctrl); - void configure_refresh(struct sysinfo *ctrl); -diff --git a/src/northbridge/intel/haswell/native_raminit/train_jedec_write_leveling.c b/src/northbridge/intel/haswell/native_raminit/train_jedec_write_leveling.c -new file mode 100644 -index 0000000000..ef6483e2bd ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/train_jedec_write_leveling.c -@@ -0,0 +1,581 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <assert.h> -+#include <console/console.h> -+#include <delay.h> -+#include <northbridge/intel/haswell/haswell.h> -+#include <types.h> -+ -+#include "raminit_native.h" -+#include "ranges.h" -+ -+#define JWLC_PLOT RAM_DEBUG -+#define JWRL_PLOT RAM_DEBUG -+ -+static void reset_dram_dll(struct sysinfo *ctrl, const uint8_t channel, const uint8_t rank) -+{ -+ const uint16_t mr0reg = ctrl->mr0[channel][rank / 2]; -+ reut_issue_mrs(ctrl, channel, BIT(rank), 0, mr0reg | MR0_DLL_RESET); -+} -+ -+static void program_wdb_pattern(struct sysinfo *ctrl, const bool invert) -+{ -+ /* Pattern to keep DQ-DQS simple but detect any failures. Same as NHM/WSM. */ -+ const uint8_t pat[4][2] = { -+ { 0x00, 0xff }, -+ { 0xff, 0x00 }, -+ { 0xc3, 0x3c }, -+ { 0x3c, 0xc3 }, -+ }; -+ const uint8_t pmask[2][8] = { -+ { 0, 0, 1, 1, 1, 1, 0, 0 }, -+ { 1, 1, 0, 0, 0, 0, 1, 1 }, -+ }; -+ for (uint8_t s = 0; s < ARRAY_SIZE(pat); s++) -+ write_wdb_fixed_pat(ctrl, pat[s], pmask[invert], ARRAY_SIZE(pmask[invert]), s); -+} -+ -+static int16_t set_add_delay(uint32_t *add_delay, uint8_t rank, int8_t target_off) -+{ -+ const uint8_t shift = rank * 2; -+ if (target_off > MAX_ADD_DELAY) { -+ *add_delay &= ~(3 << shift); -+ *add_delay |= MAX_ADD_DELAY << shift; -+ return 128 * (target_off - MAX_ADD_DELAY); -+ } else if (target_off < 0) { -+ *add_delay &= ~(3 << shift); -+ *add_delay |= 0 << shift; -+ return 128 * target_off; -+ } else { -+ *add_delay &= ~(3 << shift); -+ *add_delay |= target_off << shift; -+ return 0; -+ } -+} -+ -+static enum raminit_status train_jedec_write_leveling_cleanup(struct sysinfo *ctrl) -+{ -+ const struct reut_box reut_addr = { -+ .col = { -+ .start = 0, -+ .stop = 1023, -+ .inc_val = 1, -+ }, -+ }; -+ const struct wdb_pat wdb_pattern = { -+ .start_ptr = 0, -+ .stop_ptr = 3, -+ .inc_rate = 1, -+ .dq_pattern = BASIC_VA, -+ }; -+ const int8_t offsets[] = { 0, 1, -1, 2, 3 }; -+ const int8_t dq_offsets[] = { 0, -10, 10, -5, 5, -15, 15 }; -+ const uint8_t dq_offset_max = ARRAY_SIZE(dq_offsets); -+ -+ /* Set LFSR seeds to be sequential */ -+ program_wdb_lfsr(ctrl, true); -+ setup_io_test( -+ ctrl, -+ ctrl->chanmap, -+ PAT_WR_RD, -+ 2, -+ 4, -+ &reut_addr, -+ NSOE, -+ &wdb_pattern, -+ 0, -+ 0); -+ -+ const union reut_pat_wdb_cl_mux_cfg_reg reut_wdb_cl_mux_cfg = { -+ .mux_0_control = REUT_MUX_BTBUFFER, -+ .mux_1_control = REUT_MUX_BTBUFFER, -+ .mux_2_control = REUT_MUX_BTBUFFER, -+ .ecc_data_source_sel = 1, -+ }; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ mchbar_write32(REUT_ch_PAT_WDB_CL_MUX_CFG(channel), reut_wdb_cl_mux_cfg.raw); -+ } -+ -+ int8_t byte_off[NUM_CHANNELS][NUM_LANES] = { 0 }; -+ uint32_t add_delay[NUM_CHANNELS] = { 0 }; -+ enum raminit_status status = RAMINIT_STATUS_SUCCESS; -+ bool invert = false; -+ const uint16_t valid_byte_mask = BIT(ctrl->lanes) - 1; -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ uint8_t chanmask = 0; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) -+ chanmask |= select_reut_ranks(ctrl, channel, BIT(rank)); -+ -+ if (!chanmask) -+ continue; -+ -+ printk(BIOS_DEBUG, "Rank %u\n", rank); -+ printk(JWLC_PLOT, "Channel"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(JWLC_PLOT, "\t\t%u\t", channel); -+ } -+ printk(JWLC_PLOT, "\nByte\t"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(JWLC_PLOT, "\t"); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) -+ printk(JWLC_PLOT, "%u ", byte); -+ } -+ printk(JWLC_PLOT, "\nDelay DqOffset"); -+ bool done = false; -+ int8_t byte_sum[NUM_CHANNELS] = { 0 }; -+ uint16_t byte_pass[NUM_CHANNELS] = { 0 }; -+ for (uint8_t off = 0; off < ARRAY_SIZE(offsets); off++) { -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ const int16_t global_byte_off = -+ set_add_delay(&add_delay[channel], rank, offsets[off]); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ update_txt(ctrl, channel, rank, byte, TXT_DQDQS_OFF, -+ global_byte_off); -+ } -+ mchbar_write32(SC_WR_ADD_DELAY_ch(channel), -+ add_delay[channel]); -+ } -+ /* Reset FIFOs and DRAM DLL (Micron workaround) */ -+ if (!ctrl->lpddr) { -+ io_reset(); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ reset_dram_dll(ctrl, channel, rank); -+ } -+ udelay(1); -+ } -+ for (uint8_t dq_offset = 0; dq_offset < dq_offset_max; dq_offset++) { -+ printk(JWLC_PLOT, "\n% 3d\t% 3d", -+ offsets[off], dq_offsets[dq_offset]); -+ change_1d_margin_multicast( -+ ctrl, -+ WrT, -+ dq_offsets[dq_offset], -+ rank, -+ false, -+ REG_FILE_USE_RANK); -+ -+ /* -+ * Re-program the WDB pattern. Change the pattern -+ * for the next test to avoid false pass issues. -+ */ -+ program_wdb_pattern(ctrl, invert); -+ invert = !invert; -+ run_io_test(ctrl, chanmask, BASIC_VA, true); -+ done = true; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(JWLC_PLOT, "\t"); -+ uint16_t result = get_byte_group_errors(channel); -+ result &= valid_byte_mask; -+ -+ /* Skip bytes that have failed or already passed */ -+ const uint16_t skip_me = result | byte_pass[channel]; -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ const bool pass = result & BIT(byte); -+ printk(JWLC_PLOT, pass ? "# " : ". "); -+ if (skip_me & BIT(byte)) -+ continue; -+ -+ byte_pass[channel] |= BIT(byte); -+ byte_off[channel][byte] = offsets[off]; -+ byte_sum[channel] += offsets[off]; -+ } -+ if (byte_pass[channel] != valid_byte_mask) -+ done = false; -+ } -+ if (done) -+ break; -+ } -+ if (done) -+ break; -+ } -+ printk(BIOS_DEBUG, "\n\n"); -+ if (!done) { -+ printk(BIOS_ERR, "JWLC: Could not find a pass for all bytes\n"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(BIOS_ERR, "Channel %u, rank %u fail:", channel, rank); -+ const uint16_t passing_mask = byte_pass[channel]; -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ if (BIT(byte) & passing_mask) -+ continue; -+ -+ printk(BIOS_ERR, " %u", byte); -+ } -+ printk(BIOS_ERR, "\n"); -+ } -+ status = RAMINIT_STATUS_JWRL_FAILURE; -+ break; -+ } -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ /* Refine target offset to make sure it works for all bytes */ -+ int8_t target_off = DIV_ROUND_CLOSEST(byte_sum[channel], ctrl->lanes); -+ int16_t global_byte_off = 0; -+ uint8_t all_good_loops = 0; -+ bool all_good = 0; -+ while (!all_good) { -+ global_byte_off = -+ set_add_delay(&add_delay[channel], rank, target_off); -+ all_good = true; -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ int16_t local_offset; -+ local_offset = byte_off[channel][byte] - target_off; -+ local_offset = local_offset * 128 + global_byte_off; -+ const uint16_t tx_dq = ctrl->tx_dq[channel][rank][byte]; -+ if (tx_dq + local_offset >= (512 - 64)) { -+ all_good = false; -+ all_good_loops++; -+ target_off++; -+ break; -+ } -+ const uint16_t txdqs = ctrl->tx_dq[channel][rank][byte]; -+ if (txdqs + local_offset < 96) { -+ all_good = false; -+ all_good_loops++; -+ target_off--; -+ break; -+ } -+ } -+ /* Avoid an infinite loop */ -+ if (all_good_loops > 3) -+ break; -+ } -+ if (!all_good) { -+ printk(BIOS_ERR, "JWLC: Target offset refining failed\n"); -+ status = RAMINIT_STATUS_JWRL_FAILURE; -+ break; -+ } -+ printk(BIOS_DEBUG, "C%u.R%u: Offset\tFinalEdge\n", channel, rank); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ int16_t local_offset; -+ local_offset = byte_off[channel][byte] - target_off; -+ local_offset = local_offset * 128 + global_byte_off; -+ ctrl->tx_dq[channel][rank][byte] += local_offset; -+ ctrl->txdqs[channel][rank][byte] += local_offset; -+ update_txt(ctrl, channel, rank, byte, TXT_RESTORE, 0); -+ printk(BIOS_DEBUG, " B%u: %d\t%d\n", byte, local_offset, -+ ctrl->txdqs[channel][rank][byte]); -+ } -+ mchbar_write32(SC_WR_ADD_DELAY_ch(channel), add_delay[channel]); -+ if (!ctrl->lpddr) { -+ reset_dram_dll(ctrl, channel, rank); -+ udelay(1); -+ } -+ printk(BIOS_DEBUG, "\n"); -+ } -+ printk(BIOS_DEBUG, "\n"); -+ } -+ -+ /* Restore WDB after test */ -+ write_wdb_va_pat(ctrl, 0, BASIC_VA_PAT_SPREAD_8, 8, 0); -+ program_wdb_lfsr(ctrl, false); -+ mchbar_write32(DDR_DATA_OFFSET_TRAIN, 0); -+ -+ /** TODO: Do full JEDEC init instead? **/ -+ io_reset(); -+ return status; -+} -+ -+static enum raminit_status verify_wl_width(const int32_t lwidth) -+{ -+ if (lwidth <= 32) { -+ /* Check if width is valid */ -+ printk(BIOS_ERR, "WrLevel: Width region (%d) too small\n", lwidth); -+ return RAMINIT_STATUS_JWRL_FAILURE; -+ } -+ if (lwidth >= 96) { -+ /* Since we're calibrating a phase, a too large region is a problem */ -+ printk(BIOS_ERR, "WrLevel: Width region (%d) too large\n", lwidth); -+ return RAMINIT_STATUS_JWRL_FAILURE; -+ } -+ return 0; -+} -+ -+enum raminit_status train_jedec_write_leveling(struct sysinfo *ctrl) -+{ -+ /* -+ * Enabling WL mode causes DQS to toggle for 1024 QCLK. -+ * Wait for this to stop. Round up to nearest microsecond. -+ */ -+ const bool wl_long_delay = ctrl->lpddr; -+ const uint32_t dqs_toggle_time = wl_long_delay ? 2048 : 1024; -+ const uint32_t wait_time_us = DIV_ROUND_UP(ctrl->qclkps * dqs_toggle_time, 1000 * 1000); -+ -+ const uint16_t wl_start = 192; -+ const uint16_t wl_stop = 192 + 128; -+ const uint16_t wl_step = 2; -+ -+ /* Do not use cached MR values */ -+ const bool save_restore_mrs = ctrl->restore_mrs; -+ ctrl->restore_mrs = 0; -+ -+ /* Propagate delay values (without a write command) */ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ /* Propagate delay values from rank 0 to prevent assertion failures in RTL */ -+ union ddr_data_control_0_reg data_control_0 = { -+ .raw = ctrl->dq_control_0[channel], -+ }; -+ data_control_0.read_rf_rd = 0; -+ data_control_0.read_rf_wr = 1; -+ data_control_0.read_rf_rank = 0; -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ union ddr_data_control_2_reg data_control_2 = { -+ .raw = ctrl->dq_control_2[channel][byte], -+ }; -+ data_control_2.force_bias_on = 1; -+ data_control_2.force_rx_on = 0; -+ data_control_2.wl_long_delay = wl_long_delay; -+ mchbar_write32(DQ_CONTROL_2(channel, byte), data_control_2.raw); -+ } -+ } -+ -+ if (ctrl->lpddr) -+ die("%s: Missing LPDDR support\n", __func__); -+ -+ if (!ctrl->lpddr) -+ ddr3_program_mr1(ctrl, 0, 1); -+ -+ enum raminit_status status = RAMINIT_STATUS_SUCCESS; -+ struct phase_train_data region_data[NUM_CHANNELS][NUM_LANES] = { 0 }; -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ if (!does_rank_exist(ctrl, rank)) -+ continue; -+ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ /** TODO: Differs for LPDDR **/ -+ uint16_t mr1reg = ctrl->mr1[channel][rank / 2]; -+ mr1reg &= ~MR1_QOFF_ENABLE; -+ mr1reg |= MR1_WL_ENABLE; -+ if (is_hsw_ult()) { -+ mr1reg &= ~RTTNOM_MASK; -+ mr1reg |= encode_ddr3_rttnom(120); -+ } else if (ctrl->dpc[channel] == 2) { -+ mr1reg &= ~RTTNOM_MASK; -+ mr1reg |= encode_ddr3_rttnom(60); -+ } -+ reut_issue_mrs(ctrl, channel, BIT(rank), 1, mr1reg); -+ -+ /* Assert ODT for myself */ -+ uint8_t odt_matrix = BIT(rank); -+ if (ctrl->dpc[channel] == 2) { -+ /* Assert ODT for non-target DIMM */ -+ const uint8_t other_dimm = ((rank + 2) / 2) & 1; -+ odt_matrix |= BIT(2 * other_dimm); -+ } -+ -+ union reut_misc_odt_ctrl_reg reut_misc_odt_ctrl = { -+ .raw = 0, -+ }; -+ if (ctrl->lpddr) { -+ /* Only one ODT pin for ULT */ -+ reut_misc_odt_ctrl.odt_on = 1; -+ reut_misc_odt_ctrl.odt_override = 1; -+ } else if (!is_hsw_ult()) { -+ reut_misc_odt_ctrl.odt_on = odt_matrix; -+ reut_misc_odt_ctrl.odt_override = 0xf; -+ } -+ mchbar_write32(REUT_ch_MISC_ODT_CTRL(channel), reut_misc_odt_ctrl.raw); -+ } -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ /* -+ * Enable write leveling mode in DDR and propagate delay -+ * values (without a write command). Stay in WL mode. -+ */ -+ union ddr_data_control_0_reg data_control_0 = { -+ .raw = ctrl->dq_control_0[channel], -+ }; -+ data_control_0.wl_training_mode = 1; -+ data_control_0.tx_pi_on = 1; -+ data_control_0.read_rf_rd = 0; -+ data_control_0.read_rf_wr = 1; -+ data_control_0.read_rf_rank = rank; -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw); -+ } -+ printk(BIOS_DEBUG, "\nRank %u\n", rank); -+ printk(JWRL_PLOT, "Channel\t"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(JWRL_PLOT, "%u", channel); -+ if (channel > 0) -+ continue; -+ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) -+ printk(JWRL_PLOT, "\t"); -+ } -+ printk(JWRL_PLOT, "\nByte"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) -+ printk(JWRL_PLOT, "\t%u", byte); -+ } -+ printk(JWRL_PLOT, "\nWlDelay"); -+ for (uint16_t wl_delay = wl_start; wl_delay < wl_stop; wl_delay += wl_step) { -+ printk(JWRL_PLOT, "\n %3u:", wl_delay); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ update_txt(ctrl, channel, rank, byte, TXT_TXDQS, -+ wl_delay); -+ } -+ } -+ /* Wait for the first burst to finish */ -+ if (wl_delay == wl_start) -+ udelay(wait_time_us); -+ -+ io_reset(); -+ udelay(wait_time_us); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ const uint32_t feedback = -+ get_data_train_feedback(channel, byte); -+ const bool pass = (feedback & 0x1ff) >= 16; -+ printk(JWRL_PLOT, "\t%c%u", pass ? '.' : '#', feedback); -+ phase_record_pass( -+ ®ion_data[channel][byte], -+ pass, -+ wl_delay, -+ wl_start, -+ wl_step); -+ } -+ } -+ } -+ printk(JWRL_PLOT, "\n"); -+ printk(BIOS_DEBUG, "\n\tInitSt\tInitEn\tCurrSt\tCurrEn\tLargSt\tLargEn\n"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ printk(BIOS_DEBUG, "C%u\n", channel); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ struct phase_train_data *data = ®ion_data[channel][byte]; -+ -+ phase_append_initial_to_current(data, wl_start, wl_step); -+ printk(BIOS_DEBUG, " B%u:\t%d\t%d\t%d\t%d\t%d\t%d\n", -+ byte, -+ data->initial.start, -+ data->initial.end, -+ data->current.start, -+ data->current.end, -+ data->largest.start, -+ data->largest.end); -+ } -+ } -+ -+ /* -+ * Clean up after test. Very coarsely adjust for -+ * any cycle errors. Program values for TxDQS. -+ */ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ /* Clear ODT before MRS (JEDEC spec) */ -+ mchbar_write32(REUT_ch_MISC_ODT_CTRL(channel), 0); -+ -+ /** TODO: Differs for LPDDR **/ -+ const uint16_t mr1reg = ctrl->mr1[channel][rank / 2] | MR1_QOFF_ENABLE; -+ reut_issue_mrs(ctrl, channel, BIT(rank), 1, mr1reg); -+ -+ printk(BIOS_DEBUG, "\nC%u.R%u: LftEdge Width\n", channel, rank); -+ const bool rank_x16 = ctrl->dimms[channel][rank / 2].data.width == 16; -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ struct phase_train_data *data = ®ion_data[channel][byte]; -+ const int32_t lwidth = range_width(data->largest); -+ int32_t tx_start = data->largest.start; -+ printk(BIOS_DEBUG, " B%u: %d\t%d\n", byte, tx_start, lwidth); -+ status = verify_wl_width(lwidth); -+ if (status) { -+ printk(BIOS_ERR, -+ "WrLevel problems on channel %u, byte %u\n", -+ channel, byte); -+ goto clean_up; -+ } -+ -+ /* Align byte pairs if DIMM is x16 */ -+ if (rank_x16 && (byte & 1)) { -+ const struct phase_train_data *const ref_data = -+ ®ion_data[channel][byte - 1]; -+ -+ if (tx_start > ref_data->largest.start + 64) -+ tx_start -= 128; -+ -+ if (tx_start < ref_data->largest.start - 64) -+ tx_start += 128; -+ } -+ -+ /* Fix for b4618067 - need to add 1 QCLK to DQS PI */ -+ if (is_hsw_ult()) -+ tx_start += 64; -+ -+ assert(tx_start >= 0); -+ ctrl->txdqs[channel][rank][byte] = tx_start; -+ ctrl->tx_dq[channel][rank][byte] = tx_start + 32; -+ update_txt(ctrl, channel, rank, byte, TXT_RESTORE, 0); -+ } -+ } -+ printk(BIOS_DEBUG, "\n"); -+ } -+ -+clean_up: -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), ctrl->dq_control_0[channel]); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ mchbar_write32(DQ_CONTROL_2(channel, byte), -+ ctrl->dq_control_2[channel][byte]); -+ } -+ } -+ if (!ctrl->lpddr) -+ ddr3_program_mr1(ctrl, 0, 0); -+ -+ ctrl->restore_mrs = save_restore_mrs; -+ -+ if (status) -+ return status; -+ -+ /** TODO: If this step fails and dec_wrd is set, clear it and try again **/ -+ return train_jedec_write_leveling_cleanup(ctrl); -+} -diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h -index 6a31d3a32c..7c0b5a49de 100644 ---- a/src/northbridge/intel/haswell/registers/mchbar.h -+++ b/src/northbridge/intel/haswell/registers/mchbar.h -@@ -121,6 +121,8 @@ - - #define REUT_ch_ERR_DATA_MASK(ch) _MCMAIN_C(0x40d8, ch) - -+#define REUT_ch_ERR_MISC_STATUS(ch) _MCMAIN_C(0x40e8, ch) -+ - #define REUT_ch_MISC_CKE_CTRL(ch) _MCMAIN_C(0x4190, ch) - #define REUT_ch_MISC_ODT_CTRL(ch) _MCMAIN_C(0x4194, ch) - #define REUT_ch_MISC_PAT_CADB_CTRL(ch) _MCMAIN_C(0x4198, ch) --- -2.39.5 - diff --git a/config/coreboot/default/patches/0044-haswell-NRI-Add-final-raminit-steps.patch b/config/coreboot/default/patches/0044-haswell-NRI-Add-final-raminit-steps.patch deleted file mode 100644 index 62cae936..00000000 --- a/config/coreboot/default/patches/0044-haswell-NRI-Add-final-raminit-steps.patch +++ /dev/null @@ -1,570 +0,0 @@ -From 9d1b945702006db5678c5dc81699699bf6e6741a Mon Sep 17 00:00:00 2001 -From: Angel Pons <th3fanbus@gmail.com> -Date: Sun, 8 May 2022 14:29:05 +0200 -Subject: [PATCH 44/51] haswell NRI: Add final raminit steps - -Implement the remaining raminit steps. Although many training steps are -missing, this is enough to boot on the Asrock B85M Pro4. - -Change-Id: I94f3b65f0218d4da4fda4d84592dfd91f77f8f21 -Signed-off-by: Angel Pons <th3fanbus@gmail.com> ---- - src/northbridge/intel/haswell/Kconfig | 4 +- - .../intel/haswell/native_raminit/Makefile.mk | 1 + - .../haswell/native_raminit/activate_mc.c | 388 ++++++++++++++++++ - .../haswell/native_raminit/raminit_main.c | 5 +- - .../haswell/native_raminit/raminit_native.c | 5 +- - .../haswell/native_raminit/raminit_native.h | 2 + - .../haswell/native_raminit/reg_structs.h | 12 + - .../intel/haswell/registers/mchbar.h | 7 + - 8 files changed, 416 insertions(+), 8 deletions(-) - create mode 100644 src/northbridge/intel/haswell/native_raminit/activate_mc.c - -diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig -index 4b83a25bc1..c6ab27184e 100644 ---- a/src/northbridge/intel/haswell/Kconfig -+++ b/src/northbridge/intel/haswell/Kconfig -@@ -11,12 +11,12 @@ config NORTHBRIDGE_INTEL_HASWELL - if NORTHBRIDGE_INTEL_HASWELL - - config USE_NATIVE_RAMINIT -- bool "[NOT WORKING] Use native raminit" -+ bool "[NOT COMPLETE] Use native raminit" - default n - select HAVE_DEBUG_RAM_SETUP - help - Select if you want to use coreboot implementation of raminit rather than -- MRC.bin. Currently incomplete and does not boot. -+ MRC.bin. Currently incomplete and does not support S3 resume. - - config HASWELL_VBOOT_IN_BOOTBLOCK - depends on VBOOT -diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -index 40c2f5e014..d97da72890 100644 ---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk -+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -@@ -1,5 +1,6 @@ - ## SPDX-License-Identifier: GPL-2.0-or-later - -+romstage-y += activate_mc.c - romstage-y += change_margin.c - romstage-y += configure_mc.c - romstage-y += ddr3.c -diff --git a/src/northbridge/intel/haswell/native_raminit/activate_mc.c b/src/northbridge/intel/haswell/native_raminit/activate_mc.c -new file mode 100644 -index 0000000000..78a7ad27ef ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/activate_mc.c -@@ -0,0 +1,388 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <console/console.h> -+#include <delay.h> -+#include <device/pci_ops.h> -+#include <northbridge/intel/haswell/haswell.h> -+#include <timer.h> -+#include <types.h> -+ -+#include "raminit_native.h" -+ -+static void update_internal_clocks_on(struct sysinfo *ctrl) -+{ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ bool clocks_on = false; -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ const union ddr_data_control_1_reg data_control_1 = { -+ .raw = ctrl->dq_control_1[channel][byte], -+ }; -+ const int8_t o_on = data_control_1.odt_delay; -+ const int8_t s_on = data_control_1.sense_amp_delay; -+ const int8_t o_off = data_control_1.odt_duration; -+ const int8_t s_off = data_control_1.sense_amp_duration; -+ if (o_on + o_off >= 7 || s_on + s_off >= 7) { -+ clocks_on = true; -+ break; -+ } -+ } -+ union ddr_data_control_0_reg data_control_0 = { -+ .raw = ctrl->dq_control_0[channel], -+ }; -+ data_control_0.internal_clocks_on = clocks_on; -+ ctrl->dq_control_0[channel] = data_control_0.raw; -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw); -+ } -+} -+ -+/* Switch off unused segments of the SDLL to save power */ -+static void update_sdll_length(struct sysinfo *ctrl) -+{ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ uint8_t max_pi = 0; -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ const uint8_t rx_dqs_p = ctrl->rxdqsp[channel][rank][byte]; -+ const uint8_t rx_dqs_n = ctrl->rxdqsn[channel][rank][byte]; -+ max_pi = MAX(max_pi, MAX(rx_dqs_p, rx_dqs_n)); -+ } -+ /* Update SDLL length for power savings */ -+ union ddr_data_control_1_reg data_control_1 = { -+ .raw = ctrl->dq_control_1[channel][byte], -+ }; -+ /* Calculate which segments to turn off */ -+ data_control_1.sdll_segment_disable = (7 - (max_pi >> 3)) & ~1; -+ ctrl->dq_control_1[channel][byte] = data_control_1.raw; -+ mchbar_write32(DQ_CONTROL_1(channel, byte), data_control_1.raw); -+ } -+ } -+} -+ -+static void set_rx_clk_stg_num(struct sysinfo *ctrl, const uint8_t channel) -+{ -+ const uint8_t rcven_drift = ctrl->lpddr ? DIV_ROUND_UP(tDQSCK_DRIFT, ctrl->qclkps) : 1; -+ uint8_t max_rcven = 0; -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) -+ max_rcven = MAX(max_rcven, ctrl->rcven[channel][rank][byte] / 64); -+ } -+ const union ddr_data_control_1_reg ddr_data_control_1 = { -+ .raw = ctrl->dq_control_1[channel][0], -+ }; -+ const bool lpddr_long_odt = ddr_data_control_1.lpddr_long_odt_en; -+ const uint8_t rcven_turnoff = max_rcven + 18 + 2 * rcven_drift + lpddr_long_odt; -+ const union ddr_data_control_0_reg ddr_data_control_0 = { -+ .raw = ctrl->dq_control_0[channel], -+ }; -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ union ddr_data_control_2_reg ddr_data_control_2 = { -+ .raw = ctrl->dq_control_2[channel][byte], -+ }; -+ if (ddr_data_control_0.odt_samp_extend_en) { -+ if (ddr_data_control_2.rx_clk_stg_num < rcven_turnoff) -+ ddr_data_control_2.rx_clk_stg_num = rcven_turnoff; -+ } else { -+ const int8_t o_on = ddr_data_control_1.odt_delay; -+ const int8_t o_off = ddr_data_control_1.odt_duration; -+ ddr_data_control_2.rx_clk_stg_num = MAX(17, o_on + o_off + 14); -+ } -+ ctrl->dq_control_2[channel][byte] = ddr_data_control_2.raw; -+ mchbar_write32(DQ_CONTROL_2(channel, byte), ddr_data_control_2.raw); -+ } -+} -+ -+#define SELF_REFRESH_IDLE_COUNT 0x200 -+ -+static void enter_sr(void) -+{ -+ mchbar_write32(PM_SREF_CONFIG, SELF_REFRESH_IDLE_COUNT | BIT(16)); -+ udelay(1); -+} -+ -+enum power_down_mode { -+ PDM_NO_PD = 0, -+ PDM_APD = 1, -+ PDM_PPD = 2, -+ PDM_PPD_DLL_OFF = 6, -+}; -+ -+static void power_down_config(struct sysinfo *ctrl) -+{ -+ const enum power_down_mode pd_mode = ctrl->lpddr ? PDM_PPD : PDM_PPD_DLL_OFF; -+ mchbar_write32(PM_PDWN_CONFIG, pd_mode << 12 | 0x40); -+} -+ -+static void train_power_modes_post(struct sysinfo *ctrl) -+{ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ /* Adjust tCPDED and tPRPDEN */ -+ if (ctrl->mem_clock_mhz >= 933) -+ ctrl->tc_bankrank_d[channel].tCPDED = 2; -+ -+ if (ctrl->mem_clock_mhz >= 1066) -+ ctrl->tc_bankrank_d[channel].tPRPDEN = 2; -+ -+ mchbar_write32(TC_BANK_RANK_D_ch(channel), ctrl->tc_bankrank_d[channel].raw); -+ } -+ power_down_config(ctrl); -+ mchbar_write32(MCDECS_CBIT, BIT(30)); /* dis_msg_clk_gate */ -+} -+ -+static uint8_t compute_burst_end_odt_delay(const struct sysinfo *const ctrl) -+{ -+ /* Must be disabled for LPDDR */ -+ if (ctrl->lpddr) -+ return 0; -+ -+ const uint8_t beod = MIN(7, DIV_ROUND_CLOSEST(14300 * 20 / 100, ctrl->qclkps)); -+ if (beod < 3) -+ return 0; -+ -+ if (beod < 4) -+ return 4; -+ -+ return beod; -+} -+ -+static void program_burst_end_odt_delay(struct sysinfo *ctrl) -+{ -+ /* Program burst_end_odt_delay - it should be zero during training steps */ -+ const uint8_t beod = compute_burst_end_odt_delay(ctrl); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ union ddr_data_control_1_reg ddr_data_control_1 = { -+ .raw = ctrl->dq_control_1[channel][byte], -+ }; -+ ddr_data_control_1.burst_end_odt_delay = beod; -+ ctrl->dq_control_1[channel][byte] = ddr_data_control_1.raw; -+ mchbar_write32(DQ_CONTROL_1(channel, byte), ddr_data_control_1.raw); -+ } -+ } -+} -+ -+/* -+ * Return a random value to use for scrambler seeds. Try to use RDRAND -+ * first and fall back to hardcoded values if RDRAND does not succeed. -+ */ -+static uint16_t get_random_number(const uint8_t channel) -+{ -+ /* The RDRAND instruction is only available 100k cycles after reset */ -+ for (size_t i = 0; i < 100000; i++) { -+ uint32_t status; -+ uint32_t random; -+ /** TODO: Clean up asm **/ -+ __asm__ __volatile__( -+ "\n\t .byte 0x0F, 0xC7, 0xF0" -+ "\n\t movl %%eax, %0" -+ "\n\t pushf" -+ "\n\t pop %%eax" -+ "\n\t movl %%eax, %1" -+ : "=m"(random), -+ "=m"(status) -+ : /* No inputs */ -+ : "eax", "cc"); -+ -+ /* Only consider non-zero random values as valid */ -+ if (status & 1 && random) -+ return random; -+ } -+ -+ /* https://xkcd.com/221 */ -+ if (channel) -+ return 0x28f4; -+ else -+ return 0x893e; -+} -+ -+/* Work around "error: 'typeof' applied to a bit-field" */ -+static inline uint32_t max(const uint32_t a, const uint32_t b) -+{ -+ return MAX(a, b); -+} -+ -+enum raminit_status activate_mc(struct sysinfo *ctrl) -+{ -+ const bool enable_scrambling = true; -+ const bool enable_cmd_tristate = true; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ if (enable_scrambling && ctrl->stepping < STEPPING_C0) { -+ /* Make sure tRDRD_(sr, dr, dd) are at least 6 for scrambler W/A */ -+ union tc_bank_rank_a_reg tc_bank_rank_a = { -+ .raw = mchbar_read32(TC_BANK_RANK_A_ch(channel)), -+ }; -+ tc_bank_rank_a.tRDRD_sr = max(tc_bank_rank_a.tRDRD_sr, 6); -+ tc_bank_rank_a.tRDRD_dr = max(tc_bank_rank_a.tRDRD_dr, 6); -+ tc_bank_rank_a.tRDRD_dd = max(tc_bank_rank_a.tRDRD_dd, 6); -+ mchbar_write32(TC_BANK_RANK_A_ch(channel), tc_bank_rank_a.raw); -+ } -+ if (enable_scrambling) { -+ const union ddr_scramble_reg ddr_scramble = { -+ .scram_key = get_random_number(channel), -+ .scram_en = 1, -+ }; -+ mchbar_write32(DDR_SCRAMBLE_ch(channel), ddr_scramble.raw); -+ } -+ if (ctrl->tCMD == 1) { -+ /* If we are in 1N mode, enable and set command rate limit to 3 */ -+ union mcmain_command_rate_limit_reg cmd_rate_limit = { -+ .raw = mchbar_read32(COMMAND_RATE_LIMIT_ch(channel)), -+ }; -+ cmd_rate_limit.enable_cmd_limit = 1; -+ cmd_rate_limit.cmd_rate_limit = 3; -+ mchbar_write32(COMMAND_RATE_LIMIT_ch(channel), cmd_rate_limit.raw); -+ } -+ if (enable_cmd_tristate) { -+ /* Enable command tri-state at the end of training */ -+ union tc_bank_rank_a_reg tc_bank_rank_a = { -+ .raw = mchbar_read32(TC_BANK_RANK_A_ch(channel)), -+ }; -+ tc_bank_rank_a.cmd_3st_dis = 0; -+ mchbar_write32(TC_BANK_RANK_A_ch(channel), tc_bank_rank_a.raw); -+ } -+ /* Set MC to normal mode and clean the ODT and CKE */ -+ mchbar_write32(REUT_ch_SEQ_CFG(channel), REUT_MODE_NOP << 12); -+ /* Set again the rank occupancy */ -+ mchbar_write8(MC_INIT_STATE_ch(channel), ctrl->rankmap[channel]); -+ if (ctrl->is_ecc) { -+ /* Enable ECC I/O and logic */ -+ union mad_dimm_reg mad_dimm = { -+ .raw = mchbar_read32(MAD_DIMM(channel)), -+ }; -+ mad_dimm.ecc_mode = 3; -+ mchbar_write32(MAD_DIMM(channel), mad_dimm.raw); -+ } -+ } -+ -+ if (!is_hsw_ult()) -+ update_internal_clocks_on(ctrl); -+ -+ update_sdll_length(ctrl); -+ -+ program_burst_end_odt_delay(ctrl); -+ -+ if (is_hsw_ult()) { -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ set_rx_clk_stg_num(ctrl, channel); -+ } -+ /** TODO: Program DDRPL_CR_DDR_TX_DELAY if Memory Trace is enabled **/ -+ } -+ -+ /* Enable periodic COMP */ -+ mchbar_write32(M_COMP, (union pcu_comp_reg) { -+ .comp_interval = COMP_INT, -+ }.raw); -+ -+ /* Enable the power mode before PCU starts working */ -+ train_power_modes_post(ctrl); -+ -+ /* Set idle timer and self refresh enable bits */ -+ enter_sr(); -+ -+ /** FIXME: Do not hardcode power weights and RAPL settings **/ -+ mchbar_write32(0x5888, 0x00000d0d); -+ mchbar_write32(0x5884, 0x00000004); /* 58.2 pJ */ -+ -+ mchbar_write32(0x58e0, 0); -+ mchbar_write32(0x58e4, 0); -+ -+ mchbar_write32(0x5890, 0xffff); -+ mchbar_write32(0x5894, 0xffff); -+ mchbar_write32(0x5898, 0xffff); -+ mchbar_write32(0x589c, 0xffff); -+ mchbar_write32(0x58d0, 0xffff); -+ mchbar_write32(0x58d4, 0xffff); -+ mchbar_write32(0x58d8, 0xffff); -+ mchbar_write32(0x58dc, 0xffff); -+ -+ /* Overwrite thermal parameters */ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ mchbar_write32(_MCMAIN_C(0x42ec, channel), 0x0000000f); -+ mchbar_write32(_MCMAIN_C(0x42f0, channel), 0x00000009); -+ mchbar_write32(_MCMAIN_C(0x42f4, channel), 0x00000093); -+ mchbar_write32(_MCMAIN_C(0x42f8, channel), 0x00000087); -+ mchbar_write32(_MCMAIN_C(0x42fc, channel), 0x000000de); -+ -+ /** TODO: Differs for LPDDR **/ -+ mchbar_write32(PM_THRT_CKE_MIN_ch(channel), 0x30); -+ } -+ mchbar_write32(PCU_DDR_PTM_CTL, 0x40); -+ return RAMINIT_STATUS_SUCCESS; -+} -+ -+static void mc_lockdown(void) -+{ -+ /* Lock memory controller registers */ -+ mchbar_write32(MC_LOCK, 0x8f); -+ -+ /* MPCOHTRK_GDXC_OCLA_ADDRESS_HI_LOCK is set when programming the memory map */ -+ -+ /* Lock memory map registers */ -+ pci_or_config16(HOST_BRIDGE, GGC, 1 << 0); -+ pci_or_config32(HOST_BRIDGE, DPR, 1 << 0); -+ pci_or_config32(HOST_BRIDGE, MESEG_LIMIT, 1 << 10); -+ pci_or_config32(HOST_BRIDGE, REMAPBASE, 1 << 0); -+ pci_or_config32(HOST_BRIDGE, REMAPLIMIT, 1 << 0); -+ pci_or_config32(HOST_BRIDGE, TOM, 1 << 0); -+ pci_or_config32(HOST_BRIDGE, TOUUD, 1 << 0); -+ pci_or_config32(HOST_BRIDGE, BDSM, 1 << 0); -+ pci_or_config32(HOST_BRIDGE, BGSM, 1 << 0); -+ pci_or_config32(HOST_BRIDGE, TOLUD, 1 << 0); -+} -+ -+enum raminit_status raminit_done(struct sysinfo *ctrl) -+{ -+ union mc_init_state_g_reg mc_init_state_g = { -+ .raw = mchbar_read32(MC_INIT_STATE_G), -+ }; -+ mc_init_state_g.refresh_enable = 1; -+ mc_init_state_g.pu_mrc_done = 1; -+ mc_init_state_g.mrc_done = 1; -+ mchbar_write32(MC_INIT_STATE_G, mc_init_state_g.raw); -+ -+ /* Lock the memory controller to enable normal operation */ -+ mc_lockdown(); -+ -+ /* Poll for mc_init_done_ack to make sure memory initialization is complete */ -+ printk(BIOS_DEBUG, "Waiting for mc_init_done acknowledgement... "); -+ -+ struct stopwatch timer; -+ stopwatch_init_msecs_expire(&timer, 2000); -+ do { -+ mc_init_state_g.raw = mchbar_read32(MC_INIT_STATE_G); -+ -+ /* DRAM will NOT work without the acknowledgement. There is no hope. */ -+ if (stopwatch_expired(&timer)) -+ die("\nTimed out waiting for mc_init_done acknowledgement\n"); -+ -+ } while (mc_init_state_g.mc_init_done_ack == 0); -+ printk(BIOS_DEBUG, "DONE!\n"); -+ -+ /* Provide some data for the graphics driver. Yes, it's hardcoded. */ -+ mchbar_write32(SSKPD + 0, 0x05a2404f); -+ mchbar_write32(SSKPD + 4, 0x140000a0); -+ return RAMINIT_STATUS_SUCCESS; -+} -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -index 1ff23be615..3a65fb01fb 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -@@ -63,6 +63,8 @@ static const struct task_entry cold_boot[] = { - { train_receive_enable, true, "RCVET", }, - { train_read_mpr, true, "RDMPRT", }, - { train_jedec_write_leveling, true, "JWRL", }, -+ { activate_mc, true, "ACTIVATE", }, -+ { raminit_done, true, "RAMINITEND", }, - }; - - /* Return a generic stepping value to make stepping checks simpler */ -@@ -143,7 +145,4 @@ void raminit_main(const enum raminit_boot_mode bootmode) - - if (status != RAMINIT_STATUS_SUCCESS) - die("Memory initialization was met with utmost failure and misery\n"); -- -- /** TODO: Implement the required magic **/ -- die("NATIVE RAMINIT: More Magic (tm) required.\n"); - } -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c -index 2fed93de5b..5f7ceec222 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c -@@ -199,8 +199,6 @@ void perform_raminit(const int s3resume) - else - me_status = ME_INIT_STATUS_SUCCESS; - -- /** TODO: Remove this once raminit is implemented **/ -- me_status = ME_INIT_STATUS_ERROR; - intel_early_me_init_done(me_status); - } - -@@ -214,7 +212,8 @@ void perform_raminit(const int s3resume) - } - - /* Save training data on non-S3 resumes */ -- if (!s3resume) -+ /** TODO: Enable this once training data is populated **/ -+ if (0 && !s3resume) - save_mrc_data(&md); - - /** TODO: setup_sdram_meminfo **/ -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -index d6b11b9d3c..a0a913f926 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -@@ -448,6 +448,8 @@ enum raminit_status do_jedec_init(struct sysinfo *ctrl); - enum raminit_status train_receive_enable(struct sysinfo *ctrl); - enum raminit_status train_read_mpr(struct sysinfo *ctrl); - enum raminit_status train_jedec_write_leveling(struct sysinfo *ctrl); -+enum raminit_status activate_mc(struct sysinfo *ctrl); -+enum raminit_status raminit_done(struct sysinfo *ctrl); - - void configure_timings(struct sysinfo *ctrl); - void configure_refresh(struct sysinfo *ctrl); -diff --git a/src/northbridge/intel/haswell/native_raminit/reg_structs.h b/src/northbridge/intel/haswell/native_raminit/reg_structs.h -index a0e36ed082..0d9aaa1f7c 100644 ---- a/src/northbridge/intel/haswell/native_raminit/reg_structs.h -+++ b/src/northbridge/intel/haswell/native_raminit/reg_structs.h -@@ -294,6 +294,18 @@ union ddr_cke_ctl_controls_reg { - uint32_t raw; - }; - -+union ddr_scramble_reg { -+ struct __packed { -+ uint32_t scram_en : 1; // Bits 0:0 -+ uint32_t scram_key : 16; // Bits 16:1 -+ uint32_t clk_gate_ab : 2; // Bits 18:17 -+ uint32_t clk_gate_c : 2; // Bits 20:19 -+ uint32_t en_dbi_ab : 1; // Bits 21:21 -+ uint32_t : 10; // Bits 31:17 -+ }; -+ uint32_t raw; -+}; -+ - union ddr_scram_misc_control_reg { - struct __packed { - uint32_t wl_wake_cycles : 2; // Bits 1:0 -diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h -index 7c0b5a49de..49a215aa71 100644 ---- a/src/northbridge/intel/haswell/registers/mchbar.h -+++ b/src/northbridge/intel/haswell/registers/mchbar.h -@@ -20,6 +20,7 @@ - - #define DDR_DATA_TRAIN_FEEDBACK(ch, byte) _DDRIO_C_R_B(0x0054, ch, 0, byte) - -+#define DQ_CONTROL_1(ch, byte) _DDRIO_C_R_B(0x0060, ch, 0, byte) - #define DQ_CONTROL_2(ch, byte) _DDRIO_C_R_B(0x0064, ch, 0, byte) - #define DDR_DATA_OFFSET_TRAIN_ch_b(ch, byte) _DDRIO_C_R_B(0x0070, ch, 0, byte) - #define DQ_CONTROL_0(ch, byte) _DDRIO_C_R_B(0x0074, ch, 0, byte) -@@ -147,6 +148,8 @@ - #define QCLK_ch_LDAT_SDAT(ch) _MCMAIN_C(0x42d4, ch) - #define QCLK_ch_LDAT_DATA_IN_x(ch, x) _MCMAIN_C_X(0x42dc, ch, x) /* x in 0 .. 1 */ - -+#define PM_THRT_CKE_MIN_ch(ch) _MCMAIN_C(0x4328, ch) -+ - #define REUT_GLOBAL_CTL 0x4800 - #define REUT_GLOBAL_ERR 0x4804 - -@@ -175,6 +178,8 @@ - - #define MCSCHEDS_DFT_MISC 0x4c30 - -+#define PM_PDWN_CONFIG 0x4cb0 -+ - #define REUT_ERR_DATA_STATUS 0x4ce0 - - #define REUT_MISC_CKE_CTRL 0x4d90 -@@ -186,8 +191,10 @@ - #define MAD_CHNL 0x5000 /* Address Decoder Channel Configuration */ - #define MAD_DIMM(ch) (0x5004 + (ch) * 4) - #define MAD_ZR 0x5014 -+#define MCDECS_CBIT 0x501c - #define MC_INIT_STATE_G 0x5030 - #define MRC_REVISION 0x5034 /* MRC Revision */ -+#define PM_SREF_CONFIG 0x5060 - - #define RCOMP_TIMER 0x5084 - --- -2.39.5 - diff --git a/config/coreboot/default/patches/0045-Haswell-NRI-Implement-fast-boot-path.patch b/config/coreboot/default/patches/0045-Haswell-NRI-Implement-fast-boot-path.patch deleted file mode 100644 index af614a5f..00000000 --- a/config/coreboot/default/patches/0045-Haswell-NRI-Implement-fast-boot-path.patch +++ /dev/null @@ -1,722 +0,0 @@ -From b6b89013630d535b68a005cede9e2540f273f4e7 Mon Sep 17 00:00:00 2001 -From: Angel Pons <th3fanbus@gmail.com> -Date: Sat, 13 Apr 2024 01:16:30 +0200 -Subject: [PATCH 45/51] Haswell NRI: Implement fast boot path - -When the memory configuration hasn't changed, there is no need to do -full memory training. Instead, boot firmware can use saved training -data to reinitialise the memory controller and memory. - -Unlike native RAM init for other platforms, Haswell does not save the -main structure (the "mighty ctrl" struct) to flash. Instead, separate -structures define the data to be saved, which can be smaller than the -main structure. - -This makes S3 suspend and resume work: RAM contents MUST be preserved -for a S3 resume to succeed, but RAM training destroys RAM contents. - -Change-Id: I06f6cd39ceecdca104fae89159f28e85cf7ff4e6 -Signed-off-by: Angel Pons <th3fanbus@gmail.com> ---- - .../intel/haswell/native_raminit/Makefile.mk | 1 + - .../haswell/native_raminit/activate_mc.c | 17 + - .../intel/haswell/native_raminit/ddr3.c | 41 ++ - .../haswell/native_raminit/raminit_main.c | 34 +- - .../haswell/native_raminit/raminit_native.c | 30 +- - .../haswell/native_raminit/raminit_native.h | 18 + - .../haswell/native_raminit/save_restore.c | 387 ++++++++++++++++++ - 7 files changed, 504 insertions(+), 24 deletions(-) - create mode 100644 src/northbridge/intel/haswell/native_raminit/save_restore.c - -diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -index d97da72890..8fdd17c542 100644 ---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk -+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -@@ -13,6 +13,7 @@ romstage-y += raminit_main.c - romstage-y += raminit_native.c - romstage-y += ranges.c - romstage-y += reut.c -+romstage-y += save_restore.c - romstage-y += setup_wdb.c - romstage-y += spd_bitmunching.c - romstage-y += testing_io.c -diff --git a/src/northbridge/intel/haswell/native_raminit/activate_mc.c b/src/northbridge/intel/haswell/native_raminit/activate_mc.c -index 78a7ad27ef..0b3eb917da 100644 ---- a/src/northbridge/intel/haswell/native_raminit/activate_mc.c -+++ b/src/northbridge/intel/haswell/native_raminit/activate_mc.c -@@ -333,6 +333,23 @@ enum raminit_status activate_mc(struct sysinfo *ctrl) - return RAMINIT_STATUS_SUCCESS; - } - -+enum raminit_status normal_state(struct sysinfo *ctrl) -+{ -+ /* Enable periodic COMP */ -+ mchbar_write32(M_COMP, (union pcu_comp_reg) { -+ .comp_interval = COMP_INT, -+ }.raw); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ /* Set MC to normal mode and clean the ODT and CKE */ -+ mchbar_write32(REUT_ch_SEQ_CFG(channel), REUT_MODE_NOP << 12); -+ } -+ power_down_config(ctrl); -+ return RAMINIT_STATUS_SUCCESS; -+} -+ - static void mc_lockdown(void) - { - /* Lock memory controller registers */ -diff --git a/src/northbridge/intel/haswell/native_raminit/ddr3.c b/src/northbridge/intel/haswell/native_raminit/ddr3.c -index 6ddb11488b..9b6368edb1 100644 ---- a/src/northbridge/intel/haswell/native_raminit/ddr3.c -+++ b/src/northbridge/intel/haswell/native_raminit/ddr3.c -@@ -2,6 +2,7 @@ - - #include <assert.h> - #include <console/console.h> -+#include <delay.h> - #include <northbridge/intel/haswell/haswell.h> - #include <types.h> - -@@ -215,3 +216,43 @@ enum raminit_status ddr3_jedec_init(struct sysinfo *ctrl) - ddr3_program_mr0(ctrl, 1); - return reut_issue_zq(ctrl, ctrl->chanmap, ZQ_INIT); - } -+ -+enum raminit_status exit_selfrefresh(struct sysinfo *ctrl) -+{ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ /* Fields in ctrl aren't populated on a warm boot */ -+ union ddr_data_control_0_reg data_control_0 = { -+ .raw = mchbar_read32(DQ_CONTROL_0(channel, 0)), -+ }; -+ data_control_0.read_rf_rd = 1; -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ data_control_0.read_rf_rank = rank; -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw); -+ } -+ } -+ -+ /* Time needed to stabilize the DCLK (~6 us) */ -+ udelay(6); -+ -+ /* Pull the DIMMs out of self refresh by asserting CKE high */ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ const union reut_misc_cke_ctrl_reg reut_misc_cke_ctrl = { -+ .cke_on = ctrl->rankmap[channel], -+ }; -+ mchbar_write32(REUT_ch_MISC_CKE_CTRL(channel), reut_misc_cke_ctrl.raw); -+ } -+ mchbar_write32(REUT_MISC_ODT_CTRL, 0); -+ -+ const enum raminit_status status = reut_issue_zq(ctrl, ctrl->chanmap, ZQ_LONG); -+ if (status) { -+ /* ZQCL errors don't seem to be a fatal problem here */ -+ printk(BIOS_ERR, "ZQ Long failed during S3 resume or warm reset flow\n"); -+ } -+ return RAMINIT_STATUS_SUCCESS; -+} -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -index 3a65fb01fb..056dde1adc 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -@@ -64,6 +64,22 @@ static const struct task_entry cold_boot[] = { - { train_read_mpr, true, "RDMPRT", }, - { train_jedec_write_leveling, true, "JWRL", }, - { activate_mc, true, "ACTIVATE", }, -+ { save_training_values, true, "SAVE_TRAIN", }, -+ { save_non_training, true, "SAVE_NONT", }, -+ { raminit_done, true, "RAMINITEND", }, -+}; -+ -+static const struct task_entry fast_boot[] = { -+ { collect_spd_info, true, "PROCSPD", }, -+ { restore_non_training, true, "RST_NONT", }, -+ { initialise_mpll, true, "INITMPLL", }, -+ { configure_mc, true, "CONFMC", }, -+ { configure_memory_map, true, "MEMMAP", }, -+ { do_jedec_init, true, "JEDECINIT", }, -+ { pre_training, true, "PRETRAIN", }, -+ { restore_training_values, true, "RST_TRAIN", }, -+ { exit_selfrefresh, true, "EXIT_SR", }, -+ { normal_state, true, "NORMALMODE", }, - { raminit_done, true, "RAMINITEND", }, - }; - -@@ -102,11 +118,11 @@ static void initialize_ctrl(struct sysinfo *ctrl) - ctrl->bootmode = bootmode; - } - --static enum raminit_status try_raminit(struct sysinfo *ctrl) -+static enum raminit_status try_raminit( -+ struct sysinfo *ctrl, -+ const struct task_entry *const schedule, -+ const size_t length) - { -- const struct task_entry *const schedule = cold_boot; -- const size_t length = ARRAY_SIZE(cold_boot); -- - enum raminit_status status = RAMINIT_STATUS_UNSPECIFIED_ERROR; - - for (size_t i = 0; i < length; i++) { -@@ -140,8 +156,16 @@ void raminit_main(const enum raminit_boot_mode bootmode) - mighty_ctrl.bootmode = bootmode; - initialize_ctrl(&mighty_ctrl); - -+ enum raminit_status status = RAMINIT_STATUS_UNSPECIFIED_ERROR; -+ -+ if (bootmode != BOOTMODE_COLD) { -+ status = try_raminit(&mighty_ctrl, fast_boot, ARRAY_SIZE(fast_boot)); -+ if (status == RAMINIT_STATUS_SUCCESS) -+ return; -+ } -+ - /** TODO: Try more than once **/ -- enum raminit_status status = try_raminit(&mighty_ctrl); -+ status = try_raminit(&mighty_ctrl, cold_boot, ARRAY_SIZE(cold_boot)); - - if (status != RAMINIT_STATUS_SUCCESS) - die("Memory initialization was met with utmost failure and misery\n"); -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c -index 5f7ceec222..3ad8ce29e7 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c -@@ -54,23 +54,17 @@ static bool early_init_native(enum raminit_boot_mode bootmode) - return cpu_replaced; - } - --#define MRC_CACHE_VERSION 1 -- --struct mrc_data { -- const void *buffer; -- size_t buffer_len; --}; -- --static void save_mrc_data(struct mrc_data *md) -+static void save_mrc_data(void) - { -- mrc_cache_stash_data(MRC_TRAINING_DATA, MRC_CACHE_VERSION, md->buffer, md->buffer_len); -+ mrc_cache_stash_data(MRC_TRAINING_DATA, reg_frame_rev(), -+ reg_frame_ptr(), reg_frame_size()); - } - - static struct mrc_data prepare_mrc_cache(void) - { - struct mrc_data md = {0}; - md.buffer = mrc_cache_current_mmap_leak(MRC_TRAINING_DATA, -- MRC_CACHE_VERSION, -+ reg_frame_rev(), - &md.buffer_len); - return md; - } -@@ -94,14 +88,15 @@ static void raminit_reset(void) - } - - static enum raminit_boot_mode do_actual_raminit( -- struct mrc_data *md, - const bool s3resume, - const bool cpu_replaced, - const enum raminit_boot_mode orig_bootmode) - { -+ struct mrc_data md = prepare_mrc_cache(); -+ - enum raminit_boot_mode bootmode = orig_bootmode; - -- bool save_data_valid = md->buffer && md->buffer_len == USHRT_MAX; /** TODO: sizeof() **/ -+ bool save_data_valid = md.buffer && md.buffer_len == reg_frame_size(); - - if (s3resume) { - if (bootmode == BOOTMODE_COLD) { -@@ -154,7 +149,7 @@ static enum raminit_boot_mode do_actual_raminit( - assert(save_data_valid != (bootmode == BOOTMODE_COLD)); - if (save_data_valid) { - printk(BIOS_INFO, "Using cached memory parameters\n"); -- die("RAMINIT: Fast boot is not yet implemented\n"); -+ memcpy(reg_frame_ptr(), md.buffer, reg_frame_size()); - } - printk(RAM_DEBUG, "Initial bootmode: %s\n", bm_names[orig_bootmode]); - printk(RAM_DEBUG, "Current bootmode: %s\n", bm_names[bootmode]); -@@ -181,10 +176,8 @@ void perform_raminit(const int s3resume) - wait_txt_clear(); - wrmsr(0x2e6, (msr_t) {.lo = 0, .hi = 0}); - -- struct mrc_data md = prepare_mrc_cache(); -- - const enum raminit_boot_mode bootmode = -- do_actual_raminit(&md, s3resume, cpu_replaced, orig_bootmode); -+ do_actual_raminit(s3resume, cpu_replaced, orig_bootmode); - - /** TODO: report_memory_config **/ - -@@ -212,9 +205,8 @@ void perform_raminit(const int s3resume) - } - - /* Save training data on non-S3 resumes */ -- /** TODO: Enable this once training data is populated **/ -- if (0 && !s3resume) -- save_mrc_data(&md); -+ if (!s3resume) -+ save_mrc_data(); - - /** TODO: setup_sdram_meminfo **/ - } -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -index a0a913f926..2ac16eaad3 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -@@ -170,6 +170,8 @@ enum regfile_mode { - REG_FILE_USE_CURRENT, /* Used when changing parameters after the test */ - }; - -+struct register_save_frame; -+ - struct wdb_pat { - uint32_t start_ptr; /* Starting pointer in WDB */ - uint32_t stop_ptr; /* Stopping pointer in WDB */ -@@ -220,6 +222,7 @@ enum raminit_status { - RAMINIT_STATUS_RCVEN_FAILURE, - RAMINIT_STATUS_RMPR_FAILURE, - RAMINIT_STATUS_JWRL_FAILURE, -+ RAMINIT_STATUS_INVALID_CACHE, - RAMINIT_STATUS_UNSPECIFIED_ERROR, /** TODO: Deprecated in favor of specific values **/ - }; - -@@ -229,6 +232,11 @@ enum generic_stepping { - STEPPING_C0 = 3, - }; - -+struct mrc_data { -+ const void *buffer; -+ size_t buffer_len; -+}; -+ - struct raminit_dimm_info { - spd_ddr3_raw_data raw_spd; - struct dimm_attr_ddr3_st data; -@@ -448,12 +456,22 @@ enum raminit_status do_jedec_init(struct sysinfo *ctrl); - enum raminit_status train_receive_enable(struct sysinfo *ctrl); - enum raminit_status train_read_mpr(struct sysinfo *ctrl); - enum raminit_status train_jedec_write_leveling(struct sysinfo *ctrl); -+enum raminit_status save_training_values(struct sysinfo *ctrl); -+enum raminit_status restore_training_values(struct sysinfo *ctrl); -+enum raminit_status save_non_training(struct sysinfo *ctrl); -+enum raminit_status restore_non_training(struct sysinfo *ctrl); -+enum raminit_status exit_selfrefresh(struct sysinfo *ctrl); -+enum raminit_status normal_state(struct sysinfo *ctrl); - enum raminit_status activate_mc(struct sysinfo *ctrl); - enum raminit_status raminit_done(struct sysinfo *ctrl); - - void configure_timings(struct sysinfo *ctrl); - void configure_refresh(struct sysinfo *ctrl); - -+struct register_save_frame *reg_frame_ptr(void); -+size_t reg_frame_size(void); -+uint32_t reg_frame_rev(void); -+ - uint32_t get_tCKE(uint32_t mem_clock_mhz, bool lpddr); - uint32_t get_tXPDLL(uint32_t mem_clock_mhz); - uint32_t get_tAONPD(uint32_t mem_clock_mhz); -diff --git a/src/northbridge/intel/haswell/native_raminit/save_restore.c b/src/northbridge/intel/haswell/native_raminit/save_restore.c -new file mode 100644 -index 0000000000..f1f50e3ff8 ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/save_restore.c -@@ -0,0 +1,387 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <assert.h> -+#include <console/console.h> -+#include <northbridge/intel/haswell/haswell.h> -+#include <types.h> -+ -+#include "raminit_native.h" -+ -+uint32_t reg_frame_rev(void) -+{ -+ /* -+ * Equivalent to MRC_CACHE_REVISION, but hidden via abstraction. -+ * The structures that get saved to flash are contained within -+ * this translation unit, so changes outside this file shouldn't -+ * require invalidating the cache. -+ */ -+ return 1; -+} -+ -+struct register_save { -+ uint16_t lower; -+ uint16_t upper; -+}; -+ -+/** TODO: Haswell DDRIO aliases writes: 0x80 .. 0xff => 0x00 .. 0x7f **/ -+static const struct register_save ddrio_per_byte_list[] = { -+ {0x0000, 0x003c}, /* 16 registers */ -+// {0x0048, 0x0084}, /* 16 registers */ /** TODO: BDW support **/ -+ {0x0048, 0x004c}, /* 2 registers */ -+ {0x005c, 0x0078}, /* 8 registers */ -+}; -+#define DDRIO_PER_BYTE_REGISTER_COUNT (16 + 2 + 8) -+ -+static const struct register_save ddrio_per_ch_list[] = { -+ /* CKE */ -+ {0x1204, 0x1208}, /* 2 registers */ -+ {0x1214, 0x121c}, /* 3 registers */ -+ /* CMD North */ -+ {0x1404, 0x140c}, /* 3 registers */ -+ /* CLK */ -+ {0x1808, 0x1810}, /* 3 registers */ -+ /* CMD South */ -+ {0x1a04, 0x1a0c}, /* 3 registers */ -+ /* CTL */ -+ {0x1c14, 0x1c1c}, /* 3 registers */ -+}; -+#define DDRIO_PER_CH_REGISTER_COUNT (2 + 3 * 5) -+ -+static const struct register_save ddrio_common_list[] = { -+ {0x2000, 0x2008}, /* 3 registers */ -+ {0x3a14, 0x3a1c}, /* 3 registers */ -+ {0x3a24, 0x3a24}, /* 1 registers */ -+}; -+ -+#define DDRIO_COMMON_REGISTER_COUNT (3 + 3 + 1) -+ -+static const struct register_save mcmain_per_ch_list[] = { -+ {0x4000, 0x4014}, /* 6 registers */ -+ {0x4024, 0x4028}, /* 2 registers */ -+ {0x40d0, 0x40d0}, /* 1 registers */ -+ {0x4220, 0x4224}, /* 2 registers */ -+ {0x4294, 0x4294}, /* 1 registers */ -+ {0x429c, 0x42a0}, /* 2 registers */ -+ {0x42ec, 0x42fc}, /* 5 registers */ -+ {0x4328, 0x4328}, /* 1 registers */ -+ {0x438c, 0x4390}, /* 2 registers */ -+}; -+#define MCMAIN_PER_CH_REGISTER_COUNT (6 + 2 + 1 + 2 + 1 + 2 + 5 + 1 + 2) -+ -+static const struct register_save misc_common_list[] = { -+ {0x5884, 0x5888}, /* 2 registers */ -+ {0x5890, 0x589c}, /* 4 registers */ -+ {0x58a4, 0x58a4}, /* 1 registers */ -+ {0x58d0, 0x58e4}, /* 6 registers */ -+ {0x5880, 0x5880}, /* 1 registers */ -+ {0x5000, 0x50dc}, /* 56 registers */ -+ {0x59b8, 0x59b8} /* 1 registers */ -+}; -+#define MISC_COMMON_REGISTER_COUNT (2 + 4 + 1 + 6 + 1 + 56 + 1) -+ -+struct save_params { -+ bool is_initialised; -+ -+ /* Memory base frequency, either 100 or 133 MHz */ -+ uint8_t base_freq; -+ -+ /* Multiplier */ -+ uint32_t multiplier; -+ -+ /* Memory clock in MHz */ -+ uint32_t mem_clock_mhz; -+ -+ /* Memory clock in femtoseconds */ -+ uint32_t mem_clock_fs; -+ -+ /* Quadrature clock in picoseconds */ -+ uint16_t qclkps; -+ -+ /* Bitfield of supported CAS latencies */ -+ uint16_t cas_supported; -+ -+ /* CPUID value */ -+ uint32_t cpu; -+ -+ /* Cached CPU stepping value */ -+ uint8_t stepping; -+ -+ uint16_t vdd_mv; -+ -+ union dimm_flags_ddr3_st flags; -+ -+ /* Except for tCK, everything is stored in DCLKs */ -+ uint32_t tCK; -+ uint32_t tAA; -+ uint32_t tWR; -+ uint32_t tRCD; -+ uint32_t tRRD; -+ uint32_t tRP; -+ uint32_t tRAS; -+ uint32_t tRC; -+ uint32_t tRFC; -+ uint32_t tWTR; -+ uint32_t tRTP; -+ uint32_t tFAW; -+ uint32_t tCWL; -+ uint32_t tCMD; -+ -+ uint32_t tREFI; -+ uint32_t tXP; -+ -+ uint8_t lpddr_cke_rank_map[NUM_CHANNELS]; -+ -+ struct raminit_dimm_info dimms[NUM_CHANNELS][NUM_SLOTS]; -+ -+ uint8_t chanmap; -+ -+ uint32_t channel_size_mb[NUM_CHANNELS]; -+ -+ /* DIMMs per channel */ -+ uint8_t dpc[NUM_CHANNELS]; -+ -+ uint8_t rankmap[NUM_CHANNELS]; -+ -+ /* Whether a rank is mirrored or not (only rank 1 of each DIMM can be) */ -+ uint8_t rank_mirrored[NUM_CHANNELS]; -+ -+ /* -+ * FIXME: LPDDR support is incomplete. The largest chunks are missing, -+ * but some LPDDR-specific variations in algorithms have been handled. -+ * LPDDR-specific functions have stubs which will halt upon execution. -+ */ -+ bool lpddr; -+ -+ uint8_t lanes; -+ -+ /* FIXME: ECC support missing */ -+ bool is_ecc; -+}; -+ -+struct register_save_frame { -+ uint32_t ddrio_per_byte[NUM_CHANNELS][NUM_LANES][DDRIO_PER_BYTE_REGISTER_COUNT]; -+ uint32_t ddrio_per_ch[NUM_CHANNELS][DDRIO_PER_CH_REGISTER_COUNT]; -+ uint32_t ddrio_common[DDRIO_COMMON_REGISTER_COUNT]; -+ uint32_t mcmain_per_ch[NUM_CHANNELS][MCMAIN_PER_CH_REGISTER_COUNT]; -+ uint32_t misc_common[MISC_COMMON_REGISTER_COUNT]; -+ struct save_params params; -+}; -+ -+struct register_save_frame *reg_frame_ptr(void) -+{ -+ /* The chonky register save frame struct, used for fast boot and S3 resume */ -+ static struct register_save_frame register_frame = { 0 }; -+ return ®ister_frame; -+} -+ -+size_t reg_frame_size(void) -+{ -+ return sizeof(struct register_save_frame); -+} -+ -+typedef void (*reg_func_t)(const uint16_t offset, uint32_t *const value); -+ -+static void save_value(const uint16_t offset, uint32_t *const value) -+{ -+ *value = mchbar_read32(offset); -+} -+ -+static void restore_value(const uint16_t offset, uint32_t *const value) -+{ -+ mchbar_write32(offset, *value); -+} -+ -+static void save_restore( -+ uint32_t *reg_frame, -+ const uint16_t g_offset, -+ const struct register_save *reg_save_list, -+ const size_t reg_save_length, -+ reg_func_t handle_reg) -+{ -+ for (size_t i = 0; i < reg_save_length; i++) { -+ const struct register_save *entry = ®_save_list[i]; -+ for (uint16_t offset = entry->lower; offset <= entry->upper; offset += 4) { -+ handle_reg(offset + g_offset, reg_frame++); -+ } -+ } -+} -+ -+static void save_restore_all(struct register_save_frame *reg_frame, reg_func_t handle_reg) -+{ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ for (uint8_t byte = 0; byte < NUM_LANES; byte++) { -+ const uint16_t g_offset = _DDRIO_C_R_B(0, channel, 0, byte); -+ save_restore( -+ reg_frame->ddrio_per_byte[channel][byte], -+ g_offset, -+ ddrio_per_byte_list, -+ ARRAY_SIZE(ddrio_per_byte_list), -+ handle_reg); -+ } -+ } -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ const uint16_t g_offset = _DDRIO_C_R_B(0, channel, 0, 0); -+ save_restore( -+ reg_frame->ddrio_per_ch[channel], -+ g_offset, -+ ddrio_per_ch_list, -+ ARRAY_SIZE(ddrio_per_ch_list), -+ handle_reg); -+ } -+ save_restore( -+ reg_frame->ddrio_common, -+ 0, -+ ddrio_common_list, -+ ARRAY_SIZE(ddrio_common_list), -+ handle_reg); -+ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ const uint16_t g_offset = _MCMAIN_C(0, channel); -+ save_restore( -+ reg_frame->mcmain_per_ch[channel], -+ g_offset, -+ mcmain_per_ch_list, -+ ARRAY_SIZE(mcmain_per_ch_list), -+ handle_reg); -+ } -+ save_restore( -+ reg_frame->misc_common, -+ 0, -+ misc_common_list, -+ ARRAY_SIZE(misc_common_list), -+ handle_reg); -+} -+ -+enum raminit_status save_training_values(struct sysinfo *ctrl) -+{ -+ save_restore_all(reg_frame_ptr(), save_value); -+ return RAMINIT_STATUS_SUCCESS; -+} -+ -+enum raminit_status restore_training_values(struct sysinfo *ctrl) -+{ -+ save_restore_all(reg_frame_ptr(), restore_value); -+ return RAMINIT_STATUS_SUCCESS; -+} -+ -+enum raminit_status save_non_training(struct sysinfo *ctrl) -+{ -+ struct register_save_frame *reg_frame = reg_frame_ptr(); -+ struct save_params *params = ®_frame->params; -+ -+ params->is_initialised = true; -+ -+ params->base_freq = ctrl->base_freq; -+ params->multiplier = ctrl->multiplier; -+ params->mem_clock_mhz = ctrl->mem_clock_mhz; -+ params->mem_clock_fs = ctrl->mem_clock_fs; -+ params->qclkps = ctrl->qclkps; -+ params->cas_supported = ctrl->cas_supported; -+ params->cpu = ctrl->cpu; -+ params->stepping = ctrl->stepping; -+ params->vdd_mv = ctrl->vdd_mv; -+ params->flags = ctrl->flags; -+ -+ params->tCK = ctrl->tCK; -+ params->tAA = ctrl->tAA; -+ params->tWR = ctrl->tWR; -+ params->tRCD = ctrl->tRCD; -+ params->tRRD = ctrl->tRRD; -+ params->tRP = ctrl->tRP; -+ params->tRAS = ctrl->tRAS; -+ params->tRC = ctrl->tRC; -+ params->tRFC = ctrl->tRFC; -+ params->tWTR = ctrl->tWTR; -+ params->tRTP = ctrl->tRTP; -+ params->tFAW = ctrl->tFAW; -+ params->tCWL = ctrl->tCWL; -+ params->tCMD = ctrl->tCMD; -+ params->tREFI = ctrl->tREFI; -+ params->tXP = ctrl->tXP; -+ -+ params->chanmap = ctrl->chanmap; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ params->lpddr_cke_rank_map[channel] = ctrl->lpddr_cke_rank_map[channel]; -+ for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) -+ params->dimms[channel][slot] = ctrl->dimms[channel][slot]; -+ } -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ params->dpc[channel] = ctrl->dpc[channel]; -+ params->rankmap[channel] = ctrl->rankmap[channel]; -+ params->rank_mirrored[channel] = ctrl->rank_mirrored[channel]; -+ params->channel_size_mb[channel] = ctrl->channel_size_mb[channel]; -+ } -+ params->lpddr = ctrl->lpddr; -+ params->lanes = ctrl->lanes; -+ params->is_ecc = ctrl->is_ecc; -+ return RAMINIT_STATUS_SUCCESS; -+} -+ -+#define RAMINIT_COMPARE(_s1, _s2) \ -+ ((sizeof(_s1) == sizeof(_s2)) && !memcmp(_s1, _s2, sizeof(_s1))) -+ -+enum raminit_status restore_non_training(struct sysinfo *ctrl) -+{ -+ struct register_save_frame *reg_frame = reg_frame_ptr(); -+ struct save_params *params = ®_frame->params; -+ -+ if (!params->is_initialised) { -+ printk(BIOS_WARNING, "Cannot fast boot: saved data is invalid\n"); -+ return RAMINIT_STATUS_INVALID_CACHE; -+ } -+ -+ if (!RAMINIT_COMPARE(ctrl->dimms, params->dimms)) { -+ printk(BIOS_WARNING, "Cannot fast boot: DIMMs have changed\n"); -+ return RAMINIT_STATUS_INVALID_CACHE; -+ } -+ -+ if (ctrl->cpu != params->cpu) { -+ printk(BIOS_WARNING, "Cannot fast boot: CPU has changed\n"); -+ return RAMINIT_STATUS_INVALID_CACHE; -+ } -+ -+ ctrl->base_freq = params->base_freq; -+ ctrl->multiplier = params->multiplier; -+ ctrl->mem_clock_mhz = params->mem_clock_mhz; -+ ctrl->mem_clock_fs = params->mem_clock_fs; -+ ctrl->qclkps = params->qclkps; -+ ctrl->cas_supported = params->cas_supported; -+ ctrl->cpu = params->cpu; -+ ctrl->stepping = params->stepping; -+ ctrl->vdd_mv = params->vdd_mv; -+ ctrl->flags = params->flags; -+ -+ ctrl->tCK = params->tCK; -+ ctrl->tAA = params->tAA; -+ ctrl->tWR = params->tWR; -+ ctrl->tRCD = params->tRCD; -+ ctrl->tRRD = params->tRRD; -+ ctrl->tRP = params->tRP; -+ ctrl->tRAS = params->tRAS; -+ ctrl->tRC = params->tRC; -+ ctrl->tRFC = params->tRFC; -+ ctrl->tWTR = params->tWTR; -+ ctrl->tRTP = params->tRTP; -+ ctrl->tFAW = params->tFAW; -+ ctrl->tCWL = params->tCWL; -+ ctrl->tCMD = params->tCMD; -+ ctrl->tREFI = params->tREFI; -+ ctrl->tXP = params->tXP; -+ -+ ctrl->chanmap = params->chanmap; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ ctrl->lpddr_cke_rank_map[channel] = params->lpddr_cke_rank_map[channel]; -+ for (uint8_t slot = 0; slot < NUM_SLOTS; slot++) -+ ctrl->dimms[channel][slot] = params->dimms[channel][slot]; -+ } -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ ctrl->dpc[channel] = params->dpc[channel]; -+ ctrl->rankmap[channel] = params->rankmap[channel]; -+ ctrl->rank_mirrored[channel] = params->rank_mirrored[channel]; -+ ctrl->channel_size_mb[channel] = params->channel_size_mb[channel]; -+ } -+ ctrl->lpddr = params->lpddr; -+ ctrl->lanes = params->lanes; -+ ctrl->is_ecc = params->is_ecc; -+ return RAMINIT_STATUS_SUCCESS; -+} --- -2.39.5 - diff --git a/config/coreboot/default/patches/0046-haswell-NRI-Do-sense-amplifier-offset-training.patch b/config/coreboot/default/patches/0046-haswell-NRI-Do-sense-amplifier-offset-training.patch deleted file mode 100644 index c0945df9..00000000 --- a/config/coreboot/default/patches/0046-haswell-NRI-Do-sense-amplifier-offset-training.patch +++ /dev/null @@ -1,476 +0,0 @@ -From 02aa0c5612388e35f5dd1ff9c5f7a7b5b48fb9c0 Mon Sep 17 00:00:00 2001 -From: Angel Pons <th3fanbus@gmail.com> -Date: Wed, 17 Apr 2024 13:20:32 +0200 -Subject: [PATCH 46/51] haswell NRI: Do sense amplifier offset training - -Quoting Wikipedia: - - A sense amplifier is a circuit that is used to amplify and detect - small signals in electronic systems. It is commonly used in memory - circuits, such as dynamic random access memory (DRAM), to read and - amplify the weak signals stored in memory cells. - -In this case, we're calibrating the sense amplifiers in the memory -controller. This training procedure uses a magic "sense amp offset -cancel" mode of the DDRIO to observe the sampled logic levels, and -sweeps Vref to find the low-high transition for each bit lane. The -procedure consists of two stages: the first stage centers per-byte -Vref (to ensure per-bit Vref offsets are as small as possible) and -the second stage centers per-bit Vref. - -Because this procedure uses the "sense amp offset cancel" mode, it -does not rely on DRAM being trained. It is assumed that the memory -controller simply makes sense amp output levels observable via the -`DDR_DATA_TRAIN_FEEDBACK` register and that the memory bus is idle -during this training step (so the lane voltage is Vdd / 2). - -Note: This procedure will need to be adapted for Broadwell because -it has per-rank per-bit RxVref registers, whereas Haswell only has -a single per-bit RxVref register for all ranks. - -Change-Id: Ia07db68763f90e9701c8a376e01279ada8dbbe07 -Signed-off-by: Angel Pons <th3fanbus@gmail.com> ---- - .../intel/haswell/native_raminit/Makefile.mk | 1 + - .../haswell/native_raminit/raminit_main.c | 1 + - .../haswell/native_raminit/raminit_native.h | 12 + - .../native_raminit/train_sense_amp_offset.c | 341 ++++++++++++++++++ - .../intel/haswell/registers/mchbar.h | 2 + - 5 files changed, 357 insertions(+) - create mode 100644 src/northbridge/intel/haswell/native_raminit/train_sense_amp_offset.c - -diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.mk b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -index 8fdd17c542..4bd668a2d6 100644 ---- a/src/northbridge/intel/haswell/native_raminit/Makefile.mk -+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.mk -@@ -21,3 +21,4 @@ romstage-y += timings_refresh.c - romstage-y += train_jedec_write_leveling.c - romstage-y += train_read_mpr.c - romstage-y += train_receive_enable.c -+romstage-y += train_sense_amp_offset.c -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_main.c b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -index 056dde1adc..ce637e2d03 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_main.c -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_main.c -@@ -60,6 +60,7 @@ static const struct task_entry cold_boot[] = { - { configure_memory_map, true, "MEMMAP", }, - { do_jedec_init, true, "JEDECINIT", }, - { pre_training, true, "PRETRAIN", }, -+ { train_sense_amp_offset, true, "SOT", }, - { train_receive_enable, true, "RCVET", }, - { train_read_mpr, true, "RDMPRT", }, - { train_jedec_write_leveling, true, "JWRL", }, -diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.h b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -index 2ac16eaad3..07eea98831 100644 ---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.h -+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.h -@@ -23,6 +23,8 @@ - #define NUM_LANES 9 - #define NUM_LANES_NO_ECC 8 - -+#define NUM_BITS 8 -+ - #define COMP_INT 10 - - /* Always use 12 legs for emphasis (not trained) */ -@@ -219,6 +221,7 @@ enum raminit_status { - RAMINIT_STATUS_MPLL_INIT_FAILURE, - RAMINIT_STATUS_POLL_TIMEOUT, - RAMINIT_STATUS_REUT_ERROR, -+ RAMINIT_STATUS_SAMP_OFFSET_FAILURE, - RAMINIT_STATUS_RCVEN_FAILURE, - RAMINIT_STATUS_RMPR_FAILURE, - RAMINIT_STATUS_JWRL_FAILURE, -@@ -244,6 +247,12 @@ struct raminit_dimm_info { - bool valid; - }; - -+struct vref_margin { -+ uint8_t low; -+ uint8_t center; -+ uint8_t high; -+}; -+ - struct sysinfo { - enum raminit_boot_mode bootmode; - enum generic_stepping stepping; -@@ -331,6 +340,8 @@ struct sysinfo { - uint8_t rxdqsn[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES]; - int8_t rxvref[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES]; - -+ struct vref_margin rxdqvrefpb[NUM_CHANNELS][NUM_SLOTRANKS][NUM_LANES][NUM_BITS]; -+ - uint8_t clk_pi_code[NUM_CHANNELS][NUM_SLOTRANKS]; - uint8_t ctl_pi_code[NUM_CHANNELS][NUM_SLOTRANKS]; - uint8_t cke_pi_code[NUM_CHANNELS][NUM_SLOTRANKS]; -@@ -453,6 +464,7 @@ enum raminit_status convert_timings(struct sysinfo *ctrl); - enum raminit_status configure_mc(struct sysinfo *ctrl); - enum raminit_status configure_memory_map(struct sysinfo *ctrl); - enum raminit_status do_jedec_init(struct sysinfo *ctrl); -+enum raminit_status train_sense_amp_offset(struct sysinfo *ctrl); - enum raminit_status train_receive_enable(struct sysinfo *ctrl); - enum raminit_status train_read_mpr(struct sysinfo *ctrl); - enum raminit_status train_jedec_write_leveling(struct sysinfo *ctrl); -diff --git a/src/northbridge/intel/haswell/native_raminit/train_sense_amp_offset.c b/src/northbridge/intel/haswell/native_raminit/train_sense_amp_offset.c -new file mode 100644 -index 0000000000..d4f199fefb ---- /dev/null -+++ b/src/northbridge/intel/haswell/native_raminit/train_sense_amp_offset.c -@@ -0,0 +1,341 @@ -+/* SPDX-License-Identifier: GPL-2.0-or-later */ -+ -+#include <assert.h> -+#include <commonlib/bsd/clamp.h> -+#include <console/console.h> -+#include <delay.h> -+#include <lib.h> -+#include <types.h> -+ -+#include "raminit_native.h" -+ -+#define VREF_OFFSET_PLOT RAM_DEBUG -+#define SAMP_OFFSET_PLOT RAM_DEBUG -+ -+struct vref_train_data { -+ int8_t best_sum; -+ int8_t best_vref; -+ int8_t sum_bits; -+ uint8_t high_mask; -+ uint8_t low_mask; -+}; -+ -+static enum raminit_status train_vref_offset(struct sysinfo *ctrl) -+{ -+ const int8_t vref_start = -15; -+ const int8_t vref_stop = 15; -+ const struct vref_train_data initial_vref_values = { -+ .best_sum = -NUM_LANES, -+ .best_vref = 0, -+ .high_mask = 0, -+ .low_mask = 0xff, -+ }; -+ struct vref_train_data vref_data[NUM_CHANNELS][NUM_LANES]; -+ -+ printk(VREF_OFFSET_PLOT, "Plot of sum_bits across Vref settings\nChannel"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ printk(VREF_OFFSET_PLOT, "\t%u\t\t", channel); -+ } -+ -+ printk(VREF_OFFSET_PLOT, "\nByte"); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ printk(VREF_OFFSET_PLOT, "\t"); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ printk(VREF_OFFSET_PLOT, "%u ", byte); -+ vref_data[channel][byte] = initial_vref_values; -+ union ddr_data_control_2_reg data_control_2 = { -+ .raw = ctrl->dq_control_2[channel][byte], -+ }; -+ data_control_2.force_bias_on = 1; -+ data_control_2.force_rx_on = 1; -+ mchbar_write32(DQ_CONTROL_2(channel, byte), data_control_2.raw); -+ } -+ } -+ -+ /* Sweep through Vref settings and find point SampOffset of +/- 7 passes */ -+ printk(VREF_OFFSET_PLOT, "\n1/2 Vref"); -+ for (int8_t vref = vref_start; vref <= vref_stop; vref++) { -+ printk(VREF_OFFSET_PLOT, "\n% 3d", vref); -+ -+ /* -+ * To perform this test, enable offset cancel mode and enable ODT. -+ * Check results and update variables. Ideal result is all zeroes. -+ * Clear offset cancel mode at end of test to write RX_OFFSET_VDQ. -+ */ -+ change_1d_margin_multicast(ctrl, RdV, vref, 0, false, REG_FILE_USE_RANK); -+ -+ /* Program settings for Vref and SampOffset = 7 (8 + 7) */ -+ mchbar_write32(DDR_DATA_RX_OFFSET_VDQ, 0xffffffff); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ /* Propagate delay values (without a read command) */ -+ union ddr_data_control_0_reg data_control_0 = { -+ .raw = ctrl->dq_control_0[channel], -+ }; -+ data_control_0.read_rf_rd = 1; -+ data_control_0.read_rf_wr = 0; -+ data_control_0.read_rf_rank = 0; -+ data_control_0.force_odt_on = 1; -+ data_control_0.samp_train_mode = 1; -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw); -+ udelay(1); -+ data_control_0.samp_train_mode = 0; -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ const uint8_t feedback = get_data_train_feedback(channel, byte); -+ struct vref_train_data *curr_data = &vref_data[channel][byte]; -+ curr_data->low_mask &= feedback; -+ curr_data->sum_bits = -popcnt(feedback); -+ } -+ } -+ -+ /* Program settings for Vref and SampOffset = -7 (8 - 7) */ -+ mchbar_write32(DDR_DATA_RX_OFFSET_VDQ, 0x11111111); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ /* Propagate delay values (without a read command) */ -+ union ddr_data_control_0_reg data_control_0 = { -+ .raw = ctrl->dq_control_0[channel], -+ }; -+ data_control_0.read_rf_rd = 1; -+ data_control_0.read_rf_wr = 0; -+ data_control_0.read_rf_rank = 0; -+ data_control_0.force_odt_on = 1; -+ data_control_0.samp_train_mode = 1; -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw); -+ udelay(1); -+ data_control_0.samp_train_mode = 0; -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw); -+ printk(VREF_OFFSET_PLOT, "\t"); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ const uint8_t feedback = get_data_train_feedback(channel, byte); -+ struct vref_train_data *curr_data = &vref_data[channel][byte]; -+ curr_data->high_mask |= feedback; -+ curr_data->sum_bits += popcnt(feedback); -+ printk(VREF_OFFSET_PLOT, "%d ", curr_data->sum_bits); -+ if (curr_data->sum_bits > curr_data->best_sum) { -+ curr_data->best_sum = curr_data->sum_bits; -+ curr_data->best_vref = vref; -+ ctrl->rxvref[channel][0][byte] = vref; -+ } else if (curr_data->sum_bits == curr_data->best_sum) { -+ curr_data->best_vref = vref; -+ } -+ } -+ } -+ } -+ printk(BIOS_DEBUG, "\n\nHi-Lo (XOR):"); -+ enum raminit_status status = RAMINIT_STATUS_SUCCESS; -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ printk(BIOS_DEBUG, "\n C%u:", channel); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ struct vref_train_data *const curr_data = &vref_data[channel][byte]; -+ const uint8_t bit_xor = curr_data->high_mask ^ curr_data->low_mask; -+ printk(BIOS_DEBUG, "\t0x%02x", bit_xor); -+ if (bit_xor == 0xff) -+ continue; -+ -+ /* Report an error if any bit did not change */ -+ status = RAMINIT_STATUS_SAMP_OFFSET_FAILURE; -+ } -+ } -+ if (status) -+ printk(BIOS_ERR, "\nUnexpected bit error in Vref offset training\n"); -+ -+ printk(BIOS_DEBUG, "\n\nRdVref:"); -+ change_1d_margin_multicast(ctrl, RdV, 0, 0, false, REG_FILE_USE_RANK); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ printk(BIOS_DEBUG, "\n C%u:", channel); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ struct vref_train_data *const curr_data = &vref_data[channel][byte]; -+ const int8_t vref_width = -+ curr_data->best_vref - ctrl->rxvref[channel][0][byte]; -+ -+ /* -+ * Step size for Rx Vref in DATA_OFFSET_TRAIN is about 3.9 mV -+ * whereas Rx Vref step size in RX_TRAIN_RANK is about 7.8 mV -+ */ -+ int8_t vref = ctrl->rxvref[channel][0][byte] + vref_width / 2; -+ if (vref < 0) -+ vref--; -+ else -+ vref++; -+ -+ for (uint8_t rank = 0; rank < NUM_SLOTRANKS; rank++) { -+ if (!rank_in_ch(ctrl, rank, channel)) -+ continue; -+ -+ ctrl->rxvref[channel][rank][byte] = vref / 2; -+ update_rxt(ctrl, channel, rank, byte, RXT_RESTORE, 0); -+ } -+ printk(BIOS_DEBUG, "\t% 4d", ctrl->rxvref[channel][0][byte]); -+ } -+ } -+ printk(BIOS_DEBUG, "\n\n"); -+ return status; -+} -+ -+/** -+ * LPDDR has an additional bit for DQS per each byte. -+ * -+ * TODO: The DQS value must be written into Data Control 2. -+ */ -+#define NUM_OFFSET_TRAIN_BITS (NUM_BITS + 1) -+ -+#define PLOT_CH_SPACE " " -+ -+struct samp_train_data { -+ uint8_t first_zero; -+ uint8_t last_one; -+}; -+ -+static void train_samp_offset(struct sysinfo *ctrl) -+{ -+ const uint8_t max_train_bits = ctrl->lpddr ? NUM_OFFSET_TRAIN_BITS : NUM_BITS; -+ -+ struct samp_train_data samp_data[NUM_CHANNELS][NUM_LANES][NUM_OFFSET_TRAIN_BITS] = {0}; -+ -+ printk(BIOS_DEBUG, "Channel "); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ printk(BIOS_DEBUG, "%u ", channel); /* Same length as PLOT_CH_SPACE */ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) -+ printk(BIOS_DEBUG, " %s ", ctrl->lpddr ? " " : ""); -+ } -+ printk(BIOS_DEBUG, "\nByte "); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) -+ printk(BIOS_DEBUG, "%u %s ", byte, ctrl->lpddr ? " " : ""); -+ -+ printk(BIOS_DEBUG, PLOT_CH_SPACE); -+ } -+ printk(SAMP_OFFSET_PLOT, "\nBits "); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) -+ printk(SAMP_OFFSET_PLOT, "01234567%s ", ctrl->lpddr ? "S" : ""); -+ -+ printk(SAMP_OFFSET_PLOT, PLOT_CH_SPACE); -+ } -+ printk(SAMP_OFFSET_PLOT, "\n SAmp\n"); -+ for (uint8_t samp_offset = 1; samp_offset <= 15; samp_offset++) { -+ printk(SAMP_OFFSET_PLOT, "% 5d\t", samp_offset); -+ -+ uint32_t rx_offset_vdq = 0; -+ for (uint8_t bit = 0; bit < NUM_BITS; bit++) { -+ rx_offset_vdq += samp_offset << (4 * bit); -+ } -+ mchbar_write32(DDR_DATA_RX_OFFSET_VDQ, rx_offset_vdq); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ /* Propagate delay values (without a read command) */ -+ union ddr_data_control_0_reg data_control_0 = { -+ .raw = ctrl->dq_control_0[channel], -+ }; -+ data_control_0.read_rf_rd = 1; -+ data_control_0.read_rf_wr = 0; -+ data_control_0.read_rf_rank = 0; -+ data_control_0.force_odt_on = 1; -+ data_control_0.samp_train_mode = 1; -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw); -+ udelay(1); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ const uint32_t feedback = -+ get_data_train_feedback(channel, byte); -+ -+ for (uint8_t bit = 0; bit < max_train_bits; bit++) { -+ struct samp_train_data *const curr_data = -+ &samp_data[channel][byte][bit]; -+ const bool result = feedback & BIT(bit); -+ if (result) { -+ curr_data->last_one = samp_offset; -+ } else if (curr_data->first_zero == 0) { -+ curr_data->first_zero = samp_offset; -+ } -+ printk(SAMP_OFFSET_PLOT, result ? "." : "#"); -+ } -+ printk(SAMP_OFFSET_PLOT, " "); -+ } -+ printk(SAMP_OFFSET_PLOT, PLOT_CH_SPACE); -+ data_control_0.samp_train_mode = 0; -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), data_control_0.raw); -+ } -+ printk(SAMP_OFFSET_PLOT, "\n"); -+ } -+ printk(BIOS_DEBUG, "\nBitSAmp "); -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) { -+ uint32_t rx_offset_vdq = 0; -+ for (uint8_t bit = 0; bit < max_train_bits; bit++) { -+ struct samp_train_data *const curr_data = -+ &samp_data[channel][byte][bit]; -+ -+ uint8_t vref = curr_data->first_zero + curr_data->last_one; -+ vref = clamp_u8(0, vref / 2, 15); -+ /* -+ * Check for saturation conditions to make sure -+ * we are as close as possible to Vdd/2 (750 mV). -+ */ -+ if (curr_data->first_zero == 0) -+ vref = 15; -+ if (curr_data->last_one == 0) -+ vref = 0; -+ -+ ctrl->rxdqvrefpb[channel][0][byte][bit].center = vref; -+ rx_offset_vdq += vref & 0xf << (4 * bit); -+ printk(BIOS_DEBUG, "%x", vref); -+ } -+ mchbar_write32(RX_OFFSET_VDQ(channel, byte), rx_offset_vdq); -+ printk(BIOS_DEBUG, " "); -+ download_regfile(ctrl, channel, 1, 0, REG_FILE_USE_RANK, 0, 1, 0); -+ } -+ printk(BIOS_DEBUG, PLOT_CH_SPACE); -+ } -+ printk(BIOS_DEBUG, "\n"); -+} -+ -+enum raminit_status train_sense_amp_offset(struct sysinfo *ctrl) -+{ -+ printk(BIOS_DEBUG, "Stage 1: Vref offset training\n"); -+ const enum raminit_status status = train_vref_offset(ctrl); -+ -+ printk(BIOS_DEBUG, "Stage 2: Samp offset training\n"); -+ train_samp_offset(ctrl); -+ -+ /* Clean up after test */ -+ for (uint8_t channel = 0; channel < NUM_CHANNELS; channel++) { -+ if (!does_ch_exist(ctrl, channel)) -+ continue; -+ -+ mchbar_write32(DDR_DATA_ch_CONTROL_0(channel), ctrl->dq_control_0[channel]); -+ for (uint8_t byte = 0; byte < ctrl->lanes; byte++) -+ mchbar_write32(DQ_CONTROL_2(channel, byte), -+ ctrl->dq_control_2[channel][byte]); -+ } -+ io_reset(); -+ return status; -+} -diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h -index 49a215aa71..1a168a3fc8 100644 ---- a/src/northbridge/intel/haswell/registers/mchbar.h -+++ b/src/northbridge/intel/haswell/registers/mchbar.h -@@ -18,6 +18,8 @@ - #define RX_TRAIN_ch_r_b(ch, rank, byte) _DDRIO_C_R_B(0x0000, ch, rank, byte) - #define TX_TRAIN_ch_r_b(ch, rank, byte) _DDRIO_C_R_B(0x0020, ch, rank, byte) - -+#define RX_OFFSET_VDQ(ch, byte) _DDRIO_C_R_B(0x004c, ch, 0, byte) -+ - #define DDR_DATA_TRAIN_FEEDBACK(ch, byte) _DDRIO_C_R_B(0x0054, ch, 0, byte) - - #define DQ_CONTROL_1(ch, byte) _DDRIO_C_R_B(0x0060, ch, 0, byte) --- -2.39.5 - diff --git a/config/coreboot/default/patches/0048-mb-dell-Convert-E6400-into-a-variant.patch b/config/coreboot/default/patches/0048-mb-dell-Convert-E6400-into-a-variant.patch deleted file mode 100644 index 156d5c8d..00000000 --- a/config/coreboot/default/patches/0048-mb-dell-Convert-E6400-into-a-variant.patch +++ /dev/null @@ -1,243 +0,0 @@ -From 92556743e92cc02524296b653de5241160876218 Mon Sep 17 00:00:00 2001 -From: Nicholas Chin <nic.c3.14@gmail.com> -Date: Thu, 26 Sep 2024 19:48:26 -0600 -Subject: [PATCH 48/51] mb/dell: Convert E6400 into a variant - -All the GM45 Dell Latitudes should be nearly identical, so convert the -E6400 port into a variant so that future ports for the other systems can -share code with each other. - -Change-Id: I8094fce56eaaadb20aef173644cd3b2c0b008e95 -Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> ---- - src/mainboard/dell/e6400/Makefile.mk | 10 -------- - .../dell/{e6400 => gm45_latitude}/Kconfig | 22 +++++++++++++----- - .../{e6400 => gm45_latitude}/Kconfig.name | 0 - src/mainboard/dell/gm45_latitude/Makefile.mk | 11 +++++++++ - .../dell/{e6400 => gm45_latitude}/acpi/ec.asl | 0 - .../acpi/ich9_pci_irqs.asl | 0 - .../{e6400 => gm45_latitude}/acpi/superio.asl | 0 - .../dell/{e6400 => gm45_latitude}/blc.c | 0 - .../{e6400 => gm45_latitude}/board_info.txt | 0 - .../dell/{e6400 => gm45_latitude}/bootblock.c | 0 - .../{e6400 => gm45_latitude}/cmos.default | 0 - .../dell/{e6400 => gm45_latitude}/cmos.layout | 0 - .../dell/{e6400 => gm45_latitude}/cstates.c | 0 - .../{e6400 => gm45_latitude}/devicetree.cb | 1 - - .../dell/{e6400 => gm45_latitude}/dsdt.asl | 0 - .../dell/{e6400 => gm45_latitude}/mainboard.c | 0 - .../dell/{e6400 => gm45_latitude}/romstage.c | 0 - .../variants}/e6400/data.vbt | Bin - .../variants}/e6400/gma-mainboard.ads | 0 - .../{ => gm45_latitude/variants}/e6400/gpio.c | 0 - .../variants}/e6400/hda_verb.c | 0 - .../variants/e6400/overridetree.cb | 7 ++++++ - 22 files changed, 34 insertions(+), 17 deletions(-) - delete mode 100644 src/mainboard/dell/e6400/Makefile.mk - rename src/mainboard/dell/{e6400 => gm45_latitude}/Kconfig (64%) - rename src/mainboard/dell/{e6400 => gm45_latitude}/Kconfig.name (100%) - create mode 100644 src/mainboard/dell/gm45_latitude/Makefile.mk - rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/ec.asl (100%) - rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/ich9_pci_irqs.asl (100%) - rename src/mainboard/dell/{e6400 => gm45_latitude}/acpi/superio.asl (100%) - rename src/mainboard/dell/{e6400 => gm45_latitude}/blc.c (100%) - rename src/mainboard/dell/{e6400 => gm45_latitude}/board_info.txt (100%) - rename src/mainboard/dell/{e6400 => gm45_latitude}/bootblock.c (100%) - rename src/mainboard/dell/{e6400 => gm45_latitude}/cmos.default (100%) - rename src/mainboard/dell/{e6400 => gm45_latitude}/cmos.layout (100%) - rename src/mainboard/dell/{e6400 => gm45_latitude}/cstates.c (100%) - rename src/mainboard/dell/{e6400 => gm45_latitude}/devicetree.cb (98%) - rename src/mainboard/dell/{e6400 => gm45_latitude}/dsdt.asl (100%) - rename src/mainboard/dell/{e6400 => gm45_latitude}/mainboard.c (100%) - rename src/mainboard/dell/{e6400 => gm45_latitude}/romstage.c (100%) - rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/data.vbt (100%) - rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/gma-mainboard.ads (100%) - rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/gpio.c (100%) - rename src/mainboard/dell/{ => gm45_latitude/variants}/e6400/hda_verb.c (100%) - create mode 100644 src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb - -diff --git a/src/mainboard/dell/e6400/Makefile.mk b/src/mainboard/dell/e6400/Makefile.mk -deleted file mode 100644 -index ca3a82db48..0000000000 ---- a/src/mainboard/dell/e6400/Makefile.mk -+++ /dev/null -@@ -1,10 +0,0 @@ --## SPDX-License-Identifier: GPL-2.0-only -- --bootblock-y += bootblock.c -- --romstage-y += gpio.c -- --ramstage-y += cstates.c --ramstage-y += blc.c -- --ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads -diff --git a/src/mainboard/dell/e6400/Kconfig b/src/mainboard/dell/gm45_latitude/Kconfig -similarity index 64% -rename from src/mainboard/dell/e6400/Kconfig -rename to src/mainboard/dell/gm45_latitude/Kconfig -index 6fe1b1c456..ba76fb6e8c 100644 ---- a/src/mainboard/dell/e6400/Kconfig -+++ b/src/mainboard/dell/gm45_latitude/Kconfig -@@ -1,9 +1,7 @@ - ## SPDX-License-Identifier: GPL-2.0-only - --if BOARD_DELL_E6400 -- --config BOARD_SPECIFIC_OPTIONS -- def_bool y -+config BOARD_DELL_GM45_LATITUDE_COMMON -+ def_bool n - select SYSTEM_TYPE_LAPTOP - select CPU_INTEL_SOCKET_P - select NORTHBRIDGE_INTEL_GM45 -@@ -19,19 +17,31 @@ config BOARD_SPECIFIC_OPTIONS - select INTEL_GMA_HAVE_VBT - select EC_DELL_MEC5035 - -+ -+config BOARD_DELL_E6400 -+ select BOARD_DELL_GM45_LATITUDE_COMMON -+ -+if BOARD_DELL_GM45_LATITUDE_COMMON -+ - config INTEL_GMA_DPLL_REF_FREQ - default 100000000 - - config MAINBOARD_DIR -- default "dell/e6400" -+ default "dell/gm45_latitude" - - config MAINBOARD_PART_NUMBER - default "Latitude E6400" if BOARD_DELL_E6400 - -+config OVERRIDE_DEVICETREE -+ default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" -+ -+config VARIANT_DIR -+ default "e6400" if BOARD_DELL_E6400 -+ - config USBDEBUG_HCD_INDEX - default 1 - - config CBFS_SIZE - default 0x1A0000 - --endif # BOARD_DELL_E6400 -+endif # BOARD_DELL_GM45_LATITUDE_COMMON -diff --git a/src/mainboard/dell/e6400/Kconfig.name b/src/mainboard/dell/gm45_latitude/Kconfig.name -similarity index 100% -rename from src/mainboard/dell/e6400/Kconfig.name -rename to src/mainboard/dell/gm45_latitude/Kconfig.name -diff --git a/src/mainboard/dell/gm45_latitude/Makefile.mk b/src/mainboard/dell/gm45_latitude/Makefile.mk -new file mode 100644 -index 0000000000..5295d5be22 ---- /dev/null -+++ b/src/mainboard/dell/gm45_latitude/Makefile.mk -@@ -0,0 +1,11 @@ -+## SPDX-License-Identifier: GPL-2.0-only -+ -+bootblock-y += bootblock.c -+ -+romstage-y += variants/$(VARIANT_DIR)/gpio.c -+ -+ramstage-y += cstates.c -+ramstage-y += blc.c -+ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c -+ -+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads -diff --git a/src/mainboard/dell/e6400/acpi/ec.asl b/src/mainboard/dell/gm45_latitude/acpi/ec.asl -similarity index 100% -rename from src/mainboard/dell/e6400/acpi/ec.asl -rename to src/mainboard/dell/gm45_latitude/acpi/ec.asl -diff --git a/src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl b/src/mainboard/dell/gm45_latitude/acpi/ich9_pci_irqs.asl -similarity index 100% -rename from src/mainboard/dell/e6400/acpi/ich9_pci_irqs.asl -rename to src/mainboard/dell/gm45_latitude/acpi/ich9_pci_irqs.asl -diff --git a/src/mainboard/dell/e6400/acpi/superio.asl b/src/mainboard/dell/gm45_latitude/acpi/superio.asl -similarity index 100% -rename from src/mainboard/dell/e6400/acpi/superio.asl -rename to src/mainboard/dell/gm45_latitude/acpi/superio.asl -diff --git a/src/mainboard/dell/e6400/blc.c b/src/mainboard/dell/gm45_latitude/blc.c -similarity index 100% -rename from src/mainboard/dell/e6400/blc.c -rename to src/mainboard/dell/gm45_latitude/blc.c -diff --git a/src/mainboard/dell/e6400/board_info.txt b/src/mainboard/dell/gm45_latitude/board_info.txt -similarity index 100% -rename from src/mainboard/dell/e6400/board_info.txt -rename to src/mainboard/dell/gm45_latitude/board_info.txt -diff --git a/src/mainboard/dell/e6400/bootblock.c b/src/mainboard/dell/gm45_latitude/bootblock.c -similarity index 100% -rename from src/mainboard/dell/e6400/bootblock.c -rename to src/mainboard/dell/gm45_latitude/bootblock.c -diff --git a/src/mainboard/dell/e6400/cmos.default b/src/mainboard/dell/gm45_latitude/cmos.default -similarity index 100% -rename from src/mainboard/dell/e6400/cmos.default -rename to src/mainboard/dell/gm45_latitude/cmos.default -diff --git a/src/mainboard/dell/e6400/cmos.layout b/src/mainboard/dell/gm45_latitude/cmos.layout -similarity index 100% -rename from src/mainboard/dell/e6400/cmos.layout -rename to src/mainboard/dell/gm45_latitude/cmos.layout -diff --git a/src/mainboard/dell/e6400/cstates.c b/src/mainboard/dell/gm45_latitude/cstates.c -similarity index 100% -rename from src/mainboard/dell/e6400/cstates.c -rename to src/mainboard/dell/gm45_latitude/cstates.c -diff --git a/src/mainboard/dell/e6400/devicetree.cb b/src/mainboard/dell/gm45_latitude/devicetree.cb -similarity index 98% -rename from src/mainboard/dell/e6400/devicetree.cb -rename to src/mainboard/dell/gm45_latitude/devicetree.cb -index e9f3915d17..76dae87153 100644 ---- a/src/mainboard/dell/e6400/devicetree.cb -+++ b/src/mainboard/dell/gm45_latitude/devicetree.cb -@@ -15,7 +15,6 @@ chip northbridge/intel/gm45 - register "pci_mmio_size" = "2048" - - device domain 0 on -- subsystemid 0x1028 0x0233 inherit - ops gm45_pci_domain_ops - - device pci 00.0 on end # host bridge -diff --git a/src/mainboard/dell/e6400/dsdt.asl b/src/mainboard/dell/gm45_latitude/dsdt.asl -similarity index 100% -rename from src/mainboard/dell/e6400/dsdt.asl -rename to src/mainboard/dell/gm45_latitude/dsdt.asl -diff --git a/src/mainboard/dell/e6400/mainboard.c b/src/mainboard/dell/gm45_latitude/mainboard.c -similarity index 100% -rename from src/mainboard/dell/e6400/mainboard.c -rename to src/mainboard/dell/gm45_latitude/mainboard.c -diff --git a/src/mainboard/dell/e6400/romstage.c b/src/mainboard/dell/gm45_latitude/romstage.c -similarity index 100% -rename from src/mainboard/dell/e6400/romstage.c -rename to src/mainboard/dell/gm45_latitude/romstage.c -diff --git a/src/mainboard/dell/e6400/data.vbt b/src/mainboard/dell/gm45_latitude/variants/e6400/data.vbt -similarity index 100% -rename from src/mainboard/dell/e6400/data.vbt -rename to src/mainboard/dell/gm45_latitude/variants/e6400/data.vbt -diff --git a/src/mainboard/dell/e6400/gma-mainboard.ads b/src/mainboard/dell/gm45_latitude/variants/e6400/gma-mainboard.ads -similarity index 100% -rename from src/mainboard/dell/e6400/gma-mainboard.ads -rename to src/mainboard/dell/gm45_latitude/variants/e6400/gma-mainboard.ads -diff --git a/src/mainboard/dell/e6400/gpio.c b/src/mainboard/dell/gm45_latitude/variants/e6400/gpio.c -similarity index 100% -rename from src/mainboard/dell/e6400/gpio.c -rename to src/mainboard/dell/gm45_latitude/variants/e6400/gpio.c -diff --git a/src/mainboard/dell/e6400/hda_verb.c b/src/mainboard/dell/gm45_latitude/variants/e6400/hda_verb.c -similarity index 100% -rename from src/mainboard/dell/e6400/hda_verb.c -rename to src/mainboard/dell/gm45_latitude/variants/e6400/hda_verb.c -diff --git a/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb b/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb -new file mode 100644 -index 0000000000..acc34a2252 ---- /dev/null -+++ b/src/mainboard/dell/gm45_latitude/variants/e6400/overridetree.cb -@@ -0,0 +1,7 @@ -+## SPDX-License-Identifier: GPL-2.0-or-later -+ -+chip northbridge/intel/gm45 -+ device domain 0 on -+ subsystemid 0x1028 0x0233 inherit -+ end -+end --- -2.39.5 - diff --git a/config/coreboot/default/target.cfg b/config/coreboot/default/target.cfg index 9de01b28..80c86778 100644 --- a/config/coreboot/default/target.cfg +++ b/config/coreboot/default/target.cfg @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-3.0-or-later tree="default" -rev="97bc693abc482139774a656212935387d43df8e2" +rev="9e41c7cec791d84b079251065add7dba66662913" diff --git a/config/coreboot/dell3050micro_fsp_16mb/target.cfg b/config/coreboot/dell3050micro_fsp_16mb/target.cfg deleted file mode 100644 index b6e6c722..00000000 --- a/config/coreboot/dell3050micro_fsp_16mb/target.cfg +++ /dev/null @@ -1,14 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -tree="next" -xarch="i386-elf" -payload_seabios="y" -payload_grub="y" -payload_memtest="y" -grub_scan_disk="nvme ahci" -grubtree="xhci" -vcfg="3050micro" -build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot" -IFD_platform="sklkbl" -payload_uboot_amd64="y" -release="n" # dell3050micro_vfsp_16mb is released instead diff --git a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb index 87918a5f..5d7609c3 100644 --- a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb @@ -16,8 +16,10 @@ CONFIG_COMPILER_GCC=y # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set -CONFIG_OPTION_BACKEND_NONE=y -# CONFIG_USE_OPTION_TABLE is not set +# CONFIG_OPTION_BACKEND_NONE is not set +CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set +CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -88,6 +90,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -152,6 +155,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_USE_PM_ACPI_TIMER=y +# CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set CONFIG_BOARD_DELL_OPTIPLEX_3050=y @@ -179,7 +183,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_USE_LEGACY_8254_TIMER=y CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd" @@ -188,6 +191,7 @@ CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +CONFIG_USE_LEGACY_8254_TIMER=y # CONFIG_DEBUG_SMI is not set # CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set CONFIG_HAVE_IFD_BIN=y @@ -249,6 +253,7 @@ CONFIG_SMM_RESERVED_SIZE=0x200000 CONFIG_SMM_MODULE_STACK_SIZE=0x800 CONFIG_ACPI_BERT_SIZE=0x0 CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 CONFIG_ACPI_CPU_STRING="CP%02X" @@ -289,6 +294,7 @@ CONFIG_SOC_INTEL_KABYLAKE=y CONFIG_SKYLAKE_SOC_PCH_H=y CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 @@ -330,10 +336,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" -CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" -CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" -CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" CONFIG_SOC_INTEL_CSE_RW_FILE="" CONFIG_SOC_INTEL_CSE_RW_VERSION="" @@ -584,6 +587,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_OXPCIE is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -594,7 +598,6 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y # CONFIG_FSP_USE_REPO is not set # CONFIG_DISPLAY_HOBS is not set # CONFIG_DISPLAY_UPD_DATA is not set -# CONFIG_BMP_LOGO is not set CONFIG_PLATFORM_USES_FSP2_0=y CONFIG_PLATFORM_USES_FSP2_X86_32=y CONFIG_HAVE_INTEL_FSP_REPO=y @@ -604,7 +607,6 @@ CONFIG_FSP_M_CBFS="fspm.bin" # CONFIG_FSP_FULL_FD is not set CONFIG_FSP_T_RESERVED_SIZE=0x0 CONFIG_FSP_M_XIP=y -CONFIG_HAVE_FSP_LOGO_SUPPORT=y CONFIG_SOC_INTEL_COMMON_FSP_RESET=y CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y @@ -807,6 +809,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode index b55261a4..c341c6dc 100644 --- a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode @@ -16,8 +16,10 @@ CONFIG_COMPILER_GCC=y # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set -CONFIG_OPTION_BACKEND_NONE=y -# CONFIG_USE_OPTION_TABLE is not set +# CONFIG_OPTION_BACKEND_NONE is not set +CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set +CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -88,6 +90,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -150,6 +153,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_USE_PM_ACPI_TIMER=y +# CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set CONFIG_BOARD_DELL_OPTIPLEX_3050=y @@ -177,7 +181,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_USE_LEGACY_8254_TIMER=y CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd" @@ -186,6 +189,7 @@ CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +CONFIG_USE_LEGACY_8254_TIMER=y # CONFIG_DEBUG_SMI is not set # CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set CONFIG_HAVE_IFD_BIN=y @@ -247,6 +251,7 @@ CONFIG_SMM_RESERVED_SIZE=0x200000 CONFIG_SMM_MODULE_STACK_SIZE=0x800 CONFIG_ACPI_BERT_SIZE=0x0 CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 CONFIG_ACPI_CPU_STRING="CP%02X" @@ -287,6 +292,7 @@ CONFIG_SOC_INTEL_KABYLAKE=y CONFIG_SKYLAKE_SOC_PCH_H=y CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 @@ -328,10 +334,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" -CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" -CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" -CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" CONFIG_SOC_INTEL_CSE_RW_FILE="" CONFIG_SOC_INTEL_CSE_RW_VERSION="" @@ -576,6 +579,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_OXPCIE is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -586,7 +590,6 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y # CONFIG_FSP_USE_REPO is not set # CONFIG_DISPLAY_HOBS is not set # CONFIG_DISPLAY_UPD_DATA is not set -# CONFIG_BMP_LOGO is not set CONFIG_PLATFORM_USES_FSP2_0=y CONFIG_PLATFORM_USES_FSP2_X86_32=y CONFIG_HAVE_INTEL_FSP_REPO=y @@ -596,7 +599,6 @@ CONFIG_FSP_M_CBFS="fspm.bin" # CONFIG_FSP_FULL_FD is not set CONFIG_FSP_T_RESERVED_SIZE=0x0 CONFIG_FSP_M_XIP=y -CONFIG_HAVE_FSP_LOGO_SUPPORT=y CONFIG_SOC_INTEL_COMMON_FSP_RESET=y CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y @@ -800,6 +802,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/dell3050micro_vfsp_16mb/target.cfg b/config/coreboot/dell3050micro_vfsp_16mb/target.cfg index d08c4eb5..4e04f453 100644 --- a/config/coreboot/dell3050micro_vfsp_16mb/target.cfg +++ b/config/coreboot/dell3050micro_vfsp_16mb/target.cfg @@ -1,13 +1,13 @@ # SPDX-License-Identifier: GPL-3.0-or-later -tree="next" +tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="nvme ahci" -grubtree="xhci" +grubtree="xhci_nvme" vcfg="3050micro" -build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot" +build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot" IFD_platform="sklkbl" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode b/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode index 6364bc56..6c8ce71d 100644 --- a/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell7010sff_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 9010" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_workstations" @@ -121,28 +130,36 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="variants/baseboard/devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="optiplex_9010_sff" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="variants/baseboard/devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Precision T1650" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -162,9 +179,6 @@ CONFIG_BOARD_DELL_OPTIPLEX_9010=y CONFIG_BOARD_DELL_SNB_IVB_WORKSTATIONS=y CONFIG_INCLUDE_SMSC_SCH5545_EC_FW=y CONFIG_SMSC_SCH5545_EC_FW_FILE="../../../vendorfiles/t1650/sch5545ec.bin" -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -179,12 +193,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/t1650/12_ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/t1650/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/t1650/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Precision T1650" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -243,9 +255,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -262,6 +275,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -309,6 +323,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -364,6 +383,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -387,6 +407,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -405,6 +428,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -436,9 +460,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -460,6 +487,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -515,7 +543,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -641,7 +668,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -663,6 +689,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/dell7010sff_12mb/target.cfg b/config/coreboot/dell7010sff_12mb/target.cfg index de6a8af8..34865f86 100644 --- a/config/coreboot/dell7010sff_12mb/target.cfg +++ b/config/coreboot/dell7010sff_12mb/target.cfg @@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci" grubtree="nvme" vcfg="t1650" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb index 8d9cb74b..c3f660c6 100644 --- a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -151,6 +153,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +# CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set @@ -172,6 +175,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set +CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y CONFIG_DCACHE_RAM_BASE=0xfeff8000 CONFIG_DCACHE_RAM_SIZE=0x8000 @@ -246,6 +250,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 @@ -262,6 +267,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -435,6 +441,8 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -459,6 +467,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -650,6 +659,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode index 48210da8..0f902ba2 100644 --- a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -149,6 +151,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +# CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set @@ -170,6 +173,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set +CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y CONFIG_DCACHE_RAM_BASE=0xfeff8000 CONFIG_DCACHE_RAM_SIZE=0x8000 @@ -244,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 @@ -260,6 +265,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -431,6 +437,8 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -455,6 +463,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -646,6 +655,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/dell780mt_8mb/target.cfg b/config/coreboot/dell780mt_8mb/target.cfg index e2f4d8a3..a58de7bd 100644 --- a/config/coreboot/dell780mt_8mb/target.cfg +++ b/config/coreboot/dell780mt_8mb/target.cfg @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-3.0-or-later -tree="next" +tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" @@ -8,4 +8,4 @@ payload_memtest="y" grub_scan_disk="nvme ahci ata" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb index cf288873..ac7093c2 100644 --- a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -151,6 +153,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +# CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set @@ -172,6 +175,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set +CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y CONFIG_DCACHE_RAM_BASE=0xfeff8000 CONFIG_DCACHE_RAM_SIZE=0x8000 @@ -246,6 +250,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 @@ -262,6 +267,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -435,6 +441,8 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -459,6 +467,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -650,6 +659,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode index 39650339..8d3e7f16 100644 --- a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -149,6 +151,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +# CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set @@ -170,6 +173,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set +CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y CONFIG_DCACHE_RAM_BASE=0xfeff8000 CONFIG_DCACHE_RAM_SIZE=0x8000 @@ -244,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 @@ -260,6 +265,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -431,6 +437,8 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -455,6 +463,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -646,6 +655,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/dell780mt_truncate_8mb/target.cfg b/config/coreboot/dell780mt_truncate_8mb/target.cfg index e2f4d8a3..a58de7bd 100644 --- a/config/coreboot/dell780mt_truncate_8mb/target.cfg +++ b/config/coreboot/dell780mt_truncate_8mb/target.cfg @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-3.0-or-later -tree="next" +tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" @@ -8,4 +8,4 @@ payload_memtest="y" grub_scan_disk="nvme ahci ata" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb index 93a87b24..f7e40cb5 100644 --- a/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -151,6 +153,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +# CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set @@ -172,6 +175,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set +CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y CONFIG_DCACHE_RAM_BASE=0xfeff8000 CONFIG_DCACHE_RAM_SIZE=0x8000 @@ -246,6 +250,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 @@ -262,6 +267,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -435,6 +441,8 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -459,6 +467,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -650,6 +659,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode index e92c5b5b..18813593 100644 --- a/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -149,6 +151,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +# CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set @@ -170,6 +173,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set +CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y CONFIG_DCACHE_RAM_BASE=0xfeff8000 CONFIG_DCACHE_RAM_SIZE=0x8000 @@ -244,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 @@ -260,6 +265,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -431,6 +437,8 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -455,6 +463,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -646,6 +655,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/dell780usff_8mb/target.cfg b/config/coreboot/dell780usff_8mb/target.cfg index e2f4d8a3..a58de7bd 100644 --- a/config/coreboot/dell780usff_8mb/target.cfg +++ b/config/coreboot/dell780usff_8mb/target.cfg @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-3.0-or-later -tree="next" +tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" @@ -8,4 +8,4 @@ payload_memtest="y" grub_scan_disk="nvme ahci ata" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb index 80f35e59..87800f44 100644 --- a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -151,6 +153,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +# CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set @@ -172,6 +175,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set +CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y CONFIG_DCACHE_RAM_BASE=0xfeff8000 CONFIG_DCACHE_RAM_SIZE=0x8000 @@ -246,6 +250,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 @@ -262,6 +267,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -435,6 +441,8 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -459,6 +467,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -650,6 +659,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode index 3550d507..a7a90e8f 100644 --- a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode @@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -89,6 +90,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -149,6 +151,7 @@ CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +# CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set @@ -170,6 +173,7 @@ CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set +CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 CONFIG_BOARD_DELL_OPTIPLEX_780_COMMON=y CONFIG_DCACHE_RAM_BASE=0xfeff8000 CONFIG_DCACHE_RAM_SIZE=0x8000 @@ -244,6 +248,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 @@ -260,6 +265,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -431,6 +437,8 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set @@ -455,6 +463,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -646,6 +655,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/dell780usff_truncate_8mb/target.cfg b/config/coreboot/dell780usff_truncate_8mb/target.cfg index e2f4d8a3..a58de7bd 100644 --- a/config/coreboot/dell780usff_truncate_8mb/target.cfg +++ b/config/coreboot/dell780usff_truncate_8mb/target.cfg @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-3.0-or-later -tree="next" +tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" @@ -8,4 +8,4 @@ payload_memtest="y" grub_scan_disk="nvme ahci ata" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb index 8d8c5c20..fe739be6 100644 --- a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set CONFIG_UTIL_GENPARSER=y # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -76,15 +79,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -105,7 +112,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT" CONFIG_MAINBOARD_VERSION="1.0" @@ -125,25 +134,33 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -160,9 +177,6 @@ CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xff7c0000 CONFIG_DCACHE_RAM_SIZE=0x40000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -179,12 +193,10 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 # CONFIG_ENABLE_DDR_2X_REFRESH is not set CONFIG_PCIEXP_AER=y -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT" CONFIG_HAVE_IFD_BIN=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" @@ -239,9 +251,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xe8000000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -260,6 +273,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_DISABLE_ME_PCI=y CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -354,6 +368,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -376,6 +391,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -396,6 +414,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -424,9 +443,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -449,6 +471,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -504,7 +527,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -632,7 +654,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -654,6 +675,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode index 231d6e94..e7863579 100644 --- a/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell9020mt_nri_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set CONFIG_UTIL_GENPARSER=y # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -76,15 +79,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -105,7 +112,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 MT" CONFIG_MAINBOARD_VERSION="1.0" @@ -123,25 +132,33 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -158,9 +175,6 @@ CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xff7c0000 CONFIG_DCACHE_RAM_SIZE=0x40000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -177,12 +191,10 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 # CONFIG_ENABLE_DDR_2X_REFRESH is not set CONFIG_PCIEXP_AER=y -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 MT" CONFIG_HAVE_IFD_BIN=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" @@ -237,9 +249,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xe8000000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -258,6 +271,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_DISABLE_ME_PCI=y CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -352,6 +366,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -374,6 +389,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -392,6 +410,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -420,9 +439,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -445,6 +467,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -501,7 +524,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -629,7 +651,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -651,6 +672,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/dell9020mt_nri_12mb/target.cfg b/config/coreboot/dell9020mt_nri_12mb/target.cfg index 96fbb9e3..47e228b7 100644 --- a/config/coreboot/dell9020mt_nri_12mb/target.cfg +++ b/config/coreboot/dell9020mt_nri_12mb/target.cfg @@ -6,7 +6,7 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="nvme ahci" -grubtree="xhci" +grubtree="xhci_nvme" vcfg="haswell" -build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot" +payload_uboot="amd64" diff --git a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb index 8d5ecd79..6c1ebfd6 100644 --- a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -76,15 +79,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -105,7 +112,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 SFF" CONFIG_MAINBOARD_VERSION="1.0" @@ -125,25 +134,33 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -160,9 +177,6 @@ CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xff7c0000 CONFIG_DCACHE_RAM_SIZE=0x40000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -179,12 +193,10 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 # CONFIG_ENABLE_DDR_2X_REFRESH is not set CONFIG_PCIEXP_AER=y -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF" CONFIG_HAVE_IFD_BIN=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" @@ -239,9 +251,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xe8000000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -260,6 +273,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_DISABLE_ME_PCI=y CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -354,6 +368,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -376,6 +391,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -396,6 +414,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -424,9 +443,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -449,6 +471,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -504,7 +527,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -632,7 +654,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -654,6 +675,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode index 272c35d5..648f31e8 100644 --- a/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell9020sff_nri_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -76,15 +79,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -105,7 +112,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 7020/9020 SFF" CONFIG_MAINBOARD_VERSION="1.0" @@ -123,25 +132,33 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -158,9 +175,6 @@ CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xff7c0000 CONFIG_DCACHE_RAM_SIZE=0x40000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -177,12 +191,10 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 # CONFIG_ENABLE_DDR_2X_REFRESH is not set CONFIG_PCIEXP_AER=y -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF" CONFIG_HAVE_IFD_BIN=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" @@ -237,9 +249,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xe8000000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -258,6 +271,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_DISABLE_ME_PCI=y CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -352,6 +366,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -374,6 +389,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -392,6 +410,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -420,9 +439,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -445,6 +467,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -501,7 +524,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -629,7 +651,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -651,6 +672,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/dell9020sff_nri_12mb/target.cfg b/config/coreboot/dell9020sff_nri_12mb/target.cfg index 96fbb9e3..47e228b7 100644 --- a/config/coreboot/dell9020sff_nri_12mb/target.cfg +++ b/config/coreboot/dell9020sff_nri_12mb/target.cfg @@ -6,7 +6,7 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="nvme ahci" -grubtree="xhci" +grubtree="xhci_nvme" vcfg="haswell" -build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot" +payload_uboot="amd64" diff --git a/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb b/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb index 67021be8..f789af92 100644 --- a/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb +++ b/config/coreboot/e4300_4mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E4300" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/gm45_latitude" @@ -121,26 +130,34 @@ CONFIG_MAX_CPUS=4 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e4300" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=1 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E4300" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set CONFIG_BOARD_DELL_E4300=y # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -159,9 +176,6 @@ CONFIG_BOARD_DELL_E4300=y # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -174,12 +188,10 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E4300" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -236,8 +248,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -252,6 +265,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -342,6 +356,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -366,6 +381,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -386,6 +404,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -418,7 +437,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -437,6 +459,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -593,7 +616,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -614,6 +636,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e4300_4mb/config/libgfxinit_txtmode b/config/coreboot/e4300_4mb/config/libgfxinit_txtmode index e6309b47..20cf23ad 100644 --- a/config/coreboot/e4300_4mb/config/libgfxinit_txtmode +++ b/config/coreboot/e4300_4mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E4300" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/gm45_latitude" @@ -119,26 +128,34 @@ CONFIG_MAX_CPUS=4 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e4300" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=1 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E4300" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set CONFIG_BOARD_DELL_E4300=y # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -157,9 +174,6 @@ CONFIG_BOARD_DELL_E4300=y # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -172,12 +186,10 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E4300" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -234,8 +246,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -250,6 +263,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -340,6 +354,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -364,6 +379,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -382,6 +400,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -414,7 +433,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -433,6 +455,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -589,7 +612,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -610,6 +632,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e4300_4mb/target.cfg b/config/coreboot/e4300_4mb/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/e4300_4mb/target.cfg +++ b/config/coreboot/e4300_4mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb index 3367bc2b..ab7476b7 100644 --- a/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb +++ b/config/coreboot/e5420_6mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E5420" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -121,27 +130,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e5420" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5420" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set CONFIG_BOARD_DELL_LATITUDE_E5420=y @@ -159,9 +176,6 @@ CONFIG_BOARD_DELL_LATITUDE_E5420=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -175,12 +189,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5420" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -238,9 +250,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -257,6 +270,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -304,6 +318,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -358,6 +377,7 @@ CONFIG_HAVE_ME_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -381,6 +401,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -401,6 +424,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -432,9 +456,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -453,6 +480,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -607,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -629,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e5420_6mb/config/libgfxinit_txtmode b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode index 331dda80..7a3ab038 100644 --- a/config/coreboot/e5420_6mb/config/libgfxinit_txtmode +++ b/config/coreboot/e5420_6mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E5420" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -119,27 +128,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e5420" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5420" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set CONFIG_BOARD_DELL_LATITUDE_E5420=y @@ -157,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E5420=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -173,12 +187,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5420" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -236,9 +248,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -255,6 +268,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -302,6 +316,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -356,6 +375,7 @@ CONFIG_HAVE_ME_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -379,6 +399,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -397,6 +420,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -428,9 +452,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -449,6 +476,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -604,7 +632,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -626,6 +653,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e5420_6mb/target.cfg b/config/coreboot/e5420_6mb/target.cfg index 333030ce..d7510b96 100644 --- a/config/coreboot/e5420_6mb/target.cfg +++ b/config/coreboot/e5420_6mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb index f6113581..7f2f1d1c 100644 --- a/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb +++ b/config/coreboot/e5520_6mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E5520" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -121,27 +130,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e5520" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5520" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -159,9 +176,6 @@ CONFIG_BOARD_DELL_LATITUDE_E5520=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -175,12 +189,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5520" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -238,9 +250,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -257,6 +270,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -304,6 +318,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -358,6 +377,7 @@ CONFIG_HAVE_ME_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -381,6 +401,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -401,6 +424,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -432,9 +456,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -453,6 +480,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -607,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -629,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode index 96bd21fc..dfbd4f64 100644 --- a/config/coreboot/e5520_6mb/config/libgfxinit_txtmode +++ b/config/coreboot/e5520_6mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E5520" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -119,27 +128,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e5520" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5520" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -157,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E5520=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -173,12 +187,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/6_ifd_nogbe" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5520" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -236,9 +248,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -255,6 +268,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -302,6 +316,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -356,6 +375,7 @@ CONFIG_HAVE_ME_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -379,6 +399,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -397,6 +420,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -428,9 +452,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -449,6 +476,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -604,7 +632,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -626,6 +653,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e5520_6mb/target.cfg b/config/coreboot/e5520_6mb/target.cfg index 333030ce..d7510b96 100644 --- a/config/coreboot/e5520_6mb/target.cfg +++ b/config/coreboot/e5520_6mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb index 7702f7bd..19c1a249 100644 --- a/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/e5530_12mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E5530" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -121,27 +130,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e5530" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5530" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -159,9 +176,6 @@ CONFIG_BOARD_DELL_LATITUDE_E5530=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -175,12 +189,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd_nogbe" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5530" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -238,9 +250,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -257,6 +270,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -304,6 +318,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -358,6 +377,7 @@ CONFIG_HAVE_ME_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -381,6 +401,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -401,6 +424,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -432,9 +456,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -453,6 +480,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -607,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -629,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode index fa950439..9cef13a5 100644 --- a/config/coreboot/e5530_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/e5530_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E5530" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -119,27 +128,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e5530" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5530" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -157,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E5530=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -173,12 +187,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd_nogbe" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E5530" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -236,9 +248,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -255,6 +268,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -302,6 +316,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -356,6 +375,7 @@ CONFIG_HAVE_ME_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -379,6 +399,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -397,6 +420,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -428,9 +452,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -449,6 +476,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -604,7 +632,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -626,6 +653,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e5530_12mb/target.cfg b/config/coreboot/e5530_12mb/target.cfg index 6cbab731..595ad782 100644 --- a/config/coreboot/e5530_12mb/target.cfg +++ b/config/coreboot/e5530_12mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb index 25c27fdb..d0d3d8bf 100644 --- a/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb +++ b/config/coreboot/e6220_10mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6220" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -121,27 +130,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6220" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6220" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -159,9 +176,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6220=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -176,12 +190,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6220" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -239,9 +251,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -258,6 +271,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -305,6 +319,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -361,6 +380,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -384,6 +404,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -404,6 +427,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -435,9 +459,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -456,6 +483,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -610,7 +638,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -632,6 +659,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6220_10mb/config/libgfxinit_txtmode b/config/coreboot/e6220_10mb/config/libgfxinit_txtmode index 3a79e7e3..13aec3df 100644 --- a/config/coreboot/e6220_10mb/config/libgfxinit_txtmode +++ b/config/coreboot/e6220_10mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6220" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -119,27 +128,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6220" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6220" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -157,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6220=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -174,12 +188,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6220" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -237,9 +249,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -256,6 +269,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -303,6 +317,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -359,6 +378,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -382,6 +402,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -400,6 +423,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -431,9 +455,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -452,6 +479,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -607,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -629,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6220_10mb/target.cfg b/config/coreboot/e6220_10mb/target.cfg index 333030ce..d7510b96 100644 --- a/config/coreboot/e6220_10mb/target.cfg +++ b/config/coreboot/e6220_10mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb index 7bc76f82..8b165481 100644 --- a/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/e6230_12mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6230" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -121,27 +130,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6230" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6230" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -159,9 +176,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6230=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -176,12 +190,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6230" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -239,9 +251,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -258,6 +271,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -305,6 +319,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -361,6 +380,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -384,6 +404,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -404,6 +427,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -435,9 +459,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -456,6 +483,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -610,7 +638,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -632,6 +659,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6230_12mb/config/libgfxinit_txtmode b/config/coreboot/e6230_12mb/config/libgfxinit_txtmode index 2d578a57..7808a222 100644 --- a/config/coreboot/e6230_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/e6230_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6230" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -119,27 +128,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6230" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6230" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -157,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6230=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -174,12 +188,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6230" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -237,9 +249,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -256,6 +269,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -303,6 +317,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -359,6 +378,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -382,6 +402,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -400,6 +423,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -431,9 +455,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -452,6 +479,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -607,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -629,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6230_12mb/target.cfg b/config/coreboot/e6230_12mb/target.cfg index b491fdc8..42eca05e 100644 --- a/config/coreboot/e6230_12mb/target.cfg +++ b/config/coreboot/e6230_12mb/target.cfg @@ -7,5 +7,5 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y" -payload_uboot_amd64="y" +payload_uboot="amd64" +payload_uboot="amd64" diff --git a/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb index e6867cd1..402b88ce 100644 --- a/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb +++ b/config/coreboot/e6320_10mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6320" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -121,27 +130,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6320" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6320" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -159,9 +176,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6320=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -176,12 +190,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6320" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -239,9 +251,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -258,6 +271,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -305,6 +319,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -361,6 +380,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -384,6 +404,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -404,6 +427,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -435,9 +459,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -456,6 +483,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -610,7 +638,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -632,6 +659,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6320_10mb/config/libgfxinit_txtmode b/config/coreboot/e6320_10mb/config/libgfxinit_txtmode index ca030f32..f730047d 100644 --- a/config/coreboot/e6320_10mb/config/libgfxinit_txtmode +++ b/config/coreboot/e6320_10mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6320" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -119,27 +128,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6320" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6320" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -157,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6320=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -174,12 +188,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6320" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -237,9 +249,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -256,6 +269,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -303,6 +317,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -359,6 +378,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -382,6 +402,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -400,6 +423,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -431,9 +455,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -452,6 +479,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -607,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -629,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6320_10mb/target.cfg b/config/coreboot/e6320_10mb/target.cfg index 333030ce..d7510b96 100644 --- a/config/coreboot/e6320_10mb/target.cfg +++ b/config/coreboot/e6320_10mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb index bd93e3bf..89fbba98 100644 --- a/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/e6330_12mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6330" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -121,27 +130,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6330" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6330" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -159,9 +176,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6330=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -176,12 +190,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6330" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -239,9 +251,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -258,6 +271,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -305,6 +319,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -361,6 +380,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -384,6 +404,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -404,6 +427,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -435,9 +459,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -456,6 +483,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -610,7 +638,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -632,6 +659,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6330_12mb/config/libgfxinit_txtmode b/config/coreboot/e6330_12mb/config/libgfxinit_txtmode index ee4686da..afbaa4c2 100644 --- a/config/coreboot/e6330_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/e6330_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6330" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -119,27 +128,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6330" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6330" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -157,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6330=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -174,12 +188,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6330" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -237,9 +249,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -256,6 +269,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -303,6 +317,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -359,6 +378,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -382,6 +402,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -400,6 +423,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -431,9 +455,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -452,6 +479,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -607,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -629,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6330_12mb/target.cfg b/config/coreboot/e6330_12mb/target.cfg index 6cbab731..595ad782 100644 --- a/config/coreboot/e6330_12mb/target.cfg +++ b/config/coreboot/e6330_12mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb index 84809847..13071235 100644 --- a/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb +++ b/config/coreboot/e6400_4mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6400" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/gm45_latitude" @@ -121,26 +130,34 @@ CONFIG_MAX_CPUS=4 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set CONFIG_VGA_BIOS=y # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=1 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set CONFIG_BOARD_DELL_E6400=y +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -159,9 +176,6 @@ CONFIG_BOARD_DELL_E6400=y # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -174,13 +188,11 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_VGA_BIOS_FILE="../../../pciroms/pci10de,06eb.rom" CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -237,9 +249,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 # CONFIG_VGA_BIOS_SECOND is not set CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -254,6 +267,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -344,6 +358,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -368,6 +383,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -389,6 +407,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -422,7 +441,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -441,6 +463,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -597,7 +620,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -618,6 +640,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode index 4b53f9a9..06611f8f 100644 --- a/config/coreboot/e6400_4mb/config/libgfxinit_txtmode +++ b/config/coreboot/e6400_4mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6400" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/gm45_latitude" @@ -119,26 +128,34 @@ CONFIG_MAX_CPUS=4 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set CONFIG_VGA_BIOS=y # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=1 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set CONFIG_BOARD_DELL_E6400=y +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -157,9 +174,6 @@ CONFIG_BOARD_DELL_E6400=y # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -172,13 +186,11 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_VGA_BIOS_FILE="../../../pciroms/pci10de,06eb.rom" CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -235,9 +247,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 # CONFIG_VGA_BIOS_SECOND is not set CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -252,6 +265,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -342,6 +356,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -366,6 +381,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -385,6 +403,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -418,7 +437,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -437,6 +459,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -593,7 +616,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -614,6 +636,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6400_4mb/target.cfg b/config/coreboot/e6400_4mb/target.cfg index b999b10c..f7500e97 100644 --- a/config/coreboot/e6400_4mb/target.cfg +++ b/config/coreboot/e6400_4mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="e6400" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/e6400nvidia_4mb/config/normal b/config/coreboot/e6400nvidia_4mb/config/normal index 79c3790a..53e838bb 100644 --- a/config/coreboot/e6400nvidia_4mb/config/normal +++ b/config/coreboot/e6400nvidia_4mb/config/normal @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6400" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/gm45_latitude" @@ -119,25 +128,33 @@ CONFIG_MAX_CPUS=4 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set CONFIG_VGA_BIOS=y # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=1 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set CONFIG_BOARD_DELL_E6400=y +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -156,9 +173,6 @@ CONFIG_BOARD_DELL_E6400=y # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_GM45_LATITUDE_COMMON=y CONFIG_INTEL_GMA_DPLL_REF_FREQ=100000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -171,13 +185,11 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_VGA_BIOS_FILE="../../../pciroms/pci10de,06eb.rom" CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -233,9 +245,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 # CONFIG_VGA_BIOS_SECOND is not set CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -250,6 +263,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -340,6 +354,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -364,6 +379,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -406,7 +424,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -425,6 +446,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -571,7 +593,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -587,6 +608,13 @@ CONFIG_HAVE_EM100_SUPPORT=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb index f558eefd..a3bee006 100644 --- a/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb +++ b/config/coreboot/e6420_10mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6420" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -121,27 +130,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6420" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6420" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -159,9 +176,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6420=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -176,12 +190,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6420" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -239,9 +251,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -258,6 +271,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -305,6 +319,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -361,6 +380,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -384,6 +404,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -404,6 +427,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -435,9 +459,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -456,6 +483,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -610,7 +638,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -632,6 +659,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode index 2158736b..601aa037 100644 --- a/config/coreboot/e6420_10mb/config/libgfxinit_txtmode +++ b/config/coreboot/e6420_10mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6420" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -119,27 +128,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6420" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6420" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -157,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6420=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -174,12 +188,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6420" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -237,9 +249,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -256,6 +269,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -303,6 +317,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -359,6 +378,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -382,6 +402,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -400,6 +423,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -431,9 +455,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -452,6 +479,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -607,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -629,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6420_10mb/target.cfg b/config/coreboot/e6420_10mb/target.cfg index 333030ce..d7510b96 100644 --- a/config/coreboot/e6420_10mb/target.cfg +++ b/config/coreboot/e6420_10mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb index 593d294c..7fbc079b 100644 --- a/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/e6430_12mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6430" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -121,27 +130,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6430" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6430" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -159,9 +176,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6430=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -176,12 +190,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6430" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -239,9 +251,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -258,6 +271,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -305,6 +319,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -361,6 +380,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -384,6 +404,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -404,6 +427,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -435,9 +459,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -456,6 +483,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -610,7 +638,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -632,6 +659,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode index e9211864..1a11fcfe 100644 --- a/config/coreboot/e6430_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/e6430_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6430" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -119,27 +128,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6430" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6430" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -157,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6430=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -174,12 +188,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6430" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -237,9 +249,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -256,6 +269,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -303,6 +317,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -359,6 +378,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -382,6 +402,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -400,6 +423,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -431,9 +455,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -452,6 +479,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -607,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -629,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6430_12mb/target.cfg b/config/coreboot/e6430_12mb/target.cfg index 6cbab731..595ad782 100644 --- a/config/coreboot/e6430_12mb/target.cfg +++ b/config/coreboot/e6430_12mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb index 381b7207..d892dfe1 100644 --- a/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb +++ b/config/coreboot/e6520_10mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6520" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -121,27 +130,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6520" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6520" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -159,9 +176,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6520=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -176,12 +190,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6520" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -239,9 +251,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -258,6 +271,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -305,6 +319,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -361,6 +380,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -384,6 +404,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -404,6 +427,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -435,9 +459,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -456,6 +483,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -610,7 +638,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -632,6 +659,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode index 92d54b1b..e655c5b0 100644 --- a/config/coreboot/e6520_10mb/config/libgfxinit_txtmode +++ b/config/coreboot/e6520_10mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6520" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -119,27 +128,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6520" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6520" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -157,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6520=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -174,12 +188,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_sandybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_sandybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_sandybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6520" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -237,9 +249,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -256,6 +269,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -303,6 +317,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -359,6 +378,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -382,6 +402,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -400,6 +423,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -431,9 +455,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -452,6 +479,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -607,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -629,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6520_10mb/target.cfg b/config/coreboot/e6520_10mb/target.cfg index 333030ce..d7510b96 100644 --- a/config/coreboot/e6520_10mb/target.cfg +++ b/config/coreboot/e6520_10mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb index 4345d838..787b0d52 100644 --- a/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/e6530_12mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6530" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -121,27 +130,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6530" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6530" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -159,9 +176,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6530=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -176,12 +190,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6530" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -239,9 +251,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -258,6 +271,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -305,6 +319,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -361,6 +380,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -384,6 +404,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -404,6 +427,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -435,9 +459,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -456,6 +483,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -610,7 +638,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -632,6 +659,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode index d5a2b25b..3d5eefa8 100644 --- a/config/coreboot/e6530_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/e6530_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Latitude E6530" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_latitude" @@ -119,27 +128,35 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="e6530" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6530" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -157,9 +174,6 @@ CONFIG_BOARD_DELL_LATITUDE_E6530=y # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_BOARD_DELL_SNB_IVB_LATITUDE_COMMON=y -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -174,12 +188,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/dell_ivybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/dell_ivybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/dell_ivybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6530" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -237,9 +249,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -256,6 +269,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -303,6 +317,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -359,6 +378,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -382,6 +402,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -400,6 +423,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -431,9 +455,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -452,6 +479,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -607,7 +635,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -629,6 +656,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/e6530_12mb/target.cfg b/config/coreboot/e6530_12mb/target.cfg index 6cbab731..595ad782 100644 --- a/config/coreboot/e6530_12mb/target.cfg +++ b/config/coreboot/e6530_12mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/fam15h/nuke.list b/config/coreboot/fam15h/nuke.list new file mode 100644 index 00000000..8ca7a4cf --- /dev/null +++ b/config/coreboot/fam15h/nuke.list @@ -0,0 +1 @@ +3rdparty/vboot/tests diff --git a/config/coreboot/fam15h/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch b/config/coreboot/fam15h/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch index 2f95297d..b48e88cd 100644 --- a/config/coreboot/fam15h/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch +++ b/config/coreboot/fam15h/patches/0010-coreboot-fam15h-use-new-upstream-for-acpica.patch @@ -8,9 +8,6 @@ the original upstream died i decided to host it myself, on libreboot rsync, for use by mirrors. -this is also useful for GNU Boot, when downloading -acpica on coreboot 4.11_branch, for fam15h boards - this change is not necessary on other coreboot trees, which adhere to new coreboot policy (newer coreboot pulls acpica from github, which is fairly reliable) diff --git a/config/coreboot/fam15h/patches/0013-Fix-build-with-GCC-15-as-host-compiler.patch b/config/coreboot/fam15h/patches/0013-Fix-build-with-GCC-15-as-host-compiler.patch new file mode 100644 index 00000000..b08c9edf --- /dev/null +++ b/config/coreboot/fam15h/patches/0013-Fix-build-with-GCC-15-as-host-compiler.patch @@ -0,0 +1,39 @@ +From 281151d85240bd8a60545b6415e0f44ce6a2af33 Mon Sep 17 00:00:00 2001 +From: Alper Nebi Yasak <alpernebiyasak@gmail.com> +Date: Tue, 29 Apr 2025 17:31:13 +0300 +Subject: [PATCH] WIP: Fix build with GCC 15 as host compiler + +GCC 15 now considers the unterminated-string-initialization warning as +part of -Werror by default. Coreboot compiles host utilities with the +system compiler, which results in getting this error in some files. + +Mark a hexadecimal translation table in cbfstool code as "nonstring" to +avoid the warning-turned-error. + +The bios log prefixes are non-null-terminated as well, but I couldn't +figure out how to mark them as non-strings. Temporarily disable the +warning with a pragma to avoid the error. That pragma causes an error on +GCC 14, so disable pragma warnings along with it to avoid that as well. + +Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> +--- + util/cbfstool/common.c | 2 +- + 1 files changed, 1 insertion(+), 1 deletion(-) + +diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c +index 7154bc9d5425..cb08c9e8ec11 100644 +--- a/util/cbfstool/common.c ++++ b/util/cbfstool/common.c +@@ -192,7 +192,7 @@ uint64_t intfiletype(const char *name) + + char *bintohex(uint8_t *data, size_t len) + { +- static const char translate[16] = "0123456789abcdef"; ++ static const char translate[16] __attribute__((__nonstring__)) = "0123456789abcdef"; + + char *result = malloc(len * 2 + 1); + if (result == NULL) + +-- +2.49.0 + diff --git a/config/coreboot/fam15h/patches/0014-util-romcc-Fix-build-with-GCC-15.patch b/config/coreboot/fam15h/patches/0014-util-romcc-Fix-build-with-GCC-15.patch new file mode 100644 index 00000000..d9de94c6 --- /dev/null +++ b/config/coreboot/fam15h/patches/0014-util-romcc-Fix-build-with-GCC-15.patch @@ -0,0 +1,119 @@ +From 74dc3c0a4603bc635c8bc5e95490cdf168af5f41 Mon Sep 17 00:00:00 2001 +From: Alper Nebi Yasak <alpernebiyasak@gmail.com> +Date: Tue, 29 Apr 2025 19:46:14 +0300 +Subject: [PATCH] util/romcc: Fix build with GCC 15 + +With GCC 15, we get build errors complaining bool is a reserved keyword, +so cannot be used as a function name. Rename our bool() to bool_(). + +Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> +--- + util/romcc/romcc.c | 24 ++++++++++++------------ + 1 file changed, 12 insertions(+), 12 deletions(-) + +diff --git a/util/romcc/romcc.c b/util/romcc/romcc.c +index 378bfc50f290..b375e0fc83cb 100644 +--- a/util/romcc/romcc.c ++++ b/util/romcc/romcc.c +@@ -7137,7 +7137,7 @@ static void integral(struct compile_state *state, struct triple *def) + } + + +-static void bool(struct compile_state *state, struct triple *def) ++static void bool_(struct compile_state *state, struct triple *def) + { + if (!TYPE_ARITHMETIC(def->type->type) && + ((def->type->type & TYPE_MASK) != TYPE_POINTER)) { +@@ -7705,7 +7705,7 @@ static struct triple *mkcond_expr( + struct triple *def, *val, *var, *jmp1, *jmp2, *top, *mid, *end; + struct type *result_type; + unsigned int left_type, right_type; +- bool(state, test); ++ bool_(state, test); + left_type = left->type->type; + right_type = right->type->type; + result_type = 0; +@@ -11036,7 +11036,7 @@ static struct triple *unary_expr(struct compile_state *state) + case TOK_BANG: + eat(state, TOK_BANG); + right = read_expr(state, cast_expr(state)); +- bool(state, right); ++ bool_(state, right); + def = lfalse_expr(state, right); + break; + case TOK_SIZEOF: +@@ -11363,10 +11363,10 @@ static struct triple *land_expr(struct compile_state *state) + while(peek(state) == TOK_LOGAND) { + struct triple *left, *right; + left = read_expr(state, def); +- bool(state, left); ++ bool_(state, left); + eat(state, TOK_LOGAND); + right = read_expr(state, or_expr(state)); +- bool(state, right); ++ bool_(state, right); + + def = mkland_expr(state, + ltrue_expr(state, left), +@@ -11382,10 +11382,10 @@ static struct triple *lor_expr(struct compile_state *state) + while(peek(state) == TOK_LOGOR) { + struct triple *left, *right; + left = read_expr(state, def); +- bool(state, left); ++ bool_(state, left); + eat(state, TOK_LOGOR); + right = read_expr(state, land_expr(state)); +- bool(state, right); ++ bool_(state, right); + + def = mklor_expr(state, + ltrue_expr(state, left), +@@ -11400,7 +11400,7 @@ static struct triple *conditional_expr(struct compile_state *state) + def = lor_expr(state); + if (peek(state) == TOK_QUEST) { + struct triple *test, *left, *right; +- bool(state, def); ++ bool_(state, def); + test = ltrue_expr(state, read_expr(state, def)); + eat(state, TOK_QUEST); + left = read_expr(state, expr(state)); +@@ -11676,7 +11676,7 @@ static void if_statement(struct compile_state *state, struct triple *first) + eat(state, TOK_IF); + eat(state, TOK_LPAREN); + test = expr(state); +- bool(state, test); ++ bool_(state, test); + /* Cleanup and invert the test */ + test = lfalse_expr(state, read_expr(state, test)); + eat(state, TOK_RPAREN); +@@ -11719,7 +11719,7 @@ static void for_statement(struct compile_state *state, struct triple *first) + eat(state, TOK_SEMI); + if (peek(state) != TOK_SEMI) { + test = expr(state); +- bool(state, test); ++ bool_(state, test); + test = ltrue_expr(state, read_expr(state, test)); + } + eat(state, TOK_SEMI); +@@ -11767,7 +11767,7 @@ static void while_statement(struct compile_state *state, struct triple *first) + eat(state, TOK_WHILE); + eat(state, TOK_LPAREN); + test = expr(state); +- bool(state, test); ++ bool_(state, test); + test = ltrue_expr(state, read_expr(state, test)); + eat(state, TOK_RPAREN); + /* Generate the needed pieces */ +@@ -11818,7 +11818,7 @@ static void do_statement(struct compile_state *state, struct triple *first) + eat(state, TOK_WHILE); + eat(state, TOK_LPAREN); + test = read_expr(state, expr(state)); +- bool(state, test); ++ bool_(state, test); + eat(state, TOK_RPAREN); + eat(state, TOK_SEMI); + /* Thread the pieces together */ + +-- +2.49.0 + diff --git a/config/coreboot/fam15h/patches/0015-gmp-gcc15-patch.patch b/config/coreboot/fam15h/patches/0015-gmp-gcc15-patch.patch new file mode 100644 index 00000000..40ea7c14 --- /dev/null +++ b/config/coreboot/fam15h/patches/0015-gmp-gcc15-patch.patch @@ -0,0 +1,65 @@ +From 8663b2a75d69aa241f86dd6e813232343a05b609 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Tue, 29 Apr 2025 21:26:25 +0100 +Subject: [PATCH 1/1] gmp gcc15 patch + +https://gmplib.org/list-archives/gmp-devel/2025-January/006279.html + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + ...include.m4-fix-std-c23-build-failure.patch | 43 +++++++++++++++++++ + 1 file changed, 43 insertions(+) + create mode 100644 util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure.patch + +diff --git a/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure.patch b/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure.patch +new file mode 100644 +index 0000000000..adb66c6043 +--- /dev/null ++++ b/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure.patch +@@ -0,0 +1,43 @@ ++From 7d4aa08224b53054754b8ee6fd61a4297ac47119 Mon Sep 17 00:00:00 2001 ++From: Rudi Heitbaum <rudi@heitbaum.com> ++Date: Wed, 22 Jan 2025 02:34:09 +0100 ++Subject: [PATCH 1/1] acinclude.m4: fix -std=c23 build failure ++ ++Add prototype to configure test function as c23 removes unprototyped ++functions. ++ ++gcc-15 switched to -std=c23 by default: ++ ++ https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=55e3bd376b2214e200fa76d12b67ff259b06c212 ++ ++As a result `configure` fails with: ++ conftest.c: In function 'f': ++ conftest.c:12:48: error: too many arguments to function 'g'; expected 0, have 6 ++ 12 | for(i=0;i<1;i++){if(e(got,got,9,d[i].n)==0)h();g(i,d[i].src,d[i].n,got,d[i].want,9);if(d[i].n)h();}} ++ | ^ ~ ++ conftest.c:7:6: note: declared here ++ 7 | void g(){} ++ | ^ ++ ++Link: https://gmplib.org/list-archives/gmp-bugs/2024-November/005550.html ++Signed-off-by: Rudi Heitbaum <rudi@heitbaum.com> ++--- ++ acinclude.m4 | 2 +- ++ 1 file changed, 1 insertion(+), 1 deletion(-) ++ ++diff --git a/acinclude.m4 b/acinclude.m4 ++index 3c3ecf5..3a226fd 100644 ++--- a/acinclude.m4 +++++ b/acinclude.m4 ++@@ -609,7 +609,7 @@ GMP_PROG_CC_WORKS_PART([$1], [long long reliability test 1], ++ ++ #if defined (__GNUC__) && ! defined (__cplusplus) ++ typedef unsigned long long t1;typedef t1*t2; ++-void g(){} +++void g(int,const t1 *,t1,t1 *,const t1 *,int){} ++ void h(){} ++ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0) ++ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;} ++-- ++2.39.5 ++ +-- +2.39.5 + diff --git a/config/coreboot/fam15h/patches/0016-further-fix-for-std-c23-on-gmp-with-host-gcc-15.patch b/config/coreboot/fam15h/patches/0016-further-fix-for-std-c23-on-gmp-with-host-gcc-15.patch new file mode 100644 index 00000000..1287a02d --- /dev/null +++ b/config/coreboot/fam15h/patches/0016-further-fix-for-std-c23-on-gmp-with-host-gcc-15.patch @@ -0,0 +1,55 @@ +From 8c3a1163eb24a608ad14747cd40169fb5a41d4f9 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Tue, 29 Apr 2025 23:18:56 +0100 +Subject: [PATCH 1/1] further fix for std=c23 on gmp with host gcc-15 + +the fix had to be applied in the configure file, so that +the correct function call is generated in conftest.c + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + ...e.m4-fix-std-c23-build-failure-extra.patch | 32 +++++++++++++++++++ + 1 file changed, 32 insertions(+) + create mode 100644 util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure-extra.patch + +diff --git a/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure-extra.patch b/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure-extra.patch +new file mode 100644 +index 0000000000..40569b27d8 +--- /dev/null ++++ b/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure-extra.patch +@@ -0,0 +1,32 @@ ++From 6316016cfe6834b6d3242e7e088b7d2af91ada22 Mon Sep 17 00:00:00 2001 ++From: Leah Rowe <leah@libreboot.org> ++Date: Tue, 29 Apr 2025 23:16:51 +0100 ++Subject: [PATCH 1/1] further -std=23 gcc-15 fix for gmp ++ ++the previously merged revision was correct, but ++applied in the wrong place. the conftest.c file ++was being generated by configure, in this place. ++ ++this should fix build errors now, on gcc-15. ++ ++Signed-off-by: Leah Rowe <leah@libreboot.org> ++--- ++ configure | 2 +- ++ 1 file changed, 1 insertion(+), 1 deletion(-) ++ ++diff --git a/configure b/configure ++index 12ddffd..8b07818 100755 ++--- a/configure +++++ b/configure ++@@ -6458,7 +6458,7 @@ if test "$gmp_prog_cc_works" = yes; then ++ ++ #if defined (__GNUC__) && ! defined (__cplusplus) ++ typedef unsigned long long t1;typedef t1*t2; ++-void g(){} +++void g(int,const t1 *,t1,t1 *,const t1 *,int){} ++ void h(){} ++ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0) ++ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;} ++-- ++2.39.5 ++ +-- +2.39.5 + diff --git a/config/coreboot/fam15h/patches/0017-xgcc-update-nasm-to-2.16.03.patch b/config/coreboot/fam15h/patches/0017-xgcc-update-nasm-to-2.16.03.patch new file mode 100644 index 00000000..8dc52ac9 --- /dev/null +++ b/config/coreboot/fam15h/patches/0017-xgcc-update-nasm-to-2.16.03.patch @@ -0,0 +1,44 @@ +From 0d639c485bdf136e4c5ac7af81fc12da3f21bc46 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Wed, 30 Apr 2025 04:07:31 +0100 +Subject: [PATCH 1/1] xgcc: update nasm to 2.16.03 + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + util/crossgcc/buildgcc | 2 +- + util/crossgcc/sum/nasm-2.14.02.tar.bz2.cksum | 1 - + util/crossgcc/sum/nasm-2.16.03.tar.bz2.cksum | 1 + + 3 files changed, 2 insertions(+), 2 deletions(-) + delete mode 100644 util/crossgcc/sum/nasm-2.14.02.tar.bz2.cksum + create mode 100644 util/crossgcc/sum/nasm-2.16.03.tar.bz2.cksum + +diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc +index 0ad1980104..2d48ff038e 100755 +--- a/util/crossgcc/buildgcc ++++ b/util/crossgcc/buildgcc +@@ -61,7 +61,7 @@ EXPAT_VERSION=2.2.7 + CLANG_VERSION=8.0.0 + MAKE_VERSION=4.2.1 + CMAKE_VERSION=3.15.3 +-NASM_VERSION=2.14.02 ++NASM_VERSION=2.16.03 + + # GCC toolchain archive locations + # These are sanitized by the jenkins toolchain test builder, so if +diff --git a/util/crossgcc/sum/nasm-2.14.02.tar.bz2.cksum b/util/crossgcc/sum/nasm-2.14.02.tar.bz2.cksum +deleted file mode 100644 +index f3b9de9d29..0000000000 +--- a/util/crossgcc/sum/nasm-2.14.02.tar.bz2.cksum ++++ /dev/null +@@ -1 +0,0 @@ +-fe098ee4dc9c4c983696c4948e64b23e4098b92b tarballs/nasm-2.14.02.tar.bz2 +diff --git a/util/crossgcc/sum/nasm-2.16.03.tar.bz2.cksum b/util/crossgcc/sum/nasm-2.16.03.tar.bz2.cksum +new file mode 100644 +index 0000000000..9ca23fb0c4 +--- /dev/null ++++ b/util/crossgcc/sum/nasm-2.16.03.tar.bz2.cksum +@@ -0,0 +1 @@ ++c63080347a5c1c8904456fe6c680b722558383b4 tarballs/nasm-2.16.03.tar.bz2 +-- +2.39.5 + diff --git a/config/coreboot/g43t_am3/config/libgfxinit_txtmode b/config/coreboot/g43t_am3/config/libgfxinit_txtmode index cca1ebda..aff54e94 100644 --- a/config/coreboot/g43t_am3/config/libgfxinit_txtmode +++ b/config/coreboot/g43t_am3/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_VENDOR_ACER=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_VENDOR_ACER=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_ACER=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_ACER=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="G43T-AM3" CONFIG_MAINBOARD_VERSION="1.0" @@ -117,30 +126,34 @@ CONFIG_FMDFILE="" CONFIG_MAINBOARD_VENDOR="Acer" # CONFIG_BOARD_ACER_VN7_572G is not set CONFIG_BOARD_ACER_G43T_AM3=y -CONFIG_CBFS_SIZE=0x200000 +# CONFIG_BOARD_ACER_Q45T_AM is not set +CONFIG_CBFS_SIZE=0x3FA000 CONFIG_MAX_CPUS=4 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_VARIANT_DIR="g43t-am3" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Acer" -CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="G43T-AM3" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=256 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfeff8000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -151,14 +164,14 @@ CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="../../../config/ifd/g43t_am3/ifd" +CONFIG_GBE_BIN_PATH="../../../config/ifd/g43t_am3/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="G43T-AM3" -# CONFIG_HAVE_IFD_BIN is not set +CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=32 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 @@ -178,8 +191,8 @@ CONFIG_BOARD_ROMSIZE_KB_2048=y # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set # CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set -CONFIG_COREBOOT_ROMSIZE_KB_2048=y -# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +CONFIG_COREBOOT_ROMSIZE_KB_4096=y # CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set # CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set # CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set @@ -189,8 +202,8 @@ CONFIG_COREBOOT_ROMSIZE_KB_2048=y # CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set -CONFIG_COREBOOT_ROMSIZE_KB=2048 -CONFIG_ROM_SIZE=0x00200000 +CONFIG_COREBOOT_ROMSIZE_KB=4096 +CONFIG_ROM_SIZE=0x00400000 CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y @@ -213,8 +226,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -229,6 +243,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -320,7 +335,14 @@ CONFIG_SUPERIO_ITE_IT8720F=y # # Intel Firmware # +# CONFIG_HAVE_ME_BIN is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y +CONFIG_HAVE_GBE_BIN=y +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -346,6 +368,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -364,6 +389,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -396,10 +422,13 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -418,6 +447,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -570,7 +600,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -580,6 +609,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # end of Debugging @@ -589,6 +620,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/g43t_am3/target.cfg b/config/coreboot/g43t_am3/target.cfg index 3379b716..357eee9a 100644 --- a/config/coreboot/g43t_am3/target.cfg +++ b/config/coreboot/g43t_am3/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_memtest="y" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode b/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode index 563a47c7..4ec3e295 100644 --- a/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_VENDOR_ACER=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_VENDOR_ACER=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_ACER=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_ACER=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="G43T-AM3" CONFIG_MAINBOARD_VERSION="1.0" @@ -117,30 +126,34 @@ CONFIG_FMDFILE="" CONFIG_MAINBOARD_VENDOR="Acer" # CONFIG_BOARD_ACER_VN7_572G is not set CONFIG_BOARD_ACER_G43T_AM3=y -CONFIG_CBFS_SIZE=0x1000000 +# CONFIG_BOARD_ACER_Q45T_AM is not set +CONFIG_CBFS_SIZE=0xFFA000 CONFIG_MAX_CPUS=4 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_VARIANT_DIR="g43t-am3" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Acer" -CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="G43T-AM3" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=256 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfeff8000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -151,14 +164,14 @@ CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="../../../config/ifd/g43t_am3/ifd_16" +CONFIG_GBE_BIN_PATH="../../../config/ifd/g43t_am3/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="G43T-AM3" -# CONFIG_HAVE_IFD_BIN is not set +CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=32 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 @@ -213,8 +226,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -229,6 +243,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -320,7 +335,14 @@ CONFIG_SUPERIO_ITE_IT8720F=y # # Intel Firmware # +# CONFIG_HAVE_ME_BIN is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y +CONFIG_HAVE_GBE_BIN=y +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -346,6 +368,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -364,6 +389,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -396,10 +422,13 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -418,6 +447,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -570,7 +600,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -580,6 +609,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # end of Debugging @@ -589,6 +620,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/g43t_am3_16mb/target.cfg b/config/coreboot/g43t_am3_16mb/target.cfg index f2f0a52d..a097a3e8 100644 --- a/config/coreboot/g43t_am3_16mb/target.cfg +++ b/config/coreboot/g43t_am3_16mb/target.cfg @@ -7,4 +7,4 @@ payload_memtest="y" release="n" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode b/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode index ade6b308..419b6e30 100644 --- a/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode +++ b/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set CONFIG_VENDOR_GIGABYTE=y # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_GIGABYTE=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="GA-G41M-ES2L" CONFIG_MAINBOARD_VERSION="1.0" @@ -120,25 +129,27 @@ CONFIG_MAX_CPUS=4 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="GIGABYTE" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="GA-G41M-ES2L" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=256 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfeff8000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -160,13 +171,12 @@ CONFIG_BOARD_GIGABYTE_GA_G41M_ES2L=y # CONFIG_BOARD_GIGABYTE_GA_H61M_DS2V is not set # CONFIG_BOARD_GIGABYTE_GA_H61MA_D3V is not set # CONFIG_BOARD_GIGABYTE_GA_H61M_S2P_R3 is not set +# CONFIG_BOARD_GIGABYTE_GA_H77M_D3H is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="GA-G41M-ES2L" CONFIG_PCIEXP_HOTPLUG_BUSES=32 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 @@ -221,8 +231,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -237,6 +248,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -328,6 +340,7 @@ CONFIG_SUPERIO_ITE_IT8718F=y # # Embedded Controllers # +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -353,6 +366,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -371,6 +387,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -403,12 +420,15 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y CONFIG_REALTEK_8168_RESET=y CONFIG_REALTEK_8168_MACADDRESS="00:e0:4c:00:c0:b0" +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -426,6 +446,7 @@ CONFIG_SPI_FLASH_ISSI=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -578,7 +599,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -597,6 +617,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/gru_bob/config/libgfxinit_corebootfb b/config/coreboot/gru_bob/config/libgfxinit_corebootfb index 24935ea3..6f8128c8 100644 --- a/config/coreboot/gru_bob/config/libgfxinit_corebootfb +++ b/config/coreboot/gru_bob/config/libgfxinit_corebootfb @@ -9,13 +9,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y -# CONFIG_ALLOW_EXPERIMENTAL_CLANG is not set +# CONFIG_COMPILER_LLVM_CLANG is not set # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_COMPRESS_PRERAM_STAGES=y @@ -52,6 +54,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -63,6 +66,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -70,15 +74,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set CONFIG_VENDOR_GOOGLE=y +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -99,7 +107,9 @@ CONFIG_VENDOR_GOOGLE=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="Bob" CONFIG_MAINBOARD_DIR="google/gru" @@ -113,17 +123,18 @@ CONFIG_CONSOLE_SERIAL=y CONFIG_MAX_CPUS=1 CONFIG_POST_DEVICE=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set # CONFIG_CHROMEOS is not set -CONFIG_OVERRIDE_DEVICETREE="" +CONFIG_ARM64_CURRENT_EL=3 +CONFIG_MEMLAYOUT_LD_FILE="src/soc/rockchip/rk3399/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +# CONFIG_CONSOLE_POST is not set CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=1 CONFIG_CONSOLE_SERIAL_UART_ADDRESS=0xFF1A0000 -# CONFIG_CONSOLE_POST is not set -CONFIG_MEMLAYOUT_LD_FILE="src/soc/rockchip/rk3399/memlayout.ld" CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 -CONFIG_ARM64_CURRENT_EL=3 CONFIG_SPI_FLASH_WINBOND=y # @@ -153,12 +164,22 @@ CONFIG_SPI_FLASH_WINBOND=y # CONFIG_BOARD_GOOGLE_ZAKO is not set # +# Bluey +# +# CONFIG_BOARD_GOOGLE_BLUEY is not set +# CONFIG_BOARD_GOOGLE_QUENBI is not set + +# # Brox # # CONFIG_BOARD_GOOGLE_BROX is not set +# CONFIG_BOARD_GOOGLE_BROX_RTK_EC is not set # CONFIG_BOARD_GOOGLE_BROX_EC_ISH is not set -# CONFIG_BOARD_GOOGLE_LOTSO is not set +# CONFIG_BOARD_GOOGLE_BROX_TI_PDC is not set +# CONFIG_BOARD_GOOGLE_CABOC is not set # CONFIG_BOARD_GOOGLE_GREENBAYUPOC is not set +# CONFIG_BOARD_GOOGLE_JUBILANT is not set +# CONFIG_BOARD_GOOGLE_LOTSO is not set # # Brya @@ -175,6 +196,7 @@ CONFIG_SPI_FLASH_WINBOND=y # CONFIG_BOARD_GOOGLE_CRAASKOV is not set # CONFIG_BOARD_GOOGLE_CONSTITUTION is not set # CONFIG_BOARD_GOOGLE_CROTA is not set +# CONFIG_BOARD_GOOGLE_DIRKS is not set # CONFIG_BOARD_GOOGLE_DOCHI is not set # CONFIG_BOARD_GOOGLE_DOMIKA is not set # CONFIG_BOARD_GOOGLE_FELWINTER is not set @@ -184,8 +206,10 @@ CONFIG_SPI_FLASH_WINBOND=y # CONFIG_BOARD_GOOGLE_GLADIOS is not set # CONFIG_BOARD_GOOGLE_GLASSWAY is not set # CONFIG_BOARD_GOOGLE_GOTHRAX is not set +# CONFIG_BOARD_GOOGLE_GUREN is not set # CONFIG_BOARD_GOOGLE_HADES is not set # CONFIG_BOARD_GOOGLE_KANO is not set +# CONFIG_BOARD_GOOGLE_KALADIN is not set # CONFIG_BOARD_GOOGLE_KINOX is not set # CONFIG_BOARD_GOOGLE_KULDAX is not set # CONFIG_BOARD_GOOGLE_JOXER is not set @@ -193,6 +217,7 @@ CONFIG_SPI_FLASH_WINBOND=y # CONFIG_BOARD_GOOGLE_MARASOV is not set # CONFIG_BOARD_GOOGLE_MITHRAX is not set # CONFIG_BOARD_GOOGLE_MOLI is not set +# CONFIG_BOARD_GOOGLE_MOXIE is not set # CONFIG_BOARD_GOOGLE_NIVVIKS is not set # CONFIG_BOARD_GOOGLE_NEREID is not set # CONFIG_BOARD_GOOGLE_NOKRIS is not set @@ -201,19 +226,24 @@ CONFIG_SPI_FLASH_WINBOND=y # CONFIG_BOARD_GOOGLE_PIRRHA is not set # CONFIG_BOARD_GOOGLE_PRIMUS is not set # CONFIG_BOARD_GOOGLE_PUJJO is not set +# CONFIG_BOARD_GOOGLE_PUJJONIRU is not set # CONFIG_BOARD_GOOGLE_QUANDISO is not set +# CONFIG_BOARD_GOOGLE_QUANDISO2 is not set # CONFIG_BOARD_GOOGLE_REDRIX is not set # CONFIG_BOARD_GOOGLE_REDRIX4ES is not set # CONFIG_BOARD_GOOGLE_RIVEN is not set +# CONFIG_BOARD_GOOGLE_RULL is not set # CONFIG_BOARD_GOOGLE_SKOLAS is not set # CONFIG_BOARD_GOOGLE_SKOLAS4ES is not set # CONFIG_BOARD_GOOGLE_TAEKO is not set # CONFIG_BOARD_GOOGLE_TAEKO4ES is not set # CONFIG_BOARD_GOOGLE_TANIKS is not set +# CONFIG_BOARD_GOOGLE_TELIKS is not set # CONFIG_BOARD_GOOGLE_TEREID is not set # CONFIG_BOARD_GOOGLE_TIVVIKS is not set # CONFIG_BOARD_GOOGLE_TRULO is not set # CONFIG_BOARD_GOOGLE_ULDREN is not set +# CONFIG_BOARD_GOOGLE_ULDRENITE is not set # CONFIG_BOARD_GOOGLE_VELL is not set # CONFIG_BOARD_GOOGLE_VOLMAR is not set # CONFIG_BOARD_GOOGLE_XIVU is not set @@ -226,7 +256,13 @@ CONFIG_SPI_FLASH_WINBOND=y # CONFIG_BOARD_GOOGLE_YAVISTA is not set # CONFIG_BOARD_GOOGLE_SUNDANCE is not set # CONFIG_BOARD_GOOGLE_PUJJOGA is not set +# CONFIG_BOARD_GOOGLE_PUJJOGATWIN is not set +# CONFIG_BOARD_GOOGLE_PUJJOLO is not set # CONFIG_BOARD_GOOGLE_ORISA is not set +# CONFIG_BOARD_GOOGLE_TELITH is not set +# CONFIG_BOARD_GOOGLE_MELIKS is not set +# CONFIG_BOARD_GOOGLE_EPIC is not set +# CONFIG_BOARD_GOOGLE_PUJJOCENTO is not set # # Butterfly @@ -265,6 +301,7 @@ CONFIG_SPI_FLASH_WINBOND=y # # CONFIG_BOARD_GOOGLE_STARMIE is not set # CONFIG_BOARD_GOOGLE_WUGTRIO is not set +# CONFIG_BOARD_GOOGLE_WYRDEER is not set # # Cyan @@ -336,6 +373,16 @@ CONFIG_SPI_FLASH_WINBOND=y # Fatcat # # CONFIG_BOARD_GOOGLE_FATCAT is not set +# CONFIG_BOARD_GOOGLE_FATCAT4ES is not set +# CONFIG_BOARD_GOOGLE_FATCATISH is not set +# CONFIG_BOARD_GOOGLE_FATCATITE is not set +# CONFIG_BOARD_GOOGLE_FATCATITE4ES is not set +# CONFIG_BOARD_GOOGLE_FATCATNUVO is not set +# CONFIG_BOARD_GOOGLE_FATCATNUVO4ES is not set +# CONFIG_BOARD_GOOGLE_FELINO is not set +# CONFIG_BOARD_GOOGLE_FELINO4ES is not set +# CONFIG_BOARD_GOOGLE_FRANCKA is not set +# CONFIG_BOARD_GOOGLE_KINMEN is not set # # Fizz @@ -500,6 +547,16 @@ CONFIG_BOARD_GOOGLE_BOB=y # CONFIG_BOARD_GOOGLE_HANA is not set # +# Ocelot +# +# CONFIG_BOARD_GOOGLE_OCELOT is not set +# CONFIG_BOARD_GOOGLE_OCELOTITE is not set +# CONFIG_BOARD_GOOGLE_OCELOTMCHP is not set +# CONFIG_BOARD_GOOGLE_OCELOT4ES is not set +# CONFIG_BOARD_GOOGLE_OCELOTITE4ES is not set +# CONFIG_BOARD_GOOGLE_OCELOTMCHP4ES is not set + +# # Octopus # # CONFIG_BOARD_GOOGLE_AMPTON is not set @@ -578,6 +635,8 @@ CONFIG_BOARD_GOOGLE_BOB=y # # Rauru # +# CONFIG_BOARD_GOOGLE_HYLIA is not set +# CONFIG_BOARD_GOOGLE_NAVI is not set # CONFIG_BOARD_GOOGLE_RAURU is not set # @@ -605,6 +664,7 @@ CONFIG_BOARD_GOOGLE_BOB=y # CONFIG_BOARD_GOOGLE_REX64 is not set # CONFIG_BOARD_GOOGLE_SCREEBO is not set # CONFIG_BOARD_GOOGLE_SCREEBO4ES is not set +# CONFIG_BOARD_GOOGLE_KANIX is not set # # Sarien @@ -622,6 +682,15 @@ CONFIG_BOARD_GOOGLE_BOB=y # CONFIG_BOARD_GOOGLE_WINTERHOLD is not set # +# Skywalker +# +# CONFIG_BOARD_GOOGLE_ANAKIN is not set +# CONFIG_BOARD_GOOGLE_BAZE is not set +# CONFIG_BOARD_GOOGLE_OBIWAN is not set +# CONFIG_BOARD_GOOGLE_SKYWALKER is not set +# CONFIG_BOARD_GOOGLE_YODA is not set + +# # Slippy # # CONFIG_BOARD_GOOGLE_FALCO is not set @@ -719,7 +788,6 @@ CONFIG_BOARD_GOOGLE_BOB=y CONFIG_DRIVER_TPM_SPI_BUS=0x0 CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS=0x5 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_DRIVER_TPM_I2C_BUS=0x0 CONFIG_DRIVER_TPM_I2C_ADDR=0x20 CONFIG_PMIC_BUS=-1 @@ -810,6 +878,9 @@ CONFIG_EC_GOOGLE_CHROMEEC_SPI_CHIP=0x0 CONFIG_EC_GOOGLE_CHROMEEC_RTC=y # CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL is not set # CONFIG_EC_GOOGLE_CHROMEEC_AUTO_FAN_CTRL is not set +CONFIG_EC_GOOGLE_CHROMEEC_READ_BATTERY_LONG_STRING=y +CONFIG_EC_GOOGLE_CHROMEEC_LPC_GENERIC_MEMORY_BASE=0xfe0b0000 +CONFIG_EC_GOOGLE_CHROMEEC_LPC_GENERIC_MEMORY_SIZE=0x10000 CONFIG_MAINBOARD_HAS_CHROMEOS=y # @@ -817,6 +888,7 @@ CONFIG_MAINBOARD_HAS_CHROMEOS=y # # end of ChromeOS +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_ARM64=y CONFIG_ARCH_BOOTBLOCK_ARM64=y CONFIG_ARCH_VERSTAGE_ARM64=y @@ -845,6 +917,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display # CONFIG_SOFTWARE_I2C is not set @@ -856,7 +929,10 @@ CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set CONFIG_COMMON_CBFS_SPI_WRAPPER=y CONFIG_SPI_FLASH=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set @@ -866,6 +942,7 @@ CONFIG_UART_OVERRIDE_REFCLK=y CONFIG_DRIVERS_UART_8250MEM=y CONFIG_DRIVERS_UART_8250MEM_32=y # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -978,6 +1055,7 @@ CONFIG_HAVE_MONOTONIC_TIMER=y # Payload # CONFIG_PAYLOAD_NONE=y +# CONFIG_PAYLOAD_FIT_SUPPORT is not set # end of Payload # @@ -1000,7 +1078,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set # CONFIG_DEBUG_MALLOC is not set # CONFIG_DEBUG_CONSOLE_INIT is not set @@ -1010,6 +1087,14 @@ CONFIG_PAYLOAD_NONE=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + +CONFIG_HAVE_EARLY_POWEROFF_SUPPORT=y CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_NO_XIP_EARLY_STAGES=y diff --git a/config/coreboot/gru_bob/target.cfg b/config/coreboot/gru_bob/target.cfg index e5866cb7..dda11b5f 100644 --- a/config/coreboot/gru_bob/target.cfg +++ b/config/coreboot/gru_bob/target.cfg @@ -2,5 +2,5 @@ tree="default" xarch="aarch64-elf arm-eabi" -payload_uboot="y" +payload_uboot="arm64" build_depend="u-boot/gru_bob" diff --git a/config/coreboot/gru_kevin/config/libgfxinit_corebootfb b/config/coreboot/gru_kevin/config/libgfxinit_corebootfb index be585271..8a9d72a1 100644 --- a/config/coreboot/gru_kevin/config/libgfxinit_corebootfb +++ b/config/coreboot/gru_kevin/config/libgfxinit_corebootfb @@ -9,13 +9,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y -# CONFIG_ALLOW_EXPERIMENTAL_CLANG is not set +# CONFIG_COMPILER_LLVM_CLANG is not set # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_COMPRESS_PRERAM_STAGES=y @@ -52,6 +54,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -63,6 +66,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -70,15 +74,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set CONFIG_VENDOR_GOOGLE=y +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -99,7 +107,9 @@ CONFIG_VENDOR_GOOGLE=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="Kevin" CONFIG_MAINBOARD_DIR="google/gru" @@ -113,17 +123,18 @@ CONFIG_CONSOLE_SERIAL=y CONFIG_MAX_CPUS=1 CONFIG_POST_DEVICE=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set # CONFIG_CHROMEOS is not set -CONFIG_OVERRIDE_DEVICETREE="" +CONFIG_ARM64_CURRENT_EL=3 +CONFIG_MEMLAYOUT_LD_FILE="src/soc/rockchip/rk3399/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +# CONFIG_CONSOLE_POST is not set CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=1 CONFIG_CONSOLE_SERIAL_UART_ADDRESS=0xFF1A0000 -# CONFIG_CONSOLE_POST is not set -CONFIG_MEMLAYOUT_LD_FILE="src/soc/rockchip/rk3399/memlayout.ld" CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 -CONFIG_ARM64_CURRENT_EL=3 CONFIG_SPI_FLASH_WINBOND=y # @@ -153,12 +164,22 @@ CONFIG_SPI_FLASH_WINBOND=y # CONFIG_BOARD_GOOGLE_ZAKO is not set # +# Bluey +# +# CONFIG_BOARD_GOOGLE_BLUEY is not set +# CONFIG_BOARD_GOOGLE_QUENBI is not set + +# # Brox # # CONFIG_BOARD_GOOGLE_BROX is not set +# CONFIG_BOARD_GOOGLE_BROX_RTK_EC is not set # CONFIG_BOARD_GOOGLE_BROX_EC_ISH is not set -# CONFIG_BOARD_GOOGLE_LOTSO is not set +# CONFIG_BOARD_GOOGLE_BROX_TI_PDC is not set +# CONFIG_BOARD_GOOGLE_CABOC is not set # CONFIG_BOARD_GOOGLE_GREENBAYUPOC is not set +# CONFIG_BOARD_GOOGLE_JUBILANT is not set +# CONFIG_BOARD_GOOGLE_LOTSO is not set # # Brya @@ -175,6 +196,7 @@ CONFIG_SPI_FLASH_WINBOND=y # CONFIG_BOARD_GOOGLE_CRAASKOV is not set # CONFIG_BOARD_GOOGLE_CONSTITUTION is not set # CONFIG_BOARD_GOOGLE_CROTA is not set +# CONFIG_BOARD_GOOGLE_DIRKS is not set # CONFIG_BOARD_GOOGLE_DOCHI is not set # CONFIG_BOARD_GOOGLE_DOMIKA is not set # CONFIG_BOARD_GOOGLE_FELWINTER is not set @@ -184,8 +206,10 @@ CONFIG_SPI_FLASH_WINBOND=y # CONFIG_BOARD_GOOGLE_GLADIOS is not set # CONFIG_BOARD_GOOGLE_GLASSWAY is not set # CONFIG_BOARD_GOOGLE_GOTHRAX is not set +# CONFIG_BOARD_GOOGLE_GUREN is not set # CONFIG_BOARD_GOOGLE_HADES is not set # CONFIG_BOARD_GOOGLE_KANO is not set +# CONFIG_BOARD_GOOGLE_KALADIN is not set # CONFIG_BOARD_GOOGLE_KINOX is not set # CONFIG_BOARD_GOOGLE_KULDAX is not set # CONFIG_BOARD_GOOGLE_JOXER is not set @@ -193,6 +217,7 @@ CONFIG_SPI_FLASH_WINBOND=y # CONFIG_BOARD_GOOGLE_MARASOV is not set # CONFIG_BOARD_GOOGLE_MITHRAX is not set # CONFIG_BOARD_GOOGLE_MOLI is not set +# CONFIG_BOARD_GOOGLE_MOXIE is not set # CONFIG_BOARD_GOOGLE_NIVVIKS is not set # CONFIG_BOARD_GOOGLE_NEREID is not set # CONFIG_BOARD_GOOGLE_NOKRIS is not set @@ -201,19 +226,24 @@ CONFIG_SPI_FLASH_WINBOND=y # CONFIG_BOARD_GOOGLE_PIRRHA is not set # CONFIG_BOARD_GOOGLE_PRIMUS is not set # CONFIG_BOARD_GOOGLE_PUJJO is not set +# CONFIG_BOARD_GOOGLE_PUJJONIRU is not set # CONFIG_BOARD_GOOGLE_QUANDISO is not set +# CONFIG_BOARD_GOOGLE_QUANDISO2 is not set # CONFIG_BOARD_GOOGLE_REDRIX is not set # CONFIG_BOARD_GOOGLE_REDRIX4ES is not set # CONFIG_BOARD_GOOGLE_RIVEN is not set +# CONFIG_BOARD_GOOGLE_RULL is not set # CONFIG_BOARD_GOOGLE_SKOLAS is not set # CONFIG_BOARD_GOOGLE_SKOLAS4ES is not set # CONFIG_BOARD_GOOGLE_TAEKO is not set # CONFIG_BOARD_GOOGLE_TAEKO4ES is not set # CONFIG_BOARD_GOOGLE_TANIKS is not set +# CONFIG_BOARD_GOOGLE_TELIKS is not set # CONFIG_BOARD_GOOGLE_TEREID is not set # CONFIG_BOARD_GOOGLE_TIVVIKS is not set # CONFIG_BOARD_GOOGLE_TRULO is not set # CONFIG_BOARD_GOOGLE_ULDREN is not set +# CONFIG_BOARD_GOOGLE_ULDRENITE is not set # CONFIG_BOARD_GOOGLE_VELL is not set # CONFIG_BOARD_GOOGLE_VOLMAR is not set # CONFIG_BOARD_GOOGLE_XIVU is not set @@ -226,7 +256,13 @@ CONFIG_SPI_FLASH_WINBOND=y # CONFIG_BOARD_GOOGLE_YAVISTA is not set # CONFIG_BOARD_GOOGLE_SUNDANCE is not set # CONFIG_BOARD_GOOGLE_PUJJOGA is not set +# CONFIG_BOARD_GOOGLE_PUJJOGATWIN is not set +# CONFIG_BOARD_GOOGLE_PUJJOLO is not set # CONFIG_BOARD_GOOGLE_ORISA is not set +# CONFIG_BOARD_GOOGLE_TELITH is not set +# CONFIG_BOARD_GOOGLE_MELIKS is not set +# CONFIG_BOARD_GOOGLE_EPIC is not set +# CONFIG_BOARD_GOOGLE_PUJJOCENTO is not set # # Butterfly @@ -265,6 +301,7 @@ CONFIG_SPI_FLASH_WINBOND=y # # CONFIG_BOARD_GOOGLE_STARMIE is not set # CONFIG_BOARD_GOOGLE_WUGTRIO is not set +# CONFIG_BOARD_GOOGLE_WYRDEER is not set # # Cyan @@ -336,6 +373,16 @@ CONFIG_SPI_FLASH_WINBOND=y # Fatcat # # CONFIG_BOARD_GOOGLE_FATCAT is not set +# CONFIG_BOARD_GOOGLE_FATCAT4ES is not set +# CONFIG_BOARD_GOOGLE_FATCATISH is not set +# CONFIG_BOARD_GOOGLE_FATCATITE is not set +# CONFIG_BOARD_GOOGLE_FATCATITE4ES is not set +# CONFIG_BOARD_GOOGLE_FATCATNUVO is not set +# CONFIG_BOARD_GOOGLE_FATCATNUVO4ES is not set +# CONFIG_BOARD_GOOGLE_FELINO is not set +# CONFIG_BOARD_GOOGLE_FELINO4ES is not set +# CONFIG_BOARD_GOOGLE_FRANCKA is not set +# CONFIG_BOARD_GOOGLE_KINMEN is not set # # Fizz @@ -500,6 +547,16 @@ CONFIG_BOARD_GOOGLE_KEVIN=y # CONFIG_BOARD_GOOGLE_HANA is not set # +# Ocelot +# +# CONFIG_BOARD_GOOGLE_OCELOT is not set +# CONFIG_BOARD_GOOGLE_OCELOTITE is not set +# CONFIG_BOARD_GOOGLE_OCELOTMCHP is not set +# CONFIG_BOARD_GOOGLE_OCELOT4ES is not set +# CONFIG_BOARD_GOOGLE_OCELOTITE4ES is not set +# CONFIG_BOARD_GOOGLE_OCELOTMCHP4ES is not set + +# # Octopus # # CONFIG_BOARD_GOOGLE_AMPTON is not set @@ -578,6 +635,8 @@ CONFIG_BOARD_GOOGLE_KEVIN=y # # Rauru # +# CONFIG_BOARD_GOOGLE_HYLIA is not set +# CONFIG_BOARD_GOOGLE_NAVI is not set # CONFIG_BOARD_GOOGLE_RAURU is not set # @@ -605,6 +664,7 @@ CONFIG_BOARD_GOOGLE_KEVIN=y # CONFIG_BOARD_GOOGLE_REX64 is not set # CONFIG_BOARD_GOOGLE_SCREEBO is not set # CONFIG_BOARD_GOOGLE_SCREEBO4ES is not set +# CONFIG_BOARD_GOOGLE_KANIX is not set # # Sarien @@ -622,6 +682,15 @@ CONFIG_BOARD_GOOGLE_KEVIN=y # CONFIG_BOARD_GOOGLE_WINTERHOLD is not set # +# Skywalker +# +# CONFIG_BOARD_GOOGLE_ANAKIN is not set +# CONFIG_BOARD_GOOGLE_BAZE is not set +# CONFIG_BOARD_GOOGLE_OBIWAN is not set +# CONFIG_BOARD_GOOGLE_SKYWALKER is not set +# CONFIG_BOARD_GOOGLE_YODA is not set + +# # Slippy # # CONFIG_BOARD_GOOGLE_FALCO is not set @@ -719,7 +788,6 @@ CONFIG_BOARD_GOOGLE_KEVIN=y CONFIG_DRIVER_TPM_SPI_BUS=0x0 CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS=0x5 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_DRIVER_TPM_I2C_BUS=0x0 CONFIG_DRIVER_TPM_I2C_ADDR=0x20 CONFIG_PMIC_BUS=-1 @@ -809,6 +877,8 @@ CONFIG_EC_GOOGLE_CHROMEEC_SPI_CHIP=0x0 CONFIG_EC_GOOGLE_CHROMEEC_RTC=y # CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_EXTERNAL is not set # CONFIG_EC_GOOGLE_CHROMEEC_AUTO_FAN_CTRL is not set +CONFIG_EC_GOOGLE_CHROMEEC_LPC_GENERIC_MEMORY_BASE=0xfe0b0000 +CONFIG_EC_GOOGLE_CHROMEEC_LPC_GENERIC_MEMORY_SIZE=0x10000 CONFIG_MAINBOARD_HAS_CHROMEOS=y # @@ -816,6 +886,7 @@ CONFIG_MAINBOARD_HAS_CHROMEOS=y # # end of ChromeOS +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_ARM64=y CONFIG_ARCH_BOOTBLOCK_ARM64=y CONFIG_ARCH_VERSTAGE_ARM64=y @@ -844,6 +915,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display # CONFIG_SOFTWARE_I2C is not set @@ -855,7 +927,10 @@ CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set CONFIG_COMMON_CBFS_SPI_WRAPPER=y CONFIG_SPI_FLASH=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set @@ -865,6 +940,7 @@ CONFIG_UART_OVERRIDE_REFCLK=y CONFIG_DRIVERS_UART_8250MEM=y CONFIG_DRIVERS_UART_8250MEM_32=y # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -975,6 +1051,7 @@ CONFIG_HAVE_MONOTONIC_TIMER=y # Payload # CONFIG_PAYLOAD_NONE=y +# CONFIG_PAYLOAD_FIT_SUPPORT is not set # end of Payload # @@ -997,7 +1074,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set # CONFIG_DEBUG_MALLOC is not set # CONFIG_DEBUG_CONSOLE_INIT is not set @@ -1007,6 +1083,14 @@ CONFIG_PAYLOAD_NONE=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + +CONFIG_HAVE_EARLY_POWEROFF_SUPPORT=y CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_NO_XIP_EARLY_STAGES=y diff --git a/config/coreboot/gru_kevin/target.cfg b/config/coreboot/gru_kevin/target.cfg index 81a93f27..26fd442b 100644 --- a/config/coreboot/gru_kevin/target.cfg +++ b/config/coreboot/gru_kevin/target.cfg @@ -2,5 +2,5 @@ tree="default" xarch="aarch64-elf arm-eabi" -payload_uboot="y" +payload_uboot="arm64" build_depend="u-boot/gru_kevin" diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb index d51bf0f8..e734dadb 100644 --- a/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="EliteBook 2170p" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops" @@ -123,28 +132,30 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="2170p" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=0 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2170p" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -159,17 +170,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set CONFIG_BOARD_HP_2170P=y @@ -187,7 +202,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y CONFIG_EC_HP_KBC1126_GPE=0x16 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2170p" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -247,9 +261,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -266,6 +281,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -313,6 +329,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -381,6 +402,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -404,6 +426,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -424,6 +449,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -455,9 +481,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -479,6 +508,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -534,7 +564,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -660,7 +689,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -682,6 +710,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode index 8983c8d1..517ad32d 100644 --- a/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/hp2170p_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="EliteBook 2170p" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops" @@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="2170p" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=0 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2170p" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -157,17 +168,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set CONFIG_BOARD_HP_2170P=y @@ -185,7 +200,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y CONFIG_EC_HP_KBC1126_GPE=0x16 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2170p" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -245,9 +259,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -264,6 +279,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -311,6 +327,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -379,6 +400,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -402,6 +424,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -420,6 +445,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -451,9 +477,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -475,6 +504,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -531,7 +561,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -657,7 +686,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -679,6 +707,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp2170p_16mb/target.cfg b/config/coreboot/hp2170p_16mb/target.cfg index e1cffa41..d6868831 100644 --- a/config/coreboot/hp2170p_16mb/target.cfg +++ b/config/coreboot/hp2170p_16mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="hp2170p" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb index b238d1b0..7b953cff 100644 --- a/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="EliteBook 2560p" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops" @@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="2560p" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=1 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2560p" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -157,17 +168,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -185,7 +200,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y CONFIG_EC_HP_KBC1126_GPE=0x16 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2560p" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -244,9 +258,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -263,6 +278,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -310,6 +326,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -377,6 +398,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -400,6 +422,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -420,6 +445,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -451,9 +477,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -474,6 +503,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -529,7 +559,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -637,7 +666,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -659,6 +687,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode index 8a65a765..d9be7fdf 100644 --- a/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/hp2560p_8mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="EliteBook 2560p" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops" @@ -119,28 +128,30 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="2560p" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=1 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2560p" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -155,17 +166,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -183,7 +198,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y CONFIG_EC_HP_KBC1126_GPE=0x16 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2560p" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -242,9 +256,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -261,6 +276,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -308,6 +324,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -375,6 +396,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -398,6 +420,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -416,6 +441,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -447,9 +473,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -470,6 +499,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -526,7 +556,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -634,7 +663,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -656,6 +684,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp2560p_8mb/target.cfg b/config/coreboot/hp2560p_8mb/target.cfg index 5715390e..fce385d9 100644 --- a/config/coreboot/hp2560p_8mb/target.cfg +++ b/config/coreboot/hp2560p_8mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="hp2560p" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb index 7cb7ec72..ef2bd843 100644 --- a/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="EliteBook 2570p" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops" @@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="2570p" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2570p" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -156,17 +167,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -184,7 +199,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y CONFIG_EC_HP_KBC1126_GPE=0x16 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2570p" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -243,9 +257,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -262,6 +277,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -309,6 +325,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -376,6 +397,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -399,6 +421,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -419,6 +444,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -449,9 +475,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -472,6 +501,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -523,7 +553,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -631,7 +660,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -653,6 +681,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode index 1ba19c1d..0df99d3c 100644 --- a/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/hp2570p_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="EliteBook 2570p" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops" @@ -119,27 +128,29 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="2570p" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2570p" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -154,17 +165,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -182,7 +197,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y CONFIG_EC_HP_KBC1126_GPE=0x16 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 2570p" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -241,9 +255,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -260,6 +275,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -307,6 +323,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -374,6 +395,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -397,6 +419,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -415,6 +440,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -445,9 +471,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -468,6 +497,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -520,7 +550,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -628,7 +657,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -650,6 +678,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp2570p_16mb/target.cfg b/config/coreboot/hp2570p_16mb/target.cfg index fb5d41e1..26c80f5f 100644 --- a/config/coreboot/hp2570p_16mb/target.cfg +++ b/config/coreboot/hp2570p_16mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="hp2570p" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb index 81ca81de..ef110ae5 100644 --- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb +++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,11 +111,12 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set -CONFIG_BOARD_SPECIFIC_OPTIONS=y +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="HP Compaq 8200 Elite SFF PC" CONFIG_MAINBOARD_VERSION="1.0" -CONFIG_MAINBOARD_DIR="hp/compaq_8200_elite_sff" +CONFIG_MAINBOARD_DIR="hp/snb_ivb_desktops" CONFIG_VGA_BIOS_ID="8086,0106" CONFIG_DIMM_MAX=4 CONFIG_DIMM_SPD_SIZE=256 @@ -124,27 +132,30 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="compaq_8200_elite_sff" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 -CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -159,17 +170,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd_4mb" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -183,8 +198,8 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y # CONFIG_BOARD_HP_FOLIO_9470M is not set # CONFIG_BOARD_HP_PROBOOK_6360B is not set # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set +CONFIG_BOARD_HP_SNB_IVB_DESKTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -243,9 +258,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -262,6 +278,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -309,6 +326,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -365,6 +387,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -388,6 +411,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -408,6 +434,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -439,9 +466,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -463,6 +493,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -517,7 +548,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -643,7 +673,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -665,6 +694,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode index cacd0278..0df68553 100644 --- a/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode +++ b/config/coreboot/hp8200sff_4mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,11 +111,12 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set -CONFIG_BOARD_SPECIFIC_OPTIONS=y +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="HP Compaq 8200 Elite SFF PC" CONFIG_MAINBOARD_VERSION="1.0" -CONFIG_MAINBOARD_DIR="hp/compaq_8200_elite_sff" +CONFIG_MAINBOARD_DIR="hp/snb_ivb_desktops" CONFIG_VGA_BIOS_ID="8086,0106" CONFIG_DIMM_MAX=4 CONFIG_DIMM_SPD_SIZE=256 @@ -122,27 +130,30 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="compaq_8200_elite_sff" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 -CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -157,17 +168,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd_4mb" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -181,8 +196,8 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y # CONFIG_BOARD_HP_FOLIO_9470M is not set # CONFIG_BOARD_HP_PROBOOK_6360B is not set # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set +CONFIG_BOARD_HP_SNB_IVB_DESKTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -241,9 +256,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -260,6 +276,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -307,6 +324,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -363,6 +385,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -386,6 +409,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -404,6 +430,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -435,9 +462,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -459,6 +489,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -514,7 +545,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -640,7 +670,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -662,6 +691,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp8200sff_4mb/target.cfg b/config/coreboot/hp8200sff_4mb/target.cfg index 521ba0ec..76effd9f 100644 --- a/config/coreboot/hp8200sff_4mb/target.cfg +++ b/config/coreboot/hp8200sff_4mb/target.cfg @@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci" grubtree="nvme" vcfg="hp8200sff" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb index 44097f5c..4a46ba5b 100644 --- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,11 +111,12 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set -CONFIG_BOARD_SPECIFIC_OPTIONS=y +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="HP Compaq 8200 Elite SFF PC" CONFIG_MAINBOARD_VERSION="1.0" -CONFIG_MAINBOARD_DIR="hp/compaq_8200_elite_sff" +CONFIG_MAINBOARD_DIR="hp/snb_ivb_desktops" CONFIG_VGA_BIOS_ID="8086,0106" CONFIG_DIMM_MAX=4 CONFIG_DIMM_SPD_SIZE=256 @@ -124,27 +132,30 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="compaq_8200_elite_sff" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 -CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -159,17 +170,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -183,8 +198,8 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y # CONFIG_BOARD_HP_FOLIO_9470M is not set # CONFIG_BOARD_HP_PROBOOK_6360B is not set # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set +CONFIG_BOARD_HP_SNB_IVB_DESKTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -243,9 +258,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -262,6 +278,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -309,6 +326,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -365,6 +387,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -388,6 +411,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -408,6 +434,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -439,9 +466,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -463,6 +493,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -517,7 +548,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -643,7 +673,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -665,6 +694,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode index c5fb624b..6295a22b 100644 --- a/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/hp8200sff_8mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,11 +111,12 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set -CONFIG_BOARD_SPECIFIC_OPTIONS=y +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="HP Compaq 8200 Elite SFF PC" CONFIG_MAINBOARD_VERSION="1.0" -CONFIG_MAINBOARD_DIR="hp/compaq_8200_elite_sff" +CONFIG_MAINBOARD_DIR="hp/snb_ivb_desktops" CONFIG_VGA_BIOS_ID="8086,0106" CONFIG_DIMM_MAX=4 CONFIG_DIMM_SPD_SIZE=256 @@ -122,27 +130,30 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="compaq_8200_elite_sff" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 -CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -157,17 +168,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8200sff/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8200sff/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8200sff/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -181,8 +196,8 @@ CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC=y # CONFIG_BOARD_HP_FOLIO_9470M is not set # CONFIG_BOARD_HP_PROBOOK_6360B is not set # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set +CONFIG_BOARD_HP_SNB_IVB_DESKTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq 8200 Elite SFF PC" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -241,9 +256,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -260,6 +276,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -307,6 +324,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -363,6 +385,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -386,6 +409,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -404,6 +430,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -435,9 +462,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -459,6 +489,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -514,7 +545,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -640,7 +670,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -662,6 +691,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp8200sff_8mb/target.cfg b/config/coreboot/hp8200sff_8mb/target.cfg index 521ba0ec..76effd9f 100644 --- a/config/coreboot/hp8200sff_8mb/target.cfg +++ b/config/coreboot/hp8200sff_8mb/target.cfg @@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci" grubtree="nvme" vcfg="hp8200sff" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb b/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb index 16bf95e9..bef0f52e 100644 --- a/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/hp820g2_12mb/config/libgfxinit_corebootfb @@ -10,13 +10,14 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -56,6 +57,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -67,6 +69,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -74,15 +77,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -103,7 +110,9 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="EliteBook 820 G2" CONFIG_MAINBOARD_VERSION="1.0" @@ -123,23 +132,25 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2" +# CONFIG_CONSOLE_POST is not set CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xff7c0000 CONFIG_DCACHE_RAM_SIZE=0x10000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -155,17 +166,21 @@ CONFIG_ME_BIN_PATH="../../../vendorfiles/hp820g2/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp820g2/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_PCIEXP_AER=y -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set CONFIG_BOARD_HP_ELITEBOOK_820_G2=y # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -181,7 +196,6 @@ CONFIG_BOARD_HP_ELITEBOOK_820_G2=y # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set CONFIG_EC_HP_KBC1126_GPE=0x6 # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2" CONFIG_HAVE_IFD_BIN=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" @@ -238,6 +252,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 @@ -265,6 +280,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_DISABLE_ME_PCI=y CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -346,6 +362,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -367,6 +384,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -387,6 +407,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -414,9 +435,12 @@ CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -438,6 +462,7 @@ CONFIG_DRIVERS_UART=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -491,7 +516,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -617,7 +641,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SMBUS is not set @@ -637,6 +660,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_REG_SCRIPT=y CONFIG_MAX_REBOOT_CNT=3 diff --git a/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode b/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode index ae46144c..9ddee822 100644 --- a/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/hp820g2_12mb/config/libgfxinit_txtmode @@ -10,13 +10,14 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -56,6 +57,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -67,6 +69,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -74,15 +77,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -103,7 +110,9 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="EliteBook 820 G2" CONFIG_MAINBOARD_VERSION="1.0" @@ -121,23 +130,25 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2" +# CONFIG_CONSOLE_POST is not set CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xff7c0000 CONFIG_DCACHE_RAM_SIZE=0x10000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -153,17 +164,21 @@ CONFIG_ME_BIN_PATH="../../../vendorfiles/hp820g2/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp820g2/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_PCIEXP_AER=y -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set CONFIG_BOARD_HP_ELITEBOOK_820_G2=y # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -179,7 +194,6 @@ CONFIG_BOARD_HP_ELITEBOOK_820_G2=y # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set CONFIG_EC_HP_KBC1126_GPE=0x6 # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2" CONFIG_HAVE_IFD_BIN=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" @@ -236,6 +250,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 @@ -263,6 +278,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_DISABLE_ME_PCI=y CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -344,6 +360,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -365,6 +382,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -383,6 +403,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -410,9 +431,12 @@ CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -434,6 +458,7 @@ CONFIG_DRIVERS_UART=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -488,7 +513,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -614,7 +638,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SMBUS is not set @@ -634,6 +657,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_REG_SCRIPT=y CONFIG_MAX_REBOOT_CNT=3 diff --git a/config/coreboot/hp820g2_12mb/target.cfg b/config/coreboot/hp820g2_12mb/target.cfg index 7fe45119..8a69483f 100644 --- a/config/coreboot/hp820g2_12mb/target.cfg +++ b/config/coreboot/hp820g2_12mb/target.cfg @@ -6,7 +6,7 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="nvme ahci" -grubtree="xhci" +grubtree="xhci_nvme" vcfg="hp820g2" -build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot" +payload_uboot="amd64" diff --git a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb index 12d0aefd..3f83d6ab 100644 --- a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -56,6 +57,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -67,6 +69,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -74,15 +77,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -103,7 +110,9 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="HP Compaq Elite 8300 CMT" CONFIG_MAINBOARD_VERSION="1.0" @@ -123,26 +132,29 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 CMT" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -157,17 +169,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -182,7 +198,6 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y # CONFIG_BOARD_HP_PROBOOK_6360B is not set # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 CMT" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -241,9 +256,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -260,6 +276,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -307,6 +324,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -363,6 +385,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -386,6 +409,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -406,6 +432,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -426,7 +453,7 @@ CONFIG_PCIEXP_HOTPLUG_IO=0x2000 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 CONFIG_INTEL_GMA_HAVE_VBT=y -# CONFIG_INTEL_GMA_ADD_VBT is not set +CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set @@ -437,9 +464,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -461,6 +491,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -469,6 +500,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" CONFIG_GFX_GMA=y CONFIG_GFX_GMA_DYN_CPU=y CONFIG_GFX_GMA_GENERATION="Ironlake" @@ -511,7 +546,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -637,7 +671,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -659,6 +692,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode index cf23e745..814275e7 100644 --- a/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/hp8300cmt_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -56,6 +57,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -67,6 +69,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -74,15 +77,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -103,7 +110,9 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="HP Compaq Elite 8300 CMT" CONFIG_MAINBOARD_VERSION="1.0" @@ -121,26 +130,29 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 CMT" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -155,17 +167,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -180,7 +196,6 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT=y # CONFIG_BOARD_HP_PROBOOK_6360B is not set # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 CMT" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -239,9 +254,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -258,6 +274,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -305,6 +322,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -361,6 +383,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -384,6 +407,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -402,6 +428,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -422,7 +449,7 @@ CONFIG_PCIEXP_HOTPLUG_IO=0x2000 CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 CONFIG_INTEL_GMA_HAVE_VBT=y -# CONFIG_INTEL_GMA_ADD_VBT is not set +CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set @@ -433,9 +460,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -457,6 +487,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -465,6 +496,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" CONFIG_GFX_GMA=y CONFIG_GFX_GMA_DYN_CPU=y CONFIG_GFX_GMA_GENERATION="Ironlake" @@ -508,7 +543,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -634,7 +668,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -656,6 +689,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp8300cmt_16mb/target.cfg b/config/coreboot/hp8300cmt_16mb/target.cfg index 5bd323c9..f3fb43a7 100644 --- a/config/coreboot/hp8300cmt_16mb/target.cfg +++ b/config/coreboot/hp8300cmt_16mb/target.cfg @@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci" grubtree="nvme" vcfg="ivybridge" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb index c931923e..64dc2901 100644 --- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -56,6 +57,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -67,6 +69,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -74,15 +77,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -103,12 +110,13 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set -CONFIG_BOARD_SPECIFIC_OPTIONS=y +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="HP Compaq Elite 8300 USDT" CONFIG_MAINBOARD_VERSION="1.0" -CONFIG_MAINBOARD_DIR="hp/compaq_elite_8300_usdt" -CONFIG_VGA_BIOS_ID="8086,0152" +CONFIG_MAINBOARD_DIR="hp/snb_ivb_desktops" +CONFIG_VGA_BIOS_ID="8086,0106" CONFIG_DIMM_MAX=4 CONFIG_DIMM_SPD_SIZE=256 CONFIG_FMDFILE="" @@ -123,26 +131,30 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="compaq_elite_8300_usdt" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 USDT" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -157,17 +169,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -181,8 +197,8 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y # CONFIG_BOARD_HP_FOLIO_9470M is not set # CONFIG_BOARD_HP_PROBOOK_6360B is not set # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set +CONFIG_BOARD_HP_SNB_IVB_DESKTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 USDT" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -241,9 +257,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -260,6 +277,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -307,6 +325,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -363,6 +386,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -386,6 +410,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -406,6 +433,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -437,9 +465,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -461,6 +492,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -511,7 +543,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -637,7 +668,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -659,6 +689,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode index 6f639aa3..9330e338 100644 --- a/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/hp8300usdt_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -56,6 +57,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -67,6 +69,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -74,15 +77,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -103,12 +110,13 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set -CONFIG_BOARD_SPECIFIC_OPTIONS=y +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="HP Compaq Elite 8300 USDT" CONFIG_MAINBOARD_VERSION="1.0" -CONFIG_MAINBOARD_DIR="hp/compaq_elite_8300_usdt" -CONFIG_VGA_BIOS_ID="8086,0152" +CONFIG_MAINBOARD_DIR="hp/snb_ivb_desktops" +CONFIG_VGA_BIOS_ID="8086,0106" CONFIG_DIMM_MAX=4 CONFIG_DIMM_SPD_SIZE=256 CONFIG_FMDFILE="" @@ -121,26 +129,30 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_VARIANT_DIR="compaq_elite_8300_usdt" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(CONFIG_VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 USDT" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -155,17 +167,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp8300usdt/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp8300usdt/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp8300usdt/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -179,8 +195,8 @@ CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT=y # CONFIG_BOARD_HP_FOLIO_9470M is not set # CONFIG_BOARD_HP_PROBOOK_6360B is not set # CONFIG_BOARD_HP_REVOLVE_810_G1 is not set +CONFIG_BOARD_HP_SNB_IVB_DESKTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="HP Compaq Elite 8300 USDT" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -239,9 +255,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -258,6 +275,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -305,6 +323,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -361,6 +384,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -384,6 +408,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -402,6 +429,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -433,9 +461,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -457,6 +488,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -508,7 +540,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -634,7 +665,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -656,6 +686,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp8300usdt_16mb/target.cfg b/config/coreboot/hp8300usdt_16mb/target.cfg index 6cbab731..595ad782 100644 --- a/config/coreboot/hp8300usdt_16mb/target.cfg +++ b/config/coreboot/hp8300usdt_16mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb index eacdf0c2..31b9d737 100644 --- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="EliteBook 8460p" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops" @@ -123,28 +132,30 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="8460p" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=1 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8460p" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -159,17 +170,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -187,7 +202,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y CONFIG_EC_HP_KBC1126_GPE=0x16 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8460p" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -247,9 +261,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -266,6 +281,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -313,6 +329,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -381,6 +402,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -404,6 +426,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -424,6 +449,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -455,9 +481,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -479,6 +508,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -534,7 +564,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -660,7 +689,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -682,6 +710,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode index d4ad6fd6..e24295f3 100644 --- a/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/hp8460pintel_8mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="EliteBook 8460p" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops" @@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="8460p" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=1 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8460p" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -157,17 +168,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -185,7 +200,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y CONFIG_EC_HP_KBC1126_GPE=0x16 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8460p" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -245,9 +259,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -264,6 +279,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -311,6 +327,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -379,6 +400,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -402,6 +424,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -420,6 +445,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -451,9 +477,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -475,6 +504,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -531,7 +561,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -657,7 +686,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -679,6 +707,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp8460pintel_8mb/target.cfg b/config/coreboot/hp8460pintel_8mb/target.cfg index d6179420..255bfac7 100644 --- a/config/coreboot/hp8460pintel_8mb/target.cfg +++ b/config/coreboot/hp8460pintel_8mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="hp8460pintel" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb index f4c3c3eb..5a472c2a 100644 --- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="EliteBook 8470p" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops" @@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="8470p" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8470p" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -158,17 +169,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -186,7 +201,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y CONFIG_EC_HP_KBC1126_GPE=0x16 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8470p" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -246,9 +260,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -265,6 +280,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -312,6 +328,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -380,6 +401,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -403,6 +425,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -423,6 +448,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -453,9 +479,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -477,6 +506,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -528,7 +558,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -654,7 +683,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -676,6 +704,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode index 959016ae..19127844 100644 --- a/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/hp8470pintel_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="EliteBook 8470p" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops" @@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="8470p" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8470p" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -156,17 +167,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -184,7 +199,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y CONFIG_EC_HP_KBC1126_GPE=0x16 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8470p" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -244,9 +258,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -263,6 +278,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -310,6 +326,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -378,6 +399,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -401,6 +423,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -419,6 +444,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -449,9 +475,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -473,6 +502,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -525,7 +555,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -651,7 +680,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -673,6 +701,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp8470pintel_16mb/target.cfg b/config/coreboot/hp8470pintel_16mb/target.cfg index 65828b25..01b2ed5b 100644 --- a/config/coreboot/hp8470pintel_16mb/target.cfg +++ b/config/coreboot/hp8470pintel_16mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="hp8470pintel" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/hp8560w_8mb/config/normal b/config/coreboot/hp8560w_8mb/config/normal index c332d78e..4c1cc1b9 100644 --- a/config/coreboot/hp8560w_8mb/config/normal +++ b/config/coreboot/hp8560w_8mb/config/normal @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -56,6 +57,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -67,6 +69,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -74,15 +77,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -103,7 +110,9 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="EliteBook 8560w" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops" @@ -120,27 +129,29 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="8560w" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=1 CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8560w" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -155,17 +166,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_sandybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_sandybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_sandybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -183,7 +198,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y CONFIG_EC_HP_KBC1126_GPE=0x16 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8560w" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -242,9 +256,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -261,6 +276,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -308,6 +324,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -376,6 +397,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -399,6 +421,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -435,9 +460,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -459,6 +487,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -502,7 +531,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -628,7 +656,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -645,6 +672,13 @@ CONFIG_HAVE_EM100_SUPPORT=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb index 43003291..e931b384 100644 --- a/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="EliteBook Folio 9470m" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops" @@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="folio_9470m" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=0 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook Folio 9470m" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -157,17 +168,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -185,7 +200,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y CONFIG_EC_HP_KBC1126_GPE=0x16 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook Folio 9470m" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -244,9 +258,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -263,6 +278,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -310,6 +326,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -377,6 +398,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -400,6 +422,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -420,6 +445,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -451,9 +477,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -474,6 +503,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -529,7 +559,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -637,7 +666,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -659,6 +687,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode index 42c7eeba..5b5acc17 100644 --- a/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/hp9470m_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set CONFIG_VENDOR_HP=y # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_HP=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="EliteBook Folio 9470m" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops" @@ -119,28 +128,30 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="folio_9470m" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=0 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook Folio 9470m" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -155,17 +166,21 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/hp_ivybridge/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/hp_ivybridge/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/hp_ivybridge/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set # CONFIG_BOARD_HP_280_G2 is not set -# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set # CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set -# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set # CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set # CONFIG_BOARD_HP_PRO_3500_SERIES is not set +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set # CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set # CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set # CONFIG_BOARD_HP_2170P is not set @@ -183,7 +198,6 @@ CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y CONFIG_EC_HP_KBC1126_GPE=0x16 CONFIG_BOARD_HP_SNB_IVB_LAPTOPS_COMMON=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook Folio 9470m" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -242,9 +256,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -261,6 +276,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -308,6 +324,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -375,6 +396,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -398,6 +420,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -416,6 +441,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -447,9 +473,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -470,6 +499,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -526,7 +556,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -634,7 +663,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -656,6 +684,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/hp9470m_16mb/target.cfg b/config/coreboot/hp9470m_16mb/target.cfg index e4dbdc93..6ebd81c5 100644 --- a/config/coreboot/hp9470m_16mb/target.cfg +++ b/config/coreboot/hp9470m_16mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="hp9470m" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/hppro3500series_8mb/config/libgfxinit_corebootfb b/config/coreboot/hppro3500series_8mb/config/libgfxinit_corebootfb new file mode 100644 index 00000000..c6c8596c --- /dev/null +++ b/config/coreboot/hppro3500series_8mb/config/libgfxinit_corebootfb @@ -0,0 +1,681 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_LTO is not set +# CONFIG_IWYU is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set +CONFIG_COMPRESS_RAMSTAGE_LZMA=y +# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_USE_QC_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_RAMSTAGE=y +# CONFIG_ASAN is not set +# CONFIG_NO_STAGE_CACHE is not set +CONFIG_TSEG_STAGE_CACHE=y +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_BOOTSPLASH_IMAGE is not set + +# +# Software Bill Of Materials (SBOM) +# +# CONFIG_SBOM is not set +# end of Software Bill Of Materials (SBOM) +# end of General setup + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +# CONFIG_VENDOR_ACER is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BOSTENTECH is not set +# CONFIG_VENDOR_BYTEDANCE is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_CLEVO is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set +# CONFIG_VENDOR_DELL is not set +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set +# CONFIG_VENDOR_EXAMPLE is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set +CONFIG_VENDOR_HP=y +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_INVENTEC is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set +# CONFIG_VENDOR_LENOVO is not set +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PINE64 is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PRODRIVE is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_STARLABS is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set +# CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set +CONFIG_MAINBOARD_PART_NUMBER="Pro 3500 Series" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="hp/pro_3x00_series" +CONFIG_VGA_BIOS_ID="8086,0106" +CONFIG_DIMM_MAX=4 +CONFIG_DIMM_SPD_SIZE=256 +CONFIG_FMDFILE="" +# CONFIG_NO_POST is not set +CONFIG_MAINBOARD_VENDOR="HP" +CONFIG_CBFS_SIZE=0x7E7000 +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840 +CONFIG_MAX_CPUS=8 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_IO=y +CONFIG_VARIANT_DIR="pro_3500_series" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set +# CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +# CONFIG_PCIEXP_L1_SUB_STATE is not set +# CONFIG_PCIEXP_CLK_PM is not set +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" +CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_USBDEBUG_HCD_INDEX=2 +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Pro 3500 Series" +# CONFIG_CONSOLE_POST is not set +CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" +CONFIG_MAX_SOCKET=1 +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +CONFIG_DCACHE_RAM_BASE=0xfefe0000 +CONFIG_DCACHE_RAM_SIZE=0x20000 +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x10000 +CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_DRIVERS_INTEL_WIFI=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/hppro3500series/ifd" +CONFIG_ME_BIN_PATH="../../../vendorfiles/hppro3500series/me.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set +# CONFIG_BOARD_HP_280_G2 is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set +# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set +# CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set +CONFIG_BOARD_HP_PRO_3500_SERIES=y +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set +# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set +# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set +# CONFIG_BOARD_HP_2170P is not set +# CONFIG_BOARD_HP_2560P is not set +# CONFIG_BOARD_HP_2570P is not set +# CONFIG_BOARD_HP_2760P is not set +# CONFIG_BOARD_HP_8460P is not set +# CONFIG_BOARD_HP_8470P is not set +# CONFIG_BOARD_HP_8560W is not set +# CONFIG_BOARD_HP_8770W is not set +# CONFIG_BOARD_HP_FOLIO_9470M is not set +# CONFIG_BOARD_HP_PROBOOK_6360B is not set +# CONFIG_BOARD_HP_REVOLVE_810_G1 is not set +CONFIG_BOARD_HP_PRO_3X00_SERIES_COMMON=y +# CONFIG_DEBUG_SMI is not set +CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_HOTPLUG_BUSES=8 +CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 +CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="PNP0F13" +CONFIG_GFX_GMA_PANEL_1_PORT="eDP" +CONFIG_D3COLD_SUPPORT=y +CONFIG_GFX_GMA_PANEL_1_ON_EDP=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 +CONFIG_HEAP_SIZE=0x100000 +CONFIG_EC_GPE_SCI=0x50 +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +CONFIG_BOARD_ROMSIZE_KB_8192=y +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +CONFIG_COREBOOT_ROMSIZE_KB_8192=y +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=8192 +CONFIG_ROM_SIZE=0x00800000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=0 +# end of Mainboard + +# +# Chipset +# + +# +# SoC +# +CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb" +CONFIG_CBFS_MCACHE_SIZE=0x4000 +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_SMM_TSEG_SIZE=0x800000 +CONFIG_SMM_RESERVED_SIZE=0x100000 +CONFIG_SMM_MODULE_STACK_SIZE=0x400 +# CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 +CONFIG_SERIRQ_CONTINUOUS_MODE=y +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 +CONFIG_EHCI_BAR=0xfef00000 +CONFIG_ACPI_CPU_STRING="CP%02X" +CONFIG_STACK_SIZE=0x2000 +CONFIG_IED_REGION_SIZE=0x400000 +CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254 +CONFIG_INTEL_GMA_BCLV_WIDTH=16 +CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 +CONFIG_INTEL_GMA_BCLM_WIDTH=16 +CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0 +CONFIG_HPET_MIN_TICKS=0x80 +CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000 +CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 +CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_CBFS_CACHE_ALIGN=8 + +# +# CPU +# +CONFIG_CPU_INTEL_MODEL_206AX=y +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_TIMEBASE=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_MICROCODE_UPDATE_PRE_RAM=y +CONFIG_PARALLEL_MP=y +CONFIG_XAPIC_ONLY=y +# CONFIG_X2APIC_ONLY is not set +# CONFIG_X2APIC_RUNTIME is not set +# CONFIG_X2APIC_LATE_WORKAROUND is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_HAVE_SMI_HANDLER=y +CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y +CONFIG_SMM_TSEG=y +CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 +CONFIG_AP_STACK_SIZE=0x800 +CONFIG_SMP=y +CONFIG_SSE=y +CONFIG_SSE2=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# +CONFIG_USE_NATIVE_RAMINIT=y +CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y +# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set +# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set +# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set +# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set +CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 + +# +# Southbridge +# +CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y +CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y +CONFIG_HIDE_MEI_ON_ERROR=y +CONFIG_PCIEXP_HOTPLUG=y +CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y +CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_TCO_SPACE_NOT_YET_SPLIT=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y +CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 +CONFIG_RCBA_LENGTH=0x4000 + +# +# Super I/O +# +CONFIG_SUPERIO_ITE_COMMON_PRE_RAM=y +CONFIG_SUPERIO_ITE_COMMON_GPIO_PRE_RAM=y +CONFIG_SUPERIO_ITE_COMMON_NUM_GPIO_SETS=6 +CONFIG_SUPERIO_ITE_ENV_CTRL=y +CONFIG_SUPERIO_ITE_ENV_CTRL_8BIT_PWM=y +CONFIG_SUPERIO_ITE_ENV_CTRL_PWM_FREQ2=y +CONFIG_SUPERIO_ITE_ENV_CTRL_7BIT_SLOPE_REG=y +CONFIG_SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN=y +CONFIG_SUPERIO_ITE_ENV_CTRL_NO_FULLSPEED_SETTING=y +CONFIG_SUPERIO_ITE_ENV_CTRL_FAN_VECTOR=y +CONFIG_SUPERIO_ITE_ENV_CTRL_FAN_VECTOR_RANGED=y +CONFIG_SUPERIO_ITE_IT8772F=y + +# +# Embedded Controllers +# + +# +# Intel Firmware +# +CONFIG_HAVE_ME_BIN=y +# CONFIG_STITCH_ME_BIN is not set +# CONFIG_CHECK_ME is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set +# CONFIG_USE_ME_CLEANER is not set +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_ARCH_ALL_STAGES_X86_32=y +CONFIG_HAVE_X86_64_SUPPORT=y +CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_PC80_SYSTEM=y +CONFIG_HAVE_CMOS_DEFAULT=y +CONFIG_POSTCAR_STAGE=y +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_HAVE_CF9_RESET=y +CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +# CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 +# end of Chipset + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_LINEAR_FRAMEBUFFER=y +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_NO_GFX_INIT is not set +CONFIG_NO_EARLY_GFX_INIT=y + +# +# Display +# +# CONFIG_VGA_TEXT_FRAMEBUFFER is not set +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_LINEAR_FRAMEBUFFER=y +# CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 +# end of Display + +CONFIG_PCI=y +CONFIG_ECAM_MMCONF_SUPPORT=y +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_ECAM_MMCONF_LENGTH=0x04000000 +CONFIG_PCI_ALLOW_BUS_MASTER=y +CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y +CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set +CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y +# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set +CONFIG_PCIEXP_HOTPLUG_IO=0x800 +# CONFIG_EARLY_PCI_BRIDGE is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +CONFIG_USE_DDR3=y +# end of Devices + +# +# Generic Drivers +# +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +CONFIG_CACHE_MRC_SETTINGS=y +# CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set +# CONFIG_SMMSTORE is not set +CONFIG_SPI_FLASH=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_SPI_FLASH_ADESTO=y +CONFIG_SPI_FLASH_AMIC=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_NO_UART_ON_SUPERIO=y +# CONFIG_DRIVERS_UART_OXPCIE is not set +CONFIG_HAVE_USBDEBUG=y +CONFIG_HAVE_USBDEBUG_OPTIONS=y +# CONFIG_USBDEBUG is not set +# CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +# CONFIG_DRIVERS_I2C_MAX98396 is not set +CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_GFX_GMA=y +CONFIG_GFX_GMA_DYN_CPU=y +CONFIG_GFX_GMA_GENERATION="Ironlake" +CONFIG_GFX_GMA_PCH="Cougar_Point" +CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" +CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set +CONFIG_DRIVERS_MC146818=y +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set +CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +# CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_WIFI_GENERIC=y +CONFIG_DRIVERS_MTK_WIFI=y +# end of Generic Drivers + +# +# Security +# + +# +# CBFS verification +# +# CONFIG_CBFS_VERIFICATION is not set +# end of CBFS verification + +# +# Verified Boot (vboot) +# +# end of Verified Boot (vboot) + +# +# Trusted Platform Module +# +CONFIG_NO_TPM=y +CONFIG_PCR_BOOT_MODE=1 +CONFIG_PCR_HWID=1 +CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 +CONFIG_PCR_RUNTIME_DATA=3 +# end of Trusted Platform Module + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y +# end of Memory initialization + +# CONFIG_STM is not set +CONFIG_BOOTMEDIA_LOCK_NONE=y +# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_CHIP is not set +# CONFIG_BOOTMEDIA_SMM_BWP is not set +# end of Security + +CONFIG_ACPI_HAVE_PCAT_8259=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +CONFIG_ACPI_SOC_NVS=y +CONFIG_ACPI_NO_CUSTOM_MADT=y +CONFIG_ACPI_COMMON_MADT_LAPIC=y +CONFIG_ACPI_COMMON_MADT_IOAPIC=y +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y +CONFIG_RTC=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set +# CONFIG_CONSOLE_SPI_FLASH is not set +# CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CMOS_POST is not set +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_POST_IO_PORT=0x80 +CONFIG_HWBASE_DEBUG_CB=y +# end of Console + +CONFIG_HAVE_ACPI_RESUME=y +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_HAVE_OPTION_TABLE=y +CONFIG_IOAPIC=y +CONFIG_USE_WATCHDOG_ON_BOOT=y + +# +# System tables +# +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_BIOS_VENDOR="coreboot" +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" +# end of System tables + +# +# Payload +# +CONFIG_PAYLOAD_NONE=y +# end of Payload + +# +# Debugging +# + +# +# CPU Debug Settings +# +# CONFIG_DISPLAY_MTRRS is not set + +# +# Vendorcode Debug Settings +# + +# +# BLOB Debug Settings +# + +# +# General Debug Settings +# +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_RAM_SETUP=y +# CONFIG_DEBUG_RAM_SETUP is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set +# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set +# end of Debugging + +CONFIG_RAMSTAGE_ADA=y +CONFIG_RAMSTAGE_LIBHWBASE=y +CONFIG_HWBASE_DYNAMIC_MMIO=y +CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 +CONFIG_HWBASE_DIRECT_PCIDEV=y +CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + +CONFIG_WARNINGS_ARE_ERRORS=y +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_RELOCATABLE_MODULES=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/hppro3500series_8mb/config/libgfxinit_txtmode b/config/coreboot/hppro3500series_8mb/config/libgfxinit_txtmode new file mode 100644 index 00000000..6aaf9cfe --- /dev/null +++ b/config/coreboot/hppro3500series_8mb/config/libgfxinit_txtmode @@ -0,0 +1,678 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_LTO is not set +# CONFIG_IWYU is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set +CONFIG_COMPRESS_RAMSTAGE_LZMA=y +# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_USE_QC_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_RAMSTAGE=y +# CONFIG_ASAN is not set +# CONFIG_NO_STAGE_CACHE is not set +CONFIG_TSEG_STAGE_CACHE=y +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_BOOTSPLASH_IMAGE is not set + +# +# Software Bill Of Materials (SBOM) +# +# CONFIG_SBOM is not set +# end of Software Bill Of Materials (SBOM) +# end of General setup + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +# CONFIG_VENDOR_ACER is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BOSTENTECH is not set +# CONFIG_VENDOR_BYTEDANCE is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_CLEVO is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set +# CONFIG_VENDOR_DELL is not set +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set +# CONFIG_VENDOR_EXAMPLE is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set +CONFIG_VENDOR_HP=y +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_INVENTEC is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set +# CONFIG_VENDOR_LENOVO is not set +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PINE64 is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PRODRIVE is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_STARLABS is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set +# CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set +CONFIG_MAINBOARD_PART_NUMBER="Pro 3500 Series" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="hp/pro_3x00_series" +CONFIG_VGA_BIOS_ID="8086,0106" +CONFIG_DIMM_MAX=4 +CONFIG_DIMM_SPD_SIZE=256 +CONFIG_FMDFILE="" +# CONFIG_NO_POST is not set +CONFIG_MAINBOARD_VENDOR="HP" +CONFIG_CBFS_SIZE=0x7E7000 +CONFIG_MAX_CPUS=8 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_IO=y +CONFIG_VARIANT_DIR="pro_3500_series" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set +# CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +# CONFIG_PCIEXP_L1_SUB_STATE is not set +# CONFIG_PCIEXP_CLK_PM is not set +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP" +CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_USBDEBUG_HCD_INDEX=2 +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Pro 3500 Series" +# CONFIG_CONSOLE_POST is not set +CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" +CONFIG_MAX_SOCKET=1 +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +CONFIG_DCACHE_RAM_BASE=0xfefe0000 +CONFIG_DCACHE_RAM_SIZE=0x20000 +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x10000 +CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_DRIVERS_INTEL_WIFI=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/hppro3500series/ifd" +CONFIG_ME_BIN_PATH="../../../vendorfiles/hppro3500series/me.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_BOARD_HP_260_G1_DM is not set +# CONFIG_BOARD_HP_280_G2 is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set +# CONFIG_BOARD_HP_ELITEBOOK_820_G2 is not set +# CONFIG_BOARD_HP_FOLIO_9480M is not set +# CONFIG_BOARD_HP_PRO_3400_SERIES is not set +CONFIG_BOARD_HP_PRO_3500_SERIES=y +# CONFIG_BOARD_HP_COMPAQ_PRO_6300 is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set +# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_USDT is not set +# CONFIG_BOARD_HP_COMPAQ_8300_ELITE_SFF is not set +# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set +# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set +# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set +# CONFIG_BOARD_HP_2170P is not set +# CONFIG_BOARD_HP_2560P is not set +# CONFIG_BOARD_HP_2570P is not set +# CONFIG_BOARD_HP_2760P is not set +# CONFIG_BOARD_HP_8460P is not set +# CONFIG_BOARD_HP_8470P is not set +# CONFIG_BOARD_HP_8560W is not set +# CONFIG_BOARD_HP_8770W is not set +# CONFIG_BOARD_HP_FOLIO_9470M is not set +# CONFIG_BOARD_HP_PROBOOK_6360B is not set +# CONFIG_BOARD_HP_REVOLVE_810_G1 is not set +CONFIG_BOARD_HP_PRO_3X00_SERIES_COMMON=y +# CONFIG_DEBUG_SMI is not set +CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_HOTPLUG_BUSES=8 +CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 +CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="PNP0F13" +CONFIG_GFX_GMA_PANEL_1_PORT="eDP" +CONFIG_D3COLD_SUPPORT=y +CONFIG_GFX_GMA_PANEL_1_ON_EDP=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 +CONFIG_HEAP_SIZE=0x100000 +CONFIG_EC_GPE_SCI=0x50 +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +CONFIG_BOARD_ROMSIZE_KB_8192=y +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +CONFIG_COREBOOT_ROMSIZE_KB_8192=y +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=8192 +CONFIG_ROM_SIZE=0x00800000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=0 +# end of Mainboard + +# +# Chipset +# + +# +# SoC +# +CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb" +CONFIG_CBFS_MCACHE_SIZE=0x4000 +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_SMM_TSEG_SIZE=0x800000 +CONFIG_SMM_RESERVED_SIZE=0x100000 +CONFIG_SMM_MODULE_STACK_SIZE=0x400 +# CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 +CONFIG_SERIRQ_CONTINUOUS_MODE=y +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 +CONFIG_EHCI_BAR=0xfef00000 +CONFIG_ACPI_CPU_STRING="CP%02X" +CONFIG_STACK_SIZE=0x2000 +CONFIG_IED_REGION_SIZE=0x400000 +CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254 +CONFIG_INTEL_GMA_BCLV_WIDTH=16 +CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 +CONFIG_INTEL_GMA_BCLM_WIDTH=16 +CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0 +CONFIG_HPET_MIN_TICKS=0x80 +CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000 +CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 +CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_CBFS_CACHE_ALIGN=8 + +# +# CPU +# +CONFIG_CPU_INTEL_MODEL_206AX=y +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_TIMEBASE=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_MICROCODE_UPDATE_PRE_RAM=y +CONFIG_PARALLEL_MP=y +CONFIG_XAPIC_ONLY=y +# CONFIG_X2APIC_ONLY is not set +# CONFIG_X2APIC_RUNTIME is not set +# CONFIG_X2APIC_LATE_WORKAROUND is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_HAVE_SMI_HANDLER=y +CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y +CONFIG_SMM_TSEG=y +CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 +CONFIG_AP_STACK_SIZE=0x800 +CONFIG_SMP=y +CONFIG_SSE=y +CONFIG_SSE2=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# +CONFIG_USE_NATIVE_RAMINIT=y +CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y +# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set +# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set +# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set +# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set +CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 + +# +# Southbridge +# +CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y +CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y +CONFIG_HIDE_MEI_ON_ERROR=y +CONFIG_PCIEXP_HOTPLUG=y +CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y +CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_TCO_SPACE_NOT_YET_SPLIT=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y +CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 +CONFIG_RCBA_LENGTH=0x4000 + +# +# Super I/O +# +CONFIG_SUPERIO_ITE_COMMON_PRE_RAM=y +CONFIG_SUPERIO_ITE_COMMON_GPIO_PRE_RAM=y +CONFIG_SUPERIO_ITE_COMMON_NUM_GPIO_SETS=6 +CONFIG_SUPERIO_ITE_ENV_CTRL=y +CONFIG_SUPERIO_ITE_ENV_CTRL_8BIT_PWM=y +CONFIG_SUPERIO_ITE_ENV_CTRL_PWM_FREQ2=y +CONFIG_SUPERIO_ITE_ENV_CTRL_7BIT_SLOPE_REG=y +CONFIG_SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN=y +CONFIG_SUPERIO_ITE_ENV_CTRL_NO_FULLSPEED_SETTING=y +CONFIG_SUPERIO_ITE_ENV_CTRL_FAN_VECTOR=y +CONFIG_SUPERIO_ITE_ENV_CTRL_FAN_VECTOR_RANGED=y +CONFIG_SUPERIO_ITE_IT8772F=y + +# +# Embedded Controllers +# + +# +# Intel Firmware +# +CONFIG_HAVE_ME_BIN=y +# CONFIG_STITCH_ME_BIN is not set +# CONFIG_CHECK_ME is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set +# CONFIG_USE_ME_CLEANER is not set +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_ARCH_ALL_STAGES_X86_32=y +CONFIG_HAVE_X86_64_SUPPORT=y +CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_PC80_SYSTEM=y +CONFIG_HAVE_CMOS_DEFAULT=y +CONFIG_POSTCAR_STAGE=y +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_HAVE_CF9_RESET=y +CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +# CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 +# end of Chipset + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_LINEAR_FRAMEBUFFER=y +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_NO_GFX_INIT is not set +CONFIG_NO_EARLY_GFX_INIT=y + +# +# Display +# +CONFIG_VGA_TEXT_FRAMEBUFFER=y +# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 +# end of Display + +CONFIG_PCI=y +CONFIG_ECAM_MMCONF_SUPPORT=y +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_ECAM_MMCONF_LENGTH=0x04000000 +CONFIG_PCI_ALLOW_BUS_MASTER=y +CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y +CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set +CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y +# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set +CONFIG_PCIEXP_HOTPLUG_IO=0x800 +# CONFIG_EARLY_PCI_BRIDGE is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +CONFIG_USE_DDR3=y +# end of Devices + +# +# Generic Drivers +# +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +CONFIG_CACHE_MRC_SETTINGS=y +# CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set +# CONFIG_SMMSTORE is not set +CONFIG_SPI_FLASH=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_SPI_FLASH_ADESTO=y +CONFIG_SPI_FLASH_AMIC=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_NO_UART_ON_SUPERIO=y +# CONFIG_DRIVERS_UART_OXPCIE is not set +CONFIG_HAVE_USBDEBUG=y +CONFIG_HAVE_USBDEBUG_OPTIONS=y +# CONFIG_USBDEBUG is not set +# CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +# CONFIG_DRIVERS_I2C_MAX98396 is not set +CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_GFX_GMA=y +CONFIG_GFX_GMA_DYN_CPU=y +CONFIG_GFX_GMA_GENERATION="Ironlake" +CONFIG_GFX_GMA_PCH="Cougar_Point" +CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" +CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set +CONFIG_DRIVERS_MC146818=y +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set +CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +CONFIG_VGA=y +# CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_WIFI_GENERIC=y +CONFIG_DRIVERS_MTK_WIFI=y +# end of Generic Drivers + +# +# Security +# + +# +# CBFS verification +# +# CONFIG_CBFS_VERIFICATION is not set +# end of CBFS verification + +# +# Verified Boot (vboot) +# +# end of Verified Boot (vboot) + +# +# Trusted Platform Module +# +CONFIG_NO_TPM=y +CONFIG_PCR_BOOT_MODE=1 +CONFIG_PCR_HWID=1 +CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 +CONFIG_PCR_RUNTIME_DATA=3 +# end of Trusted Platform Module + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y +# end of Memory initialization + +# CONFIG_STM is not set +CONFIG_BOOTMEDIA_LOCK_NONE=y +# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_CHIP is not set +# CONFIG_BOOTMEDIA_SMM_BWP is not set +# end of Security + +CONFIG_ACPI_HAVE_PCAT_8259=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +CONFIG_ACPI_SOC_NVS=y +CONFIG_ACPI_NO_CUSTOM_MADT=y +CONFIG_ACPI_COMMON_MADT_LAPIC=y +CONFIG_ACPI_COMMON_MADT_IOAPIC=y +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y +CONFIG_RTC=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set +# CONFIG_CONSOLE_SPI_FLASH is not set +# CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CMOS_POST is not set +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_POST_IO_PORT=0x80 +CONFIG_HWBASE_DEBUG_CB=y +# end of Console + +CONFIG_HAVE_ACPI_RESUME=y +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_HAVE_OPTION_TABLE=y +CONFIG_IOAPIC=y +CONFIG_USE_WATCHDOG_ON_BOOT=y + +# +# System tables +# +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_BIOS_VENDOR="coreboot" +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" +# end of System tables + +# +# Payload +# +CONFIG_PAYLOAD_NONE=y +# end of Payload + +# +# Debugging +# + +# +# CPU Debug Settings +# +# CONFIG_DISPLAY_MTRRS is not set + +# +# Vendorcode Debug Settings +# + +# +# BLOB Debug Settings +# + +# +# General Debug Settings +# +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_RAM_SETUP=y +# CONFIG_DEBUG_RAM_SETUP is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set +# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set +# end of Debugging + +CONFIG_RAMSTAGE_ADA=y +CONFIG_RAMSTAGE_LIBHWBASE=y +CONFIG_HWBASE_DYNAMIC_MMIO=y +CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 +CONFIG_HWBASE_DIRECT_PCIDEV=y +CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + +CONFIG_WARNINGS_ARE_ERRORS=y +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_RELOCATABLE_MODULES=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/hppro3500series_8mb/target.cfg b/config/coreboot/hppro3500series_8mb/target.cfg new file mode 100644 index 00000000..4d4031d2 --- /dev/null +++ b/config/coreboot/hppro3500series_8mb/target.cfg @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +tree="default" +xarch="i386-elf" +payload_seabios="y" +payload_grub="y" +payload_memtest="y" +grub_scan_disk="nvme ahci" +grubtree="nvme" +vcfg="hppro3500series" +build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" +payload_uboot="amd64" diff --git a/config/coreboot/kcma_d8_16mb/target.cfg b/config/coreboot/kcma_d8_16mb/target.cfg index 112c101f..75955f7e 100644 --- a/config/coreboot/kcma_d8_16mb/target.cfg +++ b/config/coreboot/kcma_d8_16mb/target.cfg @@ -9,4 +9,4 @@ xlang="c" grub_scan_disk="nvme ahci" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/kcma_d8_2mb/target.cfg b/config/coreboot/kcma_d8_2mb/target.cfg index 112c101f..75955f7e 100644 --- a/config/coreboot/kcma_d8_2mb/target.cfg +++ b/config/coreboot/kcma_d8_2mb/target.cfg @@ -9,4 +9,4 @@ xlang="c" grub_scan_disk="nvme ahci" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/kfsn4_dre_1mb/target.cfg b/config/coreboot/kfsn4_dre_1mb/target.cfg index a87ac1ad..c4536856 100644 --- a/config/coreboot/kfsn4_dre_1mb/target.cfg +++ b/config/coreboot/kfsn4_dre_1mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_memtest="y" xlang="c" build_depend="seabios/default memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/kfsn4_dre_2mb/target.cfg b/config/coreboot/kfsn4_dre_2mb/target.cfg index 17021b47..f942604b 100644 --- a/config/coreboot/kfsn4_dre_2mb/target.cfg +++ b/config/coreboot/kfsn4_dre_2mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" xlang="c" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/kgpe_d16_16mb/target.cfg b/config/coreboot/kgpe_d16_16mb/target.cfg index 112c101f..75955f7e 100644 --- a/config/coreboot/kgpe_d16_16mb/target.cfg +++ b/config/coreboot/kgpe_d16_16mb/target.cfg @@ -9,4 +9,4 @@ xlang="c" grub_scan_disk="nvme ahci" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/kgpe_d16_2mb/target.cfg b/config/coreboot/kgpe_d16_2mb/target.cfg index 112c101f..75955f7e 100644 --- a/config/coreboot/kgpe_d16_2mb/target.cfg +++ b/config/coreboot/kgpe_d16_2mb/target.cfg @@ -9,4 +9,4 @@ xlang="c" grub_scan_disk="nvme ahci" grubtree="nvme" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/macbook11/config/libgfxinit_corebootfb b/config/coreboot/macbook11/config/libgfxinit_corebootfb index ca0b9853..c71d938f 100644 --- a/config/coreboot/macbook11/config/libgfxinit_corebootfb +++ b/config/coreboot/macbook11/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set CONFIG_VENDOR_APPLE=y +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="Macbook1,1" CONFIG_MAINBOARD_VERSION="1.0" @@ -120,9 +129,9 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set @@ -132,15 +141,17 @@ CONFIG_BOARD_APPLE_MACBOOK11=y # CONFIG_BOARD_APPLE_IMAC52 is not set # CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -150,12 +161,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 @@ -210,8 +219,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -226,6 +236,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -311,6 +322,7 @@ CONFIG_RCBA_LENGTH=0x4000 # Embedded Controllers # CONFIG_EC_ACPI=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -334,6 +346,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -354,6 +369,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -384,7 +400,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -402,6 +421,7 @@ CONFIG_SPI_FLASH_ISSI=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -550,7 +570,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -564,6 +583,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/macbook11/config/libgfxinit_txtmode b/config/coreboot/macbook11/config/libgfxinit_txtmode index 26d073be..5b44561f 100644 --- a/config/coreboot/macbook11/config/libgfxinit_txtmode +++ b/config/coreboot/macbook11/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set CONFIG_VENDOR_APPLE=y +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="Macbook1,1" CONFIG_MAINBOARD_VERSION="1.0" @@ -120,9 +129,9 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set @@ -132,15 +141,17 @@ CONFIG_BOARD_APPLE_MACBOOK11=y # CONFIG_BOARD_APPLE_IMAC52 is not set # CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -150,12 +161,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 @@ -210,8 +219,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -226,6 +236,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -311,6 +322,7 @@ CONFIG_RCBA_LENGTH=0x4000 # Embedded Controllers # CONFIG_EC_ACPI=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -334,6 +346,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -352,6 +367,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -382,7 +398,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -400,6 +419,7 @@ CONFIG_SPI_FLASH_ISSI=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -548,7 +568,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -562,6 +581,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/macbook11/target.cfg b/config/coreboot/macbook11/target.cfg index c1e3a3c6..f41e3fe9 100644 --- a/config/coreboot/macbook11/target.cfg +++ b/config/coreboot/macbook11/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" grub_scan_disk="ahci" build_depend="seabios/default grub/default u-boot/i386coreboot" -payload_uboot_i386="y" +payload_uboot="i386" diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb index 0cc0a9ec..3e945c4a 100644 --- a/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/macbook11_16mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -56,6 +57,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set CONFIG_VENDOR_APPLE=y +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -67,6 +69,7 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -74,15 +77,19 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -103,7 +110,9 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="Macbook1,1" CONFIG_MAINBOARD_VERSION="1.0" @@ -119,9 +128,9 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set @@ -131,15 +140,17 @@ CONFIG_BOARD_APPLE_MACBOOK11=y # CONFIG_BOARD_APPLE_IMAC52 is not set # CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -149,12 +160,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 @@ -209,8 +218,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -225,6 +235,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -310,6 +321,7 @@ CONFIG_RCBA_LENGTH=0x4000 # Embedded Controllers # CONFIG_EC_ACPI=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -333,6 +345,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -353,6 +368,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -383,7 +399,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -401,6 +420,7 @@ CONFIG_SPI_FLASH_ISSI=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -549,7 +569,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -564,6 +583,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode index 735a7be0..a9b76a5e 100644 --- a/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/macbook11_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -56,6 +57,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set CONFIG_VENDOR_APPLE=y +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -67,6 +69,7 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -74,15 +77,19 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -103,7 +110,9 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="Macbook1,1" CONFIG_MAINBOARD_VERSION="1.0" @@ -119,9 +128,9 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set @@ -131,15 +140,17 @@ CONFIG_BOARD_APPLE_MACBOOK11=y # CONFIG_BOARD_APPLE_IMAC52 is not set # CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -149,12 +160,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Macbook1,1" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 @@ -209,8 +218,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -225,6 +235,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -310,6 +321,7 @@ CONFIG_RCBA_LENGTH=0x4000 # Embedded Controllers # CONFIG_EC_ACPI=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -333,6 +345,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -351,6 +366,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -381,7 +397,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -399,6 +418,7 @@ CONFIG_SPI_FLASH_ISSI=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -547,7 +567,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -562,6 +581,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/macbook11_16mb/target.cfg b/config/coreboot/macbook11_16mb/target.cfg index e0d1afbf..ff2498eb 100644 --- a/config/coreboot/macbook11_16mb/target.cfg +++ b/config/coreboot/macbook11_16mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" scan_scan_disk="ahci" build_depend="seabios/default grub/default u-boot/i386coreboot" -payload_uboot_i386="y" +payload_uboot="i386" diff --git a/config/coreboot/macbook21/config/libgfxinit_corebootfb b/config/coreboot/macbook21/config/libgfxinit_corebootfb index 9dc95583..3b9525b5 100644 --- a/config/coreboot/macbook21/config/libgfxinit_corebootfb +++ b/config/coreboot/macbook21/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set CONFIG_VENDOR_APPLE=y +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="MacBook2,1" CONFIG_MAINBOARD_VERSION="1.0" @@ -120,9 +129,9 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set @@ -132,15 +141,17 @@ CONFIG_BOARD_APPLE_MACBOOK21=y # CONFIG_BOARD_APPLE_IMAC52 is not set # CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -150,12 +161,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 @@ -210,8 +219,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -226,6 +236,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -311,6 +322,7 @@ CONFIG_RCBA_LENGTH=0x4000 # Embedded Controllers # CONFIG_EC_ACPI=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -334,6 +346,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -354,6 +369,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -384,7 +400,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -402,6 +421,7 @@ CONFIG_SPI_FLASH_ISSI=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -550,7 +570,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -564,6 +583,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/macbook21/config/libgfxinit_txtmode b/config/coreboot/macbook21/config/libgfxinit_txtmode index e73ddf4e..c567cef1 100644 --- a/config/coreboot/macbook21/config/libgfxinit_txtmode +++ b/config/coreboot/macbook21/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set CONFIG_VENDOR_APPLE=y +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="MacBook2,1" CONFIG_MAINBOARD_VERSION="1.0" @@ -120,9 +129,9 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set @@ -132,15 +141,17 @@ CONFIG_BOARD_APPLE_MACBOOK21=y # CONFIG_BOARD_APPLE_IMAC52 is not set # CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -150,12 +161,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 @@ -210,8 +219,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -226,6 +236,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -311,6 +322,7 @@ CONFIG_RCBA_LENGTH=0x4000 # Embedded Controllers # CONFIG_EC_ACPI=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -334,6 +346,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -352,6 +367,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -382,7 +398,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -400,6 +419,7 @@ CONFIG_SPI_FLASH_ISSI=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -548,7 +568,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -562,6 +581,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/macbook21/target.cfg b/config/coreboot/macbook21/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/macbook21/target.cfg +++ b/config/coreboot/macbook21/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb index d760ec5e..55e87d7e 100644 --- a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -56,6 +57,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set CONFIG_VENDOR_APPLE=y +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -67,6 +69,7 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -74,15 +77,19 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -103,7 +110,9 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="MacBook2,1" CONFIG_MAINBOARD_VERSION="1.0" @@ -119,9 +128,9 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set @@ -131,15 +140,17 @@ CONFIG_BOARD_APPLE_MACBOOK21=y # CONFIG_BOARD_APPLE_IMAC52 is not set # CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -149,12 +160,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 @@ -209,8 +218,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -225,6 +235,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -310,6 +321,7 @@ CONFIG_RCBA_LENGTH=0x4000 # Embedded Controllers # CONFIG_EC_ACPI=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -333,6 +345,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -353,6 +368,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -383,7 +399,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -401,6 +420,7 @@ CONFIG_SPI_FLASH_ISSI=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -549,7 +569,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -564,6 +583,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode index 1533d3c6..9740da5a 100644 --- a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y # CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -56,6 +57,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set CONFIG_VENDOR_APPLE=y +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -67,6 +69,7 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -74,15 +77,19 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -103,7 +110,9 @@ CONFIG_VENDOR_APPLE=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="MacBook2,1" CONFIG_MAINBOARD_VERSION="1.0" @@ -119,9 +128,9 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set @@ -131,15 +140,17 @@ CONFIG_BOARD_APPLE_MACBOOK21=y # CONFIG_BOARD_APPLE_IMAC52 is not set # CONFIG_BOARD_APPLE_MACBOOKAIR4_2 is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Apple Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -149,12 +160,10 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="MacBook2,1" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 @@ -209,8 +218,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -225,6 +235,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -310,6 +321,7 @@ CONFIG_RCBA_LENGTH=0x4000 # Embedded Controllers # CONFIG_EC_ACPI=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -333,6 +345,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -351,6 +366,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -381,7 +397,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -399,6 +418,7 @@ CONFIG_SPI_FLASH_ISSI=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -547,7 +567,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -562,6 +581,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/macbook21_16mb/target.cfg b/config/coreboot/macbook21_16mb/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/macbook21_16mb/target.cfg +++ b/config/coreboot/macbook21_16mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/next/patches/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch b/config/coreboot/next/patches/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch deleted file mode 100644 index f60aa74a..00000000 --- a/config/coreboot/next/patches/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch +++ /dev/null @@ -1,30 +0,0 @@ -From aa6dd7aa4693bd9ce1fe7f35b9532e5411fc1098 Mon Sep 17 00:00:00 2001 -From: Mate Kukri <km@mkukri.xyz> -Date: Fri, 22 Nov 2024 21:26:48 +0000 -Subject: [PATCH 02/11] soc/intel/skylake: Enable 4E/4F PNP I/O ports in - bootblock - -Change-Id: I57c9d8a9513a268e2ca6a0abd1306cd038598173 -Signed-off-by: Mate Kukri <km@mkukri.xyz> ---- - src/soc/intel/skylake/bootblock/pch.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c -index df00bb85a9..beaece960b 100644 ---- a/src/soc/intel/skylake/bootblock/pch.c -+++ b/src/soc/intel/skylake/bootblock/pch.c -@@ -100,8 +100,8 @@ static void soc_config_pwrmbase(void) - - void pch_early_iorange_init(void) - { -- uint16_t io_enables = LPC_IOE_SUPERIO_2E_2F | LPC_IOE_KBC_60_64 | -- LPC_IOE_EC_62_66; -+ uint16_t io_enables = LPC_IOE_EC_4E_4F | LPC_IOE_SUPERIO_2E_2F | -+ LPC_IOE_KBC_60_64 | LPC_IOE_EC_62_66; - - const config_t *config = config_of_soc(); - --- -2.39.5 - diff --git a/config/coreboot/next/patches/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch b/config/coreboot/next/patches/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch deleted file mode 100644 index 108f688d..00000000 --- a/config/coreboot/next/patches/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch +++ /dev/null @@ -1,2237 +0,0 @@ -From 1652c22825d3001e77159aa539dfa49d2389c775 Mon Sep 17 00:00:00 2001 -From: Mate Kukri <km@mkukri.xyz> -Date: Tue, 31 Dec 2024 22:49:15 +0000 -Subject: [PATCH 03/11] mb/lenovo: Add ThinkPad T480 and ThinkPad T480s - -These machine have BootGuard fused and requires deguard to -boot coreboot. - -Known issues: -- Alpine Ridge Thunderbolt 3 controller does not work -- Some Fn+F{1-12} keys aren't handled correctly -- Nvidia dGPU is finicky - - Needs option ROM - - Power enable code is buggy - - Nouveau only works on linux 6.8-6.9 -- Headphone jack isn't detected as plugged in despite correct verbs - -Thanks to Leah Rowe for helping with the T480s. - -Signed-off-by: Mate Kukri <km@mkukri.xyz> -Change-Id: I19d421412c771c1f242f6ff39453f824fa866163 ---- - src/device/pci_rom.c | 4 +- - src/ec/lenovo/h8/acpi/ec.asl | 2 +- - src/ec/lenovo/h8/bluetooth.c | 6 +- - src/ec/lenovo/h8/wwan.c | 6 +- - src/mainboard/lenovo/sklkbl_thinkpad/Kconfig | 57 +++++ - .../lenovo/sklkbl_thinkpad/Kconfig.name | 7 + - .../lenovo/sklkbl_thinkpad/Makefile.mk | 73 +++++++ - .../lenovo/sklkbl_thinkpad/acpi/ec.asl | 12 ++ - .../lenovo/sklkbl_thinkpad/acpi/superio.asl | 3 + - .../lenovo/sklkbl_thinkpad/bootblock.c | 60 ++++++ - .../lenovo/sklkbl_thinkpad/devicetree.cb | 71 ++++++ - src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl | 33 +++ - src/mainboard/lenovo/sklkbl_thinkpad/ec.c | 153 +++++++++++++ - src/mainboard/lenovo/sklkbl_thinkpad/ec.h | 99 +++++++++ - src/mainboard/lenovo/sklkbl_thinkpad/gpio.h | 8 + - .../lenovo/sklkbl_thinkpad/ramstage.c | 105 +++++++++ - .../sklkbl_thinkpad/variants/t480/data.vbt | Bin 0 -> 4106 bytes - .../variants/t480/gma-mainboard.ads | 19 ++ - .../sklkbl_thinkpad/variants/t480/gpio.c | 203 ++++++++++++++++++ - .../sklkbl_thinkpad/variants/t480/hda_verb.c | 90 ++++++++ - .../variants/t480/memory_init_params.c | 20 ++ - .../variants/t480/overridetree.cb | 103 +++++++++ - .../sklkbl_thinkpad/variants/t480s/data.vbt | Bin 0 -> 4106 bytes - .../variants/t480s/gma-mainboard.ads | 19 ++ - .../sklkbl_thinkpad/variants/t480s/gpio.c | 199 +++++++++++++++++ - .../sklkbl_thinkpad/variants/t480s/hda_verb.c | 90 ++++++++ - .../variants/t480s/memory_init_params.c | 44 ++++ - .../variants/t480s/overridetree.cb | 103 +++++++++ - .../variants/t480s/spd/spd_0.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_1.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_10.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_11.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_12.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_13.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_14.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_15.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_16.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_17.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_18.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_19.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_2.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_20.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_3.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_4.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_5.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_6.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_7.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_8.bin | Bin 0 -> 512 bytes - .../variants/t480s/spd/spd_9.bin | Bin 0 -> 512 bytes - 49 files changed, 1583 insertions(+), 6 deletions(-) - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ec.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ec.h - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/gpio.h - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_0.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_1.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_10.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_11.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_12.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_13.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_14.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_15.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_16.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_17.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_18.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_19.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_2.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_20.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_3.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_4.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_5.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_6.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_7.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_8.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_9.bin - -diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c -index d60720eb49..cc6b9b068a 100644 ---- a/src/device/pci_rom.c -+++ b/src/device/pci_rom.c -@@ -304,11 +304,13 @@ void pci_rom_ssdt(const struct device *device) - return; - } - -+#if 0 - const char *scope = acpi_device_path(device); - if (!scope) { - printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device)); - return; - } -+#endif - - /* Supports up to four devices. */ - if ((CBMEM_ID_ROM0 + ngfx) > CBMEM_ID_ROM3) { -@@ -336,7 +338,7 @@ void pci_rom_ssdt(const struct device *device) - memcpy(cbrom, rom, cbrom_length); - - /* write _ROM method */ -- acpigen_write_scope(scope); -+ acpigen_write_scope("\\_SB.PCI0.RP01.PEGP"); - acpigen_write_rom(cbrom, cbrom_length); - acpigen_pop_len(); /* pop scope */ - } -diff --git a/src/ec/lenovo/h8/acpi/ec.asl b/src/ec/lenovo/h8/acpi/ec.asl -index bc54d3b422..8f4a8e1986 100644 ---- a/src/ec/lenovo/h8/acpi/ec.asl -+++ b/src/ec/lenovo/h8/acpi/ec.asl -@@ -331,7 +331,7 @@ Device(EC) - #include "sleepbutton.asl" - #include "lid.asl" - #include "beep.asl" --#include "thermal.asl" -+//#include "thermal.asl" - #include "systemstatus.asl" - #include "thinkpad.asl" - } -diff --git a/src/ec/lenovo/h8/bluetooth.c b/src/ec/lenovo/h8/bluetooth.c -index 16fc8dce39..be71a24ced 100644 ---- a/src/ec/lenovo/h8/bluetooth.c -+++ b/src/ec/lenovo/h8/bluetooth.c -@@ -1,6 +1,6 @@ - /* SPDX-License-Identifier: GPL-2.0-only */ - --#include <southbridge/intel/common/gpio.h> -+// #include <southbridge/intel/common/gpio.h> - #include <console/console.h> - #include <device/device.h> - #include <ec/acpi/ec.h> -@@ -28,16 +28,18 @@ bool h8_has_bdc(const struct device *dev) - { - struct ec_lenovo_h8_config *conf = dev->chip_info; - -- if (!conf->has_bdc_detection) { -+ if (1 || !conf->has_bdc_detection) { - printk(BIOS_INFO, "H8: BDC detection not implemented. " - "Assuming BDC installed\n"); - return true; - } - -+#if 0 - if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) { - printk(BIOS_INFO, "H8: BDC installed\n"); - return true; - } -+#endif - - printk(BIOS_INFO, "H8: BDC not installed\n"); - return false; -diff --git a/src/ec/lenovo/h8/wwan.c b/src/ec/lenovo/h8/wwan.c -index 685886fcce..5cdcf77406 100644 ---- a/src/ec/lenovo/h8/wwan.c -+++ b/src/ec/lenovo/h8/wwan.c -@@ -1,6 +1,6 @@ - /* SPDX-License-Identifier: GPL-2.0-only */ - --#include <southbridge/intel/common/gpio.h> -+// #include <southbridge/intel/common/gpio.h> - #include <console/console.h> - #include <device/device.h> - #include <ec/acpi/ec.h> -@@ -26,16 +26,18 @@ bool h8_has_wwan(const struct device *dev) - { - struct ec_lenovo_h8_config *conf = dev->chip_info; - -- if (!conf->has_wwan_detection) { -+ if (1 || !conf->has_wwan_detection) { - printk(BIOS_INFO, "H8: WWAN detection not implemented. " - "Assuming WWAN installed\n"); - return true; - } - -+#if 0 - if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) { - printk(BIOS_INFO, "H8: WWAN installed\n"); - return true; - } -+#endif - - printk(BIOS_INFO, "H8: WWAN not installed\n"); - return false; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig -new file mode 100644 -index 0000000000..4998672943 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig -@@ -0,0 +1,57 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+ -+config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON -+ bool -+ select BOARD_ROMSIZE_KB_16384 -+ select EC_LENOVO_H8 -+ select EC_LENOVO_PMH7 -+ select H8_HAS_BAT_THRESHOLDS_IMPL -+ select H8_HAS_LEDLOGO -+ select H8_HAS_PRIMARY_FN_KEYS -+ select HAVE_ACPI_RESUME -+ select HAVE_ACPI_TABLES -+ select INTEL_GMA_HAVE_VBT -+ select INTEL_INT15 -+ select MAINBOARD_HAS_LIBGFXINIT -+ select MAINBOARD_HAS_TPM2 -+ select MAINBOARD_USES_IFD_GBE_REGION -+ select MEMORY_MAPPED_TPM -+ select SOC_INTEL_COMMON_BLOCK_HDA_VERB -+ select SOC_INTEL_KABYLAKE -+ select SPD_READ_BY_WORD -+ select SYSTEM_TYPE_LAPTOP -+ -+config BOARD_LENOVO_T480 -+ bool -+ select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON -+ -+config BOARD_LENOVO_T480S -+ bool -+ select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON -+ -+if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON -+ -+config MAINBOARD_DIR -+ default "lenovo/sklkbl_thinkpad" -+ -+config VARIANT_DIR -+ default "t480" if BOARD_LENOVO_T480 -+ default "t480s" if BOARD_LENOVO_T480S -+ -+config OVERRIDE_DEVICETREE -+ default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" -+ -+config MAINBOARD_PART_NUMBER -+ default "T480" if BOARD_LENOVO_T480 -+ default "T480s" if BOARD_LENOVO_T480S -+ -+config CBFS_SIZE -+ default 0x900000 -+ -+config DIMM_MAX -+ default 2 -+ -+config DIMM_SPD_SIZE -+ default 512 # DDR4 -+ -+endif -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name -new file mode 100644 -index 0000000000..abc273f387 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name -@@ -0,0 +1,7 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+ -+config BOARD_LENOVO_T480 -+ bool "ThinkPad T480" -+ -+config BOARD_LENOVO_T480S -+ bool "ThinkPad T480s" -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk -new file mode 100644 -index 0000000000..c308239177 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk -@@ -0,0 +1,73 @@ -+## SPDX-License-Identifier: GPL-2.0-only -+ -+bootblock-y += bootblock.c ec.c -+ -+romstage-y += variants/$(VARIANT_DIR)/memory_init_params.c -+ -+ramstage-y += ramstage.c ec.c -+ramstage-y += variants/$(VARIANT_DIR)/gpio.c variants/$(VARIANT_DIR)/hda_verb.c -+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads -+ -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_0.bin -+spd_0.bin-file := variants/$(VARIANT_DIR)/spd/spd_0.bin -+spd_0.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_1.bin -+spd_1.bin-file := variants/$(VARIANT_DIR)/spd/spd_1.bin -+spd_1.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_2.bin -+spd_2.bin-file := variants/$(VARIANT_DIR)/spd/spd_2.bin -+spd_2.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_3.bin -+spd_3.bin-file := variants/$(VARIANT_DIR)/spd/spd_3.bin -+spd_3.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_4.bin -+spd_4.bin-file := variants/$(VARIANT_DIR)/spd/spd_4.bin -+spd_4.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_5.bin -+spd_5.bin-file := variants/$(VARIANT_DIR)/spd/spd_5.bin -+spd_5.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_6.bin -+spd_6.bin-file := variants/$(VARIANT_DIR)/spd/spd_6.bin -+spd_6.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_7.bin -+spd_7.bin-file := variants/$(VARIANT_DIR)/spd/spd_7.bin -+spd_7.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_8.bin -+spd_8.bin-file := variants/$(VARIANT_DIR)/spd/spd_8.bin -+spd_8.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_9.bin -+spd_9.bin-file := variants/$(VARIANT_DIR)/spd/spd_9.bin -+spd_9.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_10.bin -+spd_10.bin-file := variants/$(VARIANT_DIR)/spd/spd_10.bin -+spd_10.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_11.bin -+spd_11.bin-file := variants/$(VARIANT_DIR)/spd/spd_11.bin -+spd_11.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_12.bin -+spd_12.bin-file := variants/$(VARIANT_DIR)/spd/spd_12.bin -+spd_12.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_13.bin -+spd_13.bin-file := variants/$(VARIANT_DIR)/spd/spd_13.bin -+spd_13.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_14.bin -+spd_14.bin-file := variants/$(VARIANT_DIR)/spd/spd_14.bin -+spd_14.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_15.bin -+spd_15.bin-file := variants/$(VARIANT_DIR)/spd/spd_15.bin -+spd_15.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_16.bin -+spd_16.bin-file := variants/$(VARIANT_DIR)/spd/spd_16.bin -+spd_16.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_17.bin -+spd_17.bin-file := variants/$(VARIANT_DIR)/spd/spd_17.bin -+spd_17.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_18.bin -+spd_18.bin-file := variants/$(VARIANT_DIR)/spd/spd_18.bin -+spd_18.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_19.bin -+spd_19.bin-file := variants/$(VARIANT_DIR)/spd/spd_19.bin -+spd_19.bin-type := raw -+cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_20.bin -+spd_20.bin-file := variants/$(VARIANT_DIR)/spd/spd_20.bin -+spd_20.bin-type := raw -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl -new file mode 100644 -index 0000000000..3a949a2fca ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl -@@ -0,0 +1,12 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB -+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB -+#define THINKPAD_EC_GPE 22 -+ -+Name(\TCRT, 100) -+Name(\TPSV, 90) -+Name(\FLVL, 0) -+ -+#include <ec/lenovo/h8/acpi/ec.asl> -+#include <ec/lenovo/h8/acpi/thinkpad_bat_thresholds_b0.asl> -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl -new file mode 100644 -index 0000000000..55b1db5b11 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl -@@ -0,0 +1,3 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <drivers/pc80/pc/ps2_controller.asl> -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c -new file mode 100644 -index 0000000000..fb660dbdfa ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c -@@ -0,0 +1,60 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <arch/io.h> -+#include <bootblock_common.h> -+#include <device/pci.h> -+#include <soc/pci_devs.h> -+#include "ec.h" -+ -+static void configure_uart(uint16_t port, uint16_t iobase, uint8_t irqno) -+{ -+ microchip_pnp_enter_conf_state(port); -+ -+ // Select LPC I/F LDN -+ pnp_write(port, PNP_LDN_SELECT, LDN_LPCIF); -+ // Write UART BAR -+ pnp_write_le32(port, LPCIF_BAR_UART, (uint32_t) iobase << 16 | 0x8707); -+ // Set SIRQ4 to UART -+ pnp_write(port, LPCIF_SIRQ(irqno), LDN_UART); -+ -+ // Configure UART LDN -+ pnp_write(port, PNP_LDN_SELECT, LDN_UART); -+ pnp_write(port, UART_ACTIVATE, 0x01); -+ pnp_write(port, UART_CONFIG_SELECT, 0x00); -+ -+ microchip_pnp_exit_conf_state(port); -+ -+#ifdef CONFIG_BOARD_LENOVO_T480 -+ // Supply debug unlock key -+ debug_write_key(DEBUG_RW_KEY_IDX, debug_rw_key); -+ -+ // Use debug writes to set UART_TX and UART_RX GPIOs -+ debug_write_dword(0xf0c400 + 0x110, 0x00001000); -+ debug_write_dword(0xf0c400 + 0x114, 0x00001000); -+#endif -+} -+ -+ -+#define UART_PORT 0x3f8 -+#define UART_IRQ 4 -+ -+void bootblock_mainboard_early_init(void) -+{ -+ // Tell EC via BIOS Debug Port 1 that the world isn't on fire -+ -+ // Let the EC know that BIOS code is running -+ outb(0x11, 0x86); -+ outb(0x6e, 0x86); -+ -+ // Enable accesses to EC1 interface -+ ec0_write(0, ec0_read(0) | 0x20); -+ -+ // Reset LEDs to power on state -+ // (Without this warm reboot leaves LEDs off) -+ ec0_write(0x0c, 0x80); -+ ec0_write(0x0c, 0x07); -+ ec0_write(0x0c, 0x8a); -+ -+ // Setup debug UART -+ configure_uart(EC_CFG_PORT, UART_PORT, UART_IRQ); -+} -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb -new file mode 100644 -index 0000000000..c07d4d53ca ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb -@@ -0,0 +1,71 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+ -+chip soc/intel/skylake -+ # IGD Displays -+ register "gfx" = "GMA_STATIC_DISPLAYS(0)" -+ -+ register "panel_cfg" = "{ -+ .up_delay_ms = 200, -+ .down_delay_ms = 50, -+ .cycle_delay_ms = 600, -+ .backlight_on_delay_ms = 1, -+ .backlight_off_delay_ms = 200, -+ .backlight_pwm_hz = 200, -+ }" -+ -+ # Power -+ register "PmConfigSlpS3MinAssert" = "2" # 50ms -+ register "PmConfigSlpS4MinAssert" = "1" # 1s -+ register "PmConfigSlpSusMinAssert" = "3" # 500ms -+ register "PmConfigSlpAMinAssert" = "3" # 2s -+ -+ device domain 0 on -+ device ref igpu on end -+ device ref sa_thermal on end -+ device ref thermal on end -+ device ref south_xhci on end -+ device ref lpc_espi on -+ register "serirq_mode" = "SERIRQ_CONTINUOUS" -+ -+ register "gen1_dec" = "0x007c1601" -+ register "gen2_dec" = "0x000c15e1" -+ -+ chip ec/lenovo/pmh7 -+ register "backlight_enable" = "true" -+ register "dock_event_enable" = "true" -+ device pnp ff.1 on end # dummy -+ end -+ -+ chip ec/lenovo/h8 -+ register "beepmask0" = "0x00" -+ register "beepmask1" = "0x86" -+ register "config0" = "0xa6" -+ register "config1" = "0x0d" -+ register "config2" = "0xa8" -+ register "config3" = "0xc4" -+ register "has_keyboard_backlight" = "1" -+ register "event2_enable" = "0xff" -+ register "event3_enable" = "0xff" -+ register "event4_enable" = "0xd0" -+ register "event5_enable" = "0x3c" -+ register "event7_enable" = "0x01" -+ register "event8_enable" = "0x7b" -+ register "event9_enable" = "0xff" -+ register "eventc_enable" = "0xff" -+ register "eventd_enable" = "0xff" -+ register "evente_enable" = "0x9d" -+ device pnp ff.2 on # dummy -+ io 0x60 = 0x62 -+ io 0x62 = 0x66 -+ io 0x64 = 0x1600 -+ io 0x66 = 0x1604 -+ end -+ end -+ -+ chip drivers/pc80/tpm -+ device pnp 0c31.0 on end -+ end -+ end -+ device ref hda on end -+ end -+end -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl -new file mode 100644 -index 0000000000..aa4d4de2a6 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl -@@ -0,0 +1,33 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <acpi/acpi.h> -+DefinitionBlock( -+ "dsdt.aml", -+ "DSDT", -+ ACPI_DSDT_REV_2, -+ OEM_ID, -+ ACPI_TABLE_CREATOR, -+ 0x20110725 -+) -+{ -+ #include <acpi/dsdt_top.asl> -+ #include <soc/intel/common/block/acpi/acpi/globalnvs.asl> -+ #include <cpu/intel/common/acpi/cpu.asl> -+ -+ Device (\_SB.PCI0) -+ { -+ #include <soc/intel/skylake/acpi/systemagent.asl> -+ #include <soc/intel/skylake/acpi/pch.asl> -+ #include <drivers/intel/gma/acpi/default_brightness_levels.asl> -+ } -+ -+ Scope (\_SB.PCI0.RP01) -+ { -+ Device (PEGP) -+ { -+ Name (_ADR, Zero) -+ } -+ } -+ -+ #include <southbridge/intel/common/acpi/sleepstates.asl> -+} -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ec.c b/src/mainboard/lenovo/sklkbl_thinkpad/ec.c -new file mode 100644 -index 0000000000..adb6a60324 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/ec.c -@@ -0,0 +1,153 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <arch/io.h> -+#include "ec.h" -+ -+#define MICROCHIP_CONFIGURATION_ENTRY_KEY 0x55 -+#define MICROCHIP_CONFIGURATION_EXIT_KEY 0xaa -+ -+void microchip_pnp_enter_conf_state(uint16_t port) -+{ -+ outb(MICROCHIP_CONFIGURATION_ENTRY_KEY, port); -+} -+ -+void microchip_pnp_exit_conf_state(uint16_t port) -+{ -+ outb(MICROCHIP_CONFIGURATION_EXIT_KEY, port); -+} -+ -+uint8_t pnp_read(uint16_t port, uint8_t index) -+{ -+ outb(index, port); -+ return inb(port + 1); -+} -+ -+uint32_t pnp_read_le32(uint16_t port, uint8_t index) -+{ -+ return (uint32_t) pnp_read(port, index) | -+ (uint32_t) pnp_read(port, index + 1) << 8 | -+ (uint32_t) pnp_read(port, index + 2) << 16 | -+ (uint32_t) pnp_read(port, index + 3) << 24; -+} -+ -+void pnp_write(uint16_t port, uint8_t index, uint8_t value) -+{ -+ outb(index, port); -+ outb(value, port + 1); -+} -+ -+void pnp_write_le32(uint16_t port, uint8_t index, uint32_t value) -+{ -+ pnp_write(port, index, value & 0xff); -+ pnp_write(port, index + 1, value >> 8 & 0xff); -+ pnp_write(port, index + 2, value >> 16 & 0xff); -+ pnp_write(port, index + 3, value >> 24 & 0xff); -+} -+ -+static void ecN_clear_out_queue(uint16_t cmd_port, uint16_t data_port) -+{ -+ while (inb(cmd_port) & EC_OBF) -+ inb(data_port); -+} -+ -+static void ecN_wait_to_send(uint16_t cmd_port, uint16_t data_port) -+{ -+ while (inb(cmd_port) & EC_IBF) -+ ; -+} -+ -+static void ecN_wait_to_recv(uint16_t cmd_port, uint16_t data_port) -+{ -+ while (!(inb(cmd_port) & EC_OBF)) -+ ; -+} -+ -+uint8_t ecN_read(uint16_t cmd_port, uint16_t data_port, uint8_t addr) -+{ -+ ecN_clear_out_queue(cmd_port, data_port); -+ ecN_wait_to_send(cmd_port, data_port); -+ outb(EC_READ, cmd_port); -+ ecN_wait_to_send(cmd_port, data_port); -+ outb(addr, data_port); -+ ecN_wait_to_recv(cmd_port, data_port); -+ return inb(data_port); -+} -+ -+void ecN_write(uint16_t cmd_port, uint16_t data_port, uint8_t addr, uint8_t val) -+{ -+ ecN_clear_out_queue(cmd_port, data_port); -+ ecN_wait_to_send(cmd_port, data_port); -+ outb(EC_WRITE, cmd_port); -+ ecN_wait_to_send(cmd_port, data_port); -+ outb(addr, data_port); -+ ecN_wait_to_send(cmd_port, data_port); -+ outb(val, data_port); -+} -+ -+uint8_t eeprom_read(uint16_t addr) -+{ -+ ecN_clear_out_queue(EC2_CMD, EC2_DATA); -+ ecN_wait_to_send(EC2_CMD, EC2_DATA); -+ outl(1, EC2_CMD); -+ ecN_wait_to_send(EC2_CMD, EC2_DATA); -+ outl(addr, EC2_DATA); -+ ecN_wait_to_recv(EC2_CMD, EC2_DATA); -+ return inl(EC2_DATA); -+} -+ -+void eeprom_write(uint16_t addr, uint8_t val) -+{ -+ ecN_clear_out_queue(EC2_CMD, EC2_DATA); -+ ecN_wait_to_send(EC2_CMD, EC2_DATA); -+ outl(2, EC2_CMD); -+ ecN_wait_to_send(EC2_CMD, EC2_DATA); -+ outl((uint32_t) addr | (uint32_t) val << 16, EC2_DATA); -+ ecN_wait_to_recv(EC2_CMD, EC2_DATA); -+ inl(EC2_DATA); -+} -+ -+uint16_t debug_loaded_keys(void) -+{ -+ return (uint16_t) ec0_read(0x87) << 8 | (uint16_t) ec0_read(0x86); -+} -+ -+static void debug_cmd(uint8_t cmd) -+{ -+ ec0_write(EC_DEBUG_CMD, cmd); -+ while (ec0_read(EC_DEBUG_CMD) & 0x80) -+ ; -+} -+ -+void debug_read_key(uint8_t i, uint8_t *key) -+{ -+ debug_cmd(0x80 | (i & 0xf)); -+ for (int j = 0; j < 8; ++j) -+ key[j] = ec0_read(0x3e + j); -+} -+ -+void debug_write_key(uint8_t i, const uint8_t *key) -+{ -+ for (int j = 0; j < 8; ++j) -+ ec0_write(0x3e + j, key[j]); -+ debug_cmd(0xc0 | (i & 0xf)); -+} -+ -+uint32_t debug_read_dword(uint32_t addr) -+{ -+ ecN_clear_out_queue(EC3_CMD, EC3_DATA); -+ ecN_wait_to_send(EC3_CMD, EC3_DATA); -+ outl(addr << 8 | 0xE2, EC3_DATA); -+ ecN_wait_to_recv(EC3_CMD, EC3_DATA); -+ return inl(EC3_DATA); -+} -+ -+void debug_write_dword(uint32_t addr, uint32_t val) -+{ -+ ecN_clear_out_queue(EC3_CMD, EC3_DATA); -+ ecN_wait_to_send(EC3_CMD, EC3_DATA); -+ outl(addr << 8 | 0xEA, EC3_DATA); -+ ecN_wait_to_send(EC3_CMD, EC3_DATA); -+ outl(val, EC3_DATA); -+} -+ -+const uint8_t debug_rw_key[8] = { 0x7a, 0x41, 0xb1, 0x49, 0xfe, 0x21, 0x01, 0xcf }; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ec.h b/src/mainboard/lenovo/sklkbl_thinkpad/ec.h -new file mode 100644 -index 0000000000..d2963c8962 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/ec.h -@@ -0,0 +1,99 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#ifndef SKLKBL_THINKPAD_EC_H -+#define SKLKBL_THINKPAD_EC_H -+ -+// EC configuration base address -+#define EC_CFG_PORT 0x4e -+ -+// Chip global registers -+#define PNP_LDN_SELECT 0x07 -+# define LDN_UART 0x07 -+# define LDN_LPCIF 0x0c -+#define EC_DEVICE_ID 0x20 -+#define EC_DEVICE_REV 0x21 -+ -+// LPC I/F registers -+#define LPCIF_SIRQ(i) (0x40 + (i)) -+ -+#define LPCIF_BAR_CFG 0x60 -+#define LPCIF_BAR_MAILBOX 0x64 -+#define LPCIF_BAR_8042 0x68 -+#define LPCIF_BAR_ACPI_EC0 0x6c -+#define LPCIF_BAR_ACPI_EC1 0x70 -+#define LPCIF_BAR_ACPI_EC2 0x74 -+#define LPCIF_BAR_ACPI_EC3 0x78 -+#define LPCIF_BAR_ACPI_PM0 0x7c -+#define LPCIF_BAR_UART 0x80 -+#define LPCIF_BAR_FAST_KYBD 0x84 -+#define LPCIF_BAR_EMBED_FLASH 0x88 -+#define LPCIF_BAR_GP_SPI 0x8c -+#define LPCIF_BAR_EMI 0x90 -+#define LPCIF_BAR_PMH7 0x94 -+#define LPCIF_BAR_PORT80_DBG0 0x98 -+#define LPCIF_BAR_PORT80_DBG1 0x9c -+#define LPCIF_BAR_RTC 0xa0 -+ -+// UART registers -+#define UART_ACTIVATE 0x30 -+#define UART_CONFIG_SELECT 0xf0 -+ -+void microchip_pnp_enter_conf_state(uint16_t port); -+void microchip_pnp_exit_conf_state(uint16_t port); -+uint8_t pnp_read(uint16_t port, uint8_t index); -+uint32_t pnp_read_le32(uint16_t port, uint8_t index); -+void pnp_write(uint16_t port, uint8_t index, uint8_t value); -+void pnp_write_le32(uint16_t port, uint8_t index, uint32_t value); -+ -+#define EC0_CMD 0x0066 -+#define EC0_DATA 0x0062 -+#define EC1_CMD 0x1604 -+#define EC1_DATA 0x1600 -+#define EC2_CMD 0x1634 -+#define EC2_DATA 0x1630 -+#define EC3_CMD 0x161c -+#define EC3_DATA 0x1618 -+ -+#define EC_OBF (1 << 0) -+#define EC_IBF (1 << 1) -+ -+#define EC_READ 0x80 -+#define EC_WRITE 0x81 -+ -+uint8_t ecN_read(uint16_t cmd_port, uint16_t data_port, uint8_t addr); -+ -+void ecN_write(uint16_t cmd_port, uint16_t data_port, uint8_t addr, uint8_t val); -+ -+// EC0 and EC1 mostly are useful with the READ/WRITE commands -+#define ec0_read(addr) ecN_read(EC0_CMD, EC0_DATA, addr) -+#define ec0_write(addr, val) ecN_write(EC0_CMD, EC0_DATA, addr, val) -+#define ec1_read(addr) ecN_read(EC1_CMD, EC1_DATA, addr) -+#define ec1_write(addr, val) ecN_write(EC1_CMD, EC1_DATA, addr, val) -+ -+// Read from the emulated EEPROM -+uint8_t eeprom_read(uint16_t addr); -+ -+// Write to the emulated EEPROM -+void eeprom_write(uint16_t addr, uint8_t val); -+ -+// Read loaded debug key mask -+uint16_t debug_loaded_keys(void); -+ -+// The following location (via either EC0 or EC1) can be used to interact with the debug interface -+#define EC_DEBUG_CMD 0x3d -+ -+void debug_read_key(uint8_t i, uint8_t *key); -+ -+void debug_write_key(uint8_t i, const uint8_t *key); -+ -+uint32_t debug_read_dword(uint32_t addr); -+ -+void debug_write_dword(uint32_t addr, uint32_t val); -+ -+// RW unlock key index -+#define DEBUG_RW_KEY_IDX 1 -+ -+// RW unlock key for EC version N24HT37W -+extern const uint8_t debug_rw_key[8]; -+ -+#endif -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/gpio.h b/src/mainboard/lenovo/sklkbl_thinkpad/gpio.h -new file mode 100644 -index 0000000000..d89ed712d4 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/gpio.h -@@ -0,0 +1,8 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#ifndef GPIO_H -+#define GPIO_H -+ -+void variant_config_gpios(void); -+ -+#endif -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c -new file mode 100644 -index 0000000000..44c8578852 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c -@@ -0,0 +1,105 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <arch/io.h> -+#include <device/device.h> -+#include <drivers/intel/gma/int15.h> -+#include <option.h> -+#include <soc/ramstage.h> -+#include "ec.h" -+#include "gpio.h" -+ -+#define GPIO_GPU_RST GPP_E22 // active low -+#define GPIO_1R8VIDEO_AON_ON GPP_E23 -+ -+#define GPIO_DGFX_PWRGD GPP_F3 -+ -+#define GPIO_DISCRETE_PRESENCE GPP_D9 // active low -+#define GPIO_DGFX_VRAM_ID0 GPP_D11 -+#define GPIO_DGFX_VRAM_ID1 GPP_D12 -+ -+void mainboard_silicon_init_params(FSP_SIL_UPD *params) -+{ -+ static const char * const dgfx_vram_id_str[] = { "1GB", "2GB", "4GB", "N/A" }; -+ -+ int dgfx_vram_id; -+ -+ // Setup GPIOs -+ variant_config_gpios(); -+ -+ // Detect and enable dGPU -+ if (gpio_get(GPIO_DISCRETE_PRESENCE) == 0) { // active low -+ dgfx_vram_id = gpio_get(GPIO_DGFX_VRAM_ID0) | gpio_get(GPIO_DGFX_VRAM_ID1) << 1; -+ printk(BIOS_DEBUG, "Discrete GPU present with %s VRAM\n", dgfx_vram_id_str[dgfx_vram_id]); -+ -+ // NOTE: i pulled this GPU enable sequence from thin air -+ // it sometimes works but is buggy and the GPU disappears in some cases so disabling it by default. -+ // also unrelated to this enable sequence the nouveau driver only works on 6.8-6.9 kernels -+ if (get_uint_option("dgpu_enable", 0)) { -+ printk(BIOS_DEBUG, "Enabling discrete GPU\n"); -+ gpio_set(GPIO_1R8VIDEO_AON_ON, 1); // Enable GPU power rail -+ while (!gpio_get(GPIO_DGFX_PWRGD)) // Wait for power good signal from GPU -+ ; -+ gpio_set(GPIO_GPU_RST, 1); // Release GPU from reset -+ } else { -+ printk(BIOS_DEBUG, "Discrete GPU will remain disabled\n"); -+ } -+ -+ } else { -+ printk(BIOS_DEBUG, "Discrete GPU not present\n"); -+ } -+} -+ -+static void dump_ec_cfg(uint16_t port) -+{ -+ microchip_pnp_enter_conf_state(port); -+ -+ // Device info -+ printk(BIOS_DEBUG, "Device id %02x\n", pnp_read(port, EC_DEVICE_ID)); -+ printk(BIOS_DEBUG, "Device rev %02x\n", pnp_read(port, EC_DEVICE_REV)); -+ -+ // Switch to LPCIF LDN -+ pnp_write(port, PNP_LDN_SELECT, LDN_LPCIF); -+ -+ // Dump SIRQs -+ for (int i = 0; i <= 15; i += 1) -+ printk(BIOS_DEBUG, "SIRQ%d = %02x\n", i, pnp_read(port, LPCIF_SIRQ(i))); -+ -+ // Dump BARs -+ printk(BIOS_DEBUG, "BAR CFG = %08x\n", pnp_read_le32(port, LPCIF_BAR_CFG)); -+ printk(BIOS_DEBUG, "BAR MAILBOX = %08x\n", pnp_read_le32(port, LPCIF_BAR_MAILBOX)); -+ printk(BIOS_DEBUG, "BAR 8042 = %08x\n", pnp_read_le32(port, LPCIF_BAR_8042)); -+ printk(BIOS_DEBUG, "BAR ACPI_EC0 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_EC0)); -+ printk(BIOS_DEBUG, "BAR ACPI_EC1 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_EC1)); -+ printk(BIOS_DEBUG, "BAR ACPI_EC2 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_EC2)); -+ printk(BIOS_DEBUG, "BAR ACPI_EC3 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_EC3)); -+ printk(BIOS_DEBUG, "BAR ACPI_PM0 = %08x\n", pnp_read_le32(port, LPCIF_BAR_ACPI_PM0)); -+ printk(BIOS_DEBUG, "BAR UART = %08x\n", pnp_read_le32(port, LPCIF_BAR_UART)); -+ printk(BIOS_DEBUG, "BAR FAST_KYBD = %08x\n", pnp_read_le32(port, LPCIF_BAR_FAST_KYBD)); -+ printk(BIOS_DEBUG, "BAR EMBED_FLASH = %08x\n", pnp_read_le32(port, LPCIF_BAR_EMBED_FLASH)); -+ printk(BIOS_DEBUG, "BAR GP_SPI = %08x\n", pnp_read_le32(port, LPCIF_BAR_GP_SPI)); -+ printk(BIOS_DEBUG, "BAR EMI = %08x\n", pnp_read_le32(port, LPCIF_BAR_EMI)); -+ printk(BIOS_DEBUG, "BAR PMH7 = %08x\n", pnp_read_le32(port, LPCIF_BAR_PMH7)); -+ printk(BIOS_DEBUG, "BAR PORT80_DBG0 = %08x\n", pnp_read_le32(port, LPCIF_BAR_PORT80_DBG0)); -+ printk(BIOS_DEBUG, "BAR PORT80_DBG1 = %08x\n", pnp_read_le32(port, LPCIF_BAR_PORT80_DBG1)); -+ printk(BIOS_DEBUG, "BAR RTC = %08x\n", pnp_read_le32(port, LPCIF_BAR_RTC)); -+ -+ microchip_pnp_exit_conf_state(port); -+} -+ -+static void mainboard_enable(struct device *dev) -+{ -+ if (CONFIG(VGA_ROM_RUN)) -+ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, -+ GMA_INT15_PANEL_FIT_DEFAULT, -+ GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); -+} -+ -+static void mainboard_init(void *chip_info) -+{ -+ dump_ec_cfg(EC_CFG_PORT); -+} -+ -+struct chip_operations mainboard_ops = { -+ .enable_dev = mainboard_enable, -+ .init = mainboard_init, -+}; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt 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-HcmV?d00001 - -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads -new file mode 100644 -index 0000000000..fcfbd75a92 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads -@@ -0,0 +1,19 @@ -+-- SPDX-License-Identifier: GPL-2.0-or-later -+ -+with HW.GFX.GMA; -+with HW.GFX.GMA.Display_Probing; -+ -+use HW.GFX.GMA; -+use HW.GFX.GMA.Display_Probing; -+ -+private package GMA.Mainboard is -+ -+ ports : constant Port_List := -+ (eDP, -+ DP1, -+ DP2, -+ HDMI1, -+ HDMI2, -+ others => Disabled); -+ -+end GMA.Mainboard; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c -new file mode 100644 -index 0000000000..f7c29e1f39 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c -@@ -0,0 +1,203 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <soc/gpio.h> -+#include "../../gpio.h" -+ -+/* FIXME: There are multiple GPIOs here that should be locked to prevent "TPM GPIO fail" style -+ * attacks. Unfortunately SKL/KBL GPIO locking *does not* work currently. */ -+ -+static const struct pad_config gpio_table[] = { -+ -+ /* ------- GPIO Community 0 ------- */ -+ -+ /* ------- GPIO Group GPP_A ------- */ -+ PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1), /* -KBRC */ -+ PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1), /* LPC_AD0 */ -+ PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1), /* LPC_AD1 */ -+ PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1), /* LPC_AD2 */ -+ PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1), /* LPC_AD3 */ -+ PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1), /* -LPC_FRAME */ -+ PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1), /* IRQSER */ -+ PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1), /* -TPM_IRQ */ -+ PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1), /* -CLKRUN */ -+ PAD_CFG_NF(GPP_A9, NATIVE, DEEP, NF1), /* LPCCLK_EC_24M */ -+ PAD_CFG_NF(GPP_A10, NATIVE, DEEP, NF1), /* LPCCLK_DEBUG_24M */ -+ PAD_NC(GPP_A11, NONE), -+ PAD_NC(GPP_A12, NONE), -+ PAD_CFG_NF(GPP_A13, NATIVE, DEEP, NF1), /* -SUSWARN */ -+ PAD_CFG_NF(GPP_A14, NATIVE, DEEP, NF1), /* -SUS_STAT */ -+ PAD_CFG_NF(GPP_A15, NATIVE, DEEP, NF1), /* -SUSWARN */ -+ PAD_NC(GPP_A16, NONE), -+ PAD_NC(GPP_A17, NONE), -+ PAD_NC(GPP_A18, NONE), -+ PAD_NC(GPP_A19, NONE), -+ PAD_NC(GPP_A20, NONE), -+ PAD_NC(GPP_A21, NONE), -+ PAD_NC(GPP_A22, NONE), -+ PAD_NC(GPP_A23, NONE), -+ -+ /* ------- GPIO Group GPP_B ------- */ -+ PAD_NC(GPP_B0, NONE), -+ PAD_NC(GPP_B1, NONE), -+ PAD_NC(GPP_B2, NONE), -+ PAD_NC(GPP_B3, NONE), -+ PAD_CFG_GPI_SCI(GPP_B4, NONE, DEEP, EDGE_SINGLE, INVERT), /* -TBT_PLUG_EVENT */ -+ PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1), /* -CLKREQ_PCIE0 */ -+ PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1), /* -CLKREQ_PCIE4 */ -+ PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), /* -CLKREQ_PCIE5 */ -+ PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1), /* -CLKREQ_PCIE6 */ -+ PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1), /* -CLKREQ_PCIE8 */ -+ PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1), /* -CLKREQ_PCIE10 */ -+ PAD_NC(GPP_B11, NONE), -+ PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), /* -PCH_SLP_S0 */ -+ PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), /* -PLTRST */ -+ PAD_CFG_NF(GPP_B14, NATIVE, DEEP, NF1), /* PCH_SPKR */ -+ PAD_CFG_GPO(GPP_B15, 1, DEEP), /* NFC_DLREQ */ -+ PAD_NC(GPP_B16, NONE), -+ PAD_NC(GPP_B17, NONE), -+ PAD_NC(GPP_B18, NONE), -+ PAD_NC(GPP_B19, NONE), -+ PAD_NC(GPP_B20, NONE), -+ PAD_NC(GPP_B21, NONE), -+ PAD_NC(GPP_B22, NONE), -+ PAD_NC(GPP_B23, NONE), -+ -+ /* ------- GPIO Community 1 ------- */ -+ -+ /* ------- GPIO Group GPP_C ------- */ -+ PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), /* SMB_CLK */ -+ PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), /* SMB_DATA */ -+ PAD_NC(GPP_C2, NONE), -+ PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), /* SML0_CLK */ -+ PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), /* SML0_DATA */ -+ PAD_NC(GPP_C5, NONE), -+ PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* EC_SCL2 */ -+ PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* EC_SDA2 */ -+ PAD_NC(GPP_C8, NONE), -+ PAD_NC(GPP_C9, NONE), -+ PAD_NC(GPP_C10, NONE), -+ PAD_NC(GPP_C11, NONE), -+ PAD_NC(GPP_C12, NONE), -+ PAD_NC(GPP_C13, NONE), -+ PAD_NC(GPP_C14, NONE), -+ PAD_NC(GPP_C15, NONE), -+ PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), /* I2C0_DATA */ -+ PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), /* I2C0_CLK */ -+ PAD_NC(GPP_C18, NONE), -+ PAD_NC(GPP_C19, NONE), -+ PAD_CFG_GPO(GPP_C20, 0, DEEP), /* EPRIVACY_ON */ -+ PAD_CFG_GPO(GPP_C21, 0, DEEP), /* TBT_FORCE_PWR */ -+ PAD_CFG_GPI_SCI(GPP_C22, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_SCI */ -+ PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_WAKE */ -+ -+ /* ------- GPIO Group GPP_D ------- */ -+ PAD_NC(GPP_D0, NONE), -+ PAD_NC(GPP_D1, NONE), -+ PAD_NC(GPP_D2, NONE), -+ PAD_NC(GPP_D3, NONE), -+ PAD_NC(GPP_D4, NONE), -+ PAD_NC(GPP_D5, NONE), -+ PAD_NC(GPP_D6, NONE), -+ PAD_NC(GPP_D7, NONE), -+ PAD_NC(GPP_D8, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_D9, UP_20K, DEEP, OFF, ACPI), /* -DISCRETE_PRESENCE */ -+ PAD_NC(GPP_D10, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_D11, UP_20K, DEEP, OFF, ACPI), /* DGFX_VRAM_ID0 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_D12, UP_20K, DEEP, OFF, ACPI), /* DGFX_VRAM_ID1 */ -+ PAD_NC(GPP_D13, NONE), -+ PAD_NC(GPP_D14, NONE), -+ PAD_NC(GPP_D15, NONE), -+ PAD_NC(GPP_D16, NONE), -+ PAD_CFG_GPO(GPP_D17, 0, DEEP), /* DDI_PRIORITY1 */ -+ PAD_NC(GPP_D18, NONE), -+ PAD_NC(GPP_D19, NONE), -+ PAD_NC(GPP_D20, NONE), -+ PAD_NC(GPP_D21, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_D22, UP_20K, DEEP, OFF, ACPI), /* -NFC_DTCT */ -+ PAD_NC(GPP_D23, NONE), -+ -+ /* ------- GPIO Group GPP_E ------- */ -+ PAD_NC(GPP_E0, NONE), -+ PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1), /* -WWAN_SATA_DTCT (always HIGH) */ -+ PAD_CFG_NF(GPP_E2, NONE, DEEP, NF1), /* -PE_DTCT */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_E3, NONE, DEEP, EDGE_SINGLE, ACPI), /* -TBT_PLUG_EVENT */ -+ PAD_CFG_GPO(GPP_E4, 1, DEEP), /* NFC_ON */ -+ PAD_NC(GPP_E5, NONE), -+ PAD_CFG_NF(GPP_E6, NONE, RSMRST, NF1), /* SATA2_DEVSLP */ -+ PAD_NC(GPP_E7, NONE), -+ PAD_NC(GPP_E8, NONE), -+ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), /* -USB_PORT0_OC0 (AON port) */ -+ PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1), /* -USB_PORT1_OC1 (regular port) */ -+ PAD_NC(GPP_E11, NONE), -+ PAD_CFG_GPI_APIC_HIGH(GPP_E12, NONE, DEEP), /* NFC_INT */ -+ PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1), /* DDIP1_HPD */ -+ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), /* DDIP2_HPD */ -+ PAD_NC(GPP_E15, NONE), -+ PAD_NC(GPP_E16, NONE), -+ PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1), /* EDP_HPD */ -+ PAD_NC(GPP_E18, NONE), -+ PAD_NC(GPP_E19, NONE), -+ PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1), /* DDIP2_CTRLCLK */ -+ PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1), /* DDIP2_CTRLDATA */ -+ PAD_CFG_TERM_GPO(GPP_E22, 0, UP_20K, RSMRST), /* -GPU_RST */ -+ PAD_CFG_TERM_GPO(GPP_E23, 0, UP_20K, RSMRST), /* 1R8VIDEO_AON_ON */ -+ -+ /* ------- GPIO Community 2 ------- */ -+ -+ /* -------- GPIO Group GPD -------- */ -+ PAD_CFG_NF(GPD0, NONE, PWROK, NF1), /* -BATLOW */ -+ PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1), /* AC_PRESENT */ -+ PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1), /* -LANWAKE */ -+ PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1), /* -PWRSW_EC */ -+ PAD_CFG_NF(GPD4, NONE, PWROK, NF1), /* -PCH_SLP_S3 */ -+ PAD_CFG_NF(GPD5, NONE, PWROK, NF1), /* -PCH_SLP_S4 */ -+ PAD_CFG_NF(GPD6, NONE, PWROK, NF1), /* -PCH_SLP_M */ -+ PAD_NC(GPD7, NONE), -+ PAD_CFG_NF(GPD8, NONE, PWROK, NF1), /* SUSCLK_32K */ -+ PAD_CFG_NF(GPD9, NONE, PWROK, NF1), /* -PCH_SLP_WLAN */ -+ PAD_CFG_NF(GPD10, NONE, PWROK, NF1), /* -PCH_SLP_S5 */ -+ PAD_CFG_NF(GPD11, NONE, PWROK, NF1), /* LANPHYPC */ -+ -+ /* ------- GPIO Community 3 ------- */ -+ -+ /* ------- GPIO Group GPP_F ------- */ -+ PAD_NC(GPP_F0, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_F1, NONE, DEEP, OFF, ACPI), /* GC6_FB_EN */ -+ PAD_CFG_GPO(GPP_F2, 1, DEEP), /* -GPU_EVENT */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F3, NONE, DEEP, OFF, ACPI), /* DGFX_PWRGD */ -+ PAD_CFG_GPO(GPP_F4, 1, DEEP), /* -WWAN_RESET */ -+ PAD_NC(GPP_F5, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_F6, UP_20K, DEEP, OFF, ACPI), /* -MIC_HW_EN (R961 to GND) */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F7, UP_20K, DEEP, OFF, ACPI), /* -INT_MIC_DTCT */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F8, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG0 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F9, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG1 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F10, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG2 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F11, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG3 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F12, UP_20K, DEEP, OFF, ACPI), /* PLANARID0 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F13, UP_20K, DEEP, OFF, ACPI), /* PLANARID1 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F14, UP_20K, DEEP, OFF, ACPI), /* PLANARID2 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F15, UP_20K, DEEP, OFF, ACPI), /* PLANARID3 */ -+ PAD_NC(GPP_F16, NONE), -+ PAD_NC(GPP_F17, NONE), -+ PAD_NC(GPP_F18, NONE), -+ PAD_NC(GPP_F19, NONE), -+ PAD_NC(GPP_F20, NONE), -+ PAD_NC(GPP_F21, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_F22, UP_20K, DEEP, OFF, ACPI), /* -INTRUDER_PCH */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F23, UP_20K, DEEP, OFF, ACPI), /* -SC_DTCT */ -+ -+ /* ------- GPIO Group GPP_G ------- */ -+ PAD_NC(GPP_G0, NONE), -+ PAD_NC(GPP_G1, NONE), -+ PAD_NC(GPP_G2, NONE), -+ PAD_NC(GPP_G3, NONE), -+ PAD_CFG_GPO(GPP_G4, 0, DEEP), /* TBT_RTD3_PWR_EN */ -+ PAD_CFG_GPO(GPP_G5, 0, DEEP), /* TBT_FORCE_USB_PWR */ -+ PAD_CFG_GPO(GPP_G6, 0, DEEP), /* -TBT_PERST */ -+ PAD_CFG_GPI_SCI(GPP_G7, NONE, DEEP, LEVEL, INVERT), /* -TBT_PCIE_WAKE */ -+}; -+ -+void variant_config_gpios(void) -+{ -+ gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); -+} -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c -new file mode 100644 -index 0000000000..3a951ce0da ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c -@@ -0,0 +1,90 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <device/azalia_device.h> -+ -+const u32 cim_verb_data[] = { -+ 0x10ec0257, // Vendor/Device ID: Realtek ALC257 -+ 0x17aa225d, // Subsystem ID -+ 11, -+ AZALIA_SUBVENDOR(0, 0x17aa225d), -+ -+ AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_DESC( -+ AZALIA_INTEGRATED, -+ AZALIA_INTERNAL, -+ AZALIA_MIC_IN, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_NO_JACK_PRESENCE_DETECT, -+ 2, 0 -+ )), -+ AZALIA_PIN_CFG(0, 0x13, 0x40000000), // does not describe a jack or internal device -+ AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_DESC( -+ AZALIA_INTEGRATED, -+ AZALIA_INTERNAL, -+ AZALIA_SPEAKER, -+ AZALIA_OTHER_ANALOG, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_NO_JACK_PRESENCE_DETECT, -+ 1, 0 -+ )), -+ AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, -+ AZALIA_MIC_IN, -+ AZALIA_STEREO_MONO_1_8, -+ AZALIA_BLACK, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 3, 0 -+ )), -+ AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x1d, 0x40661b45), // does not describe a jack or internal device -+ AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x21, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, -+ AZALIA_HP_OUT, -+ AZALIA_STEREO_MONO_1_8, -+ AZALIA_BLACK, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 1, 15 -+ )), -+ -+ 0x8086280b, // Vendor/Device ID: Intel Kabylake HDMI -+ 0x80860101, // Subsystem ID -+ 4, -+ AZALIA_SUBVENDOR(2, 0x80860101), -+ -+ AZALIA_PIN_CFG(2, 0x05, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_DIGITAL_DISPLAY, -+ AZALIA_DIGITAL_OTHER_OUT, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 1, 0 -+ )), -+ AZALIA_PIN_CFG(2, 0x06, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_DIGITAL_DISPLAY, -+ AZALIA_DIGITAL_OTHER_OUT, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 2, 0 -+ )), -+ AZALIA_PIN_CFG(2, 0x07, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_DIGITAL_DISPLAY, -+ AZALIA_DIGITAL_OTHER_OUT, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 3, 0 -+ )), -+}; -+ -+const u32 pc_beep_verbs[] = {}; -+ -+AZALIA_ARRAY_SIZES; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c -new file mode 100644 -index 0000000000..5252a402f9 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c -@@ -0,0 +1,20 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <soc/romstage.h> -+#include <spd_bin.h> -+ -+void mainboard_memory_init_params(FSPM_UPD *mupd) -+{ -+ FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; -+ mem_cfg->DqPinsInterleaved = true; /* DDR_DQ in interleave mode */ -+ mem_cfg->CaVrefConfig = 2; /* VREF_CA to CH_A and VREF_DQ_B to CH_B */ -+ mem_cfg->MemorySpdDataLen = CONFIG_DIMM_SPD_SIZE; -+ -+ /* Get SPD for memory slots */ -+ struct spd_block blk = { .addr_map = { 0x50, 0x51, } }; -+ get_spd_smbus(&blk); -+ dump_spd_info(&blk); -+ -+ mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0]; -+ mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[1]; -+} -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb -new file mode 100644 -index 0000000000..bf66bd3a69 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb -@@ -0,0 +1,103 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+ -+chip soc/intel/skylake -+ device domain 0 on -+ device ref south_xhci on -+ register "usb2_ports" = "{ -+ [0] = USB2_PORT_MID(OC1), // USB-A -+ [1] = USB2_PORT_MID(OC0), // USB-A (always on) -+ [2] = USB2_PORT_MID(OC_SKIP), // JSC-1 (smartcard slot) -+ [3] = USB2_PORT_MID(OC_SKIP), // USB-C (charging port) -+ [4] = USB2_PORT_MID(OC_SKIP), // JCAM1 (IR camera) -+ [5] = USB2_PORT_MID(OC_SKIP), // JWWAN1 (M.2 WWAN USB) -+ [6] = USB2_PORT_MID(OC_SKIP), // JWLAN1 (M.2 WLAN USB) -+ [7] = USB2_PORT_MID(OC_SKIP), // JCAM1 (webcam) -+ [8] = USB2_PORT_MID(OC_SKIP), // JFPR1 (fingerprint reader) -+ [9] = USB2_PORT_MID(OC_SKIP), // JLCD1 (touch panel) -+ }" -+ register "usb3_ports" = "{ -+ [0] = USB3_PORT_DEFAULT(OC1), // USB-A -+ [1] = USB3_PORT_DEFAULT(OC0), // USB-A (always on) -+ [2] = USB3_PORT_DEFAULT(OC_SKIP), // RTS5344S (SD card reader) -+ [3] = USB3_PORT_DEFAULT(OC_SKIP), // USB-C (charging port) -+ }" -+ end -+ -+ device ref sata on -+ # SATA_2 - JHDD1 SATA SSD -+ register "SataPortsEnable[2]" = "1" -+ register "SataPortsDevSlp[2]" = "1" -+ end -+ -+ # PCIe controller 1 - 1x4 -+ # PCIE 1-4 - RP1 - dGPU - CLKOUT0 - CLKREQ0 -+ # -+ # PCIe controller 2 - 2x1+1x2 (lane reversal) -+ # PCIE 5 - GBE - GBE - CLKOUT1 - CLKREQ1 (clobbers RP8) -+ # PCIE 6 - RP7 - WLAN - CLKOUT2 - CLKREQ2 -+ # PCIE 7-8 - RP5 - WWAN - CLKOUT3 - CLKREQ3 -+ # -+ # PCIe controller 3 - 2x2 -+ # PCIE 9-10 - RP9 - TB3 - CLKOUT4 - CLKREQ4 -+ # PCIE 11-12 - RP11 - SSD - CLKOUT5 - CLKREQ5 -+ -+ # dGPU - x4 -+ device ref pcie_rp1 on -+ register "PcieRpEnable[0]" = "1" -+ register "PcieRpClkReqSupport[0]" = "1" -+ register "PcieRpClkReqNumber[0]" = "0" -+ register "PcieRpClkSrcNumber[0]" = "0" -+ register "PcieRpAdvancedErrorReporting[0]" = "1" -+ register "PcieRpLtrEnable[0]" = "1" -+ end -+ -+ # Ethernet (clobbers RP8) -+ device ref gbe on -+ register "LanClkReqSupported" = "1" -+ register "LanClkReqNumber" = "1" -+ register "EnableLanLtr" = "1" -+ register "EnableLanK1Off" = "1" -+ end -+ -+ # M.2 WLAN - x1 -+ device ref pcie_rp7 on -+ register "PcieRpEnable[6]" = "1" -+ register "PcieRpClkReqSupport[6]" = "1" -+ register "PcieRpClkReqNumber[6]" = "2" -+ register "PcieRpClkSrcNumber[6]" = "2" -+ register "PcieRpAdvancedErrorReporting[6]" = "1" -+ register "PcieRpLtrEnable[6]" = "1" -+ end -+ -+ # M.2 WWAN - x2 -+ device ref pcie_rp5 on -+ register "PcieRpEnable[4]" = "1" -+ register "PcieRpClkReqSupport[4]" = "1" -+ register "PcieRpClkReqNumber[4]" = "3" -+ register "PcieRpClkSrcNumber[4]" = "3" -+ register "PcieRpAdvancedErrorReporting[4]" = "1" -+ register "PcieRpLtrEnable[4]" = "1" -+ end -+ -+ # TB3 (Alpine Ridge LP) - x2 -+ device ref pcie_rp9 on -+ register "PcieRpEnable[8]" = "1" -+ register "PcieRpClkReqSupport[8]" = "1" -+ register "PcieRpClkReqNumber[8]" = "4" -+ register "PcieRpClkSrcNumber[8]" = "4" -+ register "PcieRpAdvancedErrorReporting[8]" = "1" -+ register "PcieRpLtrEnable[8]" = "1" -+ register "PcieRpHotPlug[8]" = "1" -+ end -+ -+ # M.2 2280 caddy - x2 -+ device ref pcie_rp11 on -+ register "PcieRpEnable[10]" = "1" -+ register "PcieRpClkReqSupport[10]" = "1" -+ register "PcieRpClkReqNumber[10]" = "5" -+ register "PcieRpClkSrcNumber[10]" = "5" -+ register "PcieRpAdvancedErrorReporting[10]" = "1" -+ register "PcieRpLtrEnable[10]" = "1" -+ end -+ end -+end -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt -new file mode 100644 -index 0000000000000000000000000000000000000000..47732e37d5b2bad4e674fd10eafa605d26f97840 -GIT binary patch -literal 4106 -zcmeHJUu+a*5TCu>yW9JAmoD2P<t%lC2CfC#y%tU^HSGOq>9tqx`iFWXCLD09R<E?S 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-zZf4pp#`ZEanRbG)(+odg+NX?t!SF|>{mPhI!flfFgv9nqI4Wr~5_?s`k0kALiCvcP -zCrRUFrpVYPYn?Jn%6MGXUXj_GGJYa!U&-tn8Gn&ANnz_0+@olH3VTw)mlf@-!p<v7 -zljhF5u5tObYwR{boRI14NxNkGd6QG=>8{!e#p0ct5}M(h16D>p?OGjSz6v3juERjS -z#z{?mXvVqrXs_rvUmYR40gNzg(QD6y9E94?4DWO|6eb83LI-smcVC6x1n2reH}rAp -zLM);f=tWDCr``UF5T>!;PYu^H1g>EBP8A}2*fM>s-@nC3pDV|}6+CtfhG(II7`pcw -z`jLfJ!?;*R@Bp=Nw2EPOC7FEs(cugIP_K6tN_$~tvS8nx6iOv|IMrO3&-m*N9ZP#b -znG^~>I|l1cUVSeD9r^k3h0TP}WWD9=MZxY<<azgO1@-W5<NTHW*-d)t{Q4yX9_+?a -zHawLe=uO6@%xqS#?JxafX%#$`BhkIqq>Z3B2yU!k71#YRpThOJtVheMDA50rV#s@U -z+nKbA{O(olYR}icuzQD*-cjBQ9;%!eMDVP>7mWsF@=%>o)wSgq=n%DHNOYwRr4Ao6 -zbNdgEn*RdDS>Rud+fIY0N8JkP3q6;>8o%R(CE2n3?Xg%qP+U%~6|{XFyxv7Y#;J2Z -XK$lk*wsY^m4}9|iz?mg_AjCfat$CyH - -literal 0 -HcmV?d00001 - -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads -new file mode 100644 -index 0000000000..fcfbd75a92 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads -@@ -0,0 +1,19 @@ -+-- SPDX-License-Identifier: GPL-2.0-or-later -+ -+with HW.GFX.GMA; -+with HW.GFX.GMA.Display_Probing; -+ -+use HW.GFX.GMA; -+use HW.GFX.GMA.Display_Probing; -+ -+private package GMA.Mainboard is -+ -+ ports : constant Port_List := -+ (eDP, -+ DP1, -+ DP2, -+ HDMI1, -+ HDMI2, -+ others => Disabled); -+ -+end GMA.Mainboard; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c -new file mode 100644 -index 0000000000..a98dd2bc4e ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c -@@ -0,0 +1,199 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <soc/gpio.h> -+#include "../../gpio.h" -+ -+static const struct pad_config gpio_table[] = { -+ /* ------- GPIO Community 0 ------- */ -+ -+ /* ------- GPIO Group GPP_A ------- */ -+ PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1), /* -KBRC */ -+ PAD_CFG_NF(GPP_A1, NATIVE, DEEP, NF1), /* LPC_AD0 */ -+ PAD_CFG_NF(GPP_A2, NATIVE, DEEP, NF1), /* LPC_AD1 */ -+ PAD_CFG_NF(GPP_A3, NATIVE, DEEP, NF1), /* LPC_AD2 */ -+ PAD_CFG_NF(GPP_A4, NATIVE, DEEP, NF1), /* LPC_AD3 */ -+ PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1), /* -LPC_FRAME */ -+ PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1), /* IRQSER */ -+ PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1), /* -TPM_IRQ */ -+ PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1), /* -CLKRUN */ -+ PAD_CFG_NF(GPP_A9, DN_20K, DEEP, NF1), /* LPCCLK_EC_24M */ -+ PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1), /* LPCCLK_DEBUG_24M */ -+ PAD_NC(GPP_A11, NONE), -+ PAD_NC(GPP_A12, NONE), -+ PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1), /* -SUSWARN */ -+ PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1), /* -SUS_STAT */ -+ PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1), /* -SUSWARN */ -+ PAD_NC(GPP_A16, NONE), -+ PAD_NC(GPP_A17, NONE), -+ PAD_NC(GPP_A18, NONE), -+ PAD_NC(GPP_A19, NONE), -+ PAD_NC(GPP_A20, NONE), -+ PAD_NC(GPP_A21, NONE), -+ PAD_NC(GPP_A22, NONE), -+ PAD_NC(GPP_A23, NONE), -+ -+ /* ------- GPIO Group GPP_B ------- */ -+ PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1), -+ PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1), -+ PAD_NC(GPP_B2, NONE), -+ PAD_NC(GPP_B3, NONE), -+ PAD_CFG_GPI_SCI(GPP_B4, NONE, DEEP, EDGE_SINGLE, INVERT), /* -TBT_PLUG_EVENT */ -+ PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1), /* -CLKREQ_PCIE0 (dGPU) */ -+ PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1), /* -CLKREQ_PCIE3 (WWAN) */ -+ PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), /* -CLKREQ_PCIE4 (GBE) */ -+ PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1), /* -CLKREQ_PCIE5 (WLAN) */ -+ PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1), /* -CLKREQ_PCIE6 (TB3) */ -+ PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1), /* -CLKREQ_PCIE8 (SSD) */ -+ PAD_NC(GPP_B11, NONE), -+ PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), /* -PCH_SLP_S0 */ -+ PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), /* -PLTRST */ -+ PAD_CFG_NF(GPP_B14, NONE, DEEP, NF1), /* PCH_SPKR */ -+ PAD_CFG_GPO(GPP_B15, 0, DEEP), /* NFC_DLREQ */ -+ PAD_NC(GPP_B16, NONE), -+ PAD_NC(GPP_B17, NONE), -+ PAD_NC(GPP_B18, NONE), -+ PAD_NC(GPP_B19, NONE), -+ PAD_NC(GPP_B20, NONE), -+ PAD_NC(GPP_B21, NONE), -+ PAD_NC(GPP_B22, NONE), -+ PAD_NC(GPP_B23, NONE), -+ -+ /* ------- GPIO Community 1 ------- */ -+ -+ /* ------- GPIO Group GPP_C ------- */ -+ PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1), /* SMB_CLK */ -+ PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1), /* SMB_DATA */ -+ PAD_CFG_GPO(GPP_C2, 1, DEEP), -+ PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), /* SML0_CLK */ -+ PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), /* SML0_DATA */ -+ PAD_NC(GPP_C5, NONE), -+ PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* EC_SCL2 */ -+ PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* EC_SDA2 */ -+ PAD_NC(GPP_C8, NONE), -+ PAD_NC(GPP_C9, NONE), -+ PAD_NC(GPP_C10, NONE), -+ PAD_NC(GPP_C11, NONE), -+ PAD_NC(GPP_C12, NONE), -+ PAD_NC(GPP_C13, NONE), -+ PAD_NC(GPP_C14, NONE), -+ PAD_NC(GPP_C15, NONE), -+ PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), /* I2C0_DATA */ -+ PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1), /* I2C0_CLK */ -+ PAD_NC(GPP_C18, NONE), -+ PAD_NC(GPP_C19, NONE), -+ PAD_CFG_GPO(GPP_C20, 0, DEEP), /* EPRIVACY_ON */ -+ PAD_CFG_GPO(GPP_C21, 0, DEEP), /* TBT_FORCE_PWR */ -+ PAD_CFG_GPI_SCI(GPP_C22, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_SCI */ -+ PAD_CFG_GPI_SCI(GPP_C23, NONE, DEEP, EDGE_SINGLE, INVERT), /* -EC_WAKE */ -+ -+ /* ------- GPIO Group GPP_D ------- */ -+ PAD_NC(GPP_D0, NONE), -+ PAD_NC(GPP_D1, NONE), -+ PAD_NC(GPP_D2, NONE), -+ PAD_NC(GPP_D3, NONE), -+ PAD_NC(GPP_D4, NONE), -+ PAD_NC(GPP_D5, NONE), -+ PAD_NC(GPP_D6, NONE), -+ PAD_NC(GPP_D7, NONE), -+ PAD_NC(GPP_D8, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_D9, UP_20K, DEEP, OFF, ACPI), /* -DISCRETE_PRESENCE */ -+ PAD_NC(GPP_D10, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_D11, UP_20K, DEEP, OFF, ACPI), /* DGFX_VRAM_ID0 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_D12, UP_20K, DEEP, OFF, ACPI), /* DGFX_VRAM_ID1 */ -+ PAD_NC(GPP_D13, NONE), -+ PAD_NC(GPP_D14, NONE), -+ PAD_NC(GPP_D15, NONE), -+ PAD_NC(GPP_D16, NONE), -+ PAD_CFG_GPO(GPP_D17, 0, DEEP), /* DDI_PRIORITY */ -+ PAD_NC(GPP_D18, NONE), -+ PAD_NC(GPP_D19, NONE), -+ PAD_NC(GPP_D20, NONE), -+ PAD_NC(GPP_D21, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_D22, UP_20K, DEEP, OFF, ACPI), /* -NFC_DTCT */ -+ PAD_NC(GPP_D23, NONE), -+ -+ /* ------- GPIO Group GPP_E ------- */ -+ PAD_CFG_GPO(GPP_E0, 1, DEEP), /* BDC_ON */ -+ PAD_NC(GPP_E1, NONE), -+ PAD_CFG_NF(GPP_E2, NONE, DEEP, NF1), /* -SATA2_DTCT */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_E3, NONE, DEEP, EDGE_SINGLE, ACPI), /* -TBT_PLUG_EVENT */ -+ PAD_CFG_GPO(GPP_E4, 1, DEEP), /* NFC_ON */ -+ PAD_NC(GPP_E5, NONE), -+ PAD_CFG_NF(GPP_E6, NONE, RSMRST, NF1), /* SATA2_DEVSLP */ -+ PAD_NC(GPP_E7, NONE), -+ PAD_NC(GPP_E8, NONE), -+ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), /* -USB_PORT0_OC0 */ -+ PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1), /* -USB_PORT1_OC1 */ -+ PAD_NC(GPP_E11, NONE), -+ PAD_CFG_GPI_APIC_HIGH(GPP_E12, NONE, DEEP), /* NFC_INT */ -+ PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1), /* DDIP1_HPD */ -+ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), /* DDIP2_HPD */ -+ PAD_NC(GPP_E15, NONE), -+ PAD_NC(GPP_E16, NONE), -+ PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1), /* EDP_HPD */ -+ PAD_NC(GPP_E18, NONE), -+ PAD_CFG_GPO(GPP_E19, 0, DEEP), -+ PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1), /* DDIP2_CTRLCLK */ -+ PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1), /* DDIP2_CTRLDATA */ -+ PAD_CFG_TERM_GPO(GPP_E22, 0, UP_20K, RSMRST), /* -GPU_RST */ -+ PAD_CFG_TERM_GPO(GPP_E23, 0, UP_20K, RSMRST), /* 1R8VIDEO_AON_ON */ -+ -+ /* ------- GPIO Community 2 ------- */ -+ -+ /* -------- GPIO Group GPD -------- */ -+ PAD_CFG_NF(GPD0, NONE, PWROK, NF1), /* -BATLOW */ -+ PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1), /* AC_PRESENT */ -+ PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1), /* -LANWAKE */ -+ PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1), /* -PWRSW_EC */ -+ PAD_CFG_NF(GPD4, NONE, PWROK, NF1), /* -PCH_SLP_S3 */ -+ PAD_CFG_NF(GPD5, NONE, PWROK, NF1), /* -PCH_SLP_S4 */ -+ PAD_CFG_NF(GPD6, NONE, PWROK, NF1), /* -PCH_SLP_M */ -+ PAD_NC(GPD7, NONE), -+ PAD_CFG_NF(GPD8, NONE, PWROK, NF1), /* SUSCLK_32K */ -+ PAD_CFG_NF(GPD9, NONE, PWROK, NF1), /* -PCH_SLP_WLAN */ -+ PAD_CFG_NF(GPD10, NONE, PWROK, NF1), /* -PCH_SLP_S5 */ -+ PAD_CFG_NF(GPD11, NONE, PWROK, NF1), /* LANPHYPC */ -+ -+ /* ------- GPIO Community 3 ------- */ -+ -+ /* ------- GPIO Group GPP_F ------- */ -+ PAD_CFG_GPO(GPP_F0, 0, DEEP), -+ PAD_CFG_GPI_TRIG_OWN(GPP_F1, NONE, DEEP, OFF, ACPI), /* GC6_FB_EN */ -+ PAD_CFG_GPO(GPP_F2, 1, DEEP), /* -GPU_EVENT */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F3, NONE, PLTRST, OFF, ACPI), /* DGFX_PWRGD */ -+ PAD_NC(GPP_F4, NONE), /* -WWAN_RESET */ -+ PAD_NC(GPP_F5, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_F6, UP_20K, DEEP, OFF, ACPI), /* -MIC_HW_EN (R37 to GND) */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F7, UP_20K, DEEP, OFF, ACPI), /* -INT_MIC_DTCT */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F8, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG0 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F9, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG1 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F10, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG2 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F11, UP_20K, DEEP, OFF, ACPI), /* WWAN_CFG3 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F12, UP_20K, DEEP, OFF, ACPI), /* PLANARID0 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F13, UP_20K, DEEP, OFF, ACPI), /* PLANARID1 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F14, UP_20K, DEEP, OFF, ACPI), /* PLANARID2 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F15, UP_20K, DEEP, OFF, ACPI), /* PLANARID3 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F16, UP_20K, DEEP, OFF, ACPI), /* MEMORYID0 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F17, UP_20K, DEEP, OFF, ACPI), /* MEMORYID1 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F18, UP_20K, DEEP, OFF, ACPI), /* MEMORYID2 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F19, UP_20K, DEEP, OFF, ACPI), /* MEMORYID3 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F20, UP_20K, DEEP, OFF, ACPI), /* MEMORYID4 */ -+ PAD_NC(GPP_F21, NONE), -+ PAD_CFG_GPI_TRIG_OWN(GPP_F22, UP_20K, DEEP, OFF, ACPI), /* -TAMPER_SW_DTCT */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F23, UP_20K, DEEP, OFF, ACPI), /* -SC_DTCT */ -+ -+ /* ------- GPIO Group GPP_G ------- */ -+ PAD_NC(GPP_G0, NONE), -+ PAD_NC(GPP_G1, NONE), -+ PAD_NC(GPP_G2, NONE), -+ PAD_NC(GPP_G3, NONE), -+ PAD_CFG_GPO(GPP_G4, 0, DEEP), /* TBT_RTD3_PWR_EN */ -+ PAD_CFG_GPO(GPP_G5, 0, DEEP), /* TBT_FORCE_USB_PWR */ -+ PAD_CFG_GPO(GPP_G6, 0, DEEP), /* -TBT_PERST */ -+ PAD_CFG_GPI_SCI(GPP_G7, NONE, DEEP, LEVEL, INVERT), /* -TBT_PCIE_WAKE */ -+}; -+ -+void variant_config_gpios(void) -+{ -+ gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); -+} -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c -new file mode 100644 -index 0000000000..b1d96c5a76 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c -@@ -0,0 +1,90 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <device/azalia_device.h> -+ -+const u32 cim_verb_data[] = { -+ 0x10ec0257, // Vendor/Device ID: Realtek ALC257 -+ 0x17aa2258, // Subsystem ID -+ 11, -+ AZALIA_SUBVENDOR(0, 0x17aa2258), -+ -+ AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_DESC( -+ AZALIA_INTEGRATED, -+ AZALIA_INTERNAL, -+ AZALIA_MIC_IN, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_NO_JACK_PRESENCE_DETECT, -+ 2, 0 -+ )), -+ AZALIA_PIN_CFG(0, 0x13, 0x40000000), // does not describe a jack or internal device -+ AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_DESC( -+ AZALIA_INTEGRATED, -+ AZALIA_INTERNAL, -+ AZALIA_SPEAKER, -+ AZALIA_OTHER_ANALOG, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_NO_JACK_PRESENCE_DETECT, -+ 1, 0 -+ )), -+ AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, -+ AZALIA_MIC_IN, -+ AZALIA_STEREO_MONO_1_8, -+ AZALIA_BLACK, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 3, 0 -+ )), -+ AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x1d, 0x40661b45), // does not describe a jack or internal device -+ AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)), -+ AZALIA_PIN_CFG(0, 0x21, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_RIGHT, -+ AZALIA_HP_OUT, -+ AZALIA_STEREO_MONO_1_8, -+ AZALIA_BLACK, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 1, 15 -+ )), -+ -+ 0x8086280b, // Vendor/Device ID: Intel Kabylake HDMI -+ 0x80860101, // Subsystem ID -+ 4, -+ AZALIA_SUBVENDOR(2, 0x80860101), -+ -+ AZALIA_PIN_CFG(2, 0x05, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_DIGITAL_DISPLAY, -+ AZALIA_DIGITAL_OTHER_OUT, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 1, 0 -+ )), -+ AZALIA_PIN_CFG(2, 0x06, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_DIGITAL_DISPLAY, -+ AZALIA_DIGITAL_OTHER_OUT, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 1, 0 -+ )), -+ AZALIA_PIN_CFG(2, 0x07, AZALIA_PIN_DESC( -+ AZALIA_JACK, -+ AZALIA_DIGITAL_DISPLAY, -+ AZALIA_DIGITAL_OTHER_OUT, -+ AZALIA_OTHER_DIGITAL, -+ AZALIA_COLOR_UNKNOWN, -+ AZALIA_JACK_PRESENCE_DETECT, -+ 1, 0 -+ )), -+}; -+ -+const u32 pc_beep_verbs[] = {}; -+ -+AZALIA_ARRAY_SIZES; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c -new file mode 100644 -index 0000000000..001e934b3a ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c -@@ -0,0 +1,44 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <cbfs.h> -+#include <gpio.h> -+#include <soc/gpio.h> -+#include <soc/romstage.h> -+#include <spd_bin.h> -+#include <stdio.h> -+ -+static const struct pad_config memory_id_gpio_table[] = { -+ PAD_CFG_GPI_TRIG_OWN(GPP_F16, UP_20K, DEEP, OFF, ACPI), /* MEMORYID0 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F17, UP_20K, DEEP, OFF, ACPI), /* MEMORYID1 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F18, UP_20K, DEEP, OFF, ACPI), /* MEMORYID2 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F19, UP_20K, DEEP, OFF, ACPI), /* MEMORYID3 */ -+ PAD_CFG_GPI_TRIG_OWN(GPP_F20, UP_20K, DEEP, OFF, ACPI), /* MEMORYID4 */ -+}; -+ -+void mainboard_memory_init_params(FSPM_UPD *mupd) -+{ -+ int spd_idx; -+ char spd_name[20]; -+ size_t spd_size; -+ -+ FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; -+ mem_cfg->DqPinsInterleaved = true; /* DDR_DQ in interleave mode */ -+ mem_cfg->CaVrefConfig = 2; /* VREF_CA to CH_A and VREF_DQ_B to CH_B */ -+ mem_cfg->MemorySpdDataLen = CONFIG_DIMM_SPD_SIZE; -+ -+ /* Get SPD for soldered RAM SPD (CH A) */ -+ gpio_configure_pads(memory_id_gpio_table, ARRAY_SIZE(memory_id_gpio_table)); -+ -+ spd_idx = gpio_get(GPP_F16) | gpio_get(GPP_F17) << 1 | gpio_get(GPP_F18) << 2 | -+ gpio_get(GPP_F19) << 3 | gpio_get(GPP_F20) << 4; -+ printk(BIOS_DEBUG, "Detected MEMORY_ID = %d\n", spd_idx); -+ snprintf(spd_name, sizeof(spd_name), "spd_%d.bin", spd_idx); -+ mem_cfg->MemorySpdPtr00 = (uintptr_t)cbfs_map(spd_name, &spd_size); -+ -+ /* Get SPD for memory slot (CH B) */ -+ struct spd_block blk = { .addr_map = { [1] = 0x51, } }; -+ get_spd_smbus(&blk); -+ dump_spd_info(&blk); -+ -+ mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[1]; -+} -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb -new file mode 100644 -index 0000000000..d4afca20c4 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb -@@ -0,0 +1,103 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+ -+chip soc/intel/skylake -+ device domain 0 on -+ device ref south_xhci on -+ register "usb2_ports" = "{ -+ [0] = USB2_PORT_MID(OC0), // JUSB1 (USB-A always on) -+ [1] = USB2_PORT_MID(OC1), // JUSB2 (USB-A) -+ [2] = USB2_PORT_MID(OC_SKIP), // JFPR (smartcard slot) -+ [3] = USB2_PORT_MID(OC_SKIP), // JUSBC (USB-C) -+ [4] = USB2_PORT_MID(OC_SKIP), // JCAM (IR camera) -+ [5] = USB2_PORT_MID(OC_SKIP), // JWWAN (M.2 WWAN USB) -+ [6] = USB2_PORT_MID(OC_SKIP), // JWLAN (M.2 WLAN USB) -+ [7] = USB2_PORT_MID(OC_SKIP), // JCAM (webcam) -+ [8] = USB2_PORT_MID(OC_SKIP), // JFPR (fingerprint reader) -+ [9] = USB2_PORT_MID(OC_SKIP), // JLCD (touch panel) -+ }" -+ register "usb3_ports" = "{ -+ [0] = USB3_PORT_DEFAULT(OC0), // JUSB1 (USB-A always on) -+ [1] = USB3_PORT_DEFAULT(OC1), // JUSB2 (USB-A) -+ [2] = USB3_PORT_DEFAULT(OC_SKIP), // JSD (SD card reader) -+ [3] = USB3_PORT_DEFAULT(OC_SKIP), // JUSBC (USB-C) -+ }" -+ end -+ -+ device ref sata on -+ # SATA_2 - Main M.2 SATA SSD -+ register "SataPortsEnable[2]" = "1" -+ register "SataPortsDevSlp[2]" = "1" -+ end -+ -+ # PCIe controller 1 - 1x2+2x1 -+ # PCIE 1-2 - RP1 - dGPU - CLKOUT0 - CLKREQ0 -+ # PCIE 4 - RP4 - WWAN - CLKOUT1 - CLKREQ1 -+ # -+ # PCIe controller 2 - 2x1+1x2 (lane reversal) -+ # PCIE 5 - GBE - GBE - CLKOUT2 - CLKREQ2 (clobbers RP8) -+ # PCIE 6 - RP7 - WLAN - CLKOUT3 - CLKREQ3 -+ # PCIE 7-8 - RP5 - TB3 - CLKOUT4 - CLKREQ4 -+ # -+ # PCIe controller 3 - 1x4 (lane reversal) -+ # PCIE 9-12 - RP9 - SSD - CLKOUT5 - CLKREQ5 -+ -+ # dGPU - x2 -+ device ref pcie_rp1 on -+ register "PcieRpEnable[0]" = "1" -+ register "PcieRpClkReqSupport[0]" = "1" -+ register "PcieRpClkReqNumber[0]" = "0" -+ register "PcieRpClkSrcNumber[0]" = "0" -+ register "PcieRpAdvancedErrorReporting[0]" = "1" -+ register "PcieRpLtrEnable[0]" = "1" -+ end -+ -+ # M.2 WWAN - x1 -+ device ref pcie_rp4 on -+ register "PcieRpEnable[3]" = "1" -+ register "PcieRpClkReqSupport[3]" = "1" -+ register "PcieRpClkReqNumber[3]" = "1" -+ register "PcieRpClkSrcNumber[3]" = "1" -+ register "PcieRpAdvancedErrorReporting[3]" = "1" -+ register "PcieRpLtrEnable[3]" = "1" -+ end -+ -+ # Ethernet (clobbers RP8) -+ device ref gbe on -+ register "LanClkReqSupported" = "1" -+ register "LanClkReqNumber" = "2" -+ register "EnableLanLtr" = "1" -+ register "EnableLanK1Off" = "1" -+ end -+ -+ # M.2 WLAN - x1 -+ device ref pcie_rp7 on -+ register "PcieRpEnable[6]" = "1" -+ register "PcieRpClkReqSupport[6]" = "1" -+ register "PcieRpClkReqNumber[6]" = "3" -+ register "PcieRpClkSrcNumber[6]" = "3" -+ register "PcieRpAdvancedErrorReporting[6]" = "1" -+ register "PcieRpLtrEnable[6]" = "1" -+ end -+ -+ # TB3 (Alpine Ridge LP) - x2 -+ device ref pcie_rp5 on -+ register "PcieRpEnable[4]" = "1" -+ register "PcieRpClkReqSupport[4]" = "1" -+ register "PcieRpClkReqNumber[4]" = "4" -+ register "PcieRpClkSrcNumber[4]" = "4" -+ register "PcieRpAdvancedErrorReporting[4]" = "1" -+ register "PcieRpLtrEnable[4]" = "1" -+ register "PcieRpHotPlug[4]" = "1" -+ end -+ -+ # M.2 2280 SSD - x2 -+ device ref pcie_rp9 on -+ register "PcieRpEnable[8]" = "1" -+ register "PcieRpClkReqSupport[8]" = "1" -+ register "PcieRpClkReqNumber[8]" = "5" -+ register "PcieRpClkSrcNumber[8]" = "5" -+ register "PcieRpAdvancedErrorReporting[8]" = "1" -+ register "PcieRpLtrEnable[8]" = "1" -+ end -+ end -+end -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_0.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_0.bin -new file mode 100644 -index 0000000000000000000000000000000000000000..86f39ddb55ea9fb58d5e5699637636ef597c734e -GIT binary patch -literal 512 -zcmY!u;9+)EWZ+<6U|?oq29gXMJYRrxPEL*>N67~+1r7#Qh7a1t+8`-(puhlu3{YAD -YT>%dM8_BI;nL`dsaHtp+rc($20I8n}l>h($ - -literal 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-zYz3L}{F>W!enxp}7)YiWinU~FgllWifig`TLxK(6%}hL^bdB7N9Ss$Lz^FmT39fQ* -FG5`?&65ap+ - -literal 0 -HcmV?d00001 - --- -2.39.5 - diff --git a/config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch deleted file mode 100644 index d5896fdc..00000000 --- a/config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch +++ /dev/null @@ -1,205 +0,0 @@ -From 27b2f2bc24e5e860b87119c963e534fb0d3e55f2 Mon Sep 17 00:00:00 2001 -From: Leah Rowe <info@minifree.org> -Date: Sun, 19 Feb 2023 18:21:43 +0000 -Subject: [PATCH 05/11] util/ifdtool: add --nuke flag (all 0xFF on region) - -When this option is used, the region's contents are overwritten -with all ones (0xFF). - -Example: - -./ifdtool --nuke gbe coreboot.rom -./ifdtool --nuke bios coreboot.com -./ifdtool --nuke me coreboot.com - -Rebased since the last revision update in lbmk. - -Signed-off-by: Leah Rowe <leah@libreboot.org> ---- - util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++----------- - 1 file changed, 83 insertions(+), 31 deletions(-) - -diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c -index 94105efe52..0706496af2 100644 ---- a/util/ifdtool/ifdtool.c -+++ b/util/ifdtool/ifdtool.c -@@ -2230,6 +2230,7 @@ static void print_usage(const char *name) - " tgl - Tiger Lake\n" - " wbg - Wellsburg\n" - " -S | --setpchstrap Write a PCH strap\n" -+ " -N | --nuke <region> Overwrite the specified region with 0xFF (all ones)\n" - " -V | --newvalue The new value to write into PCH strap specified by -S\n" - " -v | --version: print the version\n" - " -h | --help: print this help\n\n" -@@ -2238,6 +2239,60 @@ static void print_usage(const char *name) - "\n"); - } - -+static int -+get_region_type_string(const char *region_type_string) -+{ -+ if (!strcasecmp("Descriptor", region_type_string)) -+ return 0; -+ else if (!strcasecmp("BIOS", region_type_string)) -+ return 1; -+ else if (!strcasecmp("ME", region_type_string)) -+ return 2; -+ else if (!strcasecmp("GbE", region_type_string)) -+ return 3; -+ else if (!strcasecmp("Platform Data", region_type_string)) -+ return 4; -+ else if (!strcasecmp("Device Exp1", region_type_string)) -+ return 5; -+ else if (!strcasecmp("Secondary BIOS", region_type_string)) -+ return 6; -+ else if (!strcasecmp("Reserved", region_type_string)) -+ return 7; -+ else if (!strcasecmp("EC", region_type_string)) -+ return 8; -+ else if (!strcasecmp("Device Exp2", region_type_string)) -+ return 9; -+ else if (!strcasecmp("IE", region_type_string)) -+ return 10; -+ else if (!strcasecmp("10GbE_0", region_type_string)) -+ return 11; -+ else if (!strcasecmp("10GbE_1", region_type_string)) -+ return 12; -+ else if (!strcasecmp("PTT", region_type_string)) -+ return 15; -+ return -1; -+} -+ -+static void -+nuke(const char *filename, char *image, int size, int region_type) -+{ -+ int i; -+ struct region region; -+ const struct frba *frba = find_frba(image, size); -+ if (!frba) -+ exit(EXIT_FAILURE); -+ -+ region = get_region(frba, region_type); -+ if (region.size > 0) { -+ for (i = region.base; i <= region.limit; i++) { -+ if ((i + 1) > (size)) -+ break; -+ image[i] = 0xFF; -+ } -+ write_image(filename, image, size); -+ } -+} -+ - int main(int argc, char *argv[]) - { - int opt, option_index = 0; -@@ -2245,6 +2300,7 @@ int main(int argc, char *argv[]) - int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0; - int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0; - int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0; -+ int mode_nuke = 0; - int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0; - char *region_type_string = NULL, *region_fname = NULL, *layout_fname = NULL; - char *new_filename = NULL; -@@ -2279,6 +2335,7 @@ int main(int argc, char *argv[]) - {"validate", 0, NULL, 't'}, - {"setpchstrap", 1, NULL, 'S'}, - {"newvalue", 1, NULL, 'V'}, -+ {"nuke", 1, NULL, 'N'}, - {0, 0, 0, 0} - }; - -@@ -2328,35 +2385,8 @@ int main(int argc, char *argv[]) - region_fname++; - // Descriptor, BIOS, ME, GbE, Platform - // valid type? -- if (!strcasecmp("Descriptor", region_type_string)) -- region_type = 0; -- else if (!strcasecmp("BIOS", region_type_string)) -- region_type = 1; -- else if (!strcasecmp("ME", region_type_string)) -- region_type = 2; -- else if (!strcasecmp("GbE", region_type_string)) -- region_type = 3; -- else if (!strcasecmp("Platform Data", region_type_string)) -- region_type = 4; -- else if (!strcasecmp("Device Exp1", region_type_string)) -- region_type = 5; -- else if (!strcasecmp("Secondary BIOS", region_type_string)) -- region_type = 6; -- else if (!strcasecmp("Reserved", region_type_string)) -- region_type = 7; -- else if (!strcasecmp("EC", region_type_string)) -- region_type = 8; -- else if (!strcasecmp("Device Exp2", region_type_string)) -- region_type = 9; -- else if (!strcasecmp("IE", region_type_string)) -- region_type = 10; -- else if (!strcasecmp("10GbE_0", region_type_string)) -- region_type = 11; -- else if (!strcasecmp("10GbE_1", region_type_string)) -- region_type = 12; -- else if (!strcasecmp("PTT", region_type_string)) -- region_type = 15; -- if (region_type == -1) { -+ if ((region_type = -+ get_region_type_string(region_type_string)) == -1) { - fprintf(stderr, "No such region type: '%s'\n\n", - region_type_string); - fprintf(stderr, "run '%s -h' for usage\n", argv[0]); -@@ -2533,6 +2563,22 @@ int main(int argc, char *argv[]) - case 't': - mode_validate = 1; - break; -+ case 'N': -+ region_type_string = strdup(optarg); -+ if (!region_type_string) { -+ fprintf(stderr, "No region specified\n"); -+ print_usage(argv[0]); -+ exit(EXIT_FAILURE); -+ } -+ if ((region_type = -+ get_region_type_string(region_type_string)) == -1) { -+ fprintf(stderr, "No such region type: '%s'\n\n", -+ region_type_string); -+ print_usage(argv[0]); -+ exit(EXIT_FAILURE); -+ } -+ mode_nuke = 1; -+ break; - case 'v': - print_version(); - exit(EXIT_SUCCESS); -@@ -2552,7 +2598,8 @@ int main(int argc, char *argv[]) - if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject + - mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 | - mode_unlocked | mode_locked) + mode_altmedisable + mode_validate + -- (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) > 1) { -+ (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status + -+ mode_nuke) > 1) { - fprintf(stderr, "You may not specify more than one mode.\n\n"); - fprintf(stderr, "run '%s -h' for usage\n", argv[0]); - exit(EXIT_FAILURE); -@@ -2561,7 +2608,8 @@ int main(int argc, char *argv[]) - if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject + - mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 + - mode_locked + mode_unlocked + mode_density + mode_altmedisable + -- mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) == 0) { -+ mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status + -+ mode_nuke) == 0) { - fprintf(stderr, "You need to specify a mode.\n\n"); - fprintf(stderr, "run '%s -h' for usage\n", argv[0]); - exit(EXIT_FAILURE); -@@ -2674,6 +2722,10 @@ int main(int argc, char *argv[]) - write_image(new_filename, image, size); - } - -+ if (mode_nuke) { -+ nuke(new_filename, image, size, region_type); -+ } -+ - if (mode_altmedisable) { - struct fpsba *fpsba = find_fpsba(image, size); - struct fmsba *fmsba = find_fmsba(image, size); --- -2.39.5 - diff --git a/config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch deleted file mode 100644 index 3ff12724..00000000 --- a/config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 8230acfb9e1f692202b306ffb10fe89f783ab4e8 Mon Sep 17 00:00:00 2001 -From: Nicholas Chin <nic.c3.14@gmail.com> -Date: Fri, 12 May 2023 19:55:15 -0600 -Subject: [PATCH 06/11] Remove warning for coreboot images built without a - payload - -I added this in upstream to prevent people from accidentally flashing -roms without a payload resulting in a no boot situation, but in -libreboot lbmk handles the payload and thus this warning always comes -up. This has caused confusion and concern so just patch it out. ---- - payloads/Makefile.mk | 13 +------------ - 1 file changed, 1 insertion(+), 12 deletions(-) - -diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk -index 5f988dac1b..516133880f 100644 ---- a/payloads/Makefile.mk -+++ b/payloads/Makefile.mk -@@ -50,16 +50,5 @@ distclean-payloads: - print-repo-info-payloads: - -$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; ) - --ifeq ($(CONFIG_PAYLOAD_NONE),y) --show_notices:: warn_no_payload --endif -- --warn_no_payload: -- printf "\n\t** WARNING **\n" -- printf "coreboot has been built without a payload. Writing\n" -- printf "a coreboot image without a payload to your board's\n" -- printf "flash chip will result in a non-booting system. You\n" -- printf "can use cbfstool to add a payload to the image.\n\n" -- - .PHONY: force-payload coreinfo nvramcui --.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload -+.PHONY: clean-payloads distclean-payloads print-repo-info-payloads --- -2.39.5 - diff --git a/config/coreboot/next/patches/0011-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch b/config/coreboot/next/patches/0011-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch deleted file mode 100644 index 7dae2d6a..00000000 --- a/config/coreboot/next/patches/0011-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 12ff6e798d1cefc5b888e6035e52bf6d70c9ca47 Mon Sep 17 00:00:00 2001 -From: Leah Rowe <info@minifree.org> -Date: Tue, 31 Dec 2024 01:40:42 +0000 -Subject: [PATCH 11/11] soc/intel/pmc: Hardcoded poweroff after power fail - -Coreboot can set the power state for power on after previous -power failure, based on the option table. On the ThinkPad T480, -we have no nvram and, due to coreboot's design, we therefore -have no option table, so the default setting is enabled. - -In my testing, this seems to be that the system will turn on -after a power failure. If your ThinkPad was previously in a state -where it wouldn't turn on when plugging in the power, it'd be fine. - -If your battery ran out later on, this would be triggered and -your ThinkPad would permanently turn on, when plugging in a charger, -and there is currently no way to configure this behaviour. - -We currently only use the common SoC PMC code on the ThinkPad -T480, T480s and the Dell OptiPlex 3050 Micro, at the time of -this patch, and it is desirable that the system be set to power -off after power fail anyway. - -In some cases, you might want the opposite, for example if you're -running a server. This will be documented on the website, for that -reason. - -Signed-off-by: Leah Rowe <info@minifree.org> ---- - src/soc/intel/common/block/pmc/pmclib.c | 36 +++---------------------- - 1 file changed, 4 insertions(+), 32 deletions(-) - -diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c -index 0fadd6e409..843581b285 100644 ---- a/src/soc/intel/common/block/pmc/pmclib.c -+++ b/src/soc/intel/common/block/pmc/pmclib.c -@@ -760,38 +760,10 @@ void pmc_clear_pmcon_sts(void) - - void pmc_set_power_failure_state(const bool target_on) - { -- const unsigned int state = get_uint_option("power_on_after_fail", -- CONFIG_MAINBOARD_POWER_FAILURE_STATE); -- -- /* -- * On the shutdown path (target_on == false), we only need to -- * update the register for MAINBOARD_POWER_STATE_PREVIOUS. For -- * all other cases, we don't write the register to avoid clob- -- * bering the value set on the boot path. This is necessary, -- * for instance, when we can't access the option backend in SMM. -- */ -- -- switch (state) { -- case MAINBOARD_POWER_STATE_OFF: -- if (!target_on) -- break; -- printk(BIOS_INFO, "Set power off after power failure.\n"); -- pmc_soc_set_afterg3_en(false); -- break; -- case MAINBOARD_POWER_STATE_ON: -- if (!target_on) -- break; -- printk(BIOS_INFO, "Set power on after power failure.\n"); -- pmc_soc_set_afterg3_en(true); -- break; -- case MAINBOARD_POWER_STATE_PREVIOUS: -- printk(BIOS_INFO, "Keep power state after power failure.\n"); -- pmc_soc_set_afterg3_en(target_on); -- break; -- default: -- printk(BIOS_WARNING, "Unknown power-failure state: %d\n", state); -- break; -- } -+ if (!target_on) -+ return; -+ printk(BIOS_INFO, "Set power off after power failure.\n"); -+ pmc_soc_set_afterg3_en(false); - } - - /* This function returns the highest assertion duration of the SLP_Sx assertion widths */ --- -2.39.5 - diff --git a/config/coreboot/next/patches/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch b/config/coreboot/next/patches/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch deleted file mode 100644 index 5e4e6edb..00000000 --- a/config/coreboot/next/patches/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 916c7b027faba625b922e74e45e50f9ceab64a64 Mon Sep 17 00:00:00 2001 -From: Leah Rowe <leah@libreboot.org> -Date: Mon, 6 Jan 2025 01:16:01 +0000 -Subject: [PATCH 1/1] ec/dasharo: Comment EC_DASHARO_EC_FLASH_SIZE - -We don't use anything dasharo in Libreboot. - -This patch prevents the following config item appearing -in T480 and 3050 Micro configs: - -CONFIG_EC_DASHARO_EC_FLASH_SIZE=0x20000 - -Otherwise, make-oldconfig adds it automatically. - -Signed-off-by: Leah Rowe <leah@libreboot.org> ---- - src/ec/dasharo/ec/Kconfig | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/src/ec/dasharo/ec/Kconfig b/src/ec/dasharo/ec/Kconfig -index 901d3ce514..071e37f95e 100644 ---- a/src/ec/dasharo/ec/Kconfig -+++ b/src/ec/dasharo/ec/Kconfig -@@ -28,4 +28,4 @@ config EC_DASHARO_EC_UPDATE_FILE - - config EC_DASHARO_EC_FLASH_SIZE - hex -- default 0x20000 -+ # default 0x20000 --- -2.39.5 - diff --git a/config/coreboot/next/target.cfg b/config/coreboot/next/target.cfg deleted file mode 100644 index 1d01e623..00000000 --- a/config/coreboot/next/target.cfg +++ /dev/null @@ -1,4 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -tree="next" -rev="2f1e4e5e8515dd350cc9d68b48d32a5b6b02ae6a" diff --git a/config/coreboot/q45t_am/config/libgfxinit_txtmode b/config/coreboot/q45t_am/config/libgfxinit_txtmode new file mode 100644 index 00000000..afa26ff3 --- /dev/null +++ b/config/coreboot/q45t_am/config/libgfxinit_txtmode @@ -0,0 +1,635 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_LTO is not set +# CONFIG_IWYU is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +# CONFIG_OPTION_BACKEND_NONE is not set +CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set +CONFIG_STATIC_OPTION_TABLE=y +CONFIG_COMPRESS_RAMSTAGE_LZMA=y +# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_USE_QC_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_RAMSTAGE=y +# CONFIG_ASAN is not set +CONFIG_NO_STAGE_CACHE=y +# CONFIG_TSEG_STAGE_CACHE is not set +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_BOOTSPLASH_IMAGE is not set + +# +# Software Bill Of Materials (SBOM) +# +# CONFIG_SBOM is not set +# end of Software Bill Of Materials (SBOM) +# end of General setup + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +CONFIG_VENDOR_ACER=y +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BOSTENTECH is not set +# CONFIG_VENDOR_BYTEDANCE is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_CLEVO is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set +# CONFIG_VENDOR_DELL is not set +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set +# CONFIG_VENDOR_EXAMPLE is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_INVENTEC is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set +# CONFIG_VENDOR_LENOVO is not set +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PINE64 is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PRODRIVE is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_STARLABS is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set +# CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set +CONFIG_BOARD_SPECIFIC_OPTIONS=y +CONFIG_MAINBOARD_PART_NUMBER="Q45T-AM" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="acer/g43t-am3" +CONFIG_VGA_BIOS_ID="8086,2e12" +CONFIG_DIMM_MAX=4 +CONFIG_DIMM_SPD_SIZE=256 +CONFIG_FMDFILE="" +# CONFIG_NO_POST is not set +CONFIG_MAINBOARD_VENDOR="Acer" +# CONFIG_BOARD_ACER_VN7_572G is not set +# CONFIG_BOARD_ACER_G43T_AM3 is not set +CONFIG_BOARD_ACER_Q45T_AM=y +CONFIG_CBFS_SIZE=0x3FA000 +CONFIG_MAX_CPUS=4 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_IO=y +CONFIG_VARIANT_DIR="q45t-am" +CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set +# CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +# CONFIG_PCIEXP_L1_SUB_STATE is not set +CONFIG_PCIEXP_CLK_PM=y +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Acer" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Q45T-AM" +# CONFIG_CONSOLE_POST is not set +CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" +CONFIG_MAX_SOCKET=1 +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 +CONFIG_DCACHE_RAM_BASE=0xfeff8000 +CONFIG_DCACHE_RAM_SIZE=0x8000 +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x2000 +CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="../../../config/ifd/q45t_am/ifd" +CONFIG_GBE_BIN_PATH="../../../config/ifd/q45t_am/gbe" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_DEBUG_SMI is not set +CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_HOTPLUG_BUSES=32 +CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 +CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="PNP0F13" +CONFIG_GFX_GMA_PANEL_1_PORT="eDP" +CONFIG_D3COLD_SUPPORT=y +CONFIG_GFX_GMA_PANEL_1_ON_EDP=y +# CONFIG_DRIVERS_UART_8250IO is not set +CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 +CONFIG_HEAP_SIZE=0x100000 +CONFIG_EC_GPE_SCI=0x50 +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +CONFIG_BOARD_ROMSIZE_KB_4096=y +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +CONFIG_COREBOOT_ROMSIZE_KB_4096=y +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=4096 +CONFIG_ROM_SIZE=0x00400000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=0 +# end of Mainboard + +# +# Chipset +# + +# +# SoC +# +CONFIG_CHIPSET_DEVICETREE="" +CONFIG_CBFS_MCACHE_SIZE=0x4000 +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_SMM_RESERVED_SIZE=0x100000 +CONFIG_SMM_MODULE_STACK_SIZE=0x400 +# CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 +CONFIG_EHCI_BAR=0xfef00000 +CONFIG_ACPI_CPU_STRING="CP%02X" +CONFIG_STACK_SIZE=0x2000 +CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 +CONFIG_INTEL_GMA_BCLV_WIDTH=16 +CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 +CONFIG_INTEL_GMA_BCLM_WIDTH=16 +CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_HPET_MIN_TICKS=0x80 +CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000 +CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 +CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 +# CONFIG_PCIEXP_COMMON_CLOCK is not set +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_CBFS_CACHE_ALIGN=8 + +# +# CPU +# +CONFIG_CPU_INTEL_MODEL_6FX=y +CONFIG_CPU_INTEL_MODEL_1067X=y +CONFIG_CPU_INTEL_MODEL_F3X=y +CONFIG_CPU_INTEL_MODEL_F4X=y +CONFIG_CPU_INTEL_SOCKET_LGA775=y +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_TIMEBASE=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_MICROCODE_UPDATE_PRE_RAM=y +CONFIG_PARALLEL_MP=y +CONFIG_XAPIC_ONLY=y +# CONFIG_X2APIC_ONLY is not set +# CONFIG_X2APIC_RUNTIME is not set +# CONFIG_X2APIC_LATE_WORKAROUND is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_SETUP_XIP_CACHE=y +CONFIG_HAVE_SMI_HANDLER=y +CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y +CONFIG_SMM_TSEG=y +CONFIG_SMM_LAPIC_REMAP_MITIGATION=y +CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 +CONFIG_AP_STACK_SIZE=0x800 +CONFIG_SMP=y +CONFIG_SSE=y +CONFIG_SSE2=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# +CONFIG_NORTHBRIDGE_INTEL_X4X=y + +# +# Southbridge +# +CONFIG_PCIEXP_HOTPLUG=y +CONFIG_SOUTHBRIDGE_INTEL_I82801JX=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_TCO_SPACE_NOT_YET_SPLIT=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y +CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 +CONFIG_RCBA_LENGTH=0x4000 + +# +# Super I/O +# +CONFIG_SUPERIO_ITE_COMMON_PRE_RAM=y +CONFIG_SUPERIO_ITE_COMMON_GPIO_PRE_RAM=y +CONFIG_SUPERIO_ITE_COMMON_NUM_GPIO_SETS=8 +CONFIG_SUPERIO_ITE_ENV_CTRL=y +CONFIG_SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG=y +CONFIG_SUPERIO_ITE_ENV_CTRL_PWM_FREQ2=y +CONFIG_SUPERIO_ITE_IT8720F=y + +# +# Embedded Controllers +# + +# +# Intel Firmware +# +# CONFIG_HAVE_ME_BIN is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set +CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y +CONFIG_HAVE_GBE_BIN=y +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_ARCH_ALL_STAGES_X86_32=y +CONFIG_HAVE_X86_64_SUPPORT=y +CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y +CONFIG_AP_IN_SIPI_WAIT=y +CONFIG_SIPI_VECTOR_IN_ROM=y +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_PC80_SYSTEM=y +CONFIG_HAVE_CMOS_DEFAULT=y +CONFIG_POSTCAR_STAGE=y +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_HAVE_CF9_RESET=y +CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +# CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 +# end of Chipset + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_LINEAR_FRAMEBUFFER=y +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_NO_GFX_INIT is not set +CONFIG_NO_EARLY_GFX_INIT=y + +# +# Display +# +CONFIG_VGA_TEXT_FRAMEBUFFER=y +# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 +# end of Display + +CONFIG_PCI=y +CONFIG_ECAM_MMCONF_SUPPORT=y +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_ECAM_MMCONF_LENGTH=0x10000000 +CONFIG_PCI_ALLOW_BUS_MASTER=y +CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y +CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set +CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y +# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set +CONFIG_PCIEXP_HOTPLUG_IO=0x2000 +# CONFIG_EARLY_PCI_BRIDGE is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set +CONFIG_USE_DDR3=y +CONFIG_USE_DDR2=y +# end of Devices + +# +# Generic Drivers +# +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +CONFIG_CACHE_MRC_SETTINGS=y +# CONFIG_MRC_SETTINGS_PROTECT is not set +CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set +# CONFIG_SMMSTORE is not set +CONFIG_SPI_FLASH=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_SPI_FLASH_ADESTO=y +CONFIG_SPI_FLASH_AMIC=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_ISSI=y +# CONFIG_DRIVERS_UART_OXPCIE is not set +CONFIG_HAVE_USBDEBUG=y +CONFIG_HAVE_USBDEBUG_OPTIONS=y +# CONFIG_USBDEBUG is not set +# CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVERS_I2C_CK505=y +# CONFIG_DRIVERS_I2C_MAX98396 is not set +CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_GFX_GMA=y +CONFIG_GFX_GMA_DYN_CPU=y +CONFIG_GFX_GMA_GENERATION="G45" +CONFIG_GFX_GMA_PCH="No_PCH" +CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" +CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set +CONFIG_DRIVERS_MC146818=y +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set +CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +CONFIG_VGA=y +# CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_WIFI_GENERIC=y +CONFIG_DRIVERS_MTK_WIFI=y +# end of Generic Drivers + +# +# Security +# + +# +# CBFS verification +# +# CONFIG_CBFS_VERIFICATION is not set +# end of CBFS verification + +# +# Verified Boot (vboot) +# +# end of Verified Boot (vboot) + +# +# Trusted Platform Module +# +CONFIG_NO_TPM=y +CONFIG_PCR_BOOT_MODE=1 +CONFIG_PCR_HWID=1 +CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 +CONFIG_PCR_RUNTIME_DATA=3 +# end of Trusted Platform Module + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y +# end of Memory initialization + +# CONFIG_STM is not set +CONFIG_BOOTMEDIA_LOCK_NONE=y +# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_CHIP is not set +# CONFIG_BOOTMEDIA_SMM_BWP is not set +# end of Security + +CONFIG_ACPI_HAVE_PCAT_8259=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +CONFIG_ACPI_NO_CUSTOM_MADT=y +CONFIG_ACPI_COMMON_MADT_LAPIC=y +CONFIG_ACPI_COMMON_MADT_IOAPIC=y +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set +# CONFIG_CONSOLE_SPI_FLASH is not set +# CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CMOS_POST is not set +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_POST_IO_PORT=0x80 +CONFIG_HWBASE_DEBUG_NULL=y +# end of Console + +CONFIG_HAVE_ACPI_RESUME=y +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_HAVE_OPTION_TABLE=y +CONFIG_IOAPIC=y +CONFIG_USE_WATCHDOG_ON_BOOT=y + +# +# System tables +# +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_BIOS_VENDOR="coreboot" +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" +# end of System tables + +# +# Payload +# +CONFIG_PAYLOAD_NONE=y +# end of Payload + +# +# Debugging +# + +# +# CPU Debug Settings +# +# CONFIG_DISPLAY_MTRRS is not set + +# +# Vendorcode Debug Settings +# + +# +# BLOB Debug Settings +# + +# +# General Debug Settings +# +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_RAM_SETUP=y +# CONFIG_DEBUG_RAM_SETUP is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set +# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set +# end of Debugging + +CONFIG_RAMSTAGE_ADA=y +CONFIG_RAMSTAGE_LIBHWBASE=y +CONFIG_HWBASE_DYNAMIC_MMIO=y +CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 +CONFIG_HWBASE_DIRECT_PCIDEV=y +CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + +CONFIG_WARNINGS_ARE_ERRORS=y +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_RELOCATABLE_MODULES=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/q45t_am/target.cfg b/config/coreboot/q45t_am/target.cfg new file mode 100644 index 00000000..357eee9a --- /dev/null +++ b/config/coreboot/q45t_am/target.cfg @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +tree="default" +xarch="i386-elf" +payload_seabios="y" +payload_memtest="y" +grubtree="nvme" +build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" +payload_uboot="amd64" diff --git a/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb index 909ab29e..82954305 100644 --- a/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/qemu_arm64_12mb/config/libgfxinit_corebootfb @@ -9,13 +9,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y -# CONFIG_ALLOW_EXPERIMENTAL_CLANG is not set +# CONFIG_COMPILER_LLVM_CLANG is not set # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_COMPRESS_PRERAM_STAGES=y @@ -53,6 +55,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -64,6 +67,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set CONFIG_VENDOR_EMULATION=y +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -71,15 +75,19 @@ CONFIG_VENDOR_EMULATION=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -100,7 +108,9 @@ CONFIG_VENDOR_EMULATION=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="QEMU AArch64" CONFIG_MAINBOARD_DIR="emulation/qemu-aarch64" @@ -115,15 +125,20 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set -CONFIG_MAX_SOCKET=1 +CONFIG_ARM64_CURRENT_EL=3 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0x4010000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_MEMLAYOUT_LD_FILE="src/mainboard/emulation/qemu-aarch64/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_DRAM_SIZE_MB=261120 # CONFIG_CONSOLE_POST is not set +CONFIG_MAX_SOCKET=1 CONFIG_BOARD_EMULATION_QEMU_AARCH64=y # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set # CONFIG_BOARD_EMULATION_QEMU_X86_I440FX is not set @@ -134,15 +149,9 @@ CONFIG_BOARD_EMULATION_QEMU_AARCH64=y # CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set # CONFIG_BOARD_EMULATION_QEMU_SBSA is not set # CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0x4010000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=256 -CONFIG_PCI_IOBASE=0x3eff0000 -CONFIG_MEMLAYOUT_LD_FILE="src/mainboard/emulation/qemu-aarch64/memlayout.ld" CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 -CONFIG_ARM64_CURRENT_EL=3 CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" @@ -216,6 +225,7 @@ CONFIG_RCBA_LENGTH=0x4000 # # Embedded Controllers # +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_ARM64=y CONFIG_ARCH_BOOTBLOCK_ARM64=y CONFIG_ARCH_VERSTAGE_ARM64=y @@ -245,6 +255,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -269,11 +280,18 @@ CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_DRIVERS_OPTION_CFR is not set CONFIG_DRIVERS_UART=y CONFIG_HAVE_UART_SPECIAL=y # CONFIG_DRIVERS_UART_OXPCIE is not set CONFIG_DRIVERS_UART_PL011=y # CONFIG_VPD is not set +CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y +CONFIG_DRIVERS_EMULATION_QEMU_XRES=800 +CONFIG_DRIVERS_EMULATION_QEMU_YRES=600 +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -281,6 +299,7 @@ CONFIG_DRIVERS_UART_PL011=y # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +CONFIG_VGA=y # CONFIG_DRIVERS_SIL_3114 is not set CONFIG_DRIVERS_WIFI_GENERIC=y CONFIG_DRIVERS_MTK_WIFI=y @@ -375,6 +394,7 @@ CONFIG_HAVE_MONOTONIC_TIMER=y # Payload # CONFIG_PAYLOAD_NONE=y +# CONFIG_PAYLOAD_FIT_SUPPORT is not set # end of Payload # @@ -397,7 +417,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set # CONFIG_DEBUG_MALLOC is not set # CONFIG_DEBUG_CONSOLE_INIT is not set @@ -406,8 +425,16 @@ CONFIG_PAYLOAD_NONE=y # end of Debugging CONFIG_MISSING_BOARD_RESET=y +CONFIG_FLATTENED_DEVICE_TREE=y CONFIG_DECOMPRESS_OFAST=y CONFIG_PROBE_RAM=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_NO_XIP_EARLY_STAGES=y diff --git a/config/coreboot/qemu_arm64_12mb/target.cfg b/config/coreboot/qemu_arm64_12mb/target.cfg index 5d8f0db2..2ea9482f 100644 --- a/config/coreboot/qemu_arm64_12mb/target.cfg +++ b/config/coreboot/qemu_arm64_12mb/target.cfg @@ -2,5 +2,5 @@ tree="default" xarch="aarch64-elf arm-eabi" -payload_uboot="y" +payload_uboot="arm64" build_depend="u-boot/qemu_arm64_12mb" diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb index 951bd326..bd6bf444 100644 --- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set CONFIG_VENDOR_EMULATION=y +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -76,15 +79,19 @@ CONFIG_VENDOR_EMULATION=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -105,7 +112,9 @@ CONFIG_VENDOR_EMULATION=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="QEMU x86 i440fx/piix4" CONFIG_MAINBOARD_VERSION="1.0" @@ -122,20 +131,23 @@ CONFIG_MAX_CPUS=4 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set CONFIG_VBOOT_VBNV_OFFSET=0x2c CONFIG_IRQ_SLOT_COUNT=6 -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="QEMU" +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 -# CONFIG_CONSOLE_POST is not set # CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y @@ -146,7 +158,6 @@ CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y # CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set # CONFIG_BOARD_EMULATION_QEMU_SBSA is not set # CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0x10000 CONFIG_DCACHE_RAM_SIZE=0x90000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000 @@ -154,9 +165,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 @@ -202,6 +211,7 @@ CONFIG_CBFS_MCACHE_SIZE=0x4000 CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 CONFIG_ACPI_CPU_STRING="CP%02X" @@ -213,6 +223,7 @@ CONFIG_INTEL_GMA_BCLM_WIDTH=16 CONFIG_BOOTBLOCK_IN_CBFS=y CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -256,6 +267,7 @@ CONFIG_RCBA_LENGTH=0x4000 # # Embedded Controllers # +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -273,11 +285,17 @@ CONFIG_POSTCAR_STAGE=y CONFIG_BOOTBLOCK_SIMPLE=y # CONFIG_BOOTBLOCK_NORMAL is not set CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_IDT_IN_EVERY_STAGE=y CONFIG_HAVE_CF9_RESET=y CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -297,6 +315,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -322,6 +341,10 @@ CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_OXPCIE is not set # CONFIG_VPD is not set @@ -329,6 +352,7 @@ CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y CONFIG_DRIVERS_EMULATION_QEMU_XRES=800 CONFIG_DRIVERS_EMULATION_QEMU_YRES=600 +CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG=y # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -392,6 +416,7 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y CONFIG_HAVE_ACPI_TABLES=y CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y # # Console @@ -484,7 +509,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set # CONFIG_DEBUG_PIRQ is not set CONFIG_HAVE_DEBUG_SMBUS=y @@ -497,6 +521,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y CONFIG_DECOMPRESS_OFAST=y CONFIG_PROBE_RAM=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode index 64afd0a0..a80263e4 100644 --- a/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/qemu_x86_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set CONFIG_VENDOR_EMULATION=y +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -76,15 +79,19 @@ CONFIG_VENDOR_EMULATION=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -105,7 +112,9 @@ CONFIG_VENDOR_EMULATION=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="QEMU x86 i440fx/piix4" CONFIG_MAINBOARD_VERSION="1.0" @@ -122,20 +131,23 @@ CONFIG_MAX_CPUS=4 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set CONFIG_VBOOT_VBNV_OFFSET=0x2c CONFIG_IRQ_SLOT_COUNT=6 -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="QEMU" +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 -# CONFIG_CONSOLE_POST is not set # CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y @@ -146,7 +158,6 @@ CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y # CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set # CONFIG_BOARD_EMULATION_QEMU_SBSA is not set # CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0x10000 CONFIG_DCACHE_RAM_SIZE=0x90000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000 @@ -154,9 +165,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 @@ -202,6 +211,7 @@ CONFIG_CBFS_MCACHE_SIZE=0x4000 CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 CONFIG_ACPI_CPU_STRING="CP%02X" @@ -213,6 +223,7 @@ CONFIG_INTEL_GMA_BCLM_WIDTH=16 CONFIG_BOOTBLOCK_IN_CBFS=y CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -256,6 +267,7 @@ CONFIG_RCBA_LENGTH=0x4000 # # Embedded Controllers # +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -273,11 +285,17 @@ CONFIG_POSTCAR_STAGE=y CONFIG_BOOTBLOCK_SIMPLE=y # CONFIG_BOOTBLOCK_NORMAL is not set CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_IDT_IN_EVERY_STAGE=y CONFIG_HAVE_CF9_RESET=y CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -295,6 +313,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -320,11 +339,16 @@ CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_OXPCIE is not set # CONFIG_VPD is not set CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y +CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG=y # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -388,6 +412,7 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y CONFIG_HAVE_ACPI_TABLES=y CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y # # Console @@ -480,7 +505,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set # CONFIG_DEBUG_PIRQ is not set CONFIG_HAVE_DEBUG_SMBUS=y @@ -493,6 +517,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y CONFIG_DECOMPRESS_OFAST=y CONFIG_PROBE_RAM=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/qemu_x86_12mb/target.cfg b/config/coreboot/qemu_x86_12mb/target.cfg index 2074beca..476a98cb 100644 --- a/config/coreboot/qemu_x86_12mb/target.cfg +++ b/config/coreboot/qemu_x86_12mb/target.cfg @@ -6,4 +6,4 @@ payload_grub="y" payload_seabios="y" payload_memtest="y" build_depend="seabios/default grub/default memtest86plus u-boot/i386coreboot" -payload_uboot_i386="y" +payload_uboot="i386" diff --git a/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_corebootfb b/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_corebootfb index 951bd326..bd6bf444 100644 --- a/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set CONFIG_VENDOR_EMULATION=y +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -76,15 +79,19 @@ CONFIG_VENDOR_EMULATION=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -105,7 +112,9 @@ CONFIG_VENDOR_EMULATION=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="QEMU x86 i440fx/piix4" CONFIG_MAINBOARD_VERSION="1.0" @@ -122,20 +131,23 @@ CONFIG_MAX_CPUS=4 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set CONFIG_VBOOT_VBNV_OFFSET=0x2c CONFIG_IRQ_SLOT_COUNT=6 -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="QEMU" +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 -# CONFIG_CONSOLE_POST is not set # CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y @@ -146,7 +158,6 @@ CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y # CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set # CONFIG_BOARD_EMULATION_QEMU_SBSA is not set # CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0x10000 CONFIG_DCACHE_RAM_SIZE=0x90000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000 @@ -154,9 +165,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 @@ -202,6 +211,7 @@ CONFIG_CBFS_MCACHE_SIZE=0x4000 CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 CONFIG_ACPI_CPU_STRING="CP%02X" @@ -213,6 +223,7 @@ CONFIG_INTEL_GMA_BCLM_WIDTH=16 CONFIG_BOOTBLOCK_IN_CBFS=y CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -256,6 +267,7 @@ CONFIG_RCBA_LENGTH=0x4000 # # Embedded Controllers # +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -273,11 +285,17 @@ CONFIG_POSTCAR_STAGE=y CONFIG_BOOTBLOCK_SIMPLE=y # CONFIG_BOOTBLOCK_NORMAL is not set CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_IDT_IN_EVERY_STAGE=y CONFIG_HAVE_CF9_RESET=y CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -297,6 +315,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -322,6 +341,10 @@ CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_OXPCIE is not set # CONFIG_VPD is not set @@ -329,6 +352,7 @@ CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y CONFIG_DRIVERS_EMULATION_QEMU_XRES=800 CONFIG_DRIVERS_EMULATION_QEMU_YRES=600 +CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG=y # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -392,6 +416,7 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y CONFIG_HAVE_ACPI_TABLES=y CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y # # Console @@ -484,7 +509,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set # CONFIG_DEBUG_PIRQ is not set CONFIG_HAVE_DEBUG_SMBUS=y @@ -497,6 +521,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y CONFIG_DECOMPRESS_OFAST=y CONFIG_PROBE_RAM=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_txtmode b/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_txtmode index 64afd0a0..a80263e4 100644 --- a/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/qemu_x86_64_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set CONFIG_VENDOR_EMULATION=y +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -76,15 +79,19 @@ CONFIG_VENDOR_EMULATION=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -105,7 +112,9 @@ CONFIG_VENDOR_EMULATION=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_PART_NUMBER="QEMU x86 i440fx/piix4" CONFIG_MAINBOARD_VERSION="1.0" @@ -122,20 +131,23 @@ CONFIG_MAX_CPUS=4 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set CONFIG_VBOOT_VBNV_OFFSET=0x2c CONFIG_IRQ_SLOT_COUNT=6 -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="QEMU" +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 -# CONFIG_CONSOLE_POST is not set # CONFIG_BOARD_EMULATION_QEMU_AARCH64 is not set # CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y @@ -146,7 +158,6 @@ CONFIG_BOARD_EMULATION_QEMU_X86_I440FX=y # CONFIG_BOARD_EMULATION_QEMU_RISCV_RV32 is not set # CONFIG_BOARD_EMULATION_QEMU_SBSA is not set # CONFIG_BOARD_EMULATION_SPIKE_RISCV is not set -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0x10000 CONFIG_DCACHE_RAM_SIZE=0x90000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000 @@ -154,9 +165,7 @@ CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 @@ -202,6 +211,7 @@ CONFIG_CBFS_MCACHE_SIZE=0x4000 CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 CONFIG_ACPI_CPU_STRING="CP%02X" @@ -213,6 +223,7 @@ CONFIG_INTEL_GMA_BCLM_WIDTH=16 CONFIG_BOOTBLOCK_IN_CBFS=y CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -256,6 +267,7 @@ CONFIG_RCBA_LENGTH=0x4000 # # Embedded Controllers # +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -273,11 +285,17 @@ CONFIG_POSTCAR_STAGE=y CONFIG_BOOTBLOCK_SIMPLE=y # CONFIG_BOOTBLOCK_NORMAL is not set CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_IDT_IN_EVERY_STAGE=y CONFIG_HAVE_CF9_RESET=y CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -295,6 +313,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -320,11 +339,16 @@ CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_OXPCIE is not set # CONFIG_VPD is not set CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y CONFIG_DRIVERS_EMULATION_QEMU_CIRRUS=y +CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG=y # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -388,6 +412,7 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y CONFIG_HAVE_ACPI_TABLES=y CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y # # Console @@ -480,7 +505,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set # CONFIG_DEBUG_PIRQ is not set CONFIG_HAVE_DEBUG_SMBUS=y @@ -493,6 +517,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y CONFIG_DECOMPRESS_OFAST=y CONFIG_PROBE_RAM=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/qemu_x86_64_12mb/target.cfg b/config/coreboot/qemu_x86_64_12mb/target.cfg index 7855bd6f..61ae6299 100644 --- a/config/coreboot/qemu_x86_64_12mb/target.cfg +++ b/config/coreboot/qemu_x86_64_12mb/target.cfg @@ -5,4 +5,4 @@ xarch="i386-elf" payload_grub="y" payload_seabios="y" payload_memtest="y" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb index 9a1af842..f4dd091b 100644 --- a/config/coreboot/r400_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/r400_16mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad R400" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad R400" @@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set CONFIG_BOARD_LENOVO_R400=y @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_R400=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -262,8 +274,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -278,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -365,6 +379,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -377,6 +393,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -401,6 +418,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -421,6 +441,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -453,7 +474,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -473,11 +497,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -649,7 +675,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -671,6 +696,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/r400_16mb/config/libgfxinit_txtmode b/config/coreboot/r400_16mb/config/libgfxinit_txtmode index d2bd1d3c..cefb2e7f 100644 --- a/config/coreboot/r400_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/r400_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad R400" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad R400" @@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set CONFIG_BOARD_LENOVO_R400=y @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_R400=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -260,8 +272,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -276,6 +289,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -363,6 +377,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -375,6 +391,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -399,6 +416,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -417,6 +437,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -449,7 +470,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -469,11 +493,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -645,7 +671,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -667,6 +692,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/r400_16mb/target.cfg b/config/coreboot/r400_16mb/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/r400_16mb/target.cfg +++ b/config/coreboot/r400_16mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb index 93499bad..3406c4f8 100644 --- a/config/coreboot/r400_4mb/config/libgfxinit_corebootfb +++ b/config/coreboot/r400_4mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad R400" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad R400" @@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set CONFIG_BOARD_LENOVO_R400=y @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_R400=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -262,8 +274,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -278,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -365,6 +379,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -377,6 +393,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -401,6 +418,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -421,6 +441,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -453,7 +474,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -473,11 +497,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -649,7 +675,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -671,6 +696,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/r400_4mb/config/libgfxinit_txtmode b/config/coreboot/r400_4mb/config/libgfxinit_txtmode index 3bbf7aaa..b0aecef9 100644 --- a/config/coreboot/r400_4mb/config/libgfxinit_txtmode +++ b/config/coreboot/r400_4mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad R400" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad R400" @@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set CONFIG_BOARD_LENOVO_R400=y @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_R400=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -260,8 +272,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -276,6 +289,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -363,6 +377,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -375,6 +391,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -399,6 +416,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -417,6 +437,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -449,7 +470,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -469,11 +493,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -645,7 +671,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -667,6 +692,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/r400_4mb/target.cfg b/config/coreboot/r400_4mb/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/r400_4mb/target.cfg +++ b/config/coreboot/r400_4mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb index 4faef26a..73ea948f 100644 --- a/config/coreboot/r400_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/r400_8mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad R400" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad R400" @@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set CONFIG_BOARD_LENOVO_R400=y @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_R400=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -262,8 +274,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -278,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -365,6 +379,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -377,6 +393,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -401,6 +418,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -421,6 +441,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -453,7 +474,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -473,11 +497,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -649,7 +675,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -671,6 +696,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/r400_8mb/config/libgfxinit_txtmode b/config/coreboot/r400_8mb/config/libgfxinit_txtmode index 21b32616..856780d3 100644 --- a/config/coreboot/r400_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/r400_8mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad R400" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad R400" @@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set CONFIG_BOARD_LENOVO_R400=y @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_R400=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -260,8 +272,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -276,6 +289,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -363,6 +377,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -375,6 +391,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -399,6 +416,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -417,6 +437,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -449,7 +470,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -469,11 +493,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -645,7 +671,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -667,6 +692,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/r400_8mb/target.cfg b/config/coreboot/r400_8mb/target.cfg index ef878ea1..23bfb335 100644 --- a/config/coreboot/r400_8mb/target.cfg +++ b/config/coreboot/r400_8mb/target.cfg @@ -5,4 +5,4 @@ xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb index 2d7e0b54..5969b55b 100644 --- a/config/coreboot/r500_4mb/config/libgfxinit_corebootfb +++ b/config/coreboot/r500_4mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad R500" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad R500" @@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="r500" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R500" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -158,12 +169,10 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd_nogbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R500" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -171,8 +180,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -206,7 +219,6 @@ CONFIG_BOARD_LENOVO_R500=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -261,8 +273,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -277,6 +290,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -364,6 +378,7 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -374,6 +389,7 @@ CONFIG_EC_LENOVO_PMH7=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -398,6 +414,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -418,6 +437,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -450,7 +470,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -470,11 +493,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -646,7 +671,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -668,6 +692,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/r500_4mb/config/libgfxinit_txtmode b/config/coreboot/r500_4mb/config/libgfxinit_txtmode index 8d437bd5..5bae0f85 100644 --- a/config/coreboot/r500_4mb/config/libgfxinit_txtmode +++ b/config/coreboot/r500_4mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad R500" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad R500" @@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="r500" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R500" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -156,12 +167,10 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd_nogbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R500" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -169,8 +178,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -204,7 +217,6 @@ CONFIG_BOARD_LENOVO_R500=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -259,8 +271,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -275,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -362,6 +376,7 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -372,6 +387,7 @@ CONFIG_EC_LENOVO_PMH7=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -396,6 +412,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -414,6 +433,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -446,7 +466,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -466,11 +489,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -642,7 +667,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -664,6 +688,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/r500_4mb/target.cfg b/config/coreboot/r500_4mb/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/r500_4mb/target.cfg +++ b/config/coreboot/r500_4mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode index e7358991..7db420a2 100644 --- a/config/coreboot/t1650_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/t1650_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_PART_NUMBER="Precision T1650" CONFIG_MAINBOARD_VERSION="1.0" CONFIG_MAINBOARD_DIR="dell/snb_ivb_workstations" @@ -121,28 +130,36 @@ CONFIG_MAX_CPUS=8 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="variants/baseboard/devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="precision_t1650" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="variants/baseboard/devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." CONFIG_DRAM_RESET_GATE_GPIO=60 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Precision T1650" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set @@ -162,9 +179,6 @@ CONFIG_BOARD_DELL_PRECISION_T1650=y CONFIG_BOARD_DELL_SNB_IVB_WORKSTATIONS=y CONFIG_INCLUDE_SMSC_SCH5545_EC_FW=y CONFIG_SMSC_SCH5545_EC_FW_FILE="../../../vendorfiles/t1650/sch5545ec.bin" -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -179,12 +193,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/t1650/12_ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/t1650/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/t1650/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Precision T1650" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -243,9 +255,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -262,6 +275,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -309,6 +323,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -364,6 +383,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -387,6 +407,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -405,6 +428,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -436,9 +460,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -460,6 +487,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -515,7 +543,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -641,7 +668,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -663,6 +689,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t1650_12mb/target.cfg b/config/coreboot/t1650_12mb/target.cfg index de6a8af8..34865f86 100644 --- a/config/coreboot/t1650_12mb/target.cfg +++ b/config/coreboot/t1650_12mb/target.cfg @@ -9,4 +9,4 @@ grub_scan_disk="nvme ahci" grubtree="nvme" vcfg="t1650" build_depend="seabios/default grub/nvme memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/t1700mt_bmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t1700mt_bmrc_12mb/config/libgfxinit_corebootfb new file mode 100644 index 00000000..52eea8ea --- /dev/null +++ b/config/coreboot/t1700mt_bmrc_12mb/config/libgfxinit_corebootfb @@ -0,0 +1,692 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_LTO is not set +# CONFIG_IWYU is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +# CONFIG_OPTION_BACKEND_NONE is not set +CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set +CONFIG_STATIC_OPTION_TABLE=y +CONFIG_COMPRESS_RAMSTAGE_LZMA=y +# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_USE_QC_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_ROMSTAGE=y +CONFIG_HAVE_ASAN_IN_RAMSTAGE=y +# CONFIG_ASAN is not set +CONFIG_NO_STAGE_CACHE=y +# CONFIG_TSEG_STAGE_CACHE is not set +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_BOOTSPLASH_IMAGE is not set + +# +# Software Bill Of Materials (SBOM) +# +# CONFIG_SBOM is not set +# end of Software Bill Of Materials (SBOM) +# end of General setup + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +# CONFIG_VENDOR_ACER is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BOSTENTECH is not set +# CONFIG_VENDOR_BYTEDANCE is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_CLEVO is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set +CONFIG_VENDOR_DELL=y +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set +# CONFIG_VENDOR_EXAMPLE is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_INVENTEC is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set +# CONFIG_VENDOR_LENOVO is not set +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PINE64 is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PRODRIVE is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_STARLABS is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set +# CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set +CONFIG_BOARD_SPECIFIC_OPTIONS=y +CONFIG_MAINBOARD_PART_NUMBER="Precision T1700 MT" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="dell/optiplex_9020" +CONFIG_VGA_BIOS_ID="8086,0166" +CONFIG_DIMM_MAX=4 +CONFIG_DIMM_SPD_SIZE=256 +CONFIG_FMDFILE="" +# CONFIG_NO_POST is not set +CONFIG_MAINBOARD_VENDOR="Dell Inc." +CONFIG_CBFS_SIZE=0x800000 +CONFIG_CONSOLE_SERIAL=y +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840 +CONFIG_MAX_CPUS=8 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_IO=y +CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set +# CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF" +# CONFIG_CONSOLE_POST is not set +CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" +CONFIG_MAX_SOCKET=1 +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +CONFIG_TPM_PIRQ=0x0 +# CONFIG_BOARD_DELL_E4300 is not set +# CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set +# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set +CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y +# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set +# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set +# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set +# CONFIG_BOARD_DELL_PRECISION_T1650 is not set +# CONFIG_BOARD_DELL_XPS_8300 is not set +CONFIG_DCACHE_RAM_BASE=0xff7c0000 +CONFIG_DCACHE_RAM_SIZE=0x10000 +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x2000 +CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_DRIVERS_INTEL_WIFI=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd" +CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin" +CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +# CONFIG_ENABLE_DDR_2X_REFRESH is not set +CONFIG_PCIEXP_AER=y +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_DEBUG_SMI is not set +CONFIG_HAVE_IFD_BIN=y +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="PNP0F13" +CONFIG_GFX_GMA_PANEL_1_PORT="eDP" +CONFIG_TTYS0_BAUD=115200 +CONFIG_D3COLD_SUPPORT=y +CONFIG_GFX_GMA_PANEL_1_ON_EDP=y +CONFIG_DRIVERS_UART_8250IO=y +CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 +CONFIG_HEAP_SIZE=0x100000 +CONFIG_EC_GPE_SCI=0x50 +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +# CONFIG_TPM_MEASURED_BOOT is not set +CONFIG_BOARD_ROMSIZE_KB_12288=y +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +CONFIG_COREBOOT_ROMSIZE_KB_12288=y +# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=12288 +CONFIG_ROM_SIZE=0x00c00000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=0 +# end of Mainboard + +# +# Chipset +# + +# +# SoC +# +CONFIG_CHIPSET_DEVICETREE="" +CONFIG_CBFS_MCACHE_SIZE=0x4000 +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_SMM_TSEG_SIZE=0x800000 +CONFIG_SMM_RESERVED_SIZE=0x100000 +CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=512 +CONFIG_SERIRQ_CONTINUOUS_MODE=y +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 +CONFIG_EHCI_BAR=0xd8000000 +CONFIG_ACPI_CPU_STRING="CP%02X" +CONFIG_STACK_SIZE=0x2000 +CONFIG_IED_REGION_SIZE=0x400000 +CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254 +CONFIG_INTEL_GMA_BCLV_WIDTH=16 +CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 +CONFIG_INTEL_GMA_BCLM_WIDTH=16 +CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin" +CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000 +CONFIG_HPET_MIN_TICKS=0x80 +CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000 +CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 +CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_DISABLE_ME_PCI=y +CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_CBFS_CACHE_ALIGN=8 + +# +# CPU +# +CONFIG_CPU_INTEL_HASWELL=y +CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_TIMEBASE=y +CONFIG_CPU_INTEL_COMMON_VOLTAGE=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_PARALLEL_MP=y +CONFIG_XAPIC_ONLY=y +# CONFIG_X2APIC_ONLY is not set +# CONFIG_X2APIC_RUNTIME is not set +# CONFIG_X2APIC_LATE_WORKAROUND is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_HAVE_SMI_HANDLER=y +CONFIG_SMM_TSEG=y +CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 +CONFIG_AP_STACK_SIZE=0x800 +CONFIG_SMP=y +CONFIG_SSE=y +CONFIG_SSE2=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# +CONFIG_NORTHBRIDGE_INTEL_HASWELL=y +# CONFIG_USE_NATIVE_RAMINIT is not set +CONFIG_USE_BROADWELL_MRC=y +# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set + +# +# Southbridge +# +# CONFIG_PCIEXP_HOTPLUG is not set +CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y +CONFIG_FINALIZE_USB_ROUTE_XHCI=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y +CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_TCO_SPACE_NOT_YET_SPLIT=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y +CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 +CONFIG_RCBA_LENGTH=0x4000 + +# +# Super I/O +# +CONFIG_SUPERIO_SMSC_SCH555x=y + +# +# Embedded Controllers +# + +# +# Intel Firmware +# +CONFIG_HAVE_ME_BIN=y +# CONFIG_STITCH_ME_BIN is not set +# CONFIG_CHECK_ME is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set +# CONFIG_USE_ME_CLEANER is not set +CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y +CONFIG_HAVE_GBE_BIN=y +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_ARCH_ALL_STAGES_X86_32=y +CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_PC80_SYSTEM=y +CONFIG_HAVE_CMOS_DEFAULT=y +CONFIG_POSTCAR_STAGE=y +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_HAVE_CF9_RESET=y +CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +# CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 +# end of Chipset + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_LINEAR_FRAMEBUFFER=y +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_NO_GFX_INIT is not set +CONFIG_NO_EARLY_GFX_INIT=y + +# +# Display +# +# CONFIG_VGA_TEXT_FRAMEBUFFER is not set +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_LINEAR_FRAMEBUFFER=y +# CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 +# end of Display + +CONFIG_PCI=y +CONFIG_ECAM_MMCONF_SUPPORT=y +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_ECAM_MMCONF_LENGTH=0x04000000 +CONFIG_PCI_ALLOW_BUS_MASTER=y +CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y +CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set +# CONFIG_EARLY_PCI_BRIDGE is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +CONFIG_USE_DDR3=y +# end of Devices + +# +# Generic Drivers +# +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +CONFIG_CACHE_MRC_SETTINGS=y +# CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set +# CONFIG_SMMSTORE is not set +CONFIG_SPI_FLASH=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_SPI_FLASH_ADESTO=y +CONFIG_SPI_FLASH_AMIC=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y +CONFIG_TPM_INIT_RAMSTAGE=y +# CONFIG_TPM_PPI is not set +CONFIG_DRIVERS_UART=y +# CONFIG_DRIVERS_UART_OXPCIE is not set +CONFIG_HAVE_USBDEBUG=y +CONFIG_HAVE_USBDEBUG_OPTIONS=y +# CONFIG_USBDEBUG is not set +# CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +# CONFIG_DRIVERS_I2C_MAX98396 is not set +CONFIG_INTEL_DDI=y +CONFIG_INTEL_INT15=y +CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_GFX_GMA=y +CONFIG_GFX_GMA_DYN_CPU=y +CONFIG_GFX_GMA_GENERATION="Haswell" +CONFIG_GFX_GMA_PCH="Lynx_Point" +CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" +CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set +CONFIG_DRIVERS_MC146818=y +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set +CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +CONFIG_MEMORY_MAPPED_TPM=y +CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_WIFI_GENERIC=y +CONFIG_DRIVERS_MTK_WIFI=y +# end of Generic Drivers + +# +# Security +# + +# +# CBFS verification +# +# CONFIG_CBFS_VERIFICATION is not set +# end of CBFS verification + +# +# Verified Boot (vboot) +# +# end of Verified Boot (vboot) + +# +# Trusted Platform Module +# +CONFIG_TPM1=y +# CONFIG_TPM2 is not set +CONFIG_TPM=y +CONFIG_MAINBOARD_HAS_TPM1=y +# CONFIG_TPM_DEACTIVATE is not set +# CONFIG_DEBUG_TPM is not set +CONFIG_PCR_BOOT_MODE=1 +CONFIG_PCR_HWID=1 +CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 +CONFIG_PCR_RUNTIME_DATA=3 +# end of Trusted Platform Module + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y +# end of Memory initialization + +# CONFIG_INTEL_TXT is not set +# CONFIG_STM is not set +# CONFIG_INTEL_CBNT_SUPPORT is not set +CONFIG_BOOTMEDIA_LOCK_NONE=y +# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_CHIP is not set +# CONFIG_BOOTMEDIA_SMM_BWP is not set +# end of Security + +CONFIG_ACPI_HAVE_PCAT_8259=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +CONFIG_ACPI_SOC_NVS=y +CONFIG_ACPI_NO_CUSTOM_MADT=y +CONFIG_ACPI_COMMON_MADT_LAPIC=y +CONFIG_ACPI_COMMON_MADT_IOAPIC=y +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y +CONFIG_RTC=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y + +# +# I/O mapped, 8250-compatible +# +CONFIG_TTYS0_BASE=0x3f8 + +# +# Serial port base address = 0x3f8 +# +# CONFIG_CONSOLE_SERIAL_921600 is not set +# CONFIG_CONSOLE_SERIAL_460800 is not set +# CONFIG_CONSOLE_SERIAL_230400 is not set +CONFIG_CONSOLE_SERIAL_115200=y +# CONFIG_CONSOLE_SERIAL_57600 is not set +# CONFIG_CONSOLE_SERIAL_38400 is not set +# CONFIG_CONSOLE_SERIAL_19200 is not set +# CONFIG_CONSOLE_SERIAL_9600 is not set +CONFIG_TTYS0_LCS=3 +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_SPI_FLASH is not set +# CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_EM100PRO_SPI_CONSOLE is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CMOS_POST is not set +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_POST_IO_PORT=0x80 +CONFIG_HWBASE_DEBUG_CB=y +# end of Console + +CONFIG_HAVE_ACPI_RESUME=y +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_HAVE_OPTION_TABLE=y +CONFIG_IOAPIC=y +CONFIG_USE_WATCHDOG_ON_BOOT=y + +# +# System tables +# +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_BIOS_VENDOR="coreboot" +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" +# end of System tables + +# +# Payload +# +CONFIG_PAYLOAD_NONE=y +# end of Payload + +# +# Debugging +# + +# +# CPU Debug Settings +# +# CONFIG_DISPLAY_MTRRS is not set + +# +# Vendorcode Debug Settings +# + +# +# BLOB Debug Settings +# + +# +# General Debug Settings +# +# CONFIG_GDB_STUB is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set +# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set +# end of Debugging + +CONFIG_RAMSTAGE_ADA=y +CONFIG_RAMSTAGE_LIBHWBASE=y +CONFIG_HWBASE_DYNAMIC_MMIO=y +CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 +CONFIG_HWBASE_DIRECT_PCIDEV=y +CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + +CONFIG_WARNINGS_ARE_ERRORS=y +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_RELOCATABLE_MODULES=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/t1700mt_bmrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t1700mt_bmrc_12mb/config/libgfxinit_txtmode new file mode 100644 index 00000000..0fe8a3ec --- /dev/null +++ b/config/coreboot/t1700mt_bmrc_12mb/config/libgfxinit_txtmode @@ -0,0 +1,689 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_LTO is not set +# CONFIG_IWYU is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +# CONFIG_OPTION_BACKEND_NONE is not set +CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set +CONFIG_STATIC_OPTION_TABLE=y +CONFIG_COMPRESS_RAMSTAGE_LZMA=y +# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_USE_QC_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_ROMSTAGE=y +CONFIG_HAVE_ASAN_IN_RAMSTAGE=y +# CONFIG_ASAN is not set +CONFIG_NO_STAGE_CACHE=y +# CONFIG_TSEG_STAGE_CACHE is not set +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_BOOTSPLASH_IMAGE is not set + +# +# Software Bill Of Materials (SBOM) +# +# CONFIG_SBOM is not set +# end of Software Bill Of Materials (SBOM) +# end of General setup + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +# CONFIG_VENDOR_ACER is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BOSTENTECH is not set +# CONFIG_VENDOR_BYTEDANCE is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_CLEVO is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set +CONFIG_VENDOR_DELL=y +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set +# CONFIG_VENDOR_EXAMPLE is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_INVENTEC is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set +# CONFIG_VENDOR_LENOVO is not set +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PINE64 is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PRODRIVE is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_STARLABS is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set +# CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set +CONFIG_BOARD_SPECIFIC_OPTIONS=y +CONFIG_MAINBOARD_PART_NUMBER="Precision T1700 MT" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="dell/optiplex_9020" +CONFIG_VGA_BIOS_ID="8086,0166" +CONFIG_DIMM_MAX=4 +CONFIG_DIMM_SPD_SIZE=256 +CONFIG_FMDFILE="" +# CONFIG_NO_POST is not set +CONFIG_MAINBOARD_VENDOR="Dell Inc." +CONFIG_CBFS_SIZE=0x800000 +CONFIG_CONSOLE_SERIAL=y +CONFIG_MAX_CPUS=8 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_IO=y +CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="overridetree_mt.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set +# CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF" +# CONFIG_CONSOLE_POST is not set +CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" +CONFIG_MAX_SOCKET=1 +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +CONFIG_TPM_PIRQ=0x0 +# CONFIG_BOARD_DELL_E4300 is not set +# CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set +# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set +CONFIG_BOARD_DELL_OPTIPLEX_9020_MT=y +# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set +# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set +# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set +# CONFIG_BOARD_DELL_PRECISION_T1650 is not set +# CONFIG_BOARD_DELL_XPS_8300 is not set +CONFIG_DCACHE_RAM_BASE=0xff7c0000 +CONFIG_DCACHE_RAM_SIZE=0x10000 +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x2000 +CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_DRIVERS_INTEL_WIFI=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd" +CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin" +CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +# CONFIG_ENABLE_DDR_2X_REFRESH is not set +CONFIG_PCIEXP_AER=y +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_DEBUG_SMI is not set +CONFIG_HAVE_IFD_BIN=y +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="PNP0F13" +CONFIG_GFX_GMA_PANEL_1_PORT="eDP" +CONFIG_TTYS0_BAUD=115200 +CONFIG_D3COLD_SUPPORT=y +CONFIG_GFX_GMA_PANEL_1_ON_EDP=y +CONFIG_DRIVERS_UART_8250IO=y +CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 +CONFIG_HEAP_SIZE=0x100000 +CONFIG_EC_GPE_SCI=0x50 +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +# CONFIG_TPM_MEASURED_BOOT is not set +CONFIG_BOARD_ROMSIZE_KB_12288=y +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +CONFIG_COREBOOT_ROMSIZE_KB_12288=y +# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=12288 +CONFIG_ROM_SIZE=0x00c00000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=0 +# end of Mainboard + +# +# Chipset +# + +# +# SoC +# +CONFIG_CHIPSET_DEVICETREE="" +CONFIG_CBFS_MCACHE_SIZE=0x4000 +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_SMM_TSEG_SIZE=0x800000 +CONFIG_SMM_RESERVED_SIZE=0x100000 +CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=512 +CONFIG_SERIRQ_CONTINUOUS_MODE=y +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 +CONFIG_EHCI_BAR=0xd8000000 +CONFIG_ACPI_CPU_STRING="CP%02X" +CONFIG_STACK_SIZE=0x2000 +CONFIG_IED_REGION_SIZE=0x400000 +CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254 +CONFIG_INTEL_GMA_BCLV_WIDTH=16 +CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 +CONFIG_INTEL_GMA_BCLM_WIDTH=16 +CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin" +CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000 +CONFIG_HPET_MIN_TICKS=0x80 +CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000 +CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 +CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_DISABLE_ME_PCI=y +CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_CBFS_CACHE_ALIGN=8 + +# +# CPU +# +CONFIG_CPU_INTEL_HASWELL=y +CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_TIMEBASE=y +CONFIG_CPU_INTEL_COMMON_VOLTAGE=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_PARALLEL_MP=y +CONFIG_XAPIC_ONLY=y +# CONFIG_X2APIC_ONLY is not set +# CONFIG_X2APIC_RUNTIME is not set +# CONFIG_X2APIC_LATE_WORKAROUND is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_HAVE_SMI_HANDLER=y +CONFIG_SMM_TSEG=y +CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 +CONFIG_AP_STACK_SIZE=0x800 +CONFIG_SMP=y +CONFIG_SSE=y +CONFIG_SSE2=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# +CONFIG_NORTHBRIDGE_INTEL_HASWELL=y +# CONFIG_USE_NATIVE_RAMINIT is not set +CONFIG_USE_BROADWELL_MRC=y +# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set + +# +# Southbridge +# +# CONFIG_PCIEXP_HOTPLUG is not set +CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y +CONFIG_FINALIZE_USB_ROUTE_XHCI=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y +CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_TCO_SPACE_NOT_YET_SPLIT=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y +CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 +CONFIG_RCBA_LENGTH=0x4000 + +# +# Super I/O +# +CONFIG_SUPERIO_SMSC_SCH555x=y + +# +# Embedded Controllers +# + +# +# Intel Firmware +# +CONFIG_HAVE_ME_BIN=y +# CONFIG_STITCH_ME_BIN is not set +# CONFIG_CHECK_ME is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set +# CONFIG_USE_ME_CLEANER is not set +CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y +CONFIG_HAVE_GBE_BIN=y +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_ARCH_ALL_STAGES_X86_32=y +CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_PC80_SYSTEM=y +CONFIG_HAVE_CMOS_DEFAULT=y +CONFIG_POSTCAR_STAGE=y +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_HAVE_CF9_RESET=y +CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +# CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 +# end of Chipset + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_LINEAR_FRAMEBUFFER=y +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_NO_GFX_INIT is not set +CONFIG_NO_EARLY_GFX_INIT=y + +# +# Display +# +CONFIG_VGA_TEXT_FRAMEBUFFER=y +# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 +# end of Display + +CONFIG_PCI=y +CONFIG_ECAM_MMCONF_SUPPORT=y +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_ECAM_MMCONF_LENGTH=0x04000000 +CONFIG_PCI_ALLOW_BUS_MASTER=y +CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y +CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set +# CONFIG_EARLY_PCI_BRIDGE is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +CONFIG_USE_DDR3=y +# end of Devices + +# +# Generic Drivers +# +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +CONFIG_CACHE_MRC_SETTINGS=y +# CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set +# CONFIG_SMMSTORE is not set +CONFIG_SPI_FLASH=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_SPI_FLASH_ADESTO=y +CONFIG_SPI_FLASH_AMIC=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y +CONFIG_TPM_INIT_RAMSTAGE=y +# CONFIG_TPM_PPI is not set +CONFIG_DRIVERS_UART=y +# CONFIG_DRIVERS_UART_OXPCIE is not set +CONFIG_HAVE_USBDEBUG=y +CONFIG_HAVE_USBDEBUG_OPTIONS=y +# CONFIG_USBDEBUG is not set +# CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +# CONFIG_DRIVERS_I2C_MAX98396 is not set +CONFIG_INTEL_DDI=y +CONFIG_INTEL_INT15=y +CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_GFX_GMA=y +CONFIG_GFX_GMA_DYN_CPU=y +CONFIG_GFX_GMA_GENERATION="Haswell" +CONFIG_GFX_GMA_PCH="Lynx_Point" +CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" +CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set +CONFIG_DRIVERS_MC146818=y +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set +CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +CONFIG_MEMORY_MAPPED_TPM=y +CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 +CONFIG_VGA=y +# CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_WIFI_GENERIC=y +CONFIG_DRIVERS_MTK_WIFI=y +# end of Generic Drivers + +# +# Security +# + +# +# CBFS verification +# +# CONFIG_CBFS_VERIFICATION is not set +# end of CBFS verification + +# +# Verified Boot (vboot) +# +# end of Verified Boot (vboot) + +# +# Trusted Platform Module +# +CONFIG_TPM1=y +# CONFIG_TPM2 is not set +CONFIG_TPM=y +CONFIG_MAINBOARD_HAS_TPM1=y +# CONFIG_TPM_DEACTIVATE is not set +# CONFIG_DEBUG_TPM is not set +CONFIG_PCR_BOOT_MODE=1 +CONFIG_PCR_HWID=1 +CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 +CONFIG_PCR_RUNTIME_DATA=3 +# end of Trusted Platform Module + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y +# end of Memory initialization + +# CONFIG_INTEL_TXT is not set +# CONFIG_STM is not set +# CONFIG_INTEL_CBNT_SUPPORT is not set +CONFIG_BOOTMEDIA_LOCK_NONE=y +# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_CHIP is not set +# CONFIG_BOOTMEDIA_SMM_BWP is not set +# end of Security + +CONFIG_ACPI_HAVE_PCAT_8259=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +CONFIG_ACPI_SOC_NVS=y +CONFIG_ACPI_NO_CUSTOM_MADT=y +CONFIG_ACPI_COMMON_MADT_LAPIC=y +CONFIG_ACPI_COMMON_MADT_IOAPIC=y +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y +CONFIG_RTC=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y + +# +# I/O mapped, 8250-compatible +# +CONFIG_TTYS0_BASE=0x3f8 + +# +# Serial port base address = 0x3f8 +# +# CONFIG_CONSOLE_SERIAL_921600 is not set +# CONFIG_CONSOLE_SERIAL_460800 is not set +# CONFIG_CONSOLE_SERIAL_230400 is not set +CONFIG_CONSOLE_SERIAL_115200=y +# CONFIG_CONSOLE_SERIAL_57600 is not set +# CONFIG_CONSOLE_SERIAL_38400 is not set +# CONFIG_CONSOLE_SERIAL_19200 is not set +# CONFIG_CONSOLE_SERIAL_9600 is not set +CONFIG_TTYS0_LCS=3 +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_SPI_FLASH is not set +# CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_EM100PRO_SPI_CONSOLE is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CMOS_POST is not set +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_POST_IO_PORT=0x80 +CONFIG_HWBASE_DEBUG_CB=y +# end of Console + +CONFIG_HAVE_ACPI_RESUME=y +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_HAVE_OPTION_TABLE=y +CONFIG_IOAPIC=y +CONFIG_USE_WATCHDOG_ON_BOOT=y + +# +# System tables +# +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_BIOS_VENDOR="coreboot" +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" +# end of System tables + +# +# Payload +# +CONFIG_PAYLOAD_NONE=y +# end of Payload + +# +# Debugging +# + +# +# CPU Debug Settings +# +# CONFIG_DISPLAY_MTRRS is not set + +# +# Vendorcode Debug Settings +# + +# +# BLOB Debug Settings +# + +# +# General Debug Settings +# +# CONFIG_GDB_STUB is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set +# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set +# end of Debugging + +CONFIG_RAMSTAGE_ADA=y +CONFIG_RAMSTAGE_LIBHWBASE=y +CONFIG_HWBASE_DYNAMIC_MMIO=y +CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 +CONFIG_HWBASE_DIRECT_PCIDEV=y +CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + +CONFIG_WARNINGS_ARE_ERRORS=y +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_RELOCATABLE_MODULES=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/t1700mt_bmrc_12mb/target.cfg b/config/coreboot/t1700mt_bmrc_12mb/target.cfg new file mode 100644 index 00000000..a2d591d1 --- /dev/null +++ b/config/coreboot/t1700mt_bmrc_12mb/target.cfg @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +tree="default" +xarch="i386-elf" +payload_seabios="y" +payload_grub="y" +payload_memtest="y" +grub_scan_disk="nvme ahci" +grubtree="xhci_nvme" +vcfg="t1700" +build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot" +payload_uboot="amd64" diff --git a/config/coreboot/t1700sff_bmrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t1700sff_bmrc_12mb/config/libgfxinit_corebootfb new file mode 100644 index 00000000..b068a09f --- /dev/null +++ b/config/coreboot/t1700sff_bmrc_12mb/config/libgfxinit_corebootfb @@ -0,0 +1,692 @@ +# +# Automatically generated file; DO NOT EDIT. +# coreboot configuration +# + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_CBFS_PREFIX="fallback" +CONFIG_COMPILER_GCC=y +# CONFIG_COMPILER_LLVM_CLANG is not set +# CONFIG_ANY_TOOLCHAIN is not set +# CONFIG_CCACHE is not set +# CONFIG_LTO is not set +# CONFIG_IWYU is not set +# CONFIG_FMD_GENPARSER is not set +# CONFIG_UTIL_GENPARSER is not set +# CONFIG_OPTION_BACKEND_NONE is not set +CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set +CONFIG_STATIC_OPTION_TABLE=y +CONFIG_COMPRESS_RAMSTAGE_LZMA=y +# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y +CONFIG_INCLUDE_CONFIG_FILE=y +CONFIG_COLLECT_TIMESTAMPS=y +# CONFIG_TIMESTAMPS_ON_CONSOLE is not set +CONFIG_USE_BLOBS=y +# CONFIG_USE_AMD_BLOBS is not set +# CONFIG_USE_QC_BLOBS is not set +# CONFIG_COVERAGE is not set +# CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_ROMSTAGE=y +CONFIG_HAVE_ASAN_IN_RAMSTAGE=y +# CONFIG_ASAN is not set +CONFIG_NO_STAGE_CACHE=y +# CONFIG_TSEG_STAGE_CACHE is not set +# CONFIG_UPDATE_IMAGE is not set +# CONFIG_BOOTSPLASH_IMAGE is not set + +# +# Software Bill Of Materials (SBOM) +# +# CONFIG_SBOM is not set +# end of Software Bill Of Materials (SBOM) +# end of General setup + +# +# Mainboard +# + +# +# Important: Run 'make distclean' before switching boards +# +# CONFIG_VENDOR_51NB is not set +# CONFIG_VENDOR_ACER is not set +# CONFIG_VENDOR_AMD is not set +# CONFIG_VENDOR_AOOSTAR is not set +# CONFIG_VENDOR_AOPEN is not set +# CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set +# CONFIG_VENDOR_ASROCK is not set +# CONFIG_VENDOR_ASUS is not set +# CONFIG_VENDOR_BIOSTAR is not set +# CONFIG_VENDOR_BOSTENTECH is not set +# CONFIG_VENDOR_BYTEDANCE is not set +# CONFIG_VENDOR_CAVIUM is not set +# CONFIG_VENDOR_CLEVO is not set +# CONFIG_VENDOR_COMPULAB is not set +# CONFIG_VENDOR_CWWK is not set +CONFIG_VENDOR_DELL=y +# CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set +# CONFIG_VENDOR_EXAMPLE is not set +# CONFIG_VENDOR_FACEBOOK is not set +# CONFIG_VENDOR_FOXCONN is not set +# CONFIG_VENDOR_FRAMEWORK is not set +# CONFIG_VENDOR_GETAC is not set +# CONFIG_VENDOR_GIGABYTE is not set +# CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set +# CONFIG_VENDOR_HP is not set +# CONFIG_VENDOR_IBASE is not set +# CONFIG_VENDOR_IBM is not set +# CONFIG_VENDOR_INTEL is not set +# CONFIG_VENDOR_INVENTEC is not set +# CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set +# CONFIG_VENDOR_LENOVO is not set +# CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set +# CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set +# CONFIG_VENDOR_OCP is not set +# CONFIG_VENDOR_OPENCELLULAR is not set +# CONFIG_VENDOR_PACKARDBELL is not set +# CONFIG_VENDOR_PCENGINES is not set +# CONFIG_VENDOR_PINE64 is not set +# CONFIG_VENDOR_PORTWELL is not set +# CONFIG_VENDOR_PRODRIVE is not set +# CONFIG_VENDOR_PROTECTLI is not set +# CONFIG_VENDOR_PURISM is not set +# CONFIG_VENDOR_RAPTOR_CS is not set +# CONFIG_VENDOR_RAZER is not set +# CONFIG_VENDOR_RODA is not set +# CONFIG_VENDOR_SAMSUNG is not set +# CONFIG_VENDOR_SAPPHIRE is not set +# CONFIG_VENDOR_SIEMENS is not set +# CONFIG_VENDOR_SIFIVE is not set +# CONFIG_VENDOR_STARLABS is not set +# CONFIG_VENDOR_SUPERMICRO is not set +# CONFIG_VENDOR_SYSTEM76 is not set +# CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set +# CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set +CONFIG_BOARD_SPECIFIC_OPTIONS=y +CONFIG_MAINBOARD_PART_NUMBER="Precision T1700 SFF" +CONFIG_MAINBOARD_VERSION="1.0" +CONFIG_MAINBOARD_DIR="dell/optiplex_9020" +CONFIG_VGA_BIOS_ID="8086,0166" +CONFIG_DIMM_MAX=4 +CONFIG_DIMM_SPD_SIZE=256 +CONFIG_FMDFILE="" +# CONFIG_NO_POST is not set +CONFIG_MAINBOARD_VENDOR="Dell Inc." +CONFIG_CBFS_SIZE=0x800000 +CONFIG_CONSOLE_SERIAL=y +CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160 +CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840 +CONFIG_MAX_CPUS=8 +# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_POST_DEVICE=y +CONFIG_POST_IO=y +CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set +# CONFIG_VGA_BIOS is not set +CONFIG_PCIEXP_ASPM=y +CONFIG_PCIEXP_L1_SUB_STATE=y +CONFIG_PCIEXP_CLK_PM=y +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF" +# CONFIG_CONSOLE_POST is not set +CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" +CONFIG_MAX_SOCKET=1 +CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 +CONFIG_TPM_PIRQ=0x0 +# CONFIG_BOARD_DELL_E4300 is not set +# CONFIG_BOARD_DELL_E6400 is not set +# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set +# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set +CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y +# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set +# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set +# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set +# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set +# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set +# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set +# CONFIG_BOARD_DELL_PRECISION_T1650 is not set +# CONFIG_BOARD_DELL_XPS_8300 is not set +CONFIG_DCACHE_RAM_BASE=0xff7c0000 +CONFIG_DCACHE_RAM_SIZE=0x10000 +CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x2000 +CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 +CONFIG_HAVE_INTEL_FIRMWARE=y +CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_DRIVERS_INTEL_WIFI=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd" +CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin" +CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +# CONFIG_ENABLE_DDR_2X_REFRESH is not set +CONFIG_PCIEXP_AER=y +CONFIG_CARDBUS_PLUGIN_SUPPORT=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_DEBUG_SMI is not set +CONFIG_HAVE_IFD_BIN=y +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="PNP0F13" +CONFIG_GFX_GMA_PANEL_1_PORT="eDP" +CONFIG_TTYS0_BAUD=115200 +CONFIG_D3COLD_SUPPORT=y +CONFIG_GFX_GMA_PANEL_1_ON_EDP=y +CONFIG_DRIVERS_UART_8250IO=y +CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 +CONFIG_HEAP_SIZE=0x100000 +CONFIG_EC_GPE_SCI=0x50 +CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" +CONFIG_EC_STARLABS_BATTERY_TYPE="LION" +CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +# CONFIG_TPM_MEASURED_BOOT is not set +CONFIG_BOARD_ROMSIZE_KB_12288=y +# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set +CONFIG_COREBOOT_ROMSIZE_KB_12288=y +# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set +CONFIG_COREBOOT_ROMSIZE_KB=12288 +CONFIG_ROM_SIZE=0x00c00000 +CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y +CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set +# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set +CONFIG_MAINBOARD_POWER_FAILURE_STATE=0 +# end of Mainboard + +# +# Chipset +# + +# +# SoC +# +CONFIG_CHIPSET_DEVICETREE="" +CONFIG_CBFS_MCACHE_SIZE=0x4000 +CONFIG_ROMSTAGE_ADDR=0x2000000 +CONFIG_VERSTAGE_ADDR=0x2000000 +CONFIG_SMM_TSEG_SIZE=0x800000 +CONFIG_SMM_RESERVED_SIZE=0x100000 +CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=512 +CONFIG_SERIRQ_CONTINUOUS_MODE=y +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 +CONFIG_EHCI_BAR=0xd8000000 +CONFIG_ACPI_CPU_STRING="CP%02X" +CONFIG_STACK_SIZE=0x2000 +CONFIG_IED_REGION_SIZE=0x400000 +CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254 +CONFIG_INTEL_GMA_BCLV_WIDTH=16 +CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 +CONFIG_INTEL_GMA_BCLM_WIDTH=16 +CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin" +CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000 +CONFIG_HPET_MIN_TICKS=0x80 +CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000 +CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 +CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 +CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_DISABLE_ME_PCI=y +CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 +CONFIG_CBFS_CACHE_ALIGN=8 + +# +# CPU +# +CONFIG_CPU_INTEL_HASWELL=y +CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y +CONFIG_CPU_INTEL_COMMON=y +CONFIG_ENABLE_VMX=y +CONFIG_SET_IA32_FC_LOCK_BIT=y +CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_TIMEBASE=y +CONFIG_CPU_INTEL_COMMON_VOLTAGE=y +CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_PARALLEL_MP=y +CONFIG_XAPIC_ONLY=y +# CONFIG_X2APIC_ONLY is not set +# CONFIG_X2APIC_RUNTIME is not set +# CONFIG_X2APIC_LATE_WORKAROUND is not set +CONFIG_UDELAY_TSC=y +CONFIG_TSC_MONOTONIC_TIMER=y +CONFIG_TSC_SYNC_MFENCE=y +CONFIG_HAVE_SMI_HANDLER=y +CONFIG_SMM_TSEG=y +CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 +CONFIG_AP_STACK_SIZE=0x800 +CONFIG_SMP=y +CONFIG_SSE=y +CONFIG_SSE2=y +CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y +CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set +# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set +# CONFIG_CPU_MICROCODE_CBFS_NONE is not set + +# +# Northbridge +# +CONFIG_NORTHBRIDGE_INTEL_HASWELL=y +# CONFIG_USE_NATIVE_RAMINIT is not set +CONFIG_USE_BROADWELL_MRC=y +# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set + +# +# Southbridge +# +# CONFIG_PCIEXP_HOTPLUG is not set +CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y +CONFIG_FINALIZE_USB_ROUTE_XHCI=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y +CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y +CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y +# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_TCO_SPACE_NOT_YET_SPLIT=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y +CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 +CONFIG_RCBA_LENGTH=0x4000 + +# +# Super I/O +# +CONFIG_SUPERIO_SMSC_SCH555x=y + +# +# Embedded Controllers +# + +# +# Intel Firmware +# +CONFIG_HAVE_ME_BIN=y +# CONFIG_STITCH_ME_BIN is not set +# CONFIG_CHECK_ME is not set +# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set +# CONFIG_USE_ME_CLEANER is not set +CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y +CONFIG_HAVE_GBE_BIN=y +# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set +# CONFIG_LOCK_MANAGEMENT_ENGINE is not set +CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 +CONFIG_ARCH_X86=y +CONFIG_ARCH_BOOTBLOCK_X86_32=y +CONFIG_ARCH_VERSTAGE_X86_32=y +CONFIG_ARCH_ROMSTAGE_X86_32=y +CONFIG_ARCH_POSTCAR_X86_32=y +CONFIG_ARCH_RAMSTAGE_X86_32=y +CONFIG_ARCH_ALL_STAGES_X86_32=y +CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y +CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 +CONFIG_PC80_SYSTEM=y +CONFIG_HAVE_CMOS_DEFAULT=y +CONFIG_POSTCAR_STAGE=y +CONFIG_BOOTBLOCK_SIMPLE=y +# CONFIG_BOOTBLOCK_NORMAL is not set +CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_HAVE_CF9_RESET=y +CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +# CONFIG_DUMP_SMBIOS_TYPE17 is not set +CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 +# end of Chipset + +# +# Devices +# +CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y +CONFIG_HAVE_LINEAR_FRAMEBUFFER=y +CONFIG_MAINBOARD_HAS_LIBGFXINIT=y +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +# CONFIG_VGA_ROM_RUN is not set +# CONFIG_NO_GFX_INIT is not set +CONFIG_NO_EARLY_GFX_INIT=y + +# +# Display +# +# CONFIG_VGA_TEXT_FRAMEBUFFER is not set +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_LINEAR_FRAMEBUFFER=y +# CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 +# end of Display + +CONFIG_PCI=y +CONFIG_ECAM_MMCONF_SUPPORT=y +CONFIG_PCIX_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y +CONFIG_PCIEXP_PLUGIN_SUPPORT=y +CONFIG_ECAM_MMCONF_LENGTH=0x04000000 +CONFIG_PCI_ALLOW_BUS_MASTER=y +CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y +CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y +# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set +# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set +# CONFIG_EARLY_PCI_BRIDGE is not set +CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 +CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 +CONFIG_INTEL_GMA_HAVE_VBT=y +CONFIG_INTEL_GMA_ADD_VBT=y +# CONFIG_SOFTWARE_I2C is not set +CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 +CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +CONFIG_USE_DDR3=y +# end of Devices + +# +# Generic Drivers +# +CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set +# CONFIG_ELOG is not set +CONFIG_CACHE_MRC_SETTINGS=y +# CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set +# CONFIG_SMMSTORE is not set +CONFIG_SPI_FLASH=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y +CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y +# CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_SPI_FLASH_ADESTO=y +CONFIG_SPI_FLASH_AMIC=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y +CONFIG_TPM_INIT_RAMSTAGE=y +# CONFIG_TPM_PPI is not set +CONFIG_DRIVERS_UART=y +# CONFIG_DRIVERS_UART_OXPCIE is not set +CONFIG_HAVE_USBDEBUG=y +CONFIG_HAVE_USBDEBUG_OPTIONS=y +# CONFIG_USBDEBUG is not set +# CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set +# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set +# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set +# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +# CONFIG_DRIVERS_I2C_MAX98396 is not set +CONFIG_INTEL_DDI=y +CONFIG_INTEL_INT15=y +CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" +CONFIG_GFX_GMA=y +CONFIG_GFX_GMA_DYN_CPU=y +CONFIG_GFX_GMA_GENERATION="Haswell" +CONFIG_GFX_GMA_PCH="Lynx_Point" +CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" +CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set +# CONFIG_DRIVERS_PS2_KEYBOARD is not set +CONFIG_DRIVERS_MC146818=y +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set +CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +CONFIG_MEMORY_MAPPED_TPM=y +CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_SIL_3114 is not set +CONFIG_DRIVERS_WIFI_GENERIC=y +CONFIG_DRIVERS_MTK_WIFI=y +# end of Generic Drivers + +# +# Security +# + +# +# CBFS verification +# +# CONFIG_CBFS_VERIFICATION is not set +# end of CBFS verification + +# +# Verified Boot (vboot) +# +# end of Verified Boot (vboot) + +# +# Trusted Platform Module +# +CONFIG_TPM1=y +# CONFIG_TPM2 is not set +CONFIG_TPM=y +CONFIG_MAINBOARD_HAS_TPM1=y +# CONFIG_TPM_DEACTIVATE is not set +# CONFIG_DEBUG_TPM is not set +CONFIG_PCR_BOOT_MODE=1 +CONFIG_PCR_HWID=1 +CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 +CONFIG_PCR_RUNTIME_DATA=3 +# end of Trusted Platform Module + +# +# Memory initialization +# +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y +# end of Memory initialization + +# CONFIG_INTEL_TXT is not set +# CONFIG_STM is not set +# CONFIG_INTEL_CBNT_SUPPORT is not set +CONFIG_BOOTMEDIA_LOCK_NONE=y +# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set +# CONFIG_BOOTMEDIA_LOCK_CHIP is not set +# CONFIG_BOOTMEDIA_SMM_BWP is not set +# end of Security + +CONFIG_ACPI_HAVE_PCAT_8259=y +CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y +CONFIG_ACPI_SOC_NVS=y +CONFIG_ACPI_NO_CUSTOM_MADT=y +CONFIG_ACPI_COMMON_MADT_LAPIC=y +CONFIG_ACPI_COMMON_MADT_IOAPIC=y +CONFIG_HAVE_ACPI_TABLES=y +CONFIG_BOOT_DEVICE_SPI_FLASH=y +CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y +CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y +CONFIG_RTC=y + +# +# Console +# +CONFIG_BOOTBLOCK_CONSOLE=y +CONFIG_POSTCAR_CONSOLE=y +CONFIG_SQUELCH_EARLY_SMP=y + +# +# I/O mapped, 8250-compatible +# +CONFIG_TTYS0_BASE=0x3f8 + +# +# Serial port base address = 0x3f8 +# +# CONFIG_CONSOLE_SERIAL_921600 is not set +# CONFIG_CONSOLE_SERIAL_460800 is not set +# CONFIG_CONSOLE_SERIAL_230400 is not set +CONFIG_CONSOLE_SERIAL_115200=y +# CONFIG_CONSOLE_SERIAL_57600 is not set +# CONFIG_CONSOLE_SERIAL_38400 is not set +# CONFIG_CONSOLE_SERIAL_19200 is not set +# CONFIG_CONSOLE_SERIAL_9600 is not set +CONFIG_TTYS0_LCS=3 +# CONFIG_SPKMODEM is not set +# CONFIG_CONSOLE_NE2K is not set +CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_SPI_FLASH is not set +# CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_EM100PRO_SPI_CONSOLE is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y +CONFIG_CONSOLE_USE_ANSI_ESCAPES=y +# CONFIG_CMOS_POST is not set +CONFIG_POST_DEVICE_NONE=y +# CONFIG_POST_DEVICE_LPC is not set +# CONFIG_POST_DEVICE_PCI_PCIE is not set +CONFIG_POST_IO_PORT=0x80 +CONFIG_HWBASE_DEBUG_CB=y +# end of Console + +CONFIG_HAVE_ACPI_RESUME=y +CONFIG_RESUME_PATH_SAME_AS_BOOT=y +CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_HAVE_OPTION_TABLE=y +CONFIG_IOAPIC=y +CONFIG_USE_WATCHDOG_ON_BOOT=y + +# +# System tables +# +CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_BIOS_VENDOR="coreboot" +CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" +# end of System tables + +# +# Payload +# +CONFIG_PAYLOAD_NONE=y +# end of Payload + +# +# Debugging +# + +# +# CPU Debug Settings +# +# CONFIG_DISPLAY_MTRRS is not set + +# +# Vendorcode Debug Settings +# + +# +# BLOB Debug Settings +# + +# +# General Debug Settings +# +# CONFIG_GDB_STUB is not set +# CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_SMBUS=y +# CONFIG_DEBUG_SMBUS is not set +# CONFIG_DEBUG_MALLOC is not set +# CONFIG_DEBUG_CONSOLE_INIT is not set +# CONFIG_DEBUG_SPI_FLASH is not set +# CONFIG_DEBUG_BOOT_STATE is not set +# CONFIG_DEBUG_ADA_CODE is not set +CONFIG_HAVE_EM100_SUPPORT=y +# CONFIG_EM100 is not set +# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set +# end of Debugging + +CONFIG_RAMSTAGE_ADA=y +CONFIG_RAMSTAGE_LIBHWBASE=y +CONFIG_HWBASE_DYNAMIC_MMIO=y +CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 +CONFIG_HWBASE_DIRECT_PCIDEV=y +CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + +CONFIG_WARNINGS_ARE_ERRORS=y +CONFIG_MAX_REBOOT_CNT=3 +CONFIG_RELOCATABLE_MODULES=y +CONFIG_HAVE_BOOTBLOCK=y +CONFIG_HAVE_ROMSTAGE=y +CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t1700sff_bmrc_12mb/config/libgfxinit_txtmode index 593237f1..2f595fd1 100644 --- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/t1700sff_bmrc_12mb/config/libgfxinit_txtmode @@ -16,8 +16,10 @@ CONFIG_COMPILER_GCC=y # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set -CONFIG_OPTION_BACKEND_NONE=y -# CONFIG_USE_OPTION_TABLE is not set +# CONFIG_OPTION_BACKEND_NONE is not set +CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set +CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -29,10 +31,11 @@ CONFIG_USE_BLOBS=y # CONFIG_USE_QC_BLOBS is not set # CONFIG_COVERAGE is not set # CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_ROMSTAGE=y CONFIG_HAVE_ASAN_IN_RAMSTAGE=y # CONFIG_ASAN is not set -# CONFIG_NO_STAGE_CACHE is not set -CONFIG_TSEG_STAGE_CACHE=y +CONFIG_NO_STAGE_CACHE=y +# CONFIG_TSEG_STAGE_CACHE is not set # CONFIG_UPDATE_IMAGE is not set # CONFIG_BOOTSPLASH_IMAGE is not set @@ -88,6 +91,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -112,18 +116,18 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_UP is not set # CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y -CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro" +CONFIG_MAINBOARD_PART_NUMBER="Precision T1700 SFF" CONFIG_MAINBOARD_VERSION="1.0" -CONFIG_MAINBOARD_DIR="dell/optiplex_3050" -CONFIG_VGA_BIOS_ID="8086,0406" +CONFIG_MAINBOARD_DIR="dell/optiplex_9020" +CONFIG_VGA_BIOS_ID="8086,0166" CONFIG_DIMM_MAX=4 -CONFIG_DIMM_SPD_SIZE=512 +CONFIG_DIMM_SPD_SIZE=256 CONFIG_FMDFILE="" # CONFIG_NO_POST is not set CONFIG_MAINBOARD_VENDOR="Dell Inc." -CONFIG_CBFS_SIZE=0xEEE000 +CONFIG_CBFS_SIZE=0x800000 CONFIG_CONSOLE_SERIAL=y -CONFIG_MAX_CPUS=16 +CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y @@ -136,26 +140,26 @@ CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" # CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" -# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro" +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 7020/9020 SFF" # CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -CONFIG_USE_PM_ACPI_TIMER=y +CONFIG_TPM_PIRQ=0x0 +# CONFIG_BOARD_DELL_E4300 is not set # CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set -CONFIG_BOARD_DELL_OPTIPLEX_3050=y +# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set -# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set +CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF=y # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set # CONFIG_BOARD_DELL_LATITUDE_E5520 is not set @@ -171,30 +175,31 @@ CONFIG_BOARD_DELL_OPTIPLEX_3050=y # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set # CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_XPS_8300 is not set -CONFIG_DCACHE_RAM_BASE=0xfef00000 -CONFIG_DCACHE_RAM_SIZE=0x40000 +CONFIG_DCACHE_RAM_BASE=0xff7c0000 +CONFIG_DCACHE_RAM_SIZE=0x10000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 -CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x2000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_USE_LEGACY_8254_TIMER=y CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y +CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVERS_INTEL_WIFI=y -CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd" -CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin" -CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/dell9020mt/12_ifd" +CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin" +CONFIG_GBE_BIN_PATH="../../../config/ifd/dell9020mt/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +# CONFIG_ENABLE_DDR_2X_REFRESH is not set +CONFIG_PCIEXP_AER=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y -CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set CONFIG_HAVE_IFD_BIN=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" CONFIG_TTYS0_BAUD=115200 -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set -CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y CONFIG_GFX_GMA_PANEL_1_ON_EDP=y CONFIG_DRIVERS_UART_8250IO=y @@ -204,7 +209,8 @@ CONFIG_EC_GPE_SCI=0x50 CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" CONFIG_EC_STARLABS_BATTERY_TYPE="LION" CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" -CONFIG_BOARD_ROMSIZE_KB_16384=y +# CONFIG_TPM_MEASURED_BOOT is not set +CONFIG_BOARD_ROMSIZE_KB_12288=y # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set # CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set @@ -214,19 +220,19 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y # CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set # CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set -# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set -CONFIG_COREBOOT_ROMSIZE_KB_16384=y +CONFIG_COREBOOT_ROMSIZE_KB_12288=y +# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set # CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set -CONFIG_COREBOOT_ROMSIZE_KB=16384 -CONFIG_ROM_SIZE=0x01000000 +CONFIG_COREBOOT_ROMSIZE_KB=12288 +CONFIG_ROM_SIZE=0x00c00000 CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y -# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set -CONFIG_POWER_STATE_ON_AFTER_FAILURE=y +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set # CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set -CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 +CONFIG_MAINBOARD_POWER_FAILURE_STATE=0 # end of Mainboard # @@ -236,193 +242,54 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 # # SoC # -CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" -CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" -CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" +CONFIG_CHIPSET_DEVICETREE="" CONFIG_CBFS_MCACHE_SIZE=0x4000 CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 -CONFIG_SMM_RESERVED_SIZE=0x200000 -CONFIG_SMM_MODULE_STACK_SIZE=0x800 -CONFIG_ACPI_BERT_SIZE=0x0 -CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_SMM_RESERVED_SIZE=0x100000 +CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=512 +CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 +CONFIG_EHCI_BAR=0xd8000000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 -CONFIG_IFD_CHIPSET="sklkbl" CONFIG_IED_REGION_SIZE=0x400000 -CONFIG_MAX_ROOT_PORTS=24 -CONFIG_PCR_BASE_ADDRESS=0xfd000000 -CONFIG_CPU_BCLK_MHZ=100 -CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120 -CONFIG_CPU_XTAL_HZ=24000000 -CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2 -CONFIG_SOC_INTEL_I2C_DEV_MAX=6 -# CONFIG_ENABLE_SATA_TEST_MODE is not set -CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 -CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 -CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" -CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" -CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 -CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 +CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254 CONFIG_INTEL_GMA_BCLV_WIDTH=16 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 CONFIG_INTEL_GMA_BCLM_WIDTH=16 -CONFIG_FSP_PUBLISH_MBP_HOB=y -CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 -CONFIG_MAX_HECI_DEVICES=5 CONFIG_BOOTBLOCK_IN_CBFS=y -CONFIG_HAVE_PAM0_REGISTER=y +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin" +CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000 +CONFIG_HPET_MIN_TICKS=0x80 +CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000 +CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 +CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y -CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000 -CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10 -CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 -CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 -CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 +CONFIG_DISABLE_ME_PCI=y +CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 -CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y -CONFIG_SOC_INTEL_KABYLAKE=y -CONFIG_SKYLAKE_SOC_PCH_H=y -CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y -CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y -CONFIG_FSP_T_LOCATION=0xfffe0000 -CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y -CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 -CONFIG_SOC_INTEL_COMMON=y - -# -# Intel SoC Common Code for IP blocks -# -CONFIG_SOC_INTEL_COMMON_BLOCK=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y -CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y -# CONFIG_USE_COREBOOT_MP_INIT is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y -CONFIG_INTEL_CAR_NEM_ENHANCED=y -# CONFIG_USE_INTEL_FSP_MP_INIT is not set -CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y -CONFIG_HAVE_HYPERTHREADING=y -# CONFIG_FSP_HYPERTHREADING is not set -# CONFIG_INTEL_KEYLOCKER is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y -CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y -CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" -CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" -CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" -CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" -CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" -CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" -CONFIG_SOC_INTEL_CSE_RW_FILE="" -CONFIG_SOC_INTEL_CSE_RW_VERSION="" -CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom" -CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE="" -CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy" -CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE="" -CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y -CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y -CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y -CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y -CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y -# CONFIG_SOC_INTEL_DISABLE_IGD is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y -CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y -CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y -CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y -CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y -CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y -CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y -CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y -# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 -CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y -CONFIG_SA_ENABLE_DPR=y -CONFIG_HAVE_CAPID_A_REGISTER=y -CONFIG_HAVE_BDSM_BGSM_REGISTER=y -CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y -CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y -CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y -CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y -CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y - -# -# Intel SoC Common PCH Code -# -CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y -CONFIG_SOC_INTEL_COMMON_PCH_BASE=y -CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y -CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y -CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y -CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y - -# -# Intel SoC Common coreboot stages and non-IP blocks -# -CONFIG_SOC_INTEL_COMMON_BASECODE=y -CONFIG_SOC_INTEL_COMMON_RESET=y -CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y -CONFIG_PAVP=y -# CONFIG_MMA is not set -CONFIG_SOC_INTEL_COMMON_NHLT=y -# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set # # CPU # +CONFIG_CPU_INTEL_HASWELL=y CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y CONFIG_CPU_INTEL_COMMON=y CONFIG_ENABLE_VMX=y CONFIG_SET_IA32_FC_LOCK_BIT=y CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_TIMEBASE=y +CONFIG_CPU_INTEL_COMMON_VOLTAGE=y CONFIG_CPU_INTEL_COMMON_SMM=y CONFIG_PARALLEL_MP=y -CONFIG_PARALLEL_MP_AP_WORK=y CONFIG_XAPIC_ONLY=y # CONFIG_X2APIC_ONLY is not set # CONFIG_X2APIC_RUNTIME is not set @@ -447,15 +314,37 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y # # Northbridge # +CONFIG_NORTHBRIDGE_INTEL_HASWELL=y +# CONFIG_USE_NATIVE_RAMINIT is not set +CONFIG_USE_BROADWELL_MRC=y +# CONFIG_HASWELL_HIDE_PEG_FROM_MRC is not set # # Southbridge # # CONFIG_PCIEXP_HOTPLUG is not set CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y +CONFIG_FINALIZE_USB_ROUTE_XHCI=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y +CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y # CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_TCO_SPACE_NOT_YET_SPLIT=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 CONFIG_RCBA_LENGTH=0x4000 @@ -476,19 +365,12 @@ CONFIG_HAVE_ME_BIN=y # CONFIG_CHECK_ME is not set # CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set # CONFIG_USE_ME_CLEANER is not set +CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y +CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 -CONFIG_UDK_BASE=y -CONFIG_UDK_2017_BINDING=y -CONFIG_UDK_2013_VERSION=2013 -CONFIG_UDK_2017_VERSION=2017 -CONFIG_UDK_202005_VERSION=202005 -CONFIG_UDK_202111_VERSION=202111 -CONFIG_UDK_202302_VERSION=202302 -CONFIG_UDK_202305_VERSION=202305 -CONFIG_UDK_VERSION=2017 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -521,11 +403,9 @@ CONFIG_DEFAULT_EBDA_SIZE=0x400 # CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y CONFIG_HAVE_LINEAR_FRAMEBUFFER=y -CONFIG_HAVE_FSP_GOP=y CONFIG_MAINBOARD_HAS_LIBGFXINIT=y CONFIG_MAINBOARD_USE_LIBGFXINIT=y # CONFIG_VGA_ROM_RUN is not set -# CONFIG_RUN_FSP_GOP is not set # CONFIG_NO_GFX_INIT is not set CONFIG_NO_EARLY_GFX_INIT=y @@ -542,7 +422,7 @@ CONFIG_ECAM_MMCONF_SUPPORT=y CONFIG_PCIX_PLUGIN_SUPPORT=y CONFIG_AZALIA_HDA_CODEC_SUPPORT=y CONFIG_PCIEXP_PLUGIN_SUPPORT=y -CONFIG_ECAM_MMCONF_LENGTH=0x10000000 +CONFIG_ECAM_MMCONF_LENGTH=0x04000000 CONFIG_PCI_ALLOW_BUS_MASTER=y CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y @@ -556,6 +436,7 @@ CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +CONFIG_USE_DDR3=y # end of Devices # @@ -566,43 +447,39 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y -CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_MRC_SETTINGS_PROTECT is not set # CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set +CONFIG_SPI_FLASH_ADESTO=y +CONFIG_SPI_FLASH_AMIC=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y +CONFIG_TPM_INIT_RAMSTAGE=y +# CONFIG_TPM_PPI is not set CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_OXPCIE is not set +CONFIG_HAVE_USBDEBUG=y +CONFIG_HAVE_USBDEBUG_OPTIONS=y +# CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set -CONFIG_DRIVERS_I2C_DESIGNWARE=y # CONFIG_DRIVERS_I2C_MAX98396 is not set -CONFIG_FSP_USE_REPO=y -# CONFIG_DISPLAY_HOBS is not set -# CONFIG_DISPLAY_UPD_DATA is not set -# CONFIG_BMP_LOGO is not set -CONFIG_PLATFORM_USES_FSP2_0=y -CONFIG_PLATFORM_USES_FSP2_X86_32=y -CONFIG_HAVE_INTEL_FSP_REPO=y -CONFIG_ADD_FSP_BINARIES=y -CONFIG_FSP_S_CBFS="fsps.bin" -CONFIG_FSP_M_CBFS="fspm.bin" -CONFIG_FSP_FULL_FD=y -CONFIG_FSP_T_RESERVED_SIZE=0x0 -CONFIG_FSP_M_XIP=y -CONFIG_HAVE_FSP_LOGO_SUPPORT=y -CONFIG_SOC_INTEL_COMMON_FSP_RESET=y -CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y -CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y -CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y -# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set -# CONFIG_BUILDING_WITH_DEBUG_FSP is not set +CONFIG_INTEL_DDI=y +CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y CONFIG_VBT_CBFS_COMPRESSION_LZMA=y # CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set @@ -610,18 +487,19 @@ CONFIG_VBT_CBFS_COMPRESSION_LZMA=y CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" CONFIG_GFX_GMA=y CONFIG_GFX_GMA_DYN_CPU=y -CONFIG_GFX_GMA_GENERATION="Skylake" -CONFIG_GFX_GMA_PCH="Sunrise_Point" +CONFIG_GFX_GMA_GENERATION="Haswell" +CONFIG_GFX_GMA_PCH="Lynx_Point" CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set # CONFIG_DRIVERS_PS2_KEYBOARD is not set CONFIG_DRIVERS_MC146818=y -CONFIG_USE_PC_CMOS_ALTCENTURY=y +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 +CONFIG_MEMORY_MAPPED_TPM=y +CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 CONFIG_VGA=y # CONFIG_DRIVERS_SIL_3114 is not set -CONFIG_DRIVERS_USB_ACPI=y CONFIG_DRIVERS_WIFI_GENERIC=y CONFIG_DRIVERS_MTK_WIFI=y # end of Generic Drivers @@ -644,7 +522,12 @@ CONFIG_DRIVERS_MTK_WIFI=y # # Trusted Platform Module # -CONFIG_NO_TPM=y +CONFIG_TPM1=y +# CONFIG_TPM2 is not set +CONFIG_TPM=y +CONFIG_MAINBOARD_HAS_TPM1=y +# CONFIG_TPM_DEACTIVATE is not set +# CONFIG_DEBUG_TPM is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -656,9 +539,10 @@ CONFIG_PCR_RUNTIME_DATA=3 # Memory initialization # CONFIG_PLATFORM_HAS_DRAM_CLEAR=y -# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set +CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y # end of Memory initialization +# CONFIG_INTEL_TXT is not set # CONFIG_STM is not set # CONFIG_INTEL_CBNT_SUPPORT is not set CONFIG_BOOTMEDIA_LOCK_NONE=y @@ -670,12 +554,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y CONFIG_ACPI_HAVE_PCAT_8259=y CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y CONFIG_ACPI_SOC_NVS=y -CONFIG_ACPI_CUSTOM_MADT=y CONFIG_ACPI_NO_CUSTOM_MADT=y CONFIG_ACPI_COMMON_MADT_LAPIC=y CONFIG_ACPI_COMMON_MADT_IOAPIC=y CONFIG_HAVE_ACPI_TABLES=y -CONFIG_ACPI_LPIT=y CONFIG_BOOT_DEVICE_SPI_FLASH=y CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y @@ -710,6 +592,7 @@ CONFIG_TTYS0_LCS=3 CONFIG_CONSOLE_CBMEM=y # CONFIG_CONSOLE_SPI_FLASH is not set # CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_EM100PRO_SPI_CONSOLE is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set @@ -730,13 +613,12 @@ CONFIG_POST_IO_PORT=0x80 CONFIG_HWBASE_DEBUG_CB=y # end of Console -CONFIG_ACPI_S1_NOT_SUPPORTED=y CONFIG_HAVE_ACPI_RESUME=y CONFIG_RESUME_PATH_SAME_AS_BOOT=y CONFIG_HAVE_MONOTONIC_TIMER=y CONFIG_HAVE_OPTION_TABLE=y CONFIG_IOAPIC=y -CONFIG_ACPI_NHLT=y +CONFIG_USE_WATCHDOG_ON_BOOT=y # # System tables @@ -768,19 +650,11 @@ CONFIG_PAYLOAD_NONE=y # # BLOB Debug Settings # -# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set -# CONFIG_DISPLAY_FSP_HEADER is not set -# CONFIG_VERIFY_HOBS is not set -# CONFIG_DISPLAY_FSP_VERSION_INFO is not set -CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y -# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set # # General Debug Settings # # CONFIG_GDB_STUB is not set -CONFIG_HAVE_DEBUG_GPIO=y -# CONFIG_DEBUG_GPIO is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SMBUS is not set @@ -797,13 +671,19 @@ CONFIG_HAVE_EM100_SUPPORT=y CONFIG_RAMSTAGE_ADA=y CONFIG_RAMSTAGE_LIBHWBASE=y CONFIG_HWBASE_DYNAMIC_MMIO=y -CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 +CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y -CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/t1700sff_bmrc_12mb/target.cfg b/config/coreboot/t1700sff_bmrc_12mb/target.cfg new file mode 100644 index 00000000..a2d591d1 --- /dev/null +++ b/config/coreboot/t1700sff_bmrc_12mb/target.cfg @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +tree="default" +xarch="i386-elf" +payload_seabios="y" +payload_grub="y" +payload_memtest="y" +grub_scan_disk="nvme ahci" +grubtree="xhci_nvme" +vcfg="t1700" +build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot" +payload_uboot="amd64" diff --git a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb index bda47e12..b04c8531 100644 --- a/config/coreboot/t400_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t400_16mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T400" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T400" @@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set CONFIG_BOARD_LENOVO_T400=y # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_T400=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -262,8 +274,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -278,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -365,6 +379,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -377,6 +393,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -401,6 +418,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -421,6 +441,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -453,7 +474,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -473,11 +497,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -649,7 +675,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -671,6 +696,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t400_16mb/config/libgfxinit_txtmode b/config/coreboot/t400_16mb/config/libgfxinit_txtmode index 92866ae0..61d4040b 100644 --- a/config/coreboot/t400_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/t400_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T400" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T400" @@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set CONFIG_BOARD_LENOVO_T400=y # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_T400=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -260,8 +272,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -276,6 +289,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -363,6 +377,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -375,6 +391,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -399,6 +416,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -417,6 +437,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -449,7 +470,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -469,11 +493,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -645,7 +671,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -667,6 +692,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t400_16mb/target.cfg b/config/coreboot/t400_16mb/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/t400_16mb/target.cfg +++ b/config/coreboot/t400_16mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb index c25f6b21..d6f80065 100644 --- a/config/coreboot/t400_4mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t400_4mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T400" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T400" @@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set CONFIG_BOARD_LENOVO_T400=y # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_T400=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -262,8 +274,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -278,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -365,6 +379,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -377,6 +393,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -401,6 +418,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -421,6 +441,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -453,7 +474,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -473,11 +497,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -649,7 +675,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -671,6 +696,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t400_4mb/config/libgfxinit_txtmode b/config/coreboot/t400_4mb/config/libgfxinit_txtmode index 3eb566f6..2e878426 100644 --- a/config/coreboot/t400_4mb/config/libgfxinit_txtmode +++ b/config/coreboot/t400_4mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T400" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T400" @@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set CONFIG_BOARD_LENOVO_T400=y # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_T400=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -260,8 +272,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -276,6 +289,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -363,6 +377,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -375,6 +391,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -399,6 +416,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -417,6 +437,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -449,7 +470,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -469,11 +493,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -645,7 +671,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -667,6 +692,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t400_4mb/target.cfg b/config/coreboot/t400_4mb/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/t400_4mb/target.cfg +++ b/config/coreboot/t400_4mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb index a23aa0d7..b3c9a4fc 100644 --- a/config/coreboot/t400_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t400_8mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T400" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T400" @@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set CONFIG_BOARD_LENOVO_T400=y # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_T400=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -262,8 +274,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -278,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -365,6 +379,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -377,6 +393,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -401,6 +418,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -421,6 +441,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -453,7 +474,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -473,11 +497,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -649,7 +675,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -671,6 +696,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t400_8mb/config/libgfxinit_txtmode b/config/coreboot/t400_8mb/config/libgfxinit_txtmode index da7785f7..d47db263 100644 --- a/config/coreboot/t400_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/t400_8mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T400" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T400" @@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set CONFIG_BOARD_LENOVO_T400=y # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_T400=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -260,8 +272,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -276,6 +289,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -363,6 +377,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -375,6 +391,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -399,6 +416,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -417,6 +437,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -449,7 +470,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -469,11 +493,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -645,7 +671,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -667,6 +692,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t400_8mb/target.cfg b/config/coreboot/t400_8mb/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/t400_8mb/target.cfg +++ b/config/coreboot/t400_8mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb index 31a79444..eeed98c6 100644 --- a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T420" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T420" @@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=8 CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T420" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 @@ -159,12 +170,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T420" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_T420=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="LEN0015" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" @@ -263,9 +275,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -282,6 +295,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -329,6 +343,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -376,6 +395,7 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -391,6 +411,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -414,6 +435,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -434,6 +458,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -465,9 +490,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -489,11 +517,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -546,7 +576,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -655,7 +684,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -676,6 +704,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t420_8mb/config/libgfxinit_txtmode index 407be629..46d361f3 100644 --- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/t420_8mb/config/libgfxinit_txtmode @@ -16,7 +16,10 @@ CONFIG_COMPILER_GCC=y # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set -CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_OPTION_BACKEND_NONE is not set +CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set +CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -30,8 +33,8 @@ CONFIG_USE_BLOBS=y # CONFIG_UBSAN is not set CONFIG_HAVE_ASAN_IN_RAMSTAGE=y # CONFIG_ASAN is not set -# CONFIG_NO_STAGE_CACHE is not set -CONFIG_TSEG_STAGE_CACHE=y +CONFIG_NO_STAGE_CACHE=y +# CONFIG_TSEG_STAGE_CACHE is not set # CONFIG_UPDATE_IMAGE is not set # CONFIG_BOOTSPLASH_IMAGE is not set @@ -87,6 +90,7 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -110,81 +114,84 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set # CONFIG_VENDOR_VIA is not set -CONFIG_MAINBOARD_FAMILY="T480S" -CONFIG_MAINBOARD_PART_NUMBER="T480S" +CONFIG_BOARD_SPECIFIC_OPTIONS=y +CONFIG_MAINBOARD_FAMILY="ThinkPad T420" +CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T420" CONFIG_MAINBOARD_VERSION="1.0" -CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad" -CONFIG_VGA_BIOS_ID="8086,0406" -CONFIG_DIMM_MAX=2 -CONFIG_DIMM_SPD_SIZE=512 +CONFIG_MAINBOARD_DIR="lenovo/t420" +CONFIG_VGA_BIOS_ID="8086,0126" +CONFIG_DIMM_MAX=4 +CONFIG_DIMM_SPD_SIZE=256 CONFIG_FMDFILE="" # CONFIG_NO_POST is not set CONFIG_MAINBOARD_VENDOR="LENOVO" -CONFIG_CBFS_SIZE=0xEEC000 -CONFIG_CONSOLE_SERIAL=y -CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y -CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y +CONFIG_CBFS_SIZE=0x7E0000 CONFIG_MAX_CPUS=8 -# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_UART_FOR_CONSOLE=0 -CONFIG_VARIANT_DIR="t480s" -CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y -CONFIG_PCIEXP_L1_SUB_STATE=y -CONFIG_PCIEXP_CLK_PM=y +# CONFIG_PCIEXP_L1_SUB_STATE is not set +# CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" # CONFIG_FATAL_ASSERTS is not set -CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" -# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set +CONFIG_USBDEBUG_HCD_INDEX=2 +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480S" +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T420" # CONFIG_CONSOLE_POST is not set +CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 -CONFIG_USE_PM_ACPI_TIMER=y -CONFIG_DCACHE_RAM_BASE=0xfef00000 -CONFIG_DCACHE_RAM_SIZE=0x40000 +CONFIG_VBOOT_SLOTS_RW_A=y +CONFIG_DCACHE_RAM_BASE=0xfefe0000 +CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 -CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x10000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_USE_LEGACY_8254_TIMER=y CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 -CONFIG_DRIVERS_INTEL_WIFI=y -CONFIG_IFD_BIN_PATH="../../../config/ifd/t480s/ifd_16" -CONFIG_ME_BIN_PATH="../../../vendorfiles/t480s/me.bin" -CONFIG_GBE_BIN_PATH="../../../config/ifd/t480s/gbe" -CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y +CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_DRIVERS_INTEL_WIFI is not set +CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd" +CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin" +CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CARDBUS_PLUGIN_SUPPORT=y -CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set CONFIG_HAVE_IFD_BIN=y +CONFIG_PCIEXP_HOTPLUG_BUSES=8 +CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 +CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set # CONFIG_BOARD_LENOVO_T480 is not set -CONFIG_BOARD_LENOVO_T480S=y +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set # CONFIG_BOARD_LENOVO_R500 is not set # CONFIG_BOARD_LENOVO_W500 is not set # CONFIG_BOARD_LENOVO_T410 is not set -# CONFIG_BOARD_LENOVO_T420 is not set +CONFIG_BOARD_LENOVO_T420=y # CONFIG_BOARD_LENOVO_T420S is not set # CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set # CONFIG_BOARD_LENOVO_T430S is not set @@ -212,24 +219,19 @@ CONFIG_BOARD_LENOVO_T480S=y # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_PS2K_EISAID="PNP0303" -CONFIG_PS2M_EISAID="PNP0F13" -CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" -CONFIG_GFX_GMA_PANEL_1_PORT="eDP" -CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y -CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin" -CONFIG_TTYS0_BAUD=115200 -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set -CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y +CONFIG_PS2M_EISAID="LEN0015" +CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" +CONFIG_GFX_GMA_PANEL_1_PORT="LVDS" CONFIG_D3COLD_SUPPORT=y -CONFIG_GFX_GMA_PANEL_1_ON_EDP=y -CONFIG_DRIVERS_UART_8250IO=y +# CONFIG_DRIVERS_UART_8250IO is not set CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 CONFIG_HEAP_SIZE=0x100000 CONFIG_EC_GPE_SCI=0x50 CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" CONFIG_EC_STARLABS_BATTERY_TYPE="LION" CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" -CONFIG_BOARD_ROMSIZE_KB_16384=y +# CONFIG_TPM_MEASURED_BOOT is not set +CONFIG_BOARD_ROMSIZE_KB_8192=y # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set # CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set @@ -237,21 +239,21 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y # CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set # CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set # CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set -# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set +CONFIG_COREBOOT_ROMSIZE_KB_8192=y # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set # CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set -CONFIG_COREBOOT_ROMSIZE_KB_16384=y +# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set # CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set -CONFIG_COREBOOT_ROMSIZE_KB=16384 -CONFIG_ROM_SIZE=0x01000000 +CONFIG_COREBOOT_ROMSIZE_KB=8192 +CONFIG_ROM_SIZE=0x00800000 CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y -# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set -CONFIG_POWER_STATE_ON_AFTER_FAILURE=y +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set # CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set -CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 +CONFIG_MAINBOARD_POWER_FAILURE_STATE=0 # end of Mainboard CONFIG_SYSTEM_TYPE_LAPTOP=y @@ -263,189 +265,50 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y # # SoC # -CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" -CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" -CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" +CONFIG_CHIPSET_DEVICETREE="northbridge/intel/sandybridge/chipset.cb" CONFIG_CBFS_MCACHE_SIZE=0x4000 CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 -CONFIG_SMM_RESERVED_SIZE=0x200000 -CONFIG_SMM_MODULE_STACK_SIZE=0x800 -CONFIG_ACPI_BERT_SIZE=0x0 -CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 -CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 +CONFIG_SMM_RESERVED_SIZE=0x100000 +CONFIG_SMM_MODULE_STACK_SIZE=0x400 +# CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 +CONFIG_SERIRQ_CONTINUOUS_MODE=y +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 +CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 -CONFIG_IFD_CHIPSET="sklkbl" CONFIG_IED_REGION_SIZE=0x400000 -CONFIG_MAX_ROOT_PORTS=24 -CONFIG_PCR_BASE_ADDRESS=0xfd000000 -CONFIG_CPU_BCLK_MHZ=100 -CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120 -CONFIG_CPU_XTAL_HZ=24000000 -CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2 -CONFIG_SOC_INTEL_I2C_DEV_MAX=6 -# CONFIG_ENABLE_SATA_TEST_MODE is not set -CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 -CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 -CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" -CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" -CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 -CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 +CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254 CONFIG_INTEL_GMA_BCLV_WIDTH=16 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 CONFIG_INTEL_GMA_BCLM_WIDTH=16 -CONFIG_FSP_PUBLISH_MBP_HOB=y -CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 -CONFIG_MAX_HECI_DEVICES=5 CONFIG_BOOTBLOCK_IN_CBFS=y -CONFIG_HAVE_PAM0_REGISTER=y +CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0 +CONFIG_HPET_MIN_TICKS=0x80 +CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000 +CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 +CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y -CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000 -CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10 -CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 -CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 -CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 -CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y -CONFIG_SOC_INTEL_KABYLAKE=y -CONFIG_FSP_T_LOCATION=0xfffe0000 -CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y -CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 -CONFIG_SOC_INTEL_COMMON=y - -# -# Intel SoC Common Code for IP blocks -# -CONFIG_SOC_INTEL_COMMON_BLOCK=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y -CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y -# CONFIG_USE_COREBOOT_MP_INIT is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y -CONFIG_INTEL_CAR_NEM_ENHANCED=y -# CONFIG_USE_INTEL_FSP_MP_INIT is not set -CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y -CONFIG_HAVE_HYPERTHREADING=y -# CONFIG_FSP_HYPERTHREADING is not set -# CONFIG_INTEL_KEYLOCKER is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y -CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y -CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" -CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" -CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" -CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" -CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" -CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" -CONFIG_SOC_INTEL_CSE_RW_FILE="" -CONFIG_SOC_INTEL_CSE_RW_VERSION="" -CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom" -CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE="" -CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy" -CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE="" -CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y -CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y -CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y -CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y -# CONFIG_SOC_INTEL_DISABLE_IGD is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y -CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y -CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y -CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y -CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y -CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y -CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y -CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y -# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 -CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y -CONFIG_SA_ENABLE_DPR=y -CONFIG_HAVE_CAPID_A_REGISTER=y -CONFIG_HAVE_BDSM_BGSM_REGISTER=y -CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y -CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y -CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y -CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y -CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y - -# -# Intel SoC Common PCH Code -# -CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y -CONFIG_SOC_INTEL_COMMON_PCH_BASE=y -CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y -CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y -CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y -CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y - -# -# Intel SoC Common coreboot stages and non-IP blocks -# -CONFIG_SOC_INTEL_COMMON_BASECODE=y -CONFIG_SOC_INTEL_COMMON_RESET=y -CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y -CONFIG_PAVP=y -# CONFIG_MMA is not set -CONFIG_SOC_INTEL_COMMON_NHLT=y -# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set # # CPU # -CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y +CONFIG_CPU_INTEL_MODEL_206AX=y CONFIG_CPU_INTEL_COMMON=y CONFIG_ENABLE_VMX=y CONFIG_SET_IA32_FC_LOCK_BIT=y CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_TIMEBASE=y CONFIG_CPU_INTEL_COMMON_SMM=y +CONFIG_MICROCODE_UPDATE_PRE_RAM=y CONFIG_PARALLEL_MP=y -CONFIG_PARALLEL_MP_AP_WORK=y CONFIG_XAPIC_ONLY=y # CONFIG_X2APIC_ONLY is not set # CONFIG_X2APIC_RUNTIME is not set @@ -454,6 +317,7 @@ CONFIG_UDELAY_TSC=y CONFIG_TSC_MONOTONIC_TIMER=y CONFIG_TSC_SYNC_MFENCE=y CONFIG_HAVE_SMI_HANDLER=y +CONFIG_NEED_SMALL_2MB_PAGE_TABLES=y CONFIG_SMM_TSEG=y CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 CONFIG_AP_STACK_SIZE=0x800 @@ -470,15 +334,48 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y # # Northbridge # +CONFIG_USE_NATIVE_RAMINIT=y +CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y +# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set +# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set +# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set +# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set +CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge # -# CONFIG_PCIEXP_HOTPLUG is not set +CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y +CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y +CONFIG_HIDE_MEI_ON_ERROR=y +CONFIG_PCIEXP_HOTPLUG=y CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y +CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y # CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_TCO_SPACE_NOT_YET_SPLIT=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 CONFIG_RCBA_LENGTH=0x4000 @@ -491,13 +388,12 @@ CONFIG_RCBA_LENGTH=0x4000 # CONFIG_EC_ACPI=y CONFIG_EC_LENOVO_H8=y -CONFIG_H8_BEEP_ON_DEATH=y -CONFIG_H8_FLASH_LEDS_ON_DEATH=y +# CONFIG_H8_BEEP_ON_DEATH is not set +# CONFIG_H8_FLASH_LEDS_ON_DEATH is not set # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y -CONFIG_H8_HAS_PRIMARY_FN_KEYS=y -CONFIG_H8_HAS_LEDLOGO=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -514,15 +410,6 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 -CONFIG_UDK_BASE=y -CONFIG_UDK_2017_BINDING=y -CONFIG_UDK_2013_VERSION=2013 -CONFIG_UDK_2017_VERSION=2017 -CONFIG_UDK_202005_VERSION=202005 -CONFIG_UDK_202111_VERSION=202111 -CONFIG_UDK_202302_VERSION=202302 -CONFIG_UDK_202305_VERSION=202305 -CONFIG_UDK_VERSION=2017 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -530,11 +417,13 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y CONFIG_ARCH_POSTCAR_X86_32=y CONFIG_ARCH_RAMSTAGE_X86_32=y CONFIG_ARCH_ALL_STAGES_X86_32=y +CONFIG_HAVE_X86_64_SUPPORT=y CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y +CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y CONFIG_BOOTBLOCK_SIMPLE=y # CONFIG_BOOTBLOCK_NORMAL is not set @@ -554,11 +443,9 @@ CONFIG_DEFAULT_EBDA_SIZE=0x400 # CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y CONFIG_HAVE_LINEAR_FRAMEBUFFER=y -CONFIG_HAVE_FSP_GOP=y CONFIG_MAINBOARD_HAS_LIBGFXINIT=y CONFIG_MAINBOARD_USE_LIBGFXINIT=y # CONFIG_VGA_ROM_RUN is not set -# CONFIG_RUN_FSP_GOP is not set # CONFIG_NO_GFX_INIT is not set CONFIG_NO_EARLY_GFX_INIT=y @@ -575,12 +462,15 @@ CONFIG_ECAM_MMCONF_SUPPORT=y CONFIG_PCIX_PLUGIN_SUPPORT=y CONFIG_AZALIA_HDA_CODEC_SUPPORT=y CONFIG_PCIEXP_PLUGIN_SUPPORT=y -CONFIG_ECAM_MMCONF_LENGTH=0x10000000 +CONFIG_ECAM_MMCONF_LENGTH=0x04000000 CONFIG_PCI_ALLOW_BUS_MASTER=y CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y # CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set # CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set +CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y +# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set +CONFIG_PCIEXP_HOTPLUG_IO=0x2000 # CONFIG_EARLY_PCI_BRIDGE is not set CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 @@ -588,7 +478,8 @@ CONFIG_INTEL_GMA_HAVE_VBT=y CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 -CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set +CONFIG_USE_DDR3=y # end of Devices # @@ -599,43 +490,37 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y -CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_MRC_SETTINGS_PROTECT is not set # CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set -CONFIG_DRIVERS_UART=y +CONFIG_SPI_FLASH_ADESTO=y +CONFIG_SPI_FLASH_AMIC=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_TPM_INIT_RAMSTAGE=y +# CONFIG_TPM_PPI is not set +CONFIG_NO_UART_ON_SUPERIO=y # CONFIG_DRIVERS_UART_OXPCIE is not set +CONFIG_HAVE_USBDEBUG=y +CONFIG_HAVE_USBDEBUG_OPTIONS=y +# CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set -CONFIG_DRIVERS_I2C_DESIGNWARE=y +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set -CONFIG_FSP_USE_REPO=y -# CONFIG_DISPLAY_HOBS is not set -# CONFIG_DISPLAY_UPD_DATA is not set -# CONFIG_BMP_LOGO is not set -CONFIG_PLATFORM_USES_FSP2_0=y -CONFIG_PLATFORM_USES_FSP2_X86_32=y -CONFIG_HAVE_INTEL_FSP_REPO=y -CONFIG_ADD_FSP_BINARIES=y -CONFIG_FSP_S_CBFS="fsps.bin" -CONFIG_FSP_M_CBFS="fspm.bin" -CONFIG_FSP_FULL_FD=y -CONFIG_FSP_T_RESERVED_SIZE=0x0 -CONFIG_FSP_M_XIP=y -CONFIG_HAVE_FSP_LOGO_SUPPORT=y -CONFIG_SOC_INTEL_COMMON_FSP_RESET=y -CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y -CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y -CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y -# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set -# CONFIG_BUILDING_WITH_DEBUG_FSP is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y CONFIG_VBT_CBFS_COMPRESSION_LZMA=y @@ -643,21 +528,23 @@ CONFIG_VBT_CBFS_COMPRESSION_LZMA=y # CONFIG_VBT_CBFS_COMPRESSION_NONE is not set CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" CONFIG_GFX_GMA=y +CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y CONFIG_GFX_GMA_DYN_CPU=y -CONFIG_GFX_GMA_GENERATION="Skylake" -CONFIG_GFX_GMA_PCH="Sunrise_Point" +CONFIG_GFX_GMA_GENERATION="Ironlake" +CONFIG_GFX_GMA_PCH="Cougar_Point" CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS=y # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set # CONFIG_DRIVERS_PS2_KEYBOARD is not set CONFIG_DRIVERS_MC146818=y -CONFIG_USE_PC_CMOS_ALTCENTURY=y +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 CONFIG_MEMORY_MAPPED_TPM=y CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 CONFIG_VGA=y +CONFIG_DRIVERS_RICOH_RCE822=y # CONFIG_DRIVERS_SIL_3114 is not set -CONFIG_DRIVERS_USB_ACPI=y CONFIG_DRIVERS_WIFI_GENERIC=y CONFIG_DRIVERS_MTK_WIFI=y # end of Generic Drivers @@ -680,10 +567,12 @@ CONFIG_DRIVERS_MTK_WIFI=y # # Trusted Platform Module # -CONFIG_NO_TPM=y -# CONFIG_TPM1 is not set +CONFIG_TPM1=y # CONFIG_TPM2 is not set -CONFIG_MAINBOARD_HAS_TPM2=y +CONFIG_TPM=y +CONFIG_MAINBOARD_HAS_TPM1=y +# CONFIG_TPM_DEACTIVATE is not set +# CONFIG_DEBUG_TPM is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -695,11 +584,11 @@ CONFIG_PCR_RUNTIME_DATA=3 # Memory initialization # CONFIG_PLATFORM_HAS_DRAM_CLEAR=y -# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set +CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y # end of Memory initialization +# CONFIG_INTEL_TXT is not set # CONFIG_STM is not set -# CONFIG_INTEL_CBNT_SUPPORT is not set CONFIG_BOOTMEDIA_LOCK_NONE=y # CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set # CONFIG_BOOTMEDIA_LOCK_CHIP is not set @@ -709,12 +598,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y CONFIG_ACPI_HAVE_PCAT_8259=y CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y CONFIG_ACPI_SOC_NVS=y -CONFIG_ACPI_CUSTOM_MADT=y CONFIG_ACPI_NO_CUSTOM_MADT=y CONFIG_ACPI_COMMON_MADT_LAPIC=y CONFIG_ACPI_COMMON_MADT_IOAPIC=y CONFIG_HAVE_ACPI_TABLES=y -CONFIG_ACPI_LPIT=y CONFIG_BOOT_DEVICE_SPI_FLASH=y CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y @@ -726,39 +613,22 @@ CONFIG_RTC=y CONFIG_BOOTBLOCK_CONSOLE=y CONFIG_POSTCAR_CONSOLE=y CONFIG_SQUELCH_EARLY_SMP=y - -# -# I/O mapped, 8250-compatible -# -CONFIG_TTYS0_BASE=0x3f8 - -# -# Serial port base address = 0x3f8 -# -# CONFIG_CONSOLE_SERIAL_921600 is not set -# CONFIG_CONSOLE_SERIAL_460800 is not set -# CONFIG_CONSOLE_SERIAL_230400 is not set -CONFIG_CONSOLE_SERIAL_115200=y -# CONFIG_CONSOLE_SERIAL_57600 is not set -# CONFIG_CONSOLE_SERIAL_38400 is not set -# CONFIG_CONSOLE_SERIAL_19200 is not set -# CONFIG_CONSOLE_SERIAL_9600 is not set -CONFIG_TTYS0_LCS=3 # CONFIG_SPKMODEM is not set # CONFIG_CONSOLE_NE2K is not set CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set # CONFIG_CONSOLE_SPI_FLASH is not set # CONFIG_CONSOLE_I2C_SMBUS is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set -CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y +# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set -# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set -CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 +CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0=y +CONFIG_DEFAULT_CONSOLE_LOGLEVEL=0 CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y CONFIG_CONSOLE_USE_ANSI_ESCAPES=y # CONFIG_CMOS_POST is not set @@ -766,20 +636,21 @@ CONFIG_POST_DEVICE_NONE=y # CONFIG_POST_DEVICE_LPC is not set # CONFIG_POST_DEVICE_PCI_PCIE is not set CONFIG_POST_IO_PORT=0x80 -CONFIG_HWBASE_DEBUG_CB=y +CONFIG_HWBASE_DEBUG_NULL=y # end of Console -CONFIG_ACPI_S1_NOT_SUPPORTED=y CONFIG_HAVE_ACPI_RESUME=y CONFIG_RESUME_PATH_SAME_AS_BOOT=y CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_HAVE_OPTION_TABLE=y CONFIG_IOAPIC=y -CONFIG_ACPI_NHLT=y +CONFIG_USE_WATCHDOG_ON_BOOT=y # # System tables # CONFIG_GENERATE_SMBIOS_TABLES=y +CONFIG_SMBIOS_PROVIDED_BY_MOBO=y CONFIG_BIOS_VENDOR="coreboot" CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" # end of System tables @@ -806,23 +677,15 @@ CONFIG_PAYLOAD_NONE=y # # BLOB Debug Settings # -# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set -# CONFIG_DISPLAY_FSP_HEADER is not set -# CONFIG_VERIFY_HOBS is not set -# CONFIG_DISPLAY_FSP_VERSION_INFO is not set -CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y -# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set # # General Debug Settings # -# CONFIG_GDB_STUB is not set -CONFIG_HAVE_DEBUG_GPIO=y -# CONFIG_DEBUG_GPIO is not set # CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_RAM_SETUP=y +# CONFIG_DEBUG_RAM_SETUP is not set CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SMBUS is not set -# CONFIG_DEBUG_MALLOC is not set # CONFIG_DEBUG_CONSOLE_INIT is not set # CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_BOOT_STATE is not set @@ -834,15 +697,20 @@ CONFIG_HAVE_EM100_SUPPORT=y CONFIG_RAMSTAGE_ADA=y CONFIG_RAMSTAGE_LIBHWBASE=y -CONFIG_SPD_READ_BY_WORD=y CONFIG_HWBASE_DYNAMIC_MMIO=y -CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 +CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y -CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/t420_8mb/target.cfg b/config/coreboot/t420_8mb/target.cfg index 333030ce..d7510b96 100644 --- a/config/coreboot/t420_8mb/target.cfg +++ b/config/coreboot/t420_8mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb index 21d4a5ff..ba181603 100644 --- a/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t420s_8mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T420s" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T420s" @@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=8 CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T420s" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 @@ -159,12 +170,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T420s" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_T420S=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="LEN0015" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -263,9 +275,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -282,6 +295,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -329,6 +343,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -376,6 +395,7 @@ CONFIG_H8_FLASH_LEDS_ON_DEATH=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -391,6 +411,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -414,6 +435,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -434,6 +458,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -465,9 +490,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -489,11 +517,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -545,7 +575,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -654,7 +683,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -676,6 +704,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode index 6f060940..b3286dfb 100644 --- a/config/coreboot/t420s_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/t420s_8mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T420s" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T420s" @@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=8 CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T420s" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 @@ -157,12 +168,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T420s" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_T420S=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="LEN0015" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -261,9 +273,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -280,6 +293,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -327,6 +341,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -374,6 +393,7 @@ CONFIG_H8_FLASH_LEDS_ON_DEATH=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -389,6 +409,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -412,6 +433,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -430,6 +454,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -461,9 +486,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -485,11 +513,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -542,7 +572,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -651,7 +680,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -673,6 +701,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t420s_8mb/target.cfg b/config/coreboot/t420s_8mb/target.cfg index 333030ce..d7510b96 100644 --- a/config/coreboot/t420s_8mb/target.cfg +++ b/config/coreboot/t420s_8mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb index 62fbf932..18be2432 100644 --- a/config/coreboot/t430_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t430_12mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T430" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T430" @@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=8 CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T430" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -158,12 +169,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T430" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -171,8 +180,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_VBOOT_SLOTS_RW_AB=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="LEN0015" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" @@ -263,9 +275,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -282,6 +295,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -329,6 +343,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -376,6 +395,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -391,6 +412,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -414,6 +436,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -434,6 +459,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -465,9 +491,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -489,11 +518,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -546,7 +577,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -655,7 +685,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -676,6 +705,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t430_12mb/config/libgfxinit_txtmode b/config/coreboot/t430_12mb/config/libgfxinit_txtmode index 5610ea5e..e5753d98 100644 --- a/config/coreboot/t430_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/t430_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T430" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T430" @@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=8 CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T430" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -156,12 +167,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T430" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -169,8 +178,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_THINKPAD_T430=y # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_VBOOT_SLOTS_RW_AB=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="LEN0015" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" @@ -261,9 +273,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -280,6 +293,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -327,6 +341,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -374,6 +393,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -389,6 +410,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -412,6 +434,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -430,6 +455,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -461,9 +487,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -485,11 +514,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -543,7 +574,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -652,7 +682,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -673,6 +702,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t430_12mb/target.cfg b/config/coreboot/t430_12mb/target.cfg index 6cbab731..595ad782 100644 --- a/config/coreboot/t430_12mb/target.cfg +++ b/config/coreboot/t430_12mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb index 19816005..3a34c5a1 100644 --- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -76,15 +79,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -105,7 +112,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_FAMILY="ThinkPad T440p" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T440p" CONFIG_MAINBOARD_VERSION="1.0" @@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=8 CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t440p" CONFIG_OVERRIDE_DEVICETREE="" +CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xff7c0000 CONFIG_DCACHE_RAM_SIZE=0x40000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -160,18 +171,20 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 # CONFIG_ENABLE_DDR_2X_REFRESH is not set CONFIG_PCIEXP_AER=y -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p" CONFIG_HAVE_IFD_BIN=y CONFIG_BOARD_LENOVO_THINKPAD_T440P=y # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -262,9 +275,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xe8000000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -283,6 +297,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_DISABLE_ME_PCI=y CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -386,6 +401,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -408,6 +424,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -428,6 +447,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -456,9 +476,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -481,6 +504,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -536,7 +560,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -646,7 +669,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -668,6 +690,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode index d9627c4e..2ced5df3 100644 --- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -76,15 +79,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -105,7 +112,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_FAMILY="ThinkPad T440p" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T440p" CONFIG_MAINBOARD_VERSION="1.0" @@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=8 CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t440p" CONFIG_OVERRIDE_DEVICETREE="" +CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xff7c0000 CONFIG_DCACHE_RAM_SIZE=0x40000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -158,18 +169,20 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 # CONFIG_ENABLE_DDR_2X_REFRESH is not set CONFIG_PCIEXP_AER=y -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p" CONFIG_HAVE_IFD_BIN=y CONFIG_BOARD_LENOVO_THINKPAD_T440P=y # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -260,9 +273,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xe8000000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -281,6 +295,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_DISABLE_ME_PCI=y CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -384,6 +399,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -406,6 +422,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -424,6 +443,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -452,9 +472,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -477,6 +500,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -533,7 +557,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -643,7 +666,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -665,6 +687,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t440plibremrc_12mb/target.cfg b/config/coreboot/t440plibremrc_12mb/target.cfg index 96fbb9e3..47e228b7 100644 --- a/config/coreboot/t440plibremrc_12mb/target.cfg +++ b/config/coreboot/t440plibremrc_12mb/target.cfg @@ -6,7 +6,7 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="nvme ahci" -grubtree="xhci" +grubtree="xhci_nvme" vcfg="haswell" -build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot" +payload_uboot="amd64" diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t440plibremrc_4mcbfs_12mb/config/libgfxinit_corebootfb index 5191da57..8bfc3f94 100644 --- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t440plibremrc_4mcbfs_12mb/config/libgfxinit_corebootfb @@ -16,7 +16,10 @@ CONFIG_COMPILER_GCC=y # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set -CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_OPTION_BACKEND_NONE is not set +CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set +CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -28,10 +31,11 @@ CONFIG_USE_BLOBS=y # CONFIG_USE_QC_BLOBS is not set # CONFIG_COVERAGE is not set # CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_ROMSTAGE=y CONFIG_HAVE_ASAN_IN_RAMSTAGE=y # CONFIG_ASAN is not set -# CONFIG_NO_STAGE_CACHE is not set -CONFIG_TSEG_STAGE_CACHE=y +CONFIG_NO_STAGE_CACHE=y +# CONFIG_TSEG_STAGE_CACHE is not set # CONFIG_UPDATE_IMAGE is not set # CONFIG_BOOTSPLASH_IMAGE is not set @@ -87,6 +91,7 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -110,75 +115,75 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set # CONFIG_VENDOR_VIA is not set -CONFIG_MAINBOARD_FAMILY="T480" -CONFIG_MAINBOARD_PART_NUMBER="T480" +CONFIG_MAINBOARD_FAMILY="ThinkPad T440p" +CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T440p" CONFIG_MAINBOARD_VERSION="1.0" -CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad" -CONFIG_VGA_BIOS_ID="8086,0406" -CONFIG_DIMM_MAX=2 -CONFIG_DIMM_SPD_SIZE=512 +CONFIG_MAINBOARD_DIR="lenovo/haswell" +CONFIG_VGA_BIOS_ID="8086,0416" +CONFIG_DIMM_MAX=4 +CONFIG_DIMM_SPD_SIZE=256 CONFIG_FMDFILE="" # CONFIG_NO_POST is not set CONFIG_MAINBOARD_VENDOR="LENOVO" -CONFIG_CBFS_SIZE=0xEEC000 -CONFIG_CONSOLE_SERIAL=y +CONFIG_CBFS_SIZE=0x400000 CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600 CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560 -CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y -CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y CONFIG_MAX_CPUS=8 -# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_UART_FOR_CONSOLE=0 -CONFIG_VARIANT_DIR="t480" -CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" -CONFIG_DEVICETREE="devicetree.cb" +CONFIG_VARIANT_DIR="t440p" +CONFIG_OVERRIDE_DEVICETREE="" +CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" # CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" # CONFIG_FATAL_ASSERTS is not set +CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" -# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480" +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p" # CONFIG_CONSOLE_POST is not set +CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 -CONFIG_USE_PM_ACPI_TIMER=y -CONFIG_DCACHE_RAM_BASE=0xfef00000 +CONFIG_DCACHE_RAM_BASE=0xff7c0000 CONFIG_DCACHE_RAM_SIZE=0x40000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 -CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x20000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_USE_LEGACY_8254_TIMER=y CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y +CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVERS_INTEL_WIFI=y -CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16" -CONFIG_ME_BIN_PATH="../../../vendorfiles/t480/me.bin" -CONFIG_GBE_BIN_PATH="../../../config/ifd/t480/gbe" -CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd" +CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin" +CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +# CONFIG_ENABLE_DDR_2X_REFRESH is not set +CONFIG_PCIEXP_AER=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y -CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set CONFIG_HAVE_IFD_BIN=y -# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set +CONFIG_BOARD_LENOVO_THINKPAD_T440P=y # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set -CONFIG_BOARD_LENOVO_T480=y +# CONFIG_BOARD_LENOVO_T480 is not set # CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set @@ -213,25 +218,23 @@ CONFIG_BOARD_LENOVO_T480=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_PS2K_EISAID="PNP0303" -CONFIG_PS2M_EISAID="PNP0F13" -CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" +CONFIG_BOARD_LENOVO_HASWELL_COMMON=y +CONFIG_VBOOT_SLOTS_RW_AB=y +CONFIG_PS2K_EISAID="LEN0071" +CONFIG_PS2M_EISAID="LEN0036" +CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" -CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y -CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin" -CONFIG_TTYS0_BAUD=115200 -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set -CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y CONFIG_GFX_GMA_PANEL_1_ON_EDP=y -CONFIG_DRIVERS_UART_8250IO=y +# CONFIG_DRIVERS_UART_8250IO is not set CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 CONFIG_HEAP_SIZE=0x100000 CONFIG_EC_GPE_SCI=0x50 CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" CONFIG_EC_STARLABS_BATTERY_TYPE="LION" CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" -CONFIG_BOARD_ROMSIZE_KB_16384=y +# CONFIG_TPM_MEASURED_BOOT is not set +CONFIG_BOARD_ROMSIZE_KB_12288=y # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set # CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set @@ -241,19 +244,19 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y # CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set # CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set -# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set -CONFIG_COREBOOT_ROMSIZE_KB_16384=y +CONFIG_COREBOOT_ROMSIZE_KB_12288=y +# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set # CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set -CONFIG_COREBOOT_ROMSIZE_KB=16384 -CONFIG_ROM_SIZE=0x01000000 +CONFIG_COREBOOT_ROMSIZE_KB=12288 +CONFIG_ROM_SIZE=0x00c00000 CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y -# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set -CONFIG_POWER_STATE_ON_AFTER_FAILURE=y +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set # CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set -CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 +CONFIG_MAINBOARD_POWER_FAILURE_STATE=0 # end of Mainboard CONFIG_SYSTEM_TYPE_LAPTOP=y @@ -265,189 +268,52 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y # # SoC # -CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" -CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" -CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" +CONFIG_CHIPSET_DEVICETREE="" CONFIG_CBFS_MCACHE_SIZE=0x4000 CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 -CONFIG_SMM_RESERVED_SIZE=0x200000 -CONFIG_SMM_MODULE_STACK_SIZE=0x800 -CONFIG_ACPI_BERT_SIZE=0x0 -CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_SMM_RESERVED_SIZE=0x100000 +CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=512 +CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 +CONFIG_EHCI_BAR=0xe8000000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 -CONFIG_IFD_CHIPSET="sklkbl" CONFIG_IED_REGION_SIZE=0x400000 -CONFIG_MAX_ROOT_PORTS=24 -CONFIG_PCR_BASE_ADDRESS=0xfd000000 -CONFIG_CPU_BCLK_MHZ=100 -CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120 -CONFIG_CPU_XTAL_HZ=24000000 -CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2 -CONFIG_SOC_INTEL_I2C_DEV_MAX=6 -# CONFIG_ENABLE_SATA_TEST_MODE is not set -CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 -CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 -CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" -CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" -CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 -CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 +CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254 CONFIG_INTEL_GMA_BCLV_WIDTH=16 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 CONFIG_INTEL_GMA_BCLM_WIDTH=16 -CONFIG_FSP_PUBLISH_MBP_HOB=y -CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 -CONFIG_MAX_HECI_DEVICES=5 CONFIG_BOOTBLOCK_IN_CBFS=y -CONFIG_HAVE_PAM0_REGISTER=y +CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0 +CONFIG_HPET_MIN_TICKS=0x80 +CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000 +CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 +CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y -CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000 -CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10 -CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 -CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 -CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 +CONFIG_DISABLE_ME_PCI=y +CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 -CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y -CONFIG_SOC_INTEL_KABYLAKE=y -CONFIG_FSP_T_LOCATION=0xfffe0000 -CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y -CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 -CONFIG_SOC_INTEL_COMMON=y - -# -# Intel SoC Common Code for IP blocks -# -CONFIG_SOC_INTEL_COMMON_BLOCK=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y -CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y -# CONFIG_USE_COREBOOT_MP_INIT is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y -CONFIG_INTEL_CAR_NEM_ENHANCED=y -# CONFIG_USE_INTEL_FSP_MP_INIT is not set -CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y -CONFIG_HAVE_HYPERTHREADING=y -# CONFIG_FSP_HYPERTHREADING is not set -# CONFIG_INTEL_KEYLOCKER is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y -CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y -CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" -CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" -CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" -CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" -CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" -CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" -CONFIG_SOC_INTEL_CSE_RW_FILE="" -CONFIG_SOC_INTEL_CSE_RW_VERSION="" -CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom" -CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE="" -CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy" -CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE="" -CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y -CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y -CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y -CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y -# CONFIG_SOC_INTEL_DISABLE_IGD is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y -CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y -CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y -CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y -CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y -CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y -CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y -CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y -# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 -CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y -CONFIG_SA_ENABLE_DPR=y -CONFIG_HAVE_CAPID_A_REGISTER=y -CONFIG_HAVE_BDSM_BGSM_REGISTER=y -CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y -CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y -CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y -CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y -CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y - -# -# Intel SoC Common PCH Code -# -CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y -CONFIG_SOC_INTEL_COMMON_PCH_BASE=y -CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y -CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y -CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y -CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y - -# -# Intel SoC Common coreboot stages and non-IP blocks -# -CONFIG_SOC_INTEL_COMMON_BASECODE=y -CONFIG_SOC_INTEL_COMMON_RESET=y -CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y -CONFIG_PAVP=y -# CONFIG_MMA is not set -CONFIG_SOC_INTEL_COMMON_NHLT=y -# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set # # CPU # +CONFIG_CPU_INTEL_HASWELL=y CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y CONFIG_CPU_INTEL_COMMON=y CONFIG_ENABLE_VMX=y CONFIG_SET_IA32_FC_LOCK_BIT=y CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_TIMEBASE=y +CONFIG_CPU_INTEL_COMMON_VOLTAGE=y CONFIG_CPU_INTEL_COMMON_SMM=y CONFIG_PARALLEL_MP=y -CONFIG_PARALLEL_MP_AP_WORK=y CONFIG_XAPIC_ONLY=y # CONFIG_X2APIC_ONLY is not set # CONFIG_X2APIC_RUNTIME is not set @@ -472,15 +338,35 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y # # Northbridge # +CONFIG_NORTHBRIDGE_INTEL_HASWELL=y +CONFIG_USE_NATIVE_RAMINIT=y # # Southbridge # # CONFIG_PCIEXP_HOTPLUG is not set CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y +CONFIG_FINALIZE_USB_ROUTE_XHCI=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y +CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y # CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_TCO_SPACE_NOT_YET_SPLIT=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 CONFIG_RCBA_LENGTH=0x4000 @@ -516,15 +402,6 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 -CONFIG_UDK_BASE=y -CONFIG_UDK_2017_BINDING=y -CONFIG_UDK_2013_VERSION=2013 -CONFIG_UDK_2017_VERSION=2017 -CONFIG_UDK_202005_VERSION=202005 -CONFIG_UDK_202111_VERSION=202111 -CONFIG_UDK_202302_VERSION=202302 -CONFIG_UDK_202305_VERSION=202305 -CONFIG_UDK_VERSION=2017 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -537,6 +414,7 @@ CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y +CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y CONFIG_BOOTBLOCK_SIMPLE=y # CONFIG_BOOTBLOCK_NORMAL is not set @@ -556,11 +434,9 @@ CONFIG_DEFAULT_EBDA_SIZE=0x400 # CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y CONFIG_HAVE_LINEAR_FRAMEBUFFER=y -CONFIG_HAVE_FSP_GOP=y CONFIG_MAINBOARD_HAS_LIBGFXINIT=y CONFIG_MAINBOARD_USE_LIBGFXINIT=y # CONFIG_VGA_ROM_RUN is not set -# CONFIG_RUN_FSP_GOP is not set # CONFIG_NO_GFX_INIT is not set CONFIG_NO_EARLY_GFX_INIT=y @@ -571,10 +447,6 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set -CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y -# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set -# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set -# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display @@ -583,7 +455,7 @@ CONFIG_ECAM_MMCONF_SUPPORT=y CONFIG_PCIX_PLUGIN_SUPPORT=y CONFIG_AZALIA_HDA_CODEC_SUPPORT=y CONFIG_PCIEXP_PLUGIN_SUPPORT=y -CONFIG_ECAM_MMCONF_LENGTH=0x10000000 +CONFIG_ECAM_MMCONF_LENGTH=0x04000000 CONFIG_PCI_ALLOW_BUS_MASTER=y CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y @@ -597,6 +469,7 @@ CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +CONFIG_USE_DDR3=y # end of Devices # @@ -607,43 +480,38 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y -CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_MRC_SETTINGS_PROTECT is not set # CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set -CONFIG_DRIVERS_UART=y +CONFIG_SPI_FLASH_ADESTO=y +CONFIG_SPI_FLASH_AMIC=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y +CONFIG_TPM_INIT_RAMSTAGE=y +# CONFIG_TPM_PPI is not set +CONFIG_NO_UART_ON_SUPERIO=y # CONFIG_DRIVERS_UART_OXPCIE is not set +CONFIG_HAVE_USBDEBUG=y +CONFIG_HAVE_USBDEBUG_OPTIONS=y +# CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set -CONFIG_DRIVERS_I2C_DESIGNWARE=y # CONFIG_DRIVERS_I2C_MAX98396 is not set -CONFIG_FSP_USE_REPO=y -# CONFIG_DISPLAY_HOBS is not set -# CONFIG_DISPLAY_UPD_DATA is not set -# CONFIG_BMP_LOGO is not set -CONFIG_PLATFORM_USES_FSP2_0=y -CONFIG_PLATFORM_USES_FSP2_X86_32=y -CONFIG_HAVE_INTEL_FSP_REPO=y -CONFIG_ADD_FSP_BINARIES=y -CONFIG_FSP_S_CBFS="fsps.bin" -CONFIG_FSP_M_CBFS="fspm.bin" -CONFIG_FSP_FULL_FD=y -CONFIG_FSP_T_RESERVED_SIZE=0x0 -CONFIG_FSP_M_XIP=y -CONFIG_HAVE_FSP_LOGO_SUPPORT=y -CONFIG_SOC_INTEL_COMMON_FSP_RESET=y -CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y -CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y -CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y -# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set -# CONFIG_BUILDING_WITH_DEBUG_FSP is not set +CONFIG_INTEL_DDI=y CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y CONFIG_VBT_CBFS_COMPRESSION_LZMA=y @@ -652,19 +520,18 @@ CONFIG_VBT_CBFS_COMPRESSION_LZMA=y CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" CONFIG_GFX_GMA=y CONFIG_GFX_GMA_DYN_CPU=y -CONFIG_GFX_GMA_GENERATION="Skylake" -CONFIG_GFX_GMA_PCH="Sunrise_Point" +CONFIG_GFX_GMA_GENERATION="Haswell" +CONFIG_GFX_GMA_PCH="Lynx_Point" CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set # CONFIG_DRIVERS_PS2_KEYBOARD is not set CONFIG_DRIVERS_MC146818=y -CONFIG_USE_PC_CMOS_ALTCENTURY=y +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 CONFIG_MEMORY_MAPPED_TPM=y CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 # CONFIG_DRIVERS_SIL_3114 is not set -CONFIG_DRIVERS_USB_ACPI=y CONFIG_DRIVERS_WIFI_GENERIC=y CONFIG_DRIVERS_MTK_WIFI=y # end of Generic Drivers @@ -687,10 +554,12 @@ CONFIG_DRIVERS_MTK_WIFI=y # # Trusted Platform Module # -CONFIG_NO_TPM=y -# CONFIG_TPM1 is not set +CONFIG_TPM1=y # CONFIG_TPM2 is not set -CONFIG_MAINBOARD_HAS_TPM2=y +CONFIG_TPM=y +CONFIG_MAINBOARD_HAS_TPM1=y +# CONFIG_TPM_DEACTIVATE is not set +# CONFIG_DEBUG_TPM is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -702,9 +571,10 @@ CONFIG_PCR_RUNTIME_DATA=3 # Memory initialization # CONFIG_PLATFORM_HAS_DRAM_CLEAR=y -# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set +CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y # end of Memory initialization +# CONFIG_INTEL_TXT is not set # CONFIG_STM is not set # CONFIG_INTEL_CBNT_SUPPORT is not set CONFIG_BOOTMEDIA_LOCK_NONE=y @@ -716,12 +586,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y CONFIG_ACPI_HAVE_PCAT_8259=y CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y CONFIG_ACPI_SOC_NVS=y -CONFIG_ACPI_CUSTOM_MADT=y CONFIG_ACPI_NO_CUSTOM_MADT=y CONFIG_ACPI_COMMON_MADT_LAPIC=y CONFIG_ACPI_COMMON_MADT_IOAPIC=y CONFIG_HAVE_ACPI_TABLES=y -CONFIG_ACPI_LPIT=y CONFIG_BOOT_DEVICE_SPI_FLASH=y CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y @@ -733,29 +601,13 @@ CONFIG_RTC=y CONFIG_BOOTBLOCK_CONSOLE=y CONFIG_POSTCAR_CONSOLE=y CONFIG_SQUELCH_EARLY_SMP=y - -# -# I/O mapped, 8250-compatible -# -CONFIG_TTYS0_BASE=0x3f8 - -# -# Serial port base address = 0x3f8 -# -# CONFIG_CONSOLE_SERIAL_921600 is not set -# CONFIG_CONSOLE_SERIAL_460800 is not set -# CONFIG_CONSOLE_SERIAL_230400 is not set -CONFIG_CONSOLE_SERIAL_115200=y -# CONFIG_CONSOLE_SERIAL_57600 is not set -# CONFIG_CONSOLE_SERIAL_38400 is not set -# CONFIG_CONSOLE_SERIAL_19200 is not set -# CONFIG_CONSOLE_SERIAL_9600 is not set -CONFIG_TTYS0_LCS=3 # CONFIG_SPKMODEM is not set # CONFIG_CONSOLE_NE2K is not set CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set # CONFIG_CONSOLE_SPI_FLASH is not set # CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_EM100PRO_SPI_CONSOLE is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set @@ -776,12 +628,12 @@ CONFIG_POST_IO_PORT=0x80 CONFIG_HWBASE_DEBUG_CB=y # end of Console -CONFIG_ACPI_S1_NOT_SUPPORTED=y CONFIG_HAVE_ACPI_RESUME=y CONFIG_RESUME_PATH_SAME_AS_BOOT=y CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_HAVE_OPTION_TABLE=y CONFIG_IOAPIC=y -CONFIG_ACPI_NHLT=y +CONFIG_USE_WATCHDOG_ON_BOOT=y # # System tables @@ -813,20 +665,13 @@ CONFIG_PAYLOAD_NONE=y # # BLOB Debug Settings # -# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set -# CONFIG_DISPLAY_FSP_HEADER is not set -# CONFIG_VERIFY_HOBS is not set -# CONFIG_DISPLAY_FSP_VERSION_INFO is not set -CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y -# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set # # General Debug Settings # -# CONFIG_GDB_STUB is not set -CONFIG_HAVE_DEBUG_GPIO=y -# CONFIG_DEBUG_GPIO is not set # CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_RAM_SETUP=y +# CONFIG_DEBUG_RAM_SETUP is not set CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SMBUS is not set # CONFIG_DEBUG_MALLOC is not set @@ -841,15 +686,20 @@ CONFIG_HAVE_EM100_SUPPORT=y CONFIG_RAMSTAGE_ADA=y CONFIG_RAMSTAGE_LIBHWBASE=y -CONFIG_SPD_READ_BY_WORD=y CONFIG_HWBASE_DYNAMIC_MMIO=y -CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 +CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y -CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t440plibremrc_4mcbfs_12mb/config/libgfxinit_txtmode index 7596816a..6bb14dc2 100644 --- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/t440plibremrc_4mcbfs_12mb/config/libgfxinit_txtmode @@ -16,7 +16,10 @@ CONFIG_COMPILER_GCC=y # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set -CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_OPTION_BACKEND_NONE is not set +CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set +CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -28,10 +31,11 @@ CONFIG_USE_BLOBS=y # CONFIG_USE_QC_BLOBS is not set # CONFIG_COVERAGE is not set # CONFIG_UBSAN is not set +CONFIG_HAVE_ASAN_IN_ROMSTAGE=y CONFIG_HAVE_ASAN_IN_RAMSTAGE=y # CONFIG_ASAN is not set -# CONFIG_NO_STAGE_CACHE is not set -CONFIG_TSEG_STAGE_CACHE=y +CONFIG_NO_STAGE_CACHE=y +# CONFIG_TSEG_STAGE_CACHE is not set # CONFIG_UPDATE_IMAGE is not set # CONFIG_BOOTSPLASH_IMAGE is not set @@ -87,6 +91,7 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -110,73 +115,73 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set # CONFIG_VENDOR_VIA is not set -CONFIG_MAINBOARD_FAMILY="T480" -CONFIG_MAINBOARD_PART_NUMBER="T480" +CONFIG_MAINBOARD_FAMILY="ThinkPad T440p" +CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T440p" CONFIG_MAINBOARD_VERSION="1.0" -CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad" -CONFIG_VGA_BIOS_ID="8086,0406" -CONFIG_DIMM_MAX=2 -CONFIG_DIMM_SPD_SIZE=512 +CONFIG_MAINBOARD_DIR="lenovo/haswell" +CONFIG_VGA_BIOS_ID="8086,0416" +CONFIG_DIMM_MAX=4 +CONFIG_DIMM_SPD_SIZE=256 CONFIG_FMDFILE="" # CONFIG_NO_POST is not set CONFIG_MAINBOARD_VENDOR="LENOVO" -CONFIG_CBFS_SIZE=0xEEC000 -CONFIG_CONSOLE_SERIAL=y -CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y -CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y +CONFIG_CBFS_SIZE=0x400000 CONFIG_MAX_CPUS=8 -# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set +CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_UART_FOR_CONSOLE=0 -CONFIG_VARIANT_DIR="t480" -CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" -CONFIG_DEVICETREE="devicetree.cb" +CONFIG_VARIANT_DIR="t440p" +CONFIG_OVERRIDE_DEVICETREE="" +CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" # CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=256 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" # CONFIG_FATAL_ASSERTS is not set +CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" -# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480" +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T440p" # CONFIG_CONSOLE_POST is not set +CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 -CONFIG_USE_PM_ACPI_TIMER=y -CONFIG_DCACHE_RAM_BASE=0xfef00000 +CONFIG_DCACHE_RAM_BASE=0xff7c0000 CONFIG_DCACHE_RAM_SIZE=0x40000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 -CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x20000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_USE_LEGACY_8254_TIMER=y CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 +CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y +CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVERS_INTEL_WIFI=y -CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16" -CONFIG_ME_BIN_PATH="../../../vendorfiles/t480/me.bin" -CONFIG_GBE_BIN_PATH="../../../config/ifd/t480/gbe" -CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y +CONFIG_IFD_BIN_PATH="../../../config/ifd/t440p/ifd" +CONFIG_ME_BIN_PATH="../../../vendorfiles/t440p/me.bin" +CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +# CONFIG_ENABLE_DDR_2X_REFRESH is not set +CONFIG_PCIEXP_AER=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y -CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set CONFIG_HAVE_IFD_BIN=y -# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set +CONFIG_BOARD_LENOVO_THINKPAD_T440P=y # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set -CONFIG_BOARD_LENOVO_T480=y +# CONFIG_BOARD_LENOVO_T480 is not set # CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set @@ -211,25 +216,23 @@ CONFIG_BOARD_LENOVO_T480=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_PS2K_EISAID="PNP0303" -CONFIG_PS2M_EISAID="PNP0F13" -CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" +CONFIG_BOARD_LENOVO_HASWELL_COMMON=y +CONFIG_VBOOT_SLOTS_RW_AB=y +CONFIG_PS2K_EISAID="LEN0071" +CONFIG_PS2M_EISAID="LEN0036" +CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" -CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y -CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin" -CONFIG_TTYS0_BAUD=115200 -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set -CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y CONFIG_GFX_GMA_PANEL_1_ON_EDP=y -CONFIG_DRIVERS_UART_8250IO=y +# CONFIG_DRIVERS_UART_8250IO is not set CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 CONFIG_HEAP_SIZE=0x100000 CONFIG_EC_GPE_SCI=0x50 CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" CONFIG_EC_STARLABS_BATTERY_TYPE="LION" CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" -CONFIG_BOARD_ROMSIZE_KB_16384=y +# CONFIG_TPM_MEASURED_BOOT is not set +CONFIG_BOARD_ROMSIZE_KB_12288=y # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set # CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set @@ -239,19 +242,19 @@ CONFIG_BOARD_ROMSIZE_KB_16384=y # CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set # CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set -# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set -CONFIG_COREBOOT_ROMSIZE_KB_16384=y +CONFIG_COREBOOT_ROMSIZE_KB_12288=y +# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set # CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set -CONFIG_COREBOOT_ROMSIZE_KB=16384 -CONFIG_ROM_SIZE=0x01000000 +CONFIG_COREBOOT_ROMSIZE_KB=12288 +CONFIG_ROM_SIZE=0x00c00000 CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y -# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set -CONFIG_POWER_STATE_ON_AFTER_FAILURE=y +CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y +# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set # CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set -CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 +CONFIG_MAINBOARD_POWER_FAILURE_STATE=0 # end of Mainboard CONFIG_SYSTEM_TYPE_LAPTOP=y @@ -263,189 +266,52 @@ CONFIG_SYSTEM_TYPE_LAPTOP=y # # SoC # -CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" -CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" -CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" +CONFIG_CHIPSET_DEVICETREE="" CONFIG_CBFS_MCACHE_SIZE=0x4000 CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 -CONFIG_SMM_RESERVED_SIZE=0x200000 -CONFIG_SMM_MODULE_STACK_SIZE=0x800 -CONFIG_ACPI_BERT_SIZE=0x0 -CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_SMM_RESERVED_SIZE=0x100000 +CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=512 +CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 +CONFIG_EHCI_BAR=0xe8000000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 -CONFIG_IFD_CHIPSET="sklkbl" CONFIG_IED_REGION_SIZE=0x400000 -CONFIG_MAX_ROOT_PORTS=24 -CONFIG_PCR_BASE_ADDRESS=0xfd000000 -CONFIG_CPU_BCLK_MHZ=100 -CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120 -CONFIG_CPU_XTAL_HZ=24000000 -CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2 -CONFIG_SOC_INTEL_I2C_DEV_MAX=6 -# CONFIG_ENABLE_SATA_TEST_MODE is not set -CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 -CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 -CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" -CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" -CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 -CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 +CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254 CONFIG_INTEL_GMA_BCLV_WIDTH=16 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 CONFIG_INTEL_GMA_BCLM_WIDTH=16 -CONFIG_FSP_PUBLISH_MBP_HOB=y -CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 -CONFIG_MAX_HECI_DEVICES=5 CONFIG_BOOTBLOCK_IN_CBFS=y -CONFIG_HAVE_PAM0_REGISTER=y +CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0 +CONFIG_HPET_MIN_TICKS=0x80 +CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000 +CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 +CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y -CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000 -CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10 -CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 -CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 -CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 +CONFIG_DISABLE_ME_PCI=y +CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 -CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y -CONFIG_SOC_INTEL_KABYLAKE=y -CONFIG_FSP_T_LOCATION=0xfffe0000 -CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y -CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set +CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 -CONFIG_SOC_INTEL_COMMON=y - -# -# Intel SoC Common Code for IP blocks -# -CONFIG_SOC_INTEL_COMMON_BLOCK=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y -CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y -# CONFIG_USE_COREBOOT_MP_INIT is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y -CONFIG_INTEL_CAR_NEM_ENHANCED=y -# CONFIG_USE_INTEL_FSP_MP_INIT is not set -CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y -CONFIG_HAVE_HYPERTHREADING=y -# CONFIG_FSP_HYPERTHREADING is not set -# CONFIG_INTEL_KEYLOCKER is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y -CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y -CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" -CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" -CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" -CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" -CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" -CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" -CONFIG_SOC_INTEL_CSE_RW_FILE="" -CONFIG_SOC_INTEL_CSE_RW_VERSION="" -CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom" -CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE="" -CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy" -CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE="" -CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y -CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y -CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y -CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y -# CONFIG_SOC_INTEL_DISABLE_IGD is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y -CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y -CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y -CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y -CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y -CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y -CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y -CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y -# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 -CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y -CONFIG_SA_ENABLE_DPR=y -CONFIG_HAVE_CAPID_A_REGISTER=y -CONFIG_HAVE_BDSM_BGSM_REGISTER=y -CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y -CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y -CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y -CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y -CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y - -# -# Intel SoC Common PCH Code -# -CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y -CONFIG_SOC_INTEL_COMMON_PCH_BASE=y -CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y -CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y -CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y -CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y - -# -# Intel SoC Common coreboot stages and non-IP blocks -# -CONFIG_SOC_INTEL_COMMON_BASECODE=y -CONFIG_SOC_INTEL_COMMON_RESET=y -CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y -CONFIG_PAVP=y -# CONFIG_MMA is not set -CONFIG_SOC_INTEL_COMMON_NHLT=y -# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set # # CPU # +CONFIG_CPU_INTEL_HASWELL=y CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y CONFIG_CPU_INTEL_COMMON=y CONFIG_ENABLE_VMX=y CONFIG_SET_IA32_FC_LOCK_BIT=y CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_TIMEBASE=y +CONFIG_CPU_INTEL_COMMON_VOLTAGE=y CONFIG_CPU_INTEL_COMMON_SMM=y CONFIG_PARALLEL_MP=y -CONFIG_PARALLEL_MP_AP_WORK=y CONFIG_XAPIC_ONLY=y # CONFIG_X2APIC_ONLY is not set # CONFIG_X2APIC_RUNTIME is not set @@ -470,15 +336,35 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y # # Northbridge # +CONFIG_NORTHBRIDGE_INTEL_HASWELL=y +CONFIG_USE_NATIVE_RAMINIT=y # # Southbridge # # CONFIG_PCIEXP_HOTPLUG is not set CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y +CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y +CONFIG_FINALIZE_USB_ROUTE_XHCI=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y +CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y # CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set +CONFIG_INTEL_CHIPSET_LOCKDOWN=y +CONFIG_TCO_SPACE_NOT_YET_SPLIT=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 CONFIG_RCBA_LENGTH=0x4000 @@ -514,15 +400,6 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 -CONFIG_UDK_BASE=y -CONFIG_UDK_2017_BINDING=y -CONFIG_UDK_2013_VERSION=2013 -CONFIG_UDK_2017_VERSION=2017 -CONFIG_UDK_202005_VERSION=202005 -CONFIG_UDK_202111_VERSION=202111 -CONFIG_UDK_202302_VERSION=202302 -CONFIG_UDK_202305_VERSION=202305 -CONFIG_UDK_VERSION=2017 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -535,6 +412,7 @@ CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y +CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y CONFIG_BOOTBLOCK_SIMPLE=y # CONFIG_BOOTBLOCK_NORMAL is not set @@ -554,11 +432,9 @@ CONFIG_DEFAULT_EBDA_SIZE=0x400 # CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y CONFIG_HAVE_LINEAR_FRAMEBUFFER=y -CONFIG_HAVE_FSP_GOP=y CONFIG_MAINBOARD_HAS_LIBGFXINIT=y CONFIG_MAINBOARD_USE_LIBGFXINIT=y # CONFIG_VGA_ROM_RUN is not set -# CONFIG_RUN_FSP_GOP is not set # CONFIG_NO_GFX_INIT is not set CONFIG_NO_EARLY_GFX_INIT=y @@ -575,7 +451,7 @@ CONFIG_ECAM_MMCONF_SUPPORT=y CONFIG_PCIX_PLUGIN_SUPPORT=y CONFIG_AZALIA_HDA_CODEC_SUPPORT=y CONFIG_PCIEXP_PLUGIN_SUPPORT=y -CONFIG_ECAM_MMCONF_LENGTH=0x10000000 +CONFIG_ECAM_MMCONF_LENGTH=0x04000000 CONFIG_PCI_ALLOW_BUS_MASTER=y CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y @@ -589,6 +465,7 @@ CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y +CONFIG_USE_DDR3=y # end of Devices # @@ -599,43 +476,38 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y -CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_MRC_SETTINGS_PROTECT is not set # CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y # CONFIG_SPI_FLASH_NO_FAST_READ is not set -CONFIG_DRIVERS_UART=y +CONFIG_SPI_FLASH_ADESTO=y +CONFIG_SPI_FLASH_AMIC=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y +CONFIG_TPM_INIT_RAMSTAGE=y +# CONFIG_TPM_PPI is not set +CONFIG_NO_UART_ON_SUPERIO=y # CONFIG_DRIVERS_UART_OXPCIE is not set +CONFIG_HAVE_USBDEBUG=y +CONFIG_HAVE_USBDEBUG_OPTIONS=y +# CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set -CONFIG_DRIVERS_I2C_DESIGNWARE=y # CONFIG_DRIVERS_I2C_MAX98396 is not set -CONFIG_FSP_USE_REPO=y -# CONFIG_DISPLAY_HOBS is not set -# CONFIG_DISPLAY_UPD_DATA is not set -# CONFIG_BMP_LOGO is not set -CONFIG_PLATFORM_USES_FSP2_0=y -CONFIG_PLATFORM_USES_FSP2_X86_32=y -CONFIG_HAVE_INTEL_FSP_REPO=y -CONFIG_ADD_FSP_BINARIES=y -CONFIG_FSP_S_CBFS="fsps.bin" -CONFIG_FSP_M_CBFS="fspm.bin" -CONFIG_FSP_FULL_FD=y -CONFIG_FSP_T_RESERVED_SIZE=0x0 -CONFIG_FSP_M_XIP=y -CONFIG_HAVE_FSP_LOGO_SUPPORT=y -CONFIG_SOC_INTEL_COMMON_FSP_RESET=y -CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y -CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y -CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y -# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set -# CONFIG_BUILDING_WITH_DEBUG_FSP is not set +CONFIG_INTEL_DDI=y CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y CONFIG_VBT_CBFS_COMPRESSION_LZMA=y @@ -644,20 +516,19 @@ CONFIG_VBT_CBFS_COMPRESSION_LZMA=y CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" CONFIG_GFX_GMA=y CONFIG_GFX_GMA_DYN_CPU=y -CONFIG_GFX_GMA_GENERATION="Skylake" -CONFIG_GFX_GMA_PCH="Sunrise_Point" +CONFIG_GFX_GMA_GENERATION="Haswell" +CONFIG_GFX_GMA_PCH="Lynx_Point" CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set # CONFIG_DRIVERS_PS2_KEYBOARD is not set CONFIG_DRIVERS_MC146818=y -CONFIG_USE_PC_CMOS_ALTCENTURY=y +# CONFIG_USE_PC_CMOS_ALTCENTURY is not set CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 CONFIG_MEMORY_MAPPED_TPM=y CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 CONFIG_VGA=y # CONFIG_DRIVERS_SIL_3114 is not set -CONFIG_DRIVERS_USB_ACPI=y CONFIG_DRIVERS_WIFI_GENERIC=y CONFIG_DRIVERS_MTK_WIFI=y # end of Generic Drivers @@ -680,10 +551,12 @@ CONFIG_DRIVERS_MTK_WIFI=y # # Trusted Platform Module # -CONFIG_NO_TPM=y -# CONFIG_TPM1 is not set +CONFIG_TPM1=y # CONFIG_TPM2 is not set -CONFIG_MAINBOARD_HAS_TPM2=y +CONFIG_TPM=y +CONFIG_MAINBOARD_HAS_TPM1=y +# CONFIG_TPM_DEACTIVATE is not set +# CONFIG_DEBUG_TPM is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -695,9 +568,10 @@ CONFIG_PCR_RUNTIME_DATA=3 # Memory initialization # CONFIG_PLATFORM_HAS_DRAM_CLEAR=y -# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set +CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y # end of Memory initialization +# CONFIG_INTEL_TXT is not set # CONFIG_STM is not set # CONFIG_INTEL_CBNT_SUPPORT is not set CONFIG_BOOTMEDIA_LOCK_NONE=y @@ -709,12 +583,10 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y CONFIG_ACPI_HAVE_PCAT_8259=y CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y CONFIG_ACPI_SOC_NVS=y -CONFIG_ACPI_CUSTOM_MADT=y CONFIG_ACPI_NO_CUSTOM_MADT=y CONFIG_ACPI_COMMON_MADT_LAPIC=y CONFIG_ACPI_COMMON_MADT_IOAPIC=y CONFIG_HAVE_ACPI_TABLES=y -CONFIG_ACPI_LPIT=y CONFIG_BOOT_DEVICE_SPI_FLASH=y CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y @@ -726,29 +598,13 @@ CONFIG_RTC=y CONFIG_BOOTBLOCK_CONSOLE=y CONFIG_POSTCAR_CONSOLE=y CONFIG_SQUELCH_EARLY_SMP=y - -# -# I/O mapped, 8250-compatible -# -CONFIG_TTYS0_BASE=0x3f8 - -# -# Serial port base address = 0x3f8 -# -# CONFIG_CONSOLE_SERIAL_921600 is not set -# CONFIG_CONSOLE_SERIAL_460800 is not set -# CONFIG_CONSOLE_SERIAL_230400 is not set -CONFIG_CONSOLE_SERIAL_115200=y -# CONFIG_CONSOLE_SERIAL_57600 is not set -# CONFIG_CONSOLE_SERIAL_38400 is not set -# CONFIG_CONSOLE_SERIAL_19200 is not set -# CONFIG_CONSOLE_SERIAL_9600 is not set -CONFIG_TTYS0_LCS=3 # CONFIG_SPKMODEM is not set # CONFIG_CONSOLE_NE2K is not set CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set # CONFIG_CONSOLE_SPI_FLASH is not set # CONFIG_CONSOLE_I2C_SMBUS is not set +# CONFIG_EM100PRO_SPI_CONSOLE is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set @@ -769,12 +625,12 @@ CONFIG_POST_IO_PORT=0x80 CONFIG_HWBASE_DEBUG_CB=y # end of Console -CONFIG_ACPI_S1_NOT_SUPPORTED=y CONFIG_HAVE_ACPI_RESUME=y CONFIG_RESUME_PATH_SAME_AS_BOOT=y CONFIG_HAVE_MONOTONIC_TIMER=y +CONFIG_HAVE_OPTION_TABLE=y CONFIG_IOAPIC=y -CONFIG_ACPI_NHLT=y +CONFIG_USE_WATCHDOG_ON_BOOT=y # # System tables @@ -806,20 +662,13 @@ CONFIG_PAYLOAD_NONE=y # # BLOB Debug Settings # -# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set -# CONFIG_DISPLAY_FSP_HEADER is not set -# CONFIG_VERIFY_HOBS is not set -# CONFIG_DISPLAY_FSP_VERSION_INFO is not set -CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y -# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set # # General Debug Settings # -# CONFIG_GDB_STUB is not set -CONFIG_HAVE_DEBUG_GPIO=y -# CONFIG_DEBUG_GPIO is not set # CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_RAM_SETUP=y +# CONFIG_DEBUG_RAM_SETUP is not set CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SMBUS is not set # CONFIG_DEBUG_MALLOC is not set @@ -834,15 +683,20 @@ CONFIG_HAVE_EM100_SUPPORT=y CONFIG_RAMSTAGE_ADA=y CONFIG_RAMSTAGE_LIBHWBASE=y -CONFIG_SPD_READ_BY_WORD=y CONFIG_HWBASE_DYNAMIC_MMIO=y -CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 +CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y -CONFIG_GENERIC_GPIO_LIB=y CONFIG_HAVE_BOOTBLOCK=y CONFIG_HAVE_ROMSTAGE=y CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/t440plibremrc_4mcbfs_12mb/target.cfg b/config/coreboot/t440plibremrc_4mcbfs_12mb/target.cfg new file mode 100644 index 00000000..47e228b7 --- /dev/null +++ b/config/coreboot/t440plibremrc_4mcbfs_12mb/target.cfg @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +tree="default" +xarch="i386-elf" +payload_seabios="y" +payload_grub="y" +payload_memtest="y" +grub_scan_disk="nvme ahci" +grubtree="xhci_nvme" +vcfg="haswell" +build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot" +payload_uboot="amd64" diff --git a/config/coreboot/t480_fsp_16mb/target.cfg b/config/coreboot/t480_fsp_16mb/target.cfg deleted file mode 100644 index d0ddd743..00000000 --- a/config/coreboot/t480_fsp_16mb/target.cfg +++ /dev/null @@ -1,13 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -tree="next" -xarch="i386-elf" -payload_seabios="y" -payload_grub="y" -payload_memtest="y" -grub_scan_disk="nvme ahci" -grubtree="xhci" -vcfg="t480" -build_depend="seabios/default grub/xhci memtest86plus" -IFD_platform="sklkbl" -release="n" # t480_vfsp_16mb is released instead diff --git a/config/coreboot/t480_vfsp_16mb/cbfs.cfg b/config/coreboot/t480_vfsp_16mb/cbfs.cfg new file mode 100644 index 00000000..022783ff --- /dev/null +++ b/config/coreboot/t480_vfsp_16mb/cbfs.cfg @@ -0,0 +1 @@ +power_on_after_fail 0 diff --git a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb index 5dea5962..2b4d9b0c 100644 --- a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb @@ -16,7 +16,8 @@ CONFIG_COMPILER_GCC=y # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set -CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_OPTION_BACKEND_NONE is not set +CONFIG_USE_CBFS_FILE_OPTION_BACKEND=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -87,6 +88,7 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -159,7 +161,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_USE_LEGACY_8254_TIMER=y CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16" @@ -169,12 +170,14 @@ CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +CONFIG_USE_LEGACY_8254_TIMER=y # CONFIG_DEBUG_SMI is not set # CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set CONFIG_HAVE_IFD_BIN=y # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set @@ -213,11 +216,15 @@ CONFIG_BOARD_LENOVO_T480=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_PS2K_EISAID="PNP0303" -CONFIG_PS2M_EISAID="PNP0F13" -CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" +CONFIG_PS2K_EISAID="LEN0071" +CONFIG_PS2M_EISAID="LEN0094" +CONFIG_THINKPADEC_HKEY_EISAID="LEN0268" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y +CONFIG_EDK2_BOOT_MANAGER_ESCAPE=y +CONFIG_EDK2_FOLLOW_BGRT_SPEC=y +CONFIG_MEC1653_DEBUG_UNLOCK_KEY="7a41b149fe2101cf" +CONFIG_VARIANT_HAS_DGPU=y CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin" CONFIG_TTYS0_BAUD=115200 # CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set @@ -276,6 +283,7 @@ CONFIG_SMM_RESERVED_SIZE=0x200000 CONFIG_SMM_MODULE_STACK_SIZE=0x800 CONFIG_ACPI_BERT_SIZE=0x0 CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 CONFIG_ACPI_CPU_STRING="CP%02X" @@ -313,6 +321,7 @@ CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y CONFIG_SOC_INTEL_KABYLAKE=y +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 @@ -354,10 +363,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" -CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" -CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" -CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" CONFIG_SOC_INTEL_CSE_RW_FILE="" CONFIG_SOC_INTEL_CSE_RW_VERSION="" @@ -495,11 +501,14 @@ CONFIG_EC_ACPI=y CONFIG_EC_LENOVO_H8=y CONFIG_H8_BEEP_ON_DEATH=y CONFIG_H8_FLASH_LEDS_ON_DEATH=y -# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set +CONFIG_H8_SUPPORT_BT_ON_WIFI=y # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y CONFIG_H8_HAS_PRIMARY_FN_KEYS=y CONFIG_H8_HAS_LEDLOGO=y +CONFIG_EC_LENOVO_MEC1653=y +CONFIG_MEC1653_HAS_DEBUG_UNLOCK=y +CONFIG_MEC1653_ENABLE_UART=y CONFIG_EC_LENOVO_PMH7=y # @@ -617,6 +626,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_OXPCIE is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -627,7 +637,6 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y # CONFIG_FSP_USE_REPO is not set # CONFIG_DISPLAY_HOBS is not set # CONFIG_DISPLAY_UPD_DATA is not set -# CONFIG_BMP_LOGO is not set CONFIG_PLATFORM_USES_FSP2_0=y CONFIG_PLATFORM_USES_FSP2_X86_32=y CONFIG_HAVE_INTEL_FSP_REPO=y @@ -637,14 +646,12 @@ CONFIG_FSP_M_CBFS="fspm.bin" # CONFIG_FSP_FULL_FD is not set CONFIG_FSP_T_RESERVED_SIZE=0x0 CONFIG_FSP_M_XIP=y -CONFIG_HAVE_FSP_LOGO_SUPPORT=y CONFIG_SOC_INTEL_COMMON_FSP_RESET=y CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y # CONFIG_DISPLAY_FSP_TIMESTAMPS is not set # CONFIG_BUILDING_WITH_DEBUG_FSP is not set -CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y CONFIG_VBT_CBFS_COMPRESSION_LZMA=y # CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set @@ -846,6 +853,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode index 1aedc109..cc8d4fa4 100644 --- a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode @@ -16,7 +16,8 @@ CONFIG_COMPILER_GCC=y # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set -CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_OPTION_BACKEND_NONE is not set +CONFIG_USE_CBFS_FILE_OPTION_BACKEND=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -87,6 +88,7 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -157,7 +159,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_USE_LEGACY_8254_TIMER=y CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/t480/ifd_16" @@ -167,12 +168,14 @@ CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +CONFIG_USE_LEGACY_8254_TIMER=y # CONFIG_DEBUG_SMI is not set # CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set CONFIG_HAVE_IFD_BIN=y # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set @@ -211,11 +214,15 @@ CONFIG_BOARD_LENOVO_T480=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_PS2K_EISAID="PNP0303" -CONFIG_PS2M_EISAID="PNP0F13" -CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" +CONFIG_PS2K_EISAID="LEN0071" +CONFIG_PS2M_EISAID="LEN0094" +CONFIG_THINKPADEC_HKEY_EISAID="LEN0268" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y +CONFIG_EDK2_BOOT_MANAGER_ESCAPE=y +CONFIG_EDK2_FOLLOW_BGRT_SPEC=y +CONFIG_MEC1653_DEBUG_UNLOCK_KEY="7a41b149fe2101cf" +CONFIG_VARIANT_HAS_DGPU=y CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin" CONFIG_TTYS0_BAUD=115200 # CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set @@ -274,6 +281,7 @@ CONFIG_SMM_RESERVED_SIZE=0x200000 CONFIG_SMM_MODULE_STACK_SIZE=0x800 CONFIG_ACPI_BERT_SIZE=0x0 CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 CONFIG_ACPI_CPU_STRING="CP%02X" @@ -311,6 +319,7 @@ CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y CONFIG_SOC_INTEL_KABYLAKE=y +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 @@ -352,10 +361,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" -CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" -CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" -CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" CONFIG_SOC_INTEL_CSE_RW_FILE="" CONFIG_SOC_INTEL_CSE_RW_VERSION="" @@ -493,11 +499,14 @@ CONFIG_EC_ACPI=y CONFIG_EC_LENOVO_H8=y CONFIG_H8_BEEP_ON_DEATH=y CONFIG_H8_FLASH_LEDS_ON_DEATH=y -# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set +CONFIG_H8_SUPPORT_BT_ON_WIFI=y # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y CONFIG_H8_HAS_PRIMARY_FN_KEYS=y CONFIG_H8_HAS_LEDLOGO=y +CONFIG_EC_LENOVO_MEC1653=y +CONFIG_MEC1653_HAS_DEBUG_UNLOCK=y +CONFIG_MEC1653_ENABLE_UART=y CONFIG_EC_LENOVO_PMH7=y # @@ -609,6 +618,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_OXPCIE is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -619,7 +629,6 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y # CONFIG_FSP_USE_REPO is not set # CONFIG_DISPLAY_HOBS is not set # CONFIG_DISPLAY_UPD_DATA is not set -# CONFIG_BMP_LOGO is not set CONFIG_PLATFORM_USES_FSP2_0=y CONFIG_PLATFORM_USES_FSP2_X86_32=y CONFIG_HAVE_INTEL_FSP_REPO=y @@ -629,14 +638,12 @@ CONFIG_FSP_M_CBFS="fspm.bin" # CONFIG_FSP_FULL_FD is not set CONFIG_FSP_T_RESERVED_SIZE=0x0 CONFIG_FSP_M_XIP=y -CONFIG_HAVE_FSP_LOGO_SUPPORT=y CONFIG_SOC_INTEL_COMMON_FSP_RESET=y CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y # CONFIG_DISPLAY_FSP_TIMESTAMPS is not set # CONFIG_BUILDING_WITH_DEBUG_FSP is not set -CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y CONFIG_VBT_CBFS_COMPRESSION_LZMA=y # CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set @@ -839,6 +846,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t480_vfsp_16mb/target.cfg b/config/coreboot/t480_vfsp_16mb/target.cfg index 9ac608b7..1cc6d167 100644 --- a/config/coreboot/t480_vfsp_16mb/target.cfg +++ b/config/coreboot/t480_vfsp_16mb/target.cfg @@ -1,12 +1,12 @@ # SPDX-License-Identifier: GPL-3.0-or-later -tree="next" +tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="nvme ahci" -grubtree="xhci" +grubtree="xhci_nvme" vcfg="t480" -build_depend="seabios/default grub/xhci memtest86plus" +build_depend="seabios/default grub/xhci_nvme memtest86plus" IFD_platform="sklkbl" diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb deleted file mode 100644 index 2505b389..00000000 --- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb +++ /dev/null @@ -1,855 +0,0 @@ -# -# Automatically generated file; DO NOT EDIT. -# coreboot configuration -# - -# -# General setup -# -CONFIG_LOCALVERSION="" -CONFIG_CBFS_PREFIX="fallback" -CONFIG_COMPILER_GCC=y -# CONFIG_COMPILER_LLVM_CLANG is not set -# CONFIG_ANY_TOOLCHAIN is not set -# CONFIG_CCACHE is not set -# CONFIG_LTO is not set -# CONFIG_IWYU is not set -# CONFIG_FMD_GENPARSER is not set -# CONFIG_UTIL_GENPARSER is not set -CONFIG_OPTION_BACKEND_NONE=y -CONFIG_COMPRESS_RAMSTAGE_LZMA=y -# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set -CONFIG_SEPARATE_ROMSTAGE=y -CONFIG_INCLUDE_CONFIG_FILE=y -CONFIG_COLLECT_TIMESTAMPS=y -# CONFIG_TIMESTAMPS_ON_CONSOLE is not set -CONFIG_USE_BLOBS=y -# CONFIG_USE_AMD_BLOBS is not set -# CONFIG_USE_QC_BLOBS is not set -# CONFIG_COVERAGE is not set -# CONFIG_UBSAN is not set -CONFIG_HAVE_ASAN_IN_RAMSTAGE=y -# CONFIG_ASAN is not set -# CONFIG_NO_STAGE_CACHE is not set -CONFIG_TSEG_STAGE_CACHE=y -# CONFIG_UPDATE_IMAGE is not set -# CONFIG_BOOTSPLASH_IMAGE is not set - -# -# Software Bill Of Materials (SBOM) -# -# CONFIG_SBOM is not set -# end of Software Bill Of Materials (SBOM) -# end of General setup - -# -# Mainboard -# - -# -# Important: Run 'make distclean' before switching boards -# -# CONFIG_VENDOR_51NB is not set -# CONFIG_VENDOR_ACER is not set -# CONFIG_VENDOR_AMD is not set -# CONFIG_VENDOR_AOOSTAR is not set -# CONFIG_VENDOR_AOPEN is not set -# CONFIG_VENDOR_APPLE is not set -# CONFIG_VENDOR_ARM is not set -# CONFIG_VENDOR_ASROCK is not set -# CONFIG_VENDOR_ASUS is not set -# CONFIG_VENDOR_BIOSTAR is not set -# CONFIG_VENDOR_BOSTENTECH is not set -# CONFIG_VENDOR_BYTEDANCE is not set -# CONFIG_VENDOR_CAVIUM is not set -# CONFIG_VENDOR_CLEVO is not set -# CONFIG_VENDOR_COMPULAB is not set -# CONFIG_VENDOR_CWWK is not set -# CONFIG_VENDOR_DELL is not set -# CONFIG_VENDOR_EMULATION is not set -# CONFIG_VENDOR_ERYING is not set -# CONFIG_VENDOR_EXAMPLE is not set -# CONFIG_VENDOR_FACEBOOK is not set -# CONFIG_VENDOR_FOXCONN is not set -# CONFIG_VENDOR_FRAMEWORK is not set -# CONFIG_VENDOR_GETAC is not set -# CONFIG_VENDOR_GIGABYTE is not set -# CONFIG_VENDOR_GOOGLE is not set -# CONFIG_VENDOR_HARDKERNEL is not set -# CONFIG_VENDOR_HP is not set -# CONFIG_VENDOR_IBASE is not set -# CONFIG_VENDOR_IBM is not set -# CONFIG_VENDOR_INTEL is not set -# CONFIG_VENDOR_INVENTEC is not set -# CONFIG_VENDOR_KONTRON is not set -# CONFIG_VENDOR_LATTEPANDA is not set -CONFIG_VENDOR_LENOVO=y -# CONFIG_VENDOR_LIBRETREND is not set -# CONFIG_VENDOR_MITAC_COMPUTING is not set -# CONFIG_VENDOR_MSI is not set -# CONFIG_VENDOR_OCP is not set -# CONFIG_VENDOR_OPENCELLULAR is not set -# CONFIG_VENDOR_PACKARDBELL is not set -# CONFIG_VENDOR_PCENGINES is not set -# CONFIG_VENDOR_PINE64 is not set -# CONFIG_VENDOR_PORTWELL is not set -# CONFIG_VENDOR_PRODRIVE is not set -# CONFIG_VENDOR_PROTECTLI is not set -# CONFIG_VENDOR_PURISM is not set -# CONFIG_VENDOR_RAPTOR_CS is not set -# CONFIG_VENDOR_RAZER is not set -# CONFIG_VENDOR_RODA is not set -# CONFIG_VENDOR_SAMSUNG is not set -# CONFIG_VENDOR_SAPPHIRE is not set -# CONFIG_VENDOR_SIEMENS is not set -# CONFIG_VENDOR_SIFIVE is not set -# CONFIG_VENDOR_STARLABS is not set -# CONFIG_VENDOR_SUPERMICRO is not set -# CONFIG_VENDOR_SYSTEM76 is not set -# CONFIG_VENDOR_TI is not set -# CONFIG_VENDOR_TOPTON is not set -# CONFIG_VENDOR_UP is not set -# CONFIG_VENDOR_VIA is not set -CONFIG_MAINBOARD_FAMILY="T480S" -CONFIG_MAINBOARD_PART_NUMBER="T480S" -CONFIG_MAINBOARD_VERSION="1.0" -CONFIG_MAINBOARD_DIR="lenovo/sklkbl_thinkpad" -CONFIG_VGA_BIOS_ID="8086,0406" -CONFIG_DIMM_MAX=2 -CONFIG_DIMM_SPD_SIZE=512 -CONFIG_FMDFILE="" -# CONFIG_NO_POST is not set -CONFIG_MAINBOARD_VENDOR="LENOVO" -CONFIG_CBFS_SIZE=0xEEC000 -CONFIG_CONSOLE_SERIAL=y -CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600 -CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560 -CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL=y -CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD=y -CONFIG_MAX_CPUS=8 -# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set -CONFIG_POST_DEVICE=y -CONFIG_POST_IO=y -CONFIG_UART_FOR_CONSOLE=0 -CONFIG_VARIANT_DIR="t480s" -CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set -# CONFIG_VGA_BIOS is not set -CONFIG_PCIEXP_ASPM=y -CONFIG_PCIEXP_L1_SUB_STATE=y -CONFIG_PCIEXP_CLK_PM=y -CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=256 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" -# CONFIG_FATAL_ASSERTS is not set -CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" -# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set -CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="T480S" -# CONFIG_CONSOLE_POST is not set -CONFIG_MAX_SOCKET=1 -CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -CONFIG_TPM_PIRQ=0x0 -CONFIG_USE_PM_ACPI_TIMER=y -CONFIG_DCACHE_RAM_BASE=0xfef00000 -CONFIG_DCACHE_RAM_SIZE=0x40000 -CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 -CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 -CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 -CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_USE_LEGACY_8254_TIMER=y -CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 -CONFIG_DRIVERS_INTEL_WIFI=y -CONFIG_IFD_BIN_PATH="../../../config/ifd/t480s/ifd_16" -CONFIG_ME_BIN_PATH="../../../vendorfiles/t480s/me.bin" -CONFIG_GBE_BIN_PATH="../../../config/ifd/t480s/gbe" -CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y -CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_CARDBUS_PLUGIN_SUPPORT=y -CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y -# CONFIG_DEBUG_SMI is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set -CONFIG_HAVE_IFD_BIN=y -# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set -# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set -# CONFIG_BOARD_LENOVO_L520 is not set -# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set -# CONFIG_BOARD_LENOVO_M920Q is not set -# CONFIG_BOARD_LENOVO_S230U is not set -# CONFIG_BOARD_LENOVO_T480 is not set -CONFIG_BOARD_LENOVO_T480S=y -# CONFIG_BOARD_LENOVO_T400 is not set -# CONFIG_BOARD_LENOVO_T500 is not set -# CONFIG_BOARD_LENOVO_R400 is not set -# CONFIG_BOARD_LENOVO_R500 is not set -# CONFIG_BOARD_LENOVO_W500 is not set -# CONFIG_BOARD_LENOVO_T410 is not set -# CONFIG_BOARD_LENOVO_T420 is not set -# CONFIG_BOARD_LENOVO_T420S is not set -# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set -# CONFIG_BOARD_LENOVO_T430S is not set -# CONFIG_BOARD_LENOVO_T431S is not set -# CONFIG_BOARD_LENOVO_T520 is not set -# CONFIG_BOARD_LENOVO_W520 is not set -# CONFIG_BOARD_LENOVO_T530 is not set -# CONFIG_BOARD_LENOVO_W530 is not set -# CONFIG_BOARD_LENOVO_T60 is not set -# CONFIG_BOARD_LENOVO_Z61T is not set -# CONFIG_BOARD_LENOVO_R60 is not set -# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set -# CONFIG_BOARD_LENOVO_THINKCENTRE_M710S is not set -# CONFIG_BOARD_LENOVO_X131E is not set -# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set -# CONFIG_BOARD_LENOVO_X200 is not set -# CONFIG_BOARD_LENOVO_X301 is not set -# CONFIG_BOARD_LENOVO_X201 is not set -# CONFIG_BOARD_LENOVO_X220 is not set -# CONFIG_BOARD_LENOVO_X220I is not set -# CONFIG_BOARD_LENOVO_X1 is not set -# CONFIG_BOARD_LENOVO_X230 is not set -# CONFIG_BOARD_LENOVO_X230T is not set -# CONFIG_BOARD_LENOVO_X230S is not set -# CONFIG_BOARD_LENOVO_X230_EDP is not set -# CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_PS2K_EISAID="PNP0303" -CONFIG_PS2M_EISAID="PNP0F13" -CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" -CONFIG_GFX_GMA_PANEL_1_PORT="eDP" -CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y -CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin" -CONFIG_TTYS0_BAUD=115200 -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set -CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y -CONFIG_D3COLD_SUPPORT=y -CONFIG_GFX_GMA_PANEL_1_ON_EDP=y -CONFIG_DRIVERS_UART_8250IO=y -CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 -CONFIG_HEAP_SIZE=0x100000 -CONFIG_EC_GPE_SCI=0x50 -CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" -CONFIG_EC_STARLABS_BATTERY_TYPE="LION" -CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" -CONFIG_BOARD_ROMSIZE_KB_16384=y -# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set -# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set -# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set -# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set -# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set -# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set -# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set -# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set -# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set -# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set -CONFIG_COREBOOT_ROMSIZE_KB_16384=y -# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set -# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set -# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set -CONFIG_COREBOOT_ROMSIZE_KB=16384 -CONFIG_ROM_SIZE=0x01000000 -CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y -CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y -# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set -CONFIG_POWER_STATE_ON_AFTER_FAILURE=y -# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set -CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 -# end of Mainboard - -CONFIG_SYSTEM_TYPE_LAPTOP=y - -# -# Chipset -# - -# -# SoC -# -CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" -CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" -CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" -CONFIG_CBFS_MCACHE_SIZE=0x4000 -CONFIG_ROMSTAGE_ADDR=0x2000000 -CONFIG_VERSTAGE_ADDR=0x2000000 -CONFIG_SMM_TSEG_SIZE=0x800000 -CONFIG_SMM_RESERVED_SIZE=0x200000 -CONFIG_SMM_MODULE_STACK_SIZE=0x800 -CONFIG_ACPI_BERT_SIZE=0x0 -CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 -CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 -CONFIG_ACPI_CPU_STRING="CP%02X" -CONFIG_STACK_SIZE=0x2000 -CONFIG_IFD_CHIPSET="sklkbl" -CONFIG_IED_REGION_SIZE=0x400000 -CONFIG_MAX_ROOT_PORTS=24 -CONFIG_PCR_BASE_ADDRESS=0xfd000000 -CONFIG_CPU_BCLK_MHZ=100 -CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120 -CONFIG_CPU_XTAL_HZ=24000000 -CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2 -CONFIG_SOC_INTEL_I2C_DEV_MAX=6 -# CONFIG_ENABLE_SATA_TEST_MODE is not set -CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 -CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 -CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" -CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" -CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 -CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 -CONFIG_INTEL_GMA_BCLV_WIDTH=16 -CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 -CONFIG_INTEL_GMA_BCLM_WIDTH=16 -CONFIG_FSP_PUBLISH_MBP_HOB=y -CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 -CONFIG_MAX_HECI_DEVICES=5 -CONFIG_BOOTBLOCK_IN_CBFS=y -CONFIG_HAVE_PAM0_REGISTER=y -CONFIG_PCIEXP_COMMON_CLOCK=y -CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000 -CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10 -CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 -CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 -CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 -CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 -CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y -CONFIG_SOC_INTEL_KABYLAKE=y -CONFIG_FSP_T_LOCATION=0xfffe0000 -CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y -CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 -CONFIG_CBFS_CACHE_ALIGN=8 -CONFIG_SOC_INTEL_COMMON=y - -# -# Intel SoC Common Code for IP blocks -# -CONFIG_SOC_INTEL_COMMON_BLOCK=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y -CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y -# CONFIG_USE_COREBOOT_MP_INIT is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y -CONFIG_INTEL_CAR_NEM_ENHANCED=y -# CONFIG_USE_INTEL_FSP_MP_INIT is not set -CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y -CONFIG_HAVE_HYPERTHREADING=y -# CONFIG_FSP_HYPERTHREADING is not set -# CONFIG_INTEL_KEYLOCKER is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y -CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y -CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y -CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" -CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" -CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" -CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" -CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" -CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" -CONFIG_SOC_INTEL_CSE_RW_FILE="" -CONFIG_SOC_INTEL_CSE_RW_VERSION="" -CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom" -CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE="" -CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy" -CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE="" -CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y -CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y -CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y -CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y -# CONFIG_SOC_INTEL_DISABLE_IGD is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y -CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y -CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y -CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y -CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y -CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y -CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y -CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y -CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y -# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 -CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y -CONFIG_SA_ENABLE_DPR=y -CONFIG_HAVE_CAPID_A_REGISTER=y -CONFIG_HAVE_BDSM_BGSM_REGISTER=y -CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y -CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y -CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y -CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y -CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y -CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y - -# -# Intel SoC Common PCH Code -# -CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y -CONFIG_SOC_INTEL_COMMON_PCH_BASE=y -CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y -CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y -CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y -CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y - -# -# Intel SoC Common coreboot stages and non-IP blocks -# -CONFIG_SOC_INTEL_COMMON_BASECODE=y -CONFIG_SOC_INTEL_COMMON_RESET=y -CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y -CONFIG_PAVP=y -# CONFIG_MMA is not set -CONFIG_SOC_INTEL_COMMON_NHLT=y -# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set - -# -# CPU -# -CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y -CONFIG_CPU_INTEL_COMMON=y -CONFIG_ENABLE_VMX=y -CONFIG_SET_IA32_FC_LOCK_BIT=y -CONFIG_SET_MSR_AESNI_LOCK_BIT=y -CONFIG_CPU_INTEL_COMMON_SMM=y -CONFIG_PARALLEL_MP=y -CONFIG_PARALLEL_MP_AP_WORK=y -CONFIG_XAPIC_ONLY=y -# CONFIG_X2APIC_ONLY is not set -# CONFIG_X2APIC_RUNTIME is not set -# CONFIG_X2APIC_LATE_WORKAROUND is not set -CONFIG_UDELAY_TSC=y -CONFIG_TSC_MONOTONIC_TIMER=y -CONFIG_TSC_SYNC_MFENCE=y -CONFIG_HAVE_SMI_HANDLER=y -CONFIG_SMM_TSEG=y -CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 -CONFIG_AP_STACK_SIZE=0x800 -CONFIG_SMP=y -CONFIG_SSE=y -CONFIG_SSE2=y -CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y -CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y -CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y -# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set -# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set -# CONFIG_CPU_MICROCODE_CBFS_NONE is not set - -# -# Northbridge -# - -# -# Southbridge -# -# CONFIG_PCIEXP_HOTPLUG is not set -CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y -CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y -CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y -# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set -CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 -CONFIG_RCBA_LENGTH=0x4000 - -# -# Super I/O -# - -# -# Embedded Controllers -# -CONFIG_EC_ACPI=y -CONFIG_EC_LENOVO_H8=y -CONFIG_H8_BEEP_ON_DEATH=y -CONFIG_H8_FLASH_LEDS_ON_DEATH=y -# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set -# CONFIG_H8_FN_CTRL_SWAP is not set -CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y -CONFIG_H8_HAS_PRIMARY_FN_KEYS=y -CONFIG_H8_HAS_LEDLOGO=y -CONFIG_EC_LENOVO_PMH7=y - -# -# Intel Firmware -# -CONFIG_HAVE_ME_BIN=y -# CONFIG_STITCH_ME_BIN is not set -# CONFIG_CHECK_ME is not set -# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set -# CONFIG_USE_ME_CLEANER is not set -CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y -CONFIG_HAVE_GBE_BIN=y -# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set -# CONFIG_LOCK_MANAGEMENT_ENGINE is not set -CONFIG_UNLOCK_FLASH_REGIONS=y -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 -CONFIG_UDK_BASE=y -CONFIG_UDK_2017_BINDING=y -CONFIG_UDK_2013_VERSION=2013 -CONFIG_UDK_2017_VERSION=2017 -CONFIG_UDK_202005_VERSION=202005 -CONFIG_UDK_202111_VERSION=202111 -CONFIG_UDK_202302_VERSION=202302 -CONFIG_UDK_202305_VERSION=202305 -CONFIG_UDK_VERSION=2017 -CONFIG_ARCH_X86=y -CONFIG_ARCH_BOOTBLOCK_X86_32=y -CONFIG_ARCH_VERSTAGE_X86_32=y -CONFIG_ARCH_ROMSTAGE_X86_32=y -CONFIG_ARCH_POSTCAR_X86_32=y -CONFIG_ARCH_RAMSTAGE_X86_32=y -CONFIG_ARCH_ALL_STAGES_X86_32=y -CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y -CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y -CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y -CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 -CONFIG_PC80_SYSTEM=y -CONFIG_POSTCAR_STAGE=y -CONFIG_BOOTBLOCK_SIMPLE=y -# CONFIG_BOOTBLOCK_NORMAL is not set -CONFIG_COLLECT_TIMESTAMPS_TSC=y -CONFIG_HAVE_CF9_RESET=y -CONFIG_DEBUG_HW_BREAKPOINTS=y -CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y -# CONFIG_DUMP_SMBIOS_TYPE17 is not set -CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 -CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 -CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 -CONFIG_DEFAULT_EBDA_SIZE=0x400 -# end of Chipset - -# -# Devices -# -CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y -CONFIG_HAVE_LINEAR_FRAMEBUFFER=y -CONFIG_HAVE_FSP_GOP=y -CONFIG_MAINBOARD_HAS_LIBGFXINIT=y -CONFIG_MAINBOARD_USE_LIBGFXINIT=y -# CONFIG_VGA_ROM_RUN is not set -# CONFIG_RUN_FSP_GOP is not set -# CONFIG_NO_GFX_INIT is not set -CONFIG_NO_EARLY_GFX_INIT=y - -# -# Display -# -# CONFIG_VGA_TEXT_FRAMEBUFFER is not set -CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y -CONFIG_LINEAR_FRAMEBUFFER=y -# CONFIG_BOOTSPLASH is not set -CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y -# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set -# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set -# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set -CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 -# end of Display - -CONFIG_PCI=y -CONFIG_ECAM_MMCONF_SUPPORT=y -CONFIG_PCIX_PLUGIN_SUPPORT=y -CONFIG_AZALIA_HDA_CODEC_SUPPORT=y -CONFIG_PCIEXP_PLUGIN_SUPPORT=y -CONFIG_ECAM_MMCONF_LENGTH=0x10000000 -CONFIG_PCI_ALLOW_BUS_MASTER=y -CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y -CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y -# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set -# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set -# CONFIG_EARLY_PCI_BRIDGE is not set -CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 -CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 -CONFIG_INTEL_GMA_HAVE_VBT=y -CONFIG_INTEL_GMA_ADD_VBT=y -# CONFIG_SOFTWARE_I2C is not set -CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 -CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y -# end of Devices - -# -# Generic Drivers -# -CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 -# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set -# CONFIG_DRIVERS_EFI_FW_INFO is not set -# CONFIG_ELOG is not set -CONFIG_CACHE_MRC_SETTINGS=y -CONFIG_MRC_SETTINGS_PROTECT=y -# CONFIG_DRIVERS_OPTION_CFR is not set -# CONFIG_SMMSTORE is not set -CONFIG_SPI_FLASH=y -CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y -CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y -# CONFIG_SPI_FLASH_NO_FAST_READ is not set -CONFIG_DRIVERS_UART=y -# CONFIG_DRIVERS_UART_OXPCIE is not set -# CONFIG_VPD is not set -# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set -# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set -# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set -# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set -# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set -CONFIG_DRIVERS_I2C_DESIGNWARE=y -# CONFIG_DRIVERS_I2C_MAX98396 is not set -CONFIG_FSP_USE_REPO=y -# CONFIG_DISPLAY_HOBS is not set -# CONFIG_DISPLAY_UPD_DATA is not set -# CONFIG_BMP_LOGO is not set -CONFIG_PLATFORM_USES_FSP2_0=y -CONFIG_PLATFORM_USES_FSP2_X86_32=y -CONFIG_HAVE_INTEL_FSP_REPO=y -CONFIG_ADD_FSP_BINARIES=y -CONFIG_FSP_S_CBFS="fsps.bin" -CONFIG_FSP_M_CBFS="fspm.bin" -CONFIG_FSP_FULL_FD=y -CONFIG_FSP_T_RESERVED_SIZE=0x0 -CONFIG_FSP_M_XIP=y -CONFIG_HAVE_FSP_LOGO_SUPPORT=y -CONFIG_SOC_INTEL_COMMON_FSP_RESET=y -CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y -CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y -CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y -# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set -# CONFIG_BUILDING_WITH_DEBUG_FSP is not set -CONFIG_INTEL_INT15=y -CONFIG_INTEL_GMA_ACPI=y -CONFIG_VBT_CBFS_COMPRESSION_LZMA=y -# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set -# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set -CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" -CONFIG_GFX_GMA=y -CONFIG_GFX_GMA_DYN_CPU=y -CONFIG_GFX_GMA_GENERATION="Skylake" -CONFIG_GFX_GMA_PCH="Sunrise_Point" -CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" -CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" -# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set -# CONFIG_DRIVERS_PS2_KEYBOARD is not set -CONFIG_DRIVERS_MC146818=y -CONFIG_USE_PC_CMOS_ALTCENTURY=y -CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 -CONFIG_MEMORY_MAPPED_TPM=y -CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000 -# CONFIG_DRIVERS_SIL_3114 is not set -CONFIG_DRIVERS_USB_ACPI=y -CONFIG_DRIVERS_WIFI_GENERIC=y -CONFIG_DRIVERS_MTK_WIFI=y -# end of Generic Drivers - -# -# Security -# - -# -# CBFS verification -# -# CONFIG_CBFS_VERIFICATION is not set -# end of CBFS verification - -# -# Verified Boot (vboot) -# -# end of Verified Boot (vboot) - -# -# Trusted Platform Module -# -CONFIG_NO_TPM=y -# CONFIG_TPM1 is not set -# CONFIG_TPM2 is not set -CONFIG_MAINBOARD_HAS_TPM2=y -CONFIG_PCR_BOOT_MODE=1 -CONFIG_PCR_HWID=1 -CONFIG_PCR_SRTM=2 -CONFIG_PCR_FW_VER=10 -CONFIG_PCR_RUNTIME_DATA=3 -# end of Trusted Platform Module - -# -# Memory initialization -# -CONFIG_PLATFORM_HAS_DRAM_CLEAR=y -# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set -# end of Memory initialization - -# CONFIG_STM is not set -# CONFIG_INTEL_CBNT_SUPPORT is not set -CONFIG_BOOTMEDIA_LOCK_NONE=y -# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set -# CONFIG_BOOTMEDIA_LOCK_CHIP is not set -# CONFIG_BOOTMEDIA_SMM_BWP is not set -# end of Security - -CONFIG_ACPI_HAVE_PCAT_8259=y -CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y -CONFIG_ACPI_SOC_NVS=y -CONFIG_ACPI_CUSTOM_MADT=y -CONFIG_ACPI_NO_CUSTOM_MADT=y -CONFIG_ACPI_COMMON_MADT_LAPIC=y -CONFIG_ACPI_COMMON_MADT_IOAPIC=y -CONFIG_HAVE_ACPI_TABLES=y -CONFIG_ACPI_LPIT=y -CONFIG_BOOT_DEVICE_SPI_FLASH=y -CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y -CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y -CONFIG_RTC=y - -# -# Console -# -CONFIG_BOOTBLOCK_CONSOLE=y -CONFIG_POSTCAR_CONSOLE=y -CONFIG_SQUELCH_EARLY_SMP=y - -# -# I/O mapped, 8250-compatible -# -CONFIG_TTYS0_BASE=0x3f8 - -# -# Serial port base address = 0x3f8 -# -# CONFIG_CONSOLE_SERIAL_921600 is not set -# CONFIG_CONSOLE_SERIAL_460800 is not set -# CONFIG_CONSOLE_SERIAL_230400 is not set -CONFIG_CONSOLE_SERIAL_115200=y -# CONFIG_CONSOLE_SERIAL_57600 is not set -# CONFIG_CONSOLE_SERIAL_38400 is not set -# CONFIG_CONSOLE_SERIAL_19200 is not set -# CONFIG_CONSOLE_SERIAL_9600 is not set -CONFIG_TTYS0_LCS=3 -# CONFIG_SPKMODEM is not set -# CONFIG_CONSOLE_NE2K is not set -CONFIG_CONSOLE_CBMEM=y -# CONFIG_CONSOLE_SPI_FLASH is not set -# CONFIG_CONSOLE_I2C_SMBUS is not set -# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set -CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y -# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set -# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set -# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set -# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set -# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set -# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set -# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set -CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 -CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y -CONFIG_CONSOLE_USE_ANSI_ESCAPES=y -# CONFIG_CMOS_POST is not set -CONFIG_POST_DEVICE_NONE=y -# CONFIG_POST_DEVICE_LPC is not set -# CONFIG_POST_DEVICE_PCI_PCIE is not set -CONFIG_POST_IO_PORT=0x80 -CONFIG_HWBASE_DEBUG_CB=y -# end of Console - -CONFIG_ACPI_S1_NOT_SUPPORTED=y -CONFIG_HAVE_ACPI_RESUME=y -CONFIG_RESUME_PATH_SAME_AS_BOOT=y -CONFIG_HAVE_MONOTONIC_TIMER=y -CONFIG_IOAPIC=y -CONFIG_ACPI_NHLT=y - -# -# System tables -# -CONFIG_GENERATE_SMBIOS_TABLES=y -CONFIG_BIOS_VENDOR="coreboot" -CONFIG_MAINBOARD_SERIAL_NUMBER="123456789" -# end of System tables - -# -# Payload -# -CONFIG_PAYLOAD_NONE=y -# end of Payload - -# -# Debugging -# - -# -# CPU Debug Settings -# -# CONFIG_DISPLAY_MTRRS is not set - -# -# Vendorcode Debug Settings -# - -# -# BLOB Debug Settings -# -# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set -# CONFIG_DISPLAY_FSP_HEADER is not set -# CONFIG_VERIFY_HOBS is not set -# CONFIG_DISPLAY_FSP_VERSION_INFO is not set -CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y -# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set - -# -# General Debug Settings -# -# CONFIG_GDB_STUB is not set -CONFIG_HAVE_DEBUG_GPIO=y -# CONFIG_DEBUG_GPIO is not set -# CONFIG_DEBUG_CBFS is not set -CONFIG_HAVE_DEBUG_SMBUS=y -# CONFIG_DEBUG_SMBUS is not set -# CONFIG_DEBUG_MALLOC is not set -# CONFIG_DEBUG_CONSOLE_INIT is not set -# CONFIG_DEBUG_SPI_FLASH is not set -# CONFIG_DEBUG_BOOT_STATE is not set -# CONFIG_DEBUG_ADA_CODE is not set -CONFIG_HAVE_EM100_SUPPORT=y -# CONFIG_EM100 is not set -# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set -# end of Debugging - -CONFIG_RAMSTAGE_ADA=y -CONFIG_RAMSTAGE_LIBHWBASE=y -CONFIG_SPD_READ_BY_WORD=y -CONFIG_HWBASE_DYNAMIC_MMIO=y -CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 -CONFIG_HWBASE_DIRECT_PCIDEV=y -CONFIG_DECOMPRESS_OFAST=y -CONFIG_WARNINGS_ARE_ERRORS=y -CONFIG_MAX_REBOOT_CNT=3 -CONFIG_RELOCATABLE_MODULES=y -CONFIG_GENERIC_GPIO_LIB=y -CONFIG_HAVE_BOOTBLOCK=y -CONFIG_HAVE_ROMSTAGE=y -CONFIG_HAVE_RAMSTAGE=y diff --git a/config/coreboot/t480s_fsp_16mb/target.cfg b/config/coreboot/t480s_fsp_16mb/target.cfg deleted file mode 100644 index 855b0c70..00000000 --- a/config/coreboot/t480s_fsp_16mb/target.cfg +++ /dev/null @@ -1,13 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -tree="next" -xarch="i386-elf" -payload_seabios="y" -payload_grub="y" -payload_memtest="y" -grub_scan_disk="nvme ahci" -grubtree="xhci" -vcfg="t480s" -build_depend="seabios/default grub/xhci memtest86plus" -IFD_platform="sklkbl" -release="n" # t480s_vfsp_16mb is released instead diff --git a/config/coreboot/t480s_vfsp_16mb/cbfs.cfg b/config/coreboot/t480s_vfsp_16mb/cbfs.cfg new file mode 100644 index 00000000..022783ff --- /dev/null +++ b/config/coreboot/t480s_vfsp_16mb/cbfs.cfg @@ -0,0 +1 @@ +power_on_after_fail 0 diff --git a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb index ee006e59..c2a242f3 100644 --- a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb @@ -17,6 +17,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -87,6 +88,7 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -159,7 +161,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_USE_LEGACY_8254_TIMER=y CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/t480s/ifd_16" @@ -169,12 +170,14 @@ CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +CONFIG_USE_LEGACY_8254_TIMER=y # CONFIG_DEBUG_SMI is not set # CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set CONFIG_HAVE_IFD_BIN=y # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set @@ -213,11 +216,14 @@ CONFIG_BOARD_LENOVO_T480S=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_PS2K_EISAID="PNP0303" -CONFIG_PS2M_EISAID="PNP0F13" -CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" +CONFIG_PS2K_EISAID="LEN0071" +CONFIG_PS2M_EISAID="LEN0094" +CONFIG_THINKPADEC_HKEY_EISAID="LEN0268" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y +CONFIG_EDK2_BOOT_MANAGER_ESCAPE=y +CONFIG_EDK2_FOLLOW_BGRT_SPEC=y +CONFIG_VARIANT_HAS_DGPU=y CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin" CONFIG_TTYS0_BAUD=115200 # CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set @@ -276,6 +282,7 @@ CONFIG_SMM_RESERVED_SIZE=0x200000 CONFIG_SMM_MODULE_STACK_SIZE=0x800 CONFIG_ACPI_BERT_SIZE=0x0 CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 CONFIG_ACPI_CPU_STRING="CP%02X" @@ -313,6 +320,7 @@ CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y CONFIG_SOC_INTEL_KABYLAKE=y +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 @@ -354,10 +362,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" -CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" -CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" -CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" CONFIG_SOC_INTEL_CSE_RW_FILE="" CONFIG_SOC_INTEL_CSE_RW_VERSION="" @@ -495,11 +500,12 @@ CONFIG_EC_ACPI=y CONFIG_EC_LENOVO_H8=y CONFIG_H8_BEEP_ON_DEATH=y CONFIG_H8_FLASH_LEDS_ON_DEATH=y -# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set +CONFIG_H8_SUPPORT_BT_ON_WIFI=y # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y CONFIG_H8_HAS_PRIMARY_FN_KEYS=y CONFIG_H8_HAS_LEDLOGO=y +CONFIG_EC_LENOVO_MEC1653=y CONFIG_EC_LENOVO_PMH7=y # @@ -617,6 +623,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_OXPCIE is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -627,7 +634,6 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y # CONFIG_FSP_USE_REPO is not set # CONFIG_DISPLAY_HOBS is not set # CONFIG_DISPLAY_UPD_DATA is not set -# CONFIG_BMP_LOGO is not set CONFIG_PLATFORM_USES_FSP2_0=y CONFIG_PLATFORM_USES_FSP2_X86_32=y CONFIG_HAVE_INTEL_FSP_REPO=y @@ -637,14 +643,12 @@ CONFIG_FSP_M_CBFS="fspm.bin" # CONFIG_FSP_FULL_FD is not set CONFIG_FSP_T_RESERVED_SIZE=0x0 CONFIG_FSP_M_XIP=y -CONFIG_HAVE_FSP_LOGO_SUPPORT=y CONFIG_SOC_INTEL_COMMON_FSP_RESET=y CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y # CONFIG_DISPLAY_FSP_TIMESTAMPS is not set # CONFIG_BUILDING_WITH_DEBUG_FSP is not set -CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y CONFIG_VBT_CBFS_COMPRESSION_LZMA=y # CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set @@ -846,6 +850,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode index 30a69e6a..89ec0e55 100644 --- a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode @@ -17,6 +17,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -87,6 +88,7 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -157,7 +159,6 @@ CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_USE_LEGACY_8254_TIMER=y CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/t480s/ifd_16" @@ -167,12 +168,14 @@ CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +CONFIG_USE_LEGACY_8254_TIMER=y # CONFIG_DEBUG_SMI is not set # CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set CONFIG_HAVE_IFD_BIN=y # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set @@ -211,11 +214,14 @@ CONFIG_BOARD_LENOVO_T480S=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_PS2K_EISAID="PNP0303" -CONFIG_PS2M_EISAID="PNP0F13" -CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" +CONFIG_PS2K_EISAID="LEN0071" +CONFIG_PS2M_EISAID="LEN0094" +CONFIG_THINKPADEC_HKEY_EISAID="LEN0268" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y +CONFIG_EDK2_BOOT_MANAGER_ESCAPE=y +CONFIG_EDK2_FOLLOW_BGRT_SPEC=y +CONFIG_VARIANT_HAS_DGPU=y CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin" CONFIG_TTYS0_BAUD=115200 # CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set @@ -274,6 +280,7 @@ CONFIG_SMM_RESERVED_SIZE=0x200000 CONFIG_SMM_MODULE_STACK_SIZE=0x800 CONFIG_ACPI_BERT_SIZE=0x0 CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 CONFIG_ACPI_CPU_STRING="CP%02X" @@ -311,6 +318,7 @@ CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y CONFIG_SOC_INTEL_KABYLAKE=y +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FSP_T_LOCATION=0xfffe0000 CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 @@ -352,10 +360,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" -CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" -CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" -CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" CONFIG_SOC_INTEL_CSE_RW_FILE="" CONFIG_SOC_INTEL_CSE_RW_VERSION="" @@ -493,11 +498,12 @@ CONFIG_EC_ACPI=y CONFIG_EC_LENOVO_H8=y CONFIG_H8_BEEP_ON_DEATH=y CONFIG_H8_FLASH_LEDS_ON_DEATH=y -# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set +CONFIG_H8_SUPPORT_BT_ON_WIFI=y # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y CONFIG_H8_HAS_PRIMARY_FN_KEYS=y CONFIG_H8_HAS_LEDLOGO=y +CONFIG_EC_LENOVO_MEC1653=y CONFIG_EC_LENOVO_PMH7=y # @@ -609,6 +615,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_OXPCIE is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -619,7 +626,6 @@ CONFIG_DRIVERS_I2C_DESIGNWARE=y # CONFIG_FSP_USE_REPO is not set # CONFIG_DISPLAY_HOBS is not set # CONFIG_DISPLAY_UPD_DATA is not set -# CONFIG_BMP_LOGO is not set CONFIG_PLATFORM_USES_FSP2_0=y CONFIG_PLATFORM_USES_FSP2_X86_32=y CONFIG_HAVE_INTEL_FSP_REPO=y @@ -629,14 +635,12 @@ CONFIG_FSP_M_CBFS="fspm.bin" # CONFIG_FSP_FULL_FD is not set CONFIG_FSP_T_RESERVED_SIZE=0x0 CONFIG_FSP_M_XIP=y -CONFIG_HAVE_FSP_LOGO_SUPPORT=y CONFIG_SOC_INTEL_COMMON_FSP_RESET=y CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y # CONFIG_DISPLAY_FSP_TIMESTAMPS is not set # CONFIG_BUILDING_WITH_DEBUG_FSP is not set -CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y CONFIG_VBT_CBFS_COMPRESSION_LZMA=y # CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set @@ -839,6 +843,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t480s_vfsp_16mb/target.cfg b/config/coreboot/t480s_vfsp_16mb/target.cfg index a7d63ae1..a8fffe9a 100644 --- a/config/coreboot/t480s_vfsp_16mb/target.cfg +++ b/config/coreboot/t480s_vfsp_16mb/target.cfg @@ -1,12 +1,12 @@ # SPDX-License-Identifier: GPL-3.0-or-later -tree="next" +tree="default" xarch="i386-elf" payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="nvme ahci" -grubtree="xhci" +grubtree="xhci_nvme" vcfg="t480s" -build_depend="seabios/default grub/xhci memtest86plus" +build_depend="seabios/default grub/xhci_nvme memtest86plus" IFD_platform="sklkbl" diff --git a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb index 951668c7..375b0b01 100644 --- a/config/coreboot/t500_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t500_16mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T500" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T500" @@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set CONFIG_BOARD_LENOVO_T500=y # CONFIG_BOARD_LENOVO_R400 is not set @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_T500=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -262,8 +274,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -278,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -365,6 +379,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -377,6 +393,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -401,6 +418,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -421,6 +441,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -453,7 +474,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -473,11 +497,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -649,7 +675,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -671,6 +696,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t500_16mb/config/libgfxinit_txtmode b/config/coreboot/t500_16mb/config/libgfxinit_txtmode index c1ed36e9..3d797080 100644 --- a/config/coreboot/t500_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/t500_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T500" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T500" @@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set CONFIG_BOARD_LENOVO_T500=y # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_T500=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -260,8 +272,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -276,6 +289,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -363,6 +377,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -375,6 +391,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -399,6 +416,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -417,6 +437,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -449,7 +470,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -469,11 +493,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -645,7 +671,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -667,6 +692,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t500_16mb/target.cfg b/config/coreboot/t500_16mb/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/t500_16mb/target.cfg +++ b/config/coreboot/t500_16mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb index e090a1cc..5e5d3ade 100644 --- a/config/coreboot/t500_4mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t500_4mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T500" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T500" @@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set CONFIG_BOARD_LENOVO_T500=y # CONFIG_BOARD_LENOVO_R400 is not set @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_T500=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -262,8 +274,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -278,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -365,6 +379,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -377,6 +393,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -401,6 +418,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -421,6 +441,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -453,7 +474,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -473,11 +497,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -649,7 +675,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -671,6 +696,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t500_4mb/config/libgfxinit_txtmode b/config/coreboot/t500_4mb/config/libgfxinit_txtmode index 4d6a6fa9..9a7e5617 100644 --- a/config/coreboot/t500_4mb/config/libgfxinit_txtmode +++ b/config/coreboot/t500_4mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T500" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T500" @@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set CONFIG_BOARD_LENOVO_T500=y # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_T500=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -260,8 +272,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -276,6 +289,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -363,6 +377,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -375,6 +391,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -399,6 +416,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -417,6 +437,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -449,7 +470,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -469,11 +493,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -645,7 +671,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -667,6 +692,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t500_4mb/target.cfg b/config/coreboot/t500_4mb/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/t500_4mb/target.cfg +++ b/config/coreboot/t500_4mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb index 2020124c..c8732a48 100644 --- a/config/coreboot/t500_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t500_8mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T500" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T500" @@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set CONFIG_BOARD_LENOVO_T500=y # CONFIG_BOARD_LENOVO_R400 is not set @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_T500=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -262,8 +274,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -278,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -365,6 +379,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -377,6 +393,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -401,6 +418,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -421,6 +441,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -453,7 +474,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -473,11 +497,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -649,7 +675,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -671,6 +696,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t500_8mb/config/libgfxinit_txtmode b/config/coreboot/t500_8mb/config/libgfxinit_txtmode index 80830324..c4b3c004 100644 --- a/config/coreboot/t500_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/t500_8mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T500" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T500" @@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set CONFIG_BOARD_LENOVO_T500=y # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_T500=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -260,8 +272,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -276,6 +289,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -363,6 +377,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -375,6 +391,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -399,6 +416,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -417,6 +437,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -449,7 +470,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -469,11 +493,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -645,7 +671,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -667,6 +692,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t500_8mb/target.cfg b/config/coreboot/t500_8mb/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/t500_8mb/target.cfg +++ b/config/coreboot/t500_8mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb index c83c43ba..95e50779 100644 --- a/config/coreboot/t520_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t520_8mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_FAMILY="ThinkPad T520" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T520" CONFIG_MAINBOARD_VERSION="1.0" @@ -122,28 +131,30 @@ CONFIG_MAX_CPUS=8 CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t520" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T520" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 @@ -159,12 +170,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T520" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_T520=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="LEN0015" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" @@ -264,9 +276,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -283,6 +296,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -330,6 +344,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -377,6 +396,8 @@ CONFIG_H8_FLASH_LEDS_ON_DEATH=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -392,6 +413,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -415,6 +437,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -435,6 +460,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -466,9 +492,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -490,11 +519,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -546,7 +577,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -655,7 +685,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -676,6 +705,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t520_8mb/config/libgfxinit_txtmode b/config/coreboot/t520_8mb/config/libgfxinit_txtmode index de062a35..5dfa0496 100644 --- a/config/coreboot/t520_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/t520_8mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_FAMILY="ThinkPad T520" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T520" CONFIG_MAINBOARD_VERSION="1.0" @@ -120,28 +129,30 @@ CONFIG_MAX_CPUS=8 CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t520" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T520" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 @@ -157,12 +168,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T520" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_T520=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="LEN0015" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" @@ -262,9 +274,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -281,6 +294,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -328,6 +342,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -375,6 +394,8 @@ CONFIG_H8_FLASH_LEDS_ON_DEATH=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -390,6 +411,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -413,6 +435,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -431,6 +456,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -462,9 +488,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -486,11 +515,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -543,7 +574,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -652,7 +682,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -673,6 +702,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t520_8mb/target.cfg b/config/coreboot/t520_8mb/target.cfg index 333030ce..d7510b96 100644 --- a/config/coreboot/t520_8mb/target.cfg +++ b/config/coreboot/t520_8mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb index 2558ee17..46986899 100644 --- a/config/coreboot/t530_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t530_12mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_FAMILY="ThinkPad T530" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T530" CONFIG_MAINBOARD_VERSION="1.0" @@ -122,28 +131,30 @@ CONFIG_MAX_CPUS=8 CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t530" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T530" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -158,12 +169,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T530" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -171,8 +180,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_T530=y # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_VBOOT_SLOTS_RW_AB=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0071" CONFIG_PS2M_EISAID="LEN0015" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" @@ -264,9 +276,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -283,6 +296,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -330,6 +344,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -377,6 +396,8 @@ CONFIG_H8_FLASH_LEDS_ON_DEATH=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -392,6 +413,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -415,6 +437,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -435,6 +460,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -466,9 +492,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -490,11 +519,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -546,7 +577,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -655,7 +685,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -676,6 +705,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t530_12mb/config/libgfxinit_txtmode b/config/coreboot/t530_12mb/config/libgfxinit_txtmode index 999b6632..005437ca 100644 --- a/config/coreboot/t530_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/t530_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_FAMILY="ThinkPad T530" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T530" CONFIG_MAINBOARD_VERSION="1.0" @@ -120,28 +129,30 @@ CONFIG_MAX_CPUS=8 CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t530" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T530" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -156,12 +167,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T530" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -169,8 +178,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_T530=y # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_VBOOT_SLOTS_RW_AB=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0071" CONFIG_PS2M_EISAID="LEN0015" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" @@ -262,9 +274,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -281,6 +294,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -328,6 +342,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -375,6 +394,8 @@ CONFIG_H8_FLASH_LEDS_ON_DEATH=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -390,6 +411,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -413,6 +435,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -431,6 +456,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -462,9 +488,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -486,11 +515,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -543,7 +574,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -652,7 +682,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -673,6 +702,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t530_12mb/target.cfg b/config/coreboot/t530_12mb/target.cfg index 6cbab731..595ad782 100644 --- a/config/coreboot/t530_12mb/target.cfg +++ b/config/coreboot/t530_12mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb index 2568061d..83e57e15 100644 --- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb +++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T60" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T60" @@ -123,25 +132,27 @@ CONFIG_MAX_CPUS=2 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t60" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -151,20 +162,22 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -198,7 +211,6 @@ CONFIG_BOARD_LENOVO_T60=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="IBM0057" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -252,8 +264,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -268,6 +281,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -361,7 +375,10 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_FLASH_LEDS_ON_DEATH is not set # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -385,6 +402,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -405,6 +425,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -436,7 +457,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -455,11 +479,13 @@ CONFIG_DRIVERS_UART=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_DRIVERS_I2C_CK505=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y @@ -626,7 +652,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -641,6 +666,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode index 0092e5fd..0fecf0a1 100644 --- a/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode +++ b/config/coreboot/t60_16mb_intelgpu/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T60" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T60" @@ -123,25 +132,27 @@ CONFIG_MAX_CPUS=2 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t60" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -151,20 +162,22 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -198,7 +211,6 @@ CONFIG_BOARD_LENOVO_T60=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="IBM0057" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -252,8 +264,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -268,6 +281,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -361,7 +375,10 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_FLASH_LEDS_ON_DEATH is not set # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -385,6 +402,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -403,6 +423,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -434,7 +455,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -453,11 +477,13 @@ CONFIG_DRIVERS_UART=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_DRIVERS_I2C_CK505=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y @@ -624,7 +650,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -639,6 +664,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t60_16mb_intelgpu/target.cfg b/config/coreboot/t60_16mb_intelgpu/target.cfg index c1e3a3c6..f41e3fe9 100644 --- a/config/coreboot/t60_16mb_intelgpu/target.cfg +++ b/config/coreboot/t60_16mb_intelgpu/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" grub_scan_disk="ahci" build_depend="seabios/default grub/default u-boot/i386coreboot" -payload_uboot_i386="y" +payload_uboot="i386" diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb index b1cc51c6..635cc7d1 100644 --- a/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb +++ b/config/coreboot/t60_intelgpu/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T60" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T60" @@ -123,25 +132,27 @@ CONFIG_MAX_CPUS=2 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t60" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -151,20 +162,22 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -198,7 +211,6 @@ CONFIG_BOARD_LENOVO_T60=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="IBM0057" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -252,8 +264,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -268,6 +281,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -361,7 +375,10 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_FLASH_LEDS_ON_DEATH is not set # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -385,6 +402,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -405,6 +425,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -436,7 +457,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -455,11 +479,13 @@ CONFIG_DRIVERS_UART=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_DRIVERS_I2C_CK505=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y @@ -626,7 +652,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -641,6 +666,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode index 1b4b4202..b11e0db9 100644 --- a/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode +++ b/config/coreboot/t60_intelgpu/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad T60" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad T60" @@ -123,25 +132,27 @@ CONFIG_MAX_CPUS=2 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t60" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -151,20 +162,22 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T60" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -198,7 +211,6 @@ CONFIG_BOARD_LENOVO_T60=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="IBM0057" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -252,8 +264,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -268,6 +281,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -361,7 +375,10 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_FLASH_LEDS_ON_DEATH is not set # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -385,6 +402,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -403,6 +423,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -434,7 +455,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -453,11 +477,13 @@ CONFIG_DRIVERS_UART=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_DRIVERS_I2C_CK505=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y @@ -624,7 +650,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -639,6 +664,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/t60_intelgpu/target.cfg b/config/coreboot/t60_intelgpu/target.cfg index c1e3a3c6..f41e3fe9 100644 --- a/config/coreboot/t60_intelgpu/target.cfg +++ b/config/coreboot/t60_intelgpu/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" grub_scan_disk="ahci" build_depend="seabios/default grub/default u-boot/i386coreboot" -payload_uboot_i386="y" +payload_uboot="i386" diff --git a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb index d8642c08..91cea560 100644 --- a/config/coreboot/w500_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/w500_16mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad W500" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W500" @@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_W500=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -262,8 +274,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -278,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -365,6 +379,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -377,6 +393,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -401,6 +418,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -421,6 +441,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -453,7 +474,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -473,11 +497,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -649,7 +675,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -671,6 +696,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/w500_16mb/config/libgfxinit_txtmode b/config/coreboot/w500_16mb/config/libgfxinit_txtmode index 6e094553..59326aca 100644 --- a/config/coreboot/w500_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/w500_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad W500" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W500" @@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_W500=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -260,8 +272,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -276,6 +289,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -363,6 +377,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -375,6 +391,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -399,6 +416,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -417,6 +437,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -449,7 +470,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -469,11 +493,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -645,7 +671,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -667,6 +692,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/w500_16mb/target.cfg b/config/coreboot/w500_16mb/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/w500_16mb/target.cfg +++ b/config/coreboot/w500_16mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb index 0e2b4963..be7c6931 100644 --- a/config/coreboot/w500_4mb/config/libgfxinit_corebootfb +++ b/config/coreboot/w500_4mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad W500" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W500" @@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_W500=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -262,8 +274,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -278,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -365,6 +379,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -377,6 +393,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -401,6 +418,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -421,6 +441,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -453,7 +474,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -473,11 +497,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -649,7 +675,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -671,6 +696,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/w500_4mb/config/libgfxinit_txtmode b/config/coreboot/w500_4mb/config/libgfxinit_txtmode index bc35cd23..cc520d46 100644 --- a/config/coreboot/w500_4mb/config/libgfxinit_txtmode +++ b/config/coreboot/w500_4mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad W500" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W500" @@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_W500=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -260,8 +272,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -276,6 +289,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -363,6 +377,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -375,6 +391,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -399,6 +416,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -417,6 +437,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -449,7 +470,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -469,11 +493,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -645,7 +671,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -667,6 +692,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/w500_4mb/target.cfg b/config/coreboot/w500_4mb/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/w500_4mb/target.cfg +++ b/config/coreboot/w500_4mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb index ed2cd9ef..8af6b5b5 100644 --- a/config/coreboot/w500_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/w500_8mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad W500" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W500" @@ -125,27 +134,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -159,12 +170,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_W500=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -262,8 +274,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -278,6 +291,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -365,6 +379,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -377,6 +393,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -401,6 +418,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -421,6 +441,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -453,7 +474,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -473,11 +497,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -649,7 +675,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -671,6 +696,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/w500_8mb/config/libgfxinit_txtmode b/config/coreboot/w500_8mb/config/libgfxinit_txtmode index e998c77b..19d473b2 100644 --- a/config/coreboot/w500_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/w500_8mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad W500" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W500" @@ -123,27 +132,29 @@ CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="t400" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_W500=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -260,8 +272,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -276,6 +289,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -363,6 +377,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -375,6 +391,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -399,6 +416,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -417,6 +437,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -449,7 +470,10 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -469,11 +493,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -645,7 +671,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -667,6 +692,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/w500_8mb/target.cfg b/config/coreboot/w500_8mb/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/w500_8mb/target.cfg +++ b/config/coreboot/w500_8mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb index 869e0a4b..50141db1 100644 --- a/config/coreboot/w530_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/w530_12mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_FAMILY="ThinkPad W530" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W530" CONFIG_MAINBOARD_VERSION="1.0" @@ -122,28 +131,30 @@ CONFIG_MAX_CPUS=8 CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="w530" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W530" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -158,12 +169,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W530" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -171,8 +180,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -207,7 +220,6 @@ CONFIG_BOARD_LENOVO_W530=y # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_VBOOT_SLOTS_RW_AB=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0071" CONFIG_PS2M_EISAID="LEN0015" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" @@ -264,9 +276,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -283,6 +296,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -330,6 +344,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -377,6 +396,8 @@ CONFIG_H8_FLASH_LEDS_ON_DEATH=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -392,6 +413,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -415,6 +437,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -435,6 +460,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -466,9 +492,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -490,11 +519,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -547,7 +578,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -656,7 +686,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -677,6 +706,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/w530_12mb/config/libgfxinit_txtmode b/config/coreboot/w530_12mb/config/libgfxinit_txtmode index 3d247345..35e909a6 100644 --- a/config/coreboot/w530_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/w530_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_FAMILY="ThinkPad W530" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W530" CONFIG_MAINBOARD_VERSION="1.0" @@ -120,28 +129,30 @@ CONFIG_MAX_CPUS=8 CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="w530" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W530" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -156,12 +167,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W530" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -169,8 +178,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_W530=y # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_VBOOT_SLOTS_RW_AB=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0071" CONFIG_PS2M_EISAID="LEN0015" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" @@ -262,9 +274,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -281,6 +294,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -328,6 +342,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -375,6 +394,8 @@ CONFIG_H8_FLASH_LEDS_ON_DEATH=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -390,6 +411,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -413,6 +435,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -431,6 +456,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -462,9 +488,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -486,11 +515,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -544,7 +575,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -653,7 +683,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -674,6 +703,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/w530_12mb/target.cfg b/config/coreboot/w530_12mb/target.cfg index 6cbab731..595ad782 100644 --- a/config/coreboot/w530_12mb/target.cfg +++ b/config/coreboot/w530_12mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb index 944e3b3d..7e7e0196 100644 --- a/config/coreboot/w541_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/w541_12mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -76,15 +79,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -105,7 +112,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_FAMILY="ThinkPad W541" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W541" CONFIG_MAINBOARD_VERSION="1.0" @@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=8 CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="w541" CONFIG_OVERRIDE_DEVICETREE="" +CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xff7c0000 CONFIG_DCACHE_RAM_SIZE=0x40000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -160,18 +171,20 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 # CONFIG_ENABLE_DDR_2X_REFRESH is not set CONFIG_PCIEXP_AER=y -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541" CONFIG_HAVE_IFD_BIN=y # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set CONFIG_BOARD_LENOVO_THINKPAD_W541=y # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -262,9 +275,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xe8000000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -283,6 +297,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_DISABLE_ME_PCI=y CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -386,6 +401,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -408,6 +424,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -428,6 +447,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -456,9 +476,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -481,6 +504,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -535,7 +559,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -645,7 +668,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -667,6 +689,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/w541_12mb/config/libgfxinit_txtmode b/config/coreboot/w541_12mb/config/libgfxinit_txtmode index e07e8867..e5ea50f6 100644 --- a/config/coreboot/w541_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/w541_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -58,6 +59,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -69,6 +71,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -76,15 +79,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -105,7 +112,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_MAINBOARD_FAMILY="ThinkPad W541" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W541" CONFIG_MAINBOARD_VERSION="1.0" @@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=8 CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="w541" CONFIG_OVERRIDE_DEVICETREE="" +CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_CLK_PM=y CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xff7c0000 CONFIG_DCACHE_RAM_SIZE=0x40000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -158,18 +169,20 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 # CONFIG_ENABLE_DDR_2X_REFRESH is not set CONFIG_PCIEXP_AER=y -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541" CONFIG_HAVE_IFD_BIN=y # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set CONFIG_BOARD_LENOVO_THINKPAD_W541=y # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -260,9 +273,10 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xe8000000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -281,6 +295,7 @@ CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_DISABLE_ME_PCI=y CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -384,6 +399,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -406,6 +422,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -424,6 +443,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -452,9 +472,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -477,6 +500,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -532,7 +556,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -642,7 +665,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -664,6 +686,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/w541_12mb/target.cfg b/config/coreboot/w541_12mb/target.cfg index 96fbb9e3..47e228b7 100644 --- a/config/coreboot/w541_12mb/target.cfg +++ b/config/coreboot/w541_12mb/target.cfg @@ -6,7 +6,7 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="nvme ahci" -grubtree="xhci" +grubtree="xhci_nvme" vcfg="haswell" -build_depend="seabios/default grub/xhci memtest86plus u-boot/amd64coreboot" -payload_uboot_amd64="y" +build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot" +payload_uboot="amd64" diff --git a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb index 646aa044..20f5bbda 100644 --- a/config/coreboot/x200_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/x200_16mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X200" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X200" @@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x200" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_X200=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -259,8 +271,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -275,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -360,6 +374,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -372,6 +388,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -395,6 +412,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -415,6 +435,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -447,11 +468,14 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_DRIVERS_LENOVO_WACOM=y CONFIG_DIGITIZER_AUTODETECT=y # CONFIG_DIGITIZER_PRESENT is not set # CONFIG_DIGITIZER_ABSENT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -471,11 +495,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -628,7 +654,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -650,6 +675,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x200_16mb/config/libgfxinit_txtmode b/config/coreboot/x200_16mb/config/libgfxinit_txtmode index dd4c7e97..d1635db3 100644 --- a/config/coreboot/x200_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/x200_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X200" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X200" @@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x200" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -155,12 +166,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -168,8 +177,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -203,7 +216,6 @@ CONFIG_BOARD_LENOVO_X200=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -257,8 +269,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -273,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -358,6 +372,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -370,6 +386,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -393,6 +410,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -411,6 +431,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -443,11 +464,14 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_DRIVERS_LENOVO_WACOM=y CONFIG_DIGITIZER_AUTODETECT=y # CONFIG_DIGITIZER_PRESENT is not set # CONFIG_DIGITIZER_ABSENT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -467,11 +491,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -624,7 +650,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -646,6 +671,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x200_16mb/target.cfg b/config/coreboot/x200_16mb/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/x200_16mb/target.cfg +++ b/config/coreboot/x200_16mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb index 0a7710f4..63166703 100644 --- a/config/coreboot/x200_4mb/config/libgfxinit_corebootfb +++ b/config/coreboot/x200_4mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X200" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X200" @@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x200" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_X200=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -259,8 +271,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -275,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -360,6 +374,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -372,6 +388,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -395,6 +412,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -415,6 +435,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -447,11 +468,14 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_DRIVERS_LENOVO_WACOM=y CONFIG_DIGITIZER_AUTODETECT=y # CONFIG_DIGITIZER_PRESENT is not set # CONFIG_DIGITIZER_ABSENT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -471,11 +495,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -628,7 +654,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -650,6 +675,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x200_4mb/config/libgfxinit_txtmode b/config/coreboot/x200_4mb/config/libgfxinit_txtmode index 68f067fa..197e4ea4 100644 --- a/config/coreboot/x200_4mb/config/libgfxinit_txtmode +++ b/config/coreboot/x200_4mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X200" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X200" @@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x200" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -155,12 +166,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -168,8 +177,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -203,7 +216,6 @@ CONFIG_BOARD_LENOVO_X200=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -257,8 +269,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -273,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -358,6 +372,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -370,6 +386,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -393,6 +410,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -411,6 +431,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -443,11 +464,14 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_DRIVERS_LENOVO_WACOM=y CONFIG_DIGITIZER_AUTODETECT=y # CONFIG_DIGITIZER_PRESENT is not set # CONFIG_DIGITIZER_ABSENT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -467,11 +491,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -624,7 +650,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -646,6 +671,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x200_4mb/target.cfg b/config/coreboot/x200_4mb/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/x200_4mb/target.cfg +++ b/config/coreboot/x200_4mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb index 15b698e4..ddaefa7a 100644 --- a/config/coreboot/x200_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/x200_8mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X200" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X200" @@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x200" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_X200=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -259,8 +271,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -275,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -360,6 +374,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -372,6 +388,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -395,6 +412,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -415,6 +435,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -447,11 +468,14 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_DRIVERS_LENOVO_WACOM=y CONFIG_DIGITIZER_AUTODETECT=y # CONFIG_DIGITIZER_PRESENT is not set # CONFIG_DIGITIZER_ABSENT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -471,11 +495,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -628,7 +654,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -650,6 +675,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x200_8mb/config/libgfxinit_txtmode b/config/coreboot/x200_8mb/config/libgfxinit_txtmode index 2d2f81f2..ccc5904d 100644 --- a/config/coreboot/x200_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/x200_8mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X200" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X200" @@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x200" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -155,12 +166,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -168,8 +177,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -203,7 +216,6 @@ CONFIG_BOARD_LENOVO_X200=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="LEN0010" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -257,8 +269,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -273,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -358,6 +372,8 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y # @@ -370,6 +386,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -393,6 +410,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -411,6 +431,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -443,11 +464,14 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_DRIVERS_LENOVO_WACOM=y CONFIG_DIGITIZER_AUTODETECT=y # CONFIG_DIGITIZER_PRESENT is not set # CONFIG_DIGITIZER_ABSENT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -467,11 +491,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -624,7 +650,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -646,6 +671,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x200_8mb/target.cfg b/config/coreboot/x200_8mb/target.cfg index 53a597b6..f4d81d19 100644 --- a/config/coreboot/x200_8mb/target.cfg +++ b/config/coreboot/x200_8mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb index 9661ff3c..e72892ff 100644 --- a/config/coreboot/x220_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/x220_8mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X220" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X220" @@ -123,28 +132,30 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x220" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X220" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 @@ -160,12 +171,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X220" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -173,8 +182,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -208,7 +221,6 @@ CONFIG_BOARD_LENOVO_X220=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="LEN0020" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -264,9 +276,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -283,6 +296,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -330,6 +344,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -377,6 +396,7 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -392,6 +412,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -415,6 +436,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -435,6 +459,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -466,9 +491,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -490,11 +518,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -546,7 +576,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -655,7 +684,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -677,6 +705,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x220_8mb/config/libgfxinit_txtmode b/config/coreboot/x220_8mb/config/libgfxinit_txtmode index 089c3e0b..e0072f13 100644 --- a/config/coreboot/x220_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/x220_8mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X220" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X220" @@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x220" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X220" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 @@ -158,12 +169,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx20/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X220" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -171,8 +180,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -206,7 +219,6 @@ CONFIG_BOARD_LENOVO_X220=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="LEN0020" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -262,9 +274,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -281,6 +294,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -328,6 +342,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -375,6 +394,7 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -390,6 +410,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -413,6 +434,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -431,6 +455,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -462,9 +487,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -486,11 +514,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -543,7 +573,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -652,7 +681,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -674,6 +702,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x220_8mb/target.cfg b/config/coreboot/x220_8mb/target.cfg index 333030ce..d7510b96 100644 --- a/config/coreboot/x220_8mb/target.cfg +++ b/config/coreboot/x220_8mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="sandybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb index b2efa38a..cba17129 100644 --- a/config/coreboot/x230_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/x230_12mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X230" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230" @@ -123,28 +132,30 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x230" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -159,12 +170,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -208,7 +221,6 @@ CONFIG_BOARD_LENOVO_X230=y # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_VBOOT_SLOTS_RW_AB=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="LEN0020" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" @@ -264,9 +276,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -283,6 +296,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -330,6 +344,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -377,6 +396,7 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -392,6 +412,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -415,6 +436,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -435,6 +459,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -466,9 +491,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -490,11 +518,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -546,7 +576,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -655,7 +684,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -676,6 +704,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x230_12mb/config/libgfxinit_txtmode b/config/coreboot/x230_12mb/config/libgfxinit_txtmode index f92b4ace..73fe0a42 100644 --- a/config/coreboot/x230_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/x230_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X230" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230" @@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x230" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -157,12 +168,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -206,7 +219,6 @@ CONFIG_BOARD_LENOVO_X230=y # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_VBOOT_SLOTS_RW_AB=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="LEN0020" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" @@ -262,9 +274,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -281,6 +294,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -328,6 +342,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -375,6 +394,7 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -390,6 +410,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -413,6 +434,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -431,6 +455,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -462,9 +487,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -486,11 +514,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -543,7 +573,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -652,7 +681,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -673,6 +701,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x230_12mb/target.cfg b/config/coreboot/x230_12mb/target.cfg index 6cbab731..595ad782 100644 --- a/config/coreboot/x230_12mb/target.cfg +++ b/config/coreboot/x230_12mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb index 1bd1259b..f8348375 100644 --- a/config/coreboot/x230_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/x230_16mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X230" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230" @@ -123,28 +132,30 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x230" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -159,12 +170,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -208,7 +221,6 @@ CONFIG_BOARD_LENOVO_X230=y # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_VBOOT_SLOTS_RW_AB=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="LEN0020" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" @@ -264,9 +276,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -283,6 +296,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -330,6 +344,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -377,6 +396,7 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -392,6 +412,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -415,6 +436,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -435,6 +459,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -466,9 +491,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -490,11 +518,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -546,7 +576,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -655,7 +684,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -676,6 +704,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x230_16mb/config/libgfxinit_txtmode b/config/coreboot/x230_16mb/config/libgfxinit_txtmode index 93511360..c4dda6a9 100644 --- a/config/coreboot/x230_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/x230_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X230" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230" @@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x230" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -157,12 +168,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -206,7 +219,6 @@ CONFIG_BOARD_LENOVO_X230=y # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_VBOOT_SLOTS_RW_AB=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="LEN0020" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" @@ -262,9 +274,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -281,6 +294,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -328,6 +342,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -375,6 +394,7 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -390,6 +410,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -413,6 +434,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -431,6 +455,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -462,9 +487,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -486,11 +514,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -543,7 +573,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -652,7 +681,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -673,6 +701,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x230_16mb/target.cfg b/config/coreboot/x230_16mb/target.cfg index 6cbab731..595ad782 100644 --- a/config/coreboot/x230_16mb/target.cfg +++ b/config/coreboot/x230_16mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb index 94bc6d0b..c2ef35aa 100644 --- a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X230t" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230t" @@ -123,28 +132,30 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x230" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -159,12 +170,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -208,7 +221,6 @@ CONFIG_BOARD_LENOVO_X230T=y # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_VBOOT_SLOTS_RW_AB=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="LEN0020" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" @@ -264,9 +276,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -283,6 +296,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -330,6 +344,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -377,6 +396,7 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -392,6 +412,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -415,6 +436,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -435,6 +459,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -466,9 +491,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -490,11 +518,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -546,7 +576,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -655,7 +684,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -676,6 +704,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode index 98a489a6..b161f781 100644 --- a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X230t" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230t" @@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x230" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -157,12 +168,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -206,7 +219,6 @@ CONFIG_BOARD_LENOVO_X230T=y # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_VBOOT_SLOTS_RW_AB=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="LEN0020" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" @@ -262,9 +274,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -281,6 +294,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -328,6 +342,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -375,6 +394,7 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -390,6 +410,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -413,6 +434,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -431,6 +455,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -462,9 +487,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -486,11 +514,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -543,7 +573,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -652,7 +681,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -673,6 +701,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x230t_12mb/target.cfg b/config/coreboot/x230t_12mb/target.cfg index 6cbab731..595ad782 100644 --- a/config/coreboot/x230t_12mb/target.cfg +++ b/config/coreboot/x230t_12mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb index 94a44d3a..9a1dd06b 100644 --- a/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/x230t_16mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X230t" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230t" @@ -123,28 +132,30 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x230" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -159,12 +170,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -172,8 +181,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -208,7 +221,6 @@ CONFIG_BOARD_LENOVO_X230T=y # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_VBOOT_SLOTS_RW_AB=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="LEN0020" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" @@ -264,9 +276,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -283,6 +296,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -330,6 +344,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -377,6 +396,7 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -392,6 +412,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -415,6 +436,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -435,6 +459,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -466,9 +491,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -490,11 +518,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -546,7 +576,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -655,7 +684,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -676,6 +704,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode index 6cf264f6..5a213187 100644 --- a/config/coreboot/x230t_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/x230t_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_NO_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X230t" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230t" @@ -121,28 +130,30 @@ CONFIG_MAX_CPUS=8 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x230" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" CONFIG_DRAM_RESET_GATE_GPIO=10 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_DCACHE_RAM_BASE=0xfefe0000 CONFIG_DCACHE_RAM_SIZE=0x20000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 @@ -157,12 +168,10 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/16_ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X230t" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -206,7 +219,6 @@ CONFIG_BOARD_LENOVO_X230T=y # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_VBOOT_SLOTS_RW_AB=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="LEN0020" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" @@ -262,9 +274,10 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -281,6 +294,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -328,6 +342,11 @@ CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y # CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set # CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set CONFIG_RAMINIT_ENABLE_ECC=y +CONFIG_IGD_DEFAULT_UMA_SIZE_32MB=y +# CONFIG_IGD_DEFAULT_UMA_SIZE_64MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_96MB is not set +# CONFIG_IGD_DEFAULT_UMA_SIZE_128MB is not set +CONFIG_IGD_DEFAULT_UMA_INDEX=0 # # Southbridge @@ -375,6 +394,7 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y +CONFIG_H8_HAS_WWAN_GPIO_DETECTION=y CONFIG_EC_LENOVO_PMH7=y # @@ -390,6 +410,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -413,6 +434,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -431,6 +455,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -462,9 +487,12 @@ CONFIG_USE_DDR3=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -486,11 +514,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y @@ -543,7 +573,6 @@ CONFIG_TPM=y CONFIG_MAINBOARD_HAS_TPM1=y # CONFIG_TPM_DEACTIVATE is not set # CONFIG_DEBUG_TPM is not set -# CONFIG_TPM_RDRESP_NEED_DELAY is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -652,7 +681,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -673,6 +701,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x230t_16mb/target.cfg b/config/coreboot/x230t_16mb/target.cfg index 6cbab731..595ad782 100644 --- a/config/coreboot/x230t_16mb/target.cfg +++ b/config/coreboot/x230t_16mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" grub_scan_disk="ahci" vcfg="ivybridge" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/x2e_n150/config/fspgop index f6ce2076..6dad173c 100644 --- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/x2e_n150/config/fspgop @@ -17,7 +17,7 @@ CONFIG_COMPILER_GCC=y # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set CONFIG_OPTION_BACKEND_NONE=y -# CONFIG_USE_OPTION_TABLE is not set +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set CONFIG_SEPARATE_ROMSTAGE=y @@ -66,7 +66,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CLEVO is not set # CONFIG_VENDOR_COMPULAB is not set # CONFIG_VENDOR_CWWK is not set -CONFIG_VENDOR_DELL=y +# CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set # CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set @@ -88,6 +88,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LIBRETREND is not set # CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -108,24 +109,21 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set -# CONFIG_VENDOR_TOPTON is not set +CONFIG_VENDOR_TOPTON=y # CONFIG_VENDOR_UP is not set # CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y -CONFIG_MAINBOARD_PART_NUMBER="OptiPlex 3050 Micro" +CONFIG_MAINBOARD_PART_NUMBER="X2E_N150" CONFIG_MAINBOARD_VERSION="1.0" -CONFIG_MAINBOARD_DIR="dell/optiplex_3050" -CONFIG_VGA_BIOS_ID="8086,0406" +CONFIG_MAINBOARD_DIR="topton/adl" CONFIG_DIMM_MAX=4 CONFIG_DIMM_SPD_SIZE=512 CONFIG_FMDFILE="" # CONFIG_NO_POST is not set -CONFIG_MAINBOARD_VENDOR="Dell Inc." -CONFIG_CBFS_SIZE=0xEEE000 +CONFIG_MAINBOARD_VENDOR="TOPTON" +CONFIG_CBFS_SIZE=0xBEC000 CONFIG_CONSOLE_SERIAL=y -CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=2160 -CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=3840 -CONFIG_MAX_CPUS=16 +CONFIG_MAX_CPUS=24 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y @@ -137,75 +135,52 @@ CONFIG_DEVICETREE="devicetree.cb" CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_L1_SUB_STATE=y CONFIG_PCIEXP_CLK_PM=y -CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Dell Inc." -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 +CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="TOPTON" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000 CONFIG_ECAM_MMCONF_BUS_NUMBER=256 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" # CONFIG_FATAL_ASSERTS is not set -CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" +CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data_twl.vbt" # CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set -CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="OptiPlex 3050 Micro" +CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0x4000 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="X2E_N150" # CONFIG_CONSOLE_POST is not set -CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" -CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_USE_PM_ACPI_TIMER=y -# CONFIG_BOARD_DELL_E6400 is not set -# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set -CONFIG_BOARD_DELL_OPTIPLEX_3050=y -# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set -# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set -# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set -# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set -# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set -# CONFIG_BOARD_DELL_LATITUDE_E5520 is not set -# CONFIG_BOARD_DELL_LATITUDE_E6220 is not set -# CONFIG_BOARD_DELL_LATITUDE_E6320 is not set -# CONFIG_BOARD_DELL_LATITUDE_E6420 is not set -# CONFIG_BOARD_DELL_LATITUDE_E6520 is not set -# CONFIG_BOARD_DELL_LATITUDE_E5530 is not set -# CONFIG_BOARD_DELL_LATITUDE_E6230 is not set -# CONFIG_BOARD_DELL_LATITUDE_E6330 is not set -# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set -# CONFIG_BOARD_DELL_LATITUDE_E6530 is not set -# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set -# CONFIG_BOARD_DELL_PRECISION_T1650 is not set -# CONFIG_BOARD_DELL_XPS_8300 is not set CONFIG_DCACHE_RAM_BASE=0xfef00000 -CONFIG_DCACHE_RAM_SIZE=0x40000 +CONFIG_DCACHE_RAM_SIZE=0xc0000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 -CONFIG_DCACHE_BSP_STACK_SIZE=0x4000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x88000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y -CONFIG_USE_LEGACY_8254_TIMER=y CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 CONFIG_DRIVERS_INTEL_WIFI=y -CONFIG_IFD_BIN_PATH="../../../config/ifd/3050micro/ifd" -CONFIG_ME_BIN_PATH="../../../vendorfiles/3050micro/me.bin" -CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU=y -CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_IFD_BIN_PATH="../../../config/ifd/x2e_n150/ifd" +CONFIG_ME_BIN_PATH="../../../vendorfiles/x2e_n150/me.bin" +CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x40000 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y +# CONFIG_USE_LEGACY_8254_TIMER is not set # CONFIG_DEBUG_SMI is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE is not set CONFIG_HAVE_IFD_BIN=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" -CONFIG_GFX_GMA_PANEL_1_PORT="eDP" CONFIG_TTYS0_BAUD=115200 # CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y -CONFIG_GFX_GMA_PANEL_1_ON_EDP=y CONFIG_DRIVERS_UART_8250IO=y CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 +CONFIG_FSP_TEMP_RAM_SIZE=0x20000 CONFIG_HEAP_SIZE=0x100000 CONFIG_EC_GPE_SCI=0x50 CONFIG_EC_STARLABS_BATTERY_MODEL="Unknown" CONFIG_EC_STARLABS_BATTERY_TYPE="LION" CONFIG_EC_STARLABS_BATTERY_OEM="Unknown" +# CONFIG_TME_KEY_REGENERATION_ON_WARM_BOOT is not set +# CONFIG_BOARD_TOPTON_X2F_N100 is not set +CONFIG_BOARD_TOPTON_X2E_N150=y CONFIG_BOARD_ROMSIZE_KB_16384=y # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set # CONFIG_COREBOOT_ROMSIZE_KB_512 is not set @@ -238,9 +213,9 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 # # SoC # -CONFIG_CHIPSET_DEVICETREE="soc/intel/skylake/chipset.cb" -CONFIG_FSP_M_FILE="../../../vendorfiles/kabylake/Fsp_M.fd" -CONFIG_FSP_S_FILE="../../../vendorfiles/kabylake/Fsp_S.fd" +CONFIG_CHIPSET_DEVICETREE="soc/intel/alderlake/chipset.cb" +CONFIG_FSP_M_FILE="../../../vendorfiles/alderlake-n/Fsp_M.fd" +CONFIG_FSP_S_FILE="../../../vendorfiles/alderlake-n/Fsp_S.fd" CONFIG_CBFS_MCACHE_SIZE=0x4000 CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 @@ -248,48 +223,72 @@ CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x200000 CONFIG_SMM_MODULE_STACK_SIZE=0x800 CONFIG_ACPI_BERT_SIZE=0x0 -CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120 +CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=133 +CONFIG_VBOOT_HASH_BLOCK_SIZE=0x1000 +CONFIG_CPU_PT_ROM_MAP_GB=512 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 -CONFIG_IFD_CHIPSET="sklkbl" +CONFIG_SOC_INTEL_ALDERLAKE=y +CONFIG_SOC_INTEL_TWINLAKE=y +CONFIG_SOC_INTEL_ALDERLAKE_PCH_N=y +CONFIG_SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT=y +CONFIG_ALDERLAKE_CAR_ENHANCED_NEM=y +CONFIG_EXT_BIOS_WIN_BASE=0xf8000000 +CONFIG_EXT_BIOS_WIN_SIZE=0x2000000 +CONFIG_IFD_CHIPSET="adl" CONFIG_IED_REGION_SIZE=0x400000 -CONFIG_MAX_ROOT_PORTS=24 +CONFIG_MAX_PCH_ROOT_PORTS=12 +CONFIG_MAX_CPU_ROOT_PORTS=0 +CONFIG_MAX_TBT_ROOT_PORTS=0 +CONFIG_MAX_ROOT_PORTS=12 +CONFIG_MAX_PCIE_CLOCK_SRC=5 +CONFIG_MAX_PCIE_CLOCK_REQ=5 CONFIG_PCR_BASE_ADDRESS=0xfd000000 CONFIG_CPU_BCLK_MHZ=100 +CONFIG_SOC_INTEL_PERFORMANCE_CORE_SCALE_FACTOR=127 +CONFIG_SOC_INTEL_EFFICIENT_CORE_SCALE_FACTOR=100 CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120 -CONFIG_CPU_XTAL_HZ=24000000 -CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2 -CONFIG_SOC_INTEL_I2C_DEV_MAX=6 +CONFIG_CPU_XTAL_HZ=38400000 +CONFIG_SOC_INTEL_UFS_CLK_FREQ_HZ=19200000 +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=7 +CONFIG_SOC_INTEL_I2C_DEV_MAX=8 # CONFIG_ENABLE_SATA_TEST_MODE is not set -CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30 -CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35 -CONFIG_FSP_HEADER_PATH="3rdparty/fsp/KabylakeFspBinPkg/Include/" -CONFIG_FSP_FD_PATH="3rdparty/fsp/KabylakeFspBinPkg/Fsp.fd" +CONFIG_SOC_INTEL_UART_DEV_MAX=7 +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a +CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff +CONFIG_FSP_TYPE_IOT=y +CONFIG_FSP_HEADER_PATH="3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Include/" +CONFIG_FSP_FD_PATH="3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Fsp.fd" CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT=0 -CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 -CONFIG_INTEL_GMA_BCLV_WIDTH=16 -CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 -CONFIG_INTEL_GMA_BCLM_WIDTH=16 +CONFIG_DATA_BUS_WIDTH=128 +CONFIG_DIMMS_PER_CHANNEL=2 +CONFIG_MRC_CHANNEL_WIDTH=16 +CONFIG_ALDERLAKE_ENABLE_SOC_WORKAROUND=y +CONFIG_SI_DESC_REGION="SI_DESC" +CONFIG_SI_DESC_REGION_SZ=4096 +CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8258 +CONFIG_INTEL_GMA_BCLV_WIDTH=32 +CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8254 +CONFIG_INTEL_GMA_BCLM_WIDTH=32 CONFIG_FSP_PUBLISH_MBP_HOB=y +# CONFIG_INCLUDE_HSPHY_IN_FMAP is not set +CONFIG_HSPHY_FW_MAX_SIZE=0x8000 +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ=0x2005 CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003 -CONFIG_MAX_HECI_DEVICES=5 +CONFIG_MAX_HECI_DEVICES=6 CONFIG_BOOTBLOCK_IN_CBFS=y CONFIG_HAVE_PAM0_REGISTER=y CONFIG_PCIEXP_COMMON_CLOCK=y -CONFIG_INTEL_TXT_BIOSACM_ALIGNMENT=0x40000 -CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=10 +CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4 CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0 CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003 CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003 CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 -CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE=y -CONFIG_SOC_INTEL_KABYLAKE=y -CONFIG_SKYLAKE_SOC_PCH_H=y -CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU=y -CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU=y +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FSP_T_LOCATION=0xfffe0000 +CONFIG_INTEL_TME=y CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y CONFIG_FIXED_SMBUS_IO_BASE=0xefa0 CONFIG_CBFS_CACHE_ALIGN=8 @@ -303,8 +302,14 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP_LPM_REQ=y CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPU_HYBRID=y +CONFIG_SOC_INTEL_UFS_OCP_TIMER_DISABLE=y +CONFIG_SOC_INTEL_UFS_LTR_DISQUALIFY=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ASPM=y CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y +CONFIG_SOC_INTEL_COMMON_BLOCK_CNVI=y CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y @@ -312,83 +317,98 @@ CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y CONFIG_INTEL_CAR_NEM_ENHANCED=y +CONFIG_INTEL_CAR_ENEM_USE_EFFECTIVE_WAY_SIZE=y +CONFIG_CAR_HAS_SF_MASKS=y +CONFIG_COS_MAPPED_TO_MSB=y +CONFIG_CAR_HAS_L3_PROTECTED_WAYS=y # CONFIG_USE_INTEL_FSP_MP_INIT is not set +CONFIG_USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI=y +CONFIG_CPU_SUPPORTS_INTEL_TME=y CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y CONFIG_HAVE_HYPERTHREADING=y -# CONFIG_FSP_HYPERTHREADING is not set +CONFIG_FSP_HYPERTHREADING=y # CONFIG_INTEL_KEYLOCKER is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set -# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB is not set -CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB=y CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y -CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR=y +CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC=y +CONFIG_SOC_INTEL_CSE_SEND_EOP_LATE=y CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME" -CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A" -CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B" CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw" -CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash" CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version" CONFIG_SOC_INTEL_CSE_RW_FILE="" CONFIG_SOC_INTEL_CSE_RW_VERSION="" +CONFIG_SOC_INTEL_CSE_SET_EOP=y CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom" CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE="" CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy" CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE="" +CONFIG_SOC_INTEL_CSE_HAVE_SPEC_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_ME_SPEC_16=y +CONFIG_ME_SPEC=16 CONFIG_CSE_RESET_CLEAR_EC_AP_IDLE_FLAG=y CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y +CONFIG_SOC_INTEL_COMMON_BLOCK_DTT=y CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y +CONFIG_FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW=y CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y -CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LOCK_USING_SBI=y CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y -CONFIG_SOC_INTEL_GFX_HAVE_DDI_A_BIFURCATION=y # CONFIG_SOC_INTEL_DISABLE_IGD is not set CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y +CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2=y CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y +CONFIG_SOC_INTEL_COMMON_BLOCK_IPU=y +CONFIG_SOC_INTEL_COMMON_BLOCK_IRQ=y CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y +CONFIG_SOC_INTEL_COMMON_BLOCK_MEMINIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_OC_WDT=y +# CONFIG_SOC_INTEL_COMMON_OC_WDT_ENABLE is not set CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE_RTD3=y CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y -CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE=y +CONFIG_SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION=y +CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_EPOC=y +CONFIG_PMC_IPC_ACPI_INTERFACE=y CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y -CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_LOCK_MEMORY=y CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y -# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE=y CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0 CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y -CONFIG_SA_ENABLE_DPR=y CONFIG_HAVE_CAPID_A_REGISTER=y CONFIG_HAVE_BDSM_BGSM_REGISTER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_TCSS=y +# CONFIG_TCSS_HAS_USBC_OPS is not set CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y -CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV=y +CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC=y CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y +CONFIG_SOC_INTEL_COMMON_BLOCK_USB4=y +CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE=y +CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI=y +CONFIG_DEFAULT_SOFTWARE_CONNECTION_MANAGER=y +# CONFIG_FIRMWARE_CONNECTION_MANAGER is not set +CONFIG_SOFTWARE_CONNECTION_MANAGER=y +CONFIG_SOC_INTEL_COMMON_BLOCK_VTD=y +# CONFIG_ENABLE_EARLY_DMA_PROTECTION is not set CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y @@ -407,12 +427,14 @@ CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y # Intel SoC Common coreboot stages and non-IP blocks # CONFIG_SOC_INTEL_COMMON_BASECODE=y +CONFIG_SOC_INTEL_COMMON_BASECODE_RAMTOP=y CONFIG_SOC_INTEL_COMMON_RESET=y CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y CONFIG_PAVP=y -# CONFIG_MMA is not set -CONFIG_SOC_INTEL_COMMON_NHLT=y # CONFIG_SOC_INTEL_DEBUG_CONSENT is not set +CONFIG_HAVE_INTEL_COMPLIANCE_TEST_MODE=y +# CONFIG_SOC_INTEL_COMPLIANCE_TEST_MODE is not set +CONFIG_HAS_INTEL_CPU_ROOT_PORTS=y # # CPU @@ -422,6 +444,7 @@ CONFIG_CPU_INTEL_COMMON=y CONFIG_ENABLE_VMX=y CONFIG_SET_IA32_FC_LOCK_BIT=y CONFIG_SET_MSR_AESNI_LOCK_BIT=y +CONFIG_CPU_INTEL_COMMON_VOLTAGE=y CONFIG_CPU_INTEL_COMMON_SMM=y CONFIG_PARALLEL_MP=y CONFIG_PARALLEL_MP_AP_WORK=y @@ -431,7 +454,6 @@ CONFIG_XAPIC_ONLY=y # CONFIG_X2APIC_LATE_WORKAROUND is not set CONFIG_UDELAY_TSC=y CONFIG_TSC_MONOTONIC_TIMER=y -CONFIG_TSC_SYNC_MFENCE=y CONFIG_HAVE_SMI_HANDLER=y CONFIG_SMM_TSEG=y CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8 @@ -456,6 +478,7 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y # CONFIG_PCIEXP_HOTPLUG is not set CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y +CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y # CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000 @@ -464,7 +487,13 @@ CONFIG_RCBA_LENGTH=0x4000 # # Super I/O # -CONFIG_SUPERIO_SMSC_SCH555x=y +CONFIG_SUPERIO_ITE_COMMON_PRE_RAM=y +CONFIG_SUPERIO_ITE_ENV_CTRL=y +CONFIG_SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG=y +CONFIG_SUPERIO_ITE_ENV_CTRL_8BIT_PWM=y +CONFIG_SUPERIO_ITE_ENV_CTRL_PWM_FREQ2=y +CONFIG_SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN=y +CONFIG_SUPERIO_ITE_IT8625E=y # # Embedded Controllers @@ -475,22 +504,20 @@ CONFIG_SUPERIO_SMSC_SCH555x=y # CONFIG_HAVE_ME_BIN=y # CONFIG_STITCH_ME_BIN is not set -# CONFIG_CHECK_ME is not set # CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set -# CONFIG_USE_ME_CLEANER is not set # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_UDK_BASE=y -CONFIG_UDK_2017_BINDING=y +CONFIG_UDK_202111_BINDING=y CONFIG_UDK_2013_VERSION=2013 CONFIG_UDK_2017_VERSION=2017 CONFIG_UDK_202005_VERSION=202005 CONFIG_UDK_202111_VERSION=202111 CONFIG_UDK_202302_VERSION=202302 CONFIG_UDK_202305_VERSION=202305 -CONFIG_UDK_VERSION=2017 +CONFIG_UDK_VERSION=202111 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -499,18 +526,20 @@ CONFIG_ARCH_POSTCAR_X86_32=y CONFIG_ARCH_RAMSTAGE_X86_32=y CONFIG_ARCH_ALL_STAGES_X86_32=y CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y -CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_X86_CUSTOM_BOOTMEDIA=y CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y -CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y CONFIG_BOOTBLOCK_SIMPLE=y # CONFIG_BOOTBLOCK_NORMAL is not set CONFIG_COLLECT_TIMESTAMPS_TSC=y +CONFIG_IDT_IN_EVERY_STAGE=y CONFIG_HAVE_CF9_RESET=y CONFIG_DEBUG_HW_BREAKPOINTS=y +CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y +CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 @@ -521,27 +550,19 @@ CONFIG_DEFAULT_EBDA_SIZE=0x400 # # Devices # -CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y CONFIG_HAVE_LINEAR_FRAMEBUFFER=y CONFIG_HAVE_FSP_GOP=y -CONFIG_MAINBOARD_HAS_LIBGFXINIT=y -CONFIG_MAINBOARD_USE_LIBGFXINIT=y # CONFIG_VGA_ROM_RUN is not set -# CONFIG_RUN_FSP_GOP is not set +CONFIG_RUN_FSP_GOP=y # CONFIG_NO_GFX_INIT is not set CONFIG_NO_EARLY_GFX_INIT=y # # Display # -# CONFIG_VGA_TEXT_FRAMEBUFFER is not set CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set -CONFIG_DEFAULT_SCREEN_ROTATION_NONE=y -# CONFIG_DEFAULT_SCREEN_ROTATION_90 is not set -# CONFIG_DEFAULT_SCREEN_ROTATION_180 is not set -# CONFIG_DEFAULT_SCREEN_ROTATION_270 is not set CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display @@ -569,6 +590,7 @@ CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y # # Generic Drivers # +CONFIG_CRB_TPM=y CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set # CONFIG_DRIVERS_EFI_FW_INFO is not set @@ -584,6 +606,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_OXPCIE is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set @@ -591,37 +614,37 @@ CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set CONFIG_DRIVERS_I2C_DESIGNWARE=y # CONFIG_DRIVERS_I2C_MAX98396 is not set -CONFIG_FSP_USE_REPO=y +# CONFIG_FSP_USE_REPO is not set # CONFIG_DISPLAY_HOBS is not set # CONFIG_DISPLAY_UPD_DATA is not set -# CONFIG_BMP_LOGO is not set CONFIG_PLATFORM_USES_FSP2_0=y +CONFIG_PLATFORM_USES_FSP2_1=y +CONFIG_PLATFORM_USES_FSP2_2=y CONFIG_PLATFORM_USES_FSP2_X86_32=y CONFIG_HAVE_INTEL_FSP_REPO=y CONFIG_ADD_FSP_BINARIES=y CONFIG_FSP_S_CBFS="fsps.bin" CONFIG_FSP_M_CBFS="fspm.bin" -CONFIG_FSP_FULL_FD=y +# CONFIG_FSP_FULL_FD is not set CONFIG_FSP_T_RESERVED_SIZE=0x0 CONFIG_FSP_M_XIP=y -CONFIG_HAVE_FSP_LOGO_SUPPORT=y +CONFIG_FSP_USES_CB_STACK=y CONFIG_SOC_INTEL_COMMON_FSP_RESET=y -CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y -CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y -CONFIG_USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE=y +CONFIG_FSPS_HAS_ARCH_UPD=y +CONFIG_FSPS_USE_MULTI_PHASE_INIT=y +CONFIG_FSP_USES_CB_DEBUG_EVENT_HANDLER=y # CONFIG_DISPLAY_FSP_TIMESTAMPS is not set +CONFIG_FSP_ENABLE_SERIAL_DEBUG=y +CONFIG_FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN=y # CONFIG_BUILDING_WITH_DEBUG_FSP is not set CONFIG_INTEL_GMA_ACPI=y CONFIG_VBT_CBFS_COMPRESSION_LZMA=y # CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set # CONFIG_VBT_CBFS_COMPRESSION_NONE is not set CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" -CONFIG_GFX_GMA=y -CONFIG_GFX_GMA_DYN_CPU=y -CONFIG_GFX_GMA_GENERATION="Skylake" -CONFIG_GFX_GMA_PCH="Sunrise_Point" -CONFIG_GFX_GMA_PANEL_2_PORT="Disabled" -CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC" +CONFIG_INTEL_GMA_OPREGION_2_1=y +CONFIG_INTEL_GMA_VERSION_2=y +CONFIG_HAVE_INTEL_PTT=y # CONFIG_DRIVERS_NXP_UWB_SR1XX is not set # CONFIG_DRIVERS_PS2_KEYBOARD is not set CONFIG_DRIVERS_MC146818=y @@ -631,6 +654,8 @@ CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70 CONFIG_DRIVERS_USB_ACPI=y CONFIG_DRIVERS_WIFI_GENERIC=y CONFIG_DRIVERS_MTK_WIFI=y +CONFIG_MP_SERVICES_PPI=y +CONFIG_MP_SERVICES_PPI_V2=y # end of Generic Drivers # @@ -646,12 +671,15 @@ CONFIG_DRIVERS_MTK_WIFI=y # # Verified Boot (vboot) # +CONFIG_VBOOT_LIB=y # end of Verified Boot (vboot) # # Trusted Platform Module # CONFIG_NO_TPM=y +# CONFIG_TPM1 is not set +# CONFIG_TPM2 is not set CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 @@ -666,6 +694,7 @@ CONFIG_PLATFORM_HAS_DRAM_CLEAR=y # CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set # end of Memory initialization +CONFIG_INTEL_TXT_LIB=y # CONFIG_STM is not set # CONFIG_INTEL_CBNT_SUPPORT is not set CONFIG_BOOTMEDIA_LOCK_NONE=y @@ -678,8 +707,6 @@ CONFIG_ACPI_HAVE_PCAT_8259=y CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y CONFIG_ACPI_SOC_NVS=y CONFIG_ACPI_CUSTOM_MADT=y -CONFIG_ACPI_NO_CUSTOM_MADT=y -CONFIG_ACPI_COMMON_MADT_LAPIC=y CONFIG_ACPI_COMMON_MADT_IOAPIC=y CONFIG_HAVE_ACPI_TABLES=y CONFIG_ACPI_LPIT=y @@ -741,9 +768,7 @@ CONFIG_ACPI_S1_NOT_SUPPORTED=y CONFIG_HAVE_ACPI_RESUME=y CONFIG_RESUME_PATH_SAME_AS_BOOT=y CONFIG_HAVE_MONOTONIC_TIMER=y -CONFIG_HAVE_OPTION_TABLE=y CONFIG_IOAPIC=y -CONFIG_ACPI_NHLT=y # # System tables @@ -778,7 +803,8 @@ CONFIG_PAYLOAD_NONE=y # CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set # CONFIG_DISPLAY_FSP_HEADER is not set # CONFIG_VERIFY_HOBS is not set -# CONFIG_DISPLAY_FSP_VERSION_INFO is not set +CONFIG_DISPLAY_FSP_VERSION_INFO=y +# CONFIG_ENABLE_FSP_ERROR_INFO is not set CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y # CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set @@ -789,6 +815,8 @@ CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y CONFIG_HAVE_DEBUG_GPIO=y # CONFIG_DEBUG_GPIO is not set # CONFIG_DEBUG_CBFS is not set +CONFIG_HAVE_DEBUG_RAM_SETUP=y +# CONFIG_DEBUG_RAM_SETUP is not set CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SMBUS is not set # CONFIG_DEBUG_MALLOC is not set @@ -801,12 +829,14 @@ CONFIG_HAVE_EM100_SUPPORT=y # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # end of Debugging -CONFIG_RAMSTAGE_ADA=y -CONFIG_RAMSTAGE_LIBHWBASE=y -CONFIG_HWBASE_DYNAMIC_MMIO=y -CONFIG_HWBASE_DEFAULT_MMCONF=0xe0000000 -CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x2e_n150/target.cfg b/config/coreboot/x2e_n150/target.cfg new file mode 100644 index 00000000..f2dc73e0 --- /dev/null +++ b/config/coreboot/x2e_n150/target.cfg @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +tree="default" +xarch="i386-elf" +payload_seabios="y" +payload_grub="y" +payload_memtest="y" +grub_scan_disk="nvme ahci" +grubtree="xhci_nvme" +vcfg="x2e_n150" +build_depend="seabios/default grub/xhci_nvme memtest86plus u-boot/amd64coreboot" +IFD_platform="adl" +payload_uboot="amd64" diff --git a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb index 6120c2a8..7fe2f1d7 100644 --- a/config/coreboot/x301_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/x301_16mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X301" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X301" @@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x301" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_X301=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -259,8 +271,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -275,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -372,6 +386,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -395,6 +410,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -415,6 +433,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -447,11 +466,14 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_DRIVERS_LENOVO_WACOM=y CONFIG_DIGITIZER_AUTODETECT=y # CONFIG_DIGITIZER_PRESENT is not set # CONFIG_DIGITIZER_ABSENT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -471,11 +493,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -628,7 +652,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -650,6 +673,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x301_16mb/config/libgfxinit_txtmode b/config/coreboot/x301_16mb/config/libgfxinit_txtmode index 96911b1e..e2f8167f 100644 --- a/config/coreboot/x301_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/x301_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X301" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X301" @@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x301" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -155,12 +166,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/16_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -168,8 +177,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -203,7 +216,6 @@ CONFIG_BOARD_LENOVO_X301=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -257,8 +269,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -273,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -370,6 +384,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -393,6 +408,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -411,6 +429,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -443,11 +462,14 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_DRIVERS_LENOVO_WACOM=y CONFIG_DIGITIZER_AUTODETECT=y # CONFIG_DIGITIZER_PRESENT is not set # CONFIG_DIGITIZER_ABSENT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -467,11 +489,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -624,7 +648,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -646,6 +669,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x301_16mb/target.cfg b/config/coreboot/x301_16mb/target.cfg index 4d4a4c25..31e9f759 100644 --- a/config/coreboot/x301_16mb/target.cfg +++ b/config/coreboot/x301_16mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" release="n" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb index 1600d752..d1a80ea2 100644 --- a/config/coreboot/x301_4mb/config/libgfxinit_corebootfb +++ b/config/coreboot/x301_4mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X301" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X301" @@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x301" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_X301=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -259,8 +271,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -275,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -372,6 +386,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -395,6 +410,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -415,6 +433,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -447,11 +466,14 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_DRIVERS_LENOVO_WACOM=y CONFIG_DIGITIZER_AUTODETECT=y # CONFIG_DIGITIZER_PRESENT is not set # CONFIG_DIGITIZER_ABSENT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -471,11 +493,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -628,7 +652,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -650,6 +673,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x301_4mb/config/libgfxinit_txtmode b/config/coreboot/x301_4mb/config/libgfxinit_txtmode index 6931179e..4243d075 100644 --- a/config/coreboot/x301_4mb/config/libgfxinit_txtmode +++ b/config/coreboot/x301_4mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X301" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X301" @@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x301" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -155,12 +166,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/4_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -168,8 +177,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -203,7 +216,6 @@ CONFIG_BOARD_LENOVO_X301=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -257,8 +269,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -273,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -370,6 +384,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -393,6 +408,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -411,6 +429,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -443,11 +462,14 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_DRIVERS_LENOVO_WACOM=y CONFIG_DIGITIZER_AUTODETECT=y # CONFIG_DIGITIZER_PRESENT is not set # CONFIG_DIGITIZER_ABSENT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -467,11 +489,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -624,7 +648,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -646,6 +669,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x301_4mb/target.cfg b/config/coreboot/x301_4mb/target.cfg index 4d4a4c25..31e9f759 100644 --- a/config/coreboot/x301_4mb/target.cfg +++ b/config/coreboot/x301_4mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" release="n" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb index c4aa7b1d..3271d115 100644 --- a/config/coreboot/x301_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/x301_8mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X301" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X301" @@ -123,27 +132,29 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x301" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -157,12 +168,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -170,8 +179,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -205,7 +218,6 @@ CONFIG_BOARD_LENOVO_X301=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -259,8 +271,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -275,6 +288,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -372,6 +386,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -395,6 +410,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -415,6 +433,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -447,11 +466,14 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_DRIVERS_LENOVO_WACOM=y CONFIG_DIGITIZER_AUTODETECT=y # CONFIG_DIGITIZER_PRESENT is not set # CONFIG_DIGITIZER_ABSENT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -471,11 +493,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -628,7 +652,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -650,6 +673,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x301_8mb/config/libgfxinit_txtmode b/config/coreboot/x301_8mb/config/libgfxinit_txtmode index 7385ce0a..432ef75e 100644 --- a/config/coreboot/x301_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/x301_8mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X301" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X301" @@ -121,27 +130,29 @@ CONFIG_MAX_CPUS=2 # CONFIG_ONBOARD_VGA_IS_PRIMARY is not set CONFIG_POST_DEVICE=y CONFIG_POST_IO=y -CONFIG_DEVICETREE="devicetree.cb" -# CONFIG_VBOOT is not set CONFIG_VARIANT_DIR="x301" CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb" +CONFIG_DEVICETREE="devicetree.cb" +# CONFIG_VBOOT is not set # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_INTEL_GMA_VBT_FILE="" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x10000 @@ -155,12 +166,10 @@ CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_IFD_BIN_PATH="../../../config/ifd/ich9m/8_ifd" CONFIG_GBE_BIN_PATH="../../../config/ifd/ich9m/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 @@ -168,8 +177,12 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -203,7 +216,6 @@ CONFIG_BOARD_LENOVO_X301=y # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set # CONFIG_BOARD_LENOVO_X60 is not set -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -257,8 +269,9 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_X86_64_SUPPORT is not set +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -273,6 +286,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 @@ -370,6 +384,7 @@ CONFIG_HAVE_GBE_BIN=y # CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set # CONFIG_LOCK_MANAGEMENT_ENGINE is not set CONFIG_UNLOCK_FLASH_REGIONS=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -393,6 +408,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -411,6 +429,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -443,11 +462,14 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_DRIVERS_LENOVO_WACOM=y CONFIG_DIGITIZER_AUTODETECT=y # CONFIG_DIGITIZER_PRESENT is not set # CONFIG_DIGITIZER_ABSENT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -467,11 +489,13 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y CONFIG_INTEL_INT15=y @@ -624,7 +648,6 @@ CONFIG_PAYLOAD_NONE=y # # General Debug Settings # -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -646,6 +669,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000 CONFIG_HWBASE_DIRECT_PCIDEV=y CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x301_8mb/target.cfg b/config/coreboot/x301_8mb/target.cfg index 4d4a4c25..31e9f759 100644 --- a/config/coreboot/x301_8mb/target.cfg +++ b/config/coreboot/x301_8mb/target.cfg @@ -7,4 +7,4 @@ payload_grub="y" payload_memtest="y" release="n" grub_scan_disk="ahci" -payload_uboot_amd64="y" +payload_uboot="amd64" diff --git a/config/coreboot/x60/config/libgfxinit_corebootfb b/config/coreboot/x60/config/libgfxinit_corebootfb index 243333dd..e2c15f7e 100644 --- a/config/coreboot/x60/config/libgfxinit_corebootfb +++ b/config/coreboot/x60/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X60" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X60" @@ -123,25 +132,27 @@ CONFIG_MAX_CPUS=2 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set CONFIG_IRQ_SLOT_COUNT=18 -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 @@ -152,20 +163,22 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -199,7 +212,6 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set CONFIG_BOARD_LENOVO_X60=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -253,8 +265,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -269,6 +282,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -363,7 +377,10 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_FLASH_LEDS_ON_DEATH is not set # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -387,6 +404,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -407,6 +427,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -438,11 +459,14 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_DRIVERS_LENOVO_WACOM=y CONFIG_DIGITIZER_AUTODETECT=y # CONFIG_DIGITIZER_PRESENT is not set # CONFIG_DIGITIZER_ABSENT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -461,11 +485,13 @@ CONFIG_DRIVERS_UART=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_DRIVERS_I2C_CK505=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y @@ -634,7 +660,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -650,6 +675,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x60/config/libgfxinit_txtmode b/config/coreboot/x60/config/libgfxinit_txtmode index a984779c..3163fda6 100644 --- a/config/coreboot/x60/config/libgfxinit_txtmode +++ b/config/coreboot/x60/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X60" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X60" @@ -123,25 +132,27 @@ CONFIG_MAX_CPUS=2 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set CONFIG_IRQ_SLOT_COUNT=18 -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 @@ -152,20 +163,22 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -199,7 +212,6 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set CONFIG_BOARD_LENOVO_X60=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -253,8 +265,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -269,6 +282,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -363,7 +377,10 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_FLASH_LEDS_ON_DEATH is not set # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -387,6 +404,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -405,6 +425,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -436,11 +457,14 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_DRIVERS_LENOVO_WACOM=y CONFIG_DIGITIZER_AUTODETECT=y # CONFIG_DIGITIZER_PRESENT is not set # CONFIG_DIGITIZER_ABSENT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -459,11 +483,13 @@ CONFIG_DRIVERS_UART=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_DRIVERS_I2C_CK505=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y @@ -632,7 +658,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -648,6 +673,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x60/target.cfg b/config/coreboot/x60/target.cfg index c1e3a3c6..f41e3fe9 100644 --- a/config/coreboot/x60/target.cfg +++ b/config/coreboot/x60/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" grub_scan_disk="ahci" build_depend="seabios/default grub/default u-boot/i386coreboot" -payload_uboot_i386="y" +payload_uboot="i386" diff --git a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb index 617e05b2..92a46efc 100644 --- a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X60" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X60" @@ -123,25 +132,27 @@ CONFIG_MAX_CPUS=2 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set CONFIG_IRQ_SLOT_COUNT=18 -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 @@ -152,20 +163,22 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -199,7 +212,6 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set CONFIG_BOARD_LENOVO_X60=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -253,8 +265,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -269,6 +282,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -363,7 +377,10 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_FLASH_LEDS_ON_DEATH is not set # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -387,6 +404,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -407,6 +427,7 @@ CONFIG_NO_EARLY_GFX_INIT=y CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y CONFIG_LINEAR_FRAMEBUFFER=y # CONFIG_BOOTSPLASH is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -438,11 +459,14 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_DRIVERS_LENOVO_WACOM=y CONFIG_DIGITIZER_AUTODETECT=y # CONFIG_DIGITIZER_PRESENT is not set # CONFIG_DIGITIZER_ABSENT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -461,11 +485,13 @@ CONFIG_DRIVERS_UART=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_DRIVERS_I2C_CK505=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y @@ -634,7 +660,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -650,6 +675,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x60_16mb/config/libgfxinit_txtmode b/config/coreboot/x60_16mb/config/libgfxinit_txtmode index f9063d40..c21c7ba5 100644 --- a/config/coreboot/x60_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/x60_16mb/config/libgfxinit_txtmode @@ -10,14 +10,15 @@ CONFIG_LOCALVERSION="" CONFIG_CBFS_PREFIX="fallback" CONFIG_COMPILER_GCC=y # CONFIG_COMPILER_LLVM_CLANG is not set -CONFIG_ARCH_SUPPORTS_CLANG=y # CONFIG_ANY_TOOLCHAIN is not set # CONFIG_CCACHE is not set +# CONFIG_LTO is not set # CONFIG_IWYU is not set # CONFIG_FMD_GENPARSER is not set # CONFIG_UTIL_GENPARSER is not set # CONFIG_OPTION_BACKEND_NONE is not set CONFIG_USE_OPTION_TABLE=y +# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set @@ -57,6 +58,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_AOOSTAR is not set # CONFIG_VENDOR_AOPEN is not set # CONFIG_VENDOR_APPLE is not set +# CONFIG_VENDOR_ARM is not set # CONFIG_VENDOR_ASROCK is not set # CONFIG_VENDOR_ASUS is not set # CONFIG_VENDOR_BIOSTAR is not set @@ -68,6 +70,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_CWWK is not set # CONFIG_VENDOR_DELL is not set # CONFIG_VENDOR_EMULATION is not set +# CONFIG_VENDOR_ERYING is not set # CONFIG_VENDOR_EXAMPLE is not set # CONFIG_VENDOR_FACEBOOK is not set # CONFIG_VENDOR_FOXCONN is not set @@ -75,15 +78,19 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_GETAC is not set # CONFIG_VENDOR_GIGABYTE is not set # CONFIG_VENDOR_GOOGLE is not set +# CONFIG_VENDOR_HARDKERNEL is not set # CONFIG_VENDOR_HP is not set # CONFIG_VENDOR_IBASE is not set # CONFIG_VENDOR_IBM is not set # CONFIG_VENDOR_INTEL is not set # CONFIG_VENDOR_INVENTEC is not set # CONFIG_VENDOR_KONTRON is not set +# CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set +# CONFIG_VENDOR_NOVACUSTOM is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set # CONFIG_VENDOR_PACKARDBELL is not set @@ -104,7 +111,9 @@ CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_SUPERMICRO is not set # CONFIG_VENDOR_SYSTEM76 is not set # CONFIG_VENDOR_TI is not set +# CONFIG_VENDOR_TOPTON is not set # CONFIG_VENDOR_UP is not set +# CONFIG_VENDOR_VIA is not set CONFIG_BOARD_SPECIFIC_OPTIONS=y CONFIG_MAINBOARD_FAMILY="ThinkPad X60" CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X60" @@ -123,25 +132,27 @@ CONFIG_MAX_CPUS=2 CONFIG_POST_DEVICE=y CONFIG_POST_IO=y CONFIG_UART_FOR_CONSOLE=0 +CONFIG_OVERRIDE_DEVICETREE="" CONFIG_DEVICETREE="devicetree.cb" # CONFIG_VBOOT is not set CONFIG_IRQ_SLOT_COUNT=18 -CONFIG_OVERRIDE_DEVICETREE="" # CONFIG_VGA_BIOS is not set # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO" +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 +CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" +# CONFIG_FATAL_ASSERTS is not set CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 +CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60" +# CONFIG_CONSOLE_POST is not set CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -# CONFIG_CONSOLE_POST is not set -CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_ECAM_MMCONF_BUS_NUMBER=64 -CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" CONFIG_VBOOT_SLOTS_RW_A=y CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 @@ -152,20 +163,22 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_DEBUG_SMI is not set -CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X60" CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set +# CONFIG_BOARD_LENOVO_M900 is not set # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set +# CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set +# CONFIG_BOARD_LENOVO_T480 is not set +# CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set # CONFIG_BOARD_LENOVO_T500 is not set # CONFIG_BOARD_LENOVO_R400 is not set @@ -199,7 +212,6 @@ CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 # CONFIG_BOARD_LENOVO_X230S is not set # CONFIG_BOARD_LENOVO_X230_EDP is not set CONFIG_BOARD_LENOVO_X60=y -CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="IBM3780" CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" @@ -253,8 +265,9 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +CONFIG_CPU_PT_ROM_MAP_GB=4 CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfec00000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -269,6 +282,7 @@ CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 +# CONFIG_ALWAYS_ALLOW_ABOVE_4G_ALLOCATION is not set CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y @@ -363,7 +377,10 @@ CONFIG_EC_LENOVO_H8=y # CONFIG_H8_FLASH_LEDS_ON_DEATH is not set # CONFIG_H8_SUPPORT_BT_ON_WIFI is not set # CONFIG_H8_FN_CTRL_SWAP is not set +CONFIG_H8_HAS_BDC_GPIO_DETECTION=y +CONFIG_H8_HAS_2ND_THERMAL_ZONE=y CONFIG_EC_LENOVO_PMH7=y +CONFIG_ACPI_FNKEY_GEN_SCANCODE=0 CONFIG_ARCH_X86=y CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y @@ -387,6 +404,9 @@ CONFIG_DEBUG_HW_BREAKPOINTS=y CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y # CONFIG_DUMP_SMBIOS_TYPE17 is not set CONFIG_X86_BOOTBLOCK_EXTRA_PROGRAM_SZ=0 +CONFIG_DEFAULT_EBDA_LOWMEM=0x100000 +CONFIG_DEFAULT_EBDA_SEGMENT=0xF600 +CONFIG_DEFAULT_EBDA_SIZE=0x400 # end of Chipset # @@ -405,6 +425,7 @@ CONFIG_NO_EARLY_GFX_INIT=y # CONFIG_VGA_TEXT_FRAMEBUFFER=y # CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set +CONFIG_DEFAULT_SCREEN_ROTATION_INT=0 # end of Display CONFIG_PCI=y @@ -436,11 +457,14 @@ CONFIG_USE_DDR2=y # Generic Drivers # CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 +# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set +# CONFIG_DRIVERS_EFI_FW_INFO is not set # CONFIG_ELOG is not set CONFIG_DRIVERS_LENOVO_WACOM=y CONFIG_DIGITIZER_AUTODETECT=y # CONFIG_DIGITIZER_PRESENT is not set # CONFIG_DIGITIZER_ABSENT is not set +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -459,11 +483,13 @@ CONFIG_DRIVERS_UART=y CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set # CONFIG_VPD is not set +# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set # CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set # CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set # CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set +CONFIG_DRIVER_LENOVO_SERIALS=y CONFIG_DRIVERS_I2C_CK505=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_EDID=y @@ -632,7 +658,6 @@ CONFIG_PAYLOAD_NONE=y # General Debug Settings # # CONFIG_GDB_STUB is not set -# CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y # CONFIG_DEBUG_RAM_SETUP is not set @@ -648,6 +673,13 @@ CONFIG_HAVE_DEBUG_SMBUS=y # end of Debugging CONFIG_DECOMPRESS_OFAST=y + +# +# Boot Logo Configuration +# +# CONFIG_BMP_LOGO is not set +# end of Boot Logo Configuration + CONFIG_WARNINGS_ARE_ERRORS=y CONFIG_MAX_REBOOT_CNT=3 CONFIG_RELOCATABLE_MODULES=y diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg index c1e3a3c6..f41e3fe9 100644 --- a/config/coreboot/x60_16mb/target.cfg +++ b/config/coreboot/x60_16mb/target.cfg @@ -6,4 +6,4 @@ payload_seabios="y" payload_grub="y" grub_scan_disk="ahci" build_depend="seabios/default grub/default u-boot/i386coreboot" -payload_uboot_i386="y" +payload_uboot="i386" diff --git a/config/data/coreboot/0 b/config/data/coreboot/0 Binary files differnew file mode 100644 index 00000000..f76dd238 --- /dev/null +++ b/config/data/coreboot/0 diff --git a/config/data/coreboot/build.list b/config/data/coreboot/build.list new file mode 100644 index 00000000..f6535149 --- /dev/null +++ b/config/data/coreboot/build.list @@ -0,0 +1 @@ +build/coreboot.rom diff --git a/config/data/coreboot/mkhelper.cfg b/config/data/coreboot/mkhelper.cfg index 624d4ec2..8414ab53 100644 --- a/config/data/coreboot/mkhelper.cfg +++ b/config/data/coreboot/mkhelper.cfg @@ -1,19 +1,28 @@ # SPDX-License-Identifier: GPL-3.0-or-later -. "include/rom.sh" - makeargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS" build_depend="seabios/default grub/default memtest86plus u-boot/amd64coreboot" -seavgabiosrom="elf/seabios/default/libgfxinit/vgabios.bin" +seavgabiosrom="elf/seabios/default/default/libgfxinit/vgabios.bin" + +payload_seabios="n" +payload_memtest="n" +payload_grub="n" +payload_grubsea="n" -pv="payload_uboot payload_seabios payload_memtest payload_grub" -pv="$pv payload_uboot_i386 payload_uboot_amd64 payload_grubsea" -v="initmode ubootelf grub_scan_disk uboot_config grubtree grubelf pname" -v="$v displaymode tmprom newrom" -eval `setvars "n" $pv` -eval `setvars "" $v` +initmode="" +ubootelf="" +grub_scan_disk="" +uboot_config="" +grubtree="" +grubelf="" +pname="" +displaymode="" +tmprom="" +newrom="" +payload_uboot="" +cbfscfg="" -premake="mkvendorfiles" -mkhelper="mkcorebootbin" -postmake="mkcoreboottar" +premake="corebootpremake" +mkhelper="coreboot_pad_one_byte" +postmake="mkcorebootbin" diff --git a/config/data/grub/mkhelper.cfg b/config/data/grub/mkhelper.cfg index 5d66f42f..e445900d 100644 --- a/config/data/grub/mkhelper.cfg +++ b/config/data/grub/mkhelper.cfg @@ -1,9 +1,7 @@ # SPDX-License-Identifier: GPL-3.0-or-later -. "include/rom.sh" - bootstrapargs="--gnulib-srcdir=gnulib/ --no-git" autoconfargs="--with-platform=coreboot --disable-werror" makeargs="FS_PAYLOAD_MODULES=\"\"" -btype="autohell" +buildtype="autohell" mkhelper="mkpayload_grub" diff --git a/config/data/grub/module/default b/config/data/grub/module/default index 1ee5327f..faa2473e 100755 --- a/config/data/grub/module/default +++ b/config/data/grub/module/default @@ -69,7 +69,6 @@ gcry_whirlpool \ geli \ gfxmenu \ gfxterm_background \ -gfxterm_menu \ gzio \ hashsum \ halt \ diff --git a/config/data/grub/module/nvme b/config/data/grub/module/nvme index a3a2847c..5ff32329 100755 --- a/config/data/grub/module/nvme +++ b/config/data/grub/module/nvme @@ -69,7 +69,6 @@ gcry_whirlpool \ geli \ gfxmenu \ gfxterm_background \ -gfxterm_menu \ gzio \ hashsum \ halt \ diff --git a/config/data/grub/module/xhci b/config/data/grub/module/xhci_nvme index ee4d10f7..05bd82aa 100755 --- a/config/data/grub/module/xhci +++ b/config/data/grub/module/xhci_nvme @@ -70,7 +70,6 @@ gcry_whirlpool \ geli \ gfxmenu \ gfxterm_background \ -gfxterm_menu \ gzio \ hashsum \ halt \ diff --git a/config/data/libarchive/build.list b/config/data/libarchive/build.list new file mode 100644 index 00000000..044f9db2 --- /dev/null +++ b/config/data/libarchive/build.list @@ -0,0 +1,3 @@ +bsdtar +bsdunzip +bsdcpio diff --git a/config/data/libarchive/mkhelper.cfg b/config/data/libarchive/mkhelper.cfg new file mode 100644 index 00000000..f1678f17 --- /dev/null +++ b/config/data/libarchive/mkhelper.cfg @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +premake="autoreconf -fiv src/libarchive" diff --git a/config/data/pcsx-redux/mkhelper.cfg b/config/data/pcsx-redux/mkhelper.cfg index af744685..6ad20de5 100644 --- a/config/data/pcsx-redux/mkhelper.cfg +++ b/config/data/pcsx-redux/mkhelper.cfg @@ -1,5 +1,3 @@ # SPDX-License-Identifier: GPL-3.0-or-later -. "include/rom.sh" - postmake="copyps1bios" diff --git a/config/data/pico-serprog/mkhelper.cfg b/config/data/pico-serprog/mkhelper.cfg index ccfdc0df..5a4546a6 100644 --- a/config/data/pico-serprog/mkhelper.cfg +++ b/config/data/pico-serprog/mkhelper.cfg @@ -1,9 +1,7 @@ # SPDX-License-Identifier: GPL-3.0-or-later -. "include/rom.sh" - sersrc="src/pico-serprog" serx="$sersrc/build/pico_serprog.uf2" picosdk="src/pico-sdk" serdir="$picosdk/src/boards/include/boards" -premake="mkserprog pico" +premake="$if_not_dry_build eval fx_ \"buildser pico\" x_ basename -as .h \"\$serdir/\"*.h" diff --git a/config/data/stm32-vserprog/mkhelper.cfg b/config/data/stm32-vserprog/mkhelper.cfg index 54b05caf..26ea5acd 100644 --- a/config/data/stm32-vserprog/mkhelper.cfg +++ b/config/data/stm32-vserprog/mkhelper.cfg @@ -1,8 +1,6 @@ # SPDX-License-Identifier: GPL-3.0-or-later -. "include/rom.sh" - sersrc="src/stm32-vserprog" serx="$sersrc/stm32-vserprog.hex" serdir="$sersrc/boards" -mkhelper="mkserprog stm32" +mkhelper="$if_not_dry_build eval fx_ \"buildser stm32\" x_ basename -as .h \"\$serdir/\"*.h" diff --git a/config/deguard/patches/0001-t480s-delta.patch b/config/deguard/patches/0001-t480s-delta.patch deleted file mode 100644 index 741ee08d..00000000 --- a/config/deguard/patches/0001-t480s-delta.patch +++ /dev/null @@ -1,221 +0,0 @@ -From 054a4ffdfef9a649f5668c379cb68b5342d02e3f Mon Sep 17 00:00:00 2001 -From: Leah Rowe <info@minifree.org> -Date: Mon, 2 Dec 2024 01:59:43 +0000 -Subject: [PATCH 1/1] t480s delta - -thank you mkukri for guiding me through this - -Signed-off-by: Leah Rowe <info@minifree.org> ---- - .../thinkpad_t480s/home/bup/bup_sku/plat_n_sku | Bin 0 -> 4 bytes - data/delta/thinkpad_t480s/home/bup/mbp | Bin 0 -> 44 bytes - data/delta/thinkpad_t480s/home/gpio/csme_pins | 0 - data/delta/thinkpad_t480s/home/icc/dynregs | Bin 0 -> 28 bytes - data/delta/thinkpad_t480s/home/icc/header | Bin 0 -> 4 bytes - data/delta/thinkpad_t480s/home/icc/namestr | Bin 0 -> 48 bytes - data/delta/thinkpad_t480s/home/icc/prof1 | 0 - data/delta/thinkpad_t480s/home/icc/prof10 | 0 - data/delta/thinkpad_t480s/home/icc/prof2 | 0 - data/delta/thinkpad_t480s/home/icc/prof3 | 0 - data/delta/thinkpad_t480s/home/icc/prof4 | 0 - data/delta/thinkpad_t480s/home/icc/prof5 | 0 - data/delta/thinkpad_t480s/home/icc/prof6 | 0 - data/delta/thinkpad_t480s/home/icc/prof7 | 0 - data/delta/thinkpad_t480s/home/icc/prof8 | 0 - data/delta/thinkpad_t480s/home/icc/prof9 | 0 - data/delta/thinkpad_t480s/home/mca/eom | 1 + - data/delta/thinkpad_t480s/home/mca/ish_policy | Bin 0 -> 1 bytes - data/delta/thinkpad_t480s/home/mctp/device_ports | Bin 0 -> 4 bytes - .../thinkpad_t480s/home/policy/Bist/auto_config | Bin 0 -> 4 bytes - .../thinkpad_t480s/home/policy/cfgmgr/cfg_rules | Bin 0 -> 660 bytes - .../thinkpad_t480s/home/policy/hci/sysintid1 | 1 + - .../thinkpad_t480s/home/policy/hci/sysintid2 | 1 + - .../thinkpad_t480s/home/policy/hci/sysintid3 | 1 + - 24 files changed, 4 insertions(+) - create mode 100644 data/delta/thinkpad_t480s/home/bup/bup_sku/plat_n_sku - create mode 100644 data/delta/thinkpad_t480s/home/bup/mbp - create mode 100644 data/delta/thinkpad_t480s/home/gpio/csme_pins - create mode 100644 data/delta/thinkpad_t480s/home/icc/dynregs - create mode 100644 data/delta/thinkpad_t480s/home/icc/header - create mode 100644 data/delta/thinkpad_t480s/home/icc/namestr - create mode 100644 data/delta/thinkpad_t480s/home/icc/prof1 - create mode 100644 data/delta/thinkpad_t480s/home/icc/prof10 - create mode 100644 data/delta/thinkpad_t480s/home/icc/prof2 - create mode 100644 data/delta/thinkpad_t480s/home/icc/prof3 - create mode 100644 data/delta/thinkpad_t480s/home/icc/prof4 - create mode 100644 data/delta/thinkpad_t480s/home/icc/prof5 - create mode 100644 data/delta/thinkpad_t480s/home/icc/prof6 - create mode 100644 data/delta/thinkpad_t480s/home/icc/prof7 - create mode 100644 data/delta/thinkpad_t480s/home/icc/prof8 - create mode 100644 data/delta/thinkpad_t480s/home/icc/prof9 - create mode 100644 data/delta/thinkpad_t480s/home/mca/eom - create mode 100644 data/delta/thinkpad_t480s/home/mca/ish_policy - create mode 100644 data/delta/thinkpad_t480s/home/mctp/device_ports - create mode 100644 data/delta/thinkpad_t480s/home/policy/Bist/auto_config - create mode 100644 data/delta/thinkpad_t480s/home/policy/cfgmgr/cfg_rules - create mode 100644 data/delta/thinkpad_t480s/home/policy/hci/sysintid1 - create mode 100644 data/delta/thinkpad_t480s/home/policy/hci/sysintid2 - create mode 100644 data/delta/thinkpad_t480s/home/policy/hci/sysintid3 - -diff --git a/data/delta/thinkpad_t480s/home/bup/bup_sku/plat_n_sku b/data/delta/thinkpad_t480s/home/bup/bup_sku/plat_n_sku -new file mode 100644 -index 0000000000000000000000000000000000000000..d0514be7b35d1d6ca7a4e09603bf1ce50d764720 -GIT binary patch -literal 4 -LcmZQ(U}yjU0FVHL - -literal 0 -HcmV?d00001 - -diff --git a/data/delta/thinkpad_t480s/home/bup/mbp b/data/delta/thinkpad_t480s/home/bup/mbp -new file mode 100644 -index 0000000000000000000000000000000000000000..f5f419c14e67bb40eca97369288637203849b165 -GIT binary patch -literal 44 -tcmd;PWnf_BU}69PMph;UMP^|~MkXc(2O$ALMouOM=YW5WY>Z&}1^_We1G@kK - -literal 0 -HcmV?d00001 - -diff --git a/data/delta/thinkpad_t480s/home/gpio/csme_pins b/data/delta/thinkpad_t480s/home/gpio/csme_pins -new file mode 100644 -index 0000000..e69de29 -diff --git a/data/delta/thinkpad_t480s/home/icc/dynregs b/data/delta/thinkpad_t480s/home/icc/dynregs -new file mode 100644 -index 0000000000000000000000000000000000000000..912ab3579185250403dc1db1cb95ed24b1e7f2ab -GIT binary patch -literal 28 -icmb1PU}RuoU|?VpV7)W*<V*&8AX`m<@s5B|NErY;Qw3}Q - -literal 0 -HcmV?d00001 - -diff --git a/data/delta/thinkpad_t480s/home/icc/header b/data/delta/thinkpad_t480s/home/icc/header -new file mode 100644 -index 0000000000000000000000000000000000000000..4b75556082e2c00ea8a888450d05627b20f0ec61 -GIT binary patch -literal 4 -LcmZQ%U|<9Q00{sC - -literal 0 -HcmV?d00001 - -diff --git a/data/delta/thinkpad_t480s/home/icc/namestr b/data/delta/thinkpad_t480s/home/icc/namestr -new file mode 100644 -index 0000000000000000000000000000000000000000..b0f3735c08f70e800a5dcce8ba8a2ef5ac9b075e -GIT binary patch -literal 48 -ZcmeZC&C4&#XTSi#C5d?{iA5>s5&*Dj1*HH0 - -literal 0 -HcmV?d00001 - -diff --git a/data/delta/thinkpad_t480s/home/icc/prof1 b/data/delta/thinkpad_t480s/home/icc/prof1 -new file mode 100644 -index 0000000..e69de29 -diff --git a/data/delta/thinkpad_t480s/home/icc/prof10 b/data/delta/thinkpad_t480s/home/icc/prof10 -new file mode 100644 -index 0000000..e69de29 -diff --git a/data/delta/thinkpad_t480s/home/icc/prof2 b/data/delta/thinkpad_t480s/home/icc/prof2 -new file mode 100644 -index 0000000..e69de29 -diff --git a/data/delta/thinkpad_t480s/home/icc/prof3 b/data/delta/thinkpad_t480s/home/icc/prof3 -new file mode 100644 -index 0000000..e69de29 -diff --git a/data/delta/thinkpad_t480s/home/icc/prof4 b/data/delta/thinkpad_t480s/home/icc/prof4 -new file mode 100644 -index 0000000..e69de29 -diff --git a/data/delta/thinkpad_t480s/home/icc/prof5 b/data/delta/thinkpad_t480s/home/icc/prof5 -new file mode 100644 -index 0000000..e69de29 -diff --git a/data/delta/thinkpad_t480s/home/icc/prof6 b/data/delta/thinkpad_t480s/home/icc/prof6 -new file mode 100644 -index 0000000..e69de29 -diff --git a/data/delta/thinkpad_t480s/home/icc/prof7 b/data/delta/thinkpad_t480s/home/icc/prof7 -new file mode 100644 -index 0000000..e69de29 -diff --git a/data/delta/thinkpad_t480s/home/icc/prof8 b/data/delta/thinkpad_t480s/home/icc/prof8 -new file mode 100644 -index 0000000..e69de29 -diff --git a/data/delta/thinkpad_t480s/home/icc/prof9 b/data/delta/thinkpad_t480s/home/icc/prof9 -new file mode 100644 -index 0000000..e69de29 -diff --git a/data/delta/thinkpad_t480s/home/mca/eom b/data/delta/thinkpad_t480s/home/mca/eom -new file mode 100644 -index 0000000..6b2aaa7 ---- /dev/null -+++ b/data/delta/thinkpad_t480s/home/mca/eom -@@ -0,0 +1 @@ -+ -\ No newline at end of file -diff --git a/data/delta/thinkpad_t480s/home/mca/ish_policy b/data/delta/thinkpad_t480s/home/mca/ish_policy -new file mode 100644 -index 0000000000000000000000000000000000000000..f76dd238ade08917e6712764a16a22005a50573d -GIT binary patch -literal 1 -IcmZPo000310RR91 - -literal 0 -HcmV?d00001 - -diff --git a/data/delta/thinkpad_t480s/home/mctp/device_ports b/data/delta/thinkpad_t480s/home/mctp/device_ports -new file mode 100644 -index 0000000000000000000000000000000000000000..593f4708db84ac8fd0f5cc47c634f38c013fe9e4 -GIT binary patch -literal 4 -LcmZQzU|;|M00aO5 - -literal 0 -HcmV?d00001 - -diff --git a/data/delta/thinkpad_t480s/home/policy/Bist/auto_config b/data/delta/thinkpad_t480s/home/policy/Bist/auto_config -new file mode 100644 -index 0000000000000000000000000000000000000000..f66c9cf4c9672fa2832bce76f4082fd97b823506 -GIT binary patch -literal 4 -LcmZQ%U|;|M00;mA - -literal 0 -HcmV?d00001 - -diff --git a/data/delta/thinkpad_t480s/home/policy/cfgmgr/cfg_rules b/data/delta/thinkpad_t480s/home/policy/cfgmgr/cfg_rules -new file mode 100644 -index 0000000000000000000000000000000000000000..6243fe92703b15ca1f7f387ba5c4d899a79c569b -GIT binary patch -literal 660 -zcmY+=OHKk|5Cq^>K!kw6@D_P1@<u>igPOP^;RM`;4F~aZ-U6s51t}Jj`cnC)|Cu&3 -zOPGZhK{|6oBkY#;E<__NOnV=p5q3v=9~Iw=W3<os$56i)yfV5=pA<icQ?!3qn%*HZ -z^Z^;r2+N9dw4cd~3*sW}|5Bn6R;Imwq~pj6?K7X~ul0UarJJGbvPS#6b#Vj6j!ye; -z(%<X-wsr22ZTk0T^Y=_6?1lE39X!5I_bYpZb;UjSyz{<zAZLc+k$BAWK7S(pn|Lao -NiRa>X@rU?Rd<6FI7iRzf - -literal 0 -HcmV?d00001 - -diff --git a/data/delta/thinkpad_t480s/home/policy/hci/sysintid1 b/data/delta/thinkpad_t480s/home/policy/hci/sysintid1 -new file mode 100644 -index 0000000..b508e57 ---- /dev/null -+++ b/data/delta/thinkpad_t480s/home/policy/hci/sysintid1 -@@ -0,0 +1 @@ -+Zâ# -\ No newline at end of file -diff --git a/data/delta/thinkpad_t480s/home/policy/hci/sysintid2 b/data/delta/thinkpad_t480s/home/policy/hci/sysintid2 -new file mode 100644 -index 0000000..9611653 ---- /dev/null -+++ b/data/delta/thinkpad_t480s/home/policy/hci/sysintid2 -@@ -0,0 +1 @@ -+²R˦ -\ No newline at end of file -diff --git a/data/delta/thinkpad_t480s/home/policy/hci/sysintid3 b/data/delta/thinkpad_t480s/home/policy/hci/sysintid3 -new file mode 100644 -index 0000000..7f55b1e ---- /dev/null -+++ b/data/delta/thinkpad_t480s/home/policy/hci/sysintid3 -@@ -0,0 +1 @@ -+Œ¼6 -\ No newline at end of file --- -2.39.5 - diff --git a/config/dependencies/arch b/config/dependencies/arch index feb38d49..79819bda 100644 --- a/config/dependencies/arch +++ b/config/dependencies/arch @@ -3,7 +3,7 @@ pkg_add="pacman -S --needed" pkglist=" \ acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \ -autogen base-devel bison cmake curl device-mapper doxygen \ +autogen base-devel bison cdrtools cmake curl device-mapper doxygen \ dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \ help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \ ncurses openssl p7zip ccache less libx86 \ @@ -11,4 +11,4 @@ pandoc parted pciutils perl perl-libwww python python-setuptools rsync \ sharutils subversion swig texinfo ttf-dejavu unarchiver unzip wget xz zlib mtools \ " -aur_notice="bdf-unifont unifont cross-mipsel-linux-gnu-binutils cross-mipsel-linux-gnu-gcc genisoimage" +aur_notice="bdf-unifont pcf-unifont psf-unifont mipsel-linux-gnu-binutils mipsel-linux-gnu-gcc" diff --git a/config/dependencies/debian b/config/dependencies/debian index 00ccfc1a..c7de8be0 100755..100644 --- a/config/dependencies/debian +++ b/config/dependencies/debian @@ -1,18 +1,18 @@ # SPDX-License-Identifier: GPL-3.0-or-later -pkg_add="apt-get install $reinstall" +pkg_add="apt-get install --no-install-recommends $reinstall" pkglist=" \ acpica-tools autoconf autogen automake autopoint autotools-dev bc \ binutils-arm-none-eabi bison build-essential cmake curl device-tree-compiler \ doxygen e2fsprogs efitools flex fonts-unifont gawk gcc-arm-linux-gnueabi \ gcc-arm-none-eabi gdb gettext git gnat help2man innoextract libdevmapper-dev \ libfdt-dev libfont-freetype-perl libfreetype-dev libftdi-dev libftdi1-dev libfuse-dev \ -libjaylink-dev libgnutls28-dev libgpiod-dev lz4 liblz4-dev liblzma-dev libncurses5-dev +libjaylink-dev libgnutls28-dev libgpiod-dev lz4 liblz4-dev liblzma-dev libncurses5-dev \ libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev libpython3-dev \ -libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0 libusb-1.0-0-dev \ +libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 libusb-1.0-0-dev \ libusb-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted pciutils \ perl pkg-config python3 python3-distutils-extra python3-pkg-resources python3-pycryptodome \ python3-pyelftools python3-setuptools python-is-python3 sharutils swig unar \ unifont unifont-bin unzip uuid-dev wget xfonts-unifont zlib1g-dev ccache \ -g++-mipsel-linux-gnu make genisoimage mtools \ +g++-mipsel-linux-gnu make genisoimage mtools libx86-1 libx86-dev libstdc++-arm-none-eabi-newlib \ " diff --git a/config/dependencies/fedora41 b/config/dependencies/fedora41 index 4c06b199..e49a50b2 100755 --- a/config/dependencies/fedora41 +++ b/config/dependencies/fedora41 @@ -12,5 +12,5 @@ p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \ python-unversioned-command python3 python3-setuptools rsync sharutils \ subversion systemd-devel texinfo unar unifont unifont-fonts uuid-devel \ unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel \ -libuuid-devel \ +libuuid-devel gnutls-devel \ " diff --git a/config/dependencies/fedora42 b/config/dependencies/fedora42 new file mode 100644 index 00000000..c7e34aad --- /dev/null +++ b/config/dependencies/fedora42 @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +pkg_add="dnf ${reinstall}install" +pkglist=" \ +acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-gcc-cs-c++ \ +arm-none-eabi-gcc arm-none-eabi-newlib autogen bison bzip2 cmake curl \ +dejavu-fonts-all device-mapper doxygen e2fsprogs flex freetype-devel fuse \ +gawk gcc gcc-gnat gdb gettext gettext-devel git gprbuild help2man \ +innoextract intltool libftdi-devel libgpiod-devel libjaylink-devel \ +libselinux-devel libusb1 libusb1-devel nasm ncurses-devel openssl-devel openssl-devel-engine \ +p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \ +python-unversioned-command python3 python3-setuptools rsync sharutils \ +subversion systemd-devel texinfo unifont unifont-fonts uuid-devel \ +unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel \ +libuuid-devel gnutls-devel tar unar \ +" diff --git a/config/dependencies/fedora43 b/config/dependencies/fedora43 new file mode 100644 index 00000000..c7e34aad --- /dev/null +++ b/config/dependencies/fedora43 @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +pkg_add="dnf ${reinstall}install" +pkglist=" \ +acpica-tools arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-gcc-cs-c++ \ +arm-none-eabi-gcc arm-none-eabi-newlib autogen bison bzip2 cmake curl \ +dejavu-fonts-all device-mapper doxygen e2fsprogs flex freetype-devel fuse \ +gawk gcc gcc-gnat gdb gettext gettext-devel git gprbuild help2man \ +innoextract intltool libftdi-devel libgpiod-devel libjaylink-devel \ +libselinux-devel libusb1 libusb1-devel nasm ncurses-devel openssl-devel openssl-devel-engine \ +p7zip p7zip-plugins pandoc parted pciutils-devel perl perl-libwww-perl \ +python-unversioned-command python3 python3-setuptools rsync sharutils \ +subversion systemd-devel texinfo unifont unifont-fonts uuid-devel \ +unifont-ttf-fonts unzip wget xz zlib-devel ccache swig python3-devel \ +libuuid-devel gnutls-devel tar unar \ +" diff --git a/config/dependencies/parabola b/config/dependencies/parabola deleted file mode 100644 index eb7115f7..00000000 --- a/config/dependencies/parabola +++ /dev/null @@ -1,15 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -pkg_add="pacman -S --needed" -pkglist=" \ -acpica arm-none-eabi-binutils arm-none-eabi-gcc arm-none-eabi-newlib \ -autogen base-devel bdf-unifont bison cmake curl device-mapper doxygen \ -dtc e2fsprogs flex freetype2 fuse2 gawk gcc-ada gdb gettext git \ -help2man innoextract libftdi libgpiod libjaylink libpciaccess libusb nasm \ -ncurses openssl p7zip less libx86 \ -pandoc parted pciutils perl perl-libwww python python-setuptools rsync \ -sharutils subversion swig texinfo ttf-dejavu unarchiver unifont-utils unzip \ -wget xz zlib ccache \ -" - -aur_notice="cross-mipsel-linux-gnu-binutils cross-mipsel-linux-gnu-gcc" diff --git a/config/dependencies/popos b/config/dependencies/popos deleted file mode 120000 index b2f7fd3e..00000000 --- a/config/dependencies/popos +++ /dev/null @@ -1 +0,0 @@ -debian
\ No newline at end of file diff --git a/config/dependencies/trisquel b/config/dependencies/trisquel deleted file mode 100755 index fb364c28..00000000 --- a/config/dependencies/trisquel +++ /dev/null @@ -1,18 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -pkg_add="apt-get install $reinstall" -pkglist=" \ -autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \ -bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \ -flex gawk gcc-arm-linux-gnueabi gcc-arm-none-eabi gdb gettext git gnat help2man \ -innoextract libdevmapper-dev libfdt-dev libfont-freetype-perl libfreetype6-dev \ -libftdi-dev libfuse-dev libgnutls28-dev libgpiod-dev libjaylink-dev \ -liblzma-dev libncurses5-dev ccache lz4 liblz4-dev \ -libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev \ -libpython3-dev libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 \ -libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \ -pciutils perl pkg-config python3 python3-distutils python3-pkg-resources \ -python3-pycryptodome python3-pyelftools python3-setuptools python-is-python3 \ -sharutils swig fonts-unifont unar unifont unzip uuid-dev wget zlib1g-dev \ -g++-mipsel-linux-gnu make genisoimage mtools \ -" diff --git a/config/dependencies/ubuntu2004 b/config/dependencies/ubuntu2004 deleted file mode 100755 index ce69a4d9..00000000 --- a/config/dependencies/ubuntu2004 +++ /dev/null @@ -1,17 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -pkg_add="apt-get install $reinstall" -pkglist=" \ -autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \ -bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \ -flex gawk gcc-arm-linux-gnueabi gcc-arm-none-eabi gdb gettext git gnat help2man \ -innoextract libdevmapper-dev libfdt-dev libfont-freetype-perl libfreetype6-dev \ -libftdi-dev libfuse-dev libgnutls28-dev lz4 liblz4-dev liblzma-dev libncurses5-dev \ -libncurses-dev libnewlib-arm-none-eabi libopts25 libopts25-dev libpci-dev \ -libpython3-dev libsdl2-dev libselinux1-dev libssl-dev libtool libusb-1.0-0 \ -libusb-1.0-0-dev lz4 lzma lzma-alone m4 nasm openssl p7zip p7zip-full parted \ -pciutils perl pkg-config python3 python3-distutils python3-pkg-resources \ -python3-pycryptodome python3-pyelftools python3-setuptools python-is-python3 \ -sharutils swig ttf-unifont unar unifont unzip uuid-dev wget zlib1g-dev ccache \ -g++-mipsel-linux-gnu make genisoimage mtools \ -" diff --git a/config/dependencies/ubuntu2404 b/config/dependencies/ubuntu2404 index b0633e69..a54a3177 100755 --- a/config/dependencies/ubuntu2404 +++ b/config/dependencies/ubuntu2404 @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-3.0-or-later -pkg_add="apt-get install $reinstall" +pkg_add="apt-get install --no-install-recommends $reinstall" pkglist=" \ autoconf autogen automake autopoint autotools-dev bc binutils-arm-none-eabi \ bison build-essential cmake curl device-tree-compiler doxygen e2fsprogs efitools \ diff --git a/config/flashprog/patches/0002-lbmk-hack-add-config-Makefile-options.patch b/config/flashprog/patches/0002-lbmk-hack-add-config-Makefile-options.patch new file mode 100644 index 00000000..d2702d23 --- /dev/null +++ b/config/flashprog/patches/0002-lbmk-hack-add-config-Makefile-options.patch @@ -0,0 +1,48 @@ +From b7a4d2907d3358173510aa6e31af08afe4969b38 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Thu, 22 May 2025 11:25:42 +0100 +Subject: [PATCH 1/1] lbmk hack: add config Makefile options + +this prevents a build error when running the +-u, -m, -s, -l and -n options in lbmk without +argument. + +this makes no functional changes to flashprog. + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + Makefile | 18 +++++++++++++++++- + 1 file changed, 17 insertions(+), 1 deletion(-) + +diff --git a/Makefile b/Makefile +index 12adf61..701f842 100644 +--- a/Makefile ++++ b/Makefile +@@ -1113,7 +1113,23 @@ libpayload: clean + gitconfig: + ./util/getrevision.sh -c 2>/dev/null && ./util/git-hooks/install.sh + +-.PHONY: all install clean distclean config branch tag versioninfo _export export tarball libpayload gitconfig ++oldconfig: ++ : ++ ++menuconfig: ++ : ++ ++savedefconfig: ++ : ++ ++olddefconfig: ++ : ++ ++nconfig: ++ : ++ ++ ++.PHONY: all install clean distclean config branch tag versioninfo _export export tarball libpayload gitconfig oldconfig menuconfig savedefconfig olddefconfig nconfig + + # Disable implicit suffixes and built-in rules (for performance and profit) + .SUFFIXES: +-- +2.39.5 + diff --git a/config/git/bios_extract/pkg.cfg b/config/git/bios_extract/pkg.cfg index 8489f385..95879be6 100644 --- a/config/git/bios_extract/pkg.cfg +++ b/config/git/bios_extract/pkg.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later rev="0a7bc1d71735ef97b00dfec0fd54a02fcc5d1bb0" -url="https://review.coreboot.org/bios_extract" -bkup_url="https://github.com/coreboot/bios_extract" +url="https://github.com/coreboot/bios_extract" +bkup_url="https://review.coreboot.org/bios_extract" diff --git a/config/git/coreboot/pkg.cfg b/config/git/coreboot/pkg.cfg index 2a23ee5c..ee81a0d4 100644 --- a/config/git/coreboot/pkg.cfg +++ b/config/git/coreboot/pkg.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later rev="HEAD" -url="https://review.coreboot.org/coreboot" -bkup_url="https://github.com/coreboot/coreboot.git" +url="https://github.com/coreboot/coreboot.git" +bkup_url="https://review.coreboot.org/coreboot" diff --git a/config/git/deguard/pkg.cfg b/config/git/deguard/pkg.cfg index 300417ca..1d560890 100644 --- a/config/git/deguard/pkg.cfg +++ b/config/git/deguard/pkg.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -rev="de176a7f20650b272a01efb633931a63128c1647" -url="https://review.coreboot.org/deguard" -bkup_url="https://codeberg.org/libreboot/deguard" +rev="0ed3e4ff824fc42f71ee22907d0594ded38ba7b2" +url="https://codeberg.org/libreboot/deguard" +bkup_url="https://review.coreboot.org/deguard" diff --git a/config/git/docs/pkg.cfg b/config/git/docs/pkg.cfg index 144292fd..83820858 100644 --- a/config/git/docs/pkg.cfg +++ b/config/git/docs/pkg.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -rev="e72d055915c3a9ffe739982946e101b146b2483c" -url="https://codeberg.org/vimuser/untitled" -bkup_url="https://notabug.org/untitled/untitled" +rev="e4abe735ae13cf43e5da1d79fe63726ab01ac907" +url="https://codeberg.org/libreboot/lbssg" +bkup_url="https://notabug.org/libreboot/lbssg" diff --git a/config/git/flashprog/pkg.cfg b/config/git/flashprog/pkg.cfg index 6cfbdb38..16231efe 100644 --- a/config/git/flashprog/pkg.cfg +++ b/config/git/flashprog/pkg.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -rev="eb2c04185f8f471c768b742d66e4c552effdd9cb" +rev="e060018655f802896dc226832d25e223102889c8" url="https://review.sourcearcade.org/flashprog" bkup_url="https://github.com/SourceArcade/flashprog.git" diff --git a/config/git/libarchive/pkg.cfg b/config/git/libarchive/pkg.cfg new file mode 100644 index 00000000..afce5b26 --- /dev/null +++ b/config/git/libarchive/pkg.cfg @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +rev="9525f90ca4bd14c7b335e2f8c84a4607b0af6bdf" +url="https://codeberg.org/libreboot/libarchive" +bkup_url="https://git.disroot.org/libreboot/libarchive" diff --git a/config/git/me_cleaner/pkg.cfg b/config/git/me_cleaner/pkg.cfg new file mode 100644 index 00000000..8a09d9c3 --- /dev/null +++ b/config/git/me_cleaner/pkg.cfg @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +rev="f20532d90378120b1ed2e710cecb36505cc70c31" +url="https://codeberg.org/libreboot/me_cleaner" +bkup_url="https://git.disroot.org/libreboot/me_cleaner" diff --git a/config/git/pcsx-redux/pkg.cfg b/config/git/pcsx-redux/pkg.cfg index 88443cb3..d63d6b84 100644 --- a/config/git/pcsx-redux/pkg.cfg +++ b/config/git/pcsx-redux/pkg.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -rev="6ec5348058413619b290b069adbdae68180ce8c0" +rev="8f8cc3d5637dedd6ca1e40b5407127e2afc18b34" url="https://github.com/grumpycoders/pcsx-redux" bkup_url="https://codeberg.org/vimuser/pcsx-redux" diff --git a/config/git/pico-sdk/pkg.cfg b/config/git/pico-sdk/pkg.cfg index 8af13d09..284ee057 100644 --- a/config/git/pico-sdk/pkg.cfg +++ b/config/git/pico-sdk/pkg.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -rev="95ea6acad131124694cda1c162c52cd30e0aece0" +rev="6a7db34ff63345a7badec79ebea3aaef1712f374" url="https://codeberg.org/libreboot/pico-sdk" bkup_url="https://github.com/raspberrypi/pico-sdk" diff --git a/config/git/pico-serprog/pkg.cfg b/config/git/pico-serprog/pkg.cfg index 7c54e9c2..03b45a1b 100644 --- a/config/git/pico-serprog/pkg.cfg +++ b/config/git/pico-serprog/pkg.cfg @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-3.0-or-later -rev="e75e3a20e63269a5e3189bc2e49a6a81d45a636a" +rev="3ea792664ed29ca1ff3e2e78d1d16099684781bd" url="https://codeberg.org/libreboot/pico-serprog" bkup_url="https://git.disroot.org/libreboot/pico-serprog" depend="pico-sdk" diff --git a/config/git/pico-serprog/rp2040-serprog b/config/git/pico-serprog/rp2040-serprog deleted file mode 120000 index 25af91dc..00000000 --- a/config/git/pico-serprog/rp2040-serprog +++ /dev/null @@ -1 +0,0 @@ -config/git/rp2040-serprog
\ No newline at end of file diff --git a/config/git/seabios/pkg.cfg b/config/git/seabios/pkg.cfg index 0ee91a00..4280c6fd 100644 --- a/config/git/seabios/pkg.cfg +++ b/config/git/seabios/pkg.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later rev="HEAD" -url="https://review.coreboot.org/seabios" -bkup_url="https://github.com/coreboot/seabios" +url="https://github.com/coreboot/seabios" +bkup_url="https://review.coreboot.org/seabios" diff --git a/config/git/uefitool/pkg.cfg b/config/git/uefitool/pkg.cfg index 8b269666..f972acb2 100644 --- a/config/git/uefitool/pkg.cfg +++ b/config/git/uefitool/pkg.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -rev="4a41c33596e9bc3ae812e763965d91ac57553e02" +rev="a072527138637a0e2808ad1544a02d187ab1ed79" url="https://codeberg.org/libreboot/UEFITool" bkup_url="https://github.com/LongSoft/UEFITool" diff --git a/config/grub/default/config/payload b/config/grub/default/config/payload index 05e64bbd..3d84413e 100644 --- a/config/grub/default/config/payload +++ b/config/grub/default/config/payload @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -# Copyright (C) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org> +# Copyright (C) 2014-2016,2020-2021,2023-2025 Leah Rowe <leah@libreboot.org> # Copyright (C) 2015 Klemens Nanni <contact@autoboot.org> set prefix=(memdisk)/boot/grub @@ -143,16 +143,12 @@ menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o # grub device enumeration is very slow, so checks are hardcoded - # TODO: add more strings, based on what distros set up when - # the user select auto-partitioning on those installers - lvmvol="lvm/grubcrypt-bootvol lvm/grubcrypt-rootvol" - raidvol="md/0 md/1 md/2 md/3 md/4 md/5 md/6 md/7 md/8 md/9" - # in practise, doing multiple redundant checks is perfectly fast and + # in practise, doing multiple redundant checks is perfectly fast # TODO: optimize grub itself, and use */? here for everything - for vol in ${lvmvol} ${raidvol} ; do + for vol in ${raidvol} ; do try_bootcfg "${vol}" done @@ -164,6 +160,9 @@ menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o bootdev="${bootdev} (ahci${i},${part})" elif [ "${grub_disk}" = "ata" ]; then bootdev="${bootdev} (ata${i},${part})" + elif [ "${grub_disk}" = "nvme" ]; then + # TODO: do we care about other namesapces + bootdev="${bootdev} (nvme${i}n1,${part})" fi done done @@ -171,23 +170,37 @@ menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o set pager=0 echo -n "Attempting to unlock encrypted volumes" - for dev in ${bootdev} ${lvmvol} ${raidvol}; do + for dev in ${bootdev} ${raidvol}; do if cryptomount "${dev}" ; then break ; fi done set pager=1 echo + search_bootcfg crypto + + lvmvol="" + # after cryptomount, lvm volumes might be available + # using * is slow on some machines, but we use it here, + # just once. in so doing, we find every lvm volume + for vol in (*); do + if regexp ^\\(lvm/ $vol; then + lvmvol="${lvmvol} ${vol}" + try_bootcfg "${vol}" + fi + done + + # user might have put luks inside lvm + set pager=0 + echo "Attempting to unlock encrypted LVMs" for vol in ${lvmvol}; do - try_bootcfg "${vol}" + cryptomount "$vol" done + set pager=1 + echo search_bootcfg crypto - for vol in lvm/* ; do - try_bootcfg "${vol}" - done - true # Prevent pager requiring to accept each line instead of whole screen } diff --git a/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch index e5d24e7e..c41f2d4d 100644 --- a/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch +++ b/config/grub/default/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch @@ -1,7 +1,7 @@ -From 26b89e90c8d6d89f2e52b00ad15ba58fd2e1fbfb Mon Sep 17 00:00:00 2001 +From dae0cfdbb484eb3576300ad9c4d2c362f4e8fa64 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 31 Oct 2021 03:47:05 +0000 -Subject: [PATCH 01/13] mitigate grub's missing characters for borders/arrow +Subject: [PATCH 01/14] mitigate grub's missing characters for borders/arrow characters This cleans up the display on the main screen in GRUB. diff --git a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch index 6b0665db..e30f1386 100644 --- a/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch +++ b/config/grub/default/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch @@ -1,14 +1,14 @@ -From 10d264bdfde24fcf78da6f641898eb267f83066f Mon Sep 17 00:00:00 2001 +From 25ae072be49c23abffff657085c16ac3780b8cda Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sat, 19 Nov 2022 16:30:24 +0000 -Subject: [PATCH 02/13] say the name libreboot, in the grub menu +Subject: [PATCH 02/14] say the name libreboot, in the grub menu --- grub-core/normal/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c -index bd4431000..ff16e0f2e 100644 +index 96abfda2f..d806db9c4 100644 --- a/grub-core/normal/main.c +++ b/grub-core/normal/main.c @@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term, @@ -16,7 +16,7 @@ index bd4431000..ff16e0f2e 100644 grub_term_cls (term); - msg_formatted = grub_xasprintf (_("GNU GRUB version %s"), PACKAGE_VERSION); -+ msg_formatted = grub_xasprintf (_("Libreboot 20241206 release, based on coreboot. https://libreboot.org/")); ++ msg_formatted = grub_xasprintf (_("Libreboot 25.06 Luminous Lemon (GRUB menu): https://libreboot.org/")); if (!msg_formatted) return; diff --git a/config/grub/default/patches/0003-Add-CC0-license.patch b/config/grub/default/patches/0003-Add-CC0-license.patch index a5f75eb4..09b70f1c 100644 --- a/config/grub/default/patches/0003-Add-CC0-license.patch +++ b/config/grub/default/patches/0003-Add-CC0-license.patch @@ -1,7 +1,7 @@ -From 689c09a6b675ba52318cd879b289ac3d67073cd4 Mon Sep 17 00:00:00 2001 +From e9969b4ee38e3d9fda1fdff02e127830d7fdf2ec Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 03/13] Add CC0 license +Subject: [PATCH 03/14] Add CC0 license Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -10,10 +10,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index 8ad015b07..9980bae90 100644 +index de8c3aa8d..4a3be8568 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -494,7 +494,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e) +@@ -495,7 +495,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e) if (grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3") == 0 || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3+") == 0 diff --git a/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch index 9550110e..6d413bae 100644 --- a/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch +++ b/config/grub/default/patches/0004-Define-GRUB_UINT32_MAX.patch @@ -1,7 +1,7 @@ -From 63dc3c9ca6e5635b5c7e7ba24c996b23e79a92e3 Mon Sep 17 00:00:00 2001 +From 421a44b2f8211fa46ea523fc0feeaba9940af0e7 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 04/13] Define GRUB_UINT32_MAX +Subject: [PATCH 04/14] Define GRUB_UINT32_MAX Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- diff --git a/config/grub/default/patches/0005-Add-Argon2-algorithm.patch b/config/grub/default/patches/0005-Add-Argon2-algorithm.patch index fef68ee3..26a150b7 100644 --- a/config/grub/default/patches/0005-Add-Argon2-algorithm.patch +++ b/config/grub/default/patches/0005-Add-Argon2-algorithm.patch @@ -1,7 +1,7 @@ -From be6452a88ff3cbe033d37b739829e41798682510 Mon Sep 17 00:00:00 2001 +From a31496a4fb9dc85dfbfc3442898aca4b64716986 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 05/13] Add Argon2 algorithm +Subject: [PATCH 05/14] Add Argon2 algorithm Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -30,7 +30,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> create mode 100644 grub-core/lib/argon2/ref.c diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi -index 3ad8e3efa..d7c6232af 100644 +index f4367f895..9d96cedf9 100644 --- a/docs/grub-dev.texi +++ b/docs/grub-dev.texi @@ -503,12 +503,76 @@ GRUB includes some code from other projects, and it is sometimes necessary @@ -111,7 +111,7 @@ index 3ad8e3efa..d7c6232af 100644 @section Gnulib diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index f70e02e69..f5f9b040c 100644 +index 24e8c8437..0ee65d54d 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def @@ -1219,6 +1219,14 @@ module = { diff --git a/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch index 8abe7669..1531d60c 100644 --- a/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch +++ b/config/grub/default/patches/0006-Error-on-missing-Argon2id-parameters.patch @@ -1,7 +1,7 @@ -From 39f620fbe7c4a791062b59d4a8d26c35408aca45 Mon Sep 17 00:00:00 2001 +From 594a7011d551af530bbbdf5e39b941811a0b7811 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 06/13] Error on missing Argon2id parameters +Subject: [PATCH 06/14] Error on missing Argon2id parameters Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -9,10 +9,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c -index d5106402f..bc818ea69 100644 +index b17cd2115..bbd8f5579 100644 --- a/grub-core/disk/luks2.c +++ b/grub-core/disk/luks2.c -@@ -38,6 +38,7 @@ GRUB_MOD_LICENSE ("GPLv3+"); +@@ -39,6 +39,7 @@ GRUB_MOD_LICENSE ("GPLv3+"); enum grub_luks2_kdf_type { LUKS2_KDF_TYPE_ARGON2I, @@ -20,7 +20,7 @@ index d5106402f..bc818ea69 100644 LUKS2_KDF_TYPE_PBKDF2 }; typedef enum grub_luks2_kdf_type grub_luks2_kdf_type_t; -@@ -90,7 +91,7 @@ struct grub_luks2_keyslot +@@ -91,7 +92,7 @@ struct grub_luks2_keyslot grub_int64_t time; grub_int64_t memory; grub_int64_t cpus; @@ -29,7 +29,7 @@ index d5106402f..bc818ea69 100644 struct { const char *hash; -@@ -160,10 +161,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot) +@@ -161,10 +162,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot) return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing or invalid KDF"); else if (!grub_strcmp (type, "argon2i") || !grub_strcmp (type, "argon2id")) { @@ -45,7 +45,7 @@ index d5106402f..bc818ea69 100644 return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing Argon2i parameters"); } else if (!grub_strcmp (type, "pbkdf2")) -@@ -459,6 +461,7 @@ luks2_decrypt_key (grub_uint8_t *out_key, +@@ -460,6 +462,7 @@ luks2_decrypt_key (grub_uint8_t *out_key, switch (k->kdf.type) { case LUKS2_KDF_TYPE_ARGON2I: diff --git a/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch index 19da5e51..344dfb1d 100644 --- a/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch +++ b/config/grub/default/patches/0007-Compile-with-Argon2id-support.patch @@ -1,7 +1,7 @@ -From c192948ea0329d06cf4706667305b473b48c15f5 Mon Sep 17 00:00:00 2001 +From 6a757a3cdf22e840162bb222a87446a32d9b94a2 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 07/13] Compile with Argon2id support +Subject: [PATCH 07/14] Compile with Argon2id support Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -35,7 +35,7 @@ index 038253b37..2f19569c9 100644 common = grub-core/disk/luks.c; common = grub-core/disk/luks2.c; diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index f5f9b040c..f1f38d8d3 100644 +index 0ee65d54d..cd29a9df8 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def @@ -1242,7 +1242,7 @@ module = { @@ -48,18 +48,18 @@ index f5f9b040c..f1f38d8d3 100644 module = { diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c -index bc818ea69..5b9eaa599 100644 +index bbd8f5579..02cd615d9 100644 --- a/grub-core/disk/luks2.c +++ b/grub-core/disk/luks2.c -@@ -27,6 +27,7 @@ - #include <grub/partition.h> +@@ -28,6 +28,7 @@ #include <grub/i18n.h> + #include <grub/safemath.h> +#include <argon2.h> #include <base64.h> #include <json.h> -@@ -462,8 +463,16 @@ luks2_decrypt_key (grub_uint8_t *out_key, +@@ -463,8 +464,16 @@ luks2_decrypt_key (grub_uint8_t *out_key, { case LUKS2_KDF_TYPE_ARGON2I: case LUKS2_KDF_TYPE_ARGON2ID: diff --git a/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch index cb954976..b7ea852a 100644 --- a/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch +++ b/config/grub/default/patches/0008-Make-grub-install-work-with-Argon2.patch @@ -1,7 +1,7 @@ -From 2887e35e882a86e474052112a23608570b3f41b2 Mon Sep 17 00:00:00 2001 +From 4e4ded3f127f5567bdb41de7b671bd9b2a478125 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 08/13] Make grub-install work with Argon2 +Subject: [PATCH 08/14] Make grub-install work with Argon2 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -9,7 +9,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 1 file changed, 2 insertions(+) diff --git a/util/grub-install.c b/util/grub-install.c -index 7dc5657bb..cf7315891 100644 +index 060246589..059036d3c 100644 --- a/util/grub-install.c +++ b/util/grub-install.c @@ -448,6 +448,8 @@ probe_mods (grub_disk_t disk) diff --git a/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch index 763fea91..12f6f111 100644 --- a/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch +++ b/config/grub/default/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch @@ -1,7 +1,7 @@ -From 548c5b227718783776b81d1e074b1982e76f2327 Mon Sep 17 00:00:00 2001 +From fc815438e70cbb13166ab6711b6f6460521b1fd4 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Mon, 30 Oct 2023 22:19:21 +0000 -Subject: [PATCH 09/13] at_keyboard coreboot: force scancodes2+translate +Subject: [PATCH 09/14] at_keyboard coreboot: force scancodes2+translate Scan code set 2 with translation should be assumed in every case, as the default starting position. diff --git a/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch index a0eff28d..8c0a5054 100644 --- a/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch +++ b/config/grub/default/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch @@ -1,7 +1,7 @@ -From 89764949b2bcfaad122800f336aa205fea4a1fed Mon Sep 17 00:00:00 2001 +From defb7ad35579c321d32b81af7ddd6fecf34cb618 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Tue, 31 Oct 2023 10:33:28 +0000 -Subject: [PATCH 10/13] keylayouts: don't print "Unknown key" message +Subject: [PATCH 10/14] keylayouts: don't print "Unknown key" message on keyboards with stuck keys, this results in GRUB just spewing it repeatedly, preventing use of GRUB. diff --git a/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch index d2ed0055..cef7a273 100644 --- a/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch +++ b/config/grub/default/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch @@ -1,7 +1,7 @@ -From c6de75a3369aebb51df1659d89a6d7024c84d85e Mon Sep 17 00:00:00 2001 +From d0345db429be8089145e0c072db9ac8db0b644bd Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 16:14:58 +0000 -Subject: [PATCH 11/13] don't print missing prefix errors on the screen +Subject: [PATCH 11/14] don't print missing prefix errors on the screen we do actually set the prefix. this patch modifies grub to still set grub_errno and return accordingly, @@ -85,10 +85,10 @@ index 18de52562..2a0fea6c8 100644 } file = try_open_from_prefix (prefix, filename); diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index 9980bae90..4457cad7c 100644 +index 4a3be8568..6ae3d73f8 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -871,7 +871,7 @@ grub_dl_load (const char *name) +@@ -881,7 +881,7 @@ grub_dl_load (const char *name) return 0; if (! grub_dl_dir) { diff --git a/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch index 85cde7a7..e30c3f9a 100644 --- a/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch +++ b/config/grub/default/patches/0012-don-t-print-error-if-module-not-found.patch @@ -1,7 +1,7 @@ -From e8e419fe16843e7b7d8c614531df9447db689d28 Mon Sep 17 00:00:00 2001 +From 2fe963570ac19e3390a792ca2c195112d4efdc24 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 16:36:22 +0000 -Subject: [PATCH 12/13] don't print error if module not found +Subject: [PATCH 12/14] don't print error if module not found still set grub_errno accordingly, and otherwise behave the same. in libreboot, we remove a lot of @@ -17,10 +17,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org> 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index 4457cad7c..ea9fe8019 100644 +index 6ae3d73f8..4c15027fe 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -510,7 +510,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e) +@@ -511,7 +511,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e) s = grub_dl_find_section (e, ".modname"); if (!s) diff --git a/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch index 70ce3059..0cdadbe9 100644 --- a/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch +++ b/config/grub/default/patches/0013-don-t-print-empty-error-messages.patch @@ -1,7 +1,7 @@ -From 6eb22aa4110b99245fd31dcaad979d5049d398d6 Mon Sep 17 00:00:00 2001 +From 5a1dd3c19307859aac7d1a22a7a0c0c7ffb09ddb Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 17:25:20 +0000 -Subject: [PATCH 13/13] don't print empty error messages +Subject: [PATCH 13/14] don't print empty error messages this is part two of the quest to kill the prefix error message. after i disabled prefix-related diff --git a/config/grub/default/patches/0014-kern-coreboot-mmap-Map-to-reserved.patch b/config/grub/default/patches/0014-kern-coreboot-mmap-Map-to-reserved.patch new file mode 100644 index 00000000..78e4eafc --- /dev/null +++ b/config/grub/default/patches/0014-kern-coreboot-mmap-Map-to-reserved.patch @@ -0,0 +1,37 @@ +From 818f1b19f32e355cc2a0ebe29eee2a2bac7bcb3f Mon Sep 17 00:00:00 2001 +From: Paul Menzel <pmenzel@molgen.mpg.de> +Date: Mon, 17 May 2021 10:24:36 +0200 +Subject: [PATCH 14/14] kern/coreboot/mmap: Map to reserved + +https://git.savannah.gnu.org/cgit/grub.git/commit/?id=6de9ee86bf9ae50967413e6a73b5dfd13e5ffb50 + +Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> +--- + grub-core/kern/coreboot/mmap.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/grub-core/kern/coreboot/mmap.c b/grub-core/kern/coreboot/mmap.c +index caf8f7cef..2fc316e8d 100644 +--- a/grub-core/kern/coreboot/mmap.c ++++ b/grub-core/kern/coreboot/mmap.c +@@ -59,7 +59,7 @@ iterate_linuxbios_table (grub_linuxbios_table_item_t table_item, void *data) + /* Multiboot mmaps match with the coreboot mmap + definition. Therefore, we can just pass type + through. */ +- mem_region->type, ++ (mem_region->type >= 13) ? 2 : mem_region->type, + ctx->hook_data)) + return 1; + if (start < 0xa0000) +@@ -81,7 +81,7 @@ iterate_linuxbios_table (grub_linuxbios_table_item_t table_item, void *data) + /* Multiboot mmaps match with the coreboot mmap + definition. Therefore, we can just pass type + through. */ +- mem_region->type, ++ (mem_region->type >= 13) ? 2 : mem_region->type, + ctx->hook_data)) + return 1; + } +-- +2.39.5 + diff --git a/config/grub/default/target.cfg b/config/grub/default/target.cfg index 300fdd7e..6a13a189 100644 --- a/config/grub/default/target.cfg +++ b/config/grub/default/target.cfg @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-3.0-or-later tree="default" -rev="6811f6f09d61996a3acbc4fc0414e45964f0e2d9" +rev="a68a7dece464c35b1c8d20b98502b6881b103911" diff --git a/config/grub/nvme/config/payload b/config/grub/nvme/config/payload index 52b8dfd9..4f3de36e 100644 --- a/config/grub/nvme/config/payload +++ b/config/grub/nvme/config/payload @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -# Copyright (C) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org> +# Copyright (C) 2014-2016,2020-2021,2023-2025 Leah Rowe <leah@libreboot.org> # Copyright (C) 2015 Klemens Nanni <contact@autoboot.org> set prefix=(memdisk)/boot/grub @@ -155,16 +155,12 @@ menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o # grub device enumeration is very slow, so checks are hardcoded - # TODO: add more strings, based on what distros set up when - # the user select auto-partitioning on those installers - lvmvol="lvm/grubcrypt-bootvol lvm/grubcrypt-rootvol" - raidvol="md/0 md/1 md/2 md/3 md/4 md/5 md/6 md/7 md/8 md/9" - # in practise, doing multiple redundant checks is perfectly fast and + # in practise, doing multiple redundant checks is perfectly fast # TODO: optimize grub itself, and use */? here for everything - for vol in ${lvmvol} ${raidvol} ; do + for vol in ${raidvol} ; do try_bootcfg "${vol}" done @@ -186,23 +182,37 @@ menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o set pager=0 echo -n "Attempting to unlock encrypted volumes" - for dev in ${bootdev} ${lvmvol} ${raidvol}; do + for dev in ${bootdev} ${raidvol}; do if cryptomount "${dev}" ; then break ; fi done set pager=1 echo + search_bootcfg crypto + + lvmvol="" + # after cryptomount, lvm volumes might be available + # using * is slow on some machines, but we use it here, + # just once. in so doing, we find every lvm volume + for vol in (*); do + if regexp ^\\(lvm/ $vol; then + lvmvol="${lvmvol} ${vol}" + try_bootcfg "${vol}" + fi + done + + # user might have put luks inside lvm + set pager=0 + echo "Attempting to unlock encrypted LVMs" for vol in ${lvmvol}; do - try_bootcfg "${vol}" + cryptomount "$vol" done + set pager=1 + echo search_bootcfg crypto - for vol in lvm/* ; do - try_bootcfg "${vol}" - done - true # Prevent pager requiring to accept each line instead of whole screen } diff --git a/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch index e7f71551..1c55b85a 100644 --- a/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch +++ b/config/grub/nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch @@ -1,7 +1,7 @@ -From 985e87b15e60edb31d8b70f765b97cc8d436d10e Mon Sep 17 00:00:00 2001 +From 759a673b3c4601a32837f2b26661d2998f6cb8d6 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 31 Oct 2021 03:47:05 +0000 -Subject: [PATCH 01/14] mitigate grub's missing characters for borders/arrow +Subject: [PATCH 01/15] mitigate grub's missing characters for borders/arrow characters This cleans up the display on the main screen in GRUB. diff --git a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch index 5036a859..8515f2a8 100644 --- a/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch +++ b/config/grub/nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch @@ -1,14 +1,14 @@ -From f9ae737976ff52fc656459942dd0bdbd763e66df Mon Sep 17 00:00:00 2001 +From 88007c24f8bceb97d0aecf31545c3b49b380b1a6 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sat, 19 Nov 2022 16:30:24 +0000 -Subject: [PATCH 02/14] say the name libreboot, in the grub menu +Subject: [PATCH 02/15] say the name libreboot, in the grub menu --- grub-core/normal/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c -index bd4431000..ff16e0f2e 100644 +index 96abfda2f..d806db9c4 100644 --- a/grub-core/normal/main.c +++ b/grub-core/normal/main.c @@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term, @@ -16,7 +16,7 @@ index bd4431000..ff16e0f2e 100644 grub_term_cls (term); - msg_formatted = grub_xasprintf (_("GNU GRUB version %s"), PACKAGE_VERSION); -+ msg_formatted = grub_xasprintf (_("Libreboot 20241206 release, based on coreboot. https://libreboot.org/")); ++ msg_formatted = grub_xasprintf (_("Libreboot 25.06 Luminous Lemon (GRUB menu): https://libreboot.org/")); if (!msg_formatted) return; diff --git a/config/grub/nvme/patches/0003-Add-CC0-license.patch b/config/grub/nvme/patches/0003-Add-CC0-license.patch index cfb8f56a..5b09922b 100644 --- a/config/grub/nvme/patches/0003-Add-CC0-license.patch +++ b/config/grub/nvme/patches/0003-Add-CC0-license.patch @@ -1,7 +1,7 @@ -From 40c559b7f1e402520a9044b4d3e22b7afd1bb981 Mon Sep 17 00:00:00 2001 +From d1925aadf848c269b35a3004c104e014df582536 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 03/14] Add CC0 license +Subject: [PATCH 03/15] Add CC0 license Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -10,10 +10,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index 8ad015b07..9980bae90 100644 +index de8c3aa8d..4a3be8568 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -494,7 +494,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e) +@@ -495,7 +495,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e) if (grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3") == 0 || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3+") == 0 diff --git a/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch index bdd6d4de..be0e6b13 100644 --- a/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch +++ b/config/grub/nvme/patches/0004-Define-GRUB_UINT32_MAX.patch @@ -1,7 +1,7 @@ -From 2d5493a02da107e7f3673b0ff5f0920ad557df78 Mon Sep 17 00:00:00 2001 +From b0adafee9fcd820dd9d1c03a9619953cb3407854 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 04/14] Define GRUB_UINT32_MAX +Subject: [PATCH 04/15] Define GRUB_UINT32_MAX Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- diff --git a/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch b/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch index d816825e..772a05d9 100644 --- a/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch +++ b/config/grub/nvme/patches/0005-Add-Argon2-algorithm.patch @@ -1,7 +1,7 @@ -From 520573cfa2b370a7d72102321bb0735a86e2999c Mon Sep 17 00:00:00 2001 +From c42e09330674005d8b2d74f75fca387af87e5465 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 05/14] Add Argon2 algorithm +Subject: [PATCH 05/15] Add Argon2 algorithm Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -30,7 +30,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> create mode 100644 grub-core/lib/argon2/ref.c diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi -index 3ad8e3efa..d7c6232af 100644 +index f4367f895..9d96cedf9 100644 --- a/docs/grub-dev.texi +++ b/docs/grub-dev.texi @@ -503,12 +503,76 @@ GRUB includes some code from other projects, and it is sometimes necessary @@ -111,7 +111,7 @@ index 3ad8e3efa..d7c6232af 100644 @section Gnulib diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index f70e02e69..f5f9b040c 100644 +index 24e8c8437..0ee65d54d 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def @@ -1219,6 +1219,14 @@ module = { diff --git a/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch index c94c7580..508fd740 100644 --- a/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch +++ b/config/grub/nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch @@ -1,7 +1,7 @@ -From d3b500914ce84be6bcae0f4f5fefff21e4e0ca63 Mon Sep 17 00:00:00 2001 +From 6c74f4ff91f741e74dca1accc6c173c277f4ca5b Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 06/14] Error on missing Argon2id parameters +Subject: [PATCH 06/15] Error on missing Argon2id parameters Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -9,10 +9,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c -index d5106402f..bc818ea69 100644 +index b17cd2115..bbd8f5579 100644 --- a/grub-core/disk/luks2.c +++ b/grub-core/disk/luks2.c -@@ -38,6 +38,7 @@ GRUB_MOD_LICENSE ("GPLv3+"); +@@ -39,6 +39,7 @@ GRUB_MOD_LICENSE ("GPLv3+"); enum grub_luks2_kdf_type { LUKS2_KDF_TYPE_ARGON2I, @@ -20,7 +20,7 @@ index d5106402f..bc818ea69 100644 LUKS2_KDF_TYPE_PBKDF2 }; typedef enum grub_luks2_kdf_type grub_luks2_kdf_type_t; -@@ -90,7 +91,7 @@ struct grub_luks2_keyslot +@@ -91,7 +92,7 @@ struct grub_luks2_keyslot grub_int64_t time; grub_int64_t memory; grub_int64_t cpus; @@ -29,7 +29,7 @@ index d5106402f..bc818ea69 100644 struct { const char *hash; -@@ -160,10 +161,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot) +@@ -161,10 +162,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot) return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing or invalid KDF"); else if (!grub_strcmp (type, "argon2i") || !grub_strcmp (type, "argon2id")) { @@ -45,7 +45,7 @@ index d5106402f..bc818ea69 100644 return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing Argon2i parameters"); } else if (!grub_strcmp (type, "pbkdf2")) -@@ -459,6 +461,7 @@ luks2_decrypt_key (grub_uint8_t *out_key, +@@ -460,6 +462,7 @@ luks2_decrypt_key (grub_uint8_t *out_key, switch (k->kdf.type) { case LUKS2_KDF_TYPE_ARGON2I: diff --git a/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch index cd4b6e49..1cfe1ab7 100644 --- a/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch +++ b/config/grub/nvme/patches/0007-Compile-with-Argon2id-support.patch @@ -1,7 +1,7 @@ -From 5774fd23a381d7d96e65ede9dd300b7e83fa1f06 Mon Sep 17 00:00:00 2001 +From 50157401f90366e5b7c8f80ae7bc59c2276f7c35 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 07/14] Compile with Argon2id support +Subject: [PATCH 07/15] Compile with Argon2id support Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -35,7 +35,7 @@ index 038253b37..2f19569c9 100644 common = grub-core/disk/luks.c; common = grub-core/disk/luks2.c; diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index f5f9b040c..f1f38d8d3 100644 +index 0ee65d54d..cd29a9df8 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def @@ -1242,7 +1242,7 @@ module = { @@ -48,18 +48,18 @@ index f5f9b040c..f1f38d8d3 100644 module = { diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c -index bc818ea69..5b9eaa599 100644 +index bbd8f5579..02cd615d9 100644 --- a/grub-core/disk/luks2.c +++ b/grub-core/disk/luks2.c -@@ -27,6 +27,7 @@ - #include <grub/partition.h> +@@ -28,6 +28,7 @@ #include <grub/i18n.h> + #include <grub/safemath.h> +#include <argon2.h> #include <base64.h> #include <json.h> -@@ -462,8 +463,16 @@ luks2_decrypt_key (grub_uint8_t *out_key, +@@ -463,8 +464,16 @@ luks2_decrypt_key (grub_uint8_t *out_key, { case LUKS2_KDF_TYPE_ARGON2I: case LUKS2_KDF_TYPE_ARGON2ID: diff --git a/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch index 7e240cc8..bdf9343e 100644 --- a/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch +++ b/config/grub/nvme/patches/0008-Make-grub-install-work-with-Argon2.patch @@ -1,7 +1,7 @@ -From b8b9be1749d4802dde57f3547a1ee91c8fec1c3e Mon Sep 17 00:00:00 2001 +From 2f7814e55cbae04cb2b307fee559f40cdc70609c Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 08/14] Make grub-install work with Argon2 +Subject: [PATCH 08/15] Make grub-install work with Argon2 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -9,7 +9,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 1 file changed, 2 insertions(+) diff --git a/util/grub-install.c b/util/grub-install.c -index 7dc5657bb..cf7315891 100644 +index 060246589..059036d3c 100644 --- a/util/grub-install.c +++ b/util/grub-install.c @@ -448,6 +448,8 @@ probe_mods (grub_disk_t disk) diff --git a/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch index 0fea10a5..3a8591d1 100644 --- a/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch +++ b/config/grub/nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch @@ -1,7 +1,7 @@ -From 93790c5686ea2ac4da8d2c67377fe84fd37df953 Mon Sep 17 00:00:00 2001 +From a90a11f02d5bfc8b9f9e1253a67906fde9102a14 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Mon, 30 Oct 2023 22:19:21 +0000 -Subject: [PATCH 09/14] at_keyboard coreboot: force scancodes2+translate +Subject: [PATCH 09/15] at_keyboard coreboot: force scancodes2+translate Scan code set 2 with translation should be assumed in every case, as the default starting position. diff --git a/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch index 06c308d1..8cc2f1b6 100644 --- a/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch +++ b/config/grub/nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch @@ -1,7 +1,7 @@ -From a18f0ddb9a396828bd11f540ed134047efe4b2bd Mon Sep 17 00:00:00 2001 +From 86d06a8075d87cdaece0c5495f7505ff01f1e752 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Tue, 31 Oct 2023 10:33:28 +0000 -Subject: [PATCH 10/14] keylayouts: don't print "Unknown key" message +Subject: [PATCH 10/15] keylayouts: don't print "Unknown key" message on keyboards with stuck keys, this results in GRUB just spewing it repeatedly, preventing use of GRUB. diff --git a/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch index f2b8de10..4f7014d8 100644 --- a/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch +++ b/config/grub/nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch @@ -1,7 +1,7 @@ -From 233c4f1a1182fd10ef60da98dd00b687c9edbee4 Mon Sep 17 00:00:00 2001 +From 92aab8e78e0a9dc400376f31fdd7eee980aa33aa Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 16:14:58 +0000 -Subject: [PATCH 11/14] don't print missing prefix errors on the screen +Subject: [PATCH 11/15] don't print missing prefix errors on the screen we do actually set the prefix. this patch modifies grub to still set grub_errno and return accordingly, @@ -85,10 +85,10 @@ index 18de52562..2a0fea6c8 100644 } file = try_open_from_prefix (prefix, filename); diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index 9980bae90..4457cad7c 100644 +index 4a3be8568..6ae3d73f8 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -871,7 +871,7 @@ grub_dl_load (const char *name) +@@ -881,7 +881,7 @@ grub_dl_load (const char *name) return 0; if (! grub_dl_dir) { diff --git a/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch index 41b0c2a8..fb4c836a 100644 --- a/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch +++ b/config/grub/nvme/patches/0012-don-t-print-error-if-module-not-found.patch @@ -1,7 +1,7 @@ -From c5ef7185f0e32a1a33aca181427cbee8f22af8d2 Mon Sep 17 00:00:00 2001 +From 62f4bd17485c3d65649de2cef398ec708f35ea9d Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 16:36:22 +0000 -Subject: [PATCH 12/14] don't print error if module not found +Subject: [PATCH 12/15] don't print error if module not found still set grub_errno accordingly, and otherwise behave the same. in libreboot, we remove a lot of @@ -17,10 +17,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org> 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index 4457cad7c..ea9fe8019 100644 +index 6ae3d73f8..4c15027fe 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -510,7 +510,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e) +@@ -511,7 +511,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e) s = grub_dl_find_section (e, ".modname"); if (!s) diff --git a/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch index 0c9c7f80..90aefde6 100644 --- a/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch +++ b/config/grub/nvme/patches/0013-don-t-print-empty-error-messages.patch @@ -1,7 +1,7 @@ -From 8e8d7a4f391538e4c0d42226ac48f5a1325deeb5 Mon Sep 17 00:00:00 2001 +From 97381d8c85c0934ca500f07339d89f9f6245b079 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 17:25:20 +0000 -Subject: [PATCH 13/14] don't print empty error messages +Subject: [PATCH 13/15] don't print empty error messages this is part two of the quest to kill the prefix error message. after i disabled prefix-related diff --git a/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch index c6b7bb87..a181ddc9 100644 --- a/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch +++ b/config/grub/nvme/patches/0014-Add-native-NVMe-driver-based-on-SeaBIOS.patch @@ -1,7 +1,7 @@ -From 0e358c800b58f8122e8d333541eba08cf1b4dbef Mon Sep 17 00:00:00 2001 +From c8d5481586133d7738a9e2d27b5554470bef719d Mon Sep 17 00:00:00 2001 From: Mate Kukri <km@mkukri.xyz> Date: Mon, 20 May 2024 11:43:35 +0100 -Subject: [PATCH 14/14] Add native NVMe driver based on SeaBIOS +Subject: [PATCH 14/15] Add native NVMe driver based on SeaBIOS Tested to successfully boot Debian on QEMU and OptiPlex 3050. @@ -31,20 +31,19 @@ index 43635d5ff..2c86dbbf6 100644 endif diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index f1f38d8d3..d09f9ffbc 100644 +index cd29a9df8..0034f8c61 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def -@@ -2676,4 +2676,10 @@ module = { - common = tests/asn1/asn1_test.c; +@@ -2682,3 +2682,9 @@ module = { cflags = '-Wno-uninitialized'; cppflags = '-I$(srcdir)/lib/libtasn1-grub -I$(srcdir)/tests/asn1/'; -+}; + }; + +module = { + name = nvme; + common = disk/nvme.c; + enable = pci; - }; ++}; diff --git a/grub-core/commands/nativedisk.c b/grub-core/commands/nativedisk.c index 6806bff9c..fd68a513e 100644 --- a/grub-core/commands/nativedisk.c diff --git a/config/grub/nvme/patches/0015-kern-coreboot-mmap-Map-to-reserved.patch b/config/grub/nvme/patches/0015-kern-coreboot-mmap-Map-to-reserved.patch new file mode 100644 index 00000000..06ebc37c --- /dev/null +++ b/config/grub/nvme/patches/0015-kern-coreboot-mmap-Map-to-reserved.patch @@ -0,0 +1,37 @@ +From 9228fa35d5af64e67a33372231baa3862f6fad67 Mon Sep 17 00:00:00 2001 +From: Paul Menzel <pmenzel@molgen.mpg.de> +Date: Mon, 17 May 2021 10:24:36 +0200 +Subject: [PATCH 15/15] kern/coreboot/mmap: Map to reserved + +https://git.savannah.gnu.org/cgit/grub.git/commit/?id=6de9ee86bf9ae50967413e6a73b5dfd13e5ffb50 + +Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> +--- + grub-core/kern/coreboot/mmap.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/grub-core/kern/coreboot/mmap.c b/grub-core/kern/coreboot/mmap.c +index caf8f7cef..2fc316e8d 100644 +--- a/grub-core/kern/coreboot/mmap.c ++++ b/grub-core/kern/coreboot/mmap.c +@@ -59,7 +59,7 @@ iterate_linuxbios_table (grub_linuxbios_table_item_t table_item, void *data) + /* Multiboot mmaps match with the coreboot mmap + definition. Therefore, we can just pass type + through. */ +- mem_region->type, ++ (mem_region->type >= 13) ? 2 : mem_region->type, + ctx->hook_data)) + return 1; + if (start < 0xa0000) +@@ -81,7 +81,7 @@ iterate_linuxbios_table (grub_linuxbios_table_item_t table_item, void *data) + /* Multiboot mmaps match with the coreboot mmap + definition. Therefore, we can just pass type + through. */ +- mem_region->type, ++ (mem_region->type >= 13) ? 2 : mem_region->type, + ctx->hook_data)) + return 1; + } +-- +2.39.5 + diff --git a/config/grub/nvme/target.cfg b/config/grub/nvme/target.cfg index ea4018df..0aff1315 100644 --- a/config/grub/nvme/target.cfg +++ b/config/grub/nvme/target.cfg @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-3.0-or-later tree="nvme" -rev="6811f6f09d61996a3acbc4fc0414e45964f0e2d9" +rev="a68a7dece464c35b1c8d20b98502b6881b103911" diff --git a/config/grub/xhci/target.cfg b/config/grub/xhci/target.cfg deleted file mode 100644 index 540f11f7..00000000 --- a/config/grub/xhci/target.cfg +++ /dev/null @@ -1,4 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -tree="xhci" -rev="6811f6f09d61996a3acbc4fc0414e45964f0e2d9" diff --git a/config/grub/xhci/config/payload b/config/grub/xhci_nvme/config/payload index 6a0fc250..9db22fe2 100644 --- a/config/grub/xhci/config/payload +++ b/config/grub/xhci_nvme/config/payload @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -# Copyright (C) 2014-2016,2020-2021,2023-2024 Leah Rowe <leah@libreboot.org> +# Copyright (C) 2014-2016,2020-2021,2023-2025 Leah Rowe <leah@libreboot.org> # Copyright (C) 2015 Klemens Nanni <contact@autoboot.org> set prefix=(memdisk)/boot/grub @@ -156,16 +156,12 @@ menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o # grub device enumeration is very slow, so checks are hardcoded - # TODO: add more strings, based on what distros set up when - # the user select auto-partitioning on those installers - lvmvol="lvm/grubcrypt-bootvol lvm/grubcrypt-rootvol" - raidvol="md/0 md/1 md/2 md/3 md/4 md/5 md/6 md/7 md/8 md/9" - # in practise, doing multiple redundant checks is perfectly fast and + # in practise, doing multiple redundant checks is perfectly fast # TODO: optimize grub itself, and use */? here for everything - for vol in ${lvmvol} ${raidvol} ; do + for vol in ${raidvol} ; do try_bootcfg "${vol}" done @@ -187,23 +183,37 @@ menuentry 'Load Operating System (incl. fully encrypted disks) [o]' --hotkey='o set pager=0 echo -n "Attempting to unlock encrypted volumes" - for dev in ${bootdev} ${lvmvol} ${raidvol}; do + for dev in ${bootdev} ${raidvol}; do if cryptomount "${dev}" ; then break ; fi done set pager=1 echo + search_bootcfg crypto + + lvmvol="" + # after cryptomount, lvm volumes might be available + # using * is slow on some machines, but we use it here, + # just once. in so doing, we find every lvm volume + for vol in (*); do + if regexp ^\\(lvm/ $vol; then + lvmvol="${lvmvol} ${vol}" + try_bootcfg "${vol}" + fi + done + + # user might have put luks inside lvm + set pager=0 + echo "Attempting to unlock encrypted LVMs" for vol in ${lvmvol}; do - try_bootcfg "${vol}" + cryptomount "$vol" done + set pager=1 + echo search_bootcfg crypto - for vol in lvm/* ; do - try_bootcfg "${vol}" - done - true # Prevent pager requiring to accept each line instead of whole screen } diff --git a/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch b/config/grub/xhci_nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch index 757c8e03..d480d60a 100644 --- a/config/grub/xhci/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch +++ b/config/grub/xhci_nvme/patches/0001-mitigate-grub-s-missing-characters-for-borders-arrow.patch @@ -1,7 +1,7 @@ -From c94b9ea258feb53773bab06bc2a6c6e66a44f867 Mon Sep 17 00:00:00 2001 +From 6a04ceb244366ddab75ce229afd19687ce35d15a Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 31 Oct 2021 03:47:05 +0000 -Subject: [PATCH 01/22] mitigate grub's missing characters for borders/arrow +Subject: [PATCH 01/26] mitigate grub's missing characters for borders/arrow characters This cleans up the display on the main screen in GRUB. diff --git a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch b/config/grub/xhci_nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch index c6da216d..e50e6c6a 100644 --- a/config/grub/xhci/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch +++ b/config/grub/xhci_nvme/patches/0002-say-the-name-libreboot-in-the-grub-menu.patch @@ -1,14 +1,14 @@ -From da775eafbe79e3100ca2262bde49e3e65978e83f Mon Sep 17 00:00:00 2001 +From c18175417d4fa4501dac21ef26b9c30f67ece0fd Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sat, 19 Nov 2022 16:30:24 +0000 -Subject: [PATCH 02/22] say the name libreboot, in the grub menu +Subject: [PATCH 02/26] say the name libreboot, in the grub menu --- grub-core/normal/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/grub-core/normal/main.c b/grub-core/normal/main.c -index bd4431000..ff16e0f2e 100644 +index 96abfda2f..d806db9c4 100644 --- a/grub-core/normal/main.c +++ b/grub-core/normal/main.c @@ -209,7 +209,7 @@ grub_normal_init_page (struct grub_term_output *term, @@ -16,7 +16,7 @@ index bd4431000..ff16e0f2e 100644 grub_term_cls (term); - msg_formatted = grub_xasprintf (_("GNU GRUB version %s"), PACKAGE_VERSION); -+ msg_formatted = grub_xasprintf (_("Libreboot 20241206 release, based on coreboot. https://libreboot.org/")); ++ msg_formatted = grub_xasprintf (_("Libreboot 25.06 Luminous Lemon (GRUB menu): https://libreboot.org/")); if (!msg_formatted) return; diff --git a/config/grub/xhci/patches/0003-Add-CC0-license.patch b/config/grub/xhci_nvme/patches/0003-Add-CC0-license.patch index 44d27eb5..c2fd1c01 100644 --- a/config/grub/xhci/patches/0003-Add-CC0-license.patch +++ b/config/grub/xhci_nvme/patches/0003-Add-CC0-license.patch @@ -1,7 +1,7 @@ -From b91e5cafa7863b5a61e97d483f98dcece374721a Mon Sep 17 00:00:00 2001 +From 72b0b0f76b3cc7f03e42322b77400b89c3ccf766 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 03/22] Add CC0 license +Subject: [PATCH 03/26] Add CC0 license Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -10,10 +10,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index 8ad015b07..9980bae90 100644 +index de8c3aa8d..4a3be8568 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -494,7 +494,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e) +@@ -495,7 +495,8 @@ grub_dl_check_license (grub_dl_t mod, Elf_Ehdr *e) if (grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3") == 0 || grub_strcmp ((char *) e + s->sh_offset, "LICENSE=GPLv3+") == 0 diff --git a/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch b/config/grub/xhci_nvme/patches/0004-Define-GRUB_UINT32_MAX.patch index 2d830d43..d41c802e 100644 --- a/config/grub/xhci/patches/0004-Define-GRUB_UINT32_MAX.patch +++ b/config/grub/xhci_nvme/patches/0004-Define-GRUB_UINT32_MAX.patch @@ -1,7 +1,7 @@ -From 58e0d7b7bcec2392b81dda613d070804f7c68cf5 Mon Sep 17 00:00:00 2001 +From 451ca97719aa9178f3202554c74ab636baece616 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 04/22] Define GRUB_UINT32_MAX +Subject: [PATCH 04/26] Define GRUB_UINT32_MAX Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- diff --git a/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch b/config/grub/xhci_nvme/patches/0005-Add-Argon2-algorithm.patch index ff2dc74e..d2d202db 100644 --- a/config/grub/xhci/patches/0005-Add-Argon2-algorithm.patch +++ b/config/grub/xhci_nvme/patches/0005-Add-Argon2-algorithm.patch @@ -1,7 +1,7 @@ -From 65a9b252b79d5d1fa022e3da9ef91459ad8efb94 Mon Sep 17 00:00:00 2001 +From 93404ba667dae9a5da9953f7a17245adfe529c78 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 05/22] Add Argon2 algorithm +Subject: [PATCH 05/26] Add Argon2 algorithm Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -30,7 +30,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> create mode 100644 grub-core/lib/argon2/ref.c diff --git a/docs/grub-dev.texi b/docs/grub-dev.texi -index 3ad8e3efa..d7c6232af 100644 +index f4367f895..9d96cedf9 100644 --- a/docs/grub-dev.texi +++ b/docs/grub-dev.texi @@ -503,12 +503,76 @@ GRUB includes some code from other projects, and it is sometimes necessary @@ -111,7 +111,7 @@ index 3ad8e3efa..d7c6232af 100644 @section Gnulib diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index f70e02e69..f5f9b040c 100644 +index 24e8c8437..0ee65d54d 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def @@ -1219,6 +1219,14 @@ module = { diff --git a/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch b/config/grub/xhci_nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch index 22553006..3fc6d3dc 100644 --- a/config/grub/xhci/patches/0006-Error-on-missing-Argon2id-parameters.patch +++ b/config/grub/xhci_nvme/patches/0006-Error-on-missing-Argon2id-parameters.patch @@ -1,7 +1,7 @@ -From 809908898f9d67979885a651b295ca1fa066039c Mon Sep 17 00:00:00 2001 +From c75424efa3a6357d4785c7a66721809a642b3968 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 06/22] Error on missing Argon2id parameters +Subject: [PATCH 06/26] Error on missing Argon2id parameters Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -9,10 +9,10 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c -index d5106402f..bc818ea69 100644 +index b17cd2115..bbd8f5579 100644 --- a/grub-core/disk/luks2.c +++ b/grub-core/disk/luks2.c -@@ -38,6 +38,7 @@ GRUB_MOD_LICENSE ("GPLv3+"); +@@ -39,6 +39,7 @@ GRUB_MOD_LICENSE ("GPLv3+"); enum grub_luks2_kdf_type { LUKS2_KDF_TYPE_ARGON2I, @@ -20,7 +20,7 @@ index d5106402f..bc818ea69 100644 LUKS2_KDF_TYPE_PBKDF2 }; typedef enum grub_luks2_kdf_type grub_luks2_kdf_type_t; -@@ -90,7 +91,7 @@ struct grub_luks2_keyslot +@@ -91,7 +92,7 @@ struct grub_luks2_keyslot grub_int64_t time; grub_int64_t memory; grub_int64_t cpus; @@ -29,7 +29,7 @@ index d5106402f..bc818ea69 100644 struct { const char *hash; -@@ -160,10 +161,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot) +@@ -161,10 +162,11 @@ luks2_parse_keyslot (grub_luks2_keyslot_t *out, const grub_json_t *keyslot) return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing or invalid KDF"); else if (!grub_strcmp (type, "argon2i") || !grub_strcmp (type, "argon2id")) { @@ -45,7 +45,7 @@ index d5106402f..bc818ea69 100644 return grub_error (GRUB_ERR_BAD_ARGUMENT, "Missing Argon2i parameters"); } else if (!grub_strcmp (type, "pbkdf2")) -@@ -459,6 +461,7 @@ luks2_decrypt_key (grub_uint8_t *out_key, +@@ -460,6 +462,7 @@ luks2_decrypt_key (grub_uint8_t *out_key, switch (k->kdf.type) { case LUKS2_KDF_TYPE_ARGON2I: diff --git a/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch b/config/grub/xhci_nvme/patches/0007-Compile-with-Argon2id-support.patch index b77a5751..0f9d92ee 100644 --- a/config/grub/xhci/patches/0007-Compile-with-Argon2id-support.patch +++ b/config/grub/xhci_nvme/patches/0007-Compile-with-Argon2id-support.patch @@ -1,7 +1,7 @@ -From 26ae5da9ed8382869b699a653988e6c8f32bd3d1 Mon Sep 17 00:00:00 2001 +From 801aa8b85d8f3b999f4660cc299a3517e811f0bb Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 07/22] Compile with Argon2id support +Subject: [PATCH 07/26] Compile with Argon2id support Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -35,7 +35,7 @@ index 038253b37..2f19569c9 100644 common = grub-core/disk/luks.c; common = grub-core/disk/luks2.c; diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index f5f9b040c..f1f38d8d3 100644 +index 0ee65d54d..cd29a9df8 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def @@ -1242,7 +1242,7 @@ module = { @@ -48,18 +48,18 @@ index f5f9b040c..f1f38d8d3 100644 module = { diff --git a/grub-core/disk/luks2.c b/grub-core/disk/luks2.c -index bc818ea69..5b9eaa599 100644 +index bbd8f5579..02cd615d9 100644 --- a/grub-core/disk/luks2.c +++ b/grub-core/disk/luks2.c -@@ -27,6 +27,7 @@ - #include <grub/partition.h> +@@ -28,6 +28,7 @@ #include <grub/i18n.h> + #include <grub/safemath.h> +#include <argon2.h> #include <base64.h> #include <json.h> -@@ -462,8 +463,16 @@ luks2_decrypt_key (grub_uint8_t *out_key, +@@ -463,8 +464,16 @@ luks2_decrypt_key (grub_uint8_t *out_key, { case LUKS2_KDF_TYPE_ARGON2I: case LUKS2_KDF_TYPE_ARGON2ID: diff --git a/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch b/config/grub/xhci_nvme/patches/0008-Make-grub-install-work-with-Argon2.patch index 00f94eef..21ad8855 100644 --- a/config/grub/xhci/patches/0008-Make-grub-install-work-with-Argon2.patch +++ b/config/grub/xhci_nvme/patches/0008-Make-grub-install-work-with-Argon2.patch @@ -1,7 +1,7 @@ -From 6ce0b0629aa1377237c19290f33008ff81969962 Mon Sep 17 00:00:00 2001 +From c114684bb103af427296e40b78adc0d036a9b237 Mon Sep 17 00:00:00 2001 From: Ax333l <main@axelen.xyz> Date: Thu, 17 Aug 2023 00:00:00 +0000 -Subject: [PATCH 08/22] Make grub-install work with Argon2 +Subject: [PATCH 08/26] Make grub-install work with Argon2 Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> --- @@ -9,7 +9,7 @@ Signed-off-by: Nicholas Johnson <nick@nicholasjohnson.ch> 1 file changed, 2 insertions(+) diff --git a/util/grub-install.c b/util/grub-install.c -index 7dc5657bb..cf7315891 100644 +index 060246589..059036d3c 100644 --- a/util/grub-install.c +++ b/util/grub-install.c @@ -448,6 +448,8 @@ probe_mods (grub_disk_t disk) diff --git a/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch b/config/grub/xhci_nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch index 31798205..87164461 100644 --- a/config/grub/xhci/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch +++ b/config/grub/xhci_nvme/patches/0009-at_keyboard-coreboot-force-scancodes2-translate.patch @@ -1,7 +1,7 @@ -From 3f69e2c35ccf2a37fd35f1821c7b85cc6df07ca7 Mon Sep 17 00:00:00 2001 +From dfbfe525d6f138e3db1e683096302045c064096f Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Mon, 30 Oct 2023 22:19:21 +0000 -Subject: [PATCH 09/22] at_keyboard coreboot: force scancodes2+translate +Subject: [PATCH 09/26] at_keyboard coreboot: force scancodes2+translate Scan code set 2 with translation should be assumed in every case, as the default starting position. diff --git a/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch b/config/grub/xhci_nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch index 742aae38..607f3541 100644 --- a/config/grub/xhci/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch +++ b/config/grub/xhci_nvme/patches/0010-keylayouts-don-t-print-Unknown-key-message.patch @@ -1,7 +1,7 @@ -From 44befdaa1ee588591f46c13d057fdef56b87218c Mon Sep 17 00:00:00 2001 +From 18f88785a46e6657e1404e1914638f4768d65008 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Tue, 31 Oct 2023 10:33:28 +0000 -Subject: [PATCH 10/22] keylayouts: don't print "Unknown key" message +Subject: [PATCH 10/26] keylayouts: don't print "Unknown key" message on keyboards with stuck keys, this results in GRUB just spewing it repeatedly, preventing use of GRUB. diff --git a/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch b/config/grub/xhci_nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch index 960c693d..4f03515e 100644 --- a/config/grub/xhci/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch +++ b/config/grub/xhci_nvme/patches/0011-don-t-print-missing-prefix-errors-on-the-screen.patch @@ -1,7 +1,7 @@ -From bfecf6d86ccf82fb85af93600931cee589891089 Mon Sep 17 00:00:00 2001 +From afd68d1e132970e4fa8e26e9ca0ccb7efb69dc37 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 16:14:58 +0000 -Subject: [PATCH 11/22] don't print missing prefix errors on the screen +Subject: [PATCH 11/26] don't print missing prefix errors on the screen we do actually set the prefix. this patch modifies grub to still set grub_errno and return accordingly, @@ -85,10 +85,10 @@ index 18de52562..2a0fea6c8 100644 } file = try_open_from_prefix (prefix, filename); diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index 9980bae90..4457cad7c 100644 +index 4a3be8568..6ae3d73f8 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -871,7 +871,7 @@ grub_dl_load (const char *name) +@@ -881,7 +881,7 @@ grub_dl_load (const char *name) return 0; if (! grub_dl_dir) { diff --git a/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch b/config/grub/xhci_nvme/patches/0012-don-t-print-error-if-module-not-found.patch index c098f7e8..e817ca85 100644 --- a/config/grub/xhci/patches/0012-don-t-print-error-if-module-not-found.patch +++ b/config/grub/xhci_nvme/patches/0012-don-t-print-error-if-module-not-found.patch @@ -1,7 +1,7 @@ -From f44fc56f06559313841de2b53637020fbe139803 Mon Sep 17 00:00:00 2001 +From 06f9480a670d374e1599bf9871f6cd26656418a7 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 16:36:22 +0000 -Subject: [PATCH 12/22] don't print error if module not found +Subject: [PATCH 12/26] don't print error if module not found still set grub_errno accordingly, and otherwise behave the same. in libreboot, we remove a lot of @@ -17,10 +17,10 @@ Signed-off-by: Leah Rowe <leah@libreboot.org> 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/grub-core/kern/dl.c b/grub-core/kern/dl.c -index 4457cad7c..ea9fe8019 100644 +index 6ae3d73f8..4c15027fe 100644 --- a/grub-core/kern/dl.c +++ b/grub-core/kern/dl.c -@@ -510,7 +510,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e) +@@ -511,7 +511,7 @@ grub_dl_resolve_name (grub_dl_t mod, Elf_Ehdr *e) s = grub_dl_find_section (e, ".modname"); if (!s) diff --git a/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch b/config/grub/xhci_nvme/patches/0013-don-t-print-empty-error-messages.patch index 23672773..4bf96b50 100644 --- a/config/grub/xhci/patches/0013-don-t-print-empty-error-messages.patch +++ b/config/grub/xhci_nvme/patches/0013-don-t-print-empty-error-messages.patch @@ -1,7 +1,7 @@ -From e459ed55902003644e7bcd76361cc43247231a99 Mon Sep 17 00:00:00 2001 +From 272c5f5724c0790aff48b0d6ba75928de2275b33 Mon Sep 17 00:00:00 2001 From: Leah Rowe <leah@libreboot.org> Date: Sun, 5 Nov 2023 17:25:20 +0000 -Subject: [PATCH 13/22] don't print empty error messages +Subject: [PATCH 13/26] don't print empty error messages this is part two of the quest to kill the prefix error message. after i disabled prefix-related diff --git a/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch b/config/grub/xhci_nvme/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch index bc18cb13..c04e138e 100644 --- a/config/grub/xhci/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch +++ b/config/grub/xhci_nvme/patches/0014-grub-core-bus-usb-Parse-SuperSpeed-companion-descrip.patch @@ -1,7 +1,7 @@ -From 85fdf29d37b58be96042d6df24f8bc08bba9906d Mon Sep 17 00:00:00 2001 +From 1c5716f42deb27b1111839b9782fd06b077eaa90 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph <patrick.rudolph@9elements.com> Date: Sun, 15 Nov 2020 19:00:27 +0100 -Subject: [PATCH 14/22] grub-core/bus/usb: Parse SuperSpeed companion +Subject: [PATCH 14/26] grub-core/bus/usb: Parse SuperSpeed companion descriptors Parse the SS_ENDPOINT_COMPANION descriptor, which is only present on USB 3.0 diff --git a/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch b/config/grub/xhci_nvme/patches/0015-usb-Add-enum-for-xHCI.patch index d8330e59..4de9d894 100644 --- a/config/grub/xhci/patches/0015-usb-Add-enum-for-xHCI.patch +++ b/config/grub/xhci_nvme/patches/0015-usb-Add-enum-for-xHCI.patch @@ -1,7 +1,7 @@ -From 26a5ed135c94b295b9a0037f5e7201eb5d38fde4 Mon Sep 17 00:00:00 2001 +From 260f27e1ea1dbcdeb63d4411dbdddb97ebb39668 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph <patrick.rudolph@9elements.com> -Date: Sun, 15 Nov 2020 19:47:06 +0100 -Subject: [PATCH 15/22] usb: Add enum for xHCI +Date: Mon, 7 Dec 2020 08:41:22 +0100 +Subject: [PATCH 15/26] usb: Add enum for xHCI Will be used in future patches. diff --git a/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch b/config/grub/xhci_nvme/patches/0016-usbtrans-Set-default-maximum-packet-size.patch index 27402534..908c3adb 100644 --- a/config/grub/xhci/patches/0016-usbtrans-Set-default-maximum-packet-size.patch +++ b/config/grub/xhci_nvme/patches/0016-usbtrans-Set-default-maximum-packet-size.patch @@ -1,7 +1,7 @@ -From 13bc84d9f43328ba47273cbcf87c517398dcfc93 Mon Sep 17 00:00:00 2001 +From 97f71a34c011ad9d37b96c02eb7483fe253c6025 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph <patrick.rudolph@9elements.com> -Date: Sun, 15 Nov 2020 19:48:03 +0100 -Subject: [PATCH 16/22] usbtrans: Set default maximum packet size +Date: Mon, 7 Dec 2020 08:41:23 +0100 +Subject: [PATCH 16/26] usbtrans: Set default maximum packet size Set the maximum packet size to 512 for SuperSpeed devices. diff --git a/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch b/config/grub/xhci_nvme/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch index eede3791..e4798a8d 100644 --- a/config/grub/xhci/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch +++ b/config/grub/xhci_nvme/patches/0017-grub-core-bus-usb-Add-function-pointer-for-attach-de.patch @@ -1,7 +1,7 @@ -From 1518589ff286b54a27d4b11f017cb43c90cbf566 Mon Sep 17 00:00:00 2001 +From ea5081844c3112b582f52360cfb14ef95b56f5e1 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph <patrick.rudolph@9elements.com> Date: Sun, 15 Nov 2020 19:51:42 +0100 -Subject: [PATCH 17/22] grub-core/bus/usb: Add function pointer for +Subject: [PATCH 17/26] grub-core/bus/usb: Add function pointer for attach/detach events The xHCI code needs to be called for attaching or detaching a device. @@ -19,7 +19,7 @@ Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> 5 files changed, 29 insertions(+) diff --git a/grub-core/bus/usb/ehci.c b/grub-core/bus/usb/ehci.c -index 9abebc6bd..953b851c0 100644 +index 2db07c7c0..1ee056015 100644 --- a/grub-core/bus/usb/ehci.c +++ b/grub-core/bus/usb/ehci.c @@ -1812,6 +1812,8 @@ static struct grub_usb_controller_dev usb_controller = { diff --git a/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch b/config/grub/xhci_nvme/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch index 099ef79d..d2067637 100644 --- a/config/grub/xhci/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch +++ b/config/grub/xhci_nvme/patches/0018-grub-core-bus-usb-usbhub-Add-new-private-fields-for-.patch @@ -1,7 +1,7 @@ -From 8dd981a95cc7731b63b2d79ce6f98ce2d6b5a993 Mon Sep 17 00:00:00 2001 +From 7db1cdd1cdbb79a8da04648dcbf7318d200f72a4 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph <patrick.rudolph@9elements.com> -Date: Sun, 15 Nov 2020 19:54:40 +0100 -Subject: [PATCH 18/22] grub-core/bus/usb/usbhub: Add new private fields for +Date: Mon, 7 Dec 2020 08:41:25 +0100 +Subject: [PATCH 18/26] grub-core/bus/usb/usbhub: Add new private fields for xHCI controller Store the root port number, the route, consisting out of the port ID diff --git a/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch b/config/grub/xhci_nvme/patches/0019-grub-core-bus-usb-Add-xhci-support.patch index aaabb3da..b4d6e956 100644 --- a/config/grub/xhci/patches/0019-grub-core-bus-usb-Add-xhci-support.patch +++ b/config/grub/xhci_nvme/patches/0019-grub-core-bus-usb-Add-xhci-support.patch @@ -1,7 +1,7 @@ -From dde187c07a8f2a1d3357aa362ffcc0fe8dab72d7 Mon Sep 17 00:00:00 2001 +From 6b34ac2449362da5139e702e484a432d828a505d Mon Sep 17 00:00:00 2001 From: Patrick Rudolph <patrick.rudolph@9elements.com> -Date: Sun, 15 Nov 2020 19:59:25 +0100 -Subject: [PATCH 19/22] grub-core/bus/usb: Add xhci support +Date: Mon, 7 Dec 2020 08:41:26 +0100 +Subject: [PATCH 19/26] grub-core/bus/usb: Add xhci support Add support for xHCI USB controllers. The code is based on seabios implementation, but has been heavily @@ -41,13 +41,6 @@ TODO: * Test on USB3 hubs * Support for USB 3.1 and USB 3.2 controllers -Tested on qemu using coreboot and grub as payload: - -qemu-system-x86_64 -M q35 -bios $firmware -device qemu-xhci,id=xhci -accel kvm -m 1024M \ - -device usb-storage,drive=thumbdrive,bus=xhci.0,port=3 \ - -drive if=none,format=raw,id=thumbdrive,file=ubuntu-20.04.1-desktop-amd64.iso \ - -device usb-kbd,bus=xhci.0 - Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by: sylv <sylv@sylv.io> --- @@ -74,7 +67,7 @@ index 43635d5ff..65016f856 100644 endif diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index f1f38d8d3..fda723f0c 100644 +index cd29a9df8..d3947739f 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def @@ -667,6 +667,13 @@ module = { diff --git a/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch b/config/grub/xhci_nvme/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch index 6a3266b2..31e831ec 100644 --- a/config/grub/xhci/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch +++ b/config/grub/xhci_nvme/patches/0020-grub-core-bus-usb-usbhub-Add-xHCI-non-root-hub-suppo.patch @@ -1,7 +1,7 @@ -From 28856bd0646e0396b3d5249a99b731f2743aec5a Mon Sep 17 00:00:00 2001 +From d84ac94dc55baad9a2297980b2017cd22e4ecb3c Mon Sep 17 00:00:00 2001 From: Patrick Rudolph <patrick.rudolph@9elements.com> -Date: Thu, 3 Dec 2020 13:44:55 +0100 -Subject: [PATCH 20/22] grub-core/bus/usb/usbhub: Add xHCI non root hub support +Date: Mon, 7 Dec 2020 08:41:27 +0100 +Subject: [PATCH 20/26] grub-core/bus/usb/usbhub: Add xHCI non root hub support Tested on Intel PCH C246, the USB3 hub can be configured by grub. diff --git a/config/grub/xhci_nvme/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch b/config/grub/xhci_nvme/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch new file mode 100644 index 00000000..f6e0f366 --- /dev/null +++ b/config/grub/xhci_nvme/patches/0021-xHCI-also-accept-SBRN-0x31-and-0x32.patch @@ -0,0 +1,26 @@ +From 0433c5bb1e40fba93205e1c9fd6b1b397d31ae5a Mon Sep 17 00:00:00 2001 +From: Sven Anderson <sven@anderson.de> +Date: Sat, 28 May 2022 21:39:23 +0200 +Subject: [PATCH 21/26] xHCI: also accept SBRN 0x31 and 0x32 + +Signed-off-by: Sven Anderson <sven@anderson.de> +--- + grub-core/bus/usb/xhci-pci.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/grub-core/bus/usb/xhci-pci.c b/grub-core/bus/usb/xhci-pci.c +index a5bd3c97d..cde21f57a 100644 +--- a/grub-core/bus/usb/xhci-pci.c ++++ b/grub-core/bus/usb/xhci-pci.c +@@ -76,7 +76,7 @@ grub_xhci_pci_iter (grub_pci_device_t dev, grub_pci_id_t pciid, + /* Check Serial Bus Release Number */ + addr = grub_pci_make_address (dev, GRUB_XHCI_PCI_SBRN_REG); + release = grub_pci_read_byte (addr); +- if (release != 0x30) ++ if (release != 0x30 && release != 0x31 &&release != 0x32) + { + grub_dprintf ("xhci", "XHCI grub_xhci_pci_iter: Wrong SBRN: %0x\n", + release); +-- +2.39.5 + diff --git a/config/grub/xhci_nvme/patches/0022-xhci-fix-port-indexing.patch b/config/grub/xhci_nvme/patches/0022-xhci-fix-port-indexing.patch new file mode 100644 index 00000000..edfcca2c --- /dev/null +++ b/config/grub/xhci_nvme/patches/0022-xhci-fix-port-indexing.patch @@ -0,0 +1,43 @@ +From d300f12cb624998f3d5ab5948c3fc64d6d7baf4f Mon Sep 17 00:00:00 2001 +From: Sven Anderson <sven@anderson.de> +Date: Mon, 13 Jan 2025 19:51:41 +0100 +Subject: [PATCH 22/26] xhci: fix port indexing + +--- + grub-core/bus/usb/xhci.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c +index f4591ffb5..dc89b9619 100644 +--- a/grub-core/bus/usb/xhci.c ++++ b/grub-core/bus/usb/xhci.c +@@ -2250,7 +2250,7 @@ grub_xhci_detect_dev (grub_usb_controller_t dev, int port, int *changed) + + *changed = 0; + grub_dprintf("xhci", "%s: dev=%p USB%d_%d port %d\n", __func__, dev, +- x->psids[port-1].major, x->psids[port-1].minor, port); ++ x->psids[port].major, x->psids[port].minor, port); + + /* On shutdown advertise all ports as disconnected. This will trigger + * a gracefull detatch. */ +@@ -2285,13 +2285,13 @@ grub_xhci_detect_dev (grub_usb_controller_t dev, int port, int *changed) + if (!(portsc & GRUB_XHCI_PORTSC_CCS)) + return GRUB_USB_SPEED_NONE; + +- for (grub_uint8_t i = 0; i < 16 && x->psids[port-1].psids[i].id > 0; i++) ++ for (grub_uint8_t i = 0; i < 16 && x->psids[port].psids[i].id > 0; i++) + { +- if (x->psids[port-1].psids[i].id == speed) ++ if (x->psids[port].psids[i].id == speed) + { + grub_dprintf("xhci", "%s: grub_usb_speed = %d\n", __func__, +- x->psids[port-1].psids[i].grub_usb_speed ); +- return x->psids[port-1].psids[i].grub_usb_speed; ++ x->psids[port].psids[i].grub_usb_speed ); ++ return x->psids[port].psids[i].grub_usb_speed; + } + } + +-- +2.39.5 + diff --git a/config/grub/xhci_nvme/patches/0023-xhci-configure-TT-for-non-root-hubs.patch b/config/grub/xhci_nvme/patches/0023-xhci-configure-TT-for-non-root-hubs.patch new file mode 100644 index 00000000..b41db45f --- /dev/null +++ b/config/grub/xhci_nvme/patches/0023-xhci-configure-TT-for-non-root-hubs.patch @@ -0,0 +1,98 @@ +From 0a669ef9815267de4fb14f3c329431ac531755c9 Mon Sep 17 00:00:00 2001 +From: Sven Anderson <sven@anderson.de> +Date: Mon, 13 Jan 2025 20:26:32 +0100 +Subject: [PATCH 23/26] xhci: configure TT for non-root-hubs + +--- + grub-core/bus/usb/usbhub.c | 6 +++++ + grub-core/bus/usb/xhci.c | 45 +++++++++++++++++++++++++++++++++----- + include/grub/usb.h | 2 ++ + 3 files changed, 47 insertions(+), 6 deletions(-) + +diff --git a/grub-core/bus/usb/usbhub.c b/grub-core/bus/usb/usbhub.c +index e96505aa9..629b3ed53 100644 +--- a/grub-core/bus/usb/usbhub.c ++++ b/grub-core/bus/usb/usbhub.c +@@ -818,3 +818,9 @@ grub_usb_iterate (grub_usb_iterate_hook_t hook, void *hook_data) + + return 0; + } ++ ++grub_usb_device_t ++grub_usb_get_dev (int addr) ++{ ++ return grub_usb_devs[addr]; ++} +diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c +index dc89b9619..88c9ac57f 100644 +--- a/grub-core/bus/usb/xhci.c ++++ b/grub-core/bus/usb/xhci.c +@@ -623,13 +623,46 @@ grub_xhci_alloc_inctx(struct grub_xhci *x, int maxepid, + break; + } + +- /* Route is greater zero on devices that are connected to a non root hub */ +- if (dev->route) +- { +- /* FIXME: Implement this code for non SuperSpeed hub devices */ ++ /* Set routing string */ ++ slot->ctx[0] |= dev->route; ++ ++ /* Set root hub port number */ ++ slot->ctx[1] |= (dev->root_port + 1) << 16; ++ ++ if (dev->split_hubaddr && (dev->speed == GRUB_USB_SPEED_LOW || ++ dev->speed == GRUB_USB_SPEED_FULL)) { ++ ++ grub_usb_device_t hubdev = grub_usb_get_dev(dev->split_hubaddr); ++ ++ if (!hubdev || hubdev->descdev.class != GRUB_USB_CLASS_HUB) { ++ grub_dprintf("xhci", "Invalid hub device at addr %d!\n", dev->split_hubaddr); ++ return NULL; ++ } ++ ++ struct grub_xhci_priv *hub_priv = hubdev->xhci_priv; ++ if (!hub_priv) { ++ grub_dprintf("xhci", "Hub has no xhci_priv!\n"); ++ return NULL; ++ } ++ ++ if (hubdev->speed == GRUB_USB_SPEED_HIGH) { ++ /* Direct connection to high-speed hub - set up TT */ ++ grub_dprintf("xhci", "Direct high-speed hub connection - configuring TT with " ++ "hub slot %d port %d\n", hub_priv->slotid, dev->split_hubport); ++ slot->ctx[2] |= hub_priv->slotid; ++ slot->ctx[2] |= dev->split_hubport << 8; + } +- slot->ctx[0] |= dev->route; +- slot->ctx[1] |= (dev->root_port+1) << 16; ++ else { ++ /* Hub is not high-speed, inherit TT settings from parent */ ++ volatile struct grub_xhci_slotctx *hubslot; ++ grub_dprintf("xhci", "Non high-speed hub - inheriting TT settings from parent\n"); ++ hubslot = grub_dma_phys2virt(x->devs[hub_priv->slotid].ptr_low, x->devs_dma); ++ slot->ctx[2] = hubslot->ctx[2]; ++ } ++ } ++ ++ grub_dprintf("xhci", "Slot context: ctx[0]=0x%08x ctx[1]=0x%08x ctx[2]=0x%08x\n", ++ slot->ctx[0], slot->ctx[1], slot->ctx[2]); + + grub_arch_sync_dma_caches(in, size); + +diff --git a/include/grub/usb.h b/include/grub/usb.h +index eb71fa1c7..df97a60cc 100644 +--- a/include/grub/usb.h ++++ b/include/grub/usb.h +@@ -62,6 +62,8 @@ typedef int (*grub_usb_controller_iterate_hook_t) (grub_usb_controller_t dev, + /* Call HOOK with each device, until HOOK returns non-zero. */ + int grub_usb_iterate (grub_usb_iterate_hook_t hook, void *hook_data); + ++grub_usb_device_t grub_usb_get_dev (int addr); ++ + grub_usb_err_t grub_usb_device_initialize (grub_usb_device_t dev); + + grub_usb_err_t grub_usb_get_descriptor (grub_usb_device_t dev, +-- +2.39.5 + diff --git a/config/grub/xhci/patches/0021-Fix-compilation-on-x86_64.patch b/config/grub/xhci_nvme/patches/0024-Fix-compilation-on-x86_64.patch index 8f80664c..cdc692d6 100644 --- a/config/grub/xhci/patches/0021-Fix-compilation-on-x86_64.patch +++ b/config/grub/xhci_nvme/patches/0024-Fix-compilation-on-x86_64.patch @@ -1,7 +1,7 @@ -From 040942842dc05c9b94c9be21f01b08da3e25fe6d Mon Sep 17 00:00:00 2001 +From 625fdcf42f2cf11a4bfe644412450c9e4f551d25 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph <patrick.rudolph@9elements.com> Date: Wed, 24 Feb 2021 08:25:41 +0100 -Subject: [PATCH 21/22] Fix compilation on x86_64 +Subject: [PATCH 24/26] Fix compilation on x86_64 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> --- @@ -9,7 +9,7 @@ Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/grub-core/bus/usb/xhci.c b/grub-core/bus/usb/xhci.c -index f4591ffb5..3495bb919 100644 +index 88c9ac57f..9b9bae6e5 100644 --- a/grub-core/bus/usb/xhci.c +++ b/grub-core/bus/usb/xhci.c @@ -184,7 +184,7 @@ enum @@ -36,7 +36,7 @@ index f4591ffb5..3495bb919 100644 static inline grub_uint32_t grub_xhci_port_read (struct grub_xhci *x, grub_uint32_t port) { -@@ -664,7 +672,7 @@ static void xhci_process_events(struct grub_xhci *x) +@@ -697,7 +705,7 @@ static void xhci_process_events(struct grub_xhci *x) case ER_TRANSFER: case ER_COMMAND_COMPLETE: { @@ -45,7 +45,7 @@ index f4591ffb5..3495bb919 100644 struct grub_xhci_ring *ring = XHCI_RING(rtrb); volatile struct grub_xhci_trb *evt = &ring->evt; grub_uint32_t eidx = rtrb - ring->ring + 1; -@@ -697,9 +705,9 @@ static void xhci_process_events(struct grub_xhci *x) +@@ -730,9 +738,9 @@ static void xhci_process_events(struct grub_xhci *x) } grub_xhci_write32(&evts->nidx, nidx); volatile struct grub_xhci_ir *ir = x->ir; @@ -58,7 +58,7 @@ index f4591ffb5..3495bb919 100644 } } -@@ -800,7 +808,7 @@ static void xhci_trb_queue(volatile struct grub_xhci_ring *ring, +@@ -833,7 +841,7 @@ static void xhci_trb_queue(volatile struct grub_xhci_ring *ring, grub_uint32_t xferlen, grub_uint32_t flags) { grub_dprintf("xhci", "%s: ring %p data %llx len %d flags 0x%x remain 0x%x\n", __func__, @@ -67,7 +67,7 @@ index f4591ffb5..3495bb919 100644 if (xhci_ring_full(ring)) { -@@ -1907,7 +1915,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev, +@@ -1940,7 +1948,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev, if (transfer->type == GRUB_USB_TRANSACTION_TYPE_CONTROL) { volatile struct grub_usb_packet_setup *setupdata; @@ -76,7 +76,7 @@ index f4591ffb5..3495bb919 100644 grub_dprintf("xhci", "%s: CONTROLL TRANS req %d\n", __func__, setupdata->request); grub_dprintf("xhci", "%s: CONTROLL TRANS length %d\n", __func__, setupdata->length); -@@ -1974,7 +1982,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev, +@@ -2007,7 +2015,7 @@ grub_xhci_setup_transfer (grub_usb_controller_t dev, /* Assume the ring has enough free space for all TRBs */ if (flags & TRB_TR_IDT && tr->size <= (int)sizeof(inline_data)) { diff --git a/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch b/config/grub/xhci_nvme/patches/0025-Add-native-NVMe-driver-based-on-SeaBIOS.patch index c105dd19..e9dc54b5 100644 --- a/config/grub/xhci/patches/0022-Add-native-NVMe-driver-based-on-SeaBIOS.patch +++ b/config/grub/xhci_nvme/patches/0025-Add-native-NVMe-driver-based-on-SeaBIOS.patch @@ -1,7 +1,7 @@ -From 2fb0de8881bd2fe637d05bec0ae887f380434b7d Mon Sep 17 00:00:00 2001 +From 1ede42b39a87ccb2cc43d919f3ee4803d6551102 Mon Sep 17 00:00:00 2001 From: Mate Kukri <km@mkukri.xyz> Date: Mon, 20 May 2024 11:43:35 +0100 -Subject: [PATCH 22/22] Add native NVMe driver based on SeaBIOS +Subject: [PATCH 25/26] Add native NVMe driver based on SeaBIOS Tested to successfully boot Debian on QEMU and OptiPlex 3050. @@ -31,20 +31,19 @@ index 65016f856..7bc0866ba 100644 endif diff --git a/grub-core/Makefile.core.def b/grub-core/Makefile.core.def -index fda723f0c..27a707fda 100644 +index d3947739f..fb9f24c0f 100644 --- a/grub-core/Makefile.core.def +++ b/grub-core/Makefile.core.def -@@ -2683,4 +2683,10 @@ module = { - common = tests/asn1/asn1_test.c; +@@ -2689,3 +2689,9 @@ module = { cflags = '-Wno-uninitialized'; cppflags = '-I$(srcdir)/lib/libtasn1-grub -I$(srcdir)/tests/asn1/'; -+}; + }; + +module = { + name = nvme; + common = disk/nvme.c; + enable = pci; - }; ++}; diff --git a/grub-core/commands/nativedisk.c b/grub-core/commands/nativedisk.c index 6806bff9c..fd68a513e 100644 --- a/grub-core/commands/nativedisk.c diff --git a/config/grub/xhci_nvme/patches/0026-kern-coreboot-mmap-Map-to-reserved.patch b/config/grub/xhci_nvme/patches/0026-kern-coreboot-mmap-Map-to-reserved.patch new file mode 100644 index 00000000..712d2218 --- /dev/null +++ b/config/grub/xhci_nvme/patches/0026-kern-coreboot-mmap-Map-to-reserved.patch @@ -0,0 +1,37 @@ +From d73ca74ef879bf602274bee6eb24f0080a45d235 Mon Sep 17 00:00:00 2001 +From: Paul Menzel <pmenzel@molgen.mpg.de> +Date: Mon, 17 May 2021 10:24:36 +0200 +Subject: [PATCH 26/26] kern/coreboot/mmap: Map to reserved + +https://git.savannah.gnu.org/cgit/grub.git/commit/?id=6de9ee86bf9ae50967413e6a73b5dfd13e5ffb50 + +Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> +--- + grub-core/kern/coreboot/mmap.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/grub-core/kern/coreboot/mmap.c b/grub-core/kern/coreboot/mmap.c +index caf8f7cef..2fc316e8d 100644 +--- a/grub-core/kern/coreboot/mmap.c ++++ b/grub-core/kern/coreboot/mmap.c +@@ -59,7 +59,7 @@ iterate_linuxbios_table (grub_linuxbios_table_item_t table_item, void *data) + /* Multiboot mmaps match with the coreboot mmap + definition. Therefore, we can just pass type + through. */ +- mem_region->type, ++ (mem_region->type >= 13) ? 2 : mem_region->type, + ctx->hook_data)) + return 1; + if (start < 0xa0000) +@@ -81,7 +81,7 @@ iterate_linuxbios_table (grub_linuxbios_table_item_t table_item, void *data) + /* Multiboot mmaps match with the coreboot mmap + definition. Therefore, we can just pass type + through. */ +- mem_region->type, ++ (mem_region->type >= 13) ? 2 : mem_region->type, + ctx->hook_data)) + return 1; + } +-- +2.39.5 + diff --git a/config/grub/xhci_nvme/target.cfg b/config/grub/xhci_nvme/target.cfg new file mode 100644 index 00000000..c3c8127d --- /dev/null +++ b/config/grub/xhci_nvme/target.cfg @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +tree="xhci_nvme" +rev="a68a7dece464c35b1c8d20b98502b6881b103911" diff --git a/config/ifd/g43t_am3/gbe b/config/ifd/g43t_am3/gbe Binary files differnew file mode 100644 index 00000000..bad66aea --- /dev/null +++ b/config/ifd/g43t_am3/gbe diff --git a/config/ifd/g43t_am3/ifd b/config/ifd/g43t_am3/ifd Binary files differnew file mode 100644 index 00000000..79f92194 --- /dev/null +++ b/config/ifd/g43t_am3/ifd diff --git a/config/ifd/g43t_am3/ifd_16 b/config/ifd/g43t_am3/ifd_16 Binary files differnew file mode 100644 index 00000000..d41cfc8c --- /dev/null +++ b/config/ifd/g43t_am3/ifd_16 diff --git a/config/ifd/hp8300usdt/ifd b/config/ifd/hp8300usdt/ifd Binary files differindex 3b81b704..282a8abb 100644 --- a/config/ifd/hp8300usdt/ifd +++ b/config/ifd/hp8300usdt/ifd diff --git a/config/ifd/hppro3500series/ifd b/config/ifd/hppro3500series/ifd Binary files differnew file mode 100644 index 00000000..f3cebe6e --- /dev/null +++ b/config/ifd/hppro3500series/ifd diff --git a/config/ifd/q45t_am/gbe b/config/ifd/q45t_am/gbe Binary files differnew file mode 100644 index 00000000..296622a2 --- /dev/null +++ b/config/ifd/q45t_am/gbe diff --git a/config/ifd/q45t_am/ifd b/config/ifd/q45t_am/ifd Binary files differnew file mode 100644 index 00000000..4fda48b8 --- /dev/null +++ b/config/ifd/q45t_am/ifd diff --git a/config/ifd/x2e_n150/ifd b/config/ifd/x2e_n150/ifd Binary files differnew file mode 100644 index 00000000..3d58d9a1 --- /dev/null +++ b/config/ifd/x2e_n150/ifd diff --git a/config/me_cleaner/patches/0001-Add-a-p-option-skip-FPTR-checks.patch b/config/me_cleaner/patches/0001-Add-a-p-option-skip-FPTR-checks.patch new file mode 100644 index 00000000..0689f0a6 --- /dev/null +++ b/config/me_cleaner/patches/0001-Add-a-p-option-skip-FPTR-checks.patch @@ -0,0 +1,71 @@ +From e9ceef92dc53501d8d6debc9f5ac9580149eb3dc Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Sat, 27 Sep 2025 22:52:45 +0100 +Subject: [PATCH 1/1] Add a -p option (skip FPTR checks) + +if you pass -k (keep fptr modules), don't use -r, don't +use -t, you can essentially just use me_cleaner to +extract a ME image without changing it. this is useful +when for example, you just want to set the HAP bit. + +however, me_cleaner still performs a FPTR check. + +on some newer ME versions, it's always invalid according +to me_cleaner, because for example it doesn't handle +ME16 very well yet. + +this patch adds an option to override the FPTR check + +either pass -p or --pass-fptr + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + me_cleaner.py | 14 ++++++++++---- + 1 file changed, 10 insertions(+), 4 deletions(-) + +diff --git a/me_cleaner.py b/me_cleaner.py +index 473e761..36760fb 100755 +--- a/me_cleaner.py ++++ b/me_cleaner.py +@@ -276,8 +276,10 @@ def check_partition_signature(f, offset): + return "{:#x}".format(decrypted_sig).endswith(sha256.hexdigest()) # FIXME + + +-def print_check_partition_signature(f, offset): +- if check_partition_signature(f, offset): ++def print_check_partition_signature(f, offset, pass_fptr): ++ if pass_fptr: ++ print("Skipping FPTR checks because the user told us to") ++ elif check_partition_signature(f, offset): + print("VALID") + else: + print("INVALID!!") +@@ -517,6 +519,8 @@ if __name__ == "__main__": + "--extract-me)", action="store_true") + parser.add_argument("-k", "--keep-modules", help="don't remove the FTPR " + "modules, even when possible", action="store_true") ++ parser.add_argument("-p", "--pass-fptr", help="skip FTPR signature checks" ++ "regardless of other operations", action="store_true") + bw_list.add_argument("-w", "--whitelist", metavar="whitelist", + help="Comma separated list of additional partitions " + "to keep in the final image. This can be used to " +@@ -1024,12 +1028,14 @@ if __name__ == "__main__": + print("Checking the FTPR RSA signature of the extracted ME " + "image... ", end="") + print_check_partition_signature(mef_copy, +- ftpr_offset + ftpr_mn2_offset) ++ ftpr_offset + ftpr_mn2_offset, ++ args.pass_fptr) + mef_copy.close() + + if not me6_ignition: + print("Checking the FTPR RSA signature... ", end="") +- print_check_partition_signature(mef, ftpr_offset + ftpr_mn2_offset) ++ print_check_partition_signature(mef, ftpr_offset + ftpr_mn2_offset, ++ args.pass_fptr) + + f.close() + +-- +2.47.3 + diff --git a/config/pcsx-redux/patches/0002-lbmk-hack-add-no-ops-for-config-commands.patch b/config/pcsx-redux/patches/0002-lbmk-hack-add-no-ops-for-config-commands.patch new file mode 100644 index 00000000..1a495d60 --- /dev/null +++ b/config/pcsx-redux/patches/0002-lbmk-hack-add-no-ops-for-config-commands.patch @@ -0,0 +1,43 @@ +From e4cd98fb5e3baf8260a3692cab745dea925b0764 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Thu, 22 May 2025 11:29:37 +0100 +Subject: [PATCH 1/1] lbmk hack: add no-ops for config commands + +./mk -u, -m, -s, -l and -n cause errors without +arguments, because pcsx-redux's makefile doesn't +have them. additionally, i use my own makefile here, +so that only the openbios is compiled. + +add these so that lbmk doesn't crash during tests. + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + lbmkbofhmakefile | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +diff --git a/lbmkbofhmakefile b/lbmkbofhmakefile +index fe2e36d2..e0e2a11e 100644 +--- a/lbmkbofhmakefile ++++ b/lbmkbofhmakefile +@@ -14,3 +14,18 @@ clean: + + distclean: + make -C src/mips/openbios clean ++ ++oldconfig: ++ : ++ ++menuconfig: ++ : ++ ++savedefconfig: ++ : ++ ++olddefconfig: ++ : ++ ++nconfig: ++ : +-- +2.39.5 + diff --git a/config/pico-sdk/patches/0001-Fix-GCC14.1-compile-error-in-w25x10cls.S-2000.patch b/config/pico-sdk/patches/0001-Fix-GCC14.1-compile-error-in-w25x10cls.S-2000.patch new file mode 100644 index 00000000..c52e701d --- /dev/null +++ b/config/pico-sdk/patches/0001-Fix-GCC14.1-compile-error-in-w25x10cls.S-2000.patch @@ -0,0 +1,37 @@ +From 5c1f16cd723de3c2e0b57f1a34e2317cdabef294 Mon Sep 17 00:00:00 2001 +From: "Earle F. Philhower, III" <earlephilhower@yahoo.com> +Date: Tue, 5 Nov 2024 12:06:04 -0800 +Subject: [PATCH 1/1] Fix GCC14.1 compile error in w25x10cls.S (#2000) + +GCC14 doesn't like the 2-character temporary label "00" and throws an error +.../pico-sdk/src/rp2040/boot_stage2/boot2_w25x10cl.S: Assembler messages: +.../pico-sdk/src/rp2040/boot_stage2/boot2_w25x10cl.S:147: Error: junk at end of line, first unrecognized character is `0' +.../pico/rp2040/pico-sdk/src/rp2040/boot_stage2/boot2_w25x10cl.S:150: Error: garbage following instruction -- `beq 00b' + +Convert it to a single number, "1", like in other boot2xxx.S files + +Fixes #1999 +--- + src/rp2_common/boot_stage2/boot2_w25x10cl.S | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/src/rp2_common/boot_stage2/boot2_w25x10cl.S b/src/rp2_common/boot_stage2/boot2_w25x10cl.S +index 89d2cd1..1bf7e10 100644 +--- a/src/rp2_common/boot_stage2/boot2_w25x10cl.S ++++ b/src/rp2_common/boot_stage2/boot2_w25x10cl.S +@@ -139,10 +139,10 @@ regular_func _stage2_boot + // status register and checking for the "RX FIFO Not Empty" flag to assert. + + movs r1, #SSI_SR_RFNE_BITS +-00: ++1: + ldr r0, [r3, #SSI_SR_OFFSET] // Read status register + tst r0, r1 // RFNE status flag set? +- beq 00b // If not then wait ++ beq 1b // If not then wait + + // At this point CN# will be deasserted and the SPI clock will not be running. + // The Winbond WX25X10CL device will be in continuous read, dual I/O mode and +-- +2.39.5 + diff --git a/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch b/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch index f0682c11..dc1464bb 100644 --- a/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch +++ b/config/seabios/default/patches/0001-romfile-implement-a-generic-loader.patch @@ -1,7 +1,7 @@ -From 2aff8adc1dcd1315877fdb4ac4ef5e649c5b7d11 Mon Sep 17 00:00:00 2001 +From 04e972e14191f3a480e569e972c195ba8eb53a30 Mon Sep 17 00:00:00 2001 From: Riku Viitanen <riku.viitanen@protonmail.com> Date: Sat, 10 Feb 2024 21:23:33 +0200 -Subject: [PATCH 1/2] romfile: implement a generic loader +Subject: [PATCH 1/4] romfile: implement a generic loader romfile_loadfile_g: Based on romfile_loadfile but more flexible. User has to supply pointer @@ -18,7 +18,7 @@ Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com> 2 files changed, 22 insertions(+), 5 deletions(-) diff --git a/src/romfile.c b/src/romfile.c -index b598274e..8bf95713 100644 +index 8072a915..f4d5f82d 100644 --- a/src/romfile.c +++ b/src/romfile.c @@ -47,10 +47,12 @@ romfile_find(const char *name) @@ -33,7 +33,7 @@ index b598274e..8bf95713 100644 void * -romfile_loadfile(const char *name, int *psize) +romfile_loadfile_g(const char *name, int *psize, -+ void *(*malloc_fn)(), int add_len) ++ void *(*malloc_fn)(u32), int add_len) { struct romfile_s *file = romfile_find(name); if (!file) @@ -69,7 +69,7 @@ index b598274e..8bf95713 100644 } diff --git a/src/romfile.h b/src/romfile.h -index 3e0f8200..a320a5bc 100644 +index ae2f4ac7..f62b2fee 100644 --- a/src/romfile.h +++ b/src/romfile.h @@ -13,6 +13,8 @@ struct romfile_s { @@ -77,10 +77,10 @@ index 3e0f8200..a320a5bc 100644 struct romfile_s *romfile_findprefix(const char *prefix, struct romfile_s *prev); struct romfile_s *romfile_find(const char *name); +void *romfile_loadfile_g(const char *name, int *psize, -+ void *(*malloc_fn)(), int add_len); ++ void *(*malloc_fn)(u32), int add_len); void *romfile_loadfile(const char *name, int *psize); u64 romfile_loadint(const char *name, u64 defval); - + u32 romfile_loadbool(const char *name, u32 defval); -- -2.43.0 +2.39.5 diff --git a/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch b/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch index f05a34c2..5224d768 100644 --- a/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch +++ b/config/seabios/default/patches/0002-vgahooks-optionroms-implement-mxm-3.0-interrupts.patch @@ -1,7 +1,7 @@ -From 1e7c443d069ef817c4e699bd6675efff4ebddb86 Mon Sep 17 00:00:00 2001 +From 270ac30b862c58c69455dbdace716044d29b20e2 Mon Sep 17 00:00:00 2001 From: Riku Viitanen <riku.viitanen@protonmail.com> Date: Sat, 10 Feb 2024 21:38:17 +0200 -Subject: [PATCH 2/2] vgahooks, optionroms: implement mxm 3.0 interrupts +Subject: [PATCH 2/4] vgahooks, optionroms: implement mxm 3.0 interrupts VGAROMs on MXM graphics cards need certain int15h functions present. @@ -184,5 +184,5 @@ index 00000000..f0c203af + +#endif // vgahooks.h -- -2.43.0 +2.39.5 diff --git a/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch new file mode 100644 index 00000000..c78d6660 --- /dev/null +++ b/config/seabios/default/patches/0003-Print-the-Libreboot-version-in-the-SeaBIOS-menu.patch @@ -0,0 +1,26 @@ +From cc6b13ddea9086586d34621d0b82d820af5ae785 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Mon, 6 Jan 2025 18:49:58 +0000 +Subject: [PATCH 3/4] Print the Libreboot version in the SeaBIOS menu + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + src/bootsplash.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/src/bootsplash.c b/src/bootsplash.c +index 538b316d..9eed0b12 100644 +--- a/src/bootsplash.c ++++ b/src/bootsplash.c +@@ -48,7 +48,7 @@ enable_vga_console(void) + call16_int10(&br); + + // Write to screen. +- printf("SeaBIOS (version %s)\n", VERSION); ++ printf("Libreboot 25.06 Luminous Lemon (SeaBIOS menu): https://libreboot.org/\n"); + display_uuid(); + } + +-- +2.39.5 + diff --git a/config/seabios/default/target.cfg b/config/seabios/default/target.cfg index 9ff1db3e..5058266d 100644 --- a/config/seabios/default/target.cfg +++ b/config/seabios/default/target.cfg @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-3.0-or-later tree="default" -rev="1602647f1be24fe63d11138d802e735c8e674e63" +rev="b686f4600792c504f01929f761be473e298de33d" diff --git a/config/submodule/coreboot/coreboot413/module.list b/config/submodule/coreboot/coreboot413/module.list deleted file mode 100644 index 08e76de0..00000000 --- a/config/submodule/coreboot/coreboot413/module.list +++ /dev/null @@ -1 +0,0 @@ -3rdparty/vboot diff --git a/config/submodule/coreboot/coreboot413/vboot/module.cfg b/config/submodule/coreboot/coreboot413/vboot/module.cfg deleted file mode 100644 index 79c98870..00000000 --- a/config/submodule/coreboot/coreboot413/vboot/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subrepo="https://review.coreboot.org/vboot.git" -subrepo_bkup="https://github.com/coreboot/vboot" -subhash="4c523ed10f25de872ac0513ebd6ca53d3970b9de" diff --git a/config/submodule/coreboot/coreboot413/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/coreboot413/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch deleted file mode 100644 index 1ac41de6..00000000 --- a/config/submodule/coreboot/coreboot413/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch +++ /dev/null @@ -1,178 +0,0 @@ -From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001 -From: "Luke T. Shumaker" <lukeshu@lukeshu.com> -Date: Thu, 30 May 2024 14:08:33 -0600 -Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on - vmlinuz_header_{offset,size} - -The check on vmlinuz_header_offset and vmlinuz_header_size is obviously -wrong: - - if (!vmlinuz_header_size || - kpart_data + vmlinuz_header_offset + vmlinuz_header_size > - kpart_data) { - return 1; - } - -`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`, -unless something has overflowed! And `vmlinuz_header_offset` hasn't even -been set yet (besides being initialized to zero)! - -GCC will deduce that if the check didn't cause the function to bail, then -vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range -[2GiB,4GiB). - -On platforms where size_t is 32-bits, this is *especially* broken. -memcpy's size argument must be in the range [0,2GiB). Because GCC has -proved that vmlinuz_header_size is higher than that, it will fail to -compile: - - host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=] - -So, fix the check. - -I can now say that what I suspect the original author meant to write would -be the following patch, if `vmlinuz_header_offset` were already set: - - -kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data - +now + vmlinuz_header_offset + vmlinuz_header_size > kpart_size - -This hypothesis is supported by `now` not getting incremented by -`kblob_size` the way it is for the keyblock and preamble sizes. - -However, we can also see that even this "corrected" bounds check is -insufficient: it does not detect the vmlinuz_header overflowing into -kblob_data. - -OK, so let's describe the fix: - -Have a `*vmlinuz_header` pointer instead of a -`uint64_t vmlinuz_header_offset`, to be more similar to all the other -regions. With this change, the correct check becomes a simple - - vmlinuz_header + vmlinuz_header_size > kblob_data - -While we're at it, make some changes that could have helped avoid this in -the first place: - - - Add comments. - - Calculate the vmlinuz_header offset right away, instead of waiting. - - Go ahead and increment `now` by `kblob_size`, to increase regularity. - -Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4 ---- - host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++----------- - 1 file changed, 51 insertions(+), 21 deletions(-) - -diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c -index 4ccfcf33..d2c09443 100644 ---- a/host/lib/extract_vmlinuz.c -+++ b/host/lib/extract_vmlinuz.c -@@ -15,16 +15,44 @@ - - int ExtractVmlinuz(void *kpart_data, size_t kpart_size, - void **vmlinuz_out, size_t *vmlinuz_size) { -+ // We're going to be extracting `vmlinuz_header` and -+ // `kblob_data`, and returning the concatenation of them. -+ // -+ // kpart_data = +-[kpart_size]------------------------------------+ -+ // | | -+ // keyblock = | +-[keyblock->keyblock_size]-------------------+ | -+ // | | struct vb2_keyblock keyblock | | -+ // | | char [] ...data... | | -+ // | +---------------------------------------------+ | -+ // | | -+ // preamble = | +-[preamble->preamble_size]-------------------+ | -+ // | | struct vb2_kernel_preamble preamble | | -+ // | | char [] ...data... | | -+ // | | char [] vmlinuz_header | | -+ // | | char [] ...data... | | -+ // | +---------------------------------------------+ | -+ // | | -+ // kblob_data= | +-[preamble->body_signature.data_size]--------+ | -+ // | | char [] ...data... | | -+ // | +---------------------------------------------+ | -+ // | | -+ // +-------------------------------------------------+ -+ - size_t now = 0; -+ // The 3 sections of kpart_data. -+ struct vb2_keyblock *keyblock = NULL; - struct vb2_kernel_preamble *preamble = NULL; - uint8_t *kblob_data = NULL; - uint32_t kblob_size = 0; -+ // vmlinuz_header -+ uint8_t *vmlinuz_header = NULL; - uint32_t vmlinuz_header_size = 0; -- uint64_t vmlinuz_header_address = 0; -- uint64_t vmlinuz_header_offset = 0; -+ // The concatenated result. - void *vmlinuz = NULL; - -- struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data; -+ // Isolate the 3 sections of kpart_data. -+ -+ keyblock = (struct vb2_keyblock *)kpart_data; - now += keyblock->keyblock_size; - if (now > kpart_size) - return 1; -@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size, - - kblob_data = kpart_data + now; - kblob_size = preamble->body_signature.data_size; -- -- if (!kblob_data || (now + kblob_size) > kpart_size) -+ now += kblob_size; -+ if (now > kpart_size) - return 1; - -+ // Find `vmlinuz_header` within `preamble`. -+ - if (preamble->header_version_minor > 0) { -- vmlinuz_header_address = preamble->vmlinuz_header_address; -+ // calculate the vmlinuz_header offset from -+ // the beginning of the kpart_data. The kblob doesn't -+ // include the body_load_offset, but does include -+ // the keyblock and preamble sections. -+ size_t vmlinuz_header_offset = -+ preamble->vmlinuz_header_address - -+ preamble->body_load_address + -+ keyblock->keyblock_size + -+ preamble->preamble_size; -+ -+ vmlinuz_header = kpart_data + vmlinuz_header_offset; - vmlinuz_header_size = preamble->vmlinuz_header_size; - } - -- if (!vmlinuz_header_size || -- kpart_data + vmlinuz_header_offset + vmlinuz_header_size > -- kpart_data) { -+ if (!vmlinuz_header || -+ !vmlinuz_header_size || -+ vmlinuz_header + vmlinuz_header_size > kblob_data) { - return 1; - } - -- // calculate the vmlinuz_header offset from -- // the beginning of the kpart_data. The kblob doesn't -- // include the body_load_offset, but does include -- // the keyblock and preamble sections. -- vmlinuz_header_offset = vmlinuz_header_address - -- preamble->body_load_address + -- keyblock->keyblock_size + -- preamble->preamble_size; -+ // Concatenate and return. - - vmlinuz = malloc(vmlinuz_header_size + kblob_size); - if (vmlinuz == NULL) - return 1; -- -- memcpy(vmlinuz, kpart_data + vmlinuz_header_offset, -- vmlinuz_header_size); -- -+ memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size); - memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size); - - *vmlinuz_out = vmlinuz; --- -2.45.1 - diff --git a/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg b/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg deleted file mode 100644 index aec8ffba..00000000 --- a/config/submodule/coreboot/default/acpica-unix-20230628.tar.gz/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20230628.tar.gz" -subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20230628.tar.gz" -subhash="d726e69ebd8b8110690e3aff8d1919b43b0a2185efdeb9131ea8d89d321ca3a318a89c721ea740ae366f31ed3d1c11c2906f8807ee8a190e6f67fe5b2023cea4" diff --git a/config/submodule/coreboot/default/acpica-unix-20250404.tar.gz/module.cfg b/config/submodule/coreboot/default/acpica-unix-20250404.tar.gz/module.cfg new file mode 100644 index 00000000..c3bb710a --- /dev/null +++ b/config/submodule/coreboot/default/acpica-unix-20250404.tar.gz/module.cfg @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +subcurl="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20250404.tar.gz" +subcurl_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20250404.tar.gz" +subhash="38688493ca42425065b9b05f801e286de02e31ab5313616201ba20d7c7c9c46944ab82d2a46dd1a8b8744f300d940e31be32674573c093fae9fcea0f4a6e699e" diff --git a/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg index ef9a598f..cdd82c2d 100644 --- a/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg +++ b/config/submodule/coreboot/default/arm-trusted-firmware/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subrepo="https://review.coreboot.org/arm-trusted-firmware.git" -subrepo_bkup="https://github.com/coreboot/arm-trusted-firmware" -subhash="c5b8de86c8838d08d5d8c9d67c7a432817ee62b8" +subgit="https://review.coreboot.org/arm-trusted-firmware.git" +subgit_bkup="https://github.com/coreboot/arm-trusted-firmware" +subhash="9109143417b24337d39a2a9583828a44996f8aac" diff --git a/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg b/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg deleted file mode 100644 index 3473c884..00000000 --- a/config/submodule/coreboot/default/binutils-2.42.tar.xz/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.42.tar.xz" -subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.42.tar.xz" -subhash="155f3ba14cd220102f4f29a4f1e5cfee3c48aa03b74603460d05afb73c70d6657a9d87eee6eb88bf13203fe6f31177a5c9addc04384e956e7da8069c8ecd20a6" diff --git a/config/submodule/coreboot/default/binutils-2.44.tar.xz/module.cfg b/config/submodule/coreboot/default/binutils-2.44.tar.xz/module.cfg new file mode 100644 index 00000000..81391c1b --- /dev/null +++ b/config/submodule/coreboot/default/binutils-2.44.tar.xz/module.cfg @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.44.tar.xz" +subcurl_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.44.tar.xz" +subhash="b85d3bbc0e334cf67a96219d3c7c65fbf3e832b2c98a7417bf131f3645a0307057ec81cd2b29ff2563cec53e3d42f73e2c60cc5708e80d4a730efdcc6ae14ad7" diff --git a/config/submodule/coreboot/default/fsp/module.cfg b/config/submodule/coreboot/default/fsp/module.cfg new file mode 100644 index 00000000..297e1703 --- /dev/null +++ b/config/submodule/coreboot/default/fsp/module.cfg @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +subgit="https://review.coreboot.org/fsp.git" +subgit_bkup="https://github.com/coreboot/fsp" +subhash="cc36ae2b5775fa7400cb3282680afc0f6cb37a3c" diff --git a/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg b/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg deleted file mode 100644 index 20942b4b..00000000 --- a/config/submodule/coreboot/default/gcc-14.1.0.tar.xz/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.1.0/gcc-14.1.0.tar.xz" -subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.1.0/gcc-14.1.0.tar.xz" -subhash="e9e224f2b26646fcf038d28dfa08b94c623bc57941f99894a321d01c600f7c68aff6b8837fd25e73e540de1f8de5606e98694a62cdcdfb525ce768b3ef6879ea" diff --git a/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg b/config/submodule/coreboot/default/gcc-14.2.0.tar.xz/module.cfg index 4ef88d1d..e637ba03 100644 --- a/config/submodule/coreboot/next/gcc-14.2.0.tar.xz/module.cfg +++ b/config/submodule/coreboot/default/gcc-14.2.0.tar.xz/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz" -subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz" +subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz" +subcurl_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-14.2.0/gcc-14.2.0.tar.xz" subhash="932bdef0cda94bacedf452ab17f103c0cb511ff2cec55e9112fc0328cbf1d803b42595728ea7b200e0a057c03e85626f937012e49a7515bc5dd256b2bf4bc396" diff --git a/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg index 46b55c01..90466fed 100644 --- a/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg +++ b/config/submodule/coreboot/default/gmp-6.3.0.tar.xz/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz" -subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz" +subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz" +subcurl_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz" subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2" diff --git a/config/submodule/coreboot/default/intel-microcode/module.cfg b/config/submodule/coreboot/default/intel-microcode/module.cfg index f7d6d283..ff3f430d 100644 --- a/config/submodule/coreboot/default/intel-microcode/module.cfg +++ b/config/submodule/coreboot/default/intel-microcode/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subrepo="https://review.coreboot.org/intel-microcode.git" -subrepo_bkup="https://github.com/coreboot/intel-microcode" -subhash="5278dfcf98e89098326b3eb8a85d07120a8730f8" +subgit="https://review.coreboot.org/intel-microcode.git" +subgit_bkup="https://github.com/coreboot/intel-microcode" +subhash="eeb93b7a818bb27cb6b7a2be0454f8a0a75f1bd6" diff --git a/config/submodule/coreboot/default/libgfxinit/module.cfg b/config/submodule/coreboot/default/libgfxinit/module.cfg index 93383129..87589128 100644 --- a/config/submodule/coreboot/default/libgfxinit/module.cfg +++ b/config/submodule/coreboot/default/libgfxinit/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subrepo="https://review.coreboot.org/libgfxinit.git" -subrepo_bkup="https://github.com/coreboot/libgfxinit" +subgit="https://review.coreboot.org/libgfxinit.git" +subgit_bkup="https://github.com/coreboot/libgfxinit" subhash="17cfc92f402493979783585b6581efbd98c0cf07" diff --git a/config/submodule/coreboot/default/libgfxinit/patches/0002-re-try-EDID-reading-when-it-fails.patch b/config/submodule/coreboot/default/libgfxinit/patches/0002-re-try-EDID-reading-when-it-fails.patch new file mode 100644 index 00000000..889218fe --- /dev/null +++ b/config/submodule/coreboot/default/libgfxinit/patches/0002-re-try-EDID-reading-when-it-fails.patch @@ -0,0 +1,38 @@ +From cbac507d93dc357a75ccc11fdda5c7ed60935538 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Sun, 13 Jul 2025 15:18:53 +0100 +Subject: [PATCH 1/1] re-try EDID reading when it fails + +some video converters are a bit buggy and have to be +probed twice; linux works fine, but in these cases, +coreboot won't set up the display. + +try it twice, to mitigate, when probing the EDID + +This entire function should probably be rewritten, since +it's buggy in general. + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + common/hw-gfx-gma-display_probing.adb | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/common/hw-gfx-gma-display_probing.adb b/common/hw-gfx-gma-display_probing.adb +index 67f8ddf..0500217 100644 +--- a/common/hw-gfx-gma-display_probing.adb ++++ b/common/hw-gfx-gma-display_probing.adb +@@ -122,6 +122,11 @@ is + Read_EDID (Raw_EDID, Port, Success); + end if; + ++ if not Success then ++ Panel.Wait_On (Config_Helpers.To_Panel (Port)); ++ Read_EDID (Raw_EDID, Port, Success); ++ end if; ++ + if Success and then + ((not Is_DVI_I (Port) or EDID.Compatible_Display + (Raw_EDID, Config_Helpers.To_Display_Type (Port))) and +-- +2.39.5 + diff --git a/config/submodule/coreboot/default/libhwbase/module.cfg b/config/submodule/coreboot/default/libhwbase/module.cfg index 4995e70f..f09b123f 100644 --- a/config/submodule/coreboot/default/libhwbase/module.cfg +++ b/config/submodule/coreboot/default/libhwbase/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subrepo="https://review.coreboot.org/libhwbase.git" -subrepo_bkup="https://github.com/coreboot/libhwbase" +subgit="https://review.coreboot.org/libhwbase.git" +subgit_bkup="https://github.com/coreboot/libhwbase" subhash="584629b9f4771b7618951cec57df2ca3af9c6981" diff --git a/config/submodule/coreboot/default/module.list b/config/submodule/coreboot/default/module.list index 6f17b546..1277158f 100644 --- a/config/submodule/coreboot/default/module.list +++ b/config/submodule/coreboot/default/module.list @@ -1,12 +1,13 @@ 3rdparty/arm-trusted-firmware +3rdparty/fsp 3rdparty/intel-microcode 3rdparty/libgfxinit 3rdparty/libhwbase 3rdparty/vboot -util/crossgcc/tarballs/binutils-2.42.tar.xz -util/crossgcc/tarballs/gcc-14.1.0.tar.xz +util/crossgcc/tarballs/binutils-2.44.tar.xz +util/crossgcc/tarballs/gcc-14.2.0.tar.xz util/crossgcc/tarballs/gmp-6.3.0.tar.xz util/crossgcc/tarballs/mpc-1.3.1.tar.gz -util/crossgcc/tarballs/mpfr-4.2.1.tar.xz +util/crossgcc/tarballs/mpfr-4.2.2.tar.xz util/crossgcc/tarballs/nasm-2.16.03.tar.bz2 -util/crossgcc/tarballs/acpica-unix-20230628.tar.gz +util/crossgcc/tarballs/acpica-unix-20250404.tar.gz diff --git a/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg index 9b6cc57a..9a1ec4cb 100644 --- a/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg +++ b/config/submodule/coreboot/default/mpc-1.3.1.tar.gz/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz" -subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz" +subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz" +subcurl_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz" subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97" diff --git a/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg deleted file mode 100644 index 93cc1a05..00000000 --- a/config/submodule/coreboot/default/mpfr-4.2.1.tar.xz/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz" -subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz" -subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475" diff --git a/config/submodule/coreboot/default/mpfr-4.2.2.tar.xz/module.cfg b/config/submodule/coreboot/default/mpfr-4.2.2.tar.xz/module.cfg new file mode 100644 index 00000000..a1eb1e54 --- /dev/null +++ b/config/submodule/coreboot/default/mpfr-4.2.2.tar.xz/module.cfg @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.2.tar.xz" +subcurl_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.2.tar.xz" +subhash="eb9e7f51b5385fb349cc4fba3a45ffdf0dd53be6dfc74932dc01258158a10514667960c530c47dd9dfc5aa18be2bd94859d80499844c5713710581e6ac6259a9" diff --git a/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg b/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg index 3895e2ef..bc486e80 100644 --- a/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg +++ b/config/submodule/coreboot/default/nasm-2.16.03.tar.bz2/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2" -subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2" +subcurl="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2" +subcurl_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2" subhash="f28445d368debdf44219cc57df33800a8c0e49186cd60836d4adfec7700d53b801d34aa9fc9bfda74169843f33a1e8b465e11292582eb968bb9c3a26f54dd172" diff --git a/config/submodule/coreboot/default/vboot/module.cfg b/config/submodule/coreboot/default/vboot/module.cfg index 32a10913..8b4e15de 100644 --- a/config/submodule/coreboot/default/vboot/module.cfg +++ b/config/submodule/coreboot/default/vboot/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subrepo="https://review.coreboot.org/vboot.git" -subrepo_bkup="https://github.com/coreboot/vboot" -subhash="4b12d392e5b12de29c582df4e717b1228e9f1594" +subgit="https://review.coreboot.org/vboot.git" +subgit_bkup="https://github.com/coreboot/vboot" +subhash="3f94e2c7ed58c4e67d6e7dc6052ec615dbbb9bb4" diff --git a/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg b/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg index 50e6989e..b8365f7c 100644 --- a/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg +++ b/config/submodule/coreboot/fam15h/acpica-unix2-20190703.tar.gz/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-20190703.tar.gz" -subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix2-20190703.tar.gz" +subcurl="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix2-20190703.tar.gz" +subcurl_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix2-20190703.tar.gz" subhash="8445a6d354ce3bcbfb5159f4ec0312b1e910c0b1b2033a2300f892e4ac580abab4e3f5b4ded379f0036299359d307330511ab7053678cfd9031d7df4c365f555" diff --git a/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg index 6e86543f..3f03f64e 100644 --- a/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg +++ b/config/submodule/coreboot/fam15h/binutils-2.32.tar.xz/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.32.tar.xz" -subfile_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.32.tar.xz" +subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.32.tar.xz" +subcurl_bkup="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.32.tar.xz" subhash="d326408f12a03d9a61a9de56584c2af12f81c2e50d2d7e835d51565df8314df01575724afa1e43bd0db45cfc9916b41519b67dfce03232aa4978704492a6994a" diff --git a/config/submodule/coreboot/fam15h/blobs/module.cfg b/config/submodule/coreboot/fam15h/blobs/module.cfg index f649cab2..3c34302c 100644 --- a/config/submodule/coreboot/fam15h/blobs/module.cfg +++ b/config/submodule/coreboot/fam15h/blobs/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subrepo="https://review.coreboot.org/blobs.git" -subrepo_bkup="https://github.com/coreboot/blobs" +subgit="https://review.coreboot.org/blobs.git" +subgit_bkup="https://github.com/coreboot/blobs" subhash="034b27818450428f70aa9316c8bd0d65bacd8ee8" diff --git a/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg index 1a111581..ce21c98b 100644 --- a/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg +++ b/config/submodule/coreboot/fam15h/gcc-8.3.0.tar.xz/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-8.3.0/gcc-8.3.0.tar.xz" -subfile_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-8.3.0/gcc-8.3.0.tar.xz" +subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gcc/gcc-8.3.0/gcc-8.3.0.tar.xz" +subcurl_bkup="https://ftp.nluug.nl/pub/gnu/gcc/gcc-8.3.0/gcc-8.3.0.tar.xz" subhash="1811337ae3add9680cec64968a2509d085b6dc5b6783fc1e8c295e3e47416196fd1a3ad8dfe7e10be2276b4f62c357659ce2902f239f60a8648548231b4b5802" diff --git a/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg index 08926b6a..a46b9b7c 100644 --- a/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg +++ b/config/submodule/coreboot/fam15h/gmp-6.1.2.tar.xz/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.1.2.tar.xz" -subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.1.2.tar.xz" +subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.1.2.tar.xz" +subcurl_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.1.2.tar.xz" subhash="9f098281c0593b76ee174b722936952671fab1dae353ce3ed436a31fe2bc9d542eca752353f6645b7077c1f395ab4fdd355c58e08e2a801368f1375690eee2c6" diff --git a/config/submodule/coreboot/fam15h/module.list b/config/submodule/coreboot/fam15h/module.list index 64f09aea..00befad9 100644 --- a/config/submodule/coreboot/fam15h/module.list +++ b/config/submodule/coreboot/fam15h/module.list @@ -6,4 +6,4 @@ util/crossgcc/tarballs/gcc-8.3.0.tar.xz util/crossgcc/tarballs/gmp-6.1.2.tar.xz util/crossgcc/tarballs/mpc-1.1.0.tar.gz util/crossgcc/tarballs/mpfr-4.0.2.tar.xz -util/crossgcc/tarballs/nasm-2.14.02.tar.bz2 +util/crossgcc/tarballs/nasm-2.16.03.tar.bz2 diff --git a/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg b/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg index 89cfabc7..13a66a87 100644 --- a/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg +++ b/config/submodule/coreboot/fam15h/mpc-1.1.0.tar.gz/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.1.0.tar.gz" -subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.1.0.tar.gz" +subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.1.0.tar.gz" +subcurl_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.1.0.tar.gz" subhash="72d657958b07c7812dc9c7cbae093118ce0e454c68a585bfb0e2fa559f1bf7c5f49b93906f580ab3f1073e5b595d23c6494d4d76b765d16dde857a18dd239628" diff --git a/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg b/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg index c6ebf4de..f2a4f0fe 100644 --- a/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg +++ b/config/submodule/coreboot/fam15h/mpfr-4.0.2.tar.xz/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.0.2.tar.xz" -subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.0.2.tar.xz" +subcurl="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.0.2.tar.xz" +subcurl_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.0.2.tar.xz" subhash="d583555d08863bf36c89b289ae26bae353d9a31f08ee3894520992d2c26e5683c4c9c193d7ad139632f71c0a476d85ea76182702a98bf08dde7b6f65a54f8b88" diff --git a/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg b/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg deleted file mode 100644 index 4c91ec05..00000000 --- a/config/submodule/coreboot/fam15h/nasm-2.14.02.tar.bz2/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.14.02/nasm-2.14.02.tar.bz2" -subfile_bkup="https://coreboot.org/releases/crossgcc-sources/nasm-2.14.02.tar.bz2" -subhash="71e3d44736493b1a56d4230bc2e5519e858aaadde5d89a692f1472fad6755084460e36b42852707f4c862eff75d3f2c232aedcc4e61e9d9ffcc8c9ca6498292b" diff --git a/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg b/config/submodule/coreboot/fam15h/nasm-2.16.03.tar.bz2/module.cfg index 3895e2ef..bc486e80 100644 --- a/config/submodule/coreboot/next/nasm-2.16.03.tar.bz2/module.cfg +++ b/config/submodule/coreboot/fam15h/nasm-2.16.03.tar.bz2/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subfile="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2" -subfile_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2" +subcurl="https://www.nasm.us/pub/nasm/releasebuilds/2.16.03/nasm-2.16.03.tar.bz2" +subcurl_bkup="https://www.mirrorservice.org/sites/distfiles.macports.org/nasm/nasm-2.16.03.tar.bz2" subhash="f28445d368debdf44219cc57df33800a8c0e49186cd60836d4adfec7700d53b801d34aa9fc9bfda74169843f33a1e8b465e11292582eb968bb9c3a26f54dd172" diff --git a/config/submodule/coreboot/fam15h/vboot/module.cfg b/config/submodule/coreboot/fam15h/vboot/module.cfg index b0897e4f..a3a8f21b 100644 --- a/config/submodule/coreboot/fam15h/vboot/module.cfg +++ b/config/submodule/coreboot/fam15h/vboot/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subrepo="https://review.coreboot.org/vboot.git" -subrepo_bkup="https://github.com/coreboot/vboot" +subgit="https://review.coreboot.org/vboot.git" +subgit_bkup="https://github.com/coreboot/vboot" subhash="ecdca931ae0637d1a9498f64862939bd5bb99e0b" diff --git a/config/submodule/coreboot/next/acpica-unix-20241212.tar.gz/module.cfg b/config/submodule/coreboot/next/acpica-unix-20241212.tar.gz/module.cfg deleted file mode 100644 index 30baf001..00000000 --- a/config/submodule/coreboot/next/acpica-unix-20241212.tar.gz/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20241212.tar.gz" -subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20241212.tar.gz" -subhash="daa4243f927451ac18c337cf17c27849e68329b3f7eb25b8c3379fda9c6a484201b73d4ffccab89a0ae22cc5e432f141ba149015a003834b0515bdb3d4efe0a8" diff --git a/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg b/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg deleted file mode 100644 index 2117a540..00000000 --- a/config/submodule/coreboot/next/binutils-2.43.1.tar.xz/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subfile="https://ftp.nluug.nl/pub/gnu/binutils/binutils-2.43.1.tar.xz" -subfile_bkup="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/binutils/binutils-2.43.1.tar.xz" -subhash="20977ad17729141a2c26d358628f44a0944b84dcfefdec2ba029c2d02f40dfc41cc91c0631044560d2bd6f9a51e1f15846b4b311befbe14f1239f14ff7d57824" diff --git a/config/submodule/coreboot/next/fsp/module.cfg b/config/submodule/coreboot/next/fsp/module.cfg deleted file mode 100644 index a380ddda..00000000 --- a/config/submodule/coreboot/next/fsp/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subrepo="https://review.coreboot.org/fsp.git" -subrepo_bkup="https://github.com/coreboot/fsp" -subhash="909cf43ad6ccebb6adee482bc0a4f098c32c9a6d" diff --git a/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg b/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg deleted file mode 100644 index 46b55c01..00000000 --- a/config/submodule/coreboot/next/gmp-6.3.0.tar.xz/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/gmp/gmp-6.3.0.tar.xz" -subfile_bkup="https://ftp.nluug.nl/pub/gnu/gmp/gmp-6.3.0.tar.xz" -subhash="e85a0dab5195889948a3462189f0e0598d331d3457612e2d3350799dba2e244316d256f8161df5219538eb003e4b5343f989aaa00f96321559063ed8c8f29fd2" diff --git a/config/submodule/coreboot/next/intel-microcode/module.cfg b/config/submodule/coreboot/next/intel-microcode/module.cfg deleted file mode 100644 index ef649800..00000000 --- a/config/submodule/coreboot/next/intel-microcode/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subrepo="https://review.coreboot.org/intel-microcode.git" -subrepo_bkup="https://github.com/coreboot/intel-microcode" -subhash="8ac9378a84879e81c503e09f344560b3dd7f72df" diff --git a/config/submodule/coreboot/next/libgfxinit/module.cfg b/config/submodule/coreboot/next/libgfxinit/module.cfg deleted file mode 100644 index 93383129..00000000 --- a/config/submodule/coreboot/next/libgfxinit/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subrepo="https://review.coreboot.org/libgfxinit.git" -subrepo_bkup="https://github.com/coreboot/libgfxinit" -subhash="17cfc92f402493979783585b6581efbd98c0cf07" diff --git a/config/submodule/coreboot/next/libhwbase/module.cfg b/config/submodule/coreboot/next/libhwbase/module.cfg deleted file mode 100644 index 4995e70f..00000000 --- a/config/submodule/coreboot/next/libhwbase/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subrepo="https://review.coreboot.org/libhwbase.git" -subrepo_bkup="https://github.com/coreboot/libhwbase" -subhash="584629b9f4771b7618951cec57df2ca3af9c6981" diff --git a/config/submodule/coreboot/next/module.list b/config/submodule/coreboot/next/module.list deleted file mode 100644 index 36f05dbe..00000000 --- a/config/submodule/coreboot/next/module.list +++ /dev/null @@ -1,12 +0,0 @@ -3rdparty/fsp -3rdparty/intel-microcode -3rdparty/libgfxinit -3rdparty/libhwbase -3rdparty/vboot -util/crossgcc/tarballs/binutils-2.43.1.tar.xz -util/crossgcc/tarballs/gcc-14.2.0.tar.xz -util/crossgcc/tarballs/gmp-6.3.0.tar.xz -util/crossgcc/tarballs/mpc-1.3.1.tar.gz -util/crossgcc/tarballs/mpfr-4.2.1.tar.xz -util/crossgcc/tarballs/nasm-2.16.03.tar.bz2 -util/crossgcc/tarballs/acpica-unix-20241212.tar.gz diff --git a/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg b/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg deleted file mode 100644 index 9b6cc57a..00000000 --- a/config/submodule/coreboot/next/mpc-1.3.1.tar.gz/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpc/mpc-1.3.1.tar.gz" -subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpc/mpc-1.3.1.tar.gz" -subhash="4bab4ef6076f8c5dfdc99d810b51108ced61ea2942ba0c1c932d624360a5473df20d32b300fc76f2ba4aa2a97e1f275c9fd494a1ba9f07c4cb2ad7ceaeb1ae97" diff --git a/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg b/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg deleted file mode 100644 index 93cc1a05..00000000 --- a/config/submodule/coreboot/next/mpfr-4.2.1.tar.xz/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subfile="https://www.mirrorservice.org/sites/ftp.gnu.org/gnu/mpfr/mpfr-4.2.1.tar.xz" -subfile_bkup="https://ftp.nluug.nl/pub/gnu/mpfr/mpfr-4.2.1.tar.xz" -subhash="bc68c0d755d5446403644833ecbb07e37360beca45f474297b5d5c40926df1efc3e2067eecffdf253f946288bcca39ca89b0613f545d46a9e767d1d4cf358475" diff --git a/config/submodule/coreboot/next/vboot/module.cfg b/config/submodule/coreboot/next/vboot/module.cfg deleted file mode 100644 index d13a1b29..00000000 --- a/config/submodule/coreboot/next/vboot/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subrepo="https://review.coreboot.org/vboot.git" -subrepo_bkup="https://github.com/coreboot/vboot" -subhash="3f94e2c7ed58c4e67d6e7dc6052ec615dbbb9bb4" diff --git a/config/submodule/coreboot/next/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch b/config/submodule/coreboot/next/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch deleted file mode 100644 index 1ac41de6..00000000 --- a/config/submodule/coreboot/next/vboot/patches/0001-extract_vmlinuz.c-Fix-the-bounds-check-on-vmlinuz_he.patch +++ /dev/null @@ -1,178 +0,0 @@ -From 195f61375aeec9eec16604ec59f6eda2e6058cc1 Mon Sep 17 00:00:00 2001 -From: "Luke T. Shumaker" <lukeshu@lukeshu.com> -Date: Thu, 30 May 2024 14:08:33 -0600 -Subject: [PATCH 1/1] extract_vmlinuz.c: Fix the bounds check on - vmlinuz_header_{offset,size} - -The check on vmlinuz_header_offset and vmlinuz_header_size is obviously -wrong: - - if (!vmlinuz_header_size || - kpart_data + vmlinuz_header_offset + vmlinuz_header_size > - kpart_data) { - return 1; - } - -`kpart_data + some_unsigned_values` can obviously never be `> kpart_data`, -unless something has overflowed! And `vmlinuz_header_offset` hasn't even -been set yet (besides being initialized to zero)! - -GCC will deduce that if the check didn't cause the function to bail, then -vmlinuz_header_size (a uint32_t) must be "negative"; that is: in the range -[2GiB,4GiB). - -On platforms where size_t is 32-bits, this is *especially* broken. -memcpy's size argument must be in the range [0,2GiB). Because GCC has -proved that vmlinuz_header_size is higher than that, it will fail to -compile: - - host/lib/extract_vmlinuz.c:67:9: error: 'memcpy' specified bound between 2147483648 and 4294967295 exceeds maximum object size 2147483647 [-Werror=stringop-overflow=] - -So, fix the check. - -I can now say that what I suspect the original author meant to write would -be the following patch, if `vmlinuz_header_offset` were already set: - - -kpart_data + vmlinuz_header_offset + vmlinuz_header_size > kpart_data - +now + vmlinuz_header_offset + vmlinuz_header_size > kpart_size - -This hypothesis is supported by `now` not getting incremented by -`kblob_size` the way it is for the keyblock and preamble sizes. - -However, we can also see that even this "corrected" bounds check is -insufficient: it does not detect the vmlinuz_header overflowing into -kblob_data. - -OK, so let's describe the fix: - -Have a `*vmlinuz_header` pointer instead of a -`uint64_t vmlinuz_header_offset`, to be more similar to all the other -regions. With this change, the correct check becomes a simple - - vmlinuz_header + vmlinuz_header_size > kblob_data - -While we're at it, make some changes that could have helped avoid this in -the first place: - - - Add comments. - - Calculate the vmlinuz_header offset right away, instead of waiting. - - Go ahead and increment `now` by `kblob_size`, to increase regularity. - -Change-Id: I5c03e49070b6dd2e04459566ef7dd129d27736e4 ---- - host/lib/extract_vmlinuz.c | 72 +++++++++++++++++++++++++++----------- - 1 file changed, 51 insertions(+), 21 deletions(-) - -diff --git a/host/lib/extract_vmlinuz.c b/host/lib/extract_vmlinuz.c -index 4ccfcf33..d2c09443 100644 ---- a/host/lib/extract_vmlinuz.c -+++ b/host/lib/extract_vmlinuz.c -@@ -15,16 +15,44 @@ - - int ExtractVmlinuz(void *kpart_data, size_t kpart_size, - void **vmlinuz_out, size_t *vmlinuz_size) { -+ // We're going to be extracting `vmlinuz_header` and -+ // `kblob_data`, and returning the concatenation of them. -+ // -+ // kpart_data = +-[kpart_size]------------------------------------+ -+ // | | -+ // keyblock = | +-[keyblock->keyblock_size]-------------------+ | -+ // | | struct vb2_keyblock keyblock | | -+ // | | char [] ...data... | | -+ // | +---------------------------------------------+ | -+ // | | -+ // preamble = | +-[preamble->preamble_size]-------------------+ | -+ // | | struct vb2_kernel_preamble preamble | | -+ // | | char [] ...data... | | -+ // | | char [] vmlinuz_header | | -+ // | | char [] ...data... | | -+ // | +---------------------------------------------+ | -+ // | | -+ // kblob_data= | +-[preamble->body_signature.data_size]--------+ | -+ // | | char [] ...data... | | -+ // | +---------------------------------------------+ | -+ // | | -+ // +-------------------------------------------------+ -+ - size_t now = 0; -+ // The 3 sections of kpart_data. -+ struct vb2_keyblock *keyblock = NULL; - struct vb2_kernel_preamble *preamble = NULL; - uint8_t *kblob_data = NULL; - uint32_t kblob_size = 0; -+ // vmlinuz_header -+ uint8_t *vmlinuz_header = NULL; - uint32_t vmlinuz_header_size = 0; -- uint64_t vmlinuz_header_address = 0; -- uint64_t vmlinuz_header_offset = 0; -+ // The concatenated result. - void *vmlinuz = NULL; - -- struct vb2_keyblock *keyblock = (struct vb2_keyblock *)kpart_data; -+ // Isolate the 3 sections of kpart_data. -+ -+ keyblock = (struct vb2_keyblock *)kpart_data; - now += keyblock->keyblock_size; - if (now > kpart_size) - return 1; -@@ -36,37 +64,39 @@ int ExtractVmlinuz(void *kpart_data, size_t kpart_size, - - kblob_data = kpart_data + now; - kblob_size = preamble->body_signature.data_size; -- -- if (!kblob_data || (now + kblob_size) > kpart_size) -+ now += kblob_size; -+ if (now > kpart_size) - return 1; - -+ // Find `vmlinuz_header` within `preamble`. -+ - if (preamble->header_version_minor > 0) { -- vmlinuz_header_address = preamble->vmlinuz_header_address; -+ // calculate the vmlinuz_header offset from -+ // the beginning of the kpart_data. The kblob doesn't -+ // include the body_load_offset, but does include -+ // the keyblock and preamble sections. -+ size_t vmlinuz_header_offset = -+ preamble->vmlinuz_header_address - -+ preamble->body_load_address + -+ keyblock->keyblock_size + -+ preamble->preamble_size; -+ -+ vmlinuz_header = kpart_data + vmlinuz_header_offset; - vmlinuz_header_size = preamble->vmlinuz_header_size; - } - -- if (!vmlinuz_header_size || -- kpart_data + vmlinuz_header_offset + vmlinuz_header_size > -- kpart_data) { -+ if (!vmlinuz_header || -+ !vmlinuz_header_size || -+ vmlinuz_header + vmlinuz_header_size > kblob_data) { - return 1; - } - -- // calculate the vmlinuz_header offset from -- // the beginning of the kpart_data. The kblob doesn't -- // include the body_load_offset, but does include -- // the keyblock and preamble sections. -- vmlinuz_header_offset = vmlinuz_header_address - -- preamble->body_load_address + -- keyblock->keyblock_size + -- preamble->preamble_size; -+ // Concatenate and return. - - vmlinuz = malloc(vmlinuz_header_size + kblob_size); - if (vmlinuz == NULL) - return 1; -- -- memcpy(vmlinuz, kpart_data + vmlinuz_header_offset, -- vmlinuz_header_size); -- -+ memcpy(vmlinuz, vmlinuz_header, vmlinuz_header_size); - memcpy(vmlinuz + vmlinuz_header_size, kblob_data, kblob_size); - - *vmlinuz_out = vmlinuz; --- -2.45.1 - diff --git a/config/submodule/docs/html/module.cfg b/config/submodule/docs/html/module.cfg index 9d2b20c4..e18b2fe4 100644 --- a/config/submodule/docs/html/module.cfg +++ b/config/submodule/docs/html/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subhash="3787d9eade2409ff5192fb86bd4c6c5b025c3c5a" -subrepo="https://codeberg.org/libreboot/lbwww" -subrepo_bkup="https://git.disroot.org/libreboot/lbwww" +subhash="2fc8efd375aef58d6c5d6b8e4ffe87b3bd2ff3d4" +subgit="https://codeberg.org/libreboot/lbwww" +subgit_bkup="https://git.disroot.org/libreboot/lbwww" diff --git a/config/submodule/docs/img/module.cfg b/config/submodule/docs/img/module.cfg index c65a6dbf..8a176668 100644 --- a/config/submodule/docs/img/module.cfg +++ b/config/submodule/docs/img/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subhash="8dcb3e11a579e29bc5a16ba1ba5b473164d2e9e4" -subrepo="https://codeberg.org/libreboot/lbwww-img" -subrepo_bkup="https://git.disroot.org/libreboot/lbwww-img" +subhash="68863fd7491f1358fb920d8ad558de35fcfec769" +subgit="https://codeberg.org/libreboot/lbwww-img" +subgit_bkup="https://git.disroot.org/libreboot/lbwww-img" diff --git a/config/submodule/docs/module.list b/config/submodule/docs/module.list index 1ad2aecb..e2570aac 100644 --- a/config/submodule/docs/module.list +++ b/config/submodule/docs/module.list @@ -1,3 +1,2 @@ -www/untitled www/html www/html/site/img diff --git a/config/submodule/docs/untitled/module.cfg b/config/submodule/docs/untitled/module.cfg deleted file mode 100644 index 3c14f225..00000000 --- a/config/submodule/docs/untitled/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subhash="d8e2043c1512eb1171c274559ce82e8093ef393f" -subrepo="https://codeberg.org/vimuser/untitled-website" -subrepo_bkup="https://notabug.org/untitled/untitled-website" diff --git a/config/submodule/grub/default/gnulib/module.cfg b/config/submodule/grub/default/gnulib/module.cfg index eaf40b24..eb5aa2b6 100644 --- a/config/submodule/grub/default/gnulib/module.cfg +++ b/config/submodule/grub/default/gnulib/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subrepo="https://codeberg.org/libreboot/gnulib" -subrepo_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup! +subgit="https://codeberg.org/libreboot/gnulib" +subgit_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup! subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b" diff --git a/config/submodule/grub/nvme/gnulib/module.cfg b/config/submodule/grub/nvme/gnulib/module.cfg index eaf40b24..eb5aa2b6 100644 --- a/config/submodule/grub/nvme/gnulib/module.cfg +++ b/config/submodule/grub/nvme/gnulib/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later -subrepo="https://codeberg.org/libreboot/gnulib" -subrepo_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup! +subgit="https://codeberg.org/libreboot/gnulib" +subgit_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup! subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b" diff --git a/config/submodule/grub/xhci/gnulib/module.cfg b/config/submodule/grub/xhci/gnulib/module.cfg deleted file mode 100644 index eaf40b24..00000000 --- a/config/submodule/grub/xhci/gnulib/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subrepo="https://codeberg.org/libreboot/gnulib" -subrepo_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup! -subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b" diff --git a/config/submodule/grub/xhci_nvme/gnulib/module.cfg b/config/submodule/grub/xhci_nvme/gnulib/module.cfg new file mode 100644 index 00000000..eb5aa2b6 --- /dev/null +++ b/config/submodule/grub/xhci_nvme/gnulib/module.cfg @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +subgit="https://codeberg.org/libreboot/gnulib" +subgit_bkup="git://git.sv.gnu.org/gnulib" # ALWAYS slow. only use as backup! +subhash="9f48fb992a3d7e96610c4ce8be969cff2d61a01b" diff --git a/config/submodule/grub/xhci/module.list b/config/submodule/grub/xhci_nvme/module.list index 0e57095c..0e57095c 100644 --- a/config/submodule/grub/xhci/module.list +++ b/config/submodule/grub/xhci_nvme/module.list diff --git a/config/submodule/pcsx-redux/uC-sdk/module.cfg b/config/submodule/pcsx-redux/uC-sdk/module.cfg index f8f44850..75f68204 100644 --- a/config/submodule/pcsx-redux/uC-sdk/module.cfg +++ b/config/submodule/pcsx-redux/uC-sdk/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later subhash="7c6f1973a16893cf1f0868af6f8e60a028b933ad" -subrepo="https://github.com/grumpycoders/uC-sdk.git" -subrepo_bkup="https://codeberg.org/vimuser/uC-sdk" +subgit="https://github.com/grumpycoders/uC-sdk.git" +subgit_bkup="https://codeberg.org/vimuser/uC-sdk" diff --git a/config/submodule/pico-sdk/tinyusb/module.cfg b/config/submodule/pico-sdk/tinyusb/module.cfg index 988d68ba..981e5305 100644 --- a/config/submodule/pico-sdk/tinyusb/module.cfg +++ b/config/submodule/pico-sdk/tinyusb/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later subhash="86c416d4c0fb38432460b3e11b08b9de76941bf5" -subrepo="https://codeberg.org/libreboot/tinyusb" -subrepo_bkup="https://github.com/hathach/tinyusb.git" +subgit="https://codeberg.org/libreboot/tinyusb" +subgit_bkup="https://github.com/hathach/tinyusb.git" diff --git a/config/submodule/stm32-vserprog/libopencm3/module.cfg b/config/submodule/stm32-vserprog/libopencm3/module.cfg index 069020cc..3ac90162 100644 --- a/config/submodule/stm32-vserprog/libopencm3/module.cfg +++ b/config/submodule/stm32-vserprog/libopencm3/module.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later subhash="458250dc6147dc807eec9e4d5a6caf38a699ecb1" -subrepo="https://codeberg.org/libreboot/libopencm3" -subrepo_bkup="https://github.com/libopencm3/libopencm3" +subgit="https://codeberg.org/libreboot/libopencm3" +subgit_bkup="https://github.com/libopencm3/libopencm3" diff --git a/config/u-boot/amd64coreboot/target.cfg b/config/u-boot/amd64coreboot/target.cfg index 8b89408e..d3415dc6 100644 --- a/config/u-boot/amd64coreboot/target.cfg +++ b/config/u-boot/amd64coreboot/target.cfg @@ -2,6 +2,6 @@ tree="x86_64" # test building with x86_64 hostcc by commenting these: -# xtree="default" # coreboot tree containing crossgcc +# xgcctree="default" # coreboot tree containing crossgcc # xarch="x86_64-elf" # or uncomment them to use crossgcc(buggy) diff --git a/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch b/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch index 32647ed0..8227b076 100644 --- a/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch +++ b/config/u-boot/default/patches/0001-clk-rockchip-rk3399-Set-hardcoded-clock-rates-same-a.patch @@ -1,4 +1,4 @@ -From bc5204d0d28bb431186fd106f9a79f69bfad005d Mon Sep 17 00:00:00 2001 +From ee94f55d37fc8c133faa5055184f75f99830cfdc Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak <alpernebiyasak@gmail.com> Date: Fri, 8 Oct 2021 17:33:22 +0300 Subject: [PATCH] clk: rockchip: rk3399: Set hardcoded clock rates same as @@ -60,7 +60,7 @@ index d941a129f3e5..54035c0df1f3 100644 #define PWM_CLOCK_HZ PMU_PCLK_HZ diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c -index 24cefebd1b2a..6f874bd347e0 100644 +index 6e87db18be07..1b8ffe9e794e 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -53,10 +53,11 @@ struct pll_div { @@ -72,7 +72,7 @@ index 24cefebd1b2a..6f874bd347e0 100644 +static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 4, 1); +static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 3, 1); +static const struct pll_div npll_init_cfg = PLL_DIVISORS(NPLL_HZ, 1, 3, 1); - #if !defined(CONFIG_SPL_BUILD) + #if !defined(CONFIG_XPL_BUILD) -static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1); +static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 3, 2, 1); #endif @@ -96,5 +96,5 @@ index 24cefebd1b2a..6f874bd347e0 100644 /* configure perihp aclk, hclk, pclk */ aclk_div = GPLL_HZ / PERIHP_ACLK_HZ - 1; -- -2.45.2 +2.49.0 diff --git a/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch b/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch index bb264b00..e2de311c 100644 --- a/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch +++ b/config/u-boot/default/patches/0002-video-improve-UEFI-experience-on-DM_VIDEO.patch @@ -1,4 +1,4 @@ -From 03750188cbe305cd8383178a1ee476de2aa5953e Mon Sep 17 00:00:00 2001 +From 780d8ffe985441824a242e5b853721dfe14435dd Mon Sep 17 00:00:00 2001 From: Andre Przywara <andre.przywara@arm.com> Date: Mon, 10 Jan 2022 00:56:31 +0000 Subject: [PATCH 1/3] video: Add cursor support for video consoles @@ -36,7 +36,7 @@ index 939363653f6c..6b531718276f 100644 vc_priv->y_charsize = fontdata->height; if (vid_priv->rot % 2) { diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c -index 80e7adf6a1a4..8b2ef51f1b3b 100644 +index ebe96bf0c2f3..8613c464040f 100644 --- a/drivers/video/vidconsole-uclass.c +++ b/drivers/video/vidconsole-uclass.c @@ -57,6 +57,26 @@ int vidconsole_entry_start(struct udevice *dev) @@ -84,7 +84,7 @@ index 80e7adf6a1a4..8b2ef51f1b3b 100644 priv->xcur_frac = priv->xstart_frac; priv->ycur += priv->y_charsize; -@@ -284,6 +308,14 @@ static void vidconsole_escape_char(struct udevice *dev, char ch) +@@ -286,6 +310,14 @@ static void vidconsole_escape_char(struct udevice *dev, char ch) break; } @@ -99,7 +99,7 @@ index 80e7adf6a1a4..8b2ef51f1b3b 100644 case 'J': { int mode; -@@ -458,6 +490,11 @@ int vidconsole_put_char(struct udevice *dev, char ch) +@@ -460,6 +492,11 @@ int vidconsole_put_char(struct udevice *dev, char ch) struct vidconsole_priv *priv = dev_get_uclass_priv(dev); int cp, ret; @@ -111,7 +111,7 @@ index 80e7adf6a1a4..8b2ef51f1b3b 100644 if (priv->escape) { vidconsole_escape_char(dev, ch); return 0; -@@ -472,6 +509,7 @@ int vidconsole_put_char(struct udevice *dev, char ch) +@@ -474,6 +511,7 @@ int vidconsole_put_char(struct udevice *dev, char ch) /* beep */ break; case '\r': @@ -119,7 +119,7 @@ index 80e7adf6a1a4..8b2ef51f1b3b 100644 priv->xcur_frac = priv->xstart_frac; break; case '\n': -@@ -479,6 +517,7 @@ int vidconsole_put_char(struct udevice *dev, char ch) +@@ -481,6 +519,7 @@ int vidconsole_put_char(struct udevice *dev, char ch) vidconsole_entry_start(dev); break; case '\t': /* Tab (8 chars alignment) */ @@ -127,7 +127,7 @@ index 80e7adf6a1a4..8b2ef51f1b3b 100644 priv->xcur_frac = ((priv->xcur_frac / priv->tab_width_frac) + 1) * priv->tab_width_frac; -@@ -503,6 +542,8 @@ int vidconsole_put_char(struct udevice *dev, char ch) +@@ -505,6 +544,8 @@ int vidconsole_put_char(struct udevice *dev, char ch) break; } @@ -136,7 +136,7 @@ index 80e7adf6a1a4..8b2ef51f1b3b 100644 return 0; } -@@ -723,6 +764,7 @@ static int vidconsole_pre_probe(struct udevice *dev) +@@ -725,6 +766,7 @@ static int vidconsole_pre_probe(struct udevice *dev) struct video_priv *vid_priv = dev_get_uclass_priv(vid); priv->xsize_frac = VID_TO_POS(vid_priv->xsize); @@ -145,10 +145,10 @@ index 80e7adf6a1a4..8b2ef51f1b3b 100644 return 0; } diff --git a/include/video_console.h b/include/video_console.h -index 8b5928dc5ebb..00c5ecb664b9 100644 +index 723d2315606d..17a9aa3f9295 100644 --- a/include/video_console.h +++ b/include/video_console.h -@@ -66,6 +66,7 @@ struct vidconsole_priv { +@@ -74,6 +74,7 @@ struct vidconsole_priv { int escape_len; int row_saved; int col_saved; @@ -157,10 +157,10 @@ index 8b5928dc5ebb..00c5ecb664b9 100644 char utf8_buf[5]; }; -- -2.45.2 +2.49.0 -From f63a54996fdaac7ff995e26fd4318a09a9c14dff Mon Sep 17 00:00:00 2001 +From b2b921d7bc69b505562cf02d1b4c6f6d4325c7d5 Mon Sep 17 00:00:00 2001 From: Andre Przywara <andre.przywara@arm.com> Date: Mon, 10 Jan 2022 00:56:36 +0000 Subject: [PATCH 2/3] efi-selftest: Add international characters test @@ -196,10 +196,10 @@ index a3023c82567c..2f8d8d323c2b 100644 ret = con_out->output_string(con_out, text); if (ret != EFI_ST_SUCCESS) { -- -2.45.2 +2.49.0 -From cc05aa26c43c35e9155d958400532005ae7eeede Mon Sep 17 00:00:00 2001 +From 082422499a5f2689e715df68bfd025a5cc15cc64 Mon Sep 17 00:00:00 2001 From: Andre Przywara <andre.przywara@arm.com> Date: Mon, 10 Jan 2022 00:56:37 +0000 Subject: [PATCH 3/3] efi_selftest: Add box drawing character selftest @@ -242,5 +242,5 @@ index 2f8d8d323c2b..02209a5bf224 100644 ret = con_out->output_string(con_out, text); if (ret != EFI_ST_SUCCESS) { -- -2.45.2 +2.49.0 diff --git a/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch b/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch index 07a5fe8c..18c93ab8 100644 --- a/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch +++ b/config/u-boot/default/patches/0003-Add-video-damage-tracking.patch @@ -1,4 +1,4 @@ -From c3ae7d7f7af47e747f85f06662e26f434c25c891 Mon Sep 17 00:00:00 2001 +From dae1f9cafd3d2061336f5d230ebc1f236423fa0e Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak <alpernebiyasak@gmail.com> Date: Fri, 18 Aug 2023 13:31:36 +0300 Subject: [PATCH 01/13] video: test: Split copy frame buffer check into a @@ -19,10 +19,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-2-alpernebiyasak@gma 1 file changed, 58 insertions(+), 11 deletions(-) diff --git a/test/dm/video.c b/test/dm/video.c -index 7dfbeb9555d1..14e6af5181f1 100644 +index e347c1403fda..01fa9e1b2415 100644 --- a/test/dm/video.c +++ b/test/dm/video.c -@@ -54,9 +54,6 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); +@@ -54,9 +54,6 @@ DM_TEST(dm_test_video_base, UTF_SCAN_PDATA | UTF_SCAN_FDT); * size of the compressed data. This provides a pretty good level of * certainty and the resulting tests need only check a single value. * @@ -301,10 +301,10 @@ index 7dfbeb9555d1..14e6af5181f1 100644 return 0; } -- -2.45.2 +2.49.0 -From 575ebe8b5d9ae9c9818b4deb708f8a69f9f9a9b1 Mon Sep 17 00:00:00 2001 +From 3c4f71fb10a827db53d6ed637e39afb5cc19a871 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak <alpernebiyasak@gmail.com> Date: Sun, 20 Aug 2023 17:46:46 +0300 Subject: [PATCH 02/13] video: test: Support checking copy frame buffer @@ -328,10 +328,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-3-alpernebiyasak@gma 1 file changed, 41 insertions(+), 35 deletions(-) diff --git a/test/dm/video.c b/test/dm/video.c -index 14e6af5181f1..50374cafc009 100644 +index 01fa9e1b2415..edb1b4ede8c9 100644 --- a/test/dm/video.c +++ b/test/dm/video.c -@@ -56,22 +56,28 @@ DM_TEST(dm_test_video_base, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); +@@ -56,22 +56,28 @@ DM_TEST(dm_test_video_base, UTF_SCAN_PDATA | UTF_SCAN_FDT); * * @uts: Test state * @dev: Video device @@ -614,10 +614,10 @@ index 14e6af5181f1..50374cafc009 100644 return 0; -- -2.45.2 +2.49.0 -From d1fddc8cbe64a5532ddc43d0b1413ff7cc1bf618 Mon Sep 17 00:00:00 2001 +From ecd9200f2068ab8bbeda5c7b8ddc4b8d7ca6b038 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak <alpernebiyasak@gmail.com> Date: Fri, 18 Aug 2023 17:31:27 +0300 Subject: [PATCH 03/13] video: test: Test partial updates of hardware frame @@ -637,13 +637,13 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-4-alpernebiyasak@gma 1 file changed, 54 insertions(+) diff --git a/test/dm/video.c b/test/dm/video.c -index 50374cafc009..4798f2205a99 100644 +index edb1b4ede8c9..80e65d66dbaf 100644 --- a/test/dm/video.c +++ b/test/dm/video.c @@ -656,3 +656,57 @@ static int dm_test_video_truetype_bs(struct unit_test_state *uts) return 0; } - DM_TEST(dm_test_video_truetype_bs, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + DM_TEST(dm_test_video_truetype_bs, UTF_SCAN_PDATA | UTF_SCAN_FDT); + +/* Test partial rendering onto hardware frame buffer */ +static int dm_test_video_copy(struct unit_test_state *uts) @@ -697,12 +697,12 @@ index 50374cafc009..4798f2205a99 100644 + + return 0; +} -+DM_TEST(dm_test_video_copy, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); ++DM_TEST(dm_test_video_copy, UTF_SCAN_PDATA | UTF_SCAN_FDT); -- -2.45.2 +2.49.0 -From 700a7cdc62fa08f425c05db2061f06c56d96d5b6 Mon Sep 17 00:00:00 2001 +From 6ecfb63749d955fc28e6312583865c902ffb1175 Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Fri, 10 Jun 2022 00:59:15 +0200 Subject: [PATCH 04/13] dm: video: Add damage tracking API @@ -728,7 +728,7 @@ Reviewed-by: Simon Glass <sjg@chromium.org> 3 files changed, 86 insertions(+), 2 deletions(-) diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index 6e79694fd192..d7da655cea62 100644 +index 3c3cebaacd02..5d67067891be 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -98,6 +98,19 @@ config VIDEO_COPY @@ -752,10 +752,10 @@ index 6e79694fd192..d7da655cea62 100644 bool "Generic PWM based Backlight Driver" depends on BACKLIGHT && DM_PWM diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index a5aa8dd52954..b95f2dbc7703 100644 +index ff4f21995859..da035e5c92b7 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -352,6 +352,34 @@ void video_set_default_colors(struct udevice *dev, bool invert) +@@ -367,6 +367,34 @@ void video_set_default_colors(struct udevice *dev, bool invert) priv->colour_bg = video_index_to_colour(priv, back); } @@ -790,7 +790,7 @@ index a5aa8dd52954..b95f2dbc7703 100644 /* Flush video activity to the caches */ int video_sync(struct udevice *vid, bool force) { -@@ -385,6 +413,13 @@ int video_sync(struct udevice *vid, bool force) +@@ -400,6 +428,13 @@ int video_sync(struct udevice *vid, bool force) #endif priv->last_sync = get_timer(0); @@ -805,10 +805,10 @@ index a5aa8dd52954..b95f2dbc7703 100644 } diff --git a/include/video.h b/include/video.h -index 4013a949983f..835d7734cb75 100644 +index a1f7fd7e839c..7eed112e00c4 100644 --- a/include/video.h +++ b/include/video.h -@@ -88,6 +88,11 @@ enum video_format { +@@ -85,6 +85,11 @@ enum video_format { * @fb_size: Frame buffer size * @copy_fb: Copy of the frame buffer to keep up to date; see struct * video_uc_plat @@ -820,7 +820,7 @@ index 4013a949983f..835d7734cb75 100644 * @line_length: Length of each frame buffer line, in bytes. This can be * set by the driver, but if not, the uclass will set it after * probing -@@ -116,6 +121,12 @@ struct video_priv { +@@ -113,6 +118,12 @@ struct video_priv { void *fb; int fb_size; void *copy_fb; @@ -877,10 +877,10 @@ index 4013a949983f..835d7734cb75 100644 * video_is_active() - Test if one video device it active * -- -2.45.2 +2.49.0 -From b84ee524454fbfebd71532532bf2e28ad97ef676 Mon Sep 17 00:00:00 2001 +From c23d99983901910dadf43f2b4d0b833a0a6d6c92 Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Fri, 10 Jun 2022 00:59:16 +0200 Subject: [PATCH 05/13] dm: video: Add damage notification on display fills @@ -899,10 +899,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-6-alpernebiyasak@gma 1 file changed, 4 insertions(+) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index b95f2dbc7703..6906b2b83623 100644 +index da035e5c92b7..1c07613539f2 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -201,6 +201,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, +@@ -214,6 +214,8 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, if (ret) return ret; @@ -911,7 +911,7 @@ index b95f2dbc7703..6906b2b83623 100644 return 0; } -@@ -250,6 +252,8 @@ int video_fill(struct udevice *dev, u32 colour) +@@ -262,6 +264,8 @@ int video_fill(struct udevice *dev, u32 colour) if (ret) return ret; @@ -921,10 +921,10 @@ index b95f2dbc7703..6906b2b83623 100644 } -- -2.45.2 +2.49.0 -From b18a1ef92e2a003771a4a846c592302c1e92bd83 Mon Sep 17 00:00:00 2001 +From bc55519e74270926ee3680002c58fdeb21cd41ce Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Fri, 10 Jun 2022 00:59:17 +0200 Subject: [PATCH 06/13] vidconsole: Add damage notifications to all vidconsole @@ -1112,7 +1112,7 @@ index a3f8c6352f83..f11dc3a0b075 100644 } diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c -index c435162d3f94..6a17f732fc26 100644 +index 17a29817664f..073ddcfb6950 100644 --- a/drivers/video/console_truetype.c +++ b/drivers/video/console_truetype.c @@ -190,6 +190,7 @@ struct console_tt_store { @@ -1172,10 +1172,10 @@ index c435162d3f94..6a17f732fc26 100644 if (ret) return ret; -- -2.45.2 +2.49.0 -From 991d7e646de88fd019059679f659761072412e15 Mon Sep 17 00:00:00 2001 +From e759e3ab52f4373d4f2487d857118b3f0b5998b2 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak <alpernebiyasak@gmail.com> Date: Fri, 18 Aug 2023 17:55:08 +0300 Subject: [PATCH 07/13] video: test: Test video damage tracking via vidconsole @@ -1194,10 +1194,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-8-alpernebiyasak@gma 2 files changed, 57 insertions(+) diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig -index dc5fcdbd1c9e..5e5ad60ee057 100644 +index 861a1f4cd90e..8bf36ff325d8 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig -@@ -319,6 +319,7 @@ CONFIG_USB_ETH_CDC=y +@@ -328,6 +328,7 @@ CONFIG_USB_ETH_CDC=y CONFIG_VIDEO=y CONFIG_VIDEO_FONT_SUN12X22=y CONFIG_VIDEO_COPY=y @@ -1206,13 +1206,13 @@ index dc5fcdbd1c9e..5e5ad60ee057 100644 CONFIG_CONSOLE_TRUETYPE=y CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y diff --git a/test/dm/video.c b/test/dm/video.c -index 4798f2205a99..119c43153165 100644 +index 80e65d66dbaf..e76fa986d359 100644 --- a/test/dm/video.c +++ b/test/dm/video.c @@ -710,3 +710,59 @@ static int dm_test_video_copy(struct unit_test_state *uts) return 0; } - DM_TEST(dm_test_video_copy, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); + DM_TEST(dm_test_video_copy, UTF_SCAN_PDATA | UTF_SCAN_FDT); + +/* Test video damage tracking */ +static int dm_test_video_damage(struct unit_test_state *uts) @@ -1268,12 +1268,12 @@ index 4798f2205a99..119c43153165 100644 + + return 0; +} -+DM_TEST(dm_test_video_damage, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT); ++DM_TEST(dm_test_video_damage, UTF_SCAN_PDATA | UTF_SCAN_FDT); -- -2.45.2 +2.49.0 -From f74688b9828f83306dea8553eafe61b5d81fbbe0 Mon Sep 17 00:00:00 2001 +From aa9d791d839b1004809b4a6cba38cd0bfd3dafa9 Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Fri, 10 Jun 2022 00:59:18 +0200 Subject: [PATCH 08/13] video: Add damage notification on bmp display @@ -1303,10 +1303,10 @@ index ad512d99a1b9..78de95607924 100644 fb = (uchar *)(priv->fb + y * priv->line_length + x * bpix / 8); ret = video_sync_copy(dev, start, fb); -- -2.45.2 +2.49.0 -From 791b0accde45ada93fdf61773f8c7e69b934e55e Mon Sep 17 00:00:00 2001 +From 68262daa712e3202149aa0249bcff233234b6dfa Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Fri, 10 Jun 2022 00:59:19 +0200 Subject: [PATCH 09/13] efi_loader: GOP: Add damage notification on BLT @@ -1326,10 +1326,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-10-alpernebiyasak@gm 1 file changed, 7 insertions(+) diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c -index 41e12fa72460..1694e23dcc62 100644 +index 4593975be5af..3abb47d610e6 100644 --- a/lib/efi_loader/efi_gop.c +++ b/lib/efi_loader/efi_gop.c -@@ -24,6 +24,7 @@ static const efi_guid_t efi_gop_guid = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID; +@@ -26,6 +26,7 @@ static const efi_guid_t efi_gop_guid = EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID; * @ops: graphical output protocol interface * @info: graphical output mode information * @mode: graphical output mode @@ -1337,7 +1337,7 @@ index 41e12fa72460..1694e23dcc62 100644 * @bpix: bits per pixel * @fb: frame buffer */ -@@ -32,6 +33,7 @@ struct efi_gop_obj { +@@ -34,6 +35,7 @@ struct efi_gop_obj { struct efi_gop ops; struct efi_gop_mode_info info; struct efi_gop_mode mode; @@ -1345,7 +1345,7 @@ index 41e12fa72460..1694e23dcc62 100644 /* Fields we only have access to during init */ u32 bpix; void *fb; -@@ -120,6 +122,7 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, +@@ -122,6 +124,7 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, u32 *fb32 = gopobj->fb; u16 *fb16 = gopobj->fb; struct efi_gop_pixel *buffer = __builtin_assume_aligned(bufferp, 4); @@ -1353,7 +1353,7 @@ index 41e12fa72460..1694e23dcc62 100644 if (delta) { /* Check for 4 byte alignment */ -@@ -243,6 +246,9 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, +@@ -245,6 +248,9 @@ static __always_inline efi_status_t gop_blt_int(struct efi_gop *this, dlineoff += dwidth; } @@ -1363,7 +1363,7 @@ index 41e12fa72460..1694e23dcc62 100644 return EFI_SUCCESS; } -@@ -549,6 +555,7 @@ efi_status_t efi_gop_register(void) +@@ -551,6 +557,7 @@ efi_status_t efi_gop_register(void) gopobj->info.pixels_per_scanline = col; gopobj->bpix = bpix; gopobj->fb = map_sysmem(fb_base, fb_size); @@ -1372,10 +1372,10 @@ index 41e12fa72460..1694e23dcc62 100644 return EFI_SUCCESS; } -- -2.45.2 +2.49.0 -From 1b0905d54711c6c170de575a36e66006b8a6583a Mon Sep 17 00:00:00 2001 +From b9d38bb68233d917a84c589b098699bd9ef08d70 Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Fri, 10 Jun 2022 00:59:20 +0200 Subject: [PATCH 10/13] video: Only dcache flush damaged lines @@ -1396,10 +1396,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-11-alpernebiyasak@gm 1 file changed, 38 insertions(+), 5 deletions(-) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index 6906b2b83623..3f6572a124ea 100644 +index 1c07613539f2..2dffcc229f6f 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -384,6 +384,40 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height) +@@ -399,6 +399,40 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height) } #endif @@ -1440,7 +1440,7 @@ index 6906b2b83623..3f6572a124ea 100644 /* Flush video activity to the caches */ int video_sync(struct udevice *vid, bool force) { -@@ -407,11 +441,10 @@ int video_sync(struct udevice *vid, bool force) +@@ -422,11 +456,10 @@ int video_sync(struct udevice *vid, bool force) * out whether it exists? For now, ARM is safe. */ #if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) @@ -1457,10 +1457,10 @@ index 6906b2b83623..3f6572a124ea 100644 sandbox_sdl_sync(priv->fb); #endif -- -2.45.2 +2.49.0 -From 4c02e522cb00b84cfa61004c32b4e5ae28457c58 Mon Sep 17 00:00:00 2001 +From bcb0061c373dca651760928ec6f8e13842b26e55 Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Fri, 10 Jun 2022 00:59:21 +0200 Subject: [PATCH 11/13] video: Use VIDEO_DAMAGE for VIDEO_COPY @@ -1493,20 +1493,20 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-12-alpernebiyasak@gm drivers/video/Kconfig | 5 ++ drivers/video/console_normal.c | 13 +---- drivers/video/console_rotate.c | 44 +++----------- - drivers/video/console_truetype.c | 16 +----- + drivers/video/console_truetype.c | 20 +------ drivers/video/vidconsole-uclass.c | 16 ------ drivers/video/video-uclass.c | 96 ++++++++----------------------- drivers/video/video_bmp.c | 7 --- include/video.h | 37 ------------ include/video_console.h | 52 ----------------- test/dm/video.c | 3 +- - 11 files changed, 43 insertions(+), 247 deletions(-) + 11 files changed, 43 insertions(+), 251 deletions(-) diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig -index 5e5ad60ee057..dc5fcdbd1c9e 100644 +index 8bf36ff325d8..861a1f4cd90e 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig -@@ -319,7 +319,6 @@ CONFIG_USB_ETH_CDC=y +@@ -328,7 +328,6 @@ CONFIG_USB_ETH_CDC=y CONFIG_VIDEO=y CONFIG_VIDEO_FONT_SUN12X22=y CONFIG_VIDEO_COPY=y @@ -1515,7 +1515,7 @@ index 5e5ad60ee057..dc5fcdbd1c9e 100644 CONFIG_CONSOLE_TRUETYPE=y CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index d7da655cea62..d6497819ea73 100644 +index 5d67067891be..964174b01acc 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -89,11 +89,14 @@ config VIDEO_PCI_DEFAULT_FB_SIZE @@ -1729,7 +1729,7 @@ index f11dc3a0b075..886b25dcfafc 100644 return ret; diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c -index 6a17f732fc26..58dcd8e050c3 100644 +index 073ddcfb6950..56c3af3d5aad 100644 --- a/drivers/video/console_truetype.c +++ b/drivers/video/console_truetype.c @@ -194,7 +194,6 @@ static int console_truetype_set_row(struct udevice *dev, uint row, int clr) @@ -1786,11 +1786,29 @@ index 6a17f732fc26..58dcd8e050c3 100644 free(data); return width_frac; +@@ -872,7 +862,6 @@ static int truetype_set_cursor_visible(struct udevice *dev, bool visible, + uint row, width, height, xoff; + void *start, *line; + uint out, val; +- int ret; + + if (xpl_phase() <= PHASE_SPL) + return -ENOSYS; +@@ -962,9 +951,6 @@ static int truetype_set_cursor_visible(struct udevice *dev, bool visible, + + line += vid_priv->line_length; + } +- ret = vidconsole_sync_copy(dev, start, line); +- if (ret) +- return ret; + + return video_sync(vid, true); + } diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c -index 8b2ef51f1b3b..bcc46a08cbbd 100644 +index 8613c464040f..ce6c8bb70cb7 100644 --- a/drivers/video/vidconsole-uclass.c +++ b/drivers/video/vidconsole-uclass.c -@@ -801,22 +801,6 @@ UCLASS_DRIVER(vidconsole) = { +@@ -803,22 +803,6 @@ UCLASS_DRIVER(vidconsole) = { .per_device_auto = sizeof(struct vidconsole_priv), }; @@ -1814,10 +1832,10 @@ index 8b2ef51f1b3b..bcc46a08cbbd 100644 { int ret; diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index 3f6572a124ea..845db1c9b6d3 100644 +index 2dffcc229f6f..eeee5d960838 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -158,7 +158,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, +@@ -171,7 +171,7 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, struct video_priv *priv = dev_get_uclass_priv(dev); void *start, *line; int pixels = xend - xstart; @@ -1826,7 +1844,7 @@ index 3f6572a124ea..845db1c9b6d3 100644 start = priv->fb + ystart * priv->line_length; start += xstart * VNBYTES(priv->bpix); -@@ -197,9 +197,6 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, +@@ -210,9 +210,6 @@ int video_fill_part(struct udevice *dev, int xstart, int ystart, int xend, } line += priv->line_length; } @@ -1836,7 +1854,7 @@ index 3f6572a124ea..845db1c9b6d3 100644 video_damage(dev, xstart, ystart, xend - xstart, yend - ystart); -@@ -223,7 +220,6 @@ int video_reserve_from_bloblist(struct video_handoff *ho) +@@ -235,7 +232,6 @@ int video_reserve_from_bloblist(struct video_handoff *ho) int video_fill(struct udevice *dev, u32 colour) { struct video_priv *priv = dev_get_uclass_priv(dev); @@ -1844,7 +1862,7 @@ index 3f6572a124ea..845db1c9b6d3 100644 switch (priv->bpix) { case VIDEO_BPP16: -@@ -248,9 +244,6 @@ int video_fill(struct udevice *dev, u32 colour) +@@ -260,9 +256,6 @@ int video_fill(struct udevice *dev, u32 colour) memset(priv->fb, colour, priv->fb_size); break; } @@ -1854,7 +1872,7 @@ index 3f6572a124ea..845db1c9b6d3 100644 video_damage(dev, 0, 0, priv->xsize, priv->ysize); -@@ -418,6 +411,27 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy) +@@ -433,6 +426,27 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy) } #endif @@ -1882,7 +1900,7 @@ index 3f6572a124ea..845db1c9b6d3 100644 /* Flush video activity to the caches */ int video_sync(struct udevice *vid, bool force) { -@@ -425,6 +439,9 @@ int video_sync(struct udevice *vid, bool force) +@@ -440,6 +454,9 @@ int video_sync(struct udevice *vid, bool force) struct video_ops *ops = video_get_ops(vid); int ret; @@ -1892,7 +1910,7 @@ index 3f6572a124ea..845db1c9b6d3 100644 if (ops && ops->video_sync) { ret = ops->video_sync(vid); if (ret) -@@ -508,69 +525,6 @@ int video_get_ysize(struct udevice *dev) +@@ -523,69 +540,6 @@ int video_get_ysize(struct udevice *dev) return priv->ysize; } @@ -1987,7 +2005,7 @@ index 78de95607924..1f267d45812c 100644 return video_sync(dev, false); } diff --git a/include/video.h b/include/video.h -index 835d7734cb75..705076facfb5 100644 +index 7eed112e00c4..2fe2f73a865b 100644 --- a/include/video.h +++ b/include/video.h @@ -355,43 +355,6 @@ void video_set_default_colors(struct udevice *dev, bool invert); @@ -2035,10 +2053,10 @@ index 835d7734cb75..705076facfb5 100644 /** * video_damage() - Notify the video subsystem about screen updates. diff --git a/include/video_console.h b/include/video_console.h -index 00c5ecb664b9..ead0e05e4003 100644 +index 17a9aa3f9295..b228c725fd80 100644 --- a/include/video_console.h +++ b/include/video_console.h -@@ -530,56 +530,4 @@ void vidconsole_list_fonts(struct udevice *dev); +@@ -538,56 +538,4 @@ void vidconsole_list_fonts(struct udevice *dev); */ int vidconsole_get_font_size(struct udevice *dev, const char **name, uint *sizep); @@ -2096,7 +2114,7 @@ index 00c5ecb664b9..ead0e05e4003 100644 - #endif diff --git a/test/dm/video.c b/test/dm/video.c -index 119c43153165..9b7bb51a3dd9 100644 +index e76fa986d359..021f4b3fa733 100644 --- a/test/dm/video.c +++ b/test/dm/video.c @@ -105,6 +105,7 @@ static int check_copy_frame_buffer(struct unit_test_state *uts, @@ -2117,10 +2135,10 @@ index 119c43153165..9b7bb51a3dd9 100644 return 0; } -- -2.45.2 +2.49.0 -From 174b8b118c02e7cadf9ad56462b481c91f4a3343 Mon Sep 17 00:00:00 2001 +From 631692ed7090a8cfd0b2a3b3f23c295644f1393e Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Tue, 3 Jan 2023 22:50:03 +0100 Subject: [PATCH 12/13] video: Always compile cache flushing code @@ -2145,10 +2163,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-13-alpernebiyasak@gm 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c -index 845db1c9b6d3..5416e0d9030b 100644 +index eeee5d960838..6c5a86d85dbc 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c -@@ -383,6 +383,9 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy) +@@ -398,6 +398,9 @@ static void video_flush_dcache(struct udevice *vid, bool use_copy) struct video_priv *priv = dev_get_uclass_priv(vid); ulong fb = use_copy ? (ulong)priv->copy_fb : (ulong)priv->fb; @@ -2158,7 +2176,7 @@ index 845db1c9b6d3..5416e0d9030b 100644 if (!priv->flush_dcache) return; -@@ -452,17 +455,12 @@ int video_sync(struct udevice *vid, bool force) +@@ -467,17 +470,12 @@ int video_sync(struct udevice *vid, bool force) get_timer(priv->last_sync) < CONFIG_VIDEO_SYNC_MS) return 0; @@ -2179,10 +2197,10 @@ index 845db1c9b6d3..5416e0d9030b 100644 #endif priv->last_sync = get_timer(0); -- -2.45.2 +2.49.0 -From 2a1af00665464023c38903eeb75a0c89099892fb Mon Sep 17 00:00:00 2001 +From 08f3add44c202053f5ba882cb2f440e8e470229c Mon Sep 17 00:00:00 2001 From: Alexander Graf <agraf@csgraf.de> Date: Tue, 3 Jan 2023 22:50:04 +0100 Subject: [PATCH 13/13] video: Enable VIDEO_DAMAGE for drivers that need it @@ -2214,10 +2232,10 @@ Link: https://lore.kernel.org/u-boot/20230821135111.3558478-14-alpernebiyasak@gm 9 files changed, 16 insertions(+) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig -index 17666814c52e..1ba0d2c1c8d7 100644 +index ba1b15414379..bb1ea961704e 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig -@@ -863,6 +863,7 @@ config VIDEO_SUNXI +@@ -882,6 +882,7 @@ config VIDEO_SUNXI depends on !SUNXI_GEN_NCAT2 select VIDEO select DISPLAY @@ -2226,7 +2244,7 @@ index 17666814c52e..1ba0d2c1c8d7 100644 default y ---help--- diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig -index d6497819ea73..8fb69e0b16c2 100644 +index 964174b01acc..6e1577ae6871 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -534,6 +534,7 @@ config VIDEO_LCD_ANX9804 @@ -2245,7 +2263,7 @@ index d6497819ea73..8fb69e0b16c2 100644 help The graphics processor already sets up the display so this driver simply checks the resolution and then sets up the frame buffer with -@@ -706,6 +708,7 @@ source "drivers/video/meson/Kconfig" +@@ -715,6 +717,7 @@ source "drivers/video/meson/Kconfig" config VIDEO_MVEBU bool "Armada XP LCD controller" @@ -2253,7 +2271,7 @@ index d6497819ea73..8fb69e0b16c2 100644 ---help--- Support for the LCD controller integrated in the Marvell Armada XP SoC. -@@ -740,6 +743,7 @@ config NXP_TDA19988 +@@ -749,6 +752,7 @@ config NXP_TDA19988 config ATMEL_HLCD bool "Enable ATMEL video support using HLCDC" @@ -2261,7 +2279,7 @@ index d6497819ea73..8fb69e0b16c2 100644 help HLCDC supports video output to an attached LCD panel. -@@ -816,6 +820,7 @@ source "drivers/video/tidss/Kconfig" +@@ -825,6 +829,7 @@ source "drivers/video/tidss/Kconfig" config VIDEO_TEGRA124 bool "Enable video support on Tegra124" @@ -2269,7 +2287,7 @@ index d6497819ea73..8fb69e0b16c2 100644 help Tegra124 supports many video output options including eDP and HDMI. At present only eDP is supported by U-Boot. This option -@@ -830,6 +835,7 @@ source "drivers/video/imx/Kconfig" +@@ -839,6 +844,7 @@ source "drivers/video/imx/Kconfig" config VIDEO_MXS bool "Enable video support on i.MX28/i.MX6UL/i.MX7 SoCs" @@ -2277,7 +2295,7 @@ index d6497819ea73..8fb69e0b16c2 100644 help Enable framebuffer driver for i.MX28/i.MX6UL/i.MX7 processors -@@ -892,6 +898,7 @@ config VIDEO_DW_MIPI_DSI +@@ -901,6 +907,7 @@ config VIDEO_DW_MIPI_DSI config VIDEO_SIMPLE bool "Simple display driver for preconfigured display" @@ -2285,7 +2303,7 @@ index d6497819ea73..8fb69e0b16c2 100644 help Enables a simple generic display driver which utilizes the simple-framebuffer devicetree bindings. -@@ -910,6 +917,7 @@ config VIDEO_DT_SIMPLEFB +@@ -919,6 +926,7 @@ config VIDEO_DT_SIMPLEFB config VIDEO_MCDE_SIMPLE bool "Simple driver for ST-Ericsson MCDE with preconfigured display" @@ -2377,5 +2395,5 @@ index 95086f3a5d66..3291b3ceb8d5 100644 TIDSS supports video output options LVDS and DPI . This option enables these supports which can be used on -- -2.45.2 +2.49.0 diff --git a/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch b/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch index fc3dea4d..5307f378 100644 --- a/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch +++ b/config/u-boot/default/patches/0004-HACK-Makefile-Ignore-missing-input-files-for-binman.patch @@ -1,4 +1,4 @@ -From ec8f5b8e949995eb34b7e54b9f06894eb38d02b4 Mon Sep 17 00:00:00 2001 +From faa87ed4d2ff07e9e8cc98cd08cbb34c905c1ac6 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak <alpernebiyasak@gmail.com> Date: Wed, 10 Jul 2024 17:37:56 +0300 Subject: [PATCH] HACK: Makefile: Ignore missing input files for binman images @@ -17,18 +17,18 @@ Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile -index 34dd029d0cda..d5d89bd2e35c 100644 +index a7593e8a1680..30deb760bf8f 100644 --- a/Makefile +++ b/Makefile -@@ -1375,7 +1375,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \ - --toolpath $(objtree)/tools \ +@@ -1410,7 +1410,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \ $(if $(BINMAN_VERBOSE),-v$(BINMAN_VERBOSE)) \ - build -u -d u-boot.dtb -O . -m \ -- --allow-missing $(if $(BINMAN_ALLOW_MISSING),--ignore-missing) \ -+ --allow-missing --ignore-missing \ + build -u -d $(binman_dtb) -O . -m \ + --allow-missing --fake-ext-blobs \ +- $(if $(BINMAN_ALLOW_MISSING),--ignore-missing) \ ++ --ignore-missing \ -I . -I $(srctree) -I $(srctree)/board/$(BOARDDIR) \ - -I $(dt_dir) -a of-list=$(CONFIG_OF_LIST) \ + $(foreach f,$(of_list_dirs),-I $(f)) -a of-list=$(of_list) \ $(foreach f,$(BINMAN_INDIRS),-I $(f)) \ -- -2.45.2 +2.49.0 diff --git a/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch b/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch index 45a6ab4a..018da338 100644 --- a/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch +++ b/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch @@ -1,4 +1,4 @@ -From 9685041c19bcc61ca847a59e93c716d23df51898 Mon Sep 17 00:00:00 2001 +From d02163324baeb817ed55df41fac863cab4be038c Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak <alpernebiyasak@gmail.com> Date: Wed, 10 Jul 2024 14:32:19 +0300 Subject: [PATCH] HACK: rk3399: gru: Remove assigned clock dt properties for @@ -18,7 +18,7 @@ Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> 1 file changed, 3 insertions(+) diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi -index 6bdc892bd913..f4457c1b9b48 100644 +index 5517176aa4a0..9f40cf1e0208 100644 --- a/arch/arm/dts/rk3399-gru-u-boot.dtsi +++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi @@ -27,6 +27,9 @@ &cros_ec { @@ -30,7 +30,7 @@ index 6bdc892bd913..f4457c1b9b48 100644 + /delete-property/ assigned-clock-rates; }; - &pp1800_audio { + &emmc_phy { -- -2.45.2 +2.49.0 diff --git a/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch index 53a9b90d..8a09fa7d 100644 --- a/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch +++ b/config/u-boot/default/patches/0007-Libreboot-branding-version-on-the-bootflow-menu.patch @@ -18,7 +18,7 @@ index 84831915a2..8e26ec2aef 100644 ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100); ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE, - "U-Boot - Boot Menu", NULL); -+ "Libreboot 20241206 release (U-Boot Menu) https://libreboot.org/", NULL); ++ "Libreboot 25.06 Luminous Lemon (U-Boot menu): https://libreboot.org/", NULL); ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT); logo = video_get_u_boot_logo(); diff --git a/config/u-boot/default/patches/0008-change-the-logo-back-to-the-plain-libreboot-one.patch b/config/u-boot/default/patches/0008-change-the-logo-back-to-the-plain-libreboot-one.patch deleted file mode 100644 index febc2372..00000000 --- a/config/u-boot/default/patches/0008-change-the-logo-back-to-the-plain-libreboot-one.patch +++ /dev/null @@ -1,157 +0,0 @@ -From d721edb391618fca096ec7f63a2fbc9df0af9231 Mon Sep 17 00:00:00 2001 -From: Leah Rowe <info@minifree.org> -Date: Tue, 17 Dec 2024 12:59:54 +0000 -Subject: [PATCH 1/1] change the logo back to the plain libreboot one - -Signed-off-by: Leah Rowe <info@minifree.org> ---- - drivers/video/u_boot_logo.bmp | Bin 27350 -> 27350 bytes - 1 file changed, 0 insertions(+), 0 deletions(-) - -diff --git a/drivers/video/u_boot_logo.bmp b/drivers/video/u_boot_logo.bmp -index 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b/config/u-boot/default/patches/0009-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch deleted file mode 100644 index 905b311c..00000000 --- a/config/u-boot/default/patches/0009-scripts-dtc-pylibfdt-libfdt.i_shipped-Use-SWIG_Appen.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 3c61a3257ad5799202cac64020d3b4af21b72de3 Mon Sep 17 00:00:00 2001 -From: Markus Volk <f_l_k@t-online.de> -Date: Wed, 30 Oct 2024 06:07:16 +0100 -Subject: [PATCH 1/1] scripts/dtc/pylibfdt/libfdt.i_shipped: Use - SWIG_AppendOutput -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Swig has changed language specific AppendOutput functions. The helper -macro SWIG_AppendOutput remains unchanged. Use that instead -of SWIG_Python_AppendOutput, which would require an extra parameter -since swig 4.3.0. - -/home/flk/poky/build-test/tmp/work/qemux86_64-poky-linux/u-boot/2024.10/git/arch/x86/cpu/u-boot-64.lds -| scripts/dtc/pylibfdt/libfdt_wrap.c: In function ‘_wrap_fdt_next_node’: -| scripts/dtc/pylibfdt/libfdt_wrap.c:5581:17: error: too few arguments to function ‘SWIG_Python_AppendOutput’ -| 5581 | resultobj = SWIG_Python_AppendOutput(resultobj, val); -| | ^~~~~~~~~~~~~~~~~~~~~~~~ - -Signed-off-by: Markus Volk <f_l_k@t-online.de> -Reported-by: Rudi Heitbaum <rudi@heitbaum.com> -Link: https://github.com/dgibson/dtc/pull/154 ---- - scripts/dtc/pylibfdt/libfdt.i_shipped | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - -diff --git a/scripts/dtc/pylibfdt/libfdt.i_shipped b/scripts/dtc/pylibfdt/libfdt.i_shipped -index 56cc5d48f4..e4659489a9 100644 ---- a/scripts/dtc/pylibfdt/libfdt.i_shipped -+++ b/scripts/dtc/pylibfdt/libfdt.i_shipped -@@ -1037,7 +1037,7 @@ typedef uint32_t fdt32_t; - fdt_string(fdt1, fdt32_to_cpu($1->nameoff))); - buff = PyByteArray_FromStringAndSize( - (const char *)($1 + 1), fdt32_to_cpu($1->len)); -- resultobj = SWIG_Python_AppendOutput(resultobj, buff); -+ resultobj = SWIG_AppendOutput(resultobj, buff); - } - } - -@@ -1076,7 +1076,7 @@ typedef uint32_t fdt32_t; - - %typemap(argout) int *depth { - PyObject *val = Py_BuildValue("i", *arg$argnum); -- resultobj = SWIG_Python_AppendOutput(resultobj, val); -+ resultobj = SWIG_AppendOutput(resultobj, val); - } - - %apply int *depth { int *depth }; -@@ -1092,7 +1092,7 @@ typedef uint32_t fdt32_t; - if (PyTuple_GET_SIZE(resultobj) == 0) - resultobj = val; - else -- resultobj = SWIG_Python_AppendOutput(resultobj, val); -+ resultobj = SWIG_AppendOutput(resultobj, val); - } - } - --- -2.39.5 - diff --git a/config/u-boot/default/target.cfg b/config/u-boot/default/target.cfg index c0fb6209..f3c856d4 100644 --- a/config/u-boot/default/target.cfg +++ b/config/u-boot/default/target.cfg @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-3.0-or-later tree="default" -rev="f919c3a889f0ec7d63a48b5d0ed064386b0980bd" # v2024.10 +rev="34820924edbc4ec7803eb89d9852f4b870fa760a" # v2025.04 diff --git a/config/u-boot/gru_bob/config/default b/config/u-boot/gru_bob/config/default index bdd3ee98..f6894b52 100644 --- a/config/u-boot/gru_bob/config/default +++ b/config/u-boot/gru_bob/config/default @@ -1,15 +1,17 @@ # # Automatically generated file; DO NOT EDIT. -# U-Boot 2024.10 Configuration +# U-Boot 2025.04 Configuration # # -# Compiler: gcc (Debian 12.2.0-14) 12.2.0 +# Compiler: gcc (Debian 14.2.0-19) 14.2.0 # CONFIG_CREATE_ARCH_SYMLINK=y +CONFIG_HAVE_SETJMP=y CONFIG_SUPPORT_LITTLE_ENDIAN=y CONFIG_SYS_CACHE_SHIFT_6=y CONFIG_64BIT=y +CONFIG_SPL_64BIT=y CONFIG_SYS_CACHELINE_SIZE=64 CONFIG_LINKER_LIST_ALIGN=8 # CONFIG_ARC is not set @@ -39,10 +41,11 @@ CONFIG_SKIP_LOWLEVEL_INIT=y # CONFIG_TPL_SKIP_LOWLEVEL_INIT is not set # CONFIG_SKIP_LOWLEVEL_INIT_ONLY is not set # CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY is not set +# CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY is not set # CONFIG_SYS_ICACHE_OFF is not set # CONFIG_SPL_SYS_ICACHE_OFF is not set # CONFIG_SYS_DCACHE_OFF is not set -CONFIG_SPL_SYS_DCACHE_OFF=y +# CONFIG_SPL_SYS_DCACHE_OFF is not set # # ARM architecture @@ -51,9 +54,9 @@ CONFIG_ARM64=y CONFIG_ARM64_CRC32=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_POSITION_INDEPENDENT=y -CONFIG_INIT_SP_RELATIVE=y -CONFIG_SYS_INIT_SP_BSS_OFFSET=524288 +# CONFIG_INIT_SP_RELATIVE is not set CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE=0x18000000 +# CONFIG_DRIVER_GICV2 is not set # CONFIG_GIC_V3_ITS is not set # CONFIG_GICV3_SUPPORT_GIC600 is not set CONFIG_STATIC_RELA=y @@ -75,8 +78,10 @@ CONFIG_ARM_SMCCC=y CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y # CONFIG_USE_ARCH_MEMCPY is not set # CONFIG_SPL_USE_ARCH_MEMCPY is not set +# CONFIG_TPL_USE_ARCH_MEMCPY is not set # CONFIG_USE_ARCH_MEMSET is not set # CONFIG_SPL_USE_ARCH_MEMSET is not set +# CONFIG_TPL_USE_ARCH_MEMSET is not set CONFIG_ARM64_SUPPORT_AARCH32=y # CONFIG_ARCH_AT91 is not set # CONFIG_ARCH_DAVINCI is not set @@ -100,6 +105,7 @@ CONFIG_ARM64_SUPPORT_AARCH32=y # CONFIG_ARCH_OMAP2PLUS is not set # CONFIG_ARCH_MESON is not set # CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MMP is not set # CONFIG_ARCH_LPC32XX is not set # CONFIG_ARCH_IMX8 is not set # CONFIG_ARCH_IMX8M is not set @@ -183,23 +189,25 @@ CONFIG_ARCH_ROCKCHIP=y # CONFIG_TARGET_PRESIDIO_ASIC is not set # CONFIG_TARGET_XENGUEST_ARM64 is not set # CONFIG_ARCH_GXP is not set -# CONFIG_STATIC_MACH_TYPE is not set CONFIG_TEXT_BASE=0x18000000 CONFIG_SYS_MALLOC_LEN=0x2000000 -CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_SYS_MALLOC_F_LEN=0x10000 +CONFIG_BLOBLIST_SIZE_RELOC=0x1000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL_LDSCRIPT="arch/arm/cpu/armv8/u-boot-spl.lds" CONFIG_ENV_SOURCE_FILE="" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x3f00000 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_ENV_SIZE=0x1f000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-bob" -CONFIG_SPL_TEXT_BASE=0xff8c2000 +CONFIG_DDR_SI_TEST=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000 CONFIG_DM_RESET=y @@ -221,16 +229,20 @@ CONFIG_ROCKCHIP_RK3399=y # CONFIG_ROCKCHIP_RV1126 is not set # CONFIG_ROCKCHIP_USB_UART is not set # CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set +CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_ROCKCHIP_COMMON_BOARD=y CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y # CONFIG_ROCKCHIP_EXTERNAL_TPL is not set CONFIG_ROCKCHIP_BOOT_MODE_REG=0 # CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON is not set CONFIG_ROCKCHIP_STIMER=y CONFIG_ROCKCHIP_STIMER_BASE=0xff8680a0 -CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 +CONFIG_ROCKCHIP_BROM_HELPER=y # CONFIG_SPL_ROCKCHIP_EARLYRETURN_TO_BROM is not set CONFIG_ROCKCHIP_DISABLE_FORCE_JTAG=y +# CONFIG_TPL_ROCKCHIP_EARLYRETURN_TO_BROM is not set # CONFIG_SPL_MMC is not set CONFIG_ROCKCHIP_SPI_IMAGE=y CONFIG_ROCKCHIP_COMMON_STACK_ADDR=y @@ -238,8 +250,12 @@ CONFIG_SPL_SERIAL=y CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds" CONFIG_TPL_TEXT_BASE=0xff8c2000 CONFIG_TPL_STACK=0xff8effff +CONFIG_TPL_SYS_MALLOC_F_LEN=0x4000 +CONFIG_TPL_LIBCOMMON_SUPPORT=y +CONFIG_TPL_LIBGENERIC_SUPPORT=y +CONFIG_TPL_SERIAL=y # CONFIG_SPL_DRIVERS_MISC is not set -CONFIG_SPL_STACK_R_ADDR=0x04000000 +CONFIG_SPL_STACK_R_ADDR=0x3e00000 CONFIG_TARGET_CHROMEBOOK_BOB=y # CONFIG_TARGET_CHROMEBOOK_KEVIN is not set # CONFIG_TARGET_EVB_RK3399 is not set @@ -250,14 +266,20 @@ CONFIG_TARGET_CHROMEBOOK_BOB=y # CONFIG_TARGET_ROCKPI4_RK3399 is not set # CONFIG_TARGET_ROCKPRO64_RK3399 is not set # CONFIG_TARGET_ROC_PC_RK3399 is not set -CONFIG_SPL_STACK=0xff8effff -CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 +CONFIG_TPL_SYS_MALLOC_F=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL_TEXT_BASE=0x0 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xff8e0000 -CONFIG_SPL_BSS_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_START_ADDR=0x3f80000 +CONFIG_SPL_BSS_MAX_SIZE=0x8000 CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 +CONFIG_SYS_BOOTM_LEN=0x4000000 +CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 +CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff +CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SF_DEFAULT_CS=0 CONFIG_SPL_SYS_MALLOC_F=y CONFIG_ERR_PTR_OFFSET=0x0 CONFIG_SPL_SIZE_LIMIT=0x0 @@ -293,24 +315,18 @@ CONFIG_PSCI_RESET=y CONFIG_ARMV8_CRYPTO=y CONFIG_ARMV8_CE_SHA1=y CONFIG_ARMV8_CE_SHA256=y -# CONFIG_CMD_DEKBLOB is not set -# CONFIG_IMX_CAAM_DEK_ENCAP is not set -# CONFIG_IMX_OPTEE_DEK_ENCAP is not set -# CONFIG_IMX_SECO_DEK_ENCAP is not set -# CONFIG_IMX_ELE_DEK_ENCAP is not set -# CONFIG_CMD_HDMIDETECT is not set -CONFIG_IMX_DCD_ADDR=0x00910000 CONFIG_SYS_MEM_TOP_HIDE=0x0 -CONFIG_SYS_LOAD_ADDR=0x800800 # # ARM debug # -CONFIG_SPL_PAYLOAD="u-boot.bin" +CONFIG_TPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAYLOAD="tpl/u-boot-with-tpl.bin" CONFIG_BUILD_TARGET="" # CONFIG_PCI is not set CONFIG_FWU_NUM_BANKS=2 CONFIG_FWU_NUM_IMAGES_PER_BANK=2 +CONFIG_TPL_SIZE_LIMIT=0x0 CONFIG_DEBUG_UART=y # CONFIG_AHCI is not set # CONFIG_OF_BOARD_FIXUP is not set @@ -327,7 +343,7 @@ CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=120200 +CONFIG_GCC_VERSION=140200 CONFIG_CLANG_VERSION=0 CONFIG_CC_OPTIMIZE_FOR_SIZE=y # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set @@ -336,6 +352,7 @@ CONFIG_CC_OPTIMIZE_FOR_SIZE=y # CONFIG_SPL_OPTIMIZE_INLINING is not set CONFIG_ARCH_SUPPORTS_LTO=y # CONFIG_LTO is not set +# CONFIG_TPL_OPTIMIZE_INLINING is not set CONFIG_CC_HAS_ASM_INLINE=y # CONFIG_XEN is not set CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -357,8 +374,6 @@ CONFIG_REMAKE_ELF=y # CONFIG_SYS_CUSTOM_LDSCRIPT is not set CONFIG_PLATFORM_ELFENTRY="_start" CONFIG_STACK_SIZE=0x1000000 -CONFIG_SYS_SRAM_BASE=0x0 -CONFIG_SYS_SRAM_SIZE=0x0 # CONFIG_MP is not set CONFIG_HAVE_TEXT_BASE=y # CONFIG_HAVE_SYS_UBOOT_START is not set @@ -371,6 +386,63 @@ CONFIG_SYS_UBOOT_START=0x18000000 # # +# UEFI Support +# +CONFIG_EFI_LOADER=y +CONFIG_EFI_BINARY_EXEC=y +# CONFIG_EFI_SECURE_BOOT is not set + +# +# UEFI services +# +CONFIG_EFI_HAVE_RUNTIME_RESET=y + +# +# UEFI Variables +# +# CONFIG_EFI_VARIABLE_FILE_STORE is not set +CONFIG_EFI_VARIABLE_NO_STORE=y +# CONFIG_EFI_VARIABLES_PRESEED is not set +CONFIG_EFI_VAR_BUF_SIZE=131072 +CONFIG_EFI_PLATFORM_LANG_CODES="en-US" + +# +# Capsule support +# +# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set +# CONFIG_EFI_CAPSULE_ON_DISK is not set +CONFIG_EFI_CAPSULE_MAX=15 + +# +# UEFI protocol support +# +CONFIG_EFI_DEVICE_PATH_TO_TEXT=y +CONFIG_EFI_DEVICE_PATH_UTIL=y +CONFIG_EFI_DT_FIXUP=y +CONFIG_EFI_LOADER_HII=y +CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y +CONFIG_EFI_UNICODE_CAPITALIZATION=y +CONFIG_EFI_RNG_PROTOCOL=y +CONFIG_EFI_LOAD_FILE2_INITRD=y +# CONFIG_EFI_IP4_CONFIG2_PROTOCOL is not set + +# +# Misc options +# +# CONFIG_EFI_LOADER_BOUNCE_BUFFER is not set +CONFIG_EFI_ECPT=y +CONFIG_EFI_EBBR_2_1_CONFORMANCE=y +# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set + +# +# EFI bootmanager +# +CONFIG_EFI_BOOTMGR=y +# CONFIG_EFI_HTTP_BOOT is not set +CONFIG_BOOTEFI_HELLO_COMPILE=y +CONFIG_BOOTEFI_TESTAPP_COMPILE=y + +# # Boot images # # CONFIG_ANDROID_BOOT_IMAGE is not set @@ -378,22 +450,26 @@ CONFIG_SYS_UBOOT_START=0x18000000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x0 CONFIG_FIT_FULL_CHECK=y -# CONFIG_FIT_SIGNATURE is not set +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_SIGNATURE_MAX_SIZE=0x10000000 +# CONFIG_FIT_RSASSA_PSS is not set # CONFIG_FIT_CIPHER is not set # CONFIG_FIT_VERBOSE is not set # CONFIG_FIT_BEST_MATCH is not set CONFIG_FIT_PRINT=y CONFIG_SPL_FIT=y +# CONFIG_TPL_FIT is not set # CONFIG_SPL_FIT_PRINT is not set -# CONFIG_SPL_FIT_FULL_CHECK is not set -# CONFIG_SPL_FIT_SIGNATURE is not set +CONFIG_SPL_FIT_FULL_CHECK=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_FIT_SIGNATURE_MAX_SIZE=0x10000000 +# CONFIG_SPL_FIT_RSASSA_PSS is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x0 # CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY is not set # CONFIG_SPL_LOAD_FIT_FULL is not set +# CONFIG_TPL_LOAD_FIT is not set # CONFIG_SPL_FIT_IMAGE_POST_PROCESS is not set -CONFIG_SPL_FIT_SOURCE="" -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_PXE_UTILS=y CONFIG_BOOT_DEFAULTS_FEATURES=y CONFIG_BOOT_DEFAULTS_CMDS=y @@ -403,6 +479,7 @@ CONFIG_BOOTSTD=y CONFIG_BOOTSTD_FULL=y CONFIG_BOOTSTD_DEFAULTS=y CONFIG_BOOTSTD_BOOTCOMMAND=y +CONFIG_BOOTSTD_MENU=y CONFIG_BOOTMETH_GLOBAL=y # CONFIG_BOOTMETH_ANDROID is not set # CONFIG_BOOTMETH_CROS is not set @@ -413,15 +490,17 @@ CONFIG_BOOTMETH_EFI_BOOTMGR=y CONFIG_BOOTMETH_VBE=y CONFIG_BOOTMETH_DISTRO=y # CONFIG_SPL_BOOTMETH_VBE is not set +CONFIG_TPL_BOOTMETH_VBE=y CONFIG_BOOTMETH_VBE_REQUEST=y # CONFIG_SPL_BOOTMETH_VBE_REQUEST is not set CONFIG_BOOTMETH_VBE_SIMPLE=y +# CONFIG_BOOTMETH_VBE_ABREC is not set CONFIG_BOOTMETH_VBE_SIMPLE_OS=y # CONFIG_SPL_BOOTMETH_VBE_SIMPLE is not set CONFIG_EXPO=y CONFIG_BOOTMETH_SCRIPT=y +# CONFIG_UPL is not set CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_CHROMEOS is not set # CONFIG_CHROMEOS_VBOOT is not set @@ -498,6 +577,7 @@ CONFIG_SYS_PBSIZE=1044 # CONFIG_DISABLE_CONSOLE is not set CONFIG_LOGLEVEL=4 CONFIG_SPL_LOGLEVEL=4 +CONFIG_TPL_LOGLEVEL=4 # CONFIG_SILENT_CONSOLE is not set # CONFIG_SPL_SILENT_CONSOLE is not set # CONFIG_TPL_SILENT_CONSOLE is not set @@ -526,6 +606,7 @@ CONFIG_LOG_CONSOLE=y CONFIG_LOGF_FUNC_PAD=20 # CONFIG_LOG_SYSLOG is not set # CONFIG_SPL_LOG is not set +# CONFIG_TPL_LOG is not set # CONFIG_LOG_ERROR_RETURN is not set # @@ -562,6 +643,7 @@ CONFIG_MISC_INIT_R=y # Security support # CONFIG_HASH=y +# CONFIG_HASH_CRC8 is not set CONFIG_SPL_HASH=y # CONFIG_STACKPROTECTOR is not set # CONFIG_BOARD_RNG_SEED is not set @@ -577,11 +659,11 @@ CONFIG_SPL_HASH=y # CONFIG_BLOBLIST=y CONFIG_SPL_BLOBLIST=y +# CONFIG_TPL_BLOBLIST is not set CONFIG_BLOBLIST_FIXED=y # CONFIG_BLOBLIST_ALLOC is not set CONFIG_BLOBLIST_ADDR=0x100000 CONFIG_BLOBLIST_SIZE=0x1000 -CONFIG_BLOBLIST_SIZE_RELOC=0x1000 CONFIG_SPL_BLOBLIST_FIXED=y # CONFIG_SPL_BLOBLIST_ALLOC is not set CONFIG_SUPPORT_SPL=y @@ -592,7 +674,7 @@ CONFIG_SUPPORT_TPL=y # CONFIG_SPL_FRAMEWORK=y # CONFIG_SPL_FRAMEWORK_BOARD_INIT_F is not set -CONFIG_SPL_MAX_SIZE=0x1e000 +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_NO_BSS_LIMIT is not set CONFIG_SPL_BSS_LIMIT=y @@ -606,24 +688,27 @@ CONFIG_HANDOFF=y CONFIG_SPL_HANDOFF=y # CONFIG_SPL_SOC_INIT is not set CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_LOAD_BLOCK=y # CONFIG_SPL_BOOTROM_SUPPORT is not set # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set # CONFIG_SPL_LOAD_IMX_CONTAINER is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_SHARES_INIT_SP_ADDR=y CONFIG_SPL_SEPARATE_BSS=y # CONFIG_SPL_SYS_MALLOC is not set CONFIG_SPL_BANNER_PRINT=y # CONFIG_SPL_DISPLAY_PRINT is not set +CONFIG_SPL_SYS_MMCSD_RAW_MODE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x0 -# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set # CONFIG_SPL_FIT_IMAGE_TINY is not set # CONFIG_SPL_CACHE is not set # CONFIG_SPL_CPU is not set -# CONFIG_SPL_CRYPTO is not set +CONFIG_SPL_CRYPTO=y # CONFIG_SPL_DMA is not set # CONFIG_SPL_ENV_SUPPORT is not set # CONFIG_SPL_FS_EXT4 is not set @@ -640,6 +725,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x0 # CONFIG_SPL_NAND_DRIVERS is not set # CONFIG_SPL_NAND_ECC is not set # CONFIG_SPL_NAND_SIMPLE is not set +# CONFIG_SPL_RELOC_LOADER is not set # CONFIG_SPL_UBI is not set CONFIG_SPL_DM_SPI_FLASH=y # CONFIG_SPL_NET is not set @@ -653,7 +739,7 @@ CONFIG_SPL_DM_SPI_FLASH=y # CONFIG_SPL_DM_RESET is not set # CONFIG_SPL_POWER is not set # CONFIG_SPL_POWER_DOMAIN is not set -# CONFIG_SPL_RAM_SUPPORT is not set +# CONFIG_SPL_RAM_DEVICE is not set # CONFIG_SPL_REMOTEPROC is not set # CONFIG_SPL_RTC is not set # CONFIG_SPL_SATA is not set @@ -661,7 +747,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_FLASH_TINY=y # CONFIG_SPL_SPI_FLASH_MTD is not set CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000 # CONFIG_SPL_THERMAL is not set # CONFIG_SPL_WATCHDOG is not set # CONFIG_SPL_YMODEM_SUPPORT is not set @@ -670,8 +756,42 @@ CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y # CONFIG_SPL_OPTEE_IMAGE is not set CONFIG_SPL_TARGET="" -# CONFIG_TPL is not set +CONFIG_TPL=y + +# +# TPL configuration options +# +CONFIG_TPL_BINMAN_SYMBOLS=y +CONFIG_TPL_BINMAN_UBOOT_SYMBOLS=y +CONFIG_TPL_FRAMEWORK=y +CONFIG_TPL_BANNER_PRINT=y +# CONFIG_TPL_BOARD_INIT is not set +CONFIG_TPL_SYS_MALLOC_SIMPLE=y +CONFIG_TPL_SEPARATE_BSS=y +CONFIG_TPL_NEEDS_SEPARATE_STACK=y +# CONFIG_TPL_POWER is not set +CONFIG_TPL_BOOTROM_SUPPORT=y +# CONFIG_TPL_CRC32 is not set +# CONFIG_TPL_DRIVERS_MISC is not set +# CONFIG_TPL_ENV_SUPPORT is not set +CONFIG_TPL_GPIO=y +# CONFIG_TPL_I2C is not set +# CONFIG_TPL_MPC8XXX_INIT_DDR is not set +# CONFIG_TPL_MMC is not set +# CONFIG_TPL_NAND_SUPPORT is not set +# CONFIG_TPL_PCI is not set +# CONFIG_TPL_PCH is not set +# CONFIG_TPL_RAM_SUPPORT is not set +# CONFIG_TPL_RELOC_LOADER is not set +# CONFIG_TPL_RTC is not set +# CONFIG_TPL_SPI_FLASH_SUPPORT is not set +# CONFIG_TPL_SPI is not set +# CONFIG_TPL_DM_SPI is not set +# CONFIG_TPL_DM_SPI_FLASH is not set +# CONFIG_TPL_YMODEM_SUPPORT is not set # CONFIG_VPL is not set +CONFIG_IMAGE_SIGN_INFO=y +CONFIG_SPL_IMAGE_SIGN_INFO=y CONFIG_CMDLINE=y CONFIG_HUSH_PARSER=y @@ -700,6 +820,7 @@ CONFIG_CMD_BDI=y # CONFIG_CMD_BDINFO_EXTRA is not set # CONFIG_CMD_CONFIG is not set CONFIG_CMD_CONSOLE=y +# CONFIG_CMD_UFETCH is not set # CONFIG_CMD_HISTORY is not set # CONFIG_CMD_LICENSE is not set # CONFIG_CMD_PMC is not set @@ -715,6 +836,7 @@ CONFIG_CMD_BOOTFLOW=y CONFIG_CMD_BOOTFLOW_FULL=y CONFIG_CMD_BOOTFLOW_BOOTDELAY=8 CONFIG_CMD_BOOTMETH=y +CONFIG_CMD_BOOTSTD=y CONFIG_BOOTM_EFI=y CONFIG_BOOTM_ELF=y CONFIG_CMD_BOOTZ=y @@ -725,17 +847,18 @@ CONFIG_BOOTM_NETBSD=y # CONFIG_BOOTM_OSE is not set CONFIG_BOOTM_PLAN9=y CONFIG_BOOTM_RTEMS=y +# CONFIG_CMD_UPL is not set CONFIG_CMD_VBE=y CONFIG_BOOTM_VXWORKS=y CONFIG_CMD_BOOTEFI=y CONFIG_CMD_BOOTEFI_BINARY=y CONFIG_CMD_BOOTEFI_BOOTMGR=y -CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y CONFIG_CMD_BOOTEFI_HELLO=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ADTIMG is not set CONFIG_CMD_ELF=y +CONFIG_CMD_ELF_BOOTVX=y # CONFIG_CMD_ELF_FDT_SETUP is not set CONFIG_CMD_FDT=y CONFIG_CMD_GO=y @@ -826,10 +949,10 @@ CONFIG_CMD_MMC=y # CONFIG_CMD_BKOPS_ENABLE is not set # CONFIG_CMD_MMC_REG is not set # CONFIG_CMD_MMC_SWRITE is not set +CONFIG_MMC_SPEED_MODE_SET=y # CONFIG_CMD_CLONE is not set # CONFIG_CMD_MTD is not set # CONFIG_CMD_ONENAND is not set -# CONFIG_CMD_OSD is not set CONFIG_CMD_PART=y # CONFIG_CMD_PCI is not set CONFIG_CMD_PINMUX=y @@ -843,7 +966,6 @@ CONFIG_CMD_SPI=y CONFIG_DEFAULT_SPI_BUS=0 CONFIG_DEFAULT_SPI_MODE=0x0 CONFIG_CMD_USB=y -# CONFIG_CMD_USB_SDP is not set # CONFIG_CMD_RKMTD is not set # CONFIG_CMD_WRITE is not set @@ -856,13 +978,8 @@ CONFIG_CMD_ITEST=y CONFIG_CMD_SOURCE=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_XXD is not set - -# -# Android support commands -# CONFIG_CMD_NET=y CONFIG_CMD_BOOTP=y -CONFIG_CMD_DHCP=y # CONFIG_BOOTP_MAY_FAIL is not set CONFIG_BOOTP_BOOTPATH=y # CONFIG_BOOTP_VENDOREX is not set @@ -880,24 +997,25 @@ CONFIG_BOOTP_PXE=y CONFIG_BOOTP_PXE_CLIENTARCH=0x16 # CONFIG_BOOTP_PXE_DHCP_OPTION is not set CONFIG_BOOTP_VCI_STRING="U-Boot.armv8" -CONFIG_CMD_TFTPBOOT=y # CONFIG_CMD_TFTPPUT is not set # CONFIG_CMD_TFTPSRV is not set CONFIG_NET_TFTP_VARS=y # CONFIG_CMD_RARP is not set # CONFIG_CMD_NFS is not set # CONFIG_SYS_DISABLE_AUTOLOAD is not set -# CONFIG_CMD_WGET is not set -CONFIG_CMD_MII=y -CONFIG_CMD_MDIO=y -CONFIG_CMD_PING=y # CONFIG_CMD_CDP is not set # CONFIG_CMD_SNTP is not set -# CONFIG_CMD_DNS is not set # CONFIG_CMD_LINK_LOCAL is not set # CONFIG_CMD_ETHSW is not set -CONFIG_CMD_PXE=y # CONFIG_CMD_WOL is not set +CONFIG_CMD_DHCP=y +# CONFIG_CMD_DNS is not set +CONFIG_CMD_MII=y +CONFIG_CMD_MDIO=y +CONFIG_CMD_PING=y +CONFIG_CMD_TFTPBOOT=y +# CONFIG_CMD_WGET is not set +CONFIG_CMD_PXE=y # # Misc commands @@ -979,7 +1097,6 @@ CONFIG_CMD_CYCLIC=y # CONFIG_CMD_EVENT is not set CONFIG_CMD_LOG=y # CONFIG_CMD_UBI is not set -CONFIG_MMC_SPEED_MODE_SET=y # # Partition Types @@ -988,6 +1105,7 @@ CONFIG_PARTITIONS=y CONFIG_SPL_PARTITIONS=y # CONFIG_MAC_PARTITION is not set # CONFIG_SPL_MAC_PARTITION is not set +# CONFIG_TEGRA_PARTITION is not set CONFIG_DOS_PARTITION=y CONFIG_SPL_DOS_PARTITION=y CONFIG_ISO_PARTITION=y @@ -1013,9 +1131,11 @@ CONFIG_BINMAN=y CONFIG_OF_CONTROL=y CONFIG_OF_REAL=y CONFIG_SPL_OF_CONTROL=y +CONFIG_TPL_OF_CONTROL=y CONFIG_OF_LIVE=y CONFIG_OF_UPSTREAM=y # CONFIG_OF_UPSTREAM_BUILD_VENDOR is not set +# CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS is not set CONFIG_OF_SEPARATE=y # CONFIG_OF_EMBED is not set # CONFIG_OF_INITIAL_DTB_READONLY is not set @@ -1023,19 +1143,23 @@ CONFIG_OF_SEPARATE=y # CONFIG_OF_OMIT_DTB is not set CONFIG_DEVICE_TREE_INCLUDES="" CONFIG_OF_LIST="rockchip/rk3399-gru-bob" +CONFIG_OF_OVERLAY_LIST="" # CONFIG_MULTI_DTB_FIT is not set # CONFIG_SPL_MULTI_DTB_FIT is not set CONFIG_SPL_OF_LIST="rockchip/rk3399-gru-bob" CONFIG_OF_TAG_MIGRATE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" # CONFIG_OF_DTB_PROPS_REMOVE is not set # CONFIG_SPL_OF_PLATDATA is not set CONFIG_SPL_OF_REAL=y +CONFIG_TPL_OF_REAL=y +# CONFIG_TPL_OF_PLATDATA is not set # # Environment # CONFIG_ENV_SUPPORT=y +CONFIG_ENV_CALLBACK_LIST_STATIC="" CONFIG_SAVEENV=y # CONFIG_ENV_OVERWRITE is not set # CONFIG_OVERWRITE_ETHADDR_ONCE is not set @@ -1064,17 +1188,20 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_USE_ETHPRIME is not set # CONFIG_USE_HOSTNAME is not set # CONFIG_VERSION_VARIABLE is not set + +# +# Networking +# +# CONFIG_NO_NET is not set CONFIG_NET=y +# CONFIG_NET_LWIP is not set CONFIG_ARP_TIMEOUT=5000 CONFIG_NET_RETRY_COUNT=5 # CONFIG_PROT_UDP is not set -CONFIG_BOOTDEV_ETH=y # CONFIG_BOOTP_SEND_HOSTNAME is not set -# CONFIG_NET_RANDOM_ETHADDR is not set # CONFIG_NETCONSOLE is not set # CONFIG_IP_DEFRAG is not set # CONFIG_SYS_FAULT_ECHO_LINK_DOWN is not set -CONFIG_TFTP_BLOCKSIZE=1468 # CONFIG_TFTP_PORT is not set CONFIG_TFTP_WINDOWSIZE=1 # CONFIG_TFTP_TSIZE is not set @@ -1091,6 +1218,10 @@ CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64 # CONFIG_USE_SERVERIP is not set # CONFIG_PROT_TCP is not set # CONFIG_IPV6 is not set +CONFIG_BOOTDEV_ETH=y +# CONFIG_NET_RANDOM_ETHADDR is not set +# CONFIG_WGET is not set +CONFIG_TFTP_BLOCKSIZE=1468 CONFIG_SYS_RX_ETH_BUFFER=4 # @@ -1102,6 +1233,7 @@ CONFIG_SYS_RX_ETH_BUFFER=4 # CONFIG_DM=y CONFIG_SPL_DM=y +CONFIG_TPL_DM=y # CONFIG_DM_WARN is not set # CONFIG_SPL_DM_WARN is not set # CONFIG_DM_DEBUG is not set @@ -1113,18 +1245,24 @@ CONFIG_DM_EVENT=y CONFIG_DM_STDIO=y CONFIG_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y +# CONFIG_TPL_DM_SEQ_ALIAS is not set CONFIG_SPL_DM_INLINE_OFNODE=y +CONFIG_TPL_DM_INLINE_OFNODE=y # CONFIG_DM_DMA is not set CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y +CONFIG_TPL_REGMAP=y CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y +CONFIG_TPL_SYSCON=y # CONFIG_DEVRES is not set CONFIG_SIMPLE_BUS=y CONFIG_SPL_SIMPLE_BUS=y +# CONFIG_TPL_SIMPLE_BUS is not set # CONFIG_SIMPLE_BUS_CORRECT_RANGE is not set CONFIG_OF_TRANSLATE=y # CONFIG_SPL_OF_TRANSLATE is not set +# CONFIG_TPL_OF_TRANSLATE is not set # CONFIG_TRANSLATION_OFFSET is not set CONFIG_OFNODE_MULTI_TREE=y CONFIG_OFNODE_MULTI_TREE_MAX=4 @@ -1149,11 +1287,11 @@ CONFIG_SARADC_ROCKCHIP=y # CONFIG_BLK=y CONFIG_SPL_BLK=y +# CONFIG_TPL_BLK is not set CONFIG_BLOCK_CACHE=y # CONFIG_BLKMAP is not set # CONFIG_SPL_BLOCK_CACHE is not set # CONFIG_EFI_MEDIA is not set -# CONFIG_SPL_BLK_FS is not set # CONFIG_IDE is not set # CONFIG_LBA48 is not set # CONFIG_SYS_64BIT_LBA is not set @@ -1180,10 +1318,12 @@ CONFIG_BLOCK_CACHE=y # CONFIG_CLK=y CONFIG_SPL_CLK=y +CONFIG_TPL_CLK=y # CONFIG_SPL_CLK_CCF is not set # CONFIG_CLK_CCF is not set # CONFIG_CLK_GPIO is not set # CONFIG_SPL_CLK_GPIO is not set +# CONFIG_CLK_STUB is not set # CONFIG_CLK_CDCE9XX is not set # CONFIG_CLK_ICS8N3QV01 is not set # CONFIG_CLK_K210 is not set @@ -1193,6 +1333,7 @@ CONFIG_SPL_CLK=y # CONFIG_CLK_AT91 is not set # CONFIG_CLK_RCAR is not set # CONFIG_CLK_RCAR_CPG_LIB is not set +# CONFIG_CLK_SOPHGO_CV1800B is not set # CONFIG_CLK_SIFIVE is not set # CONFIG_CLK_TI_AM3_DPLL is not set # CONFIG_CLK_TI_CTRL is not set @@ -1262,6 +1403,7 @@ CONFIG_ARM_PSCI_FW=y # CONFIG_FWU_MDATA is not set CONFIG_GPIO=y CONFIG_SPL_DM_GPIO=y +CONFIG_TPL_DM_GPIO=y # CONFIG_GPIO_HOG is not set # CONFIG_SPL_GPIO_HOG is not set # CONFIG_DM_GPIO_LOOKUP_LABEL is not set @@ -1272,6 +1414,8 @@ CONFIG_SPL_DM_GPIO=y # CONFIG_AT91_GPIO is not set # CONFIG_ATMEL_PIO4 is not set # CONFIG_ASPEED_GPIO is not set +# CONFIG_ASPEED_SGPIO is not set +# CONFIG_ASPEED_G7_GPIO is not set # CONFIG_DA8XX_GPIO is not set # CONFIG_FXL6408_GPIO is not set # CONFIG_HIKEY_GPIO is not set @@ -1289,6 +1433,7 @@ CONFIG_SPL_DM_GPIO=y # CONFIG_MXC_GPIO is not set # CONFIG_MXS_GPIO is not set # CONFIG_NPCM_GPIO is not set +# CONFIG_NPCM_SGPIO is not set # CONFIG_CMD_PCA953X is not set # CONFIG_PCF8575_GPIO is not set CONFIG_ROCKCHIP_GPIO=y @@ -1318,6 +1463,7 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_I2C=y CONFIG_DM_I2C=y CONFIG_SPL_DM_I2C=y +# CONFIG_TPL_DM_I2C is not set CONFIG_I2C_CROS_EC_TUNNEL=y # CONFIG_I2C_CROS_EC_LDO is not set # CONFIG_I2C_SET_DEFAULT_BUS_NUM is not set @@ -1348,8 +1494,10 @@ CONFIG_I2C_MUX=y # CONFIG_I2C_MUX_GPIO is not set CONFIG_INPUT=y # CONFIG_SPL_INPUT is not set +# CONFIG_TPL_INPUT is not set CONFIG_DM_KEYBOARD=y # CONFIG_SPL_DM_KEYBOARD is not set +# CONFIG_TPL_DM_KEYBOARD is not set # CONFIG_APPLE_SPI_KEYB is not set # CONFIG_BUTTON_KEYBOARD is not set CONFIG_CROS_EC_KEYB=y @@ -1366,6 +1514,8 @@ CONFIG_CROS_EC_KEYB=y # LED Support # # CONFIG_LED is not set +# CONFIG_LED_BOOT is not set +# CONFIG_LED_ACTIVITY is not set # CONFIG_SPL_LED is not set # CONFIG_LED_STATUS is not set @@ -1386,6 +1536,7 @@ CONFIG_CROS_EC_KEYB=y # CONFIG_MISC=y CONFIG_SPL_MISC=y +CONFIG_TPL_MISC=y # CONFIG_NVMEM is not set # CONFIG_SPL_NVMEM is not set # CONFIG_ALTERA_SYSID is not set @@ -1400,9 +1551,11 @@ CONFIG_ROCKCHIP_IODOMAIN=y # CONFIG_VEXPRESS_CONFIG is not set CONFIG_CROS_EC=y # CONFIG_SPL_CROS_EC is not set +# CONFIG_TPL_CROS_EC is not set # CONFIG_CROS_EC_I2C is not set # CONFIG_CROS_EC_LPC is not set # CONFIG_SPL_CROS_EC_LPC is not set +# CONFIG_TPL_CROS_EC_LPC is not set CONFIG_CROS_EC_SPI=y # CONFIG_DS4510 is not set # CONFIG_FSL_SEC_MON is not set @@ -1440,6 +1593,7 @@ CONFIG_MMC_PWRSEQ=y # CONFIG_MMC_BROKEN_CD is not set CONFIG_DM_MMC=y CONFIG_SPL_DM_MMC=y +# CONFIG_TPL_DM_MMC is not set # CONFIG_MMC_SPI is not set # CONFIG_ARM_PL180_MMCI is not set CONFIG_MMC_QUIRKS=y @@ -1478,6 +1632,7 @@ CONFIG_MMC_SDHCI_ADMA_64BIT=y # CONFIG_MMC_SDHCI_NPCM is not set CONFIG_MMC_SDHCI_ROCKCHIP=y # CONFIG_MMC_SDHCI_S5P is not set +# CONFIG_MMC_SDHCI_SNPS is not set # CONFIG_MMC_SDHCI_STI is not set # CONFIG_MMC_SDHCI_XENON is not set # CONFIG_MMC_SDHCI_TANGIER is not set @@ -1498,7 +1653,6 @@ CONFIG_MTD=y # CONFIG_MTD_BLOCK is not set # CONFIG_SYS_MTDPARTS_RUNTIME is not set # CONFIG_FLASH_CFI_DRIVER is not set -# CONFIG_HBMC_AM654 is not set # CONFIG_SAMSUNG_ONENAND is not set # CONFIG_USE_SYS_MAX_FLASH_BANKS is not set # CONFIG_MTD_RAW_NAND is not set @@ -1508,8 +1662,6 @@ CONFIG_MTD=y # CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y -CONFIG_SF_DEFAULT_BUS=1 -CONFIG_SF_DEFAULT_CS=0 # CONFIG_BOOTDEV_SPI_FLASH is not set # CONFIG_SPI_FLASH_SFDP_SUPPORT is not set CONFIG_SPI_FLASH_SMART_HWCAPS=y @@ -1523,6 +1675,7 @@ CONFIG_SPI_FLASH_UNLOCK_ALL=y CONFIG_SPI_FLASH_GIGADEVICE=y # CONFIG_SPI_FLASH_ISSI is not set # CONFIG_SPI_FLASH_MACRONIX is not set +# CONFIG_SPI_FLASH_PUYA is not set # CONFIG_SPI_FLASH_SILICONKAISER is not set # CONFIG_SPI_FLASH_SPANSION is not set # CONFIG_SPI_FLASH_STMICRO is not set @@ -1691,6 +1844,7 @@ CONFIG_PINMUX=y # CONFIG_PINCONF is not set CONFIG_PINCONF_RECURSIVE=y CONFIG_SPL_PINCTRL=y +# CONFIG_TPL_PINCTRL is not set CONFIG_SPL_PINCTRL_FULL=y CONFIG_SPL_PINCTRL_GENERIC=y CONFIG_SPL_PINMUX=y @@ -1714,6 +1868,7 @@ CONFIG_POWER=y # CONFIG_POWER_LEGACY is not set # CONFIG_ACPI_PMC is not set # CONFIG_SPL_ACPI_PMC is not set +# CONFIG_TPL_ACPI_PMC is not set # # Power Domain Support @@ -1774,13 +1929,15 @@ CONFIG_DM_REGULATOR=y CONFIG_REGULATOR_PWM=y # CONFIG_SPL_REGULATOR_PWM is not set CONFIG_DM_REGULATOR_COMMON=y +CONFIG_SPL_DM_REGULATOR_COMMON=y CONFIG_DM_REGULATOR_FIXED=y -# CONFIG_SPL_DM_REGULATOR_FIXED is not set +CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y # CONFIG_SPL_DM_REGULATOR_GPIO is not set CONFIG_REGULATOR_RK8XX=y # CONFIG_DM_REGULATOR_PBIAS is not set # CONFIG_DM_REGULATOR_TPS62360 is not set +# CONFIG_DM_REGULATOR_TPS6287X is not set # CONFIG_DM_REGULATOR_ANATOP is not set # CONFIG_DM_REGULATOR_SCMI is not set # CONFIG_TPS6586X_POWER is not set @@ -1801,6 +1958,7 @@ CONFIG_PWM_ROCKCHIP=y # CONFIG_U_QE is not set CONFIG_RAM=y CONFIG_SPL_RAM=y +CONFIG_TPL_RAM=y # CONFIG_STM32_SDRAM is not set # CONFIG_MPC83XX_SDRAM is not set # CONFIG_K3_DDRSS is not set @@ -1849,6 +2007,7 @@ CONFIG_RNG_ROCKCHIP=y # # CONFIG_DM_RTC is not set # CONFIG_SPL_DM_RTC is not set +# CONFIG_TPL_DM_RTC is not set # CONFIG_RTC_ENABLE_32KHZ_OUTPUT is not set # CONFIG_RTC_DS1337 is not set # CONFIG_RTC_DS1338 is not set @@ -1856,7 +2015,6 @@ CONFIG_RNG_ROCKCHIP=y # CONFIG_RTC_DS3231 is not set # CONFIG_RTC_PCF8563 is not set # CONFIG_RTC_PT7C4338 is not set -# CONFIG_RTC_PL031 is not set # CONFIG_RTC_S35392A is not set # CONFIG_RTC_MC13XXX is not set # CONFIG_RTC_MC146818 is not set @@ -1869,15 +2027,18 @@ CONFIG_REQUIRE_SERIAL_CONSOLE=y # CONFIG_SPECIFY_CONSOLE_INDEX is not set CONFIG_SERIAL_PRESENT=y CONFIG_SPL_SERIAL_PRESENT=y +CONFIG_TPL_SERIAL_PRESENT=y CONFIG_DM_SERIAL=y # CONFIG_SERIAL_RX_BUFFER is not set # CONFIG_SERIAL_PUTS is not set # CONFIG_SERIAL_SEARCH_ALL is not set # CONFIG_SERIAL_PROBE_ALL is not set CONFIG_SPL_DM_SERIAL=y +CONFIG_TPL_DM_SERIAL=y # CONFIG_VPL_DM_SERIAL is not set CONFIG_DEBUG_UART_NS16550=y CONFIG_SPL_DEBUG_UART_BASE=0xff1a0000 +CONFIG_TPL_DEBUG_UART_BASE=0xff1a0000 CONFIG_DEBUG_UART_SHIFT=2 # CONFIG_DEBUG_UART_ANNOUNCE is not set # CONFIG_DEBUG_UART_SKIP_INIT is not set @@ -1935,27 +2096,18 @@ CONFIG_SPI_MEM=y # CONFIG_ALTERA_SPI is not set # CONFIG_APPLE_SPI is not set # CONFIG_ATCSPI200_SPI is not set -# CONFIG_ATMEL_SPI is not set -# CONFIG_BCMSTB_SPI is not set # CONFIG_CORTINA_SFLASH is not set # CONFIG_CADENCE_QSPI is not set -# CONFIG_CF_SPI is not set # CONFIG_CV1800B_SPIF is not set # CONFIG_DESIGNWARE_SPI is not set -# CONFIG_EXYNOS_SPI is not set -# CONFIG_FSL_DSPI is not set # CONFIG_FSL_QSPI is not set # CONFIG_GXP_SPI is not set -# CONFIG_ICH_SPI is not set # CONFIG_IPROC_QSPI is not set -# CONFIG_KIRKWOOD_SPI is not set # CONFIG_MICROCHIP_COREQSPI is not set -# CONFIG_MPC8XXX_SPI is not set # CONFIG_MTK_SNOR is not set # CONFIG_MTK_SNFI_SPI is not set # CONFIG_MTK_SPIM is not set # CONFIG_MVEBU_A3700_SPI is not set -# CONFIG_MXS_SPI is not set # CONFIG_SPI_MXIC is not set # CONFIG_NPCM_FIU_SPI is not set # CONFIG_NPCM_PSPI is not set @@ -1969,17 +2121,11 @@ CONFIG_ROCKCHIP_SPI=y # CONFIG_SOFT_SPI is not set # CONFIG_SPI_SN_F_OSPI is not set # CONFIG_SPI_SUNXI is not set -# CONFIG_TEGRA114_SPI is not set -# CONFIG_TEGRA20_SFLASH is not set -# CONFIG_TEGRA20_SLINK is not set -# CONFIG_TEGRA210_QSPI is not set -# CONFIG_TI_QSPI is not set # CONFIG_XILINX_SPI is not set # CONFIG_ZYNQ_SPI is not set # CONFIG_ZYNQ_QSPI is not set # CONFIG_ZYNQMP_GQSPI is not set -# CONFIG_SH_QSPI is not set -# CONFIG_MXC_SPI is not set +# CONFIG_SPI_STACKED_PARALLEL is not set # # SPMI support @@ -1992,6 +2138,7 @@ CONFIG_ROCKCHIP_SPI=y # CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y +CONFIG_TPL_SYSRESET=y CONFIG_SYSRESET_CMD_RESET=y CONFIG_SYSRESET_CMD_POWEROFF=y # CONFIG_SYSRESET_CV1800B is not set @@ -2027,6 +2174,7 @@ CONFIG_USB_HOST=y CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DWC3 is not set # CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set +# CONFIG_USB_XHCI_GENERIC is not set # CONFIG_USB_XHCI_FSL is not set # CONFIG_USB_XHCI_BRCM is not set CONFIG_USB_EHCI_HCD=y @@ -2055,6 +2203,7 @@ CONFIG_USB_DWC3_GENERIC=y # CONFIG_SPL_USB_DWC3_GENERIC is not set # CONFIG_USB_DWC3_AM62 is not set # CONFIG_USB_DWC3_LAYERSCAPE is not set +# CONFIG_USB_DWC3_STI is not set # # PHY Subsystem @@ -2079,6 +2228,7 @@ CONFIG_USB_DWC3_GENERIC=y # # CONFIG_TWL4030_USB is not set # CONFIG_ROCKCHIP_USB2_PHY is not set +# CONFIG_TYPEC_TCPM is not set # # ULPI drivers @@ -2159,6 +2309,7 @@ CONFIG_SIMPLE_PANEL=y # CONFIG_VIDEO_LCD_RENESAS_R61307 is not set # CONFIG_VIDEO_LCD_RENESAS_R69328 is not set # CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02 is not set +# CONFIG_VIDEO_LCD_SHARP_LQ101R1SX01 is not set # CONFIG_VIDEO_LCD_SSD2828 is not set # CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set # CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set @@ -2248,7 +2399,6 @@ CONFIG_FS_FAT_MAX_CLUSTSIZE=65536 # CONFIG_UBIFS_SILENCE_MSG is not set # CONFIG_UBIFS_SILENCE_DEBUG_DUMP is not set # CONFIG_FS_CRAMFS is not set -# CONFIG_YAFFS2 is not set # CONFIG_FS_SQUASHFS is not set # CONFIG_FS_EROFS is not set @@ -2260,6 +2410,7 @@ CONFIG_FS_FAT_MAX_CLUSTSIZE=65536 # CONFIG_PHYSMEM is not set # CONFIG_BCH is not set # CONFIG_BINMAN_FDT is not set +CONFIG_BINMAN_DTB="" # CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set CONFIG_CHARSET=y # CONFIG_DYNAMIC_CRC_TABLE is not set @@ -2270,12 +2421,16 @@ CONFIG_SPL_LIB_UUID=y # CONFIG_SPL_SEMIHOSTING is not set CONFIG_PRINTF=y CONFIG_SPL_PRINTF=y +CONFIG_TPL_PRINTF=y CONFIG_SPRINTF=y CONFIG_SPL_SPRINTF=y +CONFIG_TPL_SPRINTF=y CONFIG_STRTO=y CONFIG_SPL_STRTO=y +CONFIG_TPL_STRTO=y CONFIG_SYS_HZ=1000 CONFIG_SPL_USE_TINY_PRINTF=y +CONFIG_TPL_USE_TINY_PRINTF=y CONFIG_PANIC_HANG=y CONFIG_REGEX=y CONFIG_LIB_RAND=y @@ -2284,19 +2439,48 @@ CONFIG_SUPPORT_ACPI=y # CONFIG_ACPI is not set # CONFIG_SPL_ACPI is not set # CONFIG_SPL_TINY_MEMSET is not set +CONFIG_TPL_TINY_MEMSET=y # CONFIG_BITREVERSE is not set # CONFIG_TRACE is not set # CONFIG_CIRCBUF is not set CONFIG_CMD_DHRYSTONE=y # +# Alternative crypto libraries +# +CONFIG_LEGACY_HASHING_AND_CRYPTO=y +# CONFIG_MBEDTLS_LIB is not set +CONFIG_LEGACY_HASHING=y +CONFIG_SHA1_LEGACY=y +CONFIG_SHA256_LEGACY=y +CONFIG_MD5_LEGACY=y +CONFIG_LEGACY_CRYPTO=y +CONFIG_SPL_LEGACY_HASHING_AND_CRYPTO=y +# CONFIG_SPL_MBEDTLS_LIB is not set +CONFIG_SPL_LEGACY_HASHING=y +CONFIG_SPL_SHA1_LEGACY=y +CONFIG_SPL_SHA256_LEGACY=y +CONFIG_SPL_LEGACY_CRYPTO=y +CONFIG_TPL_LEGACY_HASHING_AND_CRYPTO=y +# CONFIG_TPL_MBEDTLS_LIB is not set +CONFIG_TPL_LEGACY_HASHING=y + +# # Security support # # CONFIG_AES is not set # CONFIG_ECDSA is not set -# CONFIG_RSA is not set +CONFIG_RSA=y +CONFIG_SPL_RSA=y +CONFIG_SPL_RSA_VERIFY=y +CONFIG_RSA_VERIFY=y +# CONFIG_RSA_VERIFY_WITH_PKEY is not set +# CONFIG_SPL_RSA_VERIFY_WITH_PKEY is not set +CONFIG_RSA_SOFTWARE_EXP=y +# CONFIG_ASYMMETRIC_KEY_TYPE is not set # CONFIG_TPM is not set # CONFIG_SPL_TPM is not set +# CONFIG_TPL_TPM is not set # # Android Verified Boot @@ -2320,7 +2504,9 @@ CONFIG_SPL_SHA256=y CONFIG_MD5=y # CONFIG_SPL_MD5 is not set CONFIG_CRC8=y -# CONFIG_SPL_CRC8 is not set +CONFIG_SPL_CRC8=y +# CONFIG_TPL_CRC8 is not set +CONFIG_CRC16=y # CONFIG_SPL_CRC16 is not set CONFIG_CRC32=y @@ -2337,10 +2523,13 @@ CONFIG_ZLIB=y # CONFIG_ZSTD is not set # CONFIG_SPL_BZIP2 is not set # CONFIG_SPL_LZ4 is not set +# CONFIG_TPL_LZ4 is not set # CONFIG_SPL_LZMA is not set +# CONFIG_TPL_LZMA is not set CONFIG_VPL_LZMA=y # CONFIG_SPL_LZO is not set # CONFIG_SPL_GZIP is not set +# CONFIG_TPL_GZIP is not set # CONFIG_SPL_ZSTD is not set CONFIG_ERRNO_STR=y # CONFIG_HEXDUMP is not set @@ -2349,49 +2538,26 @@ CONFIG_OF_LIBFDT=y CONFIG_OF_LIBFDT_ASSUME_MASK=0x0 CONFIG_SYS_FDT_PAD=0x3000 CONFIG_SPL_OF_LIBFDT=y -CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff +CONFIG_TPL_OF_LIBFDT=y +CONFIG_TPL_OF_LIBFDT_ASSUME_MASK=0xff # # System tables # +# CONFIG_BLOBLIST_TABLES is not set CONFIG_GENERATE_SMBIOS_TABLE=y +# CONFIG_GENERATE_SMBIOS_TABLE_VERBOSE is not set # CONFIG_LIB_RATIONAL is not set # CONFIG_SPL_LIB_RATIONAL is not set CONFIG_SMBIOS=y # CONFIG_SMBIOS_PARSER is not set -CONFIG_EFI_LOADER=y -CONFIG_EFI_BINARY_EXEC=y -CONFIG_EFI_BOOTMGR=y -# CONFIG_EFI_VARIABLE_FILE_STORE is not set -CONFIG_EFI_VARIABLE_NO_STORE=y -# CONFIG_EFI_VARIABLES_PRESEED is not set -CONFIG_EFI_VAR_BUF_SIZE=131072 -# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set -# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set -# CONFIG_EFI_CAPSULE_ON_DISK is not set -CONFIG_EFI_CAPSULE_MAX=15 -CONFIG_EFI_DEVICE_PATH_TO_TEXT=y -CONFIG_EFI_DEVICE_PATH_UTIL=y -CONFIG_EFI_DT_FIXUP=y -CONFIG_EFI_LOADER_HII=y -CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y -CONFIG_EFI_UNICODE_CAPITALIZATION=y -# CONFIG_EFI_LOADER_BOUNCE_BUFFER is not set -CONFIG_EFI_PLATFORM_LANG_CODES="en-US" -CONFIG_EFI_HAVE_RUNTIME_RESET=y -CONFIG_EFI_RNG_PROTOCOL=y -CONFIG_EFI_LOAD_FILE2_INITRD=y -CONFIG_EFI_ECPT=y -CONFIG_EFI_EBBR_2_1_CONFORMANCE=y -# CONFIG_EFI_HTTP_BOOT is not set # CONFIG_OPTEE_LIB is not set # CONFIG_OPTEE_IMAGE is not set # CONFIG_BOOTM_OPTEE is not set # CONFIG_TEST_FDTDEC is not set CONFIG_LIB_ELF=y CONFIG_LMB=y -CONFIG_LMB_USE_MAX_REGIONS=y -CONFIG_LMB_MAX_REGIONS=16 +# CONFIG_LMB_ARCH_MEM_MAP is not set # CONFIG_PHANDLE_CHECK_SEQ is not set # @@ -2405,6 +2571,7 @@ CONFIG_LMB_MAX_REGIONS=16 # Tools options # CONFIG_MKIMAGE_DTC_PATH="dtc" +CONFIG_TOOLS_CRC16=y CONFIG_TOOLS_CRC32=y CONFIG_TOOLS_LIBCRYPTO=y CONFIG_TOOLS_KWBIMAGE=y diff --git a/config/u-boot/gru_bob/target.cfg b/config/u-boot/gru_bob/target.cfg index e19603c2..0c90e338 100644 --- a/config/u-boot/gru_bob/target.cfg +++ b/config/u-boot/gru_bob/target.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later tree="default" -xtree="default" +xgcctree="default" xarch="aarch64-elf arm-eabi" diff --git a/config/u-boot/gru_kevin/config/default b/config/u-boot/gru_kevin/config/default index 2a15b9bf..582c51f9 100644 --- a/config/u-boot/gru_kevin/config/default +++ b/config/u-boot/gru_kevin/config/default @@ -1,15 +1,17 @@ # # Automatically generated file; DO NOT EDIT. -# U-Boot 2024.10 Configuration +# U-Boot 2025.04 Configuration # # -# Compiler: gcc (Debian 12.2.0-14) 12.2.0 +# Compiler: gcc (Debian 14.2.0-19) 14.2.0 # CONFIG_CREATE_ARCH_SYMLINK=y +CONFIG_HAVE_SETJMP=y CONFIG_SUPPORT_LITTLE_ENDIAN=y CONFIG_SYS_CACHE_SHIFT_6=y CONFIG_64BIT=y +CONFIG_SPL_64BIT=y CONFIG_SYS_CACHELINE_SIZE=64 CONFIG_LINKER_LIST_ALIGN=8 # CONFIG_ARC is not set @@ -39,10 +41,11 @@ CONFIG_SKIP_LOWLEVEL_INIT=y # CONFIG_TPL_SKIP_LOWLEVEL_INIT is not set # CONFIG_SKIP_LOWLEVEL_INIT_ONLY is not set # CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY is not set +# CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY is not set # CONFIG_SYS_ICACHE_OFF is not set # CONFIG_SPL_SYS_ICACHE_OFF is not set # CONFIG_SYS_DCACHE_OFF is not set -CONFIG_SPL_SYS_DCACHE_OFF=y +# CONFIG_SPL_SYS_DCACHE_OFF is not set # # ARM architecture @@ -51,9 +54,9 @@ CONFIG_ARM64=y CONFIG_ARM64_CRC32=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_POSITION_INDEPENDENT=y -CONFIG_INIT_SP_RELATIVE=y -CONFIG_SYS_INIT_SP_BSS_OFFSET=524288 +# CONFIG_INIT_SP_RELATIVE is not set CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE=0x18000000 +# CONFIG_DRIVER_GICV2 is not set # CONFIG_GIC_V3_ITS is not set # CONFIG_GICV3_SUPPORT_GIC600 is not set CONFIG_STATIC_RELA=y @@ -75,8 +78,10 @@ CONFIG_ARM_SMCCC=y CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y # CONFIG_USE_ARCH_MEMCPY is not set # CONFIG_SPL_USE_ARCH_MEMCPY is not set +# CONFIG_TPL_USE_ARCH_MEMCPY is not set # CONFIG_USE_ARCH_MEMSET is not set # CONFIG_SPL_USE_ARCH_MEMSET is not set +# CONFIG_TPL_USE_ARCH_MEMSET is not set CONFIG_ARM64_SUPPORT_AARCH32=y # CONFIG_ARCH_AT91 is not set # CONFIG_ARCH_DAVINCI is not set @@ -100,6 +105,7 @@ CONFIG_ARM64_SUPPORT_AARCH32=y # CONFIG_ARCH_OMAP2PLUS is not set # CONFIG_ARCH_MESON is not set # CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MMP is not set # CONFIG_ARCH_LPC32XX is not set # CONFIG_ARCH_IMX8 is not set # CONFIG_ARCH_IMX8M is not set @@ -183,23 +189,25 @@ CONFIG_ARCH_ROCKCHIP=y # CONFIG_TARGET_PRESIDIO_ASIC is not set # CONFIG_TARGET_XENGUEST_ARM64 is not set # CONFIG_ARCH_GXP is not set -# CONFIG_STATIC_MACH_TYPE is not set CONFIG_TEXT_BASE=0x18000000 CONFIG_SYS_MALLOC_LEN=0x2000000 -CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_SYS_MALLOC_F_LEN=0x10000 +CONFIG_BLOBLIST_SIZE_RELOC=0x1000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL_LDSCRIPT="arch/arm/cpu/armv8/u-boot-spl.lds" CONFIG_ENV_SOURCE_FILE="" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x3f00000 CONFIG_SF_DEFAULT_SPEED=20000000 CONFIG_SF_DEFAULT_MODE=0x0 CONFIG_ENV_SIZE=0x1f000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3399-gru-kevin" -CONFIG_SPL_TEXT_BASE=0xff8c2000 +CONFIG_DDR_SI_TEST=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000 CONFIG_DM_RESET=y @@ -221,16 +229,20 @@ CONFIG_ROCKCHIP_RK3399=y # CONFIG_ROCKCHIP_RV1126 is not set # CONFIG_ROCKCHIP_USB_UART is not set # CONFIG_SPL_ROCKCHIP_BACK_TO_BROM is not set +CONFIG_TPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_ROCKCHIP_COMMON_BOARD=y CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y # CONFIG_ROCKCHIP_EXTERNAL_TPL is not set CONFIG_ROCKCHIP_BOOT_MODE_REG=0 # CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON is not set CONFIG_ROCKCHIP_STIMER=y CONFIG_ROCKCHIP_STIMER_BASE=0xff8680a0 -CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 +CONFIG_ROCKCHIP_BROM_HELPER=y # CONFIG_SPL_ROCKCHIP_EARLYRETURN_TO_BROM is not set CONFIG_ROCKCHIP_DISABLE_FORCE_JTAG=y +# CONFIG_TPL_ROCKCHIP_EARLYRETURN_TO_BROM is not set # CONFIG_SPL_MMC is not set CONFIG_ROCKCHIP_SPI_IMAGE=y CONFIG_ROCKCHIP_COMMON_STACK_ADDR=y @@ -238,8 +250,12 @@ CONFIG_SPL_SERIAL=y CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds" CONFIG_TPL_TEXT_BASE=0xff8c2000 CONFIG_TPL_STACK=0xff8effff +CONFIG_TPL_SYS_MALLOC_F_LEN=0x4000 +CONFIG_TPL_LIBCOMMON_SUPPORT=y +CONFIG_TPL_LIBGENERIC_SUPPORT=y +CONFIG_TPL_SERIAL=y # CONFIG_SPL_DRIVERS_MISC is not set -CONFIG_SPL_STACK_R_ADDR=0x04000000 +CONFIG_SPL_STACK_R_ADDR=0x3e00000 # CONFIG_TARGET_CHROMEBOOK_BOB is not set CONFIG_TARGET_CHROMEBOOK_KEVIN=y # CONFIG_TARGET_EVB_RK3399 is not set @@ -250,14 +266,20 @@ CONFIG_TARGET_CHROMEBOOK_KEVIN=y # CONFIG_TARGET_ROCKPI4_RK3399 is not set # CONFIG_TARGET_ROCKPRO64_RK3399 is not set # CONFIG_TARGET_ROC_PC_RK3399 is not set -CONFIG_SPL_STACK=0xff8effff -CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 +CONFIG_TPL_SYS_MALLOC_F=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL_TEXT_BASE=0x0 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0xff8e0000 -CONFIG_SPL_BSS_MAX_SIZE=0x10000 +CONFIG_SPL_BSS_START_ADDR=0x3f80000 +CONFIG_SPL_BSS_MAX_SIZE=0x8000 CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 +CONFIG_SYS_BOOTM_LEN=0x4000000 +CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 +CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff +CONFIG_SF_DEFAULT_BUS=1 +CONFIG_SF_DEFAULT_CS=0 CONFIG_SPL_SYS_MALLOC_F=y CONFIG_ERR_PTR_OFFSET=0x0 CONFIG_SPL_SIZE_LIMIT=0x0 @@ -293,24 +315,18 @@ CONFIG_PSCI_RESET=y CONFIG_ARMV8_CRYPTO=y CONFIG_ARMV8_CE_SHA1=y CONFIG_ARMV8_CE_SHA256=y -# CONFIG_CMD_DEKBLOB is not set -# CONFIG_IMX_CAAM_DEK_ENCAP is not set -# CONFIG_IMX_OPTEE_DEK_ENCAP is not set -# CONFIG_IMX_SECO_DEK_ENCAP is not set -# CONFIG_IMX_ELE_DEK_ENCAP is not set -# CONFIG_CMD_HDMIDETECT is not set -CONFIG_IMX_DCD_ADDR=0x00910000 CONFIG_SYS_MEM_TOP_HIDE=0x0 -CONFIG_SYS_LOAD_ADDR=0x800800 # # ARM debug # -CONFIG_SPL_PAYLOAD="u-boot.bin" +CONFIG_TPL_MAX_SIZE=0x2e000 +CONFIG_SPL_PAYLOAD="tpl/u-boot-with-tpl.bin" CONFIG_BUILD_TARGET="" # CONFIG_PCI is not set CONFIG_FWU_NUM_BANKS=2 CONFIG_FWU_NUM_IMAGES_PER_BANK=2 +CONFIG_TPL_SIZE_LIMIT=0x0 CONFIG_DEBUG_UART=y # CONFIG_AHCI is not set # CONFIG_OF_BOARD_FIXUP is not set @@ -327,7 +343,7 @@ CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=120200 +CONFIG_GCC_VERSION=140200 CONFIG_CLANG_VERSION=0 CONFIG_CC_OPTIMIZE_FOR_SIZE=y # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set @@ -336,6 +352,7 @@ CONFIG_CC_OPTIMIZE_FOR_SIZE=y # CONFIG_SPL_OPTIMIZE_INLINING is not set CONFIG_ARCH_SUPPORTS_LTO=y # CONFIG_LTO is not set +# CONFIG_TPL_OPTIMIZE_INLINING is not set CONFIG_CC_HAS_ASM_INLINE=y # CONFIG_XEN is not set CONFIG_ENV_VARS_UBOOT_CONFIG=y @@ -357,8 +374,6 @@ CONFIG_REMAKE_ELF=y # CONFIG_SYS_CUSTOM_LDSCRIPT is not set CONFIG_PLATFORM_ELFENTRY="_start" CONFIG_STACK_SIZE=0x1000000 -CONFIG_SYS_SRAM_BASE=0x0 -CONFIG_SYS_SRAM_SIZE=0x0 # CONFIG_MP is not set CONFIG_HAVE_TEXT_BASE=y # CONFIG_HAVE_SYS_UBOOT_START is not set @@ -371,6 +386,63 @@ CONFIG_SYS_UBOOT_START=0x18000000 # # +# UEFI Support +# +CONFIG_EFI_LOADER=y +CONFIG_EFI_BINARY_EXEC=y +# CONFIG_EFI_SECURE_BOOT is not set + +# +# UEFI services +# +CONFIG_EFI_HAVE_RUNTIME_RESET=y + +# +# UEFI Variables +# +# CONFIG_EFI_VARIABLE_FILE_STORE is not set +CONFIG_EFI_VARIABLE_NO_STORE=y +# CONFIG_EFI_VARIABLES_PRESEED is not set +CONFIG_EFI_VAR_BUF_SIZE=131072 +CONFIG_EFI_PLATFORM_LANG_CODES="en-US" + +# +# Capsule support +# +# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set +# CONFIG_EFI_CAPSULE_ON_DISK is not set +CONFIG_EFI_CAPSULE_MAX=15 + +# +# UEFI protocol support +# +CONFIG_EFI_DEVICE_PATH_TO_TEXT=y +CONFIG_EFI_DEVICE_PATH_UTIL=y +CONFIG_EFI_DT_FIXUP=y +CONFIG_EFI_LOADER_HII=y +CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y +CONFIG_EFI_UNICODE_CAPITALIZATION=y +CONFIG_EFI_RNG_PROTOCOL=y +CONFIG_EFI_LOAD_FILE2_INITRD=y +# CONFIG_EFI_IP4_CONFIG2_PROTOCOL is not set + +# +# Misc options +# +# CONFIG_EFI_LOADER_BOUNCE_BUFFER is not set +CONFIG_EFI_ECPT=y +CONFIG_EFI_EBBR_2_1_CONFORMANCE=y +# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set + +# +# EFI bootmanager +# +CONFIG_EFI_BOOTMGR=y +# CONFIG_EFI_HTTP_BOOT is not set +CONFIG_BOOTEFI_HELLO_COMPILE=y +CONFIG_BOOTEFI_TESTAPP_COMPILE=y + +# # Boot images # # CONFIG_ANDROID_BOOT_IMAGE is not set @@ -378,22 +450,26 @@ CONFIG_SYS_UBOOT_START=0x18000000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x0 CONFIG_FIT_FULL_CHECK=y -# CONFIG_FIT_SIGNATURE is not set +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_SIGNATURE_MAX_SIZE=0x10000000 +# CONFIG_FIT_RSASSA_PSS is not set # CONFIG_FIT_CIPHER is not set # CONFIG_FIT_VERBOSE is not set # CONFIG_FIT_BEST_MATCH is not set CONFIG_FIT_PRINT=y CONFIG_SPL_FIT=y +# CONFIG_TPL_FIT is not set # CONFIG_SPL_FIT_PRINT is not set -# CONFIG_SPL_FIT_FULL_CHECK is not set -# CONFIG_SPL_FIT_SIGNATURE is not set +CONFIG_SPL_FIT_FULL_CHECK=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_FIT_SIGNATURE_MAX_SIZE=0x10000000 +# CONFIG_SPL_FIT_RSASSA_PSS is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x0 # CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY is not set # CONFIG_SPL_LOAD_FIT_FULL is not set +# CONFIG_TPL_LOAD_FIT is not set # CONFIG_SPL_FIT_IMAGE_POST_PROCESS is not set -CONFIG_SPL_FIT_SOURCE="" -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_PXE_UTILS=y CONFIG_BOOT_DEFAULTS_FEATURES=y CONFIG_BOOT_DEFAULTS_CMDS=y @@ -403,6 +479,7 @@ CONFIG_BOOTSTD=y CONFIG_BOOTSTD_FULL=y CONFIG_BOOTSTD_DEFAULTS=y CONFIG_BOOTSTD_BOOTCOMMAND=y +CONFIG_BOOTSTD_MENU=y CONFIG_BOOTMETH_GLOBAL=y # CONFIG_BOOTMETH_ANDROID is not set # CONFIG_BOOTMETH_CROS is not set @@ -413,15 +490,17 @@ CONFIG_BOOTMETH_EFI_BOOTMGR=y CONFIG_BOOTMETH_VBE=y CONFIG_BOOTMETH_DISTRO=y # CONFIG_SPL_BOOTMETH_VBE is not set +CONFIG_TPL_BOOTMETH_VBE=y CONFIG_BOOTMETH_VBE_REQUEST=y # CONFIG_SPL_BOOTMETH_VBE_REQUEST is not set CONFIG_BOOTMETH_VBE_SIMPLE=y +# CONFIG_BOOTMETH_VBE_ABREC is not set CONFIG_BOOTMETH_VBE_SIMPLE_OS=y # CONFIG_SPL_BOOTMETH_VBE_SIMPLE is not set CONFIG_EXPO=y CONFIG_BOOTMETH_SCRIPT=y +# CONFIG_UPL is not set CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_CHROMEOS is not set # CONFIG_CHROMEOS_VBOOT is not set @@ -498,6 +577,7 @@ CONFIG_SYS_PBSIZE=1044 # CONFIG_DISABLE_CONSOLE is not set CONFIG_LOGLEVEL=4 CONFIG_SPL_LOGLEVEL=4 +CONFIG_TPL_LOGLEVEL=4 # CONFIG_SILENT_CONSOLE is not set # CONFIG_SPL_SILENT_CONSOLE is not set # CONFIG_TPL_SILENT_CONSOLE is not set @@ -526,6 +606,7 @@ CONFIG_LOG_CONSOLE=y CONFIG_LOGF_FUNC_PAD=20 # CONFIG_LOG_SYSLOG is not set # CONFIG_SPL_LOG is not set +# CONFIG_TPL_LOG is not set # CONFIG_LOG_ERROR_RETURN is not set # @@ -562,6 +643,7 @@ CONFIG_MISC_INIT_R=y # Security support # CONFIG_HASH=y +# CONFIG_HASH_CRC8 is not set CONFIG_SPL_HASH=y # CONFIG_STACKPROTECTOR is not set # CONFIG_BOARD_RNG_SEED is not set @@ -577,11 +659,11 @@ CONFIG_SPL_HASH=y # CONFIG_BLOBLIST=y CONFIG_SPL_BLOBLIST=y +# CONFIG_TPL_BLOBLIST is not set CONFIG_BLOBLIST_FIXED=y # CONFIG_BLOBLIST_ALLOC is not set CONFIG_BLOBLIST_ADDR=0x100000 CONFIG_BLOBLIST_SIZE=0x1000 -CONFIG_BLOBLIST_SIZE_RELOC=0x1000 CONFIG_SPL_BLOBLIST_FIXED=y # CONFIG_SPL_BLOBLIST_ALLOC is not set CONFIG_SUPPORT_SPL=y @@ -592,7 +674,7 @@ CONFIG_SUPPORT_TPL=y # CONFIG_SPL_FRAMEWORK=y # CONFIG_SPL_FRAMEWORK_BOARD_INIT_F is not set -CONFIG_SPL_MAX_SIZE=0x1e000 +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 # CONFIG_SPL_NO_BSS_LIMIT is not set CONFIG_SPL_BSS_LIMIT=y @@ -606,24 +688,27 @@ CONFIG_HANDOFF=y CONFIG_SPL_HANDOFF=y # CONFIG_SPL_SOC_INIT is not set CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_LOAD_BLOCK=y # CONFIG_SPL_BOOTROM_SUPPORT is not set # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set # CONFIG_SPL_LOAD_IMX_CONTAINER is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_SHARES_INIT_SP_ADDR=y CONFIG_SPL_SEPARATE_BSS=y # CONFIG_SPL_SYS_MALLOC is not set CONFIG_SPL_BANNER_PRINT=y # CONFIG_SPL_DISPLAY_PRINT is not set +CONFIG_SPL_SYS_MMCSD_RAW_MODE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x4000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x0 -# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set # CONFIG_SPL_FIT_IMAGE_TINY is not set # CONFIG_SPL_CACHE is not set # CONFIG_SPL_CPU is not set -# CONFIG_SPL_CRYPTO is not set +CONFIG_SPL_CRYPTO=y # CONFIG_SPL_DMA is not set # CONFIG_SPL_ENV_SUPPORT is not set # CONFIG_SPL_FS_EXT4 is not set @@ -640,6 +725,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET=0x0 # CONFIG_SPL_NAND_DRIVERS is not set # CONFIG_SPL_NAND_ECC is not set # CONFIG_SPL_NAND_SIMPLE is not set +# CONFIG_SPL_RELOC_LOADER is not set # CONFIG_SPL_UBI is not set CONFIG_SPL_DM_SPI_FLASH=y # CONFIG_SPL_NET is not set @@ -653,7 +739,7 @@ CONFIG_SPL_DM_SPI_FLASH=y # CONFIG_SPL_DM_RESET is not set # CONFIG_SPL_POWER is not set # CONFIG_SPL_POWER_DOMAIN is not set -# CONFIG_SPL_RAM_SUPPORT is not set +# CONFIG_SPL_RAM_DEVICE is not set # CONFIG_SPL_REMOTEPROC is not set # CONFIG_SPL_RTC is not set # CONFIG_SPL_SATA is not set @@ -661,7 +747,7 @@ CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_SPI_FLASH_TINY=y # CONFIG_SPL_SPI_FLASH_MTD is not set CONFIG_SPL_SPI_LOAD=y -CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0xE0000 # CONFIG_SPL_THERMAL is not set # CONFIG_SPL_WATCHDOG is not set # CONFIG_SPL_YMODEM_SUPPORT is not set @@ -670,8 +756,42 @@ CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y # CONFIG_SPL_OPTEE_IMAGE is not set CONFIG_SPL_TARGET="" -# CONFIG_TPL is not set +CONFIG_TPL=y + +# +# TPL configuration options +# +CONFIG_TPL_BINMAN_SYMBOLS=y +CONFIG_TPL_BINMAN_UBOOT_SYMBOLS=y +CONFIG_TPL_FRAMEWORK=y +CONFIG_TPL_BANNER_PRINT=y +# CONFIG_TPL_BOARD_INIT is not set +CONFIG_TPL_SYS_MALLOC_SIMPLE=y +CONFIG_TPL_SEPARATE_BSS=y +CONFIG_TPL_NEEDS_SEPARATE_STACK=y +# CONFIG_TPL_POWER is not set +CONFIG_TPL_BOOTROM_SUPPORT=y +# CONFIG_TPL_CRC32 is not set +# CONFIG_TPL_DRIVERS_MISC is not set +# CONFIG_TPL_ENV_SUPPORT is not set +CONFIG_TPL_GPIO=y +# CONFIG_TPL_I2C is not set +# CONFIG_TPL_MPC8XXX_INIT_DDR is not set +# CONFIG_TPL_MMC is not set +# CONFIG_TPL_NAND_SUPPORT is not set +# CONFIG_TPL_PCI is not set +# CONFIG_TPL_PCH is not set +# CONFIG_TPL_RAM_SUPPORT is not set +# CONFIG_TPL_RELOC_LOADER is not set +# CONFIG_TPL_RTC is not set +# CONFIG_TPL_SPI_FLASH_SUPPORT is not set +# CONFIG_TPL_SPI is not set +# CONFIG_TPL_DM_SPI is not set +# CONFIG_TPL_DM_SPI_FLASH is not set +# CONFIG_TPL_YMODEM_SUPPORT is not set # CONFIG_VPL is not set +CONFIG_IMAGE_SIGN_INFO=y +CONFIG_SPL_IMAGE_SIGN_INFO=y CONFIG_CMDLINE=y CONFIG_HUSH_PARSER=y @@ -700,6 +820,7 @@ CONFIG_CMD_BDI=y # CONFIG_CMD_BDINFO_EXTRA is not set # CONFIG_CMD_CONFIG is not set CONFIG_CMD_CONSOLE=y +# CONFIG_CMD_UFETCH is not set # CONFIG_CMD_HISTORY is not set # CONFIG_CMD_LICENSE is not set # CONFIG_CMD_PMC is not set @@ -715,6 +836,7 @@ CONFIG_CMD_BOOTFLOW=y CONFIG_CMD_BOOTFLOW_FULL=y CONFIG_CMD_BOOTFLOW_BOOTDELAY=8 CONFIG_CMD_BOOTMETH=y +CONFIG_CMD_BOOTSTD=y CONFIG_BOOTM_EFI=y CONFIG_BOOTM_ELF=y CONFIG_CMD_BOOTZ=y @@ -725,17 +847,18 @@ CONFIG_BOOTM_NETBSD=y # CONFIG_BOOTM_OSE is not set CONFIG_BOOTM_PLAN9=y CONFIG_BOOTM_RTEMS=y +# CONFIG_CMD_UPL is not set CONFIG_CMD_VBE=y CONFIG_BOOTM_VXWORKS=y CONFIG_CMD_BOOTEFI=y CONFIG_CMD_BOOTEFI_BINARY=y CONFIG_CMD_BOOTEFI_BOOTMGR=y -CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y CONFIG_CMD_BOOTEFI_HELLO=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_ADTIMG is not set CONFIG_CMD_ELF=y +CONFIG_CMD_ELF_BOOTVX=y # CONFIG_CMD_ELF_FDT_SETUP is not set CONFIG_CMD_FDT=y CONFIG_CMD_GO=y @@ -826,10 +949,10 @@ CONFIG_CMD_MMC=y # CONFIG_CMD_BKOPS_ENABLE is not set # CONFIG_CMD_MMC_REG is not set # CONFIG_CMD_MMC_SWRITE is not set +CONFIG_MMC_SPEED_MODE_SET=y # CONFIG_CMD_CLONE is not set # CONFIG_CMD_MTD is not set # CONFIG_CMD_ONENAND is not set -# CONFIG_CMD_OSD is not set CONFIG_CMD_PART=y # CONFIG_CMD_PCI is not set CONFIG_CMD_PINMUX=y @@ -843,7 +966,6 @@ CONFIG_CMD_SPI=y CONFIG_DEFAULT_SPI_BUS=0 CONFIG_DEFAULT_SPI_MODE=0x0 CONFIG_CMD_USB=y -# CONFIG_CMD_USB_SDP is not set # CONFIG_CMD_RKMTD is not set # CONFIG_CMD_WRITE is not set @@ -856,13 +978,8 @@ CONFIG_CMD_ITEST=y CONFIG_CMD_SOURCE=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_XXD is not set - -# -# Android support commands -# CONFIG_CMD_NET=y CONFIG_CMD_BOOTP=y -CONFIG_CMD_DHCP=y # CONFIG_BOOTP_MAY_FAIL is not set CONFIG_BOOTP_BOOTPATH=y # CONFIG_BOOTP_VENDOREX is not set @@ -880,24 +997,25 @@ CONFIG_BOOTP_PXE=y CONFIG_BOOTP_PXE_CLIENTARCH=0x16 # CONFIG_BOOTP_PXE_DHCP_OPTION is not set CONFIG_BOOTP_VCI_STRING="U-Boot.armv8" -CONFIG_CMD_TFTPBOOT=y # CONFIG_CMD_TFTPPUT is not set # CONFIG_CMD_TFTPSRV is not set CONFIG_NET_TFTP_VARS=y # CONFIG_CMD_RARP is not set # CONFIG_CMD_NFS is not set # CONFIG_SYS_DISABLE_AUTOLOAD is not set -# CONFIG_CMD_WGET is not set -CONFIG_CMD_MII=y -CONFIG_CMD_MDIO=y -CONFIG_CMD_PING=y # CONFIG_CMD_CDP is not set # CONFIG_CMD_SNTP is not set -# CONFIG_CMD_DNS is not set # CONFIG_CMD_LINK_LOCAL is not set # CONFIG_CMD_ETHSW is not set -CONFIG_CMD_PXE=y # CONFIG_CMD_WOL is not set +CONFIG_CMD_DHCP=y +# CONFIG_CMD_DNS is not set +CONFIG_CMD_MII=y +CONFIG_CMD_MDIO=y +CONFIG_CMD_PING=y +CONFIG_CMD_TFTPBOOT=y +# CONFIG_CMD_WGET is not set +CONFIG_CMD_PXE=y # # Misc commands @@ -979,7 +1097,6 @@ CONFIG_CMD_CYCLIC=y # CONFIG_CMD_EVENT is not set CONFIG_CMD_LOG=y # CONFIG_CMD_UBI is not set -CONFIG_MMC_SPEED_MODE_SET=y # # Partition Types @@ -988,6 +1105,7 @@ CONFIG_PARTITIONS=y CONFIG_SPL_PARTITIONS=y # CONFIG_MAC_PARTITION is not set # CONFIG_SPL_MAC_PARTITION is not set +# CONFIG_TEGRA_PARTITION is not set CONFIG_DOS_PARTITION=y CONFIG_SPL_DOS_PARTITION=y CONFIG_ISO_PARTITION=y @@ -1013,9 +1131,11 @@ CONFIG_BINMAN=y CONFIG_OF_CONTROL=y CONFIG_OF_REAL=y CONFIG_SPL_OF_CONTROL=y +CONFIG_TPL_OF_CONTROL=y CONFIG_OF_LIVE=y CONFIG_OF_UPSTREAM=y # CONFIG_OF_UPSTREAM_BUILD_VENDOR is not set +# CONFIG_OF_UPSTREAM_INCLUDE_LOCAL_FALLBACK_DTBOS is not set CONFIG_OF_SEPARATE=y # CONFIG_OF_EMBED is not set # CONFIG_OF_INITIAL_DTB_READONLY is not set @@ -1023,19 +1143,23 @@ CONFIG_OF_SEPARATE=y # CONFIG_OF_OMIT_DTB is not set CONFIG_DEVICE_TREE_INCLUDES="" CONFIG_OF_LIST="rockchip/rk3399-gru-kevin" +CONFIG_OF_OVERLAY_LIST="" # CONFIG_MULTI_DTB_FIT is not set # CONFIG_SPL_MULTI_DTB_FIT is not set CONFIG_SPL_OF_LIST="rockchip/rk3399-gru-kevin" CONFIG_OF_TAG_MIGRATE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" # CONFIG_OF_DTB_PROPS_REMOVE is not set # CONFIG_SPL_OF_PLATDATA is not set CONFIG_SPL_OF_REAL=y +CONFIG_TPL_OF_REAL=y +# CONFIG_TPL_OF_PLATDATA is not set # # Environment # CONFIG_ENV_SUPPORT=y +CONFIG_ENV_CALLBACK_LIST_STATIC="" CONFIG_SAVEENV=y # CONFIG_ENV_OVERWRITE is not set # CONFIG_OVERWRITE_ETHADDR_ONCE is not set @@ -1064,17 +1188,20 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y # CONFIG_USE_ETHPRIME is not set # CONFIG_USE_HOSTNAME is not set # CONFIG_VERSION_VARIABLE is not set + +# +# Networking +# +# CONFIG_NO_NET is not set CONFIG_NET=y +# CONFIG_NET_LWIP is not set CONFIG_ARP_TIMEOUT=5000 CONFIG_NET_RETRY_COUNT=5 # CONFIG_PROT_UDP is not set -CONFIG_BOOTDEV_ETH=y # CONFIG_BOOTP_SEND_HOSTNAME is not set -# CONFIG_NET_RANDOM_ETHADDR is not set # CONFIG_NETCONSOLE is not set # CONFIG_IP_DEFRAG is not set # CONFIG_SYS_FAULT_ECHO_LINK_DOWN is not set -CONFIG_TFTP_BLOCKSIZE=1468 # CONFIG_TFTP_PORT is not set CONFIG_TFTP_WINDOWSIZE=1 # CONFIG_TFTP_TSIZE is not set @@ -1091,6 +1218,10 @@ CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64 # CONFIG_USE_SERVERIP is not set # CONFIG_PROT_TCP is not set # CONFIG_IPV6 is not set +CONFIG_BOOTDEV_ETH=y +# CONFIG_NET_RANDOM_ETHADDR is not set +# CONFIG_WGET is not set +CONFIG_TFTP_BLOCKSIZE=1468 CONFIG_SYS_RX_ETH_BUFFER=4 # @@ -1102,6 +1233,7 @@ CONFIG_SYS_RX_ETH_BUFFER=4 # CONFIG_DM=y CONFIG_SPL_DM=y +CONFIG_TPL_DM=y # CONFIG_DM_WARN is not set # CONFIG_SPL_DM_WARN is not set # CONFIG_DM_DEBUG is not set @@ -1113,18 +1245,24 @@ CONFIG_DM_EVENT=y CONFIG_DM_STDIO=y CONFIG_DM_SEQ_ALIAS=y CONFIG_SPL_DM_SEQ_ALIAS=y +# CONFIG_TPL_DM_SEQ_ALIAS is not set CONFIG_SPL_DM_INLINE_OFNODE=y +CONFIG_TPL_DM_INLINE_OFNODE=y # CONFIG_DM_DMA is not set CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y +CONFIG_TPL_REGMAP=y CONFIG_SYSCON=y CONFIG_SPL_SYSCON=y +CONFIG_TPL_SYSCON=y # CONFIG_DEVRES is not set CONFIG_SIMPLE_BUS=y CONFIG_SPL_SIMPLE_BUS=y +# CONFIG_TPL_SIMPLE_BUS is not set # CONFIG_SIMPLE_BUS_CORRECT_RANGE is not set CONFIG_OF_TRANSLATE=y # CONFIG_SPL_OF_TRANSLATE is not set +# CONFIG_TPL_OF_TRANSLATE is not set # CONFIG_TRANSLATION_OFFSET is not set CONFIG_OFNODE_MULTI_TREE=y CONFIG_OFNODE_MULTI_TREE_MAX=4 @@ -1149,11 +1287,11 @@ CONFIG_SARADC_ROCKCHIP=y # CONFIG_BLK=y CONFIG_SPL_BLK=y +# CONFIG_TPL_BLK is not set CONFIG_BLOCK_CACHE=y # CONFIG_BLKMAP is not set # CONFIG_SPL_BLOCK_CACHE is not set # CONFIG_EFI_MEDIA is not set -# CONFIG_SPL_BLK_FS is not set # CONFIG_IDE is not set # CONFIG_LBA48 is not set # CONFIG_SYS_64BIT_LBA is not set @@ -1180,10 +1318,12 @@ CONFIG_BLOCK_CACHE=y # CONFIG_CLK=y CONFIG_SPL_CLK=y +CONFIG_TPL_CLK=y # CONFIG_SPL_CLK_CCF is not set # CONFIG_CLK_CCF is not set # CONFIG_CLK_GPIO is not set # CONFIG_SPL_CLK_GPIO is not set +# CONFIG_CLK_STUB is not set # CONFIG_CLK_CDCE9XX is not set # CONFIG_CLK_ICS8N3QV01 is not set # CONFIG_CLK_K210 is not set @@ -1193,6 +1333,7 @@ CONFIG_SPL_CLK=y # CONFIG_CLK_AT91 is not set # CONFIG_CLK_RCAR is not set # CONFIG_CLK_RCAR_CPG_LIB is not set +# CONFIG_CLK_SOPHGO_CV1800B is not set # CONFIG_CLK_SIFIVE is not set # CONFIG_CLK_TI_AM3_DPLL is not set # CONFIG_CLK_TI_CTRL is not set @@ -1262,6 +1403,7 @@ CONFIG_ARM_PSCI_FW=y # CONFIG_FWU_MDATA is not set CONFIG_GPIO=y CONFIG_SPL_DM_GPIO=y +CONFIG_TPL_DM_GPIO=y # CONFIG_GPIO_HOG is not set # CONFIG_SPL_GPIO_HOG is not set # CONFIG_DM_GPIO_LOOKUP_LABEL is not set @@ -1272,6 +1414,8 @@ CONFIG_SPL_DM_GPIO=y # CONFIG_AT91_GPIO is not set # CONFIG_ATMEL_PIO4 is not set # CONFIG_ASPEED_GPIO is not set +# CONFIG_ASPEED_SGPIO is not set +# CONFIG_ASPEED_G7_GPIO is not set # CONFIG_DA8XX_GPIO is not set # CONFIG_FXL6408_GPIO is not set # CONFIG_HIKEY_GPIO is not set @@ -1289,6 +1433,7 @@ CONFIG_SPL_DM_GPIO=y # CONFIG_MXC_GPIO is not set # CONFIG_MXS_GPIO is not set # CONFIG_NPCM_GPIO is not set +# CONFIG_NPCM_SGPIO is not set # CONFIG_CMD_PCA953X is not set # CONFIG_PCF8575_GPIO is not set CONFIG_ROCKCHIP_GPIO=y @@ -1318,6 +1463,7 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_I2C=y CONFIG_DM_I2C=y CONFIG_SPL_DM_I2C=y +# CONFIG_TPL_DM_I2C is not set CONFIG_I2C_CROS_EC_TUNNEL=y # CONFIG_I2C_CROS_EC_LDO is not set # CONFIG_I2C_SET_DEFAULT_BUS_NUM is not set @@ -1348,8 +1494,10 @@ CONFIG_I2C_MUX=y # CONFIG_I2C_MUX_GPIO is not set CONFIG_INPUT=y # CONFIG_SPL_INPUT is not set +# CONFIG_TPL_INPUT is not set CONFIG_DM_KEYBOARD=y # CONFIG_SPL_DM_KEYBOARD is not set +# CONFIG_TPL_DM_KEYBOARD is not set # CONFIG_APPLE_SPI_KEYB is not set # CONFIG_BUTTON_KEYBOARD is not set CONFIG_CROS_EC_KEYB=y @@ -1366,6 +1514,8 @@ CONFIG_CROS_EC_KEYB=y # LED Support # # CONFIG_LED is not set +# CONFIG_LED_BOOT is not set +# CONFIG_LED_ACTIVITY is not set # CONFIG_SPL_LED is not set # CONFIG_LED_STATUS is not set @@ -1386,6 +1536,7 @@ CONFIG_CROS_EC_KEYB=y # CONFIG_MISC=y CONFIG_SPL_MISC=y +CONFIG_TPL_MISC=y # CONFIG_NVMEM is not set # CONFIG_SPL_NVMEM is not set # CONFIG_ALTERA_SYSID is not set @@ -1400,9 +1551,11 @@ CONFIG_ROCKCHIP_IODOMAIN=y # CONFIG_VEXPRESS_CONFIG is not set CONFIG_CROS_EC=y # CONFIG_SPL_CROS_EC is not set +# CONFIG_TPL_CROS_EC is not set # CONFIG_CROS_EC_I2C is not set # CONFIG_CROS_EC_LPC is not set # CONFIG_SPL_CROS_EC_LPC is not set +# CONFIG_TPL_CROS_EC_LPC is not set CONFIG_CROS_EC_SPI=y # CONFIG_DS4510 is not set # CONFIG_FSL_SEC_MON is not set @@ -1440,6 +1593,7 @@ CONFIG_MMC_PWRSEQ=y # CONFIG_MMC_BROKEN_CD is not set CONFIG_DM_MMC=y CONFIG_SPL_DM_MMC=y +# CONFIG_TPL_DM_MMC is not set # CONFIG_MMC_SPI is not set # CONFIG_ARM_PL180_MMCI is not set CONFIG_MMC_QUIRKS=y @@ -1478,6 +1632,7 @@ CONFIG_MMC_SDHCI_ADMA_64BIT=y # CONFIG_MMC_SDHCI_NPCM is not set CONFIG_MMC_SDHCI_ROCKCHIP=y # CONFIG_MMC_SDHCI_S5P is not set +# CONFIG_MMC_SDHCI_SNPS is not set # CONFIG_MMC_SDHCI_STI is not set # CONFIG_MMC_SDHCI_XENON is not set # CONFIG_MMC_SDHCI_TANGIER is not set @@ -1498,7 +1653,6 @@ CONFIG_MTD=y # CONFIG_MTD_BLOCK is not set # CONFIG_SYS_MTDPARTS_RUNTIME is not set # CONFIG_FLASH_CFI_DRIVER is not set -# CONFIG_HBMC_AM654 is not set # CONFIG_SAMSUNG_ONENAND is not set # CONFIG_USE_SYS_MAX_FLASH_BANKS is not set # CONFIG_MTD_RAW_NAND is not set @@ -1508,8 +1662,6 @@ CONFIG_MTD=y # CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y -CONFIG_SF_DEFAULT_BUS=1 -CONFIG_SF_DEFAULT_CS=0 # CONFIG_BOOTDEV_SPI_FLASH is not set # CONFIG_SPI_FLASH_SFDP_SUPPORT is not set CONFIG_SPI_FLASH_SMART_HWCAPS=y @@ -1523,6 +1675,7 @@ CONFIG_SPI_FLASH_UNLOCK_ALL=y CONFIG_SPI_FLASH_GIGADEVICE=y # CONFIG_SPI_FLASH_ISSI is not set # CONFIG_SPI_FLASH_MACRONIX is not set +# CONFIG_SPI_FLASH_PUYA is not set # CONFIG_SPI_FLASH_SILICONKAISER is not set # CONFIG_SPI_FLASH_SPANSION is not set # CONFIG_SPI_FLASH_STMICRO is not set @@ -1691,6 +1844,7 @@ CONFIG_PINMUX=y # CONFIG_PINCONF is not set CONFIG_PINCONF_RECURSIVE=y CONFIG_SPL_PINCTRL=y +# CONFIG_TPL_PINCTRL is not set CONFIG_SPL_PINCTRL_FULL=y CONFIG_SPL_PINCTRL_GENERIC=y CONFIG_SPL_PINMUX=y @@ -1714,6 +1868,7 @@ CONFIG_POWER=y # CONFIG_POWER_LEGACY is not set # CONFIG_ACPI_PMC is not set # CONFIG_SPL_ACPI_PMC is not set +# CONFIG_TPL_ACPI_PMC is not set # # Power Domain Support @@ -1774,13 +1929,15 @@ CONFIG_DM_REGULATOR=y CONFIG_REGULATOR_PWM=y # CONFIG_SPL_REGULATOR_PWM is not set CONFIG_DM_REGULATOR_COMMON=y +CONFIG_SPL_DM_REGULATOR_COMMON=y CONFIG_DM_REGULATOR_FIXED=y -# CONFIG_SPL_DM_REGULATOR_FIXED is not set +CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y # CONFIG_SPL_DM_REGULATOR_GPIO is not set CONFIG_REGULATOR_RK8XX=y # CONFIG_DM_REGULATOR_PBIAS is not set # CONFIG_DM_REGULATOR_TPS62360 is not set +# CONFIG_DM_REGULATOR_TPS6287X is not set # CONFIG_DM_REGULATOR_ANATOP is not set # CONFIG_DM_REGULATOR_SCMI is not set # CONFIG_TPS6586X_POWER is not set @@ -1801,6 +1958,7 @@ CONFIG_PWM_ROCKCHIP=y # CONFIG_U_QE is not set CONFIG_RAM=y CONFIG_SPL_RAM=y +CONFIG_TPL_RAM=y # CONFIG_STM32_SDRAM is not set # CONFIG_MPC83XX_SDRAM is not set # CONFIG_K3_DDRSS is not set @@ -1849,6 +2007,7 @@ CONFIG_RNG_ROCKCHIP=y # # CONFIG_DM_RTC is not set # CONFIG_SPL_DM_RTC is not set +# CONFIG_TPL_DM_RTC is not set # CONFIG_RTC_ENABLE_32KHZ_OUTPUT is not set # CONFIG_RTC_DS1337 is not set # CONFIG_RTC_DS1338 is not set @@ -1856,7 +2015,6 @@ CONFIG_RNG_ROCKCHIP=y # CONFIG_RTC_DS3231 is not set # CONFIG_RTC_PCF8563 is not set # CONFIG_RTC_PT7C4338 is not set -# CONFIG_RTC_PL031 is not set # CONFIG_RTC_S35392A is not set # CONFIG_RTC_MC13XXX is not set # CONFIG_RTC_MC146818 is not set @@ -1869,15 +2027,18 @@ CONFIG_REQUIRE_SERIAL_CONSOLE=y # CONFIG_SPECIFY_CONSOLE_INDEX is not set CONFIG_SERIAL_PRESENT=y CONFIG_SPL_SERIAL_PRESENT=y +CONFIG_TPL_SERIAL_PRESENT=y CONFIG_DM_SERIAL=y # CONFIG_SERIAL_RX_BUFFER is not set # CONFIG_SERIAL_PUTS is not set # CONFIG_SERIAL_SEARCH_ALL is not set # CONFIG_SERIAL_PROBE_ALL is not set CONFIG_SPL_DM_SERIAL=y +CONFIG_TPL_DM_SERIAL=y # CONFIG_VPL_DM_SERIAL is not set CONFIG_DEBUG_UART_NS16550=y CONFIG_SPL_DEBUG_UART_BASE=0xff1a0000 +CONFIG_TPL_DEBUG_UART_BASE=0xff1a0000 CONFIG_DEBUG_UART_SHIFT=2 # CONFIG_DEBUG_UART_ANNOUNCE is not set # CONFIG_DEBUG_UART_SKIP_INIT is not set @@ -1935,27 +2096,18 @@ CONFIG_SPI_MEM=y # CONFIG_ALTERA_SPI is not set # CONFIG_APPLE_SPI is not set # CONFIG_ATCSPI200_SPI is not set -# CONFIG_ATMEL_SPI is not set -# CONFIG_BCMSTB_SPI is not set # CONFIG_CORTINA_SFLASH is not set # CONFIG_CADENCE_QSPI is not set -# CONFIG_CF_SPI is not set # CONFIG_CV1800B_SPIF is not set # CONFIG_DESIGNWARE_SPI is not set -# CONFIG_EXYNOS_SPI is not set -# CONFIG_FSL_DSPI is not set # CONFIG_FSL_QSPI is not set # CONFIG_GXP_SPI is not set -# CONFIG_ICH_SPI is not set # CONFIG_IPROC_QSPI is not set -# CONFIG_KIRKWOOD_SPI is not set # CONFIG_MICROCHIP_COREQSPI is not set -# CONFIG_MPC8XXX_SPI is not set # CONFIG_MTK_SNOR is not set # CONFIG_MTK_SNFI_SPI is not set # CONFIG_MTK_SPIM is not set # CONFIG_MVEBU_A3700_SPI is not set -# CONFIG_MXS_SPI is not set # CONFIG_SPI_MXIC is not set # CONFIG_NPCM_FIU_SPI is not set # CONFIG_NPCM_PSPI is not set @@ -1969,17 +2121,11 @@ CONFIG_ROCKCHIP_SPI=y # CONFIG_SOFT_SPI is not set # CONFIG_SPI_SN_F_OSPI is not set # CONFIG_SPI_SUNXI is not set -# CONFIG_TEGRA114_SPI is not set -# CONFIG_TEGRA20_SFLASH is not set -# CONFIG_TEGRA20_SLINK is not set -# CONFIG_TEGRA210_QSPI is not set -# CONFIG_TI_QSPI is not set # CONFIG_XILINX_SPI is not set # CONFIG_ZYNQ_SPI is not set # CONFIG_ZYNQ_QSPI is not set # CONFIG_ZYNQMP_GQSPI is not set -# CONFIG_SH_QSPI is not set -# CONFIG_MXC_SPI is not set +# CONFIG_SPI_STACKED_PARALLEL is not set # # SPMI support @@ -1992,6 +2138,7 @@ CONFIG_ROCKCHIP_SPI=y # CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y +CONFIG_TPL_SYSRESET=y CONFIG_SYSRESET_CMD_RESET=y CONFIG_SYSRESET_CMD_POWEROFF=y # CONFIG_SYSRESET_CV1800B is not set @@ -2027,6 +2174,7 @@ CONFIG_USB_HOST=y CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DWC3 is not set # CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set +# CONFIG_USB_XHCI_GENERIC is not set # CONFIG_USB_XHCI_FSL is not set # CONFIG_USB_XHCI_BRCM is not set CONFIG_USB_EHCI_HCD=y @@ -2055,6 +2203,7 @@ CONFIG_USB_DWC3_GENERIC=y # CONFIG_SPL_USB_DWC3_GENERIC is not set # CONFIG_USB_DWC3_AM62 is not set # CONFIG_USB_DWC3_LAYERSCAPE is not set +# CONFIG_USB_DWC3_STI is not set # # PHY Subsystem @@ -2079,6 +2228,7 @@ CONFIG_USB_DWC3_GENERIC=y # # CONFIG_TWL4030_USB is not set # CONFIG_ROCKCHIP_USB2_PHY is not set +# CONFIG_TYPEC_TCPM is not set # # ULPI drivers @@ -2159,6 +2309,7 @@ CONFIG_SIMPLE_PANEL=y # CONFIG_VIDEO_LCD_RENESAS_R61307 is not set # CONFIG_VIDEO_LCD_RENESAS_R69328 is not set # CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02 is not set +# CONFIG_VIDEO_LCD_SHARP_LQ101R1SX01 is not set # CONFIG_VIDEO_LCD_SSD2828 is not set # CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set # CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set @@ -2248,7 +2399,6 @@ CONFIG_FS_FAT_MAX_CLUSTSIZE=65536 # CONFIG_UBIFS_SILENCE_MSG is not set # CONFIG_UBIFS_SILENCE_DEBUG_DUMP is not set # CONFIG_FS_CRAMFS is not set -# CONFIG_YAFFS2 is not set # CONFIG_FS_SQUASHFS is not set # CONFIG_FS_EROFS is not set @@ -2260,6 +2410,7 @@ CONFIG_FS_FAT_MAX_CLUSTSIZE=65536 # CONFIG_PHYSMEM is not set # CONFIG_BCH is not set # CONFIG_BINMAN_FDT is not set +CONFIG_BINMAN_DTB="" # CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED is not set CONFIG_CHARSET=y # CONFIG_DYNAMIC_CRC_TABLE is not set @@ -2270,12 +2421,16 @@ CONFIG_SPL_LIB_UUID=y # CONFIG_SPL_SEMIHOSTING is not set CONFIG_PRINTF=y CONFIG_SPL_PRINTF=y +CONFIG_TPL_PRINTF=y CONFIG_SPRINTF=y CONFIG_SPL_SPRINTF=y +CONFIG_TPL_SPRINTF=y CONFIG_STRTO=y CONFIG_SPL_STRTO=y +CONFIG_TPL_STRTO=y CONFIG_SYS_HZ=1000 CONFIG_SPL_USE_TINY_PRINTF=y +CONFIG_TPL_USE_TINY_PRINTF=y CONFIG_PANIC_HANG=y CONFIG_REGEX=y CONFIG_LIB_RAND=y @@ -2284,19 +2439,48 @@ CONFIG_SUPPORT_ACPI=y # CONFIG_ACPI is not set # CONFIG_SPL_ACPI is not set # CONFIG_SPL_TINY_MEMSET is not set +CONFIG_TPL_TINY_MEMSET=y # CONFIG_BITREVERSE is not set # CONFIG_TRACE is not set # CONFIG_CIRCBUF is not set CONFIG_CMD_DHRYSTONE=y # +# Alternative crypto libraries +# +CONFIG_LEGACY_HASHING_AND_CRYPTO=y +# CONFIG_MBEDTLS_LIB is not set +CONFIG_LEGACY_HASHING=y +CONFIG_SHA1_LEGACY=y +CONFIG_SHA256_LEGACY=y +CONFIG_MD5_LEGACY=y +CONFIG_LEGACY_CRYPTO=y +CONFIG_SPL_LEGACY_HASHING_AND_CRYPTO=y +# CONFIG_SPL_MBEDTLS_LIB is not set +CONFIG_SPL_LEGACY_HASHING=y +CONFIG_SPL_SHA1_LEGACY=y +CONFIG_SPL_SHA256_LEGACY=y +CONFIG_SPL_LEGACY_CRYPTO=y +CONFIG_TPL_LEGACY_HASHING_AND_CRYPTO=y +# CONFIG_TPL_MBEDTLS_LIB is not set +CONFIG_TPL_LEGACY_HASHING=y + +# # Security support # # CONFIG_AES is not set # CONFIG_ECDSA is not set -# CONFIG_RSA is not set +CONFIG_RSA=y +CONFIG_SPL_RSA=y +CONFIG_SPL_RSA_VERIFY=y +CONFIG_RSA_VERIFY=y +# CONFIG_RSA_VERIFY_WITH_PKEY is not set +# CONFIG_SPL_RSA_VERIFY_WITH_PKEY is not set +CONFIG_RSA_SOFTWARE_EXP=y +# CONFIG_ASYMMETRIC_KEY_TYPE is not set # CONFIG_TPM is not set # CONFIG_SPL_TPM is not set +# CONFIG_TPL_TPM is not set # # Android Verified Boot @@ -2320,7 +2504,9 @@ CONFIG_SPL_SHA256=y CONFIG_MD5=y # CONFIG_SPL_MD5 is not set CONFIG_CRC8=y -# CONFIG_SPL_CRC8 is not set +CONFIG_SPL_CRC8=y +# CONFIG_TPL_CRC8 is not set +CONFIG_CRC16=y # CONFIG_SPL_CRC16 is not set CONFIG_CRC32=y @@ -2337,10 +2523,13 @@ CONFIG_ZLIB=y # CONFIG_ZSTD is not set # CONFIG_SPL_BZIP2 is not set # CONFIG_SPL_LZ4 is not set +# CONFIG_TPL_LZ4 is not set # CONFIG_SPL_LZMA is not set +# CONFIG_TPL_LZMA is not set CONFIG_VPL_LZMA=y # CONFIG_SPL_LZO is not set # CONFIG_SPL_GZIP is not set +# CONFIG_TPL_GZIP is not set # CONFIG_SPL_ZSTD is not set CONFIG_ERRNO_STR=y # CONFIG_HEXDUMP is not set @@ -2349,49 +2538,26 @@ CONFIG_OF_LIBFDT=y CONFIG_OF_LIBFDT_ASSUME_MASK=0x0 CONFIG_SYS_FDT_PAD=0x3000 CONFIG_SPL_OF_LIBFDT=y -CONFIG_SPL_OF_LIBFDT_ASSUME_MASK=0xff +CONFIG_TPL_OF_LIBFDT=y +CONFIG_TPL_OF_LIBFDT_ASSUME_MASK=0xff # # System tables # +# CONFIG_BLOBLIST_TABLES is not set CONFIG_GENERATE_SMBIOS_TABLE=y +# CONFIG_GENERATE_SMBIOS_TABLE_VERBOSE is not set # CONFIG_LIB_RATIONAL is not set # CONFIG_SPL_LIB_RATIONAL is not set CONFIG_SMBIOS=y # CONFIG_SMBIOS_PARSER is not set -CONFIG_EFI_LOADER=y -CONFIG_EFI_BINARY_EXEC=y -CONFIG_EFI_BOOTMGR=y -# CONFIG_EFI_VARIABLE_FILE_STORE is not set -CONFIG_EFI_VARIABLE_NO_STORE=y -# CONFIG_EFI_VARIABLES_PRESEED is not set -CONFIG_EFI_VAR_BUF_SIZE=131072 -# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set -# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set -# CONFIG_EFI_CAPSULE_ON_DISK is not set -CONFIG_EFI_CAPSULE_MAX=15 -CONFIG_EFI_DEVICE_PATH_TO_TEXT=y -CONFIG_EFI_DEVICE_PATH_UTIL=y -CONFIG_EFI_DT_FIXUP=y -CONFIG_EFI_LOADER_HII=y -CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y -CONFIG_EFI_UNICODE_CAPITALIZATION=y -# CONFIG_EFI_LOADER_BOUNCE_BUFFER is not set -CONFIG_EFI_PLATFORM_LANG_CODES="en-US" -CONFIG_EFI_HAVE_RUNTIME_RESET=y -CONFIG_EFI_RNG_PROTOCOL=y -CONFIG_EFI_LOAD_FILE2_INITRD=y -CONFIG_EFI_ECPT=y -CONFIG_EFI_EBBR_2_1_CONFORMANCE=y -# CONFIG_EFI_HTTP_BOOT is not set # CONFIG_OPTEE_LIB is not set # CONFIG_OPTEE_IMAGE is not set # CONFIG_BOOTM_OPTEE is not set # CONFIG_TEST_FDTDEC is not set CONFIG_LIB_ELF=y CONFIG_LMB=y -CONFIG_LMB_USE_MAX_REGIONS=y -CONFIG_LMB_MAX_REGIONS=16 +# CONFIG_LMB_ARCH_MEM_MAP is not set # CONFIG_PHANDLE_CHECK_SEQ is not set # @@ -2405,6 +2571,7 @@ CONFIG_LMB_MAX_REGIONS=16 # Tools options # CONFIG_MKIMAGE_DTC_PATH="dtc" +CONFIG_TOOLS_CRC16=y CONFIG_TOOLS_CRC32=y CONFIG_TOOLS_LIBCRYPTO=y CONFIG_TOOLS_KWBIMAGE=y diff --git a/config/u-boot/gru_kevin/target.cfg b/config/u-boot/gru_kevin/target.cfg index e19603c2..0c90e338 100644 --- a/config/u-boot/gru_kevin/target.cfg +++ b/config/u-boot/gru_kevin/target.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later tree="default" -xtree="default" +xgcctree="default" xarch="aarch64-elf arm-eabi" diff --git a/config/u-boot/i386coreboot/target.cfg b/config/u-boot/i386coreboot/target.cfg index 71cdde44..213049fe 100644 --- a/config/u-boot/i386coreboot/target.cfg +++ b/config/u-boot/i386coreboot/target.cfg @@ -2,6 +2,6 @@ tree="x86" # test building with x86_64 hostcc by commenting these: -# xtree="default" # coreboot tree containing crossgcc +# xgcctree="default" # coreboot tree containing crossgcc # xarch="i386-elf" # or uncomment them to use crossgcc(buggy) diff --git a/config/u-boot/qemu_arm64_12mb/config/default b/config/u-boot/qemu_arm64_12mb/config/default index 4824cc79..2cd0b94c 100644 --- a/config/u-boot/qemu_arm64_12mb/config/default +++ b/config/u-boot/qemu_arm64_12mb/config/default @@ -1,12 +1,13 @@ # # Automatically generated file; DO NOT EDIT. -# U-Boot 2024.10 Configuration +# U-Boot 2025.04 Configuration # # -# Compiler: gcc (Debian 12.2.0-14) 12.2.0 +# Compiler: gcc (Debian 14.2.0-19) 14.2.0 # CONFIG_CREATE_ARCH_SYMLINK=y +CONFIG_HAVE_SETJMP=y CONFIG_SUPPORT_LITTLE_ENDIAN=y CONFIG_SYS_CACHE_SHIFT_6=y CONFIG_64BIT=y @@ -46,6 +47,7 @@ CONFIG_ARM64_CRC32=y CONFIG_COUNTER_FREQUENCY=0 CONFIG_POSITION_INDEPENDENT=y # CONFIG_INIT_SP_RELATIVE is not set +# CONFIG_DRIVER_GICV2 is not set # CONFIG_GIC_V3_ITS is not set # CONFIG_GICV3_SUPPORT_GIC600 is not set CONFIG_STATIC_RELA=y @@ -90,6 +92,7 @@ CONFIG_ARM64_SUPPORT_AARCH32=y # CONFIG_ARCH_OMAP2PLUS is not set # CONFIG_ARCH_MESON is not set # CONFIG_ARCH_MEDIATEK is not set +# CONFIG_ARCH_MMP is not set # CONFIG_ARCH_LPC32XX is not set # CONFIG_ARCH_IMX8 is not set # CONFIG_ARCH_IMX8M is not set @@ -173,10 +176,10 @@ CONFIG_ARCH_QEMU=y # CONFIG_TARGET_PRESIDIO_ASIC is not set # CONFIG_TARGET_XENGUEST_ARM64 is not set # CONFIG_ARCH_GXP is not set -# CONFIG_STATIC_MACH_TYPE is not set CONFIG_TEXT_BASE=0x50000000 CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_BLOBLIST_SIZE_RELOC=0x2000 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SOURCE_FILE="" CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -184,6 +187,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000 CONFIG_ENV_SIZE=0x40000 # CONFIG_DM_GPIO is not set CONFIG_DEFAULT_DEVICE_TREE="qemu-arm64" +CONFIG_DDR_SI_TEST=y CONFIG_BOARD_SPECIFIC_OPTIONS=y # CONFIG_OF_LIBFDT_OVERLAY is not set CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000 @@ -191,6 +195,9 @@ CONFIG_MULTI_DTB_FIT_UNCOMPRESS_SZ=0x8000 CONFIG_SYS_MONITOR_LEN=0 # CONFIG_TARGET_QEMU_ARM_32BIT is not set CONFIG_TARGET_QEMU_ARM_64BIT=y +# CONFIG_TARGET_QEMU_ARM_SBSA is not set +CONFIG_SYS_BOOTM_LEN=0x4000000 +CONFIG_SYS_LOAD_ADDR=0x40200000 CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_ERR_PTR_OFFSET=0x0 CONFIG_PRE_CON_BUF_ADDR=0x40100000 @@ -217,15 +224,7 @@ CONFIG_PSCI_RESET=y CONFIG_ARMV8_CRYPTO=y CONFIG_ARMV8_CE_SHA1=y CONFIG_ARMV8_CE_SHA256=y -# CONFIG_CMD_DEKBLOB is not set -# CONFIG_IMX_CAAM_DEK_ENCAP is not set -# CONFIG_IMX_OPTEE_DEK_ENCAP is not set -# CONFIG_IMX_SECO_DEK_ENCAP is not set -# CONFIG_IMX_ELE_DEK_ENCAP is not set -# CONFIG_CMD_HDMIDETECT is not set -CONFIG_IMX_DCD_ADDR=0x00910000 CONFIG_SYS_MEM_TOP_HIDE=0x0 -CONFIG_SYS_LOAD_ADDR=0x40200000 CONFIG_MTDPARTS_NOR0="64m(u-boot)" CONFIG_MTDPARTS_NOR1="64m(u-boot-env)" @@ -253,7 +252,7 @@ CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=120200 +CONFIG_GCC_VERSION=140200 CONFIG_CLANG_VERSION=0 CONFIG_CC_OPTIMIZE_FOR_SIZE=y # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set @@ -279,8 +278,6 @@ CONFIG_FDT_64BIT=y # CONFIG_SYS_CUSTOM_LDSCRIPT is not set CONFIG_PLATFORM_ELFENTRY="_start" CONFIG_STACK_SIZE=0x1000000 -CONFIG_SYS_SRAM_BASE=0x0 -CONFIG_SYS_SRAM_SIZE=0x0 # CONFIG_MP is not set CONFIG_HAVE_TEXT_BASE=y # CONFIG_HAVE_SYS_UBOOT_START is not set @@ -295,6 +292,69 @@ CONFIG_SYS_MONITOR_BASE=0x50000000 # # +# UEFI Support +# +CONFIG_EFI_LOADER=y +CONFIG_EFI_BINARY_EXEC=y +# CONFIG_EFI_SECURE_BOOT is not set + +# +# UEFI services +# +CONFIG_EFI_GET_TIME=y +CONFIG_EFI_SET_TIME=y +CONFIG_EFI_HAVE_RUNTIME_RESET=y + +# +# UEFI Variables +# +CONFIG_EFI_VARIABLE_FILE_STORE=y +# CONFIG_EFI_RT_VOLATILE_STORE is not set +# CONFIG_EFI_VARIABLE_NO_STORE is not set +# CONFIG_EFI_VARIABLES_PRESEED is not set +CONFIG_EFI_VAR_BUF_SIZE=131072 +CONFIG_EFI_PLATFORM_LANG_CODES="en-US" + +# +# Capsule support +# +# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set +# CONFIG_EFI_CAPSULE_ON_DISK is not set +CONFIG_EFI_CAPSULE_MAX=15 + +# +# UEFI protocol support +# +CONFIG_EFI_DEVICE_PATH_TO_TEXT=y +CONFIG_EFI_DEVICE_PATH_UTIL=y +CONFIG_EFI_DT_FIXUP=y +CONFIG_EFI_LOADER_HII=y +CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y +CONFIG_EFI_UNICODE_CAPITALIZATION=y +CONFIG_EFI_RNG_PROTOCOL=y +CONFIG_EFI_TCG2_PROTOCOL=y +# CONFIG_EFI_TCG2_PROTOCOL_MEASURE_DTB is not set +CONFIG_EFI_LOAD_FILE2_INITRD=y +CONFIG_EFI_IP4_CONFIG2_PROTOCOL=y +CONFIG_EFI_HTTP_PROTOCOL=y + +# +# Misc options +# +# CONFIG_EFI_LOADER_BOUNCE_BUFFER is not set +CONFIG_EFI_ECPT=y +CONFIG_EFI_EBBR_2_1_CONFORMANCE=y +# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set + +# +# EFI bootmanager +# +CONFIG_EFI_BOOTMGR=y +CONFIG_EFI_HTTP_BOOT=y +CONFIG_BOOTEFI_HELLO_COMPILE=y +CONFIG_BOOTEFI_TESTAPP_COMPILE=y + +# # Boot images # # CONFIG_ANDROID_BOOT_IMAGE is not set @@ -318,6 +378,7 @@ CONFIG_BOOTSTD=y CONFIG_BOOTSTD_FULL=y CONFIG_BOOTSTD_DEFAULTS=y CONFIG_BOOTSTD_BOOTCOMMAND=y +CONFIG_BOOTSTD_MENU=y CONFIG_BOOTMETH_GLOBAL=y # CONFIG_BOOTMETH_ANDROID is not set # CONFIG_BOOTMETH_CROS is not set @@ -330,12 +391,13 @@ CONFIG_BOOTMETH_VBE=y CONFIG_BOOTMETH_DISTRO=y CONFIG_BOOTMETH_VBE_REQUEST=y CONFIG_BOOTMETH_VBE_SIMPLE=y +# CONFIG_BOOTMETH_VBE_ABREC is not set CONFIG_BOOTMETH_VBE_SIMPLE_OS=y CONFIG_EXPO=y CONFIG_BOOTMETH_SCRIPT=y +# CONFIG_UPL is not set CONFIG_LEGACY_IMAGE_FORMAT=y # CONFIG_MEASURED_BOOT is not set -CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_CHROMEOS is not set # CONFIG_CHROMEOS_VBOOT is not set @@ -464,6 +526,7 @@ CONFIG_PCI_INIT_R=y # Security support # CONFIG_HASH=y +# CONFIG_HASH_CRC8 is not set # CONFIG_STACKPROTECTOR is not set # CONFIG_BOARD_RNG_SEED is not set @@ -480,7 +543,10 @@ CONFIG_UPDATE_LOAD_ADDR=0x100000 # # Blob list # -# CONFIG_BLOBLIST is not set +CONFIG_BLOBLIST=y +# CONFIG_BLOBLIST_FIXED is not set +CONFIG_BLOBLIST_ALLOC=y +CONFIG_BLOBLIST_SIZE=0x400 CONFIG_IMAGE_SIGN_INFO=y CONFIG_CMDLINE=y CONFIG_HUSH_PARSER=y @@ -510,6 +576,7 @@ CONFIG_CMD_BDI=y # CONFIG_CMD_BDINFO_EXTRA is not set # CONFIG_CMD_CONFIG is not set CONFIG_CMD_CONSOLE=y +# CONFIG_CMD_UFETCH is not set # CONFIG_CMD_HISTORY is not set # CONFIG_CMD_LICENSE is not set # CONFIG_CMD_PMC is not set @@ -523,8 +590,9 @@ CONFIG_CMD_BOOTM=y CONFIG_CMD_BOOTDEV=y CONFIG_CMD_BOOTFLOW=y CONFIG_CMD_BOOTFLOW_FULL=y -CONFIG_CMD_BOOTFLOW_BOOTDELAY=8 +CONFIG_CMD_BOOTFLOW_BOOTDELAY=30 CONFIG_CMD_BOOTMETH=y +CONFIG_CMD_BOOTSTD=y CONFIG_BOOTM_EFI=y CONFIG_BOOTM_ELF=y CONFIG_CMD_BOOTZ=y @@ -535,17 +603,18 @@ CONFIG_BOOTM_NETBSD=y # CONFIG_BOOTM_OSE is not set CONFIG_BOOTM_PLAN9=y CONFIG_BOOTM_RTEMS=y +# CONFIG_CMD_UPL is not set CONFIG_CMD_VBE=y CONFIG_BOOTM_VXWORKS=y CONFIG_CMD_BOOTEFI=y CONFIG_CMD_BOOTEFI_BINARY=y CONFIG_CMD_BOOTEFI_BOOTMGR=y -CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y CONFIG_CMD_BOOTEFI_HELLO=y CONFIG_CMD_BOOTEFI_SELFTEST=y # CONFIG_CMD_BOOTMENU is not set # CONFIG_CMD_ADTIMG is not set CONFIG_CMD_ELF=y +CONFIG_CMD_ELF_BOOTVX=y # CONFIG_CMD_ELF_FDT_SETUP is not set CONFIG_CMD_FDT=y CONFIG_CMD_GO=y @@ -578,6 +647,7 @@ CONFIG_CMD_NVEDIT_EFI=y # Memory commands # # CONFIG_CMD_BINOP is not set +CONFIG_CMD_BLOBLIST=y CONFIG_CMD_CRC32=y # CONFIG_CRC32_VERIFY is not set # CONFIG_LOOPW is not set @@ -605,7 +675,6 @@ CONFIG_CMD_UNZIP=y # CONFIG_CMD_ARMFLASH is not set # CONFIG_CMD_BCB is not set # CONFIG_CMD_BIND is not set -# CONFIG_CMD_CLK is not set # CONFIG_CMD_DEMO is not set CONFIG_CMD_DFU=y CONFIG_CMD_DM=y @@ -631,7 +700,6 @@ CONFIG_CMD_MTD=y # CONFIG_CMD_MTD_OTP is not set CONFIG_CMD_NVME=y # CONFIG_CMD_ONENAND is not set -# CONFIG_CMD_OSD is not set CONFIG_CMD_PART=y CONFIG_CMD_PCI=y # CONFIG_CMD_PCI_MPS is not set @@ -641,7 +709,6 @@ CONFIG_CMD_POWEROFF=y CONFIG_CMD_SCSI=y # CONFIG_CMD_SDRAM is not set CONFIG_CMD_USB=y -# CONFIG_CMD_USB_SDP is not set # CONFIG_CMD_RKMTD is not set CONFIG_CMD_VIRTIO=y # CONFIG_CMD_WRITE is not set @@ -656,13 +723,8 @@ CONFIG_CMD_SOURCE=y CONFIG_CMD_SETEXPR=y # CONFIG_CMD_SETEXPR_FMT is not set # CONFIG_CMD_XXD is not set - -# -# Android support commands -# CONFIG_CMD_NET=y CONFIG_CMD_BOOTP=y -CONFIG_CMD_DHCP=y # CONFIG_BOOTP_MAY_FAIL is not set CONFIG_BOOTP_BOOTPATH=y # CONFIG_BOOTP_VENDOREX is not set @@ -680,23 +742,24 @@ CONFIG_BOOTP_PXE=y CONFIG_BOOTP_PXE_CLIENTARCH=0x16 # CONFIG_BOOTP_PXE_DHCP_OPTION is not set CONFIG_BOOTP_VCI_STRING="U-Boot.armv8" -CONFIG_CMD_TFTPBOOT=y # CONFIG_CMD_TFTPPUT is not set # CONFIG_CMD_TFTPSRV is not set CONFIG_NET_TFTP_VARS=y # CONFIG_CMD_RARP is not set # CONFIG_CMD_NFS is not set # CONFIG_SYS_DISABLE_AUTOLOAD is not set -CONFIG_CMD_WGET=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y # CONFIG_CMD_CDP is not set # CONFIG_CMD_SNTP is not set -CONFIG_CMD_DNS=y # CONFIG_CMD_LINK_LOCAL is not set # CONFIG_CMD_ETHSW is not set -CONFIG_CMD_PXE=y # CONFIG_CMD_WOL is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_DNS=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_TFTPBOOT=y +CONFIG_CMD_WGET=y +CONFIG_CMD_PXE=y # # Misc commands @@ -787,6 +850,7 @@ CONFIG_CMD_CYCLIC=y # CONFIG_PARTITIONS=y # CONFIG_MAC_PARTITION is not set +# CONFIG_TEGRA_PARTITION is not set CONFIG_DOS_PARTITION=y CONFIG_ISO_PARTITION=y # CONFIG_AMIGA_PARTITION is not set @@ -812,6 +876,7 @@ CONFIG_OF_HAS_PRIOR_STAGE=y CONFIG_OF_OMIT_DTB=y CONFIG_DEVICE_TREE_INCLUDES="" CONFIG_OF_LIST="qemu-arm64" +CONFIG_OF_OVERLAY_LIST="" # CONFIG_MULTI_DTB_FIT is not set CONFIG_OF_TAG_MIGRATE=y # CONFIG_OF_DTB_PROPS_REMOVE is not set @@ -820,6 +885,7 @@ CONFIG_OF_TAG_MIGRATE=y # Environment # CONFIG_ENV_SUPPORT=y +CONFIG_ENV_CALLBACK_LIST_STATIC="" CONFIG_SAVEENV=y # CONFIG_ENV_OVERWRITE is not set # CONFIG_OVERWRITE_ETHADDR_ONCE is not set @@ -846,17 +912,20 @@ CONFIG_ENV_IS_NOWHERE=y # CONFIG_USE_ETHPRIME is not set # CONFIG_USE_HOSTNAME is not set # CONFIG_VERSION_VARIABLE is not set + +# +# Networking +# +# CONFIG_NO_NET is not set CONFIG_NET=y +# CONFIG_NET_LWIP is not set CONFIG_ARP_TIMEOUT=5000 CONFIG_NET_RETRY_COUNT=5 # CONFIG_PROT_UDP is not set -CONFIG_BOOTDEV_ETH=y # CONFIG_BOOTP_SEND_HOSTNAME is not set -# CONFIG_NET_RANDOM_ETHADDR is not set # CONFIG_NETCONSOLE is not set # CONFIG_IP_DEFRAG is not set # CONFIG_SYS_FAULT_ECHO_LINK_DOWN is not set -CONFIG_TFTP_BLOCKSIZE=1468 # CONFIG_TFTP_PORT is not set CONFIG_TFTP_WINDOWSIZE=1 # CONFIG_TFTP_TSIZE is not set @@ -874,6 +943,10 @@ CONFIG_BOOTP_MAX_ROOT_PATH_LEN=64 CONFIG_PROT_TCP=y # CONFIG_PROT_TCP_SACK is not set # CONFIG_IPV6 is not set +CONFIG_BOOTDEV_ETH=y +# CONFIG_NET_RANDOM_ETHADDR is not set +CONFIG_WGET=y +CONFIG_TFTP_BLOCKSIZE=1468 CONFIG_SYS_RX_ETH_BUFFER=4 # @@ -913,6 +986,7 @@ CONFIG_AHCI_PCI=y # CONFIG_DWC_AHCI is not set # CONFIG_DWC_AHSATA is not set # CONFIG_MTK_AHCI is not set +# CONFIG_AHCI_GENERIC is not set # CONFIG_SUNXI_AHCI is not set # CONFIG_AXI is not set @@ -984,6 +1058,7 @@ CONFIG_DFU_TFTP=y CONFIG_DFU_MTD=y CONFIG_DFU_RAM=y # CONFIG_DFU_VIRT is not set +# CONFIG_DFU_SCSI is not set CONFIG_SET_DFU_ALT_INFO=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x800000 CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000 @@ -1027,6 +1102,8 @@ CONFIG_ARM_PSCI_FW=y CONFIG_GPIO=y # CONFIG_AT91_GPIO is not set # CONFIG_ASPEED_GPIO is not set +# CONFIG_ASPEED_SGPIO is not set +# CONFIG_ASPEED_G7_GPIO is not set # CONFIG_DA8XX_GPIO is not set # CONFIG_INTEL_BROADWELL_GPIO is not set # CONFIG_IMX_RGPIO2P is not set @@ -1075,6 +1152,8 @@ CONFIG_DM_KEYBOARD=y # LED Support # # CONFIG_LED is not set +# CONFIG_LED_BOOT is not set +# CONFIG_LED_ACTIVITY is not set # CONFIG_LED_STATUS is not set # @@ -1110,7 +1189,6 @@ CONFIG_DM_KEYBOARD=y # CONFIG_WINBOND_W83627 is not set CONFIG_QFW=y CONFIG_QFW_MMIO=y -CONFIG_QFW_SMBIOS=y # CONFIG_FS_LOADER is not set # @@ -1118,7 +1196,6 @@ CONFIG_QFW_SMBIOS=y # # CONFIG_MMC is not set # CONFIG_MMC_BROKEN_CD is not set -# CONFIG_DM_MMC is not set # CONFIG_FSL_ESDHC is not set # CONFIG_FSL_ESDHC_IMX is not set @@ -1251,6 +1328,7 @@ CONFIG_PCI_ENHANCED_ALLOCATION=y CONFIG_PCIE_ECAM_GENERIC=y # CONFIG_PCIE_ECAM_SYNQUACER is not set # CONFIG_PCI_FTPCI100 is not set +# CONFIG_PCIE_CDNS_TI is not set # CONFIG_PCI_PHYTIUM is not set # CONFIG_PCIE_FSL is not set # CONFIG_PCI_MPC85XX is not set @@ -1426,7 +1504,12 @@ CONFIG_PL01X_SERIAL=y # SPMI support # # CONFIG_SPMI is not set -# CONFIG_SYSINFO is not set +CONFIG_SYSINFO=y +# CONFIG_SYSINFO_EXTRA is not set +# CONFIG_SYSINFO_GAZERBEAM is not set +# CONFIG_SYSINFO_SANDBOX is not set +CONFIG_SYSINFO_SMBIOS=y +# CONFIG_SYSINFO_GPIO is not set # # System reset device drivers @@ -1459,6 +1542,7 @@ CONFIG_TPM_V1=y # CONFIG_TPM_LIST_RESOURCES is not set CONFIG_TPM_V2=y CONFIG_TPM2_MMIO=y +CONFIG_TPM2_EVENT_LOG_SIZE=65536 CONFIG_USB=y CONFIG_DM_USB=y # CONFIG_DM_USB_GADGET is not set @@ -1470,6 +1554,7 @@ CONFIG_USB_HOST=y CONFIG_USB_XHCI_HCD=y # CONFIG_USB_XHCI_DWC3 is not set # CONFIG_USB_XHCI_DWC3_OF_SIMPLE is not set +# CONFIG_USB_XHCI_GENERIC is not set CONFIG_USB_XHCI_PCI=y # CONFIG_USB_XHCI_FSL is not set # CONFIG_USB_XHCI_BRCM is not set @@ -1504,6 +1589,7 @@ CONFIG_USB_EHCI_PCI=y # # CONFIG_TWL4030_USB is not set # CONFIG_ROCKCHIP_USB2_PHY is not set +# CONFIG_TYPEC_TCPM is not set # # ULPI drivers @@ -1578,6 +1664,7 @@ CONFIG_VIDEO_BOCHS_SIZE_Y=1024 # CONFIG_VIDEO_LCD_RENESAS_R61307 is not set # CONFIG_VIDEO_LCD_RENESAS_R69328 is not set # CONFIG_VIDEO_LCD_SAMSUNG_LTL106HL02 is not set +# CONFIG_VIDEO_LCD_SHARP_LQ101R1SX01 is not set # CONFIG_VIDEO_LCD_SSD2828 is not set # CONFIG_VIDEO_LCD_TDO_TL070WSH30 is not set # CONFIG_VIDEO_LCD_HITACHI_TX18D42VM is not set @@ -1656,7 +1743,6 @@ CONFIG_FS_FAT_MAX_CLUSTSIZE=65536 # CONFIG_UBIFS_SILENCE_MSG is not set # CONFIG_UBIFS_SILENCE_DEBUG_DUMP is not set # CONFIG_FS_CRAMFS is not set -# CONFIG_YAFFS2 is not set # CONFIG_FS_SQUASHFS is not set # CONFIG_FS_EROFS is not set @@ -1690,6 +1776,22 @@ CONFIG_SUPPORT_ACPI=y # CONFIG_CMD_DHRYSTONE is not set # +# Alternative crypto libraries +# +# CONFIG_LEGACY_HASHING_AND_CRYPTO is not set +CONFIG_MBEDTLS_LIB=y +CONFIG_MBEDTLS_LIB_CRYPTO=y +CONFIG_SHA1_MBEDTLS=y +CONFIG_SHA256_MBEDTLS=y +CONFIG_SHA256_SMALLER=y +CONFIG_SHA512_MBEDTLS=y +CONFIG_SHA512_SMALLER=y +CONFIG_SHA384_MBEDTLS=y +CONFIG_MD5_MBEDTLS=y +# CONFIG_HKDF_MBEDTLS is not set +CONFIG_MBEDTLS_LIB_X509=y + +# # Security support # # CONFIG_AES is not set @@ -1700,6 +1802,7 @@ CONFIG_RSA_VERIFY=y CONFIG_RSA_SOFTWARE_EXP=y # CONFIG_ASYMMETRIC_KEY_TYPE is not set CONFIG_TPM=y +CONFIG_TPM_PCR_ALLOCATE=y # # Android Verified Boot @@ -1716,6 +1819,7 @@ CONFIG_SHA384=y # CONFIG_SHA_HW_ACCEL is not set CONFIG_MD5=y CONFIG_CRC8=y +CONFIG_CRC16=y CONFIG_CRC32=y # @@ -1731,6 +1835,7 @@ CONFIG_ZLIB=y # CONFIG_ZSTD is not set CONFIG_VPL_LZMA=y # CONFIG_SPL_GZIP is not set +# CONFIG_TPL_GZIP is not set # CONFIG_ERRNO_STR is not set CONFIG_HEXDUMP=y # CONFIG_GETOPT is not set @@ -1741,42 +1846,12 @@ CONFIG_SYS_FDT_PAD=0x3000 # # System tables # +# CONFIG_BLOBLIST_TABLES is not set CONFIG_GENERATE_SMBIOS_TABLE=y +CONFIG_GENERATE_SMBIOS_TABLE_VERBOSE=y # CONFIG_LIB_RATIONAL is not set CONFIG_SMBIOS=y CONFIG_SMBIOS_PARSER=y -CONFIG_EFI_LOADER=y -CONFIG_EFI_BINARY_EXEC=y -CONFIG_EFI_BOOTMGR=y -CONFIG_EFI_VARIABLE_FILE_STORE=y -# CONFIG_EFI_RT_VOLATILE_STORE is not set -# CONFIG_EFI_VARIABLE_NO_STORE is not set -# CONFIG_EFI_VARIABLES_PRESEED is not set -CONFIG_EFI_VAR_BUF_SIZE=131072 -CONFIG_EFI_GET_TIME=y -CONFIG_EFI_SET_TIME=y -# CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN is not set -# CONFIG_EFI_RUNTIME_UPDATE_CAPSULE is not set -# CONFIG_EFI_CAPSULE_ON_DISK is not set -CONFIG_EFI_CAPSULE_MAX=15 -CONFIG_EFI_DEVICE_PATH_TO_TEXT=y -CONFIG_EFI_DEVICE_PATH_UTIL=y -CONFIG_EFI_DT_FIXUP=y -CONFIG_EFI_LOADER_HII=y -CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2=y -CONFIG_EFI_UNICODE_CAPITALIZATION=y -# CONFIG_EFI_LOADER_BOUNCE_BUFFER is not set -CONFIG_EFI_PLATFORM_LANG_CODES="en-US" -CONFIG_EFI_HAVE_RUNTIME_RESET=y -CONFIG_EFI_RNG_PROTOCOL=y -CONFIG_EFI_TCG2_PROTOCOL=y -CONFIG_EFI_TCG2_PROTOCOL_EVENTLOG_SIZE=65536 -# CONFIG_EFI_TCG2_PROTOCOL_MEASURE_DTB is not set -CONFIG_EFI_LOAD_FILE2_INITRD=y -# CONFIG_EFI_SECURE_BOOT is not set -CONFIG_EFI_ECPT=y -CONFIG_EFI_EBBR_2_1_CONFORMANCE=y -CONFIG_EFI_HTTP_BOOT=y # CONFIG_OPTEE_LIB is not set # CONFIG_OPTEE_IMAGE is not set # CONFIG_BOOTM_OPTEE is not set @@ -1784,8 +1859,7 @@ CONFIG_EFI_HTTP_BOOT=y CONFIG_LIB_DATE=y CONFIG_LIB_ELF=y CONFIG_LMB=y -CONFIG_LMB_USE_MAX_REGIONS=y -CONFIG_LMB_MAX_REGIONS=16 +# CONFIG_LMB_ARCH_MEM_MAP is not set # CONFIG_PHANDLE_CHECK_SEQ is not set # @@ -1798,6 +1872,7 @@ CONFIG_LMB_MAX_REGIONS=16 # Tools options # CONFIG_MKIMAGE_DTC_PATH="dtc" +CONFIG_TOOLS_CRC16=y CONFIG_TOOLS_CRC32=y CONFIG_TOOLS_LIBCRYPTO=y CONFIG_TOOLS_KWBIMAGE=y diff --git a/config/u-boot/qemu_arm64_12mb/target.cfg b/config/u-boot/qemu_arm64_12mb/target.cfg index e19603c2..0c90e338 100644 --- a/config/u-boot/qemu_arm64_12mb/target.cfg +++ b/config/u-boot/qemu_arm64_12mb/target.cfg @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-3.0-or-later tree="default" -xtree="default" +xgcctree="default" xarch="aarch64-elf arm-eabi" diff --git a/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch index 53a9b90d..8a09fa7d 100644 --- a/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch +++ b/config/u-boot/x86/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch @@ -18,7 +18,7 @@ index 84831915a2..8e26ec2aef 100644 ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100); ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE, - "U-Boot - Boot Menu", NULL); -+ "Libreboot 20241206 release (U-Boot Menu) https://libreboot.org/", NULL); ++ "Libreboot 25.06 Luminous Lemon (U-Boot menu): https://libreboot.org/", NULL); ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT); logo = video_get_u_boot_logo(); diff --git a/config/u-boot/x86/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch b/config/u-boot/x86/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch deleted file mode 100644 index febc2372..00000000 --- a/config/u-boot/x86/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch +++ /dev/null @@ -1,157 +0,0 @@ -From d721edb391618fca096ec7f63a2fbc9df0af9231 Mon Sep 17 00:00:00 2001 -From: Leah Rowe <info@minifree.org> -Date: Tue, 17 Dec 2024 12:59:54 +0000 -Subject: [PATCH 1/1] change the logo back to the plain libreboot one - -Signed-off-by: Leah Rowe <info@minifree.org> ---- - drivers/video/u_boot_logo.bmp | Bin 27350 -> 27350 bytes - 1 file changed, 0 insertions(+), 0 deletions(-) - -diff --git a/drivers/video/u_boot_logo.bmp b/drivers/video/u_boot_logo.bmp -index bc9ae001badb25bc900058c167a47247ef91dc7c..c9262cd206cc3cf5297daa94b696fcf102fc22b5 100644 -GIT binary patch -literal 27350 -zcmeHQO>7&-6@I%EB~g@3*_3HXp(Kj3Xz^F1xI5%-k<?b5AGdL!IIdx*ZfpJcFSTSr -zQfdP=&;SXL0KNqA!D)S{6CWJF1yaC3d+?=zdov0YsFApE(VKxDdTP;Lia?zuxqsp= -zxt!S*2L%^c?%Ua!_r85I^XBc_8SdP%uik;mhPnWzF?FZ5bI@B!hh>0pu(|_>lkh&; -z7l(;p0^-4Gh=&s}6;45NBnRoSJY?eqC?o_ZCJ~4k3Cc6y0(tgDc&T&<UMe4kxfhSX -z%in$tjvRgkUODs{9DVtFaO~(C@WyxN;mu>m;l!IK;pAJV;PlD2;mqkD!jI3Kg|k0e -zfaS$=aN*oVxOn~&{N$a>aAkE3*6_Z$u?bgydJV2!y$08Rb{*dP`FrsG`yaqZAASTk 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-zYT8b_DIU)?*iuLN*q`p<{XD%6!#nrjo!jw_3cMqeKB65|Cf-kM0~~|q)V6L*(mb(A -z7m$v>Z}#VxFaLKY7E{j>{j=fa%YS_L^5s9TW3Bv8L{Dm*@Bio;(ZauBdxLXZ^i})< -z?=aEBUgx&*Z-_d+!UXY;JIiXz#C7<$o%$_Xi2kRAC~z(Q%FKV^NB*UXZrI2B>BjFd -h=Y>|w|C6Zk68;X)R-AjChtJK+<qqA3JjSNqzW{|XuQ>n! - --- -2.39.5 - diff --git a/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch b/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch index 53a9b90d..8a09fa7d 100644 --- a/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch +++ b/config/u-boot/x86_64/patches/0005-Libreboot-branding-version-on-the-bootflow-menu.patch @@ -18,7 +18,7 @@ index 84831915a2..8e26ec2aef 100644 ret |= scene_obj_set_pos(scn, OBJ_MENU, MARGIN_LEFT, 100); ret |= scene_txt_str(scn, "title", OBJ_MENU_TITLE, STR_MENU_TITLE, - "U-Boot - Boot Menu", NULL); -+ "Libreboot 20241206 release (U-Boot Menu) https://libreboot.org/", NULL); ++ "Libreboot 25.06 Luminous Lemon (U-Boot menu): https://libreboot.org/", NULL); ret |= scene_menu_set_title(scn, OBJ_MENU, OBJ_PROMPT); logo = video_get_u_boot_logo(); diff --git a/config/u-boot/x86_64/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch b/config/u-boot/x86_64/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch deleted file mode 100644 index febc2372..00000000 --- a/config/u-boot/x86_64/patches/0007-change-the-logo-back-to-the-plain-libreboot-one.patch +++ /dev/null @@ -1,157 +0,0 @@ -From d721edb391618fca096ec7f63a2fbc9df0af9231 Mon Sep 17 00:00:00 2001 -From: Leah Rowe <info@minifree.org> -Date: Tue, 17 Dec 2024 12:59:54 +0000 -Subject: [PATCH 1/1] change the logo back to the plain libreboot one - -Signed-off-by: Leah Rowe <info@minifree.org> ---- - drivers/video/u_boot_logo.bmp | Bin 27350 -> 27350 bytes - 1 file changed, 0 insertions(+), 0 deletions(-) - -diff --git a/drivers/video/u_boot_logo.bmp b/drivers/video/u_boot_logo.bmp -index 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deleted file mode 100644 index 8241cebe..00000000 --- a/config/uefitool/patches/0001-common-filesystem-define-ACCESSPERMS-if-undefined.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 75437e2253fc70f4e3368c9d030415ce4ae52fa6 Mon Sep 17 00:00:00 2001 -From: Leah Rowe <info@minifree.org> -Date: Sun, 28 Jul 2024 16:04:30 +0100 -Subject: [PATCH 1/1] common/filesystem: define ACCESSPERMS if undefined - -Normally defined in sys/stat.h on various libc implementations, -but musl libc doesn't seem to have it, leading to this build -issue: - -common/filesystem.cpp:86:38: error: 'ACCESSPERMS' was not declared in this scope - 86 | return (mkdir(dir.toLocal8Bit(), ACCESSPERMS) == 0); - -ACCESSPERMS is typically defined as the result of bitwise OR: -S_IRWXU | S_IRWXG | S_IRWXO - -This creates the chmod permission 0777, used on the mkdir() call. - -ACCESSPERMS is supported on GNU C Library, for compatibility with -BSD libc implementations; the latter also implements ALLPERMS -and DEFFILEMODE, which don't seem to be used by uefitool regardless. - -Do not define it on the Windows builds; only do it for the others, -such as Linux. - -Signed-off-by: Leah Rowe <info@minifree.org> ---- - common/filesystem.cpp | 8 +++++++- - 1 file changed, 7 insertions(+), 1 deletion(-) - -diff --git a/common/filesystem.cpp b/common/filesystem.cpp -index b2b8d65..af5e537 100644 ---- a/common/filesystem.cpp -+++ b/common/filesystem.cpp -@@ -75,6 +75,12 @@ UString getAbsPath(const UString & path) - #else - #include <unistd.h> - #include <stdlib.h> -+ -+/* musl libc does not define ACCESSPERMS */ -+#ifndef ACCESSPERMS -+#define ACCESSPERMS (S_IRWXU | S_IRWXG | S_IRWXO) /* chmod permission: 0777 */ -+#endif -+ - bool isExistOnFs(const UString & path) - { - struct stat buf; -@@ -103,4 +109,4 @@ UString getAbsPath(const UString & path) { - return UString(abs); - return path; - } --#endif -\ No newline at end of file -+#endif --- -2.39.2 - diff --git a/config/uefitool/target.cfg b/config/uefitool/target.cfg index ce1ff3af..9dfb2543 100644 --- a/config/uefitool/target.cfg +++ b/config/uefitool/target.cfg @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-3.0-or-later cmakedir="UEFIExtract" -btype="cmake" +buildtype="cmake" diff --git a/config/vendor/3050micro/pkg.cfg b/config/vendor/3050micro/pkg.cfg index 497a27a6..45ba55d1 100644 --- a/config/vendor/3050micro/pkg.cfg +++ b/config/vendor/3050micro/pkg.cfg @@ -3,6 +3,7 @@ DL_hash="976bbb1e625f64df276d8343757d910c88b8a781f953bc2c41a7dd15184ec70d55f8081de2a0aaa83cddb8e73bdc2df6288fde6e0897e4928c48ca4bb30bea2d" DL_url="https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip" DL_url_bkup="https://web.archive.org/web/20230822134231/https://download.asrock.com/BIOS/1151/H110M-DGS(7.30)ROM.zip" +ME_bin_hash="3231ddb79be81f0a631926fc0e533ee7bce2d10032d7d45e56ae8a9894bcf9b4ca0b4f6fd3bc4daa185a464e771e0bf3d1b771a3180739b6896cec911758145b" # for Fsp.fd, we don't rely on a download. Instead, # we copy from coreboot.git. The file is defined @@ -10,6 +11,8 @@ DL_url_bkup="https://web.archive.org/web/20230822134231/https://download.asrock. # and inserted to CBFS with names CONFIG_FSP_S_CBFS and CONFIG_FSP_M_CBFS # FSPFD_hash="c500166a8553a80ba8db8b8185a896e0ae1562ea3c139e07acd9e7937baf8110ba743cc79b69db09a5f39c076d1d22bc45045223975f46aea2034ba82a6b0360" +FSPM_bin_hash="b15712a53f4d16f36b384beb6dbb716c0b0924751d6ca1e229cd4b8c03aef9eda025c235af247e53dac94d94b79559623974d0d21c7f97e125d8ecc2c86bf03f" +FSPS_bin_hash="64ac9f93e43efddc35931e168d6594c2b39fb5a0da863d22f2d000d7eacc0692b07ce89389cbb1c5b95ff9b2bba508c538e37d0e644fcab7b2cada773da65ce6" # We will use deguard to disable the Intel Boot Guard: ME11bootguard="y" diff --git a/config/vendor/e6400/pkg.cfg b/config/vendor/e6400/pkg.cfg index c5962480..21d1e69d 100644 --- a/config/vendor/e6400/pkg.cfg +++ b/config/vendor/e6400/pkg.cfg @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-3.0-or-later E6400_VGA_DL_hash="6217d5fce2291d15bb0649fd2faaeb78e4c48962b07a2bea6af60466bfdc5f233af0d077c2c6e71dd96047bdbb1f612324cef0a5e728ba9a9ec5c69a4022cd8d" +E6400_VGA_bin_hash="24fb3d934afca13bd2b43ec958aa2f69654e0f8ee2dd6ca910350a738dea22cfd7f69626093e047566b27c0dd9f3595beeacaad7812fc7f6a13970e49e7b60f3" E6400_VGA_DL_url="https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe" E6400_VGA_DL_url_bkup="https://web.archive.org/web/20230506014903/https://dl.dell.com/FOLDER01530530M/1/E6400A34.exe" E6400_VGA_offset="274451" diff --git a/config/vendor/haswell/pkg.cfg b/config/vendor/haswell/pkg.cfg index e9722a11..401736b5 100644 --- a/config/vendor/haswell/pkg.cfg +++ b/config/vendor/haswell/pkg.cfg @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-3.0-or-later DL_hash="f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998" +ME_bin_hash="8629caded7efd2aa234cc378b7118f0d300402537b8aff6aa3d9b895c6b14590a79cb02d1db7a91de36d36f5612386fc99ddcb57c9d78b1e75b5864e68763de1" DL_url="https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe" DL_url_bkup="https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe" diff --git a/config/vendor/hp2170p/pkg.cfg b/config/vendor/hp2170p/pkg.cfg index 77cbd08b..192bcf41 100644 --- a/config/vendor/hp2170p/pkg.cfg +++ b/config/vendor/hp2170p/pkg.cfg @@ -1,8 +1,11 @@ # SPDX-License-Identifier: GPL-3.0-or-later DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c" +ME_bin_hash="672240d231a723ea7fac112262fdc28884c43a5be9b231dfae838c7a1edc86140da38983079d23ab5ac8e6c74611b65da4872ecbab3ec979c680d3f526eb91ed" DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" EC_hash="940e533b6a276c13a6e46a93795ca84b19877b05e82c0c1795b7fea9cbea63c28e606ef994352fc77c4fdfb2e0c31c5edeefa98b989e1990364dfc6417b25460" EC_url="https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96088.exe" EC_url_bkup="https://web.archive.org/web/20230909164345/https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96088.exe" +EC_FW1_hash="44a27359e8e2ecfae910a754617d5ee947d6bba976f2eb53114a97c71b64813da7ab4223749706c9bbcaf1e752c190834ee3b41c297c191b3cac200814e02938" +EC_FW2_hash="09c5b8bab6f258a0303ac502b4900cd4277bd6c43bfd2ef0030df6e918ef3300d04d2979373f8b05f77d1eae1c27ebd01856426b8eed6f215e1fcaed68e0977e" diff --git a/config/vendor/hp2560p/pkg.cfg b/config/vendor/hp2560p/pkg.cfg index f7c7cd14..52b9394d 100644 --- a/config/vendor/hp2560p/pkg.cfg +++ b/config/vendor/hp2560p/pkg.cfg @@ -1,8 +1,11 @@ # SPDX-License-Identifier: GPL-3.0-or-later DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3" +ME_bin_hash="6a7eb169a01581682a2ecf4b284c1689eb7746cc80aa16ea1ce35d1a1c47a92664b5240defd62535e9707c3f3d42abfb62da3254b97e569de178099f7683c858" DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe" DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe" EC_hash="a602cc7627c569bc423a5857cf506fbc3bcd68cb6b43a7c1b99d12a569b4107c412748cf49605ef4d5b930eb14b6815c4d1b1dc20145fe9d707e445fc201cea2" EC_url="https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85526.exe" EC_url_bkup="https://web.archive.org/web/20230416125725/https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85526.exe" +EC_FW1_hash="44a27359e8e2ecfae910a754617d5ee947d6bba976f2eb53114a97c71b64813da7ab4223749706c9bbcaf1e752c190834ee3b41c297c191b3cac200814e02938" +EC_FW2_hash="a05c1eb5433f43e035327d0ae74e9dbd09ecb45f00be656e477ebd5b505ca21bae820e90c29483c4c641591fdd2aebb6b6ea0ecfb879b506bc1a657c01a21bd2" diff --git a/config/vendor/hp2570p/pkg.cfg b/config/vendor/hp2570p/pkg.cfg index 9f1a85aa..1df49d73 100644 --- a/config/vendor/hp2570p/pkg.cfg +++ b/config/vendor/hp2570p/pkg.cfg @@ -1,8 +1,11 @@ # SPDX-License-Identifier: GPL-3.0-or-later DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c" +ME_bin_hash="672240d231a723ea7fac112262fdc28884c43a5be9b231dfae838c7a1edc86140da38983079d23ab5ac8e6c74611b65da4872ecbab3ec979c680d3f526eb91ed" DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" EC_hash="61ed284bdf938c5f36ad3267263fb3963a6608339425bc41aaef3ab0cd98f07c998d816b0233735ca35dc6cb771257da3f09a40d5cfc96bb6388b4366348275e" EC_url="https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96085.exe" EC_url_bkup="https://web.archive.org/web/20230610174558/https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96085.exe" +EC_FW1_hash="44a27359e8e2ecfae910a754617d5ee947d6bba976f2eb53114a97c71b64813da7ab4223749706c9bbcaf1e752c190834ee3b41c297c191b3cac200814e02938" +EC_FW2_hash="d4afcad4960253af674f1dcd3a5a044444b7fcfbaa2a993f976997966b579a80d8a1c58b0ed0a47d862312ad81e433834bb1992c79f69d858d8c00e8cd62e1fb" diff --git a/config/vendor/hp8200sff/pkg.cfg b/config/vendor/hp8200sff/pkg.cfg index 9d0a34de..dba0b354 100644 --- a/config/vendor/hp8200sff/pkg.cfg +++ b/config/vendor/hp8200sff/pkg.cfg @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-3.0-or-later DL_hash="8fcb691bf84dc1feefc3c84f7cc59eadaabb200477bb3ecba1b050f23f133b0a8c2539015a523f676544c2dff64599bcba7e844e8c31757b90d70bb4485b5664" +ME_bin_hash="732954bd288a7d7de3b779032476e2bd5a6f64b6971ff3053434d49ab55fd514db9f224e83883215646e50eecf4ecbdb69a65d5957d241e1146424053dd3ba91" DL_url="https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe" DL_url_bkup="https://web.archive.org/web/20220708171920/https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe" diff --git a/config/vendor/hp820g2/pkg.cfg b/config/vendor/hp820g2/pkg.cfg index 89303ad3..4a2fdbb3 100644 --- a/config/vendor/hp820g2/pkg.cfg +++ b/config/vendor/hp820g2/pkg.cfg @@ -1,11 +1,14 @@ # SPDX-License-Identifier: GPL-3.0-or-later DL_hash="1ac05a3e4f46426eeb77f89c4aca25ed1ad64479d8fcba6a3ab63a944512bacbc5d148cc7b9c4ff4b8c90a1fb1de4776e46f14aca8021900e0df37246aa0b717" +ME_bin_hash="ca754e2fd09eb48bc14b2d1b19d3fa3ed1df2297cff2b7d9b68e9002812e745a59a8ca921f26834ae84c0076c64d8dfab75ce113b50e4badafbfb8ab6c14ad2b" DL_url="https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe" DL_url_bkup="https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe" MRC_url="https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip" MRC_url_bkup="https://web.archive.org/web/20220310155922/https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip" MRC_hash="3ff1599c52539f0707a07a8664a84ce51cd3fed1569df4bb7aa6722fc8dec0af1754250333b6ca1a9794d970a4de7b29a5cf2499f5b61e4c3eab64d1314aaea9" MRC_board="samus" -MRC_refcode_cbtree="coreboot413" +MRC_refcode_cbtree="fam15h" MRC_refcode_gbe="131253" +MRC_bin_hash="cade33e8664fb92ebb6ce0c92b572f587f047b2832babb6bd30eb221dba76b08d578e189ba1f89cdb4c956aecd092ebd7443adbc30cf3800452b906967cedc11" +REF_bin_hash="7efa3bdc48d548924b4c57bbadc99a7add91ac8c5eb7f8f98874c2f8583ca0e71e99997186aaf2714c8ca56593e12c80c1aa9e727a462ef9d2c36963042e7d56" diff --git a/config/vendor/hp8460pintel/pkg.cfg b/config/vendor/hp8460pintel/pkg.cfg index 1e1da34e..1140e5c9 100644 --- a/config/vendor/hp8460pintel/pkg.cfg +++ b/config/vendor/hp8460pintel/pkg.cfg @@ -1,8 +1,11 @@ # SPDX-License-Identifier: GPL-3.0-or-later DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3" +ME_bin_hash="6a7eb169a01581682a2ecf4b284c1689eb7746cc80aa16ea1ce35d1a1c47a92664b5240defd62535e9707c3f3d42abfb62da3254b97e569de178099f7683c858" DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe" DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe" EC_hash="9be5511d7ba07a376583cbd0b7fa4d7dff87ebc94b78d489fd62a14cb7f61eac99670e6a10ce374fe8e3c4bdafabbd1edce7774c3a482c15c2d4207b74ea49ed" EC_url="https://ftp.hp.com/pub/softpaq/sp85501-86000/sp85528.exe" EC_url_bkup="https://web.archive.org/web/20211231004901/https://ftp.ext.hp.com/pub/softpaq/sp85501-86000/sp85528.exe" +EC_FW1_hash="44a27359e8e2ecfae910a754617d5ee947d6bba976f2eb53114a97c71b64813da7ab4223749706c9bbcaf1e752c190834ee3b41c297c191b3cac200814e02938" +EC_FW2_hash="8eba6e0087e42a2f552de3367639b376501d31e8ae1629846496c3eb46ed7d2f9b46531dc245cc2ce5f4a91047fe84a37b350864cdc37530148f456818c0133e" diff --git a/config/vendor/hp8470pintel/pkg.cfg b/config/vendor/hp8470pintel/pkg.cfg index 1170f56b..db0b6e69 100644 --- a/config/vendor/hp8470pintel/pkg.cfg +++ b/config/vendor/hp8470pintel/pkg.cfg @@ -1,8 +1,11 @@ # SPDX-License-Identifier: GPL-3.0-or-later DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c" +ME_bin_hash="672240d231a723ea7fac112262fdc28884c43a5be9b231dfae838c7a1edc86140da38983079d23ab5ac8e6c74611b65da4872ecbab3ec979c680d3f526eb91ed" DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" EC_hash="b95c9cf909ed537fb448e2be69eddcb57459efbaf0a979a73cd2bce90a7014b110f4dbbeecfd596c072636396b8f20c229c59ffe34e45500ce9edb000c6ccaf9" EC_url="https://ftp.hp.com/pub/softpaq/sp77501-78000/sp77818.exe" EC_url_bkup="https://web.archive.org/web/20230909173821/https://ftp.hp.com/pub/softpaq/sp77501-78000/sp77818.exe" +EC_FW1_hash="44a27359e8e2ecfae910a754617d5ee947d6bba976f2eb53114a97c71b64813da7ab4223749706c9bbcaf1e752c190834ee3b41c297c191b3cac200814e02938" +EC_FW2_hash="d7a44b682b1dae7f3cbcc34646b3dd80895a7e2132ab0292b3d42ccf54a9fa447773f7e8e914b0c427adaaad8aa54224e7e146dc72280cf04093956727f41a03" diff --git a/config/vendor/hp8560w/pkg.cfg b/config/vendor/hp8560w/pkg.cfg index 629d96d1..224b448c 100644 --- a/config/vendor/hp8560w/pkg.cfg +++ b/config/vendor/hp8560w/pkg.cfg @@ -1,8 +1,11 @@ # SPDX-License-Identifier: GPL-3.0-or-later DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3" +ME_bin_hash="6a7eb169a01581682a2ecf4b284c1689eb7746cc80aa16ea1ce35d1a1c47a92664b5240defd62535e9707c3f3d42abfb62da3254b97e569de178099f7683c858" DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe" DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe" EC_hash="8e2bc5dca1a1cf0cfc1ac9df74eb6fda333f8ae560019f8182a49d3a716d72938f6cde4aa5ee56942def08207d3ef95706653bd238768fd029da43e9a4fbcc67" EC_url="https://ftp.hp.com/pub/softpaq/sp78001-78500/sp78085.exe" EC_url_bkup="https://web.archive.org/web/20230402085323/https://ftp.hp.com/pub/softpaq/sp78001-78500/sp78085.exe" +EC_FW1_hash="44a27359e8e2ecfae910a754617d5ee947d6bba976f2eb53114a97c71b64813da7ab4223749706c9bbcaf1e752c190834ee3b41c297c191b3cac200814e02938" +EC_FW2_hash="82882406167e7df8ff90d2ea8d93adee59c3e8eb034b6dfcd0ff70cadf8ab3e5acee7262dd344560e118d00b010ed13c18539b042dae0b4b4e6a2c09402aadc4" diff --git a/config/vendor/hp9470m/pkg.cfg b/config/vendor/hp9470m/pkg.cfg index 9cdb8143..46f1349b 100644 --- a/config/vendor/hp9470m/pkg.cfg +++ b/config/vendor/hp9470m/pkg.cfg @@ -1,8 +1,11 @@ # SPDX-License-Identifier: GPL-3.0-or-later DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c" +ME_bin_hash="672240d231a723ea7fac112262fdc28884c43a5be9b231dfae838c7a1edc86140da38983079d23ab5ac8e6c74611b65da4872ecbab3ec979c680d3f526eb91ed" DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" EC_hash="563422bf5420da18b89439f28a38ea28a175f0ad3588f0f5ea39b08dfdd14c8d513cbf11c2125ec3869fc3b7222c7dc3d111415185ea9b73f41410b1b57f13bd" EC_url="https://ftp.hp.com/pub/softpaq/sp96001-96500/sp96090.exe" EC_url_bkup="http://web.archive.org/web/20220504072602/https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96090.exe" +EC_FW1_hash="44a27359e8e2ecfae910a754617d5ee947d6bba976f2eb53114a97c71b64813da7ab4223749706c9bbcaf1e752c190834ee3b41c297c191b3cac200814e02938" +EC_FW2_hash="0d7b446fda5e5cde9570b6df15e4c0ad6b9fad6b425f498669d91bccb4a4bb9a8d22d20f4adb9f116e38df6db3519aae14a6d8fd8cb3075c93ce7c5ae0d8eacb" diff --git a/config/vendor/hppro3500series/pkg.cfg b/config/vendor/hppro3500series/pkg.cfg new file mode 100644 index 00000000..71d41033 --- /dev/null +++ b/config/vendor/hppro3500series/pkg.cfg @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +DL_hash="949effcb8cb75d8b097854c47d1ad84ec37a9a5038803afb05900da8cf1288b278720c8ac5f3f88712e4adb757e71e4b1937250a3e49bd2586b975f257b7df04" +ME_bin_hash="b4f95434324dd167701840e2e1813b1bbcf78edff845a445f2138b8f18fd44b201cc9377df6dd72a359cbf2fe9dcd9a558b31a966a9f9ccee3c0cc4a03144cbf" +DL_url="https://ftp.hp.com/pub/softpaq/sp70001-70500/sp70375.exe" +DL_url_bkup="https://web.archive.org/web/20240327125043/https://ftp.hp.com/pub/softpaq/sp70001-70500/sp70375.exe" diff --git a/config/vendor/ivybridge/pkg.cfg b/config/vendor/ivybridge/pkg.cfg index d9b2200b..3b3d1091 100644 --- a/config/vendor/ivybridge/pkg.cfg +++ b/config/vendor/ivybridge/pkg.cfg @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-3.0-or-later DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c" +ME_bin_hash="672240d231a723ea7fac112262fdc28884c43a5be9b231dfae838c7a1edc86140da38983079d23ab5ac8e6c74611b65da4872ecbab3ec979c680d3f526eb91ed" DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" diff --git a/config/vendor/sandybridge/pkg.cfg b/config/vendor/sandybridge/pkg.cfg index bb022043..c243413f 100644 --- a/config/vendor/sandybridge/pkg.cfg +++ b/config/vendor/sandybridge/pkg.cfg @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-3.0-or-later DL_hash="81c9917938c4a2a4f128c976250451931efd0f25b51ff34f058ddacb8eec27272691371864a683ec7abcb924fea32592d061584c7b2571a5d3e84eb870281cc3" +ME_bin_hash="6a7eb169a01581682a2ecf4b284c1689eb7746cc80aa16ea1ce35d1a1c47a92664b5240defd62535e9707c3f3d42abfb62da3254b97e569de178099f7683c858" DL_url="https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe" DL_url_bkup="https://web.archive.org/web/20220202201637/https://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles/83rf46ww.exe" diff --git a/config/vendor/t1650/pkg.cfg b/config/vendor/t1650/pkg.cfg index f994b942..47303884 100644 --- a/config/vendor/t1650/pkg.cfg +++ b/config/vendor/t1650/pkg.cfg @@ -1,8 +1,10 @@ # SPDX-License-Identifier: GPL-3.0-or-later DL_hash="4dc908050c91c1227645c900ddee88652937540af4ba222b0239b7f459f260cdf6e5e8113ac14e5543d00cf53abdd6c7bd23e61f690de1ce45a3709a30cbb91c" +ME_bin_hash="672240d231a723ea7fac112262fdc28884c43a5be9b231dfae838c7a1edc86140da38983079d23ab5ac8e6c74611b65da4872ecbab3ec979c680d3f526eb91ed" DL_url="https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" DL_url_bkup="https://web.archive.org/web/20210706183911/https://download.lenovo.com/pccbbs/mobiles/g1rg24ww.exe" SCH5545EC_DL_url="https://dl.dell.com/FOLDER05065992M/1/T1650A28.exe" SCH5545EC_DL_url_bkup="https://web.archive.org/web/20230811151654/https://dl.dell.com/FOLDER05065992M/1/T1650A28.exe" SCH5545EC_DL_hash="18261d0f7f27e9de3b0b5a25019b9a934ef1a61cd3f0140e34f38553695e91e671e227a8fa962774edceab5c7804d13ed9fe1c518c5643c7c8f15632f903a6c4" +SCH5545EC_bin_hash="51d9540f73c60ba5e245a8a98c2215d477d3bad9759f1dae94a4fe63652421d8552406817c2482dd6ee3bb55d942bbc0315eab54095544d7956e73112e2d8483" diff --git a/config/vendor/t1700/pkg.cfg b/config/vendor/t1700/pkg.cfg new file mode 100644 index 00000000..979dd7bf --- /dev/null +++ b/config/vendor/t1700/pkg.cfg @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +DL_hash="f3d79aec805c8b0094a4081be76b3a22d329c479ad18210449b7acc3236ccfc4a2103eaa7c5b79a4872bfd699eede047efd46dfb06dc8f47e3216fc254612998" +ME_bin_hash="8629caded7efd2aa234cc378b7118f0d300402537b8aff6aa3d9b895c6b14590a79cb02d1db7a91de36d36f5612386fc99ddcb57c9d78b1e75b5864e68763de1" +DL_url="https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe" +DL_url_bkup="https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe" +MRC_url="https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip" +MRC_url_bkup="https://web.archive.org/web/20220310155922/https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip" +MRC_hash="3ff1599c52539f0707a07a8664a84ce51cd3fed1569df4bb7aa6722fc8dec0af1754250333b6ca1a9794d970a4de7b29a5cf2499f5b61e4c3eab64d1314aaea9" +MRC_bin_hash="cade33e8664fb92ebb6ce0c92b572f587f047b2832babb6bd30eb221dba76b08d578e189ba1f89cdb4c956aecd092ebd7443adbc30cf3800452b906967cedc11" +MRC_board="samus" diff --git a/config/vendor/t480/pkg.cfg b/config/vendor/t480/pkg.cfg index 3071f83d..90c31b75 100644 --- a/config/vendor/t480/pkg.cfg +++ b/config/vendor/t480/pkg.cfg @@ -2,6 +2,7 @@ # ME firmware (deguard will be used) DL_hash="df735a24242792bf4150f30bf0bd4fdbdc0fb6bf0f897ea533df32567be8e084006d692fb6351677f8cc976878c5018667901dbd407b0a77805754f7c101497c" +ME_bin_hash="fad8bcd2ea2ae9d1a2a1e223f499f15ada0787feb600eab3201669f82b7ade0741194fa86448eff57d7f68c8ebbfc1bf266b4d68aca509ee48db258902a805e7" DL_url="https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe" DL_url_bkup="https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe" @@ -11,6 +12,8 @@ DL_url_bkup="https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLD # and inserted to CBFS with names CONFIG_FSP_S_CBFS and CONFIG_FSP_M_CBFS # FSPFD_hash="c500166a8553a80ba8db8b8185a896e0ae1562ea3c139e07acd9e7937baf8110ba743cc79b69db09a5f39c076d1d22bc45045223975f46aea2034ba82a6b0360" +FSPM_bin_hash="b15712a53f4d16f36b384beb6dbb716c0b0924751d6ca1e229cd4b8c03aef9eda025c235af247e53dac94d94b79559623974d0d21c7f97e125d8ecc2c86bf03f" +FSPS_bin_hash="64ac9f93e43efddc35931e168d6594c2b39fb5a0da863d22f2d000d7eacc0692b07ce89389cbb1c5b95ff9b2bba508c538e37d0e644fcab7b2cada773da65ce6" # We will use deguard to disable the Intel Boot Guard: ME11bootguard="y" @@ -27,3 +30,4 @@ TBFW_url="https://download.lenovo.com/pccbbs/mobiles/n24th13w.exe" TBFW_url_bkup="https://web.archive.org/web/20241004165955/https://download.lenovo.com/pccbbs/mobiles/n24th13w.exe" TBFW_hash="906d916e8ae77e6d146c67c3113cd904e735a7f28cb2fc37e2284758ead5cda8dd4025c1c741fac9162b1eb01cff08fc39a0d4e79c5cec0515f1d3e6447d1323" TBFW_size=1048576 # size in bytes, when padding, matching TBFW's flash IC +TBFW_bin_hash="15aea269e79d92fe651fe613e30febee5459786169f647e5f321b7382892cf2b8fc61aa1afb8a04d0369b71579de54763272ba144673fbfadfefeb384d45c293" diff --git a/config/vendor/t480s/pkg.cfg b/config/vendor/t480s/pkg.cfg index a9e3e48b..4c1eeaf1 100644 --- a/config/vendor/t480s/pkg.cfg +++ b/config/vendor/t480s/pkg.cfg @@ -1,6 +1,8 @@ # SPDX-License-Identifier: GPL-3.0-or-later +# ME firmware (deguard will be used) DL_hash="df735a24242792bf4150f30bf0bd4fdbdc0fb6bf0f897ea533df32567be8e084006d692fb6351677f8cc976878c5018667901dbd407b0a77805754f7c101497c" +ME_bin_hash="1c77371187ef64e719debc75f606c78fc063b8a84f2704f3fa45e9e4d8a9bccec50420d262bbfbc0dd1695e038698b10113a1bc532a33b943321cd0811e40786" DL_url="https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe" DL_url_bkup="https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLDER04573471M/1/Inspiron_5468_1.3.0.exe" @@ -10,6 +12,8 @@ DL_url_bkup="https://web.archive.org/web/20241110222323/https://dl.dell.com/FOLD # and inserted to CBFS with names CONFIG_FSP_S_CBFS and CONFIG_FSP_M_CBFS # FSPFD_hash="c500166a8553a80ba8db8b8185a896e0ae1562ea3c139e07acd9e7937baf8110ba743cc79b69db09a5f39c076d1d22bc45045223975f46aea2034ba82a6b0360" +FSPM_bin_hash="b15712a53f4d16f36b384beb6dbb716c0b0924751d6ca1e229cd4b8c03aef9eda025c235af247e53dac94d94b79559623974d0d21c7f97e125d8ecc2c86bf03f" +FSPS_bin_hash="64ac9f93e43efddc35931e168d6594c2b39fb5a0da863d22f2d000d7eacc0692b07ce89389cbb1c5b95ff9b2bba508c538e37d0e644fcab7b2cada773da65ce6" # We will use deguard to disable the Intel Boot Guard: ME11bootguard="y" @@ -26,3 +30,4 @@ TBFW_url="https://download.lenovo.com/pccbbs/mobiles/n22th11w.exe" TBFW_url_bkup="https://web.archive.org/web/20230319003752/https://download.lenovo.com/pccbbs/mobiles/n22th11w.exe" TBFW_hash="ef8ec0a41d7faaa0ce514cfb6f8e7e10669c878eff69fbe1b821443b6218f5b31e1b910c8abceecf38d4b11a6e552d90f277c96c7a9c512d605c8b8aea9c1c0c" TBFW_size=1048576 # size in bytes, when padding, matching TBFW's flash IC +TBFW_bin_hash="41672f3ccdbf7a39ffd7d94c5cfb16efd2911be7b980feaa88b0f33777bd679eafdb97019a9c7b1d32cf76297ba0cb81d5b36072f6be96cec2834011249984db" diff --git a/config/vendor/x2e_n150/pkg.cfg b/config/vendor/x2e_n150/pkg.cfg new file mode 100644 index 00000000..94286cc2 --- /dev/null +++ b/config/vendor/x2e_n150/pkg.cfg @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +DL_hash="0a967d7baa7deea750da426a6e48113d8c8c7a32de0f5e8b0a610169e8c948b81e59003f5095ded75d904ccc30ac4f386ebf0d5d477336a0a167857c262473da" +DL_url="https://archive.org/download/Topton-H30W-1264NP-4L5G-FW/BK12R415.rar" +DL_url_bkup="https://archive.org/download/Topton-H30W-1264NP-4L5G-FW/BK12R415.rar" +# Original is hosted on sharepoint, needs some work to download directly from there +# So for now we rely on archive.org :( +# DL_url_bkup="https://x8sb8-my.sharepoint.com/personal/support_bkipc_com/_layouts/15/onedrive.aspx?ga=1&id=%2Fpersonal%2Fsupport%5Fbkipc%5Fcom%2FDocuments%2FProduct%2FFCBGA1264%2F1264NP%2D4L%2D5G%2FProduct%20Firmware%2FN150%2FBK12R415%2Erar&parent=%2Fpersonal%2Fsupport%5Fbkipc%5Fcom%2FDocuments%2FProduct%2FFCBGA1264%2F1264NP%2D4L%2D5G%2FProduct%20Firmware%2FN150" +ME_bin_hash="3f4b67947c0902c9041043da063af89857fdd8d80bde1f2e294b64cf549c42a2bf94eb5fba3dab06cdb68e7fe2b4315d2ee88ae2f611e0f9552af9fea7d82be8" + +# use a newer me_cleaner that can handle ME16, instead +# of the old me_cleaner present in corebootn.git +XBMKmecleaner="y" + +# on this board, we simply set the HAP bit +# but we do not modify ME at all. this is because +# me_cleaner currently has to way to validate +# the result when neutering. simply setting +# the HAP bit has the same result for users +MEclean="n" # - however: + +# we still use me_cleaner, merely to extract, in +# such circumstances, otherwise lbmk vendor.sh +# would be way more complex because we'd have +# to resort to ifdtool instead. me_cleaner can +# also extract a ME without modifying it + +# for Fsp.fd, we don't rely on a download. Instead, +# we copy from coreboot.git. The file is defined +# by CONFIG_FSP_FD_PATH, split to CONFIG_FSP_M_FILE and CONFIG_FSP_S_FILE +# and inserted to CBFS with names CONFIG_FSP_S_CBFS and CONFIG_FSP_M_CBFS +# +FSPFD_hash="69d945ea208912167af70774178366d2a56ba898ecc1864a4feda86fe96bbf55d408b2aaea2e3406c3f40772b603a9178139f5722015fb622e4e6274bd53ad52" +FSPM_bin_hash="619f6f1478554b2fe958da37b1c51c5c9781565424acd48528bd333332b3de2ea728ff21e0048f77f2564c6e242d0382d659415bd16bc8405bd6f9fa7f17d9ac" +FSPS_bin_hash="631cd96a912549fa4e792c1f8aefd26c35f98b1f9543958f24a1f87c92f0d91582b85f0b5d58f2651fe90cb526d5225bae2f4ab494745c3f586f7063abde096e" diff --git a/include/get.sh b/include/get.sh new file mode 100644 index 00000000..9ab6956d --- /dev/null +++ b/include/get.sh @@ -0,0 +1,365 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +# Copyright (c) 2020-2021,2023-2025 Leah Rowe <leah@libreboot.org> +# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com> + +url="" +bkup_url="" + +depend="" +loc="" +subcurl="" +subcurl_bkup="" +subgit="" +subgit_bkup="" +subhash="" + +tmpgit="$xbtmp/gitclone" +tmpgitcache="$xbtmp/tmpgit" + +fetch_targets() +{ + if [ ! -d "src/$project/$tree" ]; then + git_prep "$url" "$bkup_url" \ + "$xbmkpwd/$configdir/$tree/patches" \ + "src/$project/$tree" "submod" + fi +} + +fetch_project() +{ + xgcctree="" + + . "config/git/$project/pkg.cfg" || \ + err "Can't read config 'config/git/$project/pkg.cfg'" \ + "fetch_project" "@" + + if [ -z "$url" ] || [ -z "$bkup_url" ]; then + err "url/bkup_url not both set 'config/git/$project/pkg.cfg'" \ + "fetch_project" "$@" + fi + + if [ -n "$xgcctree" ]; then + x_ ./mk -f coreboot "$xgcctree" + fi + if [ -n "$depend" ]; then + for d in $depend ; do + x_ ./mk -f $d + done + fi + + clone_project +} + +clone_project() +{ + if singletree "$project"; then + loc="src/$project" + + if [ -d "$loc" ]; then + return 0 + fi + + remkdir "${tmpgit%/*}" + git_prep "$url" "$bkup_url" \ + "$xbmkpwd/config/$project/patches" "$loc" + fi +} + +git_prep() +{ + printf "Creating code directory, src/%s/%s\n" "$project" "$tree" + + _patchdir="$3" + _loc="$4" # $1 and $2 are gitrepo and gitrepo_backup + + if [ -z "$rev" ]; then + err "$project/$tree: rev not set" "git_prep" "$@" + fi + + xbget git "$1" "$2" "$tmpgit" "$rev" "$_patchdir" + if singletree "$project" || [ $# -gt 4 ]; then + dx_ fetch_submodule "$mdir/module.list" + fi + + if [ "$_loc" != "${_loc%/*}" ]; then + x_ xbmkdir "${_loc%/*}" + fi + + x_ mv "$tmpgit" "$_loc" +} + +fetch_submodule() +{ + mcfgdir="$mdir/${1##*/}" + + st="" + subcurl="" + subcurl_bkup="" + subgit="" + subgit_bkup="" + subhash="" + + if e "$mcfgdir/module.cfg" f missing; then + return 0 + fi + . "$mcfgdir/module.cfg" || \ + err "Can't read '$mcfgdir/module.cfg'" "fetch_submodules" "$@" + + if [ -n "$subgit" ] || [ -n "$subgit_bkup" ]; then + st="$st git" + fi + if [ -n "$subcurl" ] || [ -n "$subcurl_bkup" ]; then + st="$st curl" + fi + + st="${st# }" + if [ "$st" = "git curl" ]; then + err "$mdir: git+curl defined" "fetch_submodule" "$@" + fi + + if [ -z "$st" ]; then + return 0 + fi + + if [ "$st" = "curl" ]; then + if [ -z "$subcurl" ] || [ -z "$subcurl_bkup" ]; then + err "subcurl/subcurl_bkup not both set" \ + "fetch_submodule" "$@" + fi + elif [ -z "$subgit" ] || [ -z "$subgit_bkup" ]; then + err "subgit/subgit_bkup not both set" "fetch_submodule" "$@" + elif [ -z "$subhash" ]; then + err "subhash not set" "fetch_submodule" "$@" + fi + + if [ "$st" = "git" ]; then + x_ rm -Rf "$tmpgit/$1" + xbget "$st" "$subgit" "$subgit_bkup" "$tmpgit/$1" \ + "$subhash" "$mdir/${1##*/}/patches" + else + xbget "$st" "$subcurl" "$subcurl_bkup" "$tmpgit/$1" \ + "$subhash" "$mdir/${1##*/}/patches" + fi +} + +# TODO: in the following functions, argument numbers are used +# which is hard to understand. the code should be modified +# so that variable names are used instead, for easy reading + +xbget() +{ + if [ "$1" != "curl" ] && [ "$1" != "copy" ] && [ "$1" != "git" ]; then + err "Bad dlop (arg 1)" "xbget" "$@" + fi + + for url in "$2" "$3" + do + if [ -z "$url" ]; then + err "empty URL given in" "xbget" "$@" + elif ! try_fetch "$url" "$@"; then + continue + fi + + case "$1" in + git) + if [ ! -d "$4" ]; then + continue + fi + ;; + *) + if [ ! -f "$4" ]; then + continue + fi + ;; + esac + return 0 # successful download/copy + done + + err "failed to download file/repository" "xbget" "$@"; : +} + +try_fetch() +{ + if [ "$2" = "git" ]; then + if ! try_fetch_git "$@"; then + return 1 + fi + else + if ! try_fetch_file "$@"; then + return 1 + fi + fi +} + +try_fetch_git() +{ + # 1st argument $1 is the current git remote being tried, + # let's say it was https://foo.example.com/repo, then cached + # directories becomes cache/mirror/foo.example.com/repo + + if [ "$XBMK_CACHE_MIRROR" = "y" ]; then + cached="mirror" + else + cached="clone" + fi + cached="$cached/${1#*://}" + cached="$XBMK_CACHE/$cached" + + x_ xbmkdir "${5%/*}" "${cached%/*}" + + if ! try_$2 "$cached" "$@"; then + return 1 + elif [ ! -d "$cached" ]; then + return 1 + fi + + if [ ! -d "$5" ]; then + tmpclone "$cached" "$5" "$6" "$7" || \ + err "Can't clone final repo" "try_fetch" "$@"; : + fi + + if [ ! -d "$5" ]; then + return 1 + fi +} + +try_fetch_file() +{ + cached="file/$6" + cached="$XBMK_CACHE/$cached" + + x_ xbmkdir "${5%/*}" "${cached%/*}" + + if bad_checksum "$6" "$cached" 2>/dev/null; then + x_ rm -f "$cached" + fi + + if [ ! -f "$cached" ]; then + if ! try_$2 "$cached" "$@"; then + return 1 + fi + fi + + if [ -f "$5" ]; then + if bad_checksum "$6" "$5" 2>/dev/null; then + x_ cp "$cached" "$5" + fi + fi + + if [ ! -f "$cached" ]; then + return 1 + elif bad_checksum "$6" "$cached"; then + x_ rm -f "$cached" + + return 1 + fi + + if [ "$cached" != "$5" ]; then + x_ cp "$cached" "$5" + fi + + if bad_checksum "$6" "$5"; then + x_ rm -f "$5" + + return 1 + elif [ ! -f "$5" ]; then + return 1 + fi +} + +try_curl() +{ + _ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0" + + ( x_ curl --location --retry 3 -A "$_ua" "$2" -o "$1" ) \ + || ( x_ wget --tries 3 -U "$_ua" "$2" -O "$1" ) \ + || return 1; : +} + +try_copy() +{ + ( x_ cp "$2" "$1" ) || return 1; : +} + +try_git() +{ + gitdest="`findpath "$1" || err "Can't get findpath for '$1'"`" || \ + err "failed findpath for '$1'" try_get "$@" + + x_ rm -Rf "$tmpgitcache" + + if [ ! -d "$gitdest" ]; then + if [ "$XBMK_CACHE_MIRROR" = "y" ]; then + ( x_ git clone --mirror "$2" "$tmpgitcache" ) || \ + return 1 + else + ( x_ git clone "$2" "$tmpgitcache" ) || return 1 + fi + + x_ xbmkdir "${gitdest%/*}" + x_ mv "$tmpgitcache" "$gitdest" + fi + + if git -C "$gitdest" show "$7" 1>/dev/null 2>/dev/null && \ + [ "$forcepull" != "y" ]; then + # don't try to pull the latest changes if the given target + # revision already exists locally. this saves a lot of time + # during release builds, and reduces the chance that we will + # interact with grub.git or gnulib.git overall during runtime + + return 0 + fi + + if [ "$XBMK_CACHE_MIRROR" = "y" ]; then + ( x_ git -C "$gitdest" fetch ) || :; : + ( x_ git -C "$gitdest" update-server-info ) || :; : + else + ( x_ git -C "$gitdest" pull --all ) || :; : + fi +} + +bad_checksum() +{ + if e "$2" f missing; then + return 0 + fi + + build_sbase + csum="$(x_ "$sha512sum" "$2" | awk '{print $1}')" || \ + err "!sha512 '$2' $1" bad_checksum "$@" + + if [ "$csum" = "$1" ]; then + return 1 + else + x_ rm -f "$2" + printf "BAD SHA512 %s, '%s'; need %s\n" "$csum" "$2" "$1" 1>&2 + fi +} + +tmpclone() +{ + ( x_ git clone "$1" "$2" ) || return 1 + ( x_ git -C "$2" reset --hard "$3" ) || return 1 + + if [ ! -d "$4" ]; then + return 0 + fi + + tmpclone_patchlist="`mktemp || err "Can't create tmp patch list"`" || \ + err "Can't create tmp patch list" "tmpclone" "$@" + + x_ find "$4" -type f | sort > "$tmpclone_patchlist" || \ + err "Can't write patch names to '$tmpclone_patchlist'" \ + "tmpclone" "$@" + + while read -r tmpclone_patch; do + + ( x_ git -C "$2" am --keep-cr "$tmpclone_patch" ) || \ + err "Can't apply '$tmpclone_patch'" "tmpclone" "$@"; : + + done < "$tmpclone_patchlist" || \ + err "Can't read '$tmpclone_patchlist'" "tmpclone" "$@" + + x_ rm -f "$tmpclone_patchlist" +} diff --git a/include/git.sh b/include/git.sh deleted file mode 100644 index 21a1f3b7..00000000 --- a/include/git.sh +++ /dev/null @@ -1,154 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later -# Copyright (c) 2020-2021,2023-2025 Leah Rowe <leah@libreboot.org> -# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com> - -eval "`setvars "" loc url bkup_url subfile subhash subrepo subrepo_bkup \ - depend subfile_bkup repofail`" - -fetch_targets() -{ - [ -n "$tree_depend" ] && [ "$tree_depend" != "$tree" ] && \ - x_ ./mk -f "$project" "$tree_depend" - e "src/$project/$tree" d && return 0 - - printf "Creating %s tree %s\n" "$project" "$tree" - git_prep "$loc" "$loc" "$PWD/$configdir/$tree/patches" \ - "src/$project/$tree" u; nuke "$project/$tree" "$project/$tree" -} - -fetch_project() -{ - eval "`setvars "" xtree tree_depend`" - eval "`setcfg "config/git/$project/pkg.cfg"`" - - chkvars url - - [ -n "$xtree" ] && x_ ./mk -f coreboot "$xtree" - [ -z "$depend" ] || for d in $depend ; do - printf "'%s' needs '%s'; grabbing '%s'\n" "$project" "$d" "$d" - x_ ./mk -f $d - done - clone_project - - for x in config/git/*; do - [ -d "$x" ] && nuke "${x##*/}" "src/${x##*/}" 2>/dev/null - done; return 0 -} - -clone_project() -{ - loc="$XBMK_CACHE/repo/$project" && singletree "$project" && \ - loc="src/$project" - printf "Downloading project '%s' to '%s'\n" "$project" "$loc" - - e "$loc" d missing && remkdir "${tmpgit%/*}" && git_prep \ - "$url" "$bkup_url" "$PWD/config/$project/patches" "$loc"; : -} - -git_prep() -{ - _patchdir="$3"; _loc="$4" # $1 and $2 are gitrepo and gitrepo_backup - - chkvars rev; tmpclone "$1" "$2" "$tmpgit" "$rev" "$_patchdir" - if singletree "$project" || [ $# -gt 4 ]; then - prep_submodules "$_loc"; fi - - [ "$project" = "coreboot" ] && [ -n "$xtree" ] && [ $# -gt 2 ] && \ - [ "$xtree" != "$tree" ] && link_crossgcc "$_loc" - [ "$XBMK_RELEASE" = "y" ] && \ - [ "$_loc" != "$XBMK_CACHE/repo/$project" ] && rmgit "$tmpgit" - - move_repo "$_loc" -} - -prep_submodules() -{ - [ -f "$mdir/module.list" ] && while read -r msrcdir; do - fetch_submodule "$msrcdir" - done < "$mdir/module.list"; return 0 -} - -fetch_submodule() -{ - mcfgdir="$mdir/${1##*/}" - eval "`setvars "" subhash subrepo subrepo_bkup subfile subfile_bkup \ - st`" - [ ! -f "$mcfgdir/module.cfg" ] || . "$mcfgdir/module.cfg" || \ - $err "! . $mcfgdir/module.cfg" - - for xt in repo file; do - _seval="if [ -n \"\$sub$xt\" ] || [ -n \"\$sub${xt}_bkup\" ]" - eval "$_seval; then st=\"\$st \$xt\"; fi" - done - st="${st# }" && [ "$st" = "repo file" ] && $err "$mdir: repo+file" - - [ -z "$st" ] && return 0 # subrepo/subfile not defined - chkvars "sub${st}" "sub${st}_bkup" "subhash" - - [ "$st" = "file" ] && download "$subfile" "$subfile_bkup" \ - "$tmpgit/$1" "$subhash" && return 0 - rm -Rf "$tmpgit/$1" || $err "!rm '$mdir' '$1'" - tmpclone "$subrepo" "$subrepo_bkup" "$tmpgit/$1" "$subhash" \ - "$mdir/${1##*/}/patches" -} - -tmpclone() -{ - livepull="n" && [ "$repofail" = "y" ] && \ - printf "Cached clone failed; trying online.\n" 1>&2 && livepull="y" - - repofail="n" - - [ $# -lt 6 ] || rm -Rf "$3" || $err "git retry: !rm $3 ($1)" - repodir="$XBMK_CACHE/repo/${1##*/}" && [ $# -gt 5 ] && repodir="$3" - mkdir -p "$XBMK_CACHE/repo" || $err "!rmdir $XBMK_CACHE/repo" - - if [ "$livepull" = "y" ] && [ ! -d "$repodir" ]; then - git clone "$1" "$repodir" || git clone $2 "$repodir" || \ - $err "!clone $1 $2 $repodir $4 $5" # - elif [ -d "$repodir" ] && [ $# -lt 6 ]; then - git -C "$repodir" pull || sleep 3 || git -C "$repodir" pull \ - || sleep 3 || git -C "$repodir" pull || : - fi - ( - [ $# -gt 5 ] || git clone "$repodir" "$3" || $err "!clone $repodir $3" - git -C "$3" reset --hard "$4" || $err "!reset $1 $2 $3 $4 $5" - git_am_patches "$3" "$5" - ) || repofail="y" - - [ "$repofail" = "y" ] && [ $# -lt 6 ] && tmpclone "$@" retry - [ "$repofail" = "y" ] && $err "!clone $1 $2 $3 $4 $5"; : -} - -git_am_patches() -{ - for p in "$2/"*; do - [ -L "$p" ] && continue; [ -e "$p" ] || continue - [ -d "$p" ] && git_am_patches "$1" "$p" && continue - [ ! -f "$p" ] || git -C "$1" am "$p" || $err "$1 $2: !am $p" - done; return 0 -} - -link_crossgcc() -{ - ( - x_ cd "$tmpgit/util" && x_ rm -Rf crossgcc - ln -s "../../$xtree/util/crossgcc" crossgcc || $err "$1: !xgcc link" - ) || $err "$1: !xgcc link" -} - -move_repo() -{ - [ "$1" = "${1%/*}" ] || x_ mkdir -p "${1%/*}" - mv "$tmpgit" "$1" || $err "git_prep: !mv $tmpgit $1" -} - -# can delete from multi- and single-tree projects. -# called from script/trees when downloading sources. -nuke() -{ - e "config/${1%/}/nuke.list" f missing || while read -r nukefile; do - rmf="src/${2%/}/$nukefile" && [ -L "$rmf" ] && continue - e "$rmf" e missing || rm -Rf "$rmf" || $err "!rm $rmf, ${2%/}" - done < "config/${1%/}/nuke.list"; return 0 -} diff --git a/include/init.sh b/include/init.sh new file mode 100644 index 00000000..abd06862 --- /dev/null +++ b/include/init.sh @@ -0,0 +1,480 @@ +# SPDX-License-Identifier: GPL-3.0-only + +# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com> +# Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com> +# Copyright (c) 2020-2025 Leah Rowe <leah@libreboot.org> +# Copyright (c) 2025 Alper Nebi Yasak <alpernebiyasak@gmail.com> + +export LC_COLLATE=C +export LC_ALL=C + +projectname="libreboot" +projectsite="https://libreboot.org/" + +if [ -z "${PATH+x}" ]; then + export PATH="/usr/local/bin:/usr/bin:/bin:/usr/local/games:/usr/games" +fi + +sha512sum="util/sbase/sha512sum" + +aur_notice="" +basetmp="" +board="" +checkvarschk="" +checkvarsxbmk="" +configdir="" +datadir="" +is_child="" +python="" +pyver="" +reinstall="" +relname="" +version="" +versiondate="" +xbmklock="" +xbmkpath="" +xbmkpwd="" +xbmkpwd="" +xbtmp="" + +xbmk_init() +{ + xbmkpwd="`pwd || err "Cannot generate PWD"`" || err "!" xbmk_init "$@" + xbmklock="$xbmkpwd/lock" + basetmp="$xbmkpwd/xbmkwd" + sha512sum="$xbmkpwd/util/sbase/sha512sum" + + if [ $# -gt 0 ] && [ "$1" = "dependencies" ]; then + x_ xbmkpkg "$@" + + exit 0 + fi + + id -u 1>/dev/null 2>/dev/null || \ + err "suid check failed" "xbmk_init" "$@" + + if [ "$(id -u)" = "0" ]; then + err "this command as root is not permitted" "xbmk_init" "$@" + fi + + export PWD="$xbmkpwd" + x_ xbmkdir "$basetmp" + + if [ ! -e "cache" ]; then + x_ xbmkdir "cache" + fi + + for init_cmd in get_version set_env set_threads git_init child_exec; do + if ! xbmk_$init_cmd "$@"; then + break + fi + done +} + +xbmkpkg() +{ + xchk xbmkpkg "$@" + + if [ $# -gt 2 ]; then + reinstall="$3" + fi + + . "config/dependencies/$2" || \ + err "Can't read 'config/dependencies/$2'" "xbmkpkg" "$@" + + if [ -z "$pkg_add" ] || [ -z "$pkglist" ]; then + err "pkg_add/pkglist not both set" "xbmkpkg" "$@" + fi + + x_ $pkg_add $pkglist + + if [ -n "$aur_notice" ]; then + printf "You need AUR packages: %s\n" "$aur_notice" 1>&2 + fi +} + +xbmk_get_version() +{ + if [ -f ".version" ]; then + read -r version < ".version" || \ + err "can't read version file" "xbmk_get_version" "$@" + fi + if [ -f ".versiondate" ]; then + read -r versiondate < ".versiondate" || \ + err "can't read versiondate" xbmk_get_version "$@" + fi + + if [ -f ".version" ] && [ -z "$version" ]; then + err "version not set" "xbmk_get_version" "$@" + fi + if [ -f ".versiondate" ] && [ -z "$versiondate" ]; then + err "versiondate not set" "xbmk_get_version" "$@" + fi + + if [ ! -e ".git" ] && [ ! -f ".version" ]; then + version="unknown" + fi + if [ ! -e ".git" ] && [ ! -f ".versiondate" ]; then + versiondate="1716415872" + fi + + xbmk_sanitize_version + + if [ -n "$version" ]; then + relname="$projectname-$version" + fi +} + +# a parent instance will cause this function to return 0. +# a child instance will return 1, skipping further initialisation +# after this function is called. +xbmk_set_env() +{ + is_child="n" + + xbmkpath="$PATH" + + # unify all temporary files/directories in a single TMPDIR + if [ -n "${TMPDIR+x}" ] && [ "${TMPDIR%_*}" != "$basetmp/xbmk" ]; then + unset TMPDIR + fi + if [ -n "${TMPDIR+x}" ]; then + export TMPDIR="$TMPDIR" + xbtmp="$TMPDIR" + fi + if [ -n "${TMPDIR+x}" ]; then + is_child="y" + fi + + if [ "$is_child" = "y" ] + then + # child instance of xbmk, so we stop init after this point + # and execute the given user command upon return: + + xbmk_child_set_env + + return 1 + else + # parent instance of xbmk, so we continue initialising. + # a parent instance of xbmk never processes its own + # command directly; instead, it calls a child instance + # of xbmk, and exits with the corresponding return status. + + xbmk_parent_set_env + + return 0 + fi +} + +xbmk_child_set_env() +{ + xbmk_child_set_tmp + + if [ -z "${XBMK_CACHE+x}" ]; then + err "XBMK_CACHE unset on child" "xbmk_set_env" "$@" + fi + if [ -z "${XBMK_THREADS+x}" ]; then + xbmk_set_threads; : + fi + if [ -z "${XBMK_CACHE_MIRROR+x}" ]; then + xbmk_set_mirror + fi +} + +xbmk_child_set_tmp() +{ + badtmp="" + locktmp="" + xbtmpchk="" + + xbtmpchk="`findpath "$TMPDIR" || err "!findpath $TMPDIR"`" || \ + err "!findpath '$TMPDIR'" "xbmk_child_set_tmp" "$@" + + read -r locktmp < "$xbmklock" || \ + err "can't read '$xbmklock'" "xbmk_child_set_tmp" "$@" + + if [ "$locktmp" != "$xbtmpchk" ]; then + badtmp="TMPDIR '$xbtmpchk' changed; was '$locktmp'" + + printf "bad TMPDIR init, '%s': %s\n" "$TMPDIR" "$badtmp" 1>&2 + err "'$xbmklock' present with bad tmpdir. is a build running?" + fi + + xbtmp="$xbtmpchk" + export TMPDIR="$xbtmpchk" +} + +xbmk_parent_set_env() +{ + xbmk_parent_check_tmp + + printf "%s\n" "$xbtmp" > "$xbmklock" || \ + err "cannot create '$xbmklock'" xbmk_set_env "$@"; : + + # not really critical for security, but it's a barrier + # against the user to make them think twice before deleting it + # in case an actual instance of xbmk is already running: + + x_ chmod -w "$xbmklock" + + xbmk_parent_set_export + xbmk_set_version + + remkdir "$xbtmp" "$xbtmp/gnupath" "$xbtmp/xbmkpath" + + xbmk_set_pyver + xbmk_set_mirror +} + +xbmk_parent_check_tmp() +{ + export TMPDIR="$basetmp" + + xbmklist="`mktemp || err "can't make tmplist"`" || \ + err "can't make tmplist" xbmk_parent_check_tmp "$@" + + x_ rm -f "$xbmklist" + x_ touch "$xbmklist" + + for xtmpdir in "$basetmp"/xbmk_*; do + if [ -e "$xtmpdir" ]; then + printf "%s\n" "$xtmpdir" >> "$xbmklist" || \ + err "can't write '$xtmpdir' to '$xbmklist'" \ + "xbmk_parent_check_tmp" "$@"; : + fi + done + + # set up a unified temporary directory, for common deletion later: + export TMPDIR="`x_ mktemp -d -t xbmk_XXXXXXXX`" || \ + err "can't export TMPDIR" "xbmk_parent_check_tmp" "$@" + xbtmp="$TMPDIR" + + while read -r xtmpdir; do + if [ "$xtmpdir" = "$xbtmp" ]; then + err "pre-existing '$xbtmp'" "xbmk_parent_check_tmp" "$@" + fi + done < "$xbmklist" || \ + err "Can't read xbmklist: '$xbmklist'" "xbmk_parent_check_tmp" "$@" + + x_ rm -f "$xbmklist" +} + +xbmk_parent_set_export() +{ + export XBMK_CACHE="$xbmkpwd/cache" + + if [ -e "$XBMK_CACHE" ] && [ ! -d "$XBMK_CACHE" ]; then + err "cachedir '$XBMK_CACHE' is a file" \ + "xbmk_parent_set_export" "$@" + fi + + export PATH="$xbtmp/xbmkpath:$xbtmp/gnupath:$PATH" + xbmkpath="$PATH" + + # if "y": a coreboot target won't be built if target.cfg says release=n + # (this is used to exclude certain build targets from releases) + + if [ -z "${XBMK_RELEASE+x}" ]; then + export XBMK_RELEASE="n" + fi + if [ "$XBMK_RELEASE" = "Y" ]; then + export XBMK_RELEASE="y" + fi + if [ "$XBMK_RELEASE" != "y" ]; then + export XBMK_RELEASE="n" + fi +} + +xbmk_set_threads() +{ + if [ -z "${XBMK_THREADS+x}" ]; then + export XBMK_THREADS=1 + fi + if ! expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \ + 1>/dev/null 2>/dev/null; then + export XBMK_THREADS=1 + fi +} + +xbmk_set_version() +{ + version_="$version" + if [ -e ".git" ]; then + version="$(git describe --tags HEAD 2>&1)" || \ + version="git-$(git rev-parse HEAD 2>&1)" || \ + version="$version_" + fi + + versiondate_="$versiondate" + if [ -e ".git" ]; then + versiondate="$(git show --no-patch --no-notes \ + --pretty='%ct' HEAD)" || versiondate="$versiondate_" + fi + + if [ -z "$version" ] || [ -z "$versiondate" ]; then + err "version and/or versiondate unset" "xbmk_set_version" "$@" + fi + + update_xbmkver "." + + relname="$projectname-$version" + export LOCALVERSION="-$projectname-${version%%-*}" +} + +xbmk_set_pyver() +{ + python="python3" + pyver="2" + pyv="import sys; print(sys.version_info[:])" + + if ! pybin python3 1>/dev/null; then + python="python" + fi + if [ "$python" = "python3" ]; then + pyver="3" + fi + if ! pybin "$python" 1>/dev/null; then + pyver="" + fi + if [ -n "$pyver" ]; then + "`x_ pybin "$python"`" -c "$pyv" 1>/dev/null \ + 2>/dev/null || \ + err "Can't detect Python version." "xbmk_set_pyver" "$@" + fi + if [ -n "$pyver" ]; then + pyver="$("$(pybin "$python")" -c "$pyv" | awk '{print $1}')" + pyver="${pyver#(}" + pyver="${pyver%,}" + fi + if [ "${pyver%%.*}" != "3" ]; then + err "Bad python version (must by 3.x)" "xbmk_set_pyver" "$@" + fi + + # set up python in PATH (environmental variable): + + ( + x_ cd "$xbtmp/xbmkpath" + + x_ ln -s "`x_ pybin "$python"`" python || \ + err "can't make symlink" "xbmk_set_pyver" "$@" + + ) || \ + err "Can't link Python in $xbtmp/xbmkpath" "xbmk_set_pyver" "$@"; : +} + +# Use direct path, to prevent a hang if Python is using a virtual environment, +# not command -v, to prevent a hang when checking python's version +# See: https://docs.python.org/3/library/venv.html#how-venvs-work +pybin() +{ + py="import sys; quit(1) if sys.prefix == sys.base_prefix else quit(0)" + + venv=1 + if ! command -v "$1" 1>/dev/null 2>/dev/null; then + venv=0 + fi + if [ $venv -gt 0 ]; then + if ! "$1" -c "$py" 1>/dev/null 2>/dev/null; then + venv=0 + fi + fi + + # ideally, don't rely on PATH or hardcoded paths if python venv. + # use the *real*, direct executable linked to by the venv symlink: + + if [ $venv -gt 0 ] && [ -L "`command -v "$1" 2>/dev/null`" ]; then + pypath="$(findpath \ + "$(command -v "$1" 2>/dev/null)" 2>/dev/null || :)" + + if [ -e "$pypath" ] && [ ! -d "$pypath" ] && \ + [ -x "$pypath" ]; then + + printf "%s\n" "$pypath" + + return 0 + fi + fi + + # if python venv: fall back to common PATH directories for checking: + + [ $venv -gt 0 ] && for pypath in "/usr/local/bin" "/usr/bin"; do + if [ -e "$pypath/$1" ] && [ ! -d "$pypath/$1" ] && \ + [ -x "$pypath/$1" ]; then + + printf "%s/%s\n" "$pypath" "$1" + + return 0 + fi + done && return 1 + + # Defer to normal command -v if not a venv + if ! command -v "$1" 2>/dev/null; then + return 1 + fi +} + +xbmk_set_mirror() +{ + # defines whether cache/clone/ (regular clones) + # or cache/mirror (--mirror clones) are used, per project + + # to use cache/mirror/ do: export XBMK_CACHE_MIRROR="y" + # mirror/ stores a separate directory per repository, even per backup. + # it's slower, and uses more disk space, and some upstreams might not + # appreciate it, so it should only be used for development or archival + + if [ -z "${XBMK_CACHE_MIRROR+x}" ]; then + export XBMK_CACHE_MIRROR="n" + fi + if [ "$XBMK_CACHE_MIRROR" != "y" ]; then + export XBMK_CACHE_MIRROR="n" + fi +} + +xbmk_git_init() +{ + for gitarg in "--global user.name" "--global user.email"; do + gitcmd="git config $gitarg" + if ! $gitcmd 1>/dev/null 2>/dev/null; then + err "Run this first: $gitcmd \"your ${gitcmd##*.}\"" \ + "xbmk_git_init" "$@" + fi + done + + if [ -L ".git" ]; then + err "'$xbmkpwd/.git' is a symlink" "xbmk_git_init" "$@" + fi + if [ -e ".git" ]; then + return 0 + fi + + # GNU-specific extensions of date are used. + # TODO: that is a bug. fix it! + + x_ date --version | grep "GNU coreutils" 1>/dev/null 2>/dev/null || \ + err "Non-GNU date implementation" "xbmk_git_init" "$@" + + cdate="`x_ date -Rud @$versiondate || err "can't get date"`" || \ + err "can't get date" "xbmk_git_init" "$@" + + x_ git init 1>/dev/null 2>/dev/null + x_ git add -A . 1>/dev/null 2>/dev/null + x_ git commit -m "$projectname $version" --date "$cdate" \ + --author="xbmk <xbmk@example.com>" 1>/dev/null 2>/dev/null + x_ git tag -a "$version" -m "$projectname $version" 1>/dev/null \ + 2>/dev/null; : +} + +xbmk_child_exec() +{ + xbmk_rval=0 + + ( x_ ./mk "$@" ) || xbmk_rval=1 + + ( x_ rm -Rf "$xbtmp" ) || xbmk_rval=1 + ( x_ rm -f "$xbmklock" ) || xbmk_rval=1 + + exit $xbmk_rval +} + +xbmk_init "$@" diff --git a/include/inject.sh b/include/inject.sh new file mode 100644 index 00000000..ee3df6af --- /dev/null +++ b/include/inject.sh @@ -0,0 +1,234 @@ +# SPDX-License-Identifier: GPL-3.0-only + +# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com> +# Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com> +# Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org> + +cbcfgsdir="config/coreboot" +tmpromdel="$XBMK_CACHE/DO_NOT_FLASH" +nvm="util/nvmutil/nvm" +ifdtool="elf/coreboot/default/ifdtool" + +checkvars="CONFIG_GBE_BIN_PATH" +if [ -n "$checkvarsxbmk" ]; then + checkvars="$checkvars $checkvarsxbmk" +fi +if [ -n "$checkvarschk" ]; then + checkvars="$checkvars $checkvarschk" +fi + +archive="" +board="" +boarddir="" +IFD_platform="" +ifdprefix="" +new_mac="" +tmpromdir="" +tree="" +xchanged="" + +eval "`setvars "" $checkvars`" + +inject() +{ + remkdir "$tmpromdel" + + if [ $# -lt 1 ]; then + err "No options specified" "inject" "$@" + fi + + archive="$1"; + new_mac="xx:xx:xx:xx:xx:xx" + + new_mac="" + nuke="" + xchanged="" + + [ $# -gt 1 ] && case "$2" in + nuke) + new_mac="" + nuke="nuke" + ;; + setmac) + if [ $# -gt 2 ]; then + new_mac="$3" && \ + if [ -z "$new_mac" ]; then + err "Empty MAC address specified" "inject" "$@" + fi + fi + ;; + *) + err "Unrecognised inject mode: '$2'" "inject" "$@" ;; + esac + + if [ "$new_mac" = "keep" ]; then + new_mac="" + fi + + check_release + if check_target; then + if ! patch_release; then + return 0 + fi + fi + if [ "$xchanged" = "y" ]; then + remktar + fi + + if [ "$xchanged" = "y" ]; then + printf "\n'%s' was modified\n" "$archive" 1>&2 + else + printf "\n'%s' was NOT modified\n" "$archive" 1>&2 + fi + + x_ rm -Rf "$tmpromdel" +} + +check_release() +{ + if [ -L "$archive" ]; then + err "'$archive' is a symlink" "check_release" "$@" + fi + if e "$archive" f missing; then + err "'$archive' missing" "check_release" "$@" + fi + + archivename="`basename "$archive" || err "Can't get '$archive' name"`" \ + || err "can't get '$archive' name" "check_release" "$@" + + if [ -z "$archivename" ]; then + err "Can't determine archive name" "check_release" "$@" + fi + + case "$archivename" in + *_src.tar.xz) + err "'$archive' is a src archive!" "check_release" "$@" + ;; + grub_*|seagrub_*|custom_*|seauboot_*|seabios_withgrub_*) + err "'$archive' is a ROM image" "check_release" "$@" + ;; + *.tar.xz) _stripped_prefix="${archivename#*_}" + board="${_stripped_prefix%.tar.xz}" + ;; + *) + err "'$archive': cannot detect board" "check_release" "$@" + ;; + esac; : +} + +check_target() +{ + if [ "$board" != "${board#serprog_}" ]; then + return 1 + fi + + boarddir="$cbcfgsdir/$board" + + . "$boarddir/target.cfg" || \ + err "Can't read '$boarddir/target.cfg'" "check_target" "$@" + + if [ -z "$tree" ]; then + err "tree unset in '$boarddir/target.cfg'" "check_target" "$@" + fi + + x_ ./mk -d coreboot "$tree" + + ifdtool="elf/coreboot/$tree/ifdtool" + + if [ -n "$IFD_platform" ]; then + ifdprefix="-p $IFD_platform" + fi +} + +patch_release() +{ + if [ "$nuke" != "nuke" ]; then + x_ ./mk download "$board" + fi + + has_hashes="n" + tmpromdir="$tmpromdel/bin/$board" + + remkdir "${tmpromdir%"/bin/$board"}" + x_ tar -xf "$archive" -C "${tmpromdir%"/bin/$board"}" + + for _hashes in "vendorhashes" "blobhashes"; do + if e "$tmpromdir/$_hashes" f; then + has_hashes="y" + hashfile="$_hashes" + + break + fi + done + + if ! readkconfig; then + return 1 + elif [ -n "$new_mac" ] && [ -n "$CONFIG_GBE_BIN_PATH" ]; then + modify_mac + fi +} + +readkconfig() +{ + x_ rm -f "$xbtmp/cbcfg" + + fx_ scankconfig x_ find "$boarddir/config" -type f + + if e "$xbtmp/cbcfg" f missing; then + return 1 + fi + + . "$xbtmp/cbcfg" || \ + err "Can't read '$xbtmp/cbcfg'" "readkconfig" "$@" + + if ! setvfile "$@"; then + return 1 + fi +} + +scankconfig() +{ + for cbc in $checkvars; do + grep "$cbc" "$1" 2>/dev/null 1>>"$xbtmp/cbcfg" || : + done +} + +modify_mac() +{ + x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "$xbtmp/gbe" + + if [ -n "$new_mac" ] && [ "$new_mac" != "restore" ]; then + x_ make -C util/nvmutil clean + x_ make -C util/nvmutil + + x_ "$nvm" "$xbtmp/gbe" setmac "$new_mac" + fi + + fx_ newmac x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom" + + printf "\nThe following GbE NVM data will be written:\n" + x_ "$nvm" "$xbtmp/gbe" dump | grep -v "bytes read from file" || : +} + +newmac() +{ + if e "$1" f; then + xchanged="y" + x_ "$ifdtool" $ifdprefix -i GbE:"$xbtmp/gbe" "$1" -O "$1" + fi +} + +remktar() +{ + ( + x_ cd "${tmpromdir%"/bin/$board"}" + + printf "Re-building tar archive (please wait)\n" + mkrom_tarball "bin/$board" 1>/dev/null + + ) || err "Cannot re-generate '$archive'" "remktar" "$@" + + mv "${tmpromdir%"/bin/$board"}/bin/${relname}_${board}.tar.xz" \ + "$archive" || \ + err "'$archive' -> Can't overwrite" "remktar" "$@"; : +} diff --git a/include/lib.sh b/include/lib.sh index 894a2cac..feb411e0 100644 --- a/include/lib.sh +++ b/include/lib.sh @@ -1,283 +1,267 @@ # SPDX-License-Identifier: GPL-3.0-only + # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com> # Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com> # Copyright (c) 2020-2025 Leah Rowe <leah@libreboot.org> +# Copyright (c) 2025 Alper Nebi Yasak <alpernebiyasak@gmail.com> -export LC_COLLATE=C -export LC_ALL=C - -_ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0" - -ifdtool="elf/ifdtool/default/ifdtool" -cbfstool="elf/cbfstool/default/cbfstool" -rmodtool="elf/cbfstool/default/rmodtool" -tmpgit="$PWD/tmp/gitclone" -grubdata="config/data/grub" -err="err_" +cbfstool="elf/coreboot/default/cbfstool" +rmodtool="elf/coreboot/default/rmodtool" -err_() +mkrom_tarball() { - printf "ERROR %s: %s\n" "$0" "$1" 1>&2; exit 1 + update_xbmkver "$1" + mktarball "$1" "${1%/*}/${relname}_${1##*/}.tar.xz" + + x_ rm -Rf "$1" } -setvars() +update_xbmkver() { - _setvars="" && [ $# -lt 2 ] && $err "setvars: too few arguments" - val="$1" && shift 1 && for var in "$@"; do - _setvars="$var=\"$val\"; $_setvars" - done; printf "%s\n" "${_setvars% }" + xbmk_sanitize_version + + printf "%s\n" "$version" > "$1/.version" || \ + err "can't write '$1'" "update_xbmkver" "$@"; : + + printf "%s\n" "$versiondate" > "$1/.versiondate" || \ + err "can't write '$versiondate'" "update_xbmkver" "$@"; : } -chkvars() + +xbmk_sanitize_version() { - for var in "$@"; do - eval "[ -n \"\${$var+x}\" ] || \$err \"$var unset\"" - eval "[ -n \"\$$var\" ] || \$err \"$var unset\"" - done; return 0 -} + if [ -z "$version" ]; then + return 0 + fi -eval "`setvars "" _nogit board reinstall versiondate projectsite projectname \ - aur_notice configdir datadir version relname xbmk_parent`" + version="`printf "%s\n" "$version" | sed -e 's/\t//g'`" + version="`printf "%s\n" "$version" | sed -e 's/\ //g'`" + version="`printf "%s\n" "$version" | sed -e 's/\.\.//g'`" + version="`printf "%s\n" "$version" | sed -e 's/\.\///g'`" + version="`printf "%s\n" "$version" | sed -e 's/\//-/g'`" -for fv in projectname projectsite version versiondate; do - eval "[ ! -f \"$fv\" ] || read -r $fv < \"$fv\" || :" -done; chkvars projectname projectsite + version="${version#-}" -setcfg() + if [ -z "$version" ]; then + err "'version' empty after sanitization" \ + "xbmk_sanitize_version" "$@" + fi +} + +mktarball() { - [ $# -gt 1 ] && printf "e \"%s\" f missing && return %s;\n" "$1" "$2" - [ $# -gt 1 ] || \ - printf "e \"%s\" f not && %s \"Missing config\";\n" "$1" "$err" - printf ". \"%s\" || %s \"Could not read config\";\n" "$1" "$err" + printf "Creating tar archive '%s' from directory '%s'\n" "$2" "$1" + + if [ "${2%/*}" != "$2" ]; then + x_ xbmkdir "${2%/*}" + fi + + x_ tar -c "$1" | xz -T$XBMK_THREADS -9e > "$2" || \ + err "can't make tarball '$1'" "mktarball" "$@" } e() { - es_t="e" && [ $# -gt 1 ] && es_t="$2" + es_t="e" + + if [ $# -gt 1 ]; then + es_t="$2" + fi + es2="already exists" estr="[ -$es_t \"\$1\" ] || return 1" - [ $# -gt 2 ] && estr="[ -$es_t \"\$1\" ] && return 1" && es2="missing" - eval "$estr"; printf "%s %s\n" "$1" "$es2" 1>&2 + if [ $# -gt 2 ]; then + estr="[ -$es_t \"\$1\" ] && return 1" + es2="missing" + fi + + eval "$estr" + + printf "%s %s\n" "$1" "$es2" 1>&2 } -install_packages() +setvars() { - [ $# -lt 2 ] && $err "fewer than two arguments" - [ $# -gt 2 ] && reinstall="$3" + _setvars="" + + if [ $# -lt 2 ]; then - eval "`setcfg "config/dependencies/$2"`" + return 0 + else + val="$1" - chkvars pkg_add pkglist - $pkg_add $pkglist || $err "Cannot install packages" + shift 1 - [ -n "$aur_notice" ] && \ - printf "You need AUR packages: %s\n" "$aur_notice" 1>&2; : + while [ $# -gt 0 ]; do + printf "%s=\"%s\"\n" "$1" "$val" + + shift 1 + done + fi } -if [ $# -gt 0 ] && [ "$1" = "dependencies" ]; then - install_packages "$@" || exit 1 - exit 0 -fi - -pyver="2" -python="python3" -command -v python3 1>/dev/null || python="python" -command -v $python 1>/dev/null || pyver="" -[ -n "$pyver" ] && pyver="$($python --version | awk '{print $2}')" -if [ "${pyver%%.*}" != "3" ]; then - printf "Wrong python version, or python missing. Must be v 3.x.\n" 1>&2 - exit 1 -fi - -id -u 1>/dev/null 2>/dev/null || $err "suid check failed (id -u)" -[ "$(id -u)" != "0" ] || $err "this command as root is not permitted" - -# XBMK_CACHE is a directory, for caching downloads and git repositories -[ -z "${XBMK_CACHE+x}" ] && export XBMK_CACHE="$PWD/cache" -[ -z "$XBMK_CACHE" ] && export XBMK_CACHE="$PWD/cache" -[ -L "$XBMK_CACHE" ] && [ "$XBMK_CACHE" = "$PWD/cache" ] && \ - $err "cachedir is default, $PWD/cache, but it exists and is a symlink" -[ -L "$XBMK_CACHE" ] && export XBMK_CACHE="$PWD/cache" -[ -f "$XBMK_CACHE" ] && $err "cachedir '$XBMK_CACHE' exists but it's a file" - -# unify all temporary files/directories in a single TMPDIR -[ -z "${TMPDIR+x}" ] || [ "${TMPDIR%_*}" = "/tmp/xbmk" ] || unset TMPDIR -[ -n "${TMPDIR+x}" ] && export TMPDIR="$TMPDIR" -if [ -z "${TMPDIR+x}" ]; then - [ -f "lock" ] && $err "$PWD/lock exists. Is a build running?" - export TMPDIR="/tmp" - export TMPDIR="$(mktemp -d -t xbmk_XXXXXXXX)" - touch lock || $err "cannot create 'lock' file" - rm -Rf "$XBMK_CACHE/xbmkpath" "$XBMK_CACHE/gnupath" || \ - $err "cannot remove xbmkpath" - mkdir -p "$XBMK_CACHE/gnupath" "$XBMK_CACHE/xbmkpath" || \ - $err "cannot create gnupath" - export PATH="$XBMK_CACHE/xbmkpath:$XBMK_CACHE/gnupath:$PATH" || \ - $err "Can't create gnupath/xbmkpath" - ( - # set up python v3.x in PATH, in case it's not set up correctly. - # see code above that detected the correct python3 command. - cd "$XBMK_CACHE/xbmkpath" || $err "can't cd $XBMK_CACHE/xbmkpath" - ln -s "`command -v "$python"`" python || \ - $err "Can't set up python symlink in $XBMK_CACHE/xbmkpath" - ) || $err "Can't set up python symlink in $XBMK_CACHE/xbmkpath" - xbmk_parent="y" -fi - -# if "y": a coreboot target won't be built if target.cfg says release="n" -# (this is used to exclude certain build targets from releases) -[ -z "${XBMK_RELEASE+x}" ] && export XBMK_RELEASE="n" -[ "$XBMK_RELEASE" = "y" ] || export XBMK_RELEASE="n" - -[ -z "${XBMK_THREADS+x}" ] && export XBMK_THREADS=1 -expr "X$XBMK_THREADS" : "X-\{0,1\}[0123456789][0123456789]*$" \ - 1>/dev/null 2>/dev/null || export XBMK_THREADS=1 # user gave a non-integer - -x_() { - [ $# -lt 1 ] || "$@" || \ - $err "Unhandled non-zero exit: $(echo "$@")"; return 0 + +# return 0 if project is single-tree, otherwise 1 +# e.g. coreboot is multi-tree, so 1 +singletree() +{ + ( fx_ "eval exit 1 && err" find "config/$1/"*/ -type f \ + -name "target.cfg" ) || return 1; : } -[ -e ".git" ] || [ -f "version" ] || printf "unknown\n" > version || \ - $err "Cannot generate unknown version file" -[ -e ".git" ] || [ -f "versiondate" ] || printf "1716415872\n" > versiondate \ - || $err "Cannot generate unknown versiondate file" - -version_="$version" -[ ! -e ".git" ] || version="$(git describe --tags HEAD 2>&1)" || \ - version="git-$(git rev-parse HEAD 2>&1)" || version="$version_" -versiondate_="$versiondate" -[ ! -e ".git" ] || versiondate="$(git show --no-patch --no-notes \ - --pretty='%ct' HEAD)" || versiondate="$versiondate_" -for p in projectname version versiondate projectsite; do - chkvars "$p"; eval "x_ printf \"%s\\n\" \"\$$p\" > $p" -done -relname="$projectname-$version" -export LOCALVERSION="-$projectname-${version%%-*}" - -check_defconfig() +findpath() { - [ -d "$1" ] || $err "Target '$1' not defined." - for x in "$1"/config/*; do - [ -f "$x" ] && printf "%s\n" "$x" && return 1 - done; return 0 + if [ $# -lt 1 ]; then + err "findpath: No arguments provided" "findpath" "$@" + fi + + while [ $# -gt 0 ] + do + found="`readlink -f "$1" 2>/dev/null`" || return 1; : + + if [ -z "$found" ]; then + found="`realpath "$1" 2>/dev/null`" || \ + return 1 + fi + + printf "%s\n" "$found" + + shift 1 + done } -remkdir() +pad_one_byte() { - rm -Rf "$1" || $err "remkdir: !rm -Rf \"$1\"" - mkdir -p "$1" || $err "remkdir: !mkdir -p \"$1\"" + paddedfile="`mktemp || err "mktemp pad_one_byte"`" || \ + err "can't make tmp file" "pad_one_byte" "$@" + + x_ cat "$1" config/data/coreboot/0 > "$paddedfile" || \ + err "could not pad file '$paddedfile'" "pad_one_byte" "$1"; : + + x_ mv "$paddedfile" "$1" } -mkrom_tarball() +unpad_one_byte() { - printf "%s\n" "$version" > "$1/version" || $err "$1 !version" - printf "%s\n" "$versiondate" > "$1/versiondate" || $err "$1 !vdate" - printf "%s\n" "$projectname" > "$1/projectname" || $err "$1 !pname" + xromsize="$(expr $(stat -c '%s' "$1") - 1)" || \ + err "can't increment file size" "unpad_one_byte" "$@" + + if [ $xromsize -lt 524288 ]; then + err "too small, $xromsize: $1" "unpad_one_byte" "$@" + fi + + unpaddedfile="`mktemp || err "mktemp unpad_one_byte"`" || \ + err "can't make tmp file" "unpad_one_byte" "$@" - mktarball "$1" "${1%/*}/${relname}_${1##*/}.tar.xz"; x_ rm -Rf "$1"; : + x_ dd if="$1" of="$unpaddedfile" bs=$xromsize count=1 + x_ mv "$unpaddedfile" "$1" } -mktarball() +build_sbase() { - if [ "${2%/*}" != "$2" ]; then - mkdir -p "${2%/*}" || $err "mk, !mkdir -p \"${2%/*}\"" + if [ ! -f "$sha512sum" ]; then + x_ make -C "$xbmkpwd/util/sbase" fi - tar -c "$1" | xz -T$XBMK_THREADS -9e > "$2" || $err "mktarball 2, $1" } -mksha512sum() +remkdir() { - ( - [ "${1%/*}" != "$1" ] && x_ cd "${1%/*}" - sha512sum ./"${1##*/}" >> "$2" || $err "!sha512sum \"$1\" > \"$2\"" - ) || $err "failed to create tarball checksum" + x_ rm -Rf "$@" + x_ xbmkdir "$@" } -rmgit() +xbmkdir() { - ( - cd "$1" || $err "!cd gitrepo $1" - find . -name ".git" -exec rm -Rf {} + || $err "!rm .git $1" - find . -name ".gitmodules" -exec rm -Rf {} + || $err "!rm .gitmod $1" - ) || $err "Cannot remove .git/.gitmodules in $1" + while [ $# -gt 0 ] + do + if [ ! -d "$1" ]; then + x_ mkdir -p "$1" + fi + + shift 1 + done } -# return 0 if project is single-tree, otherwise 1 -# e.g. coreboot is multi-tree, so 1 -singletree() +fx_() { - for targetfile in "config/${1}/"*/target.cfg; do - [ -e "$targetfile" ] && [ -f "$targetfile" ] && return 1; : - done; return 0 + xchk fx_ "$@" + xcmd="$1" + + xfile="`mktemp || err "can't create tmpfile"`" || \ + err "can't make tmpfile" "fx_" "$@" + + x_ rm -f "$xfile" + x_ touch "$xfile" + + shift 1 + + "$@" 2>/dev/null | sort 1>"$xfile" 2>/dev/null || \ + err "can't sort to '$xfile'" "fx_" "$xcmd" "$@" + + dx_ "$xcmd" "$xfile" || : + x_ rm -f "$xfile" } -# can grab from the internet, or copy locally. -# if copying locally, it can only copy a file. -download() +dx_() { - _dlop="curl" && [ $# -gt 4 ] && _dlop="$5" - cached="$XBMK_CACHE/file/$4" - dl_fail="n" # 1 url, 2 url backup, 3 destination, 4 checksum - vendor_checksum "$4" "$cached" 2>/dev/null && dl_fail="y" - [ "$dl_fail" = "n" ] && e "$3" f && return 0 - mkdir -p "${3%/*}" "$XBMK_CACHE/file" || \ - $err "!mkdir '$3' '$XBMK_CACHE/file'" - for url in "$1" "$2"; do - [ "$dl_fail" = "n" ] && break - [ -z "$url" ] && continue - rm -f "$cached" || $err "!rm -f '$cached'" - if [ "$_dlop" = "curl" ]; then - curl --location --retry 3 -A "$_ua" "$url" \ - -o "$cached" || wget --tries 3 -U "$_ua" "$url" \ - -O "$cached" || continue - elif [ "$_dlop" = "copy" ]; then - [ -L "$url" ] && \ - printf "dl %s %s %s %s: '%s' is a symlink\n" \ - "$1" "$2" "$3" "$4" "$url" 1>&2 && continue - [ ! -f "$url" ] && \ - printf "dl %s %s %s %s: '%s' not a file\n" \ - "$1" "$2" "$3" "$4" "$url" 1>&2 && continue - cp "$url" "$cached" || continue - else - $err "$1 $2 $3 $4: Unsupported dlop type: '$_dlop'" - fi - vendor_checksum "$4" "$cached" || dl_fail="n" - done; [ "$dl_fail" = "y" ] && $err "$1 $2 $3 $4: not downloaded" - [ "$cached" = "$3" ] || cp "$cached" "$3" || $err "!d cp $cached $3"; : + xchk dx_ "$@" + + if [ ! -f "$2" ]; then + return 0 + fi + + while read -r fx; do + $1 "$fx" || return 1; : + done < "$2" || err "cannot read '$2'" "dx_" "$@"; : +} + +x_() +{ + if [ $# -lt 1 ]; then + return 0 + elif [ -z "$1" ]; then + err "Empty first arg" "x_" "$@" + else + "$@" || err "Unhandled error" "x_" "$@" + fi } -vendor_checksum() +xchk() { - [ "$(sha512sum "$2" | awk '{print $1}')" != "$1" ] || return 1 - printf "Bad checksum for file: %s\n" "$2" 1>&2; rm -f "$2" || :; : + if [ $# -lt 3 ]; then + err "$1 needs at least two arguments" "xchk" "$@" + elif [ -z "$2" ] || [ -z "$3" ]; then + err "arguments must not be empty" "xchk" "$@" + fi } -cbfs() +err() { - fRom="$1" # image to operate on - fAdd="$2" # file to add - fName="$3" # filename when added in CBFS - - ccmd="add-payload" && [ $# -gt 3 ] && [ $# -lt 5 ] && ccmd="add" - lzma="-c lzma" && [ $# -gt 3 ] && [ $# -lt 5 ] && lzma="-t $4" - - # hack. TODO: do it better. this whole function is cursed - if [ $# -gt 4 ]; then - # add flat binary for U-Boot (u-boot.bin) on x86 - if [ "$5" = "0x1110000" ]; then - ccmd="add-flat-binary" - lzma="-c lzma -l 0x1110000 -e 0x1110000" - fi + if [ $# -eq 1 ]; then + printf "ERROR %s: %s\n" "$0" "$1" 1>&2 || : + elif [ $# -gt 1 ]; then + printf "ERROR %s: %s: in command with args: " "$0" "$1" 1>&2 + shift 1 + xprintf "$@" 1>&2 + else + printf "ERROR, but no arguments provided to err\n" 1>&2 fi - "$cbfstool" "$fRom" $ccmd -f "$fAdd" -n "$fName" $lzma || \ - $err "CBFS fail: $fRom $ccmd -f '$fAdd' -n '$fName' $lzma"; : + exit 1 } -mk() +xprintf() { - mk_flag="$1" || $err "No argument given" - shift 1 && for mk_arg in "$@"; do - ./mk $mk_flag $mk_arg || $err "./mk $mk_flag $mk_arg"; : - done; : + xprintfargs=0 + while [ $# -gt 0 ]; do + printf "\"%s\"" "$1" + if [ $# -gt 1 ]; then + printf " " + fi + + xprintfargs=1 + shift 1 + done + if [ $xprintfargs -gt 0 ]; then + printf "\n" + fi } diff --git a/include/mrc.sh b/include/mrc.sh index f5db2ff0..9c50af5c 100644 --- a/include/mrc.sh +++ b/include/mrc.sh @@ -1,61 +1,77 @@ # SPDX-License-Identifier: GPL-2.0-only # Logic based on util/chromeos/crosfirmware.sh in coreboot cfc26ce278. -# Modifications in this version are Copyright 2021, 2023 and 2024 Leah Rowe. +# Modifications in this version are Copyright 2021,2023-2025 Leah Rowe. # Original copyright detailed in repo: https://review.coreboot.org/coreboot/ -eval "`setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL`" +MRC_board="" +MRC_hash="" +MRC_url="" +MRC_url_bkup="" +SHELLBALL="" + +extract_refcode() +{ + extract_mrc + + # cbfstool after coreboot 4.13 changed the stage file attribute scheme, + # and refcode is extracted from an image using the old scheme. we use + # cbfstool from coreboot 4.11_branch, the tree used by ASUS KGPE-D16: + + if [ -z "$cbfstoolref" ]; then + err "cbfstoolref not set" "extract_refcode" "$@" + fi + + x_ xbmkdir "${_pre_dest%/*}" + + x_ "$cbfstoolref" "$appdir/bios.bin" extract \ + -m x86 -n fallback/refcode -f "$appdir/ref" -r RO_SECTION + + # enable the Intel GbE device, if told by offset MRC_refcode_gbe + if [ -n "$MRC_refcode_gbe" ]; then + x_ dd if="config/ifd/hp820g2/1.bin" of="$appdir/ref" bs=1 \ + seek=$MRC_refcode_gbe count=1 conv=notrunc; : + fi + + x_ mv "$appdir/ref" "$_pre_dest" +} extract_mrc() { - chkvars "MRC_board" "CONFIG_MRC_FILE" + if [ -z "$MRC_board" ]; then + err "MRC_board unset" "extract_mrc" "$@" + elif [ -z "$CONFIG_MRC_FILE" ]; then + err "CONFIG_MRC_FILE unset" "extract_mrc" "$@" + fi + SHELLBALL="chromeos-firmwareupdate-$MRC_board" ( - x_ cd "$appdir" - extract_partition "${MRC_url##*/}" - extract_archive "$SHELLBALL" . - ) || $err "mrc download/extract failure" + x_ cd "$appdir" + extract_partition "${MRC_url##*/}" + extract_archive "$SHELLBALL" . - "$cbfstool" "$appdir/"bios.bin extract -n mrc.bin \ - -f "$_dest" -r RO_SECTION || $err "extract_mrc: !$cbfstool $_dest" + ) || err "mrc download/extract failure" "extract_mrc" "$@" - [ -n "$CONFIG_REFCODE_BLOB_FILE" ] && extract_refcode; return 0 + x_ "$cbfstool" "$appdir/"bios.bin extract -n mrc.bin \ + -f "${_pre_dest%/*}/mrc.bin" -r RO_SECTION } extract_partition() { printf "Extracting ROOT-A partition\n" + ROOTP=$( printf "unit\nB\nprint\nquit\n" | \ parted "${1%.zip}" 2>/dev/null | grep "ROOT-A" ) START=$(( $( echo $ROOTP | cut -f2 -d\ | tr -d "B" ) )) - SIZE=$(( $( echo $ROOTP | cut -f4 -d\ | tr -d "B" ) )) - - dd if="${1%.zip}" of="root-a.ext2" bs=1024 skip=$(( $START / 1024 )) \ - count=$(( $SIZE / 1024 )) || $err "ex dd ${1%.zip}, root-a.ext2" - - printf "cd /usr/sbin\ndump chromeos-firmwareupdate $SHELLBALL\nquit" \ - | debugfs "root-a.ext2" || $err "can't extract shellball" -} -extract_refcode() -{ - _refdest="${CONFIG_REFCODE_BLOB_FILE##*../}" - e "$_refdest" f && return 0 - - # cbfstool changed the attributes scheme for stage files, - # incompatible with older versions before coreboot 4.14, - # so we need coreboot 4.13 cbfstool for certain refcode files - chkvars cbfstoolref - mkdir -p "${_refdest%/*}" || $err "ref: !mkdir -p ${_refdest%/*}" + SIZE=$(( $( echo $ROOTP | cut -f4 -d\ | tr -d "B" ) )) - "$cbfstoolref" "$appdir/bios.bin" extract \ - -m x86 -n fallback/refcode -f "$_refdest" -r RO_SECTION \ - || $err "extract_refcode $board: !cbfstoolref $_refdest" + x_ dd if="${1%.zip}" of="root-a.ext2" bs=1024 \ + skip=$(( $START / 1024 )) count=$(( $SIZE / 1024 )) - # enable the Intel GbE device, if told by offset MRC_refcode_gbe - [ -z "$MRC_refcode_gbe" ] || dd if="config/ifd/hp820g2/1.bin" \ - of="$_refdest" bs=1 seek=$MRC_refcode_gbe count=1 conv=notrunc || \ - $err "extract_refcode $_refdest: byte $MRC_refcode_gbe"; return 0 + printf "cd /usr/sbin\ndump chromeos-firmwareupdate %s\nquit" \ + "$SHELLBALL" | debugfs "root-a.ext2" || \ + err "!extract shellball" "extract_partition" "$@" } diff --git a/include/release.sh b/include/release.sh new file mode 100644 index 00000000..e9017a05 --- /dev/null +++ b/include/release.sh @@ -0,0 +1,130 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +# Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org> + +reldest="" +reldir="" +relmode="" +rsrc="" +vdir="" + +release() +{ + export XBMK_RELEASE="y" + + reldir="release" + + while getopts m: option + do + if [ -z "$OPTARG" ]; then + err "empty argument not allowed" "release" "$@" + fi + + case "$option" in + m) + relmode="$OPTARG" + ;; + *) + err "invalid option '-$option'" "release" "$@" + ;; + esac + done + + reldest="$reldir/$version" + if [ -e "$reldest" ]; then + err "already exists: \"$reldest\"" "release" "$@" + fi + + vdir="`mktemp -d || err "can't make vdir"`" || \ + err "can't make tmp vdir" "release" "$@" + vdir="$vdir/$version" + + rsrc="$vdir/${relname}_src" + + remkdir "$vdir" + x_ git clone . "$rsrc" + update_xbmkver "$rsrc" + + prep_release src + prep_release tarball + if [ "$relmode" != "src" ]; then + prep_release bin + fi + x_ rm -Rf "$rsrc" + + x_ xbmkdir "$reldir" + x_ mv "$vdir" "$reldir" + x_ rm -Rf "${vdir%"/$version"}" + + printf "\n\nDONE! Check release files under %s\n" "$reldest" +} + +prep_release() +{ + ( + if [ "$1" != "tarball" ]; then + x_ cd "$rsrc" + if [ ! -e "cache" ]; then + x_ ln -s "$XBMK_CACHE" "cache" + fi + fi + + prep_release_$1 + + ) || err "can't prep release $1" "prep_release" "$@" +} + +prep_release_src() +{ + x_ cp -R "util/sbase" "util/sbase2" + + x_ ./mk -f + + fx_ "x_ rm -Rf" x_ find . -name ".git" + fx_ "x_ rm -Rf" x_ find . -name ".gitmodules" + + ( fx_ nuke x_ find config -type f -name "nuke.list" ) || \ + err "can't prune project files" "prep_release_src" "$@"; : +} + +nuke() +{ + r="$rsrc/src/${1#config/}" + + if [ -d "${r%/*}" ]; then + x_ cd "${r%/*}" + + dx_ "x_ rm -Rf" "$rsrc/$1" + fi +} + +prep_release_tarball() +{ + git log --graph --pretty=format:'%Cred%h%Creset %s %Creset' \ + --abbrev-commit > "$rsrc/CHANGELOG" || \ + err "can't create '$rsrc/CHANGELOG'" "prep_release_tarball" "$@" + + x_ rm -f "$rsrc/lock" "$rsrc/cache" + x_ rm -Rf "$rsrc/xbmkwd" "$rsrc/util/sbase" + x_ mv "$rsrc/util/sbase2" "$rsrc/util/sbase" + + ( + x_ cd "${rsrc%/*}" + x_ mktarball "${rsrc##*/}" "${rsrc##*/}.tar.xz" + + ) || err "can't create src tarball" "prep_release_tarball" "$@"; : +} + +prep_release_bin() +{ + x_ ./mk -d coreboot + + x_ ./mk -b coreboot + x_ ./mk -b pico-serprog + x_ ./mk -b stm32-vserprog + x_ ./mk -b pcsx-redux + + fx_ mkrom_tarball x_ find bin -maxdepth 1 -type d -name "serprog_*" + + x_ mv bin ../roms +} diff --git a/include/rom.sh b/include/rom.sh index 2a7bc837..6f0e3529 100644 --- a/include/rom.sh +++ b/include/rom.sh @@ -1,193 +1,374 @@ # SPDX-License-Identifier: GPL-3.0-or-later + # Copyright (c) 2014-2016,2020-2021,2023-2025 Leah Rowe <leah@libreboot.org> # Copyright (c) 2021-2022 Ferass El Hafidi <vitali64pmemail@protonmail.com> # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com> # Copyright (c) 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com> # Copyright (c) 2023-2024 Riku Viitanen <riku.viitanen@protonmail.com> -mkserprog() +grubdata="config/data/grub" + +buildser() { - [ "$_f" = "-d" ] && return 0 # dry run - basename -as .h "$serdir/"*.h > "$TMPDIR/ser" || $err "!mk $1 $TMPDIR" - - while read -r sertarget; do - [ "$1" = "pico" ] && - x_ rm -rf "$sersrc/build" \ - && (pt=$(x_ grep "pico_cmake_set" \ - "$picosdk/src/boards/include/boards/$sertarget.h" \ - | grep "PICO_PLATFORM" | cut -d= -f2 | tr -d [:blank:]) - mkdir -p "$sersrc/build_$pt" - ln -srf "$sersrc/build_$pt/" "$sersrc/build") \ - && x_ cmake -DPICO_BOARD="$sertarget" \ - -DPICO_SDK_PATH="$picosdk" -B "$sersrc/build" "$sersrc" \ - && x_ cmake --build "$sersrc/build" - [ "$1" = "stm32" ] && x_ make -C "$sersrc" \ - libopencm3-just-make BOARD=$sertarget && x_ make -C \ - "$sersrc" BOARD=$sertarget; x_ mkdir -p "bin/serprog_$1" - x_ mv "$serx" "bin/serprog_$1/serprog_$sertarget.${serx##*.}" - done < "$TMPDIR/ser" - - [ "$XBMK_RELEASE" = "y" ] && mkrom_tarball "bin/serprog_$1"; return 0 + if [ "$1" = "pico" ]; then + x_ cmake -DPICO_BOARD="$2" \ + -DPICO_SDK_PATH="$picosdk" -B "$sersrc/build" "$sersrc" + x_ cmake --build "$sersrc/build" + elif [ "$1" = "stm32" ]; then + x_ make -C "$sersrc" libopencm3-just-make BOARD=$2 + x_ make -C "$sersrc" BOARD=$2 + fi + + x_ xbmkdir "bin/serprog_$1" + x_ mv "$serx" "bin/serprog_$1/serprog_$2.${serx##*.}" } copyps1bios() { - x_ rm -Rf bin/playstation - x_ mkdir -p bin/playstation + $if_dry_build \ + return 0 + + remkdir "bin/playstation" x_ cp src/pcsx-redux/src/mips/openbios/openbios.bin bin/playstation - printf "MIT License\n\nCopyright (c) 2019-2024 PCSX-Redux authors\n\n" \ - > bin/playstation/COPYING.txt || $err "!pcsx-redux copyright" - cat config/snippet/mit >>bin/playstation/COPYING.txt || $err "!pcsx MIT" + printf "MIT License\n\nCopyright (c) 2019-2025 PCSX-Redux authors\n\n" \ + > bin/playstation/COPYING.txt || \ + err "can't write PCSX Redux copyright info" "copyps1bios" "$@" + + x_ cat config/snippet/mit >>bin/playstation/COPYING.txt || \ + err "can't copy MIT license snippet" "copyps1bios" "$@" } mkpayload_grub() { - eval "`setvars "" grub_modules grub_install_modules`" - $dry eval "`setcfg "$grubdata/module/$tree"`" - $dry x_ rm -f "$srcdir/grub.elf"; $dry \ - "$srcdir/grub-mkstandalone" --grub-mkimage="$srcdir/grub-mkimage" \ + grub_modules="" + grub_install_modules="" + + $if_dry_build \ + return 0 + + . "$grubdata/module/$tree" || \ + err "Can't read '$grubdata/module/$tree'" "mkpayload_grub" "$@" + + x_ rm -f "$srcdir/grub.elf" + + x_ "$srcdir/grub-mkstandalone" \ + --grub-mkimage="$srcdir/grub-mkimage" \ -O i386-coreboot -o "$srcdir/grub.elf" -d "${srcdir}/grub-core/" \ --fonts= --themes= --locales= --modules="$grub_modules" \ --install-modules="$grub_install_modules" \ "/boot/grub/grub_default.cfg=${srcdir}/.config" \ - "/boot/grub/grub.cfg=$grubdata/memdisk.cfg" || \ - $err "$tree: cannot build grub.elf"; return 0 + "/boot/grub/grub.cfg=$grubdata/memdisk.cfg"; : } -mkvendorfiles() +corebootpremake() { - [ -z "$mode" ] && $dry cook_coreboot_config - check_coreboot_utils "$tree" + if [ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ]; then + return 0 + fi + + $if_not_dry_build \ + cook_coreboot_config + + fx_ check_coreboot_util printf "cbfstool\nifdtool\n" + printf "%s\n" "${version%%-*}" > "$srcdir/.coreboot-version" || \ - $err "!mk $srcdir .coreboot-version" - [ -z "$mode" ] && [ "$target" != "$tree" ] && \ - x_ ./mk download "$target"; return 0 + err "!mk $srcdir .coreboot-version" "corebootpremake" "$@" + + if [ -z "$mode" ] && [ "$target" != "$tree" ]; then + x_ ./mk download "$target" + fi } cook_coreboot_config() { - [ -f "$srcdir/.config" ] || return 0 - printf "CONFIG_CCACHE=y\n" >> "$srcdir/.config" || \ - $err "$srcdir/.config: Could not enable ccache" - make -C "$srcdir" oldconfig || $err "Could not cook $srcdir/.config"; : + if [ -z "$mode" ] && [ -f "$srcdir/.config" ]; then + printf "CONFIG_CCACHE=y\n" >> "$srcdir/.config" || \ + err "can't cook '$srcdir'" "cook_coreboot_config" "$@" + fi } -check_coreboot_utils() +check_coreboot_util() { - for util in cbfstool ifdtool; do - [ "$badhash" = "y" ] && x_ rm -f "elf/$util/$1/$util" - e "elf/$util/$1/$util" f && continue - - utilelfdir="elf/$util/$1" - utilsrcdir="src/coreboot/$1/util/$util" - - utilmode="" && [ -n "$mode" ] && utilmode="clean" - x_ make -C "$utilsrcdir" $utilmode -j$XBMK_THREADS $makeargs - if [ -z "$mode" ] && [ ! -f "$utilelfdir/$util" ]; then - x_ mkdir -p "$utilelfdir" - x_ cp "$utilsrcdir/$util" "$utilelfdir" - [ "$util" = "cbfstool" ] || continue - x_ cp "$utilsrcdir/rmodtool" "$utilelfdir" - elif [ -n "$mode" ]; then - x_ rm -Rf "$utilelfdir" - fi; continue - done; return 0 + if [ "$badhash" = "y" ]; then + x_ rm -f "elf/coreboot/$tree/$1" + fi + if e "elf/coreboot/$tree/$1" f; then + return 0 + fi + + utilelfdir="elf/coreboot/$tree" + utilsrcdir="src/coreboot/$tree/util/$1" + + utilmode="" + if [ -n "$mode" ]; then + utilmode="clean" + fi + + x_ make -C "$utilsrcdir" $utilmode -j$XBMK_THREADS $makeargs + + if [ -n "$mode" ]; then + # TODO: is this rm command needed? + + x_ rm -Rf "$utilelfdir" + + return 0 + elif [ -n "$mode" ] || [ -f "$utilelfdir/$1" ]; then + return 0 + fi + + x_ xbmkdir "$utilelfdir" + x_ cp "$utilsrcdir/$1" "$utilelfdir" + + if [ "$1" = "cbfstool" ]; then + x_ cp "$utilsrcdir/rmodtool" "$utilelfdir" + fi +} + +coreboot_pad_one_byte() +{ + if [ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ]; then + return 0 + fi + + $if_not_dry_build \ + pad_one_byte "$srcdir/build/coreboot.rom" } mkcorebootbin() { - [ "$target" = "$tree" ] && return 0 + if [ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ]; then + return 0 + fi + + $if_not_dry_build \ + check_coreboot_util cbfstool + + $if_not_dry_build \ + check_coreboot_util ifdtool + + for y in "$target_dir/config"/*; do + defconfig="$y" + mkcorebootbin_real + done + + mkcoreboottar +} + +mkcorebootbin_real() +{ + if [ "$target" = "$tree" ]; then + return 0 + fi - tmprom="$TMPDIR/coreboot.rom" - $dry x_ cp "$srcdir/build/coreboot.rom" "$tmprom" + tmprom="$xbtmp/coreboot.rom" - initmode="${defconfig##*/}"; displaymode="${initmode##*_}" - [ "$displaymode" = "$initmode" ] && displaymode="" # "normal" config + initmode="${defconfig##*/}" + displaymode="${initmode##*_}" + if [ "$displaymode" = "$initmode" ]; then + # blank it for "normal" or "fspgop" configs: + + displaymode="" + fi initmode="${initmode%%_*}" - cbfstool="elf/cbfstool/$tree/cbfstool" + cbfstool="elf/coreboot/$tree/cbfstool" - [ "$payload_uboot_i386" = "y" ] && \ - [ "$payload_uboot_amd64" = "y" ] && \ - $err "'$target' enables 32- and 64-bit x86 U-Boot" + # cbfstool option backends, if they exist + cbfscfg="config/coreboot/$target/cbfs.cfg" - if [ "$payload_uboot_i386" = "y" ] || \ - [ "$payload_uboot_amd64" = "y" ]; then - printf "'%s' has x86 U-Boot; assuming SeaBIOS=y\n" \ - "$target" 1>&2 + elfrom="elf/coreboot/$tree/$target/$initmode" + if [ -n "$displaymode" ]; then + elfrom="${elfrom}_$displaymode" + fi + elfrom="$elfrom/coreboot.rom" + + $if_not_dry_build \ + x_ cp "$elfrom" "$tmprom" + + $if_not_dry_build \ + unpad_one_byte "$tmprom" + + if [ -n "$payload_uboot" ] && [ "$payload_uboot" != "amd64" ] && \ + [ "$payload_uboot" != "i386" ] && [ "$payload_uboot" != "arm64" ] + then + err "'$target' defines bad u-boot type '$payload_uboot'" \ + "mkcorebootbin_real" "$@" + fi + + if [ -n "$payload_uboot" ] && [ "$payload_uboot" != "arm64" ]; then payload_seabios="y" fi - [ -n "$uboot_config" ] || uboot_config="default" - [ "$payload_uboot" = "y" ] || payload_seabios="y" - [ "$payload_grub" = "y" ] && payload_seabios="y" - [ "$payload_seabios" = "y" ] && [ "$payload_uboot" = "y" ] && \ - $dry $err "$target: U-Boot(arm64) and SeaBIOS/GRUB both enabled." + if [ -z "$uboot_config" ]; then + uboot_config="default" + fi + if [ "$payload_grub" = "y" ]; then + payload_seabios="y" + fi + if [ "$payload_seabios" = "y" ] && [ "$payload_uboot" = "arm64" ]; then + $if_not_dry_build \ + err "$target: U-Boot arm / SeaBIOS/GRUB both enabled" \ + "mkcorebootbin_real" "$@" + fi - [ -z "$grub_scan_disk" ] && grub_scan_disk="nvme ahci ata" + if [ -z "$grub_scan_disk" ]; then + grub_scan_disk="nvme ahci ata" + fi + if [ -z "$grubtree" ]; then + grubtree="default" + fi + grubelf="elf/grub/$grubtree/$grubtree/payload/grub.elf" - [ -n "$grubtree" ] || grubtree="default" - grubelf="elf/grub/$grubtree/payload/grub.elf" + if [ "$payload_memtest" != "y" ]; then + payload_memtest="n" + fi + if [ "$(uname -m)" != "x86_64" ]; then + payload_memtest="n" + fi - [ "$payload_memtest" = "y" ] || payload_memtest="n" - [ "$(uname -m)" = "x86_64" ] || payload_memtest="n" + if [ "$payload_grubsea" = "y" ] && [ "$initmode" = "normal" ]; then + payload_grubsea="n" + fi + if [ "$payload_grub" != "y" ]; then + payload_grubsea="n" + fi - [ "$payload_grubsea" = "y" ] && [ "$initmode" = "normal" ] && \ - payload_grubsea="n" - [ "$payload_grub" = "y" ] || payload_grubsea="n" + $if_dry_build \ + return 0 - if $dry grep "CONFIG_PAYLOAD_NONE=y" "$defconfig"; then - [ "$payload_seabios" = "y" ] && pname="seabios" && \ - $dry add_seabios - [ "$payload_uboot" = "y" ] && pname="uboot" && $dry add_uboot + if [ -f "$cbfscfg" ]; then + dx_ add_cbfs_option "$cbfscfg" + fi + + if grep "CONFIG_PAYLOAD_NONE=y" "$defconfig"; then + if [ "$payload_seabios" = "y" ]; then + pname="seabios" + add_seabios + fi + if [ "$payload_uboot" = "arm64" ]; then + pname="uboot" + add_uboot + fi else - pname="custom" && $dry cprom; : + pname="custom" + cprom fi; : } +# options for cbfs backend (as opposed to nvram/smmstore): + +add_cbfs_option() +{ + # TODO: input sanitization (currently mitigated by careful config) + + op_name="`printf "%s\n" "$1" | awk '{print $1}'`" + op_arg="`printf "%s\n" "$1" | awk '{print $2}'`" + + if [ -z "$op_name" ] || [ -z "$op_arg" ]; then + return 0 + fi + + ( x_ "$cbfstool" "$tmprom" remove -n "option/$op_name" 1>/dev/null \ + 2>/dev/null ) || : + + x_ "$cbfstool" "$tmprom" add-int -i "$op_arg" -n "option/$op_name" +} + +# in our design, SeaBIOS is also responsible for starting either +# a GRUB or U-Boot payload. this is because SeaBIOS is generally +# a more reliable codebase, so it's less likely to cause a brick +# during testing and development, or user configuration. if one +# of the u-boot or grub payloads fails, the user still has a +# functional SeaBIOS setup to fall back on. watch: + add_seabios() { - if [ "$payload_uboot_i386" = "y" ] || \ - [ "$payload_uboot_amd64" = "y" ]; then - $dry add_uboot + if [ -n "$payload_uboot" ] && [ "$payload_uboot" != "arm64" ]; then + # we must add u-boot first, because it's added as a flat + # binary at a specific offset for secondary program loader + + $if_not_dry_build \ + add_uboot fi - _seabioself="elf/seabios/default/$initmode/bios.bin.elf" + _seabioself="elf/seabios/default/default/$initmode/bios.bin.elf" + [ "$initmode" = "fspgop" ] && \ + _seabioself="elf/seabios/default/default/libgfxinit/bios.bin.elf" + + _seaname="fallback/payload" + if [ "$payload_grubsea" = "y" ]; then + _seaname="seabios.elf" + fi - _seaname="fallback/payload" && [ "$payload_grubsea" = "y" ] && \ - _seaname="seabios.elf" cbfs "$tmprom" "$_seabioself" "$_seaname" + x_ "$cbfstool" "$tmprom" add-int -i 3000 -n etc/ps2-keyboard-spinup - _z="2"; [ "$initmode" = "vgarom" ] && _z="0" - x_ "$cbfstool" "$tmprom" add-int -i $_z -n etc/pci-optionrom-exec + opexec="2" + if [ "$initmode" = "vgarom" ]; then + opexec="0" + fi + x_ "$cbfstool" "$tmprom" add-int -i $opexec -n etc/pci-optionrom-exec + x_ "$cbfstool" "$tmprom" add-int -i 0 -n etc/optionroms-checksum - [ "$initmode" = "libgfxinit" ] && \ - cbfs "$tmprom" "$seavgabiosrom" vgaroms/seavgabios.bin raw + if [ "$initmode" = "libgfxinit" ] || [ "$initmode" = "fspgop" ]; then + cbfs "$tmprom" "$seavgabiosrom" vgaroms/seavgabios.bin raw + fi + + if [ "$payload_memtest" = "y" ]; then + # because why not have memtest? + + cbfs "$tmprom" "elf/memtest86plus/memtest.bin" img/memtest + fi + + if [ "$payload_grub" = "y" ]; then + add_grub + fi + + if [ "$payload_grubsea" != "y" ]; then + # ROM image where SeaBIOS doesn't load grub/u-boot first. + # U-Boot/GRUB available in ESC menu if enabled for the board - [ "$payload_memtest" = "y" ] && cbfs "$tmprom" \ - "elf/memtest86plus/memtest.bin" img/memtest + cprom + fi + + # now make "SeaUBoot" and "SeaGRUB" images, where SeaBIOS auto-loads + # SeaBIOS or U-Boot first; users can bypass this by pressing ESC + # in the SeaBIOS menu, to boot devices using SeaBIOS itself instead - [ "$payload_grub" = "y" ] && add_grub + if [ "$payload_uboot" = "amd64" ] && \ + [ "$displaymode" != "txtmode" ] && \ + [ "$initmode" != "normal" ] && [ "$payload_grubsea" != "y" ]; then + pname="seauboot" + cprom "seauboot" + fi - [ "$payload_grubsea" != "y" ] && cprom - [ "$payload_uboot_amd64" = "y" ] && [ "$displaymode" != "txtmode" ] && \ - [ "$initmode" != "normal" ] && [ "$payload_grubsea" != "y" ] && \ - pname="seauboot" && cprom "seauboot" - [ "$payload_grub" = "y" ] && pname="seagrub" && mkseagrub; : + if [ "$payload_grub" = "y" ]; then + pname="seagrub" + mkseagrub + fi } add_grub() { - _grubname="img/grub2" && [ "$payload_grubsea" = "y" ] && \ - _grubname="fallback/payload" + # path in CBFS for the GRUB payload + _grubname="img/grub2" + if [ "$payload_grubsea" = "y" ]; then + _grubname="fallback/payload" + fi + cbfs "$tmprom" "$grubelf" "$_grubname" + printf "set grub_scan_disk=\"%s\"\n" "$grub_scan_disk" \ - > "$TMPDIR/tmpcfg" || $err "$target: !insert scandisk" - cbfs "$tmprom" "$TMPDIR/tmpcfg" scan.cfg raw - [ "$initmode" != "normal" ] && [ "$displaymode" != "txtmode" ] && \ - cbfs "$tmprom" "$grubdata/background/background1280x800.png" \ - "background.png" raw; : + > "$xbtmp/tmpcfg" || \ + err "$target: !insert scandisk" "add_grub" "$@" + + cbfs "$tmprom" "$xbtmp/tmpcfg" scan.cfg raw + + if [ "$initmode" != "normal" ] && [ "$displaymode" != "txtmode" ]; then + cbfs "$tmprom" "$grubdata/background/background1280x800.png" \ + "background.png" raw + fi } mkseagrub() @@ -197,20 +378,20 @@ mkseagrub() else cbfs "$tmprom" "$grubdata/bootorder" bootorder raw fi - for keymap in config/data/grub/keymap/*.gkb; do - [ -f "$keymap" ] && cprom "${keymap##*/}"; : - done; : + + fx_ cprom x_ find "$grubdata/keymap" -type f -name "*.gkb" } add_uboot() { if [ "$displaymode" = "txtmode" ]; then - printf "cb/%s: Cannot use U-Boot in text mode\n" \ - "$target" 1>&2 + printf "cb/%s: Can't use U-Boot in text mode\n" "$target" 1>&2 + return 0 elif [ "$initmode" = "normal" ]; then - printf "cb/%s: Cannot use U-Boot in normal initmode\n" \ + printf "cb/%s: Can't use U-Boot in normal initmode\n" \ "$target" 1>&2 + return 0 fi @@ -220,54 +401,114 @@ add_uboot() # aarch64 targets: ubcbfsargs="" ubpath="fallback/payload" + ubtree="default" ubtarget="$target" + # override for x86/x86_64 targets: - if [ "$payload_uboot_i386" = "y" ] || \ - [ "$payload_uboot_amd64" = "y" ]; then + if [ -n "$payload_uboot" ] && [ "$payload_uboot" != "arm64" ]; then ubcbfsargs="-l 0x1110000 -e 0x1110000" # 64-bit and 32-bit - # on 64-bit, 0x1120000 is the SPL, and stub before that + # on 64-bit, 0x1120000 is the SPL, with a stub that + # loads it, located at 0x1110000 + ubpath="img/u-boot" # 64-bit + ubtree="x86_64" ubtarget="amd64coreboot" - [ "$payload_uboot_i386" = "y" ] && ubpath="u-boot" # 32-bit - [ "$payload_uboot_i386" = "y" ] && ubtarget="i386coreboot"; : + + if [ "$payload_uboot" = "i386" ] + then + ubpath="u-boot" # 32-bit + ubtree="x86" + ubtarget="i386coreboot"; : + fi fi - ubdir="elf/u-boot/$ubtarget/$uboot_config" + ubdir="elf/u-boot/$ubtree/$ubtarget/$uboot_config" # aarch64 targets: - ubootelf="$ubdir/u-boot.elf" && [ ! -f "$ubootelf" ] && \ - ubootelf="$ubdir/u-boot" + ubootelf="$ubdir/u-boot.elf" + if [ ! -f "$ubootelf" ]; then + ubootelf="$ubdir/u-boot" + fi + # override for x86/x86_64 targets: - [ "$payload_uboot_i386" = "y" ] && ubootelf="$ubdir/u-boot-dtb.bin" - [ "$payload_uboot_amd64" = "y" ] && \ - ubootelf="$ubdir/u-boot-x86-with-spl.bin" # EFI-compatible + if [ "$payload_uboot" = "i386" ]; then + ubootelf="$ubdir/u-boot-dtb.bin" + elif [ "$payload_uboot" = "amd64" ]; then + ubootelf="$ubdir/u-boot-x86-with-spl.bin" # EFI-compatible + fi - [ -f "$ubootelf" ] || $err "cb/$ubtarget: Can't find u-boot" cbfs "$tmprom" "$ubootelf" "$ubpath" $ubcbfsargs - [ "$payload_seabios" = "y" ] || cprom; : + if [ "$payload_seabios" != "y" ]; then + cprom + fi } +# prepare the final image in bin/ for user installation: + cprom() { + cpcmd="cp" + + tmpnew="" newrom="bin/$target/${pname}_${target}_$initmode.rom" - [ -n "$displaymode" ] && newrom="${newrom%.rom}_$displaymode.rom" - [ $# -gt 0 ] && [ "$1" != "seauboot" ] && \ - newrom="${newrom%.rom}_${1%.gkb}.rom" - - x_ mkdir -p "bin/$target" - x_ cp "$tmprom" "$newrom" && [ $# -gt 0 ] && [ "$1" != "seauboot" ] && \ - cbfs "$newrom" "config/data/grub/keymap/$1" keymap.gkb raw - [ $# -gt 0 ] && [ "$1" = "seauboot" ] && \ - cbfs "$newrom" "config/data/grub/bootorder_uboot" bootorder raw; : + + if [ -n "$displaymode" ]; then + newrom="${newrom%.rom}_$displaymode.rom" + fi + if [ $# -gt 0 ] && [ "${1%.gkb}" != "$1" ]; then + tmpnew="${1##*/}" + newrom="${newrom%.rom}_${tmpnew%.gkb}.rom" + fi + + irom="$tmprom" + + if [ $# -gt 0 ]; then + irom="$(mktemp || err "!mk irom, $(echo "$@")")" || \ + err "can't copy rom" "cprom" "$@" + + x_ cp "$tmprom" "$irom" && cpcmd="mv" + + if [ "${1%.gkb}" != "$1" ]; then + cbfs "$irom" "$grubdata/keymap/$tmpnew" keymap.gkb raw + elif [ "$1" = "seauboot" ]; then + cbfs "$irom" "$grubdata/bootorder_uboot" bootorder raw + fi + fi + + printf "Creating new %s image: '%s'\n" "$projectname" "$newrom" + + x_ xbmkdir "bin/$target" + x_ $cpcmd "$irom" "$newrom" +} + +cbfs() +{ + ccmd="add-payload" + lzma="-c lzma" + + if [ $# -gt 3 ] && [ $# -lt 5 ]; then + ccmd="add" + lzma="-t $4" + elif [ $# -gt 4 ] && [ "$5" = "0x1110000" ]; then + ccmd="add-flat-binary" && \ + lzma="-c lzma -l 0x1110000 -e 0x1110000" + fi + + x_ "$cbfstool" "$1" $ccmd -f "$2" -n "$3" $lzma } +# for release files: + mkcoreboottar() { - [ "$target" = "$tree" ] && return 0 - [ "$XBMK_RELEASE" = "y" ] || return 0 - [ "$release" != "n" ] || return 0 - $dry mkrom_tarball "bin/$target" - $dry ./mk inject "bin/${relname}_${target}.tar.xz" nuke || \ - $err "Can't delete vendorfiles in 'bin/${relname}_$target.tar.xz'" - return 0 + $if_dry_build \ + return 0 + + if [ "$target" = "$tree" ] || [ "$XBMK_RELEASE" != "y" ] || \ + [ "$release" = "n" ]; then + return 0 + fi + + mkrom_tarball "bin/$target" + x_ ./mk inject "bin/${relname}_${target}.tar.xz" nuke } diff --git a/include/tree.sh b/include/tree.sh new file mode 100644 index 00000000..166a3d86 --- /dev/null +++ b/include/tree.sh @@ -0,0 +1,772 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +# Copyright (c) 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com> +# Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com> +# Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org> + +# flag e.g. ./mk -b <-- mkflag would be "b" +flag="" + +# macros, overridden depending on the flag +if_do_make="" +if_dry_build=":" +if_not_do_make=":" +if_not_dry_build="" + +autoconfargs="" +autogenargs="" +badhash="" +badtghash="" +bootstrapargs="" +build_depend="" +buildtype="" +cleanargs="" +cmakedir="" +cmd="" +defconfig="" +dest_dir="" +elfdir="" +forcepull="" +gccdir="" +gccfull="" +gccver="" +gnatdir="" +gnatfull="" +gnatver="" +listfile="" +makeargs="" +mdir="" +mkhelper="" +mkhelpercfg="" +mode="" +postmake="" +premake="" +project="" +release="" +rev="" +srcdir="" +target="" +target_dir="" +targets="" +tree="" +xarch="" +xgcctree="" +xlang="" + +trees() +{ + flags="f:F:b:m:u:c:x:s:l:n:d:" + + while getopts $flags option + do + if [ -n "$flag" ]; then + err "only one flag is permitted" "trees" "$@" + fi + + flag="$1" + + # the "mode" variable is affixed to a make command, example: + # ./mk -m coreboot does: make menuconfig -C src/coreboot/tree + + case "$flag" in + -d) + # -d is similar to -b, except that + # a large number of operations will be + # skipped. these are "if_not_dry_build build" scenarios + # where only a subset of build tasks are done, + # and $if_not_dry_build is prefixed to skipped commands + + if_dry_build="" + if_not_dry_build=":" + ;; + -b) : ;; + -u) mode="oldconfig" ;; + -m) mode="menuconfig" ;; + -c) mode="distclean" ;; + -x) mode="crossgcc-clean" ;; + -f|-F) # download source code for a project + # macros. colon means false. + if_do_make=":" + if_dry_build="" + if_not_do_make="" + if_not_dry_build=":" + if [ "$flag" = "-F" ]; then + # don't skip git fetch/pull on cached src + + forcepull="y" + fi + ;; + -s) mode="savedefconfig" ;; + -l) mode="olddefconfig" ;; + -n) mode="nconfig" ;; + *) err "invalid option '-$option'" "trees" "$@" ;; + esac + + if [ -z "${OPTARG+x}" ]; then + shift 1 + + break + fi + + project="${OPTARG#src/}" + project="${project#config/git/}" + + shift 2 + done + + if [ -z "$flag" ]; then + err "missing flag ($flags)" "trees" "$@" + elif [ -z "$project" ]; then + fx_ "x_ ./mk $flag" x_ ls -1 config/git + + return 1 + + elif [ ! -f "config/git/$project/pkg.cfg" ]; then + err "config/git/$project/pkg.cfg missing" "trees" "$@" + fi + + elfdir="elf/$project" + datadir="config/data/$project" + configdir="config/$project" + srcdir="src/$project" + dest_dir="$elfdir" + + listfile="$datadir/build.list" + if [ ! -f "$listfile" ]; then + listfile="" # build.list is optional on all projects + fi + + mkhelpercfg="$datadir/mkhelper.cfg" + if e "$mkhelpercfg" f missing; then + mkhelpercfg="$xbtmp/mkhelper.cfg" + x_ touch "$mkhelpercfg" + fi + + targets="$*" + cmd="build_targets $targets" + if singletree "$project"; then + cmd="build_project" + fi + + remkdir "${tmpgit%/*}" +} + +build_project() +{ + if ! configure_project "$configdir"; then + return 0 + elif [ -f "$listfile" ]; then + if ! $if_not_dry_build elfcheck; then + return 0 + fi + fi + + if [ "$mode" = "distclean" ]; then + mode="clean" + fi + + if ! run_make_command; then + return 0 + fi + + if [ -z "$mode" ]; then + $if_not_dry_build \ + copy_elf; : + fi +} + +build_targets() +{ + if [ ! -d "$configdir" ]; then + err "directory '$configdir' doesn't exist" "build_targets" "$@" + elif [ $# -lt 1 ]; then + targets="$(ls -1 "$configdir")" || \ + err "'$configdir': can't list targets" "build_targets" "$@" + fi + + for x in $targets + do + unset CROSS_COMPILE + export PATH="$xbmkpath" + + if [ "$x" = "list" ]; then + x_ ls -1 "config/$project" + + listfile="" + + break + fi + + printf "'make %s', '%s', '%s'\n" "$mode" "$project" "$x" + + target="$x" + + x_ handle_defconfig + + if [ -z "$mode" ]; then + x_ $postmake + fi + done; : +} + +handle_defconfig() +{ + target_dir="$configdir/$target" + + if [ ! -f "CHANGELOG" ]; then + fetch_project "$project" + fi + if ! configure_project "$target_dir"; then + return 0 + fi + + if [ -z "$tree" ]; then + err "$configdir: 'tree' not set" "handle_defconfig" "$@" + fi + + srcdir="src/$project/$tree" + + if [ "$mode" = "${mode%clean}" ] && [ ! -d "$srcdir" ]; then + return 0 + fi + + for y in "$target_dir/config"/* + do + if [ "$flag" != "-d" ] && [ ! -f "$y" ]; then + continue + elif [ "$flag" != "-d" ]; then + defconfig="$y" + fi + + if [ -z "$mode" ]; then + check_defconfig || continue; : + fi + + if [ -z "$mode" ]; then + for _xarch in $xarch; do + $if_dry_build \ + break + if [ -n "$_xarch" ]; then + check_cross_compiler "$_xarch" + fi + done; : + fi + + handle_makefile + + if [ -z "$mode" ]; then + $if_not_dry_build \ + copy_elf + fi + done; : +} + +configure_project() +{ + _tcfg="$1/target.cfg" + + autoconfargs="" + badhash="" + badtghash="" + bootstrapargs="" + build_depend="" + buildtype="" + cleanargs="" + makeargs="" + mkhelper="" + postmake="" + premake="" + release="" + xarch="" + xgcctree="" + xlang="" + + if [ ! -f "$_tcfg" ]; then + buildtype="auto" + fi + + # globally initialise all variables for a source tree / target: + + if e "$datadir/mkhelper.cfg" f; then + . "$datadir/mkhelper.cfg" || \ + err "Can't read '$datadir/mkhelper.cfg'" \ + "configure_project" "$@" + fi + + # override target/tree specific variables from per-target config: + + while e "$_tcfg" f || [ "$cmd" != "build_project" ] + do + # TODO: implement infinite loop detection here, caused + # by project targets pointing to other targets/trees + # when then ultimate point back repeatedly; this is + # currently avoided simply by careful configuration. + # temporary files per tree/target name could be created + # per iteration, and then checked the next time + + printf "Loading %s config: %s\n" "$project" "$_tcfg" + + rev="" + tree="" + + . "$_tcfg" || \ + err "Can't read '$_tcfg'" "configure_project" "$@" + + if [ "$flag" = "-d" ]; then + build_depend="" # dry run + fi + if [ "$cmd" = "build_project" ]; then + # single-tree, so it can't be a target pointing + # to a main source tree + + break + fi + $if_do_make \ + break + if [ "${_tcfg%/*/target.cfg}" = "${_tcfg%"/$tree/target.cfg"}" ] + then + # we have found the main source tree that + # a given target uses; no need to continue + + break + else + _tcfg="${_tcfg%/*/target.cfg}/$tree/target.cfg" + fi + + done + + if [ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ]; then + return 1 + fi + if [ -n "$buildtype" ] && [ "${mode%config}" != "$mode" ]; then + return 1 + fi + + if [ -z "$mode" ]; then + $if_not_dry_build \ + build_dependencies + fi + + mdir="$xbmkpwd/config/submodule/$project" + if [ -n "$tree" ]; then + mdir="$mdir/$tree" + fi + + if [ ! -f "CHANGELOG" ]; then + delete_old_project_files + $if_not_do_make \ + fetch_${cmd#build_} + fi + $if_not_do_make \ + return 1 + + x_ ./mk -f "$project" "$target" +} + +# projects can specify which other projects +# to build first, as declared dependencies: + +build_dependencies() +{ + for bd in $build_depend + do + bd_project="${bd%%/*}" + bd_tree="${bd##*/}" + + if [ -z "$bd_project" ]; then + $if_not_dry_build \ + err "$project/$tree: !bd '$bd'" \ + "build_dependencies" "$@" + fi + if [ "${bd##*/}" = "$bd" ]; then + bd_tree="" + fi + if [ -n "$bd_project" ]; then + $if_not_dry_build \ + x_ ./mk -b $bd_project $bd_tree; : + fi + done; : +} + +# delete_old_project_files along with project_up_to_date, +# concatenates the sha512sum hashes of all files related to +# a project, tree or target, then gets the sha512sum of that +# concatenation. this is checked against any existing +# calculation previously cached; if the result differs, or +# nothing was previously stored, we know to delete resources +# such as builds, project sources and so on, for auto-rebuild: + +delete_old_project_files() +{ + # delete an entire source tree along with its builds: + if ! project_up_to_date hash "$tree" badhash "$datadir" \ + "$configdir/$tree" "$mdir"; then + x_ rm -Rf "src/$project/$tree" "elf/$project/$tree" + fi + + x_ cp "$xbtmp/new.hash" "$XBMK_CACHE/hash/$project$tree" + + if singletree "$project" || [ -z "$target" ] || [ "$target" = "$tree" ] + then + return 0 + fi + + # delete only the builds of a given target, but not src. + # this is useful when only the target config changes, for + # example x200_8mb coreboot configs change, but not coreboot: + + if ! project_up_to_date tghash "$target" badtghash "$configdir/$target" + then + x_ rm -Rf "elf/$project/$tree/$target" + fi + + x_ cp "$xbtmp/new.hash" "$XBMK_CACHE/tghash/$project$target" +} + +project_up_to_date() +{ + old_hash="" + hash="" + + hashdir="$1" + hashname="$2" + badhashvar="$3" + + shift 3 + + x_ xbmkdir "$XBMK_CACHE/$hashdir" + + if [ -f "$XBMK_CACHE/$hashdir/$project$hashname" ]; then + read -r old_hash < "$XBMK_CACHE/$hashdir/$project$hashname" \ + || err \ + "$hashdir: err '$XBMK_CACHE/$hashdir/$project$hashname'" \ + "project_up_to_date" "$hashdir" "$hashname" "$badhashvar" \ + "$@" + fi + + build_sbase + fx_ "x_ util/sbase/sha512sum" find "$@" -type f -not -path \ + "*/.git*/*" | awk '{print $1}' > "$xbtmp/tmp.hash" || \ + err "!h $project $hashdir" \ + "project_up_to_date" "$hashdir" "$hashname" "$badhashvar" "$@" + + hash="$(x_ "$sha512sum" "$xbtmp/tmp.hash" | awk '{print $1}' || \ + err)" || err "$hashname: Can't read sha512 of '$xbtmp/tmp.hash'" \ + "project_up_to_date" "$hashdir" "$hashname" "$badhashvar" "$@" + + if [ "$hash" != "$old_hash" ] || \ + [ ! -f "$XBMK_CACHE/$hashdir/$project$hashname" ]; then + eval "$badhashvar=\"y\"" + fi + + printf "%s\n" "$hash" > "$xbtmp/new.hash" || \ + err "!mkhash $xbtmp/new.hash ($hashdir $hashname $badhashvar)" \ + "project_up_to_date" "$hashdir" "$hashname" "$badhashvar" "$@" + + eval "[ \"\$$badhashvar\" = \"y\" ] && return 1"; : +} + +check_cross_compiler() +{ + cbdir="src/coreboot/$tree" + + if [ "$project" != "coreboot" ]; then + cbdir="src/coreboot/default" + fi + if [ -n "$xgcctree" ]; then + cbdir="src/coreboot/$xgcctree" + fi + + xfix="${1%-*}" + + if [ "$xfix" = "x86_64" ]; then + xfix="x64" + fi + + xgccfile="elf/coreboot/$tree/xgcc_${xfix}_was_compiled" + xgccargs="crossgcc-$xfix UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS" + + x_ ./mk -f coreboot "${cbdir#src/coreboot/}" + x_ xbmkdir "elf/coreboot/$tree" # TODO: is this needed? + + export PATH="$xbmkpwd/$cbdir/util/crossgcc/xgcc/bin:$PATH" + export CROSS_COMPILE="${xarch% *}-" + + if [ -n "$xlang" ]; then + export BUILD_LANGUAGES="$xlang" + fi + + if [ -f "$xgccfile" ]; then + # skip the build, because a build already exists: + + return 0 + fi + + check_gnu_path gcc gnat || x_ check_gnu_path gnat gcc + make -C "$cbdir" $xgccargs || x_ make -C "$cbdir" $xgccargs + + # this tells subsequent runs that the build was already done: + x_ touch "$xgccfile" + + # reset hostcc in PATH: + remkdir "$xbtmp/gnupath" +} + +# fix mismatching gcc/gnat versions on debian trixie/sid. as of december 2024, +# trixie/sid had gnat-13 as gnat and gcc-14 as gcc, but has gnat-14 in apt. in +# some cases, gcc 13+14 and gnat-13 are present; or gnat-14 and gcc-14, but +# gnat in PATH never resolves to gnat-14, because gnat-14 was "experimental" + +check_gnu_path() +{ + if ! command -v "$1" 1>/dev/null; then + err "Host '$1' unavailable" "check_gnu_path" "$@" + fi + + gccdir="" + gccfull="" + gccver="" + gnatdir="" + gnatfull="" + gnatver="" + + if host_gcc_gnat_match "$@"; then + return 0 + fi + + if ! match_gcc_gnat_versions "$@"; then + return 1 + fi +} + +# check if gcc/gnat versions already match: + +host_gcc_gnat_match() +{ + if ! gnu_setver "$1" "$1"; then + err "Command '$1' unavailable." "check_gnu_path" "$@" + fi + gnu_setver "$2" "$2" || : + + eval "[ -z \"\$$1ver\" ] && err \"Cannot detect host '$1' version\"" + + if [ "$gnatfull" != "$gccfull" ]; then + # non-matching gcc/gnat versions + + return 1 + fi +} + +# find all gcc/gnat versions, matching them up in PATH: + +match_gcc_gnat_versions() +{ + eval "$1dir=\"$(dirname "$(command -v "$1")")\"" + eval "_gnudir=\"\$$1dir\"" + eval "_gnuver=\"\$$1ver\"" + + for _bin in "$_gnudir/$2-"* + do + if [ "${_bin#"$_gnudir/$2-"}" = "$_gnuver" ] && [ -x "$_bin" ] + then + _gnuver="${_bin#"$_gnudir/$2-"}" + break + fi + done + + if ! gnu_setver "$2" "$_gnudir/$2-$_gnuver"; then + return 1 + elif [ "$gnatfull" != "$gccfull" ]; then + return 1 + fi + + ( link_gcc_gnat_versions "$@" "$_gnudir" "$_gnuver" ) || \ + err "Can't link '$2-$_gnuver' '$_gnudir'" "check_gnu_path" "$@"; : +} + +# create symlinks in PATH, so that the GCC/GNAT versions match: + +link_gcc_gnat_versions() +{ + _gnudir="$3" + _gnuver="$4" + + remkdir "$xbtmp/gnupath" + + x_ cd "$xbtmp/gnupath" + + for _gnubin in "$_gnudir/$2"*"-$_gnuver" + do + _gnuutil="${_gnubin##*/}" + if [ -e "$_gnubin" ]; then + x_ ln -s "$_gnubin" "${_gnuutil%"-$_gnuver"}" + fi + done +} + +# get the gcc/gnat version +# fail: return 1 if util not found +gnu_setver() +{ + eval "$2 --version 1>/dev/null 2>/dev/null || return 1" + + eval "$1ver=\"`"$2" --version 2>/dev/null | head -n1`\"" + eval "$1ver=\"\${$1ver##* }\"" + eval "$1full=\"\$$1ver\"" + eval "$1ver=\"\${$1ver%%.*}\""; : +} + +check_defconfig() +{ + if [ ! -f "$defconfig" ]; then + $if_not_dry_build \ + err "$project/$target: no config" "check_defconfig" "$@" + fi + + dest_dir="$elfdir/$tree/$target/${defconfig#"$target_dir/config/"}" + + # skip build if a previous one exists: + + $if_dry_build \ + return 0 + if ! elfcheck; then + return 1 + fi +} + +elfcheck() +{ + # TODO: *STILL* very hacky check. do it properly (based on build.list) + + ( fx_ "eval exit 1 && err" find "$dest_dir" -type f ) || return 1; : +} + +handle_makefile() +{ + if $if_not_dry_build check_makefile "$srcdir"; then + $if_not_dry_build \ + x_ make -C "$srcdir" $cleanargs clean + fi + + if [ -f "$defconfig" ]; then + x_ cp "$defconfig" "$srcdir/.config" + fi + + run_make_command || \ + err "no makefile!" "handle_makefile" "$@" + + _copy=".config" + + if [ "$mode" = "savedefconfig" ]; then + _copy="defconfig" + fi + + if [ "${mode%config}" != "$mode" ]; then + $if_not_dry_build \ + x_ cp "$srcdir/$_copy" "$defconfig"; : + fi + + if [ -e "$srcdir/.git" ] && [ "$project" = "u-boot" ] && \ + [ "$mode" = "distclean" ]; then + $if_not_dry_build \ + x_ git -C "$srcdir" $cleanargs clean -fdx; : + fi +} + +run_make_command() +{ + if [ -z "$mode" ]; then + x_ $premake + fi + + if $if_not_dry_build check_cmake "$srcdir"; then + if [ -z "$mode" ]; then + $if_not_dry_build \ + check_autoconf "$srcdir" + fi + fi + if ! $if_not_dry_build check_makefile "$srcdir"; then + return 1 + fi + + $if_not_dry_build \ + x_ make -C "$srcdir" $mode -j$XBMK_THREADS $makeargs + + if [ -z "$mode" ]; then + x_ $mkhelper + fi + + if ! check_makefile "$srcdir"; then + return 0 + fi + + if [ "$mode" = "clean" ]; then + $if_dry_build \ + return 0 + if ! make -C "$srcdir" $cleanargs distclean; then + x_ make -C "$srcdir" $cleanargs clean + fi + fi +} + +check_cmake() +{ + $if_dry_build \ + return 0 + if [ ! -n "$cmakedir" ]; then + return 0 + elif ! check_makefile "$1"; then + if ! cmake -B "$1" "$1/$cmakedir"; then + x_ check_makefile "$1" + fi + fi + x_ check_makefile "$1"; : +} + +check_autoconf() +{ + ( + x_ cd "$1" + + if [ -f "bootstrap" ]; then + x_ ./bootstrap $bootstrapargs + fi + if [ -f "autogen.sh" ]; then + x_ ./autogen.sh $autogenargs + fi + if [ -f "configure" ]; then + x_ ./configure $autoconfargs; : + fi + + ) || err "can't bootstrap project: $1" "check_autoconf" "$@"; : +} + +check_makefile() +{ + if [ ! -f "$1/Makefile" ] && [ ! -f "$1/makefile" ] && \ + [ ! -f "$1/GNUmakefile" ]; then + + return 1 + fi +} + +copy_elf() +{ + if [ -f "$listfile" ]; then + x_ xbmkdir "$dest_dir" + fi + + if [ -f "$listfile" ]; then + while read -r f + do + if [ -f "$srcdir/$f" ]; then + x_ cp "$srcdir/$f" "$dest_dir" + fi + + done < "$listfile" || err \ + "cannot read '$listfile'" "copy_elf" "$@"; : + fi + + ( x_ make clean -C "$srcdir" $cleanargs ) || \ + err "can't make-clean '$srcdir'" "copy_elf" "$@"; : +} diff --git a/include/vendor.sh b/include/vendor.sh index bde245d9..509cea8e 100644 --- a/include/vendor.sh +++ b/include/vendor.sh @@ -1,756 +1,735 @@ # SPDX-License-Identifier: GPL-3.0-only + # Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com> # Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com> # Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org> -e6400_unpack="$PWD/src/bios_extract/dell_inspiron_1100_unpacker.py" -me7updateparser="$PWD/util/me7_update_parser/me7_update_parser.py" -pfs_extract="$PWD/src/biosutilities/Dell_PFS_Extract.py" -uefiextract="$PWD/elf/uefitool/uefiextract" +# These are variables and functions, extending the functionality of +# inject.sh, to be used with lbmk; they are kept separate here, so that +# the main inject.sh can be as similar as possible between lbmk and cbmk, +# so that cherry-picking lbmk patches into cbmk yields fewer merge conflicts. + +# When reading this file, you should imagine that it is part of inject.sh, +# with inject.sh concatenated onto vendor.sh; they are inexorably intertwined. +# The main "mk" script sources vendor.sh first, and then inject.sh, in lbmk. + +e6400_unpack="$xbmkpwd/src/bios_extract/dell_inspiron_1100_unpacker.py" +me7updateparser="$xbmkpwd/util/me7_update_parser/me7_update_parser.py" +pfs_extract="$xbmkpwd/src/biosutilities/Dell_PFS_Extract.py" +uefiextract="$xbmkpwd/elf/uefitool/uefiextract" +bsdtar="$xbmkpwd/elf/libarchive/bsdtar" +bsdunzip="$xbmkpwd/elf/libarchive/bsdunzip" vendir="vendorfiles" appdir="$vendir/app" -cbcfgsdir="config/coreboot" -hashfiles="vendorhashes blobhashes" # blobhashes for backwards compatibility -dontflash="!!! AN ERROR OCCURED! Please DO NOT flash if injection failed. !!!" vfix="DO_NOT_FLASH_YET._FIRST,_INJECT_FILES_VIA_INSTRUCTIONS_ON_LIBREBOOT.ORG_" -vguide="https://libreboot.org/docs/install/ivy_has_common.html" -tmpromdel="$PWD/tmp/DO_NOT_FLASH" - -cv="CONFIG_HAVE_ME_BIN CONFIG_ME_BIN_PATH CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \ - CONFIG_SMSC_SCH5545_EC_FW_FILE CONFIG_KBC1126_FIRMWARE CONFIG_KBC1126_FW1 \ - CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2_OFFSET \ - CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_BOARD_DELL_E6400 \ - CONFIG_HAVE_MRC CONFIG_MRC_FILE CONFIG_HAVE_REFCODE_BLOB \ - CONFIG_REFCODE_BLOB_FILE CONFIG_GBE_BIN_PATH CONFIG_IFD_BIN_PATH \ - CONFIG_LENOVO_TBFW_BIN CONFIG_FSP_FD_PATH CONFIG_FSP_M_FILE \ - CONFIG_FSP_S_FILE CONFIG_FSP_S_CBFS CONFIG_FSP_M_CBFS CONFIG_FSP_USE_REPO \ - CONFIG_FSP_FULL_FD" - -eval "`setvars "" has_hashes EC_hash DL_hash DL_url_bkup MRC_refcode_gbe vcfg \ - E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \ - E6400_VGA_romname SCH5545EC_DL_url_bkup SCH5545EC_DL_hash _dest tree \ - mecleaner kbc1126_ec_dump MRC_refcode_cbtree new_mac _dl SCH5545EC_DL_url \ - archive EC_url boarddir rom cbdir DL_url nukemode cbfstoolref FSPFD_hash \ - _7ztest ME11bootguard ME11delta ME11version ME11sku ME11pch tmpromdir \ - IFD_platform ifdprefix cdir sdir _me _metmp mfs TBFW_url_bkup TBFW_url \ - TBFW_hash TBFW_size hashfile xromsize xchanged EC_url_bkup need_files \ - vfile $cv`" - -vendor_download() -{ - [ $# -gt 0 ] || $err "No argument given"; export PATH="$PATH:/sbin" - board="$1"; readcfg && readkconfig && bootstrap && getfiles; : -} -readkconfig() +# lbmk-specific extension to the "checkvars" variable (not suitable for cbmk) +checkvarschk="CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_HAVE_MRC \ + CONFIG_HAVE_ME_BIN CONFIG_LENOVO_TBFW_BIN CONFIG_VGA_BIOS_FILE \ + CONFIG_FSP_M_FILE CONFIG_FSP_S_FILE CONFIG_KBC1126_FW1 CONFIG_KBC1126_FW2" + +# lbmk-specific extensions to the "checkvars" variable (not suitable for cbmk) +checkvarsxbmk="CONFIG_ME_BIN_PATH CONFIG_SMSC_SCH5545_EC_FW_FILE \ + CONFIG_FSP_FULL_FD CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2_OFFSET \ + CONFIG_FSP_USE_REPO CONFIG_VGA_BIOS_ID CONFIG_BOARD_DELL_E6400 \ + CONFIG_FSP_S_CBFS CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE \ + CONFIG_FSP_FD_PATH CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE CONFIG_FSP_M_CBFS" + +# lbmk-specific extensions; general variables +cbdir="" +cbfstoolref="" +has_hashes="" +hashfile="" +kbc1126_ec_dump="" +mecleaner="" +mfs="" +nuke="" +rom="" +vcfg="" +xromsize="" + +_7ztest="" +_dest="" +_dl="" +_dl_bin="" +_me="" +_metmp="" +_pre_dest="" + +# lbmk-specific extensions; declared in pkg.cfg files in config/vendor/ +DL_hash="" +DL_url="" +DL_url_bkup="" +E6400_VGA_bin_hash="" +E6400_VGA_DL_hash="" +E6400_VGA_DL_url="" +E6400_VGA_DL_url_bkup="" +E6400_VGA_offset="" +E6400_VGA_romname="" +EC_FW1_hash="" +EC_FW2_hash="" +EC_hash="" +EC_url="" +EC_url_bkup="" +FSPFD_hash="" +FSPM_bin_hash="" +FSPS_bin_hash="" +ME11bootguard="" +ME11delta="" +ME11pch="" +ME11sku="" +ME11version="" +ME_bin_hash="" +MEclean="" +MRC_bin_hash="" +MRC_refcode_cbtree="" +MRC_refcode_gbe="" +REF_bin_hash="" +SCH5545EC_bin_hash="" +SCH5545EC_DL_hash="" +SCH5545EC_DL_url="" +SCH5545EC_DL_url_bkup="" +TBFW_bin_hash="" +TBFW_hash="" +TBFW_size="" +TBFW_url="" +TBFW_url_bkup="" +XBMKmecleaner="" + +download() { - check_defconfig "$boarddir" 1>"$TMPDIR/vendorcfg.list" && return 1 - - rm -f "$TMPDIR/tmpcbcfg" || $err "!rm $TMPDIR/tmpcbcfg - $dontflash" - while read -r cbcfgfile; do - for cbc in $cv; do - rm -f "$TMPDIR/tmpcbcfg2" || \ - $err "!rm $TMPDIR/tmpcbcfg2 - $dontflash" - grep "$cbc" "$cbcfgfile" 1>"$TMPDIR/tmpcbcfg2" \ - 2>/dev/null || : - [ -f "$TMPDIR/tmpcbcfg2" ] || continue - cat "$TMPDIR/tmpcbcfg2" >> "$TMPDIR/tmpcbcfg" || \ - $err "!cat $TMPDIR/tmpcbcfg2 - $dontflash" - done - done < "$TMPDIR/vendorcfg.list" - - eval "`setcfg "$TMPDIR/tmpcbcfg"`" - - for c in CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \ - CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW \ - CONFIG_LENOVO_TBFW_BIN CONFIG_FSP_M_FILE CONFIG_FSP_S_FILE; do - eval "[ \"\${$c}\" = \"/dev/null\" ] && continue" - eval "[ -z \"\${$c}\" ] && continue" - eval "`setcfg "$vfile"`"; return 0 - done - printf "Vendor files not needed for: %s\n" "$board" 1>&2; return 1 -} + if [ $# -lt 1 ]; then + err "No argument given" "download" "$@" + fi -bootstrap() -{ - x_ ./mk -f coreboot ${cbdir##*/} - mk -b uefitool biosutilities bios_extract - [ -d "${kbc1126_ec_dump%/*}" ] && x_ make -C "$cbdir/util/kbc1126" - [ -n "$MRC_refcode_cbtree" ] && \ - cbfstoolref="elf/cbfstool/$MRC_refcode_cbtree/cbfstool" && \ - x_ ./mk -d coreboot "$MRC_refcode_cbtree"; return 0 + export PATH="$PATH:/sbin" + board="$1" + + if check_target; then + readkconfig download + fi } getfiles() { - [ -z "$CONFIG_HAVE_ME_BIN" ] || fetch intel_me "$DL_url" \ - "$DL_url_bkup" "$DL_hash" "$CONFIG_ME_BIN_PATH" - [ -z "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" ] || fetch sch5545ec \ - "$SCH5545EC_DL_url" "$SCH5545EC_DL_url_bkup" "$SCH5545EC_DL_hash" \ - "$CONFIG_SMSC_SCH5545_EC_FW_FILE" - [ -z "$CONFIG_KBC1126_FIRMWARE" ] || fetch kbc1126ec "$EC_url" \ - "$EC_url_bkup" "$EC_hash" "$CONFIG_KBC1126_FW1" - [ -z "$CONFIG_VGA_BIOS_FILE" ] || fetch e6400vga "$E6400_VGA_DL_url" \ - "$E6400_VGA_DL_url_bkup" "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE" - [ -z "$CONFIG_HAVE_MRC" ] || fetch "mrc" "$MRC_url" "$MRC_url_bkup" \ - "$MRC_hash" "$CONFIG_MRC_FILE" - [ -z "$CONFIG_LENOVO_TBFW_BIN" ] || fetch "tbfw" "$TBFW_url" \ - "$TBFW_url_bkup" "$TBFW_hash" "$CONFIG_LENOVO_TBFW_BIN" - # - # in the future, we might have libre fsp-s and then fsp-m. - # therefore, handle them separately, in case one of them is libre; if - # one of them was, the path wouldn't be set. - # - [ -z "$CONFIG_FSP_M_FILE" ] || fetch "fspm" "$CONFIG_FSP_FD_PATH" \ - "$CONFIG_FSP_FD_PATH" "$FSPFD_hash" "$CONFIG_FSP_M_FILE" copy - [ -z "$CONFIG_FSP_S_FILE" ] || fetch "fsps" "$CONFIG_FSP_FD_PATH" \ - "$CONFIG_FSP_FD_PATH" "$FSPFD_hash" "$CONFIG_FSP_S_FILE" copy; : + if [ -n "$CONFIG_HAVE_ME_BIN" ];then + fetch intel_me "$DL_url" "$DL_url_bkup" "$DL_hash" \ + "$CONFIG_ME_BIN_PATH" curl "$ME_bin_hash" + fi + if [ -n "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" ]; then + fetch sch5545ec "$SCH5545EC_DL_url" "$SCH5545EC_DL_url_bkup" \ + "$SCH5545EC_DL_hash" "$CONFIG_SMSC_SCH5545_EC_FW_FILE" \ + "curl" "$SCH5545EC_bin_hash" + fi + if [ -n "$CONFIG_KBC1126_FW1" ]; then + fetch kbc1126ec "$EC_url" "$EC_url_bkup" "$EC_hash" \ + "$CONFIG_KBC1126_FW1" curl "$EC_FW1_hash" + fi + if [ -n "$CONFIG_KBC1126_FW2" ]; then + fetch kbc1126ec "$EC_url" "$EC_url_bkup" "$EC_hash" \ + "$CONFIG_KBC1126_FW2" curl "$EC_FW2_hash" + fi + if [ -n "$CONFIG_VGA_BIOS_FILE" ]; then + fetch e6400vga "$E6400_VGA_DL_url" "$E6400_VGA_DL_url_bkup" \ + "$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE" "curl" \ + "$E6400_VGA_bin_hash" + fi + if [ -n "$CONFIG_HAVE_MRC" ]; then + fetch "mrc" "$MRC_url" "$MRC_url_bkup" "$MRC_hash" \ + "$CONFIG_MRC_FILE" "curl" "$MRC_bin_hash" + fi + if [ -n "$CONFIG_REFCODE_BLOB_FILE" ]; then + fetch "refcode" "$MRC_url" "$MRC_url_bkup" "$MRC_hash" \ + "$CONFIG_REFCODE_BLOB_FILE" "curl" "$REF_bin_hash" + fi + if [ -n "$CONFIG_LENOVO_TBFW_BIN" ]; then + fetch "tbfw" "$TBFW_url" "$TBFW_url_bkup" "$TBFW_hash" \ + "$CONFIG_LENOVO_TBFW_BIN" "curl" "$TBFW_bin_hash" + fi + if [ -n "$CONFIG_FSP_M_FILE" ]; then + fetch "fsp" "$CONFIG_FSP_FD_PATH" "$CONFIG_FSP_FD_PATH" \ + "$FSPFD_hash" "$CONFIG_FSP_M_FILE" "copy" "$FSPM_bin_hash" + fi + if [ -n "$CONFIG_FSP_S_FILE" ]; then + fetch "fsp" "$CONFIG_FSP_FD_PATH" "$CONFIG_FSP_FD_PATH" \ + "$FSPFD_hash" "$CONFIG_FSP_S_FILE" "copy" "$FSPS_bin_hash" + fi } fetch() { - dl_type="$1"; dl="$2"; dl_bkup="$3"; dlsum="$4"; _dest="${5##*../}" - [ "$5" = "/dev/null" ] && return 0; _dl="$XBMK_CACHE/file/$dlsum" - if [ "$dl_type" = "fspm" ] || [ "$dl_type" = "fsps" ]; then - # HACK: if grabbing fsp from coreboot, fix the path for lbmk - for _cdl in dl dl_bkup; do - eval "$_cdl=\"\${$_cdl##*../}\"; _cdp=\"\$$_cdl\"" - [ -f "$_cdp" ] || _cdp="$cbdir/$_cdp" - [ -f "$_cdp" ] && eval "$_cdl=\"$_cdp\"" - done - fi - - dlop="curl" && [ $# -gt 5 ] && dlop="$6" - download "$dl" "$dl_bkup" "$_dl" "$dlsum" "$dlop" - - rm -Rf "${_dl}_extracted" || $err "!rm ${_ul}_extracted. $dontflash" - e "$_dest" f && return 0 - - mkdir -p "${_dest%/*}" || \ - $err "mkdirs: !mkdir -p ${_dest%/*} - $dontflash" - remkdir "$appdir"; extract_archive "$_dl" "$appdir" "$dl_type" || \ - [ "$dl_type" = "e6400vga" ] || \ - $err "mkd $_dest $dl_type: !extract. $dontflash" - - eval "extract_$dl_type"; set -u -e - e "$_dest" f missing && $err "!extract_$dl_type. $dontflash"; : + dl_type="$1" + dl="$2" + dl_bkup="$3" + dlsum="$4" + _dest="${5##*../}" + _pre_dest="$XBMK_CACHE/tmpdl/check" + dlop="$6" + binsum="$7" + + if [ -z "$binsum" ]; then + err "binsum is empty (no checksum)" "fetch" "$@" + fi + + _dl="$XBMK_CACHE/file/$dlsum" # internet file to extract from e.g. .exe + _dl_bin="$XBMK_CACHE/file/$binsum" # extracted file e.g. me.bin + + if [ "$5" = "/dev/null" ]; then + return 0 + fi + + # an extracted vendor file will be placed in pre_dest first, for + # verifying its checksum. if it matches, it is later moved to _dest + remkdir "${_pre_dest%/*}" "$appdir" + + # HACK: if grabbing fsp from coreboot, fix the path for lbmk + if [ "$dl_type" = "fsp" ] + then + dl="${dl##*../}" + _cdp="$dl" + + if [ ! -f "$_cdp" ]; then + _cdp="$cbdir/$_cdp" + fi + if [ -f "$_cdp" ]; then + dl="$_cdp" + fi + + dl_bkup="${dl_bkup##*../}" + _cdp="$dl_bkup" + + if [ ! -f "$_cdp" ]; then + _cdp="$cbdir/$_cdp" + fi + if [ -f "$_cdp" ]; then + dl_bkup="$_cdp"; : + fi + fi + + # download the file (from the internet) to extract from: + + xbget "$dlop" "$dl" "$dl_bkup" "$_dl" "$dlsum" + x_ rm -Rf "${_dl}_extracted" + + # skip extraction if a cached extracted file exists: + + ( xbget copy "$_dl_bin" "$_dl_bin" "$_dest" "$binsum" 2>/dev/null ) || : + if [ -f "$_dest" ]; then + return 0 + fi + + x_ xbmkdir "${_dest%/*}" + + if [ "$dl_type" != "fsp" ]; then + extract_archive "$_dl" "$appdir" || \ + [ "$dl_type" = "e6400vga" ] || \ + err "$_dest $dl_type: !extract" "fetch" "$@" + fi + + x_ extract_$dl_type "$_dl" "$appdir" + set -u -e + + # some functions don't output directly to the given file, _pre_dest. + # instead, they put multiple files there, but we need the one matching + # the given hashsum. So, search for a matching file via bruteforce: + ( fx_ "mkdst $binsum" x_ find "${_pre_dest%/*}" -type f ) || : + + if ! bad_checksum "$binsum" "$_dest"; then + if [ -f "$_dest" ]; then + return 0 + fi + fi + + if [ -z "$binsum" ]; then + printf "'%s': checksum undefined\n" "$_dest" 1>&2 + fi + + if [ -L "$_dest" ]; then + printf "WARNING: '%s' is a link!\n" "$_dest" 1>&2 + else + x_ rm -f "$_dest" + fi + + err "Can't safely extract '$_dest', for board '$board'" "fetch" "$@" } -extract_intel_me() +mkdst() { - e "$mecleaner" f not && $err "$cbdir: me_cleaner missing. $dontflash" + if bad_checksum "$1" "$2" 2>/dev/null; then + x_ rm -f "$2" + else + x_ mv "$2" "$_dl_bin" + x_ cp "$_dl_bin" "$_dest" + + exit 1 + fi +} - cdir="$PWD/$appdir" - _me="$PWD/$_dest" - _metmp="$PWD/tmp/me.bin" +extract_intel_me() +{ + if e "$mecleaner" f missing; then + err "$cbdir: me_cleaner missing" "extract_intel_me" "$@" + fi - mfs="" && [ "$ME11bootguard" = "y" ] && mfs="--whitelist MFS" && \ - chkvars ME11delta ME11version ME11sku ME11pch - [ "$ME11bootguard" = "y" ] && x_ ./mk -f deguard + mfs="" + _7ztest="$xbtmp/metmp/a" + _metmp="$xbtmp/me.bin" - x_ mkdir -p tmp + x_ rm -f "$_metmp" "$xbtmp/a" + x_ rm -Rf "$_7ztest" - extract_intel_me_bruteforce if [ "$ME11bootguard" = "y" ]; then - apply_me11_deguard_mod + mfs="--whitelist MFS" + + if [ -z "$ME11delta" ] || [ -z "$ME11version" ] || \ + [ -z "$ME11sku" ] || [ -z "$ME11pch" ]; then + err "$board: ME11delta/ME11version/ME11sku/ME11pch" \ + "extract_intel_me" "$@" + fi + + x_ ./mk -f deguard + fi + + set +u +e + + ( fx_ find_me x_ find "$xbmkpwd/$appdir" -type f ) || :; : + + set -u -e + + if [ "$ME11bootguard" != "y" ]; then + x_ mv "$_metmp" "$_pre_dest" else - mv "$_metmp" "$_me" || $err "!mv $_metmp $_me - $dontflash" + ( apply_deguard_hack ) || \ + err "deguard error on '$_dest'" "extract_intel_me" "$@"; : fi } -extract_intel_me_bruteforce() +# bruteforce Intel ME extraction. +# must be called inside a subshell. +find_me() { - [ $# -gt 0 ] && cdir="$1" + if [ -f "$_metmp" ]; then + # we found me.bin, so we stop searching - e "$_metmp" f && return 0 + exit 1 + elif [ -L "$1" ]; then + return 0 + fi - [ -z "$sdir" ] && sdir="$(mktemp -d)" - mkdir -p "$sdir" || \ - $err "extract_intel_me: !mkdir -p \"$sdir\" - $dontflash" + _7ztest="${_7ztest}a" - set +u +e - ( - [ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}" - cd "$cdir" || $err "extract_intel_me: !cd \"$cdir\" - $dontflash" - for i in *; do - [ -f "$_metmp" ] && break - [ -L "$i" ] && continue - if [ -f "$i" ]; then - _r="-r" && [ -n "$mfs" ] && _r="" - "$mecleaner" $mfs $_r -t -O "$sdir/vendorfile" \ - -M "$_metmp" "$i" && break - "$mecleaner" $mfs $_r -t -O "$_metmp" "$i" && break - "$me7updateparser" -O "$_metmp" "$i" && break - _7ztest="${_7ztest}a" - extract_archive "$i" "$_7ztest" || continue - extract_intel_me_bruteforce "$cdir/$_7ztest" - elif [ -d "$i" ]; then - extract_intel_me_bruteforce "$cdir/$i" - else - continue - fi - cdir="$1"; [ "${cdir#/a}" != "$cdir" ] && cdir="${cdir#/}" - cd "$cdir" || : - done - ) - rm -Rf "$sdir" || $err "extract_intel_me: !rm -Rf $sdir - $dontflash" + _keep="" # -k: keep fptr modules even if they can be removed + _pass="" # -p: skip fptr check + _r="-r" # re-locate modules + _trunc="-t" # -t: truncate the ME size + + if [ -n "$mfs" ] || [ "$MEclean" = "n" ]; then + _r="" + fi + + if [ "$MEclean" = "n" ]; then + _keep="-k" + _pass="-p" + _trunc="" + fi + + if "$mecleaner" $mfs $_r $_keep $_pass $_trunc -O "$xbtmp/a" \ + -M "$_metmp" "$1" || [ -f "$_metmp" ]; then + # me.bin extracted from a full image with ifd, then shrunk + : + elif "$mecleaner" $mfs $_r $_pass $_keep $_trunc -O "$_metmp" "$1" || \ + [ -f "$_metmp" ]; then + # me.bin image already present, and we shrunk it + : + elif "$me7updateparser" $_keep -O "$_metmp" "$1"; then + # thinkpad sandybridge me.bin image e.g. x220/t420 + : + elif extract_archive "$1" "$_7ztest"; then + # scan newly extracted archive within extracted archive + : + else + # could not extract anything, so we'll try the next file + return 0 + fi + + if [ -f "$_metmp" ]; then + # we found me.bin, so we stop searching + + exit 1 + else + # if the subshell does exit 1, we found me.bin, so exit 1 + ( fx_ find_me x_ find "$_7ztest" -type f ) || exit 1; : + fi } -apply_me11_deguard_mod() +apply_deguard_hack() { - ( - x_ cd src/deguard/ - ./finalimage.py --delta "data/delta/$ME11delta" \ - --version "$ME11version" \ - --pch "$ME11pch" --sku "$ME11sku" --fake-fpfs data/fpfs/zero \ - --input "$_metmp" --output "$_me" || \ - $err "Error running deguard for $_me - $dontflash" - ) || $err "Error running deguard for $_me - $dontflash" + x_ cd src/deguard + + x_ ./finalimage.py --delta "data/delta/$ME11delta" \ + --version "$ME11version" --pch "$ME11pch" --sku "$ME11sku" \ + --fake-fpfs data/fpfs/zero --input "$_metmp" --output "$_pre_dest" } extract_archive() { - if [ $# -gt 2 ]; then - if [ "$3" = "fspm" ] || [ "$3" = "fsps" ]; then - decat_fspfd "$1" "$2" - return 0 - fi + if innoextract "$1" -d "$2"; then + : + elif python "$pfs_extract" "$1" -e; then + : + elif 7z x "$1" -o"$2"; then + : + elif "$bsdtar" -C "$2" -xf "$1"; then + : + elif "$bsdunzip" "$1" -d "$2"; then + : + else + return 1 fi - innoextract "$1" -d "$2" || python "$pfs_extract" "$1" -e || 7z x \ - "$1" -o"$2" || unar "$1" -o "$2" || unzip "$1" -d "$2" || return 1 - - [ ! -d "${_dl}_extracted" ] || cp -R "${_dl}_extracted" "$2" || \ - $err "!mv '${_dl}_extracted' '$2' - $dontflash"; : + if [ -d "${_dl}_extracted" ]; then + x_ cp -R "${_dl}_extracted" "$2" + fi } -decat_fspfd() +extract_kbc1126ec() { - _fspfd="$1" - _fspdir="$2" - _fspsplit="$cbdir/3rdparty/fsp/Tools/SplitFspBin.py" + ( extract_kbc1126ec_dump ) || \ + err "$board: can't extract kbc1126 fw" "extract_kbc1126ec" "$@" + + # throw error if either file is missing + x_ e "$appdir/ec.bin.fw1" f + x_ e "$appdir/ec.bin.fw2" f - $python "$_fspsplit" split -f "$_fspfd" -o "$_fspdir" -n "Fsp.fd" || \ - $err "decat_fspfd '$1' '$2': Can't de-concatenate; $dontflash"; : + x_ cp "$appdir/"ec.bin.fw* "${_pre_dest%/*}/" } -extract_kbc1126ec() +extract_kbc1126ec_dump() { - e "$kbc1126_ec_dump" f missing && \ - $err "$cbdir: kbc1126 util missing - $dontflash" - ( - x_ cd "$appdir/"; mv Rompaq/68*.BIN ec.bin || : + x_ cd "$appdir/" + + if mv Rompaq/68*.BIN ec.bin; then + : + elif unar -D ROM.CAB Rom.bin; then + : + elif unar -D Rom.CAB Rom.bin; then + : + elif unar -D 68*.CAB Rom.bin; then + : + else + err "!kbc1126 unar" "extract_kbc1126ec" "$@" + fi + if [ ! -f "ec.bin" ]; then - unar -D ROM.CAB Rom.bin || unar -D Rom.CAB Rom.bin || \ - unar -D 68*.CAB Rom.bin || \ - $err "can't extract Rom.bin - $dontflash" x_ mv Rom.bin ec.bin fi - [ -f ec.bin ] || \ - $err "extract_kbc1126_ec $board: can't extract - $dontflash" - "$kbc1126_ec_dump" ec.bin || \ - $err "!1126ec $board extract ecfw - $dontflash" - ) || $err "can't extract kbc1126 ec firmware - $dontflash" - - e "$appdir/ec.bin.fw1" f not && \ - $err "$board: kbc1126ec fetch failed - $dontflash" - e "$appdir/ec.bin.fw2" f not && \ - $err "$board: kbc1126ec fetch failed - $dontflash" - cp "$appdir/"ec.bin.fw* "${_dest%/*}/" || \ - $err "!cp 1126ec $_dest - $dontflash"; : + if x_ e ec.bin f; then + x_ "$kbc1126_ec_dump" ec.bin + fi } extract_e6400vga() { set +u +e - chkvars E6400_VGA_offset E6400_VGA_romname + + if [ -z "$E6400_VGA_offset" ] || [ -z "$E6400_VGA_romname" ]; then + err "$board: E6400_VGA_romname/E6400_VGA_offset unset" \ + "extract_e6400vga" "$@" + fi + tail -c +$E6400_VGA_offset "$_dl" | gunzip > "$appdir/bios.bin" || : + ( x_ cd "$appdir" - [ -f "bios.bin" ] || \ - $err "extract_e6400vga: can't extract bios.bin - $dontflash" + x_ e "bios.bin" f "$e6400_unpack" bios.bin || printf "TODO: fix dell extract util\n" - ) || $err "can't extract e6400 vga rom - $dontflosh" - cp "$appdir/$E6400_VGA_romname" "$_dest" || \ - $err "extract_e6400vga $board: can't cp $_dest - $dontflash"; : + ) || err "can't extract e6400 vga rom" "extract_e6400vga" "$@" + + x_ cp "$appdir/$E6400_VGA_romname" "$_pre_dest" } extract_sch5545ec() { # full system ROM (UEFI), to extract with UEFIExtract: _bios="${_dl}_extracted/Firmware/1 $dlsum -- 1 System BIOS vA.28.bin" + # this is the SCH5545 firmware, inside of the extracted UEFI ROM: _sch5545ec_fw="$_bios.dump/4 7A9354D9-0468-444A-81CE-0BF617D890DF" _sch5545ec_fw="$_sch5545ec_fw/54 D386BEB8-4B54-4E69-94F5-06091F67E0D3" _sch5545ec_fw="$_sch5545ec_fw/0 Raw section/body.bin" # <-- this! - "$uefiextract" "$_bios" || $err "sch5545 !extract - $dontflash" - cp "$_sch5545ec_fw" "$_dest" || \ - $err "$_dest: !sch5545 copy - $dontflash"; : + x_ "$uefiextract" "$_bios" + x_ cp "$_sch5545ec_fw" "$_pre_dest" } # Lenovo ThunderBolt firmware updates: # https://pcsupport.lenovo.com/us/en/products/laptops-and-netbooks/thinkpad-t-series-laptops/thinkpad-t480-type-20l5-20l6/20l5/solutions/ht508988 extract_tbfw() { - chkvars TBFW_size # size in bytes, matching TBFW's flash IC - x_ mkdir -p tmp - x_ rm -f tmp/tb.bin - find "$appdir" -type f -name "TBT.bin" > "tmp/tb.txt" || \ - $err "extract_tbfw $_dest: Can't extract TBT.bin - $dontflash" - while read -r f; do - [ -f "$f" ] || continue - [ -L "$f" ] && continue - cp "$f" "tmp/tb.bin" || \ - $err "extract_tbfw $_dest: Can't copy TBT.bin - $dontflash" - break - done < "tmp/tb.txt" - dd if=/dev/null of=tmp/tb.bin bs=1 seek=$TBFW_size || \ - $err "extract_tbfw $_dest: Can't pad TBT.bin - $dontflash" - cp "tmp/tb.bin" "$_dest" || \ - $err "extract_tbfw $_dest: copy error - $dontflash "; : -} + if [ -z "$TBFW_size" ]; then + err "$board: TBFW_size unset" "extract_tbfw" "$@" + fi -extract_fspm() -{ - copy_fsp M; : + fx_ copytb x_ find "$appdir" -type f -name "TBT.bin" } -extract_fsps() +copytb() { - copy_fsp S; : -} + if [ -f "$1" ] && [ ! -L "$1" ]; then + x_ dd if=/dev/null of="$1" bs=1 seek=$TBFW_size + x_ mv "$1" "$_pre_dest" -# this copies the fsp s/m; re-base is handled by ./mk inject -copy_fsp() -{ - cp "$appdir/Fsp_$1.fd" "$_dest" || \ - $err "copy_fsp: Can't copy $1 to $_dest - $dontflash"; : + return 1 + fi } -fail_inject() +extract_fsp() { - [ -L "$tmpromdel" ] || [ ! -d "$tmpromdel" ] || \ - rm -Rf "$tmpromdel" || : - printf "\n\n%s\n\n" "$dontflash" 1>&2 - printf "WARNING: File '%s' was NOT modified.\n\n" "$archive" 1>&2 - printf "Please MAKE SURE vendor files are inserted before flashing\n\n" - fail "$1" + x_ python "$cbdir/3rdparty/fsp/Tools/SplitFspBin.py" split -f "$1" \ + -o "${_pre_dest%/*}" -n "Fsp.fd" } -vendor_inject() +setvfile() { - need_files="n" # will be set to "y" if vendorfiles needed - _olderr="$err" - err="fail_inject" - remkdir "$tmpromdel" - - set +u +e; [ $# -lt 1 ] && $err "No options specified. - $dontflash" - eval "`setvars "" nukemode new_mac xchanged`" - - # randomise the MAC address by default - # TODO: support setting CBFS MAC address for GA-G41M-ES2L - new_mac="??:??:??:??:??:??" - - archive="$1"; - [ $# -gt 1 ] && case "$2" in - nuke) - new_mac="" - nukemode="nuke" ;; - setmac) - [ $# -gt 2 ] && new_mac="$3" && \ - [ -z "$new_mac" ] && $err \ - "You set an empty MAC address string" ;; - *) $err "Unrecognised inject mode: '$2'" - esac - - # allow the user to skip setting MAC addresses. - # if new_mac is empty, this script skips running nvmutil - [ "$new_mac" = "keep" ] && new_mac="" - - # we don't allow the *user* to clear new_mac, in the setmac - # command, in case the build system is being integrated with - # another, where setmac is relied upon and is being set - # explicitly. this is a preventative error handle, as a courtes - # to that hypothetical user e.g. Linux distro package maintainer - # integrating this build system into their distro. if they used - # a variable for that, and they forgot to initialise it, they'll know. - - check_release "$archive" || \ - $err "You must run this script on a release archive. - $dontflash" - - [ "$new_mac" = "restore" ] && \ - printf "Restoring default GbE for '$archive', board '$board'\n" - - readcfg && need_files="y" - if [ "$need_files" = "y" ] || [ -n "$new_mac" ]; then - [ "$nukemode" = "nuke" ] || x_ ./mk download "$board" - patch_release_roms - fi - [ "$need_files" != "y" ] && printf \ - "\nTarball '%s' (board '%s) doesn't need vendorfiles.\n" \ - "$archive" "$board" 1>&2 - - xtype="patched" && [ "$nukemode" = "nuke" ] && xtype="nuked" - [ "$xchanged" != "y" ] && \ - printf "\nRelease archive '%s' was *NOT* modified.\n" \ - "$archive" && [ "$has_hashes" = "y" ] && \ - printf "WARNING: '%s' contains '%s'. DO NOT FLASH!\n" \ - "$archive" "$hashfile" 1>&2 && \ - printf "(vendorfiles may be needed and aren't there)\n" \ - 1>&2 - [ "$xchanged" = "y" ] && \ - printf "\nRelease archive '%s' successfully %s.\n" \ - "$archive" "$xtype" && [ "$nukemode" != "nuke" ] && \ - printf "You may now extract '%s' and flash images from it.\n" \ - "$archive" - [ "$xchanged" = "y" ] && [ "$nukemode" = "nuke" ] && \ - printf "WARNING! Vendorfiles *removed*. DO NOT FLASH.\n" 1>&2 \ - && printf "DO NOT flash images from '%s'\n" \ - "$archive" 1>&2 - - [ "$need_files" = "n" ] && printf \ - "Board '%s' doesn't use vendorfiles, so none were inserted.\n" \ - "$board" - - # - # catch-all error handler, for libreboot release opsec: - # - # if vendor files defined, and a hash file was missing, that means - # a nuke must succeed, if specified. if no hashfile was present, - # that means vendorfiles had been injected, so a nuke must succeed. - # this check is here in case of future bugs in lbmk's handling - # of vendorfile deletions on release archives, which absolutely - # must always be 100% reliable, so paranoia is paramount: - # - if [ "$xchanged" != "y" ] && [ "$need_files" = "y" ] && \ - [ "$nukemode" = "nuke" ] && [ "$has_hashes" != "y" ]; then - printf "FAILED NUKE: tarball '$archive', board '$board'\n" 1>&2 - $err "Unhandled vendorfile deletion: DO NOT RELEASE TO RSYNC" - fi # of course, we assume that those variables are also set right - - err="$_olderr" - return 0 -} + [ -n "$vcfg" ] && for c in $checkvarschk + do + do_getvfile="n" + vcmd="[ \"\${$c}\" != \"/dev/null\" ] && [ -n \"\${$c}\" ]" -check_release() -{ - [ -L "$archive" ] && \ - $err "'$archive' is a symlink, not a file - $dontflash" - [ -f "$archive" ] || return 1 - archivename="`basename "$archive"`" - [ -z "$archivename" ] && \ - $err "Cannot determine archive file name - $dontflash" - - case "$archivename" in - *_src.tar.xz) - $err "'$archive' is a src archive, silly!" ;; - grub_*|seagrub_*|custom_*|seauboot_*|seabios_withgrub_*) - return 1 ;; - *.tar.xz) _stripped_prefix="${archivename#*_}" - board="${_stripped_prefix%.tar.xz}" ;; - *) $err "'$archive': could not detect board type - $dontflash" - esac; : + eval "$vcmd && do_getvfile=\"y\"" + + if [ "$do_getvfile" = "y" ]; then + if getvfile "$@"; then + return 0 + fi + fi + done && return 1; : } -readcfg() +getvfile() { - if [ "$board" = "serprog_rp2040" ] || \ - [ "$board" = "serprog_stm32" ] || \ - [ "$board" = "serprog_pico" ]; then + if e "config/vendor/$vcfg/pkg.cfg" f missing; then return 1 fi - boarddir="$cbcfgsdir/$board" - eval "`setcfg "$boarddir/target.cfg"`" - chkvars tree - x_ ./mk -d coreboot "$tree" # even if vendorfiles not used, see: setmac + . "config/vendor/$vcfg/pkg.cfg" || \ + err "Can't read 'config/vendor/$vcfg/pkg.cfg'" "getvfile" "$@" - [ -z "$vcfg" ] && return 1 - vfile="config/vendor/$vcfg/pkg.cfg" - [ -L "$vfile" ] && $err "'$archive', '$board': $vfile is a symlink" - [ -f "$vfile" ] || $err "'$archive', '$board': $vfile doesn't exist" + bootstrap + + if [ $# -gt 0 ]; then + # download vendor files + + getfiles + else + # inject vendor files + + fx_ prep x_ find "$tmpromdir" -maxdepth 1 -type f -name "*.rom" + ( check_vendor_hashes ) || \ + err "$archive: Can't verify hashes" "getvfile" "$@"; : + fi - cbdir="src/coreboot/$tree" - cbfstool="elf/cbfstool/$tree/cbfstool" - rmodtool="elf/cbfstool/$tree/rmodtool" - mecleaner="$PWD/$cbdir/util/me_cleaner/me_cleaner.py" - kbc1126_ec_dump="$PWD/$cbdir/util/kbc1126/kbc1126_ec_dump" - cbfstool="elf/cbfstool/$tree/cbfstool" - ifdtool="elf/ifdtool/$tree/ifdtool" - [ -n "$IFD_platform" ] && ifdprefix="-p $IFD_platform"; : } -patch_release_roms() +bootstrap() { - has_hashes="n" - - tmpromdir="tmp/DO_NOT_FLASH/bin/$board" - remkdir "${tmpromdir%"/bin/$board"}" - tar -xf "$archive" -C "${tmpromdir%"/bin/$board"}" || \ - $err "Can't extract '$archive'" - - for _hashes in $hashfiles; do - [ -L "$tmpromdir/$_hashes" ] && \ - $err "'$archive' -> the hashfile is a symlink. $dontflash" - [ -f "$tmpromdir/$_hashes" ] && has_hashes="y" && \ - hashfile="$_hashes" && break; : - done - - x_ mkdir -p "tmp"; [ -L "tmp/rom.list" ] && \ - $err "'$archive' -> tmp/rom.list is a symlink - $dontflash" - x_ rm -f "tmp/rom.list" "tmp/zero.1b" - x_ dd if=/dev/zero of=tmp/zero.1b bs=1 count=1 - - find "$tmpromdir" -maxdepth 1 -type f -name "*.rom" > "tmp/rom.list" \ - || $err "'$archive' -> Can't make tmp/rom.list - $dontflash" - - if readkconfig; then - while read -r _xrom ; do - process_release_rom "$_xrom" || break - done < "tmp/rom.list" - rm -f "$tmpromdir/README.md" || : - [ "$nukemode" != "nuke" ] || \ - printf "Make sure you inserted vendor files: %s\n" \ - "$vguide" > "$tmpromdir/README.md" || : - else - printf "Skipping vendorfiles on '%s'\n" "$archive" 1>&2 + cbdir="src/coreboot/$tree" + kbc1126_ec_dump="$xbmkpwd/$cbdir/util/kbc1126/kbc1126_ec_dump" + cbfstool="elf/coreboot/$tree/cbfstool" + rmodtool="elf/coreboot/$tree/rmodtool" + + mecleaner="$xbmkpwd/$cbdir/util/me_cleaner/me_cleaner.py" + if [ "$XBMKmecleaner" = "y" ]; then + mecleaner="$xbmkpwd/src/me_cleaner/me_cleaner.py" fi - ( - cd "$tmpromdir" || $err "patch '$archive': can't cd $tmpromdir" - # NOTE: For compatibility with older rom releases, defer to sha1 - if [ "$has_hashes" = "y" ] && [ "$nukemode" != "nuke" ]; then - sha512sum --status -c "$hashfile" || \ - sha1sum --status -c "$hashfile" || \ - $err "'$archive' -> Can't verify vendor hashes. $dontflash" - rm -f "$hashfile" || \ - $err "$archive: Can't rm hashfile. $dontflash" - fi - ) || $err "'$archive' -> Can't verify vendor hashes. $dontflash" - - if [ -n "$new_mac" ]; then - if ! modify_mac_addresses; then - printf "\nNo GbE region defined for '%s'\n" "$board" \ - 1>&2 - printf "Therefore, changing the MAC is impossible.\n" \ - 1>&2 - printf "This board probably lacks Intel ethernet.\n" \ - 1>&2 - printf "(or it's pre-IFD Intel with Intel GbE NIC)\n" \ - 1>&2 - fi + x_ ./mk -f coreboot "${cbdir##*/}" + x_ ./mk -f me_cleaner + + x_ ./mk -b bios_extract + x_ ./mk -b biosutilities + x_ ./mk -b uefitool + x_ ./mk -b libarchive # for bsdtar and bsdunzip + + if [ -d "${kbc1126_ec_dump%/*}" ]; then + x_ make -C "$cbdir/util/kbc1126" fi - [ "$xchanged" = "y" ] || rm -Rf "$tmpromdel" || : - [ "$xchanged" = "y" ] || return 0 - ( - cd "${tmpromdir%"/bin/$board"}" || \ - $err "Can't cd '${tmpromdir%"/bin/$board"}'; $dontflash" - # ../../ is the root of lbmk - mkrom_tarball "bin/$board" - ) || $err "Cannot re-generate '$archive' - $dontflash" - - mv "${tmpromdir%"/bin/$board"}/bin/${relname}_${board}.tar.xz" \ - "$archive" || \ - $err "'$archive' -> Cannot overwrite - $dontflash"; : + if [ -n "$MRC_refcode_cbtree" ]; then + cbfstoolref="elf/coreboot/$MRC_refcode_cbtree/cbfstool" + x_ ./mk -d coreboot "$MRC_refcode_cbtree"; : + fi } -process_release_rom() +prep() { - _xrom="$1"; _xromname="${1##*/}" - [ -L "$_xrom" ] && \ - $err "$archive -> '${_xrom#"tmp/DO_NOT_FLASH/"}' is a symlink" - [ -f "$_xrom" ] || return 0 + _xrom="$1" + _xromname="${1##*/}" + _xromnew="${_xrom%/*}/${_xromname#"$vfix"}" + + if [ "$nuke" = "nuke" ]; then + _xromnew="${_xrom%/*}/$vfix${_xrom##*/}" + fi + + if e "$_xrom" f missing; then + return 0 + fi + + if [ -z "${_xromname#"$vfix"}" ]; then + err "$_xromname / $vfix: name match" "prep" "$@" + fi - [ -z "${_xromname#"$vfix"}" ] && \ - $err "'$_xromname'->'"${_xromname#"$vfix"}"' empty. $dontflash" # Remove the prefix and 1-byte pad - if [ "$nukemode" != "nuke" ] && \ - [ "${_xromname#"$vfix"}" != "$_xromname" ]; then - _xromnew="${_xrom%/*}/${_xromname#"$vfix"}" - - # Remove the 1-byte padding - stat -c '%s' "$_xrom" > "tmp/rom.size" || \ - $err "$_xrom: Can't get rom size. $dontflash" - read -r xromsize < "tmp/rom.size" || \ - $err "$_xrom: Can't read rom size. $dontflash" - - expr "X$xromsize" : "X-\{0,1\}[0123456789][0123456789]*$" \ - 1>/dev/null 2>/dev/null || $err "$_xrom size non-integer" - [ $xromsize -lt 2 ] && $err \ - "$_xrom: Will not create empty file. $dontflash" - - # TODO: check whether the size would be a multiple of 64KB - # the smallest rom images we do are 512kb - xromsize="`expr $xromsize - 1`" - [ $xromsize -lt 524288 ] && \ - $err "$_xrom size too small; likely not a rom. $dontflash" - - dd if="$_xrom" of="$_xromnew" bs=$xromsize count=1 || \ - $err "$_xrom: Can't resize. $dontflash" - rm -f "$_xrom" || $err "Can't rm $_xrom - $dontflash" + if [ "${_xromname#"$vfix"}" != "$_xromname" ] \ + && [ "$nuke" != "nuke" ]; then + + unpad_one_byte "$_xrom" + x_ mv "$_xrom" "$_xromnew" _xrom="$_xromnew" fi - [ "$nukemode" = "nuke" ] && \ - mksha512sum "$_xrom" "vendorhashes" + if [ "$nuke" = "nuke" ]; then + ( mksha512 "$_xrom" "vendorhashes" ) || err; : + fi + + if ! add_vfiles "$_xrom"; then + # no need to insert files. we will later + # still process MAC addresses as required + + return 1 + fi + + if [ "$nuke" = "nuke" ]; then + pad_one_byte "$_xrom" + x_ mv "$_xrom" "$_xromnew" + fi +} + +mksha512() +{ + build_sbase - patch_rom "$_xrom" || return 1 # if break return, can still change MAC - [ "$nukemode" != "nuke" ] && return 0 + if [ "${1%/*}" != "$1" ]; then + x_ cd "${1%/*}" + fi - # Rename the file, prefixing a warning saying not to flash - # the target image, which now has vendor files removed. Also - # pad it so that flashprog returns an error if the user tries - # to flash it, due to mismatching ROM size vs chip size - cat "$_xrom" tmp/zero.1b > "${_xrom%/*}/$vfix${_xrom##*/}" || \ - $err "'$archive' -> can't pad/rename '$_xrom'. $dontflash" - rm -f "$_xrom" || $err "'$archive' -> can't rm '$_xrom'. $dontflash" + x_ "$sha512sum" ./"${1##*/}" >> "$2" || \ + err "!sha512sum \"$1\" > \"$2\"" "mksha512" "$@" } -patch_rom() +add_vfiles() { rom="$1" - # regarding ifs below: - # if a hash file exists, we only want to allow inject. - # if a hash file is missing, we only want to allow nuke. - # this logical rule prevents double-nuke and double-inject + if [ "$has_hashes" != "y" ] && [ "$nuke" != "nuke" ]; then + printf "'%s' has no hash file. Skipping.\n" "$archive" 1>&2 - # if injecting without a hash file i.e. inject what was injected - # (or inject where no vendor files are needed, covered previously) - if [ "$has_hashes" != "y" ] && [ "$nukemode" != "nuke" ]; then - printf "inject: '%s' has no hash file. Skipping.\n" \ - "$archive" 1>&2 return 1 - fi - # nuking *with* a hash file, i.e. nuking what was nuked before - if [ "$has_hashes" = "y" ] && [ "$nukemode" = "nuke" ]; then - printf "inject nuke: '%s' has a hash file. Skipping nuke.\n" \ - "$archive" 1>&2 + elif [ "$has_hashes" = "y" ] && [ "$nuke" = "nuke" ]; then + printf "'%s' has a hash file. Skipping nuke.\n" "$archive" 1>&2 + return 1 fi - [ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && inject "fallback/refcode" \ - "$CONFIG_REFCODE_BLOB_FILE" "stage" - [ "$CONFIG_HAVE_MRC" = "y" ] && inject "mrc.bin" "$CONFIG_MRC_FILE" \ - "mrc" "0xfffa0000" - [ "$CONFIG_HAVE_ME_BIN" = "y" ] && inject IFD "$CONFIG_ME_BIN_PATH" me - [ "$CONFIG_KBC1126_FIRMWARE" = "y" ] && inject ecfw1.bin \ - "$CONFIG_KBC1126_FW1" raw "$CONFIG_KBC1126_FW1_OFFSET" && inject \ - ecfw2.bin "$CONFIG_KBC1126_FW2" raw "$CONFIG_KBC1126_FW2_OFFSET" - [ -n "$CONFIG_VGA_BIOS_FILE" ] && [ -n "$CONFIG_VGA_BIOS_ID" ] && \ - inject "pci$CONFIG_VGA_BIOS_ID.rom" "$CONFIG_VGA_BIOS_FILE" optionrom - [ "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" = "y" ] && \ - [ -n "$CONFIG_SMSC_SCH5545_EC_FW_FILE" ] && \ - inject sch5545_ecfw.bin "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw - # - # coreboot adds FSP-M first. so we shall add it first, then S: - # NOTE: - # We skip the fetch if CONFIG_FSP_USE_REPO or CONFIG_FSP_FULL_FD is set - # but only for inject/nuke. we still run fetch (see above) because on - # _fsp targets, coreboot still needs them, but coreboot Kconfig uses - # makefile syntax and puts $(obj) in the path, which makes no sense - # in sh. So we modify the path there, but lbmk only uses the file - # in vendorfiles/ if neither CONFIG_FSP_USE_REPO nor CONFIG_FSP_FULL_FD - # are set - # - [ -z "$CONFIG_FSP_USE_REPO" ] && [ -z "$CONFIG_FSP_FULL_FD" ] && \ - [ -n "$CONFIG_FSP_M_FILE" ] && \ - inject "$CONFIG_FSP_M_CBFS" "$CONFIG_FSP_M_FILE" fsp --xip - [ -z "$CONFIG_FSP_USE_REPO" ] && [ -z "$CONFIG_FSP_FULL_FD" ] && \ - [ -n "$CONFIG_FSP_S_FILE" ] && \ - inject "$CONFIG_FSP_S_CBFS" "$CONFIG_FSP_S_FILE" fsp - # TODO: modify gbe *after checksum verification only* - # TODO: insert default gbe if doing -n nuke + if [ -n "$CONFIG_HAVE_REFCODE_BLOB" ]; then + vfile "fallback/refcode" "$CONFIG_REFCODE_BLOB_FILE" "stage" + fi + if [ "$CONFIG_HAVE_MRC" = "y" ]; then + vfile "mrc.bin" "$CONFIG_MRC_FILE" "mrc" "0xfffa0000" + fi + if [ "$CONFIG_HAVE_ME_BIN" = "y" ]; then + vfile IFD "$CONFIG_ME_BIN_PATH" me + fi + if [ -n "$CONFIG_KBC1126_FW1" ]; then + vfile ecfw1.bin "$CONFIG_KBC1126_FW1" raw \ + "$CONFIG_KBC1126_FW1_OFFSET" + fi + if [ -n "$CONFIG_KBC1126_FW2" ]; then + vfile ecfw2.bin "$CONFIG_KBC1126_FW2" raw \ + "$CONFIG_KBC1126_FW2_OFFSET" + fi + if [ -n "$CONFIG_VGA_BIOS_FILE" ] && [ -n "$CONFIG_VGA_BIOS_ID" ]; then + vfile "pci$CONFIG_VGA_BIOS_ID.rom" "$CONFIG_VGA_BIOS_FILE" \ + optionrom + fi + if [ "$CONFIG_INCLUDE_SMSC_SCH5545_EC_FW" = "y" ] && \ + [ -n "$CONFIG_SMSC_SCH5545_EC_FW_FILE" ]; then + vfile sch5545_ecfw.bin "$CONFIG_SMSC_SCH5545_EC_FW_FILE" raw + fi + if [ -z "$CONFIG_FSP_USE_REPO" ] && [ -z "$CONFIG_FSP_FULL_FD" ] && \ + [ -n "$CONFIG_FSP_M_FILE" ]; then + vfile "$CONFIG_FSP_M_CBFS" "$CONFIG_FSP_M_FILE" fsp --xip + fi + if [ -z "$CONFIG_FSP_USE_REPO" ] && [ -z "$CONFIG_FSP_FULL_FD" ] && \ + [ -n "$CONFIG_FSP_S_FILE" ]; then + vfile "$CONFIG_FSP_S_CBFS" "$CONFIG_FSP_S_FILE" fsp + fi - printf "ROM image successfully patched: %s\n" "$rom" xchanged="y" + + printf "ROM image successfully patched: %s\n" "$rom" } -inject() +vfile() { - [ $# -lt 3 ] && $err "$*, $rom: usage: inject name path type (offset)" - [ "$2" = "/dev/null" ] && return 0 + if [ "$2" = "/dev/null" ]; then + return 0 + fi - eval "`setvars "" cbfsname _dest _t _offset`" - cbfsname="$1"; _dest="${2##*../}"; _t="$3" + cbfsname="$1" + _dest="${2##*../}" + blobtype="$3" - if [ "$_t" = "fsp" ]; then - [ $# -gt 3 ] && _offset="$4" - else - [ $# -gt 3 ] && _offset="-b $4" && [ -z "$4" ] && \ - $err "inject $*, $rom: offset given but empty (undefined)" + _offset="" + + if [ "$blobtype" = "fsp" ] && [ $# -gt 3 ]; then + _offset="$4" + elif [ $# -gt 3 ] && _offset="-b $4" && [ -z "$4" ]; then + err "$rom: offset given but empty (undefined)" "vfile" "$@" fi - e "$_dest" f n && [ "$nukemode" != "nuke" ] && $err "!inject $dl_type" + if [ "$nuke" != "nuke" ]; then + x_ e "$_dest" f + fi if [ "$cbfsname" = "IFD" ]; then - [ "$nukemode" = "nuke" ] || "$ifdtool" $ifdprefix -i \ - $_t:$_dest "$rom" -O "$rom" || \ - $err "failed: inject '$_t' '$_dest' on '$rom'" - [ "$nukemode" != "nuke" ] || "$ifdtool" $ifdprefix --nuke $_t \ - "$rom" -O "$rom" || $err "$rom: !nuke IFD/$_t" - xchanged="y" - return 0 - elif [ "$nukemode" = "nuke" ]; then - "$cbfstool" "$rom" remove -n "$cbfsname" || \ - $err "inject $rom: can't remove $cbfsname" - xchanged="y" - return 0 - fi - if [ "$_t" = "stage" ]; then # the only stage we handle is refcode - x_ mkdir -p tmp; x_ rm -f "tmp/refcode" - "$rmodtool" -i "$_dest" -o "tmp/refcode" || "!reloc refcode" - "$cbfstool" "$rom" add-stage -f "tmp/refcode" -n "$cbfsname" \ - -t stage || $err "$rom: !add ref" + if [ "$nuke" = "nuke" ]; then + x_ "$ifdtool" $ifdprefix --nuke $blobtype "$rom" \ + -O "$rom" + else + x_ "$ifdtool" $ifdprefix -i $blobtype:$_dest "$rom" \ + -O "$rom" + fi + elif [ "$nuke" = "nuke" ]; then + x_ "$cbfstool" "$rom" remove -n "$cbfsname" + elif [ "$blobtype" = "stage" ]; then + # the only stage we handle is refcode + + x_ rm -f "$xbtmp/refcode" + x_ "$rmodtool" -i "$_dest" -o "$xbtmp/refcode" + x_ "$cbfstool" "$rom" add-stage -f "$xbtmp/refcode" \ + -n "$cbfsname" -t stage else - "$cbfstool" "$rom" add -f "$_dest" -n "$cbfsname" \ - -t $_t $_offset || $err "$rom !add $_t ($_dest)" - fi; xchanged="y"; : + x_ "$cbfstool" "$rom" add -f "$_dest" -n "$cbfsname" \ + -t $blobtype $_offset + fi + + xchanged="y" } -modify_mac_addresses() +# must be called from a subshell +check_vendor_hashes() { - [ "$nukemode" = "nuke" ] && \ - $err "Cannot modify MAC addresses while nuking vendor files" - - # chkvars CONFIG_GBE_BIN_PATH - [ -n "$CONFIG_GBE_BIN_PATH" ] || return 1 - e "${CONFIG_GBE_BIN_PATH##*../}" f n && $err "missing gbe file" - - [ "$new_mac" != "restore" ] && \ - x_ make -C util/nvmutil - - x_ mkdir -p tmp - [ -L "tmp/gbe" ] && $err "tmp/gbe exists but is a symlink" - [ -d "tmp/gbe" ] && $err "tmp/gbe exists but is a directory" - if [ -e "tmp/gbe" ]; then - [ -f "tmp/gbe" ] || $err "tmp/gbe exists and is not a file" - fi - x_ cp "${CONFIG_GBE_BIN_PATH##*../}" "tmp/gbe" - - [ "$new_mac" != "restore" ] && \ - x_ "util/nvmutil/nvm" "tmp/gbe" setmac "$new_mac" - - find "$tmpromdir" -maxdepth 1 -type f -name "*.rom" > "tmp/rom.list" \ - || $err "'$archive' -> Can't make tmp/rom.list - $dontflash" - - while read -r _xrom; do - [ -L "$_xrom" ] && continue - [ -f "$_xrom" ] || continue - "$ifdtool" $ifdprefix -i GbE:"tmp/gbe" "$_xrom" -O \ - "$_xrom" || $err "'$_xrom': Can't insert new GbE file" - xchanged="y" - done < "tmp/rom.list" - printf "\nThe following GbE NVM words were written in '%s':\n" \ - "$archive" - x_ util/nvmutil/nvm tmp/gbe dump - - [ "$new_mac" = "restore" ] && \ - printf "\nNOTE: User specified setmac 'restore' argument.\n" && \ - printf "Default GbE file '%s' written without running nvmutil.\n" \ - "${CONFIG_GBE_BIN_PATH##*../}"; : + build_sbase + + x_ cd "$tmpromdir" + + if [ "$has_hashes" != "n" ] && [ "$nuke" != "nuke" ]; then + ( x_ "$sha512sum" -c "$hashfile" ) || \ + x_ sha1sum -c "$hashfile" + fi + + x_ rm -f "$hashfile" } @@ -1 +1,71 @@ -build
\ No newline at end of file +#!/usr/bin/env sh + +# SPDX-License-Identifier: GPL-3.0-or-later + +# Copyright (c) 2020-2025 Leah Rowe <leah@libreboot.org> +# Copyright (c) 2022 Caleb La Grange <thonkpeasant@protonmail.com> + +set -u -e + +ispwd="true" + +if [ "$0" != "./mk" ]; then + ispwd="false" +fi +if [ "$ispwd" = "true" ] && [ -L "mk" ]; then + ispwd="false" +fi +if [ "$ispwd" = "false" ]; then + printf "You must run this in the proper work directory.\n" 1>&2 + exit 1 +fi + +. "include/lib.sh" +. "include/init.sh" +. "include/vendor.sh" +. "include/mrc.sh" +. "include/inject.sh" +. "include/rom.sh" +. "include/release.sh" +. "include/get.sh" + +main() +{ + cmd="" + if [ $# -gt 0 ]; then + cmd="$1" + + shift 1 + fi + + case "$cmd" in + version) + printf "%s\nWebsite: %s\n" "$relname" "$projectsite" + ;; + release|download|inject) + $cmd "$@" + ;; + -*) + return 0 + ;; + *) + err "bad command" main "$@" + ;; + esac + + # some commands disable them. turn them back on! + set -u -e + + return 1 +} + +main "$@" || exit 0 + +. "include/tree.sh" + +trees "$@" || exit 0 + +x_ touch "$mkhelpercfg" + +. "$mkhelpercfg" +$cmd diff --git a/projectname b/projectname deleted file mode 100644 index aa4ff178..00000000 --- a/projectname +++ /dev/null @@ -1 +0,0 @@ -libreboot diff --git a/projectsite b/projectsite deleted file mode 100644 index bb74f9d7..00000000 --- a/projectsite +++ /dev/null @@ -1 +0,0 @@ -https://libreboot.org/ diff --git a/script/trees b/script/trees deleted file mode 100755 index 43cd39cc..00000000 --- a/script/trees +++ /dev/null @@ -1,358 +0,0 @@ -#!/usr/bin/env sh -# SPDX-License-Identifier: GPL-3.0-or-later -# Copyright (c) 2022-2023 Alper Nebi Yasak <alpernebiyasak@gmail.com> -# Copyright (c) 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com> -# Copyright (c) 2023-2025 Leah Rowe <leah@libreboot.org> - -set -u -e - -. "include/lib.sh" -. "include/git.sh" - -XBMKPATH="$PATH" - -eval "`setvars "" xarch srcdir premake gnatdir xlang mode makeargs elfdir cmd \ - project target target_dir targets xtree _f release bootstrapargs mkhelper \ - autoconfargs listfile autogenargs btype tree rev tree_depend build_depend \ - defconfig postmake mkhelpercfg dry dest_dir mdir cleanargs gccver gccfull \ - gnatver gnatfull gccdir cmakedir`"; badhash="n" - -main() -{ - while getopts f:b:m:u:c:x:s:l:n:d: option; do - [ -n "$_f" ] && $err "only one flag is permitted" - _f="$1" && [ "$_f" = "-d" ] && dry=":" - case "$1" in - -d) mode="" ;; - -b) mode="" ;; - -u) mode="oldconfig" ;; - -m) mode="menuconfig" ;; - -c) mode="distclean" ;; - -x) mode="crossgcc-clean" ;; - -f) mode="fetch" ;; - -s) mode="savedefconfig" ;; - -l) mode="olddefconfig" ;; - -n) mode="nconfig" ;; - *) $err "invalid option '-$option'" ;; - esac - [ -z "${OPTARG+x}" ] && shift 1 && break - project="${OPTARG#src/}"; shift 2 - done - [ -z "$_f" ] && $err "missing flag (-m/-u/-b/-c/-x/-f/-s/-l/-n)" - [ -z "$project" ] && mk $_f $(ls -1 config/git) && return 1 - - [ -f "config/git/$project/pkg.cfg" ] || $err "'$project' not defined" - - for d in "elf" "config/data" "config" "src"; do - eval "${d#*/}dir=\"$d/$project\"" - done; dest_dir="$elfdir" - listfile="$datadir/build.list" - [ -f "$listfile" ] || listfile="" # optional on all projects - - mkhelpercfg="$datadir/mkhelper.cfg" - e "$mkhelpercfg" f missing && mkhelpercfg="$TMPDIR/mkhelper.cfg" && \ - x_ touch "$mkhelpercfg" - - targets="$*"; cmd="build_targets $targets" - singletree "$project" && cmd="build_project" - - remkdir "${tmpgit%/*}" -} - -build_project() -{ - configure_project "$configdir" || return 0 - [ ! -f "$listfile" ] || $dry elfcheck || return 0 - - [ "$mode" = "distclean" ] && mode="clean" - run_make_command || return 0 - - [ -n "$mode" ] || $dry copy_elf; return 0 -} - -build_targets() -{ - [ -d "$configdir" ] || $err "directory, $configdir, does not exist" - [ $# -gt 0 ] || targets="$(ls -1 "$configdir")" || $err "!o $configdir" - - for x in $targets; do - unset CROSS_COMPILE - export PATH="$XBMKPATH" - [ "$x" = "list" ] && x_ ls -1 "config/$project" && \ - listfile="" && break - target="$x" - printf "'make %s', '%s', '%s'\n" "$mode" "$project" "$target" - x_ handle_defconfig - [ -n "$mode" ] || [ -z "$postmake" ] || $postmake || \ - $err "$project/$target: !postmake: $postmake"; continue - done; return 0 -} - -handle_defconfig() -{ - target_dir="$configdir/$target" - - [ -f "CHANGELOG" ] || fetch_project "$project" - configure_project "$target_dir" || return 0 - x_ mkdir -p "$elfdir/$target" - - chkvars tree; srcdir="src/$project/$tree" - - if [ "$mode" = "distclean" ] || [ "$mode" = "crossgcc-clean" ]; then - [ -d "$srcdir" ] || return 0 - fi - [ -z "$mode" ] && $dry check_cross_compiler - - for y in "$target_dir/config"/*; do - [ "$_f" = "-d" ] || [ -f "$y" ] || continue - [ "$_f" = "-d" ] || defconfig="$y" - - [ -n "$mode" ] || check_defconfig || continue - handle_makefile - [ -n "$mode" ] || $dry copy_elf - done; return 0 -} - -configure_project() -{ - eval "`setvars "" cleanargs build_depend autoconfargs xtree postmake \ - tree_depend makeargs btype mkhelper bootstrapargs premake release \ - xarch xlang`" - _tcfg="$1/target.cfg"; badhash="n"; [ -f "$_tcfg" ] || btype="auto" - [ -f "$datadir/mkhelper.cfg" ] && \ - eval "`setcfg "$datadir/mkhelper.cfg"`" - - while [ -f "$_tcfg" ] || [ "$cmd" != "build_project" ]; do - eval "`setvars "" rev tree`"; eval "`setcfg "$_tcfg"`" - printf "Loading %s config: %s\n" "$project" "$_tcfg" - - [ "$_f" = "-d" ] && build_depend="" # dry run - [ "$cmd" = "build_project" ] && break - [ "$mode" = "fetch" ] || break - - [ "${_tcfg%/*/target.cfg}" = "${_tcfg%"/$tree/target.cfg"}" ] \ - && break; _tcfg="${_tcfg%/*/target.cfg}/$tree/target.cfg" - done - [ "$XBMK_RELEASE" = "y" ] && [ "$release" = "n" ] && return 1 - [ -z "$btype" ] || [ "${mode%config}" = "$mode" ] || return 1 - [ -z "$mode" ] && build_dependencies - - mdir="$PWD/config/submodule/$project" - [ -n "$tree" ] && mdir="$mdir/$tree" - [ -f "CHANGELOG" ] || check_project_hashes - - [ "$mode" = "fetch" ] || x_ ./mk -f "$project" "$target" - [ "$mode" = "fetch" ] || return 0 - [ -f "CHANGELOG" ] && return 1; fetch_${cmd#build_}; return 1 -} - -build_dependencies() -{ - for bd in $build_depend; do - bd_p="${bd%%/*}"; bd_t="${bd##*/}" - [ -z "$bd_p" ] && $dry $err "$project/$tree: !bd '$bd'" - [ "${bd##*/}" = "$bd" ] && bd_t="" - [ -z "$bd_p" ] || $dry ./mk -b $bd_p $bd_t \ - || $err "!mk $project/$tree $bd_p/$bd_t"; continue - done; return 0 -} - -check_project_hashes() -{ - mkdir -p "$XBMK_CACHE/hash" || $err "!mkdir '$XBMK_CACHE/hash'" - old_pjhash=""; [ ! -f "$XBMK_CACHE/hash/$project$tree" ] || \ - read -r old_pjhash < "$XBMK_CACHE/hash/$project$tree" - - x_ rm -f "$TMPDIR/project.list" "$TMPDIR/project.hash" \ - "$TMPDIR/project.tmp"; x_ touch "$TMPDIR/project.tmp" - x_ touch "$TMPDIR/project.hash" - - for rmchk in "$datadir" "$configdir/$tree" "$mdir"; do - [ -d "$rmchk" ] || continue - find "$rmchk" -type f -not -path "*/.git*/*" >> \ - "$TMPDIR/project.tmp" || $err "!find $rmchk > project.tmp" - done; sort "$TMPDIR/project.tmp" > "$TMPDIR/project.list" || \ - $err "!sort project tmp/list" - - while read -r rmchk; do - [ ! -f "$rmchk" ] || sha512sum "$rmchk" | awk \ - '{print $1}' >> "$TMPDIR/project.hash" || $err "!h $rmchk" - done < "$TMPDIR/project.list" - - pjhash="$(sha512sum "$TMPDIR/project.hash" | awk '{print $1}')" || : - badhash="y" && [ "$pjhash" = "$old_pjhash" ] && badhash="n" - [ -f "$XBMK_CACHE/hash/$project$tree" ] || badhash="y" - - printf "%s\n" "$pjhash" > "$XBMK_CACHE/hash/$project$tree" || \ - $err "!mk $XBMK_CACHE/hash/$project$tree" - - [ "$badhash" = "n" ] || rm -Rf "src/$project/$tree" \ - "elf/$project/$tree" "elf/$project/$target" || \ - $err "!rm $project $tree"; : -} - -check_cross_compiler() -{ - xgccargs="UPDATED_SUBMODULES=1 CPUS=$XBMK_THREADS" - for _xarch in $xarch; do - cbdir="src/coreboot/$tree" - [ "$project" != "coreboot" ] && cbdir="src/coreboot/default" - [ -n "$xtree" ] && cbdir="src/coreboot/$xtree" - - x_ ./mk -f coreboot "${cbdir#src/coreboot/}" - - export PATH="$PWD/$cbdir/util/crossgcc/xgcc/bin:$PATH" - export CROSS_COMPILE="${xarch% *}-" - [ -n "$xlang" ] && export BUILD_LANGUAGES="$xlang" - - xfix="${_xarch%-*}" && [ "$xfix" = "x86_64" ] && xfix="x64" - - # match gnat-X to gcc - check_gnu_path gcc gnat || check_gnu_path gnat gcc || \ - $err "Cannot match host GCC/GNAT versions" - - # sometimes buildgcc fails for like no reason. try twice. - make -C "$cbdir" crossgcc-$xfix $xgccargs || \ - make -C "$cbdir" crossgcc-$xfix $xgccargs || \ - $err "!mkxgcc $project/$xtree '$xfix' '$xgccargs'" - - # we only want to mess with hostcc to build xgcc - rm -f "$XBMK_CACHE/gnupath/"* || \ - $err "Cannot clear gnupath/"; : - done; return 0 -} - -# fix mismatching gcc/gnat versions on debian trixie/sid. as of december 2024, -# trixie/sid had gnat-13 as gnat and gcc-14 as gcc, but has gnat-14 in apt. in -# some cases, gcc 13+14 and gnat-13 are present; or gnat-14 and gcc-14, but -# gnat in PATH never resolves to gnat-14, because gnat-14 was "experimental" -check_gnu_path() -{ - [ $# -lt 2 ] && $err "check_gnu_path: Too few arguments" - [ "$1" = "$2" ] && $err "check_gnu_path: Both arguments identical" - for _gnuarg in 1 2; do - eval "[ \"\$$_gnuarg\" = \"gcc\" ] && continue" - eval "[ \"\$$_gnuarg\" = \"gnat\" ] && continue" - $err "check_gnu_path: Invalid argument \"$_gnuarg\"" - done - command -v "$1" 1>/dev/null || $err "Host '$1' unavailable" - - eval "`setvars "" gccver gccfull gnatver gnatfull gccdir gnatdir`" - gnu_setver "$1" "$1" || $err "Command '$1' unavailable." - gnu_setver "$2" "$2" || : - - eval "[ -z \"\$$1ver\" ] && $err \"Cannot detect host '$1' version\"" - [ "$gnatfull" = "$gccfull" ] && return 0 - - eval "$1dir=\"$(dirname "$(command -v "$1")")\"" - eval "_gnudir=\"\$$1dir\"; _gnuver=\"\$$1ver\"" - for _gnubin in "$_gnudir/$2-"*; do - [ -f "$_gnubin" ] || continue - [ "${_gnubin#"$_gnudir/$2-"}" = "$_gnuver" ] || continue - _gnuver="${_gnubin#"$_gnudir/$2-"}"; break - done - gnu_setver "$2" "$_gnudir/$2-$_gnuver" || return 1 - [ "$gnatfull" = "$gccfull" ] || return 1 - - ( - rm -f "$XBMK_CACHE/gnupath/"* || $err "Cannot clear gnupath/" - cd "$XBMK_CACHE/gnupath" || $err "Can't cd to gnupath/" - for _gnubin in "$_gnudir/$2"*"-$_gnuver"; do - [ -e "$_gnubin" ] || continue; _gnuutil="${_gnubin##*/}" - x_ ln -s "$_gnubin" "${_gnuutil%"-$_gnuver"}" - done - ) || $err "Cannot create $2-$_gnuver link in $_gnudir"; : -} - -gnu_setver() -{ - eval "$2 --version 1>/dev/null 2>/dev/null || return 1" - eval "$1ver=\"`"$2" --version 2>/dev/null | head -n1`\"" - eval "$1ver=\"\${$1ver##* }\"" - eval "$1full=\"\$$1ver\"" - eval "$1ver=\"\${$1ver%%.*}\""; : -} - -check_defconfig() -{ - [ -f "$defconfig" ] || $dry $err "$project/$target: missing defconfig" - dest_dir="$elfdir/$target/${defconfig#"$target_dir/config/"}" - - $dry elfcheck || return 1 # skip build if a previous one exists - $dry x_ mkdir -p "$dest_dir" -} - -elfcheck() -{ - # TODO: very hacky check. do it properly (based on build.list) - for elftest in "$dest_dir"/*; do - [ -e "$elftest" ] && e "$elftest" f && return 1 - done; return 0 -} - -handle_makefile() -{ - $dry check_makefile "$srcdir" && x_ make -C "$srcdir" $cleanargs clean - [ -f "$defconfig" ] && x_ cp "$defconfig" "$srcdir/.config" - [ -n "$mode" ] || [ -n "$btype" ] || $dry make -C \ - "$srcdir" silentoldconfig || make -C "$srcdir" oldconfig || : - - run_make_command || $err "handle_makefile $srcdir: no makefile!" - - _copy=".config" && [ "$mode" = "savedefconfig" ] && _copy="defconfig" - [ "${mode%config}" = "$mode" ] || \ - $dry x_ cp "$srcdir/$_copy" "$defconfig" - - [ -e "$srcdir/.git" ] && [ "$project" = "u-boot" ] && \ - [ "$mode" = "distclean" ] && \ - $dry x_ git -C "$srcdir" $cleanargs clean -fdx; : -} - -run_make_command() -{ - [ -z "$premake" ] || [ -n "$mode" ] || $premake || $err "!$premake" - $dry check_cmake "$srcdir" && [ -z "$mode" ] && $dry check_autoconf \ - "$srcdir"; $dry check_makefile "$srcdir" || return 1 - - $dry make -C "$srcdir" $mode -j$XBMK_THREADS $makeargs || $err "!$mode" - [ -z "$mkhelper" ] || [ -n "$mode" ] || $mkhelper || $err "!$mkhelper" - - [ "$mode" != "clean" ] || \ - $dry make -C "$srcdir" $cleanargs distclean || :; : -} - -check_cmake() -{ - [ -z "$cmakedir" ] || $dry check_makefile "$1" || cmake -B "$1" \ - "$1/$cmakedir" || $dry check_makefile "$1" || $err \ - "$1: !cmk $cmakedir" - [ -z "$cmakedir" ] || $dry check_makefile "$1" || \ - $err "check_cmake $1: can't generate Makefile"; return 0 -} - -check_autoconf() -{ - ( - cd "$1" || $err "!cd $1" - [ -f "bootstrap" ] && x_ ./bootstrap $bootstrapargs - [ -f "autogen.sh" ] && x_ ./autogen.sh $autogenargs - [ -f "configure" ] && x_ ./configure $autoconfargs; return 0 - ) || $err "can't bootstrap project: $1" -} - -check_makefile() -{ - [ -f "$1/Makefile" ] || [ -f "$1/makefile" ] || \ - [ -f "$1/GNUmakefile" ] || return 1; return 0 -} - -copy_elf() -{ - [ -f "$listfile" ] && x_ mkdir -p "$dest_dir" && while read -r f; do - [ -f "$srcdir/$f" ] && x_ cp "$srcdir/$f" "$dest_dir" - done < "$listfile"; x_ make clean -C "$srcdir" $cleanargs -} - -main "$@" || exit 0 -. "$mkhelpercfg" -$cmd diff --git a/update b/update deleted file mode 120000 index c795b054..00000000 --- a/update +++ /dev/null @@ -1 +0,0 @@ -build
\ No newline at end of file diff --git a/util/nvmutil/nvmutil.c b/util/nvmutil/nvmutil.c index 68bb95da..05459bb7 100644 --- a/util/nvmutil/nvmutil.c +++ b/util/nvmutil/nvmutil.c @@ -15,24 +15,32 @@ #include <unistd.h> void cmd_setchecksum(void), cmd_brick(void), swap(int partnum), writeGbe(void), - cmd_dump(void), cmd_setmac(void), readGbe(void), cmd_copy(void), - macf(int partnum), hexdump(int partnum), openFiles(const char *path); -int macAddress(const char *strMac, uint16_t *mac), goodChecksum(int partnum); + cmd_dump(void), cmd_setmac(void), readGbe(void), checkdir(const char *path), + macf(int partnum), hexdump(int partnum), openFiles(const char *path), + cmd_copy(void), parseMacString(const char *strMac, uint16_t *mac), + cmd_swap(void); +int goodChecksum(int partnum); uint8_t hextonum(char chs), rhex(void); #define COMMAND argv[2] #define MAC_ADDRESS argv[3] #define PARTN argv[3] -#define SIZE_4KB 0x1000 #define NVM_CHECKSUM 0xBABA +#define NVM_CHECKSUM_WORD 0x3F +#define NVM_SIZE 128 + +#define SIZE_4KB 0x1000 +#define SIZE_8KB 0x2000 +#define SIZE_16KB 0x4000 +#define SIZE_128KB 0x20000 -uint16_t buf16[SIZE_4KB], mac[3] = {0, 0, 0}; -uint8_t *buf = (uint8_t *) &buf16; -size_t nf = 128, gbe[2]; -uint8_t nvmPartChanged[2] = {0, 0}, skipread[2] = {0, 0}; -int e = 1, flags = O_RDWR, rfd, fd, part, gbeFileChanged = 0; +uint16_t mac[3] = {0, 0, 0}; +ssize_t nf; +size_t partsize, gbe[2]; +uint8_t nvmPartChanged[2] = {0, 0}, do_read[2] = {1, 1}; +int flags, rfd, fd, part; -const char *strMac = NULL, *strRMac = "??:??:??:??:??:??", *filename = NULL; +const char *strMac = NULL, *strRMac = "xx:xx:xx:xx:xx:xx", *filename = NULL; typedef struct op { char *str; @@ -42,7 +50,7 @@ typedef struct op { op_t op[] = { { .str = "dump", .cmd = cmd_dump, .args = 3}, { .str = "setmac", .cmd = cmd_setmac, .args = 3}, -{ .str = "swap", .cmd = writeGbe, .args = 3}, +{ .str = "swap", .cmd = cmd_swap, .args = 3}, { .str = "copy", .cmd = cmd_copy, .args = 4}, { .str = "brick", .cmd = cmd_brick, .args = 4}, { .str = "setchecksum", .cmd = cmd_setchecksum, .args = 4}, @@ -52,21 +60,29 @@ void (*cmd)(void) = NULL; #define ERR() errno = errno ? errno : ECANCELED #define err_if(x) if (x) err(ERR(), "%s", filename) -#define xopen(f,l,p) if (opendir(l) != NULL) err(errno = EISDIR, "%s", l); \ - if ((f = open(l, p)) == -1) err(ERR(), "%s", l); \ +#define xopen(f,l,p) if ((f = open(l, p)) == -1) err(ERR(), "%s", l); \ if (fstat(f, &st) == -1) err(ERR(), "%s", l) -#define word(pos16, partnum) buf16[pos16 + (partnum << 11)] -#define setWord(pos16, p, val16) if ((gbeFileChanged = 1) && \ - word(pos16, p) != val16) nvmPartChanged[p] = 1 | (word(pos16, p) = val16) +#define word(pos16, partnum) ((uint16_t *) gbe[partnum])[pos16] +#define setWord(pos16, p, val16) if (word(pos16, p) != val16) \ + nvmPartChanged[p] = 1 | (word(pos16, p) = val16) int main(int argc, char *argv[]) { - if (argc < 3) { +#ifdef __OpenBSD__ + err_if(pledge("stdio rpath wpath unveil", NULL) == -1); +#endif + + if (argc < 2) { +#ifdef __OpenBSD__ + err_if(pledge("stdio", NULL) == -1); +#endif fprintf(stderr, "Modify Intel GbE NVM images e.g. set MAC\n"); fprintf(stderr, "USAGE:\n"); fprintf(stderr, " %s FILE dump\n", argv[0]); + fprintf(stderr, " %s FILE\n # same as setmac without arg\n", + argv[0]); fprintf(stderr, " %s FILE setmac [MAC]\n", argv[0]); fprintf(stderr, " %s FILE swap\n", argv[0]); fprintf(stderr, " %s FILE copy 0|1\n", argv[0]); @@ -74,104 +90,210 @@ main(int argc, char *argv[]) fprintf(stderr, " %s FILE setchecksum 0|1\n", argv[0]); err(errno = ECANCELED, "Too few arguments"); } - flags = (strcmp(COMMAND, "dump") == 0) ? O_RDONLY : flags; + filename = argv[1]; + + flags = O_RDWR; + + if (argc > 2) { + if (strcmp(COMMAND, "dump") == 0) { + flags = O_RDONLY; +#ifdef __OpenBSD__ + err_if(pledge("stdio rpath unveil", NULL) == -1); +#endif + } + } + + checkdir("/dev/urandom"); + checkdir(filename); + #ifdef __OpenBSD__ err_if(unveil("/dev/urandom", "r") == -1); + if (flags == O_RDONLY) { err_if(unveil(filename, "r") == -1); + err_if(unveil(NULL, NULL) == -1); err_if(pledge("stdio rpath", NULL) == -1); } else { err_if(unveil(filename, "rw") == -1); + err_if(unveil(NULL, NULL) == -1); err_if(pledge("stdio rpath wpath", NULL) == -1); } #endif + openFiles(filename); #ifdef __OpenBSD__ err_if(pledge("stdio", NULL) == -1); #endif - for (int i = 0; i < 6; i++) - if (strcmp(COMMAND, op[i].str) == 0) - if ((cmd = argc >= op[i].args ? op[i].cmd : NULL)) + if (argc > 2) { + for (int i = 0; (i < 6) && (cmd == NULL); i++) { + if (strcmp(COMMAND, op[i].str) != 0) + continue; + if (argc >= op[i].args) { + cmd = op[i].cmd; break; - if (cmd == cmd_setmac) - strMac = (argc > 3) ? MAC_ADDRESS : strRMac; - else if ((cmd != NULL) && (argc > 3)) + } + err(errno = EINVAL, "Too few args on command '%s'", + op[i].str); + } + } else { + cmd = cmd_setmac; + } + + if ((cmd == NULL) && (argc > 2)) { /* nvm gbe [MAC] */ + strMac = COMMAND; + cmd = cmd_setmac; + } else if (cmd == cmd_setmac) { /* nvm gbe setmac [MAC] */ + strMac = strRMac; /* random MAC */ + if (argc > 3) + strMac = MAC_ADDRESS; + } else if ((cmd != NULL) && (argc > 3)) { /* user-supplied partnum */ err_if((errno = (!((part = PARTN[0] - '0') == 0 || part == 1)) - || PARTN[1] ? EINVAL : errno)); + || PARTN[1] ? EINVAL : errno)); /* only allow '0' or '1' */ + } err_if((errno = (cmd == NULL) ? EINVAL : errno)); readGbe(); (*cmd)(); + writeGbe(); - if ((gbeFileChanged) && (flags != O_RDONLY) && (cmd != writeGbe)) - writeGbe(); err_if((errno != 0) && (cmd != cmd_dump)); return errno; } void +checkdir(const char *path) +{ + if (opendir(path) != NULL) + err(errno = EISDIR, "%s", path); + if (errno == ENOTDIR) + errno = 0; + err_if(errno); +} + +void openFiles(const char *path) { struct stat st; + xopen(fd, path, flags); - if ((st.st_size != (SIZE_4KB << 1))) - err(errno = ECANCELED, "File `%s` not 8KiB", path); + + switch(st.st_size) { + case SIZE_8KB: + case SIZE_16KB: + case SIZE_128KB: + partsize = st.st_size >> 1; + break; + default: + err(errno = ECANCELED, "Invalid file size (not 8/16/128KiB)"); + break; + } + xopen(rfd, "/dev/urandom", O_RDONLY); - errno = errno != ENOTDIR ? errno : 0; } void readGbe(void) { - nf = ((cmd == writeGbe) || (cmd == cmd_copy)) ? SIZE_4KB : nf; - skipread[part ^ 1] = (cmd == cmd_copy) | (cmd == cmd_setchecksum) - | (cmd == cmd_brick); - gbe[1] = (gbe[0] = (size_t) buf) + SIZE_4KB; + if ((cmd == cmd_swap) || (cmd == cmd_copy)) + nf = SIZE_4KB; + else + nf = NVM_SIZE; + + if ((cmd == cmd_copy) || (cmd == cmd_setchecksum) || (cmd == cmd_brick)) + do_read[part ^ 1] = 0; + + char *buf = malloc(nf << (do_read[0] & do_read[1])); + if (buf == NULL) + err(errno, NULL); + + gbe[0] = (size_t) buf; + gbe[1] = gbe[0] + (nf * (do_read[0] & do_read[1])); + + ssize_t tnr = 0; + for (int p = 0; p < 2; p++) { - if (skipread[p]) + if (!do_read[p]) continue; - err_if(pread(fd, (uint8_t *) gbe[p], nf, p << 12) == -1); - swap(p); + + ssize_t nr = pread(fd, (uint8_t *) gbe[p], nf, p * partsize); + err_if(nr == -1); + if (nr != nf) + err(errno == ECANCELED, + "%ld bytes read from '%s', expected %ld bytes\n", + nr, filename, nf); + + tnr += nr; + swap(p); /* handle big-endian host CPU */ } + + printf("%ld bytes read from file '%s'\n", tnr, filename); } void cmd_setmac(void) { - if (macAddress(strMac, mac)) - err(errno = ECANCELED, "Bad MAC address"); + int mac_updated = 0; + parseMacString(strMac, mac); + + printf("MAC address to be written: %s\n", strMac); + for (int partnum = 0; partnum < 2; partnum++) { if (!goodChecksum(part = partnum)) continue; + for (int w = 0; w < 3; w++) setWord(w, partnum, mac[w]); + + printf("Wrote MAC address to part %d: ", partnum); + macf(partnum); + cmd_setchecksum(); + mac_updated = 1; } + + if (mac_updated) + errno = 0; } -int -macAddress(const char *strMac, uint16_t *mac) +void +parseMacString(const char *strMac, uint16_t *mac) { uint64_t total = 0; - if (strnlen(strMac, 20) == 17) { + if (strnlen(strMac, 20) != 17) + err(errno = EINVAL, "Invalid MAC address string length"); + for (uint8_t h, i = 0; i < 16; i += 3) { if (i != 15) if (strMac[i + 2] != ':') - return 1; + err(errno = EINVAL, + "Invalid MAC address separator '%c'", + strMac[i + 2]); + int byte = i / 3; + for (int nib = 0; nib < 2; nib++, total += h) { if ((h = hextonum(strMac[i + nib])) > 15) - return 1; + err(errno = EINVAL, "Invalid character '%c'", + strMac[i + nib]); + + /* If random, ensure that local/unicast bits are set */ if ((byte == 0) && (nib == 1)) - if (strMac[i + nib] == '?') + if ((strMac[i + nib] == '?') || + (strMac[i + nib] == 'x') || + (strMac[i + nib] == 'X')) /* random */ h = (h & 0xE) | 2; /* local, unicast */ + mac[byte >> 1] |= ((uint16_t ) h) << ((8 * (byte % 2)) + (4 * (nib ^ 1))); } - }} - return ((total == 0) | (mac[0] & 1)); /* multicast/all-zero banned */ + } + + if (total == 0) + err(errno = EINVAL, "Invalid MAC (all-zero MAC address)"); + if (mac[0] & 1) + err(errno = EINVAL, "Invalid MAC (multicast bit set)"); } uint8_t @@ -183,7 +305,10 @@ hextonum(char ch) return ch - 'A' + 10; else if ((ch >= 'a') && (ch <= 'f')) return ch - 'a' + 10; - return (ch == '?') ? rhex() : 16; + else if ((ch == '?') || (ch == 'x') || (ch == 'X')) + return rhex(); /* random hex value */ + else + return 16; /* error: invalid character */ } uint8_t @@ -199,11 +324,19 @@ void cmd_dump(void) { for (int partnum = 0, numInvalid = 0; partnum < 2; partnum++) { + if ((cmd != cmd_dump) && (flags != O_RDONLY) && + (!nvmPartChanged[partnum])) + continue; + if (!goodChecksum(partnum)) ++numInvalid; + printf("MAC (part %d): ", partnum); - macf(partnum), hexdump(partnum); - errno = ((numInvalid < 2) && (partnum)) ? 0 : errno; + macf(partnum); + hexdump(partnum); + + if ((numInvalid < 2) && (partnum)) + errno = 0; } } @@ -213,7 +346,10 @@ macf(int partnum) for (int c = 0; c < 3; c++) { uint16_t val16 = word(c, partnum); printf("%02x:%02x", val16 & 0xff, val16 >> 8); - printf(c == 2 ? "\n" : ":"); + if (c == 2) + printf("\n"); + else + printf(":"); } } @@ -227,7 +363,8 @@ hexdump(int partnum) if (c == 4) printf(" "); printf(" %02x %02x", val16 & 0xff, val16 >> 8); - } printf("\n"); + } + printf("\n"); } } @@ -235,48 +372,87 @@ void cmd_setchecksum(void) { uint16_t val16 = 0; - for (int c = 0; c < 0x3F; c++) + for (int c = 0; c < NVM_CHECKSUM_WORD; c++) val16 += word(c, part); - setWord(0x3F, part, NVM_CHECKSUM - val16); + + setWord(NVM_CHECKSUM_WORD, part, NVM_CHECKSUM - val16); } void cmd_brick(void) { if (goodChecksum(part)) - setWord(0x3F, part, ((word(0x3F, part)) ^ 0xFF)); + setWord(NVM_CHECKSUM_WORD, part, + ((word(NVM_CHECKSUM_WORD, part)) ^ 0xFF)); } void cmd_copy(void) { - if ((gbeFileChanged = nvmPartChanged[part ^ 1] = goodChecksum(part))) - gbe[part ^ 1] = gbe[part]; /* speedhack: copy ptr, not words */ + nvmPartChanged[part ^ 1] = goodChecksum(part); +} + +void +cmd_swap(void) { + err_if(!(goodChecksum(0) || goodChecksum(1))); + errno = 0; + + gbe[0] ^= gbe[1]; + gbe[1] ^= gbe[0]; + gbe[0] ^= gbe[1]; + + nvmPartChanged[0] = nvmPartChanged[1] = 1; } int goodChecksum(int partnum) { uint16_t total = 0; - for(int w = 0; w <= 0x3F; w++) + for(int w = 0; w <= NVM_CHECKSUM_WORD; w++) total += word(w, partnum); + if (total == NVM_CHECKSUM) return 1; + fprintf(stderr, "WARNING: BAD checksum in part %d\n", partnum); - return (errno = ECANCELED) & 0; + errno = ECANCELED; + return 0; } void writeGbe(void) { - err_if((cmd == writeGbe) && !(goodChecksum(0) || goodChecksum(1))); - for (int p = 0, x = (cmd == writeGbe) ? 1 : 0; p < 2; p++) { - if ((!nvmPartChanged[p]) && (cmd != writeGbe)) + ssize_t tnw = 0; + + for (int p = 0; p < 2; p++) { + if ((!nvmPartChanged[p]) || (flags == O_RDONLY)) continue; - swap(p^x); - err_if(pwrite(fd, (uint8_t *) gbe[p^x], nf, p << 12) == -1); + + swap(p); /* swap bytes on big-endian host CPUs */ + ssize_t nw = pwrite(fd, (uint8_t *) gbe[p], nf, p * partsize); + err_if(nw == -1); + if (nw != nf) + err(errno == ECANCELED, + "%ld bytes written to '%s', expected %ld bytes\n", + nw, filename, nf); + + tnw += nf; } - errno = 0; + + if ((flags != O_RDONLY) && (cmd != cmd_dump)) { + if (nvmPartChanged[0] || nvmPartChanged[1]) + printf("The following nvm words were written:\n"); + cmd_dump(); + } + + if ((!tnw) && (flags != O_RDONLY) && (!errno)) + fprintf(stderr, "No changes needed on file '%s'\n", filename); + else if (tnw) + printf("%ld bytes written to file '%s'\n", tnw, filename); + + if (tnw) + errno = 0; + err_if(close(fd) == -1); } @@ -285,6 +461,12 @@ swap(int partnum) { size_t w, x; uint8_t *n = (uint8_t *) gbe[partnum]; - for (w = nf * ((uint8_t *) &e)[0], x = 1; w < nf; w += 2, x += 2) - n[w] ^= n[x], n[x] ^= n[w], n[w] ^= n[x]; + int e = 1; + + for (w = NVM_SIZE * ((uint8_t *) &e)[0], x = 1; w < NVM_SIZE; + w += 2, x += 2) { + n[w] ^= n[x]; + n[x] ^= n[w]; + n[w] ^= n[x]; + } } diff --git a/util/sbase/.gitignore b/util/sbase/.gitignore new file mode 100644 index 00000000..247ecd36 --- /dev/null +++ b/util/sbase/.gitignore @@ -0,0 +1,103 @@ +*.o +/build +/getconf.h +/libutf.a +/libutil.a +/basename +/cal +/cat +/chgrp +/chmod +/chown +/chroot +/cksum +/cmp +/cols +/comm +/cp +/cron +/cut +/date +/dd +/dirname +/du +/echo +/ed +/env +/expand +/expr +/false +/find +/flock +/fold +/getconf +/grep +/head +/hostname +/join +/kill +/link +/ln +/logger +/logname +/ls +/md5sum +/mkdir +/mkfifo +/mknod +/mktemp +/mv +/nice +/nl +/nohup +/od +/paste +/pathchk +/printenv +/printf +/pwd +/readlink +/renice +/rev +/rm +/rmdir +/sbase-box +/sed +/seq +/setsid +/sha1sum +/sha224sum +/sha256sum +/sha384sum +/sha512sum +/sha512-224sum +/sha512-256sum +/sleep +/sort +/split +/sponge +/strings +/sync +/tail +/tar +/tee +/test +/tftp +/time +/touch +/tr +/true +/tsort +/tty +/uname +/unexpand +/uniq +/unlink +/uudecode +/uuencode +/wc +/which +/whoami +/xargs +/xinstall +/yes diff --git a/util/sbase/LICENSE b/util/sbase/LICENSE new file mode 100644 index 00000000..bbbfa8c5 --- /dev/null +++ b/util/sbase/LICENSE @@ -0,0 +1,63 @@ +MIT License + +© 2011 Connor Lane Smith <cls@lubutu.com> +© 2011-2016 Dimitris Papastamos <sin@2f30.org> +© 2014-2016 Laslo Hunhold <dev@frign.de> + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +the rights to use, copy, modify, merge, publish, distribute, sublicense, +and/or sell copies of the Software, and to permit persons to whom the +Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER +DEALINGS IN THE SOFTWARE. + +Authors/contributors include: + +© 2011 Kamil CholewiÅ„ski <harry666t@gmail.com> +© 2011 Rob Pilling <robpilling@gmail.com> +© 2011 Hiltjo Posthuma <hiltjo@codemadness.org> +© 2011 pancake <pancake@youterm.com> +© 2011 Random832 <random832@fastmail.us> +© 2012 William Haddon <william@haddonthethird.net> +© 2012 Kurt H. Maier <khm@sciops.net> +© 2012 Christoph Lohmann <20h@r-36.net> +© 2012 David Galos <galosd83@students.rowan.edu> +© 2012 Robert Ransom <rransom.8774@gmail.com> +© 2013 Jakob Kramer <jakob.kramer@gmx.de> +© 2013 Anselm R Garbe <anselm@garbe.us> +© 2013 Truls Becken <truls.becken@gmail.com> +© 2013 dsp <dsp@2f30.org> +© 2013 Markus Teich <markus.teich@stusta.mhn.de> +© 2013 Jesse Ogle <jesse.p.ogle@gmail.com> +© 2013 Lorenzo Cogotti <miciamail@hotmail.it> +© 2013 Federico G. Benavento <benavento@gmail.com> +© 2013 Roberto E. Vargas Caballero <k0ga@shike2.com> +© 2013 Christian Hesse <mail@eworm.de> +© 2013 Markus Wichmann <nullplan@gmx.net> +© 2014 Silvan Jegen <s.jegen@gmail.com> +© 2014 Daniel Bainton <dpb@driftaway.org> +© 2014 Tuukka Kataja <stuge@xor.fi> +© 2014 Jeffrey Picard <jeff@jeffreypicard.com> +© 2014 Evan Gates <evan.gates@gmail.com> +© 2014 Michael Forney <mforney@mforney.org> +© 2014 Ari Malinen <ari.malinen@gmail.com> +© 2014 Brandon Mulcahy <brandon@jangler.info> +© 2014 Adria Garriga <rhaps0dy@installgentoo.com> +© 2014-2015 Greg Reagle <greg.reagle@umbc.edu> +© 2015 Tai Chi Minh Ralph Eastwood <tcmreastwood@gmail.com> +© 2015 Quentin Rameau <quinq@quinq.eu.org> +© 2015 Dionysis Grigoropoulos <info@erethon.com> +© 2015 Wolfgang Corcoran-Mathe <wcm@sigwinch.xyz> +© 2016 Mattias Andrée <maandree@kth.se> +© 2016 Eivind Uggedal <eivind@uggedal.com> diff --git a/util/sbase/Makefile b/util/sbase/Makefile new file mode 100644 index 00000000..2d409ff3 --- /dev/null +++ b/util/sbase/Makefile @@ -0,0 +1,256 @@ +.POSIX: +include config.mk + +.SUFFIXES: +.SUFFIXES: .o .c + +CPPFLAGS =\ + -D_DEFAULT_SOURCE \ + -D_NETBSD_SOURCE \ + -D_BSD_SOURCE \ + -D_XOPEN_SOURCE=700 \ + -D_FILE_OFFSET_BITS=64 + +HDR =\ + arg.h\ + compat.h\ + crypt.h\ + fs.h\ + md5.h\ + queue.h\ + sha1.h\ + sha224.h\ + sha256.h\ + sha384.h\ + sha512.h\ + sha512-224.h\ + sha512-256.h\ + text.h\ + utf.h\ + util.h + +LIBUTFOBJ =\ + libutf/fgetrune.o\ + libutf/fputrune.o\ + libutf/isalnumrune.o\ + libutf/isalpharune.o\ + libutf/isblankrune.o\ + libutf/iscntrlrune.o\ + libutf/isdigitrune.o\ + libutf/isgraphrune.o\ + libutf/isprintrune.o\ + libutf/ispunctrune.o\ + libutf/isspacerune.o\ + libutf/istitlerune.o\ + libutf/isxdigitrune.o\ + libutf/lowerrune.o\ + libutf/rune.o\ + libutf/runetype.o\ + libutf/upperrune.o\ + libutf/utf.o\ + libutf/utftorunestr.o + +LIBUTILOBJ =\ + libutil/concat.o\ + libutil/cp.o\ + libutil/crypt.o\ + libutil/confirm.o\ + libutil/ealloc.o\ + libutil/enmasse.o\ + libutil/eprintf.o\ + libutil/eregcomp.o\ + libutil/estrtod.o\ + libutil/fnck.o\ + libutil/fshut.o\ + libutil/getlines.o\ + libutil/human.o\ + libutil/linecmp.o\ + libutil/md5.o\ + libutil/memmem.o\ + libutil/mkdirp.o\ + libutil/mode.o\ + libutil/parseoffset.o\ + libutil/putword.o\ + libutil/reallocarray.o\ + libutil/recurse.o\ + libutil/rm.o\ + libutil/sha1.o\ + libutil/sha224.o\ + libutil/sha256.o\ + libutil/sha384.o\ + libutil/sha512.o\ + libutil/sha512-224.o\ + libutil/sha512-256.o\ + libutil/strcasestr.o\ + libutil/strlcat.o\ + libutil/strlcpy.o\ + libutil/strsep.o\ + libutil/strnsubst.o\ + libutil/strtonum.o\ + libutil/unescape.o\ + libutil/writeall.o + +LIB = libutf.a libutil.a + +BIN =\ + basename\ + cal\ + cat\ + chgrp\ + chmod\ + chown\ + chroot\ + cksum\ + cmp\ + cols\ + comm\ + cp\ + cron\ + cut\ + date\ + dd\ + dirname\ + du\ + echo\ + ed\ + env\ + expand\ + expr\ + false\ + find\ + flock\ + fold\ + getconf\ + grep\ + head\ + hostname\ + join\ + kill\ + link\ + ln\ + logger\ + logname\ + ls\ + md5sum\ + mkdir\ + mkfifo\ + mknod\ + mktemp\ + mv\ + nice\ + nl\ + nohup\ + od\ + paste\ + pathchk\ + printenv\ + printf\ + pwd\ + readlink\ + renice\ + rev\ + rm\ + rmdir\ + sed\ + seq\ + setsid\ + sha1sum\ + sha224sum\ + sha256sum\ + sha384sum\ + sha512sum\ + sha512-224sum\ + sha512-256sum\ + sleep\ + sort\ + split\ + sponge\ + strings\ + sync\ + tail\ + tar\ + tee\ + test\ + tftp\ + time\ + touch\ + tr\ + true\ + tsort\ + tty\ + uname\ + unexpand\ + uniq\ + unlink\ + uudecode\ + uuencode\ + wc\ + which\ + whoami\ + xargs\ + xinstall\ + yes + +OBJ = $(LIBUTFOBJ) $(LIBUTILOBJ) + +all: $(BIN) + +$(BIN): $(LIB) + +$(OBJ) $(BIN): $(HDR) + +.o: + $(CC) $(LDFLAGS) -o $@ $< $(LIB) + +.c.o: + $(CC) $(CPPFLAGS) $(CFLAGS) -o $@ -c $< + +.c: + $(CC) $(CPPFLAGS) $(CFLAGS) -o $@ $< $(LIB) + +libutf.a: $(LIBUTFOBJ) + $(AR) $(ARFLAGS) $@ $? + $(RANLIB) $@ + +libutil.a: $(LIBUTILOBJ) + $(AR) $(ARFLAGS) $@ $? + $(RANLIB) $@ + +getconf: getconf.h + +getconf.h: + scripts/getconf.sh > $@ + +proto: $(BIN) + scripts/mkproto $(DESTDIR)$(PREFIX) $(DESTDIR)$(MANPREFIX) proto + +install uninstall: proto + scripts/$@ proto + +sbase-box-install: sbase-box proto + scripts/install proto + $(DESTDIR)$(PREFIX)/bin/sbase-box -i $(DESTDIR)$(PREFIX)/bin/ + +sbase-box-uninstall: sbase-box proto + $(DESTDIR)$(PREFIX)/bin/sbase-box -d $(DESTDIR)$(PREFIX)/bin/ + scripts/uninstall proto + +dist: clean + mkdir -p sbase + cp -R LICENSE Makefile README TODO config.mk *.c *.1 *.h libutf libutil sbase + mv sbase sbase-$(VERSION) + tar -cf sbase-$(VERSION).tar sbase-$(VERSION) + gzip sbase-$(VERSION).tar + rm -rf sbase-$(VERSION) + +sbase-box: $(BIN) + scripts/mkbox + $(CC) $(CFLAGS) $(CPPFLAGS) $(LDFLAGS) -o $@ build/*.c $(LIB) + +clean: + rm -f $(BIN) $(OBJ) $(LIB) sbase-box sbase-$(VERSION).tar.gz + rm -f getconf.h + rm -f proto + rm -rf build + +.PHONY: all install uninstall dist sbase-box-install sbase-box-uninstall clean diff --git a/util/sbase/README b/util/sbase/README new file mode 100644 index 00000000..a3390a95 --- /dev/null +++ b/util/sbase/README @@ -0,0 +1,147 @@ +sbase - suckless unix tools +=========================== + +sbase is a collection of unix tools that are inherently portable across +UNIX and UNIX-like systems. + +The complement of sbase is ubase[1] which is Linux-specific and provides +all the non-portable tools. Together they are intended to form a base +system similar to busybox but much smaller and suckless. + +Building +-------- + +To build sbase, simply type make. You may have to fiddle with config.mk +depending on your system. + +You can also build sbase-box, which generates a single binary containing +all the required tools. You can then symlink the individual tools to +sbase-box or run: make sbase-box-install + +To run the tools for sbase-box directly use: sbase-box cmd [args] + +Ideally you will want to statically link sbase. If you are on Linux we +recommend using musl-libc[2]. + +Portability +----------- + +sbase has been compiled on a variety of different operating systems, +including Linux, *BSD, OSX, Haiku, Solaris, SCO OpenServer and others. + +Various combinations of operating systems and architectures have also +been built. + +You can build sbase with gcc, clang, tcc, nwcc and pcc. + +Status +------ + +The following tools are implemented: + +'#' -> UTF-8 support, '=' -> Implicit UTF-8 support, '*' -> Finished, +'|' -> Audited, 'o' -> POSIX 2013 compliant, 'x' -> Non-POSIX, +'0' -> NUL handling, '()' -> Petty flag + + UTILITY MISSING + ------- ------- +0=*|o basename . +0=*|o cal . +0=*|o cat . +0=*|o chgrp . +0=*|o chmod . +0=*|o chown . +0=*|x chroot . +0=*|o cksum . +0=*|o cmp . +0#*|x cols . +0=*|o comm . +0=*|o cp . +0=*|x cron . +0#*|o cut . +0=*|o date . +0=*|o dd . +0=*|o dirname . +0=*|o du . +0=*|o echo . + o ed . +0=*|o env . +0#*|o expand . +0#*|o expr . +0=*|o false . +0= find . +0=* x flock . +0#*|o fold . +0=*|o getconf (-v) + =*|o grep . +0=*|o head . +0=*|x hostname . +0=*|x install . +0=* o join . +0=*|o kill . +0=*|o link . +0=*|o ln . +0=*|o logger . +0=*|o logname . +0#* o ls (-C, -k, -m, -p, -s, -x) +0=*|x md5sum . +0=*|o mkdir . +0=*|o mkfifo . +0=*|x mknod . +0=*|x mktemp . +0=*|o mv (-i) +0=*|o nice . +0#*|o nl . +0=*|o nohup . +0=*|o od . + #*|o paste . +0#* o pathchk . +0=*|x printenv . +0#*|o printf . +0=*|o pwd . +0=*|x readlink . +0=*|o renice . +0#* x rev . +0=*|o rm . +0=*|o rmdir . + # sed . +0=*|x seq . +0=*|x setsid . +0=*|x sha1sum . +0=* x sha224sum . +0=*|x sha256sum . +0=* x sha384sum . +0=*|x sha512sum . +0=* x sha512-224sum . +0=* x sha512-256sum . +0=*|o sleep . +0#*|o sort . +0=*|o split . +0=*|x sponge . +0#*|o strings . +0=*|x sync . +0=*|o tail . +0=*|x tar . +0=*|o tee . +0=*|o test . +0=*|x tftp . +0=*|o time . +0=*|o touch . +0#*|o tr . +0=*|o true . +0=* o tsort . +0=*|o tty . +0=*|o uname . +0#*|o unexpand . +0=*|o uniq . +0=*|o unlink . +0=*|o uudecode . +0=*|o uuencode . +0#*|o wc . +0=*|x which . +0=*|x whoami . +0=*|o xargs . +0=*|x yes . + +[1] http://git.suckless.org/ubase/ +[2] http://www.musl-libc.org/ diff --git a/util/sbase/TODO b/util/sbase/TODO new file mode 100644 index 00000000..38c9f868 --- /dev/null +++ b/util/sbase/TODO @@ -0,0 +1,92 @@ +The following list of commands is taken from the toybox roadmap[0] and +has been stripped down accordingly. Commands that belong to ubase[1] +are not listed here as well as commands that fall outside the scope of +sbase such as vi and sh are also not listed here. + +at +awk +bc +diff +patch +stty + +If you are looking for some work to do on sbase, another option is to +pick a utility from the list in the README which has missing flags or +features noted. + +What also needs to be implemented is the capability of the tools to +handle data with NUL-bytes in it. + +The return values of mdcheckline() in crypt.c need to be fixed (0 -> success, +1 -> error). + +[0] http://landley.net/toybox/roadmap.html +[1] http://git.suckless.org/ubase/ + +Bugs +==== + +ed +-- +* cat <<EOF | ed + i + LLL + . + s/$/\\ + +* cat <<EOF | ed + 0a + int radix = 16; + int Pflag; + int Aflag; + int vflag; + int gflag; + int uflag; + int arflag; + + . + ?radix?;/^$/-s/^/static / +* cat <<EOF | ed + 0a + Line + . + s# *## +* cat <<EOF | ed + 0a + line + . + 1g/^$/p + +* cat <<EOF | ed + 0a + line1 + line2 + line3 + . + g/^$/d + ,p + +* Editing huge files doesn't work well. + + +printf +------ +* Flags for string conversion-specifier (%s) are not supported. +* Escape sequences that expand to '%' are treated as beginning of + conversion specification. +* An trailing '%' at the end of a format string causes a read past + the end of the string. + +tr +-- +* When a character class is present, all other characters in the + string are ignored. + +sbase-box +--------- +* List of commands does not contain `install` (only `xinstall`). + + +xargs +----- +* Add -L. diff --git a/util/sbase/arg.h b/util/sbase/arg.h new file mode 100644 index 00000000..0b23c53a --- /dev/null +++ b/util/sbase/arg.h @@ -0,0 +1,65 @@ +/* + * Copy me if you can. + * by 20h + */ + +#ifndef ARG_H__ +#define ARG_H__ + +extern char *argv0; + +/* use main(int argc, char *argv[]) */ +#define ARGBEGIN for (argv0 = *argv, argv++, argc--;\ + argv[0] && argv[0][0] == '-'\ + && argv[0][1];\ + argc--, argv++) {\ + char argc_;\ + char **argv_;\ + int brk_;\ + if (argv[0][1] == '-' && argv[0][2] == '\0') {\ + argv++;\ + argc--;\ + break;\ + }\ + for (brk_ = 0, argv[0]++, argv_ = argv;\ + argv[0][0] && !brk_;\ + argv[0]++) {\ + if (argv_ != argv)\ + break;\ + argc_ = argv[0][0];\ + switch (argc_) + +/* Handles obsolete -NUM syntax */ +#define ARGNUM case '0':\ + case '1':\ + case '2':\ + case '3':\ + case '4':\ + case '5':\ + case '6':\ + case '7':\ + case '8':\ + case '9' + +#define ARGEND }\ + } + +#define ARGC() argc_ + +#define ARGNUMF() (brk_ = 1, estrtonum(argv[0], 0, INT_MAX)) + +#define EARGF(x) ((argv[0][1] == '\0' && argv[1] == NULL)?\ + ((x), abort(), (char *)0) :\ + (brk_ = 1, (argv[0][1] != '\0')?\ + (&argv[0][1]) :\ + (argc--, argv++, argv[0]))) + +#define ARGF() ((argv[0][1] == '\0' && argv[1] == NULL)?\ + (char *)0 :\ + (brk_ = 1, (argv[0][1] != '\0')?\ + (&argv[0][1]) :\ + (argc--, argv++, argv[0]))) + +#define LNGARG() &argv[0][0] + +#endif diff --git a/util/sbase/basename.1 b/util/sbase/basename.1 new file mode 100644 index 00000000..2717c580 --- /dev/null +++ b/util/sbase/basename.1 @@ -0,0 +1,22 @@ +.Dd October 8, 2015 +.Dt BASENAME 1 +.Os sbase +.Sh NAME +.Nm basename +.Nd strip leading directory components of a path +.Sh SYNOPSIS +.Nm +.Ar path +.Op Ar suffix +.Sh DESCRIPTION +.Nm +writes +.Ar path +without leading directory components and +.Ar suffix +to stdout. +.Sh SEE ALSO +.Xr dirname 1 , +.Xr basename 3 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/basename.c b/util/sbase/basename.c new file mode 100644 index 00000000..94a2848f --- /dev/null +++ b/util/sbase/basename.c @@ -0,0 +1,37 @@ +/* See LICENSE file for copyright and license details. */ +#include <libgen.h> +#include <stdio.h> +#include <string.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s path [suffix]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + ssize_t off; + char *p; + + ARGBEGIN { + default: + usage(); + } ARGEND + + if (argc != 1 && argc != 2) + usage(); + + p = basename(argv[0]); + if (argc == 2) { + off = strlen(p) - strlen(argv[1]); + if (off > 0 && !strcmp(p + off, argv[1])) + p[off] = '\0'; + } + puts(p); + + return fshut(stdout, "<stdout>"); +} diff --git a/util/sbase/cal.1 b/util/sbase/cal.1 new file mode 100644 index 00000000..2918ea98 --- /dev/null +++ b/util/sbase/cal.1 @@ -0,0 +1,68 @@ +.Dd October 8, 2015 +.Dt CAL 1 +.Os sbase +.Sh NAME +.Nm cal +.Nd show calendar +.Sh SYNOPSIS +.Nm +.Op Fl 1 | Fl 3 | Fl y | Fl n Ar num +.Op Fl s | Fl m | Fl f Ar num +.Op Fl c Ar num +.Oo Oo Ar month Oc Ar year Oc +.Sh DESCRIPTION +.Nm +writes a calendar of +.Ar month +and +.Ar year +or the current month to stdout. +If +.Ar year +is given without +.Ar month , +.Nm +writes a 3-column calendar of the whole +year to stdout. +The date formatting is according to +.Xr localtime 3 . +.Pp +The Julian calendar is used until Sep 2, 1752. +The Gregorian calendar is used starting the next day on Sep 14, 1752. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl 1 +Print current month. +This is the default. +.It Fl 3 +Print previous, current and next month. +.It Fl c Ar num +Print +.Ar num +calendars in a row. +The default is 3. +.It Fl f Ar num +Set +.Ar num +(0 is Sunday, 6 is Saturday) as first day of week. +.It Fl m +Set Monday as first day of week. +.It Fl n Ar num +Output +.Ar num +months starting from and including the current month. +.It Fl s +Set Sunday as first day of week. +.It Fl y +Print the entire +.Ar year +or current year. +.El +.Sh SEE ALSO +.Xr localtime 3 +.Sh STANDARDS +POSIX.1-2013. +.Pp +The flags +.Op Fl 13cfmnsy +are an extension to that specification. diff --git a/util/sbase/cal.c b/util/sbase/cal.c new file mode 100644 index 00000000..a8c91f19 --- /dev/null +++ b/util/sbase/cal.c @@ -0,0 +1,226 @@ +/* See LICENSE file for copyright and license details. */ +#include <limits.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <time.h> +#include <unistd.h> + +#include "util.h" + +enum { JAN, FEB, MAR, APR, MAY, JUN, JUL, AUG, SEP, OCT, NOV, DEC }; +enum caltype { JULIAN, GREGORIAN }; +enum { TRANS_YEAR = 1752, TRANS_MONTH = SEP, TRANS_DAY = 2 }; + +static struct tm *ltime; + +static int +isleap(size_t year, enum caltype cal) +{ + if (cal == GREGORIAN) { + if (year % 400 == 0) + return 1; + if (year % 100 == 0) + return 0; + return (year % 4 == 0); + } + else { /* cal == Julian */ + return (year % 4 == 0); + } +} + +static int +monthlength(size_t year, int month, enum caltype cal) +{ + int mdays[] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; + + return (month == FEB && isleap(year, cal)) ? 29 : mdays[month]; +} + +/* From http://www.tondering.dk/claus/cal/chrweek.php#calcdow */ +static int +dayofweek(size_t year, int month, int dom, enum caltype cal) +{ + size_t y; + int m, a; + + a = (13 - month) / 12; + y = year - a; + m = month + 12 * a - 1; + + if (cal == GREGORIAN) + return (dom + y + y / 4 - y / 100 + y / 400 + (31 * m) / 12) % 7; + else /* cal == Julian */ + return (5 + dom + y + y / 4 + (31 * m) / 12) % 7; +} + +static void +printgrid(size_t year, int month, int fday, int line) +{ + enum caltype cal; + int offset, dom, d = 0, trans; /* are we in the transition from Julian to Gregorian? */ + int today = 0; + + cal = (year < TRANS_YEAR || (year == TRANS_YEAR && month <= TRANS_MONTH)) ? JULIAN : GREGORIAN; + trans = (year == TRANS_YEAR && month == TRANS_MONTH); + offset = dayofweek(year, month, 1, cal) - fday; + + if (offset < 0) + offset += 7; + if (line == 1) { + for (; d < offset; ++d) + printf(" "); + dom = 1; + } else { + dom = 8 - offset + (line - 2) * 7; + if (trans && !(line == 2 && fday == 3)) + dom += 11; + } + if (ltime && year == ltime->tm_year + 1900 && month == ltime->tm_mon) + today = ltime->tm_mday; + for (; d < 7 && dom <= monthlength(year, month, cal); ++d, ++dom) { + if (dom == today) + printf("\x1b[7m%2d\x1b[0m ", dom); /* highlight today's date */ + else + printf("%2d ", dom); + if (trans && dom == TRANS_DAY) + dom += 11; + } + for (; d < 7; ++d) + printf(" "); +} + +static void +drawcal(size_t year, int month, size_t ncols, size_t nmons, int fday) +{ + char *smon[] = { "January", "February", "March", "April", + "May", "June", "July", "August", + "September", "October", "November", "December" }; + char *days[] = { "Su", "Mo", "Tu", "We", "Th", "Fr", "Sa", }; + size_t m, n, col, cur_year, cur_month, dow; + int line, pad; + char month_year[sizeof("Su Mo Tu We Th Fr Sa")]; + + for (m = 0; m < nmons; ) { + n = m; + for (col = 0; m < nmons && col < ncols; ++col, ++m) { + cur_year = year + m / 12; + cur_month = month + m % 12; + if (cur_month > 11) { + cur_month -= 12; + cur_year += 1; + } + snprintf(month_year, sizeof(month_year), "%s %zu", smon[cur_month], cur_year); + pad = sizeof(month_year) - 1 - strlen(month_year); + printf("%*s%s%*s ", pad / 2 + pad % 2, "", month_year, pad / 2, ""); + } + putchar('\n'); + for (col = 0, m = n; m < nmons && col < ncols; ++col, ++m) { + for (dow = fday; dow < (fday + 7); ++dow) + printf("%s ", days[dow % 7]); + printf(" "); + } + putchar('\n'); + for (line = 1; line <= 6; ++line) { + for (col = 0, m = n; m < nmons && col < ncols; ++col, ++m) { + cur_year = year + m / 12; + cur_month = month + m % 12; + if (cur_month > 11) { + cur_month -= 12; + cur_year += 1; + } + printgrid(cur_year, cur_month, fday, line); + printf(" "); + } + putchar('\n'); + } + } +} + +static void +usage(void) +{ + eprintf("usage: %s [-1 | -3 | -y | -n num] " + "[-s | -m | -f num] [-c num] [[month] year]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + time_t now; + size_t year, ncols, nmons; + int fday, month; + + now = time(NULL); + ltime = localtime(&now); + year = ltime->tm_year + 1900; + month = ltime->tm_mon + 1; + fday = 0; + + if (!isatty(STDOUT_FILENO)) + ltime = NULL; /* don't highlight today's date */ + + ncols = 3; + nmons = 0; + + ARGBEGIN { + case '1': + nmons = 1; + break; + case '3': + nmons = 3; + if (--month == 0) { + month = 12; + year--; + } + break; + case 'c': + ncols = estrtonum(EARGF(usage()), 0, MIN(SIZE_MAX, LLONG_MAX)); + break; + case 'f': + fday = estrtonum(EARGF(usage()), 0, 6); + break; + case 'm': /* Monday */ + fday = 1; + break; + case 'n': + nmons = estrtonum(EARGF(usage()), 1, MIN(SIZE_MAX, LLONG_MAX)); + break; + case 's': /* Sunday */ + fday = 0; + break; + case 'y': + month = 1; + nmons = 12; + break; + default: + usage(); + } ARGEND + + if (nmons == 0) { + if (argc == 1) { + month = 1; + nmons = 12; + } else { + nmons = 1; + } + } + + switch (argc) { + case 2: + month = estrtonum(argv[0], 1, 12); + argv++; + case 1: /* fallthrough */ + year = estrtonum(argv[0], 0, INT_MAX); + break; + case 0: + break; + default: + usage(); + } + + drawcal(year, month - 1, ncols, nmons, fday); + + return fshut(stdout, "<stdout>"); +} diff --git a/util/sbase/cat.1 b/util/sbase/cat.1 new file mode 100644 index 00000000..e6172298 --- /dev/null +++ b/util/sbase/cat.1 @@ -0,0 +1,27 @@ +.Dd October 8, 2015 +.Dt CAT 1 +.Os sbase +.Sh NAME +.Nm cat +.Nd concatenate files +.Sh SYNOPSIS +.Nm +.Op Fl u +.Op Ar file ... +.Sh DESCRIPTION +.Nm +reads each +.Ar file +in sequence and writes it to stdout. +If no +.Ar file +is given +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl u +Unbuffered output. +.El +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/cat.c b/util/sbase/cat.c new file mode 100644 index 00000000..211e8d11 --- /dev/null +++ b/util/sbase/cat.c @@ -0,0 +1,52 @@ +/* See LICENSE file for copyright and license details. */ +#include <fcntl.h> +#include <string.h> +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [-u] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int fd, ret = 0; + + ARGBEGIN { + case 'u': + break; + default: + usage(); + } ARGEND + + if (!argc) { + if (concat(0, "<stdin>", 1, "<stdout>") < 0) + ret = 1; + } else { + for (; *argv; argc--, argv++) { + if (!strcmp(*argv, "-")) { + *argv = "<stdin>"; + fd = 0; + } else if ((fd = open(*argv, O_RDONLY)) < 0) { + weprintf("open %s:", *argv); + ret = 1; + continue; + } + switch (concat(fd, *argv, 1, "<stdout>")) { + case -1: + ret = 1; + break; + case -2: + return 1; /* exit on write error */ + } + if (fd != 0) + close(fd); + } + } + + return ret; +} diff --git a/util/sbase/chgrp.1 b/util/sbase/chgrp.1 new file mode 100644 index 00000000..ee44a54c --- /dev/null +++ b/util/sbase/chgrp.1 @@ -0,0 +1,47 @@ +.Dd October 8, 2015 +.Dt CHGRP 1 +.Os sbase +.Sh NAME +.Nm chgrp +.Nd change file group ownership +.Sh SYNOPSIS +.Nm +.Op Fl h +.Oo +.Fl R +.Op Fl H | L | P +.Oc +.Ar group +.Ar file ... +.Sh DESCRIPTION +.Nm +sets the group id of each +.Ar file +to the gid of +.Ar group . +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl h +Preserve +.Ar file +if it is a symbolic link. +.It Fl R +Change file group ownerships recursively. +.It Fl H +Dereference +.Ar file +if it is a symbolic link. +.It Fl L +Dereference all symbolic links. +.It Fl P +Preserve symbolic links. +This is the default. +.El +.Sh SEE ALSO +.Xr chmod 1 , +.Xr chown 1 , +.Xr chmod 2 , +.Xr chown 2 , +.Xr getgrnam 3 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/chgrp.c b/util/sbase/chgrp.c new file mode 100644 index 00000000..4042a0dd --- /dev/null +++ b/util/sbase/chgrp.c @@ -0,0 +1,75 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> + +#include <errno.h> +#include <fcntl.h> +#include <grp.h> +#include <unistd.h> + +#include "fs.h" +#include "util.h" + +static int hflag = 0; +static gid_t gid = -1; +static int ret = 0; + +static void +chgrp(int dirfd, const char *name, struct stat *st, void *data, struct recursor *r) +{ + int flags = 0; + + if ((r->maxdepth == 0 && r->follow == 'P') || (r->follow == 'H' && r->depth) || (hflag && !(r->depth))) + flags |= AT_SYMLINK_NOFOLLOW; + if (fchownat(dirfd, name, -1, gid, flags) < 0) { + weprintf("chown %s:", r->path); + ret = 1; + } else if (S_ISDIR(st->st_mode)) { + recurse(dirfd, name, NULL, r); + } +} + +static void +usage(void) +{ + eprintf("usage: %s [-h] [-R [-H | -L | -P]] group file ...\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + struct group *gr; + struct recursor r = { .fn = chgrp, .maxdepth = 1, .follow = 'P' }; + + ARGBEGIN { + case 'h': + hflag = 1; + break; + case 'R': + r.maxdepth = 0; + break; + case 'H': + case 'L': + case 'P': + r.follow = ARGC(); + break; + default: + usage(); + } ARGEND + + if (argc < 2) + usage(); + + errno = 0; + if ((gr = getgrnam(argv[0]))) { + gid = gr->gr_gid; + } else { + if (errno) + eprintf("getgrnam %s:", argv[0]); + gid = estrtonum(argv[0], 0, UINT_MAX); + } + + for (argc--, argv++; *argv; argc--, argv++) + recurse(AT_FDCWD, *argv, NULL, &r); + + return ret || recurse_status; +} diff --git a/util/sbase/chmod.1 b/util/sbase/chmod.1 new file mode 100644 index 00000000..f579b3fa --- /dev/null +++ b/util/sbase/chmod.1 @@ -0,0 +1,74 @@ +.Dd December 21, 2019 +.Dt CHMOD 1 +.Os sbase +.Sh NAME +.Nm chmod +.Nd change file modes +.Sh SYNOPSIS +.Nm +.Op Fl R +.Ar mode +.Ar file ... +.Sh DESCRIPTION +.Nm +changes the file mode of each +.Ar file +to +.Ar mode . +.Pp +If +.Ar mode +is +.Em octal +"[sog]e" +.Bl -tag -width Ds +.It s +.Xr sticky 1 => s += 1 +.Pp +.Xr setgid 2 => s += 2 +.Pp +.Xr setuid 4 => s += 4 +.It o|g|e +owner | group | everyone +.Pp +.Xr execute 1 => o|g|e += 1 +.Pp +.Xr write 2 => o|g|e += 2 +.Pp +.Xr read 4 => o|g|e += 4 +.El +.Pp +Leading zeroes may be omitted. +.Pp +If +.Ar mode +is +.Em symbolic +"[ugoa]*[+-=][rwxXst]*" +.Bl -tag -width Ds +.It u|g|o|a +owner | group | other (non-group) | everyone +.It +|-|= +add | remove | set +.It r|w|x|s|t +read | write | execute | setuid and setgid | sticky +.It X +execute, if directory or at least one execute bit is already set +.El +.Pp +Symbolic links are followed if they are passed as operands, and ignored +if they are encountered during directory traversal. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl R +Change modes recursively. +.El +.Sh SEE ALSO +.Xr chgrp 1 , +.Xr umask 1 +.Sh STANDARDS +POSIX.1-2013. +.Pp +The +.Op Fl HLP +flags are an extension to that specification. diff --git a/util/sbase/chmod.c b/util/sbase/chmod.c new file mode 100644 index 00000000..c79488bb --- /dev/null +++ b/util/sbase/chmod.c @@ -0,0 +1,77 @@ +/* See LICENSE file for copyright and license details. */ +#include <fcntl.h> +#include <sys/stat.h> + +#include "fs.h" +#include "util.h" + +static char *modestr = ""; +static mode_t mask = 0; +static int ret = 0; + +static void +chmodr(int dirfd, const char *name, struct stat *st, void *data, struct recursor *r) +{ + mode_t m; + + m = parsemode(modestr, st->st_mode, mask); + if (!S_ISLNK(st->st_mode) && fchmodat(dirfd, name, m, 0) < 0) { + weprintf("chmod %s:", r->path); + ret = 1; + } else if (S_ISDIR(st->st_mode)) { + recurse(dirfd, name, NULL, r); + } +} + +static void +usage(void) +{ + eprintf("usage: %s [-R] mode file ...\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + struct recursor r = { .fn = chmodr, .maxdepth = 1, .follow = 'H', .flags = DIRFIRST }; + size_t i; + + argv0 = *argv, argv0 ? (argc--, argv++) : (void *)0; + + for (; *argv && (*argv)[0] == '-'; argc--, argv++) { + if (!(*argv)[1]) + usage(); + for (i = 1; (*argv)[i]; i++) { + switch ((*argv)[i]) { + case 'R': + r.maxdepth = 0; + break; + case 'r': case 'w': case 'x': case 'X': case 's': case 't': + /* -[rwxXst] are valid modes, so we're done */ + if (i == 1) + goto done; + /* fallthrough */ + case '-': + /* -- terminator */ + if (i == 1 && !(*argv)[i + 1]) { + argv++; + argc--; + goto done; + } + /* fallthrough */ + default: + usage(); + } + } + } +done: + mask = getumask(); + modestr = *argv; + + if (argc < 2) + usage(); + + for (--argc, ++argv; *argv; argc--, argv++) + recurse(AT_FDCWD, *argv, NULL, &r); + + return ret || recurse_status; +} diff --git a/util/sbase/chown.1 b/util/sbase/chown.1 new file mode 100644 index 00000000..8afdfcab --- /dev/null +++ b/util/sbase/chown.1 @@ -0,0 +1,57 @@ +.Dd October 8, 2015 +.Dt CHOWN 1 +.Os sbase +.Sh NAME +.Nm chown +.Nd change file ownership +.Sh SYNOPSIS +.Nm +.Op Fl h +.Oo +.Fl R +.Op Fl H | L | P +.Oc +.Ar owner Ns Op Pf : Op Ar group +.Op Ar file ... +.Nm +.Op Fl h +.Oo +.Fl R +.Op Fl H | L | P +.Oc +.Pf : Ar group +.Op Ar file ... +.Sh DESCRIPTION +.Nm +sets the user and/or group id of each +.Ar file +to the uid of +.Ar owner +and/or the gid of +.Ar group +respectively. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl h +Preserve +.Ar file +if it is a symbolic link. +.It Fl R +Change file ownerships recursively. +.It Fl H +Dereference +.Ar file +if it is a symbolic link. +.It Fl L +Dereference all symbolic links. +.It Fl P +Preserve symbolic links. +This is the default. +.El +.Sh SEE ALSO +.Xr chmod 1 , +.Xr chown 2 , +.Xr getgrnam 3 , +.Xr getpwnam 3 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/chown.c b/util/sbase/chown.c new file mode 100644 index 00000000..71628eb6 --- /dev/null +++ b/util/sbase/chown.c @@ -0,0 +1,104 @@ +/* See LICENSE file for copyright and license details. */ +#include <errno.h> +#include <fcntl.h> +#include <grp.h> +#include <limits.h> +#include <pwd.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + +#include "fs.h" +#include "util.h" + +static int hflag = 0; +static uid_t uid = -1; +static gid_t gid = -1; +static int ret = 0; + +static void +chownpwgr(int dirfd, const char *name, struct stat *st, void *data, struct recursor *r) +{ + int flags = 0; + + if ((r->maxdepth == 0 && r->follow == 'P') || (r->follow == 'H' && r->depth) || (hflag && !(r->depth))) + flags |= AT_SYMLINK_NOFOLLOW; + + if (fchownat(dirfd, name, uid, gid, flags) < 0) { + weprintf("chown %s:", r->path); + ret = 1; + } else if (S_ISDIR(st->st_mode)) { + recurse(dirfd, name, NULL, r); + } +} + +static void +usage(void) +{ + eprintf("usage: %s [-h] [-R [-H | -L | -P]] owner[:[group]] file ...\n" + " %s [-h] [-R [-H | -L | -P]] :group file ...\n", + argv0, argv0); +} + +int +main(int argc, char *argv[]) +{ + struct group *gr; + struct passwd *pw; + struct recursor r = { .fn = chownpwgr, .maxdepth = 1, .follow = 'P' }; + char *owner, *group; + + ARGBEGIN { + case 'h': + hflag = 1; + break; + case 'r': + case 'R': + r.maxdepth = 0; + break; + case 'H': + case 'L': + case 'P': + r.follow = ARGC(); + break; + default: + usage(); + } ARGEND + + if (argc < 2) + usage(); + + owner = argv[0]; + if ((group = strchr(owner, ':'))) + *group++ = '\0'; + + if (owner && *owner) { + errno = 0; + pw = getpwnam(owner); + if (pw) { + uid = pw->pw_uid; + } else { + if (errno) + eprintf("getpwnam %s:", owner); + uid = estrtonum(owner, 0, UINT_MAX); + } + } + if (group && *group) { + errno = 0; + gr = getgrnam(group); + if (gr) { + gid = gr->gr_gid; + } else { + if (errno) + eprintf("getgrnam %s:", group); + gid = estrtonum(group, 0, UINT_MAX); + } + } + if (uid == (uid_t)-1 && gid == (gid_t)-1) + usage(); + + for (argc--, argv++; *argv; argc--, argv++) + recurse(AT_FDCWD, *argv, NULL, &r); + + return ret || recurse_status; +} diff --git a/util/sbase/chroot.1 b/util/sbase/chroot.1 new file mode 100644 index 00000000..ff49fe91 --- /dev/null +++ b/util/sbase/chroot.1 @@ -0,0 +1,25 @@ +.Dd October 8, 2015 +.Dt CHROOT 1 +.Os sbase +.Sh NAME +.Nm chroot +.Nd run a command or shell with a different root directory +.Sh SYNOPSIS +.Nm +.Ar dir +.Op Ar cmd Op Ar arg ... +.Sh DESCRIPTION +.Nm +runs +.Ar cmd +after changing the root directory to +.Ar dir +with the +.Xr chroot 2 +system call and after changing the working directory to the new root. +If +.Ar cmd +is not specified, an interactive shell is started in the new root. +.Sh SEE ALSO +.Xr chdir 2 , +.Xr chroot 2 diff --git a/util/sbase/chroot.c b/util/sbase/chroot.c new file mode 100644 index 00000000..45f2dc7a --- /dev/null +++ b/util/sbase/chroot.c @@ -0,0 +1,49 @@ +/* See LICENSE file for copyright and license details. */ +#include <errno.h> +#include <stdlib.h> +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s dir [cmd [arg ...]]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + char *shell[] = { "/bin/sh", "-i", NULL }, *aux, *cmd; + int savederrno; + + ARGBEGIN { + default: + usage(); + } ARGEND + + if (!argc) + usage(); + + if ((aux = getenv("SHELL"))) + shell[0] = aux; + + if (chroot(argv[0]) < 0) + eprintf("chroot %s:", argv[0]); + + if (chdir("/") < 0) + eprintf("chdir:"); + + if (argc == 1) { + cmd = *shell; + execvp(cmd, shell); + } else { + cmd = argv[1]; + execvp(cmd, argv + 1); + } + + savederrno = errno; + weprintf("execvp %s:", cmd); + + _exit(126 + (savederrno == ENOENT)); +} diff --git a/util/sbase/cksum.1 b/util/sbase/cksum.1 new file mode 100644 index 00000000..6e2657a4 --- /dev/null +++ b/util/sbase/cksum.1 @@ -0,0 +1,24 @@ +.Dd October 8, 2015 +.Dt CKSUM 1 +.Os sbase +.Sh NAME +.Nm cksum +.Nd compute file checksum +.Sh SYNOPSIS +.Nm +.Op Ar file ... +.Sh DESCRIPTION +.Nm +calculates a cyclic redundancy check (CRC) of +.Ar file +according to +.St -iso8802-3 +and writes it, the file size in bytes and path to stdout. +.Pp +If no +.Ar file +is given, +.Nm +reads from stdin. +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/cksum.c b/util/sbase/cksum.c new file mode 100644 index 00000000..50107b2b --- /dev/null +++ b/util/sbase/cksum.c @@ -0,0 +1,132 @@ +/* See LICENSE file for copyright and license details. */ +#include <fcntl.h> +#include <inttypes.h> +#include <stdio.h> +#include <string.h> +#include <unistd.h> + +#include "util.h" + +static int ret = 0; +static const unsigned long crctab[] = { 0x00000000, +0x04c11db7, 0x09823b6e, 0x0d4326d9, 0x130476dc, 0x17c56b6b, +0x1a864db2, 0x1e475005, 0x2608edb8, 0x22c9f00f, 0x2f8ad6d6, +0x2b4bcb61, 0x350c9b64, 0x31cd86d3, 0x3c8ea00a, 0x384fbdbd, +0x4c11db70, 0x48d0c6c7, 0x4593e01e, 0x4152fda9, 0x5f15adac, +0x5bd4b01b, 0x569796c2, 0x52568b75, 0x6a1936c8, 0x6ed82b7f, +0x639b0da6, 0x675a1011, 0x791d4014, 0x7ddc5da3, 0x709f7b7a, +0x745e66cd, 0x9823b6e0, 0x9ce2ab57, 0x91a18d8e, 0x95609039, +0x8b27c03c, 0x8fe6dd8b, 0x82a5fb52, 0x8664e6e5, 0xbe2b5b58, +0xbaea46ef, 0xb7a96036, 0xb3687d81, 0xad2f2d84, 0xa9ee3033, +0xa4ad16ea, 0xa06c0b5d, 0xd4326d90, 0xd0f37027, 0xddb056fe, +0xd9714b49, 0xc7361b4c, 0xc3f706fb, 0xceb42022, 0xca753d95, +0xf23a8028, 0xf6fb9d9f, 0xfbb8bb46, 0xff79a6f1, 0xe13ef6f4, +0xe5ffeb43, 0xe8bccd9a, 0xec7dd02d, 0x34867077, 0x30476dc0, +0x3d044b19, 0x39c556ae, 0x278206ab, 0x23431b1c, 0x2e003dc5, +0x2ac12072, 0x128e9dcf, 0x164f8078, 0x1b0ca6a1, 0x1fcdbb16, +0x018aeb13, 0x054bf6a4, 0x0808d07d, 0x0cc9cdca, 0x7897ab07, +0x7c56b6b0, 0x71159069, 0x75d48dde, 0x6b93dddb, 0x6f52c06c, +0x6211e6b5, 0x66d0fb02, 0x5e9f46bf, 0x5a5e5b08, 0x571d7dd1, +0x53dc6066, 0x4d9b3063, 0x495a2dd4, 0x44190b0d, 0x40d816ba, +0xaca5c697, 0xa864db20, 0xa527fdf9, 0xa1e6e04e, 0xbfa1b04b, +0xbb60adfc, 0xb6238b25, 0xb2e29692, 0x8aad2b2f, 0x8e6c3698, +0x832f1041, 0x87ee0df6, 0x99a95df3, 0x9d684044, 0x902b669d, +0x94ea7b2a, 0xe0b41de7, 0xe4750050, 0xe9362689, 0xedf73b3e, +0xf3b06b3b, 0xf771768c, 0xfa325055, 0xfef34de2, 0xc6bcf05f, +0xc27dede8, 0xcf3ecb31, 0xcbffd686, 0xd5b88683, 0xd1799b34, +0xdc3abded, 0xd8fba05a, 0x690ce0ee, 0x6dcdfd59, 0x608edb80, +0x644fc637, 0x7a089632, 0x7ec98b85, 0x738aad5c, 0x774bb0eb, +0x4f040d56, 0x4bc510e1, 0x46863638, 0x42472b8f, 0x5c007b8a, +0x58c1663d, 0x558240e4, 0x51435d53, 0x251d3b9e, 0x21dc2629, +0x2c9f00f0, 0x285e1d47, 0x36194d42, 0x32d850f5, 0x3f9b762c, +0x3b5a6b9b, 0x0315d626, 0x07d4cb91, 0x0a97ed48, 0x0e56f0ff, +0x1011a0fa, 0x14d0bd4d, 0x19939b94, 0x1d528623, 0xf12f560e, +0xf5ee4bb9, 0xf8ad6d60, 0xfc6c70d7, 0xe22b20d2, 0xe6ea3d65, +0xeba91bbc, 0xef68060b, 0xd727bbb6, 0xd3e6a601, 0xdea580d8, +0xda649d6f, 0xc423cd6a, 0xc0e2d0dd, 0xcda1f604, 0xc960ebb3, +0xbd3e8d7e, 0xb9ff90c9, 0xb4bcb610, 0xb07daba7, 0xae3afba2, +0xaafbe615, 0xa7b8c0cc, 0xa379dd7b, 0x9b3660c6, 0x9ff77d71, +0x92b45ba8, 0x9675461f, 0x8832161a, 0x8cf30bad, 0x81b02d74, +0x857130c3, 0x5d8a9099, 0x594b8d2e, 0x5408abf7, 0x50c9b640, +0x4e8ee645, 0x4a4ffbf2, 0x470cdd2b, 0x43cdc09c, 0x7b827d21, +0x7f436096, 0x7200464f, 0x76c15bf8, 0x68860bfd, 0x6c47164a, +0x61043093, 0x65c52d24, 0x119b4be9, 0x155a565e, 0x18197087, +0x1cd86d30, 0x029f3d35, 0x065e2082, 0x0b1d065b, 0x0fdc1bec, +0x3793a651, 0x3352bbe6, 0x3e119d3f, 0x3ad08088, 0x2497d08d, +0x2056cd3a, 0x2d15ebe3, 0x29d4f654, 0xc5a92679, 0xc1683bce, +0xcc2b1d17, 0xc8ea00a0, 0xd6ad50a5, 0xd26c4d12, 0xdf2f6bcb, +0xdbee767c, 0xe3a1cbc1, 0xe760d676, 0xea23f0af, 0xeee2ed18, +0xf0a5bd1d, 0xf464a0aa, 0xf9278673, 0xfde69bc4, 0x89b8fd09, +0x8d79e0be, 0x803ac667, 0x84fbdbd0, 0x9abc8bd5, 0x9e7d9662, +0x933eb0bb, 0x97ffad0c, 0xafb010b1, 0xab710d06, 0xa6322bdf, +0xa2f33668, 0xbcb4666d, 0xb8757bda, 0xb5365d03, 0xb1f740b4 +}; + +static void +cksum(int fd, const char *s) +{ + ssize_t n; + size_t len = 0, i; + uint32_t ck = 0; + unsigned char buf[BUFSIZ]; + + while ((n = read(fd, buf, sizeof(buf))) > 0) { + for (i = 0; i < n; i++) + ck = (ck << 8) ^ crctab[(ck >> 24) ^ buf[i]]; + len += n; + } + if (n < 0) { + weprintf("read %s:", s ? s : "<stdin>"); + ret = 1; + return; + } + + for (i = len; i; i >>= 8) + ck = (ck << 8) ^ crctab[(ck >> 24) ^ (i & 0xFF)]; + + printf("%"PRIu32" %zu", ~ck, len); + if (s) { + putchar(' '); + fputs(s, stdout); + } + putchar('\n'); +} + +static void +usage(void) +{ + eprintf("usage: %s [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int fd; + + ARGBEGIN { + default: + usage(); + } ARGEND + + if (!argc) { + cksum(0, NULL); + } else { + for (; *argv; argc--, argv++) { + if (!strcmp(*argv, "-")) { + *argv = "<stdin>"; + fd = 0; + } else if ((fd = open(*argv, O_RDONLY)) < 0) { + weprintf("open %s:", *argv); + ret = 1; + continue; + } + cksum(fd, *argv); + if (fd != 0) + close(fd); + } + } + + ret |= fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/cmp.1 b/util/sbase/cmp.1 new file mode 100644 index 00000000..750d11a8 --- /dev/null +++ b/util/sbase/cmp.1 @@ -0,0 +1,49 @@ +.Dd October 8, 2015 +.Dt CMP 1 +.Os sbase +.Sh NAME +.Nm cmp +.Nd compare two files +.Sh SYNOPSIS +.Nm +.Op Fl l | Fl s +.Ar file1 file2 +.Sh DESCRIPTION +.Nm +compares +.Ar file1 +and +.Ar file2 +byte by byte. +If they differ, +.Nm +writes the first differing byte- and line-number to stdout. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl l +Print byte-number and bytes (in octal) for each difference. +.It Fl s +Print nothing and only return status. +.El +.Sh EXIT STATUS +.Bl -tag -width Ds +.It 0 +.Ar file1 +and +.Ar file2 +are identical. +.It 1 +.Ar file1 +and +.Ar file2 +are different. +.It > 1 +An error occurred. +.El +.Sh SEE ALSO +.Xr comm 1 , +.Xr diff 1 +.Sh STANDARDS +POSIX.1-2013. +.Pp +The "char" in the default result format has been replaced with "byte". diff --git a/util/sbase/cmp.c b/util/sbase/cmp.c new file mode 100644 index 00000000..83ab149e --- /dev/null +++ b/util/sbase/cmp.c @@ -0,0 +1,82 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "util.h" + +static void +usage(void) +{ + enprintf(2, "usage: %s [-l | -s] file1 file2\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + FILE *fp[2]; + size_t line = 1, n; + int ret = 0, lflag = 0, sflag = 0, same = 1, b[2]; + + ARGBEGIN { + case 'l': + lflag = 1; + break; + case 's': + sflag = 1; + break; + default: + usage(); + } ARGEND + + if (argc != 2 || (lflag && sflag)) + usage(); + + for (n = 0; n < 2; n++) { + if (!strcmp(argv[n], "-")) { + argv[n] = "<stdin>"; + fp[n] = stdin; + } else { + if (!(fp[n] = fopen(argv[n], "r"))) { + if (!sflag) + weprintf("fopen %s:", argv[n]); + return 2; + } + } + } + + for (n = 1; ; n++) { + b[0] = getc(fp[0]); + b[1] = getc(fp[1]); + + if (b[0] == b[1]) { + if (b[0] == EOF) + break; + else if (b[0] == '\n') + line++; + continue; + } else if (b[0] == EOF || b[1] == EOF) { + if (!sflag) + weprintf("EOF on %s\n", argv[(b[0] != EOF)]); + same = 0; + break; + } else if (!lflag) { + if (!sflag) + printf("%s %s differ: byte %zu, line %zu\n", + argv[0], argv[1], n, line); + same = 0; + break; + } else { + printf("%zu %o %o\n", n, b[0], b[1]); + same = 0; + } + } + + if (!ret) + ret = !same; + if (fshut(fp[0], argv[0]) | (fp[0] != fp[1] && fshut(fp[1], argv[1])) | + fshut(stdout, "<stdout>")) + ret = 2; + + return ret; +} diff --git a/util/sbase/cols.1 b/util/sbase/cols.1 new file mode 100644 index 00000000..67c2e8ea --- /dev/null +++ b/util/sbase/cols.1 @@ -0,0 +1,56 @@ +.Dd October 8, 2015 +.Dt COLS 1 +.Os sbase +.Sh NAME +.Nm cols +.Nd columnize output +.Sh SYNOPSIS +.Nm +.Op Fl c Ar num +.Op Ar file ... +.Sh DESCRIPTION +.Nm +reads each +.Ar file +in sequence and writes them to stdout, in as many vertical +columns as will fit in +.Ar num +character columns. +If no +.Ar file +is given, +.Nm +reads from stdin. +.Pp +By default +.Nm cols +tries to figure out the width of the output device. +If that fails, it defaults to 65 chars. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl c Ar num +Set maximum number of character columns to +.Ar num , +unless input lines exceed this limit. +.El +.Sh ENVIRONMENT +.Bl -tag -width Ds +.It COLUMNS +The width of the output device. +.El +.Sh HISTORY +.Nm +is similar to +.Xr mc 1 +in Plan 9. It was renamed to +.Nm +to avoid the name collision with the popular file manager +Midnight Commander. +.Sh CAVEATS +This implementation of +.Nm +assumes that each UTF-8 code point occupies one character cell, +and thus mishandles TAB characters (among others). +.Pp +.Nm +currently mangles files which contain embedded NULs. diff --git a/util/sbase/cols.c b/util/sbase/cols.c new file mode 100644 index 00000000..428cd79d --- /dev/null +++ b/util/sbase/cols.c @@ -0,0 +1,98 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/ioctl.h> + +#include <limits.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + +#include "text.h" +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [-c num] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + FILE *fp; + struct winsize w; + struct linebuf b = EMPTY_LINEBUF; + size_t chars = 65, maxlen = 0, i, j, k, len, cols, rows; + int cflag = 0, ret = 0; + char *p; + + ARGBEGIN { + case 'c': + cflag = 1; + chars = estrtonum(EARGF(usage()), 1, MIN(LLONG_MAX, SIZE_MAX)); + break; + default: + usage(); + } ARGEND + + if (!cflag) { + if ((p = getenv("COLUMNS"))) + chars = estrtonum(p, 1, MIN(LLONG_MAX, SIZE_MAX)); + else if (!ioctl(STDOUT_FILENO, TIOCGWINSZ, &w) && w.ws_col > 0) + chars = w.ws_col; + } + + if (!argc) { + getlines(stdin, &b); + } else { + for (; *argv; argc--, argv++) { + if (!strcmp(*argv, "-")) { + *argv = "<stdin>"; + fp = stdin; + } else if (!(fp = fopen(*argv, "r"))) { + weprintf("fopen %s:", *argv); + ret = 1; + continue; + } + getlines(fp, &b); + if (fp != stdin && fshut(fp, *argv)) + ret = 1; + } + } + + for (i = 0; i < b.nlines; i++) { + for (j = 0, len = 0; j < b.lines[i].len; j++) { + if (UTF8_POINT(b.lines[i].data[j])) + len++; + } + if (len && b.lines[i].data[b.lines[i].len - 1] == '\n') { + b.lines[i].data[--(b.lines[i].len)] = '\0'; + len--; + } + if (len > maxlen) + maxlen = len; + } + + for (cols = 1; (cols + 1) * maxlen + cols <= chars; cols++); + rows = b.nlines / cols + (b.nlines % cols > 0); + + for (i = 0; i < rows; i++) { + for (j = 0; j < cols && i + j * rows < b.nlines; j++) { + for (k = 0, len = 0; k < b.lines[i + j * rows].len; k++) { + if (UTF8_POINT(b.lines[i + j * rows].data[k])) + len++; + } + fwrite(b.lines[i + j * rows].data, 1, + b.lines[i + j * rows].len, stdout); + if (j < cols - 1) + for (k = len; k < maxlen + 1; k++) + putchar(' '); + } + putchar('\n'); + } + + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/comm.1 b/util/sbase/comm.1 new file mode 100644 index 00000000..5df70c2c --- /dev/null +++ b/util/sbase/comm.1 @@ -0,0 +1,40 @@ +.Dd October 8, 2015 +.Dt COMM 1 +.Os sbase +.Sh NAME +.Nm comm +.Nd select or reject lines common to two files +.Sh SYNOPSIS +.Nm +.Op Fl 123 +.Ar file1 +.Ar file2 +.Sh DESCRIPTION +.Nm +reads +.Ar file1 +and +.Ar file2 , +which should both be sorted lexically, and writes three text columns +to stdout: +.Bl -tag -width Ds +.It 1 +Lines only in +.Ar file1 . +.It 2 +Lines only in +.Ar file2 . +.It 3 +Common lines. +.El +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl 1 | Fl 2 | Fl 3 +Suppress column 1 | 2 | 3 +.El +.Sh SEE ALSO +.Xr cmp 1 , +.Xr sort 1 , +.Xr uniq 1 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/comm.c b/util/sbase/comm.c new file mode 100644 index 00000000..fbd50d9b --- /dev/null +++ b/util/sbase/comm.c @@ -0,0 +1,97 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "text.h" +#include "util.h" + +static int show = 0x07; + +static void +printline(int pos, struct line *line) +{ + int i; + + if (!(show & (0x1 << pos))) + return; + + for (i = 0; i < pos; i++) { + if (show & (0x1 << i)) + putchar('\t'); + } + fwrite(line->data, 1, line->len, stdout); +} + +static void +usage(void) +{ + eprintf("usage: %s [-123] file1 file2\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + FILE *fp[2]; + static struct line line[2]; + size_t linecap[2] = { 0, 0 }; + ssize_t len; + int ret = 0, i, diff = 0, seenline = 0; + + ARGBEGIN { + case '1': + case '2': + case '3': + show &= 0x07 ^ (1 << (ARGC() - '1')); + break; + default: + usage(); + } ARGEND + + if (argc != 2) + usage(); + + for (i = 0; i < 2; i++) { + if (!strcmp(argv[i], "-")) { + argv[i] = "<stdin>"; + fp[i] = stdin; + } else if (!(fp[i] = fopen(argv[i], "r"))) { + eprintf("fopen %s:", argv[i]); + } + } + + for (;;) { + for (i = 0; i < 2; i++) { + if (diff && i == (diff < 0)) + continue; + if ((len = getline(&(line[i].data), &linecap[i], + fp[i])) > 0) { + line[i].len = len; + seenline = 1; + continue; + } + if (ferror(fp[i])) + eprintf("getline %s:", argv[i]); + if ((diff || seenline) && line[!i].data[0]) + printline(!i, &line[!i]); + while ((len = getline(&(line[!i].data), &linecap[!i], + fp[!i])) > 0) { + line[!i].len = len; + printline(!i, &line[!i]); + } + if (ferror(fp[!i])) + eprintf("getline %s:", argv[!i]); + goto end; + } + diff = linecmp(&line[0], &line[1]); + LIMIT(diff, -1, 1); + seenline = 0; + printline((2 - diff) % 3, &line[MAX(0, diff)]); + } +end: + ret |= fshut(fp[0], argv[0]); + ret |= (fp[0] != fp[1]) && fshut(fp[1], argv[1]); + ret |= fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/compat.h b/util/sbase/compat.h new file mode 100644 index 00000000..e2154a62 --- /dev/null +++ b/util/sbase/compat.h @@ -0,0 +1,6 @@ +/* See LICENSE file for copyright and license details. */ +#include <limits.h> + +#ifndef HOST_NAME_MAX +#define HOST_NAME_MAX _POSIX_HOST_NAME_MAX +#endif diff --git a/util/sbase/config.mk b/util/sbase/config.mk new file mode 100644 index 00000000..69dda343 --- /dev/null +++ b/util/sbase/config.mk @@ -0,0 +1,15 @@ +# sbase version +VERSION = 0.1 + +# paths +PREFIX = /usr/local +MANPREFIX = $(PREFIX)/share/man + +# tools +#CC = +#AR = +RANLIB = ranlib + +# -lrt might be needed on some systems +# CFLAGS = +# LDFLAGS = diff --git a/util/sbase/cp.1 b/util/sbase/cp.1 new file mode 100644 index 00000000..74027eaa --- /dev/null +++ b/util/sbase/cp.1 @@ -0,0 +1,71 @@ +.Dd April 22, 2025 +.Dt CP 1 +.Os sbase +.Sh NAME +.Nm cp +.Nd copy files and directories +.Sh SYNOPSIS +.Nm +.Op Fl afipv +.Oo +.Fl R +.Op Fl H | L | P +.Oc +.Ar source ... +.Ar dest +.Sh DESCRIPTION +.Nm +copies +.Ar source +to +.Ar dest . +If more than one +.Ar source +is given +.Ar dest +has to be a directory. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl a +Preserve block devices, character devices, sockets and FIFOs. +Implies +.Fl p , +.Fl P +and +.Fl R . +.It Fl f +If an existing +.Ar dest +cannot be opened, remove it and try again. +.It Fl i +Interactive prompt before overwrite. +.It Fl p +Preserve mode, timestamp and permissions. +.It Fl v +Write "'source' -> 'dest'" for each +.Ar source +to stdout. +.It Fl H +Dereference +.Ar source +if it is a symbolic link. +.It Fl L +Dereference all symbolic links. +This is the default without +.Fl R . +.It Fl P +Preserve symbolic links. +This is the default with +.Fl R . +.It Fl R +Traverse directories recursively. +If this flag is not specified, directories are not copied. +.El +.Sh SEE ALSO +.Xr mv 1 +.Sh STANDARDS +POSIX.1-2013. +.Pp +The +.Op Fl av +flags are an extension to that specification. diff --git a/util/sbase/cp.c b/util/sbase/cp.c new file mode 100644 index 00000000..af0fa610 --- /dev/null +++ b/util/sbase/cp.c @@ -0,0 +1,63 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> + +#include "fs.h" +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [-afipv] [-R [-H | -L | -P]] source ... dest\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + struct stat st; + + ARGBEGIN { + case 'i': + cp_iflag = 1; + break; + case 'a': + cp_follow = 'P'; + cp_aflag = cp_pflag = cp_rflag = 1; + break; + case 'f': + cp_fflag = 1; + break; + case 'p': + cp_pflag = 1; + break; + case 'r': + case 'R': + cp_rflag = 1; + break; + case 'v': + cp_vflag = 1; + break; + case 'H': + case 'L': + case 'P': + cp_follow = ARGC(); + break; + default: + usage(); + } ARGEND + + if (argc < 2) + usage(); + + if (!cp_follow) + cp_follow = cp_rflag ? 'P' : 'L'; + + if (argc > 2) { + if (stat(argv[argc - 1], &st) < 0) + eprintf("stat %s:", argv[argc - 1]); + if (!S_ISDIR(st.st_mode)) + eprintf("%s: not a directory\n", argv[argc - 1]); + } + enmasse(argc, argv, cp); + + return fshut(stdout, "<stdout>") || cp_status; +} diff --git a/util/sbase/cron.1 b/util/sbase/cron.1 new file mode 100644 index 00000000..1cb90a44 --- /dev/null +++ b/util/sbase/cron.1 @@ -0,0 +1,23 @@ +.Dd October 8, 2015 +.Dt CRON 1 +.Os sbase +.Sh NAME +.Nm cron +.Nd clock daemon +.Sh SYNOPSIS +.Nm +.Op Fl f Ar file +.Op Fl n +.Sh DESCRIPTION +.Nm +schedules commands to be run at specified dates and times. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl f Ar file +Use the specified +.Ar file +instead of the default +.Pa /etc/crontab . +.It Fl n +Do not daemonize. +.El diff --git a/util/sbase/cron.c b/util/sbase/cron.c new file mode 100644 index 00000000..77304ccf --- /dev/null +++ b/util/sbase/cron.c @@ -0,0 +1,566 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/types.h> +#include <sys/wait.h> + +#include <errno.h> +#include <limits.h> +#include <signal.h> +#include <stdarg.h> +#include <stdlib.h> +#include <stdio.h> +#include <ctype.h> +#include <string.h> +#include <syslog.h> +#include <time.h> +#include <unistd.h> + +#include "queue.h" +#include "util.h" + +struct field { + enum { + ERROR, + WILDCARD, + NUMBER, + RANGE, + REPEAT, + LIST + } type; + long *val; + int len; +}; + +struct ctabentry { + struct field min; + struct field hour; + struct field mday; + struct field mon; + struct field wday; + char *cmd; + TAILQ_ENTRY(ctabentry) entry; +}; + +struct jobentry { + char *cmd; + pid_t pid; + TAILQ_ENTRY(jobentry) entry; +}; + +static sig_atomic_t chldreap; +static sig_atomic_t reload; +static sig_atomic_t quit; +static TAILQ_HEAD(, ctabentry) ctabhead = TAILQ_HEAD_INITIALIZER(ctabhead); +static TAILQ_HEAD(, jobentry) jobhead = TAILQ_HEAD_INITIALIZER(jobhead); +static char *config = "/etc/crontab"; +static char *pidfile = "/var/run/crond.pid"; +static int nflag; + +static void +loginfo(const char *fmt, ...) +{ + va_list ap; + va_start(ap, fmt); + if (nflag == 0) + vsyslog(LOG_INFO, fmt, ap); + else + vfprintf(stdout, fmt, ap); + fflush(stdout); + va_end(ap); +} + +static void +logwarn(const char *fmt, ...) +{ + va_list ap; + va_start(ap, fmt); + if (nflag == 0) + vsyslog(LOG_WARNING, fmt, ap); + else + vfprintf(stderr, fmt, ap); + va_end(ap); +} + +static void +logerr(const char *fmt, ...) +{ + va_list ap; + va_start(ap, fmt); + if (nflag == 0) + vsyslog(LOG_ERR, fmt, ap); + else + vfprintf(stderr, fmt, ap); + va_end(ap); +} + +static void +runjob(char *cmd) +{ + struct jobentry *je; + time_t t; + pid_t pid; + + t = time(NULL); + + /* If command is already running, skip it */ + TAILQ_FOREACH(je, &jobhead, entry) { + if (strcmp(je->cmd, cmd) == 0) { + loginfo("already running %s pid: %d at %s", + je->cmd, je->pid, ctime(&t)); + return; + } + } + + switch ((pid = fork())) { + case -1: + logerr("error: failed to fork job: %s time: %s", + cmd, ctime(&t)); + return; + case 0: + setsid(); + loginfo("run: %s pid: %d at %s", + cmd, getpid(), ctime(&t)); + execl("/bin/sh", "/bin/sh", "-c", cmd, (char *)NULL); + logerr("error: failed to execute job: %s time: %s", + cmd, ctime(&t)); + _exit(1); + default: + je = emalloc(sizeof(*je)); + je->cmd = estrdup(cmd); + je->pid = pid; + TAILQ_INSERT_TAIL(&jobhead, je, entry); + } +} + +static void +waitjob(void) +{ + struct jobentry *je, *tmp; + int status; + time_t t; + pid_t pid; + + t = time(NULL); + + while ((pid = waitpid(-1, &status, WNOHANG | WUNTRACED)) > 0) { + je = NULL; + TAILQ_FOREACH(tmp, &jobhead, entry) { + if (tmp->pid == pid) { + je = tmp; + break; + } + } + if (je) { + TAILQ_REMOVE(&jobhead, je, entry); + free(je->cmd); + free(je); + } + if (WIFEXITED(status) == 1) + loginfo("complete: pid: %d returned: %d time: %s", + pid, WEXITSTATUS(status), ctime(&t)); + else if (WIFSIGNALED(status) == 1) + loginfo("complete: pid: %d terminated by signal: %s time: %s", + pid, strsignal(WTERMSIG(status)), ctime(&t)); + else if (WIFSTOPPED(status) == 1) + loginfo("complete: pid: %d stopped by signal: %s time: %s", + pid, strsignal(WSTOPSIG(status)), ctime(&t)); + } +} + +static int +isleap(int year) +{ + if (year % 400 == 0) + return 1; + if (year % 100 == 0) + return 0; + return (year % 4 == 0); +} + +static int +daysinmon(int mon, int year) +{ + int days[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; + if (year < 1900) + year += 1900; + if (isleap(year)) + days[1] = 29; + return days[mon]; +} + +static int +matchentry(struct ctabentry *cte, struct tm *tm) +{ + struct { + struct field *f; + int tm; + int len; + } matchtbl[] = { + { .f = &cte->min, .tm = tm->tm_min, .len = 60 }, + { .f = &cte->hour, .tm = tm->tm_hour, .len = 24 }, + { .f = &cte->mday, .tm = tm->tm_mday, .len = daysinmon(tm->tm_mon, tm->tm_year) }, + { .f = &cte->mon, .tm = tm->tm_mon, .len = 12 }, + { .f = &cte->wday, .tm = tm->tm_wday, .len = 7 }, + }; + size_t i; + int j; + + for (i = 0; i < LEN(matchtbl); i++) { + switch (matchtbl[i].f->type) { + case WILDCARD: + continue; + case NUMBER: + if (matchtbl[i].f->val[0] == matchtbl[i].tm) + continue; + break; + case RANGE: + if (matchtbl[i].f->val[0] <= matchtbl[i].tm) + if (matchtbl[i].f->val[1] >= matchtbl[i].tm) + continue; + break; + case REPEAT: + if (matchtbl[i].tm > 0) { + if (matchtbl[i].tm % matchtbl[i].f->val[0] == 0) + continue; + } else { + if (matchtbl[i].len % matchtbl[i].f->val[0] == 0) + continue; + } + break; + case LIST: + for (j = 0; j < matchtbl[i].f->len; j++) + if (matchtbl[i].f->val[j] == matchtbl[i].tm) + break; + if (j < matchtbl[i].f->len) + continue; + break; + default: + break; + } + break; + } + if (i != LEN(matchtbl)) + return 0; + return 1; +} + +static int +parsefield(const char *field, long low, long high, struct field *f) +{ + int i; + char *e1, *e2; + const char *p; + + p = field; + while (isdigit(*p)) + p++; + + f->type = ERROR; + + switch (*p) { + case '*': + if (strcmp(field, "*") == 0) { + f->val = NULL; + f->len = 0; + f->type = WILDCARD; + } else if (strncmp(field, "*/", 2) == 0) { + f->val = emalloc(sizeof(*f->val)); + f->len = 1; + + errno = 0; + f->val[0] = strtol(field + 2, &e1, 10); + if (e1[0] != '\0' || errno != 0 || f->val[0] == 0) + break; + + f->type = REPEAT; + } + break; + case '\0': + f->val = emalloc(sizeof(*f->val)); + f->len = 1; + + errno = 0; + f->val[0] = strtol(field, &e1, 10); + if (e1[0] != '\0' || errno != 0) + break; + + f->type = NUMBER; + break; + case '-': + f->val = emalloc(2 * sizeof(*f->val)); + f->len = 2; + + errno = 0; + f->val[0] = strtol(field, &e1, 10); + if (e1[0] != '-' || errno != 0) + break; + + errno = 0; + f->val[1] = strtol(e1 + 1, &e2, 10); + if (e2[0] != '\0' || errno != 0) + break; + + f->type = RANGE; + break; + case ',': + for (i = 1; isdigit(*p) || *p == ','; p++) + if (*p == ',') + i++; + f->val = emalloc(i * sizeof(*f->val)); + f->len = i; + + errno = 0; + f->val[0] = strtol(field, &e1, 10); + if (f->val[0] < low || f->val[0] > high) + break; + + for (i = 1; *e1 == ',' && errno == 0; i++) { + errno = 0; + f->val[i] = strtol(e1 + 1, &e2, 10); + e1 = e2; + } + if (e1[0] != '\0' || errno != 0) + break; + + f->type = LIST; + break; + default: + return -1; + } + + for (i = 0; i < f->len; i++) + if (f->val[i] < low || f->val[i] > high) + f->type = ERROR; + + if (f->type == ERROR) { + free(f->val); + return -1; + } + + return 0; +} + +static void +freecte(struct ctabentry *cte, int nfields) +{ + switch (nfields) { + case 6: + free(cte->cmd); + case 5: + free(cte->wday.val); + case 4: + free(cte->mon.val); + case 3: + free(cte->mday.val); + case 2: + free(cte->hour.val); + case 1: + free(cte->min.val); + } + free(cte); +} + +static void +unloadentries(void) +{ + struct ctabentry *cte, *tmp; + + for (cte = TAILQ_FIRST(&ctabhead); cte; cte = tmp) { + tmp = TAILQ_NEXT(cte, entry); + TAILQ_REMOVE(&ctabhead, cte, entry); + freecte(cte, 6); + } +} + +static int +loadentries(void) +{ + struct ctabentry *cte; + FILE *fp; + char *line = NULL, *p, *col; + int r = 0, y; + size_t size = 0; + ssize_t len; + struct fieldlimits { + char *name; + long min; + long max; + struct field *f; + } flim[] = { + { "min", 0, 59, NULL }, + { "hour", 0, 23, NULL }, + { "mday", 1, 31, NULL }, + { "mon", 1, 12, NULL }, + { "wday", 0, 6, NULL } + }; + size_t x; + + if ((fp = fopen(config, "r")) == NULL) { + logerr("error: can't open %s: %s\n", config, strerror(errno)); + return -1; + } + + for (y = 0; (len = getline(&line, &size, fp)) != -1; y++) { + p = line; + if (line[0] == '#' || line[0] == '\n' || line[0] == '\0') + continue; + + cte = emalloc(sizeof(*cte)); + flim[0].f = &cte->min; + flim[1].f = &cte->hour; + flim[2].f = &cte->mday; + flim[3].f = &cte->mon; + flim[4].f = &cte->wday; + + for (x = 0; x < LEN(flim); x++) { + do + col = strsep(&p, "\t\n "); + while (col && col[0] == '\0'); + + if (!col || parsefield(col, flim[x].min, flim[x].max, flim[x].f) < 0) { + logerr("error: failed to parse `%s' field on line %d\n", + flim[x].name, y + 1); + freecte(cte, x); + r = -1; + break; + } + } + + if (r == -1) + break; + + col = strsep(&p, "\n"); + if (col) + while (col[0] == '\t' || col[0] == ' ') + col++; + if (!col || col[0] == '\0') { + logerr("error: missing `cmd' field on line %d\n", + y + 1); + freecte(cte, 5); + r = -1; + break; + } + cte->cmd = estrdup(col); + + TAILQ_INSERT_TAIL(&ctabhead, cte, entry); + } + + if (r < 0) + unloadentries(); + + free(line); + fclose(fp); + + return r; +} + +static void +reloadentries(void) +{ + unloadentries(); + if (loadentries() < 0) + logwarn("warning: discarding old crontab entries\n"); +} + +static void +sighandler(int sig) +{ + switch (sig) { + case SIGCHLD: + chldreap = 1; + break; + case SIGHUP: + reload = 1; + break; + case SIGTERM: + quit = 1; + break; + } +} + +static void +usage(void) +{ + eprintf("usage: %s [-f file] [-n]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + FILE *fp; + struct ctabentry *cte; + time_t t; + struct tm *tm; + struct sigaction sa; + + ARGBEGIN { + case 'n': + nflag = 1; + break; + case 'f': + config = EARGF(usage()); + break; + default: + usage(); + } ARGEND + + if (argc > 0) + usage(); + + if (nflag == 0) { + openlog(argv[0], LOG_CONS | LOG_PID, LOG_CRON); + if (daemon(1, 0) < 0) { + logerr("error: failed to daemonize %s\n", strerror(errno)); + return 1; + } + if ((fp = fopen(pidfile, "w"))) { + fprintf(fp, "%d\n", getpid()); + fclose(fp); + } + } + + sa.sa_handler = sighandler; + sigfillset(&sa.sa_mask); + sa.sa_flags = SA_RESTART; + sigaction(SIGCHLD, &sa, NULL); + sigaction(SIGHUP, &sa, NULL); + sigaction(SIGTERM, &sa, NULL); + + loadentries(); + + while (1) { + t = time(NULL); + sleep(60 - t % 60); + + if (quit == 1) { + if (nflag == 0) + unlink(pidfile); + unloadentries(); + /* Don't wait or kill forked processes, just exit */ + break; + } + + if (reload == 1 || chldreap == 1) { + if (reload == 1) { + reloadentries(); + reload = 0; + } + if (chldreap == 1) { + waitjob(); + chldreap = 0; + } + continue; + } + + TAILQ_FOREACH(cte, &ctabhead, entry) { + t = time(NULL); + tm = localtime(&t); + if (matchentry(cte, tm) == 1) + runjob(cte->cmd); + } + } + + if (nflag == 0) + closelog(); + + return 0; +} diff --git a/util/sbase/crypt.h b/util/sbase/crypt.h new file mode 100644 index 00000000..2fd2932e --- /dev/null +++ b/util/sbase/crypt.h @@ -0,0 +1,12 @@ +/* See LICENSE file for copyright and license details. */ +struct crypt_ops { + void (*init)(void *); + void (*update)(void *, const void *, unsigned long); + void (*sum)(void *, uint8_t *); + void *s; +}; + +int cryptcheck(int, char **, struct crypt_ops *, uint8_t *, size_t); +int cryptmain(int, char **, struct crypt_ops *, uint8_t *, size_t); +int cryptsum(struct crypt_ops *, int, const char *, uint8_t *); +void mdprint(const uint8_t *, const char *, size_t); diff --git a/util/sbase/cut.1 b/util/sbase/cut.1 new file mode 100644 index 00000000..7a5174e6 --- /dev/null +++ b/util/sbase/cut.1 @@ -0,0 +1,69 @@ +.Dd October 8, 2015 +.Dt CUT 1 +.Os sbase +.Sh NAME +.Nm cut +.Nd extract columns of data +.Sh SYNOPSIS +.Nm +.Fl b Ar list +.Op Fl n +.Op Ar file ... +.Nm +.Fl c Ar list +.Op Ar file ... +.Nm +.Fl f Ar list +.Op Fl d Ar delim +.Op Fl s +.Op Ar file ... +.Sh DESCRIPTION +.Nm +out bytes, characters or delimited fields from each line of +.Ar file +and write to stdout. +.Pp +If no +.Ar file +is given or +.Ar file +is '-', +.Nm +reads from stdin. +.Pp +.Ar list +is a comma or space separated list of numbers and ranges starting +from 1. +Ranges have the form 'N-M'. If N or M is missing, beginning or end +of line is assumed. +Numbers and ranges may be repeated, overlapping and in any order. +.Pp +Selected input is written in the same order it is read +and is written exactly once. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl b Ar list | Fl c Ar list +.Ar list +specifies byte | character positions. +.It Fl d Ar delim +Use +.Ar delim +as field delimiter, which can be an arbitrary string. +Default is '\et'. +.It Fl f Ar list +.Ar list +specifies field numbers. +Lines not containing field delimiters are passed through, unless +.Fl s +is specified. +.It Fl n +Do not split multibyte characters. +A character is written when its last byte is selected. +.It Fl s +Suppress lines not containing field delimiters. +.El +.Sh STANDARDS +POSIX.1-2013. +.Pp +The possibility of separating numbers and ranges with a space and specifying +multibyte delimiters of arbitrary length is an extension to that specification. diff --git a/util/sbase/cut.c b/util/sbase/cut.c new file mode 100644 index 00000000..a50bdcb5 --- /dev/null +++ b/util/sbase/cut.c @@ -0,0 +1,215 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "text.h" +#include "utf.h" +#include "util.h" + +typedef struct Range { + size_t min, max; + struct Range *next; +} Range; + +static Range *list = NULL; +static char mode = 0; +static char *delim = "\t"; +static size_t delimlen = 1; +static int nflag = 0; +static int sflag = 0; + +static void +insert(Range *r) +{ + Range *l, *p, *t; + + for (p = NULL, l = list; l; p = l, l = l->next) { + if (r->max && r->max + 1 < l->min) { + r->next = l; + break; + } else if (!l->max || r->min < l->max + 2) { + l->min = MIN(r->min, l->min); + for (p = l, t = l->next; t; p = t, t = t->next) + if (r->max && r->max + 1 < t->min) + break; + l->max = (p->max && r->max) ? MAX(p->max, r->max) : 0; + l->next = t; + return; + } + } + if (p) + p->next = r; + else + list = r; +} + +static void +parselist(char *str) +{ + char *s; + size_t n = 1; + Range *r; + + if (!*str) + eprintf("empty list\n"); + for (s = str; *s; s++) { + if (*s == ' ') + *s = ','; + if (*s == ',') + n++; + } + r = ereallocarray(NULL, n, sizeof(*r)); + for (s = str; n; n--, s++) { + r->min = (*s == '-') ? 1 : strtoul(s, &s, 10); + r->max = (*s == '-') ? strtoul(s + 1, &s, 10) : r->min; + r->next = NULL; + if (!r->min || (r->max && r->max < r->min) || (*s && *s != ',')) + eprintf("bad list value\n"); + insert(r++); + } +} + +static size_t +seek(struct line *s, size_t pos, size_t *prev, size_t count) +{ + size_t n = pos - *prev, i, j; + + if (mode == 'b') { + if (n >= s->len) + return s->len; + if (nflag) + while (n && !UTF8_POINT(s->data[n])) + n--; + *prev += n; + return n; + } else if (mode == 'c') { + for (n++, i = 0; i < s->len; i++) + if (UTF8_POINT(s->data[i]) && !--n) + break; + } else { + for (i = (count < delimlen + 1) ? 0 : delimlen; n && i < s->len; ) { + if ((s->len - i) >= delimlen && + !memcmp(s->data + i, delim, delimlen)) { + if (!--n && count) + break; + i += delimlen; + continue; + } + for (j = 1; j + i <= s->len && !fullrune(s->data + i, j); j++); + i += j; + } + } + *prev = pos; + + return i; +} + +static void +cut(FILE *fp, const char *fname) +{ + Range *r; + struct line s; + static struct line line; + static size_t size; + size_t i, n, p; + ssize_t len; + + while ((len = getline(&line.data, &size, fp)) > 0) { + line.len = len; + if (line.data[line.len - 1] == '\n') + line.data[--line.len] = '\0'; + if (mode == 'f' && !memmem(line.data, line.len, delim, delimlen)) { + if (!sflag) { + fwrite(line.data, 1, line.len, stdout); + fputc('\n', stdout); + } + continue; + } + for (i = 0, p = 1, s = line, r = list; r; r = r->next) { + n = seek(&s, r->min, &p, i); + s.data += n; + s.len -= n; + i += (mode == 'f') ? delimlen : 1; + if (!s.len) + break; + if (!r->max) { + fwrite(s.data, 1, s.len, stdout); + break; + } + n = seek(&s, r->max + 1, &p, i); + i += (mode == 'f') ? delimlen : 1; + if (fwrite(s.data, 1, n, stdout) != n) + eprintf("fwrite <stdout>:"); + s.data += n; + s.len -= n; + } + putchar('\n'); + } + if (ferror(fp)) + eprintf("getline %s:", fname); +} + +static void +usage(void) +{ + eprintf("usage: %s -b list [-n] [file ...]\n" + " %s -c list [file ...]\n" + " %s -f list [-d delim] [-s] [file ...]\n", + argv0, argv0, argv0); +} + +int +main(int argc, char *argv[]) +{ + FILE *fp; + int ret = 0; + + ARGBEGIN { + case 'b': + case 'c': + case 'f': + mode = ARGC(); + parselist(EARGF(usage())); + break; + case 'd': + delim = EARGF(usage()); + if (!*delim) + eprintf("empty delimiter\n"); + delimlen = unescape(delim); + break; + case 'n': + nflag = 1; + break; + case 's': + sflag = 1; + break; + default: + usage(); + } ARGEND + + if (!mode) + usage(); + + if (!argc) + cut(stdin, "<stdin>"); + else { + for (; *argv; argc--, argv++) { + if (!strcmp(*argv, "-")) { + *argv = "<stdin>"; + fp = stdin; + } else if (!(fp = fopen(*argv, "r"))) { + weprintf("fopen %s:", *argv); + ret = 1; + continue; + } + cut(fp, *argv); + if (fp != stdin && fshut(fp, *argv)) + ret = 1; + } + } + + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/date.1 b/util/sbase/date.1 new file mode 100644 index 00000000..fb9fb31b --- /dev/null +++ b/util/sbase/date.1 @@ -0,0 +1,81 @@ +.Dd October 8, 2015 +.Dt DATE 1 +.Os sbase +.Sh NAME +.Nm date +.Nd print or set date and time +.Sh SYNOPSIS +.Nm +.Op Fl d Ar time +.Op Fl u +.Oo +.Cm + Ns Ar format | +.Sm off +.Ar mmddHHMM Oo Oo Ar CC Oc Ar yy Oc +.Sm on +.Oc +.Sh DESCRIPTION +.Nm +prints the date and time according to +.Xr locale 7 +or +.Ar format +using +.Xr strftime 3 +or sets the date. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl d Ar time +Print +.Ar time +given as the number of seconds since the +Unix epoch 1970-01-01T00:00:00Z. +.It Fl u +Print or set UTC time instead of local time. +.El +.Pp +An operand with a leading plus +.Pq Cm + +sign signals a user-defined format string using +.Xr strftime 3 +conversion specifications. +.Pp +An operand without a leading plus sign is interpreted as a value +for setting the system's current date and time. +The canonical representation for setting the date and time is: +.Pp +.Bl -tag -width Ds -compact -offset indent +.It Ar mm +The month of the year, from 01 to 12. +.It Ar dd +The day of the month, from 01 to 31. +.It Ar HH +The hour of the day, from 00 to 23. +.It Ar MM +The minute of the hour, from 00 to 59. +.It Ar CC +The first two digits of the year (the century). +.It Ar yy +The second two digits of the year. +If +.Ar yy +is specified, but +.Ar CC +is not, a value for +.Ar yy +between 69 and 99 results in a +.Ar CC +value of 19. +Otherwise, a +.Ar CC +value of 20 is used. +.El +.Pp +The century and year are optional. +The default is the current year. +.Sh STANDARDS +POSIX.1-2013. +.Pp +The +.Op Fl d +flag is an extension to that specification. diff --git a/util/sbase/date.c b/util/sbase/date.c new file mode 100644 index 00000000..109f3710 --- /dev/null +++ b/util/sbase/date.c @@ -0,0 +1,103 @@ +/* See LICENSE file for copyright and license details. */ +#include <ctype.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <time.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [-u] [-d time] [+format | mmddHHMM[[CC]yy]]\n", argv0); +} + +static int +datefield(const char *s, size_t i) +{ + if (!isdigit(s[i]) || !isdigit(s[i+1])) + eprintf("invalid date format: %s\n", s); + + return (s[i] - '0') * 10 + (s[i+1] - '0'); +} + +static void +setdate(const char *s, struct tm *now) +{ + struct tm date; + struct timespec ts; + + switch (strlen(s)) { + case 8: + date.tm_year = now->tm_year; + break; + case 10: + date.tm_year = datefield(s, 8); + if (date.tm_year < 69) + date.tm_year += 100; + break; + case 12: + date.tm_year = ((datefield(s, 8) - 19) * 100) + datefield(s, 10); + break; + default: + eprintf("invalid date format: %s\n", s); + break; + } + + date.tm_mon = datefield(s, 0) - 1; + date.tm_mday = datefield(s, 2); + date.tm_hour = datefield(s, 4); + date.tm_min = datefield(s, 6); + date.tm_sec = 0; + date.tm_isdst = -1; + + ts.tv_sec = mktime(&date); + if (ts.tv_sec == -1) + eprintf("mktime:"); + ts.tv_nsec = 0; + + if (clock_settime(CLOCK_REALTIME, &ts) == -1) + eprintf("clock_settime:"); +} + +int +main(int argc, char *argv[]) +{ + struct tm *now; + time_t t; + char buf[BUFSIZ], *fmt = "%a %b %e %H:%M:%S %Z %Y"; + + t = time(NULL); + if (t == -1) + eprintf("time:"); + + ARGBEGIN { + case 'd': + t = estrtonum(EARGF(usage()), 0, LLONG_MAX); + break; + case 'u': + if (setenv("TZ", "UTC0", 1) < 0) + eprintf("setenv:"); + break; + default: + usage(); + } ARGEND + + if (!(now = localtime(&t))) + eprintf("localtime:"); + if (argc) { + if (argc != 1) + usage(); + if (argv[0][0] != '+') { + setdate(argv[0], now); + return 0; + } + fmt = &argv[0][1]; + } + + strftime(buf, sizeof(buf), fmt, now); + puts(buf); + + return fshut(stdout, "<stdout>"); +} diff --git a/util/sbase/dd.1 b/util/sbase/dd.1 new file mode 100644 index 00000000..39c5c228 --- /dev/null +++ b/util/sbase/dd.1 @@ -0,0 +1,91 @@ +.Dd April 28, 2020 +.Dt DD 1 +.Os sbase +.Sh NAME +.Nm dd +.Nd convert and copy a file +.Sh SYNOPSIS +.Nm +.Op Ar operand Ns ... +.Sh DESCRIPTION +.Nm +copies its input to its output, possibly after conversion, using +the specified block sizes, +.Pp +The following operands are available: +.Bl -tag -width ibs=expr +.It Cm if= Ns Ar file +Read from the file named by +.Ar file +instead of standard input. +.It Cm of= Ns Ar file +Write to the file named by +.Ar file +instead of standard output. +.It Cm ibs= Ns Ar expr +Set the input block size to +.Ar expr +(defaults to 512). +.It Cm obs= Ns Ar expr +Set the output block size to +.Ar expr +(defaults to 512). +.It Cm bs= Ns Ar expr +Set the input and output block sizes to +.Ar expr . +Additionally, if no conversion other than +.Cm noerror , +.Cm notrunc , +or +.Cm sync +is specified, input blocks are copied as single output blocks, even +when the input block is short. +.It Cm skip= Ns Ar n +Skip +.Ar n +input blocks before starting to copy. +.It Cm seek= Ns Ar n +Skip +.Ar n +output blocks before starting to copy. +.It Cm count= Ns Ar n +Copy at most +.Ar n +input blocks. +.It Cm conv= Ns Ar value Ns Op , Ns Ar value Ns ... +Apply the conversions specified by +.Ar value . +.Bl -tag -width Ds +.It Cm lcase +Map uppercase characters to the corresponding lowercase character +using +.Fn tolower . +.It Cm ucase +Map lowercase characters to the corresponding uppercase character +using +.Fn toupper . +.It Cm swab +Swap each pair of bytes in the input block. +If there is an odd number of bytes in a block, the last one is +unmodified. +.It Cm noerror +In case of an error reading from the input, do not fail. +Instead, print a diagnostic message and a summary of the current +status. +.It Cm notrunc +Do not truncate the output file. +.It Cm sync +In case of a partial input block, pad with null bytes to form a +complete block. +.El +.El +.Sh STANDARDS +The +.Nm +utility is compliant with the +.St -p1003.1-2008 +specification, except that it does not implement the +.Cm block +and +.Cm unblock +conversions. diff --git a/util/sbase/dd.c b/util/sbase/dd.c new file mode 100644 index 00000000..36eb4094 --- /dev/null +++ b/util/sbase/dd.c @@ -0,0 +1,237 @@ +/* See LICENSE file for copyright and license details. */ +#include <ctype.h> +#include <fcntl.h> +#include <inttypes.h> +#include <stdint.h> +#include <string.h> +#include <unistd.h> + +#include "util.h" + +static off_t ifull, ofull, ipart, opart; + +static void +usage(void) +{ + eprintf("usage: %s [operand...]\n", argv0); +} + +static size_t +parsesize(char *expr) +{ + char *s = expr; + size_t n = 1; + + for (;;) { + n *= strtoumax(s, &s, 10); + switch (*s) { + case 'k': n <<= 10; s++; break; + case 'b': n <<= 9; s++; break; + } + if (*s != 'x' || !s[1]) + break; + s++; + } + if (*s || n == 0) + eprintf("invalid block size expression '%s'\n", expr); + + return n; +} + +static void +bswap(unsigned char *buf, size_t len) +{ + int c; + + for (len &= ~1; len > 0; buf += 2, len -= 2) { + c = buf[0]; + buf[0] = buf[1]; + buf[1] = c; + } +} + +static void +lcase(unsigned char *buf, size_t len) +{ + for (; len > 0; buf++, len--) + buf[0] = tolower(buf[0]); +} + +static void +ucase(unsigned char *buf, size_t len) +{ + for (; len > 0; buf++, len--) + buf[0] = toupper(buf[0]); +} + +static void +summary(void) +{ + fprintf(stderr, "%"PRIdMAX"+%"PRIdMAX" records in\n", (intmax_t)ifull, (intmax_t)ipart); + fprintf(stderr, "%"PRIdMAX"+%"PRIdMAX" records out\n", (intmax_t)ofull, (intmax_t)opart); +} + +int +main(int argc, char *argv[]) +{ + enum { + LCASE = 1 << 0, + UCASE = 1 << 1, + SWAB = 1 << 2, + NOERROR = 1 << 3, + NOTRUNC = 1 << 4, + SYNC = 1 << 5, + } conv = 0; + char *arg, *val, *end; + const char *iname = "-", *oname = "-"; + int ifd = 0, ofd = 1, eof = 0; + size_t len, bs = 0, ibs = 512, obs = 512, ipos = 0, opos = 0; + off_t skip = 0, seek = 0, count = -1; + ssize_t ret; + unsigned char *buf; + + argv0 = argc ? (argc--, *argv++) : "dd"; + for (; argc > 0; argc--, argv++) { + arg = *argv; + val = strchr(arg, '='); + if (!val) + usage(); + *val++ = '\0'; + if (strcmp(arg, "if") == 0) { + iname = val; + } else if (strcmp(arg, "of") == 0) { + oname = val; + } else if (strcmp(arg, "ibs") == 0) { + ibs = parsesize(val); + } else if (strcmp(arg, "obs") == 0) { + obs = parsesize(val); + } else if (strcmp(arg, "bs") == 0) { + bs = parsesize(val); + } else if (strcmp(arg, "skip") == 0) { + skip = estrtonum(val, 0, LLONG_MAX); + } else if (strcmp(arg, "seek") == 0) { + seek = estrtonum(val, 0, LLONG_MAX); + } else if (strcmp(arg, "count") == 0) { + count = estrtonum(val, 0, LLONG_MAX); + } else if (strcmp(arg, "conv") == 0) { + do { + end = strchr(val, ','); + if (end) + *end++ = '\0'; + if (strcmp(val, "lcase") == 0) + conv |= LCASE; + else if (strcmp(val, "ucase") == 0) + conv |= UCASE; + else if (strcmp(val, "swab") == 0) + conv |= SWAB; + else if (strcmp(val, "noerror") == 0) + conv |= NOERROR; + else if (strcmp(val, "notrunc") == 0) + conv |= NOTRUNC; + else if (strcmp(val, "sync") == 0) + conv |= SYNC; + else + eprintf("unknown conv flag '%s'\n", val); + val = end; + } while (val); + } else { + weprintf("unknown operand '%s'\n", arg); + usage(); + } + } + + if (bs) + ibs = obs = bs; + if (strcmp(iname, "-") != 0) { + ifd = open(iname, O_RDONLY); + if (ifd < 0) + eprintf("open %s:", iname); + } + if (strcmp(oname, "-") != 0) { + ofd = open(oname, O_WRONLY | O_CREAT | (conv & NOTRUNC || seek ? 0 : O_TRUNC), 0666); + if (ofd < 0) + eprintf("open %s:", oname); + } + + len = MAX(ibs, obs) + ibs; + buf = emalloc(len); + if (skip && lseek(ifd, skip * ibs, SEEK_SET) < 0) { + while (skip--) { + ret = read(ifd, buf, ibs); + if (ret < 0) + eprintf("read:"); + if (ret == 0) { + eof = 1; + break; + } + } + } + if (seek) { + if (!(conv & NOTRUNC) && ftruncate(ofd, seek * ibs) != 0) + eprintf("ftruncate:"); + if (lseek(ofd, seek * ibs, SEEK_SET) < 0) + eprintf("lseek:"); + /* XXX: handle non-seekable files */ + } + while (!eof) { + while (ipos - opos < obs) { + if (ifull + ipart == count) { + eof = 1; + break; + } + ret = read(ifd, buf + ipos, ibs); + if (ret == 0) { + eof = 1; + break; + } + if (ret < 0) { + weprintf("read:"); + if (!(conv & NOERROR)) + return 1; + summary(); + if (!(conv & SYNC)) + continue; + ret = 0; + } + if (ret < ibs) { + ipart++; + if (conv & SYNC) { + memset(buf + ipos + ret, 0, ibs - ret); + ret = ibs; + } + } else { + ifull++; + } + if (conv & SWAB) + bswap(buf + ipos, ret); + if (conv & LCASE) + lcase(buf + ipos, ret); + if (conv & UCASE) + ucase(buf + ipos, ret); + ipos += ret; + if (bs && !(conv & (SWAB | LCASE | UCASE))) + break; + } + if (ipos == opos) + break; + do { + ret = write(ofd, buf + opos, MIN(obs, ipos - opos)); + if (ret < 0) + eprintf("write:"); + if (ret == 0) + eprintf("write returned 0\n"); + if (ret < obs) + opart++; + else + ofull++; + opos += ret; + } while (ipos - opos >= (eof ? 1 : obs)); + if (opos < ipos) + memmove(buf, buf + opos, ipos - opos); + ipos -= opos; + opos = 0; + } + summary(); + + return 0; +} diff --git a/util/sbase/dirname.1 b/util/sbase/dirname.1 new file mode 100644 index 00000000..742c9912 --- /dev/null +++ b/util/sbase/dirname.1 @@ -0,0 +1,19 @@ +.Dd October 8, 2015 +.Dt DIRNAME 1 +.Os sbase +.Sh NAME +.Nm dirname +.Nd strip final path component +.Sh SYNOPSIS +.Nm +.Ar path +.Sh DESCRIPTION +.Nm +writes +.Ar path +with its final path component removed to stdout. +.Sh SEE ALSO +.Xr basename 1 , +.Xr dirname 3 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/dirname.c b/util/sbase/dirname.c new file mode 100644 index 00000000..45e1a7e2 --- /dev/null +++ b/util/sbase/dirname.c @@ -0,0 +1,27 @@ +/* See LICENSE file for copyright and license details. */ +#include <libgen.h> +#include <stdio.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s path\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + ARGBEGIN { + default: + usage(); + } ARGEND + + if (argc != 1) + usage(); + + puts(dirname(argv[0])); + + return fshut(stdout, "<stdout>"); +} diff --git a/util/sbase/du.1 b/util/sbase/du.1 new file mode 100644 index 00000000..ef49052e --- /dev/null +++ b/util/sbase/du.1 @@ -0,0 +1,57 @@ +.Dd October 8, 2015 +.Dt DU 1 +.Os sbase +.Sh NAME +.Nm du +.Nd display disk usage statistics +.Sh SYNOPSIS +.Nm +.Op Fl a | s +.Op Fl d Ar depth +.Op Fl h +.Op Fl k +.Op Fl H | L | P +.Op Fl x +.Op Ar file ... +.Sh DESCRIPTION +.Nm +displays the file system block usage for each +.Ar file +argument and for each directory in the file hierarchy rooted in directory +argument. +If no +.Ar file +is specified, the block usage of the hierarchy rooted in the current directory +is displayed. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl a +Display an entry for each file in the file hierarchy. +.It Fl s +Display only the grand total for the specified files. +.It Fl d Ar depth +Maximum directory depth to print files and directories. +.It Fl h +Enable human-readable output. +.It Fl k +By default all sizes are reported in 512-byte block counts. +The +.Fl k +option causes the numbers to be reported in kilobyte counts. +.It Fl H +Only dereference symbolic links that are passed as command line arguments when +recursively traversing directories. +.It Fl L +Always dereference symbolic links while recursively traversing directories. +.It Fl P +Don't dereference symbolic links. +This is the default. +.It Fl x +Do not traverse file systems mount points. +.El +.Sh STANDARDS +POSIX.1-2013. +.Pp +The +.Op Fl dhP +flags are an extension to that specification. diff --git a/util/sbase/du.c b/util/sbase/du.c new file mode 100644 index 00000000..782b09a2 --- /dev/null +++ b/util/sbase/du.c @@ -0,0 +1,167 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> +#include <sys/types.h> + +#include <errno.h> +#include <fcntl.h> +#include <limits.h> +#include <search.h> +#include <stdint.h> +#include <stdlib.h> +#include <stdio.h> +#include <unistd.h> + +#include "fs.h" +#include "util.h" + +static size_t maxdepth = SIZE_MAX; +static size_t blksize = 512; + +static int aflag = 0; +static int sflag = 0; +static int hflag = 0; + +struct file { + dev_t devno; + ino_t inode; +}; + +static void +printpath(off_t n, const char *path) +{ + if (hflag) + printf("%s\t%s\n", humansize(n * blksize), path); + else + printf("%jd\t%s\n", (intmax_t)n, path); +} + +static off_t +nblks(blkcnt_t blocks) +{ + return (512 * blocks + blksize - 1) / blksize; +} + +static int +cmp(const void *p1, const void *p2) +{ + const struct file *f1 = p1, *f2 = p2; + + if (f1->devno > f2->devno) + return -1; + if (f1->devno < f2->devno) + return 1; + + /* f1->devno == f2->devno */ + if (f1->inode < f2->inode) + return -1; + if (f1->inode > f2->inode) + return 1; + + return 0; +} + +static int +duplicated(dev_t dev, ino_t ino) +{ + static void *tree; + struct file **fpp, *fp, file = {dev, ino}; + + if ((fpp = tsearch(&file, &tree, cmp)) == NULL) + eprintf("%s:", argv0); + + if (*fpp != &file) + return 1; + + /* new file added */ + fp = emalloc(sizeof(*fp)); + *fp = file; + *fpp = fp; + + return 0; +} + +static void +du(int dirfd, const char *path, struct stat *st, void *data, struct recursor *r) +{ + off_t *total = data, subtotal; + + subtotal = nblks(st->st_blocks); + if (S_ISDIR(st->st_mode)) { + recurse(dirfd, path, &subtotal, r); + } else if (r->follow != 'P' || st->st_nlink > 1) { + if (duplicated(st->st_dev, st->st_ino)) + goto print; + } + + *total += subtotal; + +print: + if (!r->depth) + printpath(*total, r->path); + else if (!sflag && r->depth <= maxdepth && (S_ISDIR(st->st_mode) || aflag)) + printpath(subtotal, r->path); +} + +static void +usage(void) +{ + eprintf("usage: %s [-a | -s] [-d depth] [-h] [-k] [-H | -L | -P] [-x] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + struct recursor r = { .fn = du, .follow = 'P' }; + off_t n = 0; + int kflag = 0, dflag = 0; + char *bsize; + + ARGBEGIN { + case 'a': + aflag = 1; + break; + case 'd': + dflag = 1; + maxdepth = estrtonum(EARGF(usage()), 0, MIN(LLONG_MAX, SIZE_MAX)); + break; + case 'h': + hflag = 1; + break; + case 'k': + kflag = 1; + break; + case 's': + sflag = 1; + break; + case 'x': + r.flags |= SAMEDEV; + break; + case 'H': + case 'L': + case 'P': + r.follow = ARGC(); + break; + default: + usage(); + } ARGEND + + if ((aflag && sflag) || (dflag && sflag)) + usage(); + + bsize = getenv("BLOCKSIZE"); + if (bsize) + blksize = estrtonum(bsize, 1, MIN(LLONG_MAX, SIZE_MAX)); + if (kflag) + blksize = 1024; + + if (!argc) { + recurse(AT_FDCWD, ".", &n, &r); + } else { + for (; *argv; argc--, argv++) { + n = 0; + recurse(AT_FDCWD, *argv, &n, &r); + } + } + + return fshut(stdout, "<stdout>") || recurse_status; +} diff --git a/util/sbase/echo.1 b/util/sbase/echo.1 new file mode 100644 index 00000000..04ba8b9b --- /dev/null +++ b/util/sbase/echo.1 @@ -0,0 +1,27 @@ +.Dd October 8, 2015 +.Dt ECHO 1 +.Os sbase +.Sh NAME +.Nm echo +.Nd print arguments +.Sh SYNOPSIS +.Nm +.Op Fl n +.Op Ar string ... +.Sh DESCRIPTION +.Nm +writes each +.Ar string +to stdout, separated by spaces and terminated by +a newline. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl n +Do not print the terminating newline. +.El +.Sh STANDARDS +POSIX.1-2013. +.Pp +The +.Op Fl n +flag is an extension to that specification. diff --git a/util/sbase/echo.c b/util/sbase/echo.c new file mode 100644 index 00000000..a5526311 --- /dev/null +++ b/util/sbase/echo.c @@ -0,0 +1,24 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> +#include <string.h> +#include "util.h" + +int +main(int argc, char *argv[]) +{ + int nflag = 0; + + argv0 = *argv, argv0 ? (argc--, argv++) : (void *)0; + + if (*argv && !strcmp(*argv, "-n")) { + nflag = 1; + argc--, argv++; + } + + for (; *argv; argc--, argv++) + putword(stdout, *argv); + if (!nflag) + putchar('\n'); + + return fshut(stdout, "<stdout>"); +} diff --git a/util/sbase/ed.1 b/util/sbase/ed.1 new file mode 100644 index 00000000..14e88346 --- /dev/null +++ b/util/sbase/ed.1 @@ -0,0 +1,238 @@ +.Dd December 27, 2016 +.Dt ED 1 +.Os sbase +.Sh NAME +.Nm ed +.Nd text editor +.Sh SYNOPSIS +.Nm +.Op Fl s +.Op Fl p Ar string +.Op Ar file +.Sh DESCRIPTION +.Nm +is the standard text editor. +It performs line-oriented operations on a buffer; The buffer's contents are +manipulated in command mode and text is written to the buffer in input mode. +Command mode is the default. +To exit input mode enter a dot ('.') on a line of its own. +.Pp +If +.Nm +is invoked with a file as an argument, it will simulate an edit command and read +the file's contents into a buffer. +Changes to this buffer are local to +.Nm +until a write command is given. +.Pp +.Nm +uses the basic regular expression syntax and allows any character but space and +newline to be used as a delimiter in regular expressions. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl s +Suppress diagnostic messages +.It Fl p Ar string +Use +.Ar string +as a prompt when in command mode +.El +.Sh EXTENDED DESCRIPTION +.Ss Addresses +Commands operate on addresses. +Addresses are used to refer to lines within the buffer. +Address ranges may have spaces before and after the separator. +Unless otherwise specified, 0 is an invalid address. +The following symbols are valid addresses: +.Bl -tag -width Ds +.It n +The nth line. +.It . +The current line, or "dot". +.It $ +The last line. +.It + +The next line. +.It +n +The nth next line. +.It ^ or - +The previous line. +.It ^n or -n +The nth previous line. +.It x,y +The range of lines from x to y. +The default value of x is 1, and the default value of y is $. +.It x;y +As above, except that the current line is set to x. +Omitting x in this case uses the current line as the default value. +.It /re/ +The next line matching re. +.It ?re? +The last line matching re. +.It 'c +The line marked by c. See k below. +.El +.Ss Commands +.Nm +expects to see one command per line, with the following exception: commands may +be suffixed with either a list, number, or print command. +These suffixed commands are run after the command they're suffixed to has +executed. +.Pp +The following is the list of commands that +.Nm +knows about. +The parentheses contain the default addresses that a command uses. +.Bl -tag -width Ds +.It (.)a +Append text after the addressed line. +The dot is set to the last line entered. +If no text was entered, the dot is set to the addressed line. +An address of 0 appends to the start of the buffer. +.It (.,.)c +Delete the addressed lines and then accept input to replace them. +The dot is set to the last line entered. +If no text was entered, the dot is set to the line before the deleted lines. +.It (.,.)d +Delete the addressed lines. +If there is a line after the deleted range, the dot is set to it. +Otherwise, the dot is set to the line before the deleted range. +.It e Ar file +Delete the contents of the buffer and load in +.Ar file +for editing, printing the bytes read to standard output. +If no filename is given, +.Nm +uses the currently remembered filename. +The remembered filename is set to +.Ar file +for later use. +.It E Ar file +As above, but without warning if the current buffer has unsaved changes. +.It f Ar file +Set the currently remembered filename to +.Ar file +, or print the currently remembered filename if +.Ar file +is omitted. +.It (1,$)g/re/command +Apply command to lines matching re. +The dot is set to the matching line before command is executed. +When each matching line has been operated on, the dot is set to the last line +operated on. +If no lines match then the dot remains unchanged. +The command used may not be g, G, v, or V. +.It (1,$)G/re/ +Interactively edit the range of line addresses that match re. +The dot is set to the matching line and printed before a command is input. +When each matching line has been operated on, the dot is set to the last line +operated on. +If no lines match then the dot remains unchanged. +The command used may not be a, c, i, g, G, v, or V. +.It h +Print the reason for the most recent error. +.It H +Toggle error explanations. +If on, the above behaviour is produced on all subsequent errors. +.It (.)i +Insert text into the buffer before the addressed line. +The dot is set to the last line entered. +If no text was entered, the dot is set to the addressed line +.It (.,.+1)j +Join two lines together. +If only one address is given, nothing happens. +The dot is set to the newly joined line. +.It (.)kc +Mark the line with the lower case character c. The dot is unchanged. +.It (.,.)l +Unambiguously print the addressed lines. +The dot is set to the last line written. +.It (.,.)m(.) +Move lines in the buffer to the line address on the right hand side. +An address of 0 on the right hand side moves to the start of the buffer. +The dot is set to the last line moved. +.It (.,.)n +Print the addressed lines and their numbers. +The dot is set to the last line printed. +.It (.,.)p +Print the addressed lines. +The dot is set to the last line printed. +.It P +Toggle the prompt. +Defaults to off, but is switched on if the -p flag is used. +.It q +Quit +.Nm +, warning if there are unsaved changes. +.It Q +As above, but without warning if the current buffer has unsaved changes. +.It ($)r Ar file +Read in +.Ar file +and append it to the current buffer, printing the bytes read to standard output. +The currently remembered filename isn't changed unless it's empty. +An address of 0 reads the file into the start of the buffer. +.It (.,.)s/re/replacement/flags +Substitute re for replacement in lines matching re. +An & within replacement is replaced with the whole string matched by re. +Backrefs can be used with the form \\n, where n is a positive non-zero integer. +When % is the only character in replacement, it is substituted for the +replacement string from the last substitute command. +If a newline is part of replacement then the matched string is split into two +lines; this cannot be done as part of a g or v command. +If flags contains an integer n, then the nth match is replaced. +If flags contains g, all matches are replaced. +The dot is set to the last line matched. +.It (.,.)t(.) +As m, but copying instead of moving. +The dot is set to the last line added. +.It u +Undo the last change. +The dot is set to whatever it was before the undone command was performed. +.It (1.$)v/re/command +As with g, but operating on lines that don't match re. +.It (1.$)V/re/ +As with G, but operating on lines that don't match re. +.It (1,$)w Ar file +Write the addressed lines to +.Ar file +, overwriting its previous contents if the file exists, and print the number of +bytes written. +If no filename is given the currently remembered filename will be used instead. +The dot is unchanged. +.It (1,$)W Ar file +As above, but instead of overwriting the contents of +.Ar file +the addressed lines are appended to +.Ar file +instead. +.It (.+1) +Print the addressed line. +Sets the dot to that line. +.It ($)= +Print the line number of the addressed line. +The dot is unchanged. +.It & +Repeat the last command. +.It ! Ar command +Execute +.Ar command +using sh. +If the first character of +.Ar command +is '!' then it is replaced with the text of the previous command. +An unescaped % is replaced with the currently remembered filename. +! does not process escape characters. +When +.Ar command +returns a '!' is printed. +The dot is unchanged. +.El +.Sh SEE ALSO +.Xr sed 1 , +.Xr regexp 3 +.Sh STANDARDS +POSIX.1-2013. +Except where noted here: +g and v operate on single commands rather than lists delimited with '\e'. +e, E, r, w, and W commands cannot accept shell escapes. diff --git a/util/sbase/ed.c b/util/sbase/ed.c new file mode 100644 index 00000000..bec9b2da --- /dev/null +++ b/util/sbase/ed.c @@ -0,0 +1,1650 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> +#include <fcntl.h> +#include <regex.h> +#include <unistd.h> + +#include <ctype.h> +#include <limits.h> +#include <setjmp.h> +#include <signal.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "util.h" + +#define REGEXSIZE 100 +#define LINESIZE 80 +#define NUMLINES 32 +#define CACHESIZ 4096 +#define AFTER 0 +#define BEFORE 1 + +typedef struct { + char *str; + size_t cap; + size_t siz; +} String; + +struct hline { + off_t seek; + char global; + int next, prev; +}; + +struct undo { + int curln, lastln; + size_t nr, cap; + struct link { + int to1, from1; + int to2, from2; + } *vec; +}; + +static char *prompt = "*"; +static regex_t *pattern; +static regmatch_t matchs[10]; +static String lastre; + +static int optverbose, optprompt, exstatus, optdiag = 1; +static int marks['z' - 'a']; +static int nlines, line1, line2; +static int curln, lastln, ocurln, olastln; +static jmp_buf savesp; +static char *lasterr; +static size_t idxsize, lastidx; +static struct hline *zero; +static String text; +static char savfname[FILENAME_MAX]; +static char tmpname[FILENAME_MAX]; +static int scratch; +static int pflag, modflag, uflag, gflag; +static size_t csize; +static String cmdline; +static char *ocmdline; +static int inputidx; +static char *rhs; +static char *lastmatch; +static struct undo udata; +static int newcmd; +static int eol, bol; + +static sig_atomic_t intr, hup; + +static void undo(void); + +static void +error(char *msg) +{ + exstatus = 1; + lasterr = msg; + puts("?"); + + if (optverbose) + puts(msg); + if (!newcmd) + undo(); + + curln = ocurln; + longjmp(savesp, 1); +} + +static int +nextln(int line) +{ + ++line; + return (line > lastln) ? 0 : line; +} + +static int +prevln(int line) +{ + --line; + return (line < 0) ? lastln : line; +} + +static String * +copystring(String *s, char *from) +{ + size_t len; + char *t; + + if ((t = strdup(from)) == NULL) + error("out of memory"); + len = strlen(t); + + free(s->str); + s->str = t; + s->siz = len; + s->cap = len; + + return s; +} + +static String * +string(String *s) +{ + free(s->str); + s->str = NULL; + s->siz = 0; + s->cap = 0; + + return s; +} + +static char * +addchar(char c, String *s) +{ + size_t cap = s->cap, siz = s->siz; + char *t = s->str; + + if (siz >= cap && + (cap > SIZE_MAX - LINESIZE || + (t = realloc(t, cap += LINESIZE)) == NULL)) + error("out of memory"); + t[siz++] = c; + s->siz = siz; + s->cap = cap; + s->str = t; + return t; +} + +static void chksignals(void); + +static int +input(void) +{ + int ch; + + chksignals(); + + ch = cmdline.str[inputidx]; + if (ch != '\0') + inputidx++; + return ch; +} + +static int +back(int c) +{ + if (c == '\0') + return c; + return cmdline.str[--inputidx] = c; +} + +static int +makeline(char *s, int *off) +{ + struct hline *lp; + size_t len; + char *begin = s; + int c; + + if (lastidx >= idxsize) { + lp = NULL; + if (idxsize <= SIZE_MAX - NUMLINES) + lp = reallocarray(zero, idxsize + NUMLINES, sizeof(*lp)); + if (!lp) + error("out of memory"); + idxsize += NUMLINES; + zero = lp; + } + lp = zero + lastidx; + lp->global = 0; + + if (!s) { + lp->seek = -1; + len = 0; + } else { + while ((c = *s++) && c != '\n') + ; + len = s - begin; + if ((lp->seek = lseek(scratch, 0, SEEK_END)) < 0 || + write(scratch, begin, len) < 0) { + error("input/output error"); + } + } + if (off) + *off = len; + ++lastidx; + return lp - zero; +} + +static int +getindex(int line) +{ + struct hline *lp; + int n; + + if (line == -1) + line = 0; + for (n = 0, lp = zero; n != line; n++) + lp = zero + lp->next; + + return lp - zero; +} + +static char * +gettxt(int line) +{ + static char buf[CACHESIZ]; + static off_t lasto; + struct hline *lp; + off_t off, block; + ssize_t n; + char *p; + + lp = zero + getindex(line); + text.siz = 0; + off = lp->seek; + + if (off == (off_t) -1) + return addchar('\0', &text); + +repeat: + if (!csize || off < lasto || off - lasto >= csize) { + block = off & ~(CACHESIZ-1); + if (lseek(scratch, block, SEEK_SET) < 0 || + (n = read(scratch, buf, CACHESIZ)) < 0) { + error("input/output error"); + } + csize = n; + lasto = block; + } + for (p = buf + off - lasto; p < buf + csize && *p != '\n'; ++p) { + ++off; + addchar(*p, &text); + } + if (csize && p == buf + csize) + goto repeat; + + addchar('\n', &text); + addchar('\0', &text); + return text.str; +} + +static void +setglobal(int i, int v) +{ + zero[getindex(i)].global = v; +} + +static void +clearundo(void) +{ + free(udata.vec); + udata.vec = NULL; + newcmd = udata.nr = udata.cap = 0; + modflag = 0; +} + +static void +newundo(int from1, int from2) +{ + struct link *p; + + if (newcmd) { + clearundo(); + udata.curln = ocurln; + udata.lastln = olastln; + } + if (udata.nr >= udata.cap) { + size_t siz = (udata.cap + 10) * sizeof(struct link); + if ((p = realloc(udata.vec, siz)) == NULL) + error("out of memory"); + udata.vec = p; + udata.cap = udata.cap + 10; + } + p = &udata.vec[udata.nr++]; + p->from1 = from1; + p->to1 = zero[from1].next; + p->from2 = from2; + p->to2 = zero[from2].prev; +} + +/* + * relink: to1 <- from1 + * from2 -> to2 + */ +static void +relink(int to1, int from1, int from2, int to2) +{ + newundo(from1, from2); + zero[from1].next = to1; + zero[from2].prev = to2; + modflag = 1; +} + +static void +undo(void) +{ + struct link *p; + + if (udata.nr == 0) + return; + for (p = &udata.vec[udata.nr-1]; udata.nr > 0; --p) { + --udata.nr; + zero[p->from1].next = p->to1; + zero[p->from2].prev = p->to2; + } + free(udata.vec); + udata.vec = NULL; + udata.cap = 0; + curln = udata.curln; + lastln = udata.lastln; +} + +static void +inject(char *s, int where) +{ + int off, k, begin, end; + + if (where == BEFORE) { + begin = getindex(curln-1); + end = getindex(nextln(curln-1)); + } else { + begin = getindex(curln); + end = getindex(nextln(curln)); + } + while (*s) { + k = makeline(s, &off); + s += off; + relink(k, begin, k, begin); + relink(end, k, end, k); + ++lastln; + ++curln; + begin = k; + } +} + +static void +clearbuf(void) +{ + if (scratch) + close(scratch); + remove(tmpname); + free(zero); + zero = NULL; + scratch = csize = idxsize = lastidx = curln = lastln = 0; + modflag = lastln = curln = 0; +} + +static void +setscratch(void) +{ + int r, k; + char *dir; + + clearbuf(); + clearundo(); + if ((dir = getenv("TMPDIR")) == NULL) + dir = "/tmp"; + r = snprintf(tmpname, sizeof(tmpname), "%s/%s", + dir, "ed.XXXXXX"); + if (r < 0 || (size_t)r >= sizeof(tmpname)) + error("scratch filename too long"); + if ((scratch = mkstemp(tmpname)) < 0) + error("failed to create scratch file"); + if ((k = makeline(NULL, NULL))) + error("input/output error in scratch file"); + relink(k, k, k, k); + clearundo(); +} + +static void +compile(int delim) +{ + int n, ret, c,bracket; + static char buf[BUFSIZ]; + + if (!isgraph(delim)) + error("invalid pattern delimiter"); + + eol = bol = bracket = lastre.siz = 0; + for (n = 0;; ++n) { + c = input(); + if (c == delim && !bracket || c == '\0') { + break; + } else if (c == '^') { + bol = 1; + } else if (c == '$') { + eol = 1; + } else if (c == '\\') { + addchar(c, &lastre); + c = input(); + } else if (c == '[') { + bracket = 1; + } else if (c == ']') { + bracket = 0; + } + addchar(c, &lastre); + } + if (n == 0) { + if (!pattern) + error("no previous pattern"); + return; + } + addchar('\0', &lastre); + + if (pattern) + regfree(pattern); + if (!pattern && (!(pattern = malloc(sizeof(*pattern))))) + error("out of memory"); + if ((ret = regcomp(pattern, lastre.str, REG_NEWLINE))) { + regerror(ret, pattern, buf, sizeof(buf)); + error(buf); + } +} + +static int +match(int num) +{ + lastmatch = gettxt(num); + return !regexec(pattern, lastmatch, 10, matchs, 0); +} + +static int +rematch(int num) +{ + regoff_t off = matchs[0].rm_eo; + + if (!regexec(pattern, lastmatch + off, 10, matchs, 0)) { + lastmatch += off; + return 1; + } + + return 0; +} + +static int +search(int way) +{ + int i; + + i = curln; + do { + chksignals(); + + i = (way == '?') ? prevln(i) : nextln(i); + if (i > 0 && match(i)) + return i; + } while (i != curln); + + error("invalid address"); + return -1; /* not reached */ +} + +static void +skipblank(void) +{ + char c; + + while ((c = input()) == ' ' || c == '\t') + ; + back(c); +} + +static void +ensureblank(void) +{ + char c; + + switch ((c = input())) { + case ' ': + case '\t': + skipblank(); + case '\0': + back(c); + break; + default: + error("unknown command"); + } +} + +static int +getnum(void) +{ + int ln, n, c; + + for (ln = 0; isdigit(c = input()); ln += n) { + if (ln > INT_MAX/10) + goto invalid; + n = c - '0'; + ln *= 10; + if (INT_MAX - ln < n) + goto invalid; + } + back(c); + return ln; + +invalid: + error("invalid address"); + return -1; /* not reached */ +} + +static int +linenum(int *line) +{ + int ln, c; + + skipblank(); + + switch (c = input()) { + case '.': + ln = curln; + break; + case '\'': + skipblank(); + if (!islower(c = input())) + error("invalid mark character"); + if (!(ln = marks[c - 'a'])) + error("invalid address"); + break; + case '$': + ln = lastln; + break; + case '?': + case '/': + compile(c); + ln = search(c); + break; + case '^': + case '-': + case '+': + ln = curln; + back(c); + break; + default: + back(c); + if (isdigit(c)) + ln = getnum(); + else + return 0; + break; + } + *line = ln; + return 1; +} + +static int +address(int *line) +{ + int ln, sign, c, num; + + if (!linenum(&ln)) + return 0; + + for (;;) { + skipblank(); + if ((c = input()) != '+' && c != '-' && c != '^') + break; + sign = c == '+' ? 1 : -1; + num = isdigit(back(input())) ? getnum() : 1; + num *= sign; + if (INT_MAX - ln < num) + goto invalid; + ln += num; + } + back(c); + + if (ln < 0 || ln > lastln) + error("invalid address"); + *line = ln; + return 1; + +invalid: + error("invalid address"); + return -1; /* not reached */ +} + +static void +getlst(void) +{ + int ln, c; + + if ((c = input()) == ',') { + line1 = 1; + line2 = lastln; + nlines = lastln; + return; + } else if (c == ';') { + line1 = curln; + line2 = lastln; + nlines = lastln - curln + 1; + return; + } + back(c); + line2 = curln; + for (nlines = 0; address(&ln); ) { + line1 = line2; + line2 = ln; + ++nlines; + + skipblank(); + if ((c = input()) != ',' && c != ';') { + back(c); + break; + } + if (c == ';') + curln = line2; + } + if (nlines > 2) + nlines = 2; + else if (nlines <= 1) + line1 = line2; +} + +static void +deflines(int def1, int def2) +{ + if (!nlines) { + line1 = def1; + line2 = def2; + } + if (line1 > line2 || line1 < 0 || line2 > lastln) + error("invalid address"); +} + +static void +quit(void) +{ + clearbuf(); + exit(exstatus); +} + +static void +setinput(char *s) +{ + copystring(&cmdline, s); + inputidx = 0; +} + +static void +getinput(void) +{ + int ch; + + string(&cmdline); + + while ((ch = getchar()) != '\n' && ch != EOF) { + if (ch == '\\') { + if ((ch = getchar()) == EOF) + break; + if (ch != '\n') { + ungetc(ch, stdin); + ch = '\\'; + } + } + addchar(ch, &cmdline); + } + + addchar('\0', &cmdline); + inputidx = 0; + + if (ch == EOF) { + chksignals(); + if (ferror(stdin)) { + exstatus = 1; + fputs("ed: error reading input\n", stderr); + } + quit(); + } +} + +static int +moreinput(void) +{ + if (!uflag) + return cmdline.str[inputidx] != '\0'; + + getinput(); + return 1; +} + +static void dowrite(const char *, int); + +static void +dump(void) +{ + char *home; + + if (modflag) + return; + + line1 = nextln(0); + line2 = lastln; + + if (!setjmp(savesp)) { + dowrite("ed.hup", 1); + return; + } + + home = getenv("HOME"); + if (!home || chdir(home) < 0) + return; + + if (!setjmp(savesp)) + dowrite("ed.hup", 1); +} + +static void +chksignals(void) +{ + if (hup) { + exstatus = 1; + dump(); + quit(); + } + + if (intr) { + intr = 0; + newcmd = 1; + clearerr(stdin); + error("Interrupt"); + } +} + +static void +dowrite(const char *fname, int trunc) +{ + size_t bytecount = 0; + int i, r, line; + FILE *aux; + static int sh; + static FILE *fp; + + if (fp) { + sh ? pclose(fp) : fclose(fp); + fp = NULL; + } + + if(fname[0] == '!') { + sh = 1; + fname++; + if((fp = popen(fname, "w")) == NULL) + error("bad exec"); + } else { + sh = 0; + if ((fp = fopen(fname, "w")) == NULL) + error("cannot open input file"); + } + + line = curln; + for (i = line1; i <= line2; ++i) { + chksignals(); + + gettxt(i); + bytecount += text.siz - 1; + fwrite(text.str, 1, text.siz - 1, fp); + } + + curln = line2; + + aux = fp; + fp = NULL; + r = sh ? pclose(aux) : fclose(aux); + if (r) + error("input/output error"); + strcpy(savfname, fname); + modflag = 0; + curln = line; + if (optdiag) + printf("%zu\n", bytecount); +} + +static void +doread(const char *fname) +{ + size_t cnt; + ssize_t n; + char *p; + FILE *aux; + static size_t len; + static char *s; + static FILE *fp; + + if (fp) + fclose(fp); + if ((fp = fopen(fname, "r")) == NULL) + error("cannot open input file"); + + curln = line2; + for (cnt = 0; (n = getline(&s, &len, fp)) > 0; cnt += (size_t)n) { + chksignals(); + if (s[n-1] != '\n') { + if (len == SIZE_MAX || !(p = realloc(s, ++len))) + error("out of memory"); + s = p; + s[n-1] = '\n'; + s[n] = '\0'; + } + inject(s, AFTER); + } + if (optdiag) + printf("%zu\n", cnt); + + aux = fp; + fp = NULL; + if (fclose(aux)) + error("input/output error"); +} + +static void +doprint(void) +{ + int i, c; + char *s, *str; + + if (line1 <= 0 || line2 > lastln) + error("incorrect address"); + for (i = line1; i <= line2; ++i) { + chksignals(); + if (pflag == 'n') + printf("%d\t", i); + for (s = gettxt(i); (c = *s) != '\n'; ++s) { + if (pflag != 'l') + goto print_char; + switch (c) { + case '$': + str = "\\$"; + goto print_str; + case '\t': + str = "\\t"; + goto print_str; + case '\b': + str = "\\b"; + goto print_str; + case '\\': + str = "\\\\"; + goto print_str; + default: + if (!isprint(c)) { + printf("\\x%x", 0xFF & c); + break; + } + print_char: + putchar(c); + break; + print_str: + fputs(str, stdout); + break; + } + } + if (pflag == 'l') + fputs("$", stdout); + putc('\n', stdout); + } + curln = i - 1; +} + +static void +dohelp(void) +{ + if (lasterr) + puts(lasterr); +} + +static void +chkprint(int flag) +{ + int c; + + if (flag) { + if ((c = input()) == 'p' || c == 'l' || c == 'n') + pflag = c; + else + back(c); + } + if ((c = input()) != '\0' && c != '\n') + error("invalid command suffix"); +} + +static char * +getfname(int comm) +{ + int c; + char *bp; + static char fname[FILENAME_MAX]; + + skipblank(); + for (bp = fname; bp < &fname[FILENAME_MAX]; *bp++ = c) { + if ((c = input()) == '\0') + break; + } + if (bp == fname) { + if (savfname[0] == '\0') + error("no current filename"); + return savfname; + } else if (bp == &fname[FILENAME_MAX]) { + error("file name too long"); + } else { + *bp = '\0'; + if (savfname[0] == '\0' || comm == 'e' || comm == 'f') + strcpy(savfname, fname); + return fname; + } + + return NULL; /* not reached */ +} + +static void +append(int num) +{ + int ch; + static String line; + + curln = num; + while (moreinput()) { + string(&line); + while ((ch = input()) != '\n' && ch != '\0') + addchar(ch, &line); + addchar('\n', &line); + addchar('\0', &line); + + if (!strcmp(line.str, ".\n") || !strcmp(line.str, ".")) + break; + inject(line.str, AFTER); + } +} + +static void +delete(int from, int to) +{ + int lto, lfrom; + + if (!from) + error("incorrect address"); + + lfrom = getindex(prevln(from)); + lto = getindex(nextln(to)); + lastln -= to - from + 1; + curln = (from > lastln) ? lastln : from;; + relink(lto, lfrom, lto, lfrom); +} + +static void +move(int where) +{ + int before, after, lto, lfrom; + + if (!line1 || (where >= line1 && where <= line2)) + error("incorrect address"); + + before = getindex(prevln(line1)); + after = getindex(nextln(line2)); + lfrom = getindex(line1); + lto = getindex(line2); + relink(after, before, after, before); + + if (where < line1) { + curln = where + line1 - line2 + 1; + } else { + curln = where; + where -= line1 - line2 + 1; + } + before = getindex(where); + after = getindex(nextln(where)); + relink(lfrom, before, lfrom, before); + relink(after, lto, after, lto); +} + +static void +join(void) +{ + int i; + char *t, c; + static String s; + + string(&s); + for (i = line1;; i = nextln(i)) { + chksignals(); + for (t = gettxt(i); (c = *t) != '\n'; ++t) + addchar(*t, &s); + if (i == line2) + break; + } + + addchar('\n', &s); + addchar('\0', &s); + delete(line1, line2); + inject(s.str, BEFORE); + free(s.str); +} + +static void +scroll(int num) +{ + int max, ln, cnt; + + if (!line1 || line1 == lastln) + error("incorrect address"); + + ln = line1; + max = line1 + num; + if (max > lastln) + max = lastln; + for (cnt = line1; cnt < max; cnt++) { + chksignals(); + fputs(gettxt(ln), stdout); + ln = nextln(ln); + } + curln = ln; +} + +static void +copy(int where) +{ + + if (!line1) + error("incorrect address"); + curln = where; + + while (line1 <= line2) { + chksignals(); + inject(gettxt(line1), AFTER); + if (line2 >= curln) + line2 = nextln(line2); + line1 = nextln(line1); + if (line1 >= curln) + line1 = nextln(line1); + } +} + +static void +execsh(void) +{ + static String cmd; + char *p; + int c, repl = 0; + + skipblank(); + if ((c = input()) != '!') { + back(c); + string(&cmd); + } else if (cmd.siz) { + --cmd.siz; + repl = 1; + } else { + error("no previous command"); + } + + while ((c = input()) != '\0') { + switch (c) { + case '%': + if (savfname[0] == '\0') + error("no current filename"); + repl = 1; + for (p = savfname; *p; ++p) + addchar(*p, &cmd); + break; + case '\\': + c = input(); + if (c != '%') { + back(c); + c = '\\'; + } + default: + addchar(c, &cmd); + } + } + addchar('\0', &cmd); + + if (repl) + puts(cmd.str); + system(cmd.str); + if (optdiag) + puts("!"); +} + +static void +getrhs(int delim) +{ + int c; + static String s; + + string(&s); + while ((c = input()) != '\0' && c != delim) + addchar(c, &s); + addchar('\0', &s); + if (c == '\0') { + pflag = 'p'; + back(c); + } + + if (!strcmp("%", s.str)) { + if (!rhs) + error("no previous substitution"); + free(s.str); + } else { + free(rhs); + rhs = s.str; + } + s.str = NULL; +} + +static int +getnth(void) +{ + int c; + + if ((c = input()) == 'g') { + return -1; + } else if (isdigit(c)) { + if (c == '0') + return -1; + return c - '0'; + } else { + back(c); + return 1; + } +} + +static void +addpre(String *s) +{ + char *p; + + for (p = lastmatch; p < lastmatch + matchs[0].rm_so; ++p) + addchar(*p, s); +} + +static void +addpost(String *s) +{ + char c, *p; + + for (p = lastmatch + matchs[0].rm_eo; (c = *p); ++p) + addchar(c, s); + addchar('\0', s); +} + +static int +addsub(String *s, int nth, int nmatch) +{ + char *end, *q, *p, c; + int sub; + + if (nth != nmatch && nth != -1) { + q = lastmatch + matchs[0].rm_so; + end = lastmatch + matchs[0].rm_eo; + while (q < end) + addchar(*q++, s); + return 0; + } + + for (p = rhs; (c = *p); ++p) { + switch (c) { + case '&': + sub = 0; + goto copy_match; + case '\\': + if ((c = *++p) == '\0') + return 1; + if (!isdigit(c)) + goto copy_char; + sub = c - '0'; + copy_match: + q = lastmatch + matchs[sub].rm_so; + end = lastmatch + matchs[sub].rm_eo; + while (q < end) + addchar(*q++, s); + break; + default: + copy_char: + addchar(c, s); + break; + } + } + return 1; +} + +static void +subline(int num, int nth) +{ + int i, m, changed; + static String s; + + string(&s); + i = changed = 0; + for (m = match(num); m; m = rematch(num)) { + chksignals(); + addpre(&s); + changed |= addsub(&s, nth, ++i); + if (eol || bol) + break; + } + if (!changed) + return; + addpost(&s); + delete(num, num); + curln = prevln(num); + inject(s.str, AFTER); +} + +static void +subst(int nth) +{ + int i, line, next; + + line = line1; + for (i = 0; i < line2 - line1 + 1; i++) { + chksignals(); + + next = getindex(nextln(line)); + subline(line, nth); + + /* + * The substitution command can add lines, so + * we have to skip lines until we find the + * index that we saved before the substitution + */ + do + line = nextln(line); + while (getindex(line) != next); + } +} + +static void +docmd(void) +{ + int cmd, c, line3, num, trunc; + +repeat: + skipblank(); + cmd = input(); + trunc = pflag = 0; + switch (cmd) { + case '&': + skipblank(); + chkprint(0); + if (!ocmdline) + error("no previous command"); + setinput(ocmdline); + getlst(); + goto repeat; + case '!': + execsh(); + break; + case '\0': + num = gflag ? curln : curln+1; + deflines(num, num); + line1 = line2; + pflag = 'p'; + goto print; + case 'l': + case 'n': + case 'p': + back(cmd); + chkprint(1); + deflines(curln, curln); + goto print; + case 'g': + case 'G': + case 'v': + case 'V': + error("cannot nest global commands"); + case 'H': + if (nlines > 0) + goto unexpected; + chkprint(0); + optverbose ^= 1; + break; + case 'h': + if (nlines > 0) + goto unexpected; + chkprint(0); + dohelp(); + break; + case 'w': + trunc = 1; + case 'W': + ensureblank(); + deflines(nextln(0), lastln); + dowrite(getfname(cmd), trunc); + break; + case 'r': + ensureblank(); + if (nlines > 1) + goto bad_address; + deflines(lastln, lastln); + doread(getfname(cmd)); + break; + case 'd': + chkprint(1); + deflines(curln, curln); + delete(line1, line2); + break; + case '=': + if (nlines > 1) + goto bad_address; + chkprint(1); + deflines(lastln, lastln); + printf("%d\n", line1); + break; + case 'u': + if (nlines > 0) + goto bad_address; + chkprint(1); + if (udata.nr == 0) + error("nothing to undo"); + undo(); + break; + case 's': + deflines(curln, curln); + c = input(); + compile(c); + getrhs(c); + num = getnth(); + chkprint(1); + subst(num); + break; + case 'i': + if (nlines > 1) + goto bad_address; + chkprint(1); + deflines(curln, curln); + if (!line1) + line1++; + append(prevln(line1)); + break; + case 'a': + if (nlines > 1) + goto bad_address; + chkprint(1); + deflines(curln, curln); + append(line1); + break; + case 'm': + deflines(curln, curln); + if (!address(&line3)) + line3 = curln; + chkprint(1); + move(line3); + break; + case 't': + deflines(curln, curln); + if (!address(&line3)) + line3 = curln; + chkprint(1); + copy(line3); + break; + case 'c': + chkprint(1); + deflines(curln, curln); + delete(line1, line2); + append(prevln(line1)); + break; + case 'j': + chkprint(1); + deflines(curln, curln+1); + if (line1 != line2 && curln != 0) + join(); + break; + case 'z': + if (nlines > 1) + goto bad_address; + if (isdigit(back(input()))) + num = getnum(); + else + num = 24; + chkprint(1); + scroll(num); + break; + case 'k': + if (nlines > 1) + goto bad_address; + if (!islower(c = input())) + error("invalid mark character"); + chkprint(1); + deflines(curln, curln); + marks[c - 'a'] = line1; + break; + case 'P': + if (nlines > 0) + goto unexpected; + chkprint(1); + optprompt ^= 1; + break; + case 'Q': + modflag = 0; + case 'q': + if (nlines > 0) + goto unexpected; + if (modflag) + goto modified; + quit(); + break; + case 'f': + ensureblank(); + if (nlines > 0) + goto unexpected; + if (back(input()) != '\0') + getfname(cmd); + else + puts(savfname); + chkprint(0); + break; + case 'E': + modflag = 0; + case 'e': + ensureblank(); + if (nlines > 0) + goto unexpected; + if (modflag) + goto modified; + getfname(cmd); + setscratch(); + deflines(curln, curln); + doread(savfname); + clearundo(); + break; + default: + error("unknown command"); + bad_address: + error("invalid address"); + modified: + modflag = 0; + error("warning: file modified"); + unexpected: + error("unexpected address"); + } + + if (!pflag) + return; + line1 = line2 = curln; + +print: + doprint(); +} + +static int +chkglobal(void) +{ + int delim, c, dir, i, v; + + uflag = 1; + gflag = 0; + skipblank(); + + switch (c = input()) { + case 'g': + uflag = 0; + case 'G': + dir = 1; + break; + case 'v': + uflag = 0; + case 'V': + dir = 0; + break; + default: + back(c); + return 0; + } + gflag = 1; + deflines(nextln(0), lastln); + delim = input(); + compile(delim); + + for (i = 1; i <= lastln; ++i) { + chksignals(); + if (i >= line1 && i <= line2) + v = match(i) == dir; + else + v = 0; + setglobal(i, v); + } + + return 1; +} + +static void +savecmd(void) +{ + int ch; + + skipblank(); + ch = input(); + if (ch != '&') { + ocmdline = strdup(cmdline.str); + if (ocmdline == NULL) + error("out of memory"); + } + back(ch); +} + +static void +doglobal(void) +{ + int cnt, ln, k, idx; + + skipblank(); + gflag = 1; + if (uflag) + chkprint(0); + + ln = line1; + for (cnt = 0; cnt < lastln; ) { + chksignals(); + k = getindex(ln); + if (zero[k].global) { + zero[k].global = 0; + curln = ln; + nlines = 0; + + if (!uflag) { + idx = inputidx; + getlst(); + docmd(); + inputidx = idx; + continue; + } + + line1 = line2 = ln; + pflag = 0; + doprint(); + + for (;;) { + getinput(); + if (strcmp(cmdline.str, "") == 0) + break; + savecmd(); + getlst(); + docmd(); + } + + } else { + cnt++; + ln = nextln(ln); + } + } +} + +static void +usage(void) +{ + eprintf("usage: %s [-s] [-p] [file]\n", argv0); +} + +static void +sigintr(int n) +{ + intr = 1; +} + +static void +sighup(int dummy) +{ + hup = 1; +} + +static void +edit(void) +{ + for (;;) { + newcmd = 1; + ocurln = curln; + olastln = lastln; + if (optprompt) { + fputs(prompt, stdout); + fflush(stdout); + } + + getinput(); + getlst(); + chkglobal() ? doglobal() : docmd(); + } +} + +static void +init(char *fname) +{ + size_t len; + + setscratch(); + if (!fname) + return; + if ((len = strlen(fname)) >= FILENAME_MAX || len == 0) + error("incorrect filename"); + memcpy(savfname, fname, len); + doread(fname); + clearundo(); +} + +int +main(int argc, char *argv[]) +{ + ARGBEGIN { + case 'p': + prompt = EARGF(usage()); + optprompt = 1; + break; + case 's': + optdiag = 0; + break; + default: + usage(); + } ARGEND + + if (argc > 1) + usage(); + + if (!setjmp(savesp)) { + sigaction(SIGINT, + &(struct sigaction) {.sa_handler = sigintr}, + NULL); + sigaction(SIGHUP, + &(struct sigaction) {.sa_handler = sighup}, + NULL); + sigaction(SIGQUIT, + &(struct sigaction) {.sa_handler = SIG_IGN}, + NULL); + init(*argv); + } + edit(); + + /* not reached */ + return 0; +} diff --git a/util/sbase/env.1 b/util/sbase/env.1 new file mode 100644 index 00000000..f25f54b1 --- /dev/null +++ b/util/sbase/env.1 @@ -0,0 +1,47 @@ +.Dd October 8, 2015 +.Dt ENV 1 +.Os sbase +.Sh NAME +.Nm env +.Nd modify the environment, then print it or run a command +.Sh SYNOPSIS +.Nm +.Op Fl i +.Oo Fl u Ar var Oc ... +.Oo Ar var Ns = Ns Ar value Oc ... +.Oo Ar cmd Oo arg ... Oc Oc +.Sh DESCRIPTION +.Nm +unsets each +.Ar var , +then adds or sets each +.Ar ( var , value ) +tuple in the environment. +.Pp +If +.Ar cmd +is given, it is executed in this new environment; +otherwise, the modified environment is printed to stdout. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl i +Completely ignore the existing environment and execute +.Ar cmd +only with each +.Ar ( var , value ) +tuple specified. +.It Fl u Ar var +Unset +.Ar var +in the environment. +.El +.Sh SEE ALSO +.Xr printenv 1 , +.Xr putenv 3 , +.Xr environ 7 +.Sh STANDARDS +POSIX.1-2013. +.Pp +The +.Op Fl u +flag is an extension to that specification. diff --git a/util/sbase/env.c b/util/sbase/env.c new file mode 100644 index 00000000..5d7e8a55 --- /dev/null +++ b/util/sbase/env.c @@ -0,0 +1,49 @@ +/* See LICENSE file for copyright and license details. */ +#include <errno.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + +#include "util.h" + +extern char **environ; + +static void +usage(void) +{ + eprintf("usage: %s [-i] [-u var] ... [var=value] ... [cmd [arg ...]]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int savederrno; + + ARGBEGIN { + case 'i': + *environ = NULL; + break; + case 'u': + if (unsetenv(EARGF(usage())) < 0) + eprintf("unsetenv:"); + break; + default: + usage(); + } ARGEND + + for (; *argv && strchr(*argv, '='); argc--, argv++) + putenv(*argv); + + if (*argv) { + execvp(*argv, argv); + savederrno = errno; + weprintf("execvp %s:", *argv); + _exit(126 + (savederrno == ENOENT)); + } + + for (; *environ; environ++) + puts(*environ); + + return fshut(stdout, "<stdout>"); +} diff --git a/util/sbase/expand.1 b/util/sbase/expand.1 new file mode 100644 index 00000000..9cf20fb4 --- /dev/null +++ b/util/sbase/expand.1 @@ -0,0 +1,47 @@ +.Dd October 8, 2015 +.Dt EXPAND 1 +.Os sbase +.Sh NAME +.Nm expand +.Nd expand tabs to spaces +.Sh SYNOPSIS +.Nm +.Op Fl i +.Op Fl t Ar tablist +.Op Ar file ... +.Sh DESCRIPTION +.Nm +converts tabs to spaces in each +.Ar file +as specified in +.Ar tablist . +If no file is given, +.Nm +reads from stdin. +.Pp +Backspace characters are preserved and decrement the column count +for tab calculations. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl i +Only expand tabs at the beginning of lines, i.e. expand each +line until a character different from '\et' and ' ' is reached. +.It Fl t Ar tablist +Specify tab size or tabstops. +.Ar tablist +is a list of one (in the former case) or multiple (in the latter case) +strictly positive integers separated by ' ' or ','. +.Pp +The default +.Ar tablist +is "8". +.El +.Sh SEE ALSO +.Xr fold 1 , +.Xr unexpand 1 +.Sh STANDARDS +POSIX.1-2013. +.Pp +The +.Op Fl i +flag is an extension to that specification. diff --git a/util/sbase/expand.c b/util/sbase/expand.c new file mode 100644 index 00000000..f534134f --- /dev/null +++ b/util/sbase/expand.c @@ -0,0 +1,131 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdint.h> +#include <stdlib.h> +#include <string.h> + +#include "utf.h" +#include "util.h" + +static int iflag = 0; +static size_t *tablist = NULL; +static size_t tablistlen = 0; + +static size_t +parselist(const char *s) +{ + size_t i; + char *p, *tmp; + + tmp = estrdup(s); + for (i = 0; (p = strsep(&tmp, " ,")); i++) { + if (*p == '\0') + eprintf("empty field in tablist\n"); + tablist = ereallocarray(tablist, i + 1, sizeof(*tablist)); + tablist[i] = estrtonum(p, 1, MIN(LLONG_MAX, SIZE_MAX)); + if (i > 0 && tablist[i - 1] >= tablist[i]) + eprintf("tablist must be ascending\n"); + } + tablist = ereallocarray(tablist, i + 1, sizeof(*tablist)); + /* tab length = 1 for the overflowing case later in the matcher */ + tablist[i] = 1; + + return i; +} + +static int +expand(const char *file, FILE *fp) +{ + size_t bol = 1, col = 0, i; + Rune r; + + while (efgetrune(&r, fp, file)) { + switch (r) { + case '\t': + if (tablistlen == 1) + i = 0; + else for (i = 0; i < tablistlen; i++) + if (col < tablist[i]) + break; + if (bol || !iflag) { + do { + col++; + putchar(' '); + } while (col % tablist[i]); + } else { + putchar('\t'); + col = tablist[i]; + } + break; + case '\b': + bol = 0; + if (col) + col--; + putchar('\b'); + break; + case '\n': + bol = 1; + col = 0; + putchar('\n'); + break; + default: + col++; + if (r != ' ') + bol = 0; + efputrune(&r, stdout, "<stdout>"); + break; + } + } + + return 0; +} + +static void +usage(void) +{ + eprintf("usage: %s [-i] [-t tablist] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + FILE *fp; + int ret = 0; + char *tl = "8"; + + ARGBEGIN { + case 'i': + iflag = 1; + break; + case 't': + tl = EARGF(usage()); + if (!*tl) + eprintf("tablist cannot be empty\n"); + break; + default: + usage(); + } ARGEND + + tablistlen = parselist(tl); + + if (!argc) { + expand("<stdin>", stdin); + } else { + for (; *argv; argc--, argv++) { + if (!strcmp(*argv, "-")) { + *argv = "<stdin>"; + fp = stdin; + } else if (!(fp = fopen(*argv, "r"))) { + weprintf("fopen %s:", *argv); + ret = 1; + continue; + } + expand(*argv, fp); + if (fp != stdin && fshut(fp, *argv)) + ret = 1; + } + } + + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/expr.1 b/util/sbase/expr.1 new file mode 100644 index 00000000..4710fc40 --- /dev/null +++ b/util/sbase/expr.1 @@ -0,0 +1,101 @@ +.Dd October 8, 2015 +.Dt EXPR 1 +.Os sbase +.Sh NAME +.Nm expr +.Nd evaluate expression +.Sh SYNOPSIS +.Nm +.Ar expression +.Sh DESCRIPTION +.Nm +evaluates +.Ar expression +and writes the result to stdout. +.Pp +There are two elemental expressions, +.Sy integer +and +.Sy string . +Let +.Sy expr +be a non-elemental expression and +.Sy expr1 , +.Sy expr2 +arbitrary expressions. +Then +.Sy expr +has the recursive form +.Sy expr = [(] expr1 operand expr2 [)] . +.Pp +With +.Sy operand +being in order of increasing precedence: +.Bl -tag -width Ds +.It | +Evaluate to +.Sy expr1 +if it is neither an empty string nor 0; otherwise evaluate to +.Sy expr2 . +.It & +Evaluate to +.Sy expr1 +if +.Sy expr1 +and +.Sy expr2 +are neither empty strings nor 0; otherwise evaluate to 0. +.It = > >= < <= != +If +.Sy expr1 +and +.Sy expr2 +are integers, evaluate to 1 if the relation is true and 0 if it is false. +If +.Sy expr1 +and +.Sy expr2 +are strings, apply the relation to the return value of +.Xr strcmp 3 . +.It + - +If +.Sy expr1 +and +.Sy expr2 +are integers, evaluate to their sum or subtraction. +.It * / % +If +.Sy expr1 +and +.Sy expr2 +are integers, evaluate to their multiplication, division or remainder. +.It : +Evaluate to the number of characters matched in +.Sy expr1 +against +.Sy expr2 . expr2 +is anchored with an implicit '^'. +.Pp +You can't directly match the empty string, since zero matched characters +resolve equally to a failed match. +To work around this limitation, use "expr X'' : 'X$' instead of "expr '' +: '$'" +.El +.Sh EXIT STATUS +.Bl -tag -width Ds +.It 0 +.Ar expression +is neither an empty string nor 0. +.It 1 +.Ar expression +is an empty string or 0. +.It 2 +.Ar expression +is invalid. +.It > 2 +An error occurred. +.El +.Sh SEE ALSO +.Xr test 1 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/expr.c b/util/sbase/expr.c new file mode 100644 index 00000000..044c6c1a --- /dev/null +++ b/util/sbase/expr.c @@ -0,0 +1,244 @@ +/* See LICENSE file for copyright and license details. */ +#include <limits.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "utf.h" +#include "util.h" + +/* tokens, one-character operators represent themselves */ +enum { + VAL = CHAR_MAX + 1, GE, LE, NE +}; + +struct val { + char *str; + long long num; +}; + +static void +tonum(struct val *v) +{ + const char *errstr; + long long d; + + /* check if val is the result of an earlier calculation */ + if (!v->str) + return; + + d = strtonum(v->str, LLONG_MIN, LLONG_MAX, &errstr); + if (errstr) + enprintf(2, "error: expected integer, got %s\n", v->str); + v->num = d; +} + +static void +ezero(struct val *v) +{ + if (v->num != 0) + return; + enprintf(2, "division by zero\n"); +} + +static int +valcmp(struct val *a, struct val *b) +{ + int ret; + const char *err1, *err2; + long long d1, d2; + + d1 = strtonum(a->str, LLONG_MIN, LLONG_MAX, &err1); + d2 = strtonum(b->str, LLONG_MIN, LLONG_MAX, &err2); + + if (!err1 && !err2) { + ret = (d1 > d2) - (d1 < d2); + } else { + ret = strcmp(a->str, b->str); + } + + return ret; +} + +static void +match(struct val *vstr, struct val *vregx, struct val *ret) +{ + regex_t re; + regmatch_t matches[2]; + size_t anchlen; + char *s, *p, *anchreg; + char *str = vstr->str, *regx = vregx->str; + + /* anchored regex */ + anchlen = strlen(regx) + 1 + 1; + anchreg = emalloc(anchlen); + estrlcpy(anchreg, "^", anchlen); + estrlcat(anchreg, regx, anchlen); + enregcomp(3, &re, anchreg, 0); + free(anchreg); + + if (regexec(&re, str, 2, matches, 0)) { + regfree(&re); + ret->str = re.re_nsub ? "" : NULL; + return; + } else if (re.re_nsub) { + regfree(&re); + + s = str + matches[1].rm_so; + p = str + matches[1].rm_eo; + *p = '\0'; + ret->str = enstrdup(3, s); + return; + } else { + regfree(&re); + str += matches[0].rm_so; + ret->num = utfnlen(str, matches[0].rm_eo - matches[0].rm_so); + return; + } +} + +static void +doop(int *ophead, int *opp, struct val *valhead, struct val *valp) +{ + struct val ret = { .str = NULL, .num = 0 }, *a, *b; + int op; + + /* an operation "a op b" needs an operator and two values */ + if (opp[-1] == '(') + enprintf(2, "syntax error: extra (\n"); + if (valp - valhead < 2) + enprintf(2, "syntax error: missing expression or extra operator\n"); + + a = valp - 2; + b = valp - 1; + op = opp[-1]; + + switch (op) { + case '|': + if ( a->str && *a->str) ret.str = a->str; + else if (!a->str && a->num) ret.num = a->num; + else if ( b->str && *b->str) ret.str = b->str; + else ret.num = b->num; + break; + case '&': + if (((a->str && *a->str) || a->num) && + ((b->str && *b->str) || b->num)) { + ret.str = a->str; + ret.num = a->num; + } + break; + + case '=': ret.num = (valcmp(a, b) == 0); break; + case '>': ret.num = (valcmp(a, b) > 0); break; + case GE : ret.num = (valcmp(a, b) >= 0); break; + case '<': ret.num = (valcmp(a, b) < 0); break; + case LE : ret.num = (valcmp(a, b) <= 0); break; + case NE : ret.num = (valcmp(a, b) != 0); break; + + case '+': tonum(a); tonum(b); ret.num = a->num + b->num; break; + case '-': tonum(a); tonum(b); ret.num = a->num - b->num; break; + case '*': tonum(a); tonum(b); ret.num = a->num * b->num; break; + case '/': tonum(a); tonum(b); ezero(b); ret.num = a->num / b->num; break; + case '%': tonum(a); tonum(b); ezero(b); ret.num = a->num % b->num; break; + + case ':': match(a, b, &ret); break; + } + + valp[-2] = ret; +} + +static int +lex(char *s, struct val *v) +{ + int type = VAL; + char *ops = "|&=><+-*/%():"; + + if (s[0] && strchr(ops, s[0]) && !s[1]) { + /* one-char operand */ + type = s[0]; + } else if (s[0] && strchr("><!", s[0]) && s[1] == '=' && !s[2]) { + /* two-char operand */ + type = (s[0] == '>') ? GE : (s[0] == '<') ? LE : NE; + } + + return type; +} + +static int +parse(char *expr[], int numexpr) +{ + struct val *valhead, *valp, v = { .str = NULL, .num = 0 }; + int *ophead, *opp, type, lasttype = 0; + char prec[] = { + [ 0 ] = 0, [VAL] = 0, ['('] = 0, [')'] = 0, + ['|'] = 1, + ['&'] = 2, + ['='] = 3, ['>'] = 3, [GE] = 3, ['<'] = 3, [LE] = 3, [NE] = 3, + ['+'] = 4, ['-'] = 4, + ['*'] = 5, ['/'] = 5, ['%'] = 5, + [':'] = 6, + }; + + valp = valhead = enreallocarray(3, NULL, numexpr, sizeof(*valp)); + opp = ophead = enreallocarray(3, NULL, numexpr, sizeof(*opp)); + for (; *expr; expr++) { + switch ((type = lex(*expr, &v))) { + case VAL: + /* treatment of *expr is not known until + * doop(); treat as a string for now */ + valp->str = *expr; + valp++; + break; + case '(': + *opp++ = type; + break; + case ')': + if (lasttype == '(') + enprintf(2, "syntax error: empty ( )\n"); + while (opp > ophead && opp[-1] != '(') + doop(ophead, opp--, valhead, valp--); + if (opp == ophead) + enprintf(2, "syntax error: extra )\n"); + opp--; + break; + default: /* operator */ + if (prec[lasttype]) + enprintf(2, "syntax error: extra operator\n"); + while (opp > ophead && prec[opp[-1]] >= prec[type]) + doop(ophead, opp--, valhead, valp--); + *opp++ = type; + break; + } + lasttype = type; + v.str = NULL; + v.num = 0; + } + while (opp > ophead) + doop(ophead, opp--, valhead, valp--); + if (valp == valhead) + enprintf(2, "syntax error: missing expression\n"); + if (--valp > valhead) + enprintf(2, "syntax error: extra expression\n"); + + if (valp->str) + puts(valp->str); + else + printf("%lld\n", valp->num); + + return (valp->str && *valp->str) || valp->num; +} + +int +main(int argc, char *argv[]) +{ + int ret; + + argv0 = *argv, argv0 ? (argc--, argv++) : (void *)0; + + ret = !parse(argv, argc); + + if (fshut(stdout, "<stdout>")) + ret = 3; + + return ret; +} diff --git a/util/sbase/false.1 b/util/sbase/false.1 new file mode 100644 index 00000000..e6adf570 --- /dev/null +++ b/util/sbase/false.1 @@ -0,0 +1,13 @@ +.Dd October 8, 2015 +.Dt FALSE 1 +.Os sbase +.Sh NAME +.Nm false +.Nd return failure +.Sh SYNOPSIS +.Nm +.Sh DESCRIPTION +.Nm +returns a status code indicating failure. +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/false.c b/util/sbase/false.c new file mode 100644 index 00000000..fce3fd98 --- /dev/null +++ b/util/sbase/false.c @@ -0,0 +1,6 @@ +/* See LICENSE file for copyright and license details. */ +int +main(void) +{ + return 1; +} diff --git a/util/sbase/find.1 b/util/sbase/find.1 new file mode 100644 index 00000000..00f26306 --- /dev/null +++ b/util/sbase/find.1 @@ -0,0 +1,151 @@ +.Dd July 30, 2025 +.Dt FIND 1 +.Os sbase +.Sh NAME +.Nm find +.Nd find files +.Sh SYNOPSIS +.Nm +.Op Fl H | L +.Ar path Op ... +.Op Ar expression +.Sh DESCRIPTION +.Nm +walks a file hierarchy starting at each +.Ar path +and applies the +.Ar expression +to each file encountered. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl H +Dereference symbolic links provided as +.Ar path . +.It Fl L +Dereference all symbolic links encountered. +.El +.Sh EXTENDED DESCRIPTION +.Ar expression +is a combination of the following primaries and boolean operators. +In the following descriptions the number n can be replaced by +n, n, or +-n, to mean more than, exactly, or less than n respectively. +.Ss Primaries +.Bl -tag -width Ds +.It Fl name Ar pattern +True if the name of the file matches the given pattern. +.It Fl path Ar pattern +True if the path to the file matches the given pattern. +.It Fl nouser +True if the file belongs to a user for which +.Xr getpwuid 3 +returns NULL. +.It Fl nogroup +True if the file belongs to a group for which +.Xr getgrgid 3 +returns NULL. +.It Fl xdev +True. +Do not enter directory on a different device. +.It Fl prune +True. +Do not enter directory. +.It Fl perm Ar mode +True if permissions on the file match mode. +Mode is a symbolic mode as used in chmod. +A leading '-' in mode checks that at least all bits in mode are set in +permissions for file. +Without the leading '-' the permissions for file must exactly match +mode. +.It Fl type Ar t +True if file is of type specified by +.Ar t . +.Bl -tag -width Ds +.It Ar b +block special +.It Ar c +character special +.It Ar d +directory +.It Ar l +symbolic link +.It Ar p +FIFO +.It Ar f +regular file +.It Ar s +socket +.El +.It Fl links Ar n +True if file has +.Ar n +links. +.It Fl user Ar name +True if file belongs to user +.Ar name . +.It Fl group Ar name +True if file belongs to group +.Ar name . +.It Fl size Ar n[c] +True if file size in 512 byte sectors (rounded up), or bytes (if +.Ar c +is given), is +.Ar n . +.It Fl atime n +True if file access time is +.Ar n +days. +.It Fl ctime +True if file status change time is +.Ar n +days. +.It Fl mtime +True if file modified time is +.Ar n +days. +.It Fl exec Ar cmd [arg ...] \&; +Execute cmd with given arguments, replacing each {} in argument list +with the current file. +True if cmd exits with status 0. +.It Fl exec Ar cmd [arg ...] {} + +True. +Add as many files as possible to argument list and execute when the list +is full or all files have been found. +.It Fl ok Ar cmd [arg ...] \&; +Prompt the user on each file encountered whether or not to execute cmd +as with -exec. +True if the user responds yes and cmd exits with status 0, false +otherwise. +.It Fl print +True. +Print the current pathname followed by a newline ('\en') character. +.It Fl print0 +True. +Print the current pathname followed by a NUL ('\e0') character. +.It Fl newer Ar file +True if the modification time of the current file is newer than that of +the provided file. +.It Fl depth +True. +Causes find to evaluate files within in a directory before the directory +itself. +.El +.Ss Operators +In order of decreasing precedence +.Bl -tag -width Ds +.It Ar \&( expression \&) +True if expression is true. +.It Ar \&! expression +True if expression if false. +.It Ar expression [ Fl a ] Ar expression +True if both expressions are true. +Second expression is not evaluated if first expression is false. +.Fl a +is implied if there is no operator between primaries. +.It Ar expression Fl o Ar expression +True if either expression is true. +Second expression is not evaluated if first expression is true. +.El +.Pp +If no expression is supplied, -print is used. +If an expression is supplied but none of -print, -exec, or -ok is +supplied, then -a -print is appended to the expressions. diff --git a/util/sbase/find.c b/util/sbase/find.c new file mode 100644 index 00000000..5bc1a1f1 --- /dev/null +++ b/util/sbase/find.c @@ -0,0 +1,1103 @@ +/* See LICENSE file for copyright and license details. */ +#include <dirent.h> +#include <errno.h> +#include <fnmatch.h> +#include <grp.h> +#include <libgen.h> +#include <pwd.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <time.h> +#include <unistd.h> + +#include <sys/stat.h> +#include <sys/wait.h> + +#include "util.h" + +/* because putting integers in pointers is undefined by the standard */ +union extra { + void *p; + intmax_t i; +}; + +/* Argument passed into a primary's function */ +struct arg { + char *path; + struct stat *st; + union extra extra; +}; + +/* Information about each primary, for lookup table */ +struct pri_info { + char *name; + int (*func)(struct arg *arg); + char **(*getarg)(char **argv, union extra *extra); + void (*freearg)(union extra extra); + char narg; /* -xdev, -depth, -print don't take args but have getarg() */ +}; + +/* Information about operators, for lookup table */ +struct op_info { + char *name; /* string representation of op */ + char type; /* from tok.type */ + char prec; /* precedence */ + char nargs; /* number of arguments (unary or binary) */ + char lassoc; /* left associative */ +}; + +/* Token when lexing/parsing + * (although also used for the expression tree) */ +struct tok { + struct tok *left, *right; /* if (type == NOT) left = NULL */ + union extra extra; + union { + struct pri_info *pinfo; /* if (type == PRIM) */ + struct op_info *oinfo; + } u; + enum { + PRIM = 0, LPAR, RPAR, NOT, AND, OR, END + } type; +}; + +/* structures used for arg.extra.p and tok.extra.p */ +struct permarg { + mode_t mode; + char exact; +}; + +struct okarg { + char ***braces; + char **argv; +}; + +/* for all arguments that take a number + * +n, n, -n mean > n, == n, < n respectively */ +struct narg { + int (*cmp)(int a, int b); + int n; +}; + +struct sizearg { + struct narg n; + char bytes; /* size is in bytes, not 512 byte sectors */ +}; + +struct execarg { + union { + struct { + char ***braces; /* NULL terminated list of pointers into argv where {} were */ + } s; /* semicolon */ + struct { + size_t arglen; /* number of bytes in argv before files are added */ + size_t filelen; /* numer of bytes in file names added to argv */ + size_t first; /* index one past last arg, where first file goes */ + size_t next; /* index where next file goes */ + size_t cap; /* capacity of argv */ + } p; /* plus */ + } u; + char **argv; /* NULL terminated list of arguments (allocated if isplus) */ + char isplus; /* -exec + instead of -exec ; */ +}; + +/* used to find loops while recursing through directory structure */ +struct findhist { + struct findhist *next; + char *path; + dev_t dev; + ino_t ino; +}; + +/* Utility */ +static int spawn(char *argv[]); +static int do_stat(char *path, struct stat *sb, struct findhist *hist); + +/* Primaries */ +static int pri_name (struct arg *arg); +static int pri_path (struct arg *arg); +static int pri_nouser (struct arg *arg); +static int pri_nogroup(struct arg *arg); +static int pri_xdev (struct arg *arg); +static int pri_prune (struct arg *arg); +static int pri_perm (struct arg *arg); +static int pri_type (struct arg *arg); +static int pri_links (struct arg *arg); +static int pri_user (struct arg *arg); +static int pri_group (struct arg *arg); +static int pri_size (struct arg *arg); +static int pri_atime (struct arg *arg); +static int pri_ctime (struct arg *arg); +static int pri_mtime (struct arg *arg); +static int pri_exec (struct arg *arg); +static int pri_ok (struct arg *arg); +static int pri_print (struct arg *arg); +static int pri_print0 (struct arg *arg); +static int pri_newer (struct arg *arg); +static int pri_depth (struct arg *arg); + +/* Getargs */ +static char **get_name_arg (char *argv[], union extra *extra); +static char **get_path_arg (char *argv[], union extra *extra); +static char **get_xdev_arg (char *argv[], union extra *extra); +static char **get_perm_arg (char *argv[], union extra *extra); +static char **get_type_arg (char *argv[], union extra *extra); +static char **get_n_arg (char *argv[], union extra *extra); +static char **get_user_arg (char *argv[], union extra *extra); +static char **get_group_arg(char *argv[], union extra *extra); +static char **get_size_arg (char *argv[], union extra *extra); +static char **get_exec_arg (char *argv[], union extra *extra); +static char **get_ok_arg (char *argv[], union extra *extra); +static char **get_print_arg(char *argv[], union extra *extra); +static char **get_newer_arg(char *argv[], union extra *extra); +static char **get_depth_arg(char *argv[], union extra *extra); + +/* Freeargs */ +static void free_extra (union extra extra); +static void free_exec_arg(union extra extra); +static void free_ok_arg (union extra extra); + +/* Parsing/Building/Running */ +static void fill_narg(char *s, struct narg *n); +static struct pri_info *find_primary(char *name); +static struct op_info *find_op(char *name); +static void parse(int argc, char **argv); +static int eval(struct tok *tok, struct arg *arg); +static void find(char *path, struct findhist *hist); +static void usage(void); + +/* for comparisons with narg */ +static int cmp_gt(int a, int b) { return a > b; } +static int cmp_eq(int a, int b) { return a == b; } +static int cmp_lt(int a, int b) { return a < b; } + +/* order from find(1p), may want to alphabetize */ +static struct pri_info primaries[] = { + { "-name" , pri_name , get_name_arg , NULL , 1 }, + { "-path" , pri_path , get_path_arg , NULL , 1 }, + { "-nouser" , pri_nouser , NULL , NULL , 1 }, + { "-nogroup", pri_nogroup, NULL , NULL , 1 }, + { "-xdev" , pri_xdev , get_xdev_arg , NULL , 0 }, + { "-prune" , pri_prune , NULL , NULL , 1 }, + { "-perm" , pri_perm , get_perm_arg , free_extra , 1 }, + { "-type" , pri_type , get_type_arg , NULL , 1 }, + { "-links" , pri_links , get_n_arg , free_extra , 1 }, + { "-user" , pri_user , get_user_arg , NULL , 1 }, + { "-group" , pri_group , get_group_arg, NULL , 1 }, + { "-size" , pri_size , get_size_arg , free_extra , 1 }, + { "-atime" , pri_atime , get_n_arg , free_extra , 1 }, + { "-ctime" , pri_ctime , get_n_arg , free_extra , 1 }, + { "-mtime" , pri_mtime , get_n_arg , free_extra , 1 }, + { "-exec" , pri_exec , get_exec_arg , free_exec_arg, 1 }, + { "-ok" , pri_ok , get_ok_arg , free_ok_arg , 1 }, + { "-print" , pri_print , get_print_arg, NULL , 0 }, + { "-print0" , pri_print0 , get_print_arg, NULL , 0 }, + { "-newer" , pri_newer , get_newer_arg, NULL , 1 }, + { "-depth" , pri_depth , get_depth_arg, NULL , 0 }, + + { NULL, NULL, NULL, NULL, 0 } +}; + +static struct op_info ops[] = { + { "(" , LPAR, 0, 0, 0 }, /* parens are handled specially */ + { ")" , RPAR, 0, 0, 0 }, + { "!" , NOT , 3, 1, 0 }, + { "-a", AND , 2, 2, 1 }, + { "-o", OR , 1, 2, 1 }, + + { NULL, 0, 0, 0, 0 } +}; + +extern char **environ; + +static struct tok *toks; /* holds allocated array of all toks created while parsing */ +static struct tok *root; /* points to root of expression tree, inside toks array */ + +static struct timespec start; /* time find was started, used for -[acm]time */ + +static size_t envlen; /* number of bytes in environ, used to calculate against ARG_MAX */ +static size_t argmax; /* value of ARG_MAX retrieved using sysconf(3p) */ + +static struct { + char ret ; /* return value from main */ + char depth; /* -depth, directory contents before directory itself */ + char h ; /* -H, follow symlinks on command line */ + char l ; /* -L, follow all symlinks (command line and search) */ + char prune; /* hit -prune */ + char xdev ; /* -xdev, prune directories on different devices */ + char print; /* whether we will need -print when parsing */ +} gflags; + +/* + * Utility + */ +static int +spawn(char *argv[]) +{ + pid_t pid; + int status; + + /* flush stdout so that -print output always appears before + * any output from the command and does not get cut-off in + * the middle of a line. */ + fflush(stdout); + + switch((pid = fork())) { + case -1: + eprintf("fork:"); + case 0: + execvp(*argv, argv); + weprintf("exec %s failed:", *argv); + _exit(1); + } + + /* FIXME: proper course of action for waitpid() on EINTR? */ + waitpid(pid, &status, 0); + return status; +} + +static int +do_stat(char *path, struct stat *sb, struct findhist *hist) +{ + if (gflags.l || (gflags.h && !hist)) { + if (stat(path, sb) == 0) { + return 0; + } else if (errno != ENOENT && errno != ENOTDIR) { + return -1; + } + } + + return lstat(path, sb); +} + +/* + * Primaries + */ +static int +pri_name(struct arg *arg) +{ + int ret; + char *path; + + path = estrdup(arg->path); + ret = !fnmatch((char *)arg->extra.p, basename(path), 0); + free(path); + + return ret; +} + +static int +pri_path(struct arg *arg) +{ + return !fnmatch((char *)arg->extra.p, arg->path, 0); +} + +/* FIXME: what about errors? find(1p) literally just says + * "for which the getpwuid() function ... returns NULL" */ +static int +pri_nouser(struct arg *arg) +{ + return !getpwuid(arg->st->st_uid); +} + +static int +pri_nogroup(struct arg *arg) +{ + return !getgrgid(arg->st->st_gid); +} + +static int +pri_xdev(struct arg *arg) +{ + return 1; +} + +static int +pri_prune(struct arg *arg) +{ + return gflags.prune = 1; +} + +static int +pri_perm(struct arg *arg) +{ + struct permarg *p = (struct permarg *)arg->extra.p; + + return (arg->st->st_mode & 07777 & (p->exact ? -1U : p->mode)) == p->mode; +} + +static int +pri_type(struct arg *arg) +{ + switch ((char)arg->extra.i) { + default : return 0; /* impossible, but placate warnings */ + case 'b': return S_ISBLK (arg->st->st_mode); + case 'c': return S_ISCHR (arg->st->st_mode); + case 'd': return S_ISDIR (arg->st->st_mode); + case 'l': return S_ISLNK (arg->st->st_mode); + case 'p': return S_ISFIFO(arg->st->st_mode); + case 'f': return S_ISREG (arg->st->st_mode); + case 's': return S_ISSOCK(arg->st->st_mode); + } +} + +static int +pri_links(struct arg *arg) +{ + struct narg *n = arg->extra.p; + return n->cmp(arg->st->st_nlink, n->n); +} + +static int +pri_user(struct arg *arg) +{ + return arg->st->st_uid == (uid_t)arg->extra.i; +} + +static int +pri_group(struct arg *arg) +{ + return arg->st->st_gid == (gid_t)arg->extra.i; +} + +static int +pri_size(struct arg *arg) +{ + struct sizearg *s = arg->extra.p; + off_t size = arg->st->st_size; + + if (!s->bytes) + size = size / 512 + !!(size % 512); + + return s->n.cmp(size, s->n.n); +} + +/* FIXME: ignoring nanoseconds in atime, ctime, mtime */ +static int +pri_atime(struct arg *arg) +{ + struct narg *n = arg->extra.p; + return n->cmp((start.tv_sec - arg->st->st_atime) / 86400, n->n); +} + +static int +pri_ctime(struct arg *arg) +{ + struct narg *n = arg->extra.p; + return n->cmp((start.tv_sec - arg->st->st_ctime) / 86400, n->n); +} + +static int +pri_mtime(struct arg *arg) +{ + struct narg *n = arg->extra.p; + return n->cmp((start.tv_sec - arg->st->st_mtime) / 86400, n->n); +} + +static int +pri_exec(struct arg *arg) +{ + int status; + size_t len; + char **sp, ***brace; + struct execarg *e = arg->extra.p; + + if (e->isplus) { + len = strlen(arg->path) + 1; + + /* if we reached ARG_MAX, fork, exec, wait, free file names, reset list */ + if (len + e->u.p.arglen + e->u.p.filelen + envlen > argmax) { + e->argv[e->u.p.next] = NULL; + + status = spawn(e->argv); + gflags.ret = gflags.ret || status; + + for (sp = e->argv + e->u.p.first; *sp; sp++) + free(*sp); + + e->u.p.next = e->u.p.first; + e->u.p.filelen = 0; + } + + /* if we have too many files, realloc (with space for NULL termination) */ + if (e->u.p.next + 1 == e->u.p.cap) + e->argv = ereallocarray(e->argv, e->u.p.cap *= 2, sizeof(*e->argv)); + + e->argv[e->u.p.next++] = estrdup(arg->path); + e->u.p.filelen += len + sizeof(arg->path); + + return 1; + } else { + /* insert path everywhere user gave us {} */ + for (brace = e->u.s.braces; *brace; brace++) + **brace = arg->path; + + status = spawn(e->argv); + return !status; + } +} + +static int +pri_ok(struct arg *arg) +{ + int status, reply; + char ***brace, c; + struct okarg *o = arg->extra.p; + + fprintf(stderr, "%s: %s ? ", *o->argv, arg->path); + reply = fgetc(stdin); + + /* throw away rest of line */ + while ((c = fgetc(stdin)) != '\n' && c != EOF) + /* FIXME: what if the first character of the rest of the line is a null + * byte? */ + ; + + if (feof(stdin)) /* FIXME: ferror()? */ + clearerr(stdin); + + if (reply != 'y' && reply != 'Y') + return 0; + + /* insert filename everywhere user gave us {} */ + for (brace = o->braces; *brace; brace++) + **brace = arg->path; + + status = spawn(o->argv); + return !!status; +} + +static int +pri_print(struct arg *arg) +{ + if (puts(arg->path) == EOF) + eprintf("puts failed:"); + return 1; +} + +static int +pri_print0(struct arg *arg) +{ + if (fwrite(arg->path, strlen(arg->path) + 1, 1, stdout) != 1) + eprintf("fwrite failed:"); + return 1; +} + +/* FIXME: ignoring nanoseconds */ +static int +pri_newer(struct arg *arg) +{ + return arg->st->st_mtime > (time_t)arg->extra.i; +} + +static int +pri_depth(struct arg *arg) +{ + return 1; +} + +/* + * Getargs + * consume any arguments for given primary and fill extra + * return pointer to last argument, the pointer will be incremented in parse() + */ +static char ** +get_name_arg(char *argv[], union extra *extra) +{ + extra->p = *argv; + return argv; +} + +static char ** +get_path_arg(char *argv[], union extra *extra) +{ + extra->p = *argv; + return argv; +} + +static char ** +get_xdev_arg(char *argv[], union extra *extra) +{ + gflags.xdev = 1; + return argv; +} + +static char ** +get_perm_arg(char *argv[], union extra *extra) +{ + mode_t mask; + struct permarg *p = extra->p = emalloc(sizeof(*p)); + + if (**argv == '-') + (*argv)++; + else + p->exact = 1; + + mask = umask(0); + umask(mask); + + p->mode = parsemode(*argv, 0, mask); + + return argv; +} + +static char ** +get_type_arg(char *argv[], union extra *extra) +{ + if (!strchr("bcdlpfs", **argv)) + eprintf("invalid type %c for -type primary\n", **argv); + + extra->i = **argv; + return argv; +} + +static char ** +get_n_arg(char *argv[], union extra *extra) +{ + struct narg *n = extra->p = emalloc(sizeof(*n)); + fill_narg(*argv, n); + return argv; +} + +static char ** +get_user_arg(char *argv[], union extra *extra) +{ + char *end; + struct passwd *p = getpwnam(*argv); + + if (p) { + extra->i = p->pw_uid; + } else { + extra->i = strtol(*argv, &end, 10); + if (end == *argv || *end) + eprintf("unknown user '%s'\n", *argv); + } + return argv; +} + +static char ** +get_group_arg(char *argv[], union extra *extra) +{ + char *end; + struct group *g = getgrnam(*argv); + + if (g) { + extra->i = g->gr_gid; + } else { + extra->i = strtol(*argv, &end, 10); + if (end == *argv || *end) + eprintf("unknown group '%s'\n", *argv); + } + return argv; +} + +static char ** +get_size_arg(char *argv[], union extra *extra) +{ + char *p = *argv + strlen(*argv); + struct sizearg *s = extra->p = emalloc(sizeof(*s)); + /* if the number is followed by 'c', the size will by in bytes */ + if ((s->bytes = (p > *argv && *--p == 'c'))) + *p = '\0'; + + fill_narg(*argv, &s->n); + return argv; +} + +static char ** +get_exec_arg(char *argv[], union extra *extra) +{ + char **arg, **new, ***braces; + int nbraces = 0; + struct execarg *e = extra->p = emalloc(sizeof(*e)); + + for (arg = argv; *arg; arg++) + if (!strcmp(*arg, ";")) + break; + else if (arg > argv && !strcmp(*(arg - 1), "{}") && !strcmp(*arg, "+")) + break; + else if (!strcmp(*arg, "{}")) + nbraces++; + + if (!*arg) + eprintf("no terminating ; or {} + for -exec primary\n"); + + e->isplus = **arg == '+'; + *arg = NULL; + + if (e->isplus) { + *(arg - 1) = NULL; /* don't need the {} in there now */ + e->u.p.arglen = e->u.p.filelen = 0; + e->u.p.first = e->u.p.next = arg - argv - 1; + e->u.p.cap = (arg - argv) * 2; + e->argv = ereallocarray(NULL, e->u.p.cap, sizeof(*e->argv)); + + for (arg = argv, new = e->argv; *arg; arg++, new++) { + *new = *arg; + e->u.p.arglen += strlen(*arg) + 1 + sizeof(*arg); + } + arg++; /* due to our extra NULL */ + } else { + e->argv = argv; + e->u.s.braces = ereallocarray(NULL, ++nbraces, sizeof(*e->u.s.braces)); /* ++ for NULL */ + + for (arg = argv, braces = e->u.s.braces; *arg; arg++) + if (!strcmp(*arg, "{}")) + *braces++ = arg; + *braces = NULL; + } + gflags.print = 0; + return arg; +} + +static char ** +get_ok_arg(char *argv[], union extra *extra) +{ + char **arg, ***braces; + int nbraces = 0; + struct okarg *o = extra->p = emalloc(sizeof(*o)); + + for (arg = argv; *arg; arg++) + if (!strcmp(*arg, ";")) + break; + else if (!strcmp(*arg, "{}")) + nbraces++; + + if (!*arg) + eprintf("no terminating ; for -ok primary\n"); + *arg = NULL; + + o->argv = argv; + o->braces = ereallocarray(NULL, ++nbraces, sizeof(*o->braces)); + + for (arg = argv, braces = o->braces; *arg; arg++) + if (!strcmp(*arg, "{}")) + *braces++ = arg; + *braces = NULL; + + gflags.print = 0; + return arg; +} + +static char ** +get_print_arg(char *argv[], union extra *extra) +{ + gflags.print = 0; + return argv; +} + +/* FIXME: ignoring nanoseconds */ +static char ** +get_newer_arg(char *argv[], union extra *extra) +{ + struct stat st; + + if (do_stat(*argv, &st, NULL)) + eprintf("failed to stat '%s':", *argv); + + extra->i = st.st_mtime; + return argv; +} + +static char ** +get_depth_arg(char *argv[], union extra *extra) +{ + gflags.depth = 1; + return argv; +} + +/* + * Freeargs + */ +static void +free_extra(union extra extra) +{ + free(extra.p); +} + +static void +free_exec_arg(union extra extra) +{ + int status; + char **arg; + struct execarg *e = extra.p; + + if (!e->isplus) { + free(e->u.s.braces); + } else { + e->argv[e->u.p.next] = NULL; + + /* if we have files, do the last exec */ + if (e->u.p.first != e->u.p.next) { + status = spawn(e->argv); + gflags.ret = gflags.ret || status; + } + for (arg = e->argv + e->u.p.first; *arg; arg++) + free(*arg); + free(e->argv); + } + free(e); +} + +static void +free_ok_arg(union extra extra) +{ + struct okarg *o = extra.p; + + free(o->braces); + free(o); +} + +/* + * Parsing/Building/Running + */ +static void +fill_narg(char *s, struct narg *n) +{ + char *end; + + switch (*s) { + case '+': n->cmp = cmp_gt; s++; break; + case '-': n->cmp = cmp_lt; s++; break; + default : n->cmp = cmp_eq; break; + } + n->n = strtol(s, &end, 10); + if (end == s || *end) + eprintf("bad number '%s'\n", s); +} + +static struct pri_info * +find_primary(char *name) +{ + struct pri_info *p; + + for (p = primaries; p->name; p++) + if (!strcmp(name, p->name)) + return p; + return NULL; +} + +static struct op_info * +find_op(char *name) +{ + struct op_info *o; + + for (o = ops; o->name; o++) + if (!strcmp(name, o->name)) + return o; + return NULL; +} + +/* given the expression from the command line + * 1) convert arguments from strings to tok and place in an array duplicating + * the infix expression given, inserting "-a" where it was omitted + * 2) allocate an array to hold the correct number of tok, and convert from + * infix to rpn (using shunting-yard), add -a and -print if necessary + * 3) evaluate the rpn filling in left and right pointers to create an + * expression tree (tok are still all contained in the rpn array, just + * pointing at eachother) + */ +static void +parse(int argc, char **argv) +{ + struct tok *tok, *rpn, *out, **top, *infix, **stack; + struct op_info *op; + struct pri_info *pri; + char **arg; + int lasttype = -1; + size_t ntok = 0; + struct tok and = { .u.oinfo = find_op("-a"), .type = AND }; + + gflags.print = 1; + + /* convert argv to infix expression of tok, inserting in *tok */ + infix = ereallocarray(NULL, 2 * argc + 1, sizeof(*infix)); + for (arg = argv, tok = infix; *arg; arg++, tok++) { + pri = find_primary(*arg); + + if (pri) { /* token is a primary, fill out tok and get arguments */ + if (lasttype == PRIM || lasttype == RPAR) { + *tok++ = and; + ntok++; + } + if (pri->getarg) { + if (pri->narg && !*++arg) + eprintf("no argument for primary %s\n", pri->name); + arg = pri->getarg(arg, &tok->extra); + } + tok->u.pinfo = pri; + tok->type = PRIM; + } else if ((op = find_op(*arg))) { /* token is an operator */ + if (lasttype == LPAR && op->type == RPAR) + eprintf("empty parens\n"); + if ((lasttype == PRIM || lasttype == RPAR) && + (op->type == NOT || op->type == LPAR)) { /* need another implicit -a */ + *tok++ = and; + ntok++; + } + tok->type = op->type; + tok->u.oinfo = op; + } else { + /* token is neither primary nor operator, must be */ + if ((*arg)[0] == '-') /* an unsupported option */ + eprintf("unknown operand: %s\n", *arg); + else /* or a path in the wrong place */ + eprintf("paths must precede expression: %s\n", *arg); + } + if (tok->type != LPAR && tok->type != RPAR) + ntok++; /* won't have parens in rpn */ + lasttype = tok->type; + } + tok->type = END; + ntok++; + + if (gflags.print && (arg != argv)) /* need to add -a -print (not just -print) */ + gflags.print++; + + /* use shunting-yard to convert from infix to rpn + * https://en.wikipedia.org/wiki/Shunting-yard_algorithm + * read from infix, resulting rpn ends up in rpn, next position in rpn is out + * push operators onto stack, next position in stack is top */ + rpn = ereallocarray(NULL, ntok + gflags.print, sizeof(*rpn)); + stack = ereallocarray(NULL, argc + gflags.print, sizeof(*stack)); + for (tok = infix, out = rpn, top = stack; tok->type != END; tok++) { + switch (tok->type) { + case PRIM: *out++ = *tok; break; + case LPAR: *top++ = tok; break; + case RPAR: + while (top-- > stack && (*top)->type != LPAR) + *out++ = **top; + if (top < stack) + eprintf("extra )\n"); + break; + default: + /* this expression can be simplified, but I decided copy the + * verbage from the wikipedia page in order to more clearly explain + * what's going on */ + while (top-- > stack && + (( tok->u.oinfo->lassoc && tok->u.oinfo->prec <= (*top)->u.oinfo->prec) || + (!tok->u.oinfo->lassoc && tok->u.oinfo->prec < (*top)->u.oinfo->prec))) + *out++ = **top; + + /* top now points to either an operator we didn't pop, or stack[-1] + * either way we need to increment it before using it, then + * increment again so the stack works */ + top++; + *top++ = tok; + break; + } + } + while (top-- > stack) { + if ((*top)->type == LPAR) + eprintf("extra (\n"); + *out++ = **top; + } + + /* if there was no expression, use -print + * if there was an expression but no -print, -exec, or -ok, add -a -print + * in rpn, not infix */ + if (gflags.print) + *out++ = (struct tok){ .u.pinfo = find_primary("-print"), .type = PRIM }; + if (gflags.print == 2) + *out++ = and; + + out->type = END; + + /* rpn now holds all operators and arguments in reverse polish notation + * values are pushed onto stack, operators pop values off stack into left + * and right pointers, pushing operator node back onto stack + * could probably just do this during shunting-yard, but this is simpler + * code IMO */ + for (tok = rpn, top = stack; tok->type != END; tok++) { + if (tok->type == PRIM) { + *top++ = tok; + } else { + if (top - stack < tok->u.oinfo->nargs) + eprintf("insufficient arguments for operator %s\n", tok->u.oinfo->name); + tok->right = *--top; + tok->left = tok->u.oinfo->nargs == 2 ? *--top : NULL; + *top++ = tok; + } + } + if (--top != stack) + eprintf("extra arguments\n"); + + toks = rpn; + root = *top; + + free(infix); + free(stack); +} + +/* for a primary, run and return result + * for an operator evaluate the left side of the tree, decide whether or not to + * evaluate the right based on the short-circuit boolean logic, return result + * NOTE: operator NOT has NULL left side, expression on right side + */ +static int +eval(struct tok *tok, struct arg *arg) +{ + int ret; + + if (!tok) + return 0; + + if (tok->type == PRIM) { + arg->extra = tok->extra; + return tok->u.pinfo->func(arg); + } + + ret = eval(tok->left, arg); + + if ((tok->type == AND && ret) || (tok->type == OR && !ret) || tok->type == NOT) + ret = eval(tok->right, arg); + + return ret ^ (tok->type == NOT); +} + +/* evaluate path, if it's a directory iterate through directory entries and + * recurse + */ +static void +find(char *path, struct findhist *hist) +{ + struct stat st; + DIR *dir; + struct dirent *de; + struct findhist *f, cur; + size_t namelen, pathcap = 0, len; + struct arg arg = { path, &st, { NULL } }; + char *p, *pathbuf = NULL; + + len = strlen(path) + 2; /* \0 and '/' */ + + if (do_stat(path, &st, hist) < 0) { + weprintf("failed to stat %s:", path); + gflags.ret = 1; + return; + } + + gflags.prune = 0; + + /* don't eval now iff we will hit the eval at the bottom which means + * 1. we are a directory 2. we have -depth 3. we don't have -xdev or we are + * on same device (so most of the time we eval here) */ + if (!S_ISDIR(st.st_mode) || + !gflags.depth || + (gflags.xdev && hist && st.st_dev != hist->dev)) + eval(root, &arg); + + if (!S_ISDIR(st.st_mode) || + gflags.prune || + (gflags.xdev && hist && st.st_dev != hist->dev)) + return; + + for (f = hist; f; f = f->next) { + if (f->dev == st.st_dev && f->ino == st.st_ino) { + weprintf("loop detected '%s' is '%s'\n", path, f->path); + gflags.ret = 1; + return; + } + } + cur.next = hist; + cur.path = path; + cur.dev = st.st_dev; + cur.ino = st.st_ino; + + if (!(dir = opendir(path))) { + weprintf("failed to opendir %s:", path); + gflags.ret = 1; + /* should we just ignore this since we hit an error? */ + if (gflags.depth) + eval(root, &arg); + return; + } + + while (errno = 0, (de = readdir(dir))) { + if (!strcmp(de->d_name, ".") || !strcmp(de->d_name, "..")) + continue; + namelen = strlen(de->d_name); + if (len + namelen > pathcap) { + pathcap = len + namelen; + pathbuf = erealloc(pathbuf, pathcap); + } + p = pathbuf + estrlcpy(pathbuf, path, pathcap); + if (*--p != '/') + estrlcat(pathbuf, "/", pathcap); + estrlcat(pathbuf, de->d_name, pathcap); + find(pathbuf, &cur); + } + free(pathbuf); + if (errno) { + weprintf("readdir %s:", path); + gflags.ret = 1; + closedir(dir); + return; + } + closedir(dir); + + if (gflags.depth) + eval(root, &arg); +} + +static void +usage(void) +{ + eprintf("usage: %s [-H | -L] path ... [expression ...]\n", argv0); +} + +int +main(int argc, char **argv) +{ + char **paths; + int npaths; + struct tok *t; + + ARGBEGIN { + case 'H': + gflags.h = 1; + gflags.l = 0; + break; + case 'L': + gflags.l = 1; + gflags.h = 0; + break; + default: + usage(); + } ARGEND + + paths = argv; + + for (; *argv && **argv != '-' && strcmp(*argv, "!") && strcmp(*argv, "("); argv++) + ; + + if (!(npaths = argv - paths)) + eprintf("must specify a path\n"); + + parse(argc - npaths, argv); + + /* calculate number of bytes in environ for -exec {} + ARG_MAX avoidance + * libc implementation defined whether null bytes, pointers, and alignment + * are counted, so count them */ + for (argv = environ; *argv; argv++) + envlen += strlen(*argv) + 1 + sizeof(*argv); + + if ((argmax = sysconf(_SC_ARG_MAX)) == (size_t)-1) + argmax = _POSIX_ARG_MAX; + + if (clock_gettime(CLOCK_REALTIME, &start) < 0) + weprintf("clock_gettime() failed:"); + + while (npaths--) + find(*paths++, NULL); + + for (t = toks; t->type != END; t++) + if (t->type == PRIM && t->u.pinfo->freearg) + t->u.pinfo->freearg(t->extra); + free(toks); + + gflags.ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return gflags.ret; +} diff --git a/util/sbase/flock.1 b/util/sbase/flock.1 new file mode 100644 index 00000000..9dfaf394 --- /dev/null +++ b/util/sbase/flock.1 @@ -0,0 +1,35 @@ +.Dd October 8, 2015 +.Dt FLOCK 1 +.Os sbase +.Sh NAME +.Nm flock +.Nd tool to manage locks on files +.Sh SYNOPSIS +.Nm +.Op Fl nosux +.Ar file +.Ar cmd Op arg ... +.Sh DESCRIPTION +.Nm +is used to manage advisory locks on open files. +It is commonly used to prevent long running cron jobs from running in +parallel. +If +.Ar file +does not exist, it will be created. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl n +Set non-blocking mode on the lock. +Fail immediately if the lock cannot be acquired. +.It Fl o +Close the file descriptor before exec to avoid having the exec'ed +program holding on to the lock. +.It Fl s +Acquire a shared lock. +.It Fl u +Release the lock. +.It Fl x +Acquire an exclusive lock. +This is the default. +.El diff --git a/util/sbase/flock.c b/util/sbase/flock.c new file mode 100644 index 00000000..fc2b6ed6 --- /dev/null +++ b/util/sbase/flock.c @@ -0,0 +1,82 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/file.h> +#include <sys/wait.h> + +#include <errno.h> +#include <fcntl.h> +#include <stdio.h> +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [-nosux] file cmd [arg ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int fd, status, savederrno, flags = LOCK_EX, nonblk = 0, oflag = 0; + pid_t pid; + + ARGBEGIN { + case 'n': + nonblk = LOCK_NB; + break; + case 'o': + oflag = 1; + break; + case 's': + flags = LOCK_SH; + break; + case 'u': + flags = LOCK_UN; + break; + case 'x': + flags = LOCK_EX; + break; + default: + usage(); + } ARGEND + + if (argc < 2) + usage(); + + if ((fd = open(*argv, O_RDONLY | O_CREAT, 0644)) < 0) + eprintf("open %s:", *argv); + + if (flock(fd, flags | nonblk)) { + if (nonblk && errno == EWOULDBLOCK) + return 1; + eprintf("flock:"); + } + + switch ((pid = fork())) { + case -1: + eprintf("fork:"); + case 0: + if (oflag && close(fd) < 0) + eprintf("close:"); + argv++; + execvp(*argv, argv); + savederrno = errno; + weprintf("execvp %s:", *argv); + _exit(126 + (savederrno == ENOENT)); + default: + break; + } + if (waitpid(pid, &status, 0) < 0) + eprintf("waitpid:"); + + if (close(fd) < 0) + eprintf("close:"); + + if (WIFSIGNALED(status)) + return 128 + WTERMSIG(status); + if (WIFEXITED(status)) + return WEXITSTATUS(status); + + return 0; +} diff --git a/util/sbase/fold.1 b/util/sbase/fold.1 new file mode 100644 index 00000000..3c2a3e80 --- /dev/null +++ b/util/sbase/fold.1 @@ -0,0 +1,39 @@ +.Dd October 8, 2015 +.Dt FOLD 1 +.Os sbase +.Sh NAME +.Nm fold +.Nd wrap lines to width +.Sh SYNOPSIS +.Nm +.Op Fl bs +.Op Fl w Ar num | Fl Ns Ar num +.Op Ar file ... +.Sh DESCRIPTION +.Nm +reads each +.Ar file +and prints its lines wrapped such that no line +exceeds a certain width. +If no file is given, +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl b +Count bytes rather than characters. +.It Fl s +If a line contains spaces, break +at the last space within width. +.It Fl w Ar num | Fl Ns Ar num +Break at +.Ar num +characters. +The default is 80. +.El +.Sh STANDARDS +POSIX.1-2013. +.Pp +The +.Op Fl Ns Ar num +syntax is an extension to that specification. diff --git a/util/sbase/fold.c b/util/sbase/fold.c new file mode 100644 index 00000000..6c7b9e7b --- /dev/null +++ b/util/sbase/fold.c @@ -0,0 +1,130 @@ +/* See LICENSE file for copyright and license details. */ +#include <ctype.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "text.h" +#include "util.h" +#include "utf.h" + +static int bflag = 0; +static int sflag = 0; +static size_t width = 80; + +static void +foldline(struct line *l, const char *fname) { + size_t i, col, last, spacesect, len; + Rune r; + int runelen; + + for (i = 0, last = 0, col = 0, spacesect = 0; i < l->len; i += runelen) { + if (col >= width && ((l->data[i] != '\r' && l->data[i] != '\b') || bflag)) { + if (bflag && col > width) + i -= runelen; /* never split a character */ + len = ((sflag && spacesect) ? spacesect : i) - last; + if (fwrite(l->data + last, 1, len, stdout) != len) + eprintf("fwrite <stdout>:"); + if (l->data[i] != '\n') + putchar('\n'); + if (sflag && spacesect) + i = spacesect; + last = i; + col = 0; + spacesect = 0; + } + runelen = charntorune(&r, l->data + i, l->len - i); + if (!runelen || r == Runeerror) + eprintf("charntorune: %s: invalid utf\n", fname); + if (sflag && isblankrune(r)) + spacesect = i + runelen; + if (!bflag && iscntrl(l->data[i])) { + switch(l->data[i]) { + case '\b': + col -= (col > 0); + break; + case '\r': + col = 0; + break; + case '\t': + col += (8 - (col % 8)); + if (col >= width) + i--; + break; + } + } else { + col += bflag ? runelen : 1; + } + } + if (l->len - last) + fwrite(l->data + last, 1, l->len - last, stdout); +} + +static void +fold(FILE *fp, const char *fname) +{ + static struct line line; + static size_t size = 0; + ssize_t len; + + while ((len = getline(&line.data, &size, fp)) > 0) { + line.len = len; + foldline(&line, fname); + } + if (ferror(fp)) + eprintf("getline %s:", fname); +} + +static void +usage(void) +{ + eprintf("usage: %s [-bs] [-w num | -num] [FILE ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + FILE *fp; + int ret = 0; + + ARGBEGIN { + case 'b': + bflag = 1; + break; + case 's': + sflag = 1; + break; + case 'w': + width = estrtonum(EARGF(usage()), 1, MIN(LLONG_MAX, SIZE_MAX)); + break; + ARGNUM: + if (!(width = ARGNUMF())) + eprintf("illegal width value, too small\n"); + break; + default: + usage(); + } ARGEND + + if (!argc) { + fold(stdin, "<stdin>"); + } else { + for (; *argv; argc--, argv++) { + if (!strcmp(*argv, "-")) { + *argv = "<stdin>"; + fp = stdin; + } else if (!(fp = fopen(*argv, "r"))) { + weprintf("fopen %s:", *argv); + ret = 1; + continue; + } + fold(fp, *argv); + if (fp != stdin && fshut(fp, *argv)) + ret = 1; + } + } + + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/fs.h b/util/sbase/fs.h new file mode 100644 index 00000000..fd647bb7 --- /dev/null +++ b/util/sbase/fs.h @@ -0,0 +1,47 @@ +/* See LICENSE file for copyright and license details. */ +#include <limits.h> +#include <sys/stat.h> +#include <sys/types.h> + +struct history { + struct history *prev; + dev_t dev; + ino_t ino; +}; + +struct recursor { + void (*fn)(int, const char *, struct stat *, void *, struct recursor *); + char path[PATH_MAX]; + size_t pathlen; + struct history *hist; + int depth; + int maxdepth; + int follow; + int flags; +}; + +enum { + SAMEDEV = 1 << 0, + DIRFIRST = 1 << 1, + SILENT = 1 << 2, + CONFIRM = 1 << 3, + IGNORE = 1 << 4, +}; + +extern int cp_aflag; +extern int cp_fflag; +extern int cp_iflag; +extern int cp_pflag; +extern int cp_rflag; +extern int cp_vflag; +extern int cp_follow; +extern int cp_status; + +extern int rm_status; + +extern int recurse_status; + +void recurse(int, const char *, void *, struct recursor *); + +int cp(const char *, const char *, int); +void rm(int, const char *, struct stat *st, void *, struct recursor *); diff --git a/util/sbase/getconf.1 b/util/sbase/getconf.1 new file mode 100644 index 00000000..e75abbb0 --- /dev/null +++ b/util/sbase/getconf.1 @@ -0,0 +1,57 @@ +.Dd October 8, 2015 +.Dt GETCONF 1 +.Os sbase +.Sh NAME +.Nm getconf +.Nd get configuration values +.Sh SYNOPSIS +.Nm +.Op Fl v Ar spec +.Ar var +.Ar [path] +.Sh DESCRIPTION +.Nm +writes the value of the variable +.Ar var +to stdout. +.sp +If +.Ar path +is given, +.Ar var +is matched against configuration values from +.Xr pathconf 3 . +If +.Ar path +is not given, +.Ar var +is matched against configuration values from +.Xr sysconf 3 , +.Xr confstr 3 +and limits.h (Minimum and Maximum). +.sp +If +.Ar var +is not defined, +.Nm +writes "undefined" to stdout. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl v Ar spec +Ignored. +.El +.Sh EXIT STATUS +.Bl -tag -width Ds +.It 0 +.Ar var +was matched and its value written successfully. +.It 1 +An error occured or +.Ar var +was invalid. +.El +.Sh STANDARDS +POSIX.1-2013. +Except for the +.Op Fl v +flag. diff --git a/util/sbase/getconf.c b/util/sbase/getconf.c new file mode 100644 index 00000000..ca3e186f --- /dev/null +++ b/util/sbase/getconf.c @@ -0,0 +1,108 @@ +/* See LICENSE file for copyright and license details. */ +#include <errno.h> +#include <unistd.h> +#include <limits.h> +#include <stdlib.h> +#include <string.h> + +#include "util.h" + +struct var { + const char *k; + long v; +}; + +#include "getconf.h" + +void +usage(void) +{ + eprintf("usage: %s [-v spec] var [path]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + size_t len; + long res; + int i; + char *str; + + ARGBEGIN { + case 'v': + /* ignore */ + EARGF(usage()); + break; + default: + usage(); + break; + } ARGEND + + if (argc == 1) { + /* sysconf */ + for (i = 0; i < LEN(sysconf_l); i++) { + if (strcmp(argv[0], sysconf_l[i].k)) + continue; + errno = 0; + if ((res = sysconf(sysconf_l[i].v)) < 0) { + if (errno) + eprintf("sysconf %ld:", sysconf_l[i].v); + puts("undefined"); + } else { + printf("%ld\n", res); + } + return fshut(stdout, "<stdout>"); + } + /* confstr */ + for (i = 0; i < LEN(confstr_l); i++) { + if (strcmp(argv[0], confstr_l[i].k)) + continue; + errno = 0; + if (!(len = confstr(confstr_l[i].v, NULL, 0))) { + if (errno) + eprintf("confstr %ld:", confstr_l[i].v); + puts("undefined"); + } else { + str = emalloc(len); + errno = 0; + if (!confstr(confstr_l[i].v, str, len)) { + if (errno) + eprintf("confstr %ld:", confstr_l[i].v); + puts("undefined"); + } else { + puts(str); + } + free(str); + } + return fshut(stdout, "<stdout>"); + } + /* limits */ + for (i = 0; i < LEN(limits_l); i++) { + if (strcmp(argv[0], limits_l[i].k)) + continue; + printf("%ld\n", limits_l[i].v); + return fshut(stdout, "<stdout>"); + } + } else if (argc == 2) { + /* pathconf */ + for (i = 0; i < LEN(pathconf_l); i++) { + if (strcmp(argv[0], pathconf_l[i].k)) + continue; + errno = 0; + if ((res = pathconf(argv[1], pathconf_l[i].v)) < 0) { + if (errno) + eprintf("pathconf %ld:", pathconf_l[i].v); + puts("undefined"); + } else { + printf("%ld\n", res); + } + return fshut(stdout, "<stdout>"); + } + } else { + usage(); + } + + eprintf("invalid variable: %s\n", argv[0]); + + return 0; +} diff --git a/util/sbase/grep.1 b/util/sbase/grep.1 new file mode 100644 index 00000000..9de0294a --- /dev/null +++ b/util/sbase/grep.1 @@ -0,0 +1,94 @@ +.Dd October 8, 2015 +.Dt GREP 1 +.Os sbase +.Sh NAME +.Nm grep +.Nd search files for patterns +.Sh SYNOPSIS +.Nm +.Op Fl EFHchilnqsvx +.Op Fl e Ar pattern +.Op Fl f Ar file +.Op Ar pattern +.Op Ar file ... +.Sh DESCRIPTION +.Nm +searches the input files for lines that match the +.Ar pattern , +a regular expression as defined in +.Xr regex 7 or +.Xr re_format 7 . +By default each matching line is printed to stdout. +If no +.Ar file +is given +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl E +Match using extended regex. +.It Fl F +Match using fixed strings. +Treat each pattern specified as a string instead of a regular +expression. +.It Fl H +Prefix each matching line with its filename in the output. +This is the default when there is more than one file specified. +.It Fl c +Print only a count of matching lines. +.It Fl e Ar pattern +Specify a pattern used during the search of the input: an input +line is selected if it matches any of the specified patterns. +This option is most useful when multiple -e options are used to +specify multiple patterns, or when a pattern begins with a dash. +.It Fl f Ar file +Read one or more patterns from the file named by the pathname file. +Patterns in file shall be terminated by a <newline>. +A null pattern can be specified by an empty line in pattern_file. +Unless the -E or -F option is also specified, each pattern shall be +treated as a BRE. +(`-'). +.It Fl h +Do not prefix each line with 'filename:' prefix. +.It Fl i +Match lines case insensitively. +.It Fl l +Print only the names of files with matching lines. +.It Fl n +Prefix each matching line with its line number in the input. +.It Fl q +Print nothing, only return status. +.It Fl s +Suppress the error messages ordinarily written for nonexistent or unreadable +files. +.It Fl v +Select lines which do +.Sy not +match the pattern. +.It Fl w +The expression is searched for as a word (as if surrounded by '\\<' and '\\>'). +.It Fl x +Consider only input lines that use all characters in the line excluding the +terminating <newline> to match an entire fixed string or regular expression to +be matching lines. +.El +.Sh EXIT STATUS +.Bl -tag -width Ds +.It 0 +One or more lines were matched. +.It 1 +No lines were matched. +.It > 1 +An error occurred. +.El +.Sh SEE ALSO +.Xr sed 1 , +.Xr re_format 7 , +.Xr regex 7 +.Sh STANDARDS +POSIX.1-2013. +.Pp +The +.Op Fl Hhw +flags are an extension to that specification. diff --git a/util/sbase/grep.c b/util/sbase/grep.c new file mode 100644 index 00000000..1c978070 --- /dev/null +++ b/util/sbase/grep.c @@ -0,0 +1,290 @@ +/* See LICENSE file for copyright and license details. */ +#include <regex.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <strings.h> + +#include "queue.h" +#include "util.h" + +enum { Match = 0, NoMatch = 1, Error = 2 }; + +static void addpattern(const char *, size_t); +static void addpatternfile(FILE *); +static int grep(FILE *, const char *); + +static int Eflag; +static int Fflag; +static int Hflag; +static int eflag; +static int fflag; +static int hflag; +static int iflag; +static int sflag; +static int vflag; +static int wflag; +static int xflag; +static int many; +static int mode; + +struct pattern { + char *pattern; + regex_t preg; + SLIST_ENTRY(pattern) entry; +}; + +static SLIST_HEAD(phead, pattern) phead; + +static void +addpattern(const char *pattern, size_t patlen) +{ + struct pattern *pnode; + char *tmp; + int bol, eol; + size_t len; + + if (!patlen) + return; + + /* a null BRE/ERE matches every line */ + if (!Fflag) + if (pattern[0] == '\0') + pattern = "^"; + + if (!Fflag && xflag) { + tmp = enmalloc(Error, patlen + 3); + snprintf(tmp, patlen + 3, "%s%s%s", + pattern[0] == '^' ? "" : "^", + pattern, + pattern[patlen - 1] == '$' ? "" : "$"); + } else if (!Fflag && wflag) { + len = patlen + 5 + (Eflag ? 2 : 4); + tmp = enmalloc(Error, len); + + bol = eol = 0; + if (pattern[0] == '^') + bol = 1; + if (pattern[patlen - 1] == '$') + eol = 1; + + snprintf(tmp, len, "%s\\<%s%.*s%s\\>%s", + bol ? "^" : "", + Eflag ? "(" : "\\(", + (int)patlen - bol - eol, pattern + bol, + Eflag ? ")" : "\\)", + eol ? "$" : ""); + } else { + tmp = enstrdup(Error, pattern); + } + + pnode = enmalloc(Error, sizeof(*pnode)); + pnode->pattern = tmp; + SLIST_INSERT_HEAD(&phead, pnode, entry); +} + +static void +addpatternfile(FILE *fp) +{ + static char *buf = NULL; + static size_t size = 0; + ssize_t len = 0; + + while ((len = getline(&buf, &size, fp)) > 0) { + if (len > 0 && buf[len - 1] == '\n') + buf[len - 1] = '\0'; + addpattern(buf, (size_t)len); + } + if (ferror(fp)) + enprintf(Error, "read error:"); +} + +static int +grep(FILE *fp, const char *str) +{ + static char *buf = NULL; + static size_t size = 0; + ssize_t len = 0; + long c = 0, n; + struct pattern *pnode; + int match, result = NoMatch; + + for (n = 1; (len = getline(&buf, &size, fp)) > 0; n++) { + /* Remove the trailing newline if one is present. */ + if (len && buf[len - 1] == '\n') + buf[len - 1] = '\0'; + match = 0; + SLIST_FOREACH(pnode, &phead, entry) { + if (Fflag) { + if (xflag) { + if (!(iflag ? strcasecmp : strcmp)(buf, pnode->pattern)) { + match = 1; + break; + } + } else { + if ((iflag ? strcasestr : strstr)(buf, pnode->pattern)) { + match = 1; + break; + } + } + } else { + if (regexec(&pnode->preg, buf, 0, NULL, 0) == 0) { + match = 1; + break; + } + } + } + if (match != vflag) { + result = Match; + switch (mode) { + case 'c': + c++; + break; + case 'l': + puts(str); + goto end; + case 'q': + exit(Match); + default: + if (!hflag && (many || Hflag)) + printf("%s:", str); + if (mode == 'n') + printf("%ld:", n); + puts(buf); + break; + } + } + } + if (mode == 'c') + printf("%ld\n", c); +end: + if (ferror(fp)) { + weprintf("%s: read error:", str); + result = Error; + } + return result; +} + +static void +usage(void) +{ + enprintf(Error, "usage: %s [-EFHchilnqsvwx] [-e pattern] [-f file] " + "[pattern] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + struct pattern *pnode; + int m, flags = REG_NOSUB, match = NoMatch; + FILE *fp; + char *arg; + + SLIST_INIT(&phead); + + ARGBEGIN { + case 'E': + Eflag = 1; + Fflag = 0; + flags |= REG_EXTENDED; + break; + case 'F': + Fflag = 1; + Eflag = 0; + flags &= ~REG_EXTENDED; + break; + case 'H': + Hflag = 1; + hflag = 0; + break; + case 'e': + arg = EARGF(usage()); + if (!(fp = fmemopen(arg, strlen(arg) + 1, "r"))) + eprintf("fmemopen:"); + addpatternfile(fp); + efshut(fp, arg); + eflag = 1; + break; + case 'f': + arg = EARGF(usage()); + fp = fopen(arg, "r"); + if (!fp) + enprintf(Error, "fopen %s:", arg); + addpatternfile(fp); + efshut(fp, arg); + fflag = 1; + break; + case 'h': + hflag = 1; + Hflag = 0; + break; + case 'c': + case 'l': + case 'n': + case 'q': + mode = ARGC(); + break; + case 'i': + flags |= REG_ICASE; + iflag = 1; + break; + case 's': + sflag = 1; + break; + case 'v': + vflag = 1; + break; + case 'w': + wflag = 1; + break; + case 'x': + xflag = 1; + break; + default: + usage(); + } ARGEND + + if (argc == 0 && !eflag && !fflag) + usage(); /* no pattern */ + + /* just add literal pattern to list */ + if (!eflag && !fflag) { + if (!(fp = fmemopen(argv[0], strlen(argv[0]) + 1, "r"))) + eprintf("fmemopen:"); + addpatternfile(fp); + efshut(fp, argv[0]); + argc--; + argv++; + } + + if (!Fflag) + /* Compile regex for all search patterns */ + SLIST_FOREACH(pnode, &phead, entry) + enregcomp(Error, &pnode->preg, pnode->pattern, flags); + many = (argc > 1); + if (argc == 0) { + match = grep(stdin, "<stdin>"); + } else { + for (; *argv; argc--, argv++) { + if (!strcmp(*argv, "-")) { + *argv = "<stdin>"; + fp = stdin; + } else if (!(fp = fopen(*argv, "r"))) { + if (!sflag) + weprintf("fopen %s:", *argv); + match = Error; + continue; + } + m = grep(fp, *argv); + if (m == Error || (match != Error && m == Match)) + match = m; + if (fp != stdin && fshut(fp, *argv)) + match = Error; + } + } + + if (fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>")) + match = Error; + + return match; +} diff --git a/util/sbase/head.1 b/util/sbase/head.1 new file mode 100644 index 00000000..0bf3127f --- /dev/null +++ b/util/sbase/head.1 @@ -0,0 +1,40 @@ +.Dd October 8, 2015 +.Dt HEAD 1 +.Os sbase +.Sh NAME +.Nm head +.Nd display initial lines of files +.Sh SYNOPSIS +.Nm +.Op Fl n Ar num | Fl Ns Ar num +.Op Ar file ... +.Sh DESCRIPTION +.Nm +writes +.Ar num +lines of each +.Ar file +to stdout. +If no +.Ar file +is given +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl n Ar num | Fl Ns Ar num +Display initial +.Ar num +| +.Sy N +lines. +Default is 10. +.El +.Sh SEE ALSO +.Xr tail 1 +.Sh STANDARDS +POSIX.1-2013. +.Pp +The +.Op Fl Ns num +syntax is an extension to that specification. diff --git a/util/sbase/head.c b/util/sbase/head.c new file mode 100644 index 00000000..ae550c01 --- /dev/null +++ b/util/sbase/head.c @@ -0,0 +1,77 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "util.h" + +static void +head(FILE *fp, const char *fname, size_t n) +{ + char *buf = NULL; + size_t i = 0, size = 0; + ssize_t len; + + while (i < n && (len = getline(&buf, &size, fp)) > 0) { + fwrite(buf, 1, len, stdout); + i += (len && (buf[len - 1] == '\n')); + } + free(buf); + if (ferror(fp)) + eprintf("getline %s:", fname); +} + +static void +usage(void) +{ + eprintf("usage: %s [-num | -n num] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + size_t n = 10; + FILE *fp; + int ret = 0, newline = 0, many = 0; + + ARGBEGIN { + case 'n': + n = estrtonum(EARGF(usage()), 0, MIN(LLONG_MAX, SIZE_MAX)); + break; + ARGNUM: + n = ARGNUMF(); + break; + default: + usage(); + } ARGEND + + if (!argc) { + head(stdin, "<stdin>", n); + } else { + many = argc > 1; + for (newline = 0; *argv; argc--, argv++) { + if (!strcmp(*argv, "-")) { + *argv = "<stdin>"; + fp = stdin; + } else if (!(fp = fopen(*argv, "r"))) { + weprintf("fopen %s:", *argv); + ret = 1; + continue; + } + if (many) { + if (newline) + putchar('\n'); + printf("==> %s <==\n", *argv); + } + newline = 1; + head(fp, *argv, n); + if (fp != stdin && fshut(fp, *argv)) + ret = 1; + } + } + + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/hostname.1 b/util/sbase/hostname.1 new file mode 100644 index 00000000..601aef9d --- /dev/null +++ b/util/sbase/hostname.1 @@ -0,0 +1,18 @@ +.Dd October 8, 2015 +.Dt HOSTNAME 1 +.Os sbase +.Sh NAME +.Nm hostname +.Nd set or print host name +.Sh SYNOPSIS +.Nm +.Op Ar name +.Sh DESCRIPTION +.Nm +sets the current host name to +.Ar name . +If no +.Ar name +is given, the current host name is written to stdout. +.Sh SEE ALSO +.Xr hostname 7 diff --git a/util/sbase/hostname.c b/util/sbase/hostname.c new file mode 100644 index 00000000..2532ec8d --- /dev/null +++ b/util/sbase/hostname.c @@ -0,0 +1,36 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> +#include <string.h> +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [name]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + char host[HOST_NAME_MAX + 1]; + + ARGBEGIN { + default: + usage(); + } ARGEND + + if (!argc) { + if (gethostname(host, sizeof(host)) < 0) + eprintf("gethostname:"); + puts(host); + } else if (argc == 1) { + if (sethostname(argv[0], strlen(argv[0])) < 0) + eprintf("sethostname:"); + } else { + usage(); + } + + return fshut(stdout, "<stdout>"); +} diff --git a/util/sbase/join.1 b/util/sbase/join.1 new file mode 100644 index 00000000..6d1f4be1 --- /dev/null +++ b/util/sbase/join.1 @@ -0,0 +1,105 @@ +.Dd October 8, 2015 +.Dt JOIN 1 +.Os sbase +.Sh NAME +.Nm join +.Nd relational database operator +.Sh SYNOPSIS +.Nm +.Op Fl 1 Ar field +.Op Fl 2 Ar field +.Op Fl o Ar list +.Op Fl e Ar string +.Op Fl a Ar fileno | Fl v Ar fileno +.Op Fl t Ar delim +.Ar file1 file2 +.Sh DESCRIPTION +.Nm +lines from +.Ar file1 +and +.Ar file2 +on a matching field. +If one of the input files is '-', standard input is read for that file. +.Pp +Files are read sequentially and are assumed to be sorted on the join +field. +.Nm +does not check the order of input, and joining two unsorted files will +produce unexpected output. +.Pp +By default, input lines are matched on the first blank-separated +field; output lines are space-separated and consist of the join field +followed by the remaining fields from +.Ar file1 , +then the remaining fields from +.Ar file2 . +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl 1 Ar field +Join on the +.Ar field Ns th +field of file 1. +.It Fl 2 Ar field +Join on the +.Ar field Ns th +field of file 2. +.It Fl a Ar fileno +Print unpairable lines from file +.Ar fileno +in addition to normal output. +.It Fl e Ar string +When used with +.Fl o , +replace empty fields in the output list with +.Ar string . +.It Fl o Ar list +Format output according to the string +.Ar list . +Each element of +.Ar list +may be either +.Ar fileno.field +or 0 (representing the join field). +Elements in +.Ar list +may be separated by blanks or commas. +For example, +.Bd -literal -offset indent +join -o "0 2.1 1.3" +.Ed +.Pp +would print the join field, the first field of +.Ar file2 , +then the third field of +.Ar file1 . +.Pp +Only paired lines are formatted with the +.Fl o +option. +Unpairable lines (selected with +.Fl a +or +.Fl v ) +are printed raw. +.It Fl t Ar delim +Use the arbitrary string +.Ar delim +as field delimiter for both input and output. +.It Fl v Ar fileno +Print unpairable lines from file +.Ar fileno +instead of normal output. +.El +.Sh STANDARDS +POSIX.1-2013. +.Pp +With the following exception: +.Bl -bullet -offset indent +.It +Unpairable lines ignore formatting specified with +.Fl o . +.El +.Pp +The possibility of specifying multibyte delimiters of arbitrary +length is an extension to the specification. diff --git a/util/sbase/join.c b/util/sbase/join.c new file mode 100644 index 00000000..d3e23439 --- /dev/null +++ b/util/sbase/join.c @@ -0,0 +1,529 @@ +/* See LICENSE file for copyright and license details. */ +#include <ctype.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "text.h" +#include "utf.h" +#include "util.h" + +enum { + INIT = 1, + GROW = 2, +}; + +enum { + EXPAND = 0, + RESET = 1, +}; + +enum { FIELD_ERROR = -2, }; + +struct field { + char *s; + size_t len; +}; + +struct jline { + struct line text; + size_t nf; + size_t maxf; + struct field *fields; +}; + +struct spec { + size_t fileno; + size_t fldno; +}; + +struct outlist { + size_t ns; + size_t maxs; + struct spec **specs; +}; + +struct span { + size_t nl; + size_t maxl; + struct jline **lines; +}; + +static char *sep = NULL; +static char *replace = NULL; +static const char defaultofs = ' '; +static const int jfield = 1; /* POSIX default join field */ +static int unpairsa = 0, unpairsb = 0; +static int oflag = 0; +static int pairs = 1; +static size_t seplen; +static struct outlist output; + +static void +usage(void) +{ + eprintf("usage: %s [-1 field] [-2 field] [-o list] [-e string] " + "[-a | -v fileno] [-t delim] file1 file2\n", argv0); +} + +static void +prfield(struct field *fp) +{ + if (fwrite(fp->s, 1, fp->len, stdout) != fp->len) + eprintf("fwrite:"); +} + +static void +prsep(void) +{ + if (sep) + fwrite(sep, 1, seplen, stdout); + else + putchar(defaultofs); +} + +static void +swaplines(struct jline *la, struct jline *lb) +{ + struct jline tmp; + + tmp = *la; + *la = *lb; + *lb = tmp; +} + +static void +prjoin(struct jline *la, struct jline *lb, size_t jfa, size_t jfb) +{ + struct spec *sp; + struct field *joinfield; + size_t i; + + if (jfa >= la->nf || jfb >= lb->nf) + return; + + joinfield = &la->fields[jfa]; + + if (oflag) { + for (i = 0; i < output.ns; i++) { + sp = output.specs[i]; + + if (sp->fileno == 1) { + if (sp->fldno < la->nf) + prfield(&la->fields[sp->fldno]); + else if (replace) + fputs(replace, stdout); + } else if (sp->fileno == 2) { + if (sp->fldno < lb->nf) + prfield(&lb->fields[sp->fldno]); + else if (replace) + fputs(replace, stdout); + } else if (sp->fileno == 0) { + prfield(joinfield); + } + + if (i < output.ns - 1) + prsep(); + } + } else { + prfield(joinfield); + prsep(); + + for (i = 0; i < la->nf; i++) { + if (i != jfa) { + prfield(&la->fields[i]); + prsep(); + } + } + for (i = 0; i < lb->nf; i++) { + if (i != jfb) { + prfield(&lb->fields[i]); + if (i < lb->nf - 1) + prsep(); + } + } + } + putchar('\n'); +} + +static void +prline(struct jline *lp) +{ + if (fwrite(lp->text.data, 1, lp->text.len, stdout) != lp->text.len) + eprintf("fwrite:"); + putchar('\n'); +} + +static int +jlinecmp(struct jline *la, struct jline *lb, size_t jfa, size_t jfb) +{ + int status; + + /* return FIELD_ERROR if both lines are short */ + if (jfa >= la->nf) { + status = (jfb >= lb->nf) ? FIELD_ERROR : -1; + } else if (jfb >= lb->nf) { + status = 1; + } else { + status = memcmp(la->fields[jfa].s, lb->fields[jfb].s, + MAX(la->fields[jfa].len, lb->fields[jfb].len)); + LIMIT(status, -1, 1); + } + + return status; +} + +static void +addfield(struct jline *lp, char *sp, size_t len) +{ + if (lp->nf >= lp->maxf) { + lp->fields = ereallocarray(lp->fields, (GROW * lp->maxf), + sizeof(struct field)); + lp->maxf *= GROW; + } + lp->fields[lp->nf].s = sp; + lp->fields[lp->nf].len = len; + lp->nf++; +} + +static void +prspanjoin(struct span *spa, struct span *spb, size_t jfa, size_t jfb) +{ + size_t i, j; + + for (i = 0; i < (spa->nl - 1); i++) + for (j = 0; j < (spb->nl - 1); j++) + prjoin(spa->lines[i], spb->lines[j], jfa, jfb); +} + +static struct jline * +makeline(char *s, size_t len) +{ + struct jline *lp; + char *tmp; + size_t i, end; + + if (s[len - 1] == '\n') + s[--len] = '\0'; + + lp = ereallocarray(NULL, INIT, sizeof(struct jline)); + lp->text.data = s; + lp->text.len = len; + lp->fields = ereallocarray(NULL, INIT, sizeof(struct field)); + lp->nf = 0; + lp->maxf = INIT; + + for (i = 0; i < lp->text.len && isblank(lp->text.data[i]); i++) + ; + while (i < lp->text.len) { + if (sep) { + if ((lp->text.len - i) < seplen || + !(tmp = memmem(lp->text.data + i, + lp->text.len - i, sep, seplen))) { + goto eol; + } + end = tmp - lp->text.data; + addfield(lp, lp->text.data + i, end - i); + i = end + seplen; + } else { + for (end = i; !(isblank(lp->text.data[end])); end++) { + if (end + 1 == lp->text.len) + goto eol; + } + addfield(lp, lp->text.data + i, end - i); + for (i = end; isblank(lp->text.data[i]); i++) + ; + } + } +eol: + addfield(lp, lp->text.data + i, lp->text.len - i); + + return lp; +} + +static int +addtospan(struct span *sp, FILE *fp, int reset) +{ + char *newl = NULL; + ssize_t len; + size_t size = 0; + + if ((len = getline(&newl, &size, fp)) < 0) { + if (ferror(fp)) + eprintf("getline:"); + else + return 0; + } + + if (reset) + sp->nl = 0; + + if (sp->nl >= sp->maxl) { + sp->lines = ereallocarray(sp->lines, (GROW * sp->maxl), + sizeof(struct jline *)); + sp->maxl *= GROW; + } + + sp->lines[sp->nl] = makeline(newl, len); + sp->nl++; + return 1; +} + +static void +initspan(struct span *sp) +{ + sp->nl = 0; + sp->maxl = INIT; + sp->lines = ereallocarray(NULL, INIT, sizeof(struct jline *)); +} + +static void +freespan(struct span *sp) +{ + size_t i; + + for (i = 0; i < sp->nl; i++) { + free(sp->lines[i]->fields); + free(sp->lines[i]->text.data); + } + free(sp->lines); +} + +static void +initolist(struct outlist *olp) +{ + olp->ns = 0; + olp->maxs = 1; + olp->specs = ereallocarray(NULL, INIT, sizeof(struct spec *)); +} + +static void +addspec(struct outlist *olp, struct spec *sp) +{ + if (olp->ns >= olp->maxs) { + olp->specs = ereallocarray(olp->specs, (GROW * olp->maxs), + sizeof(struct spec *)); + olp->maxs *= GROW; + } + olp->specs[olp->ns] = sp; + olp->ns++; +} + +static struct spec * +makespec(char *s) +{ + struct spec *sp; + int fileno; + size_t fldno; + + if (!strcmp(s, "0")) { /* join field must be 0 and nothing else */ + fileno = 0; + fldno = 0; + } else if ((s[0] == '1' || s[0] == '2') && s[1] == '.') { + fileno = s[0] - '0'; + fldno = estrtonum(&s[2], 1, MIN(LLONG_MAX, SIZE_MAX)) - 1; + } else { + eprintf("%s: invalid format\n", s); + } + + sp = ereallocarray(NULL, INIT, sizeof(struct spec)); + sp->fileno = fileno; + sp->fldno = fldno; + return sp; +} + +static void +makeolist(struct outlist *olp, char *s) +{ + char *item, *sp; + sp = s; + + while (sp) { + item = sp; + sp = strpbrk(sp, ", \t"); + if (sp) + *sp++ = '\0'; + addspec(olp, makespec(item)); + } +} + +static void +freespecs(struct outlist *olp) +{ + size_t i; + + for (i = 0; i < olp->ns; i++) + free(olp->specs[i]); +} + +static void +join(FILE *fa, FILE *fb, size_t jfa, size_t jfb) +{ + struct span spa, spb; + int cmp, eofa, eofb; + + initspan(&spa); + initspan(&spb); + cmp = eofa = eofb = 0; + + addtospan(&spa, fa, RESET); + addtospan(&spb, fb, RESET); + + while (spa.nl && spb.nl) { + if ((cmp = jlinecmp(spa.lines[0], spb.lines[0], jfa, jfb)) < 0) { + if (unpairsa) + prline(spa.lines[0]); + if (!addtospan(&spa, fa, RESET)) { + if (unpairsb) { /* a is EOF'd; print the rest of b */ + do + prline(spb.lines[0]); + while (addtospan(&spb, fb, RESET)); + } + eofa = eofb = 1; + } else { + continue; + } + } else if (cmp > 0) { + if (unpairsb) + prline(spb.lines[0]); + if (!addtospan(&spb, fb, RESET)) { + if (unpairsa) { /* b is EOF'd; print the rest of a */ + do + prline(spa.lines[0]); + while (addtospan(&spa, fa, RESET)); + } + eofa = eofb = 1; + } else { + continue; + } + } else if (cmp == 0) { + /* read all consecutive matching lines from a */ + do { + if (!addtospan(&spa, fa, EXPAND)) { + eofa = 1; + spa.nl++; + break; + } + } while (jlinecmp(spa.lines[spa.nl-1], spb.lines[0], jfa, jfb) == 0); + + /* read all consecutive matching lines from b */ + do { + if (!addtospan(&spb, fb, EXPAND)) { + eofb = 1; + spb.nl++; + break; + } + } while (jlinecmp(spa.lines[0], spb.lines[spb.nl-1], jfa, jfb) == 0); + + if (pairs) + prspanjoin(&spa, &spb, jfa, jfb); + + } else { /* FIELD_ERROR: both lines lacked join fields */ + if (unpairsa) + prline(spa.lines[0]); + if (unpairsb) + prline(spb.lines[0]); + eofa = addtospan(&spa, fa, RESET) ? 0 : 1; + eofb = addtospan(&spb, fb, RESET) ? 0 : 1; + if (!eofa && !eofb) + continue; + } + + if (eofa) { + spa.nl = 0; + } else { + swaplines(spa.lines[0], spa.lines[spa.nl - 1]); /* ugly */ + spa.nl = 1; + } + + if (eofb) { + spb.nl = 0; + } else { + swaplines(spb.lines[0], spb.lines[spb.nl - 1]); /* ugly */ + spb.nl = 1; + } + } + freespan(&spa); + freespan(&spb); +} + + +int +main(int argc, char *argv[]) +{ + size_t jf[2] = { jfield, jfield, }; + FILE *fp[2]; + int ret = 0, n; + char *fno; + + ARGBEGIN { + case '1': + jf[0] = estrtonum(EARGF(usage()), 1, MIN(LLONG_MAX, SIZE_MAX)); + break; + case '2': + jf[1] = estrtonum(EARGF(usage()), 1, MIN(LLONG_MAX, SIZE_MAX)); + break; + case 'a': + fno = EARGF(usage()); + if (strcmp(fno, "1") == 0) + unpairsa = 1; + else if (strcmp(fno, "2") == 0) + unpairsb = 1; + else + usage(); + break; + case 'e': + replace = EARGF(usage()); + break; + case 'o': + oflag = 1; + initolist(&output); + makeolist(&output, EARGF(usage())); + break; + case 't': + sep = EARGF(usage()); + break; + case 'v': + pairs = 0; + fno = EARGF(usage()); + if (strcmp(fno, "1") == 0) + unpairsa = 1; + else if (strcmp(fno, "2") == 0) + unpairsb = 1; + else + usage(); + break; + default: + usage(); + } ARGEND + + if (sep) + seplen = unescape(sep); + + if (argc != 2) + usage(); + + for (n = 0; n < 2; n++) { + if (!strcmp(argv[n], "-")) { + argv[n] = "<stdin>"; + fp[n] = stdin; + } else if (!(fp[n] = fopen(argv[n], "r"))) { + eprintf("fopen %s:", argv[n]); + } + } + + jf[0]--; + jf[1]--; + + join(fp[0], fp[1], jf[0], jf[1]); + + if (oflag) + freespecs(&output); + + if (fshut(fp[0], argv[0]) | (fp[0] != fp[1] && fshut(fp[1], argv[1])) | + fshut(stdout, "<stdout>")) + ret = 2; + + return ret; +} diff --git a/util/sbase/kill.1 b/util/sbase/kill.1 new file mode 100644 index 00000000..37ec4dac --- /dev/null +++ b/util/sbase/kill.1 @@ -0,0 +1,39 @@ +.Dd October 8, 2015 +.Dt KILL 1 +.Os sbase +.Sh NAME +.Nm kill +.Nd signal processes +.Sh SYNOPSIS +.Nm +.Op Fl s Ar signame | Fl num | Fl signame +.Ar pid ... +.Nm +.Fl l Op Ar num +.Sh DESCRIPTION +.Nm +signals TERM to each process or process group specified by +.Ar pid . +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl l Op Ar num +List all available signals or the signal name of +.Ar num . +.It Fl s Ar signame | Fl num | Fl signame +Send signal corresponding to +.Ar signame +| +.Ar num . +The default is TERM. +.El +.Sh SEE ALSO +.Xr kill 2 , +.Xr signal 7 +.Sh STANDARDS +POSIX.1-2013. +.Pp +The +.Fl Ar signame +and +.Fl Ar num +syntax is marked by POSIX.1-2013 as an X/OPEN System Interfaces option. diff --git a/util/sbase/kill.c b/util/sbase/kill.c new file mode 100644 index 00000000..b09f55cb --- /dev/null +++ b/util/sbase/kill.c @@ -0,0 +1,131 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/wait.h> + +#include <ctype.h> +#include <limits.h> +#include <signal.h> +#include <stdio.h> +#include <string.h> +#include <strings.h> + +#include "util.h" + +struct { + const char *name; + const int sig; +} sigs[] = { + { "0", 0 }, +#define SIG(n) { #n, SIG##n } + SIG(ABRT), SIG(ALRM), SIG(BUS), SIG(CHLD), SIG(CONT), SIG(FPE), SIG(HUP), + SIG(ILL), SIG(INT), SIG(KILL), SIG(PIPE), SIG(QUIT), SIG(SEGV), SIG(STOP), + SIG(TERM), SIG(TRAP), SIG(TSTP), SIG(TTIN), SIG(TTOU), SIG(USR1), SIG(USR2), + SIG(URG), +#undef SIG +}; + +const char * +sig2name(const int sig) +{ + size_t i; + + for (i = 0; i < LEN(sigs); i++) + if (sigs[i].sig == sig) + return sigs[i].name; + eprintf("%d: bad signal number\n", sig); + + return NULL; /* not reached */ +} + +int +name2sig(const char *name) +{ + size_t i; + + for (i = 0; i < LEN(sigs); i++) + if (!strcasecmp(sigs[i].name, name)) + return sigs[i].sig; + eprintf("%s: bad signal name\n", name); + + return -1; /* not reached */ +} + +static void +usage(void) +{ + eprintf("usage: %s [-s signame | -num | -signame] pid ...\n" + " %s -l [num]\n", argv0, argv0); +} + +int +main(int argc, char *argv[]) +{ + pid_t pid; + size_t i; + int ret = 0, sig = SIGTERM; + + argv0 = *argv, argv0 ? (argc--, argv++) : (void *)0; + + if (!argc) + usage(); + + if ((*argv)[0] == '-') { + switch ((*argv)[1]) { + case 'l': + if ((*argv)[2]) + goto longopt; + argc--, argv++; + if (!argc) { + for (i = 0; i < LEN(sigs); i++) + puts(sigs[i].name); + } else if (argc == 1) { + sig = estrtonum(*argv, 0, INT_MAX); + if (sig > 128) + sig = WTERMSIG(sig); + puts(sig2name(sig)); + } else { + usage(); + } + return fshut(stdout, "<stdout>"); + case 's': + if ((*argv)[2]) + goto longopt; + argc--, argv++; + if (!argc) + usage(); + sig = name2sig(*argv); + argc--, argv++; + break; + case '-': + if ((*argv)[2]) + goto longopt; + argc--, argv++; + break; + default: + longopt: + /* XSI-extensions -argnum and -argname*/ + if (isdigit((*argv)[1])) { + sig = estrtonum((*argv) + 1, 0, INT_MAX); + sig2name(sig); + } else { + sig = name2sig((*argv) + 1); + } + argc--, argv++; + } + } + + if (argc && !strcmp(*argv, "--")) + argc--, argv++; + + if (!argc) + usage(); + + for (; *argv; argc--, argv++) { + pid = estrtonum(*argv, INT_MIN, INT_MAX); + if (kill(pid, sig) < 0) { + weprintf("kill %d:", pid); + ret = 1; + } + } + + return ret; +} diff --git a/util/sbase/libutf/Makefile b/util/sbase/libutf/Makefile new file mode 100644 index 00000000..aac2d2e6 --- /dev/null +++ b/util/sbase/libutf/Makefile @@ -0,0 +1,6 @@ +AWK = awk +UNICODE = http://unicode.org/Public/UCD/latest/ucd/UnicodeData.txt + +default: + @echo Downloading and parsing $(UNICODE) + @curl -\# $(UNICODE) | $(AWK) -f mkrunetype.awk diff --git a/util/sbase/libutf/fgetrune.c b/util/sbase/libutf/fgetrune.c new file mode 100644 index 00000000..8cd78c64 --- /dev/null +++ b/util/sbase/libutf/fgetrune.c @@ -0,0 +1,36 @@ +/* See LICENSE file for copyright and license details. */ +#include <errno.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "../utf.h" + +int +fgetrune(Rune *r, FILE *fp) +{ + char buf[UTFmax]; + int i = 0, c; + + while (i < UTFmax && (c = fgetc(fp)) != EOF) { + buf[i++] = c; + if (charntorune(r, buf, i) > 0) + break; + } + if (ferror(fp)) + return -1; + + return i; +} + +int +efgetrune(Rune *r, FILE *fp, const char *file) +{ + int ret; + + if ((ret = fgetrune(r, fp)) < 0) { + fprintf(stderr, "fgetrune %s: %s\n", file, strerror(errno)); + exit(1); + } + return ret; +} diff --git a/util/sbase/libutf/fputrune.c b/util/sbase/libutf/fputrune.c new file mode 100644 index 00000000..6a393b5a --- /dev/null +++ b/util/sbase/libutf/fputrune.c @@ -0,0 +1,27 @@ +/* See LICENSE file for copyright and license details. */ +#include <errno.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "../utf.h" + +int +fputrune(const Rune *r, FILE *fp) +{ + char buf[UTFmax]; + + return fwrite(buf, runetochar(buf, r), 1, fp); +} + +int +efputrune(const Rune *r, FILE *fp, const char *file) +{ + int ret; + + if ((ret = fputrune(r, fp)) < 0) { + fprintf(stderr, "fputrune %s: %s\n", file, strerror(errno)); + exit(1); + } + return ret; +} diff --git a/util/sbase/libutf/isalnumrune.c b/util/sbase/libutf/isalnumrune.c new file mode 100644 index 00000000..e4720d00 --- /dev/null +++ b/util/sbase/libutf/isalnumrune.c @@ -0,0 +1,9 @@ +/* Automatically generated by mkrunetype.awk */ +#include "../utf.h" +#include "runetype.h" + +int +isalnumrune(Rune r) +{ + return isalpharune(r) || isdigitrune(r); +} diff --git a/util/sbase/libutf/isalpharune.c b/util/sbase/libutf/isalpharune.c new file mode 100644 index 00000000..9d1faffe --- /dev/null +++ b/util/sbase/libutf/isalpharune.c @@ -0,0 +1,830 @@ +/* Automatically generated by mkrunetype.awk */ +#include <stdlib.h> + +#include "../utf.h" +#include "runetype.h" + +static const Rune alpha3[][2] = { + { 0x00D6, 0x00D8 }, + { 0x00F6, 0x00F8 }, + { 0x02EC, 0x02EE }, + { 0x0374, 0x0376 }, + { 0x037D, 0x037F }, + { 0x0386, 0x0388 }, + { 0x038A, 0x038E }, + { 0x03A1, 0x03A3 }, + { 0x03F5, 0x03F7 }, + { 0x052F, 0x0531 }, + { 0x066F, 0x0671 }, + { 0x06D3, 0x06D5 }, + { 0x0710, 0x0712 }, + { 0x0887, 0x0889 }, + { 0x09A8, 0x09AA }, + { 0x09B0, 0x09B2 }, + { 0x09DD, 0x09DF }, + { 0x0A28, 0x0A2A }, + { 0x0A30, 0x0A32 }, + { 0x0A33, 0x0A35 }, + { 0x0A36, 0x0A38 }, + { 0x0A5C, 0x0A5E }, + { 0x0A8D, 0x0A8F }, + { 0x0A91, 0x0A93 }, + { 0x0AA8, 0x0AAA }, + { 0x0AB0, 0x0AB2 }, + { 0x0AB3, 0x0AB5 }, + { 0x0B28, 0x0B2A }, + { 0x0B30, 0x0B32 }, + { 0x0B33, 0x0B35 }, + { 0x0B5D, 0x0B5F }, + { 0x0B83, 0x0B85 }, + { 0x0B90, 0x0B92 }, + { 0x0B9A, 0x0B9E }, + { 0x0C0C, 0x0C0E }, + { 0x0C10, 0x0C12 }, + { 0x0C28, 0x0C2A }, + { 0x0C8C, 0x0C8E }, + { 0x0C90, 0x0C92 }, + { 0x0CA8, 0x0CAA }, + { 0x0CB3, 0x0CB5 }, + { 0x0CDE, 0x0CE0 }, + { 0x0D0C, 0x0D0E }, + { 0x0D10, 0x0D12 }, + { 0x0DB1, 0x0DB3 }, + { 0x0DBB, 0x0DBD }, + { 0x0E30, 0x0E32 }, + { 0x0E82, 0x0E86 }, + { 0x0E8A, 0x0E8C }, + { 0x0EA3, 0x0EA7 }, + { 0x0EB0, 0x0EB2 }, + { 0x0EC4, 0x0EC6 }, + { 0x0F47, 0x0F49 }, + { 0x10C5, 0x10C7 }, + { 0x10FA, 0x10FC }, + { 0x1248, 0x124A }, + { 0x1256, 0x125A }, + { 0x1288, 0x128A }, + { 0x12B0, 0x12B2 }, + { 0x12BE, 0x12C2 }, + { 0x12D6, 0x12D8 }, + { 0x1310, 0x1312 }, + { 0x167F, 0x1681 }, + { 0x176C, 0x176E }, + { 0x18A8, 0x18AA }, + { 0x1CEC, 0x1CEE }, + { 0x1CF3, 0x1CF5 }, + { 0x1F57, 0x1F5F }, + { 0x1FB4, 0x1FB6 }, + { 0x1FBC, 0x1FBE }, + { 0x1FC4, 0x1FC6 }, + { 0x1FF4, 0x1FF6 }, + { 0x2113, 0x2115 }, + { 0x2124, 0x212A }, + { 0x212D, 0x212F }, + { 0x2D25, 0x2D27 }, + { 0x2DA6, 0x2DA8 }, + { 0x2DAE, 0x2DB0 }, + { 0x2DB6, 0x2DB8 }, + { 0x2DBE, 0x2DC0 }, + { 0x2DC6, 0x2DC8 }, + { 0x2DCE, 0x2DD0 }, + { 0x2DD6, 0x2DD8 }, + { 0x309F, 0x30A1 }, + { 0x30FA, 0x30FC }, + { 0x312F, 0x3131 }, + { 0xA7D1, 0xA7D5 }, + { 0xA801, 0xA803 }, + { 0xA805, 0xA807 }, + { 0xA80A, 0xA80C }, + { 0xA8FB, 0xA8FD }, + { 0xA9E4, 0xA9E6 }, + { 0xA9FE, 0xAA00 }, + { 0xAA42, 0xAA44 }, + { 0xAAAF, 0xAAB1 }, + { 0xAAC0, 0xAAC2 }, + { 0xAB26, 0xAB28 }, + { 0xAB2E, 0xAB30 }, + { 0xAB5A, 0xAB5C }, + { 0xFB1D, 0xFB1F }, + { 0xFB28, 0xFB2A }, + { 0xFB36, 0xFB38 }, + { 0xFB3C, 0xFB40 }, + { 0xFB41, 0xFB43 }, + { 0xFB44, 0xFB46 }, + { 0xFE74, 0xFE76 }, + { 0x1000B, 0x1000D }, + { 0x10026, 0x10028 }, + { 0x1003A, 0x1003C }, + { 0x1003D, 0x1003F }, + { 0x10340, 0x10342 }, + { 0x1057A, 0x1057C }, + { 0x1058A, 0x1058C }, + { 0x10592, 0x10594 }, + { 0x10595, 0x10597 }, + { 0x105A1, 0x105A3 }, + { 0x105B1, 0x105B3 }, + { 0x105B9, 0x105BB }, + { 0x10785, 0x10787 }, + { 0x107B0, 0x107B2 }, + { 0x10808, 0x1080A }, + { 0x10835, 0x10837 }, + { 0x108F2, 0x108F4 }, + { 0x10A13, 0x10A15 }, + { 0x10A17, 0x10A19 }, + { 0x10AC7, 0x10AC9 }, + { 0x111DA, 0x111DC }, + { 0x11211, 0x11213 }, + { 0x11286, 0x1128A }, + { 0x1128D, 0x1128F }, + { 0x1129D, 0x1129F }, + { 0x11328, 0x1132A }, + { 0x11330, 0x11332 }, + { 0x11333, 0x11335 }, + { 0x114C5, 0x114C7 }, + { 0x11913, 0x11915 }, + { 0x11916, 0x11918 }, + { 0x1193F, 0x11941 }, + { 0x119E1, 0x119E3 }, + { 0x11C08, 0x11C0A }, + { 0x11D06, 0x11D08 }, + { 0x11D09, 0x11D0B }, + { 0x11D65, 0x11D67 }, + { 0x11D68, 0x11D6A }, + { 0x11F02, 0x11F04 }, + { 0x11F10, 0x11F12 }, + { 0x16FE1, 0x16FE3 }, + { 0x1AFF3, 0x1AFF5 }, + { 0x1AFFB, 0x1AFFD }, + { 0x1AFFE, 0x1B000 }, + { 0x1D454, 0x1D456 }, + { 0x1D49C, 0x1D49E }, + { 0x1D4AC, 0x1D4AE }, + { 0x1D4B9, 0x1D4BD }, + { 0x1D4C3, 0x1D4C5 }, + { 0x1D505, 0x1D507 }, + { 0x1D514, 0x1D516 }, + { 0x1D51C, 0x1D51E }, + { 0x1D539, 0x1D53B }, + { 0x1D53E, 0x1D540 }, + { 0x1D544, 0x1D546 }, + { 0x1D550, 0x1D552 }, + { 0x1D6C0, 0x1D6C2 }, + { 0x1D6DA, 0x1D6DC }, + { 0x1D6FA, 0x1D6FC }, + { 0x1D714, 0x1D716 }, + { 0x1D734, 0x1D736 }, + { 0x1D74E, 0x1D750 }, + { 0x1D76E, 0x1D770 }, + { 0x1D788, 0x1D78A }, + { 0x1D7A8, 0x1D7AA }, + { 0x1D7C2, 0x1D7C4 }, + { 0x1E7E6, 0x1E7E8 }, + { 0x1E7EB, 0x1E7ED }, + { 0x1E7EE, 0x1E7F0 }, + { 0x1E7FE, 0x1E800 }, + { 0x1EE03, 0x1EE05 }, + { 0x1EE1F, 0x1EE21 }, + { 0x1EE22, 0x1EE24 }, + { 0x1EE27, 0x1EE29 }, + { 0x1EE32, 0x1EE34 }, + { 0x1EE37, 0x1EE3B }, + { 0x1EE47, 0x1EE4D }, + { 0x1EE4F, 0x1EE51 }, + { 0x1EE52, 0x1EE54 }, + { 0x1EE57, 0x1EE61 }, + { 0x1EE62, 0x1EE64 }, + { 0x1EE6A, 0x1EE6C }, + { 0x1EE72, 0x1EE74 }, + { 0x1EE77, 0x1EE79 }, + { 0x1EE7C, 0x1EE80 }, + { 0x1EE89, 0x1EE8B }, + { 0x1EEA3, 0x1EEA5 }, + { 0x1EEA9, 0x1EEAB }, +}; + +static const Rune alpha2[][2] = { + { 0x0041, 0x005A }, + { 0x0061, 0x007A }, + { 0x00C0, 0x00D6 }, + { 0x00D8, 0x00F6 }, + { 0x00F8, 0x02C1 }, + { 0x02C6, 0x02D1 }, + { 0x02E0, 0x02E4 }, + { 0x0370, 0x0374 }, + { 0x0376, 0x0377 }, + { 0x037A, 0x037D }, + { 0x0388, 0x038A }, + { 0x038E, 0x03A1 }, + { 0x03A3, 0x03F5 }, + { 0x03F7, 0x0481 }, + { 0x048A, 0x052F }, + { 0x0531, 0x0556 }, + { 0x0560, 0x0588 }, + { 0x05D0, 0x05EA }, + { 0x05EF, 0x05F2 }, + { 0x0620, 0x064A }, + { 0x066E, 0x066F }, + { 0x0671, 0x06D3 }, + { 0x06E5, 0x06E6 }, + { 0x06EE, 0x06EF }, + { 0x06FA, 0x06FC }, + { 0x0712, 0x072F }, + { 0x074D, 0x07A5 }, + { 0x07CA, 0x07EA }, + { 0x07F4, 0x07F5 }, + { 0x0800, 0x0815 }, + { 0x0840, 0x0858 }, + { 0x0860, 0x086A }, + { 0x0870, 0x0887 }, + { 0x0889, 0x088E }, + { 0x08A0, 0x08C9 }, + { 0x0904, 0x0939 }, + { 0x0958, 0x0961 }, + { 0x0971, 0x0980 }, + { 0x0985, 0x098C }, + { 0x098F, 0x0990 }, + { 0x0993, 0x09A8 }, + { 0x09AA, 0x09B0 }, + { 0x09B6, 0x09B9 }, + { 0x09DC, 0x09DD }, + { 0x09DF, 0x09E1 }, + { 0x09F0, 0x09F1 }, + { 0x0A05, 0x0A0A }, + { 0x0A0F, 0x0A10 }, + { 0x0A13, 0x0A28 }, + { 0x0A2A, 0x0A30 }, + { 0x0A32, 0x0A33 }, + { 0x0A35, 0x0A36 }, + { 0x0A38, 0x0A39 }, + { 0x0A59, 0x0A5C }, + { 0x0A72, 0x0A74 }, + { 0x0A85, 0x0A8D }, + { 0x0A8F, 0x0A91 }, + { 0x0A93, 0x0AA8 }, + { 0x0AAA, 0x0AB0 }, + { 0x0AB2, 0x0AB3 }, + { 0x0AB5, 0x0AB9 }, + { 0x0AE0, 0x0AE1 }, + { 0x0B05, 0x0B0C }, + { 0x0B0F, 0x0B10 }, + { 0x0B13, 0x0B28 }, + { 0x0B2A, 0x0B30 }, + { 0x0B32, 0x0B33 }, + { 0x0B35, 0x0B39 }, + { 0x0B5C, 0x0B5D }, + { 0x0B5F, 0x0B61 }, + { 0x0B85, 0x0B8A }, + { 0x0B8E, 0x0B90 }, + { 0x0B92, 0x0B95 }, + { 0x0B99, 0x0B9A }, + { 0x0B9E, 0x0B9F }, + { 0x0BA3, 0x0BA4 }, + { 0x0BA8, 0x0BAA }, + { 0x0BAE, 0x0BB9 }, + { 0x0C05, 0x0C0C }, + { 0x0C0E, 0x0C10 }, + { 0x0C12, 0x0C28 }, + { 0x0C2A, 0x0C39 }, + { 0x0C58, 0x0C5A }, + { 0x0C60, 0x0C61 }, + { 0x0C85, 0x0C8C }, + { 0x0C8E, 0x0C90 }, + { 0x0C92, 0x0CA8 }, + { 0x0CAA, 0x0CB3 }, + { 0x0CB5, 0x0CB9 }, + { 0x0CDD, 0x0CDE }, + { 0x0CE0, 0x0CE1 }, + { 0x0CF1, 0x0CF2 }, + { 0x0D04, 0x0D0C }, + { 0x0D0E, 0x0D10 }, + { 0x0D12, 0x0D3A }, + { 0x0D54, 0x0D56 }, + { 0x0D5F, 0x0D61 }, + { 0x0D7A, 0x0D7F }, + { 0x0D85, 0x0D96 }, + { 0x0D9A, 0x0DB1 }, + { 0x0DB3, 0x0DBB }, + { 0x0DC0, 0x0DC6 }, + { 0x0E01, 0x0E30 }, + { 0x0E32, 0x0E33 }, + { 0x0E40, 0x0E46 }, + { 0x0E81, 0x0E82 }, + { 0x0E86, 0x0E8A }, + { 0x0E8C, 0x0EA3 }, + { 0x0EA7, 0x0EB0 }, + { 0x0EB2, 0x0EB3 }, + { 0x0EC0, 0x0EC4 }, + { 0x0EDC, 0x0EDF }, + { 0x0F40, 0x0F47 }, + { 0x0F49, 0x0F6C }, + { 0x0F88, 0x0F8C }, + { 0x1000, 0x102A }, + { 0x1050, 0x1055 }, + { 0x105A, 0x105D }, + { 0x1065, 0x1066 }, + { 0x106E, 0x1070 }, + { 0x1075, 0x1081 }, + { 0x10A0, 0x10C5 }, + { 0x10D0, 0x10FA }, + { 0x10FC, 0x1248 }, + { 0x124A, 0x124D }, + { 0x1250, 0x1256 }, + { 0x125A, 0x125D }, + { 0x1260, 0x1288 }, + { 0x128A, 0x128D }, + { 0x1290, 0x12B0 }, + { 0x12B2, 0x12B5 }, + { 0x12B8, 0x12BE }, + { 0x12C2, 0x12C5 }, + { 0x12C8, 0x12D6 }, + { 0x12D8, 0x1310 }, + { 0x1312, 0x1315 }, + { 0x1318, 0x135A }, + { 0x1380, 0x138F }, + { 0x13A0, 0x13F5 }, + { 0x13F8, 0x13FD }, + { 0x1401, 0x166C }, + { 0x166F, 0x167F }, + { 0x1681, 0x169A }, + { 0x16A0, 0x16EA }, + { 0x16F1, 0x16F8 }, + { 0x1700, 0x1711 }, + { 0x171F, 0x1731 }, + { 0x1740, 0x1751 }, + { 0x1760, 0x176C }, + { 0x176E, 0x1770 }, + { 0x1780, 0x17B3 }, + { 0x1820, 0x1878 }, + { 0x1880, 0x1884 }, + { 0x1887, 0x18A8 }, + { 0x18B0, 0x18F5 }, + { 0x1900, 0x191E }, + { 0x1950, 0x196D }, + { 0x1970, 0x1974 }, + { 0x1980, 0x19AB }, + { 0x19B0, 0x19C9 }, + { 0x1A00, 0x1A16 }, + { 0x1A20, 0x1A54 }, + { 0x1B05, 0x1B33 }, + { 0x1B45, 0x1B4C }, + { 0x1B83, 0x1BA0 }, + { 0x1BAE, 0x1BAF }, + { 0x1BBA, 0x1BE5 }, + { 0x1C00, 0x1C23 }, + { 0x1C4D, 0x1C4F }, + { 0x1C5A, 0x1C7D }, + { 0x1C80, 0x1C88 }, + { 0x1C90, 0x1CBA }, + { 0x1CBD, 0x1CBF }, + { 0x1CE9, 0x1CEC }, + { 0x1CEE, 0x1CF3 }, + { 0x1CF5, 0x1CF6 }, + { 0x1D00, 0x1DBF }, + { 0x1E00, 0x1F15 }, + { 0x1F18, 0x1F1D }, + { 0x1F20, 0x1F45 }, + { 0x1F48, 0x1F4D }, + { 0x1F50, 0x1F57 }, + { 0x1F5F, 0x1F7D }, + { 0x1F80, 0x1FB4 }, + { 0x1FB6, 0x1FBC }, + { 0x1FC2, 0x1FC4 }, + { 0x1FC6, 0x1FCC }, + { 0x1FD0, 0x1FD3 }, + { 0x1FD6, 0x1FDB }, + { 0x1FE0, 0x1FEC }, + { 0x1FF2, 0x1FF4 }, + { 0x1FF6, 0x1FFC }, + { 0x2090, 0x209C }, + { 0x210A, 0x2113 }, + { 0x2119, 0x211D }, + { 0x212A, 0x212D }, + { 0x212F, 0x2139 }, + { 0x213C, 0x213F }, + { 0x2145, 0x2149 }, + { 0x2183, 0x2184 }, + { 0x2C00, 0x2CE4 }, + { 0x2CEB, 0x2CEE }, + { 0x2CF2, 0x2CF3 }, + { 0x2D00, 0x2D25 }, + { 0x2D30, 0x2D67 }, + { 0x2D80, 0x2D96 }, + { 0x2DA0, 0x2DA6 }, + { 0x2DA8, 0x2DAE }, + { 0x2DB0, 0x2DB6 }, + { 0x2DB8, 0x2DBE }, + { 0x2DC0, 0x2DC6 }, + { 0x2DC8, 0x2DCE }, + { 0x2DD0, 0x2DD6 }, + { 0x2DD8, 0x2DDE }, + { 0x3005, 0x3006 }, + { 0x3031, 0x3035 }, + { 0x303B, 0x303C }, + { 0x3041, 0x3096 }, + { 0x309D, 0x309F }, + { 0x30A1, 0x30FA }, + { 0x30FC, 0x30FF }, + { 0x3105, 0x312F }, + { 0x3131, 0x318E }, + { 0x31A0, 0x31BF }, + { 0x31F0, 0x31FF }, + { 0x9FFF, 0xA48C }, + { 0xA4D0, 0xA4FD }, + { 0xA500, 0xA60C }, + { 0xA610, 0xA61F }, + { 0xA62A, 0xA62B }, + { 0xA640, 0xA66E }, + { 0xA67F, 0xA69D }, + { 0xA6A0, 0xA6E5 }, + { 0xA717, 0xA71F }, + { 0xA722, 0xA788 }, + { 0xA78B, 0xA7CA }, + { 0xA7D0, 0xA7D1 }, + { 0xA7D5, 0xA7D9 }, + { 0xA7F2, 0xA801 }, + { 0xA803, 0xA805 }, + { 0xA807, 0xA80A }, + { 0xA80C, 0xA822 }, + { 0xA840, 0xA873 }, + { 0xA882, 0xA8B3 }, + { 0xA8F2, 0xA8F7 }, + { 0xA8FD, 0xA8FE }, + { 0xA90A, 0xA925 }, + { 0xA930, 0xA946 }, + { 0xA960, 0xA97C }, + { 0xA984, 0xA9B2 }, + { 0xA9E0, 0xA9E4 }, + { 0xA9E6, 0xA9EF }, + { 0xA9FA, 0xA9FE }, + { 0xAA00, 0xAA28 }, + { 0xAA40, 0xAA42 }, + { 0xAA44, 0xAA4B }, + { 0xAA60, 0xAA76 }, + { 0xAA7E, 0xAAAF }, + { 0xAAB5, 0xAAB6 }, + { 0xAAB9, 0xAABD }, + { 0xAADB, 0xAADD }, + { 0xAAE0, 0xAAEA }, + { 0xAAF2, 0xAAF4 }, + { 0xAB01, 0xAB06 }, + { 0xAB09, 0xAB0E }, + { 0xAB11, 0xAB16 }, + { 0xAB20, 0xAB26 }, + { 0xAB28, 0xAB2E }, + { 0xAB30, 0xAB5A }, + { 0xAB5C, 0xAB69 }, + { 0xAB70, 0xABE2 }, + { 0xD7B0, 0xD7C6 }, + { 0xD7CB, 0xD7FB }, + { 0xF900, 0xFA6D }, + { 0xFA70, 0xFAD9 }, + { 0xFB00, 0xFB06 }, + { 0xFB13, 0xFB17 }, + { 0xFB1F, 0xFB28 }, + { 0xFB2A, 0xFB36 }, + { 0xFB38, 0xFB3C }, + { 0xFB40, 0xFB41 }, + { 0xFB43, 0xFB44 }, + { 0xFB46, 0xFBB1 }, + { 0xFBD3, 0xFD3D }, + { 0xFD50, 0xFD8F }, + { 0xFD92, 0xFDC7 }, + { 0xFDF0, 0xFDFB }, + { 0xFE70, 0xFE74 }, + { 0xFE76, 0xFEFC }, + { 0xFF21, 0xFF3A }, + { 0xFF41, 0xFF5A }, + { 0xFF66, 0xFFBE }, + { 0xFFC2, 0xFFC7 }, + { 0xFFCA, 0xFFCF }, + { 0xFFD2, 0xFFD7 }, + { 0xFFDA, 0xFFDC }, + { 0x10000, 0x1000B }, + { 0x1000D, 0x10026 }, + { 0x10028, 0x1003A }, + { 0x1003C, 0x1003D }, + { 0x1003F, 0x1004D }, + { 0x10050, 0x1005D }, + { 0x10080, 0x100FA }, + { 0x10280, 0x1029C }, + { 0x102A0, 0x102D0 }, + { 0x10300, 0x1031F }, + { 0x1032D, 0x10340 }, + { 0x10342, 0x10349 }, + { 0x10350, 0x10375 }, + { 0x10380, 0x1039D }, + { 0x103A0, 0x103C3 }, + { 0x103C8, 0x103CF }, + { 0x10400, 0x1049D }, + { 0x104B0, 0x104D3 }, + { 0x104D8, 0x104FB }, + { 0x10500, 0x10527 }, + { 0x10530, 0x10563 }, + { 0x10570, 0x1057A }, + { 0x1057C, 0x1058A }, + { 0x1058C, 0x10592 }, + { 0x10594, 0x10595 }, + { 0x10597, 0x105A1 }, + { 0x105A3, 0x105B1 }, + { 0x105B3, 0x105B9 }, + { 0x105BB, 0x105BC }, + { 0x10600, 0x10736 }, + { 0x10740, 0x10755 }, + { 0x10760, 0x10767 }, + { 0x10780, 0x10785 }, + { 0x10787, 0x107B0 }, + { 0x107B2, 0x107BA }, + { 0x10800, 0x10805 }, + { 0x1080A, 0x10835 }, + { 0x10837, 0x10838 }, + { 0x1083F, 0x10855 }, + { 0x10860, 0x10876 }, + { 0x10880, 0x1089E }, + { 0x108E0, 0x108F2 }, + { 0x108F4, 0x108F5 }, + { 0x10900, 0x10915 }, + { 0x10920, 0x10939 }, + { 0x10980, 0x109B7 }, + { 0x109BE, 0x109BF }, + { 0x10A10, 0x10A13 }, + { 0x10A15, 0x10A17 }, + { 0x10A19, 0x10A35 }, + { 0x10A60, 0x10A7C }, + { 0x10A80, 0x10A9C }, + { 0x10AC0, 0x10AC7 }, + { 0x10AC9, 0x10AE4 }, + { 0x10B00, 0x10B35 }, + { 0x10B40, 0x10B55 }, + { 0x10B60, 0x10B72 }, + { 0x10B80, 0x10B91 }, + { 0x10C00, 0x10C48 }, + { 0x10C80, 0x10CB2 }, + { 0x10CC0, 0x10CF2 }, + { 0x10D00, 0x10D23 }, + { 0x10E80, 0x10EA9 }, + { 0x10EB0, 0x10EB1 }, + { 0x10F00, 0x10F1C }, + { 0x10F30, 0x10F45 }, + { 0x10F70, 0x10F81 }, + { 0x10FB0, 0x10FC4 }, + { 0x10FE0, 0x10FF6 }, + { 0x11003, 0x11037 }, + { 0x11071, 0x11072 }, + { 0x11083, 0x110AF }, + { 0x110D0, 0x110E8 }, + { 0x11103, 0x11126 }, + { 0x11150, 0x11172 }, + { 0x11183, 0x111B2 }, + { 0x111C1, 0x111C4 }, + { 0x11200, 0x11211 }, + { 0x11213, 0x1122B }, + { 0x1123F, 0x11240 }, + { 0x11280, 0x11286 }, + { 0x1128A, 0x1128D }, + { 0x1128F, 0x1129D }, + { 0x1129F, 0x112A8 }, + { 0x112B0, 0x112DE }, + { 0x11305, 0x1130C }, + { 0x1130F, 0x11310 }, + { 0x11313, 0x11328 }, + { 0x1132A, 0x11330 }, + { 0x11332, 0x11333 }, + { 0x11335, 0x11339 }, + { 0x1135D, 0x11361 }, + { 0x11400, 0x11434 }, + { 0x11447, 0x1144A }, + { 0x1145F, 0x11461 }, + { 0x11480, 0x114AF }, + { 0x114C4, 0x114C5 }, + { 0x11580, 0x115AE }, + { 0x115D8, 0x115DB }, + { 0x11600, 0x1162F }, + { 0x11680, 0x116AA }, + { 0x11700, 0x1171A }, + { 0x11740, 0x11746 }, + { 0x11800, 0x1182B }, + { 0x118A0, 0x118DF }, + { 0x118FF, 0x11906 }, + { 0x1190C, 0x11913 }, + { 0x11915, 0x11916 }, + { 0x11918, 0x1192F }, + { 0x119A0, 0x119A7 }, + { 0x119AA, 0x119D0 }, + { 0x11A0B, 0x11A32 }, + { 0x11A5C, 0x11A89 }, + { 0x11AB0, 0x11AF8 }, + { 0x11C00, 0x11C08 }, + { 0x11C0A, 0x11C2E }, + { 0x11C72, 0x11C8F }, + { 0x11D00, 0x11D06 }, + { 0x11D08, 0x11D09 }, + { 0x11D0B, 0x11D30 }, + { 0x11D60, 0x11D65 }, + { 0x11D67, 0x11D68 }, + { 0x11D6A, 0x11D89 }, + { 0x11EE0, 0x11EF2 }, + { 0x11F04, 0x11F10 }, + { 0x11F12, 0x11F33 }, + { 0x12000, 0x12399 }, + { 0x12480, 0x12543 }, + { 0x12F90, 0x12FF0 }, + { 0x13000, 0x1342F }, + { 0x13441, 0x13446 }, + { 0x14400, 0x14646 }, + { 0x16800, 0x16A38 }, + { 0x16A40, 0x16A5E }, + { 0x16A70, 0x16ABE }, + { 0x16AD0, 0x16AED }, + { 0x16B00, 0x16B2F }, + { 0x16B40, 0x16B43 }, + { 0x16B63, 0x16B77 }, + { 0x16B7D, 0x16B8F }, + { 0x16E40, 0x16E7F }, + { 0x16F00, 0x16F4A }, + { 0x16F93, 0x16F9F }, + { 0x16FE0, 0x16FE1 }, + { 0x18800, 0x18CD5 }, + { 0x1AFF0, 0x1AFF3 }, + { 0x1AFF5, 0x1AFFB }, + { 0x1AFFD, 0x1AFFE }, + { 0x1B000, 0x1B122 }, + { 0x1B150, 0x1B152 }, + { 0x1B164, 0x1B167 }, + { 0x1B170, 0x1B2FB }, + { 0x1BC00, 0x1BC6A }, + { 0x1BC70, 0x1BC7C }, + { 0x1BC80, 0x1BC88 }, + { 0x1BC90, 0x1BC99 }, + { 0x1D400, 0x1D454 }, + { 0x1D456, 0x1D49C }, + { 0x1D49E, 0x1D49F }, + { 0x1D4A5, 0x1D4A6 }, + { 0x1D4A9, 0x1D4AC }, + { 0x1D4AE, 0x1D4B9 }, + { 0x1D4BD, 0x1D4C3 }, + { 0x1D4C5, 0x1D505 }, + { 0x1D507, 0x1D50A }, + { 0x1D50D, 0x1D514 }, + { 0x1D516, 0x1D51C }, + { 0x1D51E, 0x1D539 }, + { 0x1D53B, 0x1D53E }, + { 0x1D540, 0x1D544 }, + { 0x1D54A, 0x1D550 }, + { 0x1D552, 0x1D6A5 }, + { 0x1D6A8, 0x1D6C0 }, + { 0x1D6C2, 0x1D6DA }, + { 0x1D6DC, 0x1D6FA }, + { 0x1D6FC, 0x1D714 }, + { 0x1D716, 0x1D734 }, + { 0x1D736, 0x1D74E }, + { 0x1D750, 0x1D76E }, + { 0x1D770, 0x1D788 }, + { 0x1D78A, 0x1D7A8 }, + { 0x1D7AA, 0x1D7C2 }, + { 0x1D7C4, 0x1D7CB }, + { 0x1DF00, 0x1DF1E }, + { 0x1DF25, 0x1DF2A }, + { 0x1E030, 0x1E06D }, + { 0x1E100, 0x1E12C }, + { 0x1E137, 0x1E13D }, + { 0x1E290, 0x1E2AD }, + { 0x1E2C0, 0x1E2EB }, + { 0x1E4D0, 0x1E4EB }, + { 0x1E7E0, 0x1E7E6 }, + { 0x1E7E8, 0x1E7EB }, + { 0x1E7ED, 0x1E7EE }, + { 0x1E7F0, 0x1E7FE }, + { 0x1E800, 0x1E8C4 }, + { 0x1E900, 0x1E943 }, + { 0x1EE00, 0x1EE03 }, + { 0x1EE05, 0x1EE1F }, + { 0x1EE21, 0x1EE22 }, + { 0x1EE29, 0x1EE32 }, + { 0x1EE34, 0x1EE37 }, + { 0x1EE4D, 0x1EE4F }, + { 0x1EE51, 0x1EE52 }, + { 0x1EE61, 0x1EE62 }, + { 0x1EE67, 0x1EE6A }, + { 0x1EE6C, 0x1EE72 }, + { 0x1EE74, 0x1EE77 }, + { 0x1EE79, 0x1EE7C }, + { 0x1EE80, 0x1EE89 }, + { 0x1EE8B, 0x1EE9B }, + { 0x1EEA1, 0x1EEA3 }, + { 0x1EEA5, 0x1EEA9 }, + { 0x1EEAB, 0x1EEBB }, + { 0x2F800, 0x2FA1D }, +}; + +static const Rune alpha1[] = { + 0x00AA, + 0x00B5, + 0x00BA, + 0x0559, + 0x06FF, + 0x07B1, + 0x07FA, + 0x081A, + 0x0824, + 0x0828, + 0x093D, + 0x0950, + 0x09BD, + 0x09CE, + 0x09FC, + 0x0ABD, + 0x0AD0, + 0x0AF9, + 0x0B3D, + 0x0B71, + 0x0BD0, + 0x0C3D, + 0x0C5D, + 0x0C80, + 0x0CBD, + 0x0D3D, + 0x0D4E, + 0x0EBD, + 0x0F00, + 0x103F, + 0x1061, + 0x108E, + 0x10CD, + 0x17D7, + 0x17DC, + 0x1AA7, + 0x1CFA, + 0x2071, + 0x207F, + 0x2102, + 0x2107, + 0x214E, + 0x2D2D, + 0x2D6F, + 0x2E2F, + 0x3400, + 0x4DBF, + 0x4E00, + 0xA9CF, + 0xAA7A, + 0xAC00, + 0xD7A3, + 0x1083C, + 0x10A00, + 0x10F27, + 0x11075, + 0x11144, + 0x11147, + 0x11176, + 0x1133D, + 0x11350, + 0x11644, + 0x116B8, + 0x11909, + 0x11A00, + 0x11A3A, + 0x11A50, + 0x11A9D, + 0x11C40, + 0x11D46, + 0x11D98, + 0x11FB0, + 0x16F50, + 0x17000, + 0x187F7, + 0x18D00, + 0x18D08, + 0x1B132, + 0x1B155, + 0x1D4A2, + 0x1E14E, + 0x1E94B, + 0x1EE42, + 0x20000, + 0x2A6DF, + 0x2A700, + 0x2B739, + 0x2B740, + 0x2B81D, + 0x2B820, + 0x2CEA1, + 0x2CEB0, + 0x2EBE0, + 0x30000, + 0x3134A, + 0x31350, + 0x323AF, +}; + +int +isalpharune(Rune r) +{ + const Rune *match; + + if((match = bsearch(&r, alpha3, nelem(alpha3), sizeof *alpha3, &rune2cmp))) + return !((r - match[0]) % 2); + if(bsearch(&r, alpha2, nelem(alpha2), sizeof *alpha2, &rune2cmp)) + return 1; + if(bsearch(&r, alpha1, nelem(alpha1), sizeof *alpha1, &rune1cmp)) + return 1; + return 0; +} diff --git a/util/sbase/libutf/isblankrune.c b/util/sbase/libutf/isblankrune.c new file mode 100644 index 00000000..7cf91597 --- /dev/null +++ b/util/sbase/libutf/isblankrune.c @@ -0,0 +1,9 @@ +/* Automatically generated by mkrunetype.awk */ +#include "../utf.h" +#include "runetype.h" + +int +isblankrune(Rune r) +{ + return r == ' ' || r == '\t'; +} diff --git a/util/sbase/libutf/iscntrlrune.c b/util/sbase/libutf/iscntrlrune.c new file mode 100644 index 00000000..603e57cb --- /dev/null +++ b/util/sbase/libutf/iscntrlrune.c @@ -0,0 +1,18 @@ +/* Automatically generated by mkrunetype.awk */ +#include <stdlib.h> + +#include "../utf.h" +#include "runetype.h" + +static const Rune cntrl2[][2] = { + { 0x0000, 0x001F }, + { 0x007F, 0x009F }, +}; + +int +iscntrlrune(Rune r) +{ + if(bsearch(&r, cntrl2, nelem(cntrl2), sizeof *cntrl2, &rune2cmp)) + return 1; + return 0; +} diff --git a/util/sbase/libutf/isdigitrune.c b/util/sbase/libutf/isdigitrune.c new file mode 100644 index 00000000..c8901bc4 --- /dev/null +++ b/util/sbase/libutf/isdigitrune.c @@ -0,0 +1,80 @@ +/* Automatically generated by mkrunetype.awk */ +#include <stdlib.h> + +#include "../utf.h" +#include "runetype.h" + +static const Rune digit2[][2] = { + { 0x0030, 0x0039 }, + { 0x0660, 0x0669 }, + { 0x06F0, 0x06F9 }, + { 0x07C0, 0x07C9 }, + { 0x0966, 0x096F }, + { 0x09E6, 0x09EF }, + { 0x0A66, 0x0A6F }, + { 0x0AE6, 0x0AEF }, + { 0x0B66, 0x0B6F }, + { 0x0BE6, 0x0BEF }, + { 0x0C66, 0x0C6F }, + { 0x0CE6, 0x0CEF }, + { 0x0D66, 0x0D6F }, + { 0x0DE6, 0x0DEF }, + { 0x0E50, 0x0E59 }, + { 0x0ED0, 0x0ED9 }, + { 0x0F20, 0x0F29 }, + { 0x1040, 0x1049 }, + { 0x1090, 0x1099 }, + { 0x17E0, 0x17E9 }, + { 0x1810, 0x1819 }, + { 0x1946, 0x194F }, + { 0x19D0, 0x19D9 }, + { 0x1A80, 0x1A89 }, + { 0x1A90, 0x1A99 }, + { 0x1B50, 0x1B59 }, + { 0x1BB0, 0x1BB9 }, + { 0x1C40, 0x1C49 }, + { 0x1C50, 0x1C59 }, + { 0xA620, 0xA629 }, + { 0xA8D0, 0xA8D9 }, + { 0xA900, 0xA909 }, + { 0xA9D0, 0xA9D9 }, + { 0xA9F0, 0xA9F9 }, + { 0xAA50, 0xAA59 }, + { 0xABF0, 0xABF9 }, + { 0xFF10, 0xFF19 }, + { 0x104A0, 0x104A9 }, + { 0x10D30, 0x10D39 }, + { 0x11066, 0x1106F }, + { 0x110F0, 0x110F9 }, + { 0x11136, 0x1113F }, + { 0x111D0, 0x111D9 }, + { 0x112F0, 0x112F9 }, + { 0x11450, 0x11459 }, + { 0x114D0, 0x114D9 }, + { 0x11650, 0x11659 }, + { 0x116C0, 0x116C9 }, + { 0x11730, 0x11739 }, + { 0x118E0, 0x118E9 }, + { 0x11950, 0x11959 }, + { 0x11C50, 0x11C59 }, + { 0x11D50, 0x11D59 }, + { 0x11DA0, 0x11DA9 }, + { 0x11F50, 0x11F59 }, + { 0x16A60, 0x16A69 }, + { 0x16AC0, 0x16AC9 }, + { 0x16B50, 0x16B59 }, + { 0x1D7CE, 0x1D7FF }, + { 0x1E140, 0x1E149 }, + { 0x1E2F0, 0x1E2F9 }, + { 0x1E4F0, 0x1E4F9 }, + { 0x1E950, 0x1E959 }, + { 0x1FBF0, 0x1FBF9 }, +}; + +int +isdigitrune(Rune r) +{ + if(bsearch(&r, digit2, nelem(digit2), sizeof *digit2, &rune2cmp)) + return 1; + return 0; +} diff --git a/util/sbase/libutf/isgraphrune.c b/util/sbase/libutf/isgraphrune.c new file mode 100644 index 00000000..08770f64 --- /dev/null +++ b/util/sbase/libutf/isgraphrune.c @@ -0,0 +1,9 @@ +/* Automatically generated by mkrunetype.awk */ +#include "../utf.h" +#include "runetype.h" + +int +isgraphrune(Rune r) +{ + return !isspacerune(r) && isprintrune(r); +} diff --git a/util/sbase/libutf/isprintrune.c b/util/sbase/libutf/isprintrune.c new file mode 100644 index 00000000..f6e2fa48 --- /dev/null +++ b/util/sbase/libutf/isprintrune.c @@ -0,0 +1,10 @@ +/* Automatically generated by mkrunetype.awk */ +#include "../utf.h" +#include "runetype.h" + +int +isprintrune(Rune r) +{ + return !iscntrlrune(r) && (r != 0x2028) && (r != 0x2029) && + ((r < 0xFFF9) || (r > 0xFFFB)); +} diff --git a/util/sbase/libutf/ispunctrune.c b/util/sbase/libutf/ispunctrune.c new file mode 100644 index 00000000..d73cb25b --- /dev/null +++ b/util/sbase/libutf/ispunctrune.c @@ -0,0 +1,9 @@ +/* Automatically generated by mkrunetype.awk */ +#include "../utf.h" +#include "runetype.h" + +int +ispunctrune(Rune r) +{ + return isgraphrune(r) && !isalnumrune(r); +} diff --git a/util/sbase/libutf/isspacerune.c b/util/sbase/libutf/isspacerune.c new file mode 100644 index 00000000..8583f932 --- /dev/null +++ b/util/sbase/libutf/isspacerune.c @@ -0,0 +1,31 @@ +/* Automatically generated by mkrunetype.awk */ +#include <stdlib.h> + +#include "../utf.h" +#include "runetype.h" + +static const Rune space2[][2] = { + { 0x0009, 0x000D }, + { 0x001C, 0x0020 }, + { 0x2000, 0x200A }, + { 0x2028, 0x2029 }, +}; + +static const Rune space1[] = { + 0x0085, + 0x00A0, + 0x1680, + 0x202F, + 0x205F, + 0x3000, +}; + +int +isspacerune(Rune r) +{ + if(bsearch(&r, space2, nelem(space2), sizeof *space2, &rune2cmp)) + return 1; + if(bsearch(&r, space1, nelem(space1), sizeof *space1, &rune1cmp)) + return 1; + return 0; +} diff --git a/util/sbase/libutf/istitlerune.c b/util/sbase/libutf/istitlerune.c new file mode 100644 index 00000000..36b38d12 --- /dev/null +++ b/util/sbase/libutf/istitlerune.c @@ -0,0 +1,31 @@ +/* Automatically generated by mkrunetype.awk */ +#include <stdlib.h> + +#include "../utf.h" +#include "runetype.h" + +static const Rune title2[][2] = { + { 0x1F88, 0x1F8F }, + { 0x1F98, 0x1F9F }, + { 0x1FA8, 0x1FAF }, +}; + +static const Rune title1[] = { + 0x01C5, + 0x01C8, + 0x01CB, + 0x01F2, + 0x1FBC, + 0x1FCC, + 0x1FFC, +}; + +int +istitlerune(Rune r) +{ + if(bsearch(&r, title2, nelem(title2), sizeof *title2, &rune2cmp)) + return 1; + if(bsearch(&r, title1, nelem(title1), sizeof *title1, &rune1cmp)) + return 1; + return 0; +} diff --git a/util/sbase/libutf/isxdigitrune.c b/util/sbase/libutf/isxdigitrune.c new file mode 100644 index 00000000..0797240a --- /dev/null +++ b/util/sbase/libutf/isxdigitrune.c @@ -0,0 +1,9 @@ +/* Automatically generated by mkrunetype.awk */ +#include "../utf.h" +#include "runetype.h" + +int +isxdigitrune(Rune r) +{ + return (r >= '0' && (r - '0') < 10) || (r >= 'a' && (r - 'a') < 6); +} diff --git a/util/sbase/libutf/lowerrune.c b/util/sbase/libutf/lowerrune.c new file mode 100644 index 00000000..d91a364b --- /dev/null +++ b/util/sbase/libutf/lowerrune.c @@ -0,0 +1,356 @@ +/* Automatically generated by mkrunetype.awk */ +#include <stdlib.h> + +#include "../utf.h" +#include "runetype.h" + +static const Rune lower4[][2] = { + { 0x0101, 0x012F }, + { 0x0133, 0x0137 }, + { 0x013A, 0x0148 }, + { 0x014B, 0x0177 }, + { 0x017A, 0x017E }, + { 0x0183, 0x0185 }, + { 0x01A1, 0x01A5 }, + { 0x01B4, 0x01B6 }, + { 0x01CE, 0x01DC }, + { 0x01DF, 0x01EF }, + { 0x01F9, 0x021F }, + { 0x0223, 0x0233 }, + { 0x0247, 0x024F }, + { 0x0371, 0x0373 }, + { 0x03D9, 0x03EF }, + { 0x0461, 0x0481 }, + { 0x048B, 0x04BF }, + { 0x04C2, 0x04CE }, + { 0x04D1, 0x052F }, + { 0x1E01, 0x1E95 }, + { 0x1EA1, 0x1EFF }, + { 0x2C68, 0x2C6C }, + { 0x2C81, 0x2CE3 }, + { 0x2CEC, 0x2CEE }, + { 0xA641, 0xA66D }, + { 0xA681, 0xA69B }, + { 0xA723, 0xA72F }, + { 0xA733, 0xA76F }, + { 0xA77A, 0xA77C }, + { 0xA77F, 0xA787 }, + { 0xA791, 0xA793 }, + { 0xA797, 0xA7A9 }, + { 0xA7B5, 0xA7C3 }, + { 0xA7C8, 0xA7CA }, + { 0xA7D7, 0xA7D9 }, +}; + +static const Rune lower2[][3] = { + { 0x0061, 0x007A, 0x0041 }, + { 0x00E0, 0x00F6, 0x00C0 }, + { 0x00F8, 0x00FE, 0x00D8 }, + { 0x01AA, 0x01AB, 0x01AA }, + { 0x0234, 0x0239, 0x0234 }, + { 0x023F, 0x0240, 0x2C7E }, + { 0x0256, 0x0257, 0x0189 }, + { 0x025D, 0x025F, 0x025D }, + { 0x026D, 0x026E, 0x026D }, + { 0x0273, 0x0274, 0x0273 }, + { 0x0276, 0x027C, 0x0276 }, + { 0x027E, 0x027F, 0x027E }, + { 0x0284, 0x0286, 0x0284 }, + { 0x028A, 0x028B, 0x01B1 }, + { 0x028D, 0x0291, 0x028D }, + { 0x0295, 0x029C, 0x0295 }, + { 0x029F, 0x02AF, 0x029F }, + { 0x037B, 0x037D, 0x03FD }, + { 0x03AD, 0x03AF, 0x0388 }, + { 0x03B1, 0x03C1, 0x0391 }, + { 0x03C3, 0x03CB, 0x03A3 }, + { 0x03CD, 0x03CE, 0x038E }, + { 0x0430, 0x044F, 0x0410 }, + { 0x0450, 0x045F, 0x0400 }, + { 0x0561, 0x0586, 0x0531 }, + { 0x0587, 0x0588, 0x0587 }, + { 0x10D0, 0x10FA, 0x1C90 }, + { 0x10FD, 0x10FF, 0x1CBD }, + { 0x13F8, 0x13FD, 0x13F0 }, + { 0x1C83, 0x1C84, 0x0421 }, + { 0x1D00, 0x1D2B, 0x1D00 }, + { 0x1D6B, 0x1D77, 0x1D6B }, + { 0x1D7A, 0x1D7C, 0x1D7A }, + { 0x1D7E, 0x1D8D, 0x1D7E }, + { 0x1D8F, 0x1D9A, 0x1D8F }, + { 0x1E96, 0x1E9A, 0x1E96 }, + { 0x1E9C, 0x1E9D, 0x1E9C }, + { 0x1F00, 0x1F07, 0x1F08 }, + { 0x1F10, 0x1F15, 0x1F18 }, + { 0x1F20, 0x1F27, 0x1F28 }, + { 0x1F30, 0x1F37, 0x1F38 }, + { 0x1F40, 0x1F45, 0x1F48 }, + { 0x1F60, 0x1F67, 0x1F68 }, + { 0x1F70, 0x1F71, 0x1FBA }, + { 0x1F72, 0x1F75, 0x1FC8 }, + { 0x1F76, 0x1F77, 0x1FDA }, + { 0x1F78, 0x1F79, 0x1FF8 }, + { 0x1F7A, 0x1F7B, 0x1FEA }, + { 0x1F7C, 0x1F7D, 0x1FFA }, + { 0x1F80, 0x1F87, 0x1F88 }, + { 0x1F90, 0x1F97, 0x1F98 }, + { 0x1FA0, 0x1FA7, 0x1FA8 }, + { 0x1FB0, 0x1FB1, 0x1FB8 }, + { 0x1FB6, 0x1FB7, 0x1FB6 }, + { 0x1FC6, 0x1FC7, 0x1FC6 }, + { 0x1FD0, 0x1FD1, 0x1FD8 }, + { 0x1FD2, 0x1FD3, 0x1FD2 }, + { 0x1FD6, 0x1FD7, 0x1FD6 }, + { 0x1FE0, 0x1FE1, 0x1FE8 }, + { 0x1FE2, 0x1FE4, 0x1FE2 }, + { 0x1FE6, 0x1FE7, 0x1FE6 }, + { 0x1FF6, 0x1FF7, 0x1FF6 }, + { 0x210E, 0x210F, 0x210E }, + { 0x213C, 0x213D, 0x213C }, + { 0x2146, 0x2149, 0x2146 }, + { 0x2C30, 0x2C5F, 0x2C00 }, + { 0x2C77, 0x2C7B, 0x2C77 }, + { 0x2D00, 0x2D25, 0x10A0 }, + { 0xA730, 0xA731, 0xA730 }, + { 0xA771, 0xA778, 0xA771 }, + { 0xAB30, 0xAB52, 0xAB30 }, + { 0xAB54, 0xAB5A, 0xAB54 }, + { 0xAB60, 0xAB68, 0xAB60 }, + { 0xAB70, 0xABBF, 0x13A0 }, + { 0xFB00, 0xFB06, 0xFB00 }, + { 0xFB13, 0xFB17, 0xFB13 }, + { 0xFF41, 0xFF5A, 0xFF21 }, + { 0x10428, 0x1044F, 0x10400 }, + { 0x104D8, 0x104FB, 0x104B0 }, + { 0x10597, 0x105A1, 0x10570 }, + { 0x105A3, 0x105B1, 0x1057C }, + { 0x105B3, 0x105B9, 0x1058C }, + { 0x105BB, 0x105BC, 0x10594 }, + { 0x10CC0, 0x10CF2, 0x10C80 }, + { 0x118C0, 0x118DF, 0x118A0 }, + { 0x16E60, 0x16E7F, 0x16E40 }, + { 0x1D41A, 0x1D433, 0x1D41A }, + { 0x1D44E, 0x1D454, 0x1D44E }, + { 0x1D456, 0x1D467, 0x1D456 }, + { 0x1D482, 0x1D49B, 0x1D482 }, + { 0x1D4B6, 0x1D4B9, 0x1D4B6 }, + { 0x1D4BD, 0x1D4C3, 0x1D4BD }, + { 0x1D4C5, 0x1D4CF, 0x1D4C5 }, + { 0x1D4EA, 0x1D503, 0x1D4EA }, + { 0x1D51E, 0x1D537, 0x1D51E }, + { 0x1D552, 0x1D56B, 0x1D552 }, + { 0x1D586, 0x1D59F, 0x1D586 }, + { 0x1D5BA, 0x1D5D3, 0x1D5BA }, + { 0x1D5EE, 0x1D607, 0x1D5EE }, + { 0x1D622, 0x1D63B, 0x1D622 }, + { 0x1D656, 0x1D66F, 0x1D656 }, + { 0x1D68A, 0x1D6A5, 0x1D68A }, + { 0x1D6C2, 0x1D6DA, 0x1D6C2 }, + { 0x1D6DC, 0x1D6E1, 0x1D6DC }, + { 0x1D6FC, 0x1D714, 0x1D6FC }, + { 0x1D716, 0x1D71B, 0x1D716 }, + { 0x1D736, 0x1D74E, 0x1D736 }, + { 0x1D750, 0x1D755, 0x1D750 }, + { 0x1D770, 0x1D788, 0x1D770 }, + { 0x1D78A, 0x1D78F, 0x1D78A }, + { 0x1D7AA, 0x1D7C2, 0x1D7AA }, + { 0x1D7C4, 0x1D7C9, 0x1D7C4 }, + { 0x1DF00, 0x1DF09, 0x1DF00 }, + { 0x1DF0B, 0x1DF1E, 0x1DF0B }, + { 0x1DF25, 0x1DF2A, 0x1DF25 }, + { 0x1E922, 0x1E943, 0x1E900 }, +}; + +static const Rune lower1[][2] = { + { 0x00B5, 0x039C }, + { 0x00DF, 0x00DF }, + { 0x00FF, 0x0178 }, + { 0x0131, 0x0049 }, + { 0x0138, 0x0138 }, + { 0x0149, 0x0149 }, + { 0x017F, 0x0053 }, + { 0x0180, 0x0243 }, + { 0x0188, 0x0187 }, + { 0x018C, 0x018B }, + { 0x018D, 0x018D }, + { 0x0192, 0x0191 }, + { 0x0195, 0x01F6 }, + { 0x0199, 0x0198 }, + { 0x019A, 0x023D }, + { 0x019B, 0x019B }, + { 0x019E, 0x0220 }, + { 0x01A8, 0x01A7 }, + { 0x01AD, 0x01AC }, + { 0x01B0, 0x01AF }, + { 0x01B9, 0x01B8 }, + { 0x01BA, 0x01BA }, + { 0x01BD, 0x01BC }, + { 0x01BE, 0x01BE }, + { 0x01BF, 0x01F7 }, + { 0x01C6, 0x01C4 }, + { 0x01C9, 0x01C7 }, + { 0x01CC, 0x01CA }, + { 0x01DD, 0x018E }, + { 0x01F0, 0x01F0 }, + { 0x01F3, 0x01F1 }, + { 0x01F5, 0x01F4 }, + { 0x0221, 0x0221 }, + { 0x023C, 0x023B }, + { 0x0242, 0x0241 }, + { 0x0250, 0x2C6F }, + { 0x0251, 0x2C6D }, + { 0x0252, 0x2C70 }, + { 0x0253, 0x0181 }, + { 0x0254, 0x0186 }, + { 0x0255, 0x0255 }, + { 0x0258, 0x0258 }, + { 0x0259, 0x018F }, + { 0x025A, 0x025A }, + { 0x025B, 0x0190 }, + { 0x025C, 0xA7AB }, + { 0x0260, 0x0193 }, + { 0x0261, 0xA7AC }, + { 0x0262, 0x0262 }, + { 0x0263, 0x0194 }, + { 0x0264, 0x0264 }, + { 0x0265, 0xA78D }, + { 0x0266, 0xA7AA }, + { 0x0267, 0x0267 }, + { 0x0268, 0x0197 }, + { 0x0269, 0x0196 }, + { 0x026A, 0xA7AE }, + { 0x026B, 0x2C62 }, + { 0x026C, 0xA7AD }, + { 0x026F, 0x019C }, + { 0x0270, 0x0270 }, + { 0x0271, 0x2C6E }, + { 0x0272, 0x019D }, + { 0x0275, 0x019F }, + { 0x027D, 0x2C64 }, + { 0x0280, 0x01A6 }, + { 0x0281, 0x0281 }, + { 0x0282, 0xA7C5 }, + { 0x0283, 0x01A9 }, + { 0x0287, 0xA7B1 }, + { 0x0288, 0x01AE }, + { 0x0289, 0x0244 }, + { 0x028C, 0x0245 }, + { 0x0292, 0x01B7 }, + { 0x0293, 0x0293 }, + { 0x029D, 0xA7B2 }, + { 0x029E, 0xA7B0 }, + { 0x0377, 0x0376 }, + { 0x0390, 0x0390 }, + { 0x03AC, 0x0386 }, + { 0x03B0, 0x03B0 }, + { 0x03C2, 0x03A3 }, + { 0x03CC, 0x038C }, + { 0x03D0, 0x0392 }, + { 0x03D1, 0x0398 }, + { 0x03D5, 0x03A6 }, + { 0x03D6, 0x03A0 }, + { 0x03D7, 0x03CF }, + { 0x03F0, 0x039A }, + { 0x03F1, 0x03A1 }, + { 0x03F2, 0x03F9 }, + { 0x03F3, 0x037F }, + { 0x03F5, 0x0395 }, + { 0x03F8, 0x03F7 }, + { 0x03FB, 0x03FA }, + { 0x03FC, 0x03FC }, + { 0x04CF, 0x04C0 }, + { 0x0560, 0x0560 }, + { 0x1C80, 0x0412 }, + { 0x1C81, 0x0414 }, + { 0x1C82, 0x041E }, + { 0x1C85, 0x0422 }, + { 0x1C86, 0x042A }, + { 0x1C87, 0x0462 }, + { 0x1C88, 0xA64A }, + { 0x1D79, 0xA77D }, + { 0x1D7D, 0x2C63 }, + { 0x1D8E, 0xA7C6 }, + { 0x1E9B, 0x1E60 }, + { 0x1E9F, 0x1E9F }, + { 0x1F50, 0x1F50 }, + { 0x1F51, 0x1F59 }, + { 0x1F52, 0x1F52 }, + { 0x1F53, 0x1F5B }, + { 0x1F54, 0x1F54 }, + { 0x1F55, 0x1F5D }, + { 0x1F56, 0x1F56 }, + { 0x1F57, 0x1F5F }, + { 0x1FB2, 0x1FB2 }, + { 0x1FB3, 0x1FBC }, + { 0x1FB4, 0x1FB4 }, + { 0x1FBE, 0x0399 }, + { 0x1FC2, 0x1FC2 }, + { 0x1FC3, 0x1FCC }, + { 0x1FC4, 0x1FC4 }, + { 0x1FE5, 0x1FEC }, + { 0x1FF2, 0x1FF2 }, + { 0x1FF3, 0x1FFC }, + { 0x1FF4, 0x1FF4 }, + { 0x210A, 0x210A }, + { 0x2113, 0x2113 }, + { 0x212F, 0x212F }, + { 0x2134, 0x2134 }, + { 0x2139, 0x2139 }, + { 0x214E, 0x2132 }, + { 0x2184, 0x2183 }, + { 0x2C61, 0x2C60 }, + { 0x2C65, 0x023A }, + { 0x2C66, 0x023E }, + { 0x2C71, 0x2C71 }, + { 0x2C73, 0x2C72 }, + { 0x2C74, 0x2C74 }, + { 0x2C76, 0x2C75 }, + { 0x2CE4, 0x2CE4 }, + { 0x2CF3, 0x2CF2 }, + { 0x2D27, 0x10C7 }, + { 0x2D2D, 0x10CD }, + { 0xA78C, 0xA78B }, + { 0xA78E, 0xA78E }, + { 0xA794, 0xA7C4 }, + { 0xA795, 0xA795 }, + { 0xA7AF, 0xA7AF }, + { 0xA7D1, 0xA7D0 }, + { 0xA7D3, 0xA7D3 }, + { 0xA7D5, 0xA7D5 }, + { 0xA7F6, 0xA7F5 }, + { 0xA7FA, 0xA7FA }, + { 0xAB53, 0xA7B3 }, + { 0x1D4BB, 0x1D4BB }, + { 0x1D7CB, 0x1D7CB }, +}; + +int +islowerrune(Rune r) +{ + const Rune *match; + + if((match = bsearch(&r, lower4, nelem(lower4), sizeof *lower4, &rune2cmp))) + return !((r - match[0]) % 2); + if(bsearch(&r, lower2, nelem(lower2), sizeof *lower2, &rune2cmp)) + return 1; + if(bsearch(&r, lower1, nelem(lower1), sizeof *lower1, &rune1cmp)) + return 1; + return 0; +} + +int +toupperrune(Rune r) +{ + Rune *match; + + match = bsearch(&r, lower4, nelem(lower4), sizeof *lower4, &rune2cmp); + if (match) + return ((r - match[0]) % 2) ? r : r - 1; + match = bsearch(&r, lower2, nelem(lower2), sizeof *lower2, &rune2cmp); + if (match) + return match[2] + (r - match[0]); + match = bsearch(&r, lower1, nelem(lower1), sizeof *lower1, &rune1cmp); + if (match) + return match[1]; + return r; +} diff --git a/util/sbase/libutf/mkrunetype.awk b/util/sbase/libutf/mkrunetype.awk new file mode 100644 index 00000000..e01ea2cc --- /dev/null +++ b/util/sbase/libutf/mkrunetype.awk @@ -0,0 +1,240 @@ +# See LICENSE file for copyright and license details. + +BEGIN { + FS = ";" + # set up hexadecimal lookup table + for(i = 0; i < 16; i++) + hex[sprintf("%X",i)] = i; + HEADER = "/* Automatically generated by mkrunetype.awk */\n#include <stdlib.h>\n\n#include \"../utf.h\"\n#include \"runetype.h\"\n" + HEADER_OTHER = "/* Automatically generated by mkrunetype.awk */\n#include \"../utf.h\"\n#include \"runetype.h\"\n" +} + +$3 ~ /^L/ { alphav[alphac++] = $1; } +($3 ~ /^Z/) || ($5 == "WS") || ($5 == "S") || ($5 == "B") { spacev[spacec++] = $1; } +$3 == "Cc" { cntrlv[cntrlc++] = $1; } +$3 == "Lu" { upperv[upperc++] = $1; tolowerv[uppercc++] = ($14 == "") ? $1 : $14; } +$3 == "Ll" { lowerv[lowerc++] = $1; toupperv[lowercc++] = ($13 == "") ? $1 : $13; } +$3 == "Lt" { titlev[titlec++] = $1; } +$3 == "Nd" { digitv[digitc++] = $1; } + +END { + system("rm -f isalpharune.c isspacerune.c iscntrlrune.c upperrune.c lowerrune.c istitlerune.c isdigitrune.c"); + + mkis("alpha", alphav, alphac, "isalpharune.c", q, ""); + mkis("space", spacev, spacec, "isspacerune.c", q, ""); + mkis("cntrl", cntrlv, cntrlc, "iscntrlrune.c", q, ""); + mkis("upper", upperv, upperc, "upperrune.c", tolowerv, "lower"); + mkis("lower", lowerv, lowerc, "lowerrune.c", toupperv, "upper"); + mkis("title", titlev, titlec, "istitlerune.c", q, ""); + mkis("digit", digitv, digitc, "isdigitrune.c", q, ""); + + system("rm -f isalnumrune.c isblankrune.c isprintrune.c isgraphrune.c ispunctrune.c isxdigitrune.c"); + + otheris(); +} + +# parse hexadecimal rune index to int +function code(s) { + x = 0; + for(i = 1; i <= length(s); i++) { + c = substr(s, i, 1); + x = (x*16) + hex[c]; + } + return x; +} + +# generate 'is<name>rune' unicode lookup function +function mkis(name, runev, runec, file, casev, casename) { + rune1c = 0; + rune2c = 0; + rune3c = 0; + rune4c = 0; + mode = 1; + + #sort rune groups into singletons, ranges and laces + for(j = 0; j < runec; j++) { + # range + if(code(runev[j+1]) == code(runev[j])+1 && ((length(casev) == 0) || + code(casev[j+1]) == code(casev[j])+1) && j+1 < runec) { + if (mode == 2) { + continue; + } else if (mode == 3) { + rune3v1[rune3c] = runev[j]; + rune3c++; + } else if (mode == 4) { + rune4v1[rune4c] = runev[j]; + rune4c++; + } + mode = 2; + rune2v0[rune2c] = runev[j]; + if(length(casev) > 0) { + case2v[rune2c] = casev[j]; + } + continue; + } + # lace 1 + if(code(runev[j+1]) == code(runev[j])+2 && ((length(casev) == 0) || + (code(casev[j+1]) == code(runev[j+1])+1 && code(casev[j]) == code(runev[j])+1)) && + j+1 < runec) { + if (mode == 3) { + continue; + } else if (mode == 2) { + rune2v1[rune2c] = runev[j]; + rune2c++; + } else if (mode == 4) { + rune4v1[rune2c] = runev[j]; + rune4c++; + } + mode = 3; + rune3v0[rune3c] = runev[j]; + continue; + } + # lace 2 + if(code(runev[j+1]) == code(runev[j])+2 && ((length(casev) == 0) || + (code(casev[j+1]) == code(runev[j+1])-1 && code(casev[j]) == code(runev[j])-1)) && + j+1 < runec) { + if (mode == 4) { + continue; + } else if (mode == 2) { + rune2v1[rune2c] = runev[j]; + rune2c++; + } else if (mode == 3) { + rune3v1[rune2c] = runev[j]; + rune3c++; + } + mode = 4; + rune4v0[rune4c] = runev[j]; + continue; + } + # terminating case + if (mode == 1) { + rune1v[rune1c] = runev[j]; + if (length(casev) > 0) { + case1v[rune1c] = casev[j]; + } + rune1c++; + } else if (mode == 2) { + rune2v1[rune2c] = runev[j]; + rune2c++; + } else if (mode == 3) { + rune3v1[rune3c] = runev[j]; + rune3c++; + } else { #lace 2 + rune4v1[rune4c] = runev[j]; + rune4c++; + } + mode = 1; + } + print HEADER > file; + + #generate list of laces 1 + if(rune3c > 0) { + print "static const Rune "name"3[][2] = {" > file; + for(j = 0; j < rune3c; j++) { + print "\t{ 0x"rune3v0[j]", 0x"rune3v1[j]" }," > file; + } + print "};\n" > file; + } + + #generate list of laces 2 + if(rune4c > 0) { + print "static const Rune "name"4[][2] = {" > file; + for(j = 0; j < rune4c; j++) { + print "\t{ 0x"rune4v0[j]", 0x"rune4v1[j]" }," > file; + } + print "};\n" > file; + } + + # generate list of ranges + if(rune2c > 0) { + if(length(casev) > 0) { + print "static const Rune "name"2[][3] = {" > file; + for(j = 0; j < rune2c; j++) { + print "\t{ 0x"rune2v0[j]", 0x"rune2v1[j]", 0x"case2v[j]" }," > file; + } + } else { + print "static const Rune "name"2[][2] = {" > file + for(j = 0; j < rune2c; j++) { + print "\t{ 0x"rune2v0[j]", 0x"rune2v1[j]" }," > file; + } + } + print "};\n" > file; + } + + # generate list of singletons + if(rune1c > 0) { + if(length(casev) > 0) { + print "static const Rune "name"1[][2] = {" > file; + for(j = 0; j < rune1c; j++) { + print "\t{ 0x"rune1v[j]", 0x"case1v[j]" }," > file; + } + } else { + print "static const Rune "name"1[] = {" > file; + for(j = 0; j < rune1c; j++) { + print "\t0x"rune1v[j]"," > file; + } + } + print "};\n" > file; + } + # generate lookup function + print "int\nis"name"rune(Rune r)\n{" > file; + if(rune4c > 0 || rune3c > 0) + print "\tconst Rune *match;\n" > file; + if(rune4c > 0) { + print "\tif((match = bsearch(&r, "name"4, nelem("name"4), sizeof *"name"4, &rune2cmp)))" > file; + print "\t\treturn !((r - match[0]) % 2);" > file; + } + if(rune3c > 0) { + print "\tif((match = bsearch(&r, "name"3, nelem("name"3), sizeof *"name"3, &rune2cmp)))" > file; + print "\t\treturn !((r - match[0]) % 2);" > file; + } + if(rune2c > 0) { + print "\tif(bsearch(&r, "name"2, nelem("name"2), sizeof *"name"2, &rune2cmp))\n\t\treturn 1;" > file; + } + if(rune1c > 0) { + print "\tif(bsearch(&r, "name"1, nelem("name"1), sizeof *"name"1, &rune1cmp))\n\t\treturn 1;" > file; + } + print "\treturn 0;\n}" > file; + + # generate case conversion function + if(length(casev) > 0) { + print "\nint\nto"casename"rune(Rune r)\n{\n\tRune *match;\n" > file; + if(rune4c > 0) { + print "\tmatch = bsearch(&r, "name"4, nelem("name"4), sizeof *"name"4, &rune2cmp);" > file; + print "\tif (match)" > file; + print "\t\treturn ((r - match[0]) % 2) ? r : r - 1;" > file; + } + if(rune3c > 0) { + print "\tmatch = bsearch(&r, "name"3, nelem("name"3), sizeof *"name"3, &rune2cmp);" > file; + print "\tif (match)" > file; + print "\t\treturn ((r - match[0]) % 2) ? r : r + 1;" > file; + } + if(rune2c > 0) { + print "\tmatch = bsearch(&r, "name"2, nelem("name"2), sizeof *"name"2, &rune2cmp);" > file; + print "\tif (match)" > file; + print "\t\treturn match[2] + (r - match[0]);" > file; + } + if(rune1c > 0) { + print "\tmatch = bsearch(&r, "name"1, nelem("name"1), sizeof *"name"1, &rune1cmp);" > file; + print "\tif (match)" > file; + print "\t\treturn match[1];" > file; + } + print "\treturn r;\n}" > file; + } +} + +function otheris() { + print HEADER_OTHER > "isalnumrune.c"; + print "int\nisalnumrune(Rune r)\n{\n\treturn isalpharune(r) || isdigitrune(r);\n}" > "isalnumrune.c"; + print HEADER_OTHER > "isblankrune.c"; + print "int\nisblankrune(Rune r)\n{\n\treturn r == ' ' || r == '\\t';\n}" > "isblankrune.c"; + print HEADER_OTHER > "isprintrune.c"; + print "int\nisprintrune(Rune r)\n{\n\treturn !iscntrlrune(r) && (r != 0x2028) && (r != 0x2029) &&" > "isprintrune.c"; + print "\t ((r < 0xFFF9) || (r > 0xFFFB));\n}" > "isprintrune.c"; + print HEADER_OTHER > "isgraphrune.c"; + print "int\nisgraphrune(Rune r)\n{\n\treturn !isspacerune(r) && isprintrune(r);\n}" > "isgraphrune.c"; + print HEADER_OTHER > "ispunctrune.c"; + print "int\nispunctrune(Rune r)\n{\n\treturn isgraphrune(r) && !isalnumrune(r);\n}" > "ispunctrune.c"; + print HEADER_OTHER > "isxdigitrune.c"; + print "int\nisxdigitrune(Rune r)\n{\n\treturn (r >= '0' && (r - '0') < 10) || (r >= 'a' && (r - 'a') < 6);\n}" > "isxdigitrune.c"; +} diff --git a/util/sbase/libutf/rune.c b/util/sbase/libutf/rune.c new file mode 100644 index 00000000..1273f451 --- /dev/null +++ b/util/sbase/libutf/rune.c @@ -0,0 +1,148 @@ +/* MIT/X Consortium Copyright (c) 2012 Connor Lane Smith <cls@lubutu.com> + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#include "../utf.h" + +#define MIN(x,y) ((x) < (y) ? (x) : (y)) + +#define UTFSEQ(x) ((((x) & 0x80) == 0x00) ? 1 /* 0xxxxxxx */ \ + : (((x) & 0xC0) == 0x80) ? 0 /* 10xxxxxx */ \ + : (((x) & 0xE0) == 0xC0) ? 2 /* 110xxxxx */ \ + : (((x) & 0xF0) == 0xE0) ? 3 /* 1110xxxx */ \ + : (((x) & 0xF8) == 0xF0) ? 4 /* 11110xxx */ \ + : (((x) & 0xFC) == 0xF8) ? 5 /* 111110xx */ \ + : (((x) & 0xFE) == 0xFC) ? 6 /* 1111110x */ \ + : 0 ) + +#define BADRUNE(x) ((x) < 0 || (x) > Runemax \ + || ((x) & 0xFFFE) == 0xFFFE \ + || ((x) >= 0xD800 && (x) <= 0xDFFF) \ + || ((x) >= 0xFDD0 && (x) <= 0xFDEF)) + +int +runetochar(char *s, const Rune *p) +{ + Rune r = *p; + + switch(runelen(r)) { + case 1: /* 0aaaaaaa */ + s[0] = r; + return 1; + case 2: /* 00000aaa aabbbbbb */ + s[0] = 0xC0 | ((r & 0x0007C0) >> 6); /* 110aaaaa */ + s[1] = 0x80 | (r & 0x00003F); /* 10bbbbbb */ + return 2; + case 3: /* aaaabbbb bbcccccc */ + s[0] = 0xE0 | ((r & 0x00F000) >> 12); /* 1110aaaa */ + s[1] = 0x80 | ((r & 0x000FC0) >> 6); /* 10bbbbbb */ + s[2] = 0x80 | (r & 0x00003F); /* 10cccccc */ + return 3; + case 4: /* 000aaabb bbbbcccc ccdddddd */ + s[0] = 0xF0 | ((r & 0x1C0000) >> 18); /* 11110aaa */ + s[1] = 0x80 | ((r & 0x03F000) >> 12); /* 10bbbbbb */ + s[2] = 0x80 | ((r & 0x000FC0) >> 6); /* 10cccccc */ + s[3] = 0x80 | (r & 0x00003F); /* 10dddddd */ + return 4; + default: + return 0; /* error */ + } +} + +int +chartorune(Rune *p, const char *s) +{ + return charntorune(p, s, UTFmax); +} + +int +charntorune(Rune *p, const char *s, size_t len) +{ + unsigned int i, n; + Rune r; + + if(len == 0) /* can't even look at s[0] */ + return 0; + + switch((n = UTFSEQ(s[0]))) { + case 1: r = s[0]; break; /* 0xxxxxxx */ + case 2: r = s[0] & 0x1F; break; /* 110xxxxx */ + case 3: r = s[0] & 0x0F; break; /* 1110xxxx */ + case 4: r = s[0] & 0x07; break; /* 11110xxx */ + case 5: r = s[0] & 0x03; break; /* 111110xx */ + case 6: r = s[0] & 0x01; break; /* 1111110x */ + default: /* invalid sequence */ + *p = Runeerror; + return 1; + } + /* add values from continuation bytes */ + for(i = 1; i < MIN(n, len); i++) + if((s[i] & 0xC0) == 0x80) { + /* add bits from continuation byte to rune value + * cannot overflow: 6 byte sequences contain 31 bits */ + r = (r << 6) | (s[i] & 0x3F); /* 10xxxxxx */ + } + else { /* expected continuation */ + *p = Runeerror; + return i; + } + + if(i < n) /* must have reached len limit */ + return 0; + + /* reject invalid or overlong sequences */ + if(BADRUNE(r) || runelen(r) < (int)n) + r = Runeerror; + + *p = r; + return n; +} + +int +runelen(Rune r) +{ + if(BADRUNE(r)) + return 0; /* error */ + else if(r <= 0x7F) + return 1; + else if(r <= 0x07FF) + return 2; + else if(r <= 0xFFFF) + return 3; + else + return 4; +} + +size_t +runenlen(const Rune *p, size_t len) +{ + size_t i, n = 0; + + for(i = 0; i < len; i++) + n += runelen(p[i]); + return n; +} + +int +fullrune(const char *s, size_t len) +{ + Rune r; + + return charntorune(&r, s, len) > 0; +} diff --git a/util/sbase/libutf/runetype.c b/util/sbase/libutf/runetype.c new file mode 100644 index 00000000..9e8ede8a --- /dev/null +++ b/util/sbase/libutf/runetype.c @@ -0,0 +1,41 @@ +/* MIT/X Consortium Copyright (c) 2012 Connor Lane Smith <cls@lubutu.com> + * (c) 2015 Laslo Hunhold <dev@frign.de> + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#include "../utf.h" + +int +rune1cmp(const void *v1, const void *v2) +{ + Rune r1 = *(Rune *)v1, r2 = *(Rune *)v2; + + return r1 - r2; +} + +int +rune2cmp(const void *v1, const void *v2) +{ + Rune r = *(Rune *)v1, *p = (Rune *)v2; + + if(r >= p[0] && r <= p[1]) + return 0; + else + return r - p[0]; +} diff --git a/util/sbase/libutf/runetype.h b/util/sbase/libutf/runetype.h new file mode 100644 index 00000000..8d09c347 --- /dev/null +++ b/util/sbase/libutf/runetype.h @@ -0,0 +1,26 @@ +/* MIT/X Consortium Copyright (c) 2012 Connor Lane Smith <cls@lubutu.com> + * (c) 2015 Laslo Hunhold <dev@frign.de> + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#define nelem(x) (sizeof (x) / sizeof *(x)) + +int rune1cmp(const void *, const void *); +int rune2cmp(const void *, const void *); diff --git a/util/sbase/libutf/upperrune.c b/util/sbase/libutf/upperrune.c new file mode 100644 index 00000000..0c874a85 --- /dev/null +++ b/util/sbase/libutf/upperrune.c @@ -0,0 +1,265 @@ +/* Automatically generated by mkrunetype.awk */ +#include <stdlib.h> + +#include "../utf.h" +#include "runetype.h" + +static const Rune upper3[][2] = { + { 0x0100, 0x012E }, + { 0x0132, 0x0136 }, + { 0x0139, 0x0147 }, + { 0x014A, 0x0176 }, + { 0x0179, 0x017D }, + { 0x0182, 0x0184 }, + { 0x01A0, 0x01A4 }, + { 0x01B3, 0x01B5 }, + { 0x01CD, 0x01DB }, + { 0x01DE, 0x01EE }, + { 0x01F8, 0x021E }, + { 0x0222, 0x0232 }, + { 0x0246, 0x024E }, + { 0x0370, 0x0372 }, + { 0x03D8, 0x03EE }, + { 0x0460, 0x0480 }, + { 0x048A, 0x04BE }, + { 0x04C1, 0x04CD }, + { 0x04D0, 0x052E }, + { 0x1E00, 0x1E94 }, + { 0x1EA0, 0x1EFE }, + { 0x2C67, 0x2C6B }, + { 0x2C80, 0x2CE2 }, + { 0x2CEB, 0x2CED }, + { 0xA640, 0xA66C }, + { 0xA680, 0xA69A }, + { 0xA722, 0xA72E }, + { 0xA732, 0xA76E }, + { 0xA779, 0xA77B }, + { 0xA77E, 0xA786 }, + { 0xA790, 0xA792 }, + { 0xA796, 0xA7A8 }, + { 0xA7B4, 0xA7C2 }, + { 0xA7C7, 0xA7C9 }, + { 0xA7D6, 0xA7D8 }, +}; + +static const Rune upper2[][3] = { + { 0x0041, 0x005A, 0x0061 }, + { 0x00C0, 0x00D6, 0x00E0 }, + { 0x00D8, 0x00DE, 0x00F8 }, + { 0x0189, 0x018A, 0x0256 }, + { 0x01B1, 0x01B2, 0x028A }, + { 0x0388, 0x038A, 0x03AD }, + { 0x038E, 0x038F, 0x03CD }, + { 0x0391, 0x03A1, 0x03B1 }, + { 0x03A3, 0x03AB, 0x03C3 }, + { 0x03D2, 0x03D4, 0x03D2 }, + { 0x03FD, 0x03FF, 0x037B }, + { 0x0400, 0x040F, 0x0450 }, + { 0x0410, 0x042F, 0x0430 }, + { 0x0531, 0x0556, 0x0561 }, + { 0x10A0, 0x10C5, 0x2D00 }, + { 0x13A0, 0x13EF, 0xAB70 }, + { 0x13F0, 0x13F5, 0x13F8 }, + { 0x1C90, 0x1CBA, 0x10D0 }, + { 0x1CBD, 0x1CBF, 0x10FD }, + { 0x1F08, 0x1F0F, 0x1F00 }, + { 0x1F18, 0x1F1D, 0x1F10 }, + { 0x1F28, 0x1F2F, 0x1F20 }, + { 0x1F38, 0x1F3F, 0x1F30 }, + { 0x1F48, 0x1F4D, 0x1F40 }, + { 0x1F68, 0x1F6F, 0x1F60 }, + { 0x1FB8, 0x1FB9, 0x1FB0 }, + { 0x1FBA, 0x1FBB, 0x1F70 }, + { 0x1FC8, 0x1FCB, 0x1F72 }, + { 0x1FD8, 0x1FD9, 0x1FD0 }, + { 0x1FDA, 0x1FDB, 0x1F76 }, + { 0x1FE8, 0x1FE9, 0x1FE0 }, + { 0x1FEA, 0x1FEB, 0x1F7A }, + { 0x1FF8, 0x1FF9, 0x1F78 }, + { 0x1FFA, 0x1FFB, 0x1F7C }, + { 0x210B, 0x210D, 0x210B }, + { 0x2110, 0x2112, 0x2110 }, + { 0x2119, 0x211D, 0x2119 }, + { 0x212C, 0x212D, 0x212C }, + { 0x2130, 0x2131, 0x2130 }, + { 0x213E, 0x213F, 0x213E }, + { 0x2C00, 0x2C2F, 0x2C30 }, + { 0x2C7E, 0x2C7F, 0x023F }, + { 0xFF21, 0xFF3A, 0xFF41 }, + { 0x10400, 0x10427, 0x10428 }, + { 0x104B0, 0x104D3, 0x104D8 }, + { 0x10570, 0x1057A, 0x10597 }, + { 0x1057C, 0x1058A, 0x105A3 }, + { 0x1058C, 0x10592, 0x105B3 }, + { 0x10594, 0x10595, 0x105BB }, + { 0x10C80, 0x10CB2, 0x10CC0 }, + { 0x118A0, 0x118BF, 0x118C0 }, + { 0x16E40, 0x16E5F, 0x16E60 }, + { 0x1D400, 0x1D419, 0x1D400 }, + { 0x1D434, 0x1D44D, 0x1D434 }, + { 0x1D468, 0x1D481, 0x1D468 }, + { 0x1D49E, 0x1D49F, 0x1D49E }, + { 0x1D4A5, 0x1D4A6, 0x1D4A5 }, + { 0x1D4A9, 0x1D4AC, 0x1D4A9 }, + { 0x1D4AE, 0x1D4B5, 0x1D4AE }, + { 0x1D4D0, 0x1D4E9, 0x1D4D0 }, + { 0x1D504, 0x1D505, 0x1D504 }, + { 0x1D507, 0x1D50A, 0x1D507 }, + { 0x1D50D, 0x1D514, 0x1D50D }, + { 0x1D516, 0x1D51C, 0x1D516 }, + { 0x1D538, 0x1D539, 0x1D538 }, + { 0x1D53B, 0x1D53E, 0x1D53B }, + { 0x1D540, 0x1D544, 0x1D540 }, + { 0x1D54A, 0x1D550, 0x1D54A }, + { 0x1D56C, 0x1D585, 0x1D56C }, + { 0x1D5A0, 0x1D5B9, 0x1D5A0 }, + { 0x1D5D4, 0x1D5ED, 0x1D5D4 }, + { 0x1D608, 0x1D621, 0x1D608 }, + { 0x1D63C, 0x1D655, 0x1D63C }, + { 0x1D670, 0x1D689, 0x1D670 }, + { 0x1D6A8, 0x1D6C0, 0x1D6A8 }, + { 0x1D6E2, 0x1D6FA, 0x1D6E2 }, + { 0x1D71C, 0x1D734, 0x1D71C }, + { 0x1D756, 0x1D76E, 0x1D756 }, + { 0x1D790, 0x1D7A8, 0x1D790 }, + { 0x1E900, 0x1E921, 0x1E922 }, +}; + +static const Rune upper1[][2] = { + { 0x0130, 0x0069 }, + { 0x0178, 0x00FF }, + { 0x0181, 0x0253 }, + { 0x0186, 0x0254 }, + { 0x0187, 0x0188 }, + { 0x018B, 0x018C }, + { 0x018E, 0x01DD }, + { 0x018F, 0x0259 }, + { 0x0190, 0x025B }, + { 0x0191, 0x0192 }, + { 0x0193, 0x0260 }, + { 0x0194, 0x0263 }, + { 0x0196, 0x0269 }, + { 0x0197, 0x0268 }, + { 0x0198, 0x0199 }, + { 0x019C, 0x026F }, + { 0x019D, 0x0272 }, + { 0x019F, 0x0275 }, + { 0x01A6, 0x0280 }, + { 0x01A7, 0x01A8 }, + { 0x01A9, 0x0283 }, + { 0x01AC, 0x01AD }, + { 0x01AE, 0x0288 }, + { 0x01AF, 0x01B0 }, + { 0x01B7, 0x0292 }, + { 0x01B8, 0x01B9 }, + { 0x01BC, 0x01BD }, + { 0x01C4, 0x01C6 }, + { 0x01C7, 0x01C9 }, + { 0x01CA, 0x01CC }, + { 0x01F1, 0x01F3 }, + { 0x01F4, 0x01F5 }, + { 0x01F6, 0x0195 }, + { 0x01F7, 0x01BF }, + { 0x0220, 0x019E }, + { 0x023A, 0x2C65 }, + { 0x023B, 0x023C }, + { 0x023D, 0x019A }, + { 0x023E, 0x2C66 }, + { 0x0241, 0x0242 }, + { 0x0243, 0x0180 }, + { 0x0244, 0x0289 }, + { 0x0245, 0x028C }, + { 0x0376, 0x0377 }, + { 0x037F, 0x03F3 }, + { 0x0386, 0x03AC }, + { 0x038C, 0x03CC }, + { 0x03CF, 0x03D7 }, + { 0x03F4, 0x03B8 }, + { 0x03F7, 0x03F8 }, + { 0x03F9, 0x03F2 }, + { 0x03FA, 0x03FB }, + { 0x04C0, 0x04CF }, + { 0x10C7, 0x2D27 }, + { 0x10CD, 0x2D2D }, + { 0x1E9E, 0x00DF }, + { 0x1F59, 0x1F51 }, + { 0x1F5B, 0x1F53 }, + { 0x1F5D, 0x1F55 }, + { 0x1F5F, 0x1F57 }, + { 0x1FEC, 0x1FE5 }, + { 0x2102, 0x2102 }, + { 0x2107, 0x2107 }, + { 0x2115, 0x2115 }, + { 0x2124, 0x2124 }, + { 0x2126, 0x03C9 }, + { 0x2128, 0x2128 }, + { 0x212A, 0x006B }, + { 0x212B, 0x00E5 }, + { 0x2132, 0x214E }, + { 0x2133, 0x2133 }, + { 0x2145, 0x2145 }, + { 0x2183, 0x2184 }, + { 0x2C60, 0x2C61 }, + { 0x2C62, 0x026B }, + { 0x2C63, 0x1D7D }, + { 0x2C64, 0x027D }, + { 0x2C6D, 0x0251 }, + { 0x2C6E, 0x0271 }, + { 0x2C6F, 0x0250 }, + { 0x2C70, 0x0252 }, + { 0x2C72, 0x2C73 }, + { 0x2C75, 0x2C76 }, + { 0x2CF2, 0x2CF3 }, + { 0xA77D, 0x1D79 }, + { 0xA78B, 0xA78C }, + { 0xA78D, 0x0265 }, + { 0xA7AA, 0x0266 }, + { 0xA7AB, 0x025C }, + { 0xA7AC, 0x0261 }, + { 0xA7AD, 0x026C }, + { 0xA7AE, 0x026A }, + { 0xA7B0, 0x029E }, + { 0xA7B1, 0x0287 }, + { 0xA7B2, 0x029D }, + { 0xA7B3, 0xAB53 }, + { 0xA7C4, 0xA794 }, + { 0xA7C5, 0x0282 }, + { 0xA7C6, 0x1D8E }, + { 0xA7D0, 0xA7D1 }, + { 0xA7F5, 0xA7F6 }, + { 0x1D49C, 0x1D49C }, + { 0x1D4A2, 0x1D4A2 }, + { 0x1D546, 0x1D546 }, + { 0x1D7CA, 0x1D7CA }, +}; + +int +isupperrune(Rune r) +{ + const Rune *match; + + if((match = bsearch(&r, upper3, nelem(upper3), sizeof *upper3, &rune2cmp))) + return !((r - match[0]) % 2); + if(bsearch(&r, upper2, nelem(upper2), sizeof *upper2, &rune2cmp)) + return 1; + if(bsearch(&r, upper1, nelem(upper1), sizeof *upper1, &rune1cmp)) + return 1; + return 0; +} + +int +tolowerrune(Rune r) +{ + Rune *match; + + match = bsearch(&r, upper3, nelem(upper3), sizeof *upper3, &rune2cmp); + if (match) + return ((r - match[0]) % 2) ? r : r + 1; + match = bsearch(&r, upper2, nelem(upper2), sizeof *upper2, &rune2cmp); + if (match) + return match[2] + (r - match[0]); + match = bsearch(&r, upper1, nelem(upper1), sizeof *upper1, &rune1cmp); + if (match) + return match[1]; + return r; +} diff --git a/util/sbase/libutf/utf.c b/util/sbase/libutf/utf.c new file mode 100644 index 00000000..492e020f --- /dev/null +++ b/util/sbase/libutf/utf.c @@ -0,0 +1,142 @@ +/* MIT/X Consortium Copyright (c) 2012 Connor Lane Smith <cls@lubutu.com> + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#include <string.h> +#include "../utf.h" + +char * +utfecpy(char *to, char *end, const char *from) +{ + Rune r = Runeerror; + size_t i, n; + + /* seek through to find final full rune */ + for(i = 0; r != '\0' && (n = charntorune(&r, &from[i], end - &to[i])); i += n) + ; + memcpy(to, from, i); /* copy over bytes up to this rune */ + + if(i > 0 && r != '\0') + to[i] = '\0'; /* terminate if unterminated */ + return &to[i]; +} + +size_t +utflen(const char *s) +{ + const char *p = s; + size_t i; + Rune r; + + for(i = 0; *p != '\0'; i++) + p += chartorune(&r, p); + return i; +} + +size_t +utfnlen(const char *s, size_t len) +{ + const char *p = s; + size_t i; + Rune r; + int n; + + for(i = 0; (n = charntorune(&r, p, len-(p-s))) && r != '\0'; i++) + p += n; + return i; +} + +size_t +utfmemlen(const char *s, size_t len) +{ + const char *p = s; + size_t i; + Rune r; + int n; + + for(i = 0; (n = charntorune(&r, p, len-(p-s))); i++) + p += n; + return i; +} + +char * +utfrune(const char *s, Rune r) +{ + if(r < Runeself) { + return strchr(s, r); + } + else if(r == Runeerror) { + Rune r0; + int n; + + for(; *s != '\0'; s += n) { + n = chartorune(&r0, s); + if(r == r0) + return (char *)s; + } + } + else { + char buf[UTFmax+1]; + int n; + + if(!(n = runetochar(buf, &r))) + return NULL; + buf[n] = '\0'; + return strstr(s, buf); + } + return NULL; +} + +char * +utfrrune(const char *s, Rune r) +{ + const char *p = NULL; + Rune r0; + int n; + + if(r < Runeself) + return strrchr(s, r); + + for(; *s != '\0'; s += n) { + n = chartorune(&r0, s); + if(r == r0) + p = s; + } + return (char *)p; +} + +char * +utfutf(const char *s, const char *t) +{ + const char *p, *q; + Rune r0, r1, r2; + int n, m; + + for(chartorune(&r0, t); (s = utfrune(s, r0)); s++) { + for(p = s, q = t; *q && *p; p += n, q += m) { + n = chartorune(&r1, p); + m = chartorune(&r2, q); + if(r1 != r2) + break; + } + if(!*q) + return (char *)s; + } + return NULL; +} diff --git a/util/sbase/libutf/utftorunestr.c b/util/sbase/libutf/utftorunestr.c new file mode 100644 index 00000000..e182bc15 --- /dev/null +++ b/util/sbase/libutf/utftorunestr.c @@ -0,0 +1,27 @@ +/* See LICENSE file for copyright and license details. */ +#include "../utf.h" + +size_t +utftorunestr(const char *str, Rune *r) +{ + size_t i; + int n; + + for (i = 0; (n = chartorune(&r[i], str)) && r[i]; i++) + str += n; + + return i; +} + +size_t +utfntorunestr(const char *str, size_t len, Rune *r) +{ + size_t i; + int n; + const char *end = str + len; + + for (i = 0; (n = charntorune(&r[i], str, end - str)); i++) + str += n; + + return i; +} diff --git a/util/sbase/libutil/concat.c b/util/sbase/libutil/concat.c new file mode 100644 index 00000000..2e9aa521 --- /dev/null +++ b/util/sbase/libutil/concat.c @@ -0,0 +1,23 @@ +/* See LICENSE file for copyright and license details. */ +#include <unistd.h> + +#include "../util.h" + +int +concat(int f1, const char *s1, int f2, const char *s2) +{ + char buf[BUFSIZ]; + ssize_t n; + + while ((n = read(f1, buf, sizeof(buf))) > 0) { + if (writeall(f2, buf, n) < 0) { + weprintf("write %s:", s2); + return -2; + } + } + if (n < 0) { + weprintf("read %s:", s1); + return -1; + } + return 0; +} diff --git a/util/sbase/libutil/confirm.c b/util/sbase/libutil/confirm.c new file mode 100644 index 00000000..44396af9 --- /dev/null +++ b/util/sbase/libutil/confirm.c @@ -0,0 +1,22 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdarg.h> +#include <ctype.h> + +#include "../util.h" + +int +confirm(const char *fmt, ...) +{ + int c, ans; + va_list ap; + + va_start(ap, fmt); + xvprintf(fmt, ap); + va_end(ap); + + c = getchar(); + ans = (c == 'y' || c == 'Y'); + while (c != '\n' && c != EOF) + c = getchar(); + return ans; +} diff --git a/util/sbase/libutil/cp.c b/util/sbase/libutil/cp.c new file mode 100644 index 00000000..2ab32a03 --- /dev/null +++ b/util/sbase/libutil/cp.c @@ -0,0 +1,176 @@ +/* See LICENSE file for copyright and license details. */ +#include <dirent.h> +#include <errno.h> +#include <fcntl.h> +#include <limits.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <sys/stat.h> +#include <sys/types.h> +#include <unistd.h> +#include <utime.h> + +#include "../fs.h" +#include "../util.h" + +int cp_aflag = 0; +int cp_fflag = 0; +int cp_iflag = 0; +int cp_pflag = 0; +int cp_rflag = 0; +int cp_vflag = 0; +int cp_status = 0; +int cp_follow; + +int +cp(const char *s1, const char *s2, int depth) +{ + DIR *dp; + int f1, f2, flags = 0; + struct dirent *d; + struct stat st; + struct timespec times[2]; + ssize_t r; + char target[PATH_MAX], ns1[PATH_MAX], ns2[PATH_MAX]; + + if (cp_follow == 'P' || (cp_follow == 'H' && depth)) + flags |= AT_SYMLINK_NOFOLLOW; + + if (fstatat(AT_FDCWD, s1, &st, flags) < 0) { + weprintf("stat %s:", s1); + cp_status = 1; + return 0; + } + + if (cp_iflag && access(s2, F_OK) == 0) { + if (!confirm("overwrite '%s'? ", s2)) + return 0; + } + + if (cp_vflag) + printf("%s -> %s\n", s1, s2); + + if (S_ISLNK(st.st_mode)) { + if ((r = readlink(s1, target, sizeof(target) - 1)) >= 0) { + target[r] = '\0'; + if (cp_fflag && unlink(s2) < 0 && errno != ENOENT) { + weprintf("unlink %s:", s2); + cp_status = 1; + return 0; + } else if (symlink(target, s2) < 0) { + weprintf("symlink %s -> %s:", s2, target); + cp_status = 1; + return 0; + } + } + } else if (S_ISDIR(st.st_mode)) { + if (!cp_rflag) { + weprintf("%s is a directory\n", s1); + cp_status = 1; + return 0; + } + if (!(dp = opendir(s1))) { + weprintf("opendir %s:", s1); + cp_status = 1; + return 0; + } + if (mkdir(s2, st.st_mode) < 0 && errno != EEXIST) { + weprintf("mkdir %s:", s2); + cp_status = 1; + closedir(dp); + return 0; + } + + while ((d = readdir(dp))) { + if (!strcmp(d->d_name, ".") || !strcmp(d->d_name, "..")) + continue; + + estrlcpy(ns1, s1, sizeof(ns1)); + if (s1[strlen(s1) - 1] != '/') + estrlcat(ns1, "/", sizeof(ns1)); + estrlcat(ns1, d->d_name, sizeof(ns1)); + + estrlcpy(ns2, s2, sizeof(ns2)); + if (s2[strlen(s2) - 1] != '/') + estrlcat(ns2, "/", sizeof(ns2)); + estrlcat(ns2, d->d_name, sizeof(ns2)); + + fnck(ns1, ns2, cp, depth + 1); + } + + closedir(dp); + } else if (cp_aflag && (S_ISBLK(st.st_mode) || S_ISCHR(st.st_mode) || + S_ISSOCK(st.st_mode) || S_ISFIFO(st.st_mode))) { + if (cp_fflag && unlink(s2) < 0 && errno != ENOENT) { + weprintf("unlink %s:", s2); + cp_status = 1; + return 0; + } else if (mknod(s2, st.st_mode, st.st_rdev) < 0) { + weprintf("mknod %s:", s2); + cp_status = 1; + return 0; + } + } else { + if ((f1 = open(s1, O_RDONLY)) < 0) { + weprintf("open %s:", s1); + cp_status = 1; + return 0; + } + if ((f2 = creat(s2, st.st_mode)) < 0 && cp_fflag) { + if (unlink(s2) < 0 && errno != ENOENT) { + weprintf("unlink %s:", s2); + cp_status = 1; + close(f1); + return 0; + } + f2 = creat(s2, st.st_mode); + } + if (f2 < 0) { + weprintf("creat %s:", s2); + cp_status = 1; + close(f1); + return 0; + } + if (concat(f1, s1, f2, s2) < 0) { + cp_status = 1; + close(f1); + close(f2); + return 0; + } + + close(f1); + close(f2); + } + + if (cp_aflag || cp_pflag) { + /* atime and mtime */ + times[0] = st.st_atim; + times[1] = st.st_mtim; + if (utimensat(AT_FDCWD, s2, times, AT_SYMLINK_NOFOLLOW) < 0) { + weprintf("utimensat %s:", s2); + cp_status = 1; + } + + /* owner and mode */ + if (!S_ISLNK(st.st_mode)) { + if (chown(s2, st.st_uid, st.st_gid) < 0) { + weprintf("chown %s:", s2); + cp_status = 1; + st.st_mode &= ~(S_ISUID | S_ISGID); + } + if (chmod(s2, st.st_mode) < 0) { + weprintf("chmod %s:", s2); + cp_status = 1; + } + } else { + if (lchown(s2, st.st_uid, st.st_gid) < 0) { + weprintf("lchown %s:", s2); + cp_status = 1; + return 0; + } + } + } + + return 0; +} diff --git a/util/sbase/libutil/crypt.c b/util/sbase/libutil/crypt.c new file mode 100644 index 00000000..e285614b --- /dev/null +++ b/util/sbase/libutil/crypt.c @@ -0,0 +1,184 @@ +/* See LICENSE file for copyright and license details. */ +#include <fcntl.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + +#include "../crypt.h" +#include "../text.h" +#include "../util.h" + +static int +hexdec(int c) +{ + if (c >= '0' && c <= '9') + return c - '0'; + else if (c >= 'A' && c <= 'F') + return c - 'A' + 10; + else if (c >= 'a' && c <= 'f') + return c - 'a' + 10; + return -1; /* unknown character */ +} + +static int +mdcheckline(const char *s, uint8_t *md, size_t sz) +{ + size_t i; + int b1, b2; + + for (i = 0; i < sz; i++) { + if (!*s || (b1 = hexdec(*s++)) < 0) + return -1; /* invalid format */ + if (!*s || (b2 = hexdec(*s++)) < 0) + return -1; /* invalid format */ + if ((uint8_t)((b1 << 4) | b2) != md[i]) + return 0; /* value mismatch */ + } + return (i == sz) ? 1 : 0; +} + +static void +mdchecklist(FILE *listfp, struct crypt_ops *ops, uint8_t *md, size_t sz, + int *formatsucks, int *noread, int *nonmatch) +{ + int fd; + size_t bufsiz = 0; + int r; + char *line = NULL, *file, *p; + + while (getline(&line, &bufsiz, listfp) > 0) { + if (!(file = strstr(line, " "))) { + (*formatsucks)++; + continue; + } + if ((file - line) / 2 != sz) { + (*formatsucks)++; /* checksum length mismatch */ + continue; + } + *file = '\0'; + file += 2; + for (p = file; *p && *p != '\n' && *p != '\r'; p++); /* strip newline */ + *p = '\0'; + if ((fd = open(file, O_RDONLY)) < 0) { + weprintf("open %s:", file); + (*noread)++; + continue; + } + if (cryptsum(ops, fd, file, md)) { + (*noread)++; + continue; + } + r = mdcheckline(line, md, sz); + if (r == 1) { + printf("%s: OK\n", file); + } else if (r == 0) { + printf("%s: FAILED\n", file); + (*nonmatch)++; + } else { + (*formatsucks)++; + } + close(fd); + } + free(line); +} + +int +cryptcheck(int argc, char *argv[], struct crypt_ops *ops, uint8_t *md, size_t sz) +{ + FILE *fp; + int formatsucks = 0, noread = 0, nonmatch = 0, ret = 0; + + if (argc == 0) { + mdchecklist(stdin, ops, md, sz, &formatsucks, &noread, &nonmatch); + } else { + for (; *argv; argc--, argv++) { + if ((*argv)[0] == '-' && !(*argv)[1]) { + fp = stdin; + } else if (!(fp = fopen(*argv, "r"))) { + weprintf("fopen %s:", *argv); + ret = 1; + continue; + } + mdchecklist(fp, ops, md, sz, &formatsucks, &noread, &nonmatch); + if (fp != stdin) + fclose(fp); + } + } + + if (formatsucks) { + weprintf("%d lines are improperly formatted\n", formatsucks); + ret = 1; + } + if (noread) { + weprintf("%d listed file could not be read\n", noread); + ret = 1; + } + if (nonmatch) { + weprintf("%d computed checksums did NOT match\n", nonmatch); + ret = 1; + } + + return ret; +} + +int +cryptmain(int argc, char *argv[], struct crypt_ops *ops, uint8_t *md, size_t sz) +{ + int fd; + int ret = 0; + + if (argc == 0) { + if (cryptsum(ops, 0, "<stdin>", md)) + ret = 1; + else + mdprint(md, "<stdin>", sz); + } else { + for (; *argv; argc--, argv++) { + if ((*argv)[0] == '-' && !(*argv)[1]) { + *argv = "<stdin>"; + fd = 0; + } else if ((fd = open(*argv, O_RDONLY)) < 0) { + weprintf("open %s:", *argv); + ret = 1; + continue; + } + if (cryptsum(ops, fd, *argv, md)) + ret = 1; + else + mdprint(md, *argv, sz); + if (fd != 0) + close(fd); + } + } + + return ret; +} + +int +cryptsum(struct crypt_ops *ops, int fd, const char *f, uint8_t *md) +{ + uint8_t buf[BUFSIZ]; + ssize_t n; + + ops->init(ops->s); + while ((n = read(fd, buf, sizeof(buf))) > 0) + ops->update(ops->s, buf, n); + if (n < 0) { + weprintf("%s: read error:", f); + return 1; + } + ops->sum(ops->s, md); + return 0; +} + +void +mdprint(const uint8_t *md, const char *f, size_t len) +{ + size_t i; + + for (i = 0; i < len; i++) + printf("%02x", md[i]); + printf(" %s\n", f); +} diff --git a/util/sbase/libutil/ealloc.c b/util/sbase/libutil/ealloc.c new file mode 100644 index 00000000..320865da --- /dev/null +++ b/util/sbase/libutil/ealloc.c @@ -0,0 +1,88 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdlib.h> +#include <string.h> + +#include "../util.h" + +void * +ecalloc(size_t nmemb, size_t size) +{ + return encalloc(1, nmemb, size); +} + +void * +emalloc(size_t size) +{ + return enmalloc(1, size); +} + +void * +erealloc(void *p, size_t size) +{ + return enrealloc(1, p, size); +} + +char * +estrdup(const char *s) +{ + return enstrdup(1, s); +} + +char * +estrndup(const char *s, size_t n) +{ + return enstrndup(1, s, n); +} + +void * +encalloc(int status, size_t nmemb, size_t size) +{ + void *p; + + p = calloc(nmemb, size); + if (!p) + enprintf(status, "calloc: out of memory\n"); + return p; +} + +void * +enmalloc(int status, size_t size) +{ + void *p; + + p = malloc(size); + if (!p) + enprintf(status, "malloc: out of memory\n"); + return p; +} + +void * +enrealloc(int status, void *p, size_t size) +{ + p = realloc(p, size); + if (!p) + enprintf(status, "realloc: out of memory\n"); + return p; +} + +char * +enstrdup(int status, const char *s) +{ + char *p; + + p = strdup(s); + if (!p) + enprintf(status, "strdup: out of memory\n"); + return p; +} + +char * +enstrndup(int status, const char *s, size_t n) +{ + char *p; + + p = strndup(s, n); + if (!p) + enprintf(status, "strndup: out of memory\n"); + return p; +} diff --git a/util/sbase/libutil/enmasse.c b/util/sbase/libutil/enmasse.c new file mode 100644 index 00000000..a2e225ab --- /dev/null +++ b/util/sbase/libutil/enmasse.c @@ -0,0 +1,38 @@ +/* See LICENSE file for copyright and license details. */ +#include <libgen.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <sys/stat.h> +#include <unistd.h> + +#include "../util.h" + +void +enmasse(int argc, char *argv[], int (*fn)(const char *, const char *, int)) +{ + struct stat st; + char buf[PATH_MAX], *dir; + int i, len; + size_t dlen; + + if (argc == 2 && !(stat(argv[1], &st) == 0 && S_ISDIR(st.st_mode))) { + fnck(argv[0], argv[1], fn, 0); + return; + } else { + dir = (argc == 1) ? "." : argv[--argc]; + } + + for (i = 0; i < argc; i++) { + dlen = strlen(dir); + if (dlen > 0 && dir[dlen - 1] == '/') + len = snprintf(buf, sizeof(buf), "%s%s", dir, basename(argv[i])); + else + len = snprintf(buf, sizeof(buf), "%s/%s", dir, basename(argv[i])); + if (len < 0 || len >= sizeof(buf)) { + eprintf("%s/%s: filename too long\n", dir, + basename(argv[i])); + } + fnck(argv[i], buf, fn, 0); + } +} diff --git a/util/sbase/libutil/eprintf.c b/util/sbase/libutil/eprintf.c new file mode 100644 index 00000000..7197fbb9 --- /dev/null +++ b/util/sbase/libutil/eprintf.c @@ -0,0 +1,57 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdarg.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "../util.h" + +char *argv0; + +void +eprintf(const char *fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + xvprintf(fmt, ap); + va_end(ap); + + exit(1); +} + +void +enprintf(int status, const char *fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + xvprintf(fmt, ap); + va_end(ap); + + exit(status); +} + +void +weprintf(const char *fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + xvprintf(fmt, ap); + va_end(ap); +} + +void +xvprintf(const char *fmt, va_list ap) +{ + if (argv0 && strncmp(fmt, "usage", strlen("usage"))) + fprintf(stderr, "%s: ", argv0); + + vfprintf(stderr, fmt, ap); + + if (fmt[0] && fmt[strlen(fmt)-1] == ':') { + fputc(' ', stderr); + perror(NULL); + } +} diff --git a/util/sbase/libutil/eregcomp.c b/util/sbase/libutil/eregcomp.c new file mode 100644 index 00000000..02c8698c --- /dev/null +++ b/util/sbase/libutil/eregcomp.c @@ -0,0 +1,27 @@ +#include <sys/types.h> + +#include <regex.h> +#include <stdio.h> + +#include "../util.h" + +int +enregcomp(int status, regex_t *preg, const char *regex, int cflags) +{ + char errbuf[BUFSIZ] = ""; + int r; + + if ((r = regcomp(preg, regex, cflags)) == 0) + return r; + + regerror(r, preg, errbuf, sizeof(errbuf)); + enprintf(status, "invalid regex: %s\n", errbuf); + + return r; +} + +int +eregcomp(regex_t *preg, const char *regex, int cflags) +{ + return enregcomp(1, preg, regex, cflags); +} diff --git a/util/sbase/libutil/estrtod.c b/util/sbase/libutil/estrtod.c new file mode 100644 index 00000000..24e4fdce --- /dev/null +++ b/util/sbase/libutil/estrtod.c @@ -0,0 +1,18 @@ +/* See LICENSE file for copyright and license details. */ +#include <errno.h> +#include <stdio.h> +#include <stdlib.h> + +#include "../util.h" + +double +estrtod(const char *s) +{ + char *end; + double d; + + d = strtod(s, &end); + if (end == s || *end != '\0') + eprintf("%s: not a real number\n", s); + return d; +} diff --git a/util/sbase/libutil/fnck.c b/util/sbase/libutil/fnck.c new file mode 100644 index 00000000..4f8875ba --- /dev/null +++ b/util/sbase/libutil/fnck.c @@ -0,0 +1,22 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> + +#include "../util.h" + +void +fnck(const char *a, const char *b, + int (*fn)(const char *, const char *, int), int depth) +{ + struct stat sta, stb; + + if (!stat(a, &sta) + && !stat(b, &stb) + && sta.st_dev == stb.st_dev + && sta.st_ino == stb.st_ino) { + weprintf("%s -> %s: same file\n", a, b); + return; + } + + if (fn(a, b, depth) < 0) + eprintf("%s -> %s:", a, b); +} diff --git a/util/sbase/libutil/fshut.c b/util/sbase/libutil/fshut.c new file mode 100644 index 00000000..e596f074 --- /dev/null +++ b/util/sbase/libutil/fshut.c @@ -0,0 +1,43 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> +#include <stdlib.h> + +#include "../util.h" + +int +fshut(FILE *fp, const char *fname) +{ + int ret = 0; + + /* fflush() is undefined for input streams by ISO C, + * but not POSIX 2008 if you ignore ISO C overrides. + * Leave it unchecked and rely on the following + * functions to detect errors. + */ + fflush(fp); + + if (ferror(fp) && !ret) { + weprintf("ferror %s:", fname); + ret = 1; + } + + if (fclose(fp) && !ret) { + weprintf("fclose %s:", fname); + ret = 1; + } + + return ret; +} + +void +enfshut(int status, FILE *fp, const char *fname) +{ + if (fshut(fp, fname)) + exit(status); +} + +void +efshut(FILE *fp, const char *fname) +{ + enfshut(1, fp, fname); +} diff --git a/util/sbase/libutil/getlines.c b/util/sbase/libutil/getlines.c new file mode 100644 index 00000000..cef9a612 --- /dev/null +++ b/util/sbase/libutil/getlines.c @@ -0,0 +1,32 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "../text.h" +#include "../util.h" + +void +getlines(FILE *fp, struct linebuf *b) +{ + char *line = NULL; + size_t size = 0, linelen = 0; + ssize_t len; + + while ((len = getline(&line, &size, fp)) > 0) { + if (++b->nlines > b->capacity) { + b->capacity += 512; + b->lines = ereallocarray(b->lines, b->capacity, sizeof(*b->lines)); + } + linelen = len; + b->lines[b->nlines - 1].data = memcpy(emalloc(linelen + 1), line, linelen + 1); + b->lines[b->nlines - 1].len = linelen; + } + free(line); + if (b->lines && b->nlines && linelen && b->lines[b->nlines - 1].data[linelen - 1] != '\n') { + b->lines[b->nlines - 1].data = erealloc(b->lines[b->nlines - 1].data, linelen + 2); + b->lines[b->nlines - 1].data[linelen] = '\n'; + b->lines[b->nlines - 1].data[linelen + 1] = '\0'; + b->lines[b->nlines - 1].len++; + } +} diff --git a/util/sbase/libutil/human.c b/util/sbase/libutil/human.c new file mode 100644 index 00000000..7e39ba5f --- /dev/null +++ b/util/sbase/libutil/human.c @@ -0,0 +1,25 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> +#include <string.h> +#include <stdint.h> + +#include "../util.h" + +char * +humansize(off_t n) +{ + static char buf[16]; + const char postfixes[] = "BKMGTPE"; + double size; + int i; + + for (size = n, i = 0; size >= 1024 && i < strlen(postfixes); i++) + size /= 1024; + + if (!i) + snprintf(buf, sizeof(buf), "%ju", (uintmax_t)n); + else + snprintf(buf, sizeof(buf), "%.1f%c", size, postfixes[i]); + + return buf; +} diff --git a/util/sbase/libutil/linecmp.c b/util/sbase/libutil/linecmp.c new file mode 100644 index 00000000..08fc0e3a --- /dev/null +++ b/util/sbase/libutil/linecmp.c @@ -0,0 +1,17 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> +#include <string.h> + +#include "../text.h" +#include "../util.h" + +int +linecmp(struct line *a, struct line *b) +{ + int res = 0; + + if (!(res = memcmp(a->data, b->data, MIN(a->len, b->len)))) + res = a->len - b->len; + + return res; +} diff --git a/util/sbase/libutil/md5.c b/util/sbase/libutil/md5.c new file mode 100644 index 00000000..c7483ac6 --- /dev/null +++ b/util/sbase/libutil/md5.c @@ -0,0 +1,148 @@ +/* public domain md5 implementation based on rfc1321 and libtomcrypt */ +#include <stdint.h> +#include <string.h> + +#include "../md5.h" + +static uint32_t rol(uint32_t n, int k) { return (n << k) | (n >> (32-k)); } +#define F(x,y,z) (z ^ (x & (y ^ z))) +#define G(x,y,z) (y ^ (z & (y ^ x))) +#define H(x,y,z) (x ^ y ^ z) +#define I(x,y,z) (y ^ (x | ~z)) +#define FF(a,b,c,d,w,s,t) a += F(b,c,d) + w + t; a = rol(a,s) + b +#define GG(a,b,c,d,w,s,t) a += G(b,c,d) + w + t; a = rol(a,s) + b +#define HH(a,b,c,d,w,s,t) a += H(b,c,d) + w + t; a = rol(a,s) + b +#define II(a,b,c,d,w,s,t) a += I(b,c,d) + w + t; a = rol(a,s) + b + +static const uint32_t tab[64] = { + 0xd76aa478, 0xe8c7b756, 0x242070db, 0xc1bdceee, 0xf57c0faf, 0x4787c62a, 0xa8304613, 0xfd469501, + 0x698098d8, 0x8b44f7af, 0xffff5bb1, 0x895cd7be, 0x6b901122, 0xfd987193, 0xa679438e, 0x49b40821, + 0xf61e2562, 0xc040b340, 0x265e5a51, 0xe9b6c7aa, 0xd62f105d, 0x02441453, 0xd8a1e681, 0xe7d3fbc8, + 0x21e1cde6, 0xc33707d6, 0xf4d50d87, 0x455a14ed, 0xa9e3e905, 0xfcefa3f8, 0x676f02d9, 0x8d2a4c8a, + 0xfffa3942, 0x8771f681, 0x6d9d6122, 0xfde5380c, 0xa4beea44, 0x4bdecfa9, 0xf6bb4b60, 0xbebfbc70, + 0x289b7ec6, 0xeaa127fa, 0xd4ef3085, 0x04881d05, 0xd9d4d039, 0xe6db99e5, 0x1fa27cf8, 0xc4ac5665, + 0xf4292244, 0x432aff97, 0xab9423a7, 0xfc93a039, 0x655b59c3, 0x8f0ccc92, 0xffeff47d, 0x85845dd1, + 0x6fa87e4f, 0xfe2ce6e0, 0xa3014314, 0x4e0811a1, 0xf7537e82, 0xbd3af235, 0x2ad7d2bb, 0xeb86d391 +}; + +static void +processblock(struct md5 *s, const uint8_t *buf) +{ + uint32_t i, W[16], a, b, c, d; + + for (i = 0; i < 16; i++) { + W[i] = buf[4*i]; + W[i] |= (uint32_t)buf[4*i+1]<<8; + W[i] |= (uint32_t)buf[4*i+2]<<16; + W[i] |= (uint32_t)buf[4*i+3]<<24; + } + + a = s->h[0]; + b = s->h[1]; + c = s->h[2]; + d = s->h[3]; + + i = 0; + while (i < 16) { + FF(a,b,c,d, W[i], 7, tab[i]); i++; + FF(d,a,b,c, W[i], 12, tab[i]); i++; + FF(c,d,a,b, W[i], 17, tab[i]); i++; + FF(b,c,d,a, W[i], 22, tab[i]); i++; + } + while (i < 32) { + GG(a,b,c,d, W[(5*i+1)%16], 5, tab[i]); i++; + GG(d,a,b,c, W[(5*i+1)%16], 9, tab[i]); i++; + GG(c,d,a,b, W[(5*i+1)%16], 14, tab[i]); i++; + GG(b,c,d,a, W[(5*i+1)%16], 20, tab[i]); i++; + } + while (i < 48) { + HH(a,b,c,d, W[(3*i+5)%16], 4, tab[i]); i++; + HH(d,a,b,c, W[(3*i+5)%16], 11, tab[i]); i++; + HH(c,d,a,b, W[(3*i+5)%16], 16, tab[i]); i++; + HH(b,c,d,a, W[(3*i+5)%16], 23, tab[i]); i++; + } + while (i < 64) { + II(a,b,c,d, W[7*i%16], 6, tab[i]); i++; + II(d,a,b,c, W[7*i%16], 10, tab[i]); i++; + II(c,d,a,b, W[7*i%16], 15, tab[i]); i++; + II(b,c,d,a, W[7*i%16], 21, tab[i]); i++; + } + + s->h[0] += a; + s->h[1] += b; + s->h[2] += c; + s->h[3] += d; +} + +static void +pad(struct md5 *s) +{ + unsigned r = s->len % 64; + + s->buf[r++] = 0x80; + if (r > 56) { + memset(s->buf + r, 0, 64 - r); + r = 0; + processblock(s, s->buf); + } + memset(s->buf + r, 0, 56 - r); + s->len *= 8; + s->buf[56] = s->len; + s->buf[57] = s->len >> 8; + s->buf[58] = s->len >> 16; + s->buf[59] = s->len >> 24; + s->buf[60] = s->len >> 32; + s->buf[61] = s->len >> 40; + s->buf[62] = s->len >> 48; + s->buf[63] = s->len >> 56; + processblock(s, s->buf); +} + +void +md5_init(void *ctx) +{ + struct md5 *s = ctx; + s->len = 0; + s->h[0] = 0x67452301; + s->h[1] = 0xefcdab89; + s->h[2] = 0x98badcfe; + s->h[3] = 0x10325476; +} + +void +md5_sum(void *ctx, uint8_t md[MD5_DIGEST_LENGTH]) +{ + struct md5 *s = ctx; + int i; + + pad(s); + for (i = 0; i < 4; i++) { + md[4*i] = s->h[i]; + md[4*i+1] = s->h[i] >> 8; + md[4*i+2] = s->h[i] >> 16; + md[4*i+3] = s->h[i] >> 24; + } +} + +void +md5_update(void *ctx, const void *m, unsigned long len) +{ + struct md5 *s = ctx; + const uint8_t *p = m; + unsigned r = s->len % 64; + + s->len += len; + if (r) { + if (len < 64 - r) { + memcpy(s->buf + r, p, len); + return; + } + memcpy(s->buf + r, p, 64 - r); + len -= 64 - r; + p += 64 - r; + processblock(s, s->buf); + } + for (; len >= 64; len -= 64, p += 64) + processblock(s, p); + memcpy(s->buf, p, len); +} diff --git a/util/sbase/libutil/memmem.c b/util/sbase/libutil/memmem.c new file mode 100644 index 00000000..7dfef34b --- /dev/null +++ b/util/sbase/libutil/memmem.c @@ -0,0 +1,66 @@ +/* $OpenBSD: memmem.c,v 1.4 2015/08/31 02:53:57 guenther Exp $ */ + +/* + * Copyright (c) 2005 Pascal Gloor <pascal.gloor@spale.com> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote + * products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <string.h> + +#include "../util.h" + +/* + * Find the first occurrence of the byte string s in byte string l. + */ + +void * +memmem(const void *l, size_t l_len, const void *s, size_t s_len) +{ + const char *cur, *last; + const char *cl = l; + const char *cs = s; + + /* a zero length needle should just return the haystack */ + if (s_len == 0) + return (void *)cl; + + /* "s" must be smaller or equal to "l" */ + if (l_len < s_len) + return NULL; + + /* special case where s_len == 1 */ + if (s_len == 1) + return memchr(l, *cs, l_len); + + /* the last position where its possible to find "s" in "l" */ + last = cl + l_len - s_len; + + for (cur = cl; cur <= last; cur++) + if (cur[0] == cs[0] && memcmp(cur, cs, s_len) == 0) + return (void *)cur; + + return NULL; +} diff --git a/util/sbase/libutil/mkdirp.c b/util/sbase/libutil/mkdirp.c new file mode 100644 index 00000000..c3c678c0 --- /dev/null +++ b/util/sbase/libutil/mkdirp.c @@ -0,0 +1,39 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> + +#include <errno.h> +#include <limits.h> + +#include "../util.h" + +int +mkdirp(const char *path, mode_t mode, mode_t pmode) +{ + char tmp[PATH_MAX], *p; + struct stat st; + + if (stat(path, &st) == 0) { + if (S_ISDIR(st.st_mode)) + return 0; + errno = ENOTDIR; + weprintf("%s:", path); + return -1; + } + + estrlcpy(tmp, path, sizeof(tmp)); + for (p = tmp + (tmp[0] == '/'); *p; p++) { + if (*p != '/') + continue; + *p = '\0'; + if (mkdir(tmp, pmode) < 0 && errno != EEXIST) { + weprintf("mkdir %s:", tmp); + return -1; + } + *p = '/'; + } + if (mkdir(tmp, mode) < 0 && errno != EEXIST) { + weprintf("mkdir %s:", tmp); + return -1; + } + return 0; +} diff --git a/util/sbase/libutil/mode.c b/util/sbase/libutil/mode.c new file mode 100644 index 00000000..2754be79 --- /dev/null +++ b/util/sbase/libutil/mode.c @@ -0,0 +1,152 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdlib.h> +#include <string.h> +#include <sys/stat.h> +#include <unistd.h> + +#include "../util.h" + +mode_t +getumask(void) +{ + mode_t mask = umask(0); + umask(mask); + return mask; +} + +mode_t +parsemode(const char *str, mode_t mode, mode_t mask) +{ + char *end; + const char *p = str; + int octal, op; + mode_t who, perm, clear; + + octal = strtol(str, &end, 8); + if (*end == '\0') { + if (octal < 0 || octal > 07777) + eprintf("%s: invalid mode\n", str); + return octal; + } +next: + /* first, determine which bits we will be modifying */ + for (who = 0; *p; p++) { + switch (*p) { + /* masks */ + case 'u': + who |= S_IRWXU|S_ISUID; + continue; + case 'g': + who |= S_IRWXG|S_ISGID; + continue; + case 'o': + who |= S_IRWXO|S_ISVTX; + continue; + case 'a': + who |= S_IRWXU|S_ISUID|S_IRWXG|S_ISGID|S_IRWXO|S_ISVTX; + continue; + } + break; + } + if (who) { + clear = who; + } else { + clear = S_ISUID|S_ISGID|S_ISVTX|S_IRWXU|S_IRWXG|S_IRWXO; + who = ~mask; + } + while (*p) { + switch (*p) { + /* opers */ + case '=': + case '+': + case '-': + op = (int)*p; + break; + default: + eprintf("%s: invalid mode\n", str); + } + + perm = 0; + switch (*++p) { + /* copy */ + case 'u': + if (mode & S_IRUSR) + perm |= S_IRUSR|S_IRGRP|S_IROTH; + if (mode & S_IWUSR) + perm |= S_IWUSR|S_IWGRP|S_IWOTH; + if (mode & S_IXUSR) + perm |= S_IXUSR|S_IXGRP|S_IXOTH; + if (mode & S_ISUID) + perm |= S_ISUID|S_ISGID; + p++; + break; + case 'g': + if (mode & S_IRGRP) + perm |= S_IRUSR|S_IRGRP|S_IROTH; + if (mode & S_IWGRP) + perm |= S_IWUSR|S_IWGRP|S_IWOTH; + if (mode & S_IXGRP) + perm |= S_IXUSR|S_IXGRP|S_IXOTH; + if (mode & S_ISGID) + perm |= S_ISUID|S_ISGID; + p++; + break; + case 'o': + if (mode & S_IROTH) + perm |= S_IRUSR|S_IRGRP|S_IROTH; + if (mode & S_IWOTH) + perm |= S_IWUSR|S_IWGRP|S_IWOTH; + if (mode & S_IXOTH) + perm |= S_IXUSR|S_IXGRP|S_IXOTH; + p++; + break; + default: + for (; *p; p++) { + switch (*p) { + /* modes */ + case 'r': + perm |= S_IRUSR|S_IRGRP|S_IROTH; + break; + case 'w': + perm |= S_IWUSR|S_IWGRP|S_IWOTH; + break; + case 'x': + perm |= S_IXUSR|S_IXGRP|S_IXOTH; + break; + case 'X': + if (S_ISDIR(mode) || mode & (S_IXUSR|S_IXGRP|S_IXOTH)) + perm |= S_IXUSR|S_IXGRP|S_IXOTH; + break; + case 's': + perm |= S_ISUID|S_ISGID; + break; + case 't': + perm |= S_ISVTX; + break; + default: + goto apply; + } + } + } + +apply: + /* apply */ + switch (op) { + case '=': + mode &= ~clear; + /* fallthrough */ + case '+': + mode |= perm & who; + break; + case '-': + mode &= ~(perm & who); + break; + } + /* if we hit a comma, move on to the next clause */ + if (*p == ',') { + p++; + goto next; + } + } + return mode & ~S_IFMT; +} diff --git a/util/sbase/libutil/parseoffset.c b/util/sbase/libutil/parseoffset.c new file mode 100644 index 00000000..362a7829 --- /dev/null +++ b/util/sbase/libutil/parseoffset.c @@ -0,0 +1,61 @@ +/* See LICENSE file for copyright and license details. */ +#include <ctype.h> +#include <errno.h> +#include <inttypes.h> +#include <stdlib.h> +#include <string.h> + +#include "../util.h" + +off_t +parseoffset(const char *str) +{ + off_t res, scale = 1; + char *end; + + /* strictly check what strtol() usually would let pass */ + if (!str || !*str || isspace(*str) || *str == '+' || *str == '-') { + weprintf("parseoffset %s: invalid value\n", str); + return -1; + } + + errno = 0; + res = strtol(str, &end, 0); + if (errno) { + weprintf("parseoffset %s: invalid value\n", str); + return -1; + } + if (res < 0) { + weprintf("parseoffset %s: negative value\n", str); + return -1; + } + + /* suffix */ + if (*end) { + switch (toupper((int)*end)) { + case 'B': + scale = 512L; + break; + case 'K': + scale = 1024L; + break; + case 'M': + scale = 1024L * 1024L; + break; + case 'G': + scale = 1024L * 1024L * 1024L; + break; + default: + weprintf("parseoffset %s: invalid suffix '%s'\n", str, end); + return -1; + } + } + + /* prevent overflow */ + if (res > (SSIZE_MAX / scale)) { + weprintf("parseoffset %s: out of range\n", str); + return -1; + } + + return res * scale; +} diff --git a/util/sbase/libutil/putword.c b/util/sbase/libutil/putword.c new file mode 100644 index 00000000..80a9860a --- /dev/null +++ b/util/sbase/libutil/putword.c @@ -0,0 +1,16 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> + +#include "../util.h" + +void +putword(FILE *fp, const char *s) +{ + static int first = 1; + + if (!first) + fputc(' ', fp); + + fputs(s, fp); + first = 0; +} diff --git a/util/sbase/libutil/reallocarray.c b/util/sbase/libutil/reallocarray.c new file mode 100644 index 00000000..31ff6c31 --- /dev/null +++ b/util/sbase/libutil/reallocarray.c @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2008 Otto Moerbeek <otto@drijf.net> + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include <sys/types.h> +#include <errno.h> +#include <stdint.h> +#include <stdlib.h> + +#include "../util.h" + +/* + * This is sqrt(SIZE_MAX+1), as s1*s2 <= SIZE_MAX + * if both s1 < MUL_NO_OVERFLOW and s2 < MUL_NO_OVERFLOW + */ +#define MUL_NO_OVERFLOW (1UL << (sizeof(size_t) * 4)) + +void * +reallocarray(void *optr, size_t nmemb, size_t size) +{ + if ((nmemb >= MUL_NO_OVERFLOW || size >= MUL_NO_OVERFLOW) && + nmemb > 0 && SIZE_MAX / nmemb < size) { + errno = ENOMEM; + return NULL; + } + return realloc(optr, size * nmemb); +} + +void * +ereallocarray(void *optr, size_t nmemb, size_t size) +{ + return enreallocarray(1, optr, nmemb, size); +} + +void * +enreallocarray(int status, void *optr, size_t nmemb, size_t size) +{ + void *p; + + if (!(p = reallocarray(optr, nmemb, size))) + enprintf(status, "reallocarray: out of memory\n"); + + return p; +} diff --git a/util/sbase/libutil/recurse.c b/util/sbase/libutil/recurse.c new file mode 100644 index 00000000..e66efaf5 --- /dev/null +++ b/util/sbase/libutil/recurse.c @@ -0,0 +1,108 @@ +/* See LICENSE file for copyright and license details. */ +#include <dirent.h> +#include <errno.h> +#include <fcntl.h> +#include <limits.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <sys/stat.h> +#include <sys/types.h> +#include <unistd.h> + +#include "../fs.h" +#include "../util.h" + +int recurse_status = 0; + +void +recurse(int dirfd, const char *name, void *data, struct recursor *r) +{ + struct dirent *d; + struct history *new, *h; + struct stat st, dst; + DIR *dp; + int flags = 0, fd; + size_t pathlen = r->pathlen; + + if (dirfd == AT_FDCWD) + pathlen = estrlcpy(r->path, name, sizeof(r->path)); + + if (r->follow == 'P' || (r->follow == 'H' && r->depth)) + flags |= AT_SYMLINK_NOFOLLOW; + + if (fstatat(dirfd, name, &st, flags) < 0) { + if (!(r->flags & SILENT)) { + weprintf("stat %s:", r->path); + recurse_status = 1; + } + return; + } + if (!S_ISDIR(st.st_mode)) { + r->fn(dirfd, name, &st, data, r); + return; + } + + new = emalloc(sizeof(struct history)); + new->prev = r->hist; + r->hist = new; + new->dev = st.st_dev; + new->ino = st.st_ino; + + for (h = new->prev; h; h = h->prev) + if (h->ino == st.st_ino && h->dev == st.st_dev) + return; + + if (!r->depth && (r->flags & DIRFIRST)) + r->fn(dirfd, name, &st, data, r); + + if (!r->maxdepth || r->depth + 1 < r->maxdepth) { + fd = openat(dirfd, name, O_RDONLY | O_CLOEXEC | O_DIRECTORY); + if (fd < 0) { + weprintf("open %s:", r->path); + recurse_status = 1; + } + if (!(dp = fdopendir(fd))) { + if (!(r->flags & SILENT)) { + weprintf("fdopendir:"); + recurse_status = 1; + } + return; + } + if (r->path[pathlen - 1] != '/') + r->path[pathlen++] = '/'; + if (r->follow == 'H') + flags |= AT_SYMLINK_NOFOLLOW; + while ((d = readdir(dp))) { + if (!strcmp(d->d_name, ".") || !strcmp(d->d_name, "..")) + continue; + r->pathlen = pathlen + estrlcpy(r->path + pathlen, d->d_name, sizeof(r->path) - pathlen); + if (fstatat(fd, d->d_name, &dst, flags) < 0) { + if (!(r->flags & SILENT)) { + weprintf("stat %s:", r->path); + recurse_status = 1; + } + } else if ((r->flags & SAMEDEV) && dst.st_dev != st.st_dev) { + continue; + } else { + r->depth++; + r->fn(fd, d->d_name, &dst, data, r); + r->depth--; + } + } + r->path[pathlen - 1] = '\0'; + r->pathlen = pathlen - 1; + closedir(dp); + } + + if (!r->depth) { + if (!(r->flags & DIRFIRST)) + r->fn(dirfd, name, &st, data, r); + + while (r->hist) { + h = r->hist; + r->hist = r->hist->prev; + free(h); + } + } +} diff --git a/util/sbase/libutil/rm.c b/util/sbase/libutil/rm.c new file mode 100644 index 00000000..fb99840d --- /dev/null +++ b/util/sbase/libutil/rm.c @@ -0,0 +1,49 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> + +#include <errno.h> +#include <fcntl.h> +#include <stdio.h> +#include <unistd.h> + +#include "../fs.h" +#include "../util.h" + +int rm_status = 0; + +void +rm(int dirfd, const char *name, struct stat *st, void *data, struct recursor *r) +{ + int quiet, ask, write, flags, ignore; + + ignore = r->flags & IGNORE; + quiet = r->flags & SILENT; + ask = r->flags & CONFIRM; + write = faccessat(dirfd, name, W_OK, 0) == 0; + flags = 0; + + if (S_ISDIR(st->st_mode) && r->maxdepth) { + errno = EISDIR; + goto err; + } + + if (!quiet && (!write && isatty(0) || ask)) { + if (!confirm("remove file '%s'", r->path)); + return; + } + + if (S_ISDIR(st->st_mode)) { + flags = AT_REMOVEDIR; + recurse(dirfd, name, NULL, r); + } + + if (unlinkat(dirfd, name, flags) < 0) + goto err; + return; + +err: + if (!ignore) { + weprintf("cannot remove '%s':", r->path); + rm_status = 1; + } +} diff --git a/util/sbase/libutil/sha1.c b/util/sbase/libutil/sha1.c new file mode 100644 index 00000000..3d76a1be --- /dev/null +++ b/util/sbase/libutil/sha1.c @@ -0,0 +1,144 @@ +/* public domain sha1 implementation based on rfc3174 and libtomcrypt */ +#include <stdint.h> +#include <string.h> + +#include "../sha1.h" + +static uint32_t rol(uint32_t n, int k) { return (n << k) | (n >> (32-k)); } +#define F0(b,c,d) (d ^ (b & (c ^ d))) +#define F1(b,c,d) (b ^ c ^ d) +#define F2(b,c,d) ((b & c) | (d & (b | c))) +#define F3(b,c,d) (b ^ c ^ d) +#define G0(a,b,c,d,e,i) e += rol(a,5)+F0(b,c,d)+W[i]+0x5A827999; b = rol(b,30) +#define G1(a,b,c,d,e,i) e += rol(a,5)+F1(b,c,d)+W[i]+0x6ED9EBA1; b = rol(b,30) +#define G2(a,b,c,d,e,i) e += rol(a,5)+F2(b,c,d)+W[i]+0x8F1BBCDC; b = rol(b,30) +#define G3(a,b,c,d,e,i) e += rol(a,5)+F3(b,c,d)+W[i]+0xCA62C1D6; b = rol(b,30) + +static void +processblock(struct sha1 *s, const uint8_t *buf) +{ + uint32_t W[80], a, b, c, d, e; + int i; + + for (i = 0; i < 16; i++) { + W[i] = (uint32_t)buf[4*i]<<24; + W[i] |= (uint32_t)buf[4*i+1]<<16; + W[i] |= (uint32_t)buf[4*i+2]<<8; + W[i] |= buf[4*i+3]; + } + for (; i < 80; i++) + W[i] = rol(W[i-3] ^ W[i-8] ^ W[i-14] ^ W[i-16], 1); + a = s->h[0]; + b = s->h[1]; + c = s->h[2]; + d = s->h[3]; + e = s->h[4]; + for (i = 0; i < 20; ) { + G0(a,b,c,d,e,i++); + G0(e,a,b,c,d,i++); + G0(d,e,a,b,c,i++); + G0(c,d,e,a,b,i++); + G0(b,c,d,e,a,i++); + } + while (i < 40) { + G1(a,b,c,d,e,i++); + G1(e,a,b,c,d,i++); + G1(d,e,a,b,c,i++); + G1(c,d,e,a,b,i++); + G1(b,c,d,e,a,i++); + } + while (i < 60) { + G2(a,b,c,d,e,i++); + G2(e,a,b,c,d,i++); + G2(d,e,a,b,c,i++); + G2(c,d,e,a,b,i++); + G2(b,c,d,e,a,i++); + } + while (i < 80) { + G3(a,b,c,d,e,i++); + G3(e,a,b,c,d,i++); + G3(d,e,a,b,c,i++); + G3(c,d,e,a,b,i++); + G3(b,c,d,e,a,i++); + } + s->h[0] += a; + s->h[1] += b; + s->h[2] += c; + s->h[3] += d; + s->h[4] += e; +} + +static void +pad(struct sha1 *s) +{ + unsigned r = s->len % 64; + + s->buf[r++] = 0x80; + if (r > 56) { + memset(s->buf + r, 0, 64 - r); + r = 0; + processblock(s, s->buf); + } + memset(s->buf + r, 0, 56 - r); + s->len *= 8; + s->buf[56] = s->len >> 56; + s->buf[57] = s->len >> 48; + s->buf[58] = s->len >> 40; + s->buf[59] = s->len >> 32; + s->buf[60] = s->len >> 24; + s->buf[61] = s->len >> 16; + s->buf[62] = s->len >> 8; + s->buf[63] = s->len; + processblock(s, s->buf); +} + +void +sha1_init(void *ctx) +{ + struct sha1 *s = ctx; + + s->len = 0; + s->h[0] = 0x67452301; + s->h[1] = 0xEFCDAB89; + s->h[2] = 0x98BADCFE; + s->h[3] = 0x10325476; + s->h[4] = 0xC3D2E1F0; +} + +void +sha1_sum(void *ctx, uint8_t md[SHA1_DIGEST_LENGTH]) +{ + struct sha1 *s = ctx; + int i; + + pad(s); + for (i = 0; i < 5; i++) { + md[4*i] = s->h[i] >> 24; + md[4*i+1] = s->h[i] >> 16; + md[4*i+2] = s->h[i] >> 8; + md[4*i+3] = s->h[i]; + } +} + +void +sha1_update(void *ctx, const void *m, unsigned long len) +{ + struct sha1 *s = ctx; + const uint8_t *p = m; + unsigned r = s->len % 64; + + s->len += len; + if (r) { + if (len < 64 - r) { + memcpy(s->buf + r, p, len); + return; + } + memcpy(s->buf + r, p, 64 - r); + len -= 64 - r; + p += 64 - r; + processblock(s, s->buf); + } + for (; len >= 64; len -= 64, p += 64) + processblock(s, p); + memcpy(s->buf, p, len); +} diff --git a/util/sbase/libutil/sha224.c b/util/sbase/libutil/sha224.c new file mode 100644 index 00000000..fce520f5 --- /dev/null +++ b/util/sbase/libutil/sha224.c @@ -0,0 +1,26 @@ +/* public domain sha224 implementation based on fips180-3 */ +#include <stdint.h> +#include "../sha224.h" + +extern void sha256_sum_n(void *, uint8_t *, int n); + +void +sha224_init(void *ctx) +{ + struct sha224 *s = ctx; + s->len = 0; + s->h[0] = 0xc1059ed8; + s->h[1] = 0x367cd507; + s->h[2] = 0x3070dd17; + s->h[3] = 0xf70e5939; + s->h[4] = 0xffc00b31; + s->h[5] = 0x68581511; + s->h[6] = 0x64f98fa7; + s->h[7] = 0xbefa4fa4; +} + +void +sha224_sum(void *ctx, uint8_t md[SHA224_DIGEST_LENGTH]) +{ + sha256_sum_n(ctx, md, 8); +} diff --git a/util/sbase/libutil/sha256.c b/util/sbase/libutil/sha256.c new file mode 100644 index 00000000..266cfecb --- /dev/null +++ b/util/sbase/libutil/sha256.c @@ -0,0 +1,154 @@ +/* public domain sha256 implementation based on fips180-3 */ +#include <ctype.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "../sha256.h" + +static uint32_t ror(uint32_t n, int k) { return (n >> k) | (n << (32-k)); } +#define Ch(x,y,z) (z ^ (x & (y ^ z))) +#define Maj(x,y,z) ((x & y) | (z & (x | y))) +#define S0(x) (ror(x,2) ^ ror(x,13) ^ ror(x,22)) +#define S1(x) (ror(x,6) ^ ror(x,11) ^ ror(x,25)) +#define R0(x) (ror(x,7) ^ ror(x,18) ^ (x>>3)) +#define R1(x) (ror(x,17) ^ ror(x,19) ^ (x>>10)) + +static const uint32_t K[64] = { +0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5, +0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3, 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, +0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da, +0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967, +0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13, 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, +0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070, +0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3, +0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208, 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2 +}; + +static void +processblock(struct sha256 *s, const uint8_t *buf) +{ + uint32_t W[64], t1, t2, a, b, c, d, e, f, g, h; + int i; + + for (i = 0; i < 16; i++) { + W[i] = (uint32_t)buf[4*i]<<24; + W[i] |= (uint32_t)buf[4*i+1]<<16; + W[i] |= (uint32_t)buf[4*i+2]<<8; + W[i] |= buf[4*i+3]; + } + for (; i < 64; i++) + W[i] = R1(W[i-2]) + W[i-7] + R0(W[i-15]) + W[i-16]; + a = s->h[0]; + b = s->h[1]; + c = s->h[2]; + d = s->h[3]; + e = s->h[4]; + f = s->h[5]; + g = s->h[6]; + h = s->h[7]; + for (i = 0; i < 64; i++) { + t1 = h + S1(e) + Ch(e,f,g) + K[i] + W[i]; + t2 = S0(a) + Maj(a,b,c); + h = g; + g = f; + f = e; + e = d + t1; + d = c; + c = b; + b = a; + a = t1 + t2; + } + s->h[0] += a; + s->h[1] += b; + s->h[2] += c; + s->h[3] += d; + s->h[4] += e; + s->h[5] += f; + s->h[6] += g; + s->h[7] += h; +} + +static void +pad(struct sha256 *s) +{ + unsigned r = s->len % 64; + + s->buf[r++] = 0x80; + if (r > 56) { + memset(s->buf + r, 0, 64 - r); + r = 0; + processblock(s, s->buf); + } + memset(s->buf + r, 0, 56 - r); + s->len *= 8; + s->buf[56] = s->len >> 56; + s->buf[57] = s->len >> 48; + s->buf[58] = s->len >> 40; + s->buf[59] = s->len >> 32; + s->buf[60] = s->len >> 24; + s->buf[61] = s->len >> 16; + s->buf[62] = s->len >> 8; + s->buf[63] = s->len; + processblock(s, s->buf); +} + +void +sha256_init(void *ctx) +{ + struct sha256 *s = ctx; + s->len = 0; + s->h[0] = 0x6a09e667; + s->h[1] = 0xbb67ae85; + s->h[2] = 0x3c6ef372; + s->h[3] = 0xa54ff53a; + s->h[4] = 0x510e527f; + s->h[5] = 0x9b05688c; + s->h[6] = 0x1f83d9ab; + s->h[7] = 0x5be0cd19; +} + +void +sha256_sum_n(void *ctx, uint8_t *md, int n) +{ + struct sha256 *s = ctx; + int i; + + pad(s); + for (i = 0; i < n; i++) { + md[4*i] = s->h[i] >> 24; + md[4*i+1] = s->h[i] >> 16; + md[4*i+2] = s->h[i] >> 8; + md[4*i+3] = s->h[i]; + } +} + +void +sha256_sum(void *ctx, uint8_t md[SHA256_DIGEST_LENGTH]) +{ + sha256_sum_n(ctx, md, 8); +} + +void +sha256_update(void *ctx, const void *m, unsigned long len) +{ + struct sha256 *s = ctx; + const uint8_t *p = m; + unsigned r = s->len % 64; + + s->len += len; + if (r) { + if (len < 64 - r) { + memcpy(s->buf + r, p, len); + return; + } + memcpy(s->buf + r, p, 64 - r); + len -= 64 - r; + p += 64 - r; + processblock(s, s->buf); + } + for (; len >= 64; len -= 64, p += 64) + processblock(s, p); + memcpy(s->buf, p, len); +} diff --git a/util/sbase/libutil/sha384.c b/util/sbase/libutil/sha384.c new file mode 100644 index 00000000..0a0e7777 --- /dev/null +++ b/util/sbase/libutil/sha384.c @@ -0,0 +1,26 @@ +/* public domain sha384 implementation based on fips180-3 */ +#include <stdint.h> +#include "../sha384.h" + +extern void sha512_sum_n(void *, uint8_t *, int n); + +void +sha384_init(void *ctx) +{ + struct sha384 *s = ctx; + s->len = 0; + s->h[0] = 0xcbbb9d5dc1059ed8ULL; + s->h[1] = 0x629a292a367cd507ULL; + s->h[2] = 0x9159015a3070dd17ULL; + s->h[3] = 0x152fecd8f70e5939ULL; + s->h[4] = 0x67332667ffc00b31ULL; + s->h[5] = 0x8eb44a8768581511ULL; + s->h[6] = 0xdb0c2e0d64f98fa7ULL; + s->h[7] = 0x47b5481dbefa4fa4ULL; +} + +void +sha384_sum(void *ctx, uint8_t md[SHA384_DIGEST_LENGTH]) +{ + sha512_sum_n(ctx, md, 6); +} diff --git a/util/sbase/libutil/sha512-224.c b/util/sbase/libutil/sha512-224.c new file mode 100644 index 00000000..a5636c13 --- /dev/null +++ b/util/sbase/libutil/sha512-224.c @@ -0,0 +1,26 @@ +/* public domain sha512/224 implementation based on fips180-3 */ +#include <stdint.h> +#include "../sha512-224.h" + +extern void sha512_sum_n(void *, uint8_t *, int n); + +void +sha512_224_init(void *ctx) +{ + struct sha512_224 *s = ctx; + s->len = 0; + s->h[0] = 0x8c3d37c819544da2ULL; + s->h[1] = 0x73e1996689dcd4d6ULL; + s->h[2] = 0x1dfab7ae32ff9c82ULL; + s->h[3] = 0x679dd514582f9fcfULL; + s->h[4] = 0x0f6d2b697bd44da8ULL; + s->h[5] = 0x77e36f7304c48942ULL; + s->h[6] = 0x3f9d85a86a1d36c8ULL; + s->h[7] = 0x1112e6ad91d692a1ULL; +} + +void +sha512_224_sum(void *ctx, uint8_t md[SHA512_224_DIGEST_LENGTH]) +{ + sha512_sum_n(ctx, md, 4); +} diff --git a/util/sbase/libutil/sha512-256.c b/util/sbase/libutil/sha512-256.c new file mode 100644 index 00000000..d4b84495 --- /dev/null +++ b/util/sbase/libutil/sha512-256.c @@ -0,0 +1,26 @@ +/* public domain sha512/256 implementation based on fips180-3 */ +#include <stdint.h> +#include "../sha512-256.h" + +extern void sha512_sum_n(void *, uint8_t *, int n); + +void +sha512_256_init(void *ctx) +{ + struct sha512_256 *s = ctx; + s->len = 0; + s->h[0] = 0x22312194fc2bf72cULL; + s->h[1] = 0x9f555fa3c84c64c2ULL; + s->h[2] = 0x2393b86b6f53b151ULL; + s->h[3] = 0x963877195940eabdULL; + s->h[4] = 0x96283ee2a88effe3ULL; + s->h[5] = 0xbe5e1e2553863992ULL; + s->h[6] = 0x2b0199fc2c85b8aaULL; + s->h[7] = 0x0eb72ddc81c52ca2ULL; +} + +void +sha512_256_sum(void *ctx, uint8_t md[SHA512_256_DIGEST_LENGTH]) +{ + sha512_sum_n(ctx, md, 4); +} diff --git a/util/sbase/libutil/sha512.c b/util/sbase/libutil/sha512.c new file mode 100644 index 00000000..25264c78 --- /dev/null +++ b/util/sbase/libutil/sha512.c @@ -0,0 +1,175 @@ +/* public domain sha256 implementation based on fips180-3 */ + +#include <ctype.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "../sha512.h" + +static uint64_t ror(uint64_t n, int k) { return (n >> k) | (n << (64-k)); } +#define Ch(x,y,z) (z ^ (x & (y ^ z))) +#define Maj(x,y,z) ((x & y) | (z & (x | y))) +#define S0(x) (ror(x,28) ^ ror(x,34) ^ ror(x,39)) +#define S1(x) (ror(x,14) ^ ror(x,18) ^ ror(x,41)) +#define R0(x) (ror(x,1) ^ ror(x,8) ^ (x>>7)) +#define R1(x) (ror(x,19) ^ ror(x,61) ^ (x>>6)) + +static const uint64_t K[80] = { +0x428a2f98d728ae22ULL, 0x7137449123ef65cdULL, 0xb5c0fbcfec4d3b2fULL, 0xe9b5dba58189dbbcULL, +0x3956c25bf348b538ULL, 0x59f111f1b605d019ULL, 0x923f82a4af194f9bULL, 0xab1c5ed5da6d8118ULL, +0xd807aa98a3030242ULL, 0x12835b0145706fbeULL, 0x243185be4ee4b28cULL, 0x550c7dc3d5ffb4e2ULL, +0x72be5d74f27b896fULL, 0x80deb1fe3b1696b1ULL, 0x9bdc06a725c71235ULL, 0xc19bf174cf692694ULL, +0xe49b69c19ef14ad2ULL, 0xefbe4786384f25e3ULL, 0x0fc19dc68b8cd5b5ULL, 0x240ca1cc77ac9c65ULL, +0x2de92c6f592b0275ULL, 0x4a7484aa6ea6e483ULL, 0x5cb0a9dcbd41fbd4ULL, 0x76f988da831153b5ULL, +0x983e5152ee66dfabULL, 0xa831c66d2db43210ULL, 0xb00327c898fb213fULL, 0xbf597fc7beef0ee4ULL, +0xc6e00bf33da88fc2ULL, 0xd5a79147930aa725ULL, 0x06ca6351e003826fULL, 0x142929670a0e6e70ULL, +0x27b70a8546d22ffcULL, 0x2e1b21385c26c926ULL, 0x4d2c6dfc5ac42aedULL, 0x53380d139d95b3dfULL, +0x650a73548baf63deULL, 0x766a0abb3c77b2a8ULL, 0x81c2c92e47edaee6ULL, 0x92722c851482353bULL, +0xa2bfe8a14cf10364ULL, 0xa81a664bbc423001ULL, 0xc24b8b70d0f89791ULL, 0xc76c51a30654be30ULL, +0xd192e819d6ef5218ULL, 0xd69906245565a910ULL, 0xf40e35855771202aULL, 0x106aa07032bbd1b8ULL, +0x19a4c116b8d2d0c8ULL, 0x1e376c085141ab53ULL, 0x2748774cdf8eeb99ULL, 0x34b0bcb5e19b48a8ULL, +0x391c0cb3c5c95a63ULL, 0x4ed8aa4ae3418acbULL, 0x5b9cca4f7763e373ULL, 0x682e6ff3d6b2b8a3ULL, +0x748f82ee5defb2fcULL, 0x78a5636f43172f60ULL, 0x84c87814a1f0ab72ULL, 0x8cc702081a6439ecULL, +0x90befffa23631e28ULL, 0xa4506cebde82bde9ULL, 0xbef9a3f7b2c67915ULL, 0xc67178f2e372532bULL, +0xca273eceea26619cULL, 0xd186b8c721c0c207ULL, 0xeada7dd6cde0eb1eULL, 0xf57d4f7fee6ed178ULL, +0x06f067aa72176fbaULL, 0x0a637dc5a2c898a6ULL, 0x113f9804bef90daeULL, 0x1b710b35131c471bULL, +0x28db77f523047d84ULL, 0x32caab7b40c72493ULL, 0x3c9ebe0a15c9bebcULL, 0x431d67c49c100d4cULL, +0x4cc5d4becb3e42b6ULL, 0x597f299cfc657e2aULL, 0x5fcb6fab3ad6faecULL, 0x6c44198c4a475817ULL +}; + +static void +processblock(struct sha512 *s, const uint8_t *buf) +{ + uint64_t W[80], t1, t2, a, b, c, d, e, f, g, h; + int i; + + for (i = 0; i < 16; i++) { + W[i] = (uint64_t)buf[8*i]<<56; + W[i] |= (uint64_t)buf[8*i+1]<<48; + W[i] |= (uint64_t)buf[8*i+2]<<40; + W[i] |= (uint64_t)buf[8*i+3]<<32; + W[i] |= (uint64_t)buf[8*i+4]<<24; + W[i] |= (uint64_t)buf[8*i+5]<<16; + W[i] |= (uint64_t)buf[8*i+6]<<8; + W[i] |= buf[8*i+7]; + } + for (; i < 80; i++) + W[i] = R1(W[i-2]) + W[i-7] + R0(W[i-15]) + W[i-16]; + a = s->h[0]; + b = s->h[1]; + c = s->h[2]; + d = s->h[3]; + e = s->h[4]; + f = s->h[5]; + g = s->h[6]; + h = s->h[7]; + for (i = 0; i < 80; i++) { + t1 = h + S1(e) + Ch(e,f,g) + K[i] + W[i]; + t2 = S0(a) + Maj(a,b,c); + h = g; + g = f; + f = e; + e = d + t1; + d = c; + c = b; + b = a; + a = t1 + t2; + } + s->h[0] += a; + s->h[1] += b; + s->h[2] += c; + s->h[3] += d; + s->h[4] += e; + s->h[5] += f; + s->h[6] += g; + s->h[7] += h; +} + +static void +pad(struct sha512 *s) +{ + unsigned r = s->len % 128; + + s->buf[r++] = 0x80; + if (r > 112) { + memset(s->buf + r, 0, 128 - r); + r = 0; + processblock(s, s->buf); + } + memset(s->buf + r, 0, 120 - r); + s->len *= 8; + s->buf[120] = s->len >> 56; + s->buf[121] = s->len >> 48; + s->buf[122] = s->len >> 40; + s->buf[123] = s->len >> 32; + s->buf[124] = s->len >> 24; + s->buf[125] = s->len >> 16; + s->buf[126] = s->len >> 8; + s->buf[127] = s->len; + processblock(s, s->buf); +} + +void +sha512_init(void *ctx) +{ + struct sha512 *s = ctx; + s->len = 0; + s->h[0] = 0x6a09e667f3bcc908ULL; + s->h[1] = 0xbb67ae8584caa73bULL; + s->h[2] = 0x3c6ef372fe94f82bULL; + s->h[3] = 0xa54ff53a5f1d36f1ULL; + s->h[4] = 0x510e527fade682d1ULL; + s->h[5] = 0x9b05688c2b3e6c1fULL; + s->h[6] = 0x1f83d9abfb41bd6bULL; + s->h[7] = 0x5be0cd19137e2179ULL; +} + +void +sha512_sum_n(void *ctx, uint8_t *md, int n) +{ + struct sha512 *s = ctx; + int i; + + pad(s); + for (i = 0; i < n; i++) { + md[8*i] = s->h[i] >> 56; + md[8*i+1] = s->h[i] >> 48; + md[8*i+2] = s->h[i] >> 40; + md[8*i+3] = s->h[i] >> 32; + md[8*i+4] = s->h[i] >> 24; + md[8*i+5] = s->h[i] >> 16; + md[8*i+6] = s->h[i] >> 8; + md[8*i+7] = s->h[i]; + } +} + +void +sha512_sum(void *ctx, uint8_t md[SHA512_DIGEST_LENGTH]) +{ + sha512_sum_n(ctx, md, 8); +} + +void +sha512_update(void *ctx, const void *m, unsigned long len) +{ + struct sha512 *s = ctx; + const uint8_t *p = m; + unsigned r = s->len % 128; + + s->len += len; + if (r) { + if (len < 128 - r) { + memcpy(s->buf + r, p, len); + return; + } + memcpy(s->buf + r, p, 128 - r); + len -= 128 - r; + p += 128 - r; + processblock(s, s->buf); + } + for (; len >= 128; len -= 128, p += 128) + processblock(s, p); + memcpy(s->buf, p, len); +} diff --git a/util/sbase/libutil/strcasestr.c b/util/sbase/libutil/strcasestr.c new file mode 100644 index 00000000..26eb6bbd --- /dev/null +++ b/util/sbase/libutil/strcasestr.c @@ -0,0 +1,38 @@ +/* + * Copyright 2005-2014 Rich Felker, et al. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ +#include <string.h> +#include <strings.h> + +#include "../util.h" + +char * +strcasestr(const char *h, const char *n) +{ + size_t l = strlen(n); + + for (; *h; h++) + if (!strncasecmp(h, n, l)) + return (char *)h; + + return 0; +} diff --git a/util/sbase/libutil/strlcat.c b/util/sbase/libutil/strlcat.c new file mode 100644 index 00000000..bf263b87 --- /dev/null +++ b/util/sbase/libutil/strlcat.c @@ -0,0 +1,63 @@ +/* + * Copyright (c) 1998 Todd C. Miller <Todd.Miller@courtesan.com> + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include <string.h> +#include <sys/types.h> + +#include "../util.h" + +/* + * Appends src to string dst of size siz (unlike strncat, siz is the + * full size of dst, not space left). At most siz-1 characters + * will be copied. Always NUL terminates (unless siz <= strlen(dst)). + * Returns strlen(src) + MIN(siz, strlen(initial dst)). + * If retval >= siz, truncation occurred. + */ +size_t +strlcat(char *dst, const char *src, size_t siz) +{ + char *d = dst; + const char *s = src; + size_t n = siz; + size_t dlen; + /* Find the end of dst and adjust bytes left but don't go past end */ + while (n-- != 0 && *d != '\0') + d++; + dlen = d - dst; + n = siz - dlen; + if (n == 0) + return(dlen + strlen(s)); + while (*s != '\0') { + if (n != 1) { + *d++ = *s; + n--; + } + s++; + } + *d = '\0'; + return(dlen + (s - src)); /* count does not include NUL */ +} + +size_t +estrlcat(char *dst, const char *src, size_t siz) +{ + size_t ret; + + if ((ret = strlcat(dst, src, siz)) >= siz) + eprintf("strlcat: input string too long\n"); + + return ret; +} diff --git a/util/sbase/libutil/strlcpy.c b/util/sbase/libutil/strlcpy.c new file mode 100644 index 00000000..44b618a0 --- /dev/null +++ b/util/sbase/libutil/strlcpy.c @@ -0,0 +1,59 @@ +/* + * Copyright (c) 1998 Todd C. Miller <Todd.Miller@courtesan.com> + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include <string.h> +#include <sys/types.h> + +#include "../util.h" + +/* + * Copy src to string dst of size siz. At most siz-1 characters + * will be copied. Always NUL terminates (unless siz == 0). + * Returns strlen(src); if retval >= siz, truncation occurred. + */ +size_t +strlcpy(char *dst, const char *src, size_t siz) +{ + char *d = dst; + const char *s = src; + size_t n = siz; + /* Copy as many bytes as will fit */ + if (n != 0) { + while (--n != 0) { + if ((*d++ = *s++) == '\0') + break; + } + } + /* Not enough room in dst, add NUL and traverse rest of src */ + if (n == 0) { + if (siz != 0) + *d = '\0'; /* NUL-terminate dst */ + while (*s++) + ; + } + return(s - src - 1); /* count does not include NUL */ +} + +size_t +estrlcpy(char *dst, const char *src, size_t siz) +{ + size_t ret; + + if ((ret = strlcpy(dst, src, siz)) >= siz) + eprintf("strlcpy: input string too long\n"); + + return ret; +} diff --git a/util/sbase/libutil/strnsubst.c b/util/sbase/libutil/strnsubst.c new file mode 100644 index 00000000..2da54aba --- /dev/null +++ b/util/sbase/libutil/strnsubst.c @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2002 J. Mallett. All rights reserved. + * You may do whatever you want with this file as long as + * the above copyright and this notice remain intact, along + * with the following statement: + * For the man who taught me vi, and who got too old, too young. + */ + +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "../util.h" + +/* + * Replaces str with a string consisting of str with match replaced with + * replstr as many times as can be done before the constructed string is + * maxsize bytes large. It does not free the string pointed to by str, it + * is up to the calling program to be sure that the original contents of + * str as well as the new contents are handled in an appropriate manner. + * If replstr is NULL, then that internally is changed to a nil-string, so + * that we can still pretend to do somewhat meaningful substitution. + * No value is returned. + */ +void +strnsubst(char **str, const char *match, const char *replstr, size_t maxsize) +{ + char *s1, *s2, *this; + size_t matchlen, s2len; + int n; + + if ((s1 = *str) == NULL) + return; + s2 = emalloc(maxsize); + + if (replstr == NULL) + replstr = ""; + + if (match == NULL || *match == '\0' || strlen(s1) >= maxsize) { + strlcpy(s2, s1, maxsize); + goto done; + } + + *s2 = '\0'; + s2len = 0; + matchlen = strlen(match); + for (;;) { + if ((this = strstr(s1, match)) == NULL) + break; + n = snprintf(s2 + s2len, maxsize - s2len, "%.*s%s", + (int)(this - s1), s1, replstr); + if (n == -1 || n + s2len + strlen(this + matchlen) >= maxsize) + break; /* out of room */ + s2len += n; + s1 = this + matchlen; + } + strlcpy(s2 + s2len, s1, maxsize - s2len); +done: + *str = s2; + return; +} diff --git a/util/sbase/libutil/strsep.c b/util/sbase/libutil/strsep.c new file mode 100644 index 00000000..d9f06444 --- /dev/null +++ b/util/sbase/libutil/strsep.c @@ -0,0 +1,37 @@ +/* + * Copyright 2005-2014 Rich Felker, et al. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +*/ +#include <string.h> + +#include "../util.h" + +char * +strsep(char **str, const char *sep) +{ + char *s = *str, *end; + if (!s) return NULL; + end = s + strcspn(s, sep); + if (*end) *end++ = 0; + else end = 0; + *str = end; + return s; +} diff --git a/util/sbase/libutil/strtonum.c b/util/sbase/libutil/strtonum.c new file mode 100644 index 00000000..c0ac401f --- /dev/null +++ b/util/sbase/libutil/strtonum.c @@ -0,0 +1,85 @@ +/* $OpenBSD: strtonum.c,v 1.7 2013/04/17 18:40:58 tedu Exp $ */ + +/* + * Copyright (c) 2004 Ted Unangst and Todd Miller + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include <errno.h> +#include <limits.h> +#include <stdlib.h> + +#include "../util.h" + +#define INVALID 1 +#define TOOSMALL 2 +#define TOOLARGE 3 + +long long +strtonum(const char *numstr, long long minval, long long maxval, + const char **errstrp) +{ + long long ll = 0; + int error = 0; + char *ep; + struct errval { + const char *errstr; + int err; + } ev[4] = { + { NULL, 0 }, + { "invalid", EINVAL }, + { "too small", ERANGE }, + { "too large", ERANGE }, + }; + + ev[0].err = errno; + errno = 0; + if (minval > maxval) { + error = INVALID; + } else { + ll = strtoll(numstr, &ep, 10); + if (numstr == ep || *ep != '\0') + error = INVALID; + else if ((ll == LLONG_MIN && errno == ERANGE) || ll < minval) + error = TOOSMALL; + else if ((ll == LLONG_MAX && errno == ERANGE) || ll > maxval) + error = TOOLARGE; + } + if (errstrp != NULL) + *errstrp = ev[error].errstr; + errno = ev[error].err; + if (error) + ll = 0; + + return (ll); +} + +long long +enstrtonum(int status, const char *numstr, long long minval, long long maxval) +{ + const char *errstr; + long long ll; + + ll = strtonum(numstr, minval, maxval, &errstr); + if (errstr) + enprintf(status, "strtonum %s: %s\n", numstr, errstr); + return ll; +} + +long long +estrtonum(const char *numstr, long long minval, long long maxval) +{ + return enstrtonum(1, numstr, minval, maxval); +} diff --git a/util/sbase/libutil/unescape.c b/util/sbase/libutil/unescape.c new file mode 100644 index 00000000..b8f75ca9 --- /dev/null +++ b/util/sbase/libutil/unescape.c @@ -0,0 +1,58 @@ +/* See LICENSE file for copyright and license details. */ +#include <ctype.h> +#include <string.h> + +#include "../util.h" + +#define is_odigit(c) ('0' <= c && c <= '7') + +size_t +unescape(char *s) +{ + static const char escapes[256] = { + ['"'] = '"', + ['\''] = '\'', + ['\\'] = '\\', + ['a'] = '\a', + ['b'] = '\b', + ['E'] = 033, + ['e'] = 033, + ['f'] = '\f', + ['n'] = '\n', + ['r'] = '\r', + ['t'] = '\t', + ['v'] = '\v' + }; + size_t m, q; + char *r, *w; + + for (r = w = s; *r;) { + if (*r != '\\') { + *w++ = *r++; + continue; + } + r++; + if (!*r) { + eprintf("null escape sequence\n"); + } else if (escapes[(unsigned char)*r]) { + *w++ = escapes[(unsigned char)*r++]; + } else if (is_odigit(*r)) { + for (q = 0, m = 3; m && is_odigit(*r); m--, r++) + q = q * 8 + (*r - '0'); + *w++ = MIN(q, 255); + } else if (*r == 'x' && isxdigit(r[1])) { + r++; + for (q = 0, m = 2; m && isxdigit(*r); m--, r++) + if (isdigit(*r)) + q = q * 16 + (*r - '0'); + else + q = q * 16 + (tolower(*r) - 'a' + 10); + *w++ = q; + } else { + eprintf("invalid escape sequence '\\%c'\n", *r); + } + } + *w = '\0'; + + return w - s; +} diff --git a/util/sbase/libutil/writeall.c b/util/sbase/libutil/writeall.c new file mode 100644 index 00000000..4725ced8 --- /dev/null +++ b/util/sbase/libutil/writeall.c @@ -0,0 +1,21 @@ +/* See LICENSE file for copyright and license details. */ +#include <unistd.h> + +#include "../util.h" + +ssize_t +writeall(int fd, const void *buf, size_t len) +{ + const char *p = buf; + ssize_t n; + + while (len) { + n = write(fd, p, len); + if (n <= 0) + return n; + p += n; + len -= n; + } + + return p - (const char *)buf; +} diff --git a/util/sbase/link.1 b/util/sbase/link.1 new file mode 100644 index 00000000..915b9d80 --- /dev/null +++ b/util/sbase/link.1 @@ -0,0 +1,16 @@ +.Dd October 8, 2015 +.Dt LINK 1 +.Os sbase +.Sh NAME +.Nm link +.Nd call the link function +.Ar target +.Ar name +.Sh DESCRIPTION +.Nm +creates a hard link +.Ar name +to +.Ar target . +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/link.c b/util/sbase/link.c new file mode 100644 index 00000000..7cee4d0f --- /dev/null +++ b/util/sbase/link.c @@ -0,0 +1,27 @@ +/* See LICENSE file for copyright and license details. */ +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s target name\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + ARGBEGIN { + default: + usage(); + } ARGEND + + if (argc != 2) + usage(); + + if (link(argv[0], argv[1]) < 0) + eprintf("link:"); + + return 0; +} diff --git a/util/sbase/ln.1 b/util/sbase/ln.1 new file mode 100644 index 00000000..057b5a09 --- /dev/null +++ b/util/sbase/ln.1 @@ -0,0 +1,61 @@ +.Dd October 8, 2015 +.Dt LN 1 +.Os sbase +.Sh NAME +.Nm ln +.Nd link files +.Sh SYNOPSIS +.Nm +.Op Fl f +.Op Fl L | Fl P | Fl s +.Ar target +.Op Ar name +.Nm +.Op Fl f +.Op Fl L | Fl P | Fl s +.Ar target ... +.Ar directory +.Sh DESCRIPTION +.Nm +creates a hard link +.Ar name +to +.Ar target . +If no +.Ar name +is given, a hard link to +.Ar target +is created in the current directory. +If more than one +.Ar target +is given, +.Nm +hardlinks them in the existing +.Ar directory . +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl f +If +.Ar name +exists and is not a +.Ar target , +remove it to allow the link. +.It Fl L | Fl P +If +.Ar target +is a symbolic link, create a hard link to the (referenced file) | +(symbolic link itself). The former is the default. +.It Fl s +Create symbolic links instead of hard links. +Disables +.Fl L +and +.Fl P , +because their purpose does not apply to symbolic links. +.El +.Sh SEE ALSO +.Xr cp 1 , +.Xr link 2 , +.Xr symlink 2 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/ln.c b/util/sbase/ln.c new file mode 100644 index 00000000..f62068a1 --- /dev/null +++ b/util/sbase/ln.c @@ -0,0 +1,103 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> + +#include <errno.h> +#include <fcntl.h> +#include <libgen.h> +#include <string.h> +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [-f] [-L | -P | -s] target [name]\n" + " %s [-f] [-L | -P | -s] target ... dir\n", argv0, argv0); +} + +int +main(int argc, char *argv[]) +{ + char *targetdir = ".", *target = NULL; + int ret = 0, sflag = 0, fflag = 0, dirfd = AT_FDCWD, + hastarget = 0, flags = AT_SYMLINK_FOLLOW; + struct stat st, tst; + + ARGBEGIN { + case 'f': + fflag = 1; + break; + case 'L': + flags |= AT_SYMLINK_FOLLOW; + break; + case 'P': + flags &= ~AT_SYMLINK_FOLLOW; + break; + case 's': + sflag = 1; + break; + default: + usage(); + } ARGEND + + if (!argc) + usage(); + + if (argc > 1) { + if (!stat(argv[argc - 1], &st) && S_ISDIR(st.st_mode)) { + if ((dirfd = open(argv[argc - 1], O_RDONLY)) < 0) + eprintf("open %s:", argv[argc - 1]); + targetdir = argv[argc - 1]; + if (targetdir[strlen(targetdir) - 1] == '/') + targetdir[strlen(targetdir) - 1] = '\0'; + } else if (argc == 2) { + hastarget = 1; + target = argv[argc - 1]; + } else { + eprintf("%s: not a directory\n", argv[argc - 1]); + } + argv[argc - 1] = NULL; + argc--; + } + + for (; *argv; argc--, argv++) { + if (!hastarget) + target = basename(*argv); + + if (!sflag) { + if (stat(*argv, &st) < 0) { + weprintf("stat %s:", *argv); + ret = 1; + continue; + } else if (fstatat(dirfd, target, &tst, AT_SYMLINK_NOFOLLOW) < 0) { + if (errno != ENOENT) { + weprintf("fstatat %s %s:", targetdir, target); + ret = 1; + continue; + } + } else if (st.st_dev == tst.st_dev && st.st_ino == tst.st_ino) { + if (!fflag) { + weprintf("%s and %s/%s are the same file\n", + *argv, targetdir, target); + ret = 1; + } + continue; + } + } + + if (fflag && unlinkat(dirfd, target, 0) < 0 && errno != ENOENT) { + weprintf("unlinkat %s %s:", targetdir, target); + ret = 1; + continue; + } + if ((sflag ? symlinkat(*argv, dirfd, target) : + linkat(AT_FDCWD, *argv, dirfd, target, flags)) < 0) { + weprintf("%s %s <- %s/%s:", sflag ? "symlinkat" : "linkat", + *argv, targetdir, target); + ret = 1; + } + } + + return ret; +} diff --git a/util/sbase/logger.1 b/util/sbase/logger.1 new file mode 100644 index 00000000..4624a163 --- /dev/null +++ b/util/sbase/logger.1 @@ -0,0 +1,52 @@ +.Dd October 8, 2015 +.Dt LOGGER 1 +.Os sbase +.Sh NAME +.Nm logger +.Nd make entries in the system log +.Sh SYNOPSIS +.Nm +.Op Fl is +.Op Fl p Ar priority +.Op Fl t Ar tag +.Op Ar message ... +.Sh DESCRIPTION +.Nm +provides a shell command interface to the +.Xr syslog 3 +system log module and writes each +.Ar message +to the log. +If no +.Ar message +is given, +.Nm +logs stdin. +.Sh OPTIONS +.Bl -tag -width xxxxxxxxxxxx +.It Fl i +Add the logger process ID to each line in the log. +.It Fl p Ar priority +Set the message +.Ar priority +given symbolically as a +.Dq facility.level +pair. +The default is +.Dq user.notice . +.It Fl s +Also log to stderr. +.It Fl t Ar tag +Add +.Ar tag +to each line in the log. +.El +.Sh SEE ALSO +.Xr syslogd 1 , +.Xr syslog 3 +.Sh STANDARDS +POSIX.1-2013. +.Pp +The +.Op Fl ipst +flags are an extensions to that specification. diff --git a/util/sbase/logger.c b/util/sbase/logger.c new file mode 100644 index 00000000..603da04f --- /dev/null +++ b/util/sbase/logger.c @@ -0,0 +1,91 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <strings.h> +#define SYSLOG_NAMES +#include <syslog.h> +#include <unistd.h> + +#include "util.h" + +static int +decodetable(CODE *table, char *name) +{ + CODE *c; + + for (c = table; c->c_name; c++) + if (!strcasecmp(name, c->c_name)) + return c->c_val; + eprintf("invalid priority name: %s\n", name); + + return -1; /* not reached */ +} + +static int +decodepri(char *pri) +{ + char *lev, *fac = pri; + + if (!(lev = strchr(pri, '.'))) + eprintf("invalid priority name: %s\n", pri); + *lev++ = '\0'; + if (!*lev) + eprintf("invalid priority name: %s\n", pri); + + return (decodetable(facilitynames, fac) & LOG_FACMASK) | + (decodetable(prioritynames, lev) & LOG_PRIMASK); +} + +static void +usage(void) +{ + eprintf("usage: %s [-is] [-p priority] [-t tag] [message ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + size_t sz; + int logflags = 0, priority = LOG_NOTICE, i; + char *buf = NULL, *tag = NULL; + + ARGBEGIN { + case 'i': + logflags |= LOG_PID; + break; + case 'p': + priority = decodepri(EARGF(usage())); + break; + case 's': + logflags |= LOG_PERROR; + break; + case 't': + tag = EARGF(usage()); + break; + default: + usage(); + } ARGEND + + openlog(tag ? tag : getlogin(), logflags, 0); + + if (!argc) { + while (getline(&buf, &sz, stdin) > 0) + syslog(priority, "%s", buf); + } else { + for (i = 0, sz = 0; i < argc; i++) + sz += strlen(argv[i]); + sz += argc; + buf = ecalloc(1, sz); + for (i = 0; i < argc; i++) { + estrlcat(buf, argv[i], sz); + if (i + 1 < argc) + estrlcat(buf, " ", sz); + } + syslog(priority, "%s", buf); + } + + closelog(); + + return fshut(stdin, "<stdin>"); +} diff --git a/util/sbase/logname.1 b/util/sbase/logname.1 new file mode 100644 index 00000000..1c1f16fd --- /dev/null +++ b/util/sbase/logname.1 @@ -0,0 +1,13 @@ +.Dd October 8, 2015 +.Dt LOGNAME 1 +.Os sbase +.Sh NAME +.Nm logname +.Nd show login name +.Sh SYNOPSIS +.Nm +.Sh DESCRIPTION +.Nm +writes the login name of the current user to stdout. +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/logname.c b/util/sbase/logname.c new file mode 100644 index 00000000..8eb8eea5 --- /dev/null +++ b/util/sbase/logname.c @@ -0,0 +1,29 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + char *login; + + argv0 = *argv, argv0 ? (argc--, argv++) : (void *)0; + + if (argc) + usage(); + + if ((login = getlogin())) + puts(login); + else + eprintf("no login name\n"); + + return fshut(stdout, "<stdout>"); +} diff --git a/util/sbase/ls.1 b/util/sbase/ls.1 new file mode 100644 index 00000000..26a41e62 --- /dev/null +++ b/util/sbase/ls.1 @@ -0,0 +1,96 @@ +.Dd October 8, 2015 +.Dt LS 1 +.Os sbase +.Sh NAME +.Nm ls +.Nd list directory contents +.Sh SYNOPSIS +.Nm +.Op Fl iqr +.Op Fl ln +.Op Fl A | a +.Op Fl 1 +.Op Fl h | F | p +.Op Fl H | L +.Op Fl R | d +.Op Fl S | f | t | U +.Op Fl c | u +.Op Ar file ... +.Sh DESCRIPTION +.Nm +lists each given file, and the contents of each given directory. +If no files are given the current directory is listed. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl A +List all entries except for '.' and '..'. +.It Fl a +Show hidden files (those beginning with '.'). +.It Fl c +Use time file's status was last changed instead of last +modification time for sorting or printing. +.It Fl d +List directories themselves, not their contents. +.It Fl F +Append a file type indicator to all special files. +.It Fl f +Like +.Fl U +but turns on +.Fl a +and disables +.Fl r , +.Fl S +and +.Fl t . +.It Fl H +List information about the targets of symbolic links specified on the command +line instead of the links themselves. +.It Fl h +Show filesizes in human\-readable format. +.It Fl i +Print the index number of each file. +.It Fl L +List information about the targets of symbolic links instead of the links +themselves. +.It Fl l +List detailed information about each file, including their type, permissions, +links, owner, group, size or major and minor numbers if the file is a +character/block device, and last file status/modification time. +.It Fl n +List detailed information about each file, including their type, permissions, +links, owner, group, size or major and minor numbers if the file is a +character/block device, and last file status/modification time, but with +numeric IDs. +.It Fl p +Append a file type indicator to directories. +.It Fl q +Replace non-printable characters in filenames with '?'. +.It Fl R +List directory content recursively. +The +.Fl 1 +flag is set implicitly. +.It Fl r +Reverse the sort order. +.It Fl S +Sort files by size (in decreasing order). +.It Fl t +Sort files by last file status/modification time instead of by name. +.It Fl U +Keep the list unsorted. +.It Fl u +Use file's last access time instead of last modification time for +sorting or printing. +.El +.Sh SEE ALSO +.Xr stat 2 +.Sh STANDARDS +POSIX.1-2013. +Except for the +.Op Fl Ckmpsx +flags. +.Pp +The +.Op Fl hU +flags are an extension to that specification. diff --git a/util/sbase/ls.c b/util/sbase/ls.c new file mode 100644 index 00000000..aa95fef2 --- /dev/null +++ b/util/sbase/ls.c @@ -0,0 +1,489 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> +#include <sys/types.h> +#ifndef major +#include <sys/sysmacros.h> +#endif + +#include <dirent.h> +#include <grp.h> +#include <pwd.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <time.h> +#include <unistd.h> + +#include "utf.h" +#include "util.h" + +struct entry { + char *name; + mode_t mode, tmode; + nlink_t nlink; + uid_t uid; + gid_t gid; + off_t size; + struct timespec t; + dev_t dev; + dev_t rdev; + ino_t ino, tino; +}; + +static struct { + dev_t dev; + ino_t ino; +} tree[PATH_MAX]; + +static int ret = 0; +static int Aflag = 0; +static int aflag = 0; +static int cflag = 0; +static int dflag = 0; +static int Fflag = 0; +static int fflag = 0; +static int Hflag = 0; +static int hflag = 0; +static int iflag = 0; +static int Lflag = 0; +static int lflag = 0; +static int nflag = 0; +static int pflag = 0; +static int qflag = 0; +static int Rflag = 0; +static int rflag = 0; +static int Uflag = 0; +static int uflag = 0; +static int first = 1; +static char sort = 0; +static int showdirs; + +static void ls(const char *, const struct entry *, int); + +static void +mkent(struct entry *ent, char *path, int dostat, int follow) +{ + struct stat st; + + ent->name = path; + if (!dostat) + return; + if ((follow ? stat : lstat)(path, &st) < 0) + eprintf("%s %s:", follow ? "stat" : "lstat", path); + ent->mode = st.st_mode; + ent->nlink = st.st_nlink; + ent->uid = st.st_uid; + ent->gid = st.st_gid; + ent->size = st.st_size; + if (cflag) + ent->t = st.st_ctim; + else if (uflag) + ent->t = st.st_atim; + else + ent->t = st.st_mtim; + ent->dev = st.st_dev; + ent->rdev = st.st_rdev; + ent->ino = st.st_ino; + if (S_ISLNK(ent->mode)) { + if (stat(path, &st) == 0) { + ent->tmode = st.st_mode; + ent->dev = st.st_dev; + ent->tino = st.st_ino; + } else { + ent->tmode = ent->tino = 0; + } + } +} + +static char * +indicator(mode_t mode) +{ + if (pflag || Fflag) + if (S_ISDIR(mode)) + return "/"; + + if (Fflag) { + if (S_ISLNK(mode)) + return "@"; + else if (S_ISFIFO(mode)) + return "|"; + else if (S_ISSOCK(mode)) + return "="; + else if (mode & S_IXUSR || mode & S_IXGRP || mode & S_IXOTH) + return "*"; + } + + return ""; +} + +static void +printname(const char *name) +{ + const char *c; + Rune r; + size_t l; + + for (c = name; *c; c += l) { + l = chartorune(&r, c); + if (!qflag || isprintrune(r)) + fwrite(c, 1, l, stdout); + else + putchar('?'); + } +} + +static void +output(const struct entry *ent) +{ + struct group *gr; + struct passwd *pw; + struct tm *tm; + ssize_t len; + char *fmt, buf[BUFSIZ], pwname[_SC_LOGIN_NAME_MAX], + grname[_SC_LOGIN_NAME_MAX], mode[] = "----------"; + + if (iflag) + printf("%lu ", (unsigned long)ent->ino); + if (!lflag) { + printname(ent->name); + puts(indicator(ent->mode)); + return; + } + if (S_ISREG(ent->mode)) + mode[0] = '-'; + else if (S_ISBLK(ent->mode)) + mode[0] = 'b'; + else if (S_ISCHR(ent->mode)) + mode[0] = 'c'; + else if (S_ISDIR(ent->mode)) + mode[0] = 'd'; + else if (S_ISFIFO(ent->mode)) + mode[0] = 'p'; + else if (S_ISLNK(ent->mode)) + mode[0] = 'l'; + else if (S_ISSOCK(ent->mode)) + mode[0] = 's'; + else + mode[0] = '?'; + + if (ent->mode & S_IRUSR) mode[1] = 'r'; + if (ent->mode & S_IWUSR) mode[2] = 'w'; + if (ent->mode & S_IXUSR) mode[3] = 'x'; + if (ent->mode & S_IRGRP) mode[4] = 'r'; + if (ent->mode & S_IWGRP) mode[5] = 'w'; + if (ent->mode & S_IXGRP) mode[6] = 'x'; + if (ent->mode & S_IROTH) mode[7] = 'r'; + if (ent->mode & S_IWOTH) mode[8] = 'w'; + if (ent->mode & S_IXOTH) mode[9] = 'x'; + + if (ent->mode & S_ISUID) mode[3] = (mode[3] == 'x') ? 's' : 'S'; + if (ent->mode & S_ISGID) mode[6] = (mode[6] == 'x') ? 's' : 'S'; + if (ent->mode & S_ISVTX) mode[9] = (mode[9] == 'x') ? 't' : 'T'; + + if (!nflag && (pw = getpwuid(ent->uid))) + snprintf(pwname, sizeof(pwname), "%s", pw->pw_name); + else + snprintf(pwname, sizeof(pwname), "%d", ent->uid); + + if (!nflag && (gr = getgrgid(ent->gid))) + snprintf(grname, sizeof(grname), "%s", gr->gr_name); + else + snprintf(grname, sizeof(grname), "%d", ent->gid); + + if (time(NULL) > ent->t.tv_sec + (180 * 24 * 60 * 60)) /* 6 months ago? */ + fmt = "%b %d %Y"; + else + fmt = "%b %d %H:%M"; + + if ((tm = localtime(&ent->t.tv_sec))) + strftime(buf, sizeof(buf), fmt, tm); + else + snprintf(buf, sizeof(buf), "%lld", (long long)(ent->t.tv_sec)); + printf("%s %4ld %-8.8s %-8.8s ", mode, (long)ent->nlink, pwname, grname); + + if (S_ISBLK(ent->mode) || S_ISCHR(ent->mode)) + printf("%4u, %4u ", major(ent->rdev), minor(ent->rdev)); + else if (hflag) + printf("%10s ", humansize(ent->size)); + else + printf("%10lu ", (unsigned long)ent->size); + printf("%s ", buf); + printname(ent->name); + fputs(indicator(ent->mode), stdout); + if (S_ISLNK(ent->mode)) { + if ((len = readlink(ent->name, buf, sizeof(buf) - 1)) < 0) + eprintf("readlink %s:", ent->name); + buf[len] = '\0'; + printf(" -> %s%s", buf, indicator(ent->tmode)); + } + putchar('\n'); +} + +static int +entcmp(const void *va, const void *vb) +{ + int cmp = 0; + const struct entry *a = va, *b = vb; + + switch (sort) { + case 'S': + cmp = b->size - a->size; + break; + case 't': + if (!(cmp = b->t.tv_sec - a->t.tv_sec)) + cmp = b->t.tv_nsec - a->t.tv_nsec; + break; + } + + if (!cmp) + cmp = strcmp(a->name, b->name); + + return rflag ? 0 - cmp : cmp; +} + +static void +lsdir(const char *path, const struct entry *dir) +{ + DIR *dp; + struct entry *ent, *ents = NULL; + struct dirent *d; + size_t i, n = 0; + char prefix[PATH_MAX]; + + if (!(dp = opendir(dir->name))) { + ret = 1; + weprintf("opendir %s%s:", path, dir->name); + return; + } + if (chdir(dir->name) < 0) + eprintf("chdir %s:", dir->name); + + while ((d = readdir(dp))) { + if (d->d_name[0] == '.' && !aflag && !Aflag) + continue; + else if (Aflag) + if (strcmp(d->d_name, ".") == 0 || + strcmp(d->d_name, "..") == 0) + continue; + + ents = ereallocarray(ents, ++n, sizeof(*ents)); + mkent(&ents[n - 1], estrdup(d->d_name), Fflag || iflag || + lflag || pflag || Rflag || sort, Lflag); + } + + closedir(dp); + + if (!Uflag) + qsort(ents, n, sizeof(*ents), entcmp); + + if (path[0] || showdirs) { + fputs(path, stdout); + printname(dir->name); + puts(":"); + } + for (i = 0; i < n; i++) + output(&ents[i]); + + if (Rflag) { + if (snprintf(prefix, PATH_MAX, "%s%s/", path, dir->name) >= + PATH_MAX) + eprintf("path too long: %s%s\n", path, dir->name); + + for (i = 0; i < n; i++) { + ent = &ents[i]; + if (strcmp(ent->name, ".") == 0 || + strcmp(ent->name, "..") == 0) + continue; + if (S_ISLNK(ent->mode) && S_ISDIR(ent->tmode) && !Lflag) + continue; + + ls(prefix, ent, 1); + } + } + + for (i = 0; i < n; ++i) + free(ents[i].name); + free(ents); +} + +static int +visit(const struct entry *ent) +{ + dev_t dev; + ino_t ino; + int i; + + dev = ent->dev; + ino = S_ISLNK(ent->mode) ? ent->tino : ent->ino; + + for (i = 0; i < PATH_MAX && tree[i].ino; ++i) { + if (ino == tree[i].ino && dev == tree[i].dev) + return -1; + } + + tree[i].ino = ino; + tree[i].dev = dev; + + return i; +} + +static void +ls(const char *path, const struct entry *ent, int listdir) +{ + int treeind; + char cwd[PATH_MAX]; + + if (!listdir) { + output(ent); + } else if (S_ISDIR(ent->mode) || + (S_ISLNK(ent->mode) && S_ISDIR(ent->tmode))) { + if ((treeind = visit(ent)) < 0) { + ret = 1; + weprintf("%s%s: Already visited\n", path, ent->name); + return; + } + + if (!getcwd(cwd, PATH_MAX)) + eprintf("getcwd:"); + + if (first) + first = 0; + else + putchar('\n'); + + lsdir(path, ent); + tree[treeind].ino = 0; + + if (chdir(cwd) < 0) + eprintf("chdir %s:", cwd); + } +} + +static void +usage(void) +{ + eprintf("usage: %s [-1AacdFfHhiLlnpqRrtUu] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + struct entry ent, *dents, *fents; + size_t i, ds, fs; + + ARGBEGIN { + case '1': + /* force output to 1 entry per line */ + qflag = 1; + break; + case 'A': + Aflag = 1; + break; + case 'a': + aflag = 1; + break; + case 'c': + cflag = 1; + uflag = 0; + break; + case 'd': + dflag = 1; + break; + case 'f': + aflag = 1; + fflag = 1; + Uflag = 1; + break; + case 'F': + Fflag = 1; + break; + case 'H': + Hflag = 1; + break; + case 'h': + hflag = 1; + break; + case 'i': + iflag = 1; + break; + case 'L': + Lflag = 1; + break; + case 'l': + lflag = 1; + break; + case 'n': + lflag = 1; + nflag = 1; + break; + case 'p': + pflag = 1; + break; + case 'q': + qflag = 1; + break; + case 'R': + Rflag = 1; + break; + case 'r': + rflag = 1; + break; + case 'S': + sort = 'S'; + break; + case 't': + sort = 't'; + break; + case 'U': + Uflag = 1; + break; + case 'u': + uflag = 1; + cflag = 0; + break; + default: + usage(); + } ARGEND + + switch (argc) { + case 0: /* fallthrough */ + *--argv = ".", ++argc; + case 1: + mkent(&ent, argv[0], 1, Hflag || Lflag); + ls("", &ent, (!dflag && S_ISDIR(ent.mode)) || + (S_ISLNK(ent.mode) && S_ISDIR(ent.tmode) && + !(dflag || Fflag || lflag))); + + break; + default: + for (i = ds = fs = 0, fents = dents = NULL; i < argc; ++i) { + mkent(&ent, argv[i], 1, Hflag || Lflag); + + if ((!dflag && S_ISDIR(ent.mode)) || + (S_ISLNK(ent.mode) && S_ISDIR(ent.tmode) && + !(dflag || Fflag || lflag))) { + dents = ereallocarray(dents, ++ds, sizeof(*dents)); + memcpy(&dents[ds - 1], &ent, sizeof(ent)); + } else { + fents = ereallocarray(fents, ++fs, sizeof(*fents)); + memcpy(&fents[fs - 1], &ent, sizeof(ent)); + } + } + + showdirs = ds > 1 || (ds && fs); + + qsort(fents, fs, sizeof(ent), entcmp); + qsort(dents, ds, sizeof(ent), entcmp); + + for (i = 0; i < fs; ++i) + ls("", &fents[i], 0); + free(fents); + if (fs && ds) + putchar('\n'); + for (i = 0; i < ds; ++i) + ls("", &dents[i], 1); + free(dents); + } + + return (fshut(stdout, "<stdout>") | ret); +} diff --git a/util/sbase/md5.h b/util/sbase/md5.h new file mode 100644 index 00000000..0b5005e9 --- /dev/null +++ b/util/sbase/md5.h @@ -0,0 +1,18 @@ +/* public domain md5 implementation based on rfc1321 and libtomcrypt */ + +struct md5 { + uint64_t len; /* processed message length */ + uint32_t h[4]; /* hash state */ + uint8_t buf[64]; /* message block buffer */ +}; + +enum { MD5_DIGEST_LENGTH = 16 }; + +/* reset state */ +void md5_init(void *ctx); +/* process message */ +void md5_update(void *ctx, const void *m, unsigned long len); +/* get message digest */ +/* state is ruined after sum, keep a copy if multiple sum is needed */ +/* part of the message might be left in s, zero it if secrecy is needed */ +void md5_sum(void *ctx, uint8_t md[MD5_DIGEST_LENGTH]); diff --git a/util/sbase/md5sum.1 b/util/sbase/md5sum.1 new file mode 100644 index 00000000..79a37cfe --- /dev/null +++ b/util/sbase/md5sum.1 @@ -0,0 +1,32 @@ +.Dd October 8, 2015 +.Dt MD5SUM 1 +.Os sbase +.Sh NAME +.Nm md5sum +.Nd compute or check MD5 message digests +.Sh SYNOPSIS +.Nm +.Op Fl c +.Op Ar file ... +.Sh DESCRIPTION +.Nm +writes MD5 (128-bit) checksums of each +.Ar file +to stdout. +If no +.Ar file +is given +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl c +Read list of MD5 checksums from each +.Ar file +and check them. +If no +.Ar file +is given +.Nm +reads from stdin. +.El diff --git a/util/sbase/md5sum.c b/util/sbase/md5sum.c new file mode 100644 index 00000000..224b20ed --- /dev/null +++ b/util/sbase/md5sum.c @@ -0,0 +1,46 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> +#include <stdlib.h> +#include <stdint.h> + +#include "crypt.h" +#include "md5.h" +#include "util.h" + +static struct md5 s; +struct crypt_ops md5_ops = { + md5_init, + md5_update, + md5_sum, + &s, +}; + +static void +usage(void) +{ + eprintf("usage: %s [-c] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int ret = 0, (*cryptfunc)(int, char **, struct crypt_ops *, uint8_t *, size_t) = cryptmain; + uint8_t md[MD5_DIGEST_LENGTH]; + + ARGBEGIN { + case 'b': + case 't': + /* ignore */ + break; + case 'c': + cryptfunc = cryptcheck; + break; + default: + usage(); + } ARGEND + + ret |= cryptfunc(argc, argv, &md5_ops, md, sizeof(md)); + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/mkdir.1 b/util/sbase/mkdir.1 new file mode 100644 index 00000000..ec842d5b --- /dev/null +++ b/util/sbase/mkdir.1 @@ -0,0 +1,34 @@ +.Dd October 8, 2015 +.Dt MKDIR 1 +.Os sbase +.Sh NAME +.Nm mkdir +.Nd create directories +.Sh SYNOPSIS +.Nm +.Op Fl p +.Op Fl m Ar mode +.Ar name ... +.Sh DESCRIPTION +.Nm +creates a directory for each +.Ar name +if it does not already exist. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl m +Set the file +.Ar mode +of newly created directories. +See +.Xr chmod 1 . +.It Fl p +Also create necessary parent directories and +do not fail if +.Ar name +already exists. +.El +.Sh SEE ALSO +.Xr mkdir 2 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/mkdir.c b/util/sbase/mkdir.c new file mode 100644 index 00000000..3e20b1ae --- /dev/null +++ b/util/sbase/mkdir.c @@ -0,0 +1,49 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> + +#include <errno.h> +#include <stdlib.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [-p] [-m mode] name ...\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + mode_t mode, mask; + int pflag = 0, ret = 0; + + mask = umask(0); + mode = 0777 & ~mask; + + ARGBEGIN { + case 'p': + pflag = 1; + break; + case 'm': + mode = parsemode(EARGF(usage()), 0777, mask); + break; + default: + usage(); + } ARGEND + + if (!argc) + usage(); + + for (; *argv; argc--, argv++) { + if (pflag) { + if (mkdirp(*argv, mode, 0777 & (~mask | 0300)) < 0) + ret = 1; + } else if (mkdir(*argv, mode) < 0) { + weprintf("mkdir %s:", *argv); + ret = 1; + } + } + + return ret; +} diff --git a/util/sbase/mkfifo.1 b/util/sbase/mkfifo.1 new file mode 100644 index 00000000..58b724aa --- /dev/null +++ b/util/sbase/mkfifo.1 @@ -0,0 +1,28 @@ +.Dd October 8, 2015 +.Dt MKFIFO 1 +.Os sbase +.Sh NAME +.Nm mkfifo +.Nd create named pipes +.Sh SYNOPSIS +.Nm +.Op Fl m Ar mode +.Ar name ... +.Sh DESCRIPTION +.Nm +creates a named pipe for each +.Ar name +if it does not already exist. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl m +Set the file +.Ar mode +of newly created named pipes. +See +.Xr chmod 1 . +.El +.Sh SEE ALSO +.Xr mkfifo 3 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/mkfifo.c b/util/sbase/mkfifo.c new file mode 100644 index 00000000..2470a09d --- /dev/null +++ b/util/sbase/mkfifo.c @@ -0,0 +1,39 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> + +#include <stdlib.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [-m mode] name ...\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + mode_t mode = 0666; + int ret = 0; + + ARGBEGIN { + case 'm': + mode = parsemode(EARGF(usage()), mode, umask(0)); + break; + default: + usage(); + } ARGEND + + if (!argc) + usage(); + + for (; *argv; argc--, argv++) { + if (mkfifo(*argv, mode) < 0) { + weprintf("mkfifo %s:", *argv); + ret = 1; + } + } + + return ret; +} diff --git a/util/sbase/mknod.1 b/util/sbase/mknod.1 new file mode 100644 index 00000000..1206549c --- /dev/null +++ b/util/sbase/mknod.1 @@ -0,0 +1,44 @@ +.Dd February 2, 2015 +.Dt MKNOD 1 +.Os sbase +.Sh NAME +.Nm mknod +.Nd create a special device file +.Sh SYNOPSIS +.Nm +.Op Fl m Ar mode +.Ar name +.Cm b Ns | Ns Cm c Ns | Ns Cm u +.Ar major +.Ar minor +.Nm +.Op Fl m Ar mode +.Ar name +.Cm p +.Sh DESCRIPTION +.Nm +creates a special file named +.Ar name . +.Pp +The following special file types are supported: +.Bl -tag -width Ds +.It Cm b +A block device. +.It Cm c | u +A character device. +.It Cm p +A named pipe. +.El +.Pp +Block and character devices are created with major number +.Ar major , +and minor number +.Ar minor . +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl m +Set the mode of the new file based on the octal value of +.Ar mode . +.El +.Sh SEE ALSO +.Xr mknod 2 diff --git a/util/sbase/mknod.c b/util/sbase/mknod.c new file mode 100644 index 00000000..a519ecb2 --- /dev/null +++ b/util/sbase/mknod.c @@ -0,0 +1,72 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> +#include <sys/types.h> +#ifndef makedev +#include <sys/sysmacros.h> +#endif + +#include <fcntl.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [-m mode] name b|c|u major minor\n" + " %s [-m mode] name p\n", + argv0, argv0); +} + +int +main(int argc, char *argv[]) +{ + mode_t mode = 0666; + dev_t dev; + + ARGBEGIN { + case 'm': + mode = parsemode(EARGF(usage()), mode, umask(0)); + break; + default: + usage(); + } ARGEND; + + if (argc < 2) + usage(); + + if (strlen(argv[1]) != 1) + goto invalid; + switch (argv[1][0]) { + case 'b': + mode |= S_IFBLK; + break; + case 'u': + case 'c': + mode |= S_IFCHR; + break; + case 'p': + mode |= S_IFIFO; + break; + default: + invalid: + eprintf("invalid type '%s'\n", argv[1]); + } + + if (S_ISFIFO(mode)) { + if (argc != 2) + usage(); + dev = 0; + } else { + if (argc != 4) + usage(); + dev = makedev(estrtonum(argv[2], 0, LLONG_MAX), estrtonum(argv[3], 0, LLONG_MAX)); + } + + if (mknod(argv[0], mode, dev) == -1) + eprintf("mknod %s:", argv[0]); + return 0; +} diff --git a/util/sbase/mktemp.1 b/util/sbase/mktemp.1 new file mode 100644 index 00000000..59e27d8e --- /dev/null +++ b/util/sbase/mktemp.1 @@ -0,0 +1,50 @@ +.Dd October 8, 2015 +.Dt MKTEMP 1 +.Os sbase +.Sh NAME +.Nm mktemp +.Nd create temporary file or directory +.Sh SYNOPSIS +.Nm +.Op Fl dqtu +.Op Fl p Ar directory +.Op Ar template +.Sh DESCRIPTION +.Nm +creates a temporary file by generating a unique filename with +.Ar template , +which has to have at least six 'X's appended to it. +If no +.Ar template +is specified, a default of 'tmp.XXXXXXXXXX' is used and the +tmpdir set to '/tmp' or, if set, the TMPDIR environment variable. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl d +Create a temporary directory instead of a file. +.It Fl p Ar directory +Use the specified +.Ar directory +as a prefix when generating the temporary filename. +The directory will be overridden by the user's +.Ev TMPDIR +environment variable if it is set. +This option implies the +.Fl t +flag (see below). +.It Fl q +Fail silently if an error occurs. +.It Fl t +Generate a path rooted in a temporary directory. +.It Fl u +Unlink file before +.Nm +exits. +This is slightly better than +.Xr mktemp 3 +but still introduces a race condition. +Use of this option is not encouraged. +.El +.Sh SEE ALSO +.Xr mkdtemp 3 , +.Xr mkstemp 3 diff --git a/util/sbase/mktemp.c b/util/sbase/mktemp.c new file mode 100644 index 00000000..a3076ba2 --- /dev/null +++ b/util/sbase/mktemp.c @@ -0,0 +1,92 @@ +/* See LICENSE file for copyright and license details. */ +#include <libgen.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [-dqtu] [-p directory] [template]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int dflag = 0, pflag = 0, qflag = 0, tflag = 0, uflag = 0, fd; + char *template = "tmp.XXXXXXXXXX", *tmpdir = "", *pdir, + *p, path[PATH_MAX], tmp[PATH_MAX]; + size_t len; + + ARGBEGIN { + case 'd': + dflag = 1; + break; + case 'p': + pflag = 1; + pdir = EARGF(usage()); + break; + case 'q': + qflag = 1; + break; + case 't': + tflag = 1; + break; + case 'u': + uflag = 1; + break; + default: + usage(); + } ARGEND + + if (argc > 1) + usage(); + else if (argc == 1) + template = argv[0]; + + if (!argc || pflag || tflag) { + if ((p = getenv("TMPDIR"))) + tmpdir = p; + else if (pflag) + tmpdir = pdir; + else + tmpdir = "/tmp"; + } + + len = estrlcpy(path, tmpdir, sizeof(path)); + if (path[0] && path[len - 1] != '/') + estrlcat(path, "/", sizeof(path)); + + estrlcpy(tmp, template, sizeof(tmp)); + p = dirname(tmp); + if (!(p[0] == '.' && p[1] == '\0')) { + if (tflag && !pflag) + eprintf("template must not contain directory separators in -t mode\n"); + } + estrlcat(path, template, sizeof(path)); + + if (dflag) { + if (!mkdtemp(path)) { + if (!qflag) + eprintf("mkdtemp %s:", path); + return 1; + } + } else { + if ((fd = mkstemp(path)) < 0) { + if (!qflag) + eprintf("mkstemp %s:", path); + return 1; + } + if (close(fd)) + eprintf("close %s:", path); + } + if (uflag) + unlink(path); + puts(path); + + efshut(stdout, "<stdout>"); + return 0; +} diff --git a/util/sbase/mv.1 b/util/sbase/mv.1 new file mode 100644 index 00000000..7fb95273 --- /dev/null +++ b/util/sbase/mv.1 @@ -0,0 +1,36 @@ +.Dd October 8, 2015 +.Dt MV 1 +.Os sbase +.Sh NAME +.Nm mv +.Nd move files and directories +.Sh SYNOPSIS +.Nm +.Op Fl f +.Ar source ... +.Ar dest +.Sh DESCRIPTION +.Nm +moves each +.Ar source +to +.Ar dest . +If only one +.Ar source +is given and +.Ar dest +is not a directory, +.Nm +overwrites the latter with the former. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl f +Do not prompt before overwriting. +.Ar dest . +Prompting has not been implemented yet. +.El +.Sh STANDARDS +POSIX.1-2013. +Except for the unsupported +.Fl i +flag. diff --git a/util/sbase/mv.c b/util/sbase/mv.c new file mode 100644 index 00000000..d24c77f5 --- /dev/null +++ b/util/sbase/mv.c @@ -0,0 +1,68 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> + +#include <errno.h> +#include <fcntl.h> +#include <stdio.h> + +#include "fs.h" +#include "util.h" + +static int mv_status = 0; + +static int +mv(const char *s1, const char *s2, int depth) +{ + struct recursor r = { .fn = rm, .follow = 'P', .flags = SILENT }; + + if (!rename(s1, s2)) + return 0; + if (errno == EXDEV) { + cp_aflag = cp_rflag = cp_pflag = 1; + cp_follow = 'P'; + cp_status = 0; + rm_status = 0; + cp(s1, s2, depth); + if (cp_status == 0) + recurse(AT_FDCWD, s1, NULL, &r); + if (cp_status || rm_status) + mv_status = 1; + } else { + weprintf("%s -> %s:", s1, s2); + mv_status = 1; + } + + return 0; +} + +static void +usage(void) +{ + eprintf("usage: %s [-f] source ... dest\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + struct stat st; + + ARGBEGIN { + case 'f': + break; + default: + usage(); + } ARGEND + + if (argc < 2) + usage(); + + if (argc > 2) { + if (stat(argv[argc - 1], &st) < 0) + eprintf("stat %s:", argv[argc - 1]); + if (!S_ISDIR(st.st_mode)) + eprintf("%s: not a directory\n", argv[argc - 1]); + } + enmasse(argc, argv, mv); + + return mv_status; +} diff --git a/util/sbase/nice.1 b/util/sbase/nice.1 new file mode 100644 index 00000000..18bbe585 --- /dev/null +++ b/util/sbase/nice.1 @@ -0,0 +1,36 @@ +.Dd October 8, 2015 +.Dt NICE 1 +.Os sbase +.Sh NAME +.Nm nice +.Nd run command with altered niceness +.Sh SYNOPSIS +.Nm +.Op Fl n Ar inc +.Ar cmd +.Op Ar arg ... +.Sh DESCRIPTION +.Nm +runs +.Ar cmd +with the current niceness plus +.Ar inc . +A negative niceness is reserved to the superuser. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl n Ar inc +Change niceness by +.Ar inc , +ranging from +.Sy -20 +(highest priority) +to +.Sy +20 +(lowest priority). +Default is 10. +.El +.Sh SEE ALSO +.Xr nice 2 , +.Xr renice 2 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/nice.c b/util/sbase/nice.c new file mode 100644 index 00000000..d036e26c --- /dev/null +++ b/util/sbase/nice.c @@ -0,0 +1,56 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/resource.h> + +#include <errno.h> +#include <stdlib.h> +#include <unistd.h> + +#include "util.h" + +#ifndef PRIO_MIN +#define PRIO_MIN -NZERO +#endif + +#ifndef PRIO_MAX +#define PRIO_MAX (NZERO-1) +#endif + +static void +usage(void) +{ + eprintf("usage: %s [-n inc] cmd [arg ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int val = 10, r, savederrno; + + ARGBEGIN { + case 'n': + val = estrtonum(EARGF(usage()), PRIO_MIN, PRIO_MAX); + break; + default: + usage(); + break; + } ARGEND + + if (!argc) + usage(); + + errno = 0; + r = getpriority(PRIO_PROCESS, 0); + if (errno) + weprintf("getpriority:"); + else + val += r; + LIMIT(val, PRIO_MIN, PRIO_MAX); + if (setpriority(PRIO_PROCESS, 0, val) < 0) + weprintf("setpriority:"); + + execvp(argv[0], argv); + savederrno = errno; + weprintf("execvp %s:", argv[0]); + + _exit(126 + (savederrno == ENOENT)); +} diff --git a/util/sbase/nl.1 b/util/sbase/nl.1 new file mode 100644 index 00000000..26975421 --- /dev/null +++ b/util/sbase/nl.1 @@ -0,0 +1,116 @@ +.Dd May 15, 2020 +.Dt NL 1 +.Os sbase +.Sh NAME +.Nm nl +.Nd line numbering filter +.Sh SYNOPSIS +.Nm +.Op Fl p +.Op Fl b Ar type +.Op Fl d Ar delim +.Op Fl f Ar type +.Op Fl h Ar type +.Op Fl i Ar num +.Op Fl l Ar num +.Op Fl n Ar format +.Op Fl s Ar sep +.Op Fl v Ar num +.Op Fl w Ar num +.Op Ar file +.Sh DESCRIPTION +.Nm +reads lines from +.Ar file +and writes them to stdout, numbering non-empty lines. +If no +.Ar file +is given +.Nm +reads from stdin. +.Pp +.Nm +treats the input text as a collection of logical pages divided into +logical page sections. +Each logical page consists of a header section, a body +section and a footer section. +Sections may be empty. +The start of each section is indicated by a single delimiting line, one of: +.Bl -column "\e:\e:\e: " "header " -offset indent +.It Em "Line" Ta Em "Start of" +.It \e:\e:\e: header +.It \e:\e: body +.It \e: footer +.El +.Pp +If the input text contains no delimiting line then all of the input text +belongs to a single logical page body section. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl p +Do not reset line number for logical pages. +.It Fl h Ar type | Fl b Ar type | Fl f Ar type +Define which lines to number in the head | body | footer section: +.Bl -tag -width pstringXX +.It a +All lines. +.It n +No lines. +.It t +Only non-empty lines. +This is the default. +.It p Ns Ar expr +Only lines matching +.Ar expr +according to +.Xr regex 7 or +.Xr re_format 7 . +.El +.It Fl d Ar delim +Set +.Ar delim +as the delimiter for logical pages. +If +.Ar delim +is only one character, +.Nm +appends ":" to it. +The default is "\e:". +.It Fl i Ar num +Set the increment between numbered lines to +.Ar num . +.It Fl l Ar num +Set the number of adjacent blank lines to be considered as one to +.Ar num . +The default is 1. +.It Fl n Ar format +Set the line number output +.Ar format +to one of: +.Bl -tag -width pstringXX +.It ln +Left justified. +.It rn +Right justified. +This is the default. +.It rz +Right justified with leading zeroes. +.El +.It Fl s Ar sep +Use +.Ar sep +to separate line numbers and lines. +The default is "\et". +.It Fl v Ar num +Start counting lines from +.Ar num . +The default is 1. +.It Fl w Ar num +Set the width of the line number to +.Ar num . +The default is 6. +.El +.Sh SEE ALSO +.Xr pr 1 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/nl.c b/util/sbase/nl.c new file mode 100644 index 00000000..9a289b02 --- /dev/null +++ b/util/sbase/nl.c @@ -0,0 +1,212 @@ +/* See LICENSE file for copyright and license details. */ +#include <limits.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "text.h" +#include "utf.h" +#include "util.h" + +static size_t startnum = 1; +static size_t incr = 1; +static size_t blines = 1; +static size_t delimlen = 2; +static size_t seplen = 1; +static int width = 6; +static int pflag = 0; +static char type[] = { 'n', 't', 'n' }; /* footer, body, header */ +static char *delim = "\\:"; +static char format[6] = "%*ld"; +static char *sep = "\t"; +static regex_t preg[3]; + +static int +getsection(struct line *l, int *section) +{ + size_t i; + int sectionchanged = 0, newsection = *section; + + for (i = 0; (l->len - i) >= delimlen && + !memcmp(l->data + i, delim, delimlen); i += delimlen) { + if (!sectionchanged) { + sectionchanged = 1; + newsection = 0; + } else { + newsection = (newsection + 1) % 3; + } + } + + if (!(l->len - i) || l->data[i] == '\n') + *section = newsection; + else + sectionchanged = 0; + + return sectionchanged; +} + +static void +nl(const char *fname, FILE *fp) +{ + static struct line line; + static size_t size; + size_t number = startnum, bl = 1; + ssize_t len; + int donumber, oldsection, section = 1; + + while ((len = getline(&line.data, &size, fp)) > 0) { + line.len = len; + donumber = 0; + oldsection = section; + + if (getsection(&line, §ion)) { + if ((section >= oldsection) && !pflag) + number = startnum; + continue; + } + + switch (type[section]) { + case 't': + if (line.data[0] != '\n') + donumber = 1; + break; + case 'p': + if (!regexec(preg + section, line.data, 0, NULL, 0)) + donumber = 1; + break; + case 'a': + if (line.data[0] == '\n' && bl < blines) { + ++bl; + } else { + donumber = 1; + bl = 1; + } + } + + if (donumber) { + printf(format, width, number); + fwrite(sep, 1, seplen, stdout); + number += incr; + } + fwrite(line.data, 1, line.len, stdout); + } + free(line.data); + if (ferror(fp)) + eprintf("getline %s:", fname); +} + +static void +usage(void) +{ + eprintf("usage: %s [-p] [-b type] [-d delim] [-f type]\n" + " [-h type] [-i num] [-l num] [-n format]\n" + " [-s sep] [-v num] [-w num] [file]\n", argv0); +} + +static char +getlinetype(char *type, regex_t *preg) +{ + if (type[0] == 'p') + eregcomp(preg, type + 1, REG_NOSUB); + else if (!type[0] || !strchr("ant", type[0])) + usage(); + + return type[0]; +} + +int +main(int argc, char *argv[]) +{ + FILE *fp = NULL; + size_t s; + int ret = 0; + char *d, *formattype, *formatblit; + + ARGBEGIN { + case 'd': + switch (utflen((d = EARGF(usage())))) { + case 0: + eprintf("empty logical page delimiter\n"); + case 1: + s = strlen(d); + delim = emalloc(s + 1 + 1); + estrlcpy(delim, d, s + 1 + 1); + estrlcat(delim, ":", s + 1 + 1); + delimlen = s + 1; + break; + default: + delim = d; + delimlen = strlen(delim); + break; + } + break; + case 'f': + type[0] = getlinetype(EARGF(usage()), preg); + break; + case 'b': + type[1] = getlinetype(EARGF(usage()), preg + 1); + break; + case 'h': + type[2] = getlinetype(EARGF(usage()), preg + 2); + break; + case 'i': + incr = estrtonum(EARGF(usage()), 0, MIN(LLONG_MAX, SIZE_MAX)); + break; + case 'l': + blines = estrtonum(EARGF(usage()), 0, MIN(LLONG_MAX, SIZE_MAX)); + break; + case 'n': + formattype = EARGF(usage()); + estrlcpy(format, "%", sizeof(format)); + + if (!strcmp(formattype, "ln")) { + formatblit = "-"; + } else if (!strcmp(formattype, "rn")) { + formatblit = ""; + } else if (!strcmp(formattype, "rz")) { + formatblit = "0"; + } else { + eprintf("%s: bad format\n", formattype); + } + + estrlcat(format, formatblit, sizeof(format)); + estrlcat(format, "*ld", sizeof(format)); + break; + case 'p': + pflag = 1; + break; + case 's': + sep = EARGF(usage()); + seplen = unescape(sep); + break; + case 'v': + startnum = estrtonum(EARGF(usage()), 0, MIN(LLONG_MAX, SIZE_MAX)); + break; + case 'w': + width = estrtonum(EARGF(usage()), 1, INT_MAX); + break; + default: + usage(); + } ARGEND + + if (argc > 1) + usage(); + + if (!argc) { + nl("<stdin>", stdin); + } else { + if (!strcmp(argv[0], "-")) { + argv[0] = "<stdin>"; + fp = stdin; + } else if (!(fp = fopen(argv[0], "r"))) { + eprintf("fopen %s:", argv[0]); + } + nl(argv[0], fp); + } + + ret |= fp && fp != stdin && fshut(fp, argv[0]); + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/nohup.1 b/util/sbase/nohup.1 new file mode 100644 index 00000000..48a8fad6 --- /dev/null +++ b/util/sbase/nohup.1 @@ -0,0 +1,40 @@ +.Dd October 8, 2015 +.Dt NOHUP 1 +.Os sbase +.Sh NAME +.Nm nohup +.Nd run command immune to hangups +.Sh SYNOPSIS +.Nm +.Ar cmd +.Op Ar arg ... +.Sh DESCRIPTION +.Nm +runs +.Ar cmd +with the +.Em HUP +signal set to be ignored. +.Pp +If stdout is a terminal, it is appended to +.Em nohup.out +in the current working directory. +If stderr is a terminal, it is redirected to stdout. +.Sh EXIT STATUS +.Bl -tag -width Ds +.It 0 +.Ar cmd +executed successfully. +.It 1 +Internal error. +.It 126 +.Ar cmd +was found but could not be executed. +.It 127 +.Ar cmd +could not be found. +.El +.Sh SEE ALSO +.Xr signal 7 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/nohup.c b/util/sbase/nohup.c new file mode 100644 index 00000000..5c1bf448 --- /dev/null +++ b/util/sbase/nohup.c @@ -0,0 +1,48 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> + +#include <errno.h> +#include <fcntl.h> +#include <signal.h> +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s cmd [arg ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int fd, savederrno; + + ARGBEGIN { + default: + usage(); + } ARGEND + + if (!argc) + usage(); + + if (signal(SIGHUP, SIG_IGN) == SIG_ERR) + enprintf(127, "signal HUP:"); + + if (isatty(STDOUT_FILENO)) { + if ((fd = open("nohup.out", O_WRONLY | O_APPEND | O_CREAT, S_IRUSR | S_IWUSR)) < 0) + enprintf(127, "open nohup.out:"); + if (dup2(fd, STDOUT_FILENO) < 0) + enprintf(127, "dup2:"); + close(fd); + } + if (isatty(STDERR_FILENO) && dup2(STDOUT_FILENO, STDERR_FILENO) < 0) + enprintf(127, "dup2:"); + + execvp(argv[0], argv); + savederrno = errno; + weprintf("execvp %s:", argv[0]); + + _exit(126 + (savederrno == ENOENT)); +} diff --git a/util/sbase/od.1 b/util/sbase/od.1 new file mode 100644 index 00000000..622093f5 --- /dev/null +++ b/util/sbase/od.1 @@ -0,0 +1,80 @@ +.Dd October 25, 2015 +.Dt OD 1 +.Os sbase +.Sh NAME +.Nm od +.Nd octal dump +.Sh SYNOPSIS +.Nm +.Op Fl bdosvx +.Op Fl A Ar addrformat +.Op Fl E | e +.Op Fl j Ar skip +.Op Fl t Ar outputformat... +.Op Ar file ... +.Sh DESCRIPTION +.Nm +writes an octal dump of each +.Ar file +to stdout. +If no +.Ar file +is given +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl A Ar addressformat +.Ar addressformat +is one of d|o|x|n and sets the address to be +either in \fId\fRecimal, \fIo\fRctal, he\fIx\fRadecimal or \fIn\fRot +printed at all. +The default is octal. +.It Fl E | e +Force Little Endian +.Fl ( e ) +or Big Endian +.Fl ( E ) +system-independently. +.It Fl b +Equivalent to +.Fl t o1 . +.It Fl d +Equivalent to +.Fl t u2 . +.It Fl j Ar skip +Ignore the first +.Ar skip +bytes of input. +.It Fl o +Equivalent to +.Fl t o2 . +.It Fl s +Equivalent to +.Fl t d2 . +.It Fl t Ar outputformat +.Ar outputformat +is a list of a|c|d|o|u|x followed by a digit or C|S|I|L and sets +the content to be in n\fIa\fRmed character, \fIc\fRharacter, signed +\fId\fRecimal, \fIo\fRctal, \fIu\fRnsigned decimal, or +he\fIx\fRadecimal format, processing the given amount of bytes or the length +of \fIC\fRhar, \fIS\fRhort, \fII\fRnteger or \fIL\fRong. +The default is octal with 4 bytes. +.It Fl v +Always set. +Write all input data, including duplicate lines. +.It Fl x +Equivalent to +.Fl t x2 . +.El +.Sh STANDARDS +POSIX.1-2013. +Except that the +.Op Fl v +flag is always enabled and the 'd' parameter for the +.Op Fl t +flag is interpreted as 'u'. +.Pp +The +.Op Ee +flags are an extension to that specification. diff --git a/util/sbase/od.c b/util/sbase/od.c new file mode 100644 index 00000000..0b1c5c60 --- /dev/null +++ b/util/sbase/od.c @@ -0,0 +1,332 @@ +/* See LICENSE file for copyright and license details. */ +#include <ctype.h> +#include <fcntl.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + +#include "queue.h" +#include "util.h" + +struct type { + unsigned char format; + unsigned int len; + TAILQ_ENTRY(type) entry; +}; + +static TAILQ_HEAD(head, type) head = TAILQ_HEAD_INITIALIZER(head); +static unsigned char addr_format = 'o'; +static off_t skip = 0; +static off_t max = -1; +static size_t linelen = 1; +static int big_endian; + +static void +printaddress(off_t addr) +{ + char fmt[] = "%07j#"; + + if (addr_format == 'n') { + fputc(' ', stdout); + } else { + fmt[4] = addr_format; + printf(fmt, (intmax_t)addr); + } +} + +static void +printchunk(const unsigned char *s, unsigned char format, size_t len) +{ + long long res, basefac; + size_t i; + char fmt[] = " %#*ll#"; + unsigned char c; + + const char *namedict[] = { + "nul", "soh", "stx", "etx", "eot", "enq", "ack", + "bel", "bs", "ht", "nl", "vt", "ff", "cr", + "so", "si", "dle", "dc1", "dc2", "dc3", "dc4", + "nak", "syn", "etb", "can", "em", "sub", "esc", + "fs", "gs", "rs", "us", "sp", + }; + const char *escdict[] = { + ['\0'] = "\\0", ['\a'] = "\\a", + ['\b'] = "\\b", ['\t'] = "\\t", + ['\n'] = "\\n", ['\v'] = "\\v", + ['\f'] = "\\f", ['\r'] = "\\r", + }; + + switch (format) { + case 'a': + c = *s & ~128; /* clear high bit as required by standard */ + if (c < LEN(namedict) || c == 127) { + printf(" %3s", (c == 127) ? "del" : namedict[c]); + } else { + printf(" %3c", c); + } + break; + case 'c': + if (strchr("\a\b\t\n\v\f\r\0", *s)) { + printf(" %3s", escdict[*s]); + } else if (!isprint(*s)) { + printf(" %3o", *s); + } else { + printf(" %3c", *s); + } + break; + default: + if (big_endian) { + for (res = 0, basefac = 1, i = len; i; i--) { + res += s[i - 1] * basefac; + basefac <<= 8; + } + } else { + for (res = 0, basefac = 1, i = 0; i < len; i++) { + res += s[i] * basefac; + basefac <<= 8; + } + } + fmt[2] = big_endian ? '-' : ' '; + fmt[6] = format; + printf(fmt, (int)(3 * len + len - 1), res); + } +} + +static void +printline(const unsigned char *line, size_t len, off_t addr) +{ + struct type *t = NULL; + size_t i; + int first = 1; + unsigned char *tmp; + + if (TAILQ_EMPTY(&head)) + goto once; + TAILQ_FOREACH(t, &head, entry) { +once: + if (first) { + printaddress(addr); + first = 0; + } else { + printf("%*c", (addr_format == 'n') ? 1 : 7, ' '); + } + for (i = 0; i < len; i += MIN(len - i, t ? t->len : 4)) { + if (len - i < (t ? t->len : 4)) { + tmp = ecalloc(t ? t->len : 4, 1); + memcpy(tmp, line + i, len - i); + printchunk(tmp, t ? t->format : 'o', + t ? t->len : 4); + free(tmp); + } else { + printchunk(line + i, t ? t->format : 'o', + t ? t->len : 4); + } + } + fputc('\n', stdout); + if (TAILQ_EMPTY(&head) || (!len && !first)) + break; + } +} + +static int +od(int fd, char *fname, int last) +{ + static unsigned char *line; + static size_t lineoff; + static off_t addr; + unsigned char buf[BUFSIZ]; + size_t i, size = sizeof(buf); + ssize_t n; + + while (skip - addr > 0) { + n = read(fd, buf, MIN(skip - addr, sizeof(buf))); + if (n < 0) + weprintf("read %s:", fname); + if (n <= 0) + return n; + addr += n; + } + if (!line) + line = emalloc(linelen); + + for (;;) { + if (max >= 0) + size = MIN(max - (addr - skip), size); + if ((n = read(fd, buf, size)) <= 0) + break; + for (i = 0; i < n; i++, addr++) { + line[lineoff++] = buf[i]; + if (lineoff == linelen) { + printline(line, lineoff, addr - lineoff + 1); + lineoff = 0; + } + } + } + if (n < 0) { + weprintf("read %s:", fname); + return n; + } + if (lineoff && last) + printline(line, lineoff, addr - lineoff); + if (last) + printline((unsigned char *)"", 0, addr); + return 0; +} + +static int +lcm(unsigned int a, unsigned int b) +{ + unsigned int c, d, e; + + for (c = a, d = b; c ;) { + e = c; + c = d % c; + d = e; + } + + return a / d * b; +} + +static void +addtype(char format, int len) +{ + struct type *t; + + t = emalloc(sizeof(*t)); + t->format = format; + t->len = len; + TAILQ_INSERT_TAIL(&head, t, entry); +} + +static void +usage(void) +{ + eprintf("usage: %s [-bdosvx] [-A addressformat] [-E | -e] [-j skip] " + "[-t outputformat] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int fd; + struct type *t; + int ret = 0, len; + char *s; + + big_endian = (*(uint16_t *)"\0\xff" == 0xff); + + ARGBEGIN { + case 'A': + s = EARGF(usage()); + if (strlen(s) != 1 || !strchr("doxn", s[0])) + usage(); + addr_format = s[0]; + break; + case 'b': + addtype('o', 1); + break; + case 'd': + addtype('u', 2); + break; + case 'E': + case 'e': + big_endian = (ARGC() == 'E'); + break; + case 'j': + if ((skip = parseoffset(EARGF(usage()))) < 0) + usage(); + break; + case 'N': + if ((max = parseoffset(EARGF(usage()))) < 0) + usage(); + break; + case 'o': + addtype('o', 2); + break; + case 's': + addtype('d', 2); + break; + case 't': + s = EARGF(usage()); + for (; *s; s++) { + switch (*s) { + case 'a': + case 'c': + addtype(*s, 1); + break; + case 'd': + case 'o': + case 'u': + case 'x': + /* todo: allow multiple digits */ + if (*(s+1) > '0' && *(s+1) <= '9') { + len = *(s+1) - '0'; + } else { + switch (*(s+1)) { + case 'C': + len = sizeof(char); + break; + case 'S': + len = sizeof(short); + break; + case 'I': + len = sizeof(int); + break; + case 'L': + len = sizeof(long); + break; + default: + len = sizeof(int); + } + } + addtype(*s++, len); + break; + default: + usage(); + } + } + break; + case 'v': + /* always set - use uniq(1) to handle duplicate lines */ + break; + case 'x': + addtype('x', 2); + break; + default: + usage(); + } ARGEND + + /* line length is lcm of type lengths and >= 16 by doubling */ + TAILQ_FOREACH(t, &head, entry) + linelen = lcm(linelen, t->len); + if (TAILQ_EMPTY(&head)) + linelen = 16; + while (linelen < 16) + linelen *= 2; + + if (!argc) { + if (od(0, "<stdin>", 1) < 0) + ret = 1; + } else { + for (; *argv; argc--, argv++) { + if (!strcmp(*argv, "-")) { + *argv = "<stdin>"; + fd = 0; + } else if ((fd = open(*argv, O_RDONLY)) < 0) { + weprintf("open %s:", *argv); + ret = 1; + continue; + } + if (od(fd, *argv, (!*(argv + 1))) < 0) + ret = 1; + if (fd != 0) + close(fd); + } + } + + ret |= fshut(stdout, "<stdout>") | fshut(stderr, "<stderr>"); + + return ret; +} diff --git a/util/sbase/paste.1 b/util/sbase/paste.1 new file mode 100644 index 00000000..7b26130f --- /dev/null +++ b/util/sbase/paste.1 @@ -0,0 +1,47 @@ +.Dd October 8, 2015 +.Dt PASTE 1 +.Os sbase +.Sh NAME +.Nm paste +.Nd merge lines of files in parallel or sequentially +.Sh SYNOPSIS +.Nm +.Op Fl s +.Op Fl d Ar list +.Ar file ... +.Sh DESCRIPTION +.Nm +reads single lines from each +.Ar file +and writes them into one line, replacing +.Sy \en +with +.Sy \et +except from the last +.Ar file . +This process is repeated until each +.Ar file +is starved, treating zero-reads as empty lines along the way. +.Pp +If +.Ar file +is '-', +.Nm +interprets it as stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl d Ar list +Replace +.Sy \en +with escaped characters from +.Ar list +by cycling through it. +.It Fl s +Read each +.Ar file +sequentially instead of in parallel. +.El +.Sh SEE ALSO +.Xr cut 1 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/paste.c b/util/sbase/paste.c new file mode 100644 index 00000000..4fa9fc5a --- /dev/null +++ b/util/sbase/paste.c @@ -0,0 +1,144 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdlib.h> +#include <string.h> + +#include "utf.h" +#include "util.h" + +struct fdescr { + FILE *fp; + const char *name; +}; + +static void +sequential(struct fdescr *dsc, int fdescrlen, Rune *delim, size_t delimlen) +{ + Rune c, last; + size_t i, d; + + for (i = 0; i < fdescrlen; i++) { + d = 0; + last = 0; + + while (efgetrune(&c, dsc[i].fp, dsc[i].name)) { + if (last == '\n') { + if (delim[d] != '\0') + efputrune(&delim[d], stdout, "<stdout>"); + d = (d + 1) % delimlen; + } + + if (c != '\n') + efputrune(&c, stdout, "<stdout>"); + last = c; + } + + if (last == '\n') + efputrune(&last, stdout, "<stdout>"); + } +} + +static void +parallel(struct fdescr *dsc, int fdescrlen, Rune *delim, size_t delimlen) +{ + Rune c, d; + size_t i, m; + ssize_t last; + +nextline: + last = -1; + + for (i = 0; i < fdescrlen; i++) { + d = delim[i % delimlen]; + c = 0; + + while (efgetrune(&c, dsc[i].fp, dsc[i].name)) { + for (m = last + 1; m < i; m++) { + if (delim[m % delimlen] != '\0') + efputrune(&delim[m % delimlen], stdout, "<stdout>"); + } + last = i; + if (c == '\n') { + if (i != fdescrlen - 1) + c = d; + efputrune(&c, stdout, "<stdout>"); + break; + } + efputrune(&c, stdout, "<stdout>"); + } + + if (c == 0 && last != -1) { + if (i == fdescrlen - 1) + putchar('\n'); + else if (d != '\0') + efputrune(&d, stdout, "<stdout>"); + last++; + } + } + if (last != -1) + goto nextline; +} + +static void +usage(void) +{ + eprintf("usage: %s [-s] [-d list] file ...\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + struct fdescr *dsc; + Rune *delim_rune = NULL; + size_t delim_runelen, i, delim_bytelen = 1; + int seq = 0, ret = 0; + char *delim = "\t"; + + ARGBEGIN { + case 's': + seq = 1; + break; + case 'd': + delim = EARGF(usage()); + delim_bytelen = unescape(delim); + break; + default: + usage(); + } ARGEND + + if (!argc) + usage(); + + /* populate delimiters */ + delim_rune = ereallocarray(NULL, + utfmemlen(delim, delim_bytelen) + 1, sizeof(*delim_rune)); + if (!(delim_runelen = utfntorunestr(delim, delim_bytelen, delim_rune))) { + usage(); + } + + /* populate file list */ + dsc = ereallocarray(NULL, argc, sizeof(*dsc)); + + for (i = 0; i < argc; i++) { + if (!strcmp(argv[i], "-")) { + argv[i] = "<stdin>"; + dsc[i].fp = stdin; + } else if (!(dsc[i].fp = fopen(argv[i], "r"))) { + eprintf("fopen %s:", argv[i]); + } + dsc[i].name = argv[i]; + } + + if (seq) { + sequential(dsc, argc, delim_rune, delim_runelen); + } else { + parallel(dsc, argc, delim_rune, delim_runelen); + } + + for (i = 0; i < argc; i++) + if (dsc[i].fp != stdin && fshut(dsc[i].fp, argv[i])) + ret |= fshut(dsc[i].fp, argv[i]); + + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/pathchk.1 b/util/sbase/pathchk.1 new file mode 100644 index 00000000..e0b69b65 --- /dev/null +++ b/util/sbase/pathchk.1 @@ -0,0 +1,31 @@ +.Dd February 3, 2016 +.Dt PATHCHK 1 +.Os sbase +.Sh NAME +.Nm pathchk +.Nd validate filename validity or portability +.Sh SYNOPSIS +.Nm +.Op Fl p +.Op Fl P +.Ar file Ar ... +.Sh DESCRIPTION +.Nm +checks that filenames are valid for the system, +and optional on other POSIX systems. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl p +Check for most POSIX systems. +.It Fl P +Check for empty pathnames and leading hythens. +.El +.Sh EXIT STATUS +.Bl -tag -width Ds +.It 0 +All pathname operands passed all of the checks. +.It > 0 +An error occurred. +.El +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/pathchk.c b/util/sbase/pathchk.c new file mode 100644 index 00000000..b6b0c91c --- /dev/null +++ b/util/sbase/pathchk.c @@ -0,0 +1,104 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> + +#include <errno.h> +#include <limits.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "util.h" + +#define PORTABLE_CHARACTER_SET "0123456789._-qwertyuiopasdfghjklzxcvbnmQWERTYUIOPASDFGHJKLZXCVBNM" +/* If your system supports more other characters, but not all non-NUL characters, define SYSTEM_CHARACTER_SET. */ + +static int most = 0; +static int extra = 0; + +static int +pathchk(char *filename) +{ + char *invalid, *invalid_end, *p, *q; + const char *character_set; + size_t len, maxlen; + struct stat st; + + /* Empty? */ + if (extra && !*filename) + eprintf("empty filename\n"); + + /* Leading hyphen? */ + if (extra && ((*filename == '-') || strstr(filename, "/-"))) + eprintf("%s: leading '-' in component of filename\n", filename); + + /* Nonportable character? */ +#ifdef SYSTEM_CHARACTER_SET + character_set = "/"SYSTEM_CHARACTER_SET; +#else + character_set = 0; +#endif + if (most) + character_set = "/"PORTABLE_CHARACTER_SET; + if (character_set && *(invalid = filename + strspn(filename, character_set))) { + for (invalid_end = invalid + 1; *invalid_end & 0x80; invalid_end++); + p = estrdup(filename); + *invalid_end = 0; + eprintf("%s: nonportable character '%s'\n", p, invalid); + } + + /* Symlink error? Non-searchable directory? */ + if (lstat(filename, &st) && errno != ENOENT) { + /* lstat rather than stat, so that if filename is a bad symlink, but + * all parents are OK, no error will be detected. */ + eprintf("%s:", filename); + } + + /* Too long pathname? */ + maxlen = most ? _POSIX_PATH_MAX : PATH_MAX; + if (strlen(filename) >= maxlen) + eprintf("%s: is longer than %zu bytes\n", filename, maxlen); + + /* Too long component? */ + maxlen = most ? _POSIX_NAME_MAX : NAME_MAX; + for (p = filename; p; p = q) { + q = strchr(p, '/'); + len = q ? (size_t)(q++ - p) : strlen(p); + if (len > maxlen) + eprintf("%s: includes component longer than %zu bytes\n", + filename, maxlen); + } + + return 0; +} + +static void +usage(void) +{ + eprintf("usage: %s [-pP] filename...\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int ret = 0; + + ARGBEGIN { + case 'p': + most = 1; + break; + case 'P': + extra = 1; + break; + default: + usage(); + } ARGEND + + if (!argc) + usage(); + + for (; argc--; argv++) + ret |= pathchk(*argv); + + return ret; +} diff --git a/util/sbase/printenv.1 b/util/sbase/printenv.1 new file mode 100644 index 00000000..24c410be --- /dev/null +++ b/util/sbase/printenv.1 @@ -0,0 +1,30 @@ +.Dd March 30, 2016 +.Dt PRINTENV 1 +.Os sbase +.Sh NAME +.Nm printenv +.Nd print the environment or values of variables +.Sh SYNOPSIS +.Nm +.Op Ar var ... +.Sh DESCRIPTION +.Nm +prints the entire environment as key=value pairs if no +.Ar var +is given. +Otherwise, +.Nm +prints only the value of each +.Ar var +one per line in the order specified. +.Sh EXIT STATUS +.Bl -tag -width Ds +.It 0 +Successful completion. +.It 1 +One or more queried variables were not found. +.It > 1 +An error occurred. +.El +.Sh SEE ALSO +.Xr env 1 diff --git a/util/sbase/printenv.c b/util/sbase/printenv.c new file mode 100644 index 00000000..19b5b7d2 --- /dev/null +++ b/util/sbase/printenv.c @@ -0,0 +1,39 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> +#include <stdlib.h> + +#include "util.h" + +extern char **environ; + +static void +usage(void) +{ + eprintf("usage: %s [var ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + char *var; + int ret = 0; + + ARGBEGIN { + default: + usage(); + } ARGEND + + if (!argc) { + for (; *environ; environ++) + puts(*environ); + } else { + for (; *argv; argc--, argv++) { + if ((var = getenv(*argv))) + puts(var); + else + ret = 1; + } + } + + return fshut(stdout, "<stdout>") ? 2 : ret; +} diff --git a/util/sbase/printf.1 b/util/sbase/printf.1 new file mode 100644 index 00000000..67456e47 --- /dev/null +++ b/util/sbase/printf.1 @@ -0,0 +1,33 @@ +.Dd October 8, 2015 +.Dt PRINTF 1 +.Os sbase +.Sh NAME +.Nm printf +.Nd print formatted data +.Sh SYNOPSIS +.Nm +.Ar format +.Op Ar arg ... +.Sh DESCRIPTION +.Nm +writes formatted data according to +.Ar format +using each +.Ar arg +until drained. +.Pp +.Nm +interprets the standard escape sequences \e\e, \e', \e", \ea, \eb, \ee, +\ef, \en, \er, \et, \ev, \exH[H], \eO[OOO], the sequence \ec, which +terminates further output if it's found inside +.Ar format +or a %b format string, the format specification %b for an unescaped string and +all C +.Xr printf 3 +format specifications ending with csdiouxXaAeEfFgG, including variable width +and precision. +.Sh STANDARDS +POSIX.1-2013. +.Pp +The possibility of specifying 4-digit octals is an extension to that +specification. diff --git a/util/sbase/printf.c b/util/sbase/printf.c new file mode 100644 index 00000000..039dac71 --- /dev/null +++ b/util/sbase/printf.c @@ -0,0 +1,188 @@ +/* See LICENSE file for copyright and license details. */ +#include <ctype.h> +#include <errno.h> +#include <limits.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "utf.h" +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s format [arg ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + Rune *rarg; + size_t i, j, argi, lastargi, formatlen, blen; + long long num; + double dou; + int cooldown = 0, width, precision, ret = 0; + char *format, *tmp, *arg, *fmt, flag; + + argv0 = argv[0]; + if (argc < 2) + usage(); + + format = argv[1]; + if ((tmp = strstr(format, "\\c"))) { + *tmp = 0; + cooldown = 1; + } + formatlen = unescape(format); + if (formatlen == 0) + return 0; + lastargi = 0; + for (i = 0, argi = 2; !cooldown || i < formatlen; i++, i = cooldown ? i : (i % formatlen)) { + if (i == 0) { + if (lastargi == argi) + break; + lastargi = argi; + } + if (format[i] != '%') { + putchar(format[i]); + continue; + } + + /* flag */ + for (flag = '\0', i++; strchr("#-+ 0", format[i]); i++) { + flag = format[i]; + } + + /* field width */ + width = -1; + if (format[i] == '*') { + if (argi < argc) + width = estrtonum(argv[argi++], 0, INT_MAX); + else + cooldown = 1; + i++; + } else { + j = i; + for (; strchr("+-0123456789", format[i]); i++); + if (j != i) { + tmp = estrndup(format + j, i - j); + width = estrtonum(tmp, 0, INT_MAX); + free(tmp); + } else { + width = 0; + } + } + + /* field precision */ + precision = -1; + if (format[i] == '.') { + if (format[++i] == '*') { + if (argi < argc) + precision = estrtonum(argv[argi++], 0, INT_MAX); + else + cooldown = 1; + i++; + } else { + j = i; + for (; strchr("+-0123456789", format[i]); i++); + if (j != i) { + tmp = estrndup(format + j, i - j); + precision = estrtonum(tmp, 0, INT_MAX); + free(tmp); + } else { + precision = 0; + } + } + } + + if (format[i] != '%') { + if (argi < argc) + arg = argv[argi++]; + else { + arg = ""; + cooldown = 1; + } + } else { + putchar('%'); + continue; + } + + switch (format[i]) { + case 'b': + if ((tmp = strstr(arg, "\\c"))) { + *tmp = 0; + blen = unescape(arg); + fwrite(arg, sizeof(*arg), blen, stdout); + return 0; + } + blen = unescape(arg); + fwrite(arg, sizeof(*arg), blen, stdout); + break; + case 'c': + unescape(arg); + rarg = ereallocarray(NULL, utflen(arg) + 1, sizeof(*rarg)); + utftorunestr(arg, rarg); + efputrune(rarg, stdout, "<stdout>"); + free(rarg); + break; + case 's': + fmt = estrdup(flag ? "%#*.*s" : "%*.*s"); + if (flag) + fmt[1] = flag; + printf(fmt, width, precision, arg); + free(fmt); + break; + case 'd': case 'i': case 'o': case 'u': case 'x': case 'X': + for (j = 0; isspace(arg[j]); j++); + if (arg[j] == '\'' || arg[j] == '\"') { + arg += j + 1; + unescape(arg); + rarg = ereallocarray(NULL, utflen(arg) + 1, sizeof(*rarg)); + utftorunestr(arg, rarg); + num = rarg[0]; + } else if (arg[0]) { + errno = 0; + if (format[i] == 'd' || format[i] == 'i') + num = strtol(arg, &tmp, 0); + else + num = strtoul(arg, &tmp, 0); + + if (tmp == arg || *tmp != '\0') { + ret = 1; + weprintf("%%%c %s: conversion error\n", + format[i], arg); + } + if (errno == ERANGE) { + ret = 1; + weprintf("%%%c %s: out of range\n", + format[i], arg); + } + } else { + num = 0; + } + fmt = estrdup(flag ? "%#*.*ll#" : "%*.*ll#"); + if (flag) + fmt[1] = flag; + fmt[flag ? 7 : 6] = format[i]; + printf(fmt, width, precision, num); + free(fmt); + break; + case 'a': case 'A': case 'e': case 'E': case 'f': case 'F': case 'g': case 'G': + fmt = estrdup(flag ? "%#*.*#" : "%*.*#"); + if (flag) + fmt[1] = flag; + fmt[flag ? 5 : 4] = format[i]; + dou = (strlen(arg) > 0) ? estrtod(arg) : 0; + printf(fmt, width, precision, dou); + free(fmt); + break; + default: + eprintf("Invalid format specifier '%c'.\n", format[i]); + } + if (argi >= argc) + cooldown = 1; + } + + return fshut(stdout, "<stdout>") | ret; +} diff --git a/util/sbase/pwd.1 b/util/sbase/pwd.1 new file mode 100644 index 00000000..71b9d2a8 --- /dev/null +++ b/util/sbase/pwd.1 @@ -0,0 +1,29 @@ +.Dd October 8, 2015 +.Dt PWD 1 +.Os sbase +.Sh NAME +.Nm pwd +.Nd print working directory +.Sh SYNOPSIS +.Nm +.Op Fl L | Fl P +.Sh DESCRIPTION +.Nm +prints the path of the current working directory. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl L +Logical path, uses $PWD. +This is the default. +.It Fl P +Physical path, avoids all symlinks. +.El +.Sh ENVIRONMENT +.Bl -tag -width PWD +.It Ev PWD +The logical path to the current working directory. +.El +.Sh SEE ALSO +.Xr getcwd 3 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/pwd.c b/util/sbase/pwd.c new file mode 100644 index 00000000..c6a4497f --- /dev/null +++ b/util/sbase/pwd.c @@ -0,0 +1,50 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> + +#include <stdio.h> +#include <stdlib.h> +#include <unistd.h> + +#include "util.h" + +static const char * +getpwd(const char *cwd) +{ + const char *pwd; + struct stat cst, pst; + + if (!(pwd = getenv("PWD")) || pwd[0] != '/' || stat(pwd, &pst) < 0) + return cwd; + if (stat(cwd, &cst) < 0) + eprintf("stat %s:", cwd); + + return (pst.st_dev == cst.st_dev && pst.st_ino == cst.st_ino) ? pwd : cwd; +} + +static void +usage(void) +{ + eprintf("usage: %s [-LP]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + char cwd[PATH_MAX]; + char mode = 'L'; + + ARGBEGIN { + case 'L': + case 'P': + mode = ARGC(); + break; + default: + usage(); + } ARGEND + + if (!getcwd(cwd, sizeof(cwd))) + eprintf("getcwd:"); + puts((mode == 'L') ? getpwd(cwd) : cwd); + + return fshut(stdout, "<stdout>"); +} diff --git a/util/sbase/queue.h b/util/sbase/queue.h new file mode 100644 index 00000000..f8f09bf1 --- /dev/null +++ b/util/sbase/queue.h @@ -0,0 +1,648 @@ +/* $OpenBSD: queue.h,v 1.38 2013/07/03 15:05:21 fgsch Exp $ */ +/* $NetBSD: queue.h,v 1.11 1996/05/16 05:17:14 mycroft Exp $ */ + +/* + * Copyright (c) 1991, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)queue.h 8.5 (Berkeley) 8/20/94 + */ + +#ifndef _SYS_QUEUE_H_ +#define _SYS_QUEUE_H_ + +/* + * This file defines five types of data structures: singly-linked lists, + * lists, simple queues, tail queues, and circular queues. + * + * + * A singly-linked list is headed by a single forward pointer. The elements + * are singly linked for minimum space and pointer manipulation overhead at + * the expense of O(n) removal for arbitrary elements. New elements can be + * added to the list after an existing element or at the head of the list. + * Elements being removed from the head of the list should use the explicit + * macro for this purpose for optimum efficiency. A singly-linked list may + * only be traversed in the forward direction. Singly-linked lists are ideal + * for applications with large datasets and few or no removals or for + * implementing a LIFO queue. + * + * A list is headed by a single forward pointer (or an array of forward + * pointers for a hash table header). The elements are doubly linked + * so that an arbitrary element can be removed without a need to + * traverse the list. New elements can be added to the list before + * or after an existing element or at the head of the list. A list + * may only be traversed in the forward direction. + * + * A simple queue is headed by a pair of pointers, one the head of the + * list and the other to the tail of the list. The elements are singly + * linked to save space, so elements can only be removed from the + * head of the list. New elements can be added to the list before or after + * an existing element, at the head of the list, or at the end of the + * list. A simple queue may only be traversed in the forward direction. + * + * A tail queue is headed by a pair of pointers, one to the head of the + * list and the other to the tail of the list. The elements are doubly + * linked so that an arbitrary element can be removed without a need to + * traverse the list. New elements can be added to the list before or + * after an existing element, at the head of the list, or at the end of + * the list. A tail queue may be traversed in either direction. + * + * A circle queue is headed by a pair of pointers, one to the head of the + * list and the other to the tail of the list. The elements are doubly + * linked so that an arbitrary element can be removed without a need to + * traverse the list. New elements can be added to the list before or after + * an existing element, at the head of the list, or at the end of the list. + * A circle queue may be traversed in either direction, but has a more + * complex end of list detection. + * + * For details on the use of these macros, see the queue(3) manual page. + */ + +#if defined(QUEUE_MACRO_DEBUG) || (defined(_KERNEL) && defined(DIAGNOSTIC)) +#define _Q_INVALIDATE(a) (a) = ((void *)-1) +#else +#define _Q_INVALIDATE(a) +#endif + +/* + * Singly-linked List definitions. + */ +#define SLIST_HEAD(name, type) \ +struct name { \ + struct type *slh_first; /* first element */ \ +} + +#define SLIST_HEAD_INITIALIZER(head) \ + { NULL } + +#define SLIST_ENTRY(type) \ +struct { \ + struct type *sle_next; /* next element */ \ +} + +/* + * Singly-linked List access methods. + */ +#define SLIST_FIRST(head) ((head)->slh_first) +#define SLIST_END(head) NULL +#define SLIST_EMPTY(head) (SLIST_FIRST(head) == SLIST_END(head)) +#define SLIST_NEXT(elm, field) ((elm)->field.sle_next) + +#define SLIST_FOREACH(var, head, field) \ + for((var) = SLIST_FIRST(head); \ + (var) != SLIST_END(head); \ + (var) = SLIST_NEXT(var, field)) + +#define SLIST_FOREACH_SAFE(var, head, field, tvar) \ + for ((var) = SLIST_FIRST(head); \ + (var) && ((tvar) = SLIST_NEXT(var, field), 1); \ + (var) = (tvar)) + +/* + * Singly-linked List functions. + */ +#define SLIST_INIT(head) { \ + SLIST_FIRST(head) = SLIST_END(head); \ +} + +#define SLIST_INSERT_AFTER(slistelm, elm, field) do { \ + (elm)->field.sle_next = (slistelm)->field.sle_next; \ + (slistelm)->field.sle_next = (elm); \ +} while (0) + +#define SLIST_INSERT_HEAD(head, elm, field) do { \ + (elm)->field.sle_next = (head)->slh_first; \ + (head)->slh_first = (elm); \ +} while (0) + +#define SLIST_REMOVE_AFTER(elm, field) do { \ + (elm)->field.sle_next = (elm)->field.sle_next->field.sle_next; \ +} while (0) + +#define SLIST_REMOVE_HEAD(head, field) do { \ + (head)->slh_first = (head)->slh_first->field.sle_next; \ +} while (0) + +#define SLIST_REMOVE(head, elm, type, field) do { \ + if ((head)->slh_first == (elm)) { \ + SLIST_REMOVE_HEAD((head), field); \ + } else { \ + struct type *curelm = (head)->slh_first; \ + \ + while (curelm->field.sle_next != (elm)) \ + curelm = curelm->field.sle_next; \ + curelm->field.sle_next = \ + curelm->field.sle_next->field.sle_next; \ + _Q_INVALIDATE((elm)->field.sle_next); \ + } \ +} while (0) + +/* + * List definitions. + */ +#define LIST_HEAD(name, type) \ +struct name { \ + struct type *lh_first; /* first element */ \ +} + +#define LIST_HEAD_INITIALIZER(head) \ + { NULL } + +#define LIST_ENTRY(type) \ +struct { \ + struct type *le_next; /* next element */ \ + struct type **le_prev; /* address of previous next element */ \ +} + +/* + * List access methods + */ +#define LIST_FIRST(head) ((head)->lh_first) +#define LIST_END(head) NULL +#define LIST_EMPTY(head) (LIST_FIRST(head) == LIST_END(head)) +#define LIST_NEXT(elm, field) ((elm)->field.le_next) + +#define LIST_FOREACH(var, head, field) \ + for((var) = LIST_FIRST(head); \ + (var)!= LIST_END(head); \ + (var) = LIST_NEXT(var, field)) + +#define LIST_FOREACH_SAFE(var, head, field, tvar) \ + for ((var) = LIST_FIRST(head); \ + (var) && ((tvar) = LIST_NEXT(var, field), 1); \ + (var) = (tvar)) + +/* + * List functions. + */ +#define LIST_INIT(head) do { \ + LIST_FIRST(head) = LIST_END(head); \ +} while (0) + +#define LIST_INSERT_AFTER(listelm, elm, field) do { \ + if (((elm)->field.le_next = (listelm)->field.le_next) != NULL) \ + (listelm)->field.le_next->field.le_prev = \ + &(elm)->field.le_next; \ + (listelm)->field.le_next = (elm); \ + (elm)->field.le_prev = &(listelm)->field.le_next; \ +} while (0) + +#define LIST_INSERT_BEFORE(listelm, elm, field) do { \ + (elm)->field.le_prev = (listelm)->field.le_prev; \ + (elm)->field.le_next = (listelm); \ + *(listelm)->field.le_prev = (elm); \ + (listelm)->field.le_prev = &(elm)->field.le_next; \ +} while (0) + +#define LIST_INSERT_HEAD(head, elm, field) do { \ + if (((elm)->field.le_next = (head)->lh_first) != NULL) \ + (head)->lh_first->field.le_prev = &(elm)->field.le_next;\ + (head)->lh_first = (elm); \ + (elm)->field.le_prev = &(head)->lh_first; \ +} while (0) + +#define LIST_REMOVE(elm, field) do { \ + if ((elm)->field.le_next != NULL) \ + (elm)->field.le_next->field.le_prev = \ + (elm)->field.le_prev; \ + *(elm)->field.le_prev = (elm)->field.le_next; \ + _Q_INVALIDATE((elm)->field.le_prev); \ + _Q_INVALIDATE((elm)->field.le_next); \ +} while (0) + +#define LIST_REPLACE(elm, elm2, field) do { \ + if (((elm2)->field.le_next = (elm)->field.le_next) != NULL) \ + (elm2)->field.le_next->field.le_prev = \ + &(elm2)->field.le_next; \ + (elm2)->field.le_prev = (elm)->field.le_prev; \ + *(elm2)->field.le_prev = (elm2); \ + _Q_INVALIDATE((elm)->field.le_prev); \ + _Q_INVALIDATE((elm)->field.le_next); \ +} while (0) + +/* + * Simple queue definitions. + */ +#define SIMPLEQ_HEAD(name, type) \ +struct name { \ + struct type *sqh_first; /* first element */ \ + struct type **sqh_last; /* addr of last next element */ \ +} + +#define SIMPLEQ_HEAD_INITIALIZER(head) \ + { NULL, &(head).sqh_first } + +#define SIMPLEQ_ENTRY(type) \ +struct { \ + struct type *sqe_next; /* next element */ \ +} + +/* + * Simple queue access methods. + */ +#define SIMPLEQ_FIRST(head) ((head)->sqh_first) +#define SIMPLEQ_END(head) NULL +#define SIMPLEQ_EMPTY(head) (SIMPLEQ_FIRST(head) == SIMPLEQ_END(head)) +#define SIMPLEQ_NEXT(elm, field) ((elm)->field.sqe_next) + +#define SIMPLEQ_FOREACH(var, head, field) \ + for((var) = SIMPLEQ_FIRST(head); \ + (var) != SIMPLEQ_END(head); \ + (var) = SIMPLEQ_NEXT(var, field)) + +#define SIMPLEQ_FOREACH_SAFE(var, head, field, tvar) \ + for ((var) = SIMPLEQ_FIRST(head); \ + (var) && ((tvar) = SIMPLEQ_NEXT(var, field), 1); \ + (var) = (tvar)) + +/* + * Simple queue functions. + */ +#define SIMPLEQ_INIT(head) do { \ + (head)->sqh_first = NULL; \ + (head)->sqh_last = &(head)->sqh_first; \ +} while (0) + +#define SIMPLEQ_INSERT_HEAD(head, elm, field) do { \ + if (((elm)->field.sqe_next = (head)->sqh_first) == NULL) \ + (head)->sqh_last = &(elm)->field.sqe_next; \ + (head)->sqh_first = (elm); \ +} while (0) + +#define SIMPLEQ_INSERT_TAIL(head, elm, field) do { \ + (elm)->field.sqe_next = NULL; \ + *(head)->sqh_last = (elm); \ + (head)->sqh_last = &(elm)->field.sqe_next; \ +} while (0) + +#define SIMPLEQ_INSERT_AFTER(head, listelm, elm, field) do { \ + if (((elm)->field.sqe_next = (listelm)->field.sqe_next) == NULL)\ + (head)->sqh_last = &(elm)->field.sqe_next; \ + (listelm)->field.sqe_next = (elm); \ +} while (0) + +#define SIMPLEQ_REMOVE_HEAD(head, field) do { \ + if (((head)->sqh_first = (head)->sqh_first->field.sqe_next) == NULL) \ + (head)->sqh_last = &(head)->sqh_first; \ +} while (0) + +#define SIMPLEQ_REMOVE_AFTER(head, elm, field) do { \ + if (((elm)->field.sqe_next = (elm)->field.sqe_next->field.sqe_next) \ + == NULL) \ + (head)->sqh_last = &(elm)->field.sqe_next; \ +} while (0) + +/* + * XOR Simple queue definitions. + */ +#define XSIMPLEQ_HEAD(name, type) \ +struct name { \ + struct type *sqx_first; /* first element */ \ + struct type **sqx_last; /* addr of last next element */ \ + unsigned long sqx_cookie; \ +} + +#define XSIMPLEQ_ENTRY(type) \ +struct { \ + struct type *sqx_next; /* next element */ \ +} + +/* + * XOR Simple queue access methods. + */ +#define XSIMPLEQ_XOR(head, ptr) ((__typeof(ptr))((head)->sqx_cookie ^ \ + (unsigned long)(ptr))) +#define XSIMPLEQ_FIRST(head) XSIMPLEQ_XOR(head, ((head)->sqx_first)) +#define XSIMPLEQ_END(head) NULL +#define XSIMPLEQ_EMPTY(head) (XSIMPLEQ_FIRST(head) == XSIMPLEQ_END(head)) +#define XSIMPLEQ_NEXT(head, elm, field) XSIMPLEQ_XOR(head, ((elm)->field.sqx_next)) + + +#define XSIMPLEQ_FOREACH(var, head, field) \ + for ((var) = XSIMPLEQ_FIRST(head); \ + (var) != XSIMPLEQ_END(head); \ + (var) = XSIMPLEQ_NEXT(head, var, field)) + +#define XSIMPLEQ_FOREACH_SAFE(var, head, field, tvar) \ + for ((var) = XSIMPLEQ_FIRST(head); \ + (var) && ((tvar) = XSIMPLEQ_NEXT(head, var, field), 1); \ + (var) = (tvar)) + +/* + * XOR Simple queue functions. + */ +#define XSIMPLEQ_INIT(head) do { \ + arc4random_buf(&(head)->sqx_cookie, sizeof((head)->sqx_cookie)); \ + (head)->sqx_first = XSIMPLEQ_XOR(head, NULL); \ + (head)->sqx_last = XSIMPLEQ_XOR(head, &(head)->sqx_first); \ +} while (0) + +#define XSIMPLEQ_INSERT_HEAD(head, elm, field) do { \ + if (((elm)->field.sqx_next = (head)->sqx_first) == \ + XSIMPLEQ_XOR(head, NULL)) \ + (head)->sqx_last = XSIMPLEQ_XOR(head, &(elm)->field.sqx_next); \ + (head)->sqx_first = XSIMPLEQ_XOR(head, (elm)); \ +} while (0) + +#define XSIMPLEQ_INSERT_TAIL(head, elm, field) do { \ + (elm)->field.sqx_next = XSIMPLEQ_XOR(head, NULL); \ + *(XSIMPLEQ_XOR(head, (head)->sqx_last)) = XSIMPLEQ_XOR(head, (elm)); \ + (head)->sqx_last = XSIMPLEQ_XOR(head, &(elm)->field.sqx_next); \ +} while (0) + +#define XSIMPLEQ_INSERT_AFTER(head, listelm, elm, field) do { \ + if (((elm)->field.sqx_next = (listelm)->field.sqx_next) == \ + XSIMPLEQ_XOR(head, NULL)) \ + (head)->sqx_last = XSIMPLEQ_XOR(head, &(elm)->field.sqx_next); \ + (listelm)->field.sqx_next = XSIMPLEQ_XOR(head, (elm)); \ +} while (0) + +#define XSIMPLEQ_REMOVE_HEAD(head, field) do { \ + if (((head)->sqx_first = XSIMPLEQ_XOR(head, \ + (head)->sqx_first)->field.sqx_next) == XSIMPLEQ_XOR(head, NULL)) \ + (head)->sqx_last = XSIMPLEQ_XOR(head, &(head)->sqx_first); \ +} while (0) + +#define XSIMPLEQ_REMOVE_AFTER(head, elm, field) do { \ + if (((elm)->field.sqx_next = XSIMPLEQ_XOR(head, \ + (elm)->field.sqx_next)->field.sqx_next) \ + == XSIMPLEQ_XOR(head, NULL)) \ + (head)->sqx_last = \ + XSIMPLEQ_XOR(head, &(elm)->field.sqx_next); \ +} while (0) + + +/* + * Tail queue definitions. + */ +#define TAILQ_HEAD(name, type) \ +struct name { \ + struct type *tqh_first; /* first element */ \ + struct type **tqh_last; /* addr of last next element */ \ +} + +#define TAILQ_HEAD_INITIALIZER(head) \ + { NULL, &(head).tqh_first } + +#define TAILQ_ENTRY(type) \ +struct { \ + struct type *tqe_next; /* next element */ \ + struct type **tqe_prev; /* address of previous next element */ \ +} + +/* + * tail queue access methods + */ +#define TAILQ_FIRST(head) ((head)->tqh_first) +#define TAILQ_END(head) NULL +#define TAILQ_NEXT(elm, field) ((elm)->field.tqe_next) +#define TAILQ_LAST(head, headname) \ + (*(((struct headname *)((head)->tqh_last))->tqh_last)) +/* XXX */ +#define TAILQ_PREV(elm, headname, field) \ + (*(((struct headname *)((elm)->field.tqe_prev))->tqh_last)) +#define TAILQ_EMPTY(head) \ + (TAILQ_FIRST(head) == TAILQ_END(head)) + +#define TAILQ_FOREACH(var, head, field) \ + for((var) = TAILQ_FIRST(head); \ + (var) != TAILQ_END(head); \ + (var) = TAILQ_NEXT(var, field)) + +#define TAILQ_FOREACH_SAFE(var, head, field, tvar) \ + for ((var) = TAILQ_FIRST(head); \ + (var) != TAILQ_END(head) && \ + ((tvar) = TAILQ_NEXT(var, field), 1); \ + (var) = (tvar)) + + +#define TAILQ_FOREACH_REVERSE(var, head, headname, field) \ + for((var) = TAILQ_LAST(head, headname); \ + (var) != TAILQ_END(head); \ + (var) = TAILQ_PREV(var, headname, field)) + +#define TAILQ_FOREACH_REVERSE_SAFE(var, head, headname, field, tvar) \ + for ((var) = TAILQ_LAST(head, headname); \ + (var) != TAILQ_END(head) && \ + ((tvar) = TAILQ_PREV(var, headname, field), 1); \ + (var) = (tvar)) + +/* + * Tail queue functions. + */ +#define TAILQ_INIT(head) do { \ + (head)->tqh_first = NULL; \ + (head)->tqh_last = &(head)->tqh_first; \ +} while (0) + +#define TAILQ_INSERT_HEAD(head, elm, field) do { \ + if (((elm)->field.tqe_next = (head)->tqh_first) != NULL) \ + (head)->tqh_first->field.tqe_prev = \ + &(elm)->field.tqe_next; \ + else \ + (head)->tqh_last = &(elm)->field.tqe_next; \ + (head)->tqh_first = (elm); \ + (elm)->field.tqe_prev = &(head)->tqh_first; \ +} while (0) + +#define TAILQ_INSERT_TAIL(head, elm, field) do { \ + (elm)->field.tqe_next = NULL; \ + (elm)->field.tqe_prev = (head)->tqh_last; \ + *(head)->tqh_last = (elm); \ + (head)->tqh_last = &(elm)->field.tqe_next; \ +} while (0) + +#define TAILQ_INSERT_AFTER(head, listelm, elm, field) do { \ + if (((elm)->field.tqe_next = (listelm)->field.tqe_next) != NULL)\ + (elm)->field.tqe_next->field.tqe_prev = \ + &(elm)->field.tqe_next; \ + else \ + (head)->tqh_last = &(elm)->field.tqe_next; \ + (listelm)->field.tqe_next = (elm); \ + (elm)->field.tqe_prev = &(listelm)->field.tqe_next; \ +} while (0) + +#define TAILQ_INSERT_BEFORE(listelm, elm, field) do { \ + (elm)->field.tqe_prev = (listelm)->field.tqe_prev; \ + (elm)->field.tqe_next = (listelm); \ + *(listelm)->field.tqe_prev = (elm); \ + (listelm)->field.tqe_prev = &(elm)->field.tqe_next; \ +} while (0) + +#define TAILQ_REMOVE(head, elm, field) do { \ + if (((elm)->field.tqe_next) != NULL) \ + (elm)->field.tqe_next->field.tqe_prev = \ + (elm)->field.tqe_prev; \ + else \ + (head)->tqh_last = (elm)->field.tqe_prev; \ + *(elm)->field.tqe_prev = (elm)->field.tqe_next; \ + _Q_INVALIDATE((elm)->field.tqe_prev); \ + _Q_INVALIDATE((elm)->field.tqe_next); \ +} while (0) + +#define TAILQ_REPLACE(head, elm, elm2, field) do { \ + if (((elm2)->field.tqe_next = (elm)->field.tqe_next) != NULL) \ + (elm2)->field.tqe_next->field.tqe_prev = \ + &(elm2)->field.tqe_next; \ + else \ + (head)->tqh_last = &(elm2)->field.tqe_next; \ + (elm2)->field.tqe_prev = (elm)->field.tqe_prev; \ + *(elm2)->field.tqe_prev = (elm2); \ + _Q_INVALIDATE((elm)->field.tqe_prev); \ + _Q_INVALIDATE((elm)->field.tqe_next); \ +} while (0) + +/* + * Circular queue definitions. + */ +#define CIRCLEQ_HEAD(name, type) \ +struct name { \ + struct type *cqh_first; /* first element */ \ + struct type *cqh_last; /* last element */ \ +} + +#define CIRCLEQ_HEAD_INITIALIZER(head) \ + { CIRCLEQ_END(&head), CIRCLEQ_END(&head) } + +#define CIRCLEQ_ENTRY(type) \ +struct { \ + struct type *cqe_next; /* next element */ \ + struct type *cqe_prev; /* previous element */ \ +} + +/* + * Circular queue access methods + */ +#define CIRCLEQ_FIRST(head) ((head)->cqh_first) +#define CIRCLEQ_LAST(head) ((head)->cqh_last) +#define CIRCLEQ_END(head) ((void *)(head)) +#define CIRCLEQ_NEXT(elm, field) ((elm)->field.cqe_next) +#define CIRCLEQ_PREV(elm, field) ((elm)->field.cqe_prev) +#define CIRCLEQ_EMPTY(head) \ + (CIRCLEQ_FIRST(head) == CIRCLEQ_END(head)) + +#define CIRCLEQ_FOREACH(var, head, field) \ + for((var) = CIRCLEQ_FIRST(head); \ + (var) != CIRCLEQ_END(head); \ + (var) = CIRCLEQ_NEXT(var, field)) + +#define CIRCLEQ_FOREACH_SAFE(var, head, field, tvar) \ + for ((var) = CIRCLEQ_FIRST(head); \ + (var) != CIRCLEQ_END(head) && \ + ((tvar) = CIRCLEQ_NEXT(var, field), 1); \ + (var) = (tvar)) + +#define CIRCLEQ_FOREACH_REVERSE(var, head, field) \ + for((var) = CIRCLEQ_LAST(head); \ + (var) != CIRCLEQ_END(head); \ + (var) = CIRCLEQ_PREV(var, field)) + +#define CIRCLEQ_FOREACH_REVERSE_SAFE(var, head, headname, field, tvar) \ + for ((var) = CIRCLEQ_LAST(head, headname); \ + (var) != CIRCLEQ_END(head) && \ + ((tvar) = CIRCLEQ_PREV(var, headname, field), 1); \ + (var) = (tvar)) + +/* + * Circular queue functions. + */ +#define CIRCLEQ_INIT(head) do { \ + (head)->cqh_first = CIRCLEQ_END(head); \ + (head)->cqh_last = CIRCLEQ_END(head); \ +} while (0) + +#define CIRCLEQ_INSERT_AFTER(head, listelm, elm, field) do { \ + (elm)->field.cqe_next = (listelm)->field.cqe_next; \ + (elm)->field.cqe_prev = (listelm); \ + if ((listelm)->field.cqe_next == CIRCLEQ_END(head)) \ + (head)->cqh_last = (elm); \ + else \ + (listelm)->field.cqe_next->field.cqe_prev = (elm); \ + (listelm)->field.cqe_next = (elm); \ +} while (0) + +#define CIRCLEQ_INSERT_BEFORE(head, listelm, elm, field) do { \ + (elm)->field.cqe_next = (listelm); \ + (elm)->field.cqe_prev = (listelm)->field.cqe_prev; \ + if ((listelm)->field.cqe_prev == CIRCLEQ_END(head)) \ + (head)->cqh_first = (elm); \ + else \ + (listelm)->field.cqe_prev->field.cqe_next = (elm); \ + (listelm)->field.cqe_prev = (elm); \ +} while (0) + +#define CIRCLEQ_INSERT_HEAD(head, elm, field) do { \ + (elm)->field.cqe_next = (head)->cqh_first; \ + (elm)->field.cqe_prev = CIRCLEQ_END(head); \ + if ((head)->cqh_last == CIRCLEQ_END(head)) \ + (head)->cqh_last = (elm); \ + else \ + (head)->cqh_first->field.cqe_prev = (elm); \ + (head)->cqh_first = (elm); \ +} while (0) + +#define CIRCLEQ_INSERT_TAIL(head, elm, field) do { \ + (elm)->field.cqe_next = CIRCLEQ_END(head); \ + (elm)->field.cqe_prev = (head)->cqh_last; \ + if ((head)->cqh_first == CIRCLEQ_END(head)) \ + (head)->cqh_first = (elm); \ + else \ + (head)->cqh_last->field.cqe_next = (elm); \ + (head)->cqh_last = (elm); \ +} while (0) + +#define CIRCLEQ_REMOVE(head, elm, field) do { \ + if ((elm)->field.cqe_next == CIRCLEQ_END(head)) \ + (head)->cqh_last = (elm)->field.cqe_prev; \ + else \ + (elm)->field.cqe_next->field.cqe_prev = \ + (elm)->field.cqe_prev; \ + if ((elm)->field.cqe_prev == CIRCLEQ_END(head)) \ + (head)->cqh_first = (elm)->field.cqe_next; \ + else \ + (elm)->field.cqe_prev->field.cqe_next = \ + (elm)->field.cqe_next; \ + _Q_INVALIDATE((elm)->field.cqe_prev); \ + _Q_INVALIDATE((elm)->field.cqe_next); \ +} while (0) + +#define CIRCLEQ_REPLACE(head, elm, elm2, field) do { \ + if (((elm2)->field.cqe_next = (elm)->field.cqe_next) == \ + CIRCLEQ_END(head)) \ + (head)->cqh_last = (elm2); \ + else \ + (elm2)->field.cqe_next->field.cqe_prev = (elm2); \ + if (((elm2)->field.cqe_prev = (elm)->field.cqe_prev) == \ + CIRCLEQ_END(head)) \ + (head)->cqh_first = (elm2); \ + else \ + (elm2)->field.cqe_prev->field.cqe_next = (elm2); \ + _Q_INVALIDATE((elm)->field.cqe_prev); \ + _Q_INVALIDATE((elm)->field.cqe_next); \ +} while (0) + +#endif /* !_SYS_QUEUE_H_ */ diff --git a/util/sbase/readlink.1 b/util/sbase/readlink.1 new file mode 100644 index 00000000..ac19710d --- /dev/null +++ b/util/sbase/readlink.1 @@ -0,0 +1,32 @@ +.Dd November 16, 2015 +.Dt READLINK 1 +.Os sbase +.Sh NAME +.Nm readlink +.Nd print symbolic link target or canonical file name +.Sh SYNOPSIS +.Nm +.Op Fl f +.Op Fl n +.Ar path +.Sh DESCRIPTION +.Nm +writes the target of +.Ar path , +if it is a symbolic link, to stdout. +If not, +.Nm +exits with a non-zero return value. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl f +Canonicalize +.Ar path , +which needn't be a symlink, +by recursively following every symlink in its path components. +.It Fl n +Do not print the terminating newline. +.El +.Sh SEE ALSO +.Xr readlink 2 , +.Xr realpath 3 diff --git a/util/sbase/readlink.c b/util/sbase/readlink.c new file mode 100644 index 00000000..d059584f --- /dev/null +++ b/util/sbase/readlink.c @@ -0,0 +1,54 @@ +/* See LICENSE file for copyright and license details. */ +#include <limits.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [-fn] path\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + char buf[PATH_MAX]; + ssize_t n; + int nflag = 0, fflag = 0; + + ARGBEGIN { + case 'f': + fflag = ARGC(); + break; + case 'n': + nflag = 1; + break; + default: + usage(); + } ARGEND + + if (argc != 1) + usage(); + + if (strlen(argv[0]) >= PATH_MAX) + eprintf("path too long\n"); + + if (fflag) { + if (!realpath(argv[0], buf)) + eprintf("realpath %s:", argv[0]); + } else { + if ((n = readlink(argv[0], buf, PATH_MAX - 1)) < 0) + eprintf("readlink %s:", argv[0]); + buf[n] = '\0'; + } + + fputs(buf, stdout); + if (!nflag) + putchar('\n'); + + return fshut(stdout, "<stdout>"); +} diff --git a/util/sbase/renice.1 b/util/sbase/renice.1 new file mode 100644 index 00000000..c3ec7f8a --- /dev/null +++ b/util/sbase/renice.1 @@ -0,0 +1,38 @@ +.Dd October 8, 2015 +.Dt RENICE 1 +.Os sbase +.Sh NAME +.Nm renice +.Nd change niceness of processes +.Sh SYNOPSIS +.Nm +.Fl n Ar num +.Op Fl g | Fl p | Fl u +.Ar id ... +.Sh DESCRIPTION +.Nm +changes the niceness of each process with the given +.Ar id . +Only the superuser can lower the niceness. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl g | Fl p | Fl u +Interpret each +.Ar id +as a process group ID | process ID | user name or ID. +The middle option is default. +.It Fl n Ar num +Change niceness by +.Ar num , +with niceness ranging from +.Sy -20 +(highest priority) +to +.Sy +20 +(lowest priority). +.El +.Sh SEE ALSO +.Xr nice 2 , +.Xr renice 2 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/renice.c b/util/sbase/renice.c new file mode 100644 index 00000000..358c5604 --- /dev/null +++ b/util/sbase/renice.c @@ -0,0 +1,93 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/resource.h> + +#include <errno.h> +#include <pwd.h> +#include <stdlib.h> + +#include "util.h" + +#ifndef PRIO_MIN +#define PRIO_MIN -NZERO +#endif + +#ifndef PRIO_MAX +#define PRIO_MAX (NZERO-1) +#endif + +static int +renice(int which, int who, long adj) +{ + errno = 0; + adj += getpriority(which, who); + if (errno) { + weprintf("getpriority %d:", who); + return 0; + } + + adj = MAX(PRIO_MIN, MIN(adj, PRIO_MAX)); + if (setpriority(which, who, (int)adj) < 0) { + weprintf("setpriority %d:", who); + return 0; + } + + return 1; +} + +static void +usage(void) +{ + eprintf("usage: %s -n num [-g | -p | -u] id ...\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + const char *adj = NULL; + long val; + int which = PRIO_PROCESS, ret = 0; + struct passwd *pw; + int who; + + ARGBEGIN { + case 'n': + adj = EARGF(usage()); + break; + case 'g': + which = PRIO_PGRP; + break; + case 'p': + which = PRIO_PROCESS; + break; + case 'u': + which = PRIO_USER; + break; + default: + usage(); + } ARGEND + + if (!argc || !adj) + usage(); + + val = estrtonum(adj, PRIO_MIN, PRIO_MAX); + for (; *argv; argc--, argv++) { + if (which == PRIO_USER) { + errno = 0; + if (!(pw = getpwnam(*argv))) { + if (errno) + weprintf("getpwnam %s:", *argv); + else + weprintf("getpwnam %s: no user found\n", *argv); + ret = 1; + continue; + } + who = pw->pw_uid; + } else { + who = estrtonum(*argv, 1, INT_MAX); + } + if (!renice(which, who, val)) + ret = 1; + } + + return ret; +} diff --git a/util/sbase/rev.1 b/util/sbase/rev.1 new file mode 100644 index 00000000..e56b920b --- /dev/null +++ b/util/sbase/rev.1 @@ -0,0 +1,22 @@ +.Dd March 26, 2016 +.Dt REV 1 +.Os sbase +.Sh NAME +.Nm rev +.Nd reverse each line +.Sh SYNOPSIS +.Nm +.Op Ar file ... +.Sh DESCRIPTION +.Nm +reads each +.Ar file +in sequence and writes it to stdout, but with all characters in each +line in reverse order. +If no +.Ar file +is given +.Nm +reads from stdin. +.Sh SEE ALSO +.Xr tac 1 diff --git a/util/sbase/rev.c b/util/sbase/rev.c new file mode 100644 index 00000000..9ac1da65 --- /dev/null +++ b/util/sbase/rev.c @@ -0,0 +1,74 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> +#include <string.h> +#include <unistd.h> + +#include "text.h" +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [file ...]\n", argv0); +} + +static void +rev(FILE *fp) +{ + static char *line = NULL; + static size_t size = 0; + size_t i; + ssize_t n; + int lf; + + while ((n = getline(&line, &size, fp)) > 0) { + lf = n && line[n - 1] == '\n'; + i = n -= lf; + for (n = 0; i--;) { + if (UTF8_POINT(line[i])) { + n++; + } else { + fwrite(line + i, 1, n + 1, stdout); + n = 0; + } + } + if (n) + fwrite(line, 1, n, stdout); + if (lf) + fputc('\n', stdout); + } +} + +int +main(int argc, char *argv[]) +{ + FILE *fp; + int ret = 0; + + ARGBEGIN { + default: + usage(); + } ARGEND + + if (!argc) { + rev(stdin); + } else { + for (; *argv; argc--, argv++) { + if (!strcmp(*argv, "-")) { + *argv = "<stdin>"; + fp = stdin; + } else if (!(fp = fopen(*argv, "r"))) { + weprintf("fopen %s:", *argv); + ret = 1; + continue; + } + rev(fp); + if (fp != stdin && fshut(fp, *argv)) + ret = 1; + } + } + + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/rm.1 b/util/sbase/rm.1 new file mode 100644 index 00000000..604407da --- /dev/null +++ b/util/sbase/rm.1 @@ -0,0 +1,37 @@ +.Dd April 24, 2025 +.Dt RM 1 +.Os sbase +.Sh NAME +.Nm rm +.Nd remove directory entries +.Sh SYNOPSIS +.Nm +.Op Fl f +.Op Fl Rr +.Ar file ... +.Sh DESCRIPTION +.Nm +removes each +.Ar file . +If +.Ar file +is a directory, it has to be empty unless +.Fl R +or +.Fl r +is specified. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl f +Do not prompt before removing +.Ar file . +Do not report when +.Ar file +doesn't exist or couldn't be removed. +.It Fl Rr +Remove directories recursively. +.El +.Sh SEE ALSO +.Xr remove 3 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/rm.c b/util/sbase/rm.c new file mode 100644 index 00000000..3adfc8cd --- /dev/null +++ b/util/sbase/rm.c @@ -0,0 +1,87 @@ +/* See LICENSE file for copyright and license details. */ +#include <fcntl.h> +#include <string.h> + +#include "fs.h" +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [-f] [-iRr] file ...\n", argv0); +} + +static int +forbidden(char *path, struct stat *root) +{ + char *s, *t; + size_t n; + struct stat st; + static int w1, w2; + + n = strlen(path); + for (t = path + n; t > path && t[-1] == '/'; --t) + ; + for (s = t; s > path && s[-1] != '/'; --s) + ; + n = t - s; + if (n == 1 && *s == '.' || n == 2 && s[0] == '.' && s[1] == '.') { + if (!w1) + weprintf("\".\" and \"..\" may not be removed\n"); + w1 = 1; + return 1; + } + + if (stat(path, &st) < 0) + return 0; + if (st.st_dev == root->st_dev && st.st_ino == root->st_ino) { + if (!w2) + weprintf("\"/\" may not be removed\n"); + w2 = 1; + return 1; + } + + return 0; +} + +int +main(int argc, char *argv[]) +{ + char *s; + struct stat st; + struct recursor r = { .fn = rm, .maxdepth = 1, .follow = 'P' }; + + ARGBEGIN { + case 'f': + r.flags |= SILENT | IGNORE; + break; + case 'i': + r.flags |= CONFIRM; + break; + case 'R': + case 'r': + r.maxdepth = 0; + break; + default: + usage(); + } ARGEND + + if (!argc) { + if (!(r.flags & IGNORE)) + usage(); + else + return 0; + } + + if (stat("/", &st) < 0) + eprintf("stat root:"); + for (; *argv; argc--, argv++) { + if (forbidden(*argv, &st)) { + rm_status = 1; + continue; + } + recurse(AT_FDCWD, *argv, NULL, &r); + } + + return rm_status || recurse_status; +} diff --git a/util/sbase/rmdir.1 b/util/sbase/rmdir.1 new file mode 100644 index 00000000..b1631cf9 --- /dev/null +++ b/util/sbase/rmdir.1 @@ -0,0 +1,29 @@ +.Dd October 8, 2015 +.Dt RMDIR 1 +.Os sbase +.Sh NAME +.Nm rmdir +.Nd remove empty directories +.Sh SYNOPSIS +.Nm +.Op Fl p +.Ar dir ... +.Sh DESCRIPTION +.Nm +removes each empty +.Ar dir . +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl p +Remove +.Ar dir +and its parents in the pathname +.Ar dir . +.El +.Sh SEE ALSO +.Xr rm 1 , +.Xr unlink 1 , +.Xr rmdir 2 , +.Xr unlink 2 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/rmdir.c b/util/sbase/rmdir.c new file mode 100644 index 00000000..44224547 --- /dev/null +++ b/util/sbase/rmdir.c @@ -0,0 +1,49 @@ +/* See LICENSE file for copyright and license details. */ +#include <libgen.h> +#include <string.h> +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [-p] dir ...\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int pflag = 0, ret = 0; + char *d; + + ARGBEGIN { + case 'p': + pflag = 1; + break; + default: + usage(); + } ARGEND + + if (!argc) + usage(); + + for (; *argv; argc--, argv++) { + if (rmdir(*argv) < 0) { + weprintf("rmdir %s:", *argv); + ret = 1; + } else if (pflag) { + d = dirname(*argv); + for (; strcmp(d, "/") && strcmp(d, ".") ;) { + if (rmdir(d) < 0) { + weprintf("rmdir %s:", d); + ret = 1; + break; + } + d = dirname(d); + } + } + } + + return ret; +} diff --git a/util/sbase/scripts/getconf.sh b/util/sbase/scripts/getconf.sh new file mode 100755 index 00000000..70902a30 --- /dev/null +++ b/util/sbase/scripts/getconf.sh @@ -0,0 +1,218 @@ +#!/bin/sh + +ifdef() { + printf 'static const struct var %s[] = {\n' "$1" + awk '{printf("#ifdef %s\n\t{\"%s\",\t%s},\n#endif\n", $2, $1, $2)}' + echo '};' +} + +ifdef confstr_l << EOF +PATH _CS_PATH +POSIX_V7_ILP32_OFF32_CFLAGS _CS_POSIX_V7_ILP32_OFF32_CFLAGS +POSIX_V7_ILP32_OFF32_LDFLAGS _CS_POSIX_V7_ILP32_OFF32_LDFLAGS +POSIX_V7_ILP32_OFF32_LIBS _CS_POSIX_V7_ILP32_OFF32_LIBS +POSIX_V7_ILP32_OFFBIG_CFLAGS _CS_POSIX_V7_ILP32_OFFBIG_CFLAGS +POSIX_V7_ILP32_OFFBIG_LDFLAGS _CS_POSIX_V7_ILP32_OFFBIG_LDFLAGS +POSIX_V7_ILP32_OFFBIG_LIBS _CS_POSIX_V7_ILP32_OFFBIG_LIBS +POSIX_V7_LP64_OFF64_CFLAGS _CS_POSIX_V7_LP64_OFF64_CFLAGS +POSIX_V7_LP64_OFF64_LDFLAGS _CS_POSIX_V7_LP64_OFF64_LDFLAGS +POSIX_V7_LP64_OFF64_LIBS _CS_POSIX_V7_LP64_OFF64_LIBS +POSIX_V7_LPBIG_OFFBIG_CFLAGS _CS_POSIX_V7_LPBIG_OFFBIG_CFLAGS +POSIX_V7_LPBIG_OFFBIG_LDFLAGS _CS_POSIX_V7_LPBIG_OFFBIG_LDFLAGS +POSIX_V7_LPBIG_OFFBIG_LIBS _CS_POSIX_V7_LPBIG_OFFBIG_LIBS +POSIX_V7_THREADS_CFLAGS _CS_POSIX_V7_THREADS_CFLAGS +POSIX_V7_THREADS_LDFLAGS _CS_POSIX_V7_THREADS_LDFLAGS +POSIX_V7_WIDTH_RESTRICTED_ENVS _CS_POSIX_V7_WIDTH_RESTRICTED_ENVS +V7_ENV _CS_V7_ENV +EOF + +ifdef limits_l << EOF +_POSIX_CLOCKRES_MIN _POSIX_CLOCKRES_MIN +_POSIX_AIO_LISTIO_MAX _POSIX_AIO_LISTIO_MAX +_POSIX_AIO_MAX _POSIX_AIO_MAX +_POSIX_ARG_MAX _POSIX_ARG_MAX +_POSIX_CHILD_MAX _POSIX_CHILD_MAX +_POSIX_DELAYTIMER_MAX _POSIX_DELAYTIMER_MAX +_POSIX_HOST_NAME_MAX _POSIX_HOST_NAME_MAX +_POSIX_LINK_MAX _POSIX_LINK_MAX +_POSIX_LOGIN_NAME_MAX _POSIX_LOGIN_NAME_MAX +_POSIX_MAX_CANON _POSIX_MAX_CANON +_POSIX_MAX_INPUT _POSIX_MAX_INPUT +_POSIX_MQ_OPEN_MAX _POSIX_MQ_OPEN_MAX +_POSIX_MQ_PRIO_MAX _POSIX_MQ_PRIO_MAX +_POSIX_NAME_MAX _POSIX_NAME_MAX +_POSIX_NGROUPS_MAX _POSIX_NGROUPS_MAX +_POSIX_OPEN_MAX _POSIX_OPEN_MAX +_POSIX_PATH_MAX _POSIX_PATH_MAX +_POSIX_PIPE_BUF _POSIX_PIPE_BUF +_POSIX_RE_DUP_MAX _POSIX_RE_DUP_MAX +_POSIX_RTSIG_MAX _POSIX_RTSIG_MAX +_POSIX_SEM_NSEMS_MAX _POSIX_SEM_NSEMS_MAX +_POSIX_SEM_VALUE_MAX _POSIX_SEM_VALUE_MAX +_POSIX_SIGQUEUE_MAX _POSIX_SIGQUEUE_MAX +_POSIX_SSIZE_MAX _POSIX_SSIZE_MAX +_POSIX_SS_REPL_MAX _POSIX_SS_REPL_MAX +_POSIX_STREAM_MAX _POSIX_STREAM_MAX +_POSIX_SYMLINK_MAX _POSIX_SYMLINK_MAX +_POSIX_SYMLOOP_MAX _POSIX_SYMLOOP_MAX +_POSIX_THREAD_DESTRUCTOR_ITERATIONS _POSIX_THREAD_DESTRUCTOR_ITERATIONS +_POSIX_THREAD_KEYS_MAX _POSIX_THREAD_KEYS_MAX +_POSIX_THREAD_THREADS_MAX _POSIX_THREAD_THREADS_MAX +_POSIX_TIMER_MAX _POSIX_TIMER_MAX +_POSIX_TTY_NAME_MAX _POSIX_TTY_NAME_MAX +_POSIX_TZNAME_MAX _POSIX_TZNAME_MAX +_POSIX2_BC_BASE_MAX _POSIX2_BC_BASE_MAX +_POSIX2_BC_DIM_MAX _POSIX2_BC_DIM_MAX +_POSIX2_BC_SCALE_MAX _POSIX2_BC_SCALE_MAX +_POSIX2_BC_STRING_MAX _POSIX2_BC_STRING_MAX +_POSIX2_CHARCLASS_NAME_MAX _POSIX2_CHARCLASS_NAME_MAX +_POSIX2_COLL_WEIGHTS_MAX _POSIX2_COLL_WEIGHTS_MAX +_POSIX2_EXPR_NEST_MAX _POSIX2_EXPR_NEST_MAX +_POSIX2_LINE_MAX _POSIX2_LINE_MAX +_POSIX2_RE_DUP_MAX _POSIX2_RE_DUP_MAX +EOF + +ifdef sysconf_l << EOF +AIO_LISTIO_MAX _SC_AIO_LISTIO_MAX +AIO_MAX _SC_AIO_MAX +AIO_PRIO_DELTA_MAX _SC_AIO_PRIO_DELTA_MAX +ARG_MAX _SC_ARG_MAX +ATEXIT_MAX _SC_ATEXIT_MAX +BC_BASE_MAX _SC_BC_BASE_MAX +BC_DIM_MAX _SC_BC_DIM_MAX +BC_SCALE_MAX _SC_BC_SCALE_MAX +BC_STRING_MAX _SC_BC_STRING_MAX +CHILD_MAX _SC_CHILD_MAX +COLL_WEIGHTS_MAX _SC_COLL_WEIGHTS_MAX +DELAYTIMER_MAX _SC_DELAYTIMER_MAX +EXPR_NEST_MAX _SC_EXPR_NEST_MAX +HOST_NAME_MAX _SC_HOST_NAME_MAX +IOV_MAX _SC_IOV_MAX +LINE_MAX _SC_LINE_MAX +LOGIN_NAME_MAX _SC_LOGIN_NAME_MAX +NGROUPS_MAX _SC_NGROUPS_MAX +MQ_OPEN_MAX _SC_MQ_OPEN_MAX +MQ_PRIO_MAX _SC_MQ_PRIO_MAX +OPEN_MAX _SC_OPEN_MAX +_POSIX_ADVISORY_INFO _SC_ADVISORY_INFO +_POSIX_BARRIERS _SC_BARRIERS +_POSIX_ASYNCHRONOUS_IO _SC_ASYNCHRONOUS_IO +_POSIX_CLOCK_SELECTION _SC_CLOCK_SELECTION +_POSIX_CPUTIME _SC_CPUTIME +_POSIX_FSYNC _SC_FSYNC +_POSIX_IPV6 _SC_IPV6 +_POSIX_JOB_CONTROL _SC_JOB_CONTROL +_POSIX_MAPPED_FILES _SC_MAPPED_FILES +_POSIX_MEMLOCK _SC_MEMLOCK +_POSIX_MEMLOCK_RANGE _SC_MEMLOCK_RANGE +_POSIX_MEMORY_PROTECTION _SC_MEMORY_PROTECTION +_POSIX_MESSAGE_PASSING _SC_MESSAGE_PASSING +_POSIX_MONOTONIC_CLOCK _SC_MONOTONIC_CLOCK +_POSIX_PRIORITIZED_IO _SC_PRIORITIZED_IO +_POSIX_PRIORITY_SCHEDULING _SC_PRIORITY_SCHEDULING +_POSIX_RAW_SOCKETS _SC_RAW_SOCKETS +_POSIX_READER_WRITER_LOCKS _SC_READER_WRITER_LOCKS +_POSIX_REALTIME_SIGNALS _SC_REALTIME_SIGNALS +_POSIX_REGEXP _SC_REGEXP +_POSIX_SAVED_IDS _SC_SAVED_IDS +_POSIX_SEMAPHORES _SC_SEMAPHORES +_POSIX_SHARED_MEMORY_OBJECTS _SC_SHARED_MEMORY_OBJECTS +_POSIX_SHELL _SC_SHELL +_POSIX_SPAWN _SC_SPAWN +_POSIX_SPIN_LOCKS _SC_SPIN_LOCKS +_POSIX_SPORADIC_SERVER _SC_SPORADIC_SERVER +_POSIX_SS_REPL_MAX _SC_SS_REPL_MAX +_POSIX_SYNCHRONIZED_IO _SC_SYNCHRONIZED_IO +_POSIX_THREAD_ATTR_STACKADDR _SC_THREAD_ATTR_STACKADDR +_POSIX_THREAD_ATTR_STACKSIZE _SC_THREAD_ATTR_STACKSIZE +_POSIX_THREAD_CPUTIME _SC_THREAD_CPUTIME +_POSIX_THREAD_PRIO_INHERIT _SC_THREAD_PRIO_INHERIT +_POSIX_THREAD_PRIO_PROTECT _SC_THREAD_PRIO_PROTECT +_POSIX_THREAD_PRIORITY_SCHEDULING _SC_THREAD_PRIORITY_SCHEDULING +_POSIX_THREAD_PROCESS_SHARED _SC_THREAD_PROCESS_SHARED +_POSIX_THREAD_ROBUST_PRIO_INHERIT _SC_THREAD_ROBUST_PRIO_INHERIT +_POSIX_THREAD_ROBUST_PRIO_PROTECT _SC_THREAD_ROBUST_PRIO_PROTECT +_POSIX_THREAD_SAFE_FUNCTIONS _SC_THREAD_SAFE_FUNCTIONS +_POSIX_THREAD_SPORADIC_SERVER _SC_THREAD_SPORADIC_SERVER +_POSIX_THREADS _SC_THREADS +_POSIX_TIMEOUTS _SC_TIMEOUTS +_POSIX_TIMERS _SC_TIMERS +_POSIX_TRACE _SC_TRACE +_POSIX_TRACE_EVENT_FILTER _SC_TRACE_EVENT_FILTER +_POSIX_TRACE_EVENT_NAME_MAX _SC_TRACE_EVENT_NAME_MAX +_POSIX_TRACE_INHERIT _SC_TRACE_INHERIT +_POSIX_TRACE_LOG _SC_TRACE_LOG +_POSIX_TRACE_NAME_MAX _SC_TRACE_NAME_MAX +_POSIX_TRACE_SYS_MAX _SC_TRACE_SYS_MAX +_POSIX_TRACE_USER_EVENT_MAX _SC_TRACE_USER_EVENT_MAX +_POSIX_TYPED_MEMORY_OBJECTS _SC_TYPED_MEMORY_OBJECTS +_POSIX_VERSION _SC_VERSION +_POSIX_V7_ILP32_OFF32 _SC_V7_ILP32_OFF32 +_POSIX_V7_ILP32_OFFBIG _SC_V7_ILP32_OFFBIG +_POSIX_V7_LP64_OFF64 _SC_V7_LP64_OFF64 +_POSIX_V7_LPBIG_OFFBIG _SC_V7_LPBIG_OFFBIG +_POSIX2_C_BIND _SC_2_C_BIND +_POSIX2_C_DEV _SC_2_C_DEV +_POSIX2_CHAR_TERM _SC_2_CHAR_TERM +_POSIX2_FORT_DEV _SC_2_FORT_DEV +_POSIX2_FORT_RUN _SC_2_FORT_RUN +_POSIX2_LOCALEDEF _SC_2_LOCALEDEF +_POSIX2_PBS _SC_2_PBS +_POSIX2_PBS_ACCOUNTING _SC_2_PBS_ACCOUNTING +_POSIX2_PBS_CHECKPOINT _SC_2_PBS_CHECKPOINT +_POSIX2_PBS_LOCATE _SC_2_PBS_LOCATE +_POSIX2_PBS_MESSAGE _SC_2_PBS_MESSAGE +_POSIX2_PBS_TRACK _SC_2_PBS_TRACK +_POSIX2_SW_DEV _SC_2_SW_DEV +_POSIX2_UPE _SC_2_UPE +_POSIX2_VERSION _SC_2_VERSION +PAGE_SIZE _SC_PAGE_SIZE +PAGESIZE _SC_PAGESIZE +PTHREAD_DESTRUCTOR_ITERATIONS _SC_THREAD_DESTRUCTOR_ITERATIONS +PTHREAD_KEYS_MAX _SC_THREAD_KEYS_MAX +PTHREAD_STACK_MIN _SC_THREAD_STACK_MIN +PTHREAD_THREADS_MAX _SC_THREAD_THREADS_MAX +RE_DUP_MAX _SC_RE_DUP_MAX +RTSIG_MAX _SC_RTSIG_MAX +SEM_NSEMS_MAX _SC_SEM_NSEMS_MAX +SEM_VALUE_MAX _SC_SEM_VALUE_MAX +SIGQUEUE_MAX _SC_SIGQUEUE_MAX +STREAM_MAX _SC_STREAM_MAX +SYMLOOP_MAX _SC_SYMLOOP_MAX +TIMER_MAX _SC_TIMER_MAX +TTY_NAME_MAX _SC_TTY_NAME_MAX +TZNAME_MAX _SC_TZNAME_MAX +_XOPEN_CRYPT _SC_XOPEN_CRYPT +_XOPEN_ENH_I18N _SC_XOPEN_ENH_I18N +_XOPEN_REALTIME _SC_XOPEN_REALTIME +_XOPEN_REALTIME_THREADS _SC_XOPEN_REALTIME_THREADS +_XOPEN_SHM _SC_XOPEN_SHM +_XOPEN_STREAMS _SC_XOPEN_STREAMS +_XOPEN_UNIX _SC_XOPEN_UNIX +_XOPEN_UUCP _SC_XOPEN_UUCP +_XOPEN_VERSION _SC_XOPEN_VERSION +EOF + +ifdef pathconf_l << EOF +FILESIZEBITS _PC_FILESIZEBITS +LINK_MAX _PC_LINK_MAX +MAX_CANON _PC_MAX_CANON +MAX_INPUT _PC_MAX_INPUT +NAME_MAX _PC_NAME_MAX +PATH_MAX _PC_PATH_MAX +PIPE_BUF _PC_PIPE_BUF +POSIX2_SYMLINKS _PC_2_SYMLINKS +POSIX_ALLOC_SIZE_MIN _PC_ALLOC_SIZE_MIN +POSIX_REC_INCR_XFER_SIZE _PC_REC_INCR_XFER_SIZE +POSIX_REC_MAX_XFER_SIZE _PC_REC_MAX_XFER_SIZE +POSIX_REC_MIN_XFER_SIZE _PC_REC_MIN_XFER_SIZE +POSIX_REC_XFER_ALIGN _PC_REC_XFER_ALIGN +SYMLINK_MAX _PC_SYMLINK_MAX +_POSIX_CHOWN_RESTRICTED _PC_CHOWN_RESTRICTED +_POSIX_NO_TRUNC _PC_NO_TRUNC +_POSIX_VDISABLE _PC_VDISABLE +_POSIX_ASYNC_IO _PC_ASYNC_IO +_POSIX_PRIO_IO _PC_PRIO_IO +_POSIX_SYNC_IO _PC_SYNC_IO +_POSIX_TIMESTAMP_RESOLUTION _PC_TIMESTAMP_RESOLUTION +EOF diff --git a/util/sbase/scripts/install b/util/sbase/scripts/install new file mode 100755 index 00000000..ce78c1da --- /dev/null +++ b/util/sbase/scripts/install @@ -0,0 +1,21 @@ +#!/bin/sh + +set -e + +while read type src dst perm +do + case $type in + d) + mkdir -p $src + ;; + c) + cp -f $src $dst + ;; + *) + echo install: wrong entry type >&2 + exit 1 + ;; + esac + + chmod $perm $dst +done < $1 diff --git a/util/sbase/scripts/mkbox b/util/sbase/scripts/mkbox new file mode 100755 index 00000000..99e40441 --- /dev/null +++ b/util/sbase/scripts/mkbox @@ -0,0 +1,103 @@ +#!/bin/sh + +trap "rm -rf build" INT QUIT TERM + +rm -rf build +mkdir -p build + +cp *.h build + +cat > build/sbase-box.c <<EOF +#include <unistd.h> + +#include <libgen.h> +#include <errno.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "util.h" +#include "sbase-box.h" + +struct cmd { + char *name; + int (*fn)(int, char **); +} cmds[] = { + {"install", xinstall_main}, + {"[", test_main}, +$(grep -l ^main *.c | +while read f +do + sed -n ' + /^main/ { + s/main/'${f%.c}'_main/ + s/-/_/g + w build/'$f' + s/\(^.*\)(.*)/ {"'${f%.c}'", \1},/p + d + } + w 'build/$f $f +done) + {NULL}, +}; + +static void +install(char *path) +{ + int r; + struct cmd *bp; + char fname[FILENAME_MAX]; + + if (path == NULL) { + fputs("sbase-box [-i path] [command]\n", stderr); + exit(1); + } + + for (bp = cmds; bp->name; ++bp) { + r = snprintf(fname, sizeof(fname), "%s/%s", path, bp->name); + if (r < 0 || r >= sizeof(fname)) { + fprintf(stderr, + "sbase-box: destination path truncated for '%s'\n", + bp->name); + exit(1); + } + remove(fname); + if (symlink("sbase-box", fname) < 0) { + fprintf(stderr, + "sbase-box: %s: %s\n", + bp->name, strerror(errno)); + exit(1); + } + } +} + +int +main(int argc, char *argv[]) +{ + char *s = basename(argv[0]); + struct cmd *bp; + + if (!strcmp(s, "sbase-box") && argc > 1) { + argc--; argv++; + if (strcmp(argv[0], "-i") == 0) { + install(argv[1]); + exit(0); + } + s = basename(argv[0]); + } + + for (bp = cmds; bp->name; ++bp) { + if (strcmp(bp->name, s) == 0) + return (*bp->fn)(argc, argv); + } + + for (bp = cmds; bp->name; ++bp) + printf("%s ", bp->name); + putchar('\n'); + + return 0; +} +EOF + +sed -n 's/.* \(.*_main\).*/int \1(int, char **);/p'\ + build/sbase-box.c > build/sbase-box.h diff --git a/util/sbase/scripts/mkproto b/util/sbase/scripts/mkproto new file mode 100755 index 00000000..192fe56b --- /dev/null +++ b/util/sbase/scripts/mkproto @@ -0,0 +1,24 @@ +#!/bin/sh + +usage() +{ + echo mkproto: prefix manprefix proto>&2 + exit 1 +} + +prefix=${1?$(usage)} +manprefix=${2?$(usage)} +proto=${3?$(usage)} + +trap "rm -f scripts/proto" EXIT INT QUIT TERM + +(set -e +echo d $prefix/bin $prefix/bin 755 +find . ! -name . -prune -type f \( -perm -u+x -o -perm -g+x -o -perm o+x \) | +sed "s@.*@c & $prefix/bin/& 755@" + +echo d $manprefix/man1 $manprefix/man1 755 +find . ! -name . -prune -name '*.1' | +sed "s@.*@c & $manprefix/man1/& 644@") > $proto + +trap "" EXIT INT QUIT TERM diff --git a/util/sbase/scripts/uninstall b/util/sbase/scripts/uninstall new file mode 100755 index 00000000..e9c74f2d --- /dev/null +++ b/util/sbase/scripts/uninstall @@ -0,0 +1,32 @@ +#!/bin/sh + +set -e + +while read type src dst perm +do + case $type in + d) + echo $type $src $dst $perm + continue + ;; + c) + rm -f $dst + ;; + *) + echo uninstall: wrong entry type >&2 + exit 1 + ;; + esac +done < $1 | +sort -r | +while read type src dst perm +do + case $type in + d) + if test `ls $dst | wc -l` -eq 0 + then + rmdir $dst + fi + ;; + esac +done diff --git a/util/sbase/sed.1 b/util/sbase/sed.1 new file mode 100644 index 00000000..18981aa7 --- /dev/null +++ b/util/sbase/sed.1 @@ -0,0 +1,173 @@ +.Dd October 8, 2015 +.Dt SED 1 +.Os sbase +.Sh NAME +.Nm sed +.Nd stream editor +.Sh SYNOPSIS +.Nm +.Op Fl nrE +.Ar script +.Op Ar file ... +.Nm +.Op Fl nrE +.Fl e Ar script +.Op Fl e Ar script +.Ar ... +.Op Fl f Ar scriptfile +.Ar ... +.Op Ar file ... +.Nm +.Op Fl nrE +.Op Fl e Ar script +.Ar ... +.Fl f Ar scriptfile +.Op Fl f Ar scriptfile +.Ar ... +.Op Ar file ... +.Sh DESCRIPTION +.Nm +reads line oriented output from +.Ar file +or stdin, applies the editing commands supplied by +.Ar script +or +.Ar scriptfile +and writes the edited stream to stdout. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl n +Suppress default printing at the end of each cycle. +.It Fl r E +Use extended regular expressions +.It Fl e Ar script +Append +.Ar script +to the list of editing commands. +.It Fl f Ar scriptfile +Append the commands from +.Ar scriptfile +to the list of editing commands. +.El +.Sh EXTENDED DESCRIPTION +Editing commands take the form: +.Pp +[address[,address]]function +.Pp +Commands can be separated by ';' or by a new line. +.Pp +Multiple functions for the specified address (or address-range) can be enclosed +in blocks with '{' and '}': +.Pp +[address[,address]] { function ; function } +.Ss Addresses +Addresses are either blank, a positive decimal integer denoting a line +number, the character '$' denoting the last line of input, or a regular +expression (in the format +.No / Ns +.Ar regexp Ns /). +A command with no addresses matches every line, one address matches +individual lines, and two addresses matches a range of lines from the +first to the second address inclusive. +.Pp +The character '!' may be appended after the addresses, +in which case the function is executed only if the addresses +.Em don't +match. +.Ss Functions +.Bl -tag -width Ds +.It Ar a Op Ar text +Append text to output after end of current cycle. +.It Ar b Op Ar label +Branch to label. +If no label is provided branch to end of script. +.It Ar c Op Ar text +Change. +Delete addressed range and output text after end of current cycle. +.It Ar d +Delete pattern space and begin next cycle. +.It Ar D +Delete pattern space up to and including first newline and begin new +cycle without reading input. +If there is no newline, behave like d. +.It Ar g +Get. +Replace the pattern space with the hold space. +.It Ar G +Get. +Append a newline and the hold space to the pattern space. +.It Ar h +Hold. +Replace the hold space with the pattern space. +.It Ar H +Hold. +Append a newline and the pattern space to the hold space. +.It Ar i Op Ar text +Insert text in output. +.It Ar l +List? Write the pattern space replacing known non printing characters with +backslash escaped versions (\\\\, \\a, \\b, \\f, \\r, \\t, \\v). +Print bad UTF-8 sequences as \\ooo where ooo is a three digit octal +number. +Mark end of lines with '$'. +.It Ar n +Next. +Write pattern space (unless +.Fl n ) , +read next line into pattern space, and continue current cycle. +If there is no next line, quit. +.It Ar N +Next. +Read next line, append newline and next line to pattern space, and +continue cycle. +If there is no next line, quit without printing current pattern space. +.It Ar p +Print current pattern space. +.It Ar P +Print current pattern space up to first newline. +.It Ar q +Quit. +.It Ar r file +Read file and write contents to output. +.It Ar s/re/text/flags +Find occurences of regular expression re in the pattern space and +replace with text. +A '&' in text is replaced with the entire match. +A \\d where d is a decimal digit 1-9 is replaced with the corresponding +match group from the regular expression. +\\n represents a newline in both the regular expression and replacement +text. +A literal newline in the replacement text must be preceded by a \\. +.Pp +Flags are +.Bl -tag -width Ds +.It Ar n +A positive decimal number denoting which match in the pattern space +to replace. +.It Ar g +Global. +Replace all matches in the pattern space. +.It Ar p +Print the pattern if a replacement was made. +.It Ar w file +Write the pattern space to file if a replacement was made. +.El +.It Ar t Op Ar label +Test. +Branch to corresponding label if a substitution has been made since the +last line was read or last t command was executed. +If no label is provided branch to end of script. +.It Ar w file +Write pattern space to file. +.It Ar x +Exchange hold space and pattern space. +.It Ar y/set1/set2/ +Replace each occurrence of a character from set 1 with the corresponding +character from set 2. +.It Ar :label +Create a label for b and t commands. +.It Ar #comment +The comment extends until the next newline. +.It Ar = +Write current input line number to output. +.El diff --git a/util/sbase/sed.c b/util/sbase/sed.c new file mode 100644 index 00000000..08471943 --- /dev/null +++ b/util/sbase/sed.c @@ -0,0 +1,1738 @@ +/* FIXME: summary + * decide whether we enforce valid UTF-8, right now it's enforced in certain + * parts of the script, but not the input... + * nul bytes cause explosions due to use of libc string functions. thoughts? + * lack of newline at end of file, currently we add one. what should we do? + * allow "\\t" for "\t" etc. in regex? in replacement text? + * POSIX says don't flush on N when out of input, but GNU and busybox do. + */ + +#include <ctype.h> +#include <errno.h> +#include <regex.h> +#include <stdlib.h> +#include <string.h> + +#include "utf.h" +#include "util.h" + +/* Types */ + +/* used as queue for writes and stack for {,:,b,t */ +typedef struct { + void **data; + size_t size; + size_t cap; +} Vec; + +/* used for arbitrary growth, str is a C string + * FIXME: does it make sense to keep track of length? or just rely on libc + * string functions? If we want to support nul bytes everything changes + */ +typedef struct { + char *str; + size_t cap; +} String; + +typedef struct Cmd Cmd; +typedef struct { + void (*fn)(Cmd *); + char *(*getarg)(Cmd *, char *); + void (*freearg)(Cmd *); + unsigned char naddr; +} Fninfo; + +typedef struct { + union { + size_t lineno; + regex_t *re; + } u; + enum { + IGNORE, /* empty address, ignore */ + EVERY , /* every line */ + LINE , /* line number */ + LAST , /* last line ($) */ + REGEX , /* use included regex */ + LASTRE, /* use most recently used regex */ + } type; +} Addr; + +/* DISCUSS: naddr is not strictly necessary, but very helpful + * naddr == 0 iff beg.type == EVERY && end.type == IGNORE + * naddr == 1 iff beg.type != IGNORE && end.type == IGNORE + * naddr == 2 iff beg.type != IGNORE && end.type != IGNORE + */ +typedef struct { + Addr beg; + Addr end; + unsigned char naddr; +} Range; + +typedef struct { + regex_t *re; /* if NULL use last regex */ + String repl; + FILE *file; + size_t occurrence; /* 0 for all (g flag) */ + Rune delim; + unsigned int p:1; +} Sarg; + +typedef struct { + Rune *set1; + Rune *set2; +} Yarg; + +typedef struct { + String str; /* a,c,i text. r file path */ + void (*print)(char *, FILE *); /* check_puts for a, write_file for r, unused for c,i */ +} ACIRarg; + +struct Cmd { + Range range; + Fninfo *fninfo; + union { + Cmd *jump; /* used for b,t when running */ + char *label; /* used for :,b,t when building */ + ptrdiff_t offset; /* used for { (pointers break during realloc) */ + FILE *file; /* used for w */ + + /* FIXME: Should the following be in the union? or pointers and malloc? */ + Sarg s; + Yarg y; + ACIRarg acir; + } u; /* I find your lack of anonymous unions disturbing */ + unsigned int in_match:1; + unsigned int negate :1; +}; + +/* Files for w command (and s' w flag) */ +typedef struct { + char *path; + FILE *file; +} Wfile; + +/* + * Function Declarations + */ + +/* Dynamically allocated arrays and strings */ +static void resize(void **ptr, size_t *nmemb, size_t size, size_t new_nmemb, void **next); +static void *pop(Vec *v); +static void push(Vec *v, void *p); +static void stracat(String *dst, char *src); +static void strnacat(String *dst, char *src, size_t n); +static void stracpy(String *dst, char *src); + +/* Cleanup and errors */ +static void usage(void); + +/* Parsing functions and related utilities */ +static void compile(char *s, int isfile); +static int read_line(FILE *f, String *s); +static char *make_range(Range *range, char *s); +static char *make_addr(Addr *addr, char *s); +static char *find_delim(char *s, Rune delim, int do_brackets); +static char *chompr(char *s, Rune rune); +static char *chomp(char *s); +static Rune *strtorunes(char *s, size_t nrunes); +static long stol(char *s, char **endp); +static size_t escapes(char *beg, char *end, Rune delim, int n_newline); +static size_t echarntorune(Rune *r, char *s, size_t n); +static void insert_labels(void); + +/* Get and Free arg and related utilities */ +static char *get_aci_arg(Cmd *c, char *s); +static void aci_append(Cmd *c, char *s); +static void free_acir_arg(Cmd *c); +static char *get_bt_arg(Cmd *c, char *s); +static char *get_r_arg(Cmd *c, char *s); +static char *get_s_arg(Cmd *c, char *s); +static void free_s_arg(Cmd *c); +static char *get_w_arg(Cmd *c, char *s); +static char *get_y_arg(Cmd *c, char *s); +static void free_y_arg(Cmd *c); +static char *get_colon_arg(Cmd *c, char *s); +static char *get_lbrace_arg(Cmd *c, char *s); +static char *get_rbrace_arg(Cmd *c, char *s); +static char *semicolon_arg(char *s); + +/* Running */ +static void run(void); +static int in_range(Cmd *c); +static int match_addr(Addr *a); +static int next_file(void); +static int is_eof(FILE *f); +static void do_writes(void); +static void write_file(char *path, FILE *out); +static void check_puts(char *s, FILE *f); +static void update_ranges(Cmd *beg, Cmd *end); + +/* Sed functions */ +static void cmd_y(Cmd *c); +static void cmd_x(Cmd *c); +static void cmd_w(Cmd *c); +static void cmd_t(Cmd *c); +static void cmd_s(Cmd *c); +static void cmd_r(Cmd *c); +static void cmd_q(Cmd *c); +static void cmd_P(Cmd *c); +static void cmd_p(Cmd *c); +static void cmd_N(Cmd *c); +static void cmd_n(Cmd *c); +static void cmd_l(Cmd *c); +static void cmd_i(Cmd *c); +static void cmd_H(Cmd *c); +static void cmd_h(Cmd *c); +static void cmd_G(Cmd *c); +static void cmd_g(Cmd *c); +static void cmd_D(Cmd *c); +static void cmd_d(Cmd *c); +static void cmd_c(Cmd *c); +static void cmd_b(Cmd *c); +static void cmd_a(Cmd *c); +static void cmd_colon(Cmd *c); +static void cmd_equal(Cmd *c); +static void cmd_lbrace(Cmd *c); +static void cmd_rbrace(Cmd *c); +static void cmd_last(Cmd *c); + +/* Actions */ +static void new_line(void); +static void app_line(void); +static void new_next(void); +static void old_next(void); + +/* + * Globals + */ +static Vec braces, labels, branches; /* holds ptrdiff_t. addrs of {, :, bt */ +static Vec writes; /* holds cmd*. writes scheduled by a and r commands */ +static Vec wfiles; /* holds Wfile*. files for w and s///w commands */ + +static Cmd *prog, *pc; /* Program, program counter */ +static size_t pcap; +static size_t lineno; + +static regex_t *lastre; /* last used regex for empty regex search */ +static char **files; /* list of file names from argv */ +static FILE *file; /* current file we are reading */ +static int ret; /* exit status */ + +static String patt, hold, genbuf; + +static struct { + unsigned int n :1; /* -n (no print) */ + unsigned int E :1; /* -E (extended re) */ + unsigned int s :1; /* s/// replacement happened */ + unsigned int aci_cont:1; /* a,c,i text continuation */ + unsigned int s_cont :1; /* s/// replacement text continuation */ + unsigned int halt :1; /* halt execution */ +} gflags; + +/* FIXME: move character inside Fninfo and only use 26*sizeof(Fninfo) instead of 127*sizeof(Fninfo) bytes */ +static Fninfo fns[] = { + ['a'] = { cmd_a , get_aci_arg , free_acir_arg , 1 }, /* schedule write of text for later */ + ['b'] = { cmd_b , get_bt_arg , NULL , 2 }, /* branch to label char *label when building, Cmd *jump when running */ + ['c'] = { cmd_c , get_aci_arg , free_acir_arg , 2 }, /* delete pattern space. at 0 or 1 addr or end of 2 addr, write text */ + ['d'] = { cmd_d , NULL , NULL , 2 }, /* delete pattern space */ + ['D'] = { cmd_D , NULL , NULL , 2 }, /* delete to first newline and start new cycle without reading (if no newline, d) */ + ['g'] = { cmd_g , NULL , NULL , 2 }, /* replace pattern space with hold space */ + ['G'] = { cmd_G , NULL , NULL , 2 }, /* append newline and hold space to pattern space */ + ['h'] = { cmd_h , NULL , NULL , 2 }, /* replace hold space with pattern space */ + ['H'] = { cmd_H , NULL , NULL , 2 }, /* append newline and pattern space to hold space */ + ['i'] = { cmd_i , get_aci_arg , free_acir_arg , 1 }, /* write text */ + ['l'] = { cmd_l , NULL , NULL , 2 }, /* write pattern space in 'visually unambiguous form' */ + ['n'] = { cmd_n , NULL , NULL , 2 }, /* write pattern space (unless -n) read to replace pattern space (if no input, quit) */ + ['N'] = { cmd_N , NULL , NULL , 2 }, /* append to pattern space separated by newline, line number changes (if no input, quit) */ + ['p'] = { cmd_p , NULL , NULL , 2 }, /* write pattern space */ + ['P'] = { cmd_P , NULL , NULL , 2 }, /* write pattern space up to first newline */ + ['q'] = { cmd_q , NULL , NULL , 1 }, /* quit */ + ['r'] = { cmd_r , get_r_arg , free_acir_arg , 1 }, /* write contents of file (unable to open/read treated as empty file) */ + ['s'] = { cmd_s , get_s_arg , free_s_arg , 2 }, /* find/replace/all that crazy s stuff */ + ['t'] = { cmd_t , get_bt_arg , NULL , 2 }, /* if s/// succeeded (since input or last t) branch to label (branch to end if no label) */ + ['w'] = { cmd_w , get_w_arg , NULL , 2 }, /* append pattern space to file */ + ['x'] = { cmd_x , NULL , NULL , 2 }, /* exchange pattern and hold spaces */ + ['y'] = { cmd_y , get_y_arg , free_y_arg , 2 }, /* replace runes in set1 with runes in set2 */ + [':'] = { cmd_colon , get_colon_arg , NULL , 0 }, /* defines label for later b and t commands */ + ['='] = { cmd_equal , NULL , NULL , 1 }, /* printf("%d\n", line_number); */ + ['{'] = { cmd_lbrace, get_lbrace_arg, NULL , 2 }, /* if we match, run commands, otherwise jump to close */ + ['}'] = { cmd_rbrace, get_rbrace_arg, NULL , 0 }, /* noop, hold onto open for ease of building scripts */ + + [0x7f] = { NULL, NULL, NULL, 0 }, /* index is checked with isascii(3p). fill out rest of array */ +}; + +/* + * Function Definitions + */ + +/* given memory pointed to by *ptr that currently holds *nmemb members of size + * size, realloc to hold new_nmemb members, return new_nmemb in *memb and one + * past old end in *next. if realloc fails...explode + */ +static void +resize(void **ptr, size_t *nmemb, size_t size, size_t new_nmemb, void **next) +{ + void *n, *tmp; + + if (new_nmemb) { + tmp = ereallocarray(*ptr, new_nmemb, size); + } else { /* turns out realloc(*ptr, 0) != free(*ptr) */ + free(*ptr); + tmp = NULL; + } + n = (char *)tmp + *nmemb * size; + *nmemb = new_nmemb; + *ptr = tmp; + if (next) + *next = n; +} + +static void * +pop(Vec *v) +{ + if (!v->size) + return NULL; + return v->data[--v->size]; +} + +static void +push(Vec *v, void *p) +{ + if (v->size == v->cap) + resize((void **)&v->data, &v->cap, sizeof(*v->data), v->cap * 2 + 1, NULL); + v->data[v->size++] = p; +} + +static void +stracat(String *dst, char *src) +{ + int new = !dst->cap; + size_t len; + + len = (new ? 0 : strlen(dst->str)) + strlen(src) + 1; + if (dst->cap < len) + resize((void **)&dst->str, &dst->cap, 1, len * 2, NULL); + if (new) + *dst->str = '\0'; + strcat(dst->str, src); +} + +static void +strnacat(String *dst, char *src, size_t n) +{ + int new = !dst->cap; + size_t len; + + len = strlen(src); + len = (new ? 0 : strlen(dst->str)) + MIN(n, len) + 1; + if (dst->cap < len) + resize((void **)&dst->str, &dst->cap, 1, len * 2, NULL); + if (new) + *dst->str = '\0'; + strlcat(dst->str, src, len); +} + +static void +stracpy(String *dst, char *src) +{ + size_t len; + + len = strlen(src) + 1; + if (dst->cap < len) + resize((void **)&dst->str, &dst->cap, 1, len * 2, NULL); + strcpy(dst->str, src); +} + +static void +leprintf(char *s) +{ + if (errno) + eprintf("%zu: %s: %s\n", lineno, s, strerror(errno)); + else + eprintf("%zu: %s\n", lineno, s); +} + +/* FIXME: write usage message */ +static void +usage(void) +{ + eprintf("usage: sed [-nrE] script [file ...]\n" + " sed [-nrE] -e script [-e script] ... [-f scriptfile] ... [file ...]\n" + " sed [-nrE] [-e script] ... -f scriptfile [-f scriptfile] ... [file ...]\n"); +} + +/* Differences from POSIX + * we allows semicolons and trailing blanks inside {} + * we allow spaces after ! (and in between !s) + * we allow extended regular expressions (-E) + */ +static void +compile(char *s, int isfile) +{ + FILE *f; + + if (isfile) { + f = fopen(s, "r"); + if (!f) + eprintf("fopen %s:", s); + } else { + if (!*s) /* empty string script */ + return; + f = fmemopen(s, strlen(s), "r"); + if (!f) + eprintf("fmemopen:"); + } + + /* NOTE: get arg functions can't use genbuf */ + while (read_line(f, &genbuf) != EOF) { + s = genbuf.str; + + /* if the first two characters of the script are "#n" default output shall be suppressed */ + if (++lineno == 1 && *s == '#' && s[1] == 'n') { + gflags.n = 1; + continue; + } + + if (gflags.aci_cont) { + aci_append(pc - 1, s); + continue; + } + if (gflags.s_cont) + s = (pc - 1)->fninfo->getarg(pc - 1, s); + + while (*s) { + s = chompr(s, ';'); + if (!*s || *s == '#') + break; + + if ((size_t)(pc - prog) == pcap) + resize((void **)&prog, &pcap, sizeof(*prog), pcap * 2 + 1, (void **)&pc); + + pc->range.beg.type = pc->range.end.type = IGNORE; + pc->fninfo = NULL; + pc->in_match = 0; + + s = make_range(&pc->range, s); + s = chomp(s); + pc->negate = *s == '!'; + s = chompr(s, '!'); + + if (!isascii(*s) || !(pc->fninfo = &fns[(unsigned)*s])->fn) + leprintf("bad sed function"); + if (pc->range.naddr > pc->fninfo->naddr) + leprintf("wrong number of addresses"); + s++; + + if (pc->fninfo->getarg) + s = pc->fninfo->getarg(pc, s); + + pc++; + } + } + + fshut(f, s); +} + +/* FIXME: if we decide to honor lack of trailing newline, set/clear a global + * flag when reading a line + */ +static int +read_line(FILE *f, String *s) +{ + ssize_t len; + + if (!f) + return EOF; + + if ((len = getline(&s->str, &s->cap, f)) < 0) { + if (ferror(f)) + eprintf("getline:"); + return EOF; + } + if (s->str[--len] == '\n') + s->str[len] = '\0'; + return 0; +} + +/* read first range from s, return pointer to one past end of range */ +static char * +make_range(Range *range, char *s) +{ + s = make_addr(&range->beg, s); + + if (*s == ',') + s = make_addr(&range->end, s + 1); + else + range->end.type = IGNORE; + + if (range->beg.type == EVERY && range->end.type == IGNORE) range->naddr = 0; + else if (range->beg.type != IGNORE && range->end.type == IGNORE) range->naddr = 1; + else if (range->beg.type != IGNORE && range->end.type != IGNORE) range->naddr = 2; + else leprintf("this is impossible..."); + + return s; +} + +/* read first addr from s, return pointer to one past end of addr */ +static char * +make_addr(Addr *addr, char *s) +{ + Rune r; + char *p = s + strlen(s); + size_t rlen = echarntorune(&r, s, p - s); + + if (r == '$') { + addr->type = LAST; + s += rlen; + } else if (isdigitrune(r)) { + addr->type = LINE; + addr->u.lineno = stol(s, &s); + } else if (r == '/' || r == '\\') { + Rune delim; + if (r == '\\') { + s += rlen; + rlen = echarntorune(&r, s, p - s); + } + if (r == '\\') + leprintf("bad delimiter '\\'"); + delim = r; + s += rlen; + rlen = echarntorune(&r, s, p - s); + if (r == delim) { + addr->type = LASTRE; + s += rlen; + } else { + addr->type = REGEX; + p = find_delim(s, delim, 1); + if (!*p) + leprintf("unclosed regex"); + p -= escapes(s, p, delim, 0); + *p++ = '\0'; + addr->u.re = emalloc(sizeof(*addr->u.re)); + eregcomp(addr->u.re, s, gflags.E ? REG_EXTENDED : 0); + s = p; + } + } else { + addr->type = EVERY; + } + + return s; +} + +/* return pointer to first delim in s that is not escaped + * and if do_brackets is set, not in [] (note possible [::], [..], [==], inside []) + * return pointer to trailing nul byte if no delim found + * + * any escaped character that is not special is just itself (POSIX undefined) + * FIXME: pull out into some util thing, will be useful for ed as well + */ +static char * +find_delim(char *s, Rune delim, int do_brackets) +{ + enum { + OUTSIDE , /* not in brackets */ + BRACKETS_OPENING, /* last char was first [ or last two were first [^ */ + BRACKETS_INSIDE , /* inside [] */ + INSIDE_OPENING , /* inside [] and last char was [ */ + CLASS_INSIDE , /* inside class [::], or colating element [..] or [==], inside [] */ + CLASS_CLOSING , /* inside class [::], or colating element [..] or [==], and last character was the respective : . or = */ + } state = OUTSIDE; + + Rune r, c = 0; /* no c won't be used uninitialized, shutup -Wall */ + size_t rlen; + int escape = 0; + char *end = s + strlen(s); + + for (; *s; s += rlen) { + rlen = echarntorune(&r, s, end - s); + + if (state == BRACKETS_OPENING && r == '^' ) { continue; } + else if (state == BRACKETS_OPENING && r == ']' ) { state = BRACKETS_INSIDE ; continue; } + else if (state == BRACKETS_OPENING ) { state = BRACKETS_INSIDE ; } + + if (state == CLASS_CLOSING && r == ']' ) { state = BRACKETS_INSIDE ; } + else if (state == CLASS_CLOSING ) { state = CLASS_INSIDE ; } + else if (state == CLASS_INSIDE && r == c ) { state = CLASS_CLOSING ; } + else if (state == INSIDE_OPENING && (r == ':' || + r == '.' || + r == '=') ) { state = CLASS_INSIDE ; c = r; } + else if (state == INSIDE_OPENING && r == ']' ) { state = OUTSIDE ; } + else if (state == INSIDE_OPENING ) { state = BRACKETS_INSIDE ; } + else if (state == BRACKETS_INSIDE && r == '[' ) { state = INSIDE_OPENING ; } + else if (state == BRACKETS_INSIDE && r == ']' ) { state = OUTSIDE ; } + else if (state == OUTSIDE && escape ) { escape = 0 ; } + else if (state == OUTSIDE && r == '\\' ) { escape = 1 ; } + else if (state == OUTSIDE && r == delim) return s; + else if (state == OUTSIDE && do_brackets && r == '[' ) { state = BRACKETS_OPENING; } + } + return s; +} + +static char * +chomp(char *s) +{ + return chompr(s, 0); +} + +/* eat all leading whitespace and occurrences of rune */ +static char * +chompr(char *s, Rune rune) +{ + Rune r; + size_t rlen; + char *end = s + strlen(s); + + while (*s && (rlen = echarntorune(&r, s, end - s)) && (isspacerune(r) || r == rune)) + s += rlen; + return s; +} + +/* convert first nrunes Runes from UTF-8 string s in allocated Rune* + * NOTE: sequence must be valid UTF-8, check first */ +static Rune * +strtorunes(char *s, size_t nrunes) +{ + Rune *rs, *rp; + + rp = rs = ereallocarray(NULL, nrunes + 1, sizeof(*rs)); + + while (nrunes--) + s += chartorune(rp++, s); + + *rp = '\0'; + return rs; +} + +static long +stol(char *s, char **endp) +{ + long n; + errno = 0; + n = strtol(s, endp, 10); + + if (errno) + leprintf("strtol:"); + if (*endp == s) + leprintf("strtol: invalid number"); + + return n; +} + +/* from beg to end replace "\\d" with "d" and "\\n" with "\n" (where d is delim) + * if delim is 'n' and n_newline is 0 then "\\n" is replaced with "n" (normal) + * if delim is 'n' and n_newline is 1 then "\\n" is replaced with "\n" (y command) + * if delim is 0 all escaped characters represent themselves (aci text) + * memmove rest of string (beyond end) into place + * return the number of converted escapes (backslashes removed) + * FIXME: this has had too many corner cases slapped on and is ugly. rewrite better + */ +static size_t +escapes(char *beg, char *end, Rune delim, int n_newline) +{ + size_t num = 0; + char *src = beg, *dst = beg; + + while (src < end) { + /* handle escaped backslash specially so we don't think the second + * backslash is escaping something */ + if (*src == '\\' && src[1] == '\\') { + *dst++ = *src++; + if (delim) + *dst++ = *src++; + else + src++; + } else if (*src == '\\' && !delim) { + src++; + } else if (*src == '\\' && src[1]) { + Rune r; + size_t rlen; + num++; + src++; + rlen = echarntorune(&r, src, end - src); + + if (r == 'n' && delim == 'n') { + *src = n_newline ? '\n' : 'n'; /* src so we can still memmove() */ + } else if (r == 'n') { + *src = '\n'; + } else if (r != delim) { + *dst++ = '\\'; + num--; + } + + memmove(dst, src, rlen); + dst += rlen; + src += rlen; + } else { + *dst++ = *src++; + } + } + memmove(dst, src, strlen(src) + 1); + return num; +} + +static size_t +echarntorune(Rune *r, char *s, size_t n) +{ + size_t rlen = charntorune(r, s, n); + if (!rlen || *r == Runeerror) + leprintf("invalid UTF-8"); + return rlen; +} + +static void +insert_labels(void) +{ + size_t i; + Cmd *from, *to; + + while (branches.size) { + from = prog + (ptrdiff_t)pop(&branches); + + if (!from->u.label) {/* no label branch to end of script */ + from->u.jump = pc - 1; + } else { + for (i = 0; i < labels.size; i++) { + to = prog + (ptrdiff_t)labels.data[i]; + if (!strcmp(from->u.label, to->u.label)) { + from->u.jump = to; + break; + } + } + if (i == labels.size) + leprintf("bad label"); + } + } +} + +/* + * Getargs / Freeargs + * Read argument from s, return pointer to one past last character of argument + */ + +/* POSIX compliant + * i\ + * foobar + * + * also allow the following non POSIX compliant + * i # empty line + * ifoobar + * ifoobar\ + * baz + * + * FIXME: GNU and busybox discard leading spaces + * i foobar + * i foobar + * ifoobar + * are equivalent in GNU and busybox. We don't. Should we? + */ +static char * +get_aci_arg(Cmd *c, char *s) +{ + c->u.acir.print = check_puts; + c->u.acir.str = (String){ NULL, 0 }; + + gflags.aci_cont = !!*s; /* no continue flag if empty string */ + + /* neither empty string nor POSIX compliant */ + if (*s && !(*s == '\\' && !s[1])) + aci_append(c, s); + + return s + strlen(s); +} + +static void +aci_append(Cmd *c, char *s) +{ + char *end = s + strlen(s), *p = end; + + gflags.aci_cont = 0; + while (--p >= s && *p == '\\') + gflags.aci_cont = !gflags.aci_cont; + + if (gflags.aci_cont) + *--end = '\n'; + + escapes(s, end, 0, 0); + stracat(&c->u.acir.str, s); +} + +static void +free_acir_arg(Cmd *c) +{ + free(c->u.acir.str.str); +} + +/* POSIX dictates that label is rest of line, including semicolons, trailing + * whitespace, closing braces, etc. and can be limited to 8 bytes + * + * I allow a semicolon or closing brace to terminate a label name, it's not + * POSIX compliant, but it's useful and every sed version I've tried to date + * does the same. + * + * FIXME: POSIX dictates that leading whitespace is ignored but trailing + * whitespace is not. This is annoying and we should probably get rid of it. + */ +static char * +get_bt_arg(Cmd *c, char *s) +{ + char *p = semicolon_arg(s = chomp(s)); + + if (p != s) { + c->u.label = estrndup(s, p - s); + } else { + c->u.label = NULL; + } + + push(&branches, (void *)(c - prog)); + + return p; +} + +/* POSIX dictates file name is rest of line including semicolons, trailing + * whitespace, closing braces, etc. and file name must be preceded by a space + * + * I allow a semicolon or closing brace to terminate a file name and don't + * enforce leading space. + * + * FIXME: decide whether trailing whitespace should be included and fix + * accordingly + */ +static char * +get_r_arg(Cmd *c, char *s) +{ + char *p = semicolon_arg(s = chomp(s)); + + if (p == s) + leprintf("no file name"); + + c->u.acir.str.str = estrndup(s, p - s); + c->u.acir.print = write_file; + + return p; +} + +/* we allow "\\n" in replacement text to mean "\n" (undefined in POSIX) + * + * FIXME: allow other escapes in regex and replacement? if so change escapes() + */ +static char * +get_s_arg(Cmd *c, char *s) +{ + Rune delim, r; + Cmd buf; + char *p; + int esc, lastre; + + /* s/Find/Replace/Flags */ + + /* Find */ + if (!gflags.s_cont) { /* NOT continuing from literal newline in replacement text */ + lastre = 0; + c->u.s.repl = (String){ NULL, 0 }; + c->u.s.occurrence = 1; + c->u.s.file = NULL; + c->u.s.p = 0; + + if (!*s || *s == '\\') + leprintf("bad delimiter"); + + p = s + strlen(s); + s += echarntorune(&delim, s, p - s); + c->u.s.delim = delim; + + echarntorune(&r, s, p - s); + if (r == delim) /* empty regex */ + lastre = 1; + + p = find_delim(s, delim, 1); + if (!*p) + leprintf("missing second delimiter"); + p -= escapes(s, p, delim, 0); + *p = '\0'; + + if (lastre) { + c->u.s.re = NULL; + } else { + c->u.s.re = emalloc(sizeof(*c->u.s.re)); + /* FIXME: different eregcomp that calls fatal */ + eregcomp(c->u.s.re, s, gflags.E ? REG_EXTENDED : 0); + } + s = p + runelen(delim); + } + + /* Replace */ + delim = c->u.s.delim; + + p = find_delim(s, delim, 0); + p -= escapes(s, p, delim, 0); + if (!*p) { /* no third delimiter */ + /* FIXME: same backslash counting as aci_append() */ + if (p[-1] != '\\') + leprintf("missing third delimiter or <backslash><newline>"); + p[-1] = '\n'; + gflags.s_cont = 1; + } else { + gflags.s_cont = 0; + } + + /* check for bad references in replacement text */ + *p = '\0'; + for (esc = 0, p = s; *p; p++) { + if (esc) { + esc = 0; + if (isdigit(*p) && c->u.s.re && (size_t)(*p - '0') > c->u.s.re->re_nsub) + leprintf("back reference number greater than number of groups"); + } else if (*p == '\\') { + esc = 1; + } + } + stracat(&c->u.s.repl, s); + + if (gflags.s_cont) + return p; + + s = p + runelen(delim); + + /* Flags */ + p = semicolon_arg(s = chomp(s)); + + /* FIXME: currently for simplicity take last of g or occurrence flags and + * ignore multiple p flags. need to fix that */ + for (; s < p; s++) { + if (isdigit(*s)) { + c->u.s.occurrence = stol(s, &s); + s--; /* for loop will advance pointer */ + } else { + switch (*s) { + case 'g': c->u.s.occurrence = 0; break; + case 'p': c->u.s.p = 1; break; + case 'w': + /* must be last flag, take everything up to newline/semicolon + * s == p after this */ + s = get_w_arg(&buf, chomp(s+1)); + c->u.s.file = buf.u.file; + break; + } + } + } + return p; +} + +static void +free_s_arg(Cmd *c) +{ + if (c->u.s.re) + regfree(c->u.s.re); + free(c->u.s.re); + free(c->u.s.repl.str); +} + +/* see get_r_arg notes */ +static char * +get_w_arg(Cmd *c, char *s) +{ + char *p = semicolon_arg(s = chomp(s)); + Wfile *w, **wp; + + if (p == s) + leprintf("no file name"); + + for (wp = (Wfile **)wfiles.data; (size_t)(wp - (Wfile **)wfiles.data) < wfiles.size; wp++) { + if (strlen((*wp)->path) == (size_t)(p - s) && !strncmp(s, (*wp)->path, p - s)) { + c->u.file = (*wp)->file; + return p; + } + } + + w = emalloc(sizeof(*w)); + w->path = estrndup(s, p - s); + + if (!(w->file = fopen(w->path, "w"))) + leprintf("fopen failed"); + + c->u.file = w->file; + + push(&wfiles, w); + return p; +} + +static char * +get_y_arg(Cmd *c, char *s) +{ + Rune delim; + char *p = s + strlen(s); + size_t rlen = echarntorune(&delim, s, p - s); + size_t nrunes1, nrunes2; + + c->u.y.set1 = c->u.y.set2 = NULL; + + s += rlen; + p = find_delim(s, delim, 0); + p -= escapes(s, p, delim, 1); + nrunes1 = utfnlen(s, p - s); + c->u.y.set1 = strtorunes(s, nrunes1); + + s = p + rlen; + p = find_delim(s, delim, 0); + p -= escapes(s, p, delim, 1); + nrunes2 = utfnlen(s, p - s); + + if (nrunes1 != nrunes2) + leprintf("different set lengths"); + + c->u.y.set2 = strtorunes(s, utfnlen(s, p - s)); + + return p + rlen; +} + +static void +free_y_arg(Cmd *c) +{ + free(c->u.y.set1); + free(c->u.y.set2); +} + +/* see get_bt_arg notes */ +static char * +get_colon_arg(Cmd *c, char *s) +{ + char *p = semicolon_arg(s = chomp(s)); + + if (p == s) + leprintf("no label name"); + + c->u.label = estrndup(s, p - s); + push(&labels, (void *)(c - prog)); + return p; +} + +static char * +get_lbrace_arg(Cmd *c, char *s) +{ + push(&braces, (void *)(c - prog)); + return s; +} + +static char * +get_rbrace_arg(Cmd *c, char *s) +{ + Cmd *lbrace; + + if (!braces.size) + leprintf("extra }"); + + lbrace = prog + (ptrdiff_t)pop(&braces); + lbrace->u.offset = c - prog; + return s; +} + +/* s points to beginning of an argument that may be semicolon terminated + * return pointer to semicolon or nul byte after string + * or closing brace as to not force ; before } + * FIXME: decide whether or not to eat trailing whitespace for arguments that + * we allow semicolon/brace termination that POSIX doesn't + * b, r, t, w, : + * POSIX says trailing whitespace is part of label name, file name, etc. + * we should probably eat it + */ +static char * +semicolon_arg(char *s) +{ + char *p = strpbrk(s, ";}"); + if (!p) + p = s + strlen(s); + return p; +} + +static void +run(void) +{ + lineno = 0; + if (braces.size) + leprintf("extra {"); + + /* genbuf has already been initialized, patt will be in new_line + * (or we'll halt) */ + stracpy(&hold, ""); + + insert_labels(); + next_file(); + new_line(); + + for (pc = prog; !gflags.halt; pc++) + pc->fninfo->fn(pc); +} + +/* return true if we are in range for c, set c->in_match appropriately */ +static int +in_range(Cmd *c) +{ + if (match_addr(&c->range.beg)) { + if (c->range.naddr == 2) { + if (c->range.end.type == LINE && c->range.end.u.lineno <= lineno) + c->in_match = 0; + else + c->in_match = 1; + } + return !c->negate; + } + if (c->in_match && match_addr(&c->range.end)) { + c->in_match = 0; + return !c->negate; + } + return c->in_match ^ c->negate; +} + +/* return true if addr matches current line */ +static int +match_addr(Addr *a) +{ + switch (a->type) { + default: + case IGNORE: return 0; + case EVERY: return 1; + case LINE: return lineno == a->u.lineno; + case LAST: + while (is_eof(file) && !next_file()) + ; + return !file; + case REGEX: + lastre = a->u.re; + return !regexec(a->u.re, patt.str, 0, NULL, 0); + case LASTRE: + if (!lastre) + leprintf("no previous regex"); + return !regexec(lastre, patt.str, 0, NULL, 0); + } +} + +/* move to next input file + * stdin if first call and no files + * return 0 for success and 1 for no more files + */ +static int +next_file(void) +{ + static unsigned char first = 1; + + if (file == stdin) + clearerr(file); + else if (file) + fshut(file, "<file>"); + /* given no files, default to stdin */ + file = first && !*files ? stdin : NULL; + first = 0; + + while (!file && *files) { + if (!strcmp(*files, "-")) { + file = stdin; + } else if (!(file = fopen(*files, "r"))) { + /* warn this file didn't open, but move on to next */ + weprintf("fopen %s:", *files); + ret = 1; + } + files++; + } + + return !file; +} + +/* test if stream is at EOF */ +static int +is_eof(FILE *f) +{ + int c; + + if (!f || feof(f)) + return 1; + + c = fgetc(f); + if (c == EOF && ferror(f)) + eprintf("fgetc:"); + if (c != EOF && ungetc(c, f) == EOF) + eprintf("ungetc EOF\n"); + + return c == EOF; +} + +/* perform writes that were scheduled + * for aci this is check_puts(string, stdout) + * for r this is write_file(path, stdout) + */ +static void +do_writes(void) +{ + Cmd *c; + size_t i; + + for (i = 0; i < writes.size; i++) { + c = writes.data[i]; + c->u.acir.print(c->u.acir.str.str, stdout); + } + writes.size = 0; +} + +/* used for r's u.acir.print() + * FIXME: something like util's concat() would be better + */ +static void +write_file(char *path, FILE *out) +{ + FILE *in = fopen(path, "r"); + if (!in) /* no file is treated as empty file */ + return; + + while (read_line(in, &genbuf) != EOF) + check_puts(genbuf.str, out); + + fshut(in, path); +} + +static void +check_puts(char *s, FILE *f) +{ + if (s && fputs(s, f) == EOF) + eprintf("fputs:"); + if (fputs("\n", f) == EOF) + eprintf("fputs:"); +} + +/* iterate from beg to end updating ranges so we don't miss any commands + * e.g. sed -n '1d;1,3p' should still print lines 2 and 3 + */ +static void +update_ranges(Cmd *beg, Cmd *end) +{ + while (beg < end) + in_range(beg++); +} + +/* + * Sed functions + */ +static void +cmd_a(Cmd *c) +{ + if (in_range(c)) + push(&writes, c); +} + +static void +cmd_b(Cmd *c) +{ + if (!in_range(c)) + return; + + /* if we jump backwards update to end, otherwise update to destination */ + update_ranges(c + 1, c->u.jump > c ? c->u.jump : prog + pcap); + pc = c->u.jump; +} + +static void +cmd_c(Cmd *c) +{ + if (!in_range(c)) + return; + + /* write the text on the last line of the match */ + if (!c->in_match) + check_puts(c->u.acir.str.str, stdout); + /* otherwise start the next cycle without printing pattern space + * effectively deleting the text */ + new_next(); +} + +static void +cmd_d(Cmd *c) +{ + if (!in_range(c)) + return; + + new_next(); +} + +static void +cmd_D(Cmd *c) +{ + char *p; + + if (!in_range(c)) + return; + + if ((p = strchr(patt.str, '\n'))) { + p++; + memmove(patt.str, p, strlen(p) + 1); + old_next(); + } else { + new_next(); + } +} + +static void +cmd_g(Cmd *c) +{ + if (in_range(c)) + stracpy(&patt, hold.str); +} + +static void +cmd_G(Cmd *c) +{ + if (!in_range(c)) + return; + + stracat(&patt, "\n"); + stracat(&patt, hold.str); +} + +static void +cmd_h(Cmd *c) +{ + if (in_range(c)) + stracpy(&hold, patt.str); +} + +static void +cmd_H(Cmd *c) +{ + if (!in_range(c)) + return; + + stracat(&hold, "\n"); + stracat(&hold, patt.str); +} + +static void +cmd_i(Cmd *c) +{ + if (in_range(c)) + check_puts(c->u.acir.str.str, stdout); +} + +/* I think it makes sense to print invalid UTF-8 sequences in octal to satisfy + * the "visually unambiguous form" sed(1p) + */ +static void +cmd_l(Cmd *c) +{ + Rune r; + char *p, *end; + size_t rlen; + + char *escapes[] = { /* FIXME: 7 entries and search instead of 127 */ + ['\\'] = "\\\\", ['\a'] = "\\a", ['\b'] = "\\b", + ['\f'] = "\\f" , ['\r'] = "\\r", ['\t'] = "\\t", + ['\v'] = "\\v" , [0x7f] = NULL, /* fill out the table */ + }; + + if (!in_range(c)) + return; + + /* FIXME: line wrapping. sed(1p) says "length at which folding occurs is + * unspecified, but should be appropraite for the output device" + * just wrap at 80 Runes? + */ + for (p = patt.str, end = p + strlen(p); p < end; p += rlen) { + if (isascii(*p) && escapes[(unsigned int)*p]) { + fputs(escapes[(unsigned int)*p], stdout); + rlen = 1; + } else if (!(rlen = charntorune(&r, p, end - p))) { + /* ran out of chars, print the bytes of the short sequence */ + for (; p < end; p++) + printf("\\%03hho", (unsigned char)*p); + break; + } else if (r == Runeerror) { + for (; rlen; rlen--, p++) + printf("\\%03hho", (unsigned char)*p); + } else { + while (fwrite(p, rlen, 1, stdout) < 1 && errno == EINTR) + ; + if (ferror(stdout)) + eprintf("fwrite:"); + } + } + check_puts("$", stdout); +} + +static void +cmd_n(Cmd *c) +{ + if (!in_range(c)) + return; + + if (!gflags.n) + check_puts(patt.str, stdout); + do_writes(); + new_line(); +} + +static void +cmd_N(Cmd *c) +{ + if (!in_range(c)) + return; + do_writes(); + app_line(); +} + +static void +cmd_p(Cmd *c) +{ + if (in_range(c)) + check_puts(patt.str, stdout); +} + +static void +cmd_P(Cmd *c) +{ + char *p; + + if (!in_range(c)) + return; + + if ((p = strchr(patt.str, '\n'))) + *p = '\0'; + + check_puts(patt.str, stdout); + + if (p) + *p = '\n'; +} + +static void +cmd_q(Cmd *c) +{ + if (!in_range(c)) + return; + + if (!gflags.n) + check_puts(patt.str, stdout); + do_writes(); + gflags.halt = 1; +} + +static void +cmd_r(Cmd *c) +{ + if (in_range(c)) + push(&writes, c); +} + +static void +cmd_s(Cmd *c) +{ + String tmp; + Rune r; + size_t plen, rlen, len; + char *p, *s, *end; + unsigned int matches = 0, last_empty = 1, qflag = 0, cflags = 0; + regex_t *re; + regmatch_t *rm, *pmatch = NULL; + + if (!in_range(c)) + return; + + if (!c->u.s.re && !lastre) + leprintf("no previous regex"); + + re = c->u.s.re ? c->u.s.re : lastre; + lastre = re; + + plen = re->re_nsub + 1; + pmatch = ereallocarray(NULL, plen, sizeof(regmatch_t)); + + *genbuf.str = '\0'; + s = patt.str; + + while (!qflag && !regexec(re, s, plen, pmatch, cflags)) { + cflags = REG_NOTBOL; /* match against beginning of line first time, but not again */ + if (!*s) /* match against empty string first time, but not again */ + qflag = 1; + + /* don't substitute if last match was not empty but this one is. + * s_a*_._g + * foobar -> .f.o.o.b.r. + */ + if ((last_empty || pmatch[0].rm_eo) && + (++matches == c->u.s.occurrence || !c->u.s.occurrence)) { + /* copy over everything before the match */ + strnacat(&genbuf, s, pmatch[0].rm_so); + + /* copy over replacement text, taking into account &, backreferences, and \ escapes */ + for (p = c->u.s.repl.str, len = strcspn(p, "\\&"); *p; len = strcspn(++p, "\\&")) { + strnacat(&genbuf, p, len); + p += len; + switch (*p) { + default: leprintf("this shouldn't be possible"); + case '\0': + /* we're at the end, back up one so the ++p will put us on + * the null byte to break out of the loop */ + --p; + break; + case '&': + strnacat(&genbuf, s + pmatch[0].rm_so, pmatch[0].rm_eo - pmatch[0].rm_so); + break; + case '\\': + if (isdigit(*++p)) { /* backreference */ + /* only need to check here if using lastre, otherwise we checked when building */ + if (!c->u.s.re && (size_t)(*p - '0') > re->re_nsub) + leprintf("back reference number greater than number of groups"); + rm = &pmatch[*p - '0']; + strnacat(&genbuf, s + rm->rm_so, rm->rm_eo - rm->rm_so); + } else { /* character after backslash taken literally (well one byte, but it works) */ + strnacat(&genbuf, p, 1); + } + break; + } + } + } else { + /* not replacing, copy over everything up to and including the match */ + strnacat(&genbuf, s, pmatch[0].rm_eo); + } + + if (!pmatch[0].rm_eo) { /* empty match, advance one rune and add it to output */ + end = s + strlen(s); + rlen = charntorune(&r, s, end - s); + + if (!rlen) { /* ran out of bytes, copy short sequence */ + stracat(&genbuf, s); + s = end; + } else { /* copy whether or not it's a good rune */ + strnacat(&genbuf, s, rlen); + s += rlen; + } + } + last_empty = !pmatch[0].rm_eo; + s += pmatch[0].rm_eo; + } + free(pmatch); + + if (!(matches && matches >= c->u.s.occurrence)) /* no replacement */ + return; + + gflags.s = 1; + + stracat(&genbuf, s); + + tmp = patt; + patt = genbuf; + genbuf = tmp; + + if (c->u.s.p) + check_puts(patt.str, stdout); + if (c->u.s.file) + check_puts(patt.str, c->u.s.file); +} + +static void +cmd_t(Cmd *c) +{ + if (!in_range(c) || !gflags.s) + return; + + /* if we jump backwards update to end, otherwise update to destination */ + update_ranges(c + 1, c->u.jump > c ? c->u.jump : prog + pcap); + pc = c->u.jump; + gflags.s = 0; +} + +static void +cmd_w(Cmd *c) +{ + if (in_range(c)) + check_puts(patt.str, c->u.file); +} + +static void +cmd_x(Cmd *c) +{ + String tmp; + + if (!in_range(c)) + return; + + tmp = patt; + patt = hold; + hold = tmp; +} + +static void +cmd_y(Cmd *c) +{ + String tmp; + Rune r, *rp; + size_t n, rlen; + char *s, *end, buf[UTFmax]; + + if (!in_range(c)) + return; + + *genbuf.str = '\0'; + for (s = patt.str, end = s + strlen(s); *s; s += rlen) { + if (!(rlen = charntorune(&r, s, end - s))) { /* ran out of chars, copy rest */ + stracat(&genbuf, s); + break; + } else if (r == Runeerror) { /* bad UTF-8 sequence, copy bytes */ + strnacat(&genbuf, s, rlen); + } else { + for (rp = c->u.y.set1; *rp; rp++) + if (*rp == r) + break; + if (*rp) { /* found r in set1, replace with Rune from set2 */ + n = runetochar(buf, c->u.y.set2 + (rp - c->u.y.set1)); + strnacat(&genbuf, buf, n); + } else { + strnacat(&genbuf, s, rlen); + } + } + } + tmp = patt; + patt = genbuf; + genbuf = tmp; +} + +static void +cmd_colon(Cmd *c) +{ +} + +static void +cmd_equal(Cmd *c) +{ + if (in_range(c)) + printf("%zu\n", lineno); +} + +static void +cmd_lbrace(Cmd *c) +{ + Cmd *jump; + + if (in_range(c)) + return; + + /* update ranges on all commands we skip */ + jump = prog + c->u.offset; + update_ranges(c + 1, jump); + pc = jump; +} + +static void +cmd_rbrace(Cmd *c) +{ +} + +/* not actually a sed function, but acts like one, put in last spot of script */ +static void +cmd_last(Cmd *c) +{ + if (!gflags.n) + check_puts(patt.str, stdout); + do_writes(); + new_next(); +} + +/* + * Actions + */ + +/* read new line, continue current cycle */ +static void +new_line(void) +{ + while (read_line(file, &patt) == EOF) { + if (next_file()) { + gflags.halt = 1; + return; + } + } + gflags.s = 0; + lineno++; +} + +/* append new line, continue current cycle + * FIXME: used for N, POSIX specifies do not print pattern space when out of + * input, but GNU does so busybox does as well. Currently we don't. + * Should we? + */ +static void +app_line(void) +{ + while (read_line(file, &genbuf) == EOF) { + if (next_file()) { + gflags.halt = 1; + return; + } + } + + stracat(&patt, "\n"); + stracat(&patt, genbuf.str); + gflags.s = 0; + lineno++; +} + +/* read new line, start new cycle */ +static void +new_next(void) +{ + *patt.str = '\0'; + update_ranges(pc + 1, prog + pcap); + new_line(); + pc = prog - 1; +} + +/* keep old pattern space, start new cycle */ +static void +old_next(void) +{ + update_ranges(pc + 1, prog + pcap); + pc = prog - 1; +} + +int +main(int argc, char *argv[]) +{ + char *arg; + int script = 0; + + ARGBEGIN { + case 'n': + gflags.n = 1; + break; + case 'r': + case 'E': + gflags.E = 1; + break; + case 'e': + arg = EARGF(usage()); + compile(arg, 0); + script = 1; + break; + case 'f': + arg = EARGF(usage()); + compile(arg, 1); + script = 1; + break; + default : usage(); + } ARGEND + + /* no script to run */ + if (!script && !argc) + usage(); + + /* no script yet, next argument is script */ + if (!script) + compile(*argv++, 0); + + /* shrink/grow memory to fit and add our last instruction */ + resize((void **)&prog, &pcap, sizeof(*prog), pc - prog + 1, NULL); + pc = prog + pcap - 1; + pc->fninfo = &(Fninfo){ cmd_last, NULL, NULL, 0 }; + + files = argv; + run(); + + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/seq.1 b/util/sbase/seq.1 new file mode 100644 index 00000000..1b9def89 --- /dev/null +++ b/util/sbase/seq.1 @@ -0,0 +1,40 @@ +.Dd October 8, 2015 +.Dt SEQ 1 +.Os sbase +.Sh NAME +.Nm seq +.Nd print a sequence of numbers +.Sh SYNOPSIS +.Nm +.Op Fl w +.Op Fl f Ar fmt +.Op Fl s Ar sep +.Op Ar startnum Op Ar step +.Ar endnum +.Sh DESCRIPTION +.Nm +writes a sequence of numbers from +.Ar startnum +(default: 1) to +.Ar endnum +in +.Ar step +intervals (default: 1) +to stdout. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl f Ar fmt +Use +.Ar fmt +as the output line format according to +.Xr printf 3 . +.It Fl s Ar sep +Print +.Ar sep +between output lines. +The default is "\en". +.It Fl w +Print out lines in equal width. +.El +.Sh SEE ALSO +.Xr printf 3 diff --git a/util/sbase/seq.c b/util/sbase/seq.c new file mode 100644 index 00000000..70763d1e --- /dev/null +++ b/util/sbase/seq.c @@ -0,0 +1,147 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "util.h" + +static int +digitsleft(const char *d) +{ + int shift; + char *exp; + + if (*d == '+') + d++; + exp = strpbrk(d, "eE"); + shift = exp ? estrtonum(exp + 1, INT_MIN, INT_MAX) : 0; + + return MAX(0, strspn(d, "-0123456789") + shift); +} + +static int +digitsright(const char *d) +{ + int shift, after; + char *exp; + + exp = strpbrk(d, "eE"); + shift = exp ? estrtonum(&exp[1], INT_MIN, INT_MAX) : 0; + after = (d = strchr(d, '.')) ? strspn(&d[1], "0123456789") : 0; + + return MAX(0, after - shift); +} + +static int +validfmt(const char *fmt) +{ + int occur = 0; + +literal: + while (*fmt) + if (*fmt++ == '%') + goto format; + return occur == 1; + +format: + if (*fmt == '%') { + fmt++; + goto literal; + } + fmt += strspn(fmt, "-+#0 '"); + fmt += strspn(fmt, "0123456789"); + if (*fmt == '.') { + fmt++; + fmt += strspn(fmt, "0123456789"); + } + if (*fmt == 'L') + fmt++; + + switch (*fmt) { + case 'f': case 'F': + case 'g': case 'G': + case 'e': case 'E': + case 'a': case 'A': + occur++; + goto literal; + default: + return 0; + } +} + +static void +usage(void) +{ + eprintf("usage: %s [-f fmt] [-s sep] [-w] " + "[startnum [step]] endnum\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + double start, step, end, out, dir; + int wflag = 0, left, right; + char *tmp, ftmp[BUFSIZ], *fmt = ftmp; + const char *starts = "1", *steps = "1", *ends = "1", *sep = "\n"; + + ARGBEGIN { + case 'f': + if (!validfmt(tmp=EARGF(usage()))) + eprintf("%s: invalid format\n", tmp); + fmt = tmp; + break; + case 's': + sep = EARGF(usage()); + break; + case 'w': + wflag = 1; + break; + default: + usage(); + } ARGEND + + switch (argc) { + case 3: + steps = argv[1]; + argv[1] = argv[2]; + /* fallthrough */ + case 2: + starts = argv[0]; + argv++; + /* fallthrough */ + case 1: + ends = argv[0]; + break; + default: + usage(); + } + start = estrtod(starts); + step = estrtod(steps); + end = estrtod(ends); + + dir = (step > 0) ? 1.0 : -1.0; + if (step == 0 || start * dir > end * dir) + return 1; + + if (fmt == ftmp) { + right = MAX(digitsright(starts), + MAX(digitsright(ends), + digitsright(steps))); + + if (wflag) { + left = MAX(digitsleft(starts), digitsleft(ends)); + + snprintf(ftmp, sizeof ftmp, "%%0%d.%df", + right + left + (right != 0), right); + } else + snprintf(ftmp, sizeof ftmp, "%%.%df", right); + } + for (out = start; out * dir <= end * dir; out += step) { + if (out != start) + fputs(sep, stdout); + printf(fmt, out); + } + putchar('\n'); + + return fshut(stdout, "<stdout>"); +} diff --git a/util/sbase/setsid.1 b/util/sbase/setsid.1 new file mode 100644 index 00000000..5a7b2412 --- /dev/null +++ b/util/sbase/setsid.1 @@ -0,0 +1,18 @@ +.Dd July 14, 2020 +.Dt SETSID 1 +.Os sbase +.Sh NAME +.Nm setsid +.Nd run a command in a new session +.Sh SYNOPSIS +.Nm +.Op Fl f +.Ar cmd +.Op Ar arg ... +.Sh DESCRIPTION +.Nm +runs +.Ar cmd +in a new session. +.Sh SEE ALSO +.Xr setsid 2 diff --git a/util/sbase/setsid.c b/util/sbase/setsid.c new file mode 100644 index 00000000..9a154d13 --- /dev/null +++ b/util/sbase/setsid.c @@ -0,0 +1,48 @@ +/* See LICENSE file for copyright and license details. */ +#include <errno.h> +#include <unistd.h> + +#include "util.h" + +static int fflag = 0; + +static void +usage(void) +{ + eprintf("usage: %s [-f] cmd [arg ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int savederrno; + + ARGBEGIN { + case 'f': + fflag = 1; + break; + default: + usage(); + } ARGEND + + if (!argc) + usage(); + + if (fflag || getpgrp() == getpid()) { + switch (fork()) { + case -1: + eprintf("fork:"); + case 0: + break; + default: + return 0; + } + } + if (setsid() < 0) + eprintf("setsid:"); + execvp(argv[0], argv); + savederrno = errno; + weprintf("execvp %s:", argv[0]); + + _exit(126 + (savederrno == ENOENT)); +} diff --git a/util/sbase/sha1.h b/util/sbase/sha1.h new file mode 100644 index 00000000..86317770 --- /dev/null +++ b/util/sbase/sha1.h @@ -0,0 +1,18 @@ +/* public domain sha1 implementation based on rfc3174 and libtomcrypt */ + +struct sha1 { + uint64_t len; /* processed message length */ + uint32_t h[5]; /* hash state */ + uint8_t buf[64]; /* message block buffer */ +}; + +enum { SHA1_DIGEST_LENGTH = 20 }; + +/* reset state */ +void sha1_init(void *ctx); +/* process message */ +void sha1_update(void *ctx, const void *m, unsigned long len); +/* get message digest */ +/* state is ruined after sum, keep a copy if multiple sum is needed */ +/* part of the message might be left in s, zero it if secrecy is needed */ +void sha1_sum(void *ctx, uint8_t md[SHA1_DIGEST_LENGTH]); diff --git a/util/sbase/sha1sum.1 b/util/sbase/sha1sum.1 new file mode 100644 index 00000000..62187135 --- /dev/null +++ b/util/sbase/sha1sum.1 @@ -0,0 +1,32 @@ +.Dd October 8, 2015 +.Dt SHA1SUM 1 +.Os sbase +.Sh NAME +.Nm sha1sum +.Nd compute or check SHA-1 message digests +.Sh SYNOPSIS +.Nm +.Op Fl c +.Op Ar file ... +.Sh DESCRIPTION +.Nm +writes SHA-1 (160-bit) checksums of each +.Ar file +to stdout. +If no +.Ar file +is given +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl c +Read list of SHA-1 checksums from each +.Ar file +and check them. +If no +.Ar file +is given +.Nm +reads from stdin. +.El diff --git a/util/sbase/sha1sum.c b/util/sbase/sha1sum.c new file mode 100644 index 00000000..cc8dcae9 --- /dev/null +++ b/util/sbase/sha1sum.c @@ -0,0 +1,45 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdint.h> +#include <stdio.h> + +#include "crypt.h" +#include "sha1.h" +#include "util.h" + +static struct sha1 s; +struct crypt_ops sha1_ops = { + sha1_init, + sha1_update, + sha1_sum, + &s, +}; + +static void +usage(void) +{ + eprintf("usage: %s [-c] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int ret = 0, (*cryptfunc)(int, char **, struct crypt_ops *, uint8_t *, size_t) = cryptmain; + uint8_t md[SHA1_DIGEST_LENGTH]; + + ARGBEGIN { + case 'b': + case 't': + /* ignore */ + break; + case 'c': + cryptfunc = cryptcheck; + break; + default: + usage(); + } ARGEND + + ret |= cryptfunc(argc, argv, &sha1_ops, md, sizeof(md)); + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/sha224.h b/util/sbase/sha224.h new file mode 100644 index 00000000..d7f40532 --- /dev/null +++ b/util/sbase/sha224.h @@ -0,0 +1,16 @@ +/* public domain sha224 implementation based on fips180-3 */ + +#include "sha256.h" + +#define sha224 sha256 /*struct*/ + +enum { SHA224_DIGEST_LENGTH = 28 }; + +/* reset state */ +void sha224_init(void *ctx); +/* process message */ +#define sha224_update sha256_update +/* get message digest */ +/* state is ruined after sum, keep a copy if multiple sum is needed */ +/* part of the message might be left in s, zero it if secrecy is needed */ +void sha224_sum(void *ctx, uint8_t md[SHA224_DIGEST_LENGTH]); diff --git a/util/sbase/sha224sum.1 b/util/sbase/sha224sum.1 new file mode 100644 index 00000000..42141a5f --- /dev/null +++ b/util/sbase/sha224sum.1 @@ -0,0 +1,32 @@ +.Dd February 24, 2016 +.Dt SHA224SUM 1 +.Os sbase +.Sh NAME +.Nm sha224sum +.Nd compute or check SHA-224 message digests +.Sh SYNOPSIS +.Nm +.Op Fl c +.Op Ar file ... +.Sh DESCRIPTION +.Nm +writes SHA-224 (224-bit) checksums of each +.Ar file +to stdout. +If no +.Ar file +is given +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl c +Read list of SHA-224 checksums from each +.Ar file +and check them. +If no +.Ar file +is given +.Nm +reads from stdin. +.El diff --git a/util/sbase/sha224sum.c b/util/sbase/sha224sum.c new file mode 100644 index 00000000..e9a10cf9 --- /dev/null +++ b/util/sbase/sha224sum.c @@ -0,0 +1,45 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdint.h> +#include <stdio.h> + +#include "crypt.h" +#include "sha224.h" +#include "util.h" + +static struct sha224 s; +struct crypt_ops sha224_ops = { + sha224_init, + sha224_update, + sha224_sum, + &s, +}; + +static void +usage(void) +{ + eprintf("usage: %s [-c] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int ret = 0, (*cryptfunc)(int, char **, struct crypt_ops *, uint8_t *, size_t) = cryptmain; + uint8_t md[SHA224_DIGEST_LENGTH]; + + ARGBEGIN { + case 'b': + case 't': + /* ignore */ + break; + case 'c': + cryptfunc = cryptcheck; + break; + default: + usage(); + } ARGEND + + ret |= cryptfunc(argc, argv, &sha224_ops, md, sizeof(md)); + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/sha256.h b/util/sbase/sha256.h new file mode 100644 index 00000000..5968b8e1 --- /dev/null +++ b/util/sbase/sha256.h @@ -0,0 +1,18 @@ +/* public domain sha256 implementation based on fips180-3 */ + +struct sha256 { + uint64_t len; /* processed message length */ + uint32_t h[8]; /* hash state */ + uint8_t buf[64]; /* message block buffer */ +}; + +enum { SHA256_DIGEST_LENGTH = 32 }; + +/* reset state */ +void sha256_init(void *ctx); +/* process message */ +void sha256_update(void *ctx, const void *m, unsigned long len); +/* get message digest */ +/* state is ruined after sum, keep a copy if multiple sum is needed */ +/* part of the message might be left in s, zero it if secrecy is needed */ +void sha256_sum(void *ctx, uint8_t md[SHA256_DIGEST_LENGTH]); diff --git a/util/sbase/sha256sum.1 b/util/sbase/sha256sum.1 new file mode 100644 index 00000000..1a9aeee9 --- /dev/null +++ b/util/sbase/sha256sum.1 @@ -0,0 +1,32 @@ +.Dd October 8, 2015 +.Dt SHA256SUM 1 +.Os sbase +.Sh NAME +.Nm sha256sum +.Nd compute or check SHA-256 message digests +.Sh SYNOPSIS +.Nm +.Op Fl c +.Op Ar file ... +.Sh DESCRIPTION +.Nm +writes SHA-256 (256-bit) checksums of each +.Ar file +to stdout. +If no +.Ar file +is given +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl c +Read list of SHA-256 checksums from each +.Ar file +and check them. +If no +.Ar file +is given +.Nm +reads from stdin. +.El diff --git a/util/sbase/sha256sum.c b/util/sbase/sha256sum.c new file mode 100644 index 00000000..686c70f0 --- /dev/null +++ b/util/sbase/sha256sum.c @@ -0,0 +1,45 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdint.h> +#include <stdio.h> + +#include "crypt.h" +#include "sha256.h" +#include "util.h" + +static struct sha256 s; +struct crypt_ops sha256_ops = { + sha256_init, + sha256_update, + sha256_sum, + &s, +}; + +static void +usage(void) +{ + eprintf("usage: %s [-c] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int ret = 0, (*cryptfunc)(int, char **, struct crypt_ops *, uint8_t *, size_t) = cryptmain; + uint8_t md[SHA256_DIGEST_LENGTH]; + + ARGBEGIN { + case 'b': + case 't': + /* ignore */ + break; + case 'c': + cryptfunc = cryptcheck; + break; + default: + usage(); + } ARGEND + + ret |= cryptfunc(argc, argv, &sha256_ops, md, sizeof(md)); + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/sha384.h b/util/sbase/sha384.h new file mode 100644 index 00000000..2ab9bc49 --- /dev/null +++ b/util/sbase/sha384.h @@ -0,0 +1,16 @@ +/* public domain sha512 implementation based on fips180-3 */ + +#include "sha512.h" + +#define sha384 sha512 /*struct*/ + +enum { SHA384_DIGEST_LENGTH = 48 }; + +/* reset state */ +void sha384_init(void *ctx); +/* process message */ +#define sha384_update sha512_update +/* get message digest */ +/* state is ruined after sum, keep a copy if multiple sum is needed */ +/* part of the message might be left in s, zero it if secrecy is needed */ +void sha384_sum(void *ctx, uint8_t md[SHA384_DIGEST_LENGTH]); diff --git a/util/sbase/sha384sum.1 b/util/sbase/sha384sum.1 new file mode 100644 index 00000000..a417ca96 --- /dev/null +++ b/util/sbase/sha384sum.1 @@ -0,0 +1,32 @@ +.Dd February 24, 2016 +.Dt SHA384SUM 1 +.Os sbase +.Sh NAME +.Nm sha384sum +.Nd compute or check SHA-384 message digests +.Sh SYNOPSIS +.Nm +.Op Fl c +.Op Ar file ... +.Sh DESCRIPTION +.Nm +writes SHA-384 (384-bit) checksums of each +.Ar file +to stdout. +If no +.Ar file +is given +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl c +Read list of SHA-384 checksums from each +.Ar file +and check them. +If no +.Ar file +is given +.Nm +reads from stdin. +.El diff --git a/util/sbase/sha384sum.c b/util/sbase/sha384sum.c new file mode 100644 index 00000000..c76947e6 --- /dev/null +++ b/util/sbase/sha384sum.c @@ -0,0 +1,45 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdint.h> +#include <stdio.h> + +#include "crypt.h" +#include "sha384.h" +#include "util.h" + +static struct sha384 s; +struct crypt_ops sha384_ops = { + sha384_init, + sha384_update, + sha384_sum, + &s, +}; + +static void +usage(void) +{ + eprintf("usage: %s [-c] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int ret = 0, (*cryptfunc)(int, char **, struct crypt_ops *, uint8_t *, size_t) = cryptmain; + uint8_t md[SHA384_DIGEST_LENGTH]; + + ARGBEGIN { + case 'b': + case 't': + /* ignore */ + break; + case 'c': + cryptfunc = cryptcheck; + break; + default: + usage(); + } ARGEND + + ret |= cryptfunc(argc, argv, &sha384_ops, md, sizeof(md)); + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/sha512-224.h b/util/sbase/sha512-224.h new file mode 100644 index 00000000..8364fc5f --- /dev/null +++ b/util/sbase/sha512-224.h @@ -0,0 +1,16 @@ +/* public domain sha512/224 implementation based on fips180-3 */ + +#include "sha512.h" + +#define sha512_224 sha512 /*struct*/ + +enum { SHA512_224_DIGEST_LENGTH = 28 }; + +/* reset state */ +void sha512_224_init(void *ctx); +/* process message */ +#define sha512_224_update sha512_update +/* get message digest */ +/* state is ruined after sum, keep a copy if multiple sum is needed */ +/* part of the message might be left in s, zero it if secrecy is needed */ +void sha512_224_sum(void *ctx, uint8_t md[SHA512_224_DIGEST_LENGTH]); diff --git a/util/sbase/sha512-224sum.1 b/util/sbase/sha512-224sum.1 new file mode 100644 index 00000000..89206950 --- /dev/null +++ b/util/sbase/sha512-224sum.1 @@ -0,0 +1,32 @@ +.Dd February 24, 2016 +.Dt SHA512-224SUM 1 +.Os sbase +.Sh NAME +.Nm sha512-224sum +.Nd compute or check SHA-512/224 message digests +.Sh SYNOPSIS +.Nm +.Op Fl c +.Op Ar file ... +.Sh DESCRIPTION +.Nm +writes SHA-512/224 (224-bit) checksums of each +.Ar file +to stdout. +If no +.Ar file +is given +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl c +Read list of SHA-512/224 checksums from each +.Ar file +and check them. +If no +.Ar file +is given +.Nm +reads from stdin. +.El diff --git a/util/sbase/sha512-224sum.c b/util/sbase/sha512-224sum.c new file mode 100644 index 00000000..53f2e625 --- /dev/null +++ b/util/sbase/sha512-224sum.c @@ -0,0 +1,45 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdint.h> +#include <stdio.h> + +#include "crypt.h" +#include "sha512-224.h" +#include "util.h" + +static struct sha512_224 s; +struct crypt_ops sha512_224_ops = { + sha512_224_init, + sha512_224_update, + sha512_224_sum, + &s, +}; + +static void +usage(void) +{ + eprintf("usage: %s [-c] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int ret = 0, (*cryptfunc)(int, char **, struct crypt_ops *, uint8_t *, size_t) = cryptmain; + uint8_t md[SHA512_224_DIGEST_LENGTH]; + + ARGBEGIN { + case 'b': + case 't': + /* ignore */ + break; + case 'c': + cryptfunc = cryptcheck; + break; + default: + usage(); + } ARGEND + + ret |= cryptfunc(argc, argv, &sha512_224_ops, md, sizeof(md)); + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/sha512-256.h b/util/sbase/sha512-256.h new file mode 100644 index 00000000..eb0b731d --- /dev/null +++ b/util/sbase/sha512-256.h @@ -0,0 +1,16 @@ +/* public domain sha512/256 implementation based on fips180-3 */ + +#include "sha512.h" + +#define sha512_256 sha512 /*struct*/ + +enum { SHA512_256_DIGEST_LENGTH = 32 }; + +/* reset state */ +void sha512_256_init(void *ctx); +/* process message */ +#define sha512_256_update sha512_update +/* get message digest */ +/* state is ruined after sum, keep a copy if multiple sum is needed */ +/* part of the message might be left in s, zero it if secrecy is needed */ +void sha512_256_sum(void *ctx, uint8_t md[SHA512_256_DIGEST_LENGTH]); diff --git a/util/sbase/sha512-256sum.1 b/util/sbase/sha512-256sum.1 new file mode 100644 index 00000000..98b8a098 --- /dev/null +++ b/util/sbase/sha512-256sum.1 @@ -0,0 +1,32 @@ +.Dd February 24, 2016 +.Dt SHA512-256SUM 1 +.Os sbase +.Sh NAME +.Nm sha512-256sum +.Nd compute or check SHA-512/256 message digests +.Sh SYNOPSIS +.Nm +.Op Fl c +.Op Ar file ... +.Sh DESCRIPTION +.Nm +writes SHA-512/256 (256-bit) checksums of each +.Ar file +to stdout. +If no +.Ar file +is given +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl c +Read list of SHA-512/256 checksums from each +.Ar file +and check them. +If no +.Ar file +is given +.Nm +reads from stdin. +.El diff --git a/util/sbase/sha512-256sum.c b/util/sbase/sha512-256sum.c new file mode 100644 index 00000000..ea556b8d --- /dev/null +++ b/util/sbase/sha512-256sum.c @@ -0,0 +1,45 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdint.h> +#include <stdio.h> + +#include "crypt.h" +#include "sha512-256.h" +#include "util.h" + +static struct sha512_256 s; +struct crypt_ops sha512_256_ops = { + sha512_256_init, + sha512_256_update, + sha512_256_sum, + &s, +}; + +static void +usage(void) +{ + eprintf("usage: %s [-c] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int ret = 0, (*cryptfunc)(int, char **, struct crypt_ops *, uint8_t *, size_t) = cryptmain; + uint8_t md[SHA512_256_DIGEST_LENGTH]; + + ARGBEGIN { + case 'b': + case 't': + /* ignore */ + break; + case 'c': + cryptfunc = cryptcheck; + break; + default: + usage(); + } ARGEND + + ret |= cryptfunc(argc, argv, &sha512_256_ops, md, sizeof(md)); + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/sha512.h b/util/sbase/sha512.h new file mode 100644 index 00000000..c761712a --- /dev/null +++ b/util/sbase/sha512.h @@ -0,0 +1,18 @@ +/* public domain sha512 implementation based on fips180-3 */ + +struct sha512 { + uint64_t len; /* processed message length */ + uint64_t h[8]; /* hash state */ + uint8_t buf[128]; /* message block buffer */ +}; + +enum { SHA512_DIGEST_LENGTH = 64 }; + +/* reset state */ +void sha512_init(void *ctx); +/* process message */ +void sha512_update(void *ctx, const void *m, unsigned long len); +/* get message digest */ +/* state is ruined after sum, keep a copy if multiple sum is needed */ +/* part of the message might be left in s, zero it if secrecy is needed */ +void sha512_sum(void *ctx, uint8_t md[SHA512_DIGEST_LENGTH]); diff --git a/util/sbase/sha512sum.1 b/util/sbase/sha512sum.1 new file mode 100644 index 00000000..14ef105f --- /dev/null +++ b/util/sbase/sha512sum.1 @@ -0,0 +1,32 @@ +.Dd October 8, 2015 +.Dt SHA512SUM 1 +.Os sbase +.Sh NAME +.Nm sha512sum +.Nd compute or check SHA-512 message digests +.Sh SYNOPSIS +.Nm +.Op Fl c +.Op Ar file ... +.Sh DESCRIPTION +.Nm +writes SHA-512 (512-bit) checksums of each +.Ar file +to stdout. +If no +.Ar file +is given +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl c +Read list of SHA-512 checksums from each +.Ar file +and check them. +If no +.Ar file +is given +.Nm +reads from stdin. +.El diff --git a/util/sbase/sha512sum.c b/util/sbase/sha512sum.c new file mode 100644 index 00000000..a76e685b --- /dev/null +++ b/util/sbase/sha512sum.c @@ -0,0 +1,45 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdint.h> +#include <stdio.h> + +#include "crypt.h" +#include "sha512.h" +#include "util.h" + +static struct sha512 s; +struct crypt_ops sha512_ops = { + sha512_init, + sha512_update, + sha512_sum, + &s, +}; + +static void +usage(void) +{ + eprintf("usage: %s [-c] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int ret = 0, (*cryptfunc)(int, char **, struct crypt_ops *, uint8_t *, size_t) = cryptmain; + uint8_t md[SHA512_DIGEST_LENGTH]; + + ARGBEGIN { + case 'b': + case 't': + /* ignore */ + break; + case 'c': + cryptfunc = cryptcheck; + break; + default: + usage(); + } ARGEND + + ret |= cryptfunc(argc, argv, &sha512_ops, md, sizeof(md)); + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/sleep.1 b/util/sbase/sleep.1 new file mode 100644 index 00000000..3c58fb95 --- /dev/null +++ b/util/sbase/sleep.1 @@ -0,0 +1,18 @@ +.Dd October 8, 2015 +.Dt SLEEP 1 +.Os sbase +.Sh NAME +.Nm sleep +.Nd wait for a number of seconds +.Sh SYNOPSIS +.Nm +.Ar num +.Sh DESCRIPTION +.Nm +waits for +.Ar num +seconds to elapse. +.Sh SEE ALSO +.Xr sleep 3 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/sleep.c b/util/sbase/sleep.c new file mode 100644 index 00000000..00ea2688 --- /dev/null +++ b/util/sbase/sleep.c @@ -0,0 +1,30 @@ +/* See LICENSE file for copyright and license details. */ +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s num\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + unsigned seconds; + + ARGBEGIN { + default: + usage(); + } ARGEND + + if (argc != 1) + usage(); + + seconds = estrtonum(argv[0], 0, UINT_MAX); + while ((seconds = sleep(seconds)) > 0) + ; + + return 0; +} diff --git a/util/sbase/sort.1 b/util/sbase/sort.1 new file mode 100644 index 00000000..f5a2121e --- /dev/null +++ b/util/sbase/sort.1 @@ -0,0 +1,98 @@ +.Dd February 17, 2016 +.Dt SORT 1 +.Os sbase +.Sh NAME +.Nm sort +.Nd sort lines +.Sh SYNOPSIS +.Nm +.Op Fl Cbcdfimnru +.Op Fl o Ar outfile +.Op Fl t Ar delim +.Op Fl k Ar key ... +.Op Ar file ... +.Sh DESCRIPTION +.Nm +writes the sorted concatenation of each +.Ar file +to stdout. +If no +.Ar file +is given +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl C +Check that the concatenation of the given +.Ar files +is sorted rather than sorting them. +In this mode, no output is printed to stdout, and the exit status +indicates the result of the check. +.It Fl b +Skip leading whitespace of columns when sorting. +.It Fl c +The same as +.Fl C +except that when disorder is detected, a message is written to stderr +indicating the location of the disorder. +.It Fl d +Skip non-whitespace and non-alphanumeric characters. +.It Fl f +Ignore letter case when sorting. +.It Fl i +Skip non-printable characters. +.It Fl k Ar key +Specify a key definition of the form +.Sm off +.Sy S +.No [. +.Sy s +.No ][ +.Sy f +.No ][ , +.Sy E +.No [. +.Sy e +.No ][ +.Sy f +.No ]] +.Sm on +where +.Sy S , s , E +and +.Sy e +are the starting column, starting character in that column, ending column and +the ending character of that column respectively. +If they are not specified, +.Sy s +refers to the first character of the specified starting column, +.Sy E +refers to the last column of every line, and +.Sy e +refers to the last character of the ending column. +.Sy f +can be used to specify options +.Sy ( n , b ) +that only apply to this key definition. +.Sy b +is special in that it only applies to the column that it was specified after. +.It Fl m +Assume sorted input, merge only. +.It Fl n +Perform a numeric sort. +.It Fl o Ar outfile +Write output to +.Ar outfile +rather than stdout. +.It Fl r +Reverses the sort. +.It Fl t Ar delim +Set +.Ar delim +as the field delimiter. +.It Fl u +Print equal lines only once. +.El +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/sort.c b/util/sbase/sort.c new file mode 100644 index 00000000..fbb1abfe --- /dev/null +++ b/util/sbase/sort.c @@ -0,0 +1,437 @@ +/* See LICENSE file for copyright and license details. */ +#include <ctype.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "queue.h" +#include "text.h" +#include "utf.h" +#include "util.h" + +struct keydef { + int start_column; + int end_column; + int start_char; + int end_char; + int flags; + TAILQ_ENTRY(keydef) entry; +}; + +struct column { + struct line line; + size_t cap; +}; + +enum { + MOD_N = 1 << 0, + MOD_STARTB = 1 << 1, + MOD_ENDB = 1 << 2, + MOD_R = 1 << 3, + MOD_D = 1 << 4, + MOD_F = 1 << 5, + MOD_I = 1 << 6, +}; + +static TAILQ_HEAD(kdhead, keydef) kdhead = TAILQ_HEAD_INITIALIZER(kdhead); + +static int Cflag = 0, cflag = 0, uflag = 0; +static char *fieldsep = NULL; +static size_t fieldseplen = 0; +static struct column col1, col2; + +static void +skipblank(struct line *a) +{ + while (a->len && (*(a->data) == ' ' || *(a->data) == '\t')) { + a->data++; + a->len--; + } +} + +static void +skipnonblank(struct line *a) +{ + while (a->len && (*(a->data) != '\n' && *(a->data) != ' ' && + *(a->data) != '\t')) { + a->data++; + a->len--; + } +} + +static void +skipcolumn(struct line *a, int skip_to_next_col) +{ + char *s; + + if (fieldsep) { + if ((s = memmem(a->data, a->len, fieldsep, fieldseplen))) { + if (skip_to_next_col) + s += fieldseplen; + a->len -= s - a->data; + a->data = s; + } else { + a->data += a->len - 1; + a->len = 1; + } + } else { + skipblank(a); + skipnonblank(a); + } +} + +static void +columns(struct line *line, const struct keydef *kd, struct column *col) +{ + Rune r; + struct line start, end; + size_t utflen, rlen; + int i; + + start.data = line->data; + start.len = line->len; + for (i = 1; i < kd->start_column; i++) + skipcolumn(&start, 1); + if (kd->flags & MOD_STARTB) + skipblank(&start); + for (utflen = 0; start.len > 1 && utflen < kd->start_char - 1;) { + rlen = chartorune(&r, start.data); + start.data += rlen; + start.len -= rlen; + utflen++; + } + + end.data = line->data; + end.len = line->len; + if (kd->end_column) { + for (i = 1; i < kd->end_column; i++) + skipcolumn(&end, 1); + if (kd->flags & MOD_ENDB) + skipblank(&end); + if (kd->end_char) { + for (utflen = 0; end.len > 1 && utflen < kd->end_char;) { + rlen = chartorune(&r, end.data); + end.data += rlen; + end.len -= rlen; + utflen++; + } + } else { + skipcolumn(&end, 0); + } + } else { + end.data += end.len - 1; + end.len = 1; + } + col->line.len = MAX(0, end.data - start.data); + if (!(col->line.data) || col->cap < col->line.len + 1) { + free(col->line.data); + col->line.data = emalloc(col->line.len + 1); + } + memcpy(col->line.data, start.data, col->line.len); + col->line.data[col->line.len] = '\0'; +} + +static int +skipmodcmp(struct line *a, struct line *b, int flags) +{ + Rune r1, r2; + size_t offa = 0, offb = 0; + + do { + offa += chartorune(&r1, a->data + offa); + offb += chartorune(&r2, b->data + offb); + + if (flags & MOD_D && flags & MOD_I) { + while (offa < a->len && ((!isblankrune(r1) && + !isalnumrune(r1)) || (!isprintrune(r1)))) + offa += chartorune(&r1, a->data + offa); + while (offb < b->len && ((!isblankrune(r2) && + !isalnumrune(r2)) || (!isprintrune(r2)))) + offb += chartorune(&r2, b->data + offb); + } + else if (flags & MOD_D) { + while (offa < a->len && !isblankrune(r1) && + !isalnumrune(r1)) + offa += chartorune(&r1, a->data + offa); + while (offb < b->len && !isblankrune(r2) && + !isalnumrune(r2)) + offb += chartorune(&r2, b->data + offb); + } + else if (flags & MOD_I) { + while (offa < a->len && !isprintrune(r1)) + offa += chartorune(&r1, a->data + offa); + while (offb < b->len && !isprintrune(r2)) + offb += chartorune(&r2, b->data + offb); + } + if (flags & MOD_F) { + r1 = toupperrune(r1); + r2 = toupperrune(r2); + } + } while (r1 && r1 == r2); + + return r1 - r2; +} + +static int +slinecmp(struct line *a, struct line *b) +{ + int res = 0; + double x, y; + struct keydef *kd; + + TAILQ_FOREACH(kd, &kdhead, entry) { + columns(a, kd, &col1); + columns(b, kd, &col2); + + /* if -u is given, don't use default key definition + * unless it is the only one */ + if (uflag && kd == TAILQ_LAST(&kdhead, kdhead) && + TAILQ_LAST(&kdhead, kdhead) != TAILQ_FIRST(&kdhead)) { + res = 0; + } else if (kd->flags & MOD_N) { + x = strtod(col1.line.data, NULL); + y = strtod(col2.line.data, NULL); + res = (x < y) ? -1 : (x > y); + } else if (kd->flags & (MOD_D | MOD_F | MOD_I)) { + res = skipmodcmp(&col1.line, &col2.line, kd->flags); + } else { + res = linecmp(&col1.line, &col2.line); + } + + if (kd->flags & MOD_R) + res = -res; + if (res) + break; + } + + return res; +} + +static int +check(FILE *fp, const char *fname) +{ + static struct line prev, cur, tmp; + static size_t prevsize, cursize, tmpsize; + ssize_t len; + + if (!prev.data) { + if ((len = getline(&prev.data, &prevsize, fp)) < 0) + eprintf("getline:"); + prev.len = len; + } + while ((len = getline(&cur.data, &cursize, fp)) > 0) { + cur.len = len; + if (uflag > slinecmp(&cur, &prev)) { + if (!Cflag) { + weprintf("disorder %s: ", fname); + fwrite(cur.data, 1, cur.len, stderr); + } + return 1; + } + tmp = cur; + tmpsize = cursize; + cur = prev; + cursize = prevsize; + prev = tmp; + prevsize = tmpsize; + } + + return 0; +} + +static int +parse_flags(char **s, int *flags, int bflag) +{ + while (isalpha((int)**s)) { + switch (*((*s)++)) { + case 'b': + *flags |= bflag; + break; + case 'd': + *flags |= MOD_D; + break; + case 'f': + *flags |= MOD_F; + break; + case 'i': + *flags |= MOD_I; + break; + case 'n': + *flags |= MOD_N; + break; + case 'r': + *flags |= MOD_R; + break; + default: + return -1; + } + } + + return 0; +} + +static void +addkeydef(char *kdstr, int flags) +{ + struct keydef *kd; + + kd = enmalloc(2, sizeof(*kd)); + + /* parse key definition kdstr with format + * start_column[.start_char][flags][,end_column[.end_char][flags]] + */ + kd->start_column = 1; + kd->start_char = 1; + kd->end_column = 0; /* 0 means end of line */ + kd->end_char = 0; /* 0 means end of column */ + kd->flags = flags; + + if ((kd->start_column = strtol(kdstr, &kdstr, 10)) < 1) + enprintf(2, "invalid start column in key definition\n"); + + if (*kdstr == '.') { + if ((kd->start_char = strtol(kdstr + 1, &kdstr, 10)) < 1) + enprintf(2, "invalid start character in key " + "definition\n"); + } + if (parse_flags(&kdstr, &kd->flags, MOD_STARTB) < 0) + enprintf(2, "invalid start flags in key definition\n"); + + if (*kdstr == ',') { + if ((kd->end_column = strtol(kdstr + 1, &kdstr, 10)) < 0) + enprintf(2, "invalid end column in key definition\n"); + if (*kdstr == '.') { + if ((kd->end_char = strtol(kdstr + 1, &kdstr, 10)) < 0) + enprintf(2, "invalid end character in key " + "definition\n"); + } + if (parse_flags(&kdstr, &kd->flags, MOD_ENDB) < 0) + enprintf(2, "invalid end flags in key definition\n"); + } + + if (*kdstr != '\0') + enprintf(2, "invalid key definition\n"); + + TAILQ_INSERT_TAIL(&kdhead, kd, entry); +} + +static void +usage(void) +{ + enprintf(2, "usage: %s [-Cbcdfimnru] [-o outfile] [-t delim] " + "[-k def]... [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + FILE *fp, *ofp = stdout; + struct linebuf linebuf = EMPTY_LINEBUF; + size_t i; + int global_flags = 0, ret = 0; + char *outfile = NULL; + + ARGBEGIN { + case 'C': + Cflag = 1; + break; + case 'b': + global_flags |= MOD_STARTB | MOD_ENDB; + break; + case 'c': + cflag = 1; + break; + case 'd': + global_flags |= MOD_D; + break; + case 'f': + global_flags |= MOD_F; + break; + case 'i': + global_flags |= MOD_I; + break; + case 'k': + addkeydef(EARGF(usage()), global_flags); + break; + case 'm': + /* more or less for free, but for performance-reasons, + * we should keep this flag in mind and maybe some later + * day implement it properly so we don't run out of memory + * while merging large sorted files. + */ + break; + case 'n': + global_flags |= MOD_N; + break; + case 'o': + outfile = EARGF(usage()); + break; + case 'r': + global_flags |= MOD_R; + break; + case 't': + fieldsep = EARGF(usage()); + if (!*fieldsep) + eprintf("empty delimiter\n"); + fieldseplen = unescape(fieldsep); + break; + case 'u': + uflag = 1; + break; + default: + usage(); + } ARGEND + + /* -b shall only apply to custom key definitions */ + if (TAILQ_EMPTY(&kdhead) && global_flags) + addkeydef("1", global_flags & ~(MOD_STARTB | MOD_ENDB)); + if (TAILQ_EMPTY(&kdhead) || (!Cflag && !cflag)) + addkeydef("1", global_flags & MOD_R); + + if (!argc) { + if (Cflag || cflag) { + if (check(stdin, "<stdin>") && !ret) + ret = 1; + } else { + getlines(stdin, &linebuf); + } + } else for (; *argv; argc--, argv++) { + if (!strcmp(*argv, "-")) { + *argv = "<stdin>"; + fp = stdin; + } else if (!(fp = fopen(*argv, "r"))) { + enprintf(2, "fopen %s:", *argv); + continue; + } + if (Cflag || cflag) { + if (check(fp, *argv) && !ret) + ret = 1; + } else { + getlines(fp, &linebuf); + } + if (fp != stdin && fshut(fp, *argv)) + ret = 2; + } + + if (!Cflag && !cflag) { + if (outfile && !(ofp = fopen(outfile, "w"))) + eprintf("fopen %s:", outfile); + + qsort(linebuf.lines, linebuf.nlines, sizeof(*linebuf.lines), + (int (*)(const void *, const void *))slinecmp); + + for (i = 0; i < linebuf.nlines; i++) { + if (!uflag || i == 0 || + slinecmp(&linebuf.lines[i], &linebuf.lines[i - 1])) { + fwrite(linebuf.lines[i].data, 1, + linebuf.lines[i].len, ofp); + } + } + } + + if (fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>") | + fshut(stderr, "<stderr>")) + ret = 2; + + return ret; +} diff --git a/util/sbase/split.1 b/util/sbase/split.1 new file mode 100644 index 00000000..63b3b521 --- /dev/null +++ b/util/sbase/split.1 @@ -0,0 +1,46 @@ +.Dd October 8, 2015 +.Dt SPLIT 1 +.Os sbase +.Sh NAME +.Nm split +.Nd split up a file +.Sh SYNOPSIS +.Nm +.Op Fl a Ar num +.Op Fl b Ar num[k|m|g] | Fl l Ar num +.Op Fl d +.Op Ar file Op Ar prefix +.Sh DESCRIPTION +.Nm +splits +.Ar file +into files with 1000 lines each, named with +.Ar prefix +"x" followed by 2-digit alphabetical count suffixes. +If +.Nm +runs out of suffixes, it stops after the last valid filename. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl a Ar num +Set suffix length to +.Ar num +characters. +The default is 2. +.It Fl b Ar num[k|m|g] | Fl l Ar num +Start a new file every +.Ar num +bytes | lines. +The units k, m, and g are case insensitive and powers of 2, not 10. +The default is 1000 lines. +.It Fl d +Use decimal rather than alphabetical suffixes. +.El +.Sh SEE ALSO +.Xr cat 1 +.Sh STANDARDS +POSIX.1-2013. +.Pp +The +.Op Fl d +flag and g unit are an extension to that specification. diff --git a/util/sbase/split.c b/util/sbase/split.c new file mode 100644 index 00000000..7033a284 --- /dev/null +++ b/util/sbase/split.c @@ -0,0 +1,111 @@ +/* See LICENSE file for copyright and license details. */ +#include <ctype.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "util.h" + +static int base = 26, start = 'a'; + +static int +itostr(char *str, int x, int n) +{ + str[n] = '\0'; + while (n-- > 0) { + str[n] = start + (x % base); + x /= base; + } + + return x ? -1 : 0; +} + +static FILE * +nextfile(FILE *f, char *buf, int plen, int slen) +{ + static int filecount = 0; + + if (f) + fshut(f, "<file>"); + if (itostr(buf + plen, filecount++, slen) < 0) + return NULL; + + if (!(f = fopen(buf, "w"))) + eprintf("'%s':", buf); + + return f; +} + +static void +usage(void) +{ + eprintf("usage: %s [-a num] [-b num[k|m|g] | -l num] [-d] " + "[file [prefix]]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + FILE *in = stdin, *out = NULL; + off_t size = 1000, n; + int ret = 0, ch, plen, slen = 2, always = 0; + char name[NAME_MAX + 1], *prefix = "x", *file = NULL; + + ARGBEGIN { + case 'a': + slen = estrtonum(EARGF(usage()), 0, INT_MAX); + break; + case 'b': + always = 1; + if ((size = parseoffset(EARGF(usage()))) < 0) + return 1; + if (!size) + eprintf("size needs to be positive\n"); + break; + case 'd': + base = 10; + start = '0'; + break; + case 'l': + always = 0; + size = estrtonum(EARGF(usage()), 1, MIN(LLONG_MAX, SSIZE_MAX)); + break; + default: + usage(); + } ARGEND + + if (*argv) + file = *argv++; + if (*argv) + prefix = *argv++; + if (*argv) + usage(); + + plen = strlen(prefix); + if (plen + slen > NAME_MAX) + eprintf("names cannot exceed %d bytes\n", NAME_MAX); + estrlcpy(name, prefix, sizeof(name)); + + if (file && strcmp(file, "-")) { + if (!(in = fopen(file, "r"))) + eprintf("fopen %s:", file); + } + + n = 0; + while ((ch = getc(in)) != EOF) { + if (!out || n >= size) { + if (!(out = nextfile(out, name, plen, slen))) + eprintf("fopen: %s:", name); + n = 0; + } + n += (always || ch == '\n'); + putc(ch, out); + } + + ret |= (in != stdin) && fshut(in, "<infile>"); + ret |= out && (out != stdout) && fshut(out, "<outfile>"); + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/sponge.1 b/util/sbase/sponge.1 new file mode 100644 index 00000000..9b668b42 --- /dev/null +++ b/util/sbase/sponge.1 @@ -0,0 +1,19 @@ +.Dd October 8, 2015 +.Dt SPONGE 1 +.Os sbase +.Sh NAME +.Nm sponge +.Nd soak up standard input and write to a file +.Sh SYNOPSIS +.Nm +.Ar file +.Sh DESCRIPTION +.Nm +reads stdin completely, then writes the saved contents to +.Ar file . +This makes it possible to easily create pipes which read from and write to +the same file. +.Pp +If +.Ar file +is a symbolic link, it writes to its destination instead. diff --git a/util/sbase/sponge.c b/util/sbase/sponge.c new file mode 100644 index 00000000..7a0b272b --- /dev/null +++ b/util/sbase/sponge.c @@ -0,0 +1,42 @@ +/* See LICENSE file for copyright and license details. */ +#include <fcntl.h> +#include <stdlib.h> +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s file\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + char tmp[] = "/tmp/sponge-XXXXXX"; + int fd, tmpfd; + + ARGBEGIN { + default: + usage(); + } ARGEND + + if (argc != 1) + usage(); + + if ((tmpfd = mkstemp(tmp)) < 0) + eprintf("mkstemp:"); + unlink(tmp); + if (concat(0, "<stdin>", tmpfd, "<tmpfile>") < 0) + return 1; + if (lseek(tmpfd, 0, SEEK_SET) < 0) + eprintf("lseek:"); + + if ((fd = creat(argv[0], 0666)) < 0) + eprintf("creat %s:", argv[0]); + if (concat(tmpfd, "<tmpfile>", fd, argv[0]) < 0) + return 1; + + return 0; +} diff --git a/util/sbase/strings.1 b/util/sbase/strings.1 new file mode 100644 index 00000000..c7bed734 --- /dev/null +++ b/util/sbase/strings.1 @@ -0,0 +1,50 @@ +.Dd October 8, 2015 +.Dt STRINGS 1 +.Os sbase +.Sh NAME +.Nm strings +.Nd print strings of printable characters in files +.Sh SYNOPSIS +.Nm +.Op Fl a +.Op Fl n Ar num +.Op Fl t Ar format +.Op Ar file ... +.Sh DESCRIPTION +.Nm +writes sequences of at least 4 printable characters in each +.Ar file +to stdout. +If no +.Ar file +is given, +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl a +Scan each +.Ar file +entirely. +This is the default. +.It Fl n Ar num +Print sequences of at least +.Ar num +characters. +The default is 4. +.It Fl t Ar format +Prepend each string with its byte offset, with +.Ar format +being one of +.Sy d , o , x +for decimal, octal or hexadecimal numbers. +.El +.Sh STANDARDS +POSIX.1-2013. +.Pp +The +.Op Fl t +output format has been changed from "%F %s" to "%8lF: %s", with +.Sy F +being one of +.Sy d , o , x . diff --git a/util/sbase/strings.c b/util/sbase/strings.c new file mode 100644 index 00000000..8f5a1540 --- /dev/null +++ b/util/sbase/strings.c @@ -0,0 +1,98 @@ +/* See LICENSE file for copyright and license details. */ +#include <limits.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "utf.h" +#include "util.h" + +static char *format = ""; + +static void +strings(FILE *fp, const char *fname, size_t min) +{ + Rune r, *rbuf; + size_t i, bread; + off_t off; + + rbuf = ereallocarray(NULL, min, sizeof(*rbuf)); + + for (off = 0, i = 0; (bread = efgetrune(&r, fp, fname)); ) { + off += bread; + if (r == Runeerror) + continue; + if (!isprintrune(r)) { + if (i == min) + putchar('\n'); + i = 0; + continue; + } + if (i == min) { + efputrune(&r, stdout, "<stdout>"); + continue; + } + rbuf[i++] = r; + if (i < min) + continue; + printf(format, (long)off - i); + for (i = 0; i < min; i++) + efputrune(rbuf + i, stdout, "<stdout>"); + } + free(rbuf); +} + +static void +usage(void) +{ + eprintf("usage: %s [-a] [-n num] [-t format] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + FILE *fp; + size_t min = 4; + int ret = 0; + char f; + + ARGBEGIN { + case 'a': + break; + case 'n': + min = estrtonum(EARGF(usage()), 1, LLONG_MAX); + break; + case 't': + format = estrdup("%8l#: "); + f = *EARGF(usage()); + if (f == 'd' || f == 'o' || f == 'x') + format[3] = f; + else + usage(); + break; + default: + usage(); + } ARGEND + + if (!argc) { + strings(stdin, "<stdin>", min); + } else { + for (; *argv; argc--, argv++) { + if (!strcmp(*argv, "-")) { + *argv = "<stdin>"; + fp = stdin; + } else if (!(fp = fopen(*argv, "r"))) { + weprintf("fopen %s:", *argv); + ret = 1; + continue; + } + strings(fp, *argv, min); + if (fp != stdin && fshut(fp, *argv)) + ret = 1; + } + } + + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/sync.1 b/util/sbase/sync.1 new file mode 100644 index 00000000..85f4526e --- /dev/null +++ b/util/sbase/sync.1 @@ -0,0 +1,17 @@ +.Dd October 8, 2015 +.Dt SYNC 1 +.Os sbase +.Sh NAME +.Nm sync +.Nd flush disk cache +.Sh SYNOPSIS +.Nm +.Sh DESCRIPTION +.Nm +invokes +.Xr sync 2 +to flush all unwritten changes to disk. +This is usually done before shutting down, rebooting or halting. +.Sh SEE ALSO +.Xr fsync 2 , +.Xr sync 2 diff --git a/util/sbase/sync.c b/util/sbase/sync.c new file mode 100644 index 00000000..f1b98183 --- /dev/null +++ b/util/sbase/sync.c @@ -0,0 +1,25 @@ +/* See LICENSE file for copyright and license details. */ +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + ARGBEGIN { + default: + usage(); + } ARGEND + + if (argc) + usage(); + sync(); + + return 0; +} diff --git a/util/sbase/tail.1 b/util/sbase/tail.1 new file mode 100644 index 00000000..c425aacf --- /dev/null +++ b/util/sbase/tail.1 @@ -0,0 +1,51 @@ +.Dd October 8, 2015 +.Dt TAIL 1 +.Os sbase +.Sh NAME +.Nm tail +.Nd display final lines of files +.Sh SYNOPSIS +.Nm +.Op Fl f +.Op Fl c Ar num | Fl m Ar num | Fl n Ar num | Fl Ns Ar num +.Op Ar file ... +.Sh DESCRIPTION +.Nm +writes the last 10 lines of each +.Ar file +to stdout. +If no +.Ar file +is given, +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl c Ar num | Fl m Ar num | Fl n Ar num | Fl Ns Ar num +Display final +.Ar num +bytes | characters | lines | lines. +If +.Ar num +begins with '+' +it is an offset from the beginning of each +.Ar file . +If +.Ar num +begins with '-' it is as if no sign was given. +The default is 10 lines. +.It Fl f +If one +.Ar file +is specified, append lines to output as +.Ar file +grows. +.El +.Sh SEE ALSO +.Xr head 1 +.Sh STANDARDS +POSIX.1-2013. +.Pp +The +.Op Fl Ns Ar num +syntax is an extension to that specification. diff --git a/util/sbase/tail.c b/util/sbase/tail.c new file mode 100644 index 00000000..bbc5ad58 --- /dev/null +++ b/util/sbase/tail.c @@ -0,0 +1,229 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> + +#include <fcntl.h> +#include <unistd.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + +#include "utf.h" +#include "util.h" + +static char mode = 'n'; + +static int +dropinit(int fd, const char *fname, size_t count) +{ + Rune r; + char buf[BUFSIZ], *p; + ssize_t n; + int nr; + + if (count < 2) + goto copy; + count--; /* numbering starts at 1 */ + while (count && (n = read(fd, buf, sizeof(buf))) > 0) { + switch (mode) { + case 'n': /* lines */ + for (p = buf; count && n > 0; p++, n--) { + if (*p == '\n') + count--; + } + break; + case 'c': /* bytes */ + if (count > n) { + count -= n; + } else { + p = buf + count; + n -= count; + count = 0; + } + break; + case 'm': /* runes */ + for (p = buf; count && n > 0; p += nr, n -= nr, count--) { + nr = charntorune(&r, p, n); + if (!nr) { + /* we don't have a full rune, move + * remaining data to beginning and read + * again */ + memmove(buf, p, n); + break; + } + } + break; + } + } + if (count) { + if (n < 0) + weprintf("read %s:", fname); + if (n <= 0) + return n; + } + + /* write the rest of the buffer */ + if (writeall(1, p, n) < 0) + eprintf("write:"); +copy: + switch (concat(fd, fname, 1, "<stdout>")) { + case -1: /* read error */ + return -1; + case -2: /* write error */ + exit(1); + default: + return 0; + } +} + +static int +taketail(int fd, const char *fname, size_t count) +{ + static char *buf = NULL; + static size_t size = 0; + char *p; + size_t len = 0, left; + ssize_t n; + + if (!count) + return 0; + for (;;) { + if (len + BUFSIZ > size) { + /* make sure we have at least BUFSIZ to read */ + size += 2 * BUFSIZ; + buf = erealloc(buf, size); + } + n = read(fd, buf + len, size - len); + if (n < 0) { + weprintf("read %s:", fname); + return -1; + } + if (n == 0) + break; + len += n; + switch (mode) { + case 'n': /* lines */ + /* ignore the last character; if it is a newline, it + * ends the last line */ + for (p = buf + len - 2, left = count; p >= buf; p--) { + if (*p != '\n') + continue; + left--; + if (!left) { + p++; + break; + } + } + break; + case 'c': /* bytes */ + p = count < len ? buf + len - count : buf; + break; + case 'm': /* runes */ + for (p = buf + len - 1, left = count; p >= buf; p--) { + /* skip utf-8 continuation bytes */ + if (UTF8_POINT(*p)) + continue; + left--; + if (!left) + break; + } + break; + } + if (p > buf) { + len -= p - buf; + memmove(buf, p, len); + } + } + if (writeall(1, buf, len) < 0) + eprintf("write:"); + return 0; +} + +static void +usage(void) +{ + eprintf("usage: %s [-f] [-c num | -m num | -n num | -num] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + struct stat st1, st2; + int fd; + size_t n = 10; + int fflag = 0, ret = 0, newline = 0, many = 0; + char *numstr; + int (*tail)(int, const char *, size_t) = taketail; + + ARGBEGIN { + case 'f': + fflag = 1; + break; + case 'c': + case 'm': + case 'n': + mode = ARGC(); + numstr = EARGF(usage()); + n = MIN(llabs(estrtonum(numstr, LLONG_MIN + 1, + MIN(LLONG_MAX, SIZE_MAX))), SIZE_MAX); + if (strchr(numstr, '+')) + tail = dropinit; + break; + ARGNUM: + n = ARGNUMF(); + break; + default: + usage(); + } ARGEND + + if (!argc) { + if (tail(0, "<stdin>", n) < 0) + ret = 1; + } else { + if ((many = argc > 1) && fflag) + usage(); + for (newline = 0; *argv; argc--, argv++) { + if (!strcmp(*argv, "-")) { + *argv = "<stdin>"; + fd = 0; + } else if ((fd = open(*argv, O_RDONLY)) < 0) { + weprintf("open %s:", *argv); + ret = 1; + continue; + } + if (many) + printf("%s==> %s <==\n", newline ? "\n" : "", *argv); + if (fstat(fd, &st1) < 0) + eprintf("fstat %s:", *argv); + if (!(S_ISFIFO(st1.st_mode) || S_ISREG(st1.st_mode))) + fflag = 0; + newline = 1; + if (tail(fd, *argv, n) < 0) { + ret = 1; + fflag = 0; + } + + if (!fflag) { + if (fd != 0) + close(fd); + continue; + } + for (;;) { + if (concat(fd, *argv, 1, "<stdout>") < 0) + exit(1); + if (fstat(fd, &st2) < 0) + eprintf("fstat %s:", *argv); + if (st2.st_size < st1.st_size) { + fprintf(stderr, "%s: file truncated\n", *argv); + if (lseek(fd, SEEK_SET, 0) < 0) + eprintf("lseek:"); + } + st1 = st2; + sleep(1); + } + } + } + + return ret; +} diff --git a/util/sbase/tar.1 b/util/sbase/tar.1 new file mode 100644 index 00000000..bcc07c21 --- /dev/null +++ b/util/sbase/tar.1 @@ -0,0 +1,76 @@ +.Dd October 8, 2015 +.Dt TAR 1 +.Os sbase +.Sh NAME +.Nm tar +.Nd create, list or extract a tape archive +.Sh SYNOPSIS +.Nm +.Cm x | Cm t | Fl x | Fl t +.Op Fl C Ar dir +.Op Fl J | Fl Z | Fl a | Fl j | Fl z +.Op Fl m +.Op Fl p +.Op Fl f Ar file +.Op Ar file ... +.Nm +.Cm c | Fl c Op Fl C Ar dir +.Op Fl J | Fl Z | Fl a | Fl j | Fl z +.Op Fl h +.Ar path ... +.Op Fl f Ar file +.Sh DESCRIPTION +.Nm +is the standard file archiver. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl c Ar path ... +Create archive from +.Ar path . +.It Fl C Ar dir +Change directory to +.Ar dir +before beginning. +.It Fl f Ar file +Set +.Ar file +as input | output archive instead of stdin | stdout. +If '-', stdin | stdout is used. +.It Fl m +Do not preserve modification time. +.It Fl t +List all files in the archive. +.It Fl x +Extract archive. +.It Fl h +Always dereference symbolic links while recursively traversing directories. +.It Fl J | Fl Z | Fl a | Fl j | Fl z +Use xz | compress | lzma | bzip2 | gzip compression or decompression. +These utilities must be installed separately. +Using these flags is discouraged in favour of the flexibility +and clarity of pipes: +.Bd -literal -offset indent +$ bzip2 -cd archive.tar.bz2 | tar -x +$ gzip -cd archive.tar.gz | tar -x +.Ed +.Bd -literal -offset indent +$ tar -c file ... | bzip2 > archive.tar.bz2 +$ tar -c file ... | gzip2 > archive.tar.gz +.Ed +.El +.Sh SEE ALSO +.Xr ar 1 , +.Xr bzip2 1 , +.Xr gzip 1 +.Sh STANDARDS +The +.Nm +utility is compliant with the UStar (Uniform Standard Tape ARchive) +format defined in the +.St -p1003.1-88 +specification. +For long file paths (>99 bytes), the UStar, 'L' and 'x' header formats are +supported for reading (to a maximum size of PATH_MAX or 255 bytes, depending on +format), and the 'L' format is supported for writing (with unlimited path +size). +Link targets are limited to the UStar maximum of 100 bytes. diff --git a/util/sbase/tar.c b/util/sbase/tar.c new file mode 100644 index 00000000..4d44ec06 --- /dev/null +++ b/util/sbase/tar.c @@ -0,0 +1,662 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> +#include <sys/time.h> +#include <sys/types.h> +#ifndef major +#include <sys/sysmacros.h> +#endif + +#include <assert.h> +#include <errno.h> +#include <fcntl.h> +#include <grp.h> +#include <libgen.h> +#include <pwd.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + +#include "fs.h" +#include "util.h" + +#define BLKSIZ (sizeof (struct header)) /* must equal 512 bytes */ + +enum Type { + REG = '0', + AREG = '\0', + HARDLINK = '1', + SYMLINK = '2', + CHARDEV = '3', + BLOCKDEV = '4', + DIRECTORY = '5', + FIFO = '6', + RESERVED = '7' +}; + +struct header { + char name[100]; + char mode[8]; + char uid[8]; + char gid[8]; + char size[12]; + char mtime[12]; + char chksum[8]; + char type; + char linkname[100]; + char magic[6]; + char version[2]; + char uname[32]; + char gname[32]; + char major[8]; + char minor[8]; + char prefix[155]; + char padding[12]; +}; + +static struct dirtime { + char *name; + time_t mtime; +} *dirtimes; + +static size_t dirtimeslen; + +static int tarfd; +static ino_t tarinode; +static dev_t tardev; + +static int mflag, vflag; +static int filtermode; +static const char *filtertool; + +static const char *filtertools[] = { + ['J'] = "xz", + ['Z'] = "compress", + ['a'] = "lzma", + ['j'] = "bzip2", + ['z'] = "gzip", +}; + +static void +pushdirtime(char *name, time_t mtime) +{ + dirtimes = ereallocarray(dirtimes, dirtimeslen + 1, sizeof(*dirtimes)); + dirtimes[dirtimeslen].name = estrdup(name); + dirtimes[dirtimeslen].mtime = mtime; + dirtimeslen++; +} + +static struct dirtime * +popdirtime(void) +{ + if (dirtimeslen) { + dirtimeslen--; + return &dirtimes[dirtimeslen]; + } + return NULL; +} + +static int +comp(int fd, const char *tool, const char *flags) +{ + int fds[2]; + + if (pipe(fds) < 0) + eprintf("pipe:"); + + switch (fork()) { + case -1: + eprintf("fork:"); + case 0: + dup2(fd, 1); + dup2(fds[0], 0); + close(fds[0]); + close(fds[1]); + + execlp(tool, tool, flags, NULL); + weprintf("execlp %s:", tool); + _exit(1); + } + close(fds[0]); + return fds[1]; +} + +static int +decomp(int fd, const char *tool, const char *flags) +{ + int fds[2]; + + if (pipe(fds) < 0) + eprintf("pipe:"); + + switch (fork()) { + case -1: + eprintf("fork:"); + case 0: + dup2(fd, 0); + dup2(fds[1], 1); + close(fds[0]); + close(fds[1]); + + execlp(tool, tool, flags, NULL); + weprintf("execlp %s:", tool); + _exit(1); + } + close(fds[1]); + return fds[0]; +} + +static ssize_t +eread(int fd, void *buf, size_t n) +{ + ssize_t r; + +again: + r = read(fd, buf, n); + if (r < 0) { + if (errno == EINTR) + goto again; + eprintf("read:"); + } + return r; +} + +static ssize_t +ewrite(int fd, const void *buf, size_t n) +{ + ssize_t r; + + if ((r = write(fd, buf, n)) != n) + eprintf("write:"); + return r; +} + +static unsigned +chksum(struct header *h) +{ + unsigned sum, i; + + memset(h->chksum, ' ', sizeof(h->chksum)); + for (i = 0, sum = 0, assert(BLKSIZ == 512); i < BLKSIZ; i++) + sum += *((unsigned char *)h + i); + return sum; +} + +static void +putoctal(char *dst, unsigned num, int size) +{ + if (snprintf(dst, size, "%.*o", size - 1, num) >= size) + eprintf("putoctal: input number '%o' too large\n", num); +} + +static int +archive(const char *path) +{ + static const struct header blank = { + "././@LongLink", "0000600", "0000000", "0000000", "00000000000", + "00000000000" , " ", AREG , "" , "ustar", "00", + }; + char b[BLKSIZ + BLKSIZ], *p; + struct header *h = (struct header *)b; + struct group *gr; + struct passwd *pw; + struct stat st; + ssize_t l, n, r; + int fd = -1; + + if (lstat(path, &st) < 0) { + weprintf("lstat %s:", path); + return 0; + } else if (st.st_ino == tarinode && st.st_dev == tardev) { + weprintf("ignoring %s\n", path); + return 0; + } + pw = getpwuid(st.st_uid); + gr = getgrgid(st.st_gid); + + *h = blank; + n = strlcpy(h->name, path, sizeof(h->name)); + if (n >= sizeof(h->name)) { + *++h = blank; + h->type = 'L'; + putoctal(h->size, n, sizeof(h->size)); + putoctal(h->chksum, chksum(h), sizeof(h->chksum)); + ewrite(tarfd, (char *)h, BLKSIZ); + + for (p = (char *)path; n > 0; n -= BLKSIZ, p += BLKSIZ) { + if (n < BLKSIZ) { + p = memcpy(h--, p, n); + memset(p + n, 0, BLKSIZ - n); + } + ewrite(tarfd, p, BLKSIZ); + } + } + + putoctal(h->mode, (unsigned)st.st_mode & 0777, sizeof(h->mode)); + putoctal(h->uid, (unsigned)st.st_uid, sizeof(h->uid)); + putoctal(h->gid, (unsigned)st.st_gid, sizeof(h->gid)); + putoctal(h->mtime, (unsigned)st.st_mtime, sizeof(h->mtime)); + estrlcpy(h->uname, pw ? pw->pw_name : "", sizeof(h->uname)); + estrlcpy(h->gname, gr ? gr->gr_name : "", sizeof(h->gname)); + + if (S_ISREG(st.st_mode)) { + h->type = REG; + putoctal(h->size, st.st_size, sizeof(h->size)); + fd = open(path, O_RDONLY); + if (fd < 0) + eprintf("open %s:", path); + } else if (S_ISDIR(st.st_mode)) { + h->type = DIRECTORY; + } else if (S_ISLNK(st.st_mode)) { + h->type = SYMLINK; + if ((r = readlink(path, h->linkname, sizeof(h->linkname) - 1)) < 0) + eprintf("readlink %s:", path); + h->linkname[r] = '\0'; + } else if (S_ISCHR(st.st_mode) || S_ISBLK(st.st_mode)) { + h->type = S_ISCHR(st.st_mode) ? CHARDEV : BLOCKDEV; + putoctal(h->major, (unsigned)major(st.st_dev), sizeof(h->major)); + putoctal(h->minor, (unsigned)minor(st.st_dev), sizeof(h->minor)); + } else if (S_ISFIFO(st.st_mode)) { + h->type = FIFO; + } + + putoctal(h->chksum, chksum(h), sizeof(h->chksum)); + ewrite(tarfd, b, BLKSIZ); + + if (fd != -1) { + while ((l = eread(fd, b, BLKSIZ)) > 0) { + if (l < BLKSIZ) + memset(b + l, 0, BLKSIZ - l); + ewrite(tarfd, b, BLKSIZ); + } + close(fd); + } + + return 0; +} + +static int +unarchive(char *fname, ssize_t l, char b[BLKSIZ]) +{ + struct header *h = (struct header *)b; + struct timespec times[2]; + char lname[101], *tmp, *p; + long mode, major, minor, type, mtime, uid, gid; + int fd = -1, lnk = h->type == SYMLINK; + + if (!mflag && ((mtime = strtol(h->mtime, &p, 8)) < 0 || *p != '\0')) + eprintf("strtol %s: invalid mtime\n", h->mtime); + if (strcmp(fname, ".") && strcmp(fname, "./") && remove(fname) < 0) + if (errno != ENOENT) weprintf("remove %s:", fname); + + tmp = estrdup(fname); + mkdirp(dirname(tmp), 0777, 0777); + free(tmp); + + switch (h->type) { + case REG: + case AREG: + case RESERVED: + if ((mode = strtol(h->mode, &p, 8)) < 0 || *p != '\0') + eprintf("strtol %s: invalid mode\n", h->mode); + fd = open(fname, O_WRONLY | O_TRUNC | O_CREAT, 0600); + if (fd < 0) + eprintf("open %s:", fname); + break; + case HARDLINK: + case SYMLINK: + snprintf(lname, sizeof(lname), "%.*s", (int)sizeof(h->linkname), + h->linkname); + if ((lnk ? symlink:link)(lname, fname) < 0) + eprintf("%s %s -> %s:", lnk ? "symlink":"link", fname, lname); + lnk++; + break; + case DIRECTORY: + if ((mode = strtol(h->mode, &p, 8)) < 0 || *p != '\0') + eprintf("strtol %s: invalid mode\n", h->mode); + if (mkdir(fname, (mode_t)mode) < 0 && errno != EEXIST) + eprintf("mkdir %s:", fname); + pushdirtime(fname, mtime); + break; + case CHARDEV: + case BLOCKDEV: + if ((mode = strtol(h->mode, &p, 8)) < 0 || *p != '\0') + eprintf("strtol %s: invalid mode\n", h->mode); + if ((major = strtol(h->major, &p, 8)) < 0 || *p != '\0') + eprintf("strtol %s: invalid major device\n", h->major); + if ((minor = strtol(h->minor, &p, 8)) < 0 || *p != '\0') + eprintf("strtol %s: invalid minor device\n", h->minor); + type = (h->type == CHARDEV) ? S_IFCHR : S_IFBLK; + if (mknod(fname, type | mode, makedev(major, minor)) < 0) + eprintf("mknod %s:", fname); + break; + case FIFO: + if ((mode = strtol(h->mode, &p, 8)) < 0 || *p != '\0') + eprintf("strtol %s: invalid mode\n", h->mode); + if (mknod(fname, S_IFIFO | mode, 0) < 0) + eprintf("mknod %s:", fname); + break; + default: + eprintf("unsupported tar-filetype %c\n", h->type); + } + + if ((uid = strtol(h->uid, &p, 8)) < 0 || *p != '\0') + eprintf("strtol %s: invalid uid\n", h->uid); + if ((gid = strtol(h->gid, &p, 8)) < 0 || *p != '\0') + eprintf("strtol %s: invalid gid\n", h->gid); + + if (fd != -1) { + for (; l > 0; l -= BLKSIZ) + if (eread(tarfd, b, BLKSIZ) > 0) + ewrite(fd, b, MIN(l, BLKSIZ)); + close(fd); + } + + if (lnk == 1) + return 0; + + times[0].tv_sec = times[1].tv_sec = mtime; + times[0].tv_nsec = times[1].tv_nsec = 0; + if (!mflag && utimensat(AT_FDCWD, fname, times, AT_SYMLINK_NOFOLLOW) < 0) + weprintf("utimensat %s:", fname); + if (lnk) { + if (!getuid() && lchown(fname, uid, gid)) + weprintf("lchown %s:", fname); + } else { + if (!getuid() && chown(fname, uid, gid)) + weprintf("chown %s:", fname); + if (chmod(fname, mode) < 0) + eprintf("fchmod %s:", fname); + } + + return 0; +} + +static void +skipblk(ssize_t l) +{ + char b[BLKSIZ]; + + for (; l > 0; l -= BLKSIZ) + if (!eread(tarfd, b, BLKSIZ)) + break; +} + +static int +print(char *fname, ssize_t l, char b[BLKSIZ]) +{ + puts(fname); + skipblk(l); + return 0; +} + +static void +c(int dirfd, const char *name, struct stat *st, void *data, struct recursor *r) +{ + archive(r->path); + if (vflag) + puts(r->path); + + if (S_ISDIR(st->st_mode)) + recurse(dirfd, name, NULL, r); +} + +static void +sanitize(struct header *h) +{ + size_t i, j, l; + struct { + char *f; + size_t l; + } fields[] = { + { h->mode, sizeof(h->mode) }, + { h->uid, sizeof(h->uid) }, + { h->gid, sizeof(h->gid) }, + { h->size, sizeof(h->size) }, + { h->mtime, sizeof(h->mtime) }, + { h->chksum, sizeof(h->chksum) }, + { h->major, sizeof(h->major) }, + { h->minor, sizeof(h->minor) } + }; + + /* Numeric fields can be terminated with spaces instead of + * NULs as per the ustar specification. Patch all of them to + * use NULs so we can perform string operations on them. */ + for (i = 0; i < LEN(fields); i++){ + j = 0, l = fields[i].l - 1; + for (; j < l && fields[i].f[j] == ' '; j++); + for (; j <= l; j++) + if (fields[i].f[j] == ' ') + fields[i].f[j] = '\0'; + if (fields[i].f[l]) + eprintf("numeric field #%d (%.*s) is not null or space terminated\n", + i, l+1, fields[i].f); + } +} + +static void +chktar(struct header *h) +{ + const char *reason; + char tmp[sizeof h->chksum], *err; + long sum, i; + + if (h->prefix[0] == '\0' && h->name[0] == '\0') { + reason = "empty filename"; + goto bad; + } + if (h->magic[0] && strncmp("ustar", h->magic, 5)) { + reason = "not ustar format"; + goto bad; + } + memcpy(tmp, h->chksum, sizeof(tmp)); + for (i = sizeof(tmp)-1; i > 0 && tmp[i] == ' '; i--) { + tmp[i] = '\0'; + } + sum = strtol(tmp, &err, 8); + if (sum < 0 || sum >= BLKSIZ*256 || *err != '\0') { + reason = "invalid checksum"; + goto bad; + } + if (sum != chksum(h)) { + reason = "incorrect checksum"; + goto bad; + } + memcpy(h->chksum, tmp, sizeof(tmp)); + return; +bad: + eprintf("malformed tar archive: %s\n", reason); +} + +static void +xt(int argc, char *argv[], int mode) +{ + long size, l; + char b[BLKSIZ], fname[l = PATH_MAX + 1], *p, *q = NULL; + int i, m, n; + int (*fn)(char *, ssize_t, char[BLKSIZ]) = (mode == 'x') ? unarchive : print; + struct timespec times[2]; + struct header *h = (struct header *)b; + struct dirtime *dirtime; + + while (eread(tarfd, b, BLKSIZ) > 0 && (h->name[0] || h->prefix[0])) { + chktar(h); + sanitize(h); + + if ((size = strtol(h->size, &p, 8)) < 0 || *p != '\0') + eprintf("strtol %s: invalid size\n", h->size); + + /* Long file path is read directly into fname*/ + if (h->type == 'L' || h->type == 'x' || h->type == 'g') { + + /* Read header only up to size of fname buffer */ + for (q = fname; q < fname+size; q += BLKSIZ) { + if (q + BLKSIZ >= fname + l) + eprintf("name exceeds buffer: %.*s\n", q-fname, fname); + eread(tarfd, q, BLKSIZ); + } + + /* Convert pax x header with 'path=' field into L header */ + if (h->type == 'x') for (q = fname; q < fname+size-16; q += n) { + if ((n = strtol(q, &p, 10)) < 0 || *p != ' ') + eprintf("strtol %.*s: invalid number\n", p+1-q, q); + if (n && strncmp(p+1, "path=", 5) == 0) { + memmove(fname, p+6, size = q+n - p-6 - 1); + h->type = 'L'; + break; + } + } + fname[size] = '\0'; + + /* Non L-like header (eg. pax 'g') is skipped by setting q=null */ + if (h->type != 'L') + q = NULL; + continue; + } + + /* Ustar path is copied into fname if no L header (ie: q is NULL) */ + if (!q) { + m = sizeof h->prefix, n = sizeof h->name; + p = "/" + !h->prefix[0]; + snprintf(fname, l, "%.*s%s%.*s", m, h->prefix, p, n, h->name); + } + q = NULL; + + /* If argc > 0 then only extract the given files/dirs */ + if (argc) { + for (i = 0; i < argc; i++) { + if (strncmp(argv[i], fname, n = strlen(argv[i])) == 0) + if (strchr("/", fname[n]) || argv[i][n-1] == '/') + break; + } + if (i == argc) { + skipblk(size); + continue; + } + } + + fn(fname, size, b); + if (vflag && mode != 't') + puts(fname); + } + + if (mode == 'x' && !mflag) { + while ((dirtime = popdirtime())) { + times[0].tv_sec = times[1].tv_sec = dirtime->mtime; + times[0].tv_nsec = times[1].tv_nsec = 0; + if (utimensat(AT_FDCWD, dirtime->name, times, 0) < 0) + eprintf("utimensat %s:", fname); + free(dirtime->name); + } + free(dirtimes); + dirtimes = NULL; + } +} + +char **args; +int argn; + +static void +usage(void) +{ + eprintf("usage: %s [x | t | -x | -t] [-C dir] [-J | -Z | -a | -j | -z] [-m] [-p] " + "[-f file] [file ...]\n" + " %s [c | -c] [-C dir] [-J | -Z | -a | -j | -z] [-h] path ... " + "[-f file]\n", argv0, argv0); +} + +int +main(int argc, char *argv[]) +{ + struct recursor r = { .fn = c, .follow = 'P', .flags = DIRFIRST }; + struct stat st; + char *file = NULL, *dir = ".", mode = '\0'; + int fd; + + argv0 = argv[0]; + if (argc > 1 && strchr("cxt", mode = *argv[1])) + *(argv[1]+1) ? *argv[1] = '-' : (*++argv = argv0, --argc); + + ARGBEGIN { + case 'x': + case 'c': + case 't': + mode = ARGC(); + break; + case 'C': + dir = EARGF(usage()); + break; + case 'f': + file = EARGF(usage()); + break; + case 'm': + mflag = 1; + break; + case 'J': + case 'Z': + case 'a': + case 'j': + case 'z': + filtermode = ARGC(); + filtertool = filtertools[filtermode]; + break; + case 'h': + r.follow = 'L'; + break; + case 'v': + vflag = 1; + break; + case 'p': + break; /* Do nothing as already default behaviour */ + default: + usage(); + } ARGEND + + switch (mode) { + case 'c': + if (!argc) + usage(); + tarfd = 1; + if (file && *file != '-') { + tarfd = open(file, O_WRONLY | O_TRUNC | O_CREAT, 0644); + if (tarfd < 0) + eprintf("open %s:", file); + if (lstat(file, &st) < 0) + eprintf("lstat %s:", file); + tarinode = st.st_ino; + tardev = st.st_dev; + } + + if (filtertool) + tarfd = comp(tarfd, filtertool, "-cf"); + + if (chdir(dir) < 0) + eprintf("chdir %s:", dir); + for (; *argv; argc--, argv++) + recurse(AT_FDCWD, *argv, NULL, &r); + break; + case 't': + case 'x': + tarfd = 0; + if (file && *file != '-') { + tarfd = open(file, O_RDONLY); + if (tarfd < 0) + eprintf("open %s:", file); + } + + if (filtertool) { + fd = tarfd; + tarfd = decomp(tarfd, filtertool, "-cdf"); + close(fd); + } + + if (chdir(dir) < 0) + eprintf("chdir %s:", dir); + xt(argc, argv, mode); + break; + default: + usage(); + } + + return recurse_status; +} diff --git a/util/sbase/tee.1 b/util/sbase/tee.1 new file mode 100644 index 00000000..eaf2e202 --- /dev/null +++ b/util/sbase/tee.1 @@ -0,0 +1,26 @@ +.Dd October 8, 2015 +.Dt TEE 1 +.Os sbase +.Sh NAME +.Nm tee +.Nd multiply stdin +.Sh SYNOPSIS +.Nm +.Op Fl ai +.Op Ar file ... +.Sh DESCRIPTION +.Nm +reads from stdin and writes to stdout and each +.Ar file . +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl a +Append to each +.Ar file +instead of overwriting it. +.It Fl i +Ignore SIGINT, see +.Xr signal 7 . +.El +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/tee.c b/util/sbase/tee.c new file mode 100644 index 00000000..eac106ca --- /dev/null +++ b/util/sbase/tee.c @@ -0,0 +1,60 @@ +/* See LICENSE file for copyright and license details. */ +#include <fcntl.h> +#include <signal.h> +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [-ai] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int *fds = NULL; + size_t i, nfds; + ssize_t n; + int ret = 0, aflag = O_TRUNC, iflag = 0; + char buf[BUFSIZ]; + + ARGBEGIN { + case 'a': + aflag = O_APPEND; + break; + case 'i': + iflag = 1; + break; + default: + usage(); + } ARGEND + + if (iflag && signal(SIGINT, SIG_IGN) == SIG_ERR) + eprintf("signal:"); + nfds = argc + 1; + fds = ecalloc(nfds, sizeof(*fds)); + + for (i = 0; i < argc; i++) { + if ((fds[i] = open(argv[i], O_WRONLY|O_CREAT|aflag, 0666)) < 0) { + weprintf("open %s:", argv[i]); + ret = 1; + } + } + fds[i] = 1; + + while ((n = read(0, buf, sizeof(buf))) > 0) { + for (i = 0; i < nfds; i++) { + if (fds[i] >= 0 && writeall(fds[i], buf, n) < 0) { + weprintf("write %s:", (i != argc) ? argv[i] : "<stdout>"); + fds[i] = -1; + ret = 1; + } + } + } + if (n < 0) + eprintf("read <stdin>:"); + + return ret; +} diff --git a/util/sbase/test.1 b/util/sbase/test.1 new file mode 100644 index 00000000..c7d4f50c --- /dev/null +++ b/util/sbase/test.1 @@ -0,0 +1,131 @@ +.Dd October 8, 2015 +.Dt TEST 1 +.Os sbase +.Sh NAME +.Nm test +.Nd evaluate expression +.Sh SYNOPSIS +.Nm +.Ar expression +.Sh DESCRIPTION +.Nm +returns the status of the +.Ar expression . +.Sh OPTIONS +.Bl -tag -width Ds +.It ! Ar expression +invert +.Ar expression . +.It ( Fl e | Fl s ) Ar file +.Ar file +exists and has (any size +.Op Fl e +| non-zero size +.Op Fl s ) . +.It ( Fl f | Fl d | Fl p | Fl hL | Fl S | Fl b | Fl c ) Ar file +.Ar file +exists and is a +(regular file +.Op Fl f +| directory +.Op Fl d +| named pipe +.Op Fl p +| symbolic link +.Op Fl h | Fl L +| socket +.Op Fl S +| block special +.Op Fl b +| character special +.Op Fl c ) . +.It ( Fl k | Fl g | Fl u | Fl r | Fl w | Fl x ) Ar file +.Ar file +exists and has +.Xr ( sticky 1 +.Op Fl k +| +.Xr setgid 2 +.Op Fl g +| +.Xr setuid 4 +.Op Fl u +| +.Xr read 4 +.Op Fl r +| +.Xr write 2 +.Op Fl w +| +.Xr execute 1 +.Op Fl x ) +permissions. +.It Fl t Ar fd +.Ar fd +as a file descriptor is associated with a terminal. +.It Ar string +True if +.Ar string +is not the null string. +.It ( Fl z | Fl n ) Ar string +True if +.Ar string +has (zero +.Op Fl z +| non-zero +.Op Fl n ) +length. +.It Ar s1 Sy ( = | != ) Ar s2 +True if strings +.Ar s1 +and +.Ar s2 +are +(identical +.Oo Sy = Oc +| different +.Oo Sy != Oc ) . +.It Ar n1 ( Fl eq | Fl ne | Fl gt | Fl ge | Fl le | Fl lt ) Ar n2 +True if integers +.Ar n1 +and +.Ar n2 +are (= +.Op Fl eq +| != +.Op Fl ne +| > +.Op Fl gt +| >= +.Op Fl ge +| <= +.Op Fl le +| < +.Op Fl lt ) . +.It Ar f1 ( Fl ef | Fl ot | Fl nt ) Ar f2 +True if file +.Ar f1 +(refer to the same inode as +.Op Fl ef +| has an older mtime than +.Op Fl ot +| has a newer mtime than +.Op Fl nt ) +file +.Ar f2 . +.El +.Sh EXIT STATUS +.Bl -tag -width Ds +.It 0 +.Ar expression +is true. +.It 1 +.Ar expression +is false. +.It > 1 +An error occurred. +.El +.Sh SEE ALSO +.Xr expr 1 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/test.c b/util/sbase/test.c new file mode 100644 index 00000000..1e88a221 --- /dev/null +++ b/util/sbase/test.c @@ -0,0 +1,247 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> + +#include <ctype.h> +#include <fcntl.h> +#include <string.h> +#include <unistd.h> + +#include "util.h" + +static int +intcmp(char *a, char *b) +{ + char *s; + int asign = *a == '-' ? -1 : 1; + int bsign = *b == '-' ? -1 : 1; + + if (*a == '-' || *a == '+') a += 1; + if (*b == '-' || *b == '+') b += 1; + + if (!*a || !*b) + goto noint; + for (s = a; *s; s++) + if (!isdigit(*s)) + goto noint; + for (s = b; *s; s++) + if (!isdigit(*s)) + goto noint; + + while (*a == '0') a++; + while (*b == '0') b++; + asign *= !!*a; + bsign *= !!*b; + + if (asign != bsign) + return asign < bsign ? -1 : 1; + else if (strlen(a) != strlen(b)) + return asign * (strlen(a) < strlen(b) ? -1 : 1); + else + return asign * strcmp(a, b); + +noint: + enprintf(2, "expected integer operands\n"); + + return 0; /* not reached */ +} + +static int +mtimecmp(struct stat *buf1, struct stat *buf2) +{ + if (buf1->st_mtime < buf2->st_mtime) return -1; + if (buf1->st_mtime > buf2->st_mtime) return +1; +#ifdef st_mtime + if (buf1->st_mtim.tv_nsec < buf2->st_mtim.tv_nsec) return -1; + if (buf1->st_mtim.tv_nsec > buf2->st_mtim.tv_nsec) return +1; +#endif + return 0; +} + +static int unary_b(char *s) { struct stat buf; if ( stat(s, &buf)) return 0; return S_ISBLK (buf.st_mode); } +static int unary_c(char *s) { struct stat buf; if ( stat(s, &buf)) return 0; return S_ISCHR (buf.st_mode); } +static int unary_d(char *s) { struct stat buf; if ( stat(s, &buf)) return 0; return S_ISDIR (buf.st_mode); } +static int unary_f(char *s) { struct stat buf; if ( stat(s, &buf)) return 0; return S_ISREG (buf.st_mode); } +static int unary_g(char *s) { struct stat buf; if ( stat(s, &buf)) return 0; return S_ISGID & buf.st_mode ; } +static int unary_h(char *s) { struct stat buf; if (lstat(s, &buf)) return 0; return S_ISLNK (buf.st_mode); } +static int unary_k(char *s) { struct stat buf; if ( stat(s, &buf)) return 0; return S_ISVTX & buf.st_mode ; } +static int unary_p(char *s) { struct stat buf; if ( stat(s, &buf)) return 0; return S_ISFIFO (buf.st_mode); } +static int unary_S(char *s) { struct stat buf; if ( stat(s, &buf)) return 0; return S_ISSOCK (buf.st_mode); } +static int unary_s(char *s) { struct stat buf; if ( stat(s, &buf)) return 0; return buf.st_size ; } +static int unary_u(char *s) { struct stat buf; if ( stat(s, &buf)) return 0; return S_ISUID & buf.st_mode ; } + +static int unary_n(char *s) { return *s; } +static int unary_z(char *s) { return !*s; } + +static int unary_e(char *s) { return !faccessat(AT_FDCWD, s, F_OK, AT_EACCESS); } +static int unary_r(char *s) { return !faccessat(AT_FDCWD, s, R_OK, AT_EACCESS); } +static int unary_w(char *s) { return !faccessat(AT_FDCWD, s, W_OK, AT_EACCESS); } +static int unary_x(char *s) { return !faccessat(AT_FDCWD, s, X_OK, AT_EACCESS); } + +static int unary_t(char *s) { int fd = enstrtonum(2, s, 0, INT_MAX); return isatty(fd); } + +static int binary_se(char *s1, char *s2) { return !strcmp(s1, s2); } +static int binary_sn(char *s1, char *s2) { return strcmp(s1, s2); } + +static int binary_eq(char *s1, char *s2) { return intcmp(s1, s2) == 0; } +static int binary_ne(char *s1, char *s2) { return intcmp(s1, s2) != 0; } +static int binary_gt(char *s1, char *s2) { return intcmp(s1, s2) > 0; } +static int binary_ge(char *s1, char *s2) { return intcmp(s1, s2) >= 0; } +static int binary_lt(char *s1, char *s2) { return intcmp(s1, s2) < 0; } +static int binary_le(char *s1, char *s2) { return intcmp(s1, s2) <= 0; } + +static int +binary_ef(char *s1, char *s2) +{ + struct stat buf1, buf2; + if (stat(s1, &buf1) || stat(s2, &buf2)) return 0; + return buf1.st_dev == buf2.st_dev && buf1.st_ino == buf2.st_ino; +} + +static int +binary_ot(char *s1, char *s2) +{ + struct stat buf1, buf2; + if (stat(s1, &buf1) || stat(s2, &buf2)) return 0; + return mtimecmp(&buf1, &buf2) < 0; +} + +static int +binary_nt(char *s1, char *s2) +{ + struct stat buf1, buf2; + if (stat(s1, &buf1) || stat(s2, &buf2)) return 0; + return mtimecmp(&buf1, &buf2) > 0; +} + +struct test { + char *name; + union { + int (*u)(char *); + int (*b)(char *, char *); + } func; +}; + +static struct test unary[] = { + { "-b", { .u = unary_b } }, + { "-c", { .u = unary_c } }, + { "-d", { .u = unary_d } }, + { "-e", { .u = unary_e } }, + { "-f", { .u = unary_f } }, + { "-g", { .u = unary_g } }, + { "-h", { .u = unary_h } }, + { "-k", { .u = unary_k } }, + { "-L", { .u = unary_h } }, + { "-n", { .u = unary_n } }, + { "-p", { .u = unary_p } }, + { "-r", { .u = unary_r } }, + { "-S", { .u = unary_S } }, + { "-s", { .u = unary_s } }, + { "-t", { .u = unary_t } }, + { "-u", { .u = unary_u } }, + { "-w", { .u = unary_w } }, + { "-x", { .u = unary_x } }, + { "-z", { .u = unary_z } }, + + { NULL }, +}; + +static struct test binary[] = { + { "=" , { .b = binary_se } }, + { "!=" , { .b = binary_sn } }, + { "-eq", { .b = binary_eq } }, + { "-ne", { .b = binary_ne } }, + { "-gt", { .b = binary_gt } }, + { "-ge", { .b = binary_ge } }, + { "-lt", { .b = binary_lt } }, + { "-le", { .b = binary_le } }, + { "-ef", { .b = binary_ef } }, + { "-ot", { .b = binary_ot } }, + { "-nt", { .b = binary_nt } }, + + { NULL }, +}; + +static struct test * +find_test(struct test *tests, char *name) +{ + struct test *t; + + for (t = tests; t->name; t++) + if (!strcmp(t->name, name)) + return t; + + return NULL; +} + +static int +noarg(char *argv[]) +{ + return 0; +} + +static int +onearg(char *argv[]) +{ + return unary_n(argv[0]); +} + +static int +twoarg(char *argv[]) +{ + struct test *t; + + if (!strcmp(argv[0], "!")) + return !onearg(argv + 1); + + if ((t = find_test(unary, *argv))) + return t->func.u(argv[1]); + + enprintf(2, "bad unary test %s\n", argv[0]); + + return 0; /* not reached */ +} + +static int +threearg(char *argv[]) +{ + struct test *t = find_test(binary, argv[1]); + + if (t) + return t->func.b(argv[0], argv[2]); + + if (!strcmp(argv[0], "!")) + return !twoarg(argv + 1); + + enprintf(2, "bad binary test %s\n", argv[1]); + + return 0; /* not reached */ +} + +static int +fourarg(char *argv[]) +{ + if (!strcmp(argv[0], "!")) + return !threearg(argv + 1); + + enprintf(2, "too many arguments\n"); + + return 0; /* not reached */ +} + +int +main(int argc, char *argv[]) +{ + int (*narg[])(char *[]) = { noarg, onearg, twoarg, threearg, fourarg }; + size_t len; + + argv0 = *argv, argv0 ? (argc--, argv++) : (void *)0; + + len = argv0 ? strlen(argv0) : 0; + if (len && argv0[--len] == '[' && (!len || argv0[--len] == '/') && strcmp(argv[--argc], "]")) + enprintf(2, "no matching ]\n"); + + if (argc > 4) + enprintf(2, "too many arguments\n"); + + return !narg[argc](argv); +} diff --git a/util/sbase/text.h b/util/sbase/text.h new file mode 100644 index 00000000..9858592b --- /dev/null +++ b/util/sbase/text.h @@ -0,0 +1,16 @@ +/* See LICENSE file for copyright and license details. */ + +struct line { + char *data; + size_t len; +}; + +struct linebuf { + struct line *lines; + size_t nlines; + size_t capacity; +}; +#define EMPTY_LINEBUF {NULL, 0, 0,} +void getlines(FILE *, struct linebuf *); + +int linecmp(struct line *, struct line *); diff --git a/util/sbase/tftp.1 b/util/sbase/tftp.1 new file mode 100644 index 00000000..4ad73a23 --- /dev/null +++ b/util/sbase/tftp.1 @@ -0,0 +1,32 @@ +.Dd October 8, 2015 +.Dt TFTP 1 +.Os sbase +.Sh NAME +.Nm tftp +.Nd trivial file transfer protocol client +.Sh SYNOPSIS +.Nm +.Fl h Ar host +.Op Fl p Ar port +.Op Fl x | c +.Ar file +.Sh DESCRIPTION +.Nm +is a client that implements the trivial file transfer protocol over +either IPv4 or IPv6 as specified in RFC 1350. +It can be used to transfer files to and from remote machines. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl h Ar host +Set the remote hostname. +.It Fl p Ar port +Set the remote port. +It defaults to port 69. +.It Fl x +Extract a file from the server. +This is the default if no flags are specified. +Output goes to stdout. +.It Fl c +Create a file on the server. +Input comes from stdin. +.El diff --git a/util/sbase/tftp.c b/util/sbase/tftp.c new file mode 100644 index 00000000..0a099ff2 --- /dev/null +++ b/util/sbase/tftp.c @@ -0,0 +1,309 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/time.h> +#include <sys/types.h> +#include <sys/socket.h> + +#include <netdb.h> +#include <netinet/in.h> + +#include <errno.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + +#include "util.h" + +#define BLKSIZE 512 +#define HDRSIZE 4 +#define PKTSIZE (BLKSIZE + HDRSIZE) + +#define TIMEOUT_SEC 5 +/* transfer will time out after NRETRIES * TIMEOUT_SEC */ +#define NRETRIES 5 + +#define RRQ 1 +#define WWQ 2 +#define DATA 3 +#define ACK 4 +#define ERR 5 + +static char *errtext[] = { + "Undefined", + "File not found", + "Access violation", + "Disk full or allocation exceeded", + "Illegal TFTP operation", + "Unknown transfer ID", + "File already exists", + "No such user" +}; + +static struct sockaddr_storage to; +static socklen_t tolen; +static int timeout; +static int state; +static int s; + +static int +packreq(unsigned char *buf, int op, char *path, char *mode) +{ + unsigned char *p = buf; + + *p++ = op >> 8; + *p++ = op & 0xff; + if (strlen(path) + 1 > 256) + eprintf("filename too long\n"); + memcpy(p, path, strlen(path) + 1); + p += strlen(path) + 1; + memcpy(p, mode, strlen(mode) + 1); + p += strlen(mode) + 1; + return p - buf; +} + +static int +packack(unsigned char *buf, int blkno) +{ + buf[0] = ACK >> 8; + buf[1] = ACK & 0xff; + buf[2] = blkno >> 8; + buf[3] = blkno & 0xff; + return 4; +} + +static int +packdata(unsigned char *buf, int blkno) +{ + buf[0] = DATA >> 8; + buf[1] = DATA & 0xff; + buf[2] = blkno >> 8; + buf[3] = blkno & 0xff; + return 4; +} + +static int +unpackop(unsigned char *buf) +{ + return (buf[0] << 8) | (buf[1] & 0xff); +} + +static int +unpackblkno(unsigned char *buf) +{ + return (buf[2] << 8) | (buf[3] & 0xff); +} + +static int +unpackerrc(unsigned char *buf) +{ + int errc; + + errc = (buf[2] << 8) | (buf[3] & 0xff); + if (errc < 0 || errc >= LEN(errtext)) + eprintf("bad error code: %d\n", errc); + return errc; +} + +static int +writepkt(unsigned char *buf, int len) +{ + int n; + + n = sendto(s, buf, len, 0, (struct sockaddr *)&to, + tolen); + if (n < 0) + if (errno != EINTR) + eprintf("sendto:"); + return n; +} + +static int +readpkt(unsigned char *buf, int len) +{ + int n; + + n = recvfrom(s, buf, len, 0, (struct sockaddr *)&to, + &tolen); + if (n < 0) { + if (errno != EINTR && errno != EWOULDBLOCK) + eprintf("recvfrom:"); + timeout++; + if (timeout == NRETRIES) + eprintf("transfer timed out\n"); + } else { + timeout = 0; + } + return n; +} + +static void +getfile(char *file) +{ + unsigned char buf[PKTSIZE]; + int n, op, blkno, nextblkno = 1, done = 0; + + state = RRQ; + for (;;) { + switch (state) { + case RRQ: + n = packreq(buf, RRQ, file, "octet"); + writepkt(buf, n); + n = readpkt(buf, sizeof(buf)); + if (n > 0) { + op = unpackop(buf); + if (op != DATA && op != ERR) + eprintf("bad opcode: %d\n", op); + state = op; + } + break; + case DATA: + n -= HDRSIZE; + if (n < 0) + eprintf("truncated packet\n"); + blkno = unpackblkno(buf); + if (blkno == nextblkno) { + nextblkno++; + write(1, &buf[HDRSIZE], n); + } + if (n < BLKSIZE) + done = 1; + state = ACK; + break; + case ACK: + n = packack(buf, blkno); + writepkt(buf, n); + if (done) + return; + n = readpkt(buf, sizeof(buf)); + if (n > 0) { + op = unpackop(buf); + if (op != DATA && op != ERR) + eprintf("bad opcode: %d\n", op); + state = op; + } + break; + case ERR: + eprintf("error: %s\n", errtext[unpackerrc(buf)]); + } + } +} + +static void +putfile(char *file) +{ + unsigned char inbuf[PKTSIZE], outbuf[PKTSIZE]; + int inb, outb, op, blkno, nextblkno = 0, done = 0; + + state = WWQ; + for (;;) { + switch (state) { + case WWQ: + outb = packreq(outbuf, WWQ, file, "octet"); + writepkt(outbuf, outb); + inb = readpkt(inbuf, sizeof(inbuf)); + if (inb > 0) { + op = unpackop(inbuf); + if (op != ACK && op != ERR) + eprintf("bad opcode: %d\n", op); + state = op; + } + break; + case DATA: + if (blkno == nextblkno) { + nextblkno++; + packdata(outbuf, nextblkno); + outb = read(0, &outbuf[HDRSIZE], BLKSIZE); + if (outb < BLKSIZE) + done = 1; + } + writepkt(outbuf, outb + HDRSIZE); + inb = readpkt(inbuf, sizeof(inbuf)); + if (inb > 0) { + op = unpackop(inbuf); + if (op != ACK && op != ERR) + eprintf("bad opcode: %d\n", op); + state = op; + } + break; + case ACK: + if (inb < HDRSIZE) + eprintf("truncated packet\n"); + blkno = unpackblkno(inbuf); + if (blkno == nextblkno) + if (done) + return; + state = DATA; + break; + case ERR: + eprintf("error: %s\n", errtext[unpackerrc(inbuf)]); + } + } +} + +static void +usage(void) +{ + eprintf("usage: %s -h host [-p port] [-x | -c] file\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + struct addrinfo hints, *res, *r; + struct timeval tv; + char *host = NULL, *port = "tftp"; + void (*fn)(char *) = getfile; + int ret; + + ARGBEGIN { + case 'h': + host = EARGF(usage()); + break; + case 'p': + port = EARGF(usage()); + break; + case 'x': + fn = getfile; + break; + case 'c': + fn = putfile; + break; + default: + usage(); + } ARGEND + + if (!host || !argc) + usage(); + + memset(&hints, 0, sizeof(hints)); + hints.ai_family = AF_UNSPEC; + hints.ai_socktype = SOCK_DGRAM; + hints.ai_protocol = IPPROTO_UDP; + ret = getaddrinfo(host, port, &hints, &res); + if (ret) + eprintf("getaddrinfo: %s\n", gai_strerror(ret)); + + for (r = res; r; r = r->ai_next) { + if (r->ai_family != AF_INET && + r->ai_family != AF_INET6) + continue; + s = socket(r->ai_family, r->ai_socktype, + r->ai_protocol); + if (s < 0) + continue; + break; + } + if (!r) + eprintf("cannot create socket\n"); + memcpy(&to, r->ai_addr, r->ai_addrlen); + tolen = r->ai_addrlen; + freeaddrinfo(res); + + tv.tv_sec = TIMEOUT_SEC; + tv.tv_usec = 0; + if (setsockopt(s, SOL_SOCKET, SO_RCVTIMEO, &tv, sizeof(tv)) < 0) + eprintf("setsockopt:"); + + fn(argv[0]); + return 0; +} diff --git a/util/sbase/time.1 b/util/sbase/time.1 new file mode 100644 index 00000000..645da5ef --- /dev/null +++ b/util/sbase/time.1 @@ -0,0 +1,45 @@ +.Dd October 8, 2015 +.Dt TIME 1 +.Os sbase +.Sh NAME +.Nm time +.Nd time a command +.Sh SYNOPSIS +.Nm +.Op Fl p +.Ar cmd +.Op Ar arg ... +.Sh DESCRIPTION +.Nm +executes +.Ar cmd +and writes timing statistics to stderr after it finishes. +The statistics include the elapsed real time +between invocation and termination and the user +and system CPU time (see +.Xr times 2 ) . +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl p +Use the format "real %f\enuser %f\ensys %f\en" for printing. +This is the default. +.El +.Sh EXIT STATUS +.Bl -tag -width Ds +.It 0 +.Ar cmd +executed successfully. +.It 1 +Internal error. +.It 126 +.Ar cmd +was found but could not be executed. +.It 127 +.Ar cmd +could not be found. +.El +.Sh SEE ALSO +.Xr times 2 , +.Xr waitpid 2 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/time.c b/util/sbase/time.c new file mode 100644 index 00000000..60a8c8df --- /dev/null +++ b/util/sbase/time.c @@ -0,0 +1,73 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/times.h> +#include <sys/wait.h> + +#include <errno.h> +#include <stdio.h> +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [-p] cmd [arg ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + pid_t pid; + struct tms tms; /* user and sys times */ + clock_t r0, r1; /* real time */ + long ticks; /* per second */ + int status, savederrno, ret = 0; + + ARGBEGIN { + case 'p': + break; + default: + usage(); + } ARGEND + + if (!argc) + usage(); + + if ((ticks = sysconf(_SC_CLK_TCK)) <= 0) + eprintf("sysconf _SC_CLK_TCK:"); + + if ((r0 = times(&tms)) == (clock_t)-1) + eprintf("times:"); + + switch ((pid = fork())) { + case -1: + eprintf("fork:"); + case 0: + execvp(argv[0], argv); + savederrno = errno; + weprintf("execvp %s:", argv[0]); + _exit(126 + (savederrno == ENOENT)); + default: + break; + } + waitpid(pid, &status, 0); + + if ((r1 = times(&tms)) == (clock_t)-1) + eprintf("times:"); + + if (WIFSIGNALED(status)) { + fprintf(stderr, "Command terminated by signal %d\n", + WTERMSIG(status)); + ret = 128 + WTERMSIG(status); + } + + fprintf(stderr, "real %f\nuser %f\nsys %f\n", + (r1 - r0) / (double)ticks, + tms.tms_cutime / (double)ticks, + tms.tms_cstime / (double)ticks); + + if (WIFEXITED(status)) + ret = WEXITSTATUS(status); + + return ret; +} diff --git a/util/sbase/touch.1 b/util/sbase/touch.1 new file mode 100644 index 00000000..80c6ebb6 --- /dev/null +++ b/util/sbase/touch.1 @@ -0,0 +1,63 @@ +.Dd October 8, 2015 +.Dt TOUCH 1 +.Os sbase +.Sh NAME +.Nm touch +.Nd set file timestamps +.Sh SYNOPSIS +.Nm +.Op Fl acm +.Op Fl d Ar time | Fl r Ar ref_file | Fl T Ar time | Fl t Ar time +.Ar file ... +.Sh DESCRIPTION +.Nm +sets the access and modification time of each +.Ar file +to the current time of day. +If +.Ar file +doesn't exist, it is created with default permissions. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl a | Fl m +Set the access | modification time of +.Ar file . +.It Fl c +Don't create +.Ar file +if it doesn't exist, not affecting exit status. +.It Fl d Ar time +Set the +.Ar time +of the format YYYY-MM-DDThh:mm:SS[Z] used for +.Op Fl am . +.It Fl r Ar ref_file +Set the +.Ar time +used for +.Op Fl am +to the modification time of +.Ar ref_file . +.It Fl T Ar time +Set the +.Ar time +used for +.Op Fl am +given as the number of seconds since the +Unix epoch 1970-01-01T00:00:00Z. +.It Fl t Ar time +Set the +.Ar time +of the format [[CC]YY]MMDDhhmm[.SS] used for +.Op Fl am . +.El +.Sh SEE ALSO +.Xr date 1 +.Sh STANDARDS +POSIX.1-2013. +Except for fractional seconds with +.Op Fl d . +.Pp +The +.Op Fl T +flag is an extension to that specification. diff --git a/util/sbase/touch.c b/util/sbase/touch.c new file mode 100644 index 00000000..6e63bf80 --- /dev/null +++ b/util/sbase/touch.c @@ -0,0 +1,159 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> + +#include <errno.h> +#include <fcntl.h> +#include <stdlib.h> +#include <string.h> +#include <time.h> +#include <unistd.h> + +#include "util.h" + +static int aflag; +static int cflag; +static int mflag; +static struct timespec times[2] = {{.tv_nsec = UTIME_NOW}}; + +static void +touch(const char *file) +{ + int fd, ret; + + if (utimensat(AT_FDCWD, file, times, 0) == 0) + return; + if (errno != ENOENT) + eprintf("utimensat %s:", file); + if (cflag) + return; + if ((fd = open(file, O_WRONLY | O_CREAT | O_EXCL, 0666)) < 0) + eprintf("open %s:", file); + ret = futimens(fd, times); + close(fd); + if (ret < 0) + eprintf("futimens %s:", file); +} + +static time_t +parsetime(char *str) +{ + time_t now; + struct tm *cur, t = { 0 }; + int zulu = 0; + char *format; + size_t len = strlen(str); + + if ((now = time(NULL)) == -1) + eprintf("time:"); + if (!(cur = localtime(&now))) + eprintf("localtime:"); + t.tm_isdst = -1; + + switch (len) { + /* -t flag argument */ + case 8: + t.tm_year = cur->tm_year; + format = "%m%d%H%M"; + break; + case 10: + format = "%y%m%d%H%M"; + break; + case 11: + t.tm_year = cur->tm_year; + format = "%m%d%H%M.%S"; + break; + case 12: + format = "%Y%m%d%H%M"; + break; + case 13: + format = "%y%m%d%H%M.%S"; + break; + case 15: + format = "%Y%m%d%H%M.%S"; + break; + /* -d flag argument */ + case 19: + format = "%Y-%m-%dT%H:%M:%S"; + break; + case 20: + /* only Zulu-timezone supported */ + if (str[19] != 'Z') + eprintf("Invalid time zone\n"); + str[19] = 0; + zulu = 1; + format = "%Y-%m-%dT%H:%M:%S"; + break; + default: + eprintf("Invalid date format length\n", str); + } + + if (!strptime(str, format, &t)) + eprintf("strptime %s: Invalid date format\n", str); + if (zulu) { + t.tm_hour += t.tm_gmtoff / 60; + t.tm_gmtoff = 0; + t.tm_zone = "Z"; + } + + return mktime(&t); +} + +static void +usage(void) +{ + eprintf("usage: %s [-acm] [-d time | -r ref_file | -t time | -T time] " + "file ...\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + struct stat st; + char *ref = NULL; + + ARGBEGIN { + case 'a': + aflag = 1; + break; + case 'c': + cflag = 1; + break; + case 'd': + case 't': + times[0].tv_sec = parsetime(EARGF(usage())); + times[0].tv_nsec = 0; + break; + case 'm': + mflag = 1; + break; + case 'r': + ref = EARGF(usage()); + if (stat(ref, &st) < 0) + eprintf("stat '%s':", ref); + times[0] = st.st_atim; + times[1] = st.st_mtim; + break; + case 'T': + times[0].tv_sec = estrtonum(EARGF(usage()), 0, LLONG_MAX); + times[0].tv_nsec = 0; + break; + default: + usage(); + } ARGEND + + if (!argc) + usage(); + if (!aflag && !mflag) + aflag = mflag = 1; + if (!ref) + times[1] = times[0]; + if (!aflag) + times[0].tv_nsec = UTIME_OMIT; + if (!mflag) + times[1].tv_nsec = UTIME_OMIT; + + for (; *argv; argc--, argv++) + touch(*argv); + + return 0; +} diff --git a/util/sbase/tr.1 b/util/sbase/tr.1 new file mode 100644 index 00000000..087bd4bf --- /dev/null +++ b/util/sbase/tr.1 @@ -0,0 +1,84 @@ +.Dd October 5, 2016 +.Dt TR 1 +.Os sbase +.Sh NAME +.Nm tr +.Nd translate characters +.Sh SYNOPSIS +.Nm +.Op Fl c | Fl C +.Op Fl sd +.Ar set1 set2 +.Sh DESCRIPTION +.Nm +matches characters from stdin and performs translations to stdout. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl c | Fl C +Match to +.Ar set1 +complement. +.It Fl d +Delete characters matching +.Ar set1 . +.It Fl s +Squeeze repeated characters matching +.Ar set1 +or +.Ar set2 +if +.Fl d +is set. +.El +.Sh SET +.Bl -tag -width Ds +.It Literal Sy c +.It Escape sequence Sy \ec +\e\e, \e', \e", \ea, \eb, \ee, \ef, \en, \er, \et, \ev, \exH[H], \eO[OO] +.It Range Sy c-d +.It Repeat Sy [c*n] +Only in +.Ar set2 . +If n = 0 or left out, set n to length of +.Ar set1 . +.It Character class Sy [:class:] +See +.Xr wctype 3 . +.It Equivalence class Sy [=c=] +Resolve to +.Sy c . +.El +.Sh TRANSLATION +If +.Fl d +is not set, +.Nm +translates from +.Ar set1 +to +.Ar set2 +by index or character class. +.Pp +If +.Ar set2 +is shorter than +.Ar set1 +or +.Ar set1 +is a character class, +overflowing characters translate to the last character in +.Ar set2 . +.Sh EXIT STATUS +.Bl -tag -width Ds +.It 0 +Input processed successfully. +.It 1 +An error occurred. +.El +.Sh SEE ALSO +.Xr awk 1 , +.Xr sed 1 , +.Xr utf8 7 +.Sh STANDARDS +POSIX.1-2013. +Except from equivalence classes. diff --git a/util/sbase/tr.c b/util/sbase/tr.c new file mode 100644 index 00000000..c96dbdd3 --- /dev/null +++ b/util/sbase/tr.c @@ -0,0 +1,300 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdlib.h> + +#include "utf.h" +#include "util.h" + +static int cflag = 0; +static int dflag = 0; +static int sflag = 0; + +struct range { + Rune start; + Rune end; + size_t quant; +}; + +static struct { + char *name; + int (*check)(Rune); +} classes[] = { + { "alnum", isalnumrune }, + { "alpha", isalpharune }, + { "blank", isblankrune }, + { "cntrl", iscntrlrune }, + { "digit", isdigitrune }, + { "graph", isgraphrune }, + { "lower", islowerrune }, + { "print", isprintrune }, + { "punct", ispunctrune }, + { "space", isspacerune }, + { "upper", isupperrune }, + { "xdigit", isxdigitrune }, +}; + +static struct range *set1 = NULL; +static size_t set1ranges = 0; +static int (*set1check)(Rune) = NULL; +static struct range *set2 = NULL; +static size_t set2ranges = 0; +static int (*set2check)(Rune) = NULL; + +static size_t +rangelen(struct range r) +{ + return (r.end - r.start + 1) * r.quant; +} + +static size_t +setlen(struct range *set, size_t setranges) +{ + size_t len = 0, i; + + for (i = 0; i < setranges; i++) + len += rangelen(set[i]); + + return len; +} + +static int +rstrmatch(Rune *r, char *s, size_t n) +{ + size_t i; + + for (i = 0; i < n; i++) + if (r[i] != s[i]) + return 0; + return 1; +} + +static size_t +makeset(char *str, struct range **set, int (**check)(Rune)) +{ + Rune *rstr; + size_t len, i, j, m, n; + size_t q, setranges = 0; + int factor, base; + + /* rstr defines at most len ranges */ + unescape(str); + rstr = ereallocarray(NULL, utflen(str) + 1, sizeof(*rstr)); + len = utftorunestr(str, rstr); + *set = ereallocarray(NULL, len, sizeof(**set)); + + for (i = 0; i < len; i++) { + if (rstr[i] == '[') { + j = i; +nextbrack: + if (j >= len) + goto literal; + for (m = j; m < len; m++) + if (rstr[m] == ']') { + j = m; + break; + } + if (j == i) + goto literal; + + /* CLASSES [=EQUIV=] (skip) */ + if (j - i > 3 && rstr[i + 1] == '=' && rstr[m - 1] == '=') { + if (j - i != 4) + goto literal; + (*set)[setranges].start = rstr[i + 2]; + (*set)[setranges].end = rstr[i + 2]; + (*set)[setranges].quant = 1; + setranges++; + i = j; + continue; + } + + /* CLASSES [:CLASS:] */ + if (j - i > 3 && rstr[i + 1] == ':' && rstr[m - 1] == ':') { + for (n = 0; n < LEN(classes); n++) { + if (rstrmatch(rstr + i + 2, classes[n].name, j - i - 3)) { + *check = classes[n].check; + return 0; + } + } + eprintf("Invalid character class.\n"); + } + + /* REPEAT [_*n] (only allowed in set2) */ + if (j - i > 2 && rstr[i + 2] == '*') { + /* check if right side of '*' is a number */ + q = 0; + factor = 1; + base = (rstr[i + 3] == '0') ? 8 : 10; + for (n = j - 1; n > i + 2; n--) { + if (rstr[n] < '0' || rstr[n] > '9') { + n = 0; + break; + } + q += (rstr[n] - '0') * factor; + factor *= base; + } + if (n == 0) { + j = m + 1; + goto nextbrack; + } + (*set)[setranges].start = rstr[i + 1]; + (*set)[setranges].end = rstr[i + 1]; + (*set)[setranges].quant = q ? q : setlen(set1, MAX(set1ranges, 1)); + setranges++; + i = j; + continue; + } + + j = m + 1; + goto nextbrack; + } +literal: + /* RANGES [_-__-_], _-__-_ */ + /* LITERALS _______ */ + (*set)[setranges].start = rstr[i]; + + if (i < len - 2 && rstr[i + 1] == '-' && rstr[i + 2] >= rstr[i]) + i += 2; + (*set)[setranges].end = rstr[i]; + (*set)[setranges].quant = 1; + setranges++; + } + + free(rstr); + return setranges; +} + +static void +usage(void) +{ + eprintf("usage: %s [-cCds] set1 [set2]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + Rune r, lastrune = 0; + size_t off1, off2, i, m; + int ret = 0; + + ARGBEGIN { + case 'c': + case 'C': + cflag = 1; + break; + case 'd': + dflag = 1; + break; + case 's': + sflag = 1; + break; + default: + usage(); + } ARGEND + + if (!argc || argc > 2 || (argc == 1 && dflag == sflag)) + usage(); + set1ranges = makeset(argv[0], &set1, &set1check); + if (argc == 2) + set2ranges = makeset(argv[1], &set2, &set2check); + + if (!dflag || (argc == 2 && sflag)) { + /* sanity checks as we are translating */ + if (!sflag && !set2ranges && !set2check) + eprintf("cannot map to an empty set.\n"); + if (set2check && set2check != islowerrune && + set2check != isupperrune) { + eprintf("can only map to 'lower' and 'upper' class.\n"); + } + } +read: + if (!efgetrune(&r, stdin, "<stdin>")) { + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + return ret; + } + if (argc == 1 && sflag) + goto write; + for (i = 0, off1 = 0; i < set1ranges; off1 += rangelen(set1[i]), i++) { + if (set1[i].start <= r && r <= set1[i].end) { + if (dflag) { + if (cflag) + goto write; + else + goto read; + } + if (cflag) + goto write; + + /* map r to set2 */ + if (set2check) { + if (set2check == islowerrune) + r = tolowerrune(r); + else + r = toupperrune(r); + } else { + off1 += r - set1[i].start; + if (off1 > setlen(set2, set2ranges) - 1) { + r = set2[set2ranges - 1].end; + goto write; + } + for (m = 0, off2 = 0; m < set2ranges; m++) { + if (off2 + rangelen(set2[m]) > off1) { + m++; + break; + } + off2 += rangelen(set2[m]); + } + m--; + r = set2[m].start + (off1 - off2) / set2[m].quant; + } + goto write; + } + } + if (set1check && set1check(r)) { + if (cflag) + goto write; + if (dflag) + goto read; + if (set2check) { + if (set2check == islowerrune) + r = tolowerrune(r); + else + r = toupperrune(r); + } else { + r = set2[set2ranges - 1].end; + } + goto write; + } + if (!dflag && cflag) { + if (set2check) { + if (set2check == islowerrune) + r = tolowerrune(r); + else + r = toupperrune(r); + } else { + r = set2[set2ranges - 1].end; + } + goto write; + } + if (dflag && cflag) + goto read; +write: + if (argc == 1 && sflag && r == lastrune) { + if (set1check && set1check(r)) + goto read; + for (i = 0; i < set1ranges; i++) { + if (set1[i].start <= r && r <= set1[i].end) + goto read; + } + } + if (argc == 2 && sflag && r == lastrune) { + if (set2check && set2check(r)) + goto read; + for (i = 0; i < set2ranges; i++) { + if (set2[i].start <= r && r <= set2[i].end) + goto read; + } + } + efputrune(&r, stdout, "<stdout>"); + lastrune = r; + goto read; +} diff --git a/util/sbase/true.1 b/util/sbase/true.1 new file mode 100644 index 00000000..7c2104a6 --- /dev/null +++ b/util/sbase/true.1 @@ -0,0 +1,13 @@ +.Dd October 8, 2015 +.Dt TRUE 1 +.Os sbase +.Sh NAME +.Nm true +.Nd return success +.Sh SYNOPSIS +.Nm +.Sh DESCRIPTION +.Nm +returns a status code indicating success. +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/true.c b/util/sbase/true.c new file mode 100644 index 00000000..cb081ec0 --- /dev/null +++ b/util/sbase/true.c @@ -0,0 +1,6 @@ +/* See LICENSE file for copyright and license details. */ +int +main(void) +{ + return 0; +} diff --git a/util/sbase/tsort.1 b/util/sbase/tsort.1 new file mode 100644 index 00000000..b2e0c6ae --- /dev/null +++ b/util/sbase/tsort.1 @@ -0,0 +1,70 @@ +.Dd February 16, 2016 +.Dt TSORT 1 +.Os sbase +.Sh NAME +.Nm tsort +.Nd topological sort +.Sh SYNOPSIS +.Nm +.Op Ar file +.Sh DESCRIPTION +.Nm +topologically sorts a graph. +The graph is read either from +.Ar file +or from standard input. +The result is not optimized for any particular usage. +Loops are detected and reported to standard error, but does not stop the +sort. +.Pp +The input is a list of edges (vertex pairs), where +the edge is directed from the first vertex to the +second vertex. +.Sh OPTIONS +None. +.Sh EXIT STATUS +.Bl -tag -width Ds +.It 0 +The graph as successfully sorted. +.It 1 +The graph as successfully sorted, but contained loops. +.It > 1 +An error occurred. +.El +.Sh EXAMPLES +.Bd -literal -offset left +The input + + a a + a b + a c + a c + a d + b c + c b + e f + +or equivalently + + a a a b a c a c a d + b c c b e f + +represents the graph + + ┌─┠+ ↓ │ + â”â”â”â”┓ + ┌──────┃ a ┃──────┠+ │ â”—â”â”â”â”› │ + │ │ │ │ + ↓ ↓ ↓ ↓ + â”â”â”â”┓───→â”â”â”â”┓ â”â”â”â”┓ + ┃ b ┃ ┃ c ┃ ┃ d ┃ + â”—â”â”â”â”›â†â”€â”€â”€â”—â”â”â”â”› â”—â”â”â”â”› + + â”â”â”â”┓ â”â”â”â”┓ + ┃ e ┃───→┃ f ┃ + â”—â”â”â”â”› â”—â”â”â”â”› +.Ed +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/tsort.c b/util/sbase/tsort.c new file mode 100644 index 00000000..f147e3b2 --- /dev/null +++ b/util/sbase/tsort.c @@ -0,0 +1,209 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> +#include <string.h> +#include <stdlib.h> +#include <ctype.h> + +#include "util.h" + +enum { WHITE = 0, GREY, BLACK }; + +struct vertex; + +struct edge { + struct vertex *to; + struct edge *next; +}; + +struct vertex { + char *name; + struct vertex *next; + struct edge edges; + size_t in_edges; + int colour; +}; + +static struct vertex graph; + +static void +find_vertex(const char *name, struct vertex **it, struct vertex **prev) +{ + for (*prev = &graph; (*it = (*prev)->next); *prev = *it) { + int cmp = strcmp(name, (*it)->name); + if (cmp > 0) + continue; + if (cmp < 0) + *it = 0; + return; + } +} + +static void +find_edge(struct vertex *from, const char *to, struct edge **it, struct edge **prev) +{ + for (*prev = &(from->edges); (*it = (*prev)->next); *prev = *it) { + int cmp = strcmp(to, (*it)->to->name); + if (cmp > 0) + continue; + if (cmp < 0) + *it = 0; + return; + } +} + +static struct vertex * +add_vertex(char *name) +{ + struct vertex *vertex; + struct vertex *prev; + + find_vertex(name, &vertex, &prev); + if (vertex) + return vertex; + + vertex = encalloc(2, 1, sizeof(*vertex)); + vertex->name = name; + vertex->next = prev->next; + prev->next = vertex; + + return vertex; +} + +static struct edge * +add_edge(struct vertex *from, struct vertex* to) +{ + struct edge *edge; + struct edge *prev; + + find_edge(from, to->name, &edge, &prev); + if (edge) + return edge; + + edge = encalloc(2, 1, sizeof(*edge)); + edge->to = to; + edge->next = prev->next; + prev->next = edge; + to->in_edges += 1; + + return edge; +} + +static void +load_graph(FILE *fp) +{ +#define SKIP(VAR, START, FUNC) for (VAR = START; FUNC(*VAR) && *VAR; VAR++) +#define TOKEN_END(P) do { if (*P) *P++ = 0; else P = 0; } while (0) + + char *line = 0; + size_t size = 0; + ssize_t len; + char *p; + char *name; + struct vertex *from = 0; + + while ((len = getline(&line, &size, fp)) != -1) { + if (line[len - 1] == '\n') + line[--len] = 0; + for (p = line; p;) { + SKIP(name, p, isspace); + if (!*name) + break; + SKIP(p, name, !isspace); + TOKEN_END(p); + if (!from) { + from = add_vertex(enstrdup(2, name)); + } else if (strcmp(from->name, name)) { + add_edge(from, add_vertex(enstrdup(2, name))); + from = 0; + } else { + from = 0; + } + } + } + + free(line); + + if (from) + enprintf(2, "odd number of tokens in input\n"); +} + +static int +sort_graph_visit(struct vertex *u) +{ + struct edge *e = &(u->edges); + struct vertex *v; + int r = 0; + u->colour = GREY; + printf("%s\n", u->name); + while ((e = e->next)) { + v = e->to; + if (v->colour == WHITE) { + v->in_edges -= 1; + if (v->in_edges == 0) + r |= sort_graph_visit(v); + } else if (v->colour == GREY) { + r = 1; + fprintf(stderr, "%s: loop detected between %s and %s\n", + argv0, u->name, v->name); + } + } + u->colour = BLACK; + return r; +} + +static int +sort_graph(void) +{ + struct vertex *u, *prev; + int r = 0; + size_t in_edges; + for (in_edges = 0; graph.next; in_edges++) { + for (prev = &graph; (u = prev->next); prev = u) { + if (u->colour != WHITE) + goto unlist; + if (u->in_edges > in_edges) + continue; + r |= sort_graph_visit(u); + unlist: + prev->next = u->next; + u = prev; + } + } + return r; +} + +static void +usage(void) +{ + enprintf(2, "usage: %s [file]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + FILE *fp = stdin; + const char *fn = "<stdin>"; + int ret = 0; + + ARGBEGIN { + default: + usage(); + } ARGEND + + if (argc > 1) + usage(); + if (argc && strcmp(*argv, "-")) + if (!(fp = fopen(fn = *argv, "r"))) + enprintf(2, "fopen %s:", *argv); + + memset(&graph, 0, sizeof(graph)); + load_graph(fp); + enfshut(2, fp, fn); + + ret = sort_graph(); + + if (fshut(stdout, "<stdout>") | fshut(stderr, "<stderr>")) + ret = 2; + + return ret; +} diff --git a/util/sbase/tty.1 b/util/sbase/tty.1 new file mode 100644 index 00000000..11580e32 --- /dev/null +++ b/util/sbase/tty.1 @@ -0,0 +1,24 @@ +.Dd October 8, 2015 +.Dt TTY 1 +.Os sbase +.Sh NAME +.Nm tty +.Nd print terminal name +.Sh SYNOPSIS +.Nm +.Sh DESCRIPTION +.Nm +writes the name of the terminal open on stdin to stdout. +.Sh EXIT STATUS +.Bl -tag -width Ds +.It 0 +stdin is a terminal. +.It 1 +stdin is not a terminal. +.It > 1 +An error occurred. +.El +.Sh SEE ALSO +.Xr ttyname 3 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/tty.c b/util/sbase/tty.c new file mode 100644 index 00000000..65151287 --- /dev/null +++ b/util/sbase/tty.c @@ -0,0 +1,31 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + enprintf(2, "usage: %s\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + char *tty; + + ARGBEGIN { + default: + usage(); + } ARGEND + + if (argc) + usage(); + + tty = ttyname(STDIN_FILENO); + puts(tty ? tty : "not a tty"); + + enfshut(2, stdout, "<stdout>"); + return !tty; +} diff --git a/util/sbase/uname.1 b/util/sbase/uname.1 new file mode 100644 index 00000000..65c3d318 --- /dev/null +++ b/util/sbase/uname.1 @@ -0,0 +1,35 @@ +.Dd October 8, 2015 +.Dt UNAME 1 +.Os sbase +.Sh NAME +.Nm uname +.Nd print system information +.Sh SYNOPSIS +.Nm +.Op Fl amnrsv +.Sh DESCRIPTION +.Nm +writes system information to stdout. +If no flags are given, +.Nm +implies +.Fl s . +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl a +Print all the information below. +.It Fl m +Print the machine's architecture. +.It Fl n +Print the system's network node hostname. +.It Fl r +Print the operating system's release name. +.It Fl s +Print the name of the operating system. +.It Fl v +Print the operating system's version name. +.El +.Sh SEE ALSO +.Xr uname 2 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/uname.c b/util/sbase/uname.c new file mode 100644 index 00000000..122c1721 --- /dev/null +++ b/util/sbase/uname.c @@ -0,0 +1,62 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/utsname.h> + +#include <stdio.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [-amnrsv]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + struct utsname u; + int mflag = 0, nflag = 0, rflag = 0, sflag = 0, vflag = 0; + + ARGBEGIN { + case 'a': + mflag = nflag = rflag = sflag = vflag = 1; + break; + case 'm': + mflag = 1; + break; + case 'n': + nflag = 1; + break; + case 'r': + rflag = 1; + break; + case 's': + sflag = 1; + break; + case 'v': + vflag = 1; + break; + default: + usage(); + } ARGEND + + if (argc) + usage(); + + if (uname(&u) < 0) + eprintf("uname:"); + + if (sflag || !(nflag || rflag || vflag || mflag)) + putword(stdout, u.sysname); + if (nflag) + putword(stdout, u.nodename); + if (rflag) + putword(stdout, u.release); + if (vflag) + putword(stdout, u.version); + if (mflag) + putword(stdout, u.machine); + putchar('\n'); + + return fshut(stdout, "<stdout>"); +} diff --git a/util/sbase/unexpand.1 b/util/sbase/unexpand.1 new file mode 100644 index 00000000..1637c090 --- /dev/null +++ b/util/sbase/unexpand.1 @@ -0,0 +1,41 @@ +.Dd October 8, 2015 +.Dt UNEXPAND 1 +.Os sbase +.Sh NAME +.Nm unexpand +.Nd unexpand spaces to tabs +.Sh SYNOPSIS +.Nm +.Op Fl a +.Op Fl t Ar tablist +.Op Ar file ... +.Sh DESCRIPTION +.Nm +converts spaces to tabs in each +.Ar file +as specified in +.Ar tablist . +If no file is given, +.Nm +reads from stdin. +.Pp +Backspace characters are preserved and decrement the column count +for tab calculations. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl a +Convert spaces to tabs everywhere, not just at the start of lines. +.It Fl t Ar tablist +Specify tab size or tabstops. +.Ar tablist +is a list of one (in the former case) or multiple (in the latter case) +strictly positive integers separated by ' ' or ','. +.Pp +The default +.Ar tablist +is "8". +.El +.Sh SEE ALSO +.Xr expand 1 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/unexpand.c b/util/sbase/unexpand.c new file mode 100644 index 00000000..1818691e --- /dev/null +++ b/util/sbase/unexpand.c @@ -0,0 +1,174 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdint.h> +#include <stdlib.h> +#include <string.h> + +#include "utf.h" +#include "util.h" + +static int aflag = 0; +static size_t *tablist = NULL; +static size_t tablistlen = 8; + +static size_t +parselist(const char *s) +{ + size_t i; + char *p, *tmp; + + tmp = estrdup(s); + for (i = 0; (p = strsep(&tmp, " ,")); i++) { + if (*p == '\0') + eprintf("empty field in tablist\n"); + tablist = ereallocarray(tablist, i + 1, sizeof(*tablist)); + tablist[i] = estrtonum(p, 1, MIN(LLONG_MAX, SIZE_MAX)); + if (i > 0 && tablist[i - 1] >= tablist[i]) + eprintf("tablist must be ascending\n"); + } + tablist = ereallocarray(tablist, i + 1, sizeof(*tablist)); + + return i; +} + +static void +unexpandspan(size_t last, size_t col) +{ + size_t off, i, j; + Rune r; + + if (tablistlen == 1) { + i = 0; + off = last % tablist[i]; + + if ((col - last) + off >= tablist[i] && last < col) + last -= off; + + r = '\t'; + for (; last + tablist[i] <= col; last += tablist[i]) + efputrune(&r, stdout, "<stdout>"); + r = ' '; + for (; last < col; last++) + efputrune(&r, stdout, "<stdout>"); + } else { + for (i = 0; i < tablistlen; i++) + if (col < tablist[i]) + break; + for (j = 0; j < tablistlen; j++) + if (last < tablist[j]) + break; + r = '\t'; + for (; j < i; j++) { + efputrune(&r, stdout, "<stdout>"); + last = tablist[j]; + } + r = ' '; + for (; last < col; last++) + efputrune(&r, stdout, "<stdout>"); + } +} + +static void +unexpand(const char *file, FILE *fp) +{ + Rune r; + size_t last = 0, col = 0, i; + int bol = 1; + + while (efgetrune(&r, fp, file)) { + switch (r) { + case ' ': + if (!bol && !aflag) + last++; + col++; + break; + case '\t': + if (tablistlen == 1) { + if (!bol && !aflag) + last += tablist[0] - col % tablist[0]; + col += tablist[0] - col % tablist[0]; + } else { + for (i = 0; i < tablistlen; i++) + if (col < tablist[i]) + break; + if (!bol && !aflag) + last = tablist[i]; + col = tablist[i]; + } + break; + case '\b': + if (bol || aflag) + unexpandspan(last, col); + col -= (col > 0); + last = col; + bol = 0; + break; + case '\n': + if (bol || aflag) + unexpandspan(last, col); + last = col = 0; + bol = 1; + break; + default: + if (bol || aflag) + unexpandspan(last, col); + last = ++col; + bol = 0; + break; + } + if ((r != ' ' && r != '\t') || (!aflag && !bol)) + efputrune(&r, stdout, "<stdout>"); + } + if (last < col && (bol || aflag)) + unexpandspan(last, col); +} + +static void +usage(void) +{ + eprintf("usage: %s [-a] [-t tablist] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + FILE *fp; + int ret = 0; + char *tl = "8"; + + ARGBEGIN { + case 't': + tl = EARGF(usage()); + if (!*tl) + eprintf("tablist cannot be empty\n"); + /* Fallthrough: -t implies -a */ + case 'a': + aflag = 1; + break; + default: + usage(); + } ARGEND + + tablistlen = parselist(tl); + + if (!argc) { + unexpand("<stdin>", stdin); + } else { + for (; *argv; argc--, argv++) { + if (!strcmp(*argv, "-")) { + *argv = "<stdin>"; + fp = stdin; + } else if (!(fp = fopen(*argv, "r"))) { + weprintf("fopen %s:", *argv); + ret = 1; + continue; + } + unexpand(*argv, fp); + if (fp != stdin && fshut(fp, *argv)) + ret = 1; + } + } + + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/uniq.1 b/util/sbase/uniq.1 new file mode 100644 index 00000000..8ed1a015 --- /dev/null +++ b/util/sbase/uniq.1 @@ -0,0 +1,45 @@ +.Dd October 8, 2015 +.Dt UNIQ 1 +.Os sbase +.Sh NAME +.Nm uniq +.Nd report or filter out repeated lines in a file +.Sh SYNOPSIS +.Nm +.Op Fl c +.Op Fl d | u +.Op Fl f Ar num +.Op Fl s Ar num +.Op Ar input Op Ar output +.Sh DESCRIPTION +.Nm +reads the +.Ar input +file and writes one copy of a line from each group of consecutive +duplicate lines to the +.Ar output +file. +If no +.Ar input +file is given +.Nm +reads from stdin. +If no +.Ar output +file is given +.Nm +writes to stdout. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl c +Prefix each line with the number of consecutive occurrences in +.Ar input . +.It Fl d | Fl u +Print duplicate | unique lines only. +.It Fl f Ar num | Fl s Ar num +Ignore the first +.Ar num +fields | characters in each input line when doing comparisons. +.El +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/uniq.c b/util/sbase/uniq.c new file mode 100644 index 00000000..f1ad6a7b --- /dev/null +++ b/util/sbase/uniq.c @@ -0,0 +1,144 @@ +/* See LICENSE file for copyright and license details. */ +#include <ctype.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "text.h" +#include "util.h" + +static const char *countfmt = ""; +static int dflag = 0; +static int uflag = 0; +static int fskip = 0; +static int sskip = 0; + +static struct line prevl; +static ssize_t prevoff = -1; +static long prevlinecount = 0; + +static size_t +uniqskip(struct line *l) +{ + size_t i; + int f = fskip, s = sskip; + + for (i = 0; i < l->len && f; --f) { + while (isblank(l->data[i])) + i++; + while (i < l->len && !isblank(l->data[i])) + i++; + } + for (; s && i < l->len && l->data[i] != '\n'; --s, i++) + ; + + return i; +} + +static void +uniqline(FILE *ofp, struct line *l) +{ + size_t loff; + + if (l) { + loff = uniqskip(l); + + if (prevoff >= 0 && (l->len - loff) == (prevl.len - prevoff) && + !memcmp(l->data + loff, prevl.data + prevoff, l->len - loff)) { + ++prevlinecount; + return; + } + } + + if (prevoff >= 0) { + if ((prevlinecount == 1 && !dflag) || + (prevlinecount != 1 && !uflag)) { + if (*countfmt) + fprintf(ofp, countfmt, prevlinecount); + fwrite(prevl.data, 1, prevl.len, ofp); + } + prevoff = -1; + } + + if (l) { + if (!prevl.data || l->len >= prevl.len) { + prevl.data = erealloc(prevl.data, l->len); + } + prevl.len = l->len; + memcpy(prevl.data, l->data, prevl.len); + prevoff = loff; + } + prevlinecount = 1; +} + +static void +uniq(FILE *fp, FILE *ofp) +{ + static struct line line; + static size_t size; + ssize_t len; + + while ((len = getline(&line.data, &size, fp)) > 0) { + line.len = len; + uniqline(ofp, &line); + } +} + +static void +uniqfinish(FILE *ofp) +{ + uniqline(ofp, NULL); +} + +static void +usage(void) +{ + eprintf("usage: %s [-c] [-d | -u] [-f fields] [-s chars]" + " [input [output]]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + FILE *fp[2] = { stdin, stdout }; + int ret = 0, i; + char *fname[2] = { "<stdin>", "<stdout>" }; + + ARGBEGIN { + case 'c': + countfmt = "%7ld "; + break; + case 'd': + dflag = 1; + break; + case 'u': + uflag = 1; + break; + case 'f': + fskip = estrtonum(EARGF(usage()), 0, INT_MAX); + break; + case 's': + sskip = estrtonum(EARGF(usage()), 0, INT_MAX); + break; + default: + usage(); + } ARGEND + + if (argc > 2) + usage(); + + for (i = 0; i < argc; i++) { + if (strcmp(argv[i], "-")) { + fname[i] = argv[i]; + if (!(fp[i] = fopen(argv[i], (i == 0) ? "r" : "w"))) + eprintf("fopen %s:", argv[i]); + } + } + + uniq(fp[0], fp[1]); + uniqfinish(fp[1]); + + ret |= fshut(fp[0], fname[0]) | fshut(fp[1], fname[1]); + + return ret; +} diff --git a/util/sbase/unlink.1 b/util/sbase/unlink.1 new file mode 100644 index 00000000..777c89da --- /dev/null +++ b/util/sbase/unlink.1 @@ -0,0 +1,19 @@ +.Dd October 8, 2015 +.Dt UNLINK 1 +.Os sbase +.Sh NAME +.Nm unlink +.Nd unlink file +.Sh SYNOPSIS +.Nm +.Ar file +.Sh DESCRIPTION +.Nm +calls +.Xr unlink 2 +on +.Ar file . +.Sh SEE ALSO +.Xr unlink 2 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/unlink.c b/util/sbase/unlink.c new file mode 100644 index 00000000..c695fa80 --- /dev/null +++ b/util/sbase/unlink.c @@ -0,0 +1,27 @@ +/* See LICENSE file for copyright and license details. */ +#include <unistd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s file\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + ARGBEGIN { + default: + usage(); + } ARGEND + + if (argc != 1) + usage(); + + if (unlink(argv[0]) < 0) + eprintf("unlink: '%s':", argv[0]); + + return 0; +} diff --git a/util/sbase/utf.h b/util/sbase/utf.h new file mode 100644 index 00000000..8e0707a7 --- /dev/null +++ b/util/sbase/utf.h @@ -0,0 +1,69 @@ +/* MIT/X Consortium Copyright (c) 2012 Connor Lane Smith <cls@lubutu.com> + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ +#include <stdio.h> + +typedef int Rune; + +enum { + UTFmax = 6, /* maximum bytes per rune */ + Runeself = 0x80, /* rune and utf are equal (<) */ + Runeerror = 0xFFFD, /* decoding error in utf */ + Runemax = 0x10FFFF /* maximum rune value */ +}; + +int runetochar(char *, const Rune *); +int chartorune(Rune *, const char *); +int charntorune(Rune *, const char *, size_t); +int runelen(Rune); +size_t runenlen(const Rune *, size_t); +int fullrune(const char *, size_t); +char *utfecpy(char *, char *, const char *); +size_t utflen(const char *); +size_t utfnlen(const char *, size_t); +size_t utfmemlen(const char *, size_t); +char *utfrune(const char *, Rune); +char *utfrrune(const char *, Rune); +char *utfutf(const char *, const char *); + +int isalnumrune(Rune); +int isalpharune(Rune); +int isblankrune(Rune); +int iscntrlrune(Rune); +int isdigitrune(Rune); +int isgraphrune(Rune); +int islowerrune(Rune); +int isprintrune(Rune); +int ispunctrune(Rune); +int isspacerune(Rune); +int istitlerune(Rune); +int isupperrune(Rune); +int isxdigitrune(Rune); + +Rune tolowerrune(Rune); +Rune toupperrune(Rune); + +size_t utftorunestr(const char *, Rune *); +size_t utfntorunestr(const char *, size_t, Rune *); + +int fgetrune(Rune *, FILE *); +int efgetrune(Rune *, FILE *, const char *); +int fputrune(const Rune *, FILE *); +int efputrune(const Rune *, FILE *, const char *); diff --git a/util/sbase/util.h b/util/sbase/util.h new file mode 100644 index 00000000..6b6a084b --- /dev/null +++ b/util/sbase/util.h @@ -0,0 +1,97 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/types.h> + +#include <regex.h> +#include <stddef.h> +#include <stdio.h> +#include <stdarg.h> + +#include "arg.h" +#include "compat.h" + +#define UTF8_POINT(c) (((c) & 0xc0) != 0x80) + +#undef MIN +#define MIN(x,y) ((x) < (y) ? (x) : (y)) +#undef MAX +#define MAX(x,y) ((x) > (y) ? (x) : (y)) +#undef LIMIT +#define LIMIT(x, a, b) (x) = (x) < (a) ? (a) : (x) > (b) ? (b) : (x) + +#define LEN(x) (sizeof (x) / sizeof *(x)) + +extern char *argv0; + +void *ecalloc(size_t, size_t); +void *emalloc(size_t); +void *erealloc(void *, size_t); +#undef reallocarray +void *reallocarray(void *, size_t, size_t); +void *ereallocarray(void *, size_t, size_t); +char *estrdup(const char *); +char *estrndup(const char *, size_t); +void *encalloc(int, size_t, size_t); +void *enmalloc(int, size_t); +void *enrealloc(int, void *, size_t); +void *enreallocarray(int, void *, size_t, size_t); +char *enstrdup(int, const char *); +char *enstrndup(int, const char *, size_t); + +void enfshut(int, FILE *, const char *); +void efshut(FILE *, const char *); +int fshut(FILE *, const char *); + +void enprintf(int, const char *, ...); +void eprintf(const char *, ...); +void weprintf(const char *, ...); +void xvprintf(const char *, va_list); + +int confirm(const char*, ...); + +double estrtod(const char *); + +#undef strcasestr +#define strcasestr xstrcasestr +char *strcasestr(const char *, const char *); + +#undef strlcat +#define strlcat xstrlcat +size_t strlcat(char *, const char *, size_t); +size_t estrlcat(char *, const char *, size_t); +#undef strlcpy +#define strlcpy xstrlcpy +size_t strlcpy(char *, const char *, size_t); +size_t estrlcpy(char *, const char *, size_t); + +#undef strsep +#define strsep xstrsep +char *strsep(char **, const char *); + +void strnsubst(char **, const char *, const char *, size_t); + +/* regex */ +int enregcomp(int, regex_t *, const char *, int); +int eregcomp(regex_t *, const char *, int); + +/* io */ +ssize_t writeall(int, const void *, size_t); +int concat(int, const char *, int, const char *); + +/* misc */ +void enmasse(int, char **, int (*)(const char *, const char *, int)); +void fnck(const char *, const char *, int (*)(const char *, const char *, int), int); +mode_t getumask(void); +char *humansize(off_t); +mode_t parsemode(const char *, mode_t, mode_t); +off_t parseoffset(const char *); +void putword(FILE *, const char *); +#undef strtonum +#define strtonum xstrtonum +long long strtonum(const char *, long long, long long, const char **); +long long enstrtonum(int, const char *, long long, long long); +long long estrtonum(const char *, long long, long long); +size_t unescape(char *); +int mkdirp(const char *, mode_t, mode_t); +#undef memmem +#define memmem xmemmem +void *memmem(const void *, size_t, const void *, size_t); diff --git a/util/sbase/uudecode.1 b/util/sbase/uudecode.1 new file mode 100644 index 00000000..d6408659 --- /dev/null +++ b/util/sbase/uudecode.1 @@ -0,0 +1,46 @@ +.Dd October 8, 2015 +.Dt UUDECODE 1 +.Os sbase +.Sh NAME +.Nm uudecode +.Nd decode a uuencoded file +.Sh SYNOPSIS +.Nm +.Op Fl m +.Op Fl o Ar output +.Op Ar file +.Sh DESCRIPTION +.Nm +reads +.Ar file +and writes a decoded version to the file specified in the uuencoded header. +In case the file already exists, it is truncated. +Otherwise a new file is created. +The permissions of the created/accessed file are changed to reflect the +mode in the header. +If no +.Ar file +is given +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl m +Use Base64 for decoding. +.It Fl o Ar output +Write to +.Ar output +rather than the file specified in the header. +.El +.Sh IMPLEMENTATION NOTES +For safety uudecode operates on regular files and stdout only. +Trying to uudecode to a link, directory, or special file +yields an error. +.Sh SEE ALSO +.Xr uuencode 1 +.Sh STANDARDS +POSIX.1-2013. +.Pp +The +.Op Fl m +flag is an extension to that specification. diff --git a/util/sbase/uudecode.c b/util/sbase/uudecode.c new file mode 100644 index 00000000..1d0bf72a --- /dev/null +++ b/util/sbase/uudecode.c @@ -0,0 +1,282 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> + +#include <errno.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> + +#include "util.h" + +static int mflag = 0; +static int oflag = 0; + +static FILE * +parsefile(const char *fname) +{ + struct stat st; + int ret; + + if (!strcmp(fname, "/dev/stdout") || !strcmp(fname, "-")) + return stdout; + ret = lstat(fname, &st); + /* if it is a new file, try to open it */ + if (ret < 0 && errno == ENOENT) + goto tropen; + if (ret < 0) { + weprintf("lstat %s:", fname); + return NULL; + } + if (!S_ISREG(st.st_mode)) { + weprintf("for safety uudecode operates only on regular files and /dev/stdout\n"); + return NULL; + } +tropen: + return fopen(fname, "w"); +} + +static void +parseheader(FILE *fp, const char *s, char **header, mode_t *mode, char **fname) +{ + static char bufs[PATH_MAX + 18]; /* len header + mode + maxname */ + char *p, *q; + size_t n; + + if (!fgets(bufs, sizeof(bufs), fp)) + if (ferror(fp)) + eprintf("%s: read error:", s); + if (bufs[0] == '\0' || feof(fp)) + eprintf("empty or nil header string\n"); + if (!(p = strchr(bufs, '\n'))) + eprintf("header string too long or non-newline terminated file\n"); + p = bufs; + if (!(q = strchr(p, ' '))) + eprintf("malformed mode string in header, expected ' '\n"); + *header = bufs; + *q++ = '\0'; + p = q; + /* now header should be null terminated, q points to mode */ + if (!(q = strchr(p, ' '))) + eprintf("malformed mode string in header, expected ' '\n"); + *q++ = '\0'; + /* now mode should be null terminated, q points to fname */ + *mode = parsemode(p, *mode, 0); + n = strlen(q); + while (n > 0 && (q[n - 1] == '\n' || q[n - 1] == '\r')) + q[--n] = '\0'; + if (n > 0) + *fname = q; + else + eprintf("header string does not contain output file\n"); +} + +static const char b64dt[] = { + -1,-1,-1,-1,-1,-1,-1,-1,-1,-2,-2,-2,-2,-2,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1, + -1,-1,-1,-1,-1,-1,-1,-1,-2,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,62,-1,-1,-1,63, + 52,53,54,55,56,57,58,59,60,61,-1,-1,-1, 0,-1,-1,-1, 0, 1, 2, 3, 4, 5, 6, + 7, 8, 9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,-1,-1,-1,-1,-1, + -1,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48, + 49,50,51,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1, + -1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1, + -1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1, + -1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1, + -1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1, + -1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1, +}; + +static void +uudecodeb64(FILE *fp, FILE *outfp) +{ + char bufb[60], *pb; + char out[45], *po; + size_t n; + int b = 0, e, t = -1, l = 1; + unsigned char b24[3] = {0, 0, 0}; + + while ((n = fread(bufb, 1, sizeof(bufb), fp))) { + for (pb = bufb, po = out; pb < bufb + n; pb++) { + if (*pb == '\n') { + l++; + continue; + } else if (*pb == '=') { + switch (b) { + case 0: + /* expected '=' remaining + * including footer */ + if (--t) { + fwrite(out, 1, + (po - out), + outfp); + return; + } + continue; + case 1: + eprintf("%d: unexpected \"=\"" + "appeared\n", l); + case 2: + *po++ = b24[0]; + b = 0; + t = 5; /* expect 5 '=' */ + continue; + case 3: + *po++ = b24[0]; + *po++ = b24[1]; + b = 0; + t = 6; /* expect 6 '=' */ + continue; + } + } else if ((e = b64dt[(int)*pb]) == -1) + eprintf("%d: invalid byte \"%c\"\n", l, *pb); + else if (e == -2) /* whitespace */ + continue; + else if (t > 0) /* state is parsing pad/footer */ + eprintf("%d: invalid byte \"%c\"" + " after padding\n", + l, *pb); + switch (b) { /* decode next base64 chr based on state */ + case 0: b24[0] |= e << 2; break; + case 1: b24[0] |= (e >> 4) & 0x3; + b24[1] |= (e & 0xf) << 4; break; + case 2: b24[1] |= (e >> 2) & 0xf; + b24[2] |= (e & 0x3) << 6; break; + case 3: b24[2] |= e; break; + } + if (++b == 4) { /* complete decoding an octet */ + *po++ = b24[0]; + *po++ = b24[1]; + *po++ = b24[2]; + b24[0] = b24[1] = b24[2] = 0; + b = 0; + } + } + fwrite(out, 1, (po - out), outfp); + } + eprintf("%d: invalid uudecode footer \"====\" not found\n", l); +} + +static void +uudecode(FILE *fp, FILE *outfp) +{ + char *bufb = NULL, *p; + size_t n = 0; + ssize_t len; + int ch, i; + +#define DEC(c) (((c) - ' ') & 077) /* single character decode */ +#define IS_DEC(c) ( (((c) - ' ') >= 0) && (((c) - ' ') <= 077 + 1) ) +#define OUT_OF_RANGE(c) eprintf("character %c out of range: [%d-%d]\n", (c), 1 + ' ', 077 + ' ' + 1) + + while ((len = getline(&bufb, &n, fp)) > 0) { + p = bufb; + /* trim newlines */ + if (!len || bufb[len - 1] != '\n') + eprintf("no newline found, aborting\n"); + bufb[len - 1] = '\0'; + + /* check for last line */ + if ((i = DEC(*p)) <= 0) + break; + for (++p; i > 0; p += 4, i -= 3) { + if (i >= 3) { + if (!(IS_DEC(*p) && IS_DEC(*(p + 1)) && + IS_DEC(*(p + 2)) && IS_DEC(*(p + 3)))) + OUT_OF_RANGE(*p); + + ch = DEC(p[0]) << 2 | DEC(p[1]) >> 4; + putc(ch, outfp); + ch = DEC(p[1]) << 4 | DEC(p[2]) >> 2; + putc(ch, outfp); + ch = DEC(p[2]) << 6 | DEC(p[3]); + putc(ch, outfp); + } else { + if (i >= 1) { + if (!(IS_DEC(*p) && IS_DEC(*(p + 1)))) + OUT_OF_RANGE(*p); + + ch = DEC(p[0]) << 2 | DEC(p[1]) >> 4; + putc(ch, outfp); + } + if (i >= 2) { + if (!(IS_DEC(*(p + 1)) && + IS_DEC(*(p + 2)))) + OUT_OF_RANGE(*p); + + ch = DEC(p[1]) << 4 | DEC(p[2]) >> 2; + putc(ch, outfp); + } + } + } + if (ferror(fp)) + eprintf("read error:"); + } + /* check for end or fail */ + if ((len = getline(&bufb, &n, fp)) < 0) + eprintf("getline:"); + if (len < 3 || strncmp(bufb, "end", 3) || bufb[3] != '\n') + eprintf("invalid uudecode footer \"end\" not found\n"); + free(bufb); +} + +static void +usage(void) +{ + eprintf("usage: %s [-m] [-o output] [file]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + FILE *fp = NULL, *nfp = NULL; + mode_t mode = 0; + int ret = 0; + char *fname, *header, *ifname, *ofname = NULL; + void (*d) (FILE *, FILE *) = NULL; + + ARGBEGIN { + case 'm': + mflag = 1; /* accepted but unused (autodetect file type) */ + break; + case 'o': + oflag = 1; + ofname = EARGF(usage()); + break; + default: + usage(); + } ARGEND + + if (argc > 1) + usage(); + + if (!argc || !strcmp(argv[0], "-")) { + fp = stdin; + ifname = "<stdin>"; + } else { + if (!(fp = fopen(argv[0], "r"))) + eprintf("fopen %s:", argv[0]); + ifname = argv[0]; + } + + parseheader(fp, ifname, &header, &mode, &fname); + + if (!strncmp(header, "begin", sizeof("begin"))) + d = uudecode; + else if (!strncmp(header, "begin-base64", sizeof("begin-base64"))) + d = uudecodeb64; + else + eprintf("unknown header %s:", header); + + if (oflag) + fname = ofname; + if (!(nfp = parsefile(fname))) + eprintf("fopen %s:", fname); + + d(fp, nfp); + + if (nfp != stdout && chmod(fname, mode) < 0) + eprintf("chmod %s:", fname); + + ret |= fshut(fp, (fp == stdin) ? "<stdin>" : argv[0]); + ret |= fshut(nfp, (nfp == stdout) ? "<stdout>" : fname); + + return ret; +} diff --git a/util/sbase/uuencode.1 b/util/sbase/uuencode.1 new file mode 100644 index 00000000..859f4a79 --- /dev/null +++ b/util/sbase/uuencode.1 @@ -0,0 +1,34 @@ +.Dd October 8, 2015 +.Dt UUENCODE 1 +.Os sbase +.Sh NAME +.Nm uuencode +.Nd encode a binary file +.Sh SYNOPSIS +.Nm +.Op Fl m +.Op Ar file +.Ar name +.Sh DESCRIPTION +.Nm +reads +.Ar file +and writes an encoded version to stdout. +The encoding uses only printing ASCII characters and +includes the mode of the file and the operand +.Ar name +for use by uudecode. +If no +.Ar name +is given +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl m +Use Base64 for encoding. +.El +.Sh SEE ALSO +.Xr uudecode 1 +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/uuencode.c b/util/sbase/uuencode.c new file mode 100644 index 00000000..b5317205 --- /dev/null +++ b/util/sbase/uuencode.c @@ -0,0 +1,129 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> + +#include <stdio.h> +#include <string.h> + +#include "util.h" + +static unsigned int +b64e(unsigned char *b) +{ + unsigned int o, p = b[2] | (b[1] << 8) | (b[0] << 16); + const char b64et[] = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/"; + + o = b64et[p & 0x3f]; p >>= 6; + o = (o << 8) | b64et[p & 0x3f]; p >>= 6; + o = (o << 8) | b64et[p & 0x3f]; p >>= 6; + o = (o << 8) | b64et[p & 0x3f]; + + return o; +} + +static void +uuencodeb64(FILE *fp, const char *name, const char *s) +{ + struct stat st; + ssize_t n, m = 0; + unsigned char buf[45], *pb; + unsigned int out[sizeof(buf)/3 + 1], *po; + + if (fstat(fileno(fp), &st) < 0) + eprintf("fstat %s:", s); + printf("begin-base64 %o %s\n", st.st_mode & 0777, name); + /* write line by line */ + while ((n = fread(buf, 1, sizeof(buf), fp))) { + /* clear old buffer if converting with non-multiple of 3 */ + if (n != sizeof(buf) && (m = n % 3) != 0) { + buf[n] = '\0'; /* m == 2 */ + if (m == 1) buf[n+1] = '\0'; /* m == 1 */ + } + for (pb = buf, po = out; pb < buf + n; pb += 3) + *po++ = b64e(pb); + if (m != 0) { + unsigned int mask = 0xffffffff, dest = 0x3d3d3d3d; + /* m==2 -> 0x00ffffff; m==1 -> 0x0000ffff */ + mask >>= ((3-m) << 3); + po[-1] = (po[-1] & mask) | (dest & ~mask); + } + *po++ = '\n'; + fwrite(out, 1, (po - out) * sizeof(unsigned int) - 3, stdout); + } + if (ferror(fp)) + eprintf("'%s' read error:", s); + puts("===="); +} + +static void +uuencode(FILE *fp, const char *name, const char *s) +{ + struct stat st; + unsigned char buf[45], *p; + ssize_t n; + int ch; + + if (fstat(fileno(fp), &st) < 0) + eprintf("fstat %s:", s); + printf("begin %o %s\n", st.st_mode & 0777, name); + while ((n = fread(buf, 1, sizeof(buf), fp))) { + ch = ' ' + (n & 0x3f); + putchar(ch == ' ' ? '`' : ch); + for (p = buf; n > 0; n -= 3, p += 3) { + if (n < 3) { + p[2] = '\0'; + if (n < 2) + p[1] = '\0'; + } + ch = ' ' + ((p[0] >> 2) & 0x3f); + putchar(ch == ' ' ? '`' : ch); + ch = ' ' + (((p[0] << 4) | ((p[1] >> 4) & 0xf)) & 0x3f); + putchar(ch == ' ' ? '`' : ch); + ch = ' ' + (((p[1] << 2) | ((p[2] >> 6) & 0x3)) & 0x3f); + putchar(ch == ' ' ? '`' : ch); + ch = ' ' + (p[2] & 0x3f); + putchar(ch == ' ' ? '`' : ch); + } + putchar('\n'); + } + if (ferror(fp)) + eprintf("'%s' read error:", s); + printf("%c\nend\n", '`'); +} + +static void +usage(void) +{ + eprintf("usage: %s [-m] [file] name\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + FILE *fp = NULL; + void (*uuencode_f)(FILE *, const char *, const char *) = uuencode; + int ret = 0; + + ARGBEGIN { + case 'm': + uuencode_f = uuencodeb64; + break; + default: + usage(); + } ARGEND + + if (!argc || argc > 2) + usage(); + + if (argc == 1 || !strcmp(argv[0], "-")) { + uuencode_f(stdin, argv[0], "<stdin>"); + } else { + if (!(fp = fopen(argv[0], "r"))) + eprintf("fopen %s:", argv[0]); + uuencode_f(fp, argv[1], argv[0]); + } + + ret |= fp && fshut(fp, argv[0]); + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/wc.1 b/util/sbase/wc.1 new file mode 100644 index 00000000..91c05018 --- /dev/null +++ b/util/sbase/wc.1 @@ -0,0 +1,28 @@ +.Dd October 8, 2015 +.Dt WC 1 +.Os sbase +.Sh NAME +.Nm wc +.Nd word count +.Sh SYNOPSIS +.Nm +.Op Fl c | Fl m +.Op Fl lw +.Op Ar file ... +.Sh DESCRIPTION +.Nm +writes the number of lines, words and bytes in each +.Ar file +to stdout. +If no +.Ar file +is given +.Nm +reads from stdin. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl c | Fl l | Fl m | Fl w +Print the number of bytes | lines | characters | words. +.El +.Sh STANDARDS +POSIX.1-2013. diff --git a/util/sbase/wc.c b/util/sbase/wc.c new file mode 100644 index 00000000..c89d19f8 --- /dev/null +++ b/util/sbase/wc.c @@ -0,0 +1,122 @@ +/* See LICENSE file for copyright and license details. */ +#include <string.h> + +#include "utf.h" +#include "util.h" + +static int lflag = 0; +static int wflag = 0; +static char cmode = 0; +static size_t tc = 0, tl = 0, tw = 0; + +static void +output(const char *str, size_t nc, size_t nl, size_t nw) +{ + int first = 1; + + if (lflag) { + first = 0; + printf("%zu", nl); + } + if (wflag) { + if (!first) + putchar(' '); + first = 0; + printf("%zu", nw); + } + if (cmode) { + if (!first) + putchar(' '); + printf("%zu", nc); + } + if (str) + printf(" %s", str); + putchar('\n'); +} + +static void +wc(FILE *fp, const char *str) +{ + int word = 0, rlen; + Rune c; + size_t nc = 0, nl = 0, nw = 0; + + while ((rlen = efgetrune(&c, fp, str))) { + nc += (cmode == 'c') ? rlen : (c != Runeerror); + if (c == '\n') + nl++; + if (!isspacerune(c)) + word = 1; + else if (word) { + word = 0; + nw++; + } + } + if (word) + nw++; + tc += nc; + tl += nl; + tw += nw; + output(str, nc, nl, nw); +} + +static void +usage(void) +{ + eprintf("usage: %s [-c | -m] [-lw] [file ...]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + FILE *fp; + int many; + int ret = 0; + + ARGBEGIN { + case 'c': + cmode = 'c'; + break; + case 'm': + cmode = 'm'; + break; + case 'l': + lflag = 1; + break; + case 'w': + wflag = 1; + break; + default: + usage(); + } ARGEND + + if (!lflag && !wflag && !cmode) { + cmode = 'c'; + lflag = 1; + wflag = 1; + } + + if (!argc) { + wc(stdin, NULL); + } else { + for (many = (argc > 1); *argv; argc--, argv++) { + if (!strcmp(*argv, "-")) { + *argv = "<stdin>"; + fp = stdin; + } else if (!(fp = fopen(*argv, "r"))) { + weprintf("fopen %s:", *argv); + ret = 1; + continue; + } + wc(fp, *argv); + if (fp != stdin && fshut(fp, *argv)) + ret = 1; + } + if (many) + output("total", tc, tl, tw); + } + + ret |= fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"); + + return ret; +} diff --git a/util/sbase/which.1 b/util/sbase/which.1 new file mode 100644 index 00000000..9ba4b224 --- /dev/null +++ b/util/sbase/which.1 @@ -0,0 +1,44 @@ +.Dd October 8, 2015 +.Dt WHICH 1 +.Os sbase +.Sh NAME +.Nm which +.Nd locate programs in the path +.Sh SYNOPSIS +.Nm +.Op Fl a +.Ar name ... +.Sh DESCRIPTION +.Nm +looks for each +.Ar name +in the +.Ev PATH +directories, stopping at the first match and printing +the full path to stdout. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl a +Don't stop at the first match and search all +.Ev PATH +directories. +.El +.Sh EXIT STATUS +.Bl -tag -width Ds +.It 0 +Each +.Ar name +was found. +.It 1 +At least one +.Ar name +was not found. +.It 2 +No +.Ar name +was found. +.It 3 +An error occurred. +.El +.Sh SEE ALSO +.Xr environ 7 diff --git a/util/sbase/which.c b/util/sbase/which.c new file mode 100644 index 00000000..abd030e7 --- /dev/null +++ b/util/sbase/which.c @@ -0,0 +1,101 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/stat.h> +#include <sys/types.h> + +#include <fcntl.h> +#include <limits.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + +#include "util.h" + +static int aflag; + +static int +canexec(int fd, const char *name) +{ + struct stat st; + + if (fstatat(fd, name, &st, 0) < 0 || !S_ISREG(st.st_mode)) + return 0; + return faccessat(fd, name, X_OK, AT_EACCESS) == 0; +} + +static int +which(const char *path, const char *name) +{ + char *ptr, *p; + size_t i, len; + int dirfd, found = 0; + + if (strchr(name, '/')) { + found = canexec(AT_FDCWD, name); + if (found) + puts(name); + return found; + } + + ptr = p = enstrdup(3, path); + len = strlen(p); + for (i = 0; i < len + 1; i++) { + if (ptr[i] != ':' && ptr[i] != '\0') + continue; + ptr[i] = '\0'; + if ((dirfd = open(p, O_RDONLY)) >= 0) { + if (canexec(dirfd, name)) { + found = 1; + fputs(p, stdout); + if (i && ptr[i - 1] != '/') + fputc('/', stdout); + puts(name); + } + close(dirfd); + if (!aflag && found) + break; + } + p = ptr + i + 1; + } + free(ptr); + + return found; +} + +static void +usage(void) +{ + eprintf("usage: %s [-a] name ...\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + char *path; + int found = 0, foundall = 1; + + ARGBEGIN { + case 'a': + aflag = 1; + break; + default: + usage(); + } ARGEND + + if (!argc) + usage(); + + if (!(path = getenv("PATH"))) + enprintf(3, "$PATH is not set\n"); + + for (; *argv; argc--, argv++) { + if (which(path, *argv)) { + found = 1; + } else { + weprintf("%s: not an external command\n", *argv); + foundall = 0; + } + } + + return found ? foundall ? 0 : 1 : 2; +} diff --git a/util/sbase/whoami.1 b/util/sbase/whoami.1 new file mode 100644 index 00000000..d552a327 --- /dev/null +++ b/util/sbase/whoami.1 @@ -0,0 +1,9 @@ +.Dd December 14, 2015 +.Dt WHOAMI 1 +.Os sbase +.Sh NAME +.Nm whoami +.Nd show effective uid +.Sh SYNOPSIS +.Nm +writes the name of the effective uid to stdout. diff --git a/util/sbase/whoami.c b/util/sbase/whoami.c new file mode 100644 index 00000000..c991ac29 --- /dev/null +++ b/util/sbase/whoami.c @@ -0,0 +1,37 @@ +/* See LICENSE file for copyright and license details. */ +#include <errno.h> +#include <stdio.h> +#include <unistd.h> +#include <pwd.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + uid_t uid; + struct passwd *pw; + + argv0 = *argv, argv0 ? (argc--, argv++) : (void *)0; + + if (argc) + usage(); + + uid = geteuid(); + errno = 0; + if (!(pw = getpwuid(uid))) { + if (errno) + eprintf("getpwuid %d:", uid); + else + eprintf("getpwuid %d: no such user\n", uid); + } + puts(pw->pw_name); + + return fshut(stdout, "<stdout>"); +} diff --git a/util/sbase/xargs.1 b/util/sbase/xargs.1 new file mode 100644 index 00000000..e988278d --- /dev/null +++ b/util/sbase/xargs.1 @@ -0,0 +1,121 @@ +.Dd July 30, 2025 +.Dt XARGS 1 +.Os sbase +.Sh NAME +.Nm xargs +.Nd construct argument lists and execute command +.Sh SYNOPSIS +.Nm +.Op Fl 0prtx +.Op Fl E Ar eofstr +.Op Fl I Ar replstr +.Op Fl n Ar num +.Op Fl P Ar maxprocs +.Op Fl s Ar num +.Op Ar cmd Op Ar arg ... +.Sh DESCRIPTION +.Nm +reads space, tab, newline and EOF delimited strings from stdin +and executes the specified +.Ar cmd +with the strings as +.Ar arguments . +.Pp +Any arguments specified on the command line are given to the command upon +each invocation, followed by some number of the arguments read from +stdin. +The command is repeatedly executed one or more times until stdin is exhausted. +.Pp +Spaces, tabs and newlines may be embedded in arguments using single (`'') +or double (`"') quotes or backslashes ('\e'). +Single quotes escape all non-single quote characters, excluding newlines, up +to the matching single quote. +Double quotes escape all non-double quote characters, excluding newlines, up +to the matching double quote. +Any single character, including newlines, may be escaped by a backslash. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl 0 +Change +.Nm +to expect NUL ('\e0') characters as separators, instead of spaces +and newlines. +The quoting mechanisms described above are not performed. +.It Fl E Ar eofstr +Use +.Ar eofstr +as a logical EOF marker. +.It Fl I Ar replstr +Use +.Ar replstr +as the placeholder for the argument. +Sets the arguments count to 1 per command line. +It also implies the option x. +.It Fl n Ar num +Use at most +.Ar num +arguments per command line. +.It Fl p +Prompt mode: the user is asked whether to execute +.Ar cmd +at each invocation. +Trace mode (-t) is turned on to write the command instance to be executed, +followed by a prompt to standard error. +An affirmative response read from +.Pa /dev/tty +executes the command, otherwise it is skipped. +.It Fl P Ar maxprocs +Parallel mode: run at most maxprocs invocations of +.Ar cmd +at once. +.It Fl r +Do not run the command if there are no arguments. +Normally the command is executed at least once even if there are no arguments. +.It Fl s Ar num +Use at most +.Ar num +bytes per command line. +.It Fl t +Enable trace mode. +Write the command line to stderr before executing it. +.It Fl x +Terminate if the command line exceeds the system limit or the number of bytes +given with the +.Op Fl s +flag. +.El +.Sh EXIT STATUS +.Nm +exits with one of the following values: +.Bl -tag -width Ds +.It 0 +All invocations of +.Ar cmd +returned a zero exit status. +.It 123 +One or more invocations of +.Ar cmd +returned a nonzero exit status. +.It 124 +.Ar cmd +exited with a 255 exit status. +.It 125 +.Ar cmd +was killed or stopped by a signal. +.It 126 +.Ar cmd +was found but could not be executed. +.It 127 +.Ar cmd +could not be found. +.It 1 +Some other error occurred. +.El +.Sh STANDARDS +POSIX.1-2013. +.Pp +The +.Op Fl r +and +.Op Fl P +flag is an extension to that specification. diff --git a/util/sbase/xargs.c b/util/sbase/xargs.c new file mode 100644 index 00000000..b3b2a81c --- /dev/null +++ b/util/sbase/xargs.c @@ -0,0 +1,362 @@ +/* See LICENSE file for copyright and license details. */ +#include <sys/wait.h> + +#include <errno.h> +#include <limits.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + +#include "util.h" + +#define NARGS 10000 + +static int inputc(void); +static void fillargbuf(int); +static int eatspace(void); +static int parsequote(int); +static int parseescape(void); +static char *poparg(void); +static void waitchld(int); +static void spawn(void); + +static size_t argbsz; +static size_t argbpos; +static size_t maxargs; +static size_t curprocs, maxprocs = 1; +static int nerrors; +static int nulflag, nflag, pflag, rflag, tflag, xflag, Iflag; +static char *argb; +static char *cmd[NARGS]; +static char *eofstr; + +static int +inputc(void) +{ + int ch; + + ch = getc(stdin); + if (ch == EOF && ferror(stdin)) + eprintf("getc <stdin>:"); + + return ch; +} + +static void +fillargbuf(int ch) +{ + if (argbpos >= argbsz) { + argbsz = argbpos == 0 ? 1 : argbsz * 2; + argb = erealloc(argb, argbsz); + } + argb[argbpos] = ch; +} + +static int +eatspace(void) +{ + int ch; + + while ((ch = inputc()) != EOF) { + if (nulflag || !(ch == ' ' || ch == '\t' || ch == '\n')) { + ungetc(ch, stdin); + return ch; + } + } + return -1; +} + +static int +parsequote(int q) +{ + int ch; + + while ((ch = inputc()) != EOF) { + if (ch == q) + return 0; + if (ch != '\n') { + fillargbuf(ch); + argbpos++; + } + } + + return -1; +} + +static int +parseescape(void) +{ + int ch; + + if ((ch = inputc()) != EOF) { + fillargbuf(ch); + argbpos++; + return ch; + } + + return -1; +} + +static char * +poparg(void) +{ + int ch; + + argbpos = 0; + if (eatspace() < 0) + return NULL; + while ((ch = inputc()) != EOF) { + /* NUL separator: no escaping */ + if (nulflag) { + if (ch == '\0') + goto out; + else + goto fill; + } + + switch (ch) { + case ' ': + case '\t': + if (Iflag) + goto fill; + case '\n': + goto out; + case '\'': + if (parsequote('\'') < 0) + eprintf("unterminated single quote\n"); + break; + case '\"': + if (parsequote('\"') < 0) + eprintf("unterminated double quote\n"); + break; + case '\\': + if (parseescape() < 0) + eprintf("backslash at EOF\n"); + break; + default: + fill: + fillargbuf(ch); + argbpos++; + break; + } + } +out: + fillargbuf('\0'); + + return (eofstr && !strcmp(argb, eofstr)) ? NULL : argb; +} + +static void +waitchld(int waitall) +{ + pid_t pid; + int status; + + while ((pid = waitpid(-1, &status, !waitall && curprocs < maxprocs ? + WNOHANG : 0)) > 0) { + curprocs--; + + if (WIFEXITED(status)) { + if (WEXITSTATUS(status) == 255) + exit(124); + if (WEXITSTATUS(status) == 127 || + WEXITSTATUS(status) == 126) + exit(WEXITSTATUS(status)); + if (WEXITSTATUS(status)) + nerrors++; + } + if (WIFSIGNALED(status)) + exit(125); + } + if (pid == -1 && errno != ECHILD) + eprintf("waitpid:"); +} + +static int +prompt(void) +{ + FILE *fp; + int ch, ret; + + if (!(fp = fopen("/dev/tty", "r"))) + return -1; + + fputs("?...", stderr); + fflush(stderr); + + ch = fgetc(fp); + ret = (ch == 'y' || ch == 'Y'); + if (ch != EOF && ch != '\n') { + while ((ch = fgetc(fp)) != EOF) { + if (ch == '\n') + break; + } + } + + fclose(fp); + + return ret; +} + +static void +spawn(void) +{ + int savederrno; + int first = 1; + char **p; + + if (pflag || tflag) { + for (p = cmd; *p; p++) { + if (!first) + fputc(' ', stderr); + fputs(*p, stderr); + first = 0; + } + if (pflag) { + switch (prompt()) { + case -1: break; /* error */ + case 0: return; /* no */ + case 1: goto dospawn; /* yes */ + } + } + fputc('\n', stderr); + fflush(stderr); + } + +dospawn: + switch (fork()) { + case -1: + eprintf("fork:"); + case 0: + execvp(*cmd, cmd); + savederrno = errno; + weprintf("execvp %s:", *cmd); + _exit(126 + (savederrno == ENOENT)); + } + curprocs++; + waitchld(0); +} + +static void +usage(void) +{ + eprintf("usage: %s [-0prtx] [-E eofstr] [-n num] [-P maxprocs] [-s num] " + "[cmd [arg ...]]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int ret = 0, leftover = 0, i, j; + size_t argsz, argmaxsz; + size_t arglen, a; + char *arg = ""; + char *replstr; + + if ((argmaxsz = sysconf(_SC_ARG_MAX)) == (size_t)-1) + argmaxsz = _POSIX_ARG_MAX; + /* Leave some room for environment variables */ + argmaxsz -= 4096; + + ARGBEGIN { + case '0': + nulflag = 1; + break; + case 'n': + nflag = 1; + maxargs = estrtonum(EARGF(usage()), 1, MIN(SIZE_MAX, LLONG_MAX)); + break; + case 'p': + pflag = 1; + break; + case 'r': + rflag = 1; + break; + case 's': + argmaxsz = estrtonum(EARGF(usage()), 1, MIN(SIZE_MAX, LLONG_MAX)); + break; + case 't': + tflag = 1; + break; + case 'x': + xflag = 1; + break; + case 'E': + eofstr = EARGF(usage()); + break; + case 'I': + Iflag = 1; + xflag = 1; + nflag = 1; + maxargs = 1; + replstr = EARGF(usage()); + break; + case 'P': + maxprocs = estrtonum(EARGF(usage()), 1, MIN(SIZE_MAX, LLONG_MAX)); + break; + default: + usage(); + } ARGEND + + do { + argsz = 0; i = 0; a = 0; + if (argc) { + for (; i < argc; i++) { + cmd[i] = estrdup(argv[i]); + argsz += strlen(cmd[i]) + 1; + } + } else { + cmd[i] = estrdup("/bin/echo"); + argsz += strlen("/bin/echo") + 1; + i++; + } + while (leftover || (arg = poparg())) { + arglen = strlen(arg); + if (argsz + arglen >= argmaxsz || i >= NARGS - 1) { + if (xflag || arglen >= argmaxsz || leftover) + eprintf("insufficient argument space\n"); + leftover = 1; + break; + } + + if (!Iflag) { + cmd[i] = estrdup(arg); + argsz += arglen + 1; + } else { + for (j = 1; j < i; j++) { + char *p = cmd[j]; + argsz -= strlen(cmd[j]); + strnsubst(&cmd[j], replstr, arg, 255); + argsz += strlen(cmd[j]); + free(p); + } + } + + i++; + a++; + leftover = 0; + if (nflag && a >= maxargs) + break; + } + cmd[i] = NULL; + if (a >= maxargs && nflag) + spawn(); + else if (!a || (i == 1 && rflag)) + ; + else + spawn(); + for (; i >= 0; i--) + free(cmd[i]); + } while (arg); + + free(argb); + + waitchld(1); + + if (nerrors || (fshut(stdin, "<stdin>") | fshut(stdout, "<stdout>"))) + ret = 123; + + return ret; +} diff --git a/util/sbase/xinstall.1 b/util/sbase/xinstall.1 new file mode 100644 index 00000000..2d9535c0 --- /dev/null +++ b/util/sbase/xinstall.1 @@ -0,0 +1,86 @@ +.Dd December 3, 2016 +.Dt INSTALL 1 +.Os sbase +.Sh NAME +.Nm install +.Nd copy files and set attributes +.Sh SYNOPSIS +.Nm +.Op Fl g Ar group +.Op Fl o Ar owner +.Op Fl m Ar mode +.Po +.Fl d Ar dir ... +| +.Op Fl D +.Po +.Fl t Ar dest +.Ar source ... +| +.Ar source ... +.Ar dest +.Pc +.Pc +.Sh DESCRIPTION +.Nm +copies +.Ar source +to +.Ar dest . +If more than one +.Ar source +is given +.Ar dest +is treated as a directory. +Otherwise +.Ar dest +is treated as a filename. +.Nm +can also change the attributes of the copies. +.Sh OPTIONS +.Bl -tag -width Ds +.It Fl d +Create the directories +.Ar dir . +.It Fl D +Create missing parent directories to +.Ar dest . +If +.Ar dest +is to be treated as a directory, it is created too if missing. +.It Fl g Ar group +Change the installed files' group to +.Ar group . +This may be a group name or a group identifier. +.It Fl m Ar mode +Change the file modes. +Both numerical and symbolic values are supported. +See +.Xr chmod 1 +for the syntex. +Default mode 0755. +If a file has the mode 0644 and is copied with +.It Fl o Ar owner +Change the installed files' owner to +.Ar owner . +This may be a user name or a user identifier. +.It Fl t Ar dest +Copy files into the directory +.Ar dest . +.Nm install , +the copy's mode will be 0755 unless +.Fl m +is used to select another mode. +When the symbolic notation is used, the base mode is 0000. +.El +.Sh SEE ALSO +.Xr chmod 1 , +.Xr chown 1 , +.Xr cp 1 , +.Xr mkdir 1 +.Sh STANDARDS +The +.Nm +utility is not standardized. +This implementation is a subset of the GNU implementation and a subset +with extensions to the FreeBSD implementation. diff --git a/util/sbase/xinstall.c b/util/sbase/xinstall.c new file mode 100644 index 00000000..fe1a160e --- /dev/null +++ b/util/sbase/xinstall.c @@ -0,0 +1,194 @@ +/* See LICENSE file for copyright and license details. */ +#include <grp.h> +#include <pwd.h> +#include <errno.h> +#include <fcntl.h> +#include <unistd.h> +#include <stdlib.h> +#include <string.h> +#include <dirent.h> +#include <sys/stat.h> +#include <sys/wait.h> + +#include "util.h" + +static int Dflag = 0; +static gid_t group; +static uid_t owner; +static mode_t mode = 0755; + +static void +make_dir(char *dir, int was_missing) +{ + if (!mkdir(dir, was_missing ? 0755 : mode)) { + if (!was_missing && (lchown(dir, owner, group) < 0)) + eprintf("lchmod %s:", dir); + } else if (errno != EEXIST) { + eprintf("mkdir %s:", dir); + } +} + +static void +make_dirs(char *dir, int was_missing) +{ + char *p; + for (p = strchr(dir + (dir[0] == '/'), '/'); p; p = strchr(p + 1, '/')) { + *p = '\0'; + make_dir(dir, was_missing); + *p = '/'; + } + make_dir(dir, was_missing); +} + +static int +install(const char *s1, const char *s2, int depth) +{ + int f1, f2; + + if ((f1 = open(s1, O_RDONLY)) < 0) + eprintf("open %s:", s1); + if ((f2 = creat(s2, 0600)) < 0) { + if (unlink(s2) < 0 && errno != ENOENT) + eprintf("unlink %s:", s2); + if ((f2 = creat(s2, 0600)) < 0) + eprintf("creat %s:", s2); + } + if (concat(f1, s1, f2, s2) < 0) + goto fail; + if (fchmod(f2, mode) < 0) { + weprintf("fchmod %s:", s2); + goto fail; + } + if (fchown(f2, owner, group) < 0) { + weprintf("fchown %s:", s2); + goto fail; + } + + close(f1); + close(f2); + + return 0; + +fail: + unlink(s2); + exit(1); +} + +static void +usage(void) +{ + eprintf("usage: %s [-g group] [-o owner] [-m mode] (-d dir ... | [-D] (-t dest source ... | source ... dest))\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + int dflag = 0; + char *gflag = 0; + char *oflag = 0; + char *mflag = 0; + char *tflag = 0; + struct group *gr; + struct passwd *pw; + struct stat st; + char *p; + + ARGBEGIN { + case 'c': + /* no-op for compatibility */ + break; + case 'd': + dflag = 1; + break; + case 'D': + Dflag = 1; + break; + case 's': + /* no-op for compatibility */ + break; + case 'g': + gflag = EARGF(usage()); + break; + case 'o': + oflag = EARGF(usage()); + break; + case 'm': + mflag = EARGF(usage()); + break; + case 't': + tflag = EARGF(usage()); + break; + default: + usage(); + } ARGEND + + if (argc < 1 + (!tflag & !dflag) || dflag & (Dflag | !!tflag)) + usage(); + + if (gflag) { + errno = 0; + gr = getgrnam(gflag); + if (gr) { + group = gr->gr_gid; + } else { + if (errno) + eprintf("getgrnam %s:", gflag); + group = estrtonum(gflag, 0, UINT_MAX); + } + } else { + group = getgid(); + } + + if (oflag) { + errno = 0; + pw = getpwnam(oflag); + if (pw) { + owner = pw->pw_uid; + } else { + if (errno) + eprintf("getpwnam %s:", oflag); + owner = estrtonum(oflag, 0, UINT_MAX); + } + } else { + owner = getuid(); + } + + if (mflag) + mode = parsemode(mflag, mode, 0); + + if (dflag) { + for (; *argv; argc--, argv++) + make_dirs(*argv, 0); + return 0; + } + + if (tflag) { + argv = memmove(argv - 1, argv, argc * sizeof(*argv)); + argv[argc++] = tflag; + } + if (tflag || argc > 2) { + if (stat(argv[argc - 1], &st) < 0) { + if ((errno == ENOENT) && Dflag) { + make_dirs(argv[argc - 1], 1); + } else { + eprintf("stat %s:", argv[argc - 1]); + } + } else if (!S_ISDIR(st.st_mode)) { + eprintf("%s: not a directory\n", argv[argc - 1]); + } + } + if (stat(argv[argc - 1], &st) < 0) { + if (errno != ENOENT) + eprintf("stat %s:", argv[argc - 1]); + if (tflag || Dflag || argc > 2) { + if ((p = strrchr(argv[argc - 1], '/')) != NULL) { + *p = '\0'; + make_dirs(argv[argc - 1], 1); + *p = '/'; + } + } + } + enmasse(argc, argv, install); + + return 0; +} diff --git a/util/sbase/yes.1 b/util/sbase/yes.1 new file mode 100644 index 00000000..8415857c --- /dev/null +++ b/util/sbase/yes.1 @@ -0,0 +1,14 @@ +.Dd October 8, 2015 +.Dt YES 1 +.Os sbase +.Sh NAME +.Nm yes +.Nd output string repeatedly +.Sh SYNOPSIS +.Nm +.Op Ar string +.Sh DESCRIPTION +.Nm +will repeatedly write 'y' or +.Ar string +to stdout. diff --git a/util/sbase/yes.c b/util/sbase/yes.c new file mode 100644 index 00000000..b5c3c109 --- /dev/null +++ b/util/sbase/yes.c @@ -0,0 +1,25 @@ +/* See LICENSE file for copyright and license details. */ +#include <stdio.h> + +#include "util.h" + +static void +usage(void) +{ + eprintf("usage: %s [string]\n", argv0); +} + +int +main(int argc, char *argv[]) +{ + const char *s; + + ARGBEGIN { + default: + usage(); + } ARGEND + + s = argc ? argv[0] : "y"; + for (;;) + puts(s); +} diff --git a/vendor b/vendor deleted file mode 120000 index c795b054..00000000 --- a/vendor +++ /dev/null @@ -1 +0,0 @@ -build
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