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| author | Leah Rowe <leah@libreboot.org> | 2024-10-14 16:24:21 +0100 |
|---|---|---|
| committer | Leah Rowe <leah@libreboot.org> | 2024-10-14 16:26:01 +0100 |
| commit | c7a3a607f3d9b5639e8529d447acae5c74896b39 (patch) | |
| tree | e9389ea5efcacb22ac0b23ae781c8fef810bcdc7 /util/ich9utils/Makefile | |
| parent | 3b92b7b7236268c1a345bfd38e4a21e75b0c0864 (diff) | |
This brings in the following important fix:
commit d128a0ae87086b37c0e5d7a8d934bcdee173402f
Author: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri Sep 27 22:57:22 2024 -0600
flashchips: Remove unsupported erase blocks for Winbond W25X{16,32,64}
This family of chips does not support the 0x52 (32 KiB block erase) and
0x60 (chip erase) opcodes according to their datasheet.
The full list of changes this brings in is as follows:
* d128a0a flashchips: Remove unsupported erase blocks for Winbond W25X{16,32,64}
* c6a924a Don't mention writing when erasing only (-E)
* dac4239 ch347_spi: Add 'spimode' parameter
* 56d236b chipset_enable: Add some newer AMD code names
* 3b9f152 chipset_enable: Probe AMD SPIBAR first and bail on ff
* 522160f meson: Add ft4222_spi
Nicholas Chin's patch fixes a bug on GM45 ThinkPads, where WX25
ICs (Winbond) could be read, but writes would fail in certain
cases because flashchips.c provided incorrect block erase commands.
This is unrelated to the --workaround-mx patch, for Macronix ICs.
Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'util/ich9utils/Makefile')
0 files changed, 0 insertions, 0 deletions