diff options
| author | Leah Rowe <leah@libreboot.org> | 2021-11-21 15:57:40 +0000 |
|---|---|---|
| committer | Leah Rowe <leah@libreboot.org> | 2021-11-22 10:03:50 +0000 |
| commit | eed25bd2209a4c9f7c21a15689b5c90bd3757a6c (patch) | |
| tree | e0f7711b5a2f6ffb241f408d59f55fca7fc231c1 /resources/coreboot/macbook21/config/libgfxinit_txtmode | |
| parent | fd586c8f307d56075b6335920a5d3e13a0c6897b (diff) | |
update coreboot and nuke tianocore20211122
tianocore is a liability for the libreboot project. it's a bloated mess, and
unreliable, broken on many boards, and basically impossible to audit.
i don't trust tianocore, so i'm removing it.
Diffstat (limited to 'resources/coreboot/macbook21/config/libgfxinit_txtmode')
| -rw-r--r-- | resources/coreboot/macbook21/config/libgfxinit_txtmode | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/resources/coreboot/macbook21/config/libgfxinit_txtmode b/resources/coreboot/macbook21/config/libgfxinit_txtmode index e166b65b..564dd234 100644 --- a/resources/coreboot/macbook21/config/libgfxinit_txtmode +++ b/resources/coreboot/macbook21/config/libgfxinit_txtmode @@ -131,8 +131,8 @@ CONFIG_DCACHE_RAM_BASE=0xfefc0000 CONFIG_DCACHE_RAM_SIZE=0x8000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 CONFIG_DCACHE_BSP_STACK_SIZE=0x2000 -CONFIG_MMCONF_BASE_ADDRESS=0xf0000000 -CONFIG_MMCONF_BUS_NUMBER=64 +CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 +CONFIG_ECAM_MMCONF_BUS_NUMBER=64 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y @@ -186,11 +186,11 @@ CONFIG_CBFS_MCACHE_SIZE=0x4000 CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_RAMBASE=0xe00000 -CONFIG_CPU_ADDR_BITS=36 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d" CONFIG_EHCI_BAR=0xfef00000 +CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_STACK_SIZE=0x1000 CONFIG_VBT_DATA_SIZE_KB=8 CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254 @@ -200,12 +200,12 @@ CONFIG_INTEL_GMA_BCLM_WIDTH=16 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed14000 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 +CONFIG_AZALIA_MAX_CODECS=3 # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_COMMON_CLOCK is not set CONFIG_TTYS0_BASE=0x3f8 CONFIG_TTYS0_LCS=3 CONFIG_UART_PCI_ADDR=0x0 -CONFIG_AZALIA_MAX_CODECS=3 CONFIG_INTEL_HAS_TOP_SWAP=y # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000 @@ -331,12 +331,12 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y # end of Display CONFIG_PCI=y -CONFIG_MMCONF_SUPPORT=y +CONFIG_ECAM_MMCONF_SUPPORT=y CONFIG_PCIX_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_AZALIA_PLUGIN_SUPPORT=y CONFIG_PCIEXP_PLUGIN_SUPPORT=y -CONFIG_MMCONF_LENGTH=0x04000000 +CONFIG_ECAM_MMCONF_LENGTH=0x04000000 CONFIG_PCI_ALLOW_BUS_MASTER=y CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y |