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| author | Alper Nebi Yasak <alpernebiyasak@gmail.com> | 2024-07-10 18:04:13 +0300 |
|---|---|---|
| committer | Alper Nebi Yasak <alpernebiyasak@gmail.com> | 2024-07-11 23:16:42 +0300 |
| commit | 708fc14c605b4d95a80e2476485387551a62d095 (patch) | |
| tree | 61bfed2a4295575221e8de8a314f28024bcef436 /resources/coreboot/haswell/patches/0011-haswell-NRI-Initialise-MPLL.patch | |
| parent | 0cc7736b40d4634dd1e54aa6cc8ee116565e63bc (diff) | |
u-boot: Fix display initialization on gru boards
U-Boot has migrated to using upstream device-tree files for gru boards,
but the clock driver doesn't yet support setting rates for a certain
clock that upstream uses for the eDP display. It happens to work without
it, so for now remove the clock setting until the driver is fixed.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Diffstat (limited to 'resources/coreboot/haswell/patches/0011-haswell-NRI-Initialise-MPLL.patch')
0 files changed, 0 insertions, 0 deletions