summaryrefslogtreecommitdiff
path: root/resources/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch
diff options
context:
space:
mode:
authorLeah Rowe <leah@libreboot.org>2023-09-04 02:36:41 +0100
committerLeah Rowe <leah@libreboot.org>2023-09-04 02:47:25 +0100
commitda3c9bb3c5c3b1f2e6e67a3695ce39b17bf68d5b (patch)
treeb81cdd418a4906c846800a8c5094b312e74f57df /resources/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch
parenta05010503f9a748943033d1fc40e36625e72dcbb (diff)
merge config/ and resources/
Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'resources/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch')
-rw-r--r--resources/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch57
1 files changed, 0 insertions, 57 deletions
diff --git a/resources/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch b/resources/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch
deleted file mode 100644
index 07525d18..00000000
--- a/resources/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 731216aef3129ae27ad5adc7266cb8a58090c9fc Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sun, 26 Jun 2022 10:32:12 +0200
-Subject: [PATCH 09/26] nb/intel/haswell/nri: Only do CPU replacement check on
- cold boots
-
-CPU replacement check should only be done on cold boots.
-
-Change-Id: I98efa105f4df755b23febe12dd7b356787847852
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/raminit_native.c | 13 ++++++-------
- 1 file changed, 6 insertions(+), 7 deletions(-)
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-index 0869db3902..bd9bc8e692 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-@@ -40,15 +40,14 @@ static enum raminit_boot_mode get_boot_mode(void)
- return (pmcon_2 & bitmask) == bitmask ? BOOTMODE_WARM : BOOTMODE_COLD;
- }
-
--static bool early_init_native(int s3resume)
-+static bool early_init_native(enum raminit_boot_mode bootmode)
- {
- printk(BIOS_DEBUG, "Starting native platform initialisation\n");
-
- intel_early_me_init();
-- /** TODO: CPU replacement check must be skipped in warm boots and S3 resumes **/
-- const bool cpu_replaced = !s3resume && intel_early_me_cpu_replacement_check();
-+ bool cpu_replaced = bootmode == BOOTMODE_COLD && intel_early_me_cpu_replacement_check();
-
-- early_pch_init_native(s3resume);
-+ early_pch_init_native(bootmode == BOOTMODE_S3);
-
- if (!CONFIG(INTEL_LYNXPOINT_LP))
- dmi_early_init();
-@@ -176,13 +175,13 @@ void perform_raminit(const int s3resume)
- * See, this function's name is a lie. There are more things to
- * do that memory initialisation, but they are relatively easy.
- */
-- const bool cpu_replaced = early_init_native(s3resume);
-+ const enum raminit_boot_mode orig_bootmode = get_boot_mode();
-+
-+ const bool cpu_replaced = early_init_native(s3resume ? BOOTMODE_S3 : orig_bootmode);
-
- wait_txt_clear();
- wrmsr(0x2e6, (msr_t) {.lo = 0, .hi = 0});
-
-- const enum raminit_boot_mode orig_bootmode = get_boot_mode();
--
- struct mrc_data md = prepare_mrc_cache();
-
- const enum raminit_boot_mode bootmode =
---
-2.39.2
-