diff options
| author | Leah Rowe <leah@libreboot.org> | 2021-12-11 15:00:17 +0000 |
|---|---|---|
| committer | Leah Rowe <leah@libreboot.org> | 2021-12-11 15:00:17 +0000 |
| commit | f20160f3bbac2bc0728f42722e0b969147436821 (patch) | |
| tree | 1638fc7b2539c07154eb0cd1b701b7d1459b7985 /resources/coreboot/d945gclf_16mb/config/libgfxinit_txtmode | |
| parent | c771aad44f592baae32249669f5369fc4206e72c (diff) | |
coreboot configs: disable serial output during coreboot initialization
Diffstat (limited to 'resources/coreboot/d945gclf_16mb/config/libgfxinit_txtmode')
| -rw-r--r-- | resources/coreboot/d945gclf_16mb/config/libgfxinit_txtmode | 26 |
1 files changed, 2 insertions, 24 deletions
diff --git a/resources/coreboot/d945gclf_16mb/config/libgfxinit_txtmode b/resources/coreboot/d945gclf_16mb/config/libgfxinit_txtmode index 8cae6d14..3ffb9783 100644 --- a/resources/coreboot/d945gclf_16mb/config/libgfxinit_txtmode +++ b/resources/coreboot/d945gclf_16mb/config/libgfxinit_txtmode @@ -121,7 +121,6 @@ CONFIG_OVERRIDE_DEVICETREE="" CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 -CONFIG_UART_FOR_CONSOLE=0 # CONFIG_CONSOLE_POST is not set CONFIG_POST_DEVICE=y CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" @@ -136,7 +135,6 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DRIVERS_INTEL_WIFI=y CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_CONSOLE_SERIAL=y # CONFIG_BOARD_INTEL_ADLRVP_P is not set # CONFIG_BOARD_INTEL_ADLRVP_P_EXT_EC is not set # CONFIG_BOARD_INTEL_ADLRVP_P_MCHP is not set @@ -187,7 +185,7 @@ CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" # CONFIG_PCIEXP_L1_SUB_STATE is not set # CONFIG_PCIEXP_CLK_PM is not set -CONFIG_DRIVERS_UART_8250IO=y +# CONFIG_DRIVERS_UART_8250IO is not set CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0 CONFIG_HEAP_SIZE=0x4000 CONFIG_BOARD_ROMSIZE_KB_512=y @@ -244,8 +242,6 @@ CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_AZALIA_MAX_CODECS=3 # CONFIG_PCIEXP_ASPM is not set # CONFIG_PCIEXP_COMMON_CLOCK is not set -CONFIG_TTYS0_BASE=0x3f8 -CONFIG_TTYS0_LCS=3 CONFIG_UART_PCI_ADDR=0x0 CONFIG_INTEL_HAS_TOP_SWAP=y # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set @@ -407,7 +403,6 @@ CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_OXPCIE is not set CONFIG_HAVE_USBDEBUG=y # CONFIG_USBDEBUG is not set @@ -469,26 +464,10 @@ CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y CONFIG_BOOTBLOCK_CONSOLE=y CONFIG_POSTCAR_CONSOLE=y CONFIG_SQUELCH_EARLY_SMP=y - -# -# I/O mapped, 8250-compatible -# - -# -# Serial port base address = 0x3f8 -# -# CONFIG_CONSOLE_SERIAL_921600 is not set -# CONFIG_CONSOLE_SERIAL_460800 is not set -# CONFIG_CONSOLE_SERIAL_230400 is not set -CONFIG_CONSOLE_SERIAL_115200=y -# CONFIG_CONSOLE_SERIAL_57600 is not set -# CONFIG_CONSOLE_SERIAL_38400 is not set -# CONFIG_CONSOLE_SERIAL_19200 is not set -# CONFIG_CONSOLE_SERIAL_9600 is not set -CONFIG_TTYS0_BAUD=115200 # CONFIG_SPKMODEM is not set # CONFIG_CONSOLE_NE2K is not set CONFIG_CONSOLE_CBMEM=y +# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set # CONFIG_CONSOLE_SPI_FLASH is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set # CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set @@ -570,7 +549,6 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # # General Debug Settings # -# CONFIG_GDB_STUB is not set # CONFIG_FATAL_ASSERTS is not set # CONFIG_DEBUG_CBFS is not set CONFIG_HAVE_DEBUG_RAM_SETUP=y |