diff options
| author | Leah Rowe <leah@libreboot.org> | 2026-09-20 19:56:23 +0100 |
|---|---|---|
| committer | Leah Rowe <leah@libreboot.org> | 2026-09-20 22:01:33 +0100 |
| commit | 009103c8f6bb3c3d1a77967b8878bc71b00d1a4e (patch) | |
| tree | 3ab8c1c8bda977ea42e88ba3bf4de0ce4f2aea98 /config/module/coreboot | |
| parent | 645002ac2b63f953e8bcf9894a5482e449e72342 (diff) | |
switch to 15h.org fork for kgpe-d16 and kcma-d8
aka "Mike's coreboot"
libreboot recently improved its multi-tree design to
allow specifying git repository links per-tree instead
of just per-project. this means i can now use the 15h
fork quite easily, on fam15h boards. this fork uses
AMD's AGESA source code instead of raptor engineering's
code. the modified AGESA code is compatible with a lot
more memory modules, and can support higher amounts of
memory. it's generally more reliable.
the only submodule they changed was the blobs one,
but the only commits they add are things i don't
need. they add commits that violate copyright, e.g.
distributing AST2500 VGA ROM without permission.
thus, i do not use their blobs repo. i use the
upstream coreboot one, which has what we need.
since i don't use the VGA ROM in libreboot, it's
fine. therefore, the submodule config is currently
the same as the old 4.11 tree.
they were missing two of my build fixes. they have
added some of their own as well.
note that there are two boards for kgpe-d16 and d8
here: the raptor one, and the agesa one. we are using
the agesa one.
kfnsn4-dre still uses the old tree.
Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'config/module/coreboot')
17 files changed, 1125 insertions, 454 deletions
diff --git a/config/module/coreboot/fam15h_15h/nuke.list b/config/module/coreboot/fam15h_15h/nuke.list new file mode 100644 index 00000000..8ca7a4cf --- /dev/null +++ b/config/module/coreboot/fam15h_15h/nuke.list @@ -0,0 +1 @@ +3rdparty/vboot/tests diff --git a/config/module/coreboot/fam15h_15h/patches/0001-add-patches-from-original-fam15h-tree.patch b/config/module/coreboot/fam15h_15h/patches/0001-add-patches-from-original-fam15h-tree.patch new file mode 100644 index 00000000..92441b7d --- /dev/null +++ b/config/module/coreboot/fam15h_15h/patches/0001-add-patches-from-original-fam15h-tree.patch @@ -0,0 +1,105 @@ +From 2624e2d2ec5dd2fc0859e6ca3ad9d63adad46031 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Sun, 20 Sep 2026 20:22:28 +0100 +Subject: [PATCH 1/7] add patches from original fam15h tree + +these fix build issues on modern systems + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + ...e.m4-fix-std-c23-build-failure-extra.patch | 32 ++++++++++++++ + ...include.m4-fix-std-c23-build-failure.patch | 43 +++++++++++++++++++ + 2 files changed, 75 insertions(+) + create mode 100644 util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure-extra.patch + create mode 100644 util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure.patch + +diff --git a/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure-extra.patch b/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure-extra.patch +new file mode 100644 +index 0000000000..40569b27d8 +--- /dev/null ++++ b/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure-extra.patch +@@ -0,0 +1,32 @@ ++From 6316016cfe6834b6d3242e7e088b7d2af91ada22 Mon Sep 17 00:00:00 2001 ++From: Leah Rowe <leah@libreboot.org> ++Date: Tue, 29 Apr 2025 23:16:51 +0100 ++Subject: [PATCH 1/1] further -std=23 gcc-15 fix for gmp ++ ++the previously merged revision was correct, but ++applied in the wrong place. the conftest.c file ++was being generated by configure, in this place. ++ ++this should fix build errors now, on gcc-15. ++ ++Signed-off-by: Leah Rowe <leah@libreboot.org> ++--- ++ configure | 2 +- ++ 1 file changed, 1 insertion(+), 1 deletion(-) ++ ++diff --git a/configure b/configure ++index 12ddffd..8b07818 100755 ++--- a/configure +++++ b/configure ++@@ -6458,7 +6458,7 @@ if test "$gmp_prog_cc_works" = yes; then ++ ++ #if defined (__GNUC__) && ! defined (__cplusplus) ++ typedef unsigned long long t1;typedef t1*t2; ++-void g(){} +++void g(int,const t1 *,t1,t1 *,const t1 *,int){} ++ void h(){} ++ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0) ++ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;} ++-- ++2.39.5 ++ +diff --git a/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure.patch b/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure.patch +new file mode 100644 +index 0000000000..adb66c6043 +--- /dev/null ++++ b/util/crossgcc/patches/gmp-6.1.2_acinclude.m4-fix-std-c23-build-failure.patch +@@ -0,0 +1,43 @@ ++From 7d4aa08224b53054754b8ee6fd61a4297ac47119 Mon Sep 17 00:00:00 2001 ++From: Rudi Heitbaum <rudi@heitbaum.com> ++Date: Wed, 22 Jan 2025 02:34:09 +0100 ++Subject: [PATCH 1/1] acinclude.m4: fix -std=c23 build failure ++ ++Add prototype to configure test function as c23 removes unprototyped ++functions. ++ ++gcc-15 switched to -std=c23 by default: ++ ++ https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=55e3bd376b2214e200fa76d12b67ff259b06c212 ++ ++As a result `configure` fails with: ++ conftest.c: In function 'f': ++ conftest.c:12:48: error: too many arguments to function 'g'; expected 0, have 6 ++ 12 | for(i=0;i<1;i++){if(e(got,got,9,d[i].n)==0)h();g(i,d[i].src,d[i].n,got,d[i].want,9);if(d[i].n)h();}} ++ | ^ ~ ++ conftest.c:7:6: note: declared here ++ 7 | void g(){} ++ | ^ ++ ++Link: https://gmplib.org/list-archives/gmp-bugs/2024-November/005550.html ++Signed-off-by: Rudi Heitbaum <rudi@heitbaum.com> ++--- ++ acinclude.m4 | 2 +- ++ 1 file changed, 1 insertion(+), 1 deletion(-) ++ ++diff --git a/acinclude.m4 b/acinclude.m4 ++index 3c3ecf5..3a226fd 100644 ++--- a/acinclude.m4 +++++ b/acinclude.m4 ++@@ -609,7 +609,7 @@ GMP_PROG_CC_WORKS_PART([$1], [long long reliability test 1], ++ ++ #if defined (__GNUC__) && ! defined (__cplusplus) ++ typedef unsigned long long t1;typedef t1*t2; ++-void g(){} +++void g(int,const t1 *,t1,t1 *,const t1 *,int){} ++ void h(){} ++ static __inline__ t1 e(t2 rp,t2 up,int n,t1 v0) ++ {t1 c,x,r;int i;if(v0){c=1;for(i=1;i<n;i++){x=up[i];r=x+1;rp[i]=r;}}return c;} ++-- ++2.39.5 ++ +-- +2.47.3 + diff --git a/config/module/coreboot/fam15h_15h/patches/0002-remove-__unused-to-fix-build-errors.patch b/config/module/coreboot/fam15h_15h/patches/0002-remove-__unused-to-fix-build-errors.patch new file mode 100644 index 00000000..8d022a92 --- /dev/null +++ b/config/module/coreboot/fam15h_15h/patches/0002-remove-__unused-to-fix-build-errors.patch @@ -0,0 +1,340 @@ +From ee89092838a2adb6ab51f1ac8fe68b3e1bbf0464 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Sun, 20 Sep 2026 20:32:17 +0100 +Subject: [PATCH 2/7] remove __unused to fix build errors + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + src/arch/riscv/sbi.c | 2 +- + src/commonlib/include/commonlib/helpers.h | 4 ---- + src/commonlib/region.c | 11 ++++++++--- + src/drivers/spi/spi_sdcard.c | 2 +- + src/ec/google/chromeec/ec.c | 2 +- + src/soc/intel/broadwell/smi.c | 4 ++-- + src/soc/intel/fsp_broadwell_de/smi.c | 2 +- + src/southbridge/intel/bd82x6x/me.c | 8 ++++---- + src/southbridge/intel/bd82x6x/me_8.x.c | 10 +++++----- + src/southbridge/intel/ibexpeak/me.c | 4 ++-- + src/southbridge/intel/lynxpoint/me_9.x.c | 10 +++++----- + src/southbridge/intel/lynxpoint/smi.c | 4 ++-- + util/sconfig/main.c | 2 +- + 13 files changed, 33 insertions(+), 32 deletions(-) + +diff --git a/src/arch/riscv/sbi.c b/src/arch/riscv/sbi.c +index e0d7c60e5f..0e890e9f0d 100644 +--- a/src/arch/riscv/sbi.c ++++ b/src/arch/riscv/sbi.c +@@ -74,7 +74,7 @@ void handle_sbi(trapframe *tf) + { + uintptr_t ret = 0; + uintptr_t arg0 = tf->gpr[10]; +- __unused uintptr_t arg1 = tf->gpr[11]; ++ uintptr_t arg1 = tf->gpr[11]; + uintptr_t which = tf->gpr[17]; + + switch (which) { +diff --git a/src/commonlib/include/commonlib/helpers.h b/src/commonlib/include/commonlib/helpers.h +index ca3b3c58f9..e28b5c4c37 100644 +--- a/src/commonlib/include/commonlib/helpers.h ++++ b/src/commonlib/include/commonlib/helpers.h +@@ -133,10 +133,6 @@ + /* Calculate size of structure member. */ + #define member_size(type, member) (sizeof(((type *)0)->member)) + +-#ifndef __unused +-#define __unused __attribute__((unused)) +-#endif +- + #ifndef alloca + #define alloca(x) __builtin_alloca(x) + #endif +diff --git a/src/commonlib/region.c b/src/commonlib/region.c +index 4a7e285747..65fc9eed1f 100644 +--- a/src/commonlib/region.c ++++ b/src/commonlib/region.c +@@ -229,18 +229,23 @@ void xlate_region_device_rw_init(struct xlate_region_device *xdev, + } + + static void *mdev_mmap(const struct region_device *rd, size_t offset, +- size_t size __unused) ++ size_t size) + { + const struct mem_region_device *mdev; + ++ (void) size; ++ + mdev = container_of(rd, __typeof__(*mdev), rdev); + + return &mdev->base[offset]; + } + +-static int mdev_munmap(const struct region_device *rd __unused, +- void *mapping __unused) ++static int mdev_munmap(const struct region_device *rd, ++ void *mapping) + { ++ (void) rd; ++ (void) mapping; ++ + return 0; + } + +diff --git a/src/drivers/spi/spi_sdcard.c b/src/drivers/spi/spi_sdcard.c +index c2f8da6ff4..6eae2b5857 100644 +--- a/src/drivers/spi/spi_sdcard.c ++++ b/src/drivers/spi/spi_sdcard.c +@@ -223,7 +223,7 @@ static int lookup_response_length(int response_type) + static int response_resolve(int response_type, uint8_t *response, + uint32_t *out_register) + { +- __unused static const char * const sd_err[] = { ++ static const char * const sd_err[] = { + "Card is locked", + "wp erase skip | lock/unlok cmd failed", + "error", +diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c +index a9921467f4..466090e27c 100644 +--- a/src/ec/google/chromeec/ec.c ++++ b/src/ec/google/chromeec/ec.c +@@ -271,7 +271,7 @@ static int google_chromeec_clear_mask(uint8_t type, uint64_t mask) + EC_HOST_EVENT_CLEAR, &mask); + } + +-static int __unused google_chromeec_set_mask(uint8_t type, uint64_t mask) ++static int google_chromeec_set_mask(uint8_t type, uint64_t mask) + { + if (google_chromeec_is_uhepi_supported()) + return google_chromeec_uhepi_cmd(type, +diff --git a/src/soc/intel/broadwell/smi.c b/src/soc/intel/broadwell/smi.c +index 17196da438..fb82ba70ba 100644 +--- a/src/soc/intel/broadwell/smi.c ++++ b/src/soc/intel/broadwell/smi.c +@@ -66,7 +66,7 @@ void smm_southbridge_enable_smi(void) + enable_smi(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | EOS); + } + +-static void __unused southbridge_trigger_smi(void) ++static void southbridge_trigger_smi(void) + { + /** + * There are several methods of raising a controlled SMI# via +@@ -86,7 +86,7 @@ static void __unused southbridge_trigger_smi(void) + outb(0x00, 0xb2); + } + +-static void __unused southbridge_clear_smi_status(void) ++static void southbridge_clear_smi_status(void) + { + /* Clear SMI status */ + clear_smi_status(); +diff --git a/src/soc/intel/fsp_broadwell_de/smi.c b/src/soc/intel/fsp_broadwell_de/smi.c +index 299ba531c5..eb102bd5bd 100644 +--- a/src/soc/intel/fsp_broadwell_de/smi.c ++++ b/src/soc/intel/fsp_broadwell_de/smi.c +@@ -57,7 +57,7 @@ void smm_southbridge_enable_smi(void) + enable_smi(EOS | GBL_SMI_EN); + } + +-static void __unused southbridge_trigger_smi(void) ++static void southbridge_trigger_smi(void) + { + /* + * There are several methods of raising a controlled SMI# via +diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c +index 15f99cdf78..2cfcc2f6b0 100644 +--- a/src/southbridge/intel/bd82x6x/me.c ++++ b/src/southbridge/intel/bd82x6x/me.c +@@ -43,7 +43,7 @@ + #endif + + /* Path that the BIOS should take based on ME state */ +-static const char *me_bios_path_values[] __unused = { ++static const char *me_bios_path_values[] = { + [ME_NORMAL_BIOS_PATH] = "Normal", + [ME_S3WAKE_BIOS_PATH] = "S3 Wake", + [ME_ERROR_BIOS_PATH] = "Error", +@@ -342,7 +342,7 @@ static inline int mei_sendrecv(struct mei_header *mei, struct mkhi_header *mkhi, + } + + /* Send END OF POST message to the ME */ +-static int __unused mkhi_end_of_post(void) ++static int mkhi_end_of_post(void) + { + struct mkhi_header mkhi = { + .group_id = MKHI_GROUP_ID_GEN, +@@ -366,7 +366,7 @@ static int __unused mkhi_end_of_post(void) + } + + /* Get ME firmware version */ +-static int __unused mkhi_get_fw_version(void) ++static int mkhi_get_fw_version(void) + { + struct me_fw_version version; + struct mkhi_header mkhi = { +@@ -403,7 +403,7 @@ static inline void print_cap(const char *name, int state) + } + + /* Get ME Firmware Capabilities */ +-static int __unused mkhi_get_fwcaps(void) ++static int mkhi_get_fwcaps(void) + { + u32 rule_id = 0; + struct me_fwcaps cap; +diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c +index f13ced939a..c2e5d14764 100644 +--- a/src/southbridge/intel/bd82x6x/me_8.x.c ++++ b/src/southbridge/intel/bd82x6x/me_8.x.c +@@ -44,7 +44,7 @@ + #endif + + /* Path that the BIOS should take based on ME state */ +-static const char *me_bios_path_values[] __unused = { ++static const char *me_bios_path_values[] = { + [ME_NORMAL_BIOS_PATH] = "Normal", + [ME_S3WAKE_BIOS_PATH] = "S3 Wake", + [ME_ERROR_BIOS_PATH] = "Error", +@@ -351,7 +351,7 @@ static inline void print_cap(const char *name, int state) + name, state ? " en" : "dis"); + } + +-static void __unused me_print_fw_version(mbp_fw_version_name *vers_name) ++static void me_print_fw_version(mbp_fw_version_name *vers_name) + { + if (!vers_name->major_version) { + printk(BIOS_ERR, "ME: mbp missing version report\n"); +@@ -389,7 +389,7 @@ static int mkhi_get_fwcaps(mefwcaps_sku *cap) + } + + /* Get ME Firmware Capabilities */ +-static void __unused me_print_fwcaps(mbp_fw_caps *caps_section) ++static void me_print_fwcaps(mbp_fw_caps *caps_section) + { + mefwcaps_sku *cap = &caps_section->fw_capabilities; + if (!caps_section->available) { +@@ -449,7 +449,7 @@ static int mkhi_global_reset(void) + #endif + + /* Send END OF POST message to the ME */ +-static int __unused mkhi_end_of_post(void) ++static int mkhi_end_of_post(void) + { + struct mkhi_header mkhi = { + .group_id = MKHI_GROUP_ID_GEN, +@@ -780,7 +780,7 @@ static u32 host_to_me_words_room(void) + * mbp seems to be following its own flow, let's retrieve it in a dedicated + * function. + */ +-static int __unused intel_me_read_mbp(me_bios_payload *mbp_data) ++static int intel_me_read_mbp(me_bios_payload *mbp_data) + { + mbp_header mbp_hdr; + mbp_item_header mbp_item_hdr; +diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c +index 63dff6ace8..f73014c5ee 100644 +--- a/src/southbridge/intel/ibexpeak/me.c ++++ b/src/southbridge/intel/ibexpeak/me.c +@@ -42,7 +42,7 @@ + #endif + + /* Path that the BIOS should take based on ME state */ +-static const char *me_bios_path_values[] __unused = { ++static const char *me_bios_path_values[] = { + [ME_NORMAL_BIOS_PATH] = "Normal", + [ME_S3WAKE_BIOS_PATH] = "S3 Wake", + [ME_ERROR_BIOS_PATH] = "Error", +@@ -342,7 +342,7 @@ static inline int mei_sendrecv(struct mei_header *mei, struct mkhi_header *mkhi, + } + + /* Send END OF POST message to the ME */ +-static int __unused mkhi_end_of_post(void) ++static int mkhi_end_of_post(void) + { + struct mkhi_header mkhi = { + .group_id = MKHI_GROUP_ID_GEN, +diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c +index 2df03c9cdc..82b472790e 100644 +--- a/src/southbridge/intel/lynxpoint/me_9.x.c ++++ b/src/southbridge/intel/lynxpoint/me_9.x.c +@@ -46,7 +46,7 @@ + #endif + + /* Path that the BIOS should take based on ME state */ +-static const char *me_bios_path_values[] __unused = { ++static const char *me_bios_path_values[] = { + [ME_NORMAL_BIOS_PATH] = "Normal", + [ME_S3WAKE_BIOS_PATH] = "S3 Wake", + [ME_ERROR_BIOS_PATH] = "Error", +@@ -464,7 +464,7 @@ void intel_me_mbp_clear(struct device *dev) + } + } + +-static void __unused me_print_fw_version(mbp_fw_version_name *vers_name) ++static void me_print_fw_version(mbp_fw_version_name *vers_name) + { + if (!vers_name) { + printk(BIOS_ERR, "ME: mbp missing version report\n"); +@@ -503,7 +503,7 @@ static int mkhi_get_fwcaps(mbp_mefwcaps *cap) + } + + /* Get ME Firmware Capabilities */ +-static void __unused me_print_fwcaps(mbp_mefwcaps *cap) ++static void me_print_fwcaps(mbp_mefwcaps *cap) + { + mbp_mefwcaps local_caps; + if (!cap) { +@@ -556,7 +556,7 @@ static int mkhi_global_reset(void) + #endif + + /* Send END OF POST message to the ME */ +-static int __unused mkhi_end_of_post(void) ++static int mkhi_end_of_post(void) + { + struct mkhi_header mkhi = { + .group_id = MKHI_GROUP_ID_GEN, +@@ -938,7 +938,7 @@ struct mbp_payload { + * mbp seems to be following its own flow, let's retrieve it in a dedicated + * function. + */ +-static int __unused intel_me_read_mbp(me_bios_payload *mbp_data, struct device *dev) ++static int intel_me_read_mbp(me_bios_payload *mbp_data, struct device *dev) + { + mbp_header mbp_hdr; + u32 me2host_pending; +diff --git a/src/southbridge/intel/lynxpoint/smi.c b/src/southbridge/intel/lynxpoint/smi.c +index e5c390ef50..abf6ff2f3e 100644 +--- a/src/southbridge/intel/lynxpoint/smi.c ++++ b/src/southbridge/intel/lynxpoint/smi.c +@@ -69,7 +69,7 @@ void smm_southbridge_enable_smi(void) + enable_smi(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | EOS); + } + +-static void __unused southbridge_trigger_smi(void) ++static void southbridge_trigger_smi(void) + { + /** + * There are several methods of raising a controlled SMI# via +@@ -89,7 +89,7 @@ static void __unused southbridge_trigger_smi(void) + outb(0x00, 0xb2); + } + +-static void __unused southbridge_clear_smi_status(void) ++static void southbridge_clear_smi_status(void) + { + /* Clear SMI status */ + clear_smi_status(); +diff --git a/util/sconfig/main.c b/util/sconfig/main.c +index 5c2333309b..625063eee7 100644 +--- a/util/sconfig/main.c ++++ b/util/sconfig/main.c +@@ -987,7 +987,7 @@ static void emit_chips(FILE *fil) + + emit_chip_headers(fil, chip); + +- fprintf(fil, "\n#define STORAGE static __unused DEVTREE_CONST\n\n"); ++ fprintf(fil, "\n#define STORAGE static DEVTREE_CONST\n\n"); + + for (; chip; chip = chip->next) { + if (!chip->chiph_exists) +-- +2.47.3 + diff --git a/config/module/coreboot/fam15h_15h/patches/0003-util-cbfstool-Makefile-support-distclean.patch b/config/module/coreboot/fam15h_15h/patches/0003-util-cbfstool-Makefile-support-distclean.patch new file mode 100644 index 00000000..b37272e2 --- /dev/null +++ b/config/module/coreboot/fam15h_15h/patches/0003-util-cbfstool-Makefile-support-distclean.patch @@ -0,0 +1,41 @@ +From 43347a10ff755c7ec8cd9bcbcb2a64c2f5d86eea Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Sun, 9 Jul 2023 04:13:52 +0100 +Subject: [PATCH 3/7] util/cbfstool Makefile: support distclean + +it just does make-clean + +this is so that this super-old coreboot revision +interfaces well with lbmk, which runs distclean +on cbfstool (which is supported, on modern cbfstool) + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + util/cbfstool/Makefile | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/util/cbfstool/Makefile b/util/cbfstool/Makefile +index d5321f6959..b8424d7d87 100644 +--- a/util/cbfstool/Makefile ++++ b/util/cbfstool/Makefile +@@ -26,7 +26,7 @@ ifittool: $(objutil)/cbfstool/ifittool + + cbfs-compression-tool: $(objutil)/cbfstool/cbfs-compression-tool + +-.PHONY: clean cbfstool ifittool fmaptool rmodtool ifwitool cbfs-compression-tool ++.PHONY: distclean clean cbfstool ifittool fmaptool rmodtool ifwitool cbfs-compression-tool + clean: + $(RM) fmd_parser.c fmd_parser.h fmd_scanner.c fmd_scanner.h + $(RM) $(objutil)/cbfstool/cbfstool $(cbfsobj) +@@ -55,6 +55,8 @@ install: all + $(INSTALL) ifittool $(DESTDIR)$(BINDIR) + $(INSTALL) cbfs-compression-tool $(DESTDIR)$(BINDIR) + ++distclean: clean ++ + ifneq ($(V),1) + .SILENT: + endif +-- +2.47.3 + diff --git a/config/module/coreboot/fam15h_15h/patches/0004-buildgcc-don-t-treat-binutil-warnings-as-errors.patch b/config/module/coreboot/fam15h_15h/patches/0004-buildgcc-don-t-treat-binutil-warnings-as-errors.patch new file mode 100644 index 00000000..b05d139a --- /dev/null +++ b/config/module/coreboot/fam15h_15h/patches/0004-buildgcc-don-t-treat-binutil-warnings-as-errors.patch @@ -0,0 +1,35 @@ +From 070bee8f80754d295906884f64c8de6babb8871a Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Sat, 13 Jan 2024 14:57:46 +0000 +Subject: [PATCH 4/7] buildgcc: don't treat binutil warnings as errors + +binutils 2.32 has too many build warnings on modern toolchains, +and newer gcc versions are much more pedantic about warnings, +treating them as errors by default. + +instead of patching binutils like before, just let the warnings +persist. the warnings are benign. a user on gnuboot irc had serious +issues building binutils 2.32 specifically, on current gentoo as +of 13 January 2024. this patch mitigates those warning messages. + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + util/crossgcc/buildgcc | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc +index 4b838208bb..57019a18e6 100755 +--- a/util/crossgcc/buildgcc ++++ b/util/crossgcc/buildgcc +@@ -719,7 +719,7 @@ build_BINUTILS() { + --disable-werror --disable-nls --enable-lto --enable-gold \ + --enable-interwork --enable-multilib \ + --enable-plugins --enable-multilibs \ +- CFLAGS="$HOSTCFLAGS" \ ++ CFLAGS="$HOSTCFLAGS -Wno-error -w" \ + CXXFLAGS="$HOSTCFLAGS" \ + || touch .failed + # shellcheck disable=SC2086 +-- +2.47.3 + diff --git a/config/module/coreboot/fam15h_15h/patches/0005-WIP-Fix-build-with-GCC-15-as-host-compiler.patch b/config/module/coreboot/fam15h_15h/patches/0005-WIP-Fix-build-with-GCC-15-as-host-compiler.patch new file mode 100644 index 00000000..7f0abcf3 --- /dev/null +++ b/config/module/coreboot/fam15h_15h/patches/0005-WIP-Fix-build-with-GCC-15-as-host-compiler.patch @@ -0,0 +1,38 @@ +From 5d45bcbfb2485b7cca9c7519e80d574d3aaca3eb Mon Sep 17 00:00:00 2001 +From: Alper Nebi Yasak <alpernebiyasak@gmail.com> +Date: Tue, 29 Apr 2025 17:31:13 +0300 +Subject: [PATCH 5/7] WIP: Fix build with GCC 15 as host compiler + +GCC 15 now considers the unterminated-string-initialization warning as +part of -Werror by default. Coreboot compiles host utilities with the +system compiler, which results in getting this error in some files. + +Mark a hexadecimal translation table in cbfstool code as "nonstring" to +avoid the warning-turned-error. + +The bios log prefixes are non-null-terminated as well, but I couldn't +figure out how to mark them as non-strings. Temporarily disable the +warning with a pragma to avoid the error. That pragma causes an error on +GCC 14, so disable pragma warnings along with it to avoid that as well. + +Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> +--- + util/cbfstool/common.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c +index c1725dc903..930c04e63a 100644 +--- a/util/cbfstool/common.c ++++ b/util/cbfstool/common.c +@@ -202,7 +202,7 @@ uint64_t intfiletype(const char *name) + + char *bintohex(uint8_t *data, size_t len) + { +- static const char translate[16] = "0123456789abcdef"; ++ static const char translate[16] __attribute__((__nonstring__)) = "0123456789abcdef"; + + char *result = malloc(len * 2 + 1); + if (result == NULL) +-- +2.47.3 + diff --git a/config/module/coreboot/fam15h_15h/patches/0006-util-romcc-Fix-build-with-GCC-15.patch b/config/module/coreboot/fam15h_15h/patches/0006-util-romcc-Fix-build-with-GCC-15.patch new file mode 100644 index 00000000..e91dec52 --- /dev/null +++ b/config/module/coreboot/fam15h_15h/patches/0006-util-romcc-Fix-build-with-GCC-15.patch @@ -0,0 +1,118 @@ +From 1a875c9354e4315ed10335bc978132943de6d3a6 Mon Sep 17 00:00:00 2001 +From: Alper Nebi Yasak <alpernebiyasak@gmail.com> +Date: Tue, 29 Apr 2025 19:46:14 +0300 +Subject: [PATCH 6/7] util/romcc: Fix build with GCC 15 + +With GCC 15, we get build errors complaining bool is a reserved keyword, +so cannot be used as a function name. Rename our bool() to bool_(). + +Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> +--- + util/romcc/romcc.c | 24 ++++++++++++------------ + 1 file changed, 12 insertions(+), 12 deletions(-) + +diff --git a/util/romcc/romcc.c b/util/romcc/romcc.c +index 378bfc50f2..b375e0fc83 100644 +--- a/util/romcc/romcc.c ++++ b/util/romcc/romcc.c +@@ -7137,7 +7137,7 @@ static void integral(struct compile_state *state, struct triple *def) + } + + +-static void bool(struct compile_state *state, struct triple *def) ++static void bool_(struct compile_state *state, struct triple *def) + { + if (!TYPE_ARITHMETIC(def->type->type) && + ((def->type->type & TYPE_MASK) != TYPE_POINTER)) { +@@ -7705,7 +7705,7 @@ static struct triple *mkcond_expr( + struct triple *def, *val, *var, *jmp1, *jmp2, *top, *mid, *end; + struct type *result_type; + unsigned int left_type, right_type; +- bool(state, test); ++ bool_(state, test); + left_type = left->type->type; + right_type = right->type->type; + result_type = 0; +@@ -11036,7 +11036,7 @@ static struct triple *unary_expr(struct compile_state *state) + case TOK_BANG: + eat(state, TOK_BANG); + right = read_expr(state, cast_expr(state)); +- bool(state, right); ++ bool_(state, right); + def = lfalse_expr(state, right); + break; + case TOK_SIZEOF: +@@ -11363,10 +11363,10 @@ static struct triple *land_expr(struct compile_state *state) + while(peek(state) == TOK_LOGAND) { + struct triple *left, *right; + left = read_expr(state, def); +- bool(state, left); ++ bool_(state, left); + eat(state, TOK_LOGAND); + right = read_expr(state, or_expr(state)); +- bool(state, right); ++ bool_(state, right); + + def = mkland_expr(state, + ltrue_expr(state, left), +@@ -11382,10 +11382,10 @@ static struct triple *lor_expr(struct compile_state *state) + while(peek(state) == TOK_LOGOR) { + struct triple *left, *right; + left = read_expr(state, def); +- bool(state, left); ++ bool_(state, left); + eat(state, TOK_LOGOR); + right = read_expr(state, land_expr(state)); +- bool(state, right); ++ bool_(state, right); + + def = mklor_expr(state, + ltrue_expr(state, left), +@@ -11400,7 +11400,7 @@ static struct triple *conditional_expr(struct compile_state *state) + def = lor_expr(state); + if (peek(state) == TOK_QUEST) { + struct triple *test, *left, *right; +- bool(state, def); ++ bool_(state, def); + test = ltrue_expr(state, read_expr(state, def)); + eat(state, TOK_QUEST); + left = read_expr(state, expr(state)); +@@ -11676,7 +11676,7 @@ static void if_statement(struct compile_state *state, struct triple *first) + eat(state, TOK_IF); + eat(state, TOK_LPAREN); + test = expr(state); +- bool(state, test); ++ bool_(state, test); + /* Cleanup and invert the test */ + test = lfalse_expr(state, read_expr(state, test)); + eat(state, TOK_RPAREN); +@@ -11719,7 +11719,7 @@ static void for_statement(struct compile_state *state, struct triple *first) + eat(state, TOK_SEMI); + if (peek(state) != TOK_SEMI) { + test = expr(state); +- bool(state, test); ++ bool_(state, test); + test = ltrue_expr(state, read_expr(state, test)); + } + eat(state, TOK_SEMI); +@@ -11767,7 +11767,7 @@ static void while_statement(struct compile_state *state, struct triple *first) + eat(state, TOK_WHILE); + eat(state, TOK_LPAREN); + test = expr(state); +- bool(state, test); ++ bool_(state, test); + test = ltrue_expr(state, read_expr(state, test)); + eat(state, TOK_RPAREN); + /* Generate the needed pieces */ +@@ -11818,7 +11818,7 @@ static void do_statement(struct compile_state *state, struct triple *first) + eat(state, TOK_WHILE); + eat(state, TOK_LPAREN); + test = read_expr(state, expr(state)); +- bool(state, test); ++ bool_(state, test); + eat(state, TOK_RPAREN); + eat(state, TOK_SEMI); + /* Thread the pieces together */ +-- +2.47.3 + diff --git a/config/module/coreboot/fam15h_15h/patches/0007-xgcc-update-nasm-to-2.16.03.patch b/config/module/coreboot/fam15h_15h/patches/0007-xgcc-update-nasm-to-2.16.03.patch new file mode 100644 index 00000000..a1dec824 --- /dev/null +++ b/config/module/coreboot/fam15h_15h/patches/0007-xgcc-update-nasm-to-2.16.03.patch @@ -0,0 +1,44 @@ +From 2ba4a68baf8c7b395962c23e6dc021667e8738e8 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Wed, 30 Apr 2025 04:07:31 +0100 +Subject: [PATCH 7/7] xgcc: update nasm to 2.16.03 + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + util/crossgcc/buildgcc | 2 +- + util/crossgcc/sum/nasm-2.14.02.tar.bz2.cksum | 1 - + util/crossgcc/sum/nasm-2.16.03.tar.bz2.cksum | 1 + + 3 files changed, 2 insertions(+), 2 deletions(-) + delete mode 100644 util/crossgcc/sum/nasm-2.14.02.tar.bz2.cksum + create mode 100644 util/crossgcc/sum/nasm-2.16.03.tar.bz2.cksum + +diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc +index 57019a18e6..b1ef20dc92 100755 +--- a/util/crossgcc/buildgcc ++++ b/util/crossgcc/buildgcc +@@ -61,7 +61,7 @@ EXPAT_VERSION=2.2.7 + CLANG_VERSION=8.0.0 + MAKE_VERSION=4.2.1 + CMAKE_VERSION=3.15.3 +-NASM_VERSION=2.14.02 ++NASM_VERSION=2.16.03 + + # GCC toolchain archive locations + # These are sanitized by the jenkins toolchain test builder, so if +diff --git a/util/crossgcc/sum/nasm-2.14.02.tar.bz2.cksum b/util/crossgcc/sum/nasm-2.14.02.tar.bz2.cksum +deleted file mode 100644 +index f3b9de9d29..0000000000 +--- a/util/crossgcc/sum/nasm-2.14.02.tar.bz2.cksum ++++ /dev/null +@@ -1 +0,0 @@ +-fe098ee4dc9c4c983696c4948e64b23e4098b92b tarballs/nasm-2.14.02.tar.bz2 +diff --git a/util/crossgcc/sum/nasm-2.16.03.tar.bz2.cksum b/util/crossgcc/sum/nasm-2.16.03.tar.bz2.cksum +new file mode 100644 +index 0000000000..9ca23fb0c4 +--- /dev/null ++++ b/util/crossgcc/sum/nasm-2.16.03.tar.bz2.cksum +@@ -0,0 +1 @@ ++c63080347a5c1c8904456fe6c680b722558383b4 tarballs/nasm-2.16.03.tar.bz2 +-- +2.47.3 + diff --git a/config/module/coreboot/fam15h_15h/target.cfg b/config/module/coreboot/fam15h_15h/target.cfg new file mode 100644 index 00000000..1153f5f9 --- /dev/null +++ b/config/module/coreboot/fam15h_15h/target.cfg @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +# 15h.org coreboot fork has better raminit and nicer features +# than the upstream 4.11_branch that we used previously. + +url="https://git.15h.org/mrothfuss/coreboot-15h" +bkup_url="https://codeberg.org/libreboot/coreboot-15h" + +rev="57e26bdcd959808c0171164f3c6197d4a347c3b2" + +tree="fam15h_15h" + +xlang="c" # disable use of gnat on this tree diff --git a/config/module/coreboot/kcma_d8_16mb/config/libgfxinit_txtmode b/config/module/coreboot/kcma_d8_16mb/config/libgfxinit_txtmode index 39cfe811..60754946 100644 --- a/config/module/coreboot/kcma_d8_16mb/config/libgfxinit_txtmode +++ b/config/module/coreboot/kcma_d8_16mb/config/libgfxinit_txtmode @@ -25,8 +25,8 @@ CONFIG_USE_BLOBS=y # CONFIG_USE_AMD_BLOBS is not set # CONFIG_COVERAGE is not set # CONFIG_UBSAN is not set -CONFIG_NO_RELOCATABLE_RAMSTAGE=y -# CONFIG_RELOCATABLE_RAMSTAGE is not set +# CONFIG_NO_RELOCATABLE_RAMSTAGE is not set +CONFIG_RELOCATABLE_RAMSTAGE=y # CONFIG_UPDATE_IMAGE is not set # CONFIG_BOOTSPLASH_IMAGE is not set @@ -93,11 +93,7 @@ CONFIG_MAX_CPUS=16 CONFIG_CBFS_SIZE=0x1000000 CONFIG_UART_FOR_CONSOLE=0 CONFIG_MAINBOARD_VENDOR="ASUS" -CONFIG_APIC_ID_OFFSET=0x0 -CONFIG_HW_MEM_HOLE_SIZEK=0x100000 -CONFIG_MAX_PHYSICAL_CPUS=2 -CONFIG_HT_CHAIN_END_UNITID_BASE=0x20 -CONFIG_HT_CHAIN_UNITID_BASE=0x0 +CONFIG_HW_MEM_HOLE_SIZEK=0x200000 CONFIG_IRQ_SLOT_COUNT=13 CONFIG_VGA_BIOS_ID="1000,0072" CONFIG_ONBOARD_VGA_IS_PRIMARY=y @@ -110,6 +106,7 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS" CONFIG_DEVICETREE="devicetree.cb" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 # CONFIG_BOARD_ASUS_AM1I_A is not set +# CONFIG_BOARD_ASUS_CROSSHAIR_V_FORMULA_Z is not set # CONFIG_BOARD_ASUS_F2A85_M is not set # CONFIG_BOARD_ASUS_F2A85_M_PRO is not set # CONFIG_BOARD_ASUS_F2A85_M_LE is not set @@ -138,20 +135,19 @@ CONFIG_BOARD_ASUS_KCMA_D8=y # CONFIG_BOARD_ASUS_P8H61_M_LX is not set # CONFIG_BOARD_ASUS_P8H61_M_PRO is not set # CONFIG_BOARD_ASUS_P8Z77_M_PRO is not set +# CONFIG_BOARD_ASUS_RAPTOR_KCMA_D8 is not set +# CONFIG_BOARD_ASUS_RAPTOR_KGPE_D16 is not set +# CONFIG_BOARD_ASUS_SABERTOOTH_990FX_R2 is not set +CONFIG_HPET_ADDRESS=0xfed00000 CONFIG_POST_IO=y -CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kcma-d8/bootblock.c" -CONFIG_DCACHE_RAM_BASE=0xc2000 -CONFIG_DCACHE_RAM_SIZE=0x1e000 -CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f -CONFIG_MAX_REBOOT_CNT=10 +CONFIG_DCACHE_RAM_BASE=0x30000 +CONFIG_DCACHE_RAM_SIZE=0x10000 +CONFIG_MAX_REBOOT_CNT=3 CONFIG_OVERRIDE_DEVICETREE="" -CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_FMDFILE="" # CONFIG_VBOOT is not set -CONFIG_MMCONF_BASE_ADDRESS=0xc0000000 +CONFIG_MMCONF_BASE_ADDRESS=0xF8000000 CONFIG_POST_DEVICE=y -CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y -CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_DRIVERS_UART_8250IO=y CONFIG_DIMM_MAX=4 @@ -187,7 +183,6 @@ CONFIG_COREBOOT_ROMSIZE_KB=16384 CONFIG_ROM_SIZE=0x1000000 CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y -CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y # CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set CONFIG_POWER_STATE_ON_AFTER_FAILURE=y # CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set @@ -207,9 +202,9 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 # CONFIG_HAVE_BOOTBLOCK=y CONFIG_CPU_ADDR_BITS=48 -CONFIG_MMCONF_BUS_NUMBER=256 +CONFIG_MMCONF_BUS_NUMBER=64 +# CONFIG_S3_VGA_ROM_RUN is not set CONFIG_EHCI_BAR=0xfef00000 -CONFIG_SMM_MODULE_STACK_SIZE=0x400 CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d" # CONFIG_SOC_CAVIUM_CN81XX is not set CONFIG_ARCH_ARMV8_EXTENSION=0 @@ -223,7 +218,7 @@ CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_PCIEXP_CLK_PM=y CONFIG_TTYS0_BASE=0x3f8 -CONFIG_HPET_MIN_TICKS=0x14 +CONFIG_HPET_MIN_TICKS=0x37EE CONFIG_UART_PCI_ADDR=0x0 # CONFIG_SOC_MEDIATEK_MT8173 is not set # CONFIG_SOC_MEDIATEK_MT8183 is not set @@ -244,102 +239,99 @@ CONFIG_UART_PCI_ADDR=0x0 # # CPU # -CONFIG_CPU_SOCKET_TYPE=0x14 -# CONFIG_EXT_RT_TBL_SUPPORT is not set CONFIG_CBB=0x0 CONFIG_CDB=0x18 CONFIG_XIP_ROM_SIZE=0x80000 -CONFIG_CPU_AMD_SOCKET_C32_NON_AGESA=y -CONFIG_CPU_AMD_MODEL_10XXX=y -CONFIG_USE_LARGE_DCACHE=y -CONFIG_NUM_IPI_STARTS=1 -CONFIG_DCACHE_BSP_TOP_STACK_SIZE=0x4000 -CONFIG_DCACHE_BSP_TOP_STACK_SLUSH=0x4000 -CONFIG_DCACHE_AP_STACK_SIZE=0x500 -CONFIG_SET_FIDVID=y -CONFIG_LIFT_BSP_APIC_ID=y -CONFIG_SET_FIDVID_DEBUG=y -CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST=y -# CONFIG_SET_FIDVID_CORE0_ONLY is not set -CONFIG_SET_FIDVID_CORE_RANGE=0 +CONFIG_NUM_IPI_STARTS=2 CONFIG_UDELAY_LAPIC_FIXED_FSB=200 -# CONFIG_CPU_AMD_AGESA is not set +CONFIG_CPU_AMD_AGESA=y +CONFIG_AGESA_LEGACY=y +CONFIG_AGESA_LEGACY_WRAPPER=y +# CONFIG_AGESA_NO_LEGACY is not set +# CONFIG_ENABLE_MRC_CACHE is not set +CONFIG_S3_DATA_POS=0xFFFF0000 +CONFIG_S3_DATA_SIZE=32768 +CONFIG_CPU_AMD_AGESA_FAMILY15=y +# CONFIG_CPU_AMD_SOCKET_G34 is not set +CONFIG_CPU_AMD_SOCKET_C32=y +# CONFIG_CPU_AMD_SOCKET_AM3R2 is not set +# CONFIG_ENABLE_AGESA_DEBUGGER is not set +# CONFIG_REMOVE_MICROCODE is not set # CONFIG_CPU_AMD_PI is not set # CONFIG_CPU_ARMLTD_CORTEX_A9 is not set -CONFIG_SSE2=y +# CONFIG_SSE2 is not set # CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set # CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set # CONFIG_CPU_TI_AM335X is not set -CONFIG_PARALLEL_CPU_INIT=y +# CONFIG_PARALLEL_CPU_INIT is not set # CONFIG_PARALLEL_MP is not set CONFIG_UDELAY_LAPIC=y -# CONFIG_LAPIC_MONOTONIC_TIMER is not set +CONFIG_LAPIC_MONOTONIC_TIMER=y # CONFIG_UDELAY_TSC is not set +CONFIG_UNKNOWN_TSC_RATE=y CONFIG_TSC_SYNC_LFENCE=y # CONFIG_TSC_SYNC_MFENCE is not set -# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set +CONFIG_NO_FIXED_XIP_ROM_SIZE=y CONFIG_LOGICAL_CPUS=y # CONFIG_HAVE_SMI_HANDLER is not set # CONFIG_NO_SMM is not set -# CONFIG_SMM_ASEG is not set -CONFIG_SMM_TSEG=y -CONFIG_SMM_MODULE_HEAP_SIZE=0x4000 -CONFIG_SMM_STUB_STACK_SIZE=0x400 +CONFIG_SMM_ASEG=y # CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set # CONFIG_SERIALIZED_SMM_INITIALIZATION is not set CONFIG_X86_AMD_FIXED_MTRRS=y # CONFIG_X86_AMD_INIT_SIPI is not set # CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set # CONFIG_SOC_SETS_MSRS is not set -CONFIG_CAR_GLOBAL_MIGRATION=y +# CONFIG_CAR_GLOBAL_MIGRATION is not set CONFIG_SMP=y -CONFIG_SSE=y -CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +# CONFIG_SUPPORT_CPU_UCODE_IN_CBFS is not set # CONFIG_USES_MICROCODE_HEADER_FILES is not set -CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y -CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y -# CONFIG_CPU_MICROCODE_CBFS_NONE is not set -CONFIG_CPU_MICROCODE_MULTIPLE_FILES=y # # Northbridge # -# CONFIG_NORTHBRIDGE_AMD_AGESA is not set -CONFIG_NORTHBRIDGE_AMD_AMDFAM10=y -CONFIG_AGP_APERTURE_SIZE=0x4000000 -CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/amd/amdfam10/bootblock.c" -CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y -# CONFIG_HT_CHAIN_DISTRIBUTE is not set -# CONFIG_DIMM_DDR2 is not set -CONFIG_DIMM_DDR3=y -CONFIG_DIMM_REGISTERED=y -CONFIG_DIMM_VOLTAGE_SET_SUPPORT=y -# CONFIG_SVI_HIGH_FREQ is not set - -# -# HyperTransport setup -# -# CONFIG_LIMIT_HT_DOWN_WIDTH_8 is not set -CONFIG_LIMIT_HT_DOWN_WIDTH_16=y -# CONFIG_LIMIT_HT_UP_WIDTH_8 is not set -CONFIG_LIMIT_HT_UP_WIDTH_16=y +CONFIG_NORTHBRIDGE_AMD_AGESA=y +# CONFIG_CONSOLE_VGA_MULTI is not set +CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY15=y +# CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC is not set +CONFIG_AMD_NB_CIMX=y +CONFIG_NORTHBRIDGE_AMD_CIMX_RD890=y +# CONFIG_ENABLE_NB_CIMX_DEBUGGER is not set +CONFIG_NORTHBRIDGE_AMD_CIMX_RD890_IOMMU=y +# CONFIG_RD890_PCIE_ASPM_DISABLED is not set +# CONFIG_RD890_PCIE_ASPM_L0S is not set +CONFIG_RD890_PCIE_ASPM_L1=y +# CONFIG_RD890_PCIE_ASPM_L0S_AND_L1 is not set +# CONFIG_RD890_PCIE_ASPM_L0S_DOWNSTREAM is not set +# CONFIG_RD890_PCIE_ASPM_L0S_DOWNSTREAM_AND_L1 is not set +CONFIG_RD890_PCIE_ASPM_MODE=0x02 +# CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH_20MA is not set +CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH_22MA=y +# CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH_24MA is not set +# CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH_26MA is not set +CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH=0x02 # CONFIG_NORTHBRIDGE_AMD_PI is not set # # Southbridge # -CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y -CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c" -# CONFIG_AMD_SB_CIMX is not set +CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/cimx/sb700/bootblock.c" +CONFIG_AMD_SB_CIMX=y +CONFIG_SOUTHBRIDGE_AMD_CIMX_SB700=y +# CONFIG_ENABLE_SB_CIMX_DEBUGGER is not set +# CONFIG_SB700_SATA_NATIVE_IDE is not set +# CONFIG_SB700_SATA_RAID is not set +CONFIG_SB700_SATA_AHCI=y +# CONFIG_SB700_SATA_LEGACY_IDE is not set +# CONFIG_SB700_SATA_IDE_TO_AHCI is not set +# CONFIG_SB700_SATA_AHCI_AMD is not set +# CONFIG_SB700_SATA_IDE_TO_AHCI_AMD is not set +CONFIG_SB700_SATA_MODE=0x02 +CONFIG_SB700_SATA_HIDE_UNUSED_PORTS=y +# CONFIG_PCIB_ENABLE is not set +CONFIG_ACPI_SCI_IRQ=0x9 # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set -CONFIG_SOUTHBRIDGE_AMD_SB700=y -CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y -CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y -# CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT is not set -CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA=y -CONFIG_SOUTHBRIDGE_AMD_SR5650=y -CONFIG_EXT_CONF_SUPPORT=y # CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set # CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set # CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set @@ -367,6 +359,13 @@ CONFIG_SUPERIO_WINBOND_W83667HG_A=y # Embedded Controllers # # CONFIG_EC_GOOGLE_WILCO is not set + +# +# AMD Platform Initialization +# +# CONFIG_CPU_AMD_AGESA_BINARY_PI is not set +CONFIG_CPU_AMD_AGESA_OPENSOURCE=y +# CONFIG_AGESA_EXTRA_TIMESTAMPS is not set # CONFIG_CAVIUM_BDK is not set # CONFIG_MAINBOARD_HAS_CHROMEOS is not set # CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set @@ -391,15 +390,13 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y # CONFIG_SIPI_VECTOR_IN_ROM is not set CONFIG_RAMBASE=0xe00000 CONFIG_RAMTOP=0x1000000 -# CONFIG_CBMEM_TOP_BACKUP is not set +CONFIG_CBMEM_TOP_BACKUP=y CONFIG_PC80_SYSTEM=y # CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set -CONFIG_HAVE_CMOS_DEFAULT=y -CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +# CONFIG_HAVE_CMOS_DEFAULT is not set CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y # CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set # CONFIG_HPET_ADDRESS_OVERRIDE is not set -CONFIG_HPET_ADDRESS=0xfed00000 CONFIG_ID_SECTION_OFFSET=0x80 # CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set # CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set @@ -411,6 +408,8 @@ CONFIG_ACPI_HAVE_PCAT_8259=y CONFIG_COLLECT_TIMESTAMPS_TSC=y # CONFIG_PAGING_IN_CACHE_AS_RAM is not set # CONFIG_IDT_IN_EVERY_STAGE is not set +CONFIG_HAVE_CF9_RESET=y +CONFIG_HAVE_CF9_RESET_PREPARE=y # CONFIG_PIRQ_ROUTE is not set # @@ -427,7 +426,7 @@ CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y # Display # CONFIG_VGA_TEXT_FRAMEBUFFER=y -CONFIG_SMBUS_HAS_AUX_CHANNELS=y +# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set CONFIG_PCI=y # CONFIG_NO_MMCONF_SUPPORT is not set CONFIG_MMCONF_SUPPORT=y @@ -454,22 +453,8 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_RT8168_GET_MAC_FROM_VPD is not set # CONFIG_RT8168_SET_LED_MODE is not set # CONFIG_SMMSTORE_IN_CBFS is not set -CONFIG_SPI_FLASH=y +# CONFIG_SPI_FLASH is not set # CONFIG_SPI_SDCARD is not set -CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y -# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set -# CONFIG_SPI_FLASH_NO_FAST_READ is not set -CONFIG_SPI_FLASH_ADESTO=y -CONFIG_SPI_FLASH_AMIC=y -CONFIG_SPI_FLASH_ATMEL=y -CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_STMICRO=y -# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set -# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set @@ -486,7 +471,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_VPD is not set # CONFIG_DRIVERS_GENERIC_WIFI is not set -# CONFIG_DRIVERS_AMD_PI is not set +CONFIG_DRIVERS_AMD_PI=y CONFIG_DRIVERS_ASPEED_AST2050=y CONFIG_DRIVERS_ASPEED_AST_COMMON=y # CONFIG_DRIVERS_I2C_MAX98373 is not set @@ -528,6 +513,7 @@ CONFIG_VGA=y # CONFIG_NC_FPGA_NOTIFY_CB_READY is not set # CONFIG_DRIVERS_SIL_3114 is not set # CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set +# CONFIG_MAINBOARD_HAS_SPI_TPM is not set # CONFIG_DRIVER_TI_TPS65090 is not set # CONFIG_DRIVERS_TI_TPS65913 is not set # CONFIG_DRIVERS_TI_TPS65913_RTC is not set @@ -550,7 +536,8 @@ CONFIG_USER_NO_TPM=y # # Memory initialization # -# CONFIG_STM is not set +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set # CONFIG_ACPI_SATA_GENERATOR is not set # CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set # CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set @@ -603,14 +590,15 @@ CONFIG_POST_DEVICE_NONE=y CONFIG_POST_IO_PORT=0x80 # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set CONFIG_HWBASE_DEBUG_CB=y -CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y -CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y -CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y +# CONFIG_HAVE_ACPI_RESUME is not set +# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set +# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set +# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set # CONFIG_NO_MONOTONIC_TIMER is not set CONFIG_HAVE_MONOTONIC_TIMER=y # CONFIG_TIMER_QUEUE is not set CONFIG_HAVE_OPTION_TABLE=y -CONFIG_PCI_IO_CFG_EXT=y +# CONFIG_PCI_IO_CFG_EXT is not set CONFIG_IOAPIC=y # CONFIG_USE_WATCHDOG_ON_BOOT is not set # CONFIG_GFXUMA is not set @@ -651,6 +639,7 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # Secondary Payloads # # CONFIG_COREINFO_SECONDARY_PAYLOAD is not set +# CONFIG_GRUB2_SECONDARY_PAYLOAD is not set # CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set # CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set # CONFIG_TINT_SECONDARY_PAYLOAD is not set @@ -662,8 +651,6 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # # CPU Debug Settings # -CONFIG_HAVE_DEBUG_CAR=y -# CONFIG_DEBUG_CAR is not set # # BLOB Debug Settings @@ -682,12 +669,11 @@ CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SMBUS is not set # CONFIG_DEBUG_MALLOC is not set # CONFIG_DEBUG_CONSOLE_INIT is not set -# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_TRACE is not set # CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_ADA_CODE is not set # CONFIG_HAVE_EM100_SUPPORT is not set -CONFIG_ENABLE_APIC_EXT_ID=y +# CONFIG_ENABLE_APIC_EXT_ID is not set CONFIG_WARNINGS_ARE_ERRORS=y # CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set # CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set diff --git a/config/module/coreboot/kcma_d8_16mb/target.cfg b/config/module/coreboot/kcma_d8_16mb/target.cfg index 6733c4d9..0a6977f0 100644 --- a/config/module/coreboot/kcma_d8_16mb/target.cfg +++ b/config/module/coreboot/kcma_d8_16mb/target.cfg @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-3.0-or-later -tree="fam15h_cb411" +tree="fam15h_15h" xarch="i386-elf" payload_seabios="y" payload_grub="y" diff --git a/config/module/coreboot/kcma_d8_2mb/config/libgfxinit_txtmode b/config/module/coreboot/kcma_d8_2mb/config/libgfxinit_txtmode index 7949bcfd..1eb1b679 100644 --- a/config/module/coreboot/kcma_d8_2mb/config/libgfxinit_txtmode +++ b/config/module/coreboot/kcma_d8_2mb/config/libgfxinit_txtmode @@ -25,8 +25,8 @@ CONFIG_USE_BLOBS=y # CONFIG_USE_AMD_BLOBS is not set # CONFIG_COVERAGE is not set # CONFIG_UBSAN is not set -CONFIG_NO_RELOCATABLE_RAMSTAGE=y -# CONFIG_RELOCATABLE_RAMSTAGE is not set +# CONFIG_NO_RELOCATABLE_RAMSTAGE is not set +CONFIG_RELOCATABLE_RAMSTAGE=y # CONFIG_UPDATE_IMAGE is not set # CONFIG_BOOTSPLASH_IMAGE is not set @@ -93,11 +93,7 @@ CONFIG_MAX_CPUS=16 CONFIG_CBFS_SIZE=0x200000 CONFIG_UART_FOR_CONSOLE=0 CONFIG_MAINBOARD_VENDOR="ASUS" -CONFIG_APIC_ID_OFFSET=0x0 -CONFIG_HW_MEM_HOLE_SIZEK=0x100000 -CONFIG_MAX_PHYSICAL_CPUS=2 -CONFIG_HT_CHAIN_END_UNITID_BASE=0x20 -CONFIG_HT_CHAIN_UNITID_BASE=0x0 +CONFIG_HW_MEM_HOLE_SIZEK=0x200000 CONFIG_IRQ_SLOT_COUNT=13 CONFIG_VGA_BIOS_ID="1000,0072" CONFIG_ONBOARD_VGA_IS_PRIMARY=y @@ -110,6 +106,7 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS" CONFIG_DEVICETREE="devicetree.cb" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 # CONFIG_BOARD_ASUS_AM1I_A is not set +# CONFIG_BOARD_ASUS_CROSSHAIR_V_FORMULA_Z is not set # CONFIG_BOARD_ASUS_F2A85_M is not set # CONFIG_BOARD_ASUS_F2A85_M_PRO is not set # CONFIG_BOARD_ASUS_F2A85_M_LE is not set @@ -138,20 +135,19 @@ CONFIG_BOARD_ASUS_KCMA_D8=y # CONFIG_BOARD_ASUS_P8H61_M_LX is not set # CONFIG_BOARD_ASUS_P8H61_M_PRO is not set # CONFIG_BOARD_ASUS_P8Z77_M_PRO is not set +# CONFIG_BOARD_ASUS_RAPTOR_KCMA_D8 is not set +# CONFIG_BOARD_ASUS_RAPTOR_KGPE_D16 is not set +# CONFIG_BOARD_ASUS_SABERTOOTH_990FX_R2 is not set +CONFIG_HPET_ADDRESS=0xfed00000 CONFIG_POST_IO=y -CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kcma-d8/bootblock.c" -CONFIG_DCACHE_RAM_BASE=0xc2000 -CONFIG_DCACHE_RAM_SIZE=0x1e000 -CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f -CONFIG_MAX_REBOOT_CNT=10 +CONFIG_DCACHE_RAM_BASE=0x30000 +CONFIG_DCACHE_RAM_SIZE=0x10000 +CONFIG_MAX_REBOOT_CNT=3 CONFIG_OVERRIDE_DEVICETREE="" -CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_FMDFILE="" # CONFIG_VBOOT is not set -CONFIG_MMCONF_BASE_ADDRESS=0xc0000000 +CONFIG_MMCONF_BASE_ADDRESS=0xF8000000 CONFIG_POST_DEVICE=y -CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y -CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_DRIVERS_UART_8250IO=y CONFIG_DIMM_MAX=4 @@ -187,7 +183,6 @@ CONFIG_COREBOOT_ROMSIZE_KB=2048 CONFIG_ROM_SIZE=0x200000 CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y -CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y # CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set CONFIG_POWER_STATE_ON_AFTER_FAILURE=y # CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set @@ -207,9 +202,9 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 # CONFIG_HAVE_BOOTBLOCK=y CONFIG_CPU_ADDR_BITS=48 -CONFIG_MMCONF_BUS_NUMBER=256 +CONFIG_MMCONF_BUS_NUMBER=64 +# CONFIG_S3_VGA_ROM_RUN is not set CONFIG_EHCI_BAR=0xfef00000 -CONFIG_SMM_MODULE_STACK_SIZE=0x400 CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d" # CONFIG_SOC_CAVIUM_CN81XX is not set CONFIG_ARCH_ARMV8_EXTENSION=0 @@ -223,7 +218,7 @@ CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_PCIEXP_CLK_PM=y CONFIG_TTYS0_BASE=0x3f8 -CONFIG_HPET_MIN_TICKS=0x14 +CONFIG_HPET_MIN_TICKS=0x37EE CONFIG_UART_PCI_ADDR=0x0 # CONFIG_SOC_MEDIATEK_MT8173 is not set # CONFIG_SOC_MEDIATEK_MT8183 is not set @@ -244,102 +239,99 @@ CONFIG_UART_PCI_ADDR=0x0 # # CPU # -CONFIG_CPU_SOCKET_TYPE=0x14 -# CONFIG_EXT_RT_TBL_SUPPORT is not set CONFIG_CBB=0x0 CONFIG_CDB=0x18 CONFIG_XIP_ROM_SIZE=0x80000 -CONFIG_CPU_AMD_SOCKET_C32_NON_AGESA=y -CONFIG_CPU_AMD_MODEL_10XXX=y -CONFIG_USE_LARGE_DCACHE=y -CONFIG_NUM_IPI_STARTS=1 -CONFIG_DCACHE_BSP_TOP_STACK_SIZE=0x4000 -CONFIG_DCACHE_BSP_TOP_STACK_SLUSH=0x4000 -CONFIG_DCACHE_AP_STACK_SIZE=0x500 -CONFIG_SET_FIDVID=y -CONFIG_LIFT_BSP_APIC_ID=y -CONFIG_SET_FIDVID_DEBUG=y -CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST=y -# CONFIG_SET_FIDVID_CORE0_ONLY is not set -CONFIG_SET_FIDVID_CORE_RANGE=0 +CONFIG_NUM_IPI_STARTS=2 CONFIG_UDELAY_LAPIC_FIXED_FSB=200 -# CONFIG_CPU_AMD_AGESA is not set +CONFIG_CPU_AMD_AGESA=y +CONFIG_AGESA_LEGACY=y +CONFIG_AGESA_LEGACY_WRAPPER=y +# CONFIG_AGESA_NO_LEGACY is not set +# CONFIG_ENABLE_MRC_CACHE is not set +CONFIG_S3_DATA_POS=0xFFFF0000 +CONFIG_S3_DATA_SIZE=32768 +CONFIG_CPU_AMD_AGESA_FAMILY15=y +# CONFIG_CPU_AMD_SOCKET_G34 is not set +CONFIG_CPU_AMD_SOCKET_C32=y +# CONFIG_CPU_AMD_SOCKET_AM3R2 is not set +# CONFIG_ENABLE_AGESA_DEBUGGER is not set +# CONFIG_REMOVE_MICROCODE is not set # CONFIG_CPU_AMD_PI is not set # CONFIG_CPU_ARMLTD_CORTEX_A9 is not set -CONFIG_SSE2=y +# CONFIG_SSE2 is not set # CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set # CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set # CONFIG_CPU_TI_AM335X is not set -CONFIG_PARALLEL_CPU_INIT=y +# CONFIG_PARALLEL_CPU_INIT is not set # CONFIG_PARALLEL_MP is not set CONFIG_UDELAY_LAPIC=y -# CONFIG_LAPIC_MONOTONIC_TIMER is not set +CONFIG_LAPIC_MONOTONIC_TIMER=y # CONFIG_UDELAY_TSC is not set +CONFIG_UNKNOWN_TSC_RATE=y CONFIG_TSC_SYNC_LFENCE=y # CONFIG_TSC_SYNC_MFENCE is not set -# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set +CONFIG_NO_FIXED_XIP_ROM_SIZE=y CONFIG_LOGICAL_CPUS=y # CONFIG_HAVE_SMI_HANDLER is not set # CONFIG_NO_SMM is not set -# CONFIG_SMM_ASEG is not set -CONFIG_SMM_TSEG=y -CONFIG_SMM_MODULE_HEAP_SIZE=0x4000 -CONFIG_SMM_STUB_STACK_SIZE=0x400 +CONFIG_SMM_ASEG=y # CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set # CONFIG_SERIALIZED_SMM_INITIALIZATION is not set CONFIG_X86_AMD_FIXED_MTRRS=y # CONFIG_X86_AMD_INIT_SIPI is not set # CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set # CONFIG_SOC_SETS_MSRS is not set -CONFIG_CAR_GLOBAL_MIGRATION=y +# CONFIG_CAR_GLOBAL_MIGRATION is not set CONFIG_SMP=y -CONFIG_SSE=y -CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +# CONFIG_SUPPORT_CPU_UCODE_IN_CBFS is not set # CONFIG_USES_MICROCODE_HEADER_FILES is not set -CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y -CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y -# CONFIG_CPU_MICROCODE_CBFS_NONE is not set -CONFIG_CPU_MICROCODE_MULTIPLE_FILES=y # # Northbridge # -# CONFIG_NORTHBRIDGE_AMD_AGESA is not set -CONFIG_NORTHBRIDGE_AMD_AMDFAM10=y -CONFIG_AGP_APERTURE_SIZE=0x4000000 -CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/amd/amdfam10/bootblock.c" -CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y -# CONFIG_HT_CHAIN_DISTRIBUTE is not set -# CONFIG_DIMM_DDR2 is not set -CONFIG_DIMM_DDR3=y -CONFIG_DIMM_REGISTERED=y -CONFIG_DIMM_VOLTAGE_SET_SUPPORT=y -# CONFIG_SVI_HIGH_FREQ is not set - -# -# HyperTransport setup -# -# CONFIG_LIMIT_HT_DOWN_WIDTH_8 is not set -CONFIG_LIMIT_HT_DOWN_WIDTH_16=y -# CONFIG_LIMIT_HT_UP_WIDTH_8 is not set -CONFIG_LIMIT_HT_UP_WIDTH_16=y +CONFIG_NORTHBRIDGE_AMD_AGESA=y +# CONFIG_CONSOLE_VGA_MULTI is not set +CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY15=y +# CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC is not set +CONFIG_AMD_NB_CIMX=y +CONFIG_NORTHBRIDGE_AMD_CIMX_RD890=y +# CONFIG_ENABLE_NB_CIMX_DEBUGGER is not set +CONFIG_NORTHBRIDGE_AMD_CIMX_RD890_IOMMU=y +# CONFIG_RD890_PCIE_ASPM_DISABLED is not set +# CONFIG_RD890_PCIE_ASPM_L0S is not set +CONFIG_RD890_PCIE_ASPM_L1=y +# CONFIG_RD890_PCIE_ASPM_L0S_AND_L1 is not set +# CONFIG_RD890_PCIE_ASPM_L0S_DOWNSTREAM is not set +# CONFIG_RD890_PCIE_ASPM_L0S_DOWNSTREAM_AND_L1 is not set +CONFIG_RD890_PCIE_ASPM_MODE=0x02 +# CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH_20MA is not set +CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH_22MA=y +# CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH_24MA is not set +# CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH_26MA is not set +CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH=0x02 # CONFIG_NORTHBRIDGE_AMD_PI is not set # # Southbridge # -CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y -CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c" -# CONFIG_AMD_SB_CIMX is not set +CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/cimx/sb700/bootblock.c" +CONFIG_AMD_SB_CIMX=y +CONFIG_SOUTHBRIDGE_AMD_CIMX_SB700=y +# CONFIG_ENABLE_SB_CIMX_DEBUGGER is not set +# CONFIG_SB700_SATA_NATIVE_IDE is not set +# CONFIG_SB700_SATA_RAID is not set +CONFIG_SB700_SATA_AHCI=y +# CONFIG_SB700_SATA_LEGACY_IDE is not set +# CONFIG_SB700_SATA_IDE_TO_AHCI is not set +# CONFIG_SB700_SATA_AHCI_AMD is not set +# CONFIG_SB700_SATA_IDE_TO_AHCI_AMD is not set +CONFIG_SB700_SATA_MODE=0x02 +CONFIG_SB700_SATA_HIDE_UNUSED_PORTS=y +# CONFIG_PCIB_ENABLE is not set +CONFIG_ACPI_SCI_IRQ=0x9 # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set -CONFIG_SOUTHBRIDGE_AMD_SB700=y -CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y -CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y -# CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT is not set -CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA=y -CONFIG_SOUTHBRIDGE_AMD_SR5650=y -CONFIG_EXT_CONF_SUPPORT=y # CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set # CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set # CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set @@ -367,6 +359,13 @@ CONFIG_SUPERIO_WINBOND_W83667HG_A=y # Embedded Controllers # # CONFIG_EC_GOOGLE_WILCO is not set + +# +# AMD Platform Initialization +# +# CONFIG_CPU_AMD_AGESA_BINARY_PI is not set +CONFIG_CPU_AMD_AGESA_OPENSOURCE=y +# CONFIG_AGESA_EXTRA_TIMESTAMPS is not set # CONFIG_CAVIUM_BDK is not set # CONFIG_MAINBOARD_HAS_CHROMEOS is not set # CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set @@ -391,15 +390,13 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y # CONFIG_SIPI_VECTOR_IN_ROM is not set CONFIG_RAMBASE=0xe00000 CONFIG_RAMTOP=0x1000000 -# CONFIG_CBMEM_TOP_BACKUP is not set +CONFIG_CBMEM_TOP_BACKUP=y CONFIG_PC80_SYSTEM=y # CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set -CONFIG_HAVE_CMOS_DEFAULT=y -CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +# CONFIG_HAVE_CMOS_DEFAULT is not set CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y # CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set # CONFIG_HPET_ADDRESS_OVERRIDE is not set -CONFIG_HPET_ADDRESS=0xfed00000 CONFIG_ID_SECTION_OFFSET=0x80 # CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set # CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set @@ -411,6 +408,8 @@ CONFIG_ACPI_HAVE_PCAT_8259=y CONFIG_COLLECT_TIMESTAMPS_TSC=y # CONFIG_PAGING_IN_CACHE_AS_RAM is not set # CONFIG_IDT_IN_EVERY_STAGE is not set +CONFIG_HAVE_CF9_RESET=y +CONFIG_HAVE_CF9_RESET_PREPARE=y # CONFIG_PIRQ_ROUTE is not set # @@ -427,7 +426,7 @@ CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y # Display # CONFIG_VGA_TEXT_FRAMEBUFFER=y -CONFIG_SMBUS_HAS_AUX_CHANNELS=y +# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set CONFIG_PCI=y # CONFIG_NO_MMCONF_SUPPORT is not set CONFIG_MMCONF_SUPPORT=y @@ -454,22 +453,8 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_RT8168_GET_MAC_FROM_VPD is not set # CONFIG_RT8168_SET_LED_MODE is not set # CONFIG_SMMSTORE_IN_CBFS is not set -CONFIG_SPI_FLASH=y +# CONFIG_SPI_FLASH is not set # CONFIG_SPI_SDCARD is not set -CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y -# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set -# CONFIG_SPI_FLASH_NO_FAST_READ is not set -CONFIG_SPI_FLASH_ADESTO=y -CONFIG_SPI_FLASH_AMIC=y -CONFIG_SPI_FLASH_ATMEL=y -CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_STMICRO=y -# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set -# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set @@ -486,7 +471,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_VPD is not set # CONFIG_DRIVERS_GENERIC_WIFI is not set -# CONFIG_DRIVERS_AMD_PI is not set +CONFIG_DRIVERS_AMD_PI=y CONFIG_DRIVERS_ASPEED_AST2050=y CONFIG_DRIVERS_ASPEED_AST_COMMON=y # CONFIG_DRIVERS_I2C_MAX98373 is not set @@ -528,6 +513,7 @@ CONFIG_VGA=y # CONFIG_NC_FPGA_NOTIFY_CB_READY is not set # CONFIG_DRIVERS_SIL_3114 is not set # CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set +# CONFIG_MAINBOARD_HAS_SPI_TPM is not set # CONFIG_DRIVER_TI_TPS65090 is not set # CONFIG_DRIVERS_TI_TPS65913 is not set # CONFIG_DRIVERS_TI_TPS65913_RTC is not set @@ -550,7 +536,8 @@ CONFIG_USER_NO_TPM=y # # Memory initialization # -# CONFIG_STM is not set +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set # CONFIG_ACPI_SATA_GENERATOR is not set # CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set # CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set @@ -603,14 +590,15 @@ CONFIG_POST_DEVICE_NONE=y CONFIG_POST_IO_PORT=0x80 # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set CONFIG_HWBASE_DEBUG_CB=y -CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y -CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y -CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y +# CONFIG_HAVE_ACPI_RESUME is not set +# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set +# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set +# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set # CONFIG_NO_MONOTONIC_TIMER is not set CONFIG_HAVE_MONOTONIC_TIMER=y # CONFIG_TIMER_QUEUE is not set CONFIG_HAVE_OPTION_TABLE=y -CONFIG_PCI_IO_CFG_EXT=y +# CONFIG_PCI_IO_CFG_EXT is not set CONFIG_IOAPIC=y # CONFIG_USE_WATCHDOG_ON_BOOT is not set # CONFIG_GFXUMA is not set @@ -651,6 +639,7 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # Secondary Payloads # # CONFIG_COREINFO_SECONDARY_PAYLOAD is not set +# CONFIG_GRUB2_SECONDARY_PAYLOAD is not set # CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set # CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set # CONFIG_TINT_SECONDARY_PAYLOAD is not set @@ -662,8 +651,6 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # # CPU Debug Settings # -CONFIG_HAVE_DEBUG_CAR=y -# CONFIG_DEBUG_CAR is not set # # BLOB Debug Settings @@ -682,12 +669,11 @@ CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SMBUS is not set # CONFIG_DEBUG_MALLOC is not set # CONFIG_DEBUG_CONSOLE_INIT is not set -# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_TRACE is not set # CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_ADA_CODE is not set # CONFIG_HAVE_EM100_SUPPORT is not set -CONFIG_ENABLE_APIC_EXT_ID=y +# CONFIG_ENABLE_APIC_EXT_ID is not set CONFIG_WARNINGS_ARE_ERRORS=y # CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set # CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set diff --git a/config/module/coreboot/kcma_d8_2mb/target.cfg b/config/module/coreboot/kcma_d8_2mb/target.cfg index 6733c4d9..0a6977f0 100644 --- a/config/module/coreboot/kcma_d8_2mb/target.cfg +++ b/config/module/coreboot/kcma_d8_2mb/target.cfg @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-3.0-or-later -tree="fam15h_cb411" +tree="fam15h_15h" xarch="i386-elf" payload_seabios="y" payload_grub="y" diff --git a/config/module/coreboot/kgpe_d16_16mb/config/libgfxinit_txtmode b/config/module/coreboot/kgpe_d16_16mb/config/libgfxinit_txtmode index c29a71f8..c3ee5a86 100644 --- a/config/module/coreboot/kgpe_d16_16mb/config/libgfxinit_txtmode +++ b/config/module/coreboot/kgpe_d16_16mb/config/libgfxinit_txtmode @@ -25,8 +25,8 @@ CONFIG_USE_BLOBS=y # CONFIG_USE_AMD_BLOBS is not set # CONFIG_COVERAGE is not set # CONFIG_UBSAN is not set -CONFIG_NO_RELOCATABLE_RAMSTAGE=y -# CONFIG_RELOCATABLE_RAMSTAGE is not set +# CONFIG_NO_RELOCATABLE_RAMSTAGE is not set +CONFIG_RELOCATABLE_RAMSTAGE=y # CONFIG_UPDATE_IMAGE is not set # CONFIG_BOOTSPLASH_IMAGE is not set @@ -93,11 +93,7 @@ CONFIG_MAX_CPUS=32 CONFIG_CBFS_SIZE=0x1000000 CONFIG_UART_FOR_CONSOLE=0 CONFIG_MAINBOARD_VENDOR="ASUS" -CONFIG_APIC_ID_OFFSET=0x0 -CONFIG_HW_MEM_HOLE_SIZEK=0x100000 -CONFIG_MAX_PHYSICAL_CPUS=4 -CONFIG_HT_CHAIN_END_UNITID_BASE=0x20 -CONFIG_HT_CHAIN_UNITID_BASE=0x0 +CONFIG_HW_MEM_HOLE_SIZEK=0x200000 CONFIG_IRQ_SLOT_COUNT=13 CONFIG_VGA_BIOS_ID="1000,0072" CONFIG_ONBOARD_VGA_IS_PRIMARY=y @@ -110,6 +106,7 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS" CONFIG_DEVICETREE="devicetree.cb" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 # CONFIG_BOARD_ASUS_AM1I_A is not set +# CONFIG_BOARD_ASUS_CROSSHAIR_V_FORMULA_Z is not set # CONFIG_BOARD_ASUS_F2A85_M is not set # CONFIG_BOARD_ASUS_F2A85_M_PRO is not set # CONFIG_BOARD_ASUS_F2A85_M_LE is not set @@ -138,20 +135,19 @@ CONFIG_BOARD_ASUS_KGPE_D16=y # CONFIG_BOARD_ASUS_P8H61_M_LX is not set # CONFIG_BOARD_ASUS_P8H61_M_PRO is not set # CONFIG_BOARD_ASUS_P8Z77_M_PRO is not set +# CONFIG_BOARD_ASUS_RAPTOR_KCMA_D8 is not set +# CONFIG_BOARD_ASUS_RAPTOR_KGPE_D16 is not set +# CONFIG_BOARD_ASUS_SABERTOOTH_990FX_R2 is not set +CONFIG_HPET_ADDRESS=0xfed00000 CONFIG_POST_IO=y -CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kgpe-d16/bootblock.c" -CONFIG_DCACHE_RAM_BASE=0xc2000 -CONFIG_DCACHE_RAM_SIZE=0x1e000 -CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f -CONFIG_MAX_REBOOT_CNT=10 +CONFIG_DCACHE_RAM_BASE=0x30000 +CONFIG_DCACHE_RAM_SIZE=0x10000 +CONFIG_MAX_REBOOT_CNT=3 CONFIG_OVERRIDE_DEVICETREE="" -CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_FMDFILE="" # CONFIG_VBOOT is not set -CONFIG_MMCONF_BASE_ADDRESS=0xc0000000 +CONFIG_MMCONF_BASE_ADDRESS=0xF8000000 CONFIG_POST_DEVICE=y -CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y -CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_DRIVERS_UART_8250IO=y CONFIG_DIMM_MAX=4 @@ -160,8 +156,6 @@ CONFIG_TTYS0_LCS=3 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KGPE-D16" CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 # CONFIG_USBDEBUG is not set -CONFIG_IPMI_KCS_REGISTER_SPACING=1 -CONFIG_IPMI_FRU_SINGLE_RW_SZ=16 CONFIG_MAINBOARD_VERSION="1.0" # CONFIG_DRIVERS_PS2_KEYBOARD is not set CONFIG_PCIEXP_L1_SUB_STATE=y @@ -190,7 +184,6 @@ CONFIG_COREBOOT_ROMSIZE_KB=16384 CONFIG_ROM_SIZE=0x1000000 CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y -CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y # CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set CONFIG_POWER_STATE_ON_AFTER_FAILURE=y # CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set @@ -210,9 +203,9 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 # CONFIG_HAVE_BOOTBLOCK=y CONFIG_CPU_ADDR_BITS=48 -CONFIG_MMCONF_BUS_NUMBER=256 +CONFIG_MMCONF_BUS_NUMBER=64 +# CONFIG_S3_VGA_ROM_RUN is not set CONFIG_EHCI_BAR=0xfef00000 -CONFIG_SMM_MODULE_STACK_SIZE=0x400 CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d" # CONFIG_SOC_CAVIUM_CN81XX is not set CONFIG_ARCH_ARMV8_EXTENSION=0 @@ -226,7 +219,7 @@ CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_PCIEXP_CLK_PM=y CONFIG_TTYS0_BASE=0x3f8 -CONFIG_HPET_MIN_TICKS=0x14 +CONFIG_HPET_MIN_TICKS=0x37EE CONFIG_UART_PCI_ADDR=0x0 # CONFIG_SOC_MEDIATEK_MT8173 is not set # CONFIG_SOC_MEDIATEK_MT8183 is not set @@ -247,102 +240,99 @@ CONFIG_UART_PCI_ADDR=0x0 # # CPU # -CONFIG_CPU_SOCKET_TYPE=0x15 -# CONFIG_EXT_RT_TBL_SUPPORT is not set CONFIG_CBB=0x0 CONFIG_CDB=0x18 CONFIG_XIP_ROM_SIZE=0x80000 -CONFIG_CPU_AMD_SOCKET_G34_NON_AGESA=y -CONFIG_CPU_AMD_MODEL_10XXX=y -CONFIG_USE_LARGE_DCACHE=y -CONFIG_NUM_IPI_STARTS=1 -CONFIG_DCACHE_BSP_TOP_STACK_SIZE=0x4000 -CONFIG_DCACHE_BSP_TOP_STACK_SLUSH=0x4000 -CONFIG_DCACHE_AP_STACK_SIZE=0x500 -CONFIG_SET_FIDVID=y -CONFIG_LIFT_BSP_APIC_ID=y -CONFIG_SET_FIDVID_DEBUG=y -CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST=y -# CONFIG_SET_FIDVID_CORE0_ONLY is not set -CONFIG_SET_FIDVID_CORE_RANGE=0 +CONFIG_NUM_IPI_STARTS=2 CONFIG_UDELAY_LAPIC_FIXED_FSB=200 -# CONFIG_CPU_AMD_AGESA is not set +CONFIG_CPU_AMD_AGESA=y +CONFIG_AGESA_LEGACY=y +CONFIG_AGESA_LEGACY_WRAPPER=y +# CONFIG_AGESA_NO_LEGACY is not set +# CONFIG_ENABLE_MRC_CACHE is not set +CONFIG_S3_DATA_POS=0xFFFF0000 +CONFIG_S3_DATA_SIZE=32768 +CONFIG_CPU_AMD_AGESA_FAMILY15=y +CONFIG_CPU_AMD_SOCKET_G34=y +# CONFIG_CPU_AMD_SOCKET_C32 is not set +# CONFIG_CPU_AMD_SOCKET_AM3R2 is not set +# CONFIG_ENABLE_AGESA_DEBUGGER is not set +# CONFIG_REMOVE_MICROCODE is not set # CONFIG_CPU_AMD_PI is not set # CONFIG_CPU_ARMLTD_CORTEX_A9 is not set -CONFIG_SSE2=y +# CONFIG_SSE2 is not set # CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set # CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set # CONFIG_CPU_TI_AM335X is not set -CONFIG_PARALLEL_CPU_INIT=y +# CONFIG_PARALLEL_CPU_INIT is not set # CONFIG_PARALLEL_MP is not set CONFIG_UDELAY_LAPIC=y -# CONFIG_LAPIC_MONOTONIC_TIMER is not set +CONFIG_LAPIC_MONOTONIC_TIMER=y # CONFIG_UDELAY_TSC is not set +CONFIG_UNKNOWN_TSC_RATE=y CONFIG_TSC_SYNC_LFENCE=y # CONFIG_TSC_SYNC_MFENCE is not set -# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set +CONFIG_NO_FIXED_XIP_ROM_SIZE=y CONFIG_LOGICAL_CPUS=y # CONFIG_HAVE_SMI_HANDLER is not set # CONFIG_NO_SMM is not set -# CONFIG_SMM_ASEG is not set -CONFIG_SMM_TSEG=y -CONFIG_SMM_MODULE_HEAP_SIZE=0x4000 -CONFIG_SMM_STUB_STACK_SIZE=0x400 +CONFIG_SMM_ASEG=y # CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set # CONFIG_SERIALIZED_SMM_INITIALIZATION is not set CONFIG_X86_AMD_FIXED_MTRRS=y # CONFIG_X86_AMD_INIT_SIPI is not set # CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set # CONFIG_SOC_SETS_MSRS is not set -CONFIG_CAR_GLOBAL_MIGRATION=y +# CONFIG_CAR_GLOBAL_MIGRATION is not set CONFIG_SMP=y -CONFIG_SSE=y -CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +# CONFIG_SUPPORT_CPU_UCODE_IN_CBFS is not set # CONFIG_USES_MICROCODE_HEADER_FILES is not set -CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y -CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y -# CONFIG_CPU_MICROCODE_CBFS_NONE is not set -CONFIG_CPU_MICROCODE_MULTIPLE_FILES=y # # Northbridge # -# CONFIG_NORTHBRIDGE_AMD_AGESA is not set -CONFIG_NORTHBRIDGE_AMD_AMDFAM10=y -CONFIG_AGP_APERTURE_SIZE=0x4000000 -CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/amd/amdfam10/bootblock.c" -CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y -# CONFIG_HT_CHAIN_DISTRIBUTE is not set -# CONFIG_DIMM_DDR2 is not set -CONFIG_DIMM_DDR3=y -CONFIG_DIMM_REGISTERED=y -CONFIG_DIMM_VOLTAGE_SET_SUPPORT=y -# CONFIG_SVI_HIGH_FREQ is not set - -# -# HyperTransport setup -# -# CONFIG_LIMIT_HT_DOWN_WIDTH_8 is not set -CONFIG_LIMIT_HT_DOWN_WIDTH_16=y -# CONFIG_LIMIT_HT_UP_WIDTH_8 is not set -CONFIG_LIMIT_HT_UP_WIDTH_16=y +CONFIG_NORTHBRIDGE_AMD_AGESA=y +# CONFIG_CONSOLE_VGA_MULTI is not set +CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY15=y +# CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC is not set +CONFIG_AMD_NB_CIMX=y +CONFIG_NORTHBRIDGE_AMD_CIMX_RD890=y +# CONFIG_ENABLE_NB_CIMX_DEBUGGER is not set +CONFIG_NORTHBRIDGE_AMD_CIMX_RD890_IOMMU=y +# CONFIG_RD890_PCIE_ASPM_DISABLED is not set +# CONFIG_RD890_PCIE_ASPM_L0S is not set +CONFIG_RD890_PCIE_ASPM_L1=y +# CONFIG_RD890_PCIE_ASPM_L0S_AND_L1 is not set +# CONFIG_RD890_PCIE_ASPM_L0S_DOWNSTREAM is not set +# CONFIG_RD890_PCIE_ASPM_L0S_DOWNSTREAM_AND_L1 is not set +CONFIG_RD890_PCIE_ASPM_MODE=0x02 +# CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH_20MA is not set +CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH_22MA=y +# CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH_24MA is not set +# CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH_26MA is not set +CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH=0x02 # CONFIG_NORTHBRIDGE_AMD_PI is not set # # Southbridge # -CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y -CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c" -# CONFIG_AMD_SB_CIMX is not set +CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/cimx/sb700/bootblock.c" +CONFIG_AMD_SB_CIMX=y +CONFIG_SOUTHBRIDGE_AMD_CIMX_SB700=y +# CONFIG_ENABLE_SB_CIMX_DEBUGGER is not set +# CONFIG_SB700_SATA_NATIVE_IDE is not set +# CONFIG_SB700_SATA_RAID is not set +CONFIG_SB700_SATA_AHCI=y +# CONFIG_SB700_SATA_LEGACY_IDE is not set +# CONFIG_SB700_SATA_IDE_TO_AHCI is not set +# CONFIG_SB700_SATA_AHCI_AMD is not set +# CONFIG_SB700_SATA_IDE_TO_AHCI_AMD is not set +CONFIG_SB700_SATA_MODE=0x02 +CONFIG_SB700_SATA_HIDE_UNUSED_PORTS=y +# CONFIG_PCIB_ENABLE is not set +CONFIG_ACPI_SCI_IRQ=0x9 # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set -CONFIG_SOUTHBRIDGE_AMD_SB700=y -CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y -CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y -# CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT is not set -CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA=y -CONFIG_SOUTHBRIDGE_AMD_SR5650=y -CONFIG_EXT_CONF_SUPPORT=y # CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set # CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set # CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set @@ -370,6 +360,13 @@ CONFIG_SUPERIO_WINBOND_W83667HG_A=y # Embedded Controllers # # CONFIG_EC_GOOGLE_WILCO is not set + +# +# AMD Platform Initialization +# +# CONFIG_CPU_AMD_AGESA_BINARY_PI is not set +CONFIG_CPU_AMD_AGESA_OPENSOURCE=y +# CONFIG_AGESA_EXTRA_TIMESTAMPS is not set # CONFIG_CAVIUM_BDK is not set # CONFIG_MAINBOARD_HAS_CHROMEOS is not set # CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set @@ -394,15 +391,13 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y # CONFIG_SIPI_VECTOR_IN_ROM is not set CONFIG_RAMBASE=0xe00000 CONFIG_RAMTOP=0x1000000 -# CONFIG_CBMEM_TOP_BACKUP is not set +CONFIG_CBMEM_TOP_BACKUP=y CONFIG_PC80_SYSTEM=y # CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set -CONFIG_HAVE_CMOS_DEFAULT=y -CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +# CONFIG_HAVE_CMOS_DEFAULT is not set CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y # CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set # CONFIG_HPET_ADDRESS_OVERRIDE is not set -CONFIG_HPET_ADDRESS=0xfed00000 CONFIG_ID_SECTION_OFFSET=0x80 # CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set # CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set @@ -414,6 +409,8 @@ CONFIG_ACPI_HAVE_PCAT_8259=y CONFIG_COLLECT_TIMESTAMPS_TSC=y # CONFIG_PAGING_IN_CACHE_AS_RAM is not set # CONFIG_IDT_IN_EVERY_STAGE is not set +CONFIG_HAVE_CF9_RESET=y +CONFIG_HAVE_CF9_RESET_PREPARE=y # CONFIG_PIRQ_ROUTE is not set # @@ -430,7 +427,7 @@ CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y # Display # CONFIG_VGA_TEXT_FRAMEBUFFER=y -CONFIG_SMBUS_HAS_AUX_CHANNELS=y +# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set CONFIG_PCI=y # CONFIG_NO_MMCONF_SUPPORT is not set CONFIG_MMCONF_SUPPORT=y @@ -452,28 +449,13 @@ CONFIG_VGA_BIOS_DGPU_ID="1000,3050" CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_MAINBOARD_HAS_CRB_TPM is not set # CONFIG_GIC is not set -CONFIG_IPMI_KCS=y -CONFIG_IPMI_KCS_TIMEOUT_MS=5000 +# CONFIG_IPMI_KCS is not set # CONFIG_DRIVERS_LENOVO_WACOM is not set # CONFIG_RT8168_GET_MAC_FROM_VPD is not set # CONFIG_RT8168_SET_LED_MODE is not set # CONFIG_SMMSTORE_IN_CBFS is not set -CONFIG_SPI_FLASH=y +# CONFIG_SPI_FLASH is not set # CONFIG_SPI_SDCARD is not set -CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y -# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set -# CONFIG_SPI_FLASH_NO_FAST_READ is not set -CONFIG_SPI_FLASH_ADESTO=y -CONFIG_SPI_FLASH_AMIC=y -CONFIG_SPI_FLASH_ATMEL=y -CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_STMICRO=y -# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set -# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set @@ -490,7 +472,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_VPD is not set # CONFIG_DRIVERS_GENERIC_WIFI is not set -# CONFIG_DRIVERS_AMD_PI is not set +CONFIG_DRIVERS_AMD_PI=y CONFIG_DRIVERS_ASPEED_AST2050=y CONFIG_DRIVERS_ASPEED_AST_COMMON=y # CONFIG_DRIVERS_I2C_MAX98373 is not set @@ -533,6 +515,7 @@ CONFIG_VGA=y # CONFIG_NC_FPGA_NOTIFY_CB_READY is not set # CONFIG_DRIVERS_SIL_3114 is not set # CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set +# CONFIG_MAINBOARD_HAS_SPI_TPM is not set # CONFIG_DRIVER_TI_TPS65090 is not set # CONFIG_DRIVERS_TI_TPS65913 is not set # CONFIG_DRIVERS_TI_TPS65913_RTC is not set @@ -558,7 +541,8 @@ CONFIG_USER_NO_TPM=y # # Memory initialization # -# CONFIG_STM is not set +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set # CONFIG_ACPI_SATA_GENERATOR is not set # CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set # CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set @@ -611,14 +595,15 @@ CONFIG_POST_DEVICE_NONE=y CONFIG_POST_IO_PORT=0x80 # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set CONFIG_HWBASE_DEBUG_CB=y -CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y -CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y -CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y +# CONFIG_HAVE_ACPI_RESUME is not set +# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set +# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set +# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set # CONFIG_NO_MONOTONIC_TIMER is not set CONFIG_HAVE_MONOTONIC_TIMER=y # CONFIG_TIMER_QUEUE is not set CONFIG_HAVE_OPTION_TABLE=y -CONFIG_PCI_IO_CFG_EXT=y +# CONFIG_PCI_IO_CFG_EXT is not set CONFIG_IOAPIC=y # CONFIG_USE_WATCHDOG_ON_BOOT is not set # CONFIG_GFXUMA is not set @@ -659,6 +644,7 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # Secondary Payloads # # CONFIG_COREINFO_SECONDARY_PAYLOAD is not set +# CONFIG_GRUB2_SECONDARY_PAYLOAD is not set # CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set # CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set # CONFIG_TINT_SECONDARY_PAYLOAD is not set @@ -670,8 +656,6 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # # CPU Debug Settings # -CONFIG_HAVE_DEBUG_CAR=y -# CONFIG_DEBUG_CAR is not set # # BLOB Debug Settings @@ -690,13 +674,11 @@ CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SMBUS is not set # CONFIG_DEBUG_MALLOC is not set # CONFIG_DEBUG_CONSOLE_INIT is not set -# CONFIG_DEBUG_SPI_FLASH is not set -# CONFIG_DEBUG_IPMI is not set # CONFIG_TRACE is not set # CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_ADA_CODE is not set # CONFIG_HAVE_EM100_SUPPORT is not set -CONFIG_ENABLE_APIC_EXT_ID=y +# CONFIG_ENABLE_APIC_EXT_ID is not set CONFIG_WARNINGS_ARE_ERRORS=y # CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set # CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set diff --git a/config/module/coreboot/kgpe_d16_16mb/target.cfg b/config/module/coreboot/kgpe_d16_16mb/target.cfg index 6733c4d9..0a6977f0 100644 --- a/config/module/coreboot/kgpe_d16_16mb/target.cfg +++ b/config/module/coreboot/kgpe_d16_16mb/target.cfg @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-3.0-or-later -tree="fam15h_cb411" +tree="fam15h_15h" xarch="i386-elf" payload_seabios="y" payload_grub="y" diff --git a/config/module/coreboot/kgpe_d16_2mb/config/libgfxinit_txtmode b/config/module/coreboot/kgpe_d16_2mb/config/libgfxinit_txtmode index 060966a5..6032d24f 100644 --- a/config/module/coreboot/kgpe_d16_2mb/config/libgfxinit_txtmode +++ b/config/module/coreboot/kgpe_d16_2mb/config/libgfxinit_txtmode @@ -25,8 +25,8 @@ CONFIG_USE_BLOBS=y # CONFIG_USE_AMD_BLOBS is not set # CONFIG_COVERAGE is not set # CONFIG_UBSAN is not set -CONFIG_NO_RELOCATABLE_RAMSTAGE=y -# CONFIG_RELOCATABLE_RAMSTAGE is not set +# CONFIG_NO_RELOCATABLE_RAMSTAGE is not set +CONFIG_RELOCATABLE_RAMSTAGE=y # CONFIG_UPDATE_IMAGE is not set # CONFIG_BOOTSPLASH_IMAGE is not set @@ -93,11 +93,7 @@ CONFIG_MAX_CPUS=32 CONFIG_CBFS_SIZE=0x200000 CONFIG_UART_FOR_CONSOLE=0 CONFIG_MAINBOARD_VENDOR="ASUS" -CONFIG_APIC_ID_OFFSET=0x0 -CONFIG_HW_MEM_HOLE_SIZEK=0x100000 -CONFIG_MAX_PHYSICAL_CPUS=4 -CONFIG_HT_CHAIN_END_UNITID_BASE=0x20 -CONFIG_HT_CHAIN_UNITID_BASE=0x0 +CONFIG_HW_MEM_HOLE_SIZEK=0x200000 CONFIG_IRQ_SLOT_COUNT=13 CONFIG_VGA_BIOS_ID="1000,0072" CONFIG_ONBOARD_VGA_IS_PRIMARY=y @@ -110,6 +106,7 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS" CONFIG_DEVICETREE="devicetree.cb" CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00 # CONFIG_BOARD_ASUS_AM1I_A is not set +# CONFIG_BOARD_ASUS_CROSSHAIR_V_FORMULA_Z is not set # CONFIG_BOARD_ASUS_F2A85_M is not set # CONFIG_BOARD_ASUS_F2A85_M_PRO is not set # CONFIG_BOARD_ASUS_F2A85_M_LE is not set @@ -138,20 +135,19 @@ CONFIG_BOARD_ASUS_KGPE_D16=y # CONFIG_BOARD_ASUS_P8H61_M_LX is not set # CONFIG_BOARD_ASUS_P8H61_M_PRO is not set # CONFIG_BOARD_ASUS_P8Z77_M_PRO is not set +# CONFIG_BOARD_ASUS_RAPTOR_KCMA_D8 is not set +# CONFIG_BOARD_ASUS_RAPTOR_KGPE_D16 is not set +# CONFIG_BOARD_ASUS_SABERTOOTH_990FX_R2 is not set +CONFIG_HPET_ADDRESS=0xfed00000 CONFIG_POST_IO=y -CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kgpe-d16/bootblock.c" -CONFIG_DCACHE_RAM_BASE=0xc2000 -CONFIG_DCACHE_RAM_SIZE=0x1e000 -CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f -CONFIG_MAX_REBOOT_CNT=10 +CONFIG_DCACHE_RAM_BASE=0x30000 +CONFIG_DCACHE_RAM_SIZE=0x10000 +CONFIG_MAX_REBOOT_CNT=3 CONFIG_OVERRIDE_DEVICETREE="" -CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_FMDFILE="" # CONFIG_VBOOT is not set -CONFIG_MMCONF_BASE_ADDRESS=0xc0000000 +CONFIG_MMCONF_BASE_ADDRESS=0xF8000000 CONFIG_POST_DEVICE=y -CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y -CONFIG_SPI_FLASH_WINBOND=y # CONFIG_DRIVERS_INTEL_WIFI is not set CONFIG_DRIVERS_UART_8250IO=y CONFIG_DIMM_MAX=4 @@ -160,8 +156,6 @@ CONFIG_TTYS0_LCS=3 CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KGPE-D16" CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7 # CONFIG_USBDEBUG is not set -CONFIG_IPMI_KCS_REGISTER_SPACING=1 -CONFIG_IPMI_FRU_SINGLE_RW_SZ=16 CONFIG_MAINBOARD_VERSION="1.0" # CONFIG_DRIVERS_PS2_KEYBOARD is not set CONFIG_PCIEXP_L1_SUB_STATE=y @@ -190,7 +184,6 @@ CONFIG_COREBOOT_ROMSIZE_KB=2048 CONFIG_ROM_SIZE=0x200000 CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y -CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y # CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set CONFIG_POWER_STATE_ON_AFTER_FAILURE=y # CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set @@ -210,9 +203,9 @@ CONFIG_MAINBOARD_POWER_FAILURE_STATE=1 # CONFIG_HAVE_BOOTBLOCK=y CONFIG_CPU_ADDR_BITS=48 -CONFIG_MMCONF_BUS_NUMBER=256 +CONFIG_MMCONF_BUS_NUMBER=64 +# CONFIG_S3_VGA_ROM_RUN is not set CONFIG_EHCI_BAR=0xfef00000 -CONFIG_SMM_MODULE_STACK_SIZE=0x400 CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d" # CONFIG_SOC_CAVIUM_CN81XX is not set CONFIG_ARCH_ARMV8_EXTENSION=0 @@ -226,7 +219,7 @@ CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_PCIEXP_CLK_PM=y CONFIG_TTYS0_BASE=0x3f8 -CONFIG_HPET_MIN_TICKS=0x14 +CONFIG_HPET_MIN_TICKS=0x37EE CONFIG_UART_PCI_ADDR=0x0 # CONFIG_SOC_MEDIATEK_MT8173 is not set # CONFIG_SOC_MEDIATEK_MT8183 is not set @@ -247,102 +240,99 @@ CONFIG_UART_PCI_ADDR=0x0 # # CPU # -CONFIG_CPU_SOCKET_TYPE=0x15 -# CONFIG_EXT_RT_TBL_SUPPORT is not set CONFIG_CBB=0x0 CONFIG_CDB=0x18 CONFIG_XIP_ROM_SIZE=0x80000 -CONFIG_CPU_AMD_SOCKET_G34_NON_AGESA=y -CONFIG_CPU_AMD_MODEL_10XXX=y -CONFIG_USE_LARGE_DCACHE=y -CONFIG_NUM_IPI_STARTS=1 -CONFIG_DCACHE_BSP_TOP_STACK_SIZE=0x4000 -CONFIG_DCACHE_BSP_TOP_STACK_SLUSH=0x4000 -CONFIG_DCACHE_AP_STACK_SIZE=0x500 -CONFIG_SET_FIDVID=y -CONFIG_LIFT_BSP_APIC_ID=y -CONFIG_SET_FIDVID_DEBUG=y -CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST=y -# CONFIG_SET_FIDVID_CORE0_ONLY is not set -CONFIG_SET_FIDVID_CORE_RANGE=0 +CONFIG_NUM_IPI_STARTS=2 CONFIG_UDELAY_LAPIC_FIXED_FSB=200 -# CONFIG_CPU_AMD_AGESA is not set +CONFIG_CPU_AMD_AGESA=y +CONFIG_AGESA_LEGACY=y +CONFIG_AGESA_LEGACY_WRAPPER=y +# CONFIG_AGESA_NO_LEGACY is not set +# CONFIG_ENABLE_MRC_CACHE is not set +CONFIG_S3_DATA_POS=0xFFFF0000 +CONFIG_S3_DATA_SIZE=32768 +CONFIG_CPU_AMD_AGESA_FAMILY15=y +CONFIG_CPU_AMD_SOCKET_G34=y +# CONFIG_CPU_AMD_SOCKET_C32 is not set +# CONFIG_CPU_AMD_SOCKET_AM3R2 is not set +# CONFIG_ENABLE_AGESA_DEBUGGER is not set +# CONFIG_REMOVE_MICROCODE is not set # CONFIG_CPU_AMD_PI is not set # CONFIG_CPU_ARMLTD_CORTEX_A9 is not set -CONFIG_SSE2=y +# CONFIG_SSE2 is not set # CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set # CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set # CONFIG_CPU_TI_AM335X is not set -CONFIG_PARALLEL_CPU_INIT=y +# CONFIG_PARALLEL_CPU_INIT is not set # CONFIG_PARALLEL_MP is not set CONFIG_UDELAY_LAPIC=y -# CONFIG_LAPIC_MONOTONIC_TIMER is not set +CONFIG_LAPIC_MONOTONIC_TIMER=y # CONFIG_UDELAY_TSC is not set +CONFIG_UNKNOWN_TSC_RATE=y CONFIG_TSC_SYNC_LFENCE=y # CONFIG_TSC_SYNC_MFENCE is not set -# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set +CONFIG_NO_FIXED_XIP_ROM_SIZE=y CONFIG_LOGICAL_CPUS=y # CONFIG_HAVE_SMI_HANDLER is not set # CONFIG_NO_SMM is not set -# CONFIG_SMM_ASEG is not set -CONFIG_SMM_TSEG=y -CONFIG_SMM_MODULE_HEAP_SIZE=0x4000 -CONFIG_SMM_STUB_STACK_SIZE=0x400 +CONFIG_SMM_ASEG=y # CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set # CONFIG_SERIALIZED_SMM_INITIALIZATION is not set CONFIG_X86_AMD_FIXED_MTRRS=y # CONFIG_X86_AMD_INIT_SIPI is not set # CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set # CONFIG_SOC_SETS_MSRS is not set -CONFIG_CAR_GLOBAL_MIGRATION=y +# CONFIG_CAR_GLOBAL_MIGRATION is not set CONFIG_SMP=y -CONFIG_SSE=y -CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y +# CONFIG_SUPPORT_CPU_UCODE_IN_CBFS is not set # CONFIG_USES_MICROCODE_HEADER_FILES is not set -CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y -CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y -# CONFIG_CPU_MICROCODE_CBFS_NONE is not set -CONFIG_CPU_MICROCODE_MULTIPLE_FILES=y # # Northbridge # -# CONFIG_NORTHBRIDGE_AMD_AGESA is not set -CONFIG_NORTHBRIDGE_AMD_AMDFAM10=y -CONFIG_AGP_APERTURE_SIZE=0x4000000 -CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/amd/amdfam10/bootblock.c" -CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y -# CONFIG_HT_CHAIN_DISTRIBUTE is not set -# CONFIG_DIMM_DDR2 is not set -CONFIG_DIMM_DDR3=y -CONFIG_DIMM_REGISTERED=y -CONFIG_DIMM_VOLTAGE_SET_SUPPORT=y -# CONFIG_SVI_HIGH_FREQ is not set - -# -# HyperTransport setup -# -# CONFIG_LIMIT_HT_DOWN_WIDTH_8 is not set -CONFIG_LIMIT_HT_DOWN_WIDTH_16=y -# CONFIG_LIMIT_HT_UP_WIDTH_8 is not set -CONFIG_LIMIT_HT_UP_WIDTH_16=y +CONFIG_NORTHBRIDGE_AMD_AGESA=y +# CONFIG_CONSOLE_VGA_MULTI is not set +CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY15=y +# CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC is not set +CONFIG_AMD_NB_CIMX=y +CONFIG_NORTHBRIDGE_AMD_CIMX_RD890=y +# CONFIG_ENABLE_NB_CIMX_DEBUGGER is not set +CONFIG_NORTHBRIDGE_AMD_CIMX_RD890_IOMMU=y +# CONFIG_RD890_PCIE_ASPM_DISABLED is not set +# CONFIG_RD890_PCIE_ASPM_L0S is not set +CONFIG_RD890_PCIE_ASPM_L1=y +# CONFIG_RD890_PCIE_ASPM_L0S_AND_L1 is not set +# CONFIG_RD890_PCIE_ASPM_L0S_DOWNSTREAM is not set +# CONFIG_RD890_PCIE_ASPM_L0S_DOWNSTREAM_AND_L1 is not set +CONFIG_RD890_PCIE_ASPM_MODE=0x02 +# CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH_20MA is not set +CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH_22MA=y +# CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH_24MA is not set +# CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH_26MA is not set +CONFIG_RD890_PCIE_TX_DRIVE_STRENGTH=0x02 # CONFIG_NORTHBRIDGE_AMD_PI is not set # # Southbridge # -CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y -CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c" -# CONFIG_AMD_SB_CIMX is not set +CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/cimx/sb700/bootblock.c" +CONFIG_AMD_SB_CIMX=y +CONFIG_SOUTHBRIDGE_AMD_CIMX_SB700=y +# CONFIG_ENABLE_SB_CIMX_DEBUGGER is not set +# CONFIG_SB700_SATA_NATIVE_IDE is not set +# CONFIG_SB700_SATA_RAID is not set +CONFIG_SB700_SATA_AHCI=y +# CONFIG_SB700_SATA_LEGACY_IDE is not set +# CONFIG_SB700_SATA_IDE_TO_AHCI is not set +# CONFIG_SB700_SATA_AHCI_AMD is not set +# CONFIG_SB700_SATA_IDE_TO_AHCI_AMD is not set +CONFIG_SB700_SATA_MODE=0x02 +CONFIG_SB700_SATA_HIDE_UNUSED_PORTS=y +# CONFIG_PCIB_ENABLE is not set +CONFIG_ACPI_SCI_IRQ=0x9 # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set # CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set -CONFIG_SOUTHBRIDGE_AMD_SB700=y -CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y -CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y -# CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT is not set -CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA=y -CONFIG_SOUTHBRIDGE_AMD_SR5650=y -CONFIG_EXT_CONF_SUPPORT=y # CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET is not set # CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC is not set # CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE is not set @@ -370,6 +360,13 @@ CONFIG_SUPERIO_WINBOND_W83667HG_A=y # Embedded Controllers # # CONFIG_EC_GOOGLE_WILCO is not set + +# +# AMD Platform Initialization +# +# CONFIG_CPU_AMD_AGESA_BINARY_PI is not set +CONFIG_CPU_AMD_AGESA_OPENSOURCE=y +# CONFIG_AGESA_EXTRA_TIMESTAMPS is not set # CONFIG_CAVIUM_BDK is not set # CONFIG_MAINBOARD_HAS_CHROMEOS is not set # CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set @@ -394,15 +391,13 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y # CONFIG_SIPI_VECTOR_IN_ROM is not set CONFIG_RAMBASE=0xe00000 CONFIG_RAMTOP=0x1000000 -# CONFIG_CBMEM_TOP_BACKUP is not set +CONFIG_CBMEM_TOP_BACKUP=y CONFIG_PC80_SYSTEM=y # CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set -CONFIG_HAVE_CMOS_DEFAULT=y -CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default" +# CONFIG_HAVE_CMOS_DEFAULT is not set CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y # CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set # CONFIG_HPET_ADDRESS_OVERRIDE is not set -CONFIG_HPET_ADDRESS=0xfed00000 CONFIG_ID_SECTION_OFFSET=0x80 # CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set # CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set @@ -414,6 +409,8 @@ CONFIG_ACPI_HAVE_PCAT_8259=y CONFIG_COLLECT_TIMESTAMPS_TSC=y # CONFIG_PAGING_IN_CACHE_AS_RAM is not set # CONFIG_IDT_IN_EVERY_STAGE is not set +CONFIG_HAVE_CF9_RESET=y +CONFIG_HAVE_CF9_RESET_PREPARE=y # CONFIG_PIRQ_ROUTE is not set # @@ -430,7 +427,7 @@ CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y # Display # CONFIG_VGA_TEXT_FRAMEBUFFER=y -CONFIG_SMBUS_HAS_AUX_CHANNELS=y +# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set CONFIG_PCI=y # CONFIG_NO_MMCONF_SUPPORT is not set CONFIG_MMCONF_SUPPORT=y @@ -452,28 +449,13 @@ CONFIG_VGA_BIOS_DGPU_ID="1000,3050" CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_MAINBOARD_HAS_CRB_TPM is not set # CONFIG_GIC is not set -CONFIG_IPMI_KCS=y -CONFIG_IPMI_KCS_TIMEOUT_MS=5000 +# CONFIG_IPMI_KCS is not set # CONFIG_DRIVERS_LENOVO_WACOM is not set # CONFIG_RT8168_GET_MAC_FROM_VPD is not set # CONFIG_RT8168_SET_LED_MODE is not set # CONFIG_SMMSTORE_IN_CBFS is not set -CONFIG_SPI_FLASH=y +# CONFIG_SPI_FLASH is not set # CONFIG_SPI_SDCARD is not set -CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y -# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set -# CONFIG_SPI_FLASH_NO_FAST_READ is not set -CONFIG_SPI_FLASH_ADESTO=y -CONFIG_SPI_FLASH_AMIC=y -CONFIG_SPI_FLASH_ATMEL=y -CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_STMICRO=y -# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set -# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set # CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set CONFIG_DRIVERS_UART=y # CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set @@ -490,7 +472,7 @@ CONFIG_HAVE_USBDEBUG=y CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_VPD is not set # CONFIG_DRIVERS_GENERIC_WIFI is not set -# CONFIG_DRIVERS_AMD_PI is not set +CONFIG_DRIVERS_AMD_PI=y CONFIG_DRIVERS_ASPEED_AST2050=y CONFIG_DRIVERS_ASPEED_AST_COMMON=y # CONFIG_DRIVERS_I2C_MAX98373 is not set @@ -533,6 +515,7 @@ CONFIG_VGA=y # CONFIG_NC_FPGA_NOTIFY_CB_READY is not set # CONFIG_DRIVERS_SIL_3114 is not set # CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set +# CONFIG_MAINBOARD_HAS_SPI_TPM is not set # CONFIG_DRIVER_TI_TPS65090 is not set # CONFIG_DRIVERS_TI_TPS65913 is not set # CONFIG_DRIVERS_TI_TPS65913_RTC is not set @@ -558,7 +541,8 @@ CONFIG_USER_NO_TPM=y # # Memory initialization # -# CONFIG_STM is not set +CONFIG_PLATFORM_HAS_DRAM_CLEAR=y +# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set # CONFIG_ACPI_SATA_GENERATOR is not set # CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set # CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set @@ -611,14 +595,15 @@ CONFIG_POST_DEVICE_NONE=y CONFIG_POST_IO_PORT=0x80 # CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set CONFIG_HWBASE_DEBUG_CB=y -CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y -CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y -CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y +# CONFIG_HAVE_ACPI_RESUME is not set +# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set +# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set +# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set # CONFIG_NO_MONOTONIC_TIMER is not set CONFIG_HAVE_MONOTONIC_TIMER=y # CONFIG_TIMER_QUEUE is not set CONFIG_HAVE_OPTION_TABLE=y -CONFIG_PCI_IO_CFG_EXT=y +# CONFIG_PCI_IO_CFG_EXT is not set CONFIG_IOAPIC=y # CONFIG_USE_WATCHDOG_ON_BOOT is not set # CONFIG_GFXUMA is not set @@ -659,6 +644,7 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # Secondary Payloads # # CONFIG_COREINFO_SECONDARY_PAYLOAD is not set +# CONFIG_GRUB2_SECONDARY_PAYLOAD is not set # CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set # CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set # CONFIG_TINT_SECONDARY_PAYLOAD is not set @@ -670,8 +656,6 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # # CPU Debug Settings # -CONFIG_HAVE_DEBUG_CAR=y -# CONFIG_DEBUG_CAR is not set # # BLOB Debug Settings @@ -690,13 +674,11 @@ CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SMBUS is not set # CONFIG_DEBUG_MALLOC is not set # CONFIG_DEBUG_CONSOLE_INIT is not set -# CONFIG_DEBUG_SPI_FLASH is not set -# CONFIG_DEBUG_IPMI is not set # CONFIG_TRACE is not set # CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_ADA_CODE is not set # CONFIG_HAVE_EM100_SUPPORT is not set -CONFIG_ENABLE_APIC_EXT_ID=y +# CONFIG_ENABLE_APIC_EXT_ID is not set CONFIG_WARNINGS_ARE_ERRORS=y # CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set # CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set diff --git a/config/module/coreboot/kgpe_d16_2mb/target.cfg b/config/module/coreboot/kgpe_d16_2mb/target.cfg index 6733c4d9..0a6977f0 100644 --- a/config/module/coreboot/kgpe_d16_2mb/target.cfg +++ b/config/module/coreboot/kgpe_d16_2mb/target.cfg @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-3.0-or-later -tree="fam15h_cb411" +tree="fam15h_15h" xarch="i386-elf" payload_seabios="y" payload_grub="y" |