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authorLeah Rowe <leah@libreboot.org>2023-11-05 12:58:54 +0000
committerLeah Rowe <leah@libreboot.org>2023-11-05 15:41:32 +0000
commit72e7d090c9deeba6a8ce27aa4c2e96246ad350f6 (patch)
tree75674055a9b667ee49bcb6fd6e54591d94283fb9 /config/ifd/hp_sandybridge
parent742c00331e5a12d1565e75e035f9f345b51914e5 (diff)
coreboot: re-configure gm45 thinkpads from scratch
TSEG Stage Cache enabled again, because disabling it did not affect S3 in any way. Many configs have changed, and debug level is set to 7. In testing with V-T60 on IRC, it wasn't just removal of the DDR2 patch that I did, but I re-did the configs too, in exactly the same way I've done them here, when testing on an X200 to fix boot issues. Libreboot does not use defconfigs, instead it uses full configs, and these have to be updated. I normally just run make-oldconfig on every config, for revision updates. However, every now and then, we need to re-do them. Play it safe and re-do every config. I've double- and triple-checked that the configs are correct. Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'config/ifd/hp_sandybridge')
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