diff options
| author | Leah Rowe <leah@libreboot.org> | 2024-12-02 11:29:19 +0000 |
|---|---|---|
| committer | Leah Rowe <leah@libreboot.org> | 2024-12-02 11:29:19 +0000 |
| commit | 046529abd98d7a98b57cfe9113f8c61dc3353cfc (patch) | |
| tree | b706742002bd00e4493902dabd86664f2438e07b /config/coreboot | |
| parent | 9dc3c86ae37db781b6bc4e745a57217c3511074b (diff) | |
This fixes an error where nvme disappears and gets renamed
on s3 resume. Mate Kukri told me to test that and it worked.
Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'config/coreboot')
| -rw-r--r-- | config/coreboot/next/patches/0011-Disable-m2-hotplug-in-lenovo-t480s-devicetree.patch | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/config/coreboot/next/patches/0011-Disable-m2-hotplug-in-lenovo-t480s-devicetree.patch b/config/coreboot/next/patches/0011-Disable-m2-hotplug-in-lenovo-t480s-devicetree.patch new file mode 100644 index 00000000..00a844c1 --- /dev/null +++ b/config/coreboot/next/patches/0011-Disable-m2-hotplug-in-lenovo-t480s-devicetree.patch @@ -0,0 +1,30 @@ +From 44d0703b61156a19c6cbfb5cfe3f5d58e328daae Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Mon, 2 Dec 2024 11:16:43 +0000 +Subject: [PATCH 1/1] Disable m2 hotplug in lenovo t480s devicetree + +This fixes a bug where nvme disappears and gets renamed on +s3 resume. + +Thanks go to Mate Kukri who suggested this. + +Signed-off-by: Leah Rowe <info@minifree.org> +--- + .../lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb +index 2cac8c4a75..9129d3a1b8 100644 +--- a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb +@@ -115,7 +115,6 @@ chip soc/intel/skylake + register "PcieRpClkSrcNumber[8]" = "5" + register "PcieRpAdvancedErrorReporting[8]" = "1" + register "PcieRpLtrEnable[8]" = "1" +- register "PcieRpHotPlug[8]" = "1" + end + end + end +-- +2.39.5 + |