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authorLeah Rowe <leah@libreboot.org>2024-01-25 15:24:02 +0000
committerLeah Rowe <leah@libreboot.org>2024-01-25 15:41:15 +0000
commit4a6dc5553f2a15542f730ca735fb8bf95fb8f49b (patch)
tree2cd281908a37816a526a0b6deab51376fec9cf69 /config/coreboot/w541mrc_12mb
parentece5463109721347c2008b7791907ac4d6825588 (diff)
coreboot/default: update coreboot to January 2024
Base revision changed to: commit b6cbfa977f63d57d5d6b9e9f7c1cef30162f575a Author: Morris Hsu <morris-hsu@quanta.corp-partner.google.com> Date: Fri Jan 5 16:48:17 2024 +0800 mb/google/dedede/var/metaknight:Add fw_config probe for multi codec and amplifier Of note: Several out-of-tree ports have been adjusted to use the new SPD config style, where it is defined in devicetree. I manually updated the E6530 patch myself, based on the update that Nicholas did on E6430 (Nicholas will later update the E6530 patch himself, and I'll re-merge the patch). Several upstream patches now exist in this revision, that we were able to remove from lbmk. The heap size patch was reverted upstream, as we did, but see: https://review.coreboot.org/c/coreboot/+/80023 https://review.coreboot.org/c/coreboot/+/79525 Although we still disable the TSEG Stage Cache, ivy/sandy/haswell should be reliable on S3 now (leaving TSEG Stage Cache disabled, for now, anyway). Also included in upstream now: commit 29030d0f3dad2ec6b86000dfe2c8e951ae80bf94 Author: Bill Xie <persmule@hardenedlinux.org> Date: Sat Oct 7 01:32:51 2023 +0800 drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume Further patches from upstream: commit 432e92688eca0e85cbaebca3232f65936b305a98 Author: Bill Xie <persmule@hardenedlinux.org> Date: Fri Nov 3 12:34:01 2023 +0800 drivers/pc80/rtc/option.c: Reset only CMOS range covered by checksum This should fix S3 on GM45 thinkpads. Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'config/coreboot/w541mrc_12mb')
-rw-r--r--config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb31
-rw-r--r--config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode31
2 files changed, 44 insertions, 18 deletions
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
index e17a939a..314dbbc9 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_corebootfb
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -132,6 +133,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN004A"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -151,7 +154,6 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_ENABLE_DDR_2X_REFRESH is not set
CONFIG_PCIEXP_AER=y
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -197,8 +199,6 @@ CONFIG_BOARD_LENOVO_THINKPAD_W541=y
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN004A"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
CONFIG_D3COLD_SUPPORT=y
@@ -208,7 +208,6 @@ CONFIG_PCIEXP_CLK_PM=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
CONFIG_EC_GPE_SCI=0x50
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -223,6 +222,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
CONFIG_COREBOOT_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -252,6 +252,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
CONFIG_EHCI_BAR=0xe8000000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -261,19 +262,20 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HAVE_MRC=y
CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_DISABLE_ME_PCI=y
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
#
# CPU
@@ -385,6 +387,8 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -420,7 +424,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -428,8 +432,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -460,6 +462,7 @@ CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
CONFIG_TPM_INIT_RAMSTAGE=y
# CONFIG_TPM_PPI is not set
@@ -477,6 +480,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
CONFIG_INTEL_DDI=y
CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
CONFIG_GFX_GMA=y
CONFIG_GFX_GMA_DYN_CPU=y
CONFIG_GFX_GMA_GENERATION="Haswell"
@@ -522,6 +529,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
CONFIG_PCR_BOOT_MODE=1
CONFIG_PCR_HWID=1
CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
@@ -552,6 +560,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
#
# Console
@@ -612,6 +621,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#
diff --git a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
index fbfd3d87..8f09ec77 100644
--- a/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/w541mrc_12mb/config/libgfxinit_txtmode
@@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
CONFIG_STATIC_OPTION_TABLE=y
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
+CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@@ -130,6 +131,8 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_TPM_PIRQ=0x0
+CONFIG_PS2K_EISAID="LEN0071"
+CONFIG_PS2M_EISAID="LEN004A"
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@@ -149,7 +152,6 @@ CONFIG_GBE_BIN_PATH="../../../config/ifd/t440p/gbe"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_ENABLE_DDR_2X_REFRESH is not set
CONFIG_PCIEXP_AER=y
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -195,8 +197,6 @@ CONFIG_BOARD_LENOVO_THINKPAD_W541=y
# CONFIG_BOARD_LENOVO_X60 is not set
CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
CONFIG_VBOOT_SLOTS_RW_AB=y
-CONFIG_PS2K_EISAID="LEN0071"
-CONFIG_PS2M_EISAID="LEN004A"
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
CONFIG_D3COLD_SUPPORT=y
@@ -206,7 +206,6 @@ CONFIG_PCIEXP_CLK_PM=y
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
CONFIG_EC_GPE_SCI=0x50
# CONFIG_TPM_MEASURED_BOOT is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
@@ -221,6 +220,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
CONFIG_COREBOOT_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=12288
@@ -250,6 +250,7 @@ CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x100000
CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
CONFIG_EHCI_BAR=0xe8000000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
@@ -259,19 +260,20 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
CONFIG_INTEL_GMA_BCLM_WIDTH=16
CONFIG_BOOTBLOCK_IN_CBFS=y
+CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
CONFIG_HAVE_MRC=y
CONFIG_MRC_FILE="../../../mrc/haswell/mrc.bin"
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
+CONFIG_HPET_MIN_TICKS=0x80
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_DISABLE_ME_PCI=y
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
+CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_FIXED_SMBUS_IO_BASE=0x400
-CONFIG_HPET_MIN_TICKS=0x80
CONFIG_CBFS_CACHE_ALIGN=8
-CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
#
# CPU
@@ -383,6 +385,8 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
+CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@@ -416,7 +420,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
-CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
@@ -424,8 +428,6 @@ CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
-CONFIG_FIRMWARE_CONNECTION_MANAGER=y
-# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@@ -456,6 +458,7 @@ CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_ISSI=y
CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
CONFIG_TPM_INIT_RAMSTAGE=y
# CONFIG_TPM_PPI is not set
@@ -473,6 +476,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
CONFIG_INTEL_DDI=y
CONFIG_INTEL_GMA_ACPI=y
+CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
+# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
+# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
+CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
CONFIG_GFX_GMA=y
CONFIG_GFX_GMA_DYN_CPU=y
CONFIG_GFX_GMA_GENERATION="Haswell"
@@ -519,6 +526,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y
CONFIG_PCR_BOOT_MODE=1
CONFIG_PCR_HWID=1
CONFIG_PCR_SRTM=2
+CONFIG_PCR_FW_VER=10
CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
@@ -549,6 +557,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
+CONFIG_HEAP_SIZE=0x100000
#
# Console
@@ -609,6 +618,10 @@ CONFIG_PAYLOAD_NONE=y
# CONFIG_DISPLAY_MTRRS is not set
#
+# Vendorcode Debug Settings
+#
+
+#
# BLOB Debug Settings
#