summaryrefslogtreecommitdiff
path: root/config/coreboot/t440plibremrc_12mb
diff options
context:
space:
mode:
authorLeah Rowe <leah@libreboot.org>2024-05-27 15:36:27 +0100
committerLeah Rowe <leah@libreboot.org>2024-05-27 17:11:33 +0100
commitc94cecd83751d2df26314a90852f7df306256fb0 (patch)
tree061d134744d07945d2604fcd710ff5d4a1769062 /config/coreboot/t440plibremrc_12mb
parentff2997d6ec3614b9b307ed14cbcd2fac062141d0 (diff)
GRUB: remove XHCI patches for now (will re-add)
Fixes this bug: https://codeberg.org/libreboot/lbmk/issues/216 Well, fix is the wrong word. We want xHCI ideally. Mate is working on it as I write this. I've also: * Disabled CONFIG_FINALIZE_USB_ROUTE_XHCI on Haswell boards (coreboot) * Disabled the GRUB payload on HP 820 G2 for now We will need to re-add the xHCI patches once fixed. If Mate/we can't fix it, I'll contact Patrick Rudolph who originally wrote the xHCI patches. Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'config/coreboot/t440plibremrc_12mb')
-rw-r--r--config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb2
-rw-r--r--config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode2
2 files changed, 2 insertions, 2 deletions
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
index dd614202..ab3c464b 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_corebootfb
@@ -325,7 +325,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
diff --git a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
index a0dce901..b6a9afd1 100644
--- a/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
+++ b/config/coreboot/t440plibremrc_12mb/config/libgfxinit_txtmode
@@ -323,7 +323,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
# CONFIG_PCIEXP_HOTPLUG is not set
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
-CONFIG_FINALIZE_USB_ROUTE_XHCI=y
+# CONFIG_FINALIZE_USB_ROUTE_XHCI is not set
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y