NEW MAINBOARD: ThinkPad T480

This uses the excellent deguard utility, written by
the excellent Mate Kukri.

A few bugs but it mostly works. Documentation to come
shortly, in lbwww.git.

Signed-off-by: Leah Rowe <leah@libreboot.org>

1 files changed, 308 insertions, 0 deletions

diff --git a/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch b/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch
new file mode 100644
index 00000000..77d7b080
--- /dev/null
+++ b/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch
@@ -0,0 +1,308 @@
+From a7cbcbc7037fe3473e5ebe475cbfd12f653e9827 Mon Sep 17 00:00:00 2001
+From: Felix Singer <felixsinger@posteo.net>
+Date: Wed, 26 Jun 2024 00:59:03 +0200
+Subject: [PATCH 2/8] mb/lenovo: Add initial code for Lenovo ThinkPad E460
+
+Change-Id: Ia02f81750105c95c867d961dbdadcd5991ad371f
+Signed-off-by: Felix Singer <felixsinger@posteo.net>
+---
+ src/mainboard/lenovo/sklkbl_thinkpad/Kconfig  | 47 +++++++++++++++++++
+ .../lenovo/sklkbl_thinkpad/Kconfig.name       |  4 ++
+ .../lenovo/sklkbl_thinkpad/Makefile.mk        |  7 +++
+ .../lenovo/sklkbl_thinkpad/acpi/ec.asl        |  3 ++
+ .../lenovo/sklkbl_thinkpad/acpi/superio.asl   |  3 ++
+ .../lenovo/sklkbl_thinkpad/bootblock.c        |  7 +++
+ .../lenovo/sklkbl_thinkpad/devicetree.cb      | 17 +++++++
+ src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl | 23 +++++++++
+ .../lenovo/sklkbl_thinkpad/ramstage.c         | 11 +++++
+ .../lenovo/sklkbl_thinkpad/romstage.c         |  7 +++
+ .../variants/e460/gma-mainboard.ads           | 15 ++++++
+ .../sklkbl_thinkpad/variants/e460/hda_verb.c  | 10 ++++
+ .../variants/e460/overridetree.cb             | 37 +++++++++++++++
+ 13 files changed, 191 insertions(+)
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c
+ create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb
+
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
+new file mode 100644
+index 0000000000..fcc80dffe3
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig
+@@ -0,0 +1,47 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
++	bool
++	select BOARD_ROMSIZE_KB_12288
++	select HAVE_ACPI_RESUME
++	select HAVE_ACPI_TABLES
++#	select HAVE_CMOS_DEFAULT
++#	select INTEL_GMA_HAVE_VBT
++	select INTEL_LPSS_UART_FOR_CONSOLE
++	select MAINBOARD_HAS_LIBGFXINIT
++	select MEMORY_MAPPED_TPM
++	select MAINBOARD_HAS_TPM2
++	select NO_UART_ON_SUPERIO
++	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
++	select SPD_READ_BY_WORD
++	select SYSTEM_TYPE_LAPTOP
++
++config BOARD_LENOVO_E460
++	bool
++	select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
++	select SOC_INTEL_SKYLAKE
++
++if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON
++
++config MAINBOARD_DIR
++	default "lenovo/sklkbl_thinkpad"
++
++config VARIANT_DIR
++	default "e460" if BOARD_LENOVO_E460
++
++config MAINBOARD_PART_NUMBER
++	default "E460" if BOARD_LENOVO_E460
++
++config CBFS_SIZE
++	default 0x600000 if BOARD_LENOVO_E460
++
++config DIMM_MAX
++	default 4
++
++config DIMM_SPD_SIZE
++	default 256
++
++config UART_FOR_CONSOLE
++	default 2
++
++endif
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
+new file mode 100644
+index 0000000000..61d971fe8d
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name
+@@ -0,0 +1,4 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++config BOARD_LENOVO_E460
++	bool "ThinkPad E460"
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
+new file mode 100644
+index 0000000000..6e544fd6b9
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk
+@@ -0,0 +1,7 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++bootblock-y += bootblock.c
++
++ramstage-y += ramstage.c
++ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
+new file mode 100644
+index 0000000000..16990d45f4
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl
+@@ -0,0 +1,3 @@
++/* SPDX-License-Identifier: CC-PDDC */
++
++/* Please update the license if adding licensable material. */
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl
+new file mode 100644
+index 0000000000..55b1db5b11
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl
+@@ -0,0 +1,3 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <drivers/pc80/pc/ps2_controller.asl>
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
+new file mode 100644
+index 0000000000..ccd8ec1b40
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c
+@@ -0,0 +1,7 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++
++void bootblock_mainboard_early_init(void)
++{
++}
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
+new file mode 100644
+index 0000000000..ddb6e8aaa5
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb
+@@ -0,0 +1,17 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++chip soc/intel/skylake
++	device domain 0 on
++		device ref igpu on end
++		device ref sa_thermal on end
++		device ref thermal on end
++		device ref south_xhci on end
++		device ref lpc_espi on
++			register "serirq_mode" = "SERIRQ_CONTINUOUS"
++			chip drivers/pc80/tpm
++				device pnp 0c31.0 on end
++			end
++		end
++		device ref hda on end
++	end
++end
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
+new file mode 100644
+index 0000000000..967b652853
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl
+@@ -0,0 +1,23 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi.h>
++DefinitionBlock(
++	"dsdt.aml",
++	"DSDT",
++	ACPI_DSDT_REV_2,
++	OEM_ID,
++	ACPI_TABLE_CREATOR,
++	0x20110725
++)
++{
++	#include <acpi/dsdt_top.asl>
++	#include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
++	#include <cpu/intel/common/acpi/cpu.asl>
++
++	Device (\_SB.PCI0) {
++		#include <soc/intel/skylake/acpi/systemagent.asl>
++		#include <soc/intel/skylake/acpi/pch.asl>
++	}
++
++	#include <southbridge/intel/common/acpi/sleepstates.asl>
++}
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
+new file mode 100644
+index 0000000000..6c3b077cc4
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c
+@@ -0,0 +1,11 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/device.h>
++
++static void init_mainboard(void *chip_info)
++{
++}
++
++struct chip_operations mainboard_ops = {
++	.init = init_mainboard,
++};
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
+new file mode 100644
+index 0000000000..59a62f484e
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c
+@@ -0,0 +1,7 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <soc/romstage.h>
++
++void mainboard_memory_init_params(FSPM_UPD *mupd)
++{
++}
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads
+new file mode 100644
+index 0000000000..e0a166fe55
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads
+@@ -0,0 +1,15 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (eDP,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c
+new file mode 100644
+index 0000000000..d9d103f862
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c
+@@ -0,0 +1,10 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++};
++
++const u32 pc_beep_verbs[] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb
+new file mode 100644
+index 0000000000..a7384848a6
+--- /dev/null
++++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb
+@@ -0,0 +1,37 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++chip soc/intel/skylake
++	device domain 0 on
++		device ref south_xhci on
++			register "usb2_ports" = "{
++				[0] = USB2_PORT_MID(OC_SKIP),	// On board, right front
++				[1] = USB2_PORT_MID(OC_SKIP),	// On board, right back
++				[2] = USB2_PORT_MID(OC_SKIP),	// Charger port
++				[3] = USB2_PORT_MID(OC_SKIP),	// Docking
++				[4] = USB2_PORT_MID(OC_SKIP),	// Touch panel
++				[5] = USB2_PORT_MID(OC_SKIP),	// Bluetooth
++				[6] = USB2_PORT_MID(OC_SKIP),	// Camera
++				[7] = USB2_PORT_MID(OC_SKIP),	// Fingerprint
++			}"
++			register "usb3_ports" = "{
++				[0] = USB3_PORT_DEFAULT(OC_SKIP),	// On board, right front
++				[1] = USB3_PORT_DEFAULT(OC_SKIP),	// On board, right back
++				[2] = USB3_PORT_DEFAULT(OC_SKIP),	// Charger port
++				[3] = USB3_PORT_DEFAULT(OC_SKIP),	// Docking
++			}"
++		end
++		device ref sata on
++			register "SataPortsEnable[0]" = "1"
++			register "SataPortsDevSlp[0]" = "1"
++		end
++		device ref pcie_rp3 on
++			# WLAN
++		end
++		device ref pcie_rp4 on
++			# LAN
++		end
++		device ref pcie_rp6 on
++			# Card reader
++		end
++	end
++end
+-- 
+2.39.5
+