diff options
| author | Leah Rowe <leah@libreboot.org> | 2023-10-31 20:04:40 +0000 |
|---|---|---|
| committer | Leah Rowe <leah@libreboot.org> | 2023-10-31 20:08:03 +0000 |
| commit | 1306c9d2e36d1760ebb79020aec305bf5b4bc7ad (patch) | |
| tree | ec0d114eb5da25b6bc2b09af39cc62c3e1fb8f37 /config/coreboot/macbook21_16mb | |
| parent | d218088d8b9164d5349ebcfcc744ea4c48399cc1 (diff) | |
Revert "coreboot/default: use alternative heap size fix"
This reverts commit 29e9c32e32f8e947f51a3efe375dab3ef8e1987e.
Diffstat (limited to 'config/coreboot/macbook21_16mb')
| -rw-r--r-- | config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb | 2 | ||||
| -rw-r--r-- | config/coreboot/macbook21_16mb/config/libgfxinit_txtmode | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb index 53109f28..08a21f42 100644 --- a/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/macbook21_16mb/config/libgfxinit_corebootfb @@ -161,6 +161,7 @@ CONFIG_D3COLD_SUPPORT=y # CONFIG_DRIVERS_UART_8250IO is not set CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0 +CONFIG_HEAP_SIZE=0x4000 CONFIG_EC_GPE_SCI=0x50 CONFIG_BOARD_ROMSIZE_KB_2048=y # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set @@ -201,7 +202,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 -CONFIG_HEAP_SIZE=0x80000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 diff --git a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode index fd30d131..563271e0 100644 --- a/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/macbook21_16mb/config/libgfxinit_txtmode @@ -161,6 +161,7 @@ CONFIG_D3COLD_SUPPORT=y # CONFIG_DRIVERS_UART_8250IO is not set CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0 +CONFIG_HEAP_SIZE=0x4000 CONFIG_EC_GPE_SCI=0x50 CONFIG_BOARD_ROMSIZE_KB_2048=y # CONFIG_COREBOOT_ROMSIZE_KB_256 is not set @@ -201,7 +202,6 @@ CONFIG_ROMSTAGE_ADDR=0x2000000 CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 -CONFIG_HEAP_SIZE=0x80000 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 |