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authorLeah Rowe <leah@libreboot.org>2024-08-12 02:19:38 +0100
committerLeah Rowe <leah@libreboot.org>2024-08-12 02:23:12 +0100
commit3f9d575cebc377de8eae7fe0406e7e8549318964 (patch)
treef907ba567048e128343cfe7088882fe0ef337f51 /config/coreboot/ga_g41m_es2l
parent8ca56f96c12241aa36add827c489aeeed5260e22 (diff)
coreboot/x4x: fix build error
see relevant patch added in the diff set the clock on x4x boards to 96MHz like on GM45 fixes the following build error on x4x boards: hw-gfx-gma-plls.adb:465:46: error: "INTEL_GMA_DPLL_REF_FREQ" not declared in "Config" make: *** [Makefile:423: build/ramstage/libgfxinit/common/g45/hw-gfx-gma-plls.o] Error 1 Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'config/coreboot/ga_g41m_es2l')
-rw-r--r--config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode1
1 files changed, 1 insertions, 0 deletions
diff --git a/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode b/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode
index e444f300..ade6b308 100644
--- a/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode
+++ b/config/coreboot/ga_g41m_es2l/config/libgfxinit_txtmode
@@ -135,6 +135,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_MAX_SOCKET=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set
+CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"