diff options
| author | Leah Rowe <leah@libreboot.org> | 2024-08-12 02:19:38 +0100 |
|---|---|---|
| committer | Leah Rowe <leah@libreboot.org> | 2024-08-12 02:23:12 +0100 |
| commit | 3f9d575cebc377de8eae7fe0406e7e8549318964 (patch) | |
| tree | f907ba567048e128343cfe7088882fe0ef337f51 /config/coreboot/g43t_am3_16mb | |
| parent | 8ca56f96c12241aa36add827c489aeeed5260e22 (diff) | |
coreboot/x4x: fix build error
see relevant patch added in the diff
set the clock on x4x boards to 96MHz like on GM45
fixes the following build error on x4x boards:
hw-gfx-gma-plls.adb:465:46: error: "INTEL_GMA_DPLL_REF_FREQ" not declared in "Config"
make: *** [Makefile:423: build/ramstage/libgfxinit/common/g45/hw-gfx-gma-plls.o] Error 1
Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'config/coreboot/g43t_am3_16mb')
| -rw-r--r-- | config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode b/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode index f7c5ade5..563a47c7 100644 --- a/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/g43t_am3_16mb/config/libgfxinit_txtmode @@ -137,6 +137,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 # CONFIG_CONSOLE_POST is not set +CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 CONFIG_ECAM_MMCONF_BUS_NUMBER=256 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" |