diff options
| author | Leah Rowe <leah@libreboot.org> | 2024-10-26 05:41:46 +0100 |
|---|---|---|
| committer | Leah Rowe <leah@libreboot.org> | 2024-10-26 06:26:25 +0100 |
| commit | 99a88ebfa20421909675e9de6ed9376049f433d4 (patch) | |
| tree | f106402f6bc17d10bd888cf10866ff71121ef417 /config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch | |
| parent | 3f63c6d12f6b9ad8e0d7846c313f5adfb46a942e (diff) | |
Update dell 3050 patch to patch 15 (pwm fix)
Use patchset 15 instead of 14:
config/coreboot/default/patches/0061-WIP-OptiPlex-3050-Micro-port.patch
Rebase the verb patch; patchset 15 modified the Makefile:
config/coreboot/default/patches/0064-dell-optiplex_3050-add-hda_verb.c.patch
We were using patchset 14 for the 3050 micro:
https://review.coreboot.org/c/coreboot/+/82053/14
Now we use patchset 15:
https://review.coreboot.org/c/coreboot/+/82053/15
Without this patch, the fans are always on a low setting, on
the Dell OptiPlex 3050 Micro, even under stress conditions. With
this patch, the fans change speed according to CPU temperature.
I had to rebase my verb patch, because Mate modified the Makefile
to add his sch5555 handler, on the same line where I add hda_verb.
Mate tells me he will merge my verb and vbt patches into a further
patchset later on. For now, I've simply rebased these patches on
top of Mate's newer work; I've told him he can use them in his port.
I'm probably going to now issue a new revision ROM image for
Libreboot 20241008, so that users can get this fix sooner.
Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch')
| -rw-r--r-- | config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch b/config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch index 9b733998..c571fe3b 100644 --- a/config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch +++ b/config/coreboot/default/patches/0043-haswell-NRI-Initialise-MPLL.patch @@ -1,7 +1,7 @@ -From 8b584165a99c69cc808f86efcdd55acb06a4464c Mon Sep 17 00:00:00 2001 +From ab36967cce0593dd17f3018ab4a6661e4219d242 Mon Sep 17 00:00:00 2001 From: Angel Pons <th3fanbus@gmail.com> Date: Thu, 11 Apr 2024 17:25:07 +0200 -Subject: [PATCH 01/17] haswell NRI: Initialise MPLL +Subject: [PATCH 43/65] haswell NRI: Initialise MPLL Add code to initialise the MPLL (Memory PLL). The procedure is similar to the one for Sandy/Ivy Bridge, but it is not worth factoring out. @@ -344,5 +344,5 @@ index 5610e7089a..45f8174995 100644 #define SAPMCTL 0x5f00 -- -2.39.2 +2.39.5 |