cb/default: use rev 62c8197dd25376cb7b18d272af167cb176d28bcf

this brings the following changes from upstream, since the previous revision:

* 62c8197dd2 mb/google/calypso: Implement ramstage boot logic and QUP firmware loading
* 86c6c748ed mainboard/google/calypso: Update board name in board_info.txt
* 4298078683 mb/google/calypso: Implement `platform_romstage_main` and `platform_romstage_postram`
* 1c79360b44 soc/qualcomm/calypso: Split CPUCP binary into RO and RW regions
* fc1ba3d9b3 soc/qualcomm/calypso: Add soc_prepare_bl31_handoff hook
* 03aaebef7e soc/qualcomm/calypso: Enable CBFS preloading for BL31 and BL32
* e242958a7d soc/qualcomm/calypso: Add weak mainboard_soc_init hook
* 24160f6e3d soc/qualcomm/calypso: Add late init boot state entry
* 10a2805216 soc/qualcomm/calypso: Implement cbmem_top_chipset()
* 9cb549b4e7 mb/google/calypso: Select SOC_QUALCOMM_CDT
* ef4aa128e2 soc/qc/calypso: Introduce CDT_DATA region
* d9c36cb483 soc/qualcomm/calypso: Include cdt.c in romstage compilation
* e2115d2079 soc/qualcomm/calypso: Update apdp.mbn path to use BLOB_VARIANT
* 9fc7c2e3b2 soc/qc/calypso: Implement frequency-based QSPI GPIO drive strength
* 6c566de88d soc/qualcomm/calypso: Make SPI bus frequency configurable via Kconfig
* ef24143cc4 editorconfig: Explicitly set indent_size
* 559eafd2c6 arch/x86/acpi_bert_storage: Add CPER_SEC_PLATFORM_MEM_GUID
* 967ac0be68 soc/amd/common/block/cpu/mcax: Fill generic HEST entry
* 6395a3f1a2 soc/amd/common/block/cpu/mcax: Add helper to identify bank
* 441926d0df soc/amd/common/block/cpu/mcax: Add method to read FRU text from MSR
* ff4ce4fa8a cbfstool: Rename COREBOOT_TS to COREBOOT_B
* 8a50ec739b nb/intel/gm45: Name IOMMU registers and addresses
* 4e56d573ae sb/intel/i82801gx: Drop `SPIBARx` macros
* df5e587623 soc/qc/x1p42100:: Select Secure OS options in X1P42100 Kconfig
* 8ce11782b3 vc/intel/fsp/fsp2_0/wildcatlake: Expose the VccsaShutdown UPD
* a3f7ec15e9 mb/google/nissa/var/pujjoniru: Modify RAM ID table
* 8cbaa8d894 mb/google/fatcat/var/ruby: Change fingerprint enable pin power state
* bf848a6f80 mb/google/bluey: Configure LID_OPEN_S3 GPIO as input without pull
* 0af0b50a3c mainboard/google/fatcat: Disable CPU ratio override on low battery
* 6082e79232 sb/intel/wildcatpoint: Use some Lynx Point ME code
* 1775f25ccc sb/intel/lynxpoint: Make `intel_me_finalize()` static
* 43abc2d1c2 sb/intel/lynxpoint/me.h: Align MKHI macros with Wildcat Point
* e357e3c6bb sb/intel/lynxpoint: Add `intel_me_hsio_version()`
* fab9b2ad97 sb/intel/lynxpoint/me.h: Move function declarations to bottom
* 5d23973369 sb/intel/wildcatpoint: Add parameters to `intel_me_status()`
* 5c1bf73ab9 sb/intel/lynxpoint/me_status.c: Better handle unknown values
* a66bd85e75 sb/intel/wildcatpoint: Replace ME structs with unions
* 7ff29551a4 sb/intel/wildcatpoint/me.h: Align with Lynx Point
* 18e29adc30 sb/intel/lynxpoint/early_me.c: Use northbridge defines
* 1f376aebde sb/intel/wildcatpoint/cfr.c: Use Lynx Point's file
* dccf924a2c sb/intel/lynxpoint: Split a few things off pch.h
* 917880c002 broadwell/wildcatpoint: Decouple headers
* 7812ceb6dc haswell/lynxpoint: Add `fixed_eq` to USB3 config
* 9f90e930cf nb/intel/broadwell: Drop temporary macros
* 9a587c54d7 nb/intel/broadwell: Drop `mainboard_fill_pei_data()`
* 1c2efb8f2b mb/hp/elitebook_820_g2: Set `ec_present` from devtree
* 99affc7f58 nb/intel/broadwell: Separate NB/PCH finalise steps
* 165261ba7d nb/intel/haswell: Tidy up includes
* f2e24e5230 nb/intel/haswell: Unify more cosmetics with Broadwell
* a1af3759cd sb/intel/{lynx,wildcat}point: Drop `SPIBARx` macros
* 9a45e0949f util/amdfwtool: Add PSP directory entry type 0x8e (SFDR)
* 40eb28ec6b mb/google/ocelot/var/ocicat: Enable UFS inline encryption
* 328534098f mb/google/ocelot/var/matsu: Enable UFS inline encryption
* 108006e49a sb/intel/*: Centralize BIOS_CNTL macros
* a22f97f3ff drivers/intel/touch/chip: Fix typo in *device* in comment
* 8121a3dd72 soc/amd/common/block/psp: Add mailbox interface for ROM Armor
* 367e323fd0 mb/google/rauru: Implement Priority Mutex for parallel boot alignment
* 5b49e6d976 soc/mediatek/common: Implement Shared Resource Mutex for DMA safety
* c5f901ba4b fw_config: Always declare fw_config_probe_mainboard_override
* c39b0318de mb/google/rauru/sapphire: Override PANEL_ID in fw_config
* 104aed9a5c lib/fw_config: Add mainboard override hook
* bcfd9a87ee mb/google/bluey: Add is_low_res_panel helper for logo scaling
* fd1ad83256 mb/google/bluey: Implement platform_use_secondary_logo
* 5b811635e7 lib: Add support for secondary resolution bootsplash logos
* a0502589a3 mb/google/bluey/mica: Add vdd and vtsp gpio to depthcharge
* 026e1f60b6 drv/i2c/{rv3028c7, rx6110sa}: Use bool for config options where possible
* cf7e468d32 payloads/Kconfig: fix dead default for PAYLOAD_FIT_SUPPORT
* a7ded1bea6 soc/qualcomm/x1p42100: Use mainboard-specific paths for ADSP blobs
* 387c317058 ec/starlabs/merlin: apply settings without enabled PNP devices
* c0ca77265b util/lint: fix miniconfig check for CONFIG_MAINBOARD_DIR/HAVE references
* 4064b5de37 payloads/external/edk2: build-local FMP cert PCD for capsule updates
* 6e95ade0cb nb/intel/haswell/gma.c: Add Broadwell IDs
* aa9ff8895f nb/intel/haswell/gma.c: Add Broadwell GT PM init
* b75d086f86 nb/intel/haswell/gma.c: Replace GT register tables
* 892d68a8c8 nb/intel/haswell/gma.c: Init CDCLK before gfxinit
* f7412bf209 nb/intel/haswell/gma.c: Add support for Broadwell CDCLK
* 65fdf4754e nb/intel/haswell/gma.c: Enable power well later
* 625ba6ed9d nb/intel/haswell: Drop native gfx init leftovers
* 8443582672 drivers/intel/gma: Drop unneeded DDI stuff
* 6ca4e93632 nb/intel/haswell/gma.c: Update PM init steps
* c8320ab9f6 nb/intel/haswell/gma.c: Avoid using invalid GTT resource
* a5e124b6d0 nb/intel/haswell/gma.c: Fix PCI driver variable name
* 5e0cf0e730 util/cbfstool: don't invalidate MH cache unnecessarily
* 1754d90560 cbfstool/bzImage: Fix out-of-bound read with very short input file
* df2afe0b22 cbfstool/fv: Fix out-of-bound read with very short input file
* 9e600ac8dd cbfstool/fit: Fix out-of-bound read with very short input file
* d9085c1a7b cbfstool/elfheaders: Fix out-of-bound read with very short input file
* 27cdca23c1 mb/google/ocelot: add alternate clock request support
* 5409e52b5f soc/qualcomm/x1p42100: Increase TTB size from to 64K for Bluey
* 07c6b36ab3 mb/google/bluey: Add support for PWM-based backlight control
* a3011baad1 soc/qualcomm/common: Correct GPIO offset for master PMIC
* eaad3ecd4d mainboard/google/bluey: Use generic naming for backlight PMIC GPIO
* f457508572 mainboard/google/bluey: Add touchscreen power control via GPIO
* bcaaac5804 soc/amd/cezanne/Kconfig: add FSP binaries for V2000A
* 5cff8485cb 3rdparty/amd_blobs: advance submodule pointer
* 45cc75fe50 soc/amd/common/pci: Add host bridge _PRT method for root-bus devices
* 434c92b908 acpi/acpigen_pci: Add devfn-based _PRT entry helpers
* 64193f07f6 mb/google/dedede/var/blipper: Add stop_gpio, stop_delays to GTCH7503
* f4b98a0ba3 drivers/amd/ftpm: Disable pre ramstage
* 5bbb46481f soc/mediatek: Refactor MT6685 PMIC driver to use lazy initialization
* cbd0b52c5e lib/delay: Optimize mdelay and delay in cooperative multitasking
* c8ac5953e9 ec/lenovo/h8: Respect H8_HAS_LEDLOGO configuration
* 643efabd2a mb/google/ocelot: enable BayHub & Genesys SD Card
* 87f9bd1235 Revert "soc/qualcomm/x1p42100: Select APDP and Ramdump configurations"
* 3b44256255 soc/amd/common/block/psp: Check backup flash busy flag
* c47cbaa3ac lib/cbfs.c: deduplicate checking/querying type on _cbfs*_alloc()
* 7f3a299dc8 mb/asus/h61-series: Add Asus P8H61-M LX2
* 054318251c mb/asus/h61m-a_usb3/hda_verb.c: Drop extraneous codec verbs
* ae9ffa965d acpi/acpigen_ps2_keybd: Map CONTEXTUAL_INSERT
* 0223a54137 include/input-event-codes.h: Update to upstream
* c61c56e2da soc/qualcomm/common: Adjust GPIO base for master PMIC
* 888d9a4170 mb/google/bluey: Initialize ADSP boot reason in boot
* 053ddab917 drv/i2c/{rv3028c7,rx6110sa}: Change date format in final-hook
* 4b8bb72cbb mb/siemens/mc_ehl{6,8}: Enable sync of external RTC to CMOS RTC
* 91e5644fb0 mb/siemens/mc_rpl1: Enable external RTC RV3028-C7
* baad6487e7 cbfstool: Improve lexer error message
* e8a3bb81db treewide: Remove WARNINGS_ARE_ERRORS
* a2d386749d soc/amd/glinda: Mark sleep button as control-method only
* f7d5afbc18 soc/amd/phoenix: Mark sleep button as control-method only
* 5b0dd4933a soc/amd/mendocino: Mark sleep button as control-method only
* 81f77fd608 soc/amd/picasso: Set ACPI_FADT_SLEEP_BUTTON flag at SoC level
* 30341a6d01 soc/amd/cezanne: Mark sleep button as control-method only
* d19104a3ba soc/qc/x1p42100: Implement frequency-based QSPI GPIO drive strength
* f75dc1b17c soc/qualcomm/common: Allow SoC override for QSPI GPIO configuration
* 48acc27551 mb/google/bluey: Select 75MHz SPI frequency for board models
* 4ce87ee626 soc/qualcomm/x1p42100: Make SPI bus frequency configurable via Kconfig
* bd89a3df97 soc/qc/x1p42100: Move Display and LPASS initialization to late stage
* 3d08ec12df soc/qualcomm/x1p42100: Enable CBFS preloading for BL31 and BL32
* 8e0e61c48f mb/google/bluey: Call setup_usb_late directly in mainboard_soc_init
* 1e6e64eeca payloads/ext/.gitignore: Add coreDOOM build directory
* be555d8614 payloads/ext/.gitignore: Sort alphabetically
* 2942c415db mb/asus: Add ASUS Z87-K (Haswell)
* 7721bb3b72 soc/amd/glinda: Pass SMMSTORE region to amdfwtool
* 9439a4e6f7 util/amdfwtool: Introduce table granularity
* a3bb1d2f21 ifdtool/ifdtool.c: Update FMAP template generation
* 246e795b13 amdfwtool: Support directories greater than 4MiB
* a8a682b430 mb/google/atria: Enable additional devices
* d888458899 mb/google/atria/var/atria: Add initial storage configuration
* 18e9062b88 mb/google/ocelot: Move HDMI GPIOs to early bootblock stage
* 1b61c8f721 google/fatcat: Provide hook at the entry of BS_DEV_INIT_CHIPS
* f40fc7b290 mb/google: Refactor MediaTek boards to use include/baseboard/ namespace
* 357f2c8350 mb/google/oak: Rename WRITE_PROTECT macro to GPIO_WP
* 63f2426042 mb/google/bluey: Enable DAM sink sensor Z1 optimization for Quartz
* b19b4f15d7 mb/google/bluey: Add support for DAM sink sensor Z1 optimization
* 8d51c6537a mb/siemens/mc_rpl1: Enable I2C1 bus
* 140cb7b6df drv/i2c/rv3028c7: Add feature to sync date and time into CMOS RTC
* d7c188f6c2 mb/starlabs/*: expose PS/2 keyboard ACPI node only
* 481657b45f mb/starlabs/common: Gate Intel-specific settings
* 5eb5f3a9bb mb/google/ocelot: Enable UFS inline encryption
* 18b960be65 soc/qualcomm/x1p42100: Remove unused cpucp_prepare() declaration
* b7bff5afea mb/amd/crater/devicetree_v2000a.cb: Update GPP port config
* b74ab281bd mb/google/fatcat/var/lapis: Disable touchpanel wake-up configuration
* 3bc8a9fec1 soc/amd/common/block/spi: Add ROM Armor checks
* acd79afe9a soc/amd/glinda: Fill in cache defaults
* e18df21852 soc/amd/cezanne/Kconfig: Add 64 Bit support for V2000A
* 842b74a0e4 mb/amd/crater/ec.c: Fix calculation of reg in log message
* 81de3098f8 mb/amd/crater: Disable PCIe feature programming
* 37a1035ddc soc/mediatek/common: Log firmware splash screen status
* 586389eafd mb/google/bluey: Skip SoC debug features in recovery mode
* 8aa6763cea soc/qualcomm: Allow skipping SoC debug features in recovery
* cb51506c64 mb/starlabs/adl: Correct selection of EC_STARLABS_FAN
* 8103a5ff9c mainboard/opencellular/elgon/Kconfig: fix dead default for FMDFILE
* ec0d1946e7 soc/qualcomm: Remove HAVE_CBFS_FILE_OPTION_BACKEND
* f8a7a5c02e mainboard/google/bluey: Move display startup to mainboard_soc_init
* 5fc9a1065b soc/qualcomm/x1p42100: Support board-specific SoC initialization
* a5fb73a737 soc/intel/pantherlake: Limit active displays for portrait panels
* d1c1627ede mb/google/bluey: Update GPIO configuraton for AMP enable pin
* 83442b749f mb/google/bluey: Refactor peripheral init and adjust display timing
* fb184d4f3d mb/google/bluey: Consolidate peripheral init and fix PCIe timing
* 5a24200a97 util/cbfstool: avoid creating an image with only COREBOOT_TS
* bf8a8a7aaf mb/google/fatcat: Enable CNVi WWAN coexistence for CELLULAR_PCIE
* d9956b0bcf soc/intel/pantherlake: Add CNVi WWAN coexistence support
* e71531558e acpi/acpigen_ps2_keybd: Map navigation shortcut keys without numpad
* a2bf34ee1c soc/mediatek/mt8196: Relocate FRAMEBUFFER to 0x90200000
* 19e69dde5f vc/intel/fsp/fsp2_0/pantherlake: Update the PTL FSP full headers
* 69f0093d54 mb/google/bluey: Optimize NVMe power sequencing in romstage
* 2a6b546ca2 soc/qualcomm/x1p42100: Add support to power off PCIe Endpoint
* 904aea246f soc/qc/x1p42100: Implement soc_prepare_bl31_handoff to throttle QSPI
* fb81f6f6ce arch/arm64: Add soc_prepare_bl31_handoff() hook
* 66c68e0168 soc/qualcomm/common: Add qspi_set_bus_clock() helper
* 86e45bf52d mb/apple/macbook21: Improve variant name and reintroduce overridetree.cb
* 198aabff32 soc/intel/xeon_sp: Add more defines for register SMM_FEATURE_CONTROL
* 4c3e63e7fd mb/asus/p8z77-v_lx2: Change super I/O chip to nct5535d
* d93eb115b0 util/liveiso: Update nixos to 25.11
* 54b518da64 mb/asus/h61-series: Add P8H61-I R2.0 variant (it8771e)
* 74105264e0 util/kconfig/confdata.c: fix -Werror=discarded-qualifiers
* ece067d8be util/amdtool/cpu.c: Report SME-HMK state
* 14824c7307 util/amdtool/cpu.c: Fix reporting of SEV features
* b7dd49d68d security/tpm/tspi/crtm.c: remove superfluous logging
* 371ef274f9 lib/cbfs.c: don't skip CBFS verification in SMM
* 9e04f49a7a x86: define toolchain for SMM
* 98b0fc0e56 mb/google/atria/var/atria: Add TPM configuration
* 0eadf8856e mb/google/atria/var/atria: Add initial I2C configuration
* 81cdb782f6 mb/google/atria: Add GPE configuration
* 7e0e36d412 mb/google/atria: Select configuration for CHROMEOS and VBOOT
* 1493066f74 mb/google/atria: Add EC support
* df8d6f9a57 mb/google/atria: Add memory initialization support
* 7402845e29 mb/google/atria: Add console UART configuration
* 3b6f1d3817 mb/google/atria/var/atria: Add initial GPIO configuration
* 5d4f18e412 mb/google/atria/var/atria: Add GPIO stub configuration
* 9bf6b9096e mb/google/atria: Add atria variant support
* f6caf8bf42 mb/google/atria: Add initial mainboard
* 6a5f9c8a23 util/intelmetool: Use separate src and build directories
* 7d7499449d soc/amd/cezanne: Drop selection of SOC_AMD_COMMON_BLOCK_SPI_DWORD_ACCESS
* ff0467b96e mb/google/brya: Set CFR storage default to CBI value on taeko/taniks
* 815dc9d445 mb/system76/mtl: Enable EnableTcssCovTypeA configs
* 49f9e95c8d util/lint/lint-stable-005-board-status: Add "All-in-One" category
* f4df60e306 intel/block/pcie/rtd3: Implement _PR3
* d3b7103c9d .gitignore: ignore extended-junit.xml files
* 2d8f4958c5 payloads/ext/.gitignore: match tint tarball
* 5ea3c7f7fa payloads/ext/.gitignore: match MemTest86+ new src dir
* 53c2fc39ac soc/intel/alderlake: Remove ADL_P_ID_9 from PCH SA device list
* 21f79fb69b util/intelmetool: Add Raptor Lake-S PCI ID
* b9399443c0 soc/intel/alderlake: Add Raptor Lake-S 8+12 (0xa740) support
* c9685501f5 mb/asus/maximus_vi(i)_impact: Update HDA codec name
* dfe5b08978 soc/intel/pantherlake: Add UFS inline encryption support
* 4e4a2f85bb mb/siemens/{mc_ehl6,mc_ehl7}: Set IccMax IA to 15A
* 76be626491 soc/intel/elkhartlake: Expose IccMax IA domain to devicetree
* 5267cae13a utils/crossgcc: Update NASM from 2.16.03 to 3.01
* 3ef459a968 utils/crossgcc: Update acpica from 20250807 to 20251212
* e518885dce utils/crossgcc: Update GCC from 14.2.0 to 15.2.0
* a425b57634 soc/qc/x1p42100: Update eDP lane/PHY handling and add BPC selection
* a309c042e2 mb/google/bluey: Log firmware splash screen status to BIOS and ELOG
* 52da3306cc mb/google/bluey: Refactor and clean up display initialization
* ab360c9195 mb/google/bluey: Guard Debug Access Port (DAP) configuration with Kconfig
* b11e7b4afa soc/qualcomm/x1p42100: Enable memory chip information filtering
* 722f8e630d soc/qualcomm/common: Filter undefined memory chip entries
* 4e1d6cee0c soc/qualcomm/x1p42100: Select APDP and Ramdump configurations
* 6d73c02606 soc/qualcomm/x1p42100: Use correct path for APDP binary
* 7dc8ae735a mb/google/bluey: Move apdp and ramdump regions to RW only
* 08bff09608 vc/amd/fsp/renoir/FspUpd.h: Fix comment for FSP signatures
* f2f1a5814f mb/amd/crater/Kconfig: Change SOC to V2000A
* 661a1aa5a2 mb/google/skywalker: Create R2d2 variant
* 9a59f1a5ac mb/asus: Add Maximus VII Ranger (Haswell/Broadwell)
* 87af5c2aef mb/asus: Add Maximus VI Hero (Haswell)
* ae3bec1c7c soc/amd/cezanne/Kconfig: Enable Cache on S3 resume
* ce444c4c76 soc/amd/cezanne: Add V2000A SOC
* 621d722ab8 soc/amd/cezanne/Kconfig: Extend bus numbers to 256 for renoir
* 0cbc9e9c57 soc/amd/cezanne/Kconfig: Remove ADD_FSP_BINARIES from RENOIR
* 4369c463fc soc/amd/common/block/spi: Increase SPI write speed by 27%
* 630a6e66c1 mb/asus/maximus_vii_impact: Update comment for USBDEBUG_HCD_INDEX
* f89717ecc3 soc/qualcomm/x1p42100: Remove dummy regions around framebuffer
* b6ca7755f3 utils/crossgcc: Update binutils from 2.45 to 2.45.1
* 2227096f55 arch/arm64: Add support for COOP_MULTITASKING
* e7d4cc6813 lib: Add comprehensive stack checking for cooperative threads
* 66cb3e79a4 util/find_usbdebug: Add missing 9 Series PCH rate matching hub IDs
* d1da8ec7bb util/autoport: Use official chipset names
* 40df3567c6 mb/google/bluey: Avoid using uninitialized EDID data
* 02e5c1c39c mb/google/calypso: Add dependency on I2C_TPM for DRIVER_TPM_I2C_ADDR
* b8bd5a5639 mb/google/calypso: Add Calypso board variant to Kconfig
* 201392d363 mb/google/calypso: Rename mensa mainboard directory to calypso
* b1a374e635 mb/google/mensa: Reduce RW_CDT partition size to 4K
* eaaa63791a mb/google/mensa: Change fingerprint interface from SPI to USB
* e187893fa9 mb/google/mensa: Rename Kconfig symbols from MENSA to CALYPSO
* c22ab9f535 mb/google/bluey: Select SOC_QUALCOMM_CDT and shrink RW_CDT partition
* a4ee53610f soc/qualcomm/x1p42100: Include cdt.c in romstage compilation
* 598504962e soc/qualcomm/common: Read and populate CDT data
* f3f8e7f61c memlayout: Introduce CDT_DATA region
* b6a87477d7 soc/qualcomm/common: Introduce SOC_QUALCOMM_CDT Kconfig option
* 681c5a219b mb/google/bluey: Enable DAP for Quenbi and Mica variants
* 8792766e05 mb/google/bluey: Support configurable DAP SMBs Slave IDs
* 7d863336bc mb/google/bluey: Increase charging rail stabilization delay to 5s
* 6fa8d2c415 mb/google/bluey: Select splash logo based on panel resolution
* 7a533becf2 soc/qualcomm/common: Add debug dump for mem_chip_info
* f502f316f2 mb/google/*: Add disable_heci1_at_pre_boot to CFR ME options
* e3111a3dc2 soc/intel/common/cse: Add CFR override for disabling HECI1 at end of boot
* 15529219c9 soc/amd/common/block/cpu: Enable cache on S3 resume
* 53561b7903 soc/amd/common/block/spi: Enable SPI_FLASH_SFDP for all SoC
* 4e522f49b6 drivers/ck505: Add pre and post hooks
* 83977273f1 mb/asus: Add ASUS Maximus VI Impact (Haswell)
* 1e49b5c385 mb/starlabs/starfighter: fix touchpad settings not being applied
* 1f05ba35b9 mb/starlabs/starfighter: Add missing WiFi and Bluetooth controls
* 049a580bbf mb/lenovo/sklkbl_thinkpad: Enable TBT support for T580
* ec6856785d sb/ricoh/rl5c476: Fix building for 64-bit targets
* 4a5422fb99 lib/thread: Use standard doubly linked list API
* 41d55fae84 commonlib/list: Add list_pop()
* 25d3809ea3 payloads/edk2: Update default MrChromebox branch from 2511 to 2603
* 577f30851d util/chromeos/crosfirmware: Update recovery inventory parsing
* 7dfe91fe0b soc/intel/cometlake: Always select PMC_IPC_ACPI_INTERFACE
* 653e2fee68 mb/amd/crater: add and use APCB recovery file
* 7222e5911b acpi/dsdt_top.asl: Add hook to enable routing in APIC mode
* 9f65c47ea7 lib/timestamp: Fix get_us_since_boot()
* 6bd55cf269 soc/amd/cezanne: Select SOC_AMD_COMMON_BLOCK_HDA
* 3cd83d2ce0 mb/google/bluey: Reset eDP and disable backlight on display stop
* e5a73dc9e6 mb/google/bluey: Use common APIs to configure PMIC GPIOs
* 4c784a6f3a soc/qualcomm/x1p42100: Define PMIC slave IDs
* 355658054a soc/qualcomm/x1p42100: Include new PMIC GPIO APIs in ramstage
* a3bf18f3b2 soc/qualcomm/common: Add APIs to configure PMIC GPIOs
* 1b2c0f8aca mb/google/bluey: Switch fingerprint sensor to USB interface
* 3976f8ed0d mb/supermicro/x11-lga1151-series: Enable SATA hotplug
* bc2092acd4  mb/google/jecht: Add CFR options for CPU undervolt
* 8d2e8295c5 mb/google/jecht: Add CFR PL1/PL2 package power overrides
* d1633f5cc1 mb/google/beltino: Add CFR options for CPU undervolt
* ef8f4d7ac5 mb/google/beltino: Add CFR PL1/PL2 package power overrides
* 32f16591aa mb/google/puff: Add CFR options for CPU undervolt
* a612fdce4f mb/google/puff: Add CFR PL1/PL2 package power overrides
* faf5f0ea9e mb/google/fizz: Add CFR options for CPU undervolt
* e9239d2308 soc/intel/skylake: Add support for OC mailbox programming
* 1654e0a1de soc/intel/cannonlake: Add support for OC mailbox programming
* aaa396d571 cpu/intel/haswell: Add support for OC mailbox programming
* fa68b66686 drivers/intel/oc_mailbox: Add OC_MAILBOX undervolt driver
* b137be4d8f soc/amd/cezanne: Fix USB3 port aliases and USB port order
* b9e6bc61ce soc/amd/cezanne/acpi: Guard RTC workaround with CONFIG(CHROMEOS)
* 912817d316 Revert "mb/google/bluey: Temporarily skip display init in normal mode"
* ce74ab0d21 soc/qc/x1p42100: Remove framebuffer from generic MMIO reporting
* 889c42c177 device/pciexp_device: Fix SR-IOV detection
* 5a3e8f3076 soc/amd/glinda: Use SPI_FLASH_SFDP
* 67845716da drivers/spi/spi_flash_sfdp: Parse JEDEC SFDP
* a95ee50a7b mb/starlabs/adl/{i5,hz}: increase speaker output power to 2.5W
* 601bbd87bd mb/google/zork/vilboz: Set proximity INT as GPI for non-ChromeOS
* cbbf961526 arch/x86/acpi_bert_storage: Clear allocated structure
* 84c1b81540 Revert "soc/intel/common/power_limit: Raise PsysPL1 when package PL1 is above TDP"
* a5941ba5f8 soc/amd/common/psp: add support for early PSP v2 access via SMN
* b514b1e671 soc/amd/common/psp/Makefile: make ftpm.c build more conditional
* 40e56f2358 soc/qc/x1p42100: Define and reserve framebuffer region
* 499ab15def mb/google/bluey: Implement display initialization hooks
* 382f5e0cd4 mb/google/bluey: Add support for firmware splash screen
* c120e1b9fc mb/google/bluey: Temporarily skip display init in normal mode
* c6e0f28814 soc/qualcomm/x1p42100: Add eDP display support
* 61706268a6 soc/intel/common: Replace numbers with mask constants in power limits
* 38addfb24f mb/google/bluey: Power on NVMe rail earlier in boot
* 2f752c6341 util/cbfstool/flashmap/fmap.c: Fix buffer overflow
* 96a91bbaf9 mb/siemens/mc_ehl8: Reduce I2C clock rate to 100kHz
* 012bf817a9 soc/intel/common/block/power_limit: Remove unnecessary rdmsr
* 654f328474 soc/intel/common/power_limit: Don't disable package PL1 in MCHBAR
* f7bb12e423 mb/google/bluey: Set GPIO206 as output low on Bluey
* f0211870e0 soc/amd/{turin,genoa}_poc: Select SOC_AMD_COMMON_BLOCK_HAS_ESPI1
* f6cd320061 acpi/acpigen_pci_root_resource_producer.c: Report TPM MMIO in domain 0
* bb0e107ebd soc/intel/common: Add hardware limit validation for power overrides
* c803ca2ed6 amd/common/block/pci/acpi_prt.c: Add SoC hook to get GSI base
* 8e57010d88 mb/google/bluey: Use slow charging if battery is less than 2%
* 432703dd7a mb/siemens/mc_ehl7: Deactivate IGD
* eda62af9dd mb/google/bluey: Implement slow-to-fast charging transition logic
* 1dc346e61e cpu/intel/haswell: Add option-backed PL1/PL2 overrides and package limit lock
* 0d95bb5158 mb/google/fizz: Add CFR PL1/PL2 package power overrides
* 6c10b07146 mb/google/fizz: Refactor mainboard_set_power_limits()
* 976149a2f7 soc/intel/common/power_limit: Raise PsysPL1 when package PL1 is above TDP
* bdf757aa86 soc/intel/common/power_limit: Add option-driven PL1/PL2 overrides and locking
* f45d6e696a mb/google/bluey: Configure sink sensor for DAM port
* 63fc231480 AUTHORS: Update with new authors from the 26.03 release
* f67b5ed6fd util/release: add get_new_authors helper
* 7bcb90047e mb/google/nissa/var/pujjoniru: Add 2 Micron modules to RAM id table
* c683673095 mb/google/nissa/var/yavilla: Add RAM ID H58G56BK8BX068
* 66ed61a73c b/google/brox/var/lotso: Add RAM ID for MT62F1G32D2DS-031RF WT:C
* 6d3e13a33a mb/google/bluey: Conditionally enable FP rails in normal boot
* 137b9c59ea mb/google/var/fatcat/lapis: adjust 'cirrus,detect-us' property to  improve the noise situation
* d381d33a39 soc/soc/amd/glinda: Hook up STX VBIOS
* 1b284012b8 mb/starlabs/starfighter: add configurable touchpad tuning
* 97d616b927 soc/amd/common/block/spi: Add helper functions
* 102b9b42ae mb/google/skyrim/var/frostflow: Add non-ChromeOS TBMC support
* d012a678e2 mb/google/guybrush/var/dewatt: Add non-ChromeOS TBMC support
* 7eb70b259b mb/google/zork: Set correct SYSTEM_TYPE for all variants
* dbd05fc2da mb/google/kahlee: Set correct SYSTEM_TYPE for all variants
* 45378e6fc2 mb/google/guybrush/dewatt: Mark board as convertible
* 227dbbad4a mb/google/skyrim: Use GpioInt wake for touchpad and fingerprint reader
* fe445f4b9d mb/google/skyrim: Use level-triggered IRQ for touchpad and touchscreen
* 49803f2130 mb/google/guybrush: Use GpioInt wake for touchpad and fingerprint reader
* 62abc7aca0 mb/google/guybrush: Switch touchpad IRQ to level triggering
* 65858ad5c9 mb/google/zork/var/vilboz: Guard GPIO for SAR sensor
* fd5b6323ea mb/google/zork: Use GpioInt wake for touchpad and fingerprint reader
* e2c419bc44 mb/google/zork: Use level-triggered IRQ for touchscreens
* 30b8524ff5 soc/qualcomm/calypso: Enable basic PCIe support
* ba3b83e51e mb/google/mensa: Implement SKU ID retrieval
* 888cc7f92a mb/google/mensa: Initialize FP GPIOs in bootblock
* a6921f7fb9 soc/qualcomm/calypso: Add placeholder for early clock initialization
* 421c21c6cf soc/qualcomm/calypso: Initialize QSPI and QUPv3 in bootblock
* 0fc956cd2d mb/google/mensa: Set correct Kconfig defaults for peripherals
* 8dbf88a300 soc/qualcomm/calypso: Add QUP Serial Engine (SE) entries
* 79b6dde1a5 soc/qualcomm/calypso: Set correct Kconfig defaults for peripherals
* dde131c555 mb/google/mensa: Add initial support for Mensa
* 38e8eadfa7 soc/qualcomm/calypso: Add initial SoC skeleton for Calypso
* c7a7fbbf2c soc/qualcomm: Add support for QUPV3 wrapper 3
* cb05d160d4 soc/qualcomm/x1p42100: Rename SOC_QUALCOMM_BASE to include SoC name
* b8ed516097 mb/google/bluey: Defer display initialization based on boot mode
* 9bfab15070 docs/mb/hp: fix link to Sure Start whitepaper, add another
* e839059435 mainboard/starlabs/common: enable OPAL S3 unlock
* 9fc27f4b15 soc/intel/common/pcie/rtd3: Add RTD3 support for OPAL S3 unlock
* 468f8131ec security/tcg/opal_s3: hook into default SMI/resume paths
* 36a4d92239 util/amdfwtool: Fix APOB_NV quirk
* e57478e238 treewide: Apply nonstring attribute to unterminated strings
* 492b7c7c09 soc/amd/common/block/psp: Add commands for A/B recovery
* cf541343a9 ec/lenovo/h8: Implement LOGO LED
* 7609822730 mb/starlabs/*: disable TCO Intruder SMI
* 26d005fb30 mb/starlabs/starfighter: use safe shared panel PWM frequency
* 25eee46bbc mb/starlabs/starbook/{adl,rpl,tgl}: raise panel PWM frequency
* bfaadde071 mb/starlabs/starbook/{adl_n,mtl}: raise panel PWM frequency
* d4bfac6564 mb/starlabs/adl/i5: use safe shared panel PWM frequency
* 1ca1c60019 mb/starlabs/adl/hz: raise panel PWM frequency to 10kHz
* e970b9b0df mb/starlabs/adl/hz: restore panel minimum brightness
* 9f6ae2b5a2 mb/starlabs/starbook/{adl,rpl,tgl}: fix panel timings
* f13a9cb910 mb/starlabs/adl/i5: fix panel timing values against datasheet
* d0e2b5df61 mb/starlabs/starbook/{adl_n,mtl}: fix panel timings
* f1bc59e66e mb/starlabs/starfighter: fix panel timing values against datasheet
* 040ff1ff39 mb/starlabs/adl/hz: fix panel timing values against datasheet
* ed261d5447 mainboard/starlabs/common: include acpi_gnvs.h in gnvs.c
* f1505f5e46 mb/google/zork: Add MKBP support
* a5b5591d31 mb/google/reef: Add MKBP support
* 134b3e050a mb/google/octopus: Add MKBP support
* caf980b3fa mb/google/hatch: Add MKBP support
* 1a75cd1da2 mb/google/glados: Add MKBP support
* f1e95c5536 mb/qemu/riscv: Intialize PCI root bus
* c5e905fa21 util/mec152x/Makefile: Include commonlib/bsd/compiler.h
* 576515394c util/amdfwtool: Use uint8_t for bitfields
* 800d3dbef4 soc/qualcomm/x1p42100: Support separate RO/RW CPUCP binaries
* c0e82f6963 3rdparty/amd_blobs: advance submodule pointer
* 82de37d171 libpayload: Makefile.mk: Fix unrecognized option '--no-weak'
* e021937f35 soc/amd/glinda: Add RAS Kconfig options
* e232934f6f mb/google/nissa: Create dirkson variant
* 79c98cca80 mb/google/volteer: Add non-ChromeOS TBMC support for 360/flip variants
* f867d8f76b mb/google/dedede: Add non-ChromeOS TBMC support for 360/flip variants
* 25ad0950a8 mb/google/brya: Add non-ChromeOS TBMC support for 360/flip variants
* a8615bed6b mb/google/cyan: Add support for EC mode change event
* 8f5477d92d mb/google/volteer: Set correct SYSTEM_TYPE for all variants
* 7b87cda615 mb/google/reef: Set correct SYSTEM_TYPE for all variants
* 7995a1d3ea mb/google/octopus: Set correct SYSTEM_TYPE for all variants
* 14ef332242 mb/google/hatch: Set correct SYSTEM_TYPE for all variants
* 3f10068936 mb/google/glados/var/caroline: Mark board as convertible
* 025c0edeb2 mb/google/dedede: Set correct SYSTEM_TYPE for all variants
* c049dcc271 mb/google/brya: Set correct SYSTEM_TYPE for all variants
* ecab793650 ec/chromeec: Add Kconfig and asl for vendor tablet ACPI
* 1769b10be0 mb/google/bluey: Lower CPU frequency to 710.4MHz for low-power boot
* 710df33471 mb/google/bluey: Signal ADSP to skip Type-C port resets during boot
* 521e7949c1 mb/google/bluey: Add support to reduce CPU clock to minimum frequency during OFF‑mode charging
* 9a86b9f729 mb/google/bluey: Integrate ADSP load and LPASS bring-up into charging flow
* 8beca96470 soc/qualcomm/x1p42100: Add LPASS bring-up sequence for ADSP cold boot
* a58f752d0f soc/qualcomm/common: add CBCR disable and config helpers
* 2e3e690023 soc/qualcomm/x1p42100: Support to load ADSP Lite firmware
* 1c6f4618b6 mb/google/bluey: Allow charger behind DAM
* 94dd3f3bba soc/qualcomm/x1p42100: Increase boot CPU frequency to 3.0GHz
* da36276955 smbios: Add smbios_cache_speed() implementation
* 6f7f27e6c1 soc/qualcomm: Relocate translation tables to DRAM
* 4320fe713a mb/google/brask/var/constitution: Generate RAM ID for Samsung K4UBE3D4AA-MGCR
* d43421da65 mb/google/nissa/var/quandiso: Generate RAM ID for SL5D32G32C2A-HC0
* 28fbd247f6 spd/lp5x: Generate initial SPD for SL5D32G32C2A-HC0
* d72d7d1ba0 soc/amd/common/block/spi: Check if ROM Armor is enforced
* cd8072191d soc/amd/common/block/psp: Get ROM Armor state from HSTI
* b42d148171 soc/qualcomm/x1p42100: Define CPUCP region and map in MMU
* 92fa2bbd09 soc/qualcomm/x1p42100: Disable compression for CPUCP payload
* 6c8a2a6ea1 soc/amd/glinda: Use VBIOS from amd_blobs
* ff7bc7d2d1 drivers/amd/ftpm: Fix compilation
* ab63331423 mainboard/starlabs/lite: Remove unused header
* a19b5b4b17 mainboard/starlabs/starfighter: Remove unused header
* c4e44caef8 mainboard/starlabs/starbook: Remove unused headers
* b0ff1cdd28 mainboard/starlabs/adl: Remove unused headers
* d319b33114 mainboard/starlabs/common: Remove unused headers
* b137044a39 ec/starlabs/merlin: Remove unused halt.h
* 7bc3561803 ec/starlabs/merlin: Include stdint
* e657f5da15 mainboard/starlabs: drop redundant vbt.bin overrides
* b7faa4c51a amdfwtool: Allow to set bios entry 0x6d (AMD_BIOS_NV_ST)
* 8e04206f28 amdfwtool: mark AMD_BIOS_APOB_NV BIOS directory entry as writable
* 8549c6894a amdfwtool: Make NVRAM regions writeable
* 1928db74a1 Documentation: Finalize 26.03 release notes
* aa27204240 mb/google/fatcat/variants/moonstone: Implement BOE touchscreen power timing
* dc41e46b7f google/fatcat: Move mainboard_pre_dev_init_chips hook to BS_ON_EXIT
* 3f46d6fd93 mb/google/bluey: Use safe SPMI reads for battery current telemetry
* 2f93e4331e soc/qualcomm/common: Add spmi_read8_safe helper with retry logic
* 444691603d mb/google/bluey: Support RTC wake-up boot mode
* 941597e52f {commonlib, libpayload}: Add RTC_WAKE to boot_mode_t
* 34f67580b5 ec/google/chromeec: Add API to check for RTC host event
* b00bfdd1e0 mb/google/bluey: Refactor SE firmware loading into early/late stages
* 1f2ea3c13e mb/google/bluey: Initiate PCIe link training in romstage
* f56a936c54 soc/qualcomm/x1p42100: Allow asynchronous PCIe initialization
* f1baed6f79 soc/qualcomm/common: Implement asynchronous PCIe initialization
* 8a90e46346 soc/qualcomm/x1p42100: Increase CBFS_MCACHE size to 22K
* 4b227a4aa6 arch/arm64: Add debug API to dump MMU page table configuration
* 99d409d3ba arch/arm64: Add support for TTB relocation to DRAM
* 493770d730 mb/starlabs/starfighter/mtl: add speaker idle CFR option
* f3c656b76a soc/intel/common/block/smm: drain sync smi around smmstore
* a215e07533 mb/google/nissa/var/craask: Add H58G56CK8BX146 to RAM ID table
* a7773d3ab3 mb/google/fatcat: Modifying parameters for AC only
* 05246a5934 mb/asus: Add Maximus VII Impact (Haswell/Broadwell)
* 0f30eed3e8 Doc/nb/intel/haswell: Fix typo
* 5e146277ae Doc/nb/intel/haswell: Drop outdated section about SPD addresses
* 86b3901ba5 mb/google/bluey: Monitor thermal sensors during charging
* 657bd42548 soc/qualcomm/x1p42100: Define TSENS controllers and thermal zones
* 53529b1d93 soc/qualcomm/common: Add Qualcomm TSENS support
* 9e7c787f6d soc/qualcomm/x1p42100: Add 806 MHz CPU clock definition
* e5c99fe9e0 Documentation: Add coreboot release 26.06 template
* 8791c5292d Documentation/releases: Update release notes for 26.03 release
* 1063e564e7 Documentation/vboot: Update list of vboot-enabled devices
* 8ff1a9a08c vc/tcg/opal: add OPAL packet builder for S3 unlock
* 30cd6efc29 util/amdfwtool: rename Faegan SoC to Krackan2e
* 1555a1a235 util/amdfwtool: rename Glinda SoC to Strix
* dc315c8f51 soc/amd/common/block/psp: Drop send_psp_command_smm
* 49f53bbb38 include/acpi/acpi_pld.h: Fix order of colour components
* e0bc32ce61 mb/google/brya: Add CFR-based storage selection for taeko/taniks
* db3e23d505 lib/fw_config: Add mainboard hook for selective probe override
* 225fd5e448 3rdparty/intel-microcode: Update to upstream main
* ac5722a66f 3rdparty/fsp: Update to upstream master
* 7bfad23a15 mb/google/bluey: Enable GBB_FLAG_ENABLE_ADB for development
* a649c82f7a security/vboot: Add option for enabling ADB via GBB flag
* 4943cfe4d0 soc/intel/pantherlake: Remove unsupported WCL CPU ID mappings
* 9a40f080ac security/tcg/opal_s3: add OPAL NVMe Security Send/Receive helpers
* 537f2acc67 vc/intel: add TCG storage core subset for OPAL S3
* fbd755341a security/tcg: add OPAL S3 unlock Kconfig
* 42a114e23f mb/google/nissa/var/teliks: Generate RAM ID for BWMYAX32P8A-32G
* a6b7fa5474 mb/google/brask/var/moxoe: Disable SAGV
* d74cf143fe mb/google/brask/var/kulnex: Disable SAGV
* 09d689561a soc/mediatek/common: dsi: Fix CPHY hfp_byte error check
* 674000732d drivers/intel/dtbt: Skip mailbox commands on downstream bridges
* b03b42285e soc/intel/{mtl,ptl}/fsp_params: Program PcieRpSlotImplemented
* e17cc395af soc/intel/alderlake/fsp_params: Drop !! in builtin root port check
* 11e9550e0c soc/intel/common/smm: Use cpu/x86 save_state ops
* ce1db1f54a cpu/x86/smm: reserve SMRAM for OPAL S3 state
* 9422dacdb8 mb/google/brask/var/moxoe: Remove weak symbols for memory config
* 53222f1ccb mb/google/brask/var/kulnex: Remove weak symbols for memory config
* 5bb8b30c03 nb/intel/haswell: Enable SA clock gating later
* a0be26ef5f nb/intel/haswell: Fix IOMMU early init
* 60994cf395 nb/intel/haswell/early_peg.c: Simplify implementation
* fed6f9494d nb/intel/haswell: Move early PEG stuff to separate file
* 76290e8cdc nb/intel/haswell: Move PEG device macros to header
* e7cfcec7a7 nb/intel/haswell: Use `report_cpu_info()` from CPU code
* f730ec6992 cpu/intel/haswell/report_cpu_info.c: Update CPUID info
* f249991e9d cpu/intel/haswell: Fix CPUID macros
* 96ab0c9942 nb/intel/broadwell: Move `report_cpu_info()` to CPU code
* 7c35218c88 nb/intel/broadwell/report_platform.c: Constify string array
* 4ea3450e45 nb/intel/broadwell: Use registers from Haswell
* 342d77a0dd nb/intel/broadwell: Rename `MCH_PAIR` to `INTRDIRCTL`
* 31f4c30a08 nb/intel/broadwell: Clean up cosmetics
* 53bc76856c nb/intel/broadwell/gma.c: Retype some variables
* 1172a4e6ee mb/google/brya/var/yavilla: Set LGD touchscreen HID address to 0x01
* 5c20d9ce76 3rdparty/amd_blobs: advance submodule pointer
* 817394f12c Makefile.mk: generate EDK2 update capsule
* bf037f3961 mb/emu/qemu-sbsa: Add GIC ITS and IORT for PCI MSI support
* e69bfef7c0 mb/emu/qemu-sbsa: Set io_port_mmio_base for PCI I/O port support
* dc7bf7e3f9 mb/google/bluey: Enable source mode on debug access port
* e9e4f7609c mb/google/bluey: Move QUP-GSI init/load to normal boot path
* 19e1b5c44b soc/mediatek/mt8196: Change dsi-phy1 & dsi-phy2 control method
* e6fb0faf7b soc/qualcomm/x1p42100: Skip redundant MMU toggling for QCLib
* deb510afeb cpu/x86/smm: add OPAL S3 CBMEM scratch
* 513899c3c8 vc/amd/opensil/phoenix_poc: Adjust headers from Genoa to Phoenix
* a616a589a2 vc/amd/opensil: Add Phoenix OpenSIL POC directory as a copy of Genoa
* 71effade58 mb/google/eve: Work around CLKREQ# timing erratum
* faf12bcacd soc/intel/skl: Allow disabling CLKREQ# independently of SrcClk
* 07e4cc0cc3 mb/google/fatcat: Set CPU ratio override in devicetree
* 94168f10bc Reland "mb/google/bluey: Configure GPIOs for USB camera"
* 975613717a mainboard/starlabs/starfighter: Convert SPD sources to JSON
* dda351b895 mainboard/starlabs/adl: Convert SPD sources to JSON
* 5202b1371d mainboard/starlabs/adl: Convert i5 SPD sources to JSON
* 2c9f1600e0 src/lib: Generate spd.hex from JSON at build time
* 9a8d22dcaa util/spd_tools: Improve spd_gen CLI for Make
* 3249ad1d7f mb/google/rex: Add SOF chip driver to screebo, kanix, karis
* 88eea9da6d vendorcode/amd/opensil/turin_poc: Pass microcode pointer to OpenSIL
* 39017d2257 amd/microcode: Add API to obtain address on microcode update block
* 6ce607eee4 mb/emu/qemu-sbsa: Add missing PCIe ACPI methods
* 5458b34de6 soc/intel/meteorlake: Use Arrow Lake FSP
* bd2c7443f3 soc/intel/ptl: Add ISCLK for controlling PCIe clock source
* 5e8cf41845 mb/google/bluey/mica: Add MAINBOARD_NO_USB_A_PORT configuration
* 2107e48c09 mb/google/nissa/var/telith: Generate RAM ID for BWMYAX32P8A-32G
* 1d17c9522f mb/google/trulo/var/kaladin: Add LGD touchscreen
* 4d9cb5336f mainboard/starlabs: drop display_native_res VBT toggle
* 9bb822dbf8 Update vboot submodule from 2024 to upstream main 2026
* 0be563503a mb/google/rauru: Support new bias IC TPS65130RGER
* 5d6061d0ba util/amdfwtool: add support for Strix Halo SoC
* 391d5f3cb4 mb/google/ocelot/var/ojal: Enable dtt and ish based on FW config
* df470521a7 mb/asus/p8x7x-series: Enable single PS/2 port role control
* a402a87405 mb/asus/p8z77-v_le_plus/cmos.layout: Extend checksummed area
* bbbc655b15 Revert "mb/google/bluey: Configure GPIOs for USB camera"
* fc312590d1 drivers/efi: Derive ESRT version from LOCALVERSION
* baae037f25 mb/google/bluey/mica: Add PS8820 re-timer configuration
* 40abf7946c mb/starlabs/adl/hz: Add missing cnvi_bt_core parameter
* 35dbfac13a mb/google/rex/var/karis: Add H58G56CK8BX146 to RAM ID table
* 4734da172b memlayout: Introduce PRERAM and POSTRAM TTB regions
* 0be9f20be4 soc/intel/pantherlake: Add icc_max settings for WCL SKU
* bf5aa04d8b soc/qc/common: Configure framebuffer as uncacheable
* ee3aef1c72 mb/google/bluey: Add AC unplug detection and charging status indication
* 0449fb45a6 mb/google/bluey: Refactor and secure low-power charging boot path
* b7ca29ba92 mb/google/bluey: Power off if charger applet fails to enable charging
* ddac3082ea mb/google/fatcat: Enable ChromeOS EC LED control for variants
* a1173d9bc1 mb/google/bluey: Enable ChromeEC LED control for Quartz and Mica
* eb5bdf06b9 soc/intel/pantherlake: Add power state thresholds for WCL
* bf6b14e4f7 mb/google/ocelot: Add VR_DOMAIN_IA for fast_vmode_i_trip
* 026bac6de7 arch/x86/ioapic: Add Kconfig option to keep pre-allocated IOAPIC ID
* d251282f2d Kconfig: move IOAPIC option to x86 Kconfig
* 1bdfc97c54 lib/cbfs: Enable LZ4 decompression in pre-RAM stages
* 1965a8740d mb/google/brox/var/caboc: Set LGD touchscreen HID address to 0x01
* 50ce94d715 Revert "soc/intel/pantherlake: Fix DDR5 channel mapping"
* ea58a467f1 Revert "soc/intel/pantherlake: Fill in SPD data on both channels of DDR5 memory"
* 92a430baee mb/google/fatcat/var/lapis: Modify parameters to reduce acoustic noise
* 4caf5ab903 soc/qualcomm/sc7280: Fix extended EDID read over I2C-over-AUX
* fd5f062446 mb/asus/p8x7x-series/*tree.cb: Consolidate gen1_dec into baseboard
* 6200d53e31 mb/google/bluey: Use LPASS GPIO configure API for Soundwire GPIOs
* 1d8c536d79 soc/qualcomm/x1p42100: Add API to configure LPASS GPIO
* 1e1b63c23b commonlib/device_tree: Utilize list_move() in dt_copy_subtree()
* 89048780c0 commonlib/list: Add list_move()
* 00e3b9989c lib: Rename devtree_update to mb_devtree_update
* b1194a838b mb/starlabs: Use common devtree_update mechanism
* 346a4ccaef mb/google/fatcat/moonstone: Add Samsung LPDDR5 memory parts
* fd6c0aa55b util/scripts: Add spd-decode for LPDDR5 SPD hex
* 2ac2df0eda sb/intel/wildcatpoint/pcie.c: Reorder some steps
* 59ac2cb2c0 sb/intel/wildcatpoint/pcie.c: Drop redundant write
* 44901340bf sb/intel/wildcatpoint/pcie.c: Ensure OBFF is disabled
* d74570b01e sb/intel/wildcatpoint/acpi: Use Lynx Point files
* 9541171de4 sb/intel/wildcatpoint/acpi: Move platform.asl to mainboards
* 762b564f3b mb/google/bluey: Add timeout for charging rail stabilization
* 61657cff8f spd/lp5: Add SPD for SK hynix H58G56DK9BX068
* 8aa0ea4062 soc/intel/pantherlake: Keep default values for TdcTimeWindow
* c97e740981 mb/google/ocelot: Fix fast_vmode_i_trip indexing in devicetree
* aaddb83491 soc/intel/pantherlake: Configure TDC IRMS mode for WCL IA domain
* f12d2997fc lib/cbfs: Don't include unused LZ4 code to shrink postcar stage
* c772a88b1d configs: Remove starbook/adl option table config
* dfc2c45ff4 util/inteltool: Add support for Wellsburg
* 23db1b3686 mb/google/bluey/mica: Add mainboard part number
* b5a703e5a0 mb/google/skywalker: Add mainboard_prepare_cr50_reset()
* 8a4937bf8f soc/mediatek: Add mtk_mipi_panel_poweroff()
* a300b135c3 soc/mediatek/mt8196: Call mtk_mmu_disable_l2c_sram via boot state
* 510e43d8bd soc/mediatek/mt8196: Move WATCHDOG_TOMBSTONE from SRAM to SRAM_L2C
* 2f88fec014 mb/google/bluey/mica: Add TPM I2C and EC SPI configuration
* 1b5df51c51 soc/intel: Fix Kconfig select order
* b52236fe9e soc/intel/pantherlake: Switch to common finalize implementation
* 5c56b9ff72 soc/intel/meteorlake: Switch to common finalize implementation
* ae932349bf soc/intel/common/block: Add common finalize implementation
* c9ba628d51 soc/intel/elkhartlake: Switch to common global reset implementation
* 73e89322ce soc/intel/jasperlake: Switch to common global reset implementation
* 0277c75bdd soc/intel/cannonlake: Switch to common global reset implementation
* 2ff987f906 soc/intel/tigerlake: Switch to common global reset implementation
* 0d4b934726 soc/intel/pantherlake: Switch to common global reset implementation
* 5c85dcda7f soc/intel/meteorlake: Switch to common global reset implementation
* b2a533c918 soc/intel/alderlake: Switch to common global reset implementation
* e4ea840114 soc/intel/common: Add common global reset implementation
* 7d8acb88c5 soc/intel/pantherlake: Switch to common PMC lockdown driver
* 4da2622964 soc/intel/meteorlake: Switch to common PMC lockdown driver
* 19fe81f08f soc/intel/alderlake: Switch to common PMC lockdown driver
* e160f3c506 soc/intel/common/feature: Add common PMC lockdown driver
* fec793e01d sb/intel/wildcatpoint/acpi: Add CID for GPIO device
* bacb55e348 nb/intel/broadwell/acpi.c: Use Haswell's file
* 3e89a234ef nb/intel/broadwell/acpi.c: Align with Haswell
* 958bc5cdff nb/intel/broadwell: Move `size_of_dnvs()` to southbridge
* 35694d2ea4 nb/intel/broadwell: Move device NVS to southbridge
* 3d4f2efcf7 nb/intel/broadwell/bootblock.c: Use Haswell's file
* 7240bbabe9 nb/intel/broadwell/acpi.c: Drop unneeded includes
* 4eb0fd7bea nb/intel/broadwell: Move PCH headers to wildcatpoint
* 0bc5746188 soc/intel/broadwell: Move to nb/intel/broadwell
* d740cee2d9 soc/intel/broadwell/pch: Move to sb/intel/wildcatpoint
* 0d2a0512fd sb/intel/lynxpoint: Configure IOSF Port and Grant Count
* 8b69dcccb2 sb/intel/lynxpoint/pcie.c: Add additional disable steps
* 381ce51ec4 sb/intel/lynxpoint/acpi: Add HIDs for Wildcat Point
* 6953c591ba sb/intel/lynxpoint/acpi/serialio.asl: Add more _PS0/_PS3 methods
* 0e9c2f53b0 haswell/broadwell: Move CPU bus ops to CPU code
* e0715bc0f9 soc/intel/pantherlake: Disable PCIe PM in compliance test mode
* bce8d28a59 MAINTAINERS: Add Nicholas Chin for autoport
* b6ebb24a48 util/spd_tools/src/spd_gen/lp5.go: Support LP5X 9600Mbps
* 13bf2d9566 mb/google/fatcat: Enable C1 and package C-state auto-demotion
* 56e645d942 mb/google/fatcat: Change Gen4 and Gen5 NVMe power sequence
* 8998999eb3 Haswell NRI: Add dumping of CAPID registers
* 343f439801 util/inteltool: set amb registers dumping error print to stdout
* 26006cc217 util/ifdtool: show overlapping region name and range details
* 93444a0ce0 mb/emul/qemu-[q35,i440fx]: Create ICQR interrupt resource locally and use defined offset
* 036af49b1d mb/emul/qemu-q35: Add a _DIS method for gsi_link devices
* f5c9c1c166 mb/google/bluey: Move ADSP QUP-I2C init to normal boot path
* 61c69ebfa8 mb/starlabs: Drop PCIe detect-timeout/hotplug workarounds
* baadfed999 mb/starlabs/adl: Add NVMe power sequencing
* 49a5b949ca mb/starlabs/starbook: Add NVMe/WiFi power sequencing
* 279406cd14 mb/starlabs/starfighter: Add NVMe port power sequence
* 0306eb0723 mb/starlabs/common: add NVMe power sequencing helper
* cfbf8f3953 starlabs: drop CMOS option tables
* 9dac2b9e53 ec/starlabs/merlin: persist settings via EFI options
* 3fa3818e41 starlabs: add ACPI SMI bridge for EFI options
* 484e39c068 mp_init: Pass microcode size to MPinit
* ea1a722d2b soc/intel/xeon_sp: Move microcode loading
* 08e3ad9e03 mb/google/brox/var/juchi: Add 2 memory parts and generate DRAM IDs
* ba6de6c866 mb/google/fatcat/var/ruby: Set ISH GP1 gpio pin to NC
* fb2e8b5e1e mainboard/google/bluey: Enable charging debug access in common path
* ca9b46d341 soc/mediatek: Add common low battery poweroff handling
* c222118cbf soc/qualcomm/x1p42100: Remove redundant VBUS enablement logic
* 2c58402339 soc/qualcomm/x1p42100: Configure OTG buck for USB host
* 10f0a87824 soc/qualcomm/sc7280: Update console message type non-fatal
* 270e84e59f vc/chromeos: Provide inline fallbacks for Chromebook Plus branding
* fe506bfe84 ec/google/chromeec: Add Kconfig for AP-controlled LED sync
* 12710eafff mb/google/bluey: Implement off-mode charging applet
* a1dd5f05b0 ec/google/chromeec: Add interface for offmode heartbeat command
* 125d9c8643 soc/qualcomm/x1p42100: Add logic for secure boot blob paths
* 6de3d04c4e Kconfig: Add Kconfig for signed secure blobs
* 0a6142dfbe soc/amd/turin_poc: Add SPI TPM SoC-specific initialization
* dde872911a mainboard/starlabs: drop unused TJ_MAX option
* 724176a218 mainboard/starlabs: namespace PL4 powercap setting
* 5156ec4533 mainboard/starlabs/adl: move SSDT hook to variant
* ffad2454c4 mainboard/starlabs/adl: drop redundant ASPM CFR guard
* 14fcb3baf8 mainboard/starlabs/adl: move CFR callbacks to variant
* 7f02993393 mainboard/starlabs: move starlite under adl/
* e02dc13b87 mainboard/starlabs: move Byte under adl/
* 3ea94fb2dc mb/starlabs/starfighter: Enable the card reader
* 56f588eec6 mb/starlabs/*: Don't consider fan presence for default power profile
* 19df8826d7 mb/starlabs/starlite_adl: Disable the card reader by default
* c940d20696 soc/intel: Consolidate common code macro definitions in pci_devs.h
* d03957e10f soc/intel/tigerlake: Use common PCH client SMI handler
* 402da237bc soc/intel/pantherlake: Use common PCH client SMI handler
* eb205e379a soc/intel/meteorlake: Use common PCH client SMI handler
* f0021f84ec soc/intel/alderlake: Use common PCH client SMI handler
* 4b73479c38 soc/intel/common/feature/smihandler: Add common PCH client SMI handler
* 2eb37453e5 soc/intel/meteorlake: Use common pmutil driver
* f0be882d9f soc/intel/pantherlake: Use common pmutil driver
* 2b70ce3fbf soc/intel/alderlake: Use common pmutil driver
* cc31cc0ab2 soc/intel/common/feature/pmutil: Add common pmutil driver
* 189f8d1a86 soc/intel/elkhartlake: Switch to common eSPI/LPC initialization
* aeb9db4467 soc/intel/jasperlake: Switch to common eSPI/LPC initialization
* 05006995b6 soc/intel/tigerlake: Switch to common eSPI/LPC initialization
* 7278030fa6 soc/intel/pantherlake: Switch to common eSPI/LPC initialization
* 4fe7e7fa36 soc/intel/meteorlake: Switch to common eSPI/LPC initialization
* 34be3842a1 soc/intel/alderlake: Switch to common eSPI/LPC initialization
* 0464f1032a soc/intel/common/feature/espi: Add common eSPI/LPC initialization
* f780b7c576 soc/intel/tigerlake: Use common SoundWire driver
* 620a33f1c8 soc/intel/pantherlake: Use common SoundWire driver
* ffc67b2938 soc/intel/meteorlake: Use common SoundWire driver
* ef364d623d soc/intel/alderlake: Use common SoundWire driver
* 74d4fac210 soc/intel/common/feature/soundwire: Add common SoundWire driver
* 7bee4f5efb mb/starlabs: Drop explicit devtree_update calls
* f8494fbeae lib: Add devtree_update bootstate hook
* 69242d5bb1 drivers/usb/acpi: Add DSM function 3 support for Intel Bluetooth
* 50e92c9cf1 mb/lenovo/m920q: Rename to reflect use for m720q variant as well
* e0c26a05d4 ec/starlabs/merlin: fix OSFG suspend comment
* ce5c915344 drivers/spi/flashconsole.c: Fix flashconsole
* c2eea0c96c mainboard/starlabs/adl: add Bluetooth RTD3 CFR option
* 7847a54eed mb/lenovo: Convert PNP device to generic device
* 091ae533b9 mb/lenovo/t430: Merge into t430 into t530
* 3a5e4660bb mb/lenovo/t530: Unify GEN_DEC entries
* 416875e93e mb/lenovo/t430|t530: Reduces differences in code
* 57f96b83fe mb/google/link/hda_verb: Remove presence detect flag from internal sources
* 6be9ee7ce4 mb/google/link: Use AZALIA_PIN_DESC macros for pin widgets
* 8718db133a mb/google/fatcat/var/lapis: Add 2 Micron modules to RAM id table
* f9f43d862d spd/lp5: Add Micron memory part
* c57b88d74d mb/google/brox/var/lotso: delete mb_get_channel_disable_mask
* 8ba58ef800 mb/samsung/lumpy: Correct NID 0x08 HDA pin config macro usage
* 38988a727e util/mediatek: Reduce non-boot related BROM settings
* e84415b8f8 mb/google/nissa/var/yaviks: Add micron memory to RAM ID table
* 08dcaf404c mb/google/nissa/var/yavilla: Add micron memory to RAM ID table
* 523242b2b9 google/bluey: Add RW_CDT region to flash map
* 5e46ac1364 mb/google/bluey: Resize WP_RO and add RW_UNUSED region
* 08f2f3a21b Haswell NRI: Implement 1D margin training
* 098a5cf16e mb/google/ocelot: Configure CDCLK frequency for display
* 7b205808e4 mb/google/rauru: Disable CHROMEOS_USE_EC_WATCHDOG_FLAG
* b1e8f87b30 mb/google/rauru: Enable MEDIATEK_WDT_RESET_BY_SW
* f4825e5c12 soc/amd/common: Add I3C driver
* cf5d6f1c88 soc/intel/common/block/gspi: Simplify Makefile using all-$()
* 56ede20f10 soc/intel/pantherlake: Use common SPI device function driver
* 4bdeb73635 soc/intel/meteorlake: Use common SPI device function driver
* 8ecff12528 soc/intel/alderlake: Use common SPI device function driver
* 0aea05411d soc/intel/tigerlake: Use common SPI device function driver
* 47f3e7e3cc soc/intel/jasperlake: Use common SPI device function driver
* 91520ab096 soc/intel/common/feature/spi: Add common SPI device function driver
* 0668959a92 soc/intel/skylake: Use common GSPI devfn mapping
* 45d3ab84a8 soc/intel/cannonlake: Use common GSPI devfn mapping
* 4aae5fb66d soc/intel/elkhartlake: Use common GSPI devfn mapping
* 78ef2d0433 soc/intel/jasperlake: Use common GSPI devfn mapping
* 66a6c25ef8 soc/intel/tigerlake: Use common GSPI devfn mapping
* 3c92c8402a soc/intel/pantherlake: Use common GSPI devfn mapping
* 6459039b76 soc/intel/meteorlake: Use common GSPI devfn mapping
* 039f21b5e3 soc/intel/alderlake: Use common GSPI devfn mapping
* a4bc3131a5 soc/intel/common/feature/gspi: Add common devfn mapping
* 253689aebb sb/intel/lynxpoint/acpi/xhci.asl: Guard PCH-LP methods
* 72ecebf0c3 soc/intel/broadwell/acpi/xhci.asl: Use macros for constants
* 813edbbde8 sb/intel/lynxpoint/acpi/xhci.asl: Use macros for constants
* 3cde265c28 sb/intel/lynxpoint/acpi/xhci.asl: Drop redundant writes
* a59ddda11e Doc/mb/protectli/fw6: describe revisions and more variants
* d5161611a4 soc/intel/pantherlake: Use common I2C devfn mapping
* 78e36f8c78 soc/intel/meteorlake: Use common I2C devfn mapping
* f703f2800c soc/intel/skylake: Use common I2C devfn mapping
* 7f922438be soc/intel/cannonlake: Use common I2C devfn mapping
* a0ba812a09 soc/intel/jasperlake: Use common I2C devfn mapping
* 83325f354b soc/intel/tigerlake: Use common I2C devfn mapping
* fe728d62c9 soc/intel/elkhartlake: Use common I2C devfn mapping
* 749bae2f94 soc/intel/alderlake: Use common I2C devfn mapping
* b21e861ab5 soc/intel/common/feature/i2c: Add common devfn mapping
* 34c156427d soc/intel/common/block/lpc: Fix AMASK decoding in window detection
* b50c219557 soc/intel: Use centralized emergency battery shutdown hook
* a96f1a464b mb/google/bluey: Use common platform hook for emergency shutdown
* 5c44e689ee vc/google/chromeos: Add platform hook for emergency battery shutdown
* 086d3a3232 mb/google/fatcat: Enable ChromeOS EC LEDs in romstage
* 2a821d8db6 mb/google/bluey: Early enablement of lightbar
* d39f406f55 mb/google/bluey: Disable lightbar during low-power charging boot
* b68ba24244 ec/google/chromeec: Add API to turn on lightbar
* 5f9a1ad962 ec/google/chromeec: Add API to turn off lightbar
* 4028996c9d mb/google/nissa/var/pujjoquince: Add support for Micron MT62F1G32D2DS-031RF
* 800db242bd {soc,sb}/intel: Drop named object from ASL `GPLD` method
* 57e30e6b9d mb/google/brask/var/moxoe: Switch memory to DDR5
* c069dc3eb1 mb/google/fatcat/var/ruby: Add settings for resolving EE noise
* 5ac3e40282 mb/google/brox/var/caboc: Probe LGD touchscreen by fw_config
* 61ce86ea3e mb/siemens/mc_ehl6: Reduce clock rate for I2C1
* acd8f42410 soc/intel/skylake: Use common UART device list driver
* a69d537e61 soc/intel/cannonlake: Use common UART device list driver
* e31d32443e Revert "mb/google/fatcat: Fix Gen4 SSD power sequencing"
* 7b4fb78e34 soc/intel/elkhartlake: Use common UART device list driver
* bb95093b8f soc/intel/jasperlake: Use common UART device list driver
* 61dc1e04e0 soc/intel/tigerlake: Use common UART device list driver
* 38baf0c5f6 soc/intel/meteorlake: Use common UART device list driver
* 44fcbf84b3 soc/intel/snowridge: Move defines to soc/pci_devs.h
* dfcd63370d cpu/intel: Use existing defines for MTRR_CAP_MSR
* fd2cdf206d cpu/intel/smm/gen1: Optimize cpu_has_alternative_smrr
* f96644e774 nb/intel/haswell: Do not print ME status twice
* d9bc4740da nb/intel/haswell: Fix DDR frequency reporting
* 6a1b016184 nb/intel/haswell: Tidy up memory info prints
* f89ac4e6ce soc/mediatek/common: Adjust splash logo bottom margin
* f01e11ac5c vc/intel/fsp/fsp2_0/wildcatlake: Update WCL FSP headers to version WCL.3515.03
* 326e33b82d soc/intel/pantherlake: Use common UART device list driver
* 3337e56b50 soc/intel/alderlake: Use common UART device list driver
* bb941824ca soc/intel/common/feature/uart: Add common UART device list driver
* 78295974f8 soc/intel/common: Add feature directory for SoC-specific common code
* f691421daf soc/intel/common: Replace CFR enums with booleans
* 24870f54e0 soc/intel/skylake: Replace CFR enums with booleans
* 666e66800c soc/intel/tigerlake: Replace CFR enums with booleans
* 12f99ab067 soc/intel/alderlake: Replace CFR enums with booleans
* 47bc0a727c soc/intel/jasperlake: Replace CFR enums with booleans
* 1b0147f05b soc/intel/meteorlake: Replace CFR enums with booleans
* b935d5b058 soc/intel/cannonlake: Replace CFR enums with booleans
* daa32be457 soc/intel/apollolake: Replace CFR enums with booleans
* 90f9d9e7c6 mb/google/poppy: Replace CFR enums with booleans
* 6b481c73dd mb/google/hatch: Replace CFR enums with booleans
* 9a58dc7fee mb/google/auron: Replace CFR enums with booleans
* e7c05d666c mb/google/volteer: Replace CFR enums with booleans
* 71b7167396 mb/lenovo/sklkbl_thinkpad: Replace CFR enums with booleans
* ed10b36edf ec/google/chromeec: Replace CFR enums with booleans
* d19e5d2550 ec/lenovo/pmh7: Replace CFR enums with booleans
* 0ff3c3d2ec ec/lenovo/h8: Replace CFR enums with booleans
* f9f81e4839 mb/lenovo/x220: Replace CFR enums with booleans
* 7e8850a862 mb/google/*/cfr.c: Drop initial empty line
* 220669643b soc/qualcomm: Add Kconfig to skip redundant MMU toggling
* c9578eac24 mb/google/ocelot: Add THC-SPI Touchscreen support in fw_config
* d88e98cf49 mb/google/fatcat/lapis: Remove RTD3 config for SSD
* 24866fefef mb/google/fatcat/var/lapis: Add UFSC bit of new FP MCU
* 33d873324e mb/lenovo/*: Drop unused ACPI code
* 571dbbe345 mb/lenovo/t430: Move TPM in devicetree.cb
* 06446dd0ac dram/ddr3: Add speed in MT/s
* bf148cae0a lib/dimm_info_util.c: Handle 16-bit memory bus extension for ECC
* a3923d678f ec/starlabs/merlin: fix ITE CMOS index mapping
* e47952c3a7 mb/asus/p8x7x-series: Enable common SIO ASL code
* e82ecc739d sio/nuvoton/nct6776: Switch to common init code
* e72a325c40 sio/nuvoton/nct{5535,6779}d: Use new common init code
* 65c4ea0bfb superio/acpi/pnp_kbc.asl: Allow changing device and PNP IDs
* 2de0c9575d sio/nuvoton/nct6776: Switch to common Nuvoton ASL code
* 94a356e0c8 sio/nuvoton/nct5535d: Use common ASL code
* 4cee52e457 sio/nuvoton/nct6791d: Enable common ASL code
* c30802d6fb sio/nuvoton/nct6779d: Enable common ASL code
* 7876bcaa86 sio/nuvoton: Implement common ramstage keyboard/ACPI init routines
* afeca9f422 mb/starlabs: disable TCO INTRUDER# SMI by default
* c996684f40 intel/smm: make TCO INTRUDER# SMI optional
* 339ef9b5c9 soc/intel/common/block/lpc: Improve automatic window opening
* f1e4de7fbf mb/google/dedede/var/galtic: Add fw_config option for touchpad type
* 08b05f56a6 Revert "mb/google/dedede/galtic: Add CFR option for touchpad type"
* ed5a993f0f mb/google/fatcat/lapis: Enable eSOL feature

Signed-off-by: Leah Rowe <leah@libreboot.org>

1 files changed, 872 insertions, 0 deletions

diff --git a/config/coreboot/default/patches/0011-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch b/config/coreboot/default/patches/0011-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
new file mode 100644
index 00000000..c3fee8c7
--- /dev/null
+++ b/config/coreboot/default/patches/0011-mb-hp-Add-Compaq-Elite-8300-CMT-port.patch
@@ -0,0 +1,872 @@
+From ae7d23355be8efbbe3a1216d8e28c30a07e2e0ef Mon Sep 17 00:00:00 2001
+From: Riku Viitanen <riku.viitanen@protonmail.com>
+Date: Sat, 23 Dec 2023 19:02:10 +0200
+Subject: [PATCH 11/51] mb/hp: Add Compaq Elite 8300 CMT port
+
+Based on autoport and Z220 SuperIO code.
+
+With SeaBIOS and Nouveau on Debian, only nomodeset works with GTX 780
+(must use proprietary driver instead).
+
+Tested by xilynx / spot_ on #libreboot:
+- i3-3220, native raminit 2x2GB, M378B5773DH0-CH9 + MT8JTF25664AZ-1G6M1
+- Celeron G1620, native raminit 1x4GB, MT8JTF51264AZ-1G6E1
+- Booting Debian with Linux 6.1.0-16-amd64 via SeaBIOS
+- All SATA ports
+- Audio: internal speaker, headphone and microphone plugs
+- Rebooting
+- S3 suspend and wake
+- libgfxinit: VGA, DisplayPort
+- Ethernet
+- Super I/O: fan speeds stay in control
+- GPU in PEG slot
+
+Untested:
+- EHCI debugging
+- Other PCI/PCIe slots
+- PS/2
+- Serial, parallel ports
+
+Change-Id: Ie6ec60d2f4ee50d5e3fa2847c19fa4cf0ab73363
+Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
+---
+ .../hp/compaq_elite_8300_cmt/Kconfig          |  39 ++++
+ .../hp/compaq_elite_8300_cmt/Kconfig.name     |   2 +
+ .../hp/compaq_elite_8300_cmt/Makefile.mk      |   7 +
+ .../hp/compaq_elite_8300_cmt/acpi/ec.asl      |   1 +
+ .../compaq_elite_8300_cmt/acpi/platform.asl   |  10 +
+ .../hp/compaq_elite_8300_cmt/acpi/superio.asl |  29 +++
+ .../hp/compaq_elite_8300_cmt/acpi_tables.c    |  12 ++
+ .../hp/compaq_elite_8300_cmt/board_info.txt   |   5 +
+ .../hp/compaq_elite_8300_cmt/cmos.default     |   7 +
+ .../hp/compaq_elite_8300_cmt/cmos.layout      |  74 +++++++
+ .../hp/compaq_elite_8300_cmt/data.vbt         | Bin 0 -> 3902 bytes
+ .../hp/compaq_elite_8300_cmt/devicetree.cb    | 177 ++++++++++++++++
+ .../hp/compaq_elite_8300_cmt/dsdt.asl         |  26 +++
+ .../hp/compaq_elite_8300_cmt/early_init.c     |  14 ++
+ .../compaq_elite_8300_cmt/gma-mainboard.ads   |  17 ++
+ src/mainboard/hp/compaq_elite_8300_cmt/gpio.c | 191 ++++++++++++++++++
+ .../hp/compaq_elite_8300_cmt/hda_verb.c       |  33 +++
+ .../hp/compaq_elite_8300_cmt/mainboard.c      |  16 ++
+ 18 files changed, 660 insertions(+)
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/cmos.default
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/data.vbt
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/gpio.c
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c
+ create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c
+
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
+new file mode 100644
+index 0000000000..d2bfd35dc4
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
+@@ -0,0 +1,39 @@
++if BOARD_HP_COMPAQ_ELITE_8300_CMT
++
++config BOARD_SPECIFIC_OPTIONS
++	def_bool y
++	select BOARD_ROMSIZE_KB_16384
++	select HAVE_ACPI_RESUME
++	select HAVE_ACPI_TABLES
++	select HAVE_CMOS_DEFAULT
++	select HAVE_OPTION_TABLE
++	select INTEL_GMA_HAVE_VBT
++	select INTEL_INT15
++	select MAINBOARD_HAS_TPM1
++	select MAINBOARD_HAS_LIBGFXINIT
++	select MAINBOARD_USES_IFD_GBE_REGION
++	select MEMORY_MAPPED_TPM
++	select NORTHBRIDGE_INTEL_SANDYBRIDGE
++	select SERIRQ_CONTINUOUS_MODE
++	select SOUTHBRIDGE_INTEL_C216
++	select SUPERIO_NUVOTON_NPCD378
++	select USE_NATIVE_RAMINIT
++
++config CBFS_SIZE
++	default 0x570000
++
++config MAINBOARD_DIR
++	default "hp/compaq_elite_8300_cmt"
++
++config MAINBOARD_PART_NUMBER
++	default "HP Compaq Elite 8300 CMT"
++
++config VGA_BIOS_ID
++	default "8086,0152"
++
++config DRAM_RESET_GATE_GPIO
++	default 60
++
++config USBDEBUG_HCD_INDEX # FIXME: check this
++	default 2
++endif
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name
+new file mode 100644
+index 0000000000..bd399b1e76
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name
+@@ -0,0 +1,2 @@
++config BOARD_HP_COMPAQ_ELITE_8300_CMT
++	bool "Compaq Elite 8300 CMT"
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk
+new file mode 100644
+index 0000000000..fb492d3583
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk
+@@ -0,0 +1,7 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++bootblock-y += early_init.c
++bootblock-y += gpio.c
++romstage-y += early_init.c
++romstage-y += gpio.c
++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl
+new file mode 100644
+index 0000000000..73fa78ef14
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl
+@@ -0,0 +1 @@
++/* SPDX-License-Identifier: GPL-2.0-or-later */
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl
+new file mode 100644
+index 0000000000..aff432b6f4
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl
+@@ -0,0 +1,10 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++Method(_WAK, 1)
++{
++	Return(Package() {0, 0})
++}
++
++Method(_PTS, 1)
++{
++}
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl
+new file mode 100644
+index 0000000000..54f8e3fe95
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl
+@@ -0,0 +1,29 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++/* Copied over from compaq_8200_elite_sff/acpi/superio.asl */
++
++#include <superio/nuvoton/npcd378/acpi/superio.asl>
++
++Scope (\_GPE)
++{
++	Method (_L0D, 0, NotSerialized)
++	{
++		Notify (\_SB.PCI0.EHC1, 0x02)
++		Notify (\_SB.PCI0.EHC2, 0x02)
++		//FIXME: Add GBE device
++		//Notify (\_SB.PCI0.GBE, 0x02)
++	}
++
++	Method (_L09, 0, NotSerialized)
++	{
++		Notify (\_SB.PCI0.RP01, 0x02)
++		Notify (\_SB.PCI0.RP02, 0x02)
++		Notify (\_SB.PCI0.RP03, 0x02)
++		Notify (\_SB.PCI0.RP04, 0x02)
++		Notify (\_SB.PCI0.RP05, 0x02)
++		Notify (\_SB.PCI0.RP06, 0x02)
++		Notify (\_SB.PCI0.RP07, 0x02)
++		Notify (\_SB.PCI0.RP08, 0x02)
++		Notify (\_SB.PCI0.PEGP, 0x02)
++	}
++}
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c b/src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c
+new file mode 100644
+index 0000000000..8f4f83b826
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c
+@@ -0,0 +1,12 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi_gnvs.h>
++#include <soc/nvs.h>
++
++void mainboard_fill_gnvs(struct global_nvs *gnvs)
++{
++	/* Temperature at which OS will shutdown */
++	gnvs->tcrt = 100;
++	/* Temperature at which OS will throttle CPU */
++	gnvs->tpsv = 90;
++}
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt b/src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt
+new file mode 100644
+index 0000000000..16c29e82d8
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt
+@@ -0,0 +1,5 @@
++Category: desktop
++ROM protocol: SPI
++ROM socketed: n
++Flashrom support: y
++Release year: 2012
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/cmos.default b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.default
+new file mode 100644
+index 0000000000..6d27a79c66
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.default
+@@ -0,0 +1,7 @@
++boot_option=Fallback
++debug_level=Debug
++power_on_after_fail=Enable
++nmi=Enable
++sata_mode=AHCI
++gfx_uma_size=32M
++psu_fan_lvl=3
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout
+new file mode 100644
+index 0000000000..1fc83b1a55
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout
+@@ -0,0 +1,74 @@
++## SPDX-License-Identifier: GPL-2.0-only
++
++# -----------------------------------------------------------------
++entries
++
++# -----------------------------------------------------------------
++0	120	r	0	reserved_memory
++
++# -----------------------------------------------------------------
++# RTC_BOOT_BYTE (coreboot hardcoded)
++384	1	e	4	boot_option
++388	4	h	0	reboot_counter
++
++# -----------------------------------------------------------------
++# coreboot config options: console
++395	4	e	6	debug_level
++400	3	h	0	psu_fan_lvl
++
++# coreboot config options: southbridge
++408	1	e	1	nmi
++409	2	e	7	power_on_after_fail
++
++421	1	e	9	sata_mode
++
++# coreboot config options: northbridge
++432	3	e	11	gfx_uma_size
++
++448	128	r	0	vbnv
++
++# SandyBridge MRC Scrambler Seed values
++896	32	r	0	mrc_scrambler_seed
++928	32	r	0	mrc_scrambler_seed_s3
++960	16	r	0	mrc_scrambler_seed_chk
++
++# coreboot config options: check sums
++984	16	h	0	check_sum
++
++# -----------------------------------------------------------------
++
++enumerations
++
++#ID	value	text
++1	0	Disable
++1	1	Enable
++2	0	Enable
++2	1	Disable
++4	0	Fallback
++4	1	Normal
++6	0	Emergency
++6	1	Alert
++6	2	Critical
++6	3	Error
++6	4	Warning
++6	5	Notice
++6	6	Info
++6	7	Debug
++6	8	Spew
++7	0	Disable
++7	1	Enable
++7	2	Keep
++9	0	AHCI
++9	1	IDE
++11	0	32M
++11	1	64M
++11	2	96M
++11	3	128M
++11	4	160M
++11	5	192M
++11	6	224M
++
++# -----------------------------------------------------------------
++checksums
++
++checksum 392 415 984
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/data.vbt b/src/mainboard/hp/compaq_elite_8300_cmt/data.vbt
+new file mode 100644
+index 0000000000000000000000000000000000000000..ba627e152b65d779a80529d3811ec4d21c1b1e54
+GIT binary patch
+literal 3902
+zcmdT{U2GIp6h5;vvp;uc+U>N$b}h{<64)*MnJ%?9P1V_-)?HZIZFkwM#K;zQp(Lf0
+z<tLDc9kdaQ30aLnL^K;s2=dhMWTFo|nZ_7XjUmSPK!^{95W@p8ks#}tpO&8zIx!OQ
+zPQE$ko;~;Lz2}~D=XOmtlA-CLNM|A&X^#!0H)V!X1yJCH+Hrg@ZIQ%qdRr`<32%!e
+zhohV5IamQTwRf%o6o9FhLR}l4OH3XpP6S4SG(9$1II_L8yRfU+nK)!=G!;$I@QxkD
+ziDGH&K(Rp6*_Xmpr<F+L;O>b69XhyYd$H6<buRR#UELiUx+zsQbar)jhLo-lr6HwH
+z>Fo<WE0Nehba-<rkql=N!$Wj<l*SV2a5_D(Ig)&trbdV3iAW+d5R-_pl<3~6Bc<KD
+z#t+ayG>9yU(vE~()R;1j?k!Dq(D1|r9o2pI)6wGoV(Cz^&><0>;1cWR7zP*~YL5XE
+z{3`?=k6Yy2an&85Zl2-7jM~D`7^g}MH^6WOPE9askfBLVUBl5fj(Wi%F%Ax(<(|k=
+zUH4c9hXO|5?0UW22lb}G1;Fb@mzSZ8u5fTU59si@;V}EXTQ}(rl%Wn?F&a92X)&+>
+zPTj@>Ls7r4(ffK2={zn6t_hS-cTaC$zZ!`R#y2KYqnT`O>nqx^H{P7_!|gKQVi}A&
+z)G!L9*Z>@59dMlOh4owoes{Vd<dPwV$RfrOM_mMtBi==PggB45i1-TeHR314Rm63~
+z9|&+0AczJ;Ga`TpA^H)6h!kQgqJWr0I1j?@szU?Z5NsM_$vRVlmxGf*(9T-+vzFa+
+z!`K`kmJ}>$kl1)tt1cJZseb2!YSsO`J_8jQ^hAhROmRyl4au@8tDixs`{k^Dwd%=Z
+zH-yjQdy~%q^YKY<!Z~QsaFSLvP<_4(KebAii%moAUIzzXdbGph$OYv=h6VegT-HIX
+zhmBa>th;}v$r!Z-pnAN<1I)+#R``=|huU|*W1ew~tpBFsG0q;_jCFT6Ulxt*TNv8#
+z2{`>`$JM`Jd{F+EzpU7VIlvml?AFW1Xv$0tKyom(Ej2b-oERG0Q?%Jx8HYk6s9{*E
+z_)hegWIm-8PLF`1DpU2QrTKj4;VUElwQBD4f+hZ<s%)PPsp_Q#i!T5@)2taxv1ghG
+z<B&&<DI4jDn$!FOh>Zbggj@JDLYbjpK69X2PaAVr^Xn{6e+%<?63)ABGAHVvOwA0G
+zop-g`)B~42TA5y1<#p#*n`4^oSOPu_>i&oRk>LBlzUQG|c;s(9<VO#^<&i}~RuI}x
+z<RL<GguYJXG9hOOy+q_62>FFjhafiyq*<UbLCy*!FVMFH`LsYj73iEG|16MS1xiG@
+zNhE7UniS<%MKUhZlcHP^$pw+li}F>GTo<V<$!jFiA<>K^@07@tL{CZbd5K(<q}Cgp
+z=D5OWb(o)+1@4lFyO?u`hP=smQS!Cx@SCx8`ItCXGEp|?Se~I$OQ9>*L<3rb71Ew*
+zhn0l-*|a>v(n`=1+Du-&m2f&k|07qiv~u)9FuttfVcu_x;V>QXdsXjZ?db(%oNhK5
+zme#7yVBD-k)j4Zp4ohoWFJ0rv5wpCVNbYROUKoL9Ww31Rg%2ZHHV$2!ik&#T)={qH
+z{mrUEty8JFXPPS;w@^`Y*;z%PU#m>bK7$Oci}}Epjc<@x;b&~*!<k@Zeq?5~lKODv
+zA_EJ8u45$aFet6+Tz;mY_(sgz72qmZ5DkWZn3D#BWHRv7#wxD)p^~C26;X-mqrjL$
+z8S4>Op}BgEe0X$iI{Gx<zTS2<*M4^|Sg17^@EYY@zAl0)<Ta?zd%bn~D02?r)iu%P
+wm+F7xwtgQt<KA_UyAYqlTkT_cS089?Pr=)R7|a9^*a9j1U$>1p1;4R>1E3jwQUCw|
+
+literal 0
+HcmV?d00001
+
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
+new file mode 100644
+index 0000000000..3d21739b72
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
+@@ -0,0 +1,177 @@
++# SPDX-License-Identifier: GPL-2.0-only
++
++chip northbridge/intel/sandybridge
++	register "gfx.use_spread_spectrum_clock" = "0"
++	register "gpu_dp_b_hotplug" = "0"
++	register "gpu_dp_c_hotplug" = "0"
++	register "gpu_dp_d_hotplug" = "0"
++	# BTX mainboard: Reversed mapping
++	register "spd_addresses" = "{0x53, 0x52, 0x51, 0x50}"
++	device domain 0 on
++		subsystemid 0x103c 0x3396 inherit
++
++		device ref host_bridge on end # Host bridge Host bridge
++		device ref peg10 on end # PEG
++		device ref igd on end # iGPU
++
++		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
++			register "docking_supported" = "0"
++			register "gen1_dec" = "0x00fc0a01"
++			register "gen2_dec" = "0x00fc0801"
++			register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
++			register "pcie_port_coalesce" = "1"
++			register "sata_interface_speed_support" = "0x3"
++			register "sata_port_map" = "0x1f"
++			register "spi_lvscc" = "0x2005"
++			register "spi_uvscc" = "0x2005"
++			register "superspeed_capable_ports" = "0x0000000f"
++			register "xhci_overcurrent_mapping" = "0x00000c03"
++			register "xhci_switchable_ports" = "0x0000000f"
++			register "usb_port_config" = "{
++				{ 1, 0, 0 },
++				{ 1, 0, 0 },
++				{ 1, 0, 1 },
++				{ 1, 0, 1 },
++				{ 1, 0, 2 },
++				{ 1, 0, 2 },
++				{ 1, 0, 3 },
++				{ 1, 0, 3 },
++				{ 1, 0, 4 },
++				{ 1, 0, 4 },
++				{ 1, 0, 6 },
++				{ 1, 0, 5 },
++				{ 1, 0, 5 },
++				{ 1, 0, 6 }
++			}"
++
++			device ref xhci on   end # USB 3.0 Controller
++			device ref mei1 off  end # Management Engine Interface 1
++			device ref mei2 off  end
++			device ref me_ide_r off end
++			device ref me_kt off end
++			device ref gbe on    end # Intel Gigabit Ethernet
++			device ref ehci1 on  end # USB2 EHCI #1
++			device ref ehci2 on  end # USB2 EHCI #2
++			device ref hda on    end # High Definition Audio
++			device ref sata1 on  end # SATA Controller 1
++			device ref sata2 off end # SATA Controller 2
++			device ref smbus on  end # SMBus
++
++			device ref pcie_rp1 on end
++			device ref pcie_rp2 on end
++			device ref pcie_rp3 on end
++			device ref pcie_rp4 on end
++			device ref pcie_rp5 on end
++			device ref pcie_rp6 on end
++			device ref pcie_rp7 on end
++			device ref pcie_rp8 on end
++
++			device ref pci_bridge on  end
++			device ref lpc on # LPC bridge
++				chip superio/common # copied from Z220
++					device pnp 2e.ff on # passes SIO base addr to SSDT gen
++						chip superio/nuvoton/npcd378
++							device pnp 2e.0 off end		# Floppy
++							device pnp 2e.1 on		# Parallel port
++								# global
++
++								# serialice: Vendor writes:
++								irq 0x14 = 0x9c
++								irq 0x1c = 0xa8
++								irq 0x1d = 0x08
++								irq 0x22 = 0x3f
++								irq 0x1a = 0xb0
++								# dumped from superiotool:
++								irq 0x1b = 0x1e
++								irq 0x27 = 0x08
++								irq 0x2a = 0x20
++								irq 0x2d = 0x01
++								# parallel port
++								io 0x60 = 0x378
++								irq 0x70 = 0x07
++								drq 0x74 = 0x01
++							end
++							device pnp 2e.2 off		# COM1
++								io 0x60 = 0x2f8
++								irq 0x70 = 3
++							end
++							device pnp 2e.3 on		# COM2, IR
++								io 0x60 = 0x3f8
++								irq 0x70 = 4
++							end
++							device pnp 2e.4 on		# LED control
++								io 0x60 = 0x600
++								# IOBASE[0h] = bit0 LED red / green
++								# IOBASE[0h] = bit1-4 LED PWM duty cycle
++								# IOBASE[1h] = bit6 SWCC
++
++								io 0x62 = 0x610
++								# IOBASE [0h] = GPES
++								# IOBASE [1h] = GPEE
++								# IOBASE [4h:7h] = 32bit upcounter at 1Mhz
++								# IOBASE [8h:bh] = GPS
++								# IOBASE [ch:fh] = GPE
++							end
++							device pnp 2e.5 on		# Mouse
++								irq 0x70 = 0xc
++							end
++							device pnp 2e.6 on		# Keyboard
++								io 0x60 = 0x0060
++								io 0x62 = 0x0064
++								irq 0x70 = 0x01
++								# serialice: Vendor writes:
++								drq 0xf0 = 0x40
++							end
++							device pnp 2e.7 on		#  WDT ?
++								io 0x60 = 0x620
++							end
++							device pnp 2e.8 on		# HWM
++								io 0x60 = 0x800
++								# IOBASE[0h:feh] HWM page
++								# IOBASE[ffh] bit0-bit3 page selector
++
++								drq 0xf0 = 0x20
++								drq 0xf1 = 0x01
++								drq 0xf2 = 0x40
++								drq 0xf3 = 0x01
++
++								drq 0xf4 = 0x66
++								drq 0xf5 = 0x67
++								drq 0xf6 = 0x66
++								drq 0xf7 = 0x01
++							end
++							device pnp 2e.f on		# GPIO OD ?
++								drq 0xf1 = 0x97
++								drq 0xf2 = 0x01
++								drq 0xf5 = 0x08
++								drq 0xfe = 0x80
++							end
++							device pnp 2e.15 on		# BUS ?
++								io 0x60 = 0x0680
++								io 0x62 = 0x0690
++							end
++							device pnp 2e.1c on		# Suspend Control ?
++								io 0x60 = 0x640
++								# writing to IOBASE[5h]
++								#  0x0: Power off
++								#  0x9: Power off and bricked until CMOS battery removed
++							end
++							device pnp 2e.1e on		# GPIO ?
++								io 0x60 = 0x660
++								drq 0xf4 = 0x01
++								# skip the following, as it
++								# looks like remapped registers
++								#drq 0xf5 = 0x06
++								#drq 0xf6 = 0x60
++								#drq 0xfe = 0x03
++							end
++						end
++					end
++				end
++				chip drivers/pc80/tpm
++					device pnp 4e.0 on end          # TPM module
++				end
++			end
++		end
++	end
++end
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl b/src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl
+new file mode 100644
+index 0000000000..e8e2b3a3e5
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl
+@@ -0,0 +1,26 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <acpi/acpi.h>
++
++DefinitionBlock(
++	"dsdt.aml",
++	"DSDT",
++	ACPI_DSDT_REV_2,
++	OEM_ID,
++	ACPI_TABLE_CREATOR,
++	0x20141018	/* OEM revision */
++)
++{
++	#include <acpi/dsdt_top.asl>
++	#include "acpi/platform.asl"
++	#include <cpu/intel/common/acpi/cpu.asl>
++	#include <southbridge/intel/common/acpi/platform.asl>
++	#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
++	#include <southbridge/intel/common/acpi/sleepstates.asl>
++
++	Device (\_SB.PCI0)
++	{
++		#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
++		#include <southbridge/intel/bd82x6x/acpi/pch.asl>
++	}
++}
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c b/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
+new file mode 100644
+index 0000000000..8d10c6317c
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
+@@ -0,0 +1,14 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <bootblock_common.h>
++#include <superio/nuvoton/npcd378/npcd378.h>
++#include <superio/nuvoton/common/nuvoton.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2)
++
++void bootblock_mainboard_early_init(void)
++{
++	if (CONFIG(CONSOLE_SERIAL))
++		nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
++}
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads b/src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads
+new file mode 100644
+index 0000000000..686f7d44db
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads
+@@ -0,0 +1,17 @@
++-- SPDX-License-Identifier: GPL-2.0-or-later
++
++with HW.GFX.GMA;
++with HW.GFX.GMA.Display_Probing;
++
++use HW.GFX.GMA;
++use HW.GFX.GMA.Display_Probing;
++
++private package GMA.Mainboard is
++
++   ports : constant Port_List :=
++     (DP2,
++      HDMI2,
++      Analog,
++      others => Disabled);
++
++end GMA.Mainboard;
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/gpio.c b/src/mainboard/hp/compaq_elite_8300_cmt/gpio.c
+new file mode 100644
+index 0000000000..2ae852ae51
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/gpio.c
+@@ -0,0 +1,191 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <southbridge/intel/common/gpio.h>
++
++static const struct pch_gpio_set1 pch_gpio_set1_mode = {
++	.gpio0 = GPIO_MODE_GPIO,
++	.gpio1 = GPIO_MODE_GPIO,
++	.gpio2 = GPIO_MODE_NATIVE,
++	.gpio3 = GPIO_MODE_NATIVE,
++	.gpio4 = GPIO_MODE_NATIVE,
++	.gpio5 = GPIO_MODE_NATIVE,
++	.gpio6 = GPIO_MODE_GPIO,
++	.gpio7 = GPIO_MODE_GPIO,
++	.gpio8 = GPIO_MODE_GPIO,
++	.gpio9 = GPIO_MODE_NATIVE,
++	.gpio10 = GPIO_MODE_NATIVE,
++	.gpio11 = GPIO_MODE_GPIO,
++	.gpio12 = GPIO_MODE_NATIVE,
++	.gpio13 = GPIO_MODE_GPIO,
++	.gpio14 = GPIO_MODE_NATIVE,
++	.gpio15 = GPIO_MODE_GPIO,
++	.gpio16 = GPIO_MODE_GPIO,
++	.gpio17 = GPIO_MODE_GPIO,
++	.gpio18 = GPIO_MODE_NATIVE,
++	.gpio19 = GPIO_MODE_NATIVE,
++	.gpio20 = GPIO_MODE_NATIVE,
++	.gpio21 = GPIO_MODE_GPIO,
++	.gpio22 = GPIO_MODE_GPIO,
++	.gpio23 = GPIO_MODE_NATIVE,
++	.gpio24 = GPIO_MODE_GPIO,
++	.gpio25 = GPIO_MODE_NATIVE,
++	.gpio26 = GPIO_MODE_NATIVE,
++	.gpio27 = GPIO_MODE_GPIO,
++	.gpio28 = GPIO_MODE_GPIO,
++	.gpio29 = GPIO_MODE_GPIO,
++	.gpio30 = GPIO_MODE_NATIVE,
++	.gpio31 = GPIO_MODE_GPIO,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_direction = {
++	.gpio0 = GPIO_DIR_INPUT,
++	.gpio1 = GPIO_DIR_INPUT,
++	.gpio6 = GPIO_DIR_INPUT,
++	.gpio7 = GPIO_DIR_INPUT,
++	.gpio8 = GPIO_DIR_INPUT,
++	.gpio11 = GPIO_DIR_INPUT,
++	.gpio13 = GPIO_DIR_INPUT,
++	.gpio15 = GPIO_DIR_OUTPUT,
++	.gpio16 = GPIO_DIR_INPUT,
++	.gpio17 = GPIO_DIR_OUTPUT,
++	.gpio21 = GPIO_DIR_INPUT,
++	.gpio22 = GPIO_DIR_INPUT,
++	.gpio24 = GPIO_DIR_INPUT,
++	.gpio27 = GPIO_DIR_INPUT,
++	.gpio28 = GPIO_DIR_OUTPUT,
++	.gpio29 = GPIO_DIR_OUTPUT,
++	.gpio31 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_level = {
++	.gpio15 = GPIO_LEVEL_LOW,
++	.gpio17 = GPIO_LEVEL_LOW,
++	.gpio28 = GPIO_LEVEL_LOW,
++	.gpio29 = GPIO_LEVEL_HIGH,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_reset = {
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_invert = {
++	.gpio0 = GPIO_INVERT,
++	.gpio1 = GPIO_INVERT,
++	.gpio6 = GPIO_INVERT,
++	.gpio11 = GPIO_INVERT,
++	.gpio13 = GPIO_INVERT,
++};
++
++static const struct pch_gpio_set1 pch_gpio_set1_blink = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_mode = {
++	.gpio32 = GPIO_MODE_GPIO,
++	.gpio33 = GPIO_MODE_GPIO,
++	.gpio34 = GPIO_MODE_GPIO,
++	.gpio35 = GPIO_MODE_GPIO,
++	.gpio36 = GPIO_MODE_GPIO,
++	.gpio37 = GPIO_MODE_GPIO,
++	.gpio38 = GPIO_MODE_GPIO,
++	.gpio39 = GPIO_MODE_GPIO,
++	.gpio40 = GPIO_MODE_NATIVE,
++	.gpio41 = GPIO_MODE_NATIVE,
++	.gpio42 = GPIO_MODE_NATIVE,
++	.gpio43 = GPIO_MODE_GPIO,
++	.gpio44 = GPIO_MODE_NATIVE,
++	.gpio45 = GPIO_MODE_NATIVE,
++	.gpio46 = GPIO_MODE_GPIO,
++	.gpio47 = GPIO_MODE_NATIVE,
++	.gpio48 = GPIO_MODE_GPIO,
++	.gpio49 = GPIO_MODE_GPIO,
++	.gpio50 = GPIO_MODE_NATIVE,
++	.gpio51 = GPIO_MODE_NATIVE,
++	.gpio52 = GPIO_MODE_NATIVE,
++	.gpio53 = GPIO_MODE_NATIVE,
++	.gpio54 = GPIO_MODE_GPIO,
++	.gpio55 = GPIO_MODE_NATIVE,
++	.gpio56 = GPIO_MODE_NATIVE,
++	.gpio57 = GPIO_MODE_GPIO,
++	.gpio58 = GPIO_MODE_NATIVE,
++	.gpio59 = GPIO_MODE_NATIVE,
++	.gpio60 = GPIO_MODE_NATIVE,
++	.gpio61 = GPIO_MODE_GPIO,
++	.gpio62 = GPIO_MODE_NATIVE,
++	.gpio63 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_direction = {
++	.gpio32 = GPIO_DIR_INPUT,
++	.gpio33 = GPIO_DIR_INPUT,
++	.gpio34 = GPIO_DIR_INPUT,
++	.gpio35 = GPIO_DIR_INPUT,
++	.gpio36 = GPIO_DIR_INPUT,
++	.gpio37 = GPIO_DIR_INPUT,
++	.gpio38 = GPIO_DIR_INPUT,
++	.gpio39 = GPIO_DIR_INPUT,
++	.gpio43 = GPIO_DIR_INPUT,
++	.gpio46 = GPIO_DIR_INPUT,
++	.gpio48 = GPIO_DIR_INPUT,
++	.gpio49 = GPIO_DIR_INPUT,
++	.gpio54 = GPIO_DIR_INPUT,
++	.gpio57 = GPIO_DIR_INPUT,
++	.gpio61 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_level = {
++};
++
++static const struct pch_gpio_set2 pch_gpio_set2_reset = {
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_mode = {
++	.gpio64 = GPIO_MODE_NATIVE,
++	.gpio65 = GPIO_MODE_NATIVE,
++	.gpio66 = GPIO_MODE_NATIVE,
++	.gpio67 = GPIO_MODE_NATIVE,
++	.gpio68 = GPIO_MODE_GPIO,
++	.gpio69 = GPIO_MODE_GPIO,
++	.gpio70 = GPIO_MODE_GPIO,
++	.gpio71 = GPIO_MODE_GPIO,
++	.gpio72 = GPIO_MODE_GPIO,
++	.gpio73 = GPIO_MODE_NATIVE,
++	.gpio74 = GPIO_MODE_NATIVE,
++	.gpio75 = GPIO_MODE_NATIVE,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_direction = {
++	.gpio68 = GPIO_DIR_INPUT,
++	.gpio69 = GPIO_DIR_INPUT,
++	.gpio70 = GPIO_DIR_INPUT,
++	.gpio71 = GPIO_DIR_OUTPUT,
++	.gpio72 = GPIO_DIR_INPUT,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_level = {
++	.gpio71 = GPIO_LEVEL_LOW,
++};
++
++static const struct pch_gpio_set3 pch_gpio_set3_reset = {
++};
++
++const struct pch_gpio_map mainboard_gpio_map = {
++	.set1 = {
++		.mode		= &pch_gpio_set1_mode,
++		.direction	= &pch_gpio_set1_direction,
++		.level		= &pch_gpio_set1_level,
++		.blink		= &pch_gpio_set1_blink,
++		.invert		= &pch_gpio_set1_invert,
++		.reset		= &pch_gpio_set1_reset,
++	},
++	.set2 = {
++		.mode		= &pch_gpio_set2_mode,
++		.direction	= &pch_gpio_set2_direction,
++		.level		= &pch_gpio_set2_level,
++		.reset		= &pch_gpio_set2_reset,
++	},
++	.set3 = {
++		.mode		= &pch_gpio_set3_mode,
++		.direction	= &pch_gpio_set3_direction,
++		.level		= &pch_gpio_set3_level,
++		.reset		= &pch_gpio_set3_reset,
++	},
++};
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c b/src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c
+new file mode 100644
+index 0000000000..a1eafcda68
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c
+@@ -0,0 +1,33 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/azalia_device.h>
++
++const u32 cim_verb_data[] = {
++	0x10ec0221,	/* Codec Vendor / Device ID: Realtek */
++	0x103c3396,	/* Subsystem ID */
++	11,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(0, 0x103c3396),
++	AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
++	AZALIA_PIN_CFG(0, 0x14, 0x01014020),
++	AZALIA_PIN_CFG(0, 0x17, 0x90170110),
++	AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
++	AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
++	AZALIA_PIN_CFG(0, 0x1a, 0x02a11c3f),
++	AZALIA_PIN_CFG(0, 0x1b, 0x01813c30),
++	AZALIA_PIN_CFG(0, 0x1d, 0x415901f0),
++	AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
++	AZALIA_PIN_CFG(0, 0x21, 0x0221102f),
++
++	0x80862806,	/* Codec Vendor / Device ID: Intel */
++	0x80860101,	/* Subsystem ID */
++	4,		/* Number of 4 dword sets */
++	AZALIA_SUBVENDOR(3, 0x80860101),
++	AZALIA_PIN_CFG(3, 0x05, 0x58560010),
++	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
++	AZALIA_PIN_CFG(3, 0x07, 0x58560030),
++
++};
++
++const u32 pc_beep_verbs[0] = {};
++
++AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c b/src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c
+new file mode 100644
+index 0000000000..8dbd95ef96
+--- /dev/null
++++ b/src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c
+@@ -0,0 +1,16 @@
++/* SPDX-License-Identifier: GPL-2.0-only */
++
++#include <device/device.h>
++#include <drivers/intel/gma/int15.h>
++#include <southbridge/intel/bd82x6x/pch.h>
++
++static void mainboard_enable(struct device *dev)
++{
++	install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE,
++					GMA_INT15_PANEL_FIT_DEFAULT,
++					GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
++}
++
++struct chip_operations mainboard_ops = {
++	.enable_dev = mainboard_enable,
++};
+-- 
+2.47.3
+