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authorLeah Rowe <leah@libreboot.org>2023-10-12 23:12:17 +0100
committerLeah Rowe <leah@libreboot.org>2023-10-12 23:31:06 +0100
commit42068f7ce11b88e13b4bf3f2d2290bc4d16d60b7 (patch)
tree1804ff10c43129667300b9f030e7266bea89c8d2 /config/coreboot/d510mo
parent09881212c3ce8938156ac779463d8859dcddff6b (diff)
coreboot/default bump: rev d862695f5f, 12 Oct 2023
Riku's mSATA patch for HP8300USDT was merged upstream, so the patch has been dropped from lbmk because it is contained within this new coreboot revision. Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'config/coreboot/d510mo')
-rw-r--r--config/coreboot/d510mo/config/libgfxinit_txtmode10
1 files changed, 4 insertions, 6 deletions
diff --git a/config/coreboot/d510mo/config/libgfxinit_txtmode b/config/coreboot/d510mo/config/libgfxinit_txtmode
index f220aa70..6b75d929 100644
--- a/config/coreboot/d510mo/config/libgfxinit_txtmode
+++ b/config/coreboot/d510mo/config/libgfxinit_txtmode
@@ -141,6 +141,7 @@ CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -195,11 +196,11 @@ CONFIG_BOARD_INTEL_D510MO=y
# CONFIG_BOARD_INTEL_TGLRVP_UP3 is not set
# CONFIG_BOARD_INTEL_TGLRVP_UP4 is not set
# CONFIG_BOARD_INTEL_WTM2 is not set
+# CONFIG_DEBUG_SMI is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="D510MO"
CONFIG_PCIEXP_HOTPLUG_BUSES=32
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
-# CONFIG_DEBUG_SMI is not set
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_D3COLD_SUPPORT=y
@@ -208,7 +209,6 @@ CONFIG_D3COLD_SUPPORT=y
# CONFIG_PCIEXP_CLK_PM is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
-CONFIG_HEAP_SIZE=0x4000
CONFIG_EC_GPE_SCI=0x50
CONFIG_BOARD_ROMSIZE_KB_1024=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
@@ -250,7 +250,6 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
-CONFIG_VBT_DATA_SIZE_KB=8
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLV_WIDTH=16
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
@@ -351,6 +350,7 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_AP_IN_SIPI_WAIT=y
CONFIG_SIPI_VECTOR_IN_ROM=y
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
@@ -406,9 +406,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
-CONFIG_NO_DDR5=y
-CONFIG_NO_LPDDR4=y
-CONFIG_NO_DDR4=y
CONFIG_USE_DDR3=y
CONFIG_USE_DDR2=y
# end of Devices
@@ -502,6 +499,7 @@ CONFIG_HAVE_ACPI_TABLES=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_HEAP_SIZE=0x100000
#
# Console