diff options
| author | Leah Rowe <leah@libreboot.org> | 2025-01-05 23:54:39 +0000 |
|---|---|---|
| committer | Leah Rowe <leah@libreboot.org> | 2025-01-06 03:11:05 +0000 |
| commit | 8c7ba6131cc0bd5fb31bbe80ec5f526f3c9b6843 (patch) | |
| tree | ce63eb8e2491dce0dbb9fb625b86689fc508701a | |
| parent | 411fb697dfce1733c7c572205e3bdddd005d8c08 (diff) | |
coreboot/next uprev: Fix T480 backlight keys
Backlight controls already worked on the T480/T480s, if you
used software-based controls e.g. set a hotkey for
xbacklight, but the actual Fn buttons on the keyboard did
not function at all; this patch fixes that issue
This also fixes LEDs on T480, on warm reboot, which are
otherwise off. It sets them back to the state they were
at on cold boot.
Both fixes are from Mate Kukri in the new T480 patchset.
In addition to these fixes, Mate made several code quality
improvements as part of efforts to upstream this code into
coreboot's main branch.
Updated coreboot T480 patchset to patchset 25. This change
will be reflected next in a modification to the Libreboot
documentation.
I had to make several other fixes on top of this; see diff.
A debug option was being enabled relating to stack overflow
detection, which we ought to avoid to mitigate over-zealous
build errors and stack corruption at boot; an errant option
for an EC we don't use was also being enabled, by some code
in coreboot relating to a Dasharo board; both issues have
been mitigated in this lbmk patch, by patching the upstream
coreboot build system in this patch.
As part of this change, the coreboot/next tree within lbmk
has been updated. Existing patches have been rebased.
This brings in the following changes from upstream, relative
to the previous revision used on coreboot/next:
* 2f1e4e5e85 mb/hp/snb_ivb_desktops/z220*: Remove leftover old usb configurations
* 9e859154ea mb/hp/snb_ivb_desktops: Remove unused includes
* 70b33cb38d ec/google/chromeec/acpi: Add support for generic LPC memory range
* f2ad73b5d1 mb/google/rauru: Raise little core CPU frequency from 700MHz to 2.4GHz
* 044017b4cd mb/google/rauru: Initialize PMICs in romstage
* 397c3e3c52 mb/google/fatcat/var/fatcat: Add touchpad wake source
* e18f0f53cb mb/google/fatcat/var/fatcat: Change touchpad interrupt to edge trigger
* a8b4ee246d mb/google/nissa/var/rull: Configure Acoustic noise mitigation
* c09fd09edf tree: Use "true", "false" for has_power_resource
* 1e64875265 mb/google/fatcat: Remove unused <stdio.h>
* f316ab6796 mb/google/fatcat/var/francka: Fix early pad configuration for TPM
* 6ca2c3c415 soc/mediatek/mt8196: Fix indentation in Makefile.mk
* 94c1307fdb soc/mediatek/mt8196: Add dynamic power-saving for peripheral clocks
* 67b140a949 tree: Use "true", "false" for fine_grained_control
* 97923aebe1 mb/prodrive/atlas: Add initial support for options
* 1a16146795 Fix up CFR's open issues
* 7e8d8cdea2 mb/google/rauru: Initialize SPM
* 3153432b83 soc/intel/alderlake: Add function to force disable memory channels
* 8ea2b0ab46 mb/google/fatcat/var/francka: Use RAM ID 2 for MT62F2G32D4DS-020 WT:F
* 5f600a8ee9 mb/google/fatcat: Limit Power Limit when battery is missing
* 5213646241 ec/google/chromeec: Add function to detect barrel charger
* 5ef70e5f22 ec/google/chromeec: Add API to check if battery is critically low
* 42fd35b486 ec/google/chromeec: Add API to check if charger is present
* 56370d0283 ec/google/chromeec: Add API to check if a USB PD charger is attached
* 001e7a0b45 soc/mediatek/mt8196: Add MT6685 Clock IC driver
* 5852841ca7 soc/intel/meteorlake: Use ASPM helpers from Alder Lake
* b04f057efd mb/google/rex/var/kanix: Add Synaptics touchpad
* af0c2e7a2e mb/prodrive/atlas: Remove the workaround for CLKREQ pins
* 13316c644b mb/google/fatcat/var/fatcat: Modify interrupt GPIO for LPSS I2C touchpad
* 825e9173b4 soc/mediatek: Distinguish pmic_init_setting function name
* d65ff8492c soc/intel/xeon_sp/spr/acpi: Fix regression
* 291778a1bd mb/google/corsola: Add new board variant Wyrdeer
* 745dcc861d mb/google/corsola: Refactor mipi_panel_power_on function
* 79f60c6b22 mb/google/nissa/var/telith: Disable stylus function
* d7934bdd53 Doc/soc/amd/family15h: Fix URLs to AMD documents
* 3cb7db4075 soc/mediatek/mt8196: Add PMIC MT6316 driver
* 60bce10750 drivers/mipi: Add support for KD_KD110N11_51IE panel
* d4c80054a4 soc/mediatek/mt8189: Enable timer compensation v2.5
* 403846f177 soc/mediatek/mt8196: Define MFGPLL_*_BASE using MFGSYS_BASE
* b3edaa7b10 mb/google/rauru: Implement SKU ID
* b470b48718 mb/google/rauru: Add support for getting storage id
* 24a5048948 mb/google/nissa/var/pujjo: Add new supported memory part
* c6e27c5fbf mb/google/nissa/var/rull: Add G2 touchscreen to devicetree
* 639def1d84 mb/google/fatcat/var/fatcat: Enable FPS
* acb8c870b2 mb/google/fatcat: Suppress unnecessary extra space in device trees
* d79ba5565d mb/google/nissa/var/telith: Modify PLD for typeC and typeA
* 620d2fab06 soc/mediatek/mt8189: Replace SPDX identifiers to GPL-2.0-only OR MIT
* d90b1322ab commonlib: Refactor CSE sync eventLog
* 4ef6c13b38 mb/google/brya: Adjust EC memory map range to support indexed IO
* 1e90bbadfa ec/google/chromeec: Add indexed IO support
* a8ab708584 mb/google/nissa/var/quandiso2: Create a quandiso2 variant
* 78f610a0ae util/docker/doc.coreboot.org: Allow git to work in envs owned by root
* 38ee22f6da util/docker/doc.coreboot.org: Use Alpine minor instead of point releases
* 0196c3b6a4 util/docker/doc.coreboot.org: Get rid of bash workarounds
* 897b46693b util/docker/doc.coreboot.org: Don't create volumes
* a0c45cbf1f 3rdparty/fsp: Update submodule to upstream master
* aa562d2881 soc/mediatek/mt8189: Add GPIO driver
* 40a863cd60 soc/mediatek/mt8189: Initialize watchdog
* 1380ed0cd2 soc/mediatek: Add support for MediaTek firmware support package
* 4f92943c89 soc/mediatek/common: Rename GPT_MHZ to TIMER_MHZ for readability
* 5a73692e0c soc/mediatek/mt8196: Add SPM loader
* 306660c2de util/crossgcc: Update CMake from 3.30.2 to 3.31.3
* f3adc74e44 mb/google/fatcat: Keep GSPIx interface default PCI
* 809e704101 soc/intel/pantherlake: Rename GSPI2 to GSPI0A
* 222ef676f9 soc/intel/pantherlake: Add ACPI name for GSPI2
* 1fda7027c0 util/crossgcc: Update ACPICA from 20230628 to 20241212
* e35175bb38 Update vboot submodule to upstream main
* 9eb4c5aff8 util/ifdtool: Fix memory leaks
* 87ae3573b5 mb/starlabs/starlite_adl: Configure GPIO interrupt for Virtual Button
* eaf87422b1 ec/starlabs/merlin: Add Intel Virtual Button Driver for Tablet Mode
* a1532790b9 docs: Add 24.12 release notes
* 8c0df740c7 mb/google/nissa/var/gothrax: Add probe and GPIO config for HDMI and touchpanel
* f6fcff5511 docs/security/vboot: Update supported boards
* 0dba17da0c mb/google/brya/uldrenite: Add WWAN RW350R-GL power on sequence
* 2c4af7cd29 mb/topton/adl: Enable TPM2 (Intel fTPM/PTT)
* c11558d4c7 mb/asus/p8z77-m: Drop GPIO by I/O
* 4f1a1adef6 mb/topton/adl: Disable mapped SATA port
* 81cbe11361 mb/asus/p8z77-m: Revert SIO IRQ settings carried from OEM
* 9578c67c77 mb/google/brox: Include CSE reset in mainboard reset expectation
* 5af5e66686 util/cbfstool: eliminate late sign of life event
* 0797c40d52 src/soc/intel/cmn/blk/cse: Log cse sync information
* 9a15a1ed21 soc/intel: Log CSE Sync Early Sign of Life event from a better place
* c812c78618 mb/trulo/var/uldrenite: Support USB_OC on the A0 port
* ee1a766f05 mb/trulo/var/uldrenite: Set GPP_B5 and B6 to ISH function
* 87c9d93a62 mb/google/skywalker: Add MediaTek MT8189 reference board
* 6bd51ce42a soc/mediatek/mt8189: Add a stub implementation of MT8189 SoC
* ea646c0514 mb/google/rauru: Add pwrsel init in romstage
* c3265da005 soc/mediatek/mt8196: Add pwrsel driver
* 30d8e1880a ec/google/chromeec: Publish LPC GMR address range via CREC _CRS
* bb85775d92 soc/intel/cmn/acpi: Add ACPI method to get LGMR address
* 84347d0b45 payloads/Linuxboot: Fix u-root build
* 7bcec7a2ef payloads/LinuxBoot: Build x86_64 with host toolchain
* e3150e819d util/crossgcc: Add libstdcxx target
* 61385c4976 soc/mediatek/common: Move SPM_SYSTEM_BASE_OFFSET to soc folders
* 6625dee027 soc/mediatek/common: Use array to represent spm_sw_rsv registers
* cd8d6861f6 soc/mediatek/common: Move some functions to spm_v1.c
* 91fe658714 drivers/option: Add forms in cbtables
* 4d4776f320 mb/emulation/qemu-sbsa: Configure flash region for MMU
* dfef1895f2 mainboard: Add MiTAC Computing Whitestone-2 (LGA-4677)
* caf8f9f60f mb/google/brya/var/uldrenite: Enable PMC, HECI and SRAM devices
* b668c756bf mb/trulo/var/uldrenite: Configure audio (max9360a, rt5682)
* 941f994809 mb/trulo/var/uldrenite: Configure Network
* 600e7810fb mb/trulo/var/uldrenite: Configure USB ports and mapping
* 0261cbe8e9 mb/trulo/var/uldrenite: Configure serial_io and I2C
* 113205bcd1 mb/trulo/var/uldrenite: Enable eMMC and DLL tuning parameters
* 0dd227f9c1 mb/trulo/var/uldrenite: Enable DPTF, S0ix and configure FIVR setting
* 0ce153c8df mb/google/nissa/var/rull: For probe, change unprovisioned to unknown
* b57308f437 mb/google/rauru: Add SD card configurations
* e969a3df87 soc/mediatek/mt8196: Add SD card configurations
* 8be835ce3c soc/mediatek/mt8196: Add tracker driver
* 78560f9958 soc/mediatek/mt8196: Add MMinfra driver support
* 0b252ef8b4 util/mtkheader: Add GFH header for mt8189 bootblock code
* 540eb5ba73 cpu/qemu: Enable IDT_IN_EVERY_STAGE
* f9d6fd4e0f soc/intel/xeon_sp: Enable IDT_IN_EVERY_STAGE
* c3dee9eaba cpu/intel/car/romstage: Fix false-positive stack corruption
* b659fb5cea mb/ocp/tiogapass: Wait for BMC
* 7c0556244d drivers/wifi: Update Drive Strength BRI Rsp Table revision
* 70bdd2e1fa cpu/x86/topology: Simplify CPU topology initialization
* 3a2ffba231 soc/intel/xeon_sp: Introduce early_pch_init
* 48ed4b0f85 soc/intel/xeon_sp/lbg: Add support to hide HDA
* a857c81122 arch/x86: Disable DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
* 45dabe846d mb/google/brox: Apply ISH_FW_VERSION in Kconfig
* e0b1a0dbec vc/intel/fsp/mtl: Update MTL fsp header files from 3471_91 to 4122_21
* c20fd2fc3f 3rdparty/fsp: Update submodule to upstream master
* e5b5fc345a soc/intel/xeon_sp: Improve PCI INTx IRQ routing for Gen6
* 673075f102 util/cbfstool: Add eventLog support for ELOG_TYPE_FW_CSE_SYNC
* 3235b7c6d5 commonlib: Add ELOG_TYPE_FW_CSE_SYNC eventLog type
* 4a0c49e671 soc/intel/pantherlake: Keep image clock configuration enable
* 51cc2bacb6 soc/intel/pantherlake: Disable stack overflow debug options
* eeb6f67eec Docs: Convert bare URLs into hyperlinks
* 2609519704 mb/google/rauru: Implement regulator interface
* 8c6426c1b4 soc/mediatek/mt8196: Add PMIC MT6373 driver
* bda5b83661 mb/google/brya/var/uldrenite: update gpio settings
* afb11d05b9 mb/google/trulo/var/uldrenite: Add memory config
* 46df9e1d38 mb/google/brya/var/marasov: Enable GPP_F9 GPIO for early panel power-on
* 04d33b90ec mb/google/fatcat: config GPP_F23 as ISH gpio pin
* 16ab83b34a soc/mediatek/mt8196: Initialize SSPM
* b793209b80 mb/google/brox/var/jubilant: Disable Tccold Handshake
* 2f1e67bbc7 mb/google/nissa/var/glassway: Modify touch screen ILIT2901 sequence
* a1c50f233d soc/mediatek/mt8196: Add PMIC MT6363 ADC driver
* 8910b6ba7d soc/mediatek/mt8196: Add PMIC MT6363 driver
* c215889442 soc/mediatek/mt8196: Add PMIF and PMIC driver support
* 27fa0595de soc/mediatek/mt8196: Add mtcmos init support
* 61a00269a2 mb/amb/birman*/gpio: remove configuration for VDD_MEM_VID[0,1]
* 38b59164ca ec/google/chromeec: Define ACPI_NOTIFY_CROS_EC_MKBP constant
* 50c9747d87 drivers/usb/intel_bluetooth: Add GBTR Method
* 0bb4a220a8 soc/intel/common/cnvi: Fix GBTE path in comment
* d33244c3af drivers/usb/intel_bluetooth: Relocate BTRK to \_SB.PCI0
* 04b9627e07 drivers/usb/intel_bluetooth: Fix GBTE to return Local0
* c3f9dd3af3 drivers/usb/intel_bluetooth: Change the Power Resource to S0
* 1cf8d84f3b mb/google/nissa/var/rull: Add 6W and 15W DPTF parameters
* 62a9d670bf mb/google/brya/var/uldrenite: Add HDA verb tables
* 56278eeed8 mb/google/rex/var/kanix: Enable/Disable PCIE WLAN based on fw_config
* 6d3346068b intel/common/block: Program the right power_limits_config entry
* 35bf4bc59c commonlib: Add generic word-at-a-time optimization to ipchksum()
* e987ba45d6 soc/mediatek/mt8196: Add booker driver
* aa3cfd5c69 haswell NRI: Post-process selected timings
* 4a4ad2b1e6 haswell NRI: Initialise MPLL
* 41c2e1685e soc/intel/xeon_sp: Add PCU PCI drivers
* 8721757aca soc/intel/xeon_sp/skx: Configure IOAPICs
* e9c546b153 arch/x86: Rename breakpoint removal function
* 0351872731 arch/x86: Add breakpoint to stack canary
* 572da7c524 acpi/acpigen: generate Create*Field() from name string directly
* 2e9aebf63f mb/google/fatcat: Enable Intel DPTF support and configure policies
* a8ff286185 mb/google/fatcat: Enable Bayhub Level 2 errata
* 230e646d98 mb/google/fatcat: Remove redundant GPIOs for x1 slot
* fbacae625a soc/intel/ptl: Enable UFS functionality by adding IRQ programming
* b67e001a85 soc/intel/pantherlake: Fix UFS ACPI _ADR calculation
* 2496943b5c mb/google/brox/var/jubilant: Set PCIe root port 5 speed to Gen2
* dfdb210e26 soc/intel/common/block: Fixup itss_get_on_chip_dev_pirq
* 223dabef56 soc/intel/common/block: Add const qualifier for input of pirq ops
* afc49fa013 soc/intel/xeon_sp: Remove lpc_lockdown_config
* 1a4ab38035 soc/mediatek/mt8196: Rename SCP to SPM base variables
* 3189afbdee soc/intel/common: Drop locking function fast_spi_set_vcl
* 01bf34cb28 soc/intel/xeon_sp: Support _PRT reporting for domain
* 1399dd8086 soc/intel/xeon_sp: Skip not pre-routed devices in _PRT reporting
* a5362f6d73 soc/mediatek/mt8196: Enable ARM Trusted Firmware integration
* 42a696090f Update arm-trusted-firmware submodule to upstream master
* 861413b295 mb/google/nissa/var/riven: Set PCIe root port 4 speed to Gen2
* d5a11293ff soc/intel/alderlake: Add support for PCIe speed setting
* 5b447d00f5 soc/intel/pantherlake: Fix UFS ACPI inclusion in southbridge.asl
* 1c51c3e57f device/pci_ids: Add Pantherlake-H GT2 (DID2)
* 15109603c6 mainboard/ocp/tiogapass: Enable TPM
* 94d200c394 soc/intel/xeon_sp/cpx: Add missing FADT fields
* 534585d7bd soc/intel/xeon_sp/skx: Drop ACPI_FADT_8042
* 98ca450a53 soc/intel/xeon_sp: Use generate_p_state_entries
* 28c03b501e mb/ocp/tiogapass: Implement mainboard_dimm_slot_exists
* 74ee80d207 soc/intel/xeon_sp/cpx: Fix register lock
* e1a0e6b738 soc/intel/xeon_sp/skx: Fix CPU init
* b04ecb2a5f arch/x86: Enable support for IOAPIC devices
* a7437ca340 soc/intel/common/block/cse: allow CSE telemetry on non-lite CSE SKU
* 0d284bfc36 soc/intel/mtl/acpi/gpio.asl: fix missing gpio.h include
* aeb5ccd129 ec/dasharo/ec: add Dasharo features
* 820c7e06d2 soc/mediatek/mt8196: Set DRAMC_PARAM_HEADER_VERSION to 4
* d8104af174 mb/google/rex/var/kanix: Disable FP_MCU based on fw_config
* 075a13b775 mb/google/fatcat: Update Soundwire codec address based on devicetree
* 2411942a05 drivers/soundwire/alc711: Add common Kconfig for ALC7xx soundwire codecs
* 534f81d165 mb/google/fatcat: Update flash layout
* 1b175a64e3 soc/intel/ptl: Populate SMBIOS Type 4 with unique serial number
* 4b574281f0 soc/intel/cmn/pmc: Retrieve SoC QDF information via PMC IPC
* 4ce5304879 soc/intel/xeon_sp: Advertise DIMMs on skylake_sp as well
* 5613f0e6be soc/intel/xeon_sp: Fix debug print
* 0d827a5810 soc/intel/xeon_sp: Drop SOC_INTEL_MMAPVTD_ONLY_FOR_DPR
* d3aa108acf drivers/ipmi/ocp: Add missing include
* 37e9c22089 libpayload: configs: Add new config.featuretest to broaden CI
* bcced7caea commonlib/device_tree: Make END token part of struct_size
* 8ad1ee9b0a util/intelp2m: Print the current project version
* 1b9c312273 intelp2m/patform/sunrise: Add unit tests
* 2394795279 intelp2m/patform/lewisburg: Add unit tests
* bce3363412 intelp2m/patform/apollolake: Add unit tests
* 6abf66c8f3 util/intelp2m/parser/template: Add unit test
* 6b43e4ba33 MAINTAINERS: Add Yuchi and Vasiliy for Intel Atom Snow Ridge SoC
* 5cedebf874 soc/intel/xeon_xp: Remove 1 bytes losing in lower DRAM
* cd30d94ae5 mb/google/brya/var/uldrenite: Generate RAM ID and SPD file
* cda1e7e553 mb/google/nissa: Create pujjogatwin variant
* c0ccace4d5 .checkpatch.conf: Set max line length to 96
* 6f2a8ee8cc soc/mediatek/mt8196: Require DRAM blob to exist
* 850cf7d07a Update blobs submodule to upstream main
* 75424efdc4 soc/amd/common/psp/psp_def.h: increase P2C_BUFFER_MAXSIZE
* 179945291c soc/amd/common/psp/rpmc: fix printk format string
* 9b308f4d54 soc/amd/common/psp/psp_smi: report errors in 'handle_psp_command'
* 5613f209c7 soc/amd/common/psp_smi_flash: implement SPI flash RPMC command handling
* b1f954bc6c soc/amd/common/block/psp/psp_smi_flash.h: fix struct element types
* ce01117aa5 drivers/spi: add RPMC support
* 78270ef3f1 Documentation/tutorial/managing_local_additions.md: Add symlink info
* 0a7c3ed514 soc/mediatek/mt8195: Fix SCP register address
* 4c8547704f mb/google/rauru: Add 2nd source TAS2563 amps to support beep
* ac83b48cba soc/mediatek/mt8196: Add audio base address definition
* c661933a24 soc/mediatek/common: Add read16/write16 support for PMIF
* c107755701 vc/intel/fsp: Update PTL FSP headers from 2382_01 to 2431.00
* a417acdfbc mb/google/fatcat: Remove unnecessary prototype
* d095f1ea45 soc/amd/glinda: Update MCA banks
* 8df4eefd44 soc/mediatek/mt8196: Reserve DRAM buffers for HW TX TRACKING
* 5c766bc150 mb/purism/librem_cnl: Add ramtop to cmos.layout for librem_mini
* 2007792b08 mb/purism/librem_l1um_v2/ramstage.c: Use DEV_PTR macro
* 7f54139a81 Docs/mb/starlabs/labtop_cml.md: Fix footnote syntax
Signed-off-by: Leah Rowe <leah@libreboot.org>
wip2
Signed-off-by: Leah Rowe <leah@libreboot.org>
42 files changed, 537 insertions, 811 deletions
diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb index 576ab534..f6ce2076 100644 --- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_corebootfb @@ -86,6 +86,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -193,8 +194,8 @@ CONFIG_HAVE_IFD_BIN=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y CONFIG_GFX_GMA_PANEL_1_ON_EDP=y @@ -574,6 +575,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode index 6207ecd3..593237f1 100644 --- a/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell3050micro_fsp_16mb/config/libgfxinit_txtmode @@ -86,6 +86,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -191,8 +192,8 @@ CONFIG_HAVE_IFD_BIN=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y CONFIG_GFX_GMA_PANEL_1_ON_EDP=y @@ -566,6 +567,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb index e8d7edee..87918a5f 100644 --- a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_corebootfb @@ -86,6 +86,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -193,8 +194,8 @@ CONFIG_HAVE_IFD_BIN=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y CONFIG_GFX_GMA_PANEL_1_ON_EDP=y @@ -574,6 +575,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode index 8bb5603c..b55261a4 100644 --- a/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell3050micro_vfsp_16mb/config/libgfxinit_txtmode @@ -86,6 +86,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -191,8 +192,8 @@ CONFIG_HAVE_IFD_BIN=y CONFIG_PS2K_EISAID="PNP0303" CONFIG_PS2M_EISAID="PNP0F13" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y CONFIG_GFX_GMA_PANEL_1_ON_EDP=y @@ -566,6 +567,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb index 55182e49..8d9cb74b 100644 --- a/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_corebootfb @@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -438,6 +439,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode index 7f808162..48210da8 100644 --- a/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell780mt_8mb/config/libgfxinit_txtmode @@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -434,6 +435,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb index 6e81e246..cf288873 100644 --- a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_corebootfb @@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -438,6 +439,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode index bfd63d0c..39650339 100644 --- a/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell780mt_truncate_8mb/config/libgfxinit_txtmode @@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -434,6 +435,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb index 3c0deb88..93a87b24 100644 --- a/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_corebootfb @@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -438,6 +439,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode index a6236e58..e92c5b5b 100644 --- a/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell780usff_8mb/config/libgfxinit_txtmode @@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -434,6 +435,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb index 05bcf124..80f35e59 100644 --- a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_corebootfb @@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -438,6 +439,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode index aca67948..3550d507 100644 --- a/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode +++ b/config/coreboot/dell780usff_truncate_8mb/config/libgfxinit_txtmode @@ -87,6 +87,7 @@ CONFIG_VENDOR_DELL=y # CONFIG_VENDOR_LATTEPANDA is not set # CONFIG_VENDOR_LENOVO is not set # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -434,6 +435,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set CONFIG_MRC_STASH_TO_CBMEM=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch b/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch index 1b6b5372..215a4e6d 100644 --- a/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch +++ b/config/coreboot/next/patches/0001-soc-intel-skylake-configure-usb-acpi.patch @@ -1,7 +1,7 @@ -From 18b68185f44599cf6ea6a20816bf6a5eb7aeda17 Mon Sep 17 00:00:00 2001 +From 0a28ea805e3dddfaa89e6c4255506a390bc7ce04 Mon Sep 17 00:00:00 2001 From: Felix Singer <felixsinger@posteo.net> Date: Wed, 26 Jun 2024 04:24:31 +0200 -Subject: [PATCH 1/8] soc/intel/skylake: configure usb acpi +Subject: [PATCH 01/11] soc/intel/skylake: configure usb acpi Change-Id: I53fc73046e4b107064fa8c3c617ba6d9b807b71d Signed-off-by: Felix Singer <felixsinger@posteo.net> diff --git a/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch b/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch deleted file mode 100644 index 77d7b080..00000000 --- a/config/coreboot/next/patches/0002-mb-lenovo-Add-initial-code-for-Lenovo-ThinkPad-E460.patch +++ /dev/null @@ -1,308 +0,0 @@ -From a7cbcbc7037fe3473e5ebe475cbfd12f653e9827 Mon Sep 17 00:00:00 2001 -From: Felix Singer <felixsinger@posteo.net> -Date: Wed, 26 Jun 2024 00:59:03 +0200 -Subject: [PATCH 2/8] mb/lenovo: Add initial code for Lenovo ThinkPad E460 - -Change-Id: Ia02f81750105c95c867d961dbdadcd5991ad371f -Signed-off-by: Felix Singer <felixsinger@posteo.net> ---- - src/mainboard/lenovo/sklkbl_thinkpad/Kconfig | 47 +++++++++++++++++++ - .../lenovo/sklkbl_thinkpad/Kconfig.name | 4 ++ - .../lenovo/sklkbl_thinkpad/Makefile.mk | 7 +++ - .../lenovo/sklkbl_thinkpad/acpi/ec.asl | 3 ++ - .../lenovo/sklkbl_thinkpad/acpi/superio.asl | 3 ++ - .../lenovo/sklkbl_thinkpad/bootblock.c | 7 +++ - .../lenovo/sklkbl_thinkpad/devicetree.cb | 17 +++++++ - src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl | 23 +++++++++ - .../lenovo/sklkbl_thinkpad/ramstage.c | 11 +++++ - .../lenovo/sklkbl_thinkpad/romstage.c | 7 +++ - .../variants/e460/gma-mainboard.ads | 15 ++++++ - .../sklkbl_thinkpad/variants/e460/hda_verb.c | 10 ++++ - .../variants/e460/overridetree.cb | 37 +++++++++++++++ - 13 files changed, 191 insertions(+) - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/romstage.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb - -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig -new file mode 100644 -index 0000000000..fcc80dffe3 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig -@@ -0,0 +1,47 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+ -+config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON -+ bool -+ select BOARD_ROMSIZE_KB_12288 -+ select HAVE_ACPI_RESUME -+ select HAVE_ACPI_TABLES -+# select HAVE_CMOS_DEFAULT -+# select INTEL_GMA_HAVE_VBT -+ select INTEL_LPSS_UART_FOR_CONSOLE -+ select MAINBOARD_HAS_LIBGFXINIT -+ select MEMORY_MAPPED_TPM -+ select MAINBOARD_HAS_TPM2 -+ select NO_UART_ON_SUPERIO -+ select SOC_INTEL_COMMON_BLOCK_HDA_VERB -+ select SPD_READ_BY_WORD -+ select SYSTEM_TYPE_LAPTOP -+ -+config BOARD_LENOVO_E460 -+ bool -+ select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON -+ select SOC_INTEL_SKYLAKE -+ -+if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON -+ -+config MAINBOARD_DIR -+ default "lenovo/sklkbl_thinkpad" -+ -+config VARIANT_DIR -+ default "e460" if BOARD_LENOVO_E460 -+ -+config MAINBOARD_PART_NUMBER -+ default "E460" if BOARD_LENOVO_E460 -+ -+config CBFS_SIZE -+ default 0x600000 if BOARD_LENOVO_E460 -+ -+config DIMM_MAX -+ default 4 -+ -+config DIMM_SPD_SIZE -+ default 256 -+ -+config UART_FOR_CONSOLE -+ default 2 -+ -+endif -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name -new file mode 100644 -index 0000000000..61d971fe8d ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name -@@ -0,0 +1,4 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+ -+config BOARD_LENOVO_E460 -+ bool "ThinkPad E460" -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk -new file mode 100644 -index 0000000000..6e544fd6b9 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk -@@ -0,0 +1,7 @@ -+## SPDX-License-Identifier: GPL-2.0-only -+ -+bootblock-y += bootblock.c -+ -+ramstage-y += ramstage.c -+ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c -+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl -new file mode 100644 -index 0000000000..16990d45f4 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl -@@ -0,0 +1,3 @@ -+/* SPDX-License-Identifier: CC-PDDC */ -+ -+/* Please update the license if adding licensable material. */ -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl -new file mode 100644 -index 0000000000..55b1db5b11 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl -@@ -0,0 +1,3 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <drivers/pc80/pc/ps2_controller.asl> -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c -new file mode 100644 -index 0000000000..ccd8ec1b40 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c -@@ -0,0 +1,7 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <bootblock_common.h> -+ -+void bootblock_mainboard_early_init(void) -+{ -+} -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb -new file mode 100644 -index 0000000000..ddb6e8aaa5 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb -@@ -0,0 +1,17 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+ -+chip soc/intel/skylake -+ device domain 0 on -+ device ref igpu on end -+ device ref sa_thermal on end -+ device ref thermal on end -+ device ref south_xhci on end -+ device ref lpc_espi on -+ register "serirq_mode" = "SERIRQ_CONTINUOUS" -+ chip drivers/pc80/tpm -+ device pnp 0c31.0 on end -+ end -+ end -+ device ref hda on end -+ end -+end -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl -new file mode 100644 -index 0000000000..967b652853 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl -@@ -0,0 +1,23 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <acpi/acpi.h> -+DefinitionBlock( -+ "dsdt.aml", -+ "DSDT", -+ ACPI_DSDT_REV_2, -+ OEM_ID, -+ ACPI_TABLE_CREATOR, -+ 0x20110725 -+) -+{ -+ #include <acpi/dsdt_top.asl> -+ #include <soc/intel/common/block/acpi/acpi/globalnvs.asl> -+ #include <cpu/intel/common/acpi/cpu.asl> -+ -+ Device (\_SB.PCI0) { -+ #include <soc/intel/skylake/acpi/systemagent.asl> -+ #include <soc/intel/skylake/acpi/pch.asl> -+ } -+ -+ #include <southbridge/intel/common/acpi/sleepstates.asl> -+} -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c -new file mode 100644 -index 0000000000..6c3b077cc4 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c -@@ -0,0 +1,11 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <device/device.h> -+ -+static void init_mainboard(void *chip_info) -+{ -+} -+ -+struct chip_operations mainboard_ops = { -+ .init = init_mainboard, -+}; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c -new file mode 100644 -index 0000000000..59a62f484e ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c -@@ -0,0 +1,7 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <soc/romstage.h> -+ -+void mainboard_memory_init_params(FSPM_UPD *mupd) -+{ -+} -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads -new file mode 100644 -index 0000000000..e0a166fe55 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/gma-mainboard.ads -@@ -0,0 +1,15 @@ -+-- SPDX-License-Identifier: GPL-2.0-or-later -+ -+with HW.GFX.GMA; -+with HW.GFX.GMA.Display_Probing; -+ -+use HW.GFX.GMA; -+use HW.GFX.GMA.Display_Probing; -+ -+private package GMA.Mainboard is -+ -+ ports : constant Port_List := -+ (eDP, -+ others => Disabled); -+ -+end GMA.Mainboard; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c -new file mode 100644 -index 0000000000..d9d103f862 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/hda_verb.c -@@ -0,0 +1,10 @@ -+/* SPDX-License-Identifier: GPL-2.0-only */ -+ -+#include <device/azalia_device.h> -+ -+const u32 cim_verb_data[] = { -+}; -+ -+const u32 pc_beep_verbs[] = {}; -+ -+AZALIA_ARRAY_SIZES; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb -new file mode 100644 -index 0000000000..a7384848a6 ---- /dev/null -+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/e460/overridetree.cb -@@ -0,0 +1,37 @@ -+# SPDX-License-Identifier: GPL-2.0-only -+ -+chip soc/intel/skylake -+ device domain 0 on -+ device ref south_xhci on -+ register "usb2_ports" = "{ -+ [0] = USB2_PORT_MID(OC_SKIP), // On board, right front -+ [1] = USB2_PORT_MID(OC_SKIP), // On board, right back -+ [2] = USB2_PORT_MID(OC_SKIP), // Charger port -+ [3] = USB2_PORT_MID(OC_SKIP), // Docking -+ [4] = USB2_PORT_MID(OC_SKIP), // Touch panel -+ [5] = USB2_PORT_MID(OC_SKIP), // Bluetooth -+ [6] = USB2_PORT_MID(OC_SKIP), // Camera -+ [7] = USB2_PORT_MID(OC_SKIP), // Fingerprint -+ }" -+ register "usb3_ports" = "{ -+ [0] = USB3_PORT_DEFAULT(OC_SKIP), // On board, right front -+ [1] = USB3_PORT_DEFAULT(OC_SKIP), // On board, right back -+ [2] = USB3_PORT_DEFAULT(OC_SKIP), // Charger port -+ [3] = USB3_PORT_DEFAULT(OC_SKIP), // Docking -+ }" -+ end -+ device ref sata on -+ register "SataPortsEnable[0]" = "1" -+ register "SataPortsDevSlp[0]" = "1" -+ end -+ device ref pcie_rp3 on -+ # WLAN -+ end -+ device ref pcie_rp4 on -+ # LAN -+ end -+ device ref pcie_rp6 on -+ # Card reader -+ end -+ end -+end --- -2.39.5 - diff --git a/config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch b/config/coreboot/next/patches/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch index 6e7d4b7c..f60aa74a 100644 --- a/config/coreboot/next/patches/0003-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch +++ b/config/coreboot/next/patches/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch @@ -1,7 +1,7 @@ -From b3049cfd11aa0f3c124ed8f87e98a200201ecbdc Mon Sep 17 00:00:00 2001 +From aa6dd7aa4693bd9ce1fe7f35b9532e5411fc1098 Mon Sep 17 00:00:00 2001 From: Mate Kukri <km@mkukri.xyz> Date: Fri, 22 Nov 2024 21:26:48 +0000 -Subject: [PATCH 3/8] soc/intel/skylake: Enable 4E/4F PNP I/O ports in +Subject: [PATCH 02/11] soc/intel/skylake: Enable 4E/4F PNP I/O ports in bootblock Change-Id: I57c9d8a9513a268e2ca6a0abd1306cd038598173 diff --git a/config/coreboot/next/patches/0004-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch b/config/coreboot/next/patches/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch index 1ac1a536..108f688d 100644 --- a/config/coreboot/next/patches/0004-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch +++ b/config/coreboot/next/patches/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch @@ -1,106 +1,87 @@ -From e905d7fd1ee1a791f27285715d420263e422ebee Mon Sep 17 00:00:00 2001 -From: Mate Kukri <kukri.mate@gmail.com> -Date: Mon, 2 Dec 2024 16:10:22 +0000 -Subject: [PATCH 4/8] mb/lenovo: Add ThinkPad T480 and ThinkPad T480s +From 1652c22825d3001e77159aa539dfa49d2389c775 Mon Sep 17 00:00:00 2001 +From: Mate Kukri <km@mkukri.xyz> +Date: Tue, 31 Dec 2024 22:49:15 +0000 +Subject: [PATCH 03/11] mb/lenovo: Add ThinkPad T480 and ThinkPad T480s -These machine have BootGuard fused and requires deguard to boot coreboot. - -Works: -- Intel GPU -- Internal screen -- Ethernet -- USB -- EC - + Fan control - + Keyboard - + Battery (T480 has two) - + Charging via both Type-C ports - + Debug UART (on T480) -- WLAN card: - + WiFi works - + Bluetooth works -- M.2 main SSD -- HDA verbs, Speakers, headphone jack -- S3 sleep +These machine have BootGuard fused and requires deguard to +boot coreboot. Known issues: - Alpine Ridge Thunderbolt 3 controller does not work -- Function keys are handled differently from stock firmware - + These should inject XF86 keycodes instead of directly - controlling, volume, brightness, etc in hardware. -- Nvidia dGPU +- Some Fn+F{1-12} keys aren't handled correctly +- Nvidia dGPU is finicky - Needs option ROM - Power enable code is buggy - Nouveau only works on linux 6.8-6.9 - -Untested (should work): -- SATA main SSD -- WWAN slot - + PCIe x2 NVME drive - + WWAN card (bus) -- SD reader (USB) -- Webcam (USB) -- External video outputs +- Headphone jack isn't detected as plugged in despite correct verbs Thanks to Leah Rowe for helping with the T480s. -Signed-off-by: Mate Kukri <kukri.mate@gmail.com> +Signed-off-by: Mate Kukri <km@mkukri.xyz> Change-Id: I19d421412c771c1f242f6ff39453f824fa866163 --- - src/device/pci_rom.c | 12 +- + src/device/pci_rom.c | 4 +- src/ec/lenovo/h8/acpi/ec.asl | 2 +- - src/ec/lenovo/h8/bluetooth.c | 12 +- - src/ec/lenovo/h8/wwan.c | 12 +- - src/mainboard/lenovo/sklkbl_thinkpad/Kconfig | 42 +++- - .../lenovo/sklkbl_thinkpad/Kconfig.name | 6 + - .../lenovo/sklkbl_thinkpad/Makefile.mk | 72 ++++++- - .../lenovo/sklkbl_thinkpad/acpi/ec.asl | 13 +- - .../lenovo/sklkbl_thinkpad/bootblock.c | 50 +++++ - .../lenovo/sklkbl_thinkpad/devicetree.cb | 36 ++++ - src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl | 17 +- + src/ec/lenovo/h8/bluetooth.c | 6 +- + src/ec/lenovo/h8/wwan.c | 6 +- + src/mainboard/lenovo/sklkbl_thinkpad/Kconfig | 57 +++++ + .../lenovo/sklkbl_thinkpad/Kconfig.name | 7 + + .../lenovo/sklkbl_thinkpad/Makefile.mk | 73 +++++++ + .../lenovo/sklkbl_thinkpad/acpi/ec.asl | 12 ++ + .../lenovo/sklkbl_thinkpad/acpi/superio.asl | 3 + + .../lenovo/sklkbl_thinkpad/bootblock.c | 60 ++++++ + .../lenovo/sklkbl_thinkpad/devicetree.cb | 71 ++++++ + src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl | 33 +++ src/mainboard/lenovo/sklkbl_thinkpad/ec.c | 153 +++++++++++++ src/mainboard/lenovo/sklkbl_thinkpad/ec.h | 99 +++++++++ src/mainboard/lenovo/sklkbl_thinkpad/gpio.h | 8 + - .../lenovo/sklkbl_thinkpad/ramstage.c | 98 ++++++++- - .../lenovo/sklkbl_thinkpad/romstage.c | 7 - + .../lenovo/sklkbl_thinkpad/ramstage.c | 105 +++++++++ .../sklkbl_thinkpad/variants/t480/data.vbt | Bin 0 -> 4106 bytes .../variants/t480/gma-mainboard.ads | 19 ++ .../sklkbl_thinkpad/variants/t480/gpio.c | 203 ++++++++++++++++++ .../sklkbl_thinkpad/variants/t480/hda_verb.c | 90 ++++++++ .../variants/t480/memory_init_params.c | 20 ++ - .../variants/t480/overridetree.cb | 124 +++++++++++ + .../variants/t480/overridetree.cb | 103 +++++++++ .../sklkbl_thinkpad/variants/t480s/data.vbt | Bin 0 -> 4106 bytes .../variants/t480s/gma-mainboard.ads | 19 ++ .../sklkbl_thinkpad/variants/t480s/gpio.c | 199 +++++++++++++++++ .../sklkbl_thinkpad/variants/t480s/hda_verb.c | 90 ++++++++ .../variants/t480s/memory_init_params.c | 44 ++++ - .../variants/t480s/overridetree.cb | 124 +++++++++++ - .../sklkbl_thinkpad/variants/t480s/spd_0.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_1.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_10.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_11.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_12.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_13.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_14.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_15.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_16.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_17.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_18.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_19.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_2.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_20.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_3.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_4.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_5.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_6.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_7.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_8.bin | Bin 0 -> 512 bytes - .../sklkbl_thinkpad/variants/t480s/spd_9.bin | Bin 0 -> 512 bytes - 49 files changed, 1531 insertions(+), 40 deletions(-) + .../variants/t480s/overridetree.cb | 103 +++++++++ + .../variants/t480s/spd/spd_0.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_1.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_10.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_11.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_12.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_13.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_14.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_15.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_16.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_17.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_18.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_19.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_2.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_20.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_3.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_4.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_5.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_6.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_7.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_8.bin | Bin 0 -> 512 bytes + .../variants/t480s/spd/spd_9.bin | Bin 0 -> 512 bytes + 49 files changed, 1583 insertions(+), 6 deletions(-) + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ec.c create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ec.h create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/gpio.h - delete mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/romstage.c + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c @@ -113,50 +94,47 @@ Change-Id: I19d421412c771c1f242f6ff39453f824fa866163 create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_0.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_1.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_10.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_11.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_12.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_13.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_14.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_15.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_16.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_17.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_18.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_19.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_2.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_20.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_3.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_4.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_5.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_6.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_7.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_8.bin - create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_9.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_0.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_1.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_10.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_11.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_12.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_13.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_14.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_15.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_16.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_17.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_18.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_19.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_2.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_20.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_3.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_4.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_5.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_6.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_7.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_8.bin + create mode 100644 src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_9.bin diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c -index d60720eb49..b18dfdd287 100644 +index d60720eb49..cc6b9b068a 100644 --- a/src/device/pci_rom.c +++ b/src/device/pci_rom.c -@@ -304,11 +304,11 @@ void pci_rom_ssdt(const struct device *device) +@@ -304,11 +304,13 @@ void pci_rom_ssdt(const struct device *device) return; } -- const char *scope = acpi_device_path(device); -- if (!scope) { -- printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device)); -- return; -- } -+ // const char *scope = acpi_device_path(device); -+ // if (!scope) { -+ // printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device)); -+ // return; -+ // } ++#if 0 + const char *scope = acpi_device_path(device); + if (!scope) { + printk(BIOS_ERR, "%s: Missing ACPI scope\n", dev_path(device)); + return; + } ++#endif /* Supports up to four devices. */ if ((CBMEM_ID_ROM0 + ngfx) > CBMEM_ID_ROM3) { -@@ -336,7 +336,7 @@ void pci_rom_ssdt(const struct device *device) +@@ -336,7 +338,7 @@ void pci_rom_ssdt(const struct device *device) memcpy(cbrom, rom, cbrom_length); /* write _ROM method */ @@ -179,7 +157,7 @@ index bc54d3b422..8f4a8e1986 100644 #include "thinkpad.asl" } diff --git a/src/ec/lenovo/h8/bluetooth.c b/src/ec/lenovo/h8/bluetooth.c -index 16fc8dce39..ef4f6ad1f5 100644 +index 16fc8dce39..be71a24ced 100644 --- a/src/ec/lenovo/h8/bluetooth.c +++ b/src/ec/lenovo/h8/bluetooth.c @@ -1,6 +1,6 @@ @@ -190,7 +168,7 @@ index 16fc8dce39..ef4f6ad1f5 100644 #include <console/console.h> #include <device/device.h> #include <ec/acpi/ec.h> -@@ -28,16 +28,16 @@ bool h8_has_bdc(const struct device *dev) +@@ -28,16 +28,18 @@ bool h8_has_bdc(const struct device *dev) { struct ec_lenovo_h8_config *conf = dev->chip_info; @@ -201,19 +179,17 @@ index 16fc8dce39..ef4f6ad1f5 100644 return true; } -- if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) { -- printk(BIOS_INFO, "H8: BDC installed\n"); -- return true; -- } -+ // if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) { -+ // printk(BIOS_INFO, "H8: BDC installed\n"); -+ // return true; -+ // } ++#if 0 + if (get_gpio(conf->bdc_gpio_num) == conf->bdc_gpio_lvl) { + printk(BIOS_INFO, "H8: BDC installed\n"); + return true; + } ++#endif printk(BIOS_INFO, "H8: BDC not installed\n"); return false; diff --git a/src/ec/lenovo/h8/wwan.c b/src/ec/lenovo/h8/wwan.c -index 685886fcce..5e0ae030e2 100644 +index 685886fcce..5cdcf77406 100644 --- a/src/ec/lenovo/h8/wwan.c +++ b/src/ec/lenovo/h8/wwan.c @@ -1,6 +1,6 @@ @@ -224,7 +200,7 @@ index 685886fcce..5e0ae030e2 100644 #include <console/console.h> #include <device/device.h> #include <ec/acpi/ec.h> -@@ -26,16 +26,16 @@ bool h8_has_wwan(const struct device *dev) +@@ -26,16 +26,18 @@ bool h8_has_wwan(const struct device *dev) { struct ec_lenovo_h8_config *conf = dev->chip_info; @@ -235,110 +211,85 @@ index 685886fcce..5e0ae030e2 100644 return true; } -- if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) { -- printk(BIOS_INFO, "H8: WWAN installed\n"); -- return true; -- } -+ // if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) { -+ // printk(BIOS_INFO, "H8: WWAN installed\n"); -+ // return true; -+ // } ++#if 0 + if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) { + printk(BIOS_INFO, "H8: WWAN installed\n"); + return true; + } ++#endif printk(BIOS_INFO, "H8: WWAN not installed\n"); return false; diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig -index fcc80dffe3..21076315ab 100644 ---- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig +new file mode 100644 +index 0000000000..4998672943 +--- /dev/null +++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig -@@ -2,16 +2,20 @@ - - config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON - bool -- select BOARD_ROMSIZE_KB_12288 +@@ -0,0 +1,57 @@ ++# SPDX-License-Identifier: GPL-2.0-only ++ ++config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON ++ bool ++ select BOARD_ROMSIZE_KB_16384 + select EC_LENOVO_H8 + select EC_LENOVO_PMH7 + select H8_HAS_BAT_THRESHOLDS_IMPL + select H8_HAS_LEDLOGO + select H8_HAS_PRIMARY_FN_KEYS - select HAVE_ACPI_RESUME - select HAVE_ACPI_TABLES - # select HAVE_CMOS_DEFAULT --# select INTEL_GMA_HAVE_VBT -- select INTEL_LPSS_UART_FOR_CONSOLE ++ select HAVE_ACPI_RESUME ++ select HAVE_ACPI_TABLES + select INTEL_GMA_HAVE_VBT + select INTEL_INT15 - select MAINBOARD_HAS_LIBGFXINIT - select MEMORY_MAPPED_TPM - select MAINBOARD_HAS_TPM2 -- select NO_UART_ON_SUPERIO ++ select MAINBOARD_HAS_LIBGFXINIT ++ select MAINBOARD_HAS_TPM2 + select MAINBOARD_USES_IFD_GBE_REGION - select SOC_INTEL_COMMON_BLOCK_HDA_VERB - select SPD_READ_BY_WORD - select SYSTEM_TYPE_LAPTOP -@@ -19,8 +23,22 @@ config BOARD_LENOVO_SKLKBL_THINKPAD_COMMON - config BOARD_LENOVO_E460 - bool - select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON -+ select BOARD_ROMSIZE_KB_12288 -+ select INTEL_LPSS_UART_FOR_CONSOLE - select SOC_INTEL_SKYLAKE - ++ select MEMORY_MAPPED_TPM ++ select SOC_INTEL_COMMON_BLOCK_HDA_VERB ++ select SOC_INTEL_KABYLAKE ++ select SPD_READ_BY_WORD ++ select SYSTEM_TYPE_LAPTOP ++ +config BOARD_LENOVO_T480 + bool + select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON -+ select BOARD_ROMSIZE_KB_16384 -+ select SOC_INTEL_KABYLAKE + +config BOARD_LENOVO_T480S + bool + select BOARD_LENOVO_SKLKBL_THINKPAD_COMMON -+ select BOARD_ROMSIZE_KB_16384 -+ select SOC_INTEL_KABYLAKE + - if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON - - config MAINBOARD_DIR -@@ -28,18 +46,30 @@ config MAINBOARD_DIR - - config VARIANT_DIR - default "e460" if BOARD_LENOVO_E460 ++if BOARD_LENOVO_SKLKBL_THINKPAD_COMMON ++ ++config MAINBOARD_DIR ++ default "lenovo/sklkbl_thinkpad" ++ ++config VARIANT_DIR + default "t480" if BOARD_LENOVO_T480 + default "t480s" if BOARD_LENOVO_T480S + +config OVERRIDE_DEVICETREE + default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" - - config MAINBOARD_PART_NUMBER - default "E460" if BOARD_LENOVO_E460 ++ ++config MAINBOARD_PART_NUMBER + default "T480" if BOARD_LENOVO_T480 + default "T480s" if BOARD_LENOVO_T480S - - config CBFS_SIZE - default 0x600000 if BOARD_LENOVO_E460 -+ default 0x900000 if BOARD_LENOVO_T480 || BOARD_LENOVO_T480S - - config DIMM_MAX -- default 4 ++ ++config CBFS_SIZE ++ default 0x900000 ++ ++config DIMM_MAX + default 2 - - config DIMM_SPD_SIZE -- default 256 ++ ++config DIMM_SPD_SIZE + default 512 # DDR4 + +endif -+ -+if BOARD_LENOVO_E460 - - config UART_FOR_CONSOLE - default 2 diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name -index 61d971fe8d..15441c4264 100644 ---- a/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name +new file mode 100644 +index 0000000000..abc273f387 +--- /dev/null +++ b/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name -@@ -2,3 +2,9 @@ - - config BOARD_LENOVO_E460 - bool "ThinkPad E460" +@@ -0,0 +1,7 @@ ++# SPDX-License-Identifier: GPL-2.0-only + +config BOARD_LENOVO_T480 + bool "ThinkPad T480" @@ -346,97 +297,94 @@ index 61d971fe8d..15441c4264 100644 +config BOARD_LENOVO_T480S + bool "ThinkPad T480s" diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk -index 6e544fd6b9..49d6ebdb4e 100644 ---- a/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk +new file mode 100644 +index 0000000000..c308239177 +--- /dev/null +++ b/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk -@@ -1,7 +1,73 @@ - ## SPDX-License-Identifier: GPL-2.0-only - --bootblock-y += bootblock.c +@@ -0,0 +1,73 @@ ++## SPDX-License-Identifier: GPL-2.0-only ++ +bootblock-y += bootblock.c ec.c - --ramstage-y += ramstage.c --ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c ++ +romstage-y += variants/$(VARIANT_DIR)/memory_init_params.c + +ramstage-y += ramstage.c ec.c +ramstage-y += variants/$(VARIANT_DIR)/gpio.c variants/$(VARIANT_DIR)/hda_verb.c - ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads ++ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads + +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_0.bin -+spd_0.bin-file := variants/$(VARIANT_DIR)/spd_0.bin ++spd_0.bin-file := variants/$(VARIANT_DIR)/spd/spd_0.bin +spd_0.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_1.bin -+spd_1.bin-file := variants/$(VARIANT_DIR)/spd_1.bin ++spd_1.bin-file := variants/$(VARIANT_DIR)/spd/spd_1.bin +spd_1.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_2.bin -+spd_2.bin-file := variants/$(VARIANT_DIR)/spd_2.bin ++spd_2.bin-file := variants/$(VARIANT_DIR)/spd/spd_2.bin +spd_2.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_3.bin -+spd_3.bin-file := variants/$(VARIANT_DIR)/spd_3.bin ++spd_3.bin-file := variants/$(VARIANT_DIR)/spd/spd_3.bin +spd_3.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_4.bin -+spd_4.bin-file := variants/$(VARIANT_DIR)/spd_4.bin ++spd_4.bin-file := variants/$(VARIANT_DIR)/spd/spd_4.bin +spd_4.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_5.bin -+spd_5.bin-file := variants/$(VARIANT_DIR)/spd_5.bin ++spd_5.bin-file := variants/$(VARIANT_DIR)/spd/spd_5.bin +spd_5.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_6.bin -+spd_6.bin-file := variants/$(VARIANT_DIR)/spd_6.bin ++spd_6.bin-file := variants/$(VARIANT_DIR)/spd/spd_6.bin +spd_6.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_7.bin -+spd_7.bin-file := variants/$(VARIANT_DIR)/spd_7.bin ++spd_7.bin-file := variants/$(VARIANT_DIR)/spd/spd_7.bin +spd_7.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_8.bin -+spd_8.bin-file := variants/$(VARIANT_DIR)/spd_8.bin ++spd_8.bin-file := variants/$(VARIANT_DIR)/spd/spd_8.bin +spd_8.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_9.bin -+spd_9.bin-file := variants/$(VARIANT_DIR)/spd_9.bin ++spd_9.bin-file := variants/$(VARIANT_DIR)/spd/spd_9.bin +spd_9.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_10.bin -+spd_10.bin-file := variants/$(VARIANT_DIR)/spd_10.bin ++spd_10.bin-file := variants/$(VARIANT_DIR)/spd/spd_10.bin +spd_10.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_11.bin -+spd_11.bin-file := variants/$(VARIANT_DIR)/spd_11.bin ++spd_11.bin-file := variants/$(VARIANT_DIR)/spd/spd_11.bin +spd_11.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_12.bin -+spd_12.bin-file := variants/$(VARIANT_DIR)/spd_12.bin ++spd_12.bin-file := variants/$(VARIANT_DIR)/spd/spd_12.bin +spd_12.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_13.bin -+spd_13.bin-file := variants/$(VARIANT_DIR)/spd_13.bin ++spd_13.bin-file := variants/$(VARIANT_DIR)/spd/spd_13.bin +spd_13.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_14.bin -+spd_14.bin-file := variants/$(VARIANT_DIR)/spd_14.bin ++spd_14.bin-file := variants/$(VARIANT_DIR)/spd/spd_14.bin +spd_14.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_15.bin -+spd_15.bin-file := variants/$(VARIANT_DIR)/spd_15.bin ++spd_15.bin-file := variants/$(VARIANT_DIR)/spd/spd_15.bin +spd_15.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_16.bin -+spd_16.bin-file := variants/$(VARIANT_DIR)/spd_16.bin ++spd_16.bin-file := variants/$(VARIANT_DIR)/spd/spd_16.bin +spd_16.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_17.bin -+spd_17.bin-file := variants/$(VARIANT_DIR)/spd_17.bin ++spd_17.bin-file := variants/$(VARIANT_DIR)/spd/spd_17.bin +spd_17.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_18.bin -+spd_18.bin-file := variants/$(VARIANT_DIR)/spd_18.bin ++spd_18.bin-file := variants/$(VARIANT_DIR)/spd/spd_18.bin +spd_18.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_19.bin -+spd_19.bin-file := variants/$(VARIANT_DIR)/spd_19.bin ++spd_19.bin-file := variants/$(VARIANT_DIR)/spd/spd_19.bin +spd_19.bin-type := raw +cbfs-files-$(CONFIG_BOARD_LENOVO_T480S) += spd_20.bin -+spd_20.bin-file := variants/$(VARIANT_DIR)/spd_20.bin ++spd_20.bin-file := variants/$(VARIANT_DIR)/spd/spd_20.bin +spd_20.bin-type := raw diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl -index 16990d45f4..514b95a60f 100644 ---- a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl +new file mode 100644 +index 0000000000..3a949a2fca +--- /dev/null +++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl -@@ -1,3 +1,12 @@ --/* SPDX-License-Identifier: CC-PDDC */ +@@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ - --/* Please update the license if adding licensable material. */ -+#define BRIGHTNESS_UP() -+#define BRIGHTNESS_DOWN() ++ ++#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB ++#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB +#define THINKPAD_EC_GPE 22 + +Name(\TCRT, 100) @@ -445,15 +393,25 @@ index 16990d45f4..514b95a60f 100644 + +#include <ec/lenovo/h8/acpi/ec.asl> +#include <ec/lenovo/h8/acpi/thinkpad_bat_thresholds_b0.asl> +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl +new file mode 100644 +index 0000000000..55b1db5b11 +--- /dev/null ++++ b/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl +@@ -0,0 +1,3 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#include <drivers/pc80/pc/ps2_controller.asl> diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c -index ccd8ec1b40..55afd3d048 100644 ---- a/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c +new file mode 100644 +index 0000000000..fb660dbdfa +--- /dev/null +++ b/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c -@@ -1,7 +1,57 @@ - /* SPDX-License-Identifier: GPL-2.0-only */ - +@@ -0,0 +1,60 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ +#include <arch/io.h> - #include <bootblock_common.h> ++#include <bootblock_common.h> +#include <device/pci.h> +#include <soc/pci_devs.h> +#include "ec.h" @@ -476,25 +434,22 @@ index ccd8ec1b40..55afd3d048 100644 + + microchip_pnp_exit_conf_state(port); + -+ // NOTE: this is incredibly hacky and uses a debug backdoor in the EC -+ // firmware to control the UART GPIOs. -+ // Unfortunately production EC firmware has no way to do this via regular EC -+ // commands. -+ ++#ifdef CONFIG_BOARD_LENOVO_T480 + // Supply debug unlock key + debug_write_key(DEBUG_RW_KEY_IDX, debug_rw_key); + + // Use debug writes to set UART_TX and UART_RX GPIOs + debug_write_dword(0xf0c400 + 0x110, 0x00001000); + debug_write_dword(0xf0c400 + 0x114, 0x00001000); ++#endif +} + + +#define UART_PORT 0x3f8 +#define UART_IRQ 4 - - void bootblock_mainboard_early_init(void) - { ++ ++void bootblock_mainboard_early_init(void) ++{ + // Tell EC via BIOS Debug Port 1 that the world isn't on fire + + // Let the EC know that BIOS code is running @@ -504,17 +459,49 @@ index ccd8ec1b40..55afd3d048 100644 + // Enable accesses to EC1 interface + ec0_write(0, ec0_read(0) | 0x20); + ++ // Reset LEDs to power on state ++ // (Without this warm reboot leaves LEDs off) ++ ec0_write(0x0c, 0x80); ++ ec0_write(0x0c, 0x07); ++ ec0_write(0x0c, 0x8a); ++ + // Setup debug UART + configure_uart(EC_CFG_PORT, UART_PORT, UART_IRQ); - } ++} diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb -index ddb6e8aaa5..745af8c8cd 100644 ---- a/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb +new file mode 100644 +index 0000000000..c07d4d53ca +--- /dev/null +++ b/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb -@@ -8,6 +8,42 @@ chip soc/intel/skylake - device ref south_xhci on end - device ref lpc_espi on - register "serirq_mode" = "SERIRQ_CONTINUOUS" +@@ -0,0 +1,71 @@ ++# SPDX-License-Identifier: GPL-2.0-only ++ ++chip soc/intel/skylake ++ # IGD Displays ++ register "gfx" = "GMA_STATIC_DISPLAYS(0)" ++ ++ register "panel_cfg" = "{ ++ .up_delay_ms = 200, ++ .down_delay_ms = 50, ++ .cycle_delay_ms = 600, ++ .backlight_on_delay_ms = 1, ++ .backlight_off_delay_ms = 200, ++ .backlight_pwm_hz = 200, ++ }" ++ ++ # Power ++ register "PmConfigSlpS3MinAssert" = "2" # 50ms ++ register "PmConfigSlpS4MinAssert" = "1" # 1s ++ register "PmConfigSlpSusMinAssert" = "3" # 500ms ++ register "PmConfigSlpAMinAssert" = "3" # 2s ++ ++ device domain 0 on ++ device ref igpu on end ++ device ref sa_thermal on end ++ device ref thermal on end ++ device ref south_xhci on end ++ device ref lpc_espi on ++ register "serirq_mode" = "SERIRQ_CONTINUOUS" + + register "gen1_dec" = "0x007c1601" + register "gen2_dec" = "0x000c15e1" @@ -551,33 +538,39 @@ index ddb6e8aaa5..745af8c8cd 100644 + end + end + - chip drivers/pc80/tpm - device pnp 0c31.0 on end - end ++ chip drivers/pc80/tpm ++ device pnp 0c31.0 on end ++ end ++ end ++ device ref hda on end ++ end ++end diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl -index 967b652853..237500775f 100644 ---- a/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl +new file mode 100644 +index 0000000000..aa4d4de2a6 +--- /dev/null +++ b/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl -@@ -1,5 +1,10 @@ - /* SPDX-License-Identifier: GPL-2.0-only */ - -+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB -+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB -+#define EC_LENOVO_H8_ME_WORKAROUND 1 -+#define THINKPAD_EC_GPE 17 -+ - #include <acpi/acpi.h> - DefinitionBlock( - "dsdt.aml", -@@ -14,9 +19,19 @@ DefinitionBlock( - #include <soc/intel/common/block/acpi/acpi/globalnvs.asl> - #include <cpu/intel/common/acpi/cpu.asl> - -- Device (\_SB.PCI0) { +@@ -0,0 +1,33 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#include <acpi/acpi.h> ++DefinitionBlock( ++ "dsdt.aml", ++ "DSDT", ++ ACPI_DSDT_REV_2, ++ OEM_ID, ++ ACPI_TABLE_CREATOR, ++ 0x20110725 ++) ++{ ++ #include <acpi/dsdt_top.asl> ++ #include <soc/intel/common/block/acpi/acpi/globalnvs.asl> ++ #include <cpu/intel/common/acpi/cpu.asl> ++ + Device (\_SB.PCI0) + { - #include <soc/intel/skylake/acpi/systemagent.asl> - #include <soc/intel/skylake/acpi/pch.asl> ++ #include <soc/intel/skylake/acpi/systemagent.asl> ++ #include <soc/intel/skylake/acpi/pch.asl> + #include <drivers/intel/gma/acpi/default_brightness_levels.asl> + } + @@ -587,9 +580,10 @@ index 967b652853..237500775f 100644 + { + Name (_ADR, Zero) + } - } - - #include <southbridge/intel/common/acpi/sleepstates.asl> ++ } ++ ++ #include <southbridge/intel/common/acpi/sleepstates.asl> ++} diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ec.c b/src/mainboard/lenovo/sklkbl_thinkpad/ec.c new file mode 100644 index 0000000000..adb6a60324 @@ -869,21 +863,21 @@ index 0000000000..d89ed712d4 + +#endif diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c -index 6c3b077cc4..b41cca02a7 100644 ---- a/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c +new file mode 100644 +index 0000000000..44c8578852 +--- /dev/null +++ b/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c -@@ -1,11 +1,105 @@ - /* SPDX-License-Identifier: GPL-2.0-only */ - +@@ -0,0 +1,105 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ +#include <arch/io.h> - #include <device/device.h> ++#include <device/device.h> +#include <drivers/intel/gma/int15.h> +#include <option.h> +#include <soc/ramstage.h> +#include "ec.h" +#include "gpio.h" - --static void init_mainboard(void *chip_info) ++ +#define GPIO_GPU_RST GPP_E22 // active low +#define GPIO_1R8VIDEO_AON_ON GPP_E23 + @@ -895,7 +889,7 @@ index 6c3b077cc4..b41cca02a7 100644 + +void mainboard_silicon_init_params(FSP_SIL_UPD *params) +{ -+ static const char *dgfx_vram_id_str[] = { "1GB", "2GB", "4GB", "N/A" }; ++ static const char * const dgfx_vram_id_str[] = { "1GB", "2GB", "4GB", "N/A" }; + + int dgfx_vram_id; + @@ -971,28 +965,14 @@ index 6c3b077cc4..b41cca02a7 100644 +} + +static void mainboard_init(void *chip_info) - { ++{ + dump_ec_cfg(EC_CFG_PORT); - } - - struct chip_operations mainboard_ops = { -- .init = init_mainboard, ++} ++ ++struct chip_operations mainboard_ops = { + .enable_dev = mainboard_enable, + .init = mainboard_init, - }; -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c b/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c -deleted file mode 100644 -index 59a62f484e..0000000000 ---- a/src/mainboard/lenovo/sklkbl_thinkpad/romstage.c -+++ /dev/null -@@ -1,7 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0-only */ -- --#include <soc/romstage.h> -- --void mainboard_memory_init_params(FSPM_UPD *mupd) --{ --} ++}; diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt new file mode 100644 index 0000000000000000000000000000000000000000..4db4202961d0be67b75f52b28f2111d5655595c3 @@ -1386,31 +1366,13 @@ index 0000000000..5252a402f9 +} diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb new file mode 100644 -index 0000000000..4b68ec3f49 +index 0000000000..bf66bd3a69 --- /dev/null +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb -@@ -0,0 +1,124 @@ +@@ -0,0 +1,103 @@ +# SPDX-License-Identifier: GPL-2.0-only + +chip soc/intel/skylake -+ # IGD Displays -+ register "gfx" = "GMA_STATIC_DISPLAYS(0)" -+ -+ register "panel_cfg" = "{ -+ .up_delay_ms = 200, -+ .down_delay_ms = 50, -+ .cycle_delay_ms = 600, -+ .backlight_on_delay_ms = 1, -+ .backlight_off_delay_ms = 200, -+ .backlight_pwm_hz = 200, -+ }" -+ -+ # Power -+ register "PmConfigSlpS3MinAssert" = "2" # 50ms -+ register "PmConfigSlpS4MinAssert" = "1" # 1s -+ register "PmConfigSlpSusMinAssert" = "3" # 500ms -+ register "PmConfigSlpAMinAssert" = "3" # 2s -+ + device domain 0 on + device ref south_xhci on + register "usb2_ports" = "{ @@ -1434,12 +1396,9 @@ index 0000000000..4b68ec3f49 + end + + device ref sata on -+ # SATA_0 - NC -+ # SATA_1A - NC -+ # SATA_1B - NC -+ # SATA_2 - SATA caddy -+ register "SataPortsEnable[3]" = "1" -+ register "SataPortsDevSlp[3]" = "1" ++ # SATA_2 - JHDD1 SATA SSD ++ register "SataPortsEnable[2]" = "1" ++ register "SataPortsDevSlp[2]" = "1" + end + + # PCIe controller 1 - 1x4 @@ -1877,7 +1836,7 @@ index 0000000000..b1d96c5a76 +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c new file mode 100644 -index 0000000000..085abebbcb +index 0000000000..001e934b3a --- /dev/null +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c @@ -0,0 +1,44 @@ @@ -1915,7 +1874,7 @@ index 0000000000..085abebbcb + spd_idx = gpio_get(GPP_F16) | gpio_get(GPP_F17) << 1 | gpio_get(GPP_F18) << 2 | + gpio_get(GPP_F19) << 3 | gpio_get(GPP_F20) << 4; + printk(BIOS_DEBUG, "Detected MEMORY_ID = %d\n", spd_idx); -+ snprintf(spd_name, sizeof spd_name, "spd_%d.bin", spd_idx); ++ snprintf(spd_name, sizeof(spd_name), "spd_%d.bin", spd_idx); + mem_cfg->MemorySpdPtr00 = (uintptr_t)cbfs_map(spd_name, &spd_size); + + /* Get SPD for memory slot (CH B) */ @@ -1927,31 +1886,13 @@ index 0000000000..085abebbcb +} diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb new file mode 100644 -index 0000000000..5f1c38bc03 +index 0000000000..d4afca20c4 --- /dev/null +++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb -@@ -0,0 +1,124 @@ +@@ -0,0 +1,103 @@ +# SPDX-License-Identifier: GPL-2.0-only + +chip soc/intel/skylake -+ # IGD Displays -+ register "gfx" = "GMA_STATIC_DISPLAYS(0)" -+ -+ register "panel_cfg" = "{ -+ .up_delay_ms = 200, -+ .down_delay_ms = 50, -+ .cycle_delay_ms = 600, -+ .backlight_on_delay_ms = 1, -+ .backlight_off_delay_ms = 200, -+ .backlight_pwm_hz = 200, -+ }" -+ -+ # Power -+ register "PmConfigSlpS3MinAssert" = "2" # 50ms -+ register "PmConfigSlpS4MinAssert" = "1" # 1s -+ register "PmConfigSlpSusMinAssert" = "3" # 500ms -+ register "PmConfigSlpAMinAssert" = "3" # 2s -+ + device domain 0 on + device ref south_xhci on + register "usb2_ports" = "{ @@ -1975,12 +1916,9 @@ index 0000000000..5f1c38bc03 + end + + device ref sata on -+ # SATA_0 - NC -+ # SATA_1A - NC -+ # SATA_1B - NC -+ # SATA_2 - M.2 2280 SATA -+ register "SataPortsEnable[3]" = "1" -+ register "SataPortsDevSlp[3]" = "1" ++ # SATA_2 - Main M.2 SATA SSD ++ register "SataPortsEnable[2]" = "1" ++ register "SataPortsDevSlp[2]" = "1" + end + + # PCIe controller 1 - 1x2+2x1 @@ -2055,7 +1993,7 @@ index 0000000000..5f1c38bc03 + end + end +end -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_0.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_0.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_0.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_0.bin new file mode 100644 index 0000000000000000000000000000000000000000..86f39ddb55ea9fb58d5e5699637636ef597c734e GIT binary patch @@ -2066,7 +2004,7 @@ YT>%dM8_BI;nL`dsaHtp+rc($20I8n}l>h($ literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_1.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_1.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_1.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_1.bin new file mode 100644 index 0000000000000000000000000000000000000000..df0f6e58b79286a4aeb690c5027adf7a1f5f668b GIT binary patch @@ -2077,7 +2015,7 @@ Yx&j>hH(SqvWezd%<4`dwOs5b40B_I==>Px# literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_10.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_10.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_10.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_10.bin new file mode 100644 index 0000000000000000000000000000000000000000..24f0d8992bc5244c62488da9633e4885f52f3e22 GIT binary patch @@ -2089,7 +2027,7 @@ PvjPw>z-1}5hGzN!nb#F$ literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_11.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_11.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_11.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_11.bin new file mode 100644 index 0000000000000000000000000000000000000000..59b6b9e78263c42aae367ab7d4a784d888f30efe GIT binary patch @@ -2101,7 +2039,7 @@ YZDQ=?WT@*L<g5S$3~*UWt)ZEI0F{0fq5uE@ literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_12.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_12.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_12.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_12.bin new file mode 100644 index 0000000000000000000000000000000000000000..93be0ac94fc57222cd29e34eee11042d7842ac25 GIT binary patch @@ -2113,7 +2051,7 @@ VsD}a&Ff^?FkI#a;_$28g2LQ`x7jOUo literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_13.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_13.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_13.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_13.bin new file mode 100644 index 0000000000000000000000000000000000000000..171a272bc734b72395622bf889d24972ef2d14f7 GIT binary patch @@ -2125,7 +2063,7 @@ VsD}a&Ff^?FkI#a;_$28g2LP>g7pDLK literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_14.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_14.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_14.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_14.bin new file mode 100644 index 0000000000000000000000000000000000000000..a2a64a5e1adada3fc00b2e4edc60c77e610881a9 GIT binary patch @@ -2137,7 +2075,7 @@ GCj$V){1T)9 literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_15.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_15.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_15.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_15.bin new file mode 100644 index 0000000000000000000000000000000000000000..a2a64a5e1adada3fc00b2e4edc60c77e610881a9 GIT binary patch @@ -2149,7 +2087,7 @@ GCj$V){1T)9 literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_16.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_16.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_16.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_16.bin new file mode 100644 index 0000000000000000000000000000000000000000..a64a5a93fb4aef4d5f63d79cb2582731b9ac5063 GIT binary patch @@ -2159,7 +2097,7 @@ NcmZQz7zHCa1ONg600961 literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_17.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_17.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_17.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_17.bin new file mode 100644 index 0000000000000000000000000000000000000000..5f23e86606094d3e5d2011db902ebd4a500bbffa GIT binary patch @@ -2171,7 +2109,7 @@ V%v%8n7#i08$7jJ^e3JB$0{}ZV7fApB literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_18.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_18.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_18.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_18.bin new file mode 100644 index 0000000000000000000000000000000000000000..05633943eb5af166da66a2e1f4e74948f75782fb GIT binary patch @@ -2183,7 +2121,7 @@ Vn70BDFf^?FkI#a;_$28g2LNS*7)Ag9 literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_19.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_19.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_19.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_19.bin new file mode 100644 index 0000000000000000000000000000000000000000..857da9c9828cdac842329f6cef4539283777268b GIT binary patch @@ -2195,7 +2133,7 @@ GP6hy+m=i1j literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_2.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_2.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_2.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_2.bin new file mode 100644 index 0000000000000000000000000000000000000000..b5b14cf2dfa06ae183b0379da4dc825129e1589f GIT binary patch @@ -2206,7 +2144,7 @@ XT>%b$v*cE=%%S%6I8=-Z(<uZ1pPdSg literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_20.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_20.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_20.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_20.bin new file mode 100644 index 0000000000000000000000000000000000000000..a64a5a93fb4aef4d5f63d79cb2582731b9ac5063 GIT binary patch @@ -2216,7 +2154,7 @@ NcmZQz7zHCa1ONg600961 literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_3.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_3.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_3.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_3.bin new file mode 100644 index 0000000000000000000000000000000000000000..d73736008af1eb67456b2fd66f7dec3b6669a442 GIT binary patch @@ -2227,7 +2165,7 @@ YT>%b$+tzbnnL|62aHtp+rc($20QGqazW@LL literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_4.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_4.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_4.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_4.bin new file mode 100644 index 0000000000000000000000000000000000000000..829f149547bc24859646c33d5926938d7a1b90cb GIT binary patch @@ -2238,7 +2176,7 @@ XT>%b$o8(ro%%OI594bbI=@bG0z{d&v literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_5.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_5.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_5.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_5.bin new file mode 100644 index 0000000000000000000000000000000000000000..a64a5a93fb4aef4d5f63d79cb2582731b9ac5063 GIT binary patch @@ -2248,7 +2186,7 @@ NcmZQz7zHCa1ONg600961 literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_6.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_6.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_6.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_6.bin new file mode 100644 index 0000000000000000000000000000000000000000..a64a5a93fb4aef4d5f63d79cb2582731b9ac5063 GIT binary patch @@ -2258,7 +2196,7 @@ NcmZQz7zHCa1ONg600961 literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_7.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_7.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_7.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_7.bin new file mode 100644 index 0000000000000000000000000000000000000000..940f1e3cd8e5bd9ea32a82a14edcdcbc8132d8c7 GIT binary patch @@ -2270,7 +2208,7 @@ E020*^DF6Tf literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_8.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_8.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_8.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_8.bin new file mode 100644 index 0000000000000000000000000000000000000000..30c84410d417ef7afa8705c93cdb64a9f4e915a0 GIT binary patch @@ -2282,7 +2220,7 @@ H2PXpn6CD!Q literal 0 HcmV?d00001 -diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_9.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd_9.bin +diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_9.bin b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_9.bin new file mode 100644 index 0000000000000000000000000000000000000000..7facef55b93fe1f67411c00bab84862769461f63 GIT binary patch diff --git a/config/coreboot/next/patches/0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch b/config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch index e490a807..77513b77 100644 --- a/config/coreboot/next/patches/0005-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch +++ b/config/coreboot/next/patches/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch @@ -1,7 +1,7 @@ -From 534d696a570a50057153669247933ec1a4a2480f Mon Sep 17 00:00:00 2001 +From 2527c4a5131d7b33e43bbc03a94921e7e59b4b02 Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Mon, 30 Sep 2024 20:44:38 -0400 -Subject: [PATCH 5/8] mb/dell: Add Optiplex 780 MT (x4x/ICH10) +Subject: [PATCH 04/11] mb/dell: Add Optiplex 780 MT (x4x/ICH10) Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> diff --git a/config/coreboot/next/patches/0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch b/config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch index 51bbfa5c..d5896fdc 100644 --- a/config/coreboot/next/patches/0006-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch +++ b/config/coreboot/next/patches/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch @@ -1,7 +1,7 @@ -From 851043846f589e718a69009a6b157b4ff5315471 Mon Sep 17 00:00:00 2001 +From 27b2f2bc24e5e860b87119c963e534fb0d3e55f2 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Sun, 19 Feb 2023 18:21:43 +0000 -Subject: [PATCH 6/8] util/ifdtool: add --nuke flag (all 0xFF on region) +Subject: [PATCH 05/11] util/ifdtool: add --nuke flag (all 0xFF on region) When this option is used, the region's contents are overwritten with all ones (0xFF). @@ -20,7 +20,7 @@ Signed-off-by: Leah Rowe <leah@libreboot.org> 1 file changed, 83 insertions(+), 31 deletions(-) diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c -index ace05e2265..ba292fd142 100644 +index 94105efe52..0706496af2 100644 --- a/util/ifdtool/ifdtool.c +++ b/util/ifdtool/ifdtool.c @@ -2230,6 +2230,7 @@ static void print_usage(const char *name) @@ -98,9 +98,9 @@ index ace05e2265..ba292fd142 100644 int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0; + int mode_nuke = 0; int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0; - char *region_type_string = NULL, *region_fname = NULL; - const char *layout_fname = NULL; -@@ -2280,6 +2336,7 @@ int main(int argc, char *argv[]) + char *region_type_string = NULL, *region_fname = NULL, *layout_fname = NULL; + char *new_filename = NULL; +@@ -2279,6 +2335,7 @@ int main(int argc, char *argv[]) {"validate", 0, NULL, 't'}, {"setpchstrap", 1, NULL, 'S'}, {"newvalue", 1, NULL, 'V'}, @@ -108,7 +108,7 @@ index ace05e2265..ba292fd142 100644 {0, 0, 0, 0} }; -@@ -2329,35 +2386,8 @@ int main(int argc, char *argv[]) +@@ -2328,35 +2385,8 @@ int main(int argc, char *argv[]) region_fname++; // Descriptor, BIOS, ME, GbE, Platform // valid type? @@ -146,7 +146,7 @@ index ace05e2265..ba292fd142 100644 fprintf(stderr, "No such region type: '%s'\n\n", region_type_string); fprintf(stderr, "run '%s -h' for usage\n", argv[0]); -@@ -2534,6 +2564,22 @@ int main(int argc, char *argv[]) +@@ -2533,6 +2563,22 @@ int main(int argc, char *argv[]) case 't': mode_validate = 1; break; @@ -169,7 +169,7 @@ index ace05e2265..ba292fd142 100644 case 'v': print_version(); exit(EXIT_SUCCESS); -@@ -2553,7 +2599,8 @@ int main(int argc, char *argv[]) +@@ -2552,7 +2598,8 @@ int main(int argc, char *argv[]) if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject + mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 | mode_unlocked | mode_locked) + mode_altmedisable + mode_validate + @@ -179,7 +179,7 @@ index ace05e2265..ba292fd142 100644 fprintf(stderr, "You may not specify more than one mode.\n\n"); fprintf(stderr, "run '%s -h' for usage\n", argv[0]); exit(EXIT_FAILURE); -@@ -2562,7 +2609,8 @@ int main(int argc, char *argv[]) +@@ -2561,7 +2608,8 @@ int main(int argc, char *argv[]) if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject + mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 + mode_locked + mode_unlocked + mode_density + mode_altmedisable + @@ -189,7 +189,7 @@ index ace05e2265..ba292fd142 100644 fprintf(stderr, "You need to specify a mode.\n\n"); fprintf(stderr, "run '%s -h' for usage\n", argv[0]); exit(EXIT_FAILURE); -@@ -2675,6 +2723,10 @@ int main(int argc, char *argv[]) +@@ -2674,6 +2722,10 @@ int main(int argc, char *argv[]) write_image(new_filename, image, size); } diff --git a/config/coreboot/next/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch b/config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch index 47f549a1..3ff12724 100644 --- a/config/coreboot/next/patches/0007-Remove-warning-for-coreboot-images-built-without-a-p.patch +++ b/config/coreboot/next/patches/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch @@ -1,7 +1,7 @@ -From fa6ac5b7f134b98a4f68f0f6b8bdeb6c7b6871ab Mon Sep 17 00:00:00 2001 +From 8230acfb9e1f692202b306ffb10fe89f783ab4e8 Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Fri, 12 May 2023 19:55:15 -0600 -Subject: [PATCH 7/8] Remove warning for coreboot images built without a +Subject: [PATCH 06/11] Remove warning for coreboot images built without a payload I added this in upstream to prevent people from accidentally flashing diff --git a/config/coreboot/next/patches/0008-mb-dell-optiplex_780-Add-USFF-variant.patch b/config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch index d49e0e9d..637b7266 100644 --- a/config/coreboot/next/patches/0008-mb-dell-optiplex_780-Add-USFF-variant.patch +++ b/config/coreboot/next/patches/0007-mb-dell-optiplex_780-Add-USFF-variant.patch @@ -1,7 +1,7 @@ -From 636cb8ae8610cd99b637448add778c8e4f364f3e Mon Sep 17 00:00:00 2001 +From 41b93b8786ba14830648cd166f86b6317d655359 Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Wed, 30 Oct 2024 20:55:25 -0600 -Subject: [PATCH 8/8] mb/dell/optiplex_780: Add USFF variant +Subject: [PATCH 07/11] mb/dell/optiplex_780: Add USFF variant Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> diff --git a/config/coreboot/next/patches/0010-dell-3050micro-disable-nvme-hotplug.patch b/config/coreboot/next/patches/0008-dell-3050micro-disable-nvme-hotplug.patch index 0408d114..daeb0fa1 100644 --- a/config/coreboot/next/patches/0010-dell-3050micro-disable-nvme-hotplug.patch +++ b/config/coreboot/next/patches/0008-dell-3050micro-disable-nvme-hotplug.patch @@ -1,7 +1,7 @@ -From adfeaeabcf98878814b463f14aba7871721d7606 Mon Sep 17 00:00:00 2001 +From c8192c52b2bfa93aeb6c6639476ca217e33c4313 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Wed, 11 Dec 2024 01:06:01 +0000 -Subject: [PATCH 1/1] dell/3050micro: disable nvme hotplug +Subject: [PATCH 08/11] dell/3050micro: disable nvme hotplug in my testing, when running my 3050micro for a few days, the nvme would sometimes randomly rename. @@ -24,19 +24,11 @@ new device (the one that you booted from). the fix there was to disable hotplugging on that pci-e slot for the nvme, so apply the same fix here for 3050 micro -Signed-off-by: Leah Rowe <info@minifree.org> +Signed-off-by: Leah Rowe <leah@libreboot.org> --- - 3rdparty/vboot | 2 +- src/mainboard/dell/optiplex_3050/devicetree.cb | 4 +++- - 2 files changed, 4 insertions(+), 2 deletions(-) - -diff --git a/3rdparty/vboot b/3rdparty/vboot -index f1f70f46dc..902fe8af96 160000 ---- a/3rdparty/vboot -+++ b/3rdparty/vboot -@@ -1 +1 @@ --Subproject commit f1f70f46dc5482bb7c654e53ed58d4001e386df2 -+Subproject commit 902fe8af96ad662fac127cb8f51596491cf8272f + 1 file changed, 3 insertions(+), 1 deletion(-) + diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb index 039709aa4a..0678ed1765 100644 --- a/src/mainboard/dell/optiplex_3050/devicetree.cb diff --git a/config/coreboot/next/patches/0011-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch b/config/coreboot/next/patches/0009-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch index 542b6608..cd6cdb02 100644 --- a/config/coreboot/next/patches/0011-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch +++ b/config/coreboot/next/patches/0009-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch @@ -1,7 +1,7 @@ -From 91c7d772f4803a94950b3224ccd11ffd162b4e36 Mon Sep 17 00:00:00 2001 +From 35295d97b08ee659b6770ce39003732a4bdfb6a0 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Wed, 18 Dec 2024 02:06:18 +0000 -Subject: [PATCH 1/1] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN +Subject: [PATCH 09/11] lenovo: Add Kconfig option CONFIG_LENOVO_TBFW_BIN This is used by lbmk to know where a tb.bin file goes, when extracting and padding TBT.bin from Lenovo ThunderBolt diff --git a/config/coreboot/next/patches/0009-sata-fix.patch b/config/coreboot/next/patches/0009-sata-fix.patch deleted file mode 100644 index d67b38eb..00000000 --- a/config/coreboot/next/patches/0009-sata-fix.patch +++ /dev/null @@ -1,54 +0,0 @@ -From fb58f84592fbba25abafaccd9e868afa107c1051 Mon Sep 17 00:00:00 2001
-From: Mate Kukri <km@mkukri.xyz>
-Date: Thu, 5 Dec 2024 08:11:05 +0000
-Subject: [PATCH] sata fix
-
-Change-Id: I0eab7aaf9cf00085c97c637c9ffa14e38cf6d738
----
- .../lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb | 9 +++------
- .../sklkbl_thinkpad/variants/t480s/overridetree.cb | 9 +++------
- 2 files changed, 6 insertions(+), 12 deletions(-)
-
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
-index 4b68ec3f49..2f0b20d91a 100644
---- a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb
-@@ -42,12 +42,9 @@ chip soc/intel/skylake
- end
-
- device ref sata on
-- # SATA_0 - NC
-- # SATA_1A - NC
-- # SATA_1B - NC
-- # SATA_2 - SATA caddy
-- register "SataPortsEnable[3]" = "1"
-- register "SataPortsDevSlp[3]" = "1"
-+ # SATA_2 - JHDD1 SATA SSD
-+ register "SataPortsEnable[2]" = "1"
-+ register "SataPortsDevSlp[2]" = "1"
- end
-
- # PCIe controller 1 - 1x4
-diff --git a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
-index 5f1c38bc03..cea5e485d2 100644
---- a/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
-+++ b/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb
-@@ -42,12 +42,9 @@ chip soc/intel/skylake
- end
-
- device ref sata on
-- # SATA_0 - NC
-- # SATA_1A - NC
-- # SATA_1B - NC
-- # SATA_2 - M.2 2280 SATA
-- register "SataPortsEnable[3]" = "1"
-- register "SataPortsDevSlp[3]" = "1"
-+ # SATA_2 - Main M.2 SATA SSD
-+ register "SataPortsEnable[2]" = "1"
-+ register "SataPortsDevSlp[2]" = "1"
- end
-
- # PCIe controller 1 - 1x2+2x1
---
-2.39.5
-
diff --git a/config/coreboot/next/patches/0012-soc-intel-skylake-Don-t-compress-FSP-S.patch b/config/coreboot/next/patches/0010-soc-intel-skylake-Don-t-compress-FSP-S.patch index a96f8ba8..228170eb 100644 --- a/config/coreboot/next/patches/0012-soc-intel-skylake-Don-t-compress-FSP-S.patch +++ b/config/coreboot/next/patches/0010-soc-intel-skylake-Don-t-compress-FSP-S.patch @@ -1,7 +1,7 @@ -From 68f16ef46890dd08a2d03034ad6f352699282e00 Mon Sep 17 00:00:00 2001 +From f08dbaacf747eb198bbc8f83e0220ca803f19116 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Thu, 26 Dec 2024 19:45:20 +0000 -Subject: [PATCH 1/1] soc/intel/skylake: Don't compress FSP-S +Subject: [PATCH 10/11] soc/intel/skylake: Don't compress FSP-S Build systems like lbmk need to reproducibly insert certain vendor files on release images. diff --git a/config/coreboot/next/patches/0013-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch b/config/coreboot/next/patches/0011-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch index 6ea65c8d..7dae2d6a 100644 --- a/config/coreboot/next/patches/0013-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch +++ b/config/coreboot/next/patches/0011-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch @@ -1,7 +1,7 @@ -From aa13bb380d8286373089de291b62c6070df20573 Mon Sep 17 00:00:00 2001 +From 12ff6e798d1cefc5b888e6035e52bf6d70c9ca47 Mon Sep 17 00:00:00 2001 From: Leah Rowe <info@minifree.org> Date: Tue, 31 Dec 2024 01:40:42 +0000 -Subject: [PATCH 1/1] soc/intel/pmc: Hardcoded poweroff after power fail +Subject: [PATCH 11/11] soc/intel/pmc: Hardcoded poweroff after power fail Coreboot can set the power state for power on after previous power failure, based on the option table. On the ThinkPad T480, @@ -31,7 +31,7 @@ Signed-off-by: Leah Rowe <info@minifree.org> 1 file changed, 4 insertions(+), 32 deletions(-) diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c -index c51a960854..a836932fe5 100644 +index 0fadd6e409..843581b285 100644 --- a/src/soc/intel/common/block/pmc/pmclib.c +++ b/src/soc/intel/common/block/pmc/pmclib.c @@ -760,38 +760,10 @@ void pmc_clear_pmcon_sts(void) diff --git a/config/coreboot/next/patches/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch b/config/coreboot/next/patches/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch new file mode 100644 index 00000000..5e4e6edb --- /dev/null +++ b/config/coreboot/next/patches/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch @@ -0,0 +1,32 @@ +From 916c7b027faba625b922e74e45e50f9ceab64a64 Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Mon, 6 Jan 2025 01:16:01 +0000 +Subject: [PATCH 1/1] ec/dasharo: Comment EC_DASHARO_EC_FLASH_SIZE + +We don't use anything dasharo in Libreboot. + +This patch prevents the following config item appearing +in T480 and 3050 Micro configs: + +CONFIG_EC_DASHARO_EC_FLASH_SIZE=0x20000 + +Otherwise, make-oldconfig adds it automatically. + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + src/ec/dasharo/ec/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/src/ec/dasharo/ec/Kconfig b/src/ec/dasharo/ec/Kconfig +index 901d3ce514..071e37f95e 100644 +--- a/src/ec/dasharo/ec/Kconfig ++++ b/src/ec/dasharo/ec/Kconfig +@@ -28,4 +28,4 @@ config EC_DASHARO_EC_UPDATE_FILE + + config EC_DASHARO_EC_FLASH_SIZE + hex +- default 0x20000 ++ # default 0x20000 +-- +2.39.5 + diff --git a/config/coreboot/next/patches/0013-src-intel-skylake-Disable-stack-overflow-debug-optio.patch b/config/coreboot/next/patches/0013-src-intel-skylake-Disable-stack-overflow-debug-optio.patch new file mode 100644 index 00000000..84370089 --- /dev/null +++ b/config/coreboot/next/patches/0013-src-intel-skylake-Disable-stack-overflow-debug-optio.patch @@ -0,0 +1,61 @@ +From 00b6459a9b360b16529036d9b1e10c977228a7ff Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Mon, 6 Jan 2025 01:36:23 +0000 +Subject: [PATCH 1/1] src/intel/skylake: Disable stack overflow debug options + +The option was appearing in T480/3050micro configs of lbmk, +after updating on the coreboot/next uprev for 20241206 rev8: + +CONFIG_DEBUG_STACK_OVERFLOW_BREAKPOINTS=y + +I did some digging. See coreboot commit: + +commit 51cc2bacb6b07279b97e9934d079060475481fb6 +Author: Subrata Banik <subratabanik@google.com> +Date: Fri Dec 13 13:07:28 2024 +0530 + + soc/intel/pantherlake: Disable stack overflow debug options + +Well now: + +I'm disabling this behaviour on Skylake, for the same +behaviour, because I want as few behaviour changes in general, +as possible, for the rev8 release. + +According to Subrata's patch, which was for Pantherlake, +without this change, stack corruption can occur on verstage +and romstage early on. Please look at that coreboot patch, +referenced above, for clarity. + +I see no harm in disabling this option for Skylake, since +the behaviour that it otherwise enables was not present +before. + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + src/soc/intel/skylake/Kconfig | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig +index 8e25f796ed..7d324e15ea 100644 +--- a/src/soc/intel/skylake/Kconfig ++++ b/src/soc/intel/skylake/Kconfig +@@ -130,6 +130,15 @@ config DCACHE_RAM_SIZE + The size of the cache-as-ram region required during bootblock + and/or romstage. + ++# Override DEBUG Kconfig to avoid false alarm about stack overflow. ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS ++ bool ++ default n ++ ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES ++ bool ++ default n ++ + config DCACHE_BSP_STACK_SIZE + hex + default 0x20400 if FSP_USES_CB_STACK +-- +2.39.5 + diff --git a/config/coreboot/next/patches/0014-src-intel-x4x-Disable-stack-overflow-debug.patch b/config/coreboot/next/patches/0014-src-intel-x4x-Disable-stack-overflow-debug.patch new file mode 100644 index 00000000..e2eae2a9 --- /dev/null +++ b/config/coreboot/next/patches/0014-src-intel-x4x-Disable-stack-overflow-debug.patch @@ -0,0 +1,33 @@ +From 5671d54d347b110ffade5b8b6e2d052612a8716c Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Mon, 6 Jan 2025 01:53:53 +0000 +Subject: [PATCH 1/1] src/intel/x4x: Disable stack overflow debug + +Signed-off-by: Leah Rowe <leah@libreboot.org> +--- + src/northbridge/intel/x4x/Kconfig | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig +index 097e11126c..7e4e14cf94 100644 +--- a/src/northbridge/intel/x4x/Kconfig ++++ b/src/northbridge/intel/x4x/Kconfig +@@ -28,6 +28,15 @@ config ECAM_MMCONF_BUS_NUMBER + int + default 256 + ++# Override DEBUG Kconfig to avoid false alarm about stack overflow. ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS ++ bool ++ default n ++ ++config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES ++ bool ++ default n ++ + # This number must be equal or lower than what's reported in ACPI PCI _CRS + config DOMAIN_RESOURCE_32BIT_LIMIT + default 0xfec00000 +-- +2.39.5 + diff --git a/config/coreboot/next/target.cfg b/config/coreboot/next/target.cfg index 371ff259..1d01e623 100644 --- a/config/coreboot/next/target.cfg +++ b/config/coreboot/next/target.cfg @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-3.0-or-later tree="next" -rev="9992a98c671d356b9770282df5d58a302b6dbeda" +rev="2f1e4e5e8515dd350cc9d68b48d32a5b6b02ae6a" diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb index af1b04ef..5191da57 100644 --- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_corebootfb @@ -85,6 +85,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -177,7 +178,6 @@ CONFIG_HAVE_IFD_BIN=y # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set -# CONFIG_BOARD_LENOVO_E460 is not set CONFIG_BOARD_LENOVO_T480=y # CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set @@ -219,8 +219,8 @@ CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin" -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y CONFIG_GFX_GMA_PANEL_1_ON_EDP=y @@ -608,6 +608,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode index 46306c80..7596816a 100644 --- a/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/t480_fsp_16mb/config/libgfxinit_txtmode @@ -85,6 +85,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -175,7 +176,6 @@ CONFIG_HAVE_IFD_BIN=y # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set -# CONFIG_BOARD_LENOVO_E460 is not set CONFIG_BOARD_LENOVO_T480=y # CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set @@ -217,8 +217,8 @@ CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin" -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y CONFIG_GFX_GMA_PANEL_1_ON_EDP=y @@ -600,6 +600,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb index f379acda..5dea5962 100644 --- a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_corebootfb @@ -85,6 +85,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -177,7 +178,6 @@ CONFIG_HAVE_IFD_BIN=y # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set -# CONFIG_BOARD_LENOVO_E460 is not set CONFIG_BOARD_LENOVO_T480=y # CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set @@ -219,8 +219,8 @@ CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin" -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y CONFIG_GFX_GMA_PANEL_1_ON_EDP=y @@ -608,6 +608,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode index 3b70bc4e..1aedc109 100644 --- a/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/t480_vfsp_16mb/config/libgfxinit_txtmode @@ -85,6 +85,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -175,7 +176,6 @@ CONFIG_HAVE_IFD_BIN=y # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set -# CONFIG_BOARD_LENOVO_E460 is not set CONFIG_BOARD_LENOVO_T480=y # CONFIG_BOARD_LENOVO_T480S is not set # CONFIG_BOARD_LENOVO_T400 is not set @@ -217,8 +217,8 @@ CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480/tb.bin" -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y CONFIG_GFX_GMA_PANEL_1_ON_EDP=y @@ -600,6 +600,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb index b88dd06c..2505b389 100644 --- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_corebootfb @@ -85,6 +85,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -177,7 +178,6 @@ CONFIG_HAVE_IFD_BIN=y # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set -# CONFIG_BOARD_LENOVO_E460 is not set # CONFIG_BOARD_LENOVO_T480 is not set CONFIG_BOARD_LENOVO_T480S=y # CONFIG_BOARD_LENOVO_T400 is not set @@ -219,8 +219,8 @@ CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin" -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y CONFIG_GFX_GMA_PANEL_1_ON_EDP=y @@ -608,6 +608,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode index a1e48c43..407be629 100644 --- a/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/t480s_fsp_16mb/config/libgfxinit_txtmode @@ -85,6 +85,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -175,7 +176,6 @@ CONFIG_HAVE_IFD_BIN=y # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set -# CONFIG_BOARD_LENOVO_E460 is not set # CONFIG_BOARD_LENOVO_T480 is not set CONFIG_BOARD_LENOVO_T480S=y # CONFIG_BOARD_LENOVO_T400 is not set @@ -217,8 +217,8 @@ CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin" -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y CONFIG_GFX_GMA_PANEL_1_ON_EDP=y @@ -600,6 +600,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb index bf364714..ee006e59 100644 --- a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_corebootfb @@ -85,6 +85,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -177,7 +178,6 @@ CONFIG_HAVE_IFD_BIN=y # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set -# CONFIG_BOARD_LENOVO_E460 is not set # CONFIG_BOARD_LENOVO_T480 is not set CONFIG_BOARD_LENOVO_T480S=y # CONFIG_BOARD_LENOVO_T400 is not set @@ -219,8 +219,8 @@ CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin" -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y CONFIG_GFX_GMA_PANEL_1_ON_EDP=y @@ -608,6 +608,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode index ad6e60ee..30a69e6a 100644 --- a/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/t480s_vfsp_16mb/config/libgfxinit_txtmode @@ -85,6 +85,7 @@ CONFIG_TSEG_STAGE_CACHE=y # CONFIG_VENDOR_LATTEPANDA is not set CONFIG_VENDOR_LENOVO=y # CONFIG_VENDOR_LIBRETREND is not set +# CONFIG_VENDOR_MITAC_COMPUTING is not set # CONFIG_VENDOR_MSI is not set # CONFIG_VENDOR_OCP is not set # CONFIG_VENDOR_OPENCELLULAR is not set @@ -175,7 +176,6 @@ CONFIG_HAVE_IFD_BIN=y # CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set # CONFIG_BOARD_LENOVO_M920Q is not set # CONFIG_BOARD_LENOVO_S230U is not set -# CONFIG_BOARD_LENOVO_E460 is not set # CONFIG_BOARD_LENOVO_T480 is not set CONFIG_BOARD_LENOVO_T480S=y # CONFIG_BOARD_LENOVO_T400 is not set @@ -217,8 +217,8 @@ CONFIG_THINKPADEC_HKEY_EISAID="IBM0068" CONFIG_GFX_GMA_PANEL_1_PORT="eDP" CONFIG_BOARD_LENOVO_SKLKBL_THINKPAD_COMMON=y CONFIG_LENOVO_TBFW_BIN="../../../vendorfiles/t480s/tb.bin" -# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_TTYS0_BAUD=115200 +# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y CONFIG_D3COLD_SUPPORT=y CONFIG_GFX_GMA_PANEL_1_ON_EDP=y @@ -600,6 +600,7 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y CONFIG_MRC_SETTINGS_PROTECT=y +# CONFIG_DRIVERS_OPTION_CFR is not set # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y diff --git a/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg b/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg deleted file mode 100644 index aec8ffba..00000000 --- a/config/submodule/coreboot/next/acpica-unix-20230628.tar.gz/module.cfg +++ /dev/null @@ -1,5 +0,0 @@ -# SPDX-License-Identifier: GPL-3.0-or-later - -subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20230628.tar.gz" -subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20230628.tar.gz" -subhash="d726e69ebd8b8110690e3aff8d1919b43b0a2185efdeb9131ea8d89d321ca3a318a89c721ea740ae366f31ed3d1c11c2906f8807ee8a190e6f67fe5b2023cea4" diff --git a/config/submodule/coreboot/next/acpica-unix-20241212.tar.gz/module.cfg b/config/submodule/coreboot/next/acpica-unix-20241212.tar.gz/module.cfg new file mode 100644 index 00000000..30baf001 --- /dev/null +++ b/config/submodule/coreboot/next/acpica-unix-20241212.tar.gz/module.cfg @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-3.0-or-later + +subfile="https://www.mirrorservice.org/sites/libreboot.org/release/misc/acpica/acpica-unix-20241212.tar.gz" +subfile_bkup="https://mirror.math.princeton.edu/pub/libreboot/misc/acpica/acpica-unix-20241212.tar.gz" +subhash="daa4243f927451ac18c337cf17c27849e68329b3f7eb25b8c3379fda9c6a484201b73d4ffccab89a0ae22cc5e432f141ba149015a003834b0515bdb3d4efe0a8" diff --git a/config/submodule/coreboot/next/fsp/module.cfg b/config/submodule/coreboot/next/fsp/module.cfg index c402d9dc..a380ddda 100644 --- a/config/submodule/coreboot/next/fsp/module.cfg +++ b/config/submodule/coreboot/next/fsp/module.cfg @@ -2,4 +2,4 @@ subrepo="https://review.coreboot.org/fsp.git" subrepo_bkup="https://github.com/coreboot/fsp" -subhash="d7931859bfb1f7949bb455d53b9494dd731e9642" +subhash="909cf43ad6ccebb6adee482bc0a4f098c32c9a6d" diff --git a/config/submodule/coreboot/next/module.list b/config/submodule/coreboot/next/module.list index 1cc88fd6..36f05dbe 100644 --- a/config/submodule/coreboot/next/module.list +++ b/config/submodule/coreboot/next/module.list @@ -9,4 +9,4 @@ util/crossgcc/tarballs/gmp-6.3.0.tar.xz util/crossgcc/tarballs/mpc-1.3.1.tar.gz util/crossgcc/tarballs/mpfr-4.2.1.tar.xz util/crossgcc/tarballs/nasm-2.16.03.tar.bz2 -util/crossgcc/tarballs/acpica-unix-20230628.tar.gz +util/crossgcc/tarballs/acpica-unix-20241212.tar.gz diff --git a/config/submodule/coreboot/next/vboot/module.cfg b/config/submodule/coreboot/next/vboot/module.cfg index dc8d630b..d13a1b29 100644 --- a/config/submodule/coreboot/next/vboot/module.cfg +++ b/config/submodule/coreboot/next/vboot/module.cfg @@ -2,4 +2,4 @@ subrepo="https://review.coreboot.org/vboot.git" subrepo_bkup="https://github.com/coreboot/vboot" -subhash="f1f70f46dc5482bb7c654e53ed58d4001e386df2" +subhash="3f94e2c7ed58c4e67d6e7dc6052ec615dbbb9bb4" |