resources/coreboot/r500_4mb/board.cfg


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cbtree="default"
romtype="4MiB ICH9 IFD NOGBE NOR flash"
arch="x86_64"
payload_grub="y"
payload_grub_withseabios="y"
payload_grub_withtianocore="n"
payload_seabios="y"
payload_tianocore="n"
payload_memtest="y"