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path: root/resources/coreboot/default/patches/0012-fix-speedstep-on-x200-t400-Revert-cpu-intel-model_10.patch
AgeCommit message (Collapse)Author
2022-11-14pragmatic system distribution guideline compliancepsdgLeah Rowe
osboot is now part of libreboot, and will soon shut down. libreboot now conforms to osboot policy.
2021-12-01Fix broken SpeedStep on GM45 laptops such as ThinkPad X200, T400, T500, W500Leah Rowe
Coreboot is enabling PECI on these CPUs which, according to Intel erratum, must only be done after loading microcode updates, otherwise the CPUID feature set becomes corrupted. That's my understanding, and I think this is why SpeedStep is broken. To be specific, it could but but operating systems no longer detect that the feature is supported. In any case, belgin on IRC found the commit in coreboot, after a bisect, enabling PECI. This commit in Libreboot adds a patch, reverting coreboot's PECI patch.