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2024-06-01grub.cfg: split up try_user_configLeah Rowe
in the next revision, i will add ESP paths Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-06-01grub.cfg: don't search for *_grub.cfgLeah Rowe
this is a relic from the old days when we didn't automated the grub.cfg logic as much. these days, the grub.cfg logic is able to boot almost all distros without any manual intervention or override. removing these entries will speed up the boot in general Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-06-01grub.cfg: remove unnecessary path for isolinuxLeah Rowe
the path "/boot/EFI" is unnecessary because the ESP is always a FAT32 partition, so we don't need to scan it as a subdirectory within a subdirectory. the ESP is always mounted as its own partition, FAT32, and EFI/ is always at the root of it Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-06-01grub.cfg: don't scan EFI on btrfs subvolsLeah Rowe
the esp is always a fat32 partition so this makes no sensgrub.cfg: don't scan EFI on btrfs subvols the esp is always a fat32 partition so this makes no sense Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-06-01Merge pull request 'Fix building vboot on i686' (#218) from ↵Leah Rowe
lukeshu/lbmk:lukeshu/i686 into master Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/218
2024-05-30Fix building vboot on i686Luke T. Shumaker
2024-05-30delete u-boot test/lib/strlcat.c using nuke()Leah Rowe
we don't need to do it in the release function Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-29coreboot t440p/w541: enable nvme in grub_scan_diskLeah Rowe
these laptops do not officially have nvme slots on them, but there is an ngff wifi slot which is PCI-E x1, and you can use a special adapter on it to run nvme ssds. total throughput is retarded by the x1 PCI-E configuration, but it's still faster than a sata ssd (nvmes are x4 PCI-E). support it in grub_scan_disk on the off chance that some users may make use of this. it should work just fine. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-29do not allow dashes in coreboot target namesLeah Rowe
Command: ./vendor download kcma-d8-rdimm_16mb Output was: include/lib.sh: line 115: kcma-d8-rdimm=config/vendor: No such file or directory That will have to be audited later on, but the recent more stringent error checking in vendor.sh triggered this previously untriggered error message. The error was in fact already occuring before, silently. Anyway, mitigate by renaming all coreboot targets so that they do not contain hyphens in the name. This should avoid triggering errors in that eval command, on line 115 in lib.sh Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-28grub.cfg: actually support setting boot orderLeah Rowe
replace variables ahcidev/atadev/nvmedev with a single one named bootdev the for loop goes through grub_scan_disk, so now it is effectively a bootorder configuration Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-27grub.cfg: add spdx headerLeah Rowe
it has always been gpl 3 or later, but it helps to have the license declaration within the file there's a copying file anyway. put spdx in the config Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-27re-configure grub_scan_disk on various targetsLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-27remove grub_scan_disk in all target.cfg filesLeah Rowe
A subsequest revision will set them again as needed, per coreboot target. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-27grub.cfg: use grub_scan_disk to set boot orderLeah Rowe
Previously, grub_scan_disk could set ata, ahci or "both", which would make both be tried (ahci first). This worked when we only dealt with ata and ahci devices, but now we support nvme devices so the logic is inherently flawed. Instead, use grub_scan_disk to store the boot order, e.g.: grub_scan_disk="ahci nvme ata" grub_scan_disk="nvme ata" In the first example, it would make GRUB scan ahci first, then nvme and then ata. In the secontd example, it would make GRUB scan nvme first, and then ata. If "both" is set, or anything other than ahci/ata/nvme, grub_scan_disk is now changed to "nvme ahci ata". Actual grub_scan_disk entries in target.cfg files will now be modified, to match each machine. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-27GRUB: remove XHCI patches for now (will re-add)Leah Rowe
Fixes this bug: https://codeberg.org/libreboot/lbmk/issues/216 Well, fix is the wrong word. We want xHCI ideally. Mate is working on it as I write this. I've also: * Disabled CONFIG_FINALIZE_USB_ROUTE_XHCI on Haswell boards (coreboot) * Disabled the GRUB payload on HP 820 G2 for now We will need to re-add the xHCI patches once fixed. If Mate/we can't fix it, I'll contact Patrick Rudolph who originally wrote the xHCI patches. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-27coreboot: only run GRUB as a secondary payloadLeah Rowe
See: https://codeberg.org/libreboot/lbmk/issues/216 Almost all users will be OK running GRUB, but a minority of users have experienced a fatal error pertaining to grub_free() or grub_realloc() (as my investigation of GRUB sources reveal when grepping the error reported in the link above). We don't yet know what the bug is, only that the error occurs, leading to an effective brick if the user has GRUB as their primary payload. So far, it has only been reported on some Intel SandyBridge-based Dell Latitudes in Libreboot, but we can't be too sure. The user reported that memtest86+ passes just fine, and SeaBIOS works; BIOS GRUB also works, which means that the bug is likely only in an area of GRUB that runs specifically on the coreboot payload, so it's probably a driver in GRUB when running on the metal rather than BIOS/UEFI. The build system supports a configuration whereby SeaBIOS is the primary payload, but GRUB is available in the SeaBIOS boot select menu, and an additional configuration is available where GRUB is what SeaBIOS executes first (while still providing boot select); both of these are now the *only* configurations available, on all x86 targets except QEMU. The QEMU target is fine because if the bug occurs there, you can just close QEMU and try a different image. Even after this bug is later identified and fixed, the GRUB source code is vastly over-engineered and there are likely many more such bugs. SeaBIOS is a reliable payload; the code is small and robust. Remember always: Code equals bugs Therefore, this configuration change is likely going to be permanent. This will apply in the next release. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-26flashprog: bump to 5b4fdd1 from 2 May 2024Leah Rowe
I've rebased the workaround-mx patch as follows. See: commit 9a11cbf21a5078bcdb8db7584c44a9ee17020db4 Author: Nico Huber <nico.h@gmx.de> Date: Fri Jan 13 01:19:07 2023 +0100 Let the flash context directly point to the used master This change, now upstream in flashprog, made me have to do this in the patch. I changed this: flash->mst->spi.command(flash, sizeof(cmd), sizeof(buf), cmd, buf); to this: flash->mst.spi->command(flash, sizeof(cmd), sizeof(buf), cmd, buf); It should work fine. This update imports the following upstream patches from flashprog: * 5b4fdd1 z60_flashprog.rules: Add udev rule for CH347 * 72c9e40 meson: Check for CPU families with known raw mem access * 3458220 platform/meson: Port pciutils/pci.h workaround to Meson * f279762 platform/meson: Check for libi386 on NetBSD * 14da5f7 README: Convert to Markdown * 8ddea57 README: Document branching and release policy * 2522456 util/list_yet_unsupported_chips.sh: Fix path * cbf9c11 spi: Don't cross 16MiB boundaries with long writes * 823a704 dediprog: Skip warning on first attempt to read device string * e8463c8 dediprog: Revise prefix check for given programmer id * 38af1a1 dediprog: Revise id matching * 4661e7c amd_spi100: Use flashprog_read_chunked() for progress reporting * cdcfda2 read_memmapped: Use flashprog_read_chunked() for progress reporting * 7679b5c spi25: Replace spi_read_chunked() with more abstract version * ca1c7fd spi25: Normalize parameters of spi_nbyte_read() * e36e3dc dediprog: Use default_spi_write_256 * 522a86d linux_spi: Use default_spi_read()/_write_256() * 806509b cli_classic: Turn progress reporting into a progress bar * 842d678 libflashrom: Return progress state to the library user * aa714dd flashprog.c: Let select_erase_functions() return byte count * 2eed4cf serprog: Add SPI Mode and CS Mode commands * 821a085 dediprog: Implement id reading for SF600 and later * 274e655 dediprog: Read device string early * 0057822 dediprog: Add protocol detection for SF700 & SF600Plus-G2 * fb176d2 dediprog: Use more general 4BA write mode for newer protocols * 0ab5c3d dediprog: Split device type and version parsing * bdef5c2 dediprog: Use unsigned conversions to parse device string * 5262e29 dediprog: Try to request 32B device string (instead of 16B) * e76e21f dediprog: Get rid of some unnecessary hex constants * 5a09d1e udelay: Lower the sleep vs delay threshold * 03ad4a4 linux_mtd: Provide no-op delay implementation * 211c6ec serprog: Refine flushing before synchronization * 383b7fe serprog: Test synchronicity before trying to synchronize * d7318ea serprog: Move synchronicity test into separate function * 9a11cbf Let the flash context directly point to the used master * aabb3e0 writeprotect: Hook wp functions into the chip driver * 89569d6 memory_mapped: Reduce `decode_sizes` to a single `max_rom_decode` * 929d2e1 internal: Pass programmer context down into chipset enables * 7c717c3 internal: Pass programmer context down into board enables * e3a2688 Pass programmer context to programmer->init() * 2b66ad9 Start implementing struct flashprog_programmer * 4517e92 memory_bus: Drop stale `size == 0` workaround and FIXME * b197402 memory_bus: Split register mapping into own function * 0e76d99 memory_bus: Move (un)map_flash_region into par master * 9eec407 Perform default mapping only for respective chips * 56b53dd wbsio_spi: Request memory mapping locally * 5596190 it87spi: Request memory mapping locally * 46449b4 spi25: Drop stale `bus == SPI` guards * ab6b18f spi25: Move 4BA preparations into spi_prepare_4ba() hook * 901fb95 Add prepare/finish_access() hooks for chip drivers * a96aaa3 dediprog: Support long writes of 16MiB and more * 1338936 Consider 4BA support when filtering erase functions * 8d36db6 flashprog.8: Fix up serprog example * d2ac303 flashprog.8: document new serprog cs parameter * d1b9153 chipset_enable.c: Add Genoa to mendocino entry Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-24config: add backup coreboot submodule repositoriesLeah Rowe
this is using the same functionality that was added a few commits ago, to override the use of "git submodule update" each coreboot submodule has two repositories defined, with the second one kicking in if the mail one fails upon cloning. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-24coreboot/default: remove chromeec from module.listLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-24coreboot: only download the necessary submodulesLeah Rowe
whitelist what modules are downloaded, by adding module.list files in the corresponding directories under config/submodule/, per each coreboot tree. this is making use of functionality added in the previous commit. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-21Fix E6400 display reference clock patchesNicholas Chin
The ones I submitted before seem to have been outdated ones that don't actually build properly. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-05-21fix building coreboot images on i686 hostsLeah Rowe
firstly, memtest86+ is currently not cross compiled and relies on 64-bit headers (x86_64 only). a 32-bit distro is unlikely to be able to build 64-bit binaries. secondly: vboot throws a build error due to -Werror when building on 32-bit hosts. we rely on vboot code to build cbfstool, so turn off -Werror on vboot that's all. 32-bit hosts are not recommended; it is assumed that you are building on an x86_64 host. work will go into the build system at a later date to make it more portable, by cross compiling everything, but this should fix 32-bit for now. there are some x60/t60 users who still want to build roms, so let's allow them that possibility. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-21Merge pull request 'Also try unlocking encrypted volume on NVMe' (#213) from ↵Leah Rowe
mkukri/lbmk:master into master Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/213
2024-05-21Also try unlocking encrypted volume on NVMeMate Kukri
2024-05-21Merge pull request 'Add NVMe support to GRUB2 payload' (#212) from ↵Leah Rowe
mkukri/lbmk:master into master Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/212
2024-05-21Merge pull request 'Fix E6400 display issue with 1440 x 900 panel' (#211) ↵Leah Rowe
from nic3-14159/lbmk:fix-e6400-igpu-ref-clock into master Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/211
2024-05-21Merge pull request 'Add pt qwerty keymap to lbmk' (#210) from ↵Leah Rowe
samuraikid/lbmk:master into master Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/210
2024-05-20Add NVMe support to GRUB2 payloadMate Kukri
Tested on OptiPlex 3050 (via injecting grub2.elf into WIP coreboot port).
2024-05-20Fix E6400 display issue with 1440 x 900 panelNicholas Chin
The E6400 uses a 100 MHz reference clock on DPLL_REF_SSCLK, whereas libgfxinit assumed that the reference was always 96 MHz. The frequency difference caused by a 100 MHz reference with PLL config values calculated assuming a 96 MHz reference were not significant enough to cause noticable issues with the more common 1280 x 800 panels, but are enough to matter for the 1440 x 900 panels which use a higher pixel clock. This only affected the pre-OS graphics environment provided by libgfxinit, as Linux drivers would determine the reference clock frequency based on data in the VBT. Fix this by making the reference clock frequency in libgfxinit configurable for GM45 based on a new coreboot Kconfig, which is set to 100 MHz for the E6400. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-05-20git.sh: allow patching submodulesLeah Rowe
for single-tree project (e.g. flashprog): config/submodule/PROJECT/MODNAME/patches for multi-tree project (e.g. coreboot): config/submodule/PROJECT/TREE/MODNAME/patches MODNAME is e.g.: 3rdparty/vboot directory in coreboot: would become vboot (the submodule codepath is filtered to up to the final slash) another example: submodire src dir 3rdparty/foo/bar MODNAME would be "bar" Add whatever patches you like to a given submodule. An example patch is included in this commit. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-18Add pt qwerty keymap to lbmksamuraikid
Signed-off-by: samuraikid <samuraikid@noreply.codeberg.org>
2024-05-12disable x301 for next release (for now)Leah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-11remove haswell mrc blob (libre raminit stable now)Leah Rowe
broadwell mrc is retained, because it's needed on 820 g2 it's no longer needed on haswell, because nri is stable. nri is short for "native ram initialisation", and libreboot provides this for: thinkpad t440p, thinkpad w541, dell optiplex 9020 mt, and dell optiplex 9020 sff remove, in line with libreboot's binary blob reduction policy previous revisions, prior to the recent release, stated that it would be retained for compatibility, but it's really not right to retain it, because doing so violates libreboot's policy the recent release excluded mrc-based rom images for haswell machines, providing only those rom images that use the libre raminit, while retaining support for mrc in the build system, so that users could still run the lbmk inject script on older release roms that use mrc again: libreboot's binary blob reduction policy is very clear: https://libreboot.org/news/policy.html it is a policy that can be summarised, thus: if a blob can be avoided, it must be avoided. therefore, we will avoid the Haswell MRC raminit blob Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-11remove all status checks. only handle release.Leah Rowe
the release variable is all we need, turning a target on or off for a given release. the status checks were prone to bugs, and unnecessary; it also broke certain benchmark scripts. it's better to keep the lbmk logic simpler. board status will be moved to the documentation instead. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-10bump seabios to e5f2e4c69643bc3cd385306a9e5d29e11578148cLeah Rowe
changes upstream, relative to the previous revision: * e5f2e4c6 pciinit: don't misalign large BARs * 731c88d5 stdvgaio: Only read/write one color palette entry at a time * c5a361c0 stdvga: Add stdvga_set_vertical_size() helper function * 22c91412 stdvga: Rename stdvga_get_vde() to stdvga_get_vertical_size() * 549463db stdvga: Rename stdvga_set_scan_lines() to stdvga_set_character_height() * c67914ac stdvga: Rename stdvga_set_text_block_specifier() to stdvga_set_font_location() * aa94925d stdvga: Rework stdvga palette index paging interface functions * 8de51a5a stdvga: Rename stdvga_toggle_intensity() to stdvga_set_palette_blinking() * 96c7781f stdvga: Add comments to interface functions in stdvga.c * 2996819f stdvga: Rename CGA palette functions * 91368088 stdvgamodes: Improve naming of dac palette tables * 70f43981 stdvgamodes: No need to store pelmask in vga_modes[] * 1588fd14 vgasrc: Rename vgahw_get_linesize() to vgahw_minimum_linelength() * d73e18bb vgasrc: Use curmode_g instead of vmode_g when mode is the current video mode * 192e23b7 vbe: implement function 09h (get/set palette data) * 3722c21d vgasrc: round up save/restore size * 5d87ff25 vbe: Add VBE 2.0+ OemData field to struct vbe_info * 163fd9f0 fix smbios blob length overflow * 82faf1d5 Add LBA 64bit support for reads beyond 2TB. * 3f082f38 Add AHCI Power ON + ICC_ACTIVE into port setup code * 3ae88886 esp-scsi: terminate DMA transfer when ESP data transfer completes * a6ed6b70 limit address space used for pci devices. Signed-off-by: Leah Rowe <info@minifree.org>
2024-05-04Libreboot 20240504 release20240504Leah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-04config/git: importer newer documentationLeah Rowe
I'm on a schedule here and don't have time to do the release changelog before actually compiling the release. I'm pushing the release changelog / news announcement *while the release is building*. Therefore, the actual release archive will contain Libreboot documentation, but from the lbwww revision just before the release announcement. (a changelog file is still generated from Git, and included in releases) Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-04coreboot: update latitude release statusLeah Rowe
working s3 means i'm happy to mark it as being stable. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-04d510mo and d945gclf: disable for releaseLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-04nb/haswell: lock policy regs when disabling IOMMULeah Rowe
Angel Pons told me I should do it. See comments here: https://review.coreboot.org/c/coreboot/+/81016 I see no harm in complying with the request. I'll merge this into the main patch at a later date and try to get this upstreamed. Just a reminder: on Optiplex 9020 variants, Xorg locks up under Linux when tested with a graphics card; disabling IOMMU works around the issue. Intel graphics work just fine with IOMMU turned on. Libreboot disables IOMMU by default, on the 9020, so that users can install graphics cards easily. I'm pretty sure this is the correct way to do it. The machine still seems to boot, in this configuration. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-04deprecate MRC 9020MT/SFF (NRI 9020 is default now)Leah Rowe
NRI is libre raminit MRC is binary blob raminit the libre raminit is stable enough now that it's default the MRC-based targets will be removed in a future release Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-04mark 9020 sff/mt stable for releaseLeah Rowe
i initially decided to say unstable, but the default configuration is reliable; the only caveat is that if you enable IOMMU, you must only be using intel graphics. this is already documented in warn.txt files, and on the website, so it's more than ok to call this stable. i use one of these myself as my daily driver and it's rock solid. i haven't had any problems with it. i also sell these to people with libreboot. no problems. mark it as stable, ready for a full release. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-04mark lenovo x301 as stable for releaseLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-03coreboot/default: Add patches to fix S3 on SNB/IVB LatitudesNicholas Chin
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-05-03remove x220edp/x230edp (keep regular x220/x230)Leah Rowe
nitrocaster boards are hard to find nowadays and i'm not comfortable supporting the knockoff chinese gear; quality varies greatly, and i can't know how reliable they are. nitrocaster has been out of business so it's just not viable to support this mod anymore. in fact, keeping the eDP-based targets is a liability to libreboot. regular x220/x230 (non-eDP-modded) are retained. the eDP modkit from nitrocaster let you use eDP screens instead of lvds, on thinkpad x220 and x230, letting you use higher resolution screens. older lbmk revs can still be used, if you happen to come across one of these boards. i only recommend using the official nitrocaster board, if youcan find one unused. ymmv with the chinese gear. better just use an unmodded x230 or get a different machine. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-03update hp machines to status=stable for releaseLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-03Enable WiFi on HP EliteBook 8560w (GPIO config)Leah Rowe
angel pons said how to fix it. more info in the patch. works perfectly. i still see that scancode in dmesg and i guess i have to assign it to some function that sets software rfkill hw rfkill is no longer set. it's unblocked, and i can use wifi. just in time for the libreboot release. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-03Merge pull request 'Implemented failsafe options at boot and inside menus ↵Leah Rowe
for enabling/disabling serial, spkmodem and gfxterm' (#203) from livio/lbmk:failsafe into master Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/203
2024-05-03coreboot/x301: set release=n (will re-test)Leah Rowe
was reported broken on canoeboot 0.1, which uses 2021 coreboot. we use much newer coreboot now in libreboot, but still, better be cautious. set to release=n. i'll set status and remove release=n if it works on testing Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-05-03mark x4x boards ready for releaseLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>