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2024-04-20update coreboot/haswell (NRI)Leah Rowe
the t440p/w541 configs were re-done from scratch, because the coreboot revisions are nearly two years apart. i also added corebootfb configs. hell updated their patchset. this patchset uses the following patch: https://review.coreboot.org/c/coreboot/+/81948/1 it uses this, along with parent patches in the haswell nri patch series Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-04-07add mate's patch for 9020 sff/mt fan controlsLeah Rowe
see: https://review.coreboot.org/c/coreboot/+/81529 what i've merged is patchset 4. i had to rebase it slightly, because the libreboot version has the iommu toggle on cmos configs, which are files that mate's patch also changes, leading to merge conflict. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-04-06enable grub payload on libremrc w541/t440pLeah Rowe
the grub payload was previously disabled, because the libre mrc code sets up xhci rather than ehci, and grub did not have xhci support (not natively). libreboot now has xhci support in the grub payload, so enable grub on these configurations. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-04-06add t440p/w541 configs using broadwell mrcLeah Rowe
broadwell mrc enables both igpu and dgpu to be enabled at any given time. if the onboard (intel) gpu is set as primary, the logic to disable it is not executed within coreboot; instead, the igpu is used for vga decode. on some t440p/w541 thinkpads, both an intel and nvidia gpu are present. in this setup, the intel gpu must be used for vga, and all output, but rendering can be offloaded to the nvidia gpu (nvidia optimus). optimus would never work on haswell mrc.bin, because it always disables the igpu when a dgpu is present, so a hack exists in coreboot that hides the dgpu from mrc, so that the igpu remains enabled. broadwell mrc doesn't do this, so the option to hide PEG devices has been disabled in these configs. the broadwell mrc has better peg device handling, and can support 16gb modules on broadwell hardware; it may well support these modules on haswell hardware too, though ddr3 sodimms are very hard to find (and expensive). (and currently untested, with this patch) Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-04-06add 9020 sff/mt targets that use broadwell mrcLeah Rowe
broadwell mrc has better peg handling and can support 16gb modules on broadwell machines - the blob can be used on haswell machines too, instead of haswell mrc, and it might support 16gb modules on these machines (not yet tested, but using broadwell mrc does at least boot as reliably as haswell mrc anyway) one little quirk with haswell mrc is that it actually handles vga decode, disabling the igpu entirely, when a dgpu is used. the broadwell mrc enables both GPUs and does not handle vga decoding, so we must handle this the usual way; my patch for this was merged upstream and i'm also adding it to libreboot, which currently uses an older coreboot revision. this is needed for dgpu to work. see patch: 0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch broadwell mrc may also make dealing with nvidia optimus setups more reliable, on laptops that have nvidia GPUs, but this patch does not add bmrc configs for t440p/w541 NOTE: on t440p/w541 laptops with nvidia graphics, the video output is wired to intel but rendering can be offloaded to nvidia. in this setup, we want vga decode to be done on intel, so i've set these configs to enable CONFIG_ONBOARD_VGA_IS_PRIMARY (set it to y) Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-04-05grub xhci supportLeah Rowe
see: https://github.com/9elements/grub/commits/xhci-module-upstreaming-squash_v4/ grub only supports xhci on bios/uefi targets, but not coreboot. some newer machines don't have ps/2 controllers, and boot in a way where ehci isn't available at startup; the controller can't be used by ehci code, there must be xhci support. the code is from Patrick Rudolph working on behalf of 9elements. the code was also sent here for review: https://lists.gnu.org/archive/html/grub-devel/2020-12/msg00111.html however, upstream never merged these patches. libreboot will have to maintain these from now on. the patches have been rebased for use with grub 2.12. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-03-30fix sata slots on dell 9020 sff and mtLeah Rowe
3rd sata slot (of 3) broken on 9020 sff, and the 3rd and 4th (of 4) slots are broken on 9020 mt this patch fixes them on both, so that all ports work properly Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-03-04config: Add Dell Latitude E5420Nicholas Chin
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-03-02coreboot/dell9020*_12mb: Disable IOMMU by defaultLeah Rowe
Needed to make graphics cards work. Turn it on if you're using only the Intel GPU. With IOMMU *enabled*, graphics cards do not work reliably at all. The cause still needs to be investigated, but the symptoms are graphical corruption on the screen, and Xorg usually crashes. In some cases (on some cards), TTYs can still be used; the payload can still be used reliably, on a graphics card, but Xorg fails to work properly. This could be a bug in Linux drivers, instead of anything that coreboot does (not yet tested in factory BIOS). Leaving it off by default will ensure reliable operation on all setups, whether an iGPU or dGPU is used. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-03-02coreboot/haswell: make IOMMU a runtime optionLeah Rowe
It is now possible to disable the IOMMU on Haswell boards, by doing this on your ROM image: ./nvramtool -C libreboot.rom -w iommu=Disable To enable it again, do this: ./nvramtool -C libreboot.rom -w iommu=Enable If not specified, the default behaviour is *on*. A follow-up patch will turn IOMMU *off* by default, on Dell OptiPlex 9020 SFF/MT, by setting it as such in cmos.default. This is to make graphics cards work properly to work around a bug when it's turned on. Leaving the IOMMU enabled is recommended, if it works. It works in most cases, including on 9020 SFF/MT when using the Intel GPU without a graphics card inserted. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-02-27enable serial console on fam15h boardsLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-02-25Libreboot 2024022520240225Leah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-02-23config/vendor: fix entry for 9020sffLeah Rowe
the current entry is fine, but it would then not support other configs of different flash sizes, unless they are explicitly defined. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-02-23disable hiding peg from mrc on dell 9020Leah Rowe
makes graphics cards work Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-02-20config/ifd/dell_ivybridge: Add ifd_nogbeNicholas Chin
This is required by the Latitude E5530, which uses a Broadcom NIC instead of the Intel ones. The original port was missing this file. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-02-18./update trees -u corebootLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-02-18NEW BOARD: dell 9020 optiplex sffLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-02-17Merge pull request 'Add HP EliteBook 8560w, MXM' (#187) from ↵Leah Rowe
Riku_V/lbmk:hp8560w into master Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/187
2024-02-12Add HP EliteBook 8560wRiku Viitanen
Iru Cai's port from Gerrit: https://review.coreboot.org/c/coreboot/+/39398 Now with the proper MXM structure, which removes the 30 second POST delay. Tested with i7-2670QM, Quadro 2000M and 32GB RAM. Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
2024-02-11update pico-serprog to new revisionLeah Rowe
this merges the fix from: https://codeberg.org/libreboot/pico-serprog/pulls/1 however, PRs are not to be sent there. riku merged it in his repository, and i pulled it in the mirror hosted on libreboot codeberg Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-02-11Patch SeaBIOS: Add MXM supportRiku Viitanen
Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
2024-02-08config: Add Dell Latitude E5520Nicholas Chin
Tested by Minimum_Baseball_629 on Reddit Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-02-08config/coreboot/default/patches : Renumber E6420, E6520, E5530 patchesNicholas Chin
The OptiPlex 9020/7020 port was merged first and was numbered 31. Increment the numbering of the Latitude patches to reflect this. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-02-08coreboot/dell9020mt: disable pcie rebarLeah Rowe
i enabled it but it's buggy according to comments on gerrit. disable for now. dgpu didn't work anyway, even with it turned off, when i had this tested. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-02-08remove coreboot/dell9020mtvga_12mbLeah Rowe
keep dell9020mt_12mb dell9020mtvga_12mb doesn't actually work (was tried for running a graphics card on its own, with no igpu init) Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-02-07update revision: pico-serprogRiku Viitanen
should fix https://codeberg.org/libreboot/lbmk/issues/182 Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
2024-02-07update coreboot configsLeah Rowe
this was done automatically by running: ./update trees -u coreboot this has to be done when adding patches for now board ports, because of the way lbmk and also coreboot's build systems work. the configs just have to be re-generated to include a line that says the entry for the newly added boards isn't set. look at the diff of this commit as an example. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-02-07Merge pull request 'Add Latitude E6420, E6520, and E5530' (#183) from ↵Leah Rowe
nic3-14159/lbmk:latitude-ports into master Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/183
2024-02-06config: Add Dell Latitude E5530Nicholas Chin
Tested by Martin Dawson. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-02-06config: Add Dell Latitude E6520Nicholas Chin
Tested by Martin Dawson. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-02-06config: Add Dell Latitude E6420Nicholas Chin
Tested by Martin Dawson. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-02-04add vga-only 9020 configLeah Rowe
on a dgpu setup, igpu was still in use, when tested by a user. do separate roms that don't enable anything vga in coreboot, relying instead only on seabios to execute a vga rom. these roms will only work if you have a graphics card. Signed-off-by: Leah Rowe <info@minifree.org>
2024-02-04NEW BOARD: Dell OptiPlex 9020 MT (and 7020 MT)Leah Rowe
Specifically the MT versions. The SFF versions will be added separately, in a later commit. See: https://review.coreboot.org/c/coreboot/+/55232 This patch has been added, from patchset 31. It still has some unresolved issues, on that patchset, but it should boot. See commit message there. Of note: I've enabled PCI REBAR, though it's unknown whether it will work (some comments there about it though, on that gerrit page). I've also set CBFS size to 8MB, not the full size of the BIOS region; this is required on the T440p which uses the same mrc.bin file, to get S3 working. TSEG stage cache disabled, as on other Haswell boards. The setup: SeaBIOS-only as first payload, but with GRUB enabled as secondary payload. The _grubonly setup has been enabled here. This way, the config will work on iGPU and dGPU setups without issue. Signed-off-by: Leah Rowe <info@minifree.org>
2024-02-03import dell optiplex 7020/9020 patch from gerritLeah Rowe
coreboot gerrit patch 55232, patchset 31 the actual board will be enabled in a follow-up patch. merging the patch on its own first is better practise, to run ./update trees -u coreboot this way, there won't be a revision that breaks builds, due to the idiosyncratic nature of coreboot configuration. Signed-off-by: Leah Rowe <info@minifree.org>
2024-01-28update pico-serprog to Riku's new revisionLeah Rowe
Riku introduced three new patches: * Add support for multiple chip selects. This allows you to control multiple chips from the same clip, on systems with dual flash setups, at least theoretically. * Enable pull-up on unused chip selects - pull them high so that chips you connect that to are deactivated while flashing the target chip. This could be used on thinkpad W541 for instance, where miso/mosi have 0ohm between them via the two flash ICs. You could pull the other chip select high. * Documentation for the above, in the pico-serprog readme. This goes in tandem with a patch from Riku, present in the recently integrated flashprog project, namely: commit ddb6d926783d4f9cbee04c7392718ed8f89daa0e Author: Riku Viitanen <riku.viitanen@protonmail.com> Date: Mon Jan 15 19:15:49 2024 +0200 serprog: Add support for multiple SPI chip selects This functionality will therefore be present in the next release of Libreboot. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-28flashprog: apply the good old MX25 workaroundRiku Viitanen
2024-01-27remove remaining flashrom remnants (use flashprog)Leah Rowe
we use flashprog now! Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-27update parabola dependencies for flashprogLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-27update arch dependencies for flashprogLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-27update trisquel dependencies for flashprogLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-27update debian dependencies for flashprogLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-27config/git: use flashprog instead of flashromLeah Rowe
Nico Huber is the rightful project lead. I do not support the coup that occured within the flashrom project. Nico has always been of great service to the Libreboot project, by virtue of his work on both coreboot and flashrom. Nico Huber was unfairly removed from the flashrom project infrastructure, due to unfounded accusations hurled at him by flashrom's new project lead. The accusations are unfounded because no evidence was given. Use Nico Huber's fork, named flashprog. We will work with flashprog from now on. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-26Libreboot 2024012620240126Leah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-25update config/git/docs to latest revsLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-25dell/e6*30: use generic PS2K/PS2M EISAID stringsLeah Rowe
CONFIG_PS2M_EISAID. this is a a string used for the identifier on the mouse, in ACPI. CONFIG_PS2K_EISAID this is used for the keyboard. IASL comes back with this build error: dsdt.asl 1884: Name(_HID, EISAID("DLLK0534")) Error 6045 - ^ EISAID string must be of the form "UUUXXXX" (3 uppercase, 4 hex digits) (DLLK0534) Change DLLK0534 back to PNP0303 and change DLL0534 back to PNP0F13. These are generic identifiers for PS/2 keyboard and mouse. Any generic driver will work with the onboard mouse/keyboard on these machines. They do not need to be changed. These are the default values anyway. Just leave them explicitly defined to the default values, for now; if these options are not set, coreboot will default to these values. This shouldn't break anything for the users. I've reported this to Nicholas Chin, author of those patches. Libreboot imported the new versions of E6430/E6530 board patches in the coreboot revision update, but the new (technically correct) values broke IASL, so I've decided to use the old values for now. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-25update coreboot/dell to same rev as defaultLeah Rowe
re-use the same patches, and drop the same patches. this tree uses hell's special ddr2 fix, which we apply for the dell latitude e6400. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-25coreboot/default: update coreboot to January 2024Leah Rowe
Base revision changed to: commit b6cbfa977f63d57d5d6b9e9f7c1cef30162f575a Author: Morris Hsu <morris-hsu@quanta.corp-partner.google.com> Date: Fri Jan 5 16:48:17 2024 +0800 mb/google/dedede/var/metaknight:Add fw_config probe for multi codec and amplifier Of note: Several out-of-tree ports have been adjusted to use the new SPD config style, where it is defined in devicetree. I manually updated the E6530 patch myself, based on the update that Nicholas did on E6430 (Nicholas will later update the E6530 patch himself, and I'll re-merge the patch). Several upstream patches now exist in this revision, that we were able to remove from lbmk. The heap size patch was reverted upstream, as we did, but see: https://review.coreboot.org/c/coreboot/+/80023 https://review.coreboot.org/c/coreboot/+/79525 Although we still disable the TSEG Stage Cache, ivy/sandy/haswell should be reliable on S3 now (leaving TSEG Stage Cache disabled, for now, anyway). Also included in upstream now: commit 29030d0f3dad2ec6b86000dfe2c8e951ae80bf94 Author: Bill Xie <persmule@hardenedlinux.org> Date: Sat Oct 7 01:32:51 2023 +0800 drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume Further patches from upstream: commit 432e92688eca0e85cbaebca3232f65936b305a98 Author: Bill Xie <persmule@hardenedlinux.org> Date: Fri Nov 3 12:34:01 2023 +0800 drivers/pc80/rtc/option.c: Reset only CMOS range covered by checksum This should fix S3 on GM45 thinkpads. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-21fam15h boards: define xtreeLeah Rowe
these should be using the rdimm tree for crossgcc, so define it explicitly. the build system creates a symlink too, but it's still best that we use it. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-21coreboot/fam15h_udimm: define xtreeLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-21fix amd mainboard configsLeah Rowe
in a build test, canoeboot 0.1 builds, but master doesn't, and neither does lbmk. i changed a few of them when doing the crossgcc build optimisation patches. i'm just copying the configs from there. unlike in the canoeboot version of this patch, i've re-enabled microcode updates in these lbmk configs. Signed-off-by: Leah Rowe <leah@libreboot.org>