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2024-02-04add vga-only 9020 configLeah Rowe
on a dgpu setup, igpu was still in use, when tested by a user. do separate roms that don't enable anything vga in coreboot, relying instead only on seabios to execute a vga rom. these roms will only work if you have a graphics card. Signed-off-by: Leah Rowe <info@minifree.org>
2024-02-04NEW BOARD: Dell OptiPlex 9020 MT (and 7020 MT)Leah Rowe
Specifically the MT versions. The SFF versions will be added separately, in a later commit. See: https://review.coreboot.org/c/coreboot/+/55232 This patch has been added, from patchset 31. It still has some unresolved issues, on that patchset, but it should boot. See commit message there. Of note: I've enabled PCI REBAR, though it's unknown whether it will work (some comments there about it though, on that gerrit page). I've also set CBFS size to 8MB, not the full size of the BIOS region; this is required on the T440p which uses the same mrc.bin file, to get S3 working. TSEG stage cache disabled, as on other Haswell boards. The setup: SeaBIOS-only as first payload, but with GRUB enabled as secondary payload. The _grubonly setup has been enabled here. This way, the config will work on iGPU and dGPU setups without issue. Signed-off-by: Leah Rowe <info@minifree.org>
2024-02-03import dell optiplex 7020/9020 patch from gerritLeah Rowe
coreboot gerrit patch 55232, patchset 31 the actual board will be enabled in a follow-up patch. merging the patch on its own first is better practise, to run ./update trees -u coreboot this way, there won't be a revision that breaks builds, due to the idiosyncratic nature of coreboot configuration. Signed-off-by: Leah Rowe <info@minifree.org>
2024-01-25dell/e6*30: use generic PS2K/PS2M EISAID stringsLeah Rowe
CONFIG_PS2M_EISAID. this is a a string used for the identifier on the mouse, in ACPI. CONFIG_PS2K_EISAID this is used for the keyboard. IASL comes back with this build error: dsdt.asl 1884: Name(_HID, EISAID("DLLK0534")) Error 6045 - ^ EISAID string must be of the form "UUUXXXX" (3 uppercase, 4 hex digits) (DLLK0534) Change DLLK0534 back to PNP0303 and change DLL0534 back to PNP0F13. These are generic identifiers for PS/2 keyboard and mouse. Any generic driver will work with the onboard mouse/keyboard on these machines. They do not need to be changed. These are the default values anyway. Just leave them explicitly defined to the default values, for now; if these options are not set, coreboot will default to these values. This shouldn't break anything for the users. I've reported this to Nicholas Chin, author of those patches. Libreboot imported the new versions of E6430/E6530 board patches in the coreboot revision update, but the new (technically correct) values broke IASL, so I've decided to use the old values for now. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-25update coreboot/dell to same rev as defaultLeah Rowe
re-use the same patches, and drop the same patches. this tree uses hell's special ddr2 fix, which we apply for the dell latitude e6400. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-25coreboot/default: update coreboot to January 2024Leah Rowe
Base revision changed to: commit b6cbfa977f63d57d5d6b9e9f7c1cef30162f575a Author: Morris Hsu <morris-hsu@quanta.corp-partner.google.com> Date: Fri Jan 5 16:48:17 2024 +0800 mb/google/dedede/var/metaknight:Add fw_config probe for multi codec and amplifier Of note: Several out-of-tree ports have been adjusted to use the new SPD config style, where it is defined in devicetree. I manually updated the E6530 patch myself, based on the update that Nicholas did on E6430 (Nicholas will later update the E6530 patch himself, and I'll re-merge the patch). Several upstream patches now exist in this revision, that we were able to remove from lbmk. The heap size patch was reverted upstream, as we did, but see: https://review.coreboot.org/c/coreboot/+/80023 https://review.coreboot.org/c/coreboot/+/79525 Although we still disable the TSEG Stage Cache, ivy/sandy/haswell should be reliable on S3 now (leaving TSEG Stage Cache disabled, for now, anyway). Also included in upstream now: commit 29030d0f3dad2ec6b86000dfe2c8e951ae80bf94 Author: Bill Xie <persmule@hardenedlinux.org> Date: Sat Oct 7 01:32:51 2023 +0800 drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume Further patches from upstream: commit 432e92688eca0e85cbaebca3232f65936b305a98 Author: Bill Xie <persmule@hardenedlinux.org> Date: Fri Nov 3 12:34:01 2023 +0800 drivers/pc80/rtc/option.c: Reset only CMOS range covered by checksum This should fix S3 on GM45 thinkpads. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-21fam15h boards: define xtreeLeah Rowe
these should be using the rdimm tree for crossgcc, so define it explicitly. the build system creates a symlink too, but it's still best that we use it. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-21coreboot/fam15h_udimm: define xtreeLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-21fix amd mainboard configsLeah Rowe
in a build test, canoeboot 0.1 builds, but master doesn't, and neither does lbmk. i changed a few of them when doing the crossgcc build optimisation patches. i'm just copying the configs from there. unlike in the canoeboot version of this patch, i've re-enabled microcode updates in these lbmk configs. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-21git.sh: support downloading dependency treesLeah Rowe
a tree can specify: tree_depend="treename" this will make the other tree be downloaded. this is used for coreboot trees, to ensure that dependency trees are downloaded, because trees can now re-use crossgcc from other trees. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-21re-use crossgcc builds on the coreboot treesLeah Rowe
don't build crossgcc twice, especially if two coreboot trees use the same revision! Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-21coreboot/*/target.cfg: don't define xarchLeah Rowe
it's defined per board Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-21coreboot/fam15h: disable -Werror on binutils 2.32Leah Rowe
work around newer build issues, on very bleeding edge distros (disable treating warnings as errors) Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-12REMOVE MAINBOARD: lenovo x201Leah Rowe
with neutered ME, fan control fails. while there are ways to mitigate it, many users will not, and will likely see their system overheat, which is very dangerous. this bug (failed fan control on neutered ME) only affects arrandale machines such as lenovo x201. the newer machines are not affected by this. other arrandale machines will probably not be added to libreboot because of this, or they will be subject to further testing. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-10NEW MAINBOARD: HP EliteBook 820 G2Leah Rowe
This is of Broadwell platform, one generation above Haswell. Of note: this uses HP Sure Start. Although the flash is 16MB, our CBFS section (and IFD configuration) assumes 12MB flash, so the final 4MB will be left unflashed on installation, after blanking the private flash. The coreboot documents have more information about this. Some minor design changes in lbmk were made, to accomodate this port: Support for extracting refcode binaries added (pulled from Google recovery images). The refcode file is an ELF that initialises the MRC and the PCH. It is also responsible for enabling or disabling the Intel GbE device, where Google does not enable it, but lbmk modifies it per the instructions on the coreboot documentation, so as to enable Intel GbE. Google's recovery image stores the refcode as a stage file, but coreboot changed the format (for CBFS files) after 4.13 so coreboot 4.13's cbfstool is used to extract refcode. This realisation made me also change the script logic to use a cbfstool and ifdtool version matching the coreboot tree, for all parts of lbmk, whereas lbmk previously used only the default tree for cbfstool/ifdtool, on insertion and deletion of vendor files - it was 81dc20e744 that broke extraction of refcode on google's recovery images, where google used an older version of cbfstool to insert the files in their coreboot ROMs. A further backported patch has been added, copying coreboot revision f22f408956 which is a build fix from Nico Huber. Iru Cai submitted an ACPI bugfix after the revision lbmk currently uses, for coreboot/default, and this fix is needed for rebooting to work on Linux 6.1 or higher. This patch has been backported to lbmk, while it still uses the same October 2023 revision of coreboot. Broadwell MRC is inserted at the same offset as Haswell, so I didn't need to tweak that. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-28disable u-boot on x86 qemuLeah Rowe
it's not well-tested and currently doesn't build this is for later remove for now Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-27update/trees: further simplify crossgcc handlingLeah Rowe
arch no longer needs to be set, on multi-tree projects, and it has been renamed to xarch the new behaviour is: if xarch is set, treat it as a list of crossgcc targets and go through the list. set the first one as the target, for what lbmk builds, but build all of the defined crossgccc targets crossgcc_ada is now xlang, and defines which languages to build, rather than whether to build gcc-gnat Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-25coreboot: update hp elitebook configsLeah Rowe
i had to run make-oldconfig on all of them, because of the port that riku added the other day. lbmk doesn't use defconfigs, it uses full configs, so we have to make sure they're kept in sync this patch is the result of running the following command in a fresh clone of lbmk: ./update trees -u coreboot i should probably switch to defconfigs. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-24Add HP 8300 CMT portRiku Viitanen
Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
2023-12-23dell/e6400nvidia_4mb: new configuration (nvidia)Leah Rowe
the e6400_4mb target has libgfxinit and (if seabios) vgarom initialisation, but has issues on the nvidia model, even when using nomodeset. with this target, e6400nvidia_4mb, only the vgarom initialisation is used, libgfxinit is disabled. on nvidia models, this one should work a little bit better. specifically: nouveau crashes on this machine, with libreboot installed, but you can use nomodeset. however, when libgfxinit is also enabled, nomodeset no longer works properly. so this target disables all video initialisation in coreboot. only seabios will initialise anything video-related, by executing the vga option rom. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-23don't delete microcode updates in rom imagesLeah Rowe
at present, lbmk can remove microcode updates on images for a given target, if the target specifies microcode_required="n" in target.cfg lbmk then provides images with microcode, and images without, in a given release. although the user can also remove them manually, this just makes it a bit more convenient, for those users who do wish to run without the updates. this functionality is provided only on those platforms where no-microcode is tested. well, this behaviour implements a compromise on libreboot policy, which is to always include microcode updates by default. see: Binary Blob Reduction Policy the *canoeboot* project now exists, developed in parallel with libreboot, and it ships without microcode updates, on the same targets where lbmk also handled this. running without microcode updates is foolish, and should not be encouraged. clean up lbmk by not providing this kludge. the libreboot documentation will be updated, telling such users to try canoeboot instead, or to remove the update from a given libreboot rom - this is still possible, and mitigations such as PECI disablement on GM45 are still in place (and will be kept), so that this continues to work well. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-21rename hp elitebook ec fw after rom familiesRiku Viitanen
this affects 8460p and 8470p only, as the others' updates aren't common across different boards Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
2023-12-21build/roms: remove modify_coreboot_rom()Leah Rowe
don't handle "romtype" at all, in board target.cfg files add /dev/null as pike2008 rom on amd boards. this serves the same purpose, adding them as empty vga roms, to add an empty rom in cbfs. pike2008 cards cause seabios to hang, when their oproms are executed, so we insert a fake rom on i945 thinkpads, use the coreboot config option: CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK when set, this enables the same bootblock copy, for use with bucts. these two cases, namely pike2008 roms and i945 bootblock copies, no longer need to be handled in code Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-21hp8460pintel: actually enable vbtRiku Viitanen
Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
2023-12-21update coreboot configsLeah Rowe
the x220 edp patch invalidated lots of configs, so i did: ./update trees -u coreboot this is the resulting patch Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-21update/trees: simplified crossgcc handlingLeah Rowe
only call crossgcc for coreboot and u-boot, but use hostcc for everything else. simplify the checking of which architecture to compile for. "arch" in target.cfg files has been modified, to allow further simplification. without this patch, the logic currently only *barely* avoids using crossgcc on things like utils, and only works in practise because, in practise, lbmk only works on x86_64 anyway. the new logic, as per this patch, is simpler and more robust. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-19Add HP EliteBook 8460pRiku Viitanen
Inside the BIOS update, there's 68SCE and 68SCF variants. Based on Qubes HCL and browsing linux-hardware.org, these are Probook 6360b and Elitebook 8460p respectively. I checked the KBC1126 EC Firmwares within the update file, both use the exact same firmware images. Following-up will be a very similar but untested port for 6360b. Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
2023-12-17added x220edp_8mbrisapav
2023-12-17added x220edp_8mbrisapav
2023-11-06Merge pull request 'Dell Latitude E6530 support' (#151) from ↵Leah Rowe
nic3-14159/lbmk:e6530 into master Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/151
2023-11-05config/coreboot/e6430_12mb: Fix configsNicholas Chin
Fix a few issues with the E6430 configs to make it consistent with configs for other boards and function as intended. - Add VBT to CBFS: Although the VBT was enabled at the board level Kconfig in a previous commit (CONFIG_INTEL_GMA_HAVE_VBT), the config to actually add the VBT to CBFS was still unset. - Enable the static option table: The old config would always use the fallback values hard coded in the coreboot tree, rather than the settings in the cmos.default file - Enable DRAM clear on boot: This was not set previously, even though most other boards set this for security. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2023-11-05Add Dell Latitude E6530 supportNicholas Chin
This is pretty much the same as the E6430 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2023-11-05config/ifd: Rename e6430 to dell_ivybridgeNicholas Chin
This is to support future patches for other Ivy Bridge Dell Latitudes. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2023-11-05use mirrorservice.org for gcc downloadsLeah Rowe
the gnu.org 302 redirect often fails Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-11-05Merge pull request 'Enable VBT for E6430' (#147) from ↵Leah Rowe
nic3-14159/lbmk:enable-e6430-vbt into master Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/147
2023-11-05Recreate i945 coreboot configs from scratchLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-11-05dell/e6400: set vram to max (256mb)Leah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-11-05coreboot: re-configure gm45 thinkpads from scratchLeah Rowe
TSEG Stage Cache enabled again, because disabling it did not affect S3 in any way. Many configs have changed, and debug level is set to 7. In testing with V-T60 on IRC, it wasn't just removal of the DDR2 patch that I did, but I re-did the configs too, in exactly the same way I've done them here, when testing on an X200 to fix boot issues. Libreboot does not use defconfigs, instead it uses full configs, and these have to be updated. I normally just run make-oldconfig on every config, for revision updates. However, every now and then, we need to re-do them. Play it safe and re-do every config. I've double- and triple-checked that the configs are correct. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-11-05coreboot/dell: move e6400 to new tree, dellLeah Rowe
the ddr2 fix broke *ddr3* on gm45 thinkpads in testing, depending on memory modules. this was established by removing patches, re-doing configs etc, on a user's X200 (testing gentoo and freebsd). the X200 kept randomly rebooting or having random glitches. the configs themselves (gm45 thinkpads) will also be re-done, because i found minor issues unrelated, but this patch moves dell e6400 to its own tree. the ddr2 fix is no longer present in coreboot/default, only coreboot/dell. i noticed minor differences in gm45 thinkpad configs, when re-doing the configs, versus what are currently in lbmk master; for instance, vbt was not enabled anymore, on thinkpad x200. modifications to these will be done separately. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-11-05Dell E6430: use ME Soft Temporary DisableLeah Rowe
me_state=Disabled in cmos.default Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-11-04Enable VBT for E6430Nicholas Chin
The original E6430 patch included the Intel VBT file, but did not actually enable it in Kconfig. Update the patch to enable it and update the E6430 configs.
2023-11-01Libreboot 2023110120231101Leah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-11-01build/roms: re-add SeaGRUB build supportLeah Rowe
it didn't work in the past, but it does work nowadays; specifically, it only worked with libgfxinit in the past, but not on VGA ROMs. now it does work on VGA ROMs, tested on e6400 and t1650 so it was enabled there. in this setup, a special image is provided where SeaBIOS is the main payload, but it only loads GRUB; nothing else, every. this is called SeaGRUB. this setup is useful in cases where the user only has a GPU that lacks libgfxinit support. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-11-01add 512kb d945gclf configLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-11-01d945gclf: add noblobs/nomicrocode labelLeah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-11-01Merge pull request 'add intel d945gclf_8mb support based on previous ↵Leah Rowe
libreboot configs' (#144) from fbraghiroli/lbmk:master into master Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/144
2023-10-31Revert "coreboot/default: use alternative heap size fix"Leah Rowe
This reverts commit 29e9c32e32f8e947f51a3efe375dab3ef8e1987e.
2023-10-31coreboot/all: disable TSEG stage cacheLeah Rowe
this is to work around recent s3 suspend/resume issues Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-31crank up vram allocation on more intel boardsLeah Rowe
it's preferable that the vram setting be as high as feasible, for users. we overlooked this on some newer platforms that were added, over several releases. these levels won't offend most users, and people who want less can always turn it down Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-31coreboot/default: use alternative heap size fixLeah Rowe
My previous fix to revert didn't fix S3 on GM45, one of the platforms reported fixed by 78263; I'm merging that instead, at patch set 10. It is referenced by 78815/1 which was split from it, so merge that too (restores overrides of higher values, on certain platforms that we don't use yet). https://review.coreboot.org/c/coreboot/+/78623/10 https://review.coreboot.org/c/coreboot/+/78815/1 Accordingly, update configs to match the new default. Signed-off-by: Leah Rowe <leah@libreboot.org>