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2024-04-26build/roms: report status when building imagesLeah Rowe
export LBMK_VERSION_TYPE=x x can be: stable, unstable in target.cfg files, specify: status=x x can be: stable, unstable, broken, untested if unset, lbmk defaults to "unknown" if LBMK_VERSION_TYPE is set, no confirmation is asked if the given target matches what's set (but what's set in that environmental variable can only be stable or unstable) if LBMK_RELEASE="y", no confirmation is asked, unless the target is something other than stable/unstable "unstable" means it works, but has a few non-breaking bugs, e.g. broken s3 on dell e6400 whereas, if raminit regularly fails or it is so absolutely unreliable as to be unusable, then the board should be declared "broken" untested means: it has not been tested With this change, it should now be easier to track whether a given board is tested, in preparation for releases. When working on trees/boards, status can be set for targets. Also: in the board directory, you can add a "warn.txt" file which will display a message. For example, if a board has a particular quirk to watch out for, write that there. The message will be printed during the build process, to stdout. If status is anything *other* than stable, or it is unstable but LBMK_VERSION_TYPE is not set to "unstable", and not building a release, a confirmation is passed. If the board is not specified as stable or unstable, during a release build, the build is skipped and the ROM is not provided in that release; this is in *addition* to release="n" or release="y" that can be set in target.cfg, which will skip the release build for that target if "n" Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-25coreboot/default: update coreboot to January 2024Leah Rowe
Base revision changed to: commit b6cbfa977f63d57d5d6b9e9f7c1cef30162f575a Author: Morris Hsu <morris-hsu@quanta.corp-partner.google.com> Date: Fri Jan 5 16:48:17 2024 +0800 mb/google/dedede/var/metaknight:Add fw_config probe for multi codec and amplifier Of note: Several out-of-tree ports have been adjusted to use the new SPD config style, where it is defined in devicetree. I manually updated the E6530 patch myself, based on the update that Nicholas did on E6430 (Nicholas will later update the E6530 patch himself, and I'll re-merge the patch). Several upstream patches now exist in this revision, that we were able to remove from lbmk. The heap size patch was reverted upstream, as we did, but see: https://review.coreboot.org/c/coreboot/+/80023 https://review.coreboot.org/c/coreboot/+/79525 Although we still disable the TSEG Stage Cache, ivy/sandy/haswell should be reliable on S3 now (leaving TSEG Stage Cache disabled, for now, anyway). Also included in upstream now: commit 29030d0f3dad2ec6b86000dfe2c8e951ae80bf94 Author: Bill Xie <persmule@hardenedlinux.org> Date: Sat Oct 7 01:32:51 2023 +0800 drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume Further patches from upstream: commit 432e92688eca0e85cbaebca3232f65936b305a98 Author: Bill Xie <persmule@hardenedlinux.org> Date: Fri Nov 3 12:34:01 2023 +0800 drivers/pc80/rtc/option.c: Reset only CMOS range covered by checksum This should fix S3 on GM45 thinkpads. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-27update/trees: further simplify crossgcc handlingLeah Rowe
arch no longer needs to be set, on multi-tree projects, and it has been renamed to xarch the new behaviour is: if xarch is set, treat it as a list of crossgcc targets and go through the list. set the first one as the target, for what lbmk builds, but build all of the defined crossgccc targets crossgcc_ada is now xlang, and defines which languages to build, rather than whether to build gcc-gnat Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-23don't delete microcode updates in rom imagesLeah Rowe
at present, lbmk can remove microcode updates on images for a given target, if the target specifies microcode_required="n" in target.cfg lbmk then provides images with microcode, and images without, in a given release. although the user can also remove them manually, this just makes it a bit more convenient, for those users who do wish to run without the updates. this functionality is provided only on those platforms where no-microcode is tested. well, this behaviour implements a compromise on libreboot policy, which is to always include microcode updates by default. see: Binary Blob Reduction Policy the *canoeboot* project now exists, developed in parallel with libreboot, and it ships without microcode updates, on the same targets where lbmk also handled this. running without microcode updates is foolish, and should not be encouraged. clean up lbmk by not providing this kludge. the libreboot documentation will be updated, telling such users to try canoeboot instead, or to remove the update from a given libreboot rom - this is still possible, and mitigations such as PECI disablement on GM45 are still in place (and will be kept), so that this continues to work well. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-21build/roms: remove modify_coreboot_rom()Leah Rowe
don't handle "romtype" at all, in board target.cfg files add /dev/null as pike2008 rom on amd boards. this serves the same purpose, adding them as empty vga roms, to add an empty rom in cbfs. pike2008 cards cause seabios to hang, when their oproms are executed, so we insert a fake rom on i945 thinkpads, use the coreboot config option: CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK when set, this enables the same bootblock copy, for use with bucts. these two cases, namely pike2008 roms and i945 bootblock copies, no longer need to be handled in code Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-21update coreboot configsLeah Rowe
the x220 edp patch invalidated lots of configs, so i did: ./update trees -u coreboot this is the resulting patch Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-21update/trees: simplified crossgcc handlingLeah Rowe
only call crossgcc for coreboot and u-boot, but use hostcc for everything else. simplify the checking of which architecture to compile for. "arch" in target.cfg files has been modified, to allow further simplification. without this patch, the logic currently only *barely* avoids using crossgcc on things like utils, and only works in practise because, in practise, lbmk only works on x86_64 anyway. the new logic, as per this patch, is simpler and more robust. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-11-05coreboot: re-configure gm45 thinkpads from scratchLeah Rowe
TSEG Stage Cache enabled again, because disabling it did not affect S3 in any way. Many configs have changed, and debug level is set to 7. In testing with V-T60 on IRC, it wasn't just removal of the DDR2 patch that I did, but I re-did the configs too, in exactly the same way I've done them here, when testing on an X200 to fix boot issues. Libreboot does not use defconfigs, instead it uses full configs, and these have to be updated. I normally just run make-oldconfig on every config, for revision updates. However, every now and then, we need to re-do them. Play it safe and re-do every config. I've double- and triple-checked that the configs are correct. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-31Revert "coreboot/default: use alternative heap size fix"Leah Rowe
This reverts commit 29e9c32e32f8e947f51a3efe375dab3ef8e1987e.
2023-10-31coreboot/all: disable TSEG stage cacheLeah Rowe
this is to work around recent s3 suspend/resume issues Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-31coreboot/default: use alternative heap size fixLeah Rowe
My previous fix to revert didn't fix S3 on GM45, one of the platforms reported fixed by 78263; I'm merging that instead, at patch set 10. It is referenced by 78815/1 which was split from it, so merge that too (restores overrides of higher values, on certain platforms that we don't use yet). https://review.coreboot.org/c/coreboot/+/78623/10 https://review.coreboot.org/c/coreboot/+/78815/1 Accordingly, update configs to match the new default. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-29revert coreboot heap size patchLeah Rowe
the patch: https://review.coreboot.org/c/coreboot/+/78270 this has been reverted, because it caused s3 resume issues on most intel laptops in libreboot. i was going to merge this instead: https://review.coreboot.org/c/coreboot/+/78623 however, it's under review, and this doesn't change to the old behaviour; it keeps the new universal config, but changes the default we know the old logic works, so keep that for now. in fact, the offending patch was only merged to main in coreboot, one day before i recently updated coreboot revs in coreboot/default - i used a 12 october revision, the patch above is 11 october i then ran "./update trees -u coreboot" which updated the heap sizes back to the old defaults. this should fix s3 suspend/resume where it was broken, in the libreboot 20231021 release - a point release with this and a few other fixes is planned soon. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-12coreboot/default bump: rev d862695f5f, 12 Oct 2023Leah Rowe
Riku's mSATA patch for HP8300USDT was merged upstream, so the patch has been dropped from lbmk because it is contained within this new coreboot revision. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-07rename blob/ to vendor/Leah Rowe
in the future, we may start downloading files that aren't blobs, such as mxm port configs (on mainboards that use MXM graphics) this directory will contain all of those files generally change the language used, across lbmk, to make use of "vendorfile" instead of "blob" Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-07put all src downloads under src/Leah Rowe
build/release/src was partly re-written to accomodate this memtest86plus was patched to have a central Makefile, and lbmk modified to use that, rather than mess with build32 and build64. the central Makefile just builds both targets or cleans both targets Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-09-04merge config/ and resources/Leah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>