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2024-03-04config: Add Dell Latitude E5420Nicholas Chin
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-02-08config: Add Dell Latitude E5520Nicholas Chin
Tested by Minimum_Baseball_629 on Reddit Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-02-07Merge pull request 'Add Latitude E6420, E6520, and E5530' (#183) from ↵Leah Rowe
nic3-14159/lbmk:latitude-ports into master Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/183
2024-02-06config: Add Dell Latitude E5530Nicholas Chin
Tested by Martin Dawson. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-02-06config: Add Dell Latitude E6520Nicholas Chin
Tested by Martin Dawson. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-02-06config: Add Dell Latitude E6420Nicholas Chin
Tested by Martin Dawson. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2024-02-03import dell optiplex 7020/9020 patch from gerritLeah Rowe
coreboot gerrit patch 55232, patchset 31 the actual board will be enabled in a follow-up patch. merging the patch on its own first is better practise, to run ./update trees -u coreboot this way, there won't be a revision that breaks builds, due to the idiosyncratic nature of coreboot configuration. Signed-off-by: Leah Rowe <info@minifree.org>
2024-01-25dell/e6*30: use generic PS2K/PS2M EISAID stringsLeah Rowe
CONFIG_PS2M_EISAID. this is a a string used for the identifier on the mouse, in ACPI. CONFIG_PS2K_EISAID this is used for the keyboard. IASL comes back with this build error: dsdt.asl 1884: Name(_HID, EISAID("DLLK0534")) Error 6045 - ^ EISAID string must be of the form "UUUXXXX" (3 uppercase, 4 hex digits) (DLLK0534) Change DLLK0534 back to PNP0303 and change DLL0534 back to PNP0F13. These are generic identifiers for PS/2 keyboard and mouse. Any generic driver will work with the onboard mouse/keyboard on these machines. They do not need to be changed. These are the default values anyway. Just leave them explicitly defined to the default values, for now; if these options are not set, coreboot will default to these values. This shouldn't break anything for the users. I've reported this to Nicholas Chin, author of those patches. Libreboot imported the new versions of E6430/E6530 board patches in the coreboot revision update, but the new (technically correct) values broke IASL, so I've decided to use the old values for now. Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-25coreboot/default: update coreboot to January 2024Leah Rowe
Base revision changed to: commit b6cbfa977f63d57d5d6b9e9f7c1cef30162f575a Author: Morris Hsu <morris-hsu@quanta.corp-partner.google.com> Date: Fri Jan 5 16:48:17 2024 +0800 mb/google/dedede/var/metaknight:Add fw_config probe for multi codec and amplifier Of note: Several out-of-tree ports have been adjusted to use the new SPD config style, where it is defined in devicetree. I manually updated the E6530 patch myself, based on the update that Nicholas did on E6430 (Nicholas will later update the E6530 patch himself, and I'll re-merge the patch). Several upstream patches now exist in this revision, that we were able to remove from lbmk. The heap size patch was reverted upstream, as we did, but see: https://review.coreboot.org/c/coreboot/+/80023 https://review.coreboot.org/c/coreboot/+/79525 Although we still disable the TSEG Stage Cache, ivy/sandy/haswell should be reliable on S3 now (leaving TSEG Stage Cache disabled, for now, anyway). Also included in upstream now: commit 29030d0f3dad2ec6b86000dfe2c8e951ae80bf94 Author: Bill Xie <persmule@hardenedlinux.org> Date: Sat Oct 7 01:32:51 2023 +0800 drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume Further patches from upstream: commit 432e92688eca0e85cbaebca3232f65936b305a98 Author: Bill Xie <persmule@hardenedlinux.org> Date: Fri Nov 3 12:34:01 2023 +0800 drivers/pc80/rtc/option.c: Reset only CMOS range covered by checksum This should fix S3 on GM45 thinkpads. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-27update/trees: further simplify crossgcc handlingLeah Rowe
arch no longer needs to be set, on multi-tree projects, and it has been renamed to xarch the new behaviour is: if xarch is set, treat it as a list of crossgcc targets and go through the list. set the first one as the target, for what lbmk builds, but build all of the defined crossgccc targets crossgcc_ada is now xlang, and defines which languages to build, rather than whether to build gcc-gnat Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-23don't delete microcode updates in rom imagesLeah Rowe
at present, lbmk can remove microcode updates on images for a given target, if the target specifies microcode_required="n" in target.cfg lbmk then provides images with microcode, and images without, in a given release. although the user can also remove them manually, this just makes it a bit more convenient, for those users who do wish to run without the updates. this functionality is provided only on those platforms where no-microcode is tested. well, this behaviour implements a compromise on libreboot policy, which is to always include microcode updates by default. see: Binary Blob Reduction Policy the *canoeboot* project now exists, developed in parallel with libreboot, and it ships without microcode updates, on the same targets where lbmk also handled this. running without microcode updates is foolish, and should not be encouraged. clean up lbmk by not providing this kludge. the libreboot documentation will be updated, telling such users to try canoeboot instead, or to remove the update from a given libreboot rom - this is still possible, and mitigations such as PECI disablement on GM45 are still in place (and will be kept), so that this continues to work well. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-21build/roms: remove modify_coreboot_rom()Leah Rowe
don't handle "romtype" at all, in board target.cfg files add /dev/null as pike2008 rom on amd boards. this serves the same purpose, adding them as empty vga roms, to add an empty rom in cbfs. pike2008 cards cause seabios to hang, when their oproms are executed, so we insert a fake rom on i945 thinkpads, use the coreboot config option: CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK when set, this enables the same bootblock copy, for use with bucts. these two cases, namely pike2008 roms and i945 bootblock copies, no longer need to be handled in code Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-21update/trees: simplified crossgcc handlingLeah Rowe
only call crossgcc for coreboot and u-boot, but use hostcc for everything else. simplify the checking of which architecture to compile for. "arch" in target.cfg files has been modified, to allow further simplification. without this patch, the logic currently only *barely* avoids using crossgcc on things like utils, and only works in practise because, in practise, lbmk only works on x86_64 anyway. the new logic, as per this patch, is simpler and more robust. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-11-06Merge pull request 'Dell Latitude E6530 support' (#151) from ↵Leah Rowe
nic3-14159/lbmk:e6530 into master Reviewed-on: https://codeberg.org/libreboot/lbmk/pulls/151
2023-11-05config/coreboot/e6430_12mb: Fix configsNicholas Chin
Fix a few issues with the E6430 configs to make it consistent with configs for other boards and function as intended. - Add VBT to CBFS: Although the VBT was enabled at the board level Kconfig in a previous commit (CONFIG_INTEL_GMA_HAVE_VBT), the config to actually add the VBT to CBFS was still unset. - Enable the static option table: The old config would always use the fallback values hard coded in the coreboot tree, rather than the settings in the cmos.default file - Enable DRAM clear on boot: This was not set previously, even though most other boards set this for security. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2023-11-05Add Dell Latitude E6530 supportNicholas Chin
This is pretty much the same as the E6430 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2023-11-05config/ifd: Rename e6430 to dell_ivybridgeNicholas Chin
This is to support future patches for other Ivy Bridge Dell Latitudes. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
2023-11-04Enable VBT for E6430Nicholas Chin
The original E6430 patch included the Intel VBT file, but did not actually enable it in Kconfig. Update the patch to enable it and update the E6430 configs.
2023-11-01Libreboot 2023110120231101Leah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-31Revert "coreboot/default: use alternative heap size fix"Leah Rowe
This reverts commit 29e9c32e32f8e947f51a3efe375dab3ef8e1987e.
2023-10-31coreboot/all: disable TSEG stage cacheLeah Rowe
this is to work around recent s3 suspend/resume issues Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-31coreboot/default: use alternative heap size fixLeah Rowe
My previous fix to revert didn't fix S3 on GM45, one of the platforms reported fixed by 78263; I'm merging that instead, at patch set 10. It is referenced by 78815/1 which was split from it, so merge that too (restores overrides of higher values, on certain platforms that we don't use yet). https://review.coreboot.org/c/coreboot/+/78623/10 https://review.coreboot.org/c/coreboot/+/78815/1 Accordingly, update configs to match the new default. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-31fix grub keyboard init on dell e6400 and e6430Leah Rowe
also, enable seabios_withgrub on e6400, but not grubfirst; right now, we also support dgpu which would brick on grubfirst. on my tested nvidia model, loading grub from seabios worked, so i'm going to re-add seabios_grubfirst functionality like in older libreboot revisions, enabled selectively on a given target. e6430 currently only has igpu support anyway, but i've done the same thing there, in anticipation of future dgpu support. e6400 and e6430 ec report scancode set 2 with translation by default, but only actually output scancode set 1 grub is trying to use scancode set 2 without scancode translation, so the key inputs get messed up fix it by forcing scancode set 2 with translation, but only on coreboot; other build targets on GRUB will retain the same behaviour as before courtesy goes to Nicholas Chin who inspired me, and helped me to fix this. tested on Nicholas's E6400 and E6430, and my E6400; Riku also tested it on non-Dell, as did I (some thinkpads), and all seems OK. The new behaviour in coreboot GRUB is essentially no different to that of SeaBIOS, which does the same. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-29revert coreboot heap size patchLeah Rowe
the patch: https://review.coreboot.org/c/coreboot/+/78270 this has been reverted, because it caused s3 resume issues on most intel laptops in libreboot. i was going to merge this instead: https://review.coreboot.org/c/coreboot/+/78623 however, it's under review, and this doesn't change to the old behaviour; it keeps the new universal config, but changes the default we know the old logic works, so keep that for now. in fact, the offending patch was only merged to main in coreboot, one day before i recently updated coreboot revs in coreboot/default - i used a 12 october revision, the patch above is 11 october i then ran "./update trees -u coreboot" which updated the heap sizes back to the old defaults. this should fix s3 suspend/resume where it was broken, in the libreboot 20231021 release - a point release with this and a few other fixes is planned soon. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-20lbmk: use 2-level directory structure in script/Leah Rowe
as opposed to the current 3-level structure. recent build system simplifications have enabled this change, thus: ./build fw coreboot -> ./build roms ./build fw grub -> ./build grub ./build fw serprog -> ./build serprog ./update project release -> ./update release ./update project trees -> ./update trees ./update vendor download -> ./vendor download ./update vendor inject -> ./vendor inject alper criticised that the commands were too long, so i made them shorter! Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-12coreboot/default bump: rev d862695f5f, 12 Oct 2023Leah Rowe
Riku's mSATA patch for HP8300USDT was merged upstream, so the patch has been dropped from lbmk because it is contained within this new coreboot revision. Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-07rename blob/ to vendor/Leah Rowe
in the future, we may start downloading files that aren't blobs, such as mxm port configs (on mainboards that use MXM graphics) this directory will contain all of those files generally change the language used, across lbmk, to make use of "vendorfile" instead of "blob" Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-07Rename blobs/ to blob/Leah Rowe
We don't have a directory names "srces", just "src". Ditto ecs, mrcs <-- it's just ec and mrc When referring to a file, e.g. blob/t1650/me.bin, that makes much more sense, because it's a single blob, not multiple blobs. Don't pluralise what isn't plural Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-07put all src downloads under src/Leah Rowe
build/release/src was partly re-written to accomodate this memtest86plus was patched to have a central Makefile, and lbmk modified to use that, rather than mess with build32 and build64. the central Makefile just builds both targets or cleans both targets Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-09-04merge config/ and resources/Leah Rowe
Signed-off-by: Leah Rowe <leah@libreboot.org>