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-rw-r--r--resources/coreboot/macbook21/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch23
-rw-r--r--resources/coreboot/macbook21/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch68
2 files changed, 91 insertions, 0 deletions
diff --git a/resources/coreboot/macbook21/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch b/resources/coreboot/macbook21/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
new file mode 100644
index 00000000..e1b0ee03
--- /dev/null
+++ b/resources/coreboot/macbook21/patches/0001-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
@@ -0,0 +1,23 @@
+From 4ab0850279e98ccd715fca75813407046e9eac27 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@retroboot.org>
+Date: Fri, 19 Mar 2021 05:54:58 +0000
+Subject: [PATCH 1/2] apple/macbook21: Set default VRAM to 64MiB instead of
+ 8MiB
+
+---
+ src/mainboard/apple/macbook21/cmos.default | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/mainboard/apple/macbook21/cmos.default b/src/mainboard/apple/macbook21/cmos.default
+index cf1bc4566e..dc0df3b6d6 100644
+--- a/src/mainboard/apple/macbook21/cmos.default
++++ b/src/mainboard/apple/macbook21/cmos.default
+@@ -5,4 +5,4 @@ boot_devices=''
+ boot_default=0x40
+ cmos_defaults_loaded=Yes
+ lpt=Enable
+-gfx_uma_size=8M
++gfx_uma_size=64M
+--
+2.25.1
+
diff --git a/resources/coreboot/macbook21/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch b/resources/coreboot/macbook21/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
new file mode 100644
index 00000000..0921ab8c
--- /dev/null
+++ b/resources/coreboot/macbook21/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
@@ -0,0 +1,68 @@
+From 3b03c7ce6499165959f1335a6b4d66d576c6b7ff Mon Sep 17 00:00:00 2001
+From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
+Date: Wed, 27 Oct 2021 13:36:01 +0200
+Subject: [PATCH 2/2] add c3 and clockgen to apple/macbook21
+
+---
+ src/mainboard/apple/macbook21/Kconfig | 1 +
+ src/mainboard/apple/macbook21/cstates.c | 13 +++++++++++++
+ src/mainboard/apple/macbook21/devicetree.cb | 6 ++++++
+ 3 files changed, 20 insertions(+)
+
+diff --git a/src/mainboard/apple/macbook21/Kconfig b/src/mainboard/apple/macbook21/Kconfig
+index 5f5ffde588..27377b737c 100644
+--- a/src/mainboard/apple/macbook21/Kconfig
++++ b/src/mainboard/apple/macbook21/Kconfig
+@@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
+ select HAVE_ACPI_TABLES
+ select HAVE_ACPI_RESUME
+ select I945_LVDS
++ select DRIVERS_I2C_CK505
+
+ config MAINBOARD_DIR
+ default "apple/macbook21"
+diff --git a/src/mainboard/apple/macbook21/cstates.c b/src/mainboard/apple/macbook21/cstates.c
+index 13d06f0839..88b8669c61 100644
+--- a/src/mainboard/apple/macbook21/cstates.c
++++ b/src/mainboard/apple/macbook21/cstates.c
+@@ -29,6 +29,19 @@ static const acpi_cstate_t cst_entries[] = {
+ .addrh = 0,
+ }
+ },
++ {
++ .ctype = 3,
++ .latency = 17,
++ .power = 250,
++ .resource = {
++ .space_id = ACPI_ADDRESS_SPACE_FIXED,
++ .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
++ .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
++ .access_size = ACPI_ACCESS_SIZE_UNDEFINED,
++ .addrl = 0x20,
++ .addrh = 0,
++ }
++ },
+ };
+
+ int get_cst_entries(const acpi_cstate_t **entries)
+diff --git a/src/mainboard/apple/macbook21/devicetree.cb b/src/mainboard/apple/macbook21/devicetree.cb
+index bcce778cb1..16025d6fbb 100644
+--- a/src/mainboard/apple/macbook21/devicetree.cb
++++ b/src/mainboard/apple/macbook21/devicetree.cb
+@@ -104,7 +104,13 @@ chip northbridge/intel/i945
+ end
+ device pci 1f.3 on # SMBUS
+ subsystemid 0x8086 0x7270
++ chip drivers/i2c/ck505
++ register "mask" = "{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }"
++ register "regs" = "{ 0x77, 0x77, 0x2d, 0x00, 0x21, 0x10, 0x3b, 0x06, 0x07, 0x0f, 0xf0, 0x01, 0x1e, 0x7f, 0x80, 0x80, 0x10, 0x08, 0x04, 0x01 }"
++ device i2c 69 on end
++ end
+ end
++
+ end
+ end
+ end
+--
+2.25.1
+