diff options
Diffstat (limited to 'resources/coreboot/fam15h_udimm/patches/0004-Do-not-use-microcode-updates-on-AMD-platforms.patch')
| -rw-r--r-- | resources/coreboot/fam15h_udimm/patches/0004-Do-not-use-microcode-updates-on-AMD-platforms.patch | 108 |
1 files changed, 108 insertions, 0 deletions
diff --git a/resources/coreboot/fam15h_udimm/patches/0004-Do-not-use-microcode-updates-on-AMD-platforms.patch b/resources/coreboot/fam15h_udimm/patches/0004-Do-not-use-microcode-updates-on-AMD-platforms.patch new file mode 100644 index 00000000..7f81fd2c --- /dev/null +++ b/resources/coreboot/fam15h_udimm/patches/0004-Do-not-use-microcode-updates-on-AMD-platforms.patch @@ -0,0 +1,108 @@ +From 2b1d40b970d9cbbb4f8fe30679e9b6909aa3d99a Mon Sep 17 00:00:00 2001 +From: Leah Rowe <leah@libreboot.org> +Date: Thu, 6 May 2021 17:07:06 +0100 +Subject: [PATCH 4/6] Do not use microcode updates on AMD platforms + +Coreboot is hardcoding the use of microcode updates on some platforms. + +Just nuke it from orbit. This is the libre branch of osboot, so microcode must +not be used. +--- + src/cpu/Makefile.inc | 52 +------------------ + src/cpu/amd/family_10h-family_15h/Kconfig | 1 - + .../amd/family_10h-family_15h/Makefile.inc | 10 +--- + 3 files changed, 2 insertions(+), 61 deletions(-) + +diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc +index b80c30d72b..e7909d32ed 100644 +--- a/src/cpu/Makefile.inc ++++ b/src/cpu/Makefile.inc +@@ -14,54 +14,4 @@ $(eval $(call create_class_compiler,cpu_microcode,x86_32)) + ## Rules for building the microcode blob in CBFS + ################################################################################ + +-ifneq ($(CONFIG_CPU_MICROCODE_MULTIPLE_FILES), y) +-cbfs-files-$(CONFIG_USE_CPU_MICROCODE_CBFS_BINS) += cpu_microcode_blob.bin +-endif +- +-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) +-cbfs-files-y += cpu_microcode_blob.bin +-cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin +- +-$(objgenerated)/microcode.bin: $(call strip_quotes,$(CONFIG_CPU_MICROCODE_HEADER_FILES)) +- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\"" +- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES) +-endif +- +-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS),y) +-cpu_microcode_bins := $(call strip_quotes,$(CONFIG_CPU_UCODE_BINARIES)) +-endif +-# otherwise `cpu_microcode_bins` should be filled by platform makefiles +- +-# We just mash all microcode binaries together into one binary to rule them all. +-# This approach assumes that the microcode binaries are properly padded, and +-# their headers specify the correct size. This works fairly well on isolatied +-# updates, such as Intel and some AMD microcode, but won't work very well if the +-# updates are wrapped in a container, like AMD's microcode update container. If +-# there is only one microcode binary (i.e. one container), then we don't have +-# this issue, and this rule will continue to work. +-$(obj)/cpu_microcode_blob.bin: $$(wildcard $$(cpu_microcode_bins)) +- for bin in $(cpu_microcode_bins); do \ +- if [ ! -f "$$bin" ]; then \ +- echo "Microcode error: $$bin does not exist"; \ +- NO_MICROCODE_FILE=1; \ +- fi; \ +- done; \ +- if [ -n "$$NO_MICROCODE_FILE" ]; then \ +- if [ -z "$(CONFIG_USE_BLOBS)" ] && [ -n "$(CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS)" ]; then \ +- echo "Try enabling binary-only repository in Kconfig 'General setup' menu."; \ +- fi; \ +- false; \ +- fi +- $(if $^,,false) # fail if no file is given at all +- @printf " MICROCODE $(subst $(obj)/,,$(@))\n" +- @echo $(cpu_microcode_bins) +- cat $^ > $@ +- +-cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin +-cpu_microcode_blob.bin-type := microcode +- +-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),) +-cpu_microcode_blob.bin-COREBOOT-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC) +-else +-cpu_microcode_blob.bin-align := 16 +-endif ++# No microcode permitted in this version of coreboot. +diff --git a/src/cpu/amd/family_10h-family_15h/Kconfig b/src/cpu/amd/family_10h-family_15h/Kconfig +index ad4f5f4ba6..21150ab1a7 100644 +--- a/src/cpu/amd/family_10h-family_15h/Kconfig ++++ b/src/cpu/amd/family_10h-family_15h/Kconfig +@@ -8,7 +8,6 @@ config CPU_AMD_MODEL_10XXX + select TSC_SYNC_LFENCE + select UDELAY_LAPIC + select SUPPORT_CPU_UCODE_IN_CBFS +- select CPU_MICROCODE_MULTIPLE_FILES + select CAR_GLOBAL_MIGRATION + + if CPU_AMD_MODEL_10XXX +diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc +index 7035323026..e0029f562d 100644 +--- a/src/cpu/amd/family_10h-family_15h/Makefile.inc ++++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc +@@ -14,12 +14,4 @@ ramstage-y += ram_calc.c + ramstage-y += monotonic_timer.c + ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c + +-# Microcode for Family 10h, 11h, 12h, and 14h +-cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS) += microcode_amd.bin +-microcode_amd.bin-file := 3rdparty/blobs/cpu/amd/family_10h-family_14h/microcode_amd.bin +-microcode_amd.bin-type := microcode +- +-# Microcode for Family 15h +-cbfs-files-$(CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS) += microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-file := 3rdparty/blobs/cpu/amd/family_15h/microcode_amd_fam15h.bin +-microcode_amd_fam15h.bin-type := microcode ++# Microcode deleted in this version of coreboot. +-- +2.25.1 + |