diff options
Diffstat (limited to 'config/coreboot/default/patches/0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch')
| -rw-r--r-- | config/coreboot/default/patches/0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/config/coreboot/default/patches/0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch b/config/coreboot/default/patches/0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch new file mode 100644 index 00000000..7a02d902 --- /dev/null +++ b/config/coreboot/default/patches/0040-nb-haswell-Disable-iGPU-when-dGPU-is-used.patch @@ -0,0 +1,54 @@ +From c6ce9c635e6576c86c546177c3d770dec2f3c9ae Mon Sep 17 00:00:00 2001 +From: Leah Rowe <info@minifree.org> +Date: Fri, 23 Feb 2024 13:33:31 +0000 +Subject: [PATCH 1/1] nb/haswell: Disable iGPU when dGPU is used + +This is usually is handled by Haswell mrc.bin, disabling VGA +decode on the iGPU when a dGPU is installed. However, Broadwell +mrc.bin does not, so the iGPU and dGPU are both enabled. + +This patch disables legacy VGA cycles for iGPU, under such +conditions. It has been tested on Broadwell mrc.bin when +using a graphics card on Dell OptiPlex 9020 SFF (currently +under review at this time of writing, submitted by Mate +Kukri). + +This patch has also been tested when Haswell mrc.bin is used, +and there are seemingly no breaking changes caused by it. + +Change-Id: I1df0a3aa42f8475b7741007bf3e28c2e089d916b +Signed-off-by: Leah Rowe <info@minifree.org> +Reviewed-on: https://review.coreboot.org/c/coreboot/+/80717 +Tested-by: build bot (Jenkins) <no-reply@coreboot.org> +Reviewed-by: Nico Huber <nico.h@gmx.de> +--- + src/northbridge/intel/haswell/gma.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c +index 6e6948b70f..48a0ba54c7 100644 +--- a/src/northbridge/intel/haswell/gma.c ++++ b/src/northbridge/intel/haswell/gma.c +@@ -461,12 +461,19 @@ static void gma_generate_ssdt(const struct device *dev) + drivers_intel_gma_displays_ssdt_generate(&chip->gfx); + } + ++static void gma_func0_disable(struct device *dev) ++{ ++ /* Disable VGA decode */ ++ pci_or_config16(pcidev_on_root(0, 0), GGC, 1 << 1); ++} ++ + static struct device_operations gma_func0_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = gma_func0_init, + .acpi_fill_ssdt = gma_generate_ssdt, ++ .vga_disable = gma_func0_disable, + .ops_pci = &pci_dev_ops_pci, + }; + +-- +2.39.2 + |