coreboot/default: Fix Werror when building ThinkPad T400 images

19 files changed, 59 insertions, 20 deletions

diff --git a/resources/coreboot/default/patches/0001-hardcode-tianocore-revisions-and-don-t-automatically.patch b/resources/coreboot/default/patches/0001-hardcode-tianocore-revisions-and-don-t-automatically.patch
index fc6f05a6..a67448e1 100644
--- a/resources/coreboot/default/patches/0001-hardcode-tianocore-revisions-and-don-t-automatically.patch
+++ b/resources/coreboot/default/patches/0001-hardcode-tianocore-revisions-and-don-t-automatically.patch
@@ -1,4 +1,4 @@
-From 0d1703b38c15d3a30d86e257adc71212ed1553e6 Mon Sep 17 00:00:00 2001
+From 9000fe203d31e584bdc7d3e43d7ea615d9335205 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Thu, 13 May 2021 23:52:08 +0100
 Subject: [PATCH 01/19] hardcode tianocore revisions, and don't automatically
diff --git a/resources/coreboot/default/patches/0002-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch b/resources/coreboot/default/patches/0002-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
index 5d57fe10..47a99bf0 100644
--- a/resources/coreboot/default/patches/0002-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
+++ b/resources/coreboot/default/patches/0002-lenovo-x60-64MiB-Video-RAM-changed-to-default-previo.patch
@@ -1,4 +1,4 @@
-From 7f56e3dc6b92f643e4f2c7eebf7da7c0a5e0cc1d Mon Sep 17 00:00:00 2001
+From 7abacb9f5b07df89136751fbcc1569fe02f1c23b Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@osboot.org>
 Date: Sun, 3 Jan 2021 03:34:01 +0000
 Subject: [PATCH 02/19] lenovo/x60: 64MiB Video RAM changed to default
diff --git a/resources/coreboot/default/patches/0003-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch b/resources/coreboot/default/patches/0003-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
index 724e53cc..f4ccc837 100644
--- a/resources/coreboot/default/patches/0003-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
+++ b/resources/coreboot/default/patches/0003-lenovo-t60-make-64MiB-VRAM-the-default-in-cmos.defau.patch
@@ -1,4 +1,4 @@
-From 08f1bb813721bb9e7c9f60d3d08e22391080c69e Mon Sep 17 00:00:00 2001
+From d57e7edf35a923ebf0177b9a816179be0ad4b72f Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@osboot.org>
 Date: Mon, 22 Feb 2021 22:16:59 +0000
 Subject: [PATCH 03/19] lenovo/t60: make 64MiB VRAM the default in cmos.default
diff --git a/resources/coreboot/default/patches/0004-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch b/resources/coreboot/default/patches/0004-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
index 64ce8376..38f57332 100644
--- a/resources/coreboot/default/patches/0004-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
+++ b/resources/coreboot/default/patches/0004-apple-macbook21-Set-default-VRAM-to-64MiB-instead-of.patch
@@ -1,4 +1,4 @@
-From edac42ddfaf86d60575f7789ad66c95adea8b4af Mon Sep 17 00:00:00 2001
+From d983a2fdd6434792ea03c6c83c0585b0e403cf31 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@retroboot.org>
 Date: Fri, 19 Mar 2021 05:54:58 +0000
 Subject: [PATCH 04/19] apple/macbook21: Set default VRAM to 64MiB instead of
diff --git a/resources/coreboot/default/patches/0005-util-cbfstool-Do-not-set-D_XOPEN_SOURCE-on-FreeBSD.patch b/resources/coreboot/default/patches/0005-util-cbfstool-Do-not-set-D_XOPEN_SOURCE-on-FreeBSD.patch
index 57ef67da..64bdb33c 100644
--- a/resources/coreboot/default/patches/0005-util-cbfstool-Do-not-set-D_XOPEN_SOURCE-on-FreeBSD.patch
+++ b/resources/coreboot/default/patches/0005-util-cbfstool-Do-not-set-D_XOPEN_SOURCE-on-FreeBSD.patch
@@ -1,4 +1,4 @@
-From 95466021fb0e581442be523f4b84939ef5c28ea7 Mon Sep 17 00:00:00 2001
+From 58cd6e0c97c67fdd8948975b74567e1ff6d8d6ee Mon Sep 17 00:00:00 2001
 From: Idwer Vollering <vidwer@gmail.com>
 Date: Sun, 9 May 2021 18:16:26 +0200
 Subject: [PATCH 05/19] util/cbfstool: Do not set -D_XOPEN_SOURCE on FreeBSD
diff --git a/resources/coreboot/default/patches/0006-src-security-intel-stm-Add-warning-for-non-reproduci.patch b/resources/coreboot/default/patches/0006-src-security-intel-stm-Add-warning-for-non-reproduci.patch
index a232110b..b01cf1c3 100644
--- a/resources/coreboot/default/patches/0006-src-security-intel-stm-Add-warning-for-non-reproduci.patch
+++ b/resources/coreboot/default/patches/0006-src-security-intel-stm-Add-warning-for-non-reproduci.patch
@@ -1,4 +1,4 @@
-From 44de7f951ae55d60b96794b68d505d42af184d0a Mon Sep 17 00:00:00 2001
+From 1804c7cb2e6e62a363a18f237ecdf8337e58c20d Mon Sep 17 00:00:00 2001
 From: Martin Roth <martin@coreboot.org>
 Date: Mon, 10 May 2021 11:28:45 -0600
 Subject: [PATCH 06/19] src/security/intel/stm: Add warning for
diff --git a/resources/coreboot/default/patches/0007-Makefile-Don-t-run-genbuild_h-if-not-doing-a-build.patch b/resources/coreboot/default/patches/0007-Makefile-Don-t-run-genbuild_h-if-not-doing-a-build.patch
index ad4ceb7a..6b7a4341 100644
--- a/resources/coreboot/default/patches/0007-Makefile-Don-t-run-genbuild_h-if-not-doing-a-build.patch
+++ b/resources/coreboot/default/patches/0007-Makefile-Don-t-run-genbuild_h-if-not-doing-a-build.patch
@@ -1,4 +1,4 @@
-From 87f01ab327469aae978884b83dd218416cf5035b Mon Sep 17 00:00:00 2001
+From 65f0c7278ec0c1cb197e3110e2bc4ebb4bd5caf4 Mon Sep 17 00:00:00 2001
 From: Martin Roth <martin@coreboot.org>
 Date: Sun, 9 May 2021 10:26:10 -0600
 Subject: [PATCH 07/19] Makefile: Don't run genbuild_h if not doing a build
diff --git a/resources/coreboot/default/patches/0008-util-genbuild_h-Update-IASL-location-finding-code.patch b/resources/coreboot/default/patches/0008-util-genbuild_h-Update-IASL-location-finding-code.patch
index 637bc4a8..e8cd7117 100644
--- a/resources/coreboot/default/patches/0008-util-genbuild_h-Update-IASL-location-finding-code.patch
+++ b/resources/coreboot/default/patches/0008-util-genbuild_h-Update-IASL-location-finding-code.patch
@@ -1,4 +1,4 @@
-From bb4f6e441d94d52c37998d6894b373a4e797de80 Mon Sep 17 00:00:00 2001
+From aba6235d16b87706357d0fdb35afaf52968fac53 Mon Sep 17 00:00:00 2001
 From: Martin Roth <martin@coreboot.org>
 Date: Sun, 9 May 2021 11:44:15 -0600
 Subject: [PATCH 08/19] util/genbuild_h: Update IASL location finding code
diff --git a/resources/coreboot/default/patches/0009-util-crossgcc-Update-gmp-to-6.2.1.patch b/resources/coreboot/default/patches/0009-util-crossgcc-Update-gmp-to-6.2.1.patch
index 94d7b238..f9190e2e 100644
--- a/resources/coreboot/default/patches/0009-util-crossgcc-Update-gmp-to-6.2.1.patch
+++ b/resources/coreboot/default/patches/0009-util-crossgcc-Update-gmp-to-6.2.1.patch
@@ -1,4 +1,4 @@
-From f9e67d0def253cd28ffe841f1e99885e7a44b0b5 Mon Sep 17 00:00:00 2001
+From f2c8d0323f4d2f1abc4dc0402bd871d9234850f3 Mon Sep 17 00:00:00 2001
 From: Patrick Georgi <pgeorgi@google.com>
 Date: Mon, 10 May 2021 23:34:18 +0200
 Subject: [PATCH 09/19] util/crossgcc: Update gmp to 6.2.1
diff --git a/resources/coreboot/default/patches/0010-util-crossgcc-Update-mpc-to-1.2.1.patch b/resources/coreboot/default/patches/0010-util-crossgcc-Update-mpc-to-1.2.1.patch
index cacf8c1a..1b8f7168 100644
--- a/resources/coreboot/default/patches/0010-util-crossgcc-Update-mpc-to-1.2.1.patch
+++ b/resources/coreboot/default/patches/0010-util-crossgcc-Update-mpc-to-1.2.1.patch
@@ -1,4 +1,4 @@
-From af8727a0b86f0f705129529a478a29622df3fed9 Mon Sep 17 00:00:00 2001
+From 7237b72a6693c14ba51c798bc53873a4d8751d52 Mon Sep 17 00:00:00 2001
 From: Patrick Georgi <pgeorgi@google.com>
 Date: Mon, 10 May 2021 23:35:51 +0200
 Subject: [PATCH 10/19] util/crossgcc: Update mpc to 1.2.1
diff --git a/resources/coreboot/default/patches/0011-tests-Enable-config-override-for-tests.patch b/resources/coreboot/default/patches/0011-tests-Enable-config-override-for-tests.patch
index 86229b47..00d74e06 100644
--- a/resources/coreboot/default/patches/0011-tests-Enable-config-override-for-tests.patch
+++ b/resources/coreboot/default/patches/0011-tests-Enable-config-override-for-tests.patch
@@ -1,4 +1,4 @@
-From 277f409dcb520911b55a73c5f5c0e39ae1078012 Mon Sep 17 00:00:00 2001
+From d654c14aa2f150d7b15abc89a3c267b24ca123a1 Mon Sep 17 00:00:00 2001
 From: Jakub Czapiga <jacz@semihalf.com>
 Date: Wed, 28 Apr 2021 16:50:51 +0200
 Subject: [PATCH 11/19] tests: Enable config override for tests
diff --git a/resources/coreboot/default/patches/0012-src-Match-array-format-in-function-declarations-and-.patch b/resources/coreboot/default/patches/0012-src-Match-array-format-in-function-declarations-and-.patch
index ab63e840..6079a668 100644
--- a/resources/coreboot/default/patches/0012-src-Match-array-format-in-function-declarations-and-.patch
+++ b/resources/coreboot/default/patches/0012-src-Match-array-format-in-function-declarations-and-.patch
@@ -1,4 +1,4 @@
-From bc1be4e1a6c6104693ad8fc44be8feb8e0112765 Mon Sep 17 00:00:00 2001
+From f92b7f3c5c9da178e2417333895fe735796e7954 Mon Sep 17 00:00:00 2001
 From: Patrick Georgi <pgeorgi@google.com>
 Date: Wed, 12 May 2021 14:52:12 +0200
 Subject: [PATCH 12/19] src: Match array format in function declarations and
diff --git a/resources/coreboot/default/patches/0013-src-security-tpm-Deal-with-zero-length-tlcl-writes.patch b/resources/coreboot/default/patches/0013-src-security-tpm-Deal-with-zero-length-tlcl-writes.patch
index 3f5a2901..4f3bff48 100644
--- a/resources/coreboot/default/patches/0013-src-security-tpm-Deal-with-zero-length-tlcl-writes.patch
+++ b/resources/coreboot/default/patches/0013-src-security-tpm-Deal-with-zero-length-tlcl-writes.patch
@@ -1,4 +1,4 @@
-From 416c686c4c06ab42f700187ee1dc7fe9e4fed525 Mon Sep 17 00:00:00 2001
+From 6c9fe645f8444bd4586e26b545cc9dceb162f03a Mon Sep 17 00:00:00 2001
 From: Patrick Georgi <pgeorgi@google.com>
 Date: Wed, 12 May 2021 14:54:49 +0200
 Subject: [PATCH 13/19] src/security/tpm: Deal with zero length tlcl writes
diff --git a/resources/coreboot/default/patches/0014-lenovo-t400-set-VRAM-to-352MiB-VRAM-by-default.patch b/resources/coreboot/default/patches/0014-lenovo-t400-set-VRAM-to-352MiB-VRAM-by-default.patch
index ca574474..48752583 100644
--- a/resources/coreboot/default/patches/0014-lenovo-t400-set-VRAM-to-352MiB-VRAM-by-default.patch
+++ b/resources/coreboot/default/patches/0014-lenovo-t400-set-VRAM-to-352MiB-VRAM-by-default.patch
@@ -1,4 +1,4 @@
-From 0966b4c69f6c3df000cb4f904b9dc0bf822e5b4f Mon Sep 17 00:00:00 2001
+From ade5066801bbc20e88205299e3b66de7f1a1bc82 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:10:33 +0100
 Subject: [PATCH 14/19] lenovo/t400: set VRAM to 352MiB VRAM by default
diff --git a/resources/coreboot/default/patches/0015-lenovo-x200-set-VRAM-to-352MiB-by-default.patch b/resources/coreboot/default/patches/0015-lenovo-x200-set-VRAM-to-352MiB-by-default.patch
index 1f30779a..c3d3bd64 100644
--- a/resources/coreboot/default/patches/0015-lenovo-x200-set-VRAM-to-352MiB-by-default.patch
+++ b/resources/coreboot/default/patches/0015-lenovo-x200-set-VRAM-to-352MiB-by-default.patch
@@ -1,4 +1,4 @@
-From 4680045aaa952ce8b2d8fe75721b5f8e662286d1 Mon Sep 17 00:00:00 2001
+From a4b575bf23bade522ac6a777793ef01abcb2b821 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:11:59 +0100
 Subject: [PATCH 15/19] lenovo/x200: set VRAM to 352MiB by default
diff --git a/resources/coreboot/default/patches/0016-gigabyte-ga-g41m-es2l-set-VRAM-to-352MiB-by-default.patch b/resources/coreboot/default/patches/0016-gigabyte-ga-g41m-es2l-set-VRAM-to-352MiB-by-default.patch
index 450bede3..0e0bab05 100644
--- a/resources/coreboot/default/patches/0016-gigabyte-ga-g41m-es2l-set-VRAM-to-352MiB-by-default.patch
+++ b/resources/coreboot/default/patches/0016-gigabyte-ga-g41m-es2l-set-VRAM-to-352MiB-by-default.patch
@@ -1,4 +1,4 @@
-From 213c3ad9ca58b0c7f273d80f195c442ed5d7ec54 Mon Sep 17 00:00:00 2001
+From 8b2eb25cdd1868e2e98eefa783e04b1797b1a701 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:18:26 +0100
 Subject: [PATCH 16/19] gigabyte/ga-g41m-es2l: set VRAM to 352MiB by default
diff --git a/resources/coreboot/default/patches/0017-acer-g43t-am3-set-VRAM-to-352MiB-by-default.patch b/resources/coreboot/default/patches/0017-acer-g43t-am3-set-VRAM-to-352MiB-by-default.patch
index 112c0521..46ef21a6 100644
--- a/resources/coreboot/default/patches/0017-acer-g43t-am3-set-VRAM-to-352MiB-by-default.patch
+++ b/resources/coreboot/default/patches/0017-acer-g43t-am3-set-VRAM-to-352MiB-by-default.patch
@@ -1,4 +1,4 @@
-From fb4c9fcad31d50949ffaeb35dbcfe10c7b9c1dbb Mon Sep 17 00:00:00 2001
+From f90a509e24ced459bc24ad9c34f363f9f413f558 Mon Sep 17 00:00:00 2001
 From: Leah Rowe <leah@libreboot.org>
 Date: Fri, 14 May 2021 13:21:39 +0100
 Subject: [PATCH 17/19] acer/g43t-am3: set VRAM to 352MiB by default
diff --git a/resources/coreboot/default/patches/0018-Revert-cpu-intel-Configure-IA32_FEATURE_CONTROL-for-.patch b/resources/coreboot/default/patches/0018-Revert-cpu-intel-Configure-IA32_FEATURE_CONTROL-for-.patch
index f01d7765..ededc2c2 100644
--- a/resources/coreboot/default/patches/0018-Revert-cpu-intel-Configure-IA32_FEATURE_CONTROL-for-.patch
+++ b/resources/coreboot/default/patches/0018-Revert-cpu-intel-Configure-IA32_FEATURE_CONTROL-for-.patch
@@ -1,4 +1,4 @@
-From 96ab5f286ede629c1a67c97d7ef63a05d922d159 Mon Sep 17 00:00:00 2001
+From f2b62dca2238ec7782739e81490846673d754629 Mon Sep 17 00:00:00 2001
 From: Rodrigo <rm@firemail.cc>
 Date: Mon, 23 Aug 2021 02:20:32 -0300
 Subject: [PATCH 18/19] Revert "cpu/intel: Configure IA32_FEATURE_CONTROL for
diff --git a/resources/coreboot/default/patches/0019-Fix-missing-include.patch b/resources/coreboot/default/patches/0019-Fix-missing-include.patch
index 969b91a8..372bb372 100644
--- a/resources/coreboot/default/patches/0019-Fix-missing-include.patch
+++ b/resources/coreboot/default/patches/0019-Fix-missing-include.patch
@@ -1,11 +1,14 @@
-From e91840f8c19fde6706937a1e9285ac83fceec59a Mon Sep 17 00:00:00 2001
+From 989abca57d4bcc2f7194a9dfb3a7fc67f62fbde3 Mon Sep 17 00:00:00 2001
 From: Rodrigo <rm@firemail.cc>
 Date: Mon, 23 Aug 2021 03:51:21 -0300
 Subject: [PATCH 19/19] Fix missing include
 
 ---
  src/cpu/intel/model_1067x/model_1067x_init.c | 1 +
- 1 file changed, 1 insertion(+)
+ src/cpu/intel/model_106cx/model_106cx_init.c | 1 +
+ src/cpu/intel/model_6ex/model_6ex_init.c     | 1 +
+ src/cpu/intel/model_6fx/model_6fx_init.c     | 1 +
+ 4 files changed, 4 insertions(+)
 
 diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
 index ca3ce274fc..cc7a5edca9 100644
@@ -19,6 +22,42 @@ index ca3ce274fc..cc7a5edca9 100644
  
  #include "chip.h"
  
+diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
+index a0917045dd..7b88f19ee0 100644
+--- a/src/cpu/intel/model_106cx/model_106cx_init.c
++++ b/src/cpu/intel/model_106cx/model_106cx_init.c
+@@ -8,6 +8,7 @@
+ #include <cpu/intel/speedstep.h>
+ #include <cpu/x86/cache.h>
+ #include <cpu/x86/name.h>
++#include <cpu/intel/common/common.h>
+ 
+ #define HIGHEST_CLEVEL		3
+ static void configure_c_states(void)
+diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c
+index 31399bdbd7..7347400766 100644
+--- a/src/cpu/intel/model_6ex/model_6ex_init.c
++++ b/src/cpu/intel/model_6ex/model_6ex_init.c
+@@ -8,6 +8,7 @@
+ #include <cpu/intel/speedstep.h>
+ #include <cpu/x86/cache.h>
+ #include <cpu/x86/name.h>
++#include <cpu/intel/common/common.h>
+ 
+ #define HIGHEST_CLEVEL		3
+ static void configure_c_states(void)
+diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c
+index 17a865c9f3..3b8a2f4708 100644
+--- a/src/cpu/intel/model_6fx/model_6fx_init.c
++++ b/src/cpu/intel/model_6fx/model_6fx_init.c
+@@ -8,6 +8,7 @@
+ #include <cpu/intel/speedstep.h>
+ #include <cpu/x86/cache.h>
+ #include <cpu/x86/name.h>
++#include <cpu/intel/common/common.h>
+ 
+ #define HIGHEST_CLEVEL		3
+ static void configure_c_states(void)
 -- 
 2.25.1