summaryrefslogtreecommitdiff
path: root/resources/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch
diff options
context:
space:
mode:
authorLeah Rowe <leah@libreboot.org>2023-07-08 22:07:36 +0100
committerLeah Rowe <leah@libreboot.org>2023-07-08 22:09:58 +0100
commit2bbb4c839a8224b17c7929b7ea612085d1351d20 (patch)
tree2542dfe950ff5927fa0d2f3fb1782c262467953e /resources/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch
parent6bc619db902015af208f2b3d2321708e1db9da11 (diff)
remove blobutil and boards/utils needing/for blobs
delete all blobs. TODO: actually deblob coreboot/uboot when downloading. i'll that in a little while, in an upcoming commit. yes. purge it all, in fsf style. censor what the fsf doesn't like. so that they can feel good about having less, because ideological purity is better than helping more people use coreboot, yes? Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'resources/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch')
-rw-r--r--resources/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch57
1 files changed, 0 insertions, 57 deletions
diff --git a/resources/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch b/resources/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch
deleted file mode 100644
index 07525d18..00000000
--- a/resources/coreboot/haswell/patches/0009-nb-intel-haswell-nri-Only-do-CPU-replacement-check-o.patch
+++ /dev/null
@@ -1,57 +0,0 @@
-From 731216aef3129ae27ad5adc7266cb8a58090c9fc Mon Sep 17 00:00:00 2001
-From: Angel Pons <th3fanbus@gmail.com>
-Date: Sun, 26 Jun 2022 10:32:12 +0200
-Subject: [PATCH 09/26] nb/intel/haswell/nri: Only do CPU replacement check on
- cold boots
-
-CPU replacement check should only be done on cold boots.
-
-Change-Id: I98efa105f4df755b23febe12dd7b356787847852
-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
----
- .../intel/haswell/native_raminit/raminit_native.c | 13 ++++++-------
- 1 file changed, 6 insertions(+), 7 deletions(-)
-
-diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-index 0869db3902..bd9bc8e692 100644
---- a/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
-@@ -40,15 +40,14 @@ static enum raminit_boot_mode get_boot_mode(void)
- return (pmcon_2 & bitmask) == bitmask ? BOOTMODE_WARM : BOOTMODE_COLD;
- }
-
--static bool early_init_native(int s3resume)
-+static bool early_init_native(enum raminit_boot_mode bootmode)
- {
- printk(BIOS_DEBUG, "Starting native platform initialisation\n");
-
- intel_early_me_init();
-- /** TODO: CPU replacement check must be skipped in warm boots and S3 resumes **/
-- const bool cpu_replaced = !s3resume && intel_early_me_cpu_replacement_check();
-+ bool cpu_replaced = bootmode == BOOTMODE_COLD && intel_early_me_cpu_replacement_check();
-
-- early_pch_init_native(s3resume);
-+ early_pch_init_native(bootmode == BOOTMODE_S3);
-
- if (!CONFIG(INTEL_LYNXPOINT_LP))
- dmi_early_init();
-@@ -176,13 +175,13 @@ void perform_raminit(const int s3resume)
- * See, this function's name is a lie. There are more things to
- * do that memory initialisation, but they are relatively easy.
- */
-- const bool cpu_replaced = early_init_native(s3resume);
-+ const enum raminit_boot_mode orig_bootmode = get_boot_mode();
-+
-+ const bool cpu_replaced = early_init_native(s3resume ? BOOTMODE_S3 : orig_bootmode);
-
- wait_txt_clear();
- wrmsr(0x2e6, (msr_t) {.lo = 0, .hi = 0});
-
-- const enum raminit_boot_mode orig_bootmode = get_boot_mode();
--
- struct mrc_data md = prepare_mrc_cache();
-
- const enum raminit_boot_mode bootmode =
---
-2.39.2
-