diff options
author | Leah Rowe <leah@libreboot.org> | 2022-11-19 03:51:59 +0000 |
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committer | Leah Rowe <leah@libreboot.org> | 2022-11-19 03:51:59 +0000 |
commit | 24a866baea03b47011b3776fdc3508c2ca7cef2d (patch) | |
tree | ebea355d6fa18ed8d3e36f131f76c099e214f9bc /resources/coreboot/fam15h_udimm/patches | |
parent | f5b4eb3f1e1e669c9b2c34a64dcabaa0e978831a (diff) |
remove kfsn4-dre, kcma-d8 and kgpe-d16
buggy, buggy, buggy, buggy, buggy, buggy, buggy
full of bugs, these boards never worked properly. i got ripped
off with these.
now i'm ripping off the band aid
use dasharo if you want d16 stuff. i'm done with it.
Diffstat (limited to 'resources/coreboot/fam15h_udimm/patches')
3 files changed, 0 insertions, 101 deletions
diff --git a/resources/coreboot/fam15h_udimm/patches/0001-Revert-Revert-nb-amd-mct_ddr3-Fix-RDIMM-training-fai.patch b/resources/coreboot/fam15h_udimm/patches/0001-Revert-Revert-nb-amd-mct_ddr3-Fix-RDIMM-training-fai.patch deleted file mode 100644 index 3c131a86..00000000 --- a/resources/coreboot/fam15h_udimm/patches/0001-Revert-Revert-nb-amd-mct_ddr3-Fix-RDIMM-training-fai.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 8f2988cba4fffef1bd4f65e123c76bf4b7a18672 Mon Sep 17 00:00:00 2001 -From: "D.d.P.F. Lombard" <lombard@lombards.xyz> -Date: Sun, 7 Feb 2021 15:29:40 +0100 -Subject: [PATCH 1/6] Revert "Revert "nb/amd/mct_ddr3: Fix RDIMM training - failure on Fam15h" (fixes a bug that prevent certain RAM modules from - booting) - -This reverts commit 610d1c67b2298a9840681c2b4492b6d3fdf44a46. - -After 610d1c67b2298a9840681c2b4492b6d3fdf44a46 many RAM modules wouldn't work and you couldn't even see any output on the screen. ---- - src/northbridge/amd/amdmct/mct_ddr3/mctproc.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c -index ddaaaab8d5..3b07786b91 100644 ---- a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c -+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c -@@ -71,6 +71,9 @@ u32 mct_SetDramConfigMisc2(struct DCTStatStruc *pDCTstat, - misc2 |= ((cs_mux_67 & 0x1) << 27); - misc2 &= ~(0x1 << 26); /* CsMux45 = cs_mux_45 */ - misc2 |= ((cs_mux_45 & 0x1) << 26); -+ -+ if (pDCTstat->Status & (1 << SB_Registered)) -+ misc2 |= 1 << SubMemclkRegDly; - } else if (pDCTstat->LogicalCPUID & (AMD_DR_Dx | AMD_DR_Cx)) { - if (pDCTstat->Status & (1 << SB_Registered)) { - misc2 |= 1 << SubMemclkRegDly; --- -2.25.1 - diff --git a/resources/coreboot/fam15h_udimm/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch b/resources/coreboot/fam15h_udimm/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch deleted file mode 100644 index 5a39bd69..00000000 --- a/resources/coreboot/fam15h_udimm/patches/0003-Tweak-cmos-defaults-for-KCMA-D8-for-a-little-speed-b.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 7a00638cea41ad939a59fc0e5996959435fbdb7f Mon Sep 17 00:00:00 2001 -From: "D.d.P.F. Lombard" <lombard@lombards.xyz> -Date: Sun, 7 Feb 2021 16:40:05 +0100 -Subject: [PATCH 3/6] Tweak cmos defaults for KCMA-D8 (for a little speed - boost) - -63xx CPUs have the option to use a reduced latency value inside the crossbar. -Setting "experimental_memory_speed_boost=Enable" aparently only has an effect -on 63xx CPUs and may, in certain cases, yield a slight memory bandwidth -increase (according to Timothy Pearson), but maybe it also works for -43xx CPUs. - -Setting "l3_cache_partitioning=Enable" will increase performance in certain -situations. See: -https://developer.arm.com/documentation/100453/0401/functional-description/l3-cache/l3-cache-partitioning?lang=en ---- - src/mainboard/asus/kcma-d8/cmos.default | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/src/mainboard/asus/kcma-d8/cmos.default b/src/mainboard/asus/kcma-d8/cmos.default -index 306687157f..4e033d756f 100644 ---- a/src/mainboard/asus/kcma-d8/cmos.default -+++ b/src/mainboard/asus/kcma-d8/cmos.default -@@ -21,9 +21,9 @@ sata_ahci_mode=Enable - sata_alpm=Disable - maximum_p_state_limit=0xf - probe_filter=Auto --l3_cache_partitioning=Disable -+l3_cache_partitioning=Enable - gart=Enable - ehci_async_data_cache=Enable --experimental_memory_speed_boost=Disable -+experimental_memory_speed_boost=Enable - power_on_after_fail=On - boot_option=Fallback --- -2.25.1 - diff --git a/resources/coreboot/fam15h_udimm/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch b/resources/coreboot/fam15h_udimm/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch deleted file mode 100644 index 5ada0dff..00000000 --- a/resources/coreboot/fam15h_udimm/patches/0006-asus-kgpe-d16-enable-lc_cache_partitioning-and-exper.patch +++ /dev/null @@ -1,32 +0,0 @@ -From f0aac7261e16adc8e61eca7a506ff2de5112be47 Mon Sep 17 00:00:00 2001 -From: Leah Rowe <leah@libreboot.org> -Date: Fri, 7 May 2021 19:43:32 +0100 -Subject: [PATCH 6/6] asus/kgpe-d16: enable lc_cache_partitioning and - experimental_memory_speed_boost - -This really only benefits 63xx opterons which are less reliable in libreboot due -to lack of CPU microcode updates, but we might aswell enable this anyway. ---- - src/mainboard/asus/kgpe-d16/cmos.default | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/src/mainboard/asus/kgpe-d16/cmos.default b/src/mainboard/asus/kgpe-d16/cmos.default -index 7c496a50d7..8a25620e1d 100644 ---- a/src/mainboard/asus/kgpe-d16/cmos.default -+++ b/src/mainboard/asus/kgpe-d16/cmos.default -@@ -21,10 +21,10 @@ sata_ahci_mode=Enable - sata_alpm=Disable - maximum_p_state_limit=0xf - probe_filter=Auto --l3_cache_partitioning=Disable -+l3_cache_partitioning=Enable - ieee1394_controller=Enable - gart=Enable - ehci_async_data_cache=Enable --experimental_memory_speed_boost=Disable -+experimental_memory_speed_boost=Enable - power_on_after_fail=On - boot_option=Fallback --- -2.25.1 - |