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authorLeah Rowe <leah@libreboot.org>2023-07-16 03:18:58 +0100
committerLeah Rowe <leah@libreboot.org>2023-07-16 03:18:58 +0100
commitaf084014f04602f570a23b0cc23a112401348faf (patch)
tree87d24edd508fe384d236fa81a701f6d837adfe7e /resources/coreboot/fam15h_udimm/patches/0001-Revert-Revert-nb-amd-mct_ddr3-Fix-RDIMM-training-fai.patch
parente6002b91557bc4da7dccf06cd861a33a67262672 (diff)
coreboot: re-add asus kgpe-d16/kcma-d8/kfsn4-dre
Libreboot 20220710 was the last release to support these boards. I plan to eventually port code differences between D8/D16 to Dasharo, for KCMA-D8 support in Dasharo, to then use in Libreboot for both KCMA-D8 and KGPE-D16, but I have no plans to update the KFSN4-DRE code, at least for now. Libreboot 20220710 used coreboot 4.11, whereas this patch makes use of coreboot 4.11_branch; the crossgcc toolchains no longer compile on modern distros, so I spent time patching those (tested in Debian Sid, will also work on Arch Linux and so on). The acpica downloads now fail, in 4.11_branch, because Intel made some changes upstream for these tarball downloads. Newer coreboot works around this by grabbing tarballs from github, itself a non-ideal solution, but I digress; this patch changes coreboot crossgcc (in 4.11_branch) to download the acpica tarball from libreboot rsync, where I've added it. This patch also re-introduces the PIKE2008 fix, where empty option ROMs for these are inserted into CBFS. This prevents SeaBIOS from loading the real option ROMs, which would cause SeaBIOS to hang. This means that SAS drives are not supported in SeaBIOS, for these boards in Libreboot. I previously said, in the Censored Libreboot c20230710 announcement, that I would *only* merge D8/D16 when I've added Dasharo support to Libreboot, and use that, but the work to make coreboot 4.11_branch compile is something I'm quite proud of and I see no reason to exclude from lbmk master branch. Honestly, there's not much different than 4.11, code-wise. I *probably* won't use 4.11_branch for the next Libreboot release, on D8/D16. By then, I might have Dasharo integrated in lbmk instead. We shall see. Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'resources/coreboot/fam15h_udimm/patches/0001-Revert-Revert-nb-amd-mct_ddr3-Fix-RDIMM-training-fai.patch')
-rw-r--r--resources/coreboot/fam15h_udimm/patches/0001-Revert-Revert-nb-amd-mct_ddr3-Fix-RDIMM-training-fai.patch31
1 files changed, 31 insertions, 0 deletions
diff --git a/resources/coreboot/fam15h_udimm/patches/0001-Revert-Revert-nb-amd-mct_ddr3-Fix-RDIMM-training-fai.patch b/resources/coreboot/fam15h_udimm/patches/0001-Revert-Revert-nb-amd-mct_ddr3-Fix-RDIMM-training-fai.patch
new file mode 100644
index 00000000..3c131a86
--- /dev/null
+++ b/resources/coreboot/fam15h_udimm/patches/0001-Revert-Revert-nb-amd-mct_ddr3-Fix-RDIMM-training-fai.patch
@@ -0,0 +1,31 @@
+From 8f2988cba4fffef1bd4f65e123c76bf4b7a18672 Mon Sep 17 00:00:00 2001
+From: "D.d.P.F. Lombard" <lombard@lombards.xyz>
+Date: Sun, 7 Feb 2021 15:29:40 +0100
+Subject: [PATCH 1/6] Revert "Revert "nb/amd/mct_ddr3: Fix RDIMM training
+ failure on Fam15h" (fixes a bug that prevent certain RAM modules from
+ booting)
+
+This reverts commit 610d1c67b2298a9840681c2b4492b6d3fdf44a46.
+
+After 610d1c67b2298a9840681c2b4492b6d3fdf44a46 many RAM modules wouldn't work and you couldn't even see any output on the screen.
+---
+ src/northbridge/amd/amdmct/mct_ddr3/mctproc.c | 3 +++
+ 1 file changed, 3 insertions(+)
+
+diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
+index ddaaaab8d5..3b07786b91 100644
+--- a/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
++++ b/src/northbridge/amd/amdmct/mct_ddr3/mctproc.c
+@@ -71,6 +71,9 @@ u32 mct_SetDramConfigMisc2(struct DCTStatStruc *pDCTstat,
+ misc2 |= ((cs_mux_67 & 0x1) << 27);
+ misc2 &= ~(0x1 << 26); /* CsMux45 = cs_mux_45 */
+ misc2 |= ((cs_mux_45 & 0x1) << 26);
++
++ if (pDCTstat->Status & (1 << SB_Registered))
++ misc2 |= 1 << SubMemclkRegDly;
+ } else if (pDCTstat->LogicalCPUID & (AMD_DR_Dx | AMD_DR_Cx)) {
+ if (pDCTstat->Status & (1 << SB_Registered)) {
+ misc2 |= 1 << SubMemclkRegDly;
+--
+2.25.1
+