diff options
| author | Leah Rowe <leah@libreboot.org> | 2023-02-19 18:26:07 +0000 |
|---|---|---|
| committer | Leah Rowe <leah@libreboot.org> | 2023-02-19 19:24:01 +0000 |
| commit | 0d0f6cf3b8f0ac88cbf39c0279bda5623e8f3e62 (patch) | |
| tree | a163516f9bc0cd750a117149eb5de8706be28f55 /resources/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch | |
| parent | dc1fedf9201623783d9c8280bdf6c076b6e65081 (diff) | |
coreboot: update revision of cbtree "default"
Diffstat (limited to 'resources/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch')
| -rw-r--r-- | resources/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/resources/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch b/resources/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch index 6796a112..a115a895 100644 --- a/resources/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch +++ b/resources/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch @@ -1,7 +1,7 @@ -From 82418ef368b7876fb1199b5e77139e2cef411250 Mon Sep 17 00:00:00 2001 +From 2a5dbe6aa7eb46c4fe6db0c6d0ff826e0d733b3f Mon Sep 17 00:00:00 2001 From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com> Date: Wed, 27 Oct 2021 13:36:01 +0200 -Subject: [PATCH 02/17] add c3 and clockgen to apple/macbook21 +Subject: [PATCH 02/16] add c3 and clockgen to apple/macbook21 --- src/mainboard/apple/macbook21/Kconfig | 1 + @@ -46,10 +46,10 @@ index 13d06f0839..88b8669c61 100644 int get_cst_entries(const acpi_cstate_t **entries) diff --git a/src/mainboard/apple/macbook21/devicetree.cb b/src/mainboard/apple/macbook21/devicetree.cb -index bcce778cb1..16025d6fbb 100644 +index dd701da7ed..5587c48d1f 100644 --- a/src/mainboard/apple/macbook21/devicetree.cb +++ b/src/mainboard/apple/macbook21/devicetree.cb -@@ -104,7 +104,13 @@ chip northbridge/intel/i945 +@@ -100,7 +100,13 @@ chip northbridge/intel/i945 end device pci 1f.3 on # SMBUS subsystemid 0x8086 0x7270 @@ -64,5 +64,5 @@ index bcce778cb1..16025d6fbb 100644 end end -- -2.25.1 +2.30.2 |