diff options
| author | Leah Rowe <leah@libreboot.org> | 2023-12-21 19:03:49 +0000 |
|---|---|---|
| committer | Leah Rowe <leah@libreboot.org> | 2023-12-21 19:26:22 +0000 |
| commit | 92986f0c421447f74f18ee061a689950af599e86 (patch) | |
| tree | 31632e6112c7d9257f2f0b001a64aadd7be204a9 /config/coreboot/x60_16mb | |
| parent | 493ebdfb74a7b0f4a5b23b4bdf80936247a67a47 (diff) | |
build/roms: remove modify_coreboot_rom()
don't handle "romtype" at all, in board target.cfg files
add /dev/null as pike2008 rom on amd boards. this serves
the same purpose, adding them as empty vga roms, to add
an empty rom in cbfs. pike2008 cards cause seabios to hang,
when their oproms are executed, so we insert a fake rom
on i945 thinkpads, use the coreboot config option:
CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK
when set, this enables the same bootblock copy, for use
with bucts. these two cases, namely pike2008 roms and
i945 bootblock copies, no longer need to be handled in code
Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'config/coreboot/x60_16mb')
| -rw-r--r-- | config/coreboot/x60_16mb/config/libgfxinit_corebootfb | 2 | ||||
| -rw-r--r-- | config/coreboot/x60_16mb/config/libgfxinit_txtmode | 2 | ||||
| -rw-r--r-- | config/coreboot/x60_16mb/target.cfg | 1 |
3 files changed, 2 insertions, 3 deletions
diff --git a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb index 7bab148e..79d79b20 100644 --- a/config/coreboot/x60_16mb/config/libgfxinit_corebootfb +++ b/config/coreboot/x60_16mb/config/libgfxinit_corebootfb @@ -258,7 +258,7 @@ CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_HPET_MIN_TICKS=0x80 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y -# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set +CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 diff --git a/config/coreboot/x60_16mb/config/libgfxinit_txtmode b/config/coreboot/x60_16mb/config/libgfxinit_txtmode index 8ac47191..51e74dc6 100644 --- a/config/coreboot/x60_16mb/config/libgfxinit_txtmode +++ b/config/coreboot/x60_16mb/config/libgfxinit_txtmode @@ -258,7 +258,7 @@ CONFIG_FIXED_SMBUS_IO_BASE=0x400 CONFIG_HPET_MIN_TICKS=0x80 CONFIG_CBFS_CACHE_ALIGN=8 CONFIG_INTEL_HAS_TOP_SWAP=y -# CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK is not set +CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK=y CONFIG_INTEL_TOP_SWAP_BOOTBLOCK_SIZE=0x10000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 diff --git a/config/coreboot/x60_16mb/target.cfg b/config/coreboot/x60_16mb/target.cfg index 3f803f95..0b6bb18c 100644 --- a/config/coreboot/x60_16mb/target.cfg +++ b/config/coreboot/x60_16mb/target.cfg @@ -1,5 +1,4 @@ tree="default" -romtype="i945 laptop" arch="i386-elf" payload_grub="y" payload_grub_withseabios="y" |