diff options
author | Leah Rowe <leah@libreboot.org> | 2024-01-25 15:24:02 +0000 |
---|---|---|
committer | Leah Rowe <leah@libreboot.org> | 2024-01-25 15:41:15 +0000 |
commit | 4a6dc5553f2a15542f730ca735fb8bf95fb8f49b (patch) | |
tree | 2cd281908a37816a526a0b6deab51376fec9cf69 /config/coreboot/x230t_12mb/config | |
parent | ece5463109721347c2008b7791907ac4d6825588 (diff) |
coreboot/default: update coreboot to January 2024
Base revision changed to:
commit b6cbfa977f63d57d5d6b9e9f7c1cef30162f575a
Author: Morris Hsu <morris-hsu@quanta.corp-partner.google.com>
Date: Fri Jan 5 16:48:17 2024 +0800
mb/google/dedede/var/metaknight:Add fw_config probe for multi codec
and amplifier
Of note:
Several out-of-tree ports have been adjusted to use the new SPD config
style, where it is defined in devicetree. I manually updated the E6530
patch myself, based on the update that Nicholas did on E6430 (Nicholas
will later update the E6530 patch himself, and I'll re-merge the patch).
Several upstream patches now exist in this revision, that we were able
to remove from lbmk.
The heap size patch was reverted upstream, as we did, but see:
https://review.coreboot.org/c/coreboot/+/80023
https://review.coreboot.org/c/coreboot/+/79525
Although we still disable the TSEG Stage Cache, ivy/sandy/haswell should
be reliable on S3 now (leaving TSEG Stage Cache disabled, for now, anyway).
Also included in upstream now:
commit 29030d0f3dad2ec6b86000dfe2c8e951ae80bf94
Author: Bill Xie <persmule@hardenedlinux.org>
Date: Sat Oct 7 01:32:51 2023 +0800
drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume
Further patches from upstream:
commit 432e92688eca0e85cbaebca3232f65936b305a98
Author: Bill Xie <persmule@hardenedlinux.org>
Date: Fri Nov 3 12:34:01 2023 +0800
drivers/pc80/rtc/option.c: Reset only CMOS range covered by checksum
This should fix S3 on GM45 thinkpads.
Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'config/coreboot/x230t_12mb/config')
-rw-r--r-- | config/coreboot/x230t_12mb/config/libgfxinit_corebootfb | 33 | ||||
-rw-r--r-- | config/coreboot/x230t_12mb/config/libgfxinit_txtmode | 33 |
2 files changed, 46 insertions, 20 deletions
diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb index da91c066..80ed9c78 100644 --- a/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb +++ b/config/coreboot/x230t_12mb/config/libgfxinit_corebootfb @@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y CONFIG_INCLUDE_CONFIG_FILE=y CONFIG_COLLECT_TIMESTAMPS=y # CONFIG_TIMESTAMPS_ON_CONSOLE is not set @@ -136,6 +137,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 # CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="LEN0020" CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 CONFIG_ECAM_MMCONF_BUS_NUMBER=64 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" @@ -153,7 +156,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_VBT_DATA_SIZE_KB=8 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y @@ -202,8 +204,6 @@ CONFIG_BOARD_LENOVO_X230T=y # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_VBOOT_SLOTS_RW_AB=y CONFIG_DRIVER_LENOVO_SERIALS=y -CONFIG_PS2K_EISAID="PNP0303" -CONFIG_PS2M_EISAID="LEN0020" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" CONFIG_GFX_GMA_PANEL_1_PORT="LVDS" CONFIG_D3COLD_SUPPORT=y @@ -212,7 +212,6 @@ CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_CLK_PM is not set # CONFIG_DRIVERS_UART_8250IO is not set CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 -CONFIG_HEAP_SIZE=0x4000 CONFIG_EC_GPE_SCI=0x50 # CONFIG_TPM_MEASURED_BOOT is not set CONFIG_BOARD_ROMSIZE_KB_12288=y @@ -227,6 +226,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set CONFIG_COREBOOT_ROMSIZE_KB_12288=y # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set CONFIG_COREBOOT_ROMSIZE_KB=12288 @@ -257,6 +257,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_EXP_X86_64_SUPPORT is not set CONFIG_SERIRQ_CONTINUOUS_MODE=y +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -266,15 +267,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 CONFIG_INTEL_GMA_BCLM_WIDTH=16 CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0 +CONFIG_HPET_MIN_TICKS=0x80 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_FIXED_SMBUS_IO_BASE=0x400 -CONFIG_HPET_MIN_TICKS=0x80 CONFIG_CBFS_CACHE_ALIGN=8 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 # # CPU @@ -323,8 +325,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y # # Southbridge # +CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y CONFIG_SOUTHBRIDGE_INTEL_C216=y -CONFIG_SOUTH_BRIDGE_OPTIONS=y CONFIG_HIDE_MEI_ON_ERROR=y CONFIG_PCIEXP_HOTPLUG=y CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y @@ -391,6 +393,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y CONFIG_HAVE_EXP_X86_64_SUPPORT=y CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -426,7 +430,7 @@ CONFIG_LINEAR_FRAMEBUFFER=y CONFIG_PCI=y CONFIG_ECAM_MMCONF_SUPPORT=y CONFIG_PCIX_PLUGIN_SUPPORT=y -CONFIG_AZALIA_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y CONFIG_PCIEXP_PLUGIN_SUPPORT=y CONFIG_ECAM_MMCONF_LENGTH=0x04000000 CONFIG_PCI_ALLOW_BUS_MASTER=y @@ -437,8 +441,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set CONFIG_PCIEXP_HOTPLUG_IO=0x2000 -CONFIG_FIRMWARE_CONNECTION_MANAGER=y -# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set # CONFIG_EARLY_PCI_BRIDGE is not set CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 @@ -469,6 +471,7 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_ISSI=y CONFIG_TPM_INIT_RAMSTAGE=y # CONFIG_TPM_PPI is not set CONFIG_NO_UART_ON_SUPERIO=y @@ -485,6 +488,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" CONFIG_GFX_GMA=y CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y CONFIG_GFX_GMA_DYN_CPU=y @@ -531,6 +538,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 CONFIG_PCR_RUNTIME_DATA=3 # end of Trusted Platform Module @@ -560,6 +568,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y CONFIG_RTC=y +CONFIG_HEAP_SIZE=0x100000 # # Console @@ -625,6 +634,10 @@ CONFIG_PAYLOAD_NONE=y # CONFIG_DISPLAY_MTRRS is not set # +# Vendorcode Debug Settings +# + +# # BLOB Debug Settings # diff --git a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode index 6f8df96e..1d90b98c 100644 --- a/config/coreboot/x230t_12mb/config/libgfxinit_txtmode +++ b/config/coreboot/x230t_12mb/config/libgfxinit_txtmode @@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y CONFIG_STATIC_OPTION_TABLE=y CONFIG_COMPRESS_RAMSTAGE_LZMA=y # CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set +CONFIG_SEPARATE_ROMSTAGE=y CONFIG_INCLUDE_CONFIG_FILE=y CONFIG_COLLECT_TIMESTAMPS=y # CONFIG_TIMESTAMPS_ON_CONSOLE is not set @@ -134,6 +135,8 @@ CONFIG_USBDEBUG_HCD_INDEX=2 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 # CONFIG_CONSOLE_POST is not set CONFIG_TPM_PIRQ=0x0 +CONFIG_PS2K_EISAID="PNP0303" +CONFIG_PS2M_EISAID="LEN0020" CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 CONFIG_ECAM_MMCONF_BUS_NUMBER=64 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" @@ -151,7 +154,6 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx30/ifd" CONFIG_ME_BIN_PATH="../../../vendorfiles/xx30/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx30/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 -CONFIG_VBT_DATA_SIZE_KB=8 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y @@ -200,8 +202,6 @@ CONFIG_BOARD_LENOVO_X230T=y # CONFIG_BOARD_LENOVO_X60 is not set CONFIG_VBOOT_SLOTS_RW_AB=y CONFIG_DRIVER_LENOVO_SERIALS=y -CONFIG_PS2K_EISAID="PNP0303" -CONFIG_PS2M_EISAID="LEN0020" CONFIG_THINKPADEC_HKEY_EISAID="LEN0068" CONFIG_GFX_GMA_PANEL_1_PORT="LVDS" CONFIG_D3COLD_SUPPORT=y @@ -210,7 +210,6 @@ CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_CLK_PM is not set # CONFIG_DRIVERS_UART_8250IO is not set CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 -CONFIG_HEAP_SIZE=0x4000 CONFIG_EC_GPE_SCI=0x50 # CONFIG_TPM_MEASURED_BOOT is not set CONFIG_BOARD_ROMSIZE_KB_12288=y @@ -225,6 +224,7 @@ CONFIG_BOARD_ROMSIZE_KB_12288=y # CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set CONFIG_COREBOOT_ROMSIZE_KB_12288=y # CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set +# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set # CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set # CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set CONFIG_COREBOOT_ROMSIZE_KB=12288 @@ -255,6 +255,7 @@ CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 # CONFIG_USE_EXP_X86_64_SUPPORT is not set CONFIG_SERIRQ_CONTINUOUS_MODE=y +CONFIG_PRERAM_CBFS_CACHE_SIZE=0x0 CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 @@ -264,15 +265,16 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 CONFIG_INTEL_GMA_BCLM_WIDTH=16 CONFIG_BOOTBLOCK_IN_CBFS=y +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0 +CONFIG_HPET_MIN_TICKS=0x80 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000 CONFIG_PCIEXP_COMMON_CLOCK=y +CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0 CONFIG_FIXED_SMBUS_IO_BASE=0x400 -CONFIG_HPET_MIN_TICKS=0x80 CONFIG_CBFS_CACHE_ALIGN=8 -CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000 # # CPU @@ -321,8 +323,8 @@ CONFIG_RAMINIT_ENABLE_ECC=y # # Southbridge # +CONFIG_SOUTHBRIDGE_INTEL_BD82X6X_COMMON=y CONFIG_SOUTHBRIDGE_INTEL_C216=y -CONFIG_SOUTH_BRIDGE_OPTIONS=y CONFIG_HIDE_MEI_ON_ERROR=y CONFIG_PCIEXP_HOTPLUG=y CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y @@ -389,6 +391,8 @@ CONFIG_ARCH_ALL_STAGES_X86_32=y CONFIG_HAVE_EXP_X86_64_SUPPORT=y CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y +CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y +CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000 CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y CONFIG_POSTCAR_STAGE=y @@ -422,7 +426,7 @@ CONFIG_VGA_TEXT_FRAMEBUFFER=y CONFIG_PCI=y CONFIG_ECAM_MMCONF_SUPPORT=y CONFIG_PCIX_PLUGIN_SUPPORT=y -CONFIG_AZALIA_PLUGIN_SUPPORT=y +CONFIG_AZALIA_HDA_CODEC_SUPPORT=y CONFIG_PCIEXP_PLUGIN_SUPPORT=y CONFIG_ECAM_MMCONF_LENGTH=0x04000000 CONFIG_PCI_ALLOW_BUS_MASTER=y @@ -433,8 +437,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y # CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set CONFIG_PCIEXP_HOTPLUG_IO=0x2000 -CONFIG_FIRMWARE_CONNECTION_MANAGER=y -# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set # CONFIG_EARLY_PCI_BRIDGE is not set CONFIG_SUBSYSTEM_VENDOR_ID=0x0000 CONFIG_SUBSYSTEM_DEVICE_ID=0x0000 @@ -465,6 +467,7 @@ CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_ISSI=y CONFIG_TPM_INIT_RAMSTAGE=y # CONFIG_TPM_PPI is not set CONFIG_NO_UART_ON_SUPERIO=y @@ -481,6 +484,10 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y # CONFIG_DRIVERS_I2C_MAX98396 is not set CONFIG_INTEL_INT15=y CONFIG_INTEL_GMA_ACPI=y +CONFIG_VBT_CBFS_COMPRESSION_LZMA=y +# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set +# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set +CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma" CONFIG_GFX_GMA=y CONFIG_GFX_GMA_PANEL_1_ON_LVDS=y CONFIG_GFX_GMA_DYN_CPU=y @@ -528,6 +535,7 @@ CONFIG_MAINBOARD_HAS_TPM1=y CONFIG_PCR_BOOT_MODE=1 CONFIG_PCR_HWID=1 CONFIG_PCR_SRTM=2 +CONFIG_PCR_FW_VER=10 CONFIG_PCR_RUNTIME_DATA=3 # end of Trusted Platform Module @@ -557,6 +565,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y CONFIG_RTC=y +CONFIG_HEAP_SIZE=0x100000 # # Console @@ -622,6 +631,10 @@ CONFIG_PAYLOAD_NONE=y # CONFIG_DISPLAY_MTRRS is not set # +# Vendorcode Debug Settings +# + +# # BLOB Debug Settings # |