diff options
author | Leah Rowe <leah@libreboot.org> | 2023-10-12 23:12:17 +0100 |
---|---|---|
committer | Leah Rowe <leah@libreboot.org> | 2023-10-12 23:31:06 +0100 |
commit | 42068f7ce11b88e13b4bf3f2d2290bc4d16d60b7 (patch) | |
tree | 1804ff10c43129667300b9f030e7266bea89c8d2 /config/coreboot/t420_8mb | |
parent | 09881212c3ce8938156ac779463d8859dcddff6b (diff) |
coreboot/default bump: rev d862695f5f, 12 Oct 2023
Riku's mSATA patch for HP8300USDT was merged upstream, so the
patch has been dropped from lbmk because it is contained within
this new coreboot revision.
Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'config/coreboot/t420_8mb')
-rw-r--r-- | config/coreboot/t420_8mb/config/libgfxinit_corebootfb | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb index a5b1eab4..f97552f6 100644 --- a/config/coreboot/t420_8mb/config/libgfxinit_corebootfb +++ b/config/coreboot/t420_8mb/config/libgfxinit_corebootfb @@ -153,15 +153,16 @@ CONFIG_IFD_BIN_PATH="../../../config/ifd/xx20/ifd" CONFIG_ME_BIN_PATH="../../../vendor/xx20/me.bin" CONFIG_GBE_BIN_PATH="../../../config/ifd/xx20/gbe" CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 +CONFIG_VBT_DATA_SIZE_KB=8 CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_DEBUG_SMI is not set CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T420" CONFIG_HAVE_IFD_BIN=y CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 -# CONFIG_DEBUG_SMI is not set # CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set # CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set # CONFIG_BOARD_LENOVO_L520 is not set @@ -209,7 +210,6 @@ CONFIG_PCIEXP_ASPM=y # CONFIG_PCIEXP_CLK_PM is not set # CONFIG_DRIVERS_UART_8250IO is not set CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72 -CONFIG_HEAP_SIZE=0x4000 CONFIG_EC_GPE_SCI=0x50 # CONFIG_TPM_MEASURED_BOOT is not set CONFIG_BOARD_ROMSIZE_KB_8192=y @@ -252,12 +252,12 @@ CONFIG_VERSTAGE_ADDR=0x2000000 CONFIG_SMM_TSEG_SIZE=0x800000 CONFIG_SMM_RESERVED_SIZE=0x100000 CONFIG_SMM_MODULE_STACK_SIZE=0x400 +# CONFIG_USE_EXP_X86_64_SUPPORT is not set CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_EHCI_BAR=0xfef00000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 CONFIG_IED_REGION_SIZE=0x400000 -CONFIG_VBT_DATA_SIZE_KB=8 CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254 CONFIG_INTEL_GMA_BCLV_WIDTH=16 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 @@ -386,7 +386,7 @@ CONFIG_ARCH_POSTCAR_X86_32=y CONFIG_ARCH_RAMSTAGE_X86_32=y CONFIG_ARCH_ALL_STAGES_X86_32=y CONFIG_HAVE_EXP_X86_64_SUPPORT=y -# CONFIG_USE_EXP_X86_64_SUPPORT is not set +CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y CONFIG_PC80_SYSTEM=y CONFIG_HAVE_CMOS_DEFAULT=y @@ -444,10 +444,6 @@ CONFIG_INTEL_GMA_ADD_VBT=y # CONFIG_SOFTWARE_I2C is not set CONFIG_I2C_TRANSFER_TIMEOUT_US=500000 # CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set -CONFIG_NO_DDR5=y -CONFIG_NO_LPDDR4=y -CONFIG_NO_DDR4=y -CONFIG_NO_DDR2=y CONFIG_USE_DDR3=y # end of Devices @@ -458,7 +454,6 @@ CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000 # CONFIG_ELOG is not set CONFIG_CACHE_MRC_SETTINGS=y # CONFIG_MRC_SETTINGS_PROTECT is not set -CONFIG_MRC_CACHE_USING_MRC_VERSION=y # CONFIG_SMMSTORE is not set CONFIG_SPI_FLASH=y CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y @@ -563,6 +558,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y CONFIG_RTC=y +CONFIG_HEAP_SIZE=0x100000 # # Console |